diff --git "a/README.md" "b/README.md" --- "a/README.md" +++ "b/README.md" @@ -16,7 +16,7 @@ task_ids: # Dataset Card for AI-HDLCoder ## Dataset Description -The GitHub Code dataset consists of 100M code files from GitHub in VHDL programming language with extensions totaling in 1.94 GB of data. The dataset was created from the public GitHub dataset on Google BiqQuery at Anhalt University of Applied Sciences. +The GitHub Code dataset consists of 256K code files from GitHub in VHDL programming language with extensions totaling in 1.94 GB of data. The dataset was created from the public GitHub dataset on Google BiqQuery at Anhalt University of Applied Sciences. ## Considerations for Using the Data @@ -26,7 +26,7 @@ The dataset is created for research purposes and consists of source code from a ```python { - "VHDL": [".vhdl", "vhd"], + "Verilog": ["."], } ``` @@ -35,21 +35,175 @@ The dataset is created for research purposes and consists of source code from a ### Data Instances ```python -{ - "repo_name": "sebgod/linguist", - "path": "samples/VHDL/foo.vhd", - "copies": "91", - "size": "217", - "content": "-- VHDL example file\n\nlibrary ieee;\nuse ieee.std_logic_1164.all;\n\nentity inverter is\n\tport(a : in std_logic;\n\t b : out std_logic);\nend entity;\n\narchitecture rtl of inverter is\nbegin\n\tb \u003c\u003d not a;\nend architecture;\n", +[{ + "repo_name": "vlatkoB/flycheck", + "path": "test/resources/checkers/coq-error.v", + "copies": "34", + "size": "149", + "content": "Module Error.\n\n Fixpoint evenb (n:nat) : bool :\u003d\n match n with\n | O \u003d\u003e true\n | S O \u003d\u003e false\n | S (S n\u0027) \u003d\u003e 1\n end.\n\nEnd Error.\n", + "license": "gpl-3.0" +}, { + "repo_name": "ya7lelkom/linguist", + "path": "samples/Verilog/t_button_debounce.v", + "copies": "89", + "size": "1990", + "content": "////////////////////////////////////////////////////////////////////////////////\r\n// Original Author: Schuyler Eldridge\r\n// Contact Point: Schuyler Eldridge (schuyler.eldridge@gmail.com)\r\n// button_debounce.v\r\n// Created: 4.5.2012\r\n// Modified: 4.5.2012\r\n//\r\n// Testbench for button_debounce.v.\r\n// \r\n// Copyright (C) 2012 Schuyler Eldridge, Boston University\r\n//\r\n// This program is free software: you can redistribute it and/or modify\r\n// it under the terms of the GNU General Public License as published by\r\n// the Free Software Foundation, either version 3 of the License.\r\n//\r\n// This program is distributed in the hope that it will be useful,\r\n// but WITHOUT ANY WARRANTY; without even the implied warranty of\r\n// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r\n// GNU General Public License for more details.\r\n//\r\n// You should have received a copy of the GNU General Public License\r\n// along with this program. If not, see \u003chttp://www.gnu.org/licenses/\u003e.\r\n////////////////////////////////////////////////////////////////////////////////\r\n`timescale 1ns / 1ps\r\nmodule t_button_debounce();\r\n\r\n parameter\r\n CLK_FREQUENCY \u003d 66000000,\r\n DEBOUNCE_HZ \u003d 2;\r\n\r\n reg clk, reset_n, button;\r\n wire debounce;\r\n \r\n button_debounce\r\n #(\r\n .CLK_FREQUENCY(CLK_FREQUENCY),\r\n .DEBOUNCE_HZ(DEBOUNCE_HZ)\r\n )\r\n button_debounce\r\n (\r\n .clk(clk),\r\n .reset_n(reset_n),\r\n .button(button),\r\n .debounce(debounce)\r\n );\r\n\r\n initial begin\r\n clk \u003d 1\u0027bx; reset_n \u003d 1\u0027bx; button \u003d 1\u0027bx;\r\n #10 reset_n \u003d 1;\r\n #10 reset_n \u003d 0; clk \u003d 0;\r\n #10 reset_n \u003d 1;\r\n #10 button \u003d 0;\r\n end\r\n\r\n always\r\n #5 clk \u003d ~clk;\r\n\r\n always begin\r\n #100 button \u003d ~button;\r\n #0.1 button \u003d ~button;\r\n #0.1 button \u003d ~button;\r\n #0.1 button \u003d ~button;\r\n #0.1 button \u003d ~button;\r\n #0.1 button \u003d ~button;\r\n #0.1 button \u003d ~button;\r\n #0.1 button \u003d ~button;\r\n #0.1 button \u003d ~button;\r\n end\r\n \r\nendmodule\r\n", + "license": "mit" +}, { + "repo_name": "ya7lelkom/linguist", + "path": "samples/Coq/Basics.v", + "copies": "77", + "size": "14145", + "content": "Inductive day : Type :\u003d\n| monday : day\n| tuesday : day\n| wednesday : day\n| thursday : day\n| friday : day\n| saturday : day\n| sunday : day.\n\nDefinition next_weekday (d:day) : day :\u003d\n match d with\n | monday \u003d\u003e tuesday\n | tuesday \u003d\u003e wednesday\n | wednesday \u003d\u003e thursday\n | thursday \u003d\u003e friday\n | friday \u003d\u003e monday\n | saturday \u003d\u003e monday\n | sunday \u003d\u003e monday\n end.\n\nExample test_next_weekday:\n(next_weekday (next_weekday saturday)) \u003d tuesday.\n\nProof. simpl. reflexivity. Qed.\n\nInductive bool : Type :\u003d\n\t| true : bool\n\t| false : bool.\n\nDefinition negb (b:bool) : bool :\u003d\n\t\t\t\t\t\t\t\t\t\t\t\t\t match b with\n\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t | true \u003d\u003e false\n\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t | false \u003d\u003e true\n\t\t\t\t\t\t\t\t\t\t\t\t\t end.\n\nDefinition andb (b1:bool) (b2:bool) : bool :\u003d\n\t\tmatch b1 with\n\t\t | true \u003d\u003e b2\n\t\t | false \u003d\u003e false\n\t end.\n\nDefinition orb (b1:bool) (b2:bool) : bool :\u003d\n\t\tmatch b1 with\n\t\t | true \u003d\u003e true\n\t\t | false \u003d\u003e b2\n\t\tend.\n\nExample test_orb1: (orb true false) \u003d true.\nProof. simpl. reflexivity. Qed.\n\nExample test_orb2: (orb false false) \u003d false.\nProof. simpl. reflexivity. Qed.\n\nExample test_orb3: (orb false true) \u003d true.\nProof. simpl. reflexivity. Qed.\n\nExample test_orb4: (orb true true) \u003d true.\nProof. simpl. reflexivity. Qed.\n\nDefinition nandb (b1: bool) (b2:bool) : bool :\u003d\n\tmatch b1 with\n\t\t| true \u003d\u003e match b2 with\n\t\t\t\t\t\t\t\t\t\t| false \u003d\u003e true\n\t\t\t\t\t\t\t\t\t\t| true \u003d\u003e false\n\t\t\t\t\t\t\tend\n\t\t| false \u003d\u003e true\n\tend.\n\nExample test_nandb1: (nandb true false) \u003d true.\nProof. simpl. reflexivity. Qed.\nExample test_nandb2: (nandb false false) \u003d true.\nProof. simpl. reflexivity. Qed.\nExample test_nandb3: (nandb false true) \u003d true.\nProof. simpl. reflexivity. Qed.\nExample test_nandb4: (nandb true true) \u003d false.\nProof. simpl. reflexivity. Qed.\n\nDefinition andb3 (b1: bool) (b2:bool) (b3:bool) : bool :\u003d\n\tmatch b1 with\n | false \u003d\u003e false\n\t\t| true \u003d\u003e match b2 with\n\t\t\t\t\t\t\t\t| false \u003d\u003e false\n\t\t\t\t\t\t\t\t| true \u003d\u003e b3\n\t\t\t\t\t\t\tend\n\tend.\n\nExample test_andb31: (andb3 true true true) \u003d true.\nProof. simpl. reflexivity. Qed.\nExample test_andb32: (andb3 false true true) \u003d false.\nProof. simpl. reflexivity. Qed.\nExample test_andb33: (andb3 true false true) \u003d false.\nProof. simpl. reflexivity. Qed.\nExample test_andb34: (andb3 true true false) \u003d false.\nProof. simpl. reflexivity. Qed.\n\nModule Playground1.\n\nInductive nat : Type :\u003d\n\t| O : nat\n\t| S : nat -\u003e nat.\n\nDefinition pred (n : nat) : nat :\u003d\n\tmatch n with\n\t\t| O \u003d\u003e O\n\t\t| S n\u0027 \u003d\u003e n\u0027\n\tend.\n\nDefinition minustwo (n : nat) : nat :\u003d\n\tmatch n with\n\t\t| O \u003d\u003e O\n\t\t| S O \u003d\u003e O\n\t\t| S (S n\u0027) \u003d\u003e n\u0027\n\tend.\n\nFixpoint evenb (n : nat) : bool :\u003d\n\tmatch n with\n\t\t| O \u003d\u003e true\n\t\t| S O \u003d\u003e false\n\t\t| S (S n\u0027) \u003d\u003e evenb n\u0027\n\tend.\n\nDefinition oddb (n : nat) : bool :\u003d negb (evenb n).\n\nExample test_oddb1: (oddb (S O)) \u003d true.\nProof. reflexivity. Qed.\nExample test_oddb2: (oddb (S (S (S (S O))))) \u003d false.\nProof. reflexivity. Qed.\n\nFixpoint plus (n : nat) (m : nat) : nat :\u003d\n\tmatch n with\n\t\t| O \u003d\u003e m\n\t\t| S n\u0027 \u003d\u003e S (plus n\u0027 m)\n\tend.\n\nFixpoint mult (n m : nat) : nat :\u003d\n\tmatch n with\n\t\t| O \u003d\u003e O\n\t\t| S n\u0027 \u003d\u003e plus m (mult n\u0027 m)\n\tend.\n\nFixpoint minus (n m : nat) : nat :\u003d\n\tmatch n, m with\n\t\t| O, _ \u003d\u003e n\n\t\t| S n\u0027, O \u003d\u003e S n\u0027\n\t\t| S n\u0027, S m\u0027 \u003d\u003e minus n\u0027 m\u0027\n\tend.\n\nFixpoint exp (base power : nat) : nat :\u003d\n\tmatch power with\n\t\t| O \u003d\u003e S O\n\t\t| S p \u003d\u003e mult base (exp base p)\n\tend.\n\nFixpoint factorial (n : nat) : nat :\u003d\n\tmatch n with\n\t\t| O \u003d\u003e S O\n\t\t| S n\u0027 \u003d\u003e mult n (factorial n\u0027)\n\tend.\n\nExample test_factorial1: (factorial (S (S (S O)))) \u003d (S (S (S (S (S (S O)))))).\nProof. simpl. reflexivity. Qed.\n\nNotation \"x + y\" :\u003d (plus x y) (at level 50, left associativity) : nat_scope.\nNotation \"x - y\" :\u003d (minus x y) (at level 50, left associativity) : nat_scope.\nNotation \"x * y\" :\u003d (mult x y) (at level 40, left associativity) : nat_scope.\n\nFixpoint beq_nat (n m : nat) : bool :\u003d\n\tmatch n with\n\t\t| O \u003d\u003e match m with\n\t\t\t\t\t\t| O \u003d\u003e true\n\t\t\t\t\t\t| S m\u0027 \u003d\u003e false\n\t\t\t\t\t end\n\t\t| S n\u0027 \u003d\u003e match m with\n\t\t\t\t\t\t\t| O \u003d\u003e false\n\t\t\t\t\t\t\t| S m\u0027 \u003d\u003e beq_nat n\u0027 m\u0027\n\t\t\t\t\t\t\tend\n\tend.\n\nFixpoint ble_nat (n m : nat) : bool :\u003d\n\tmatch n with\n\t\t| O \u003d\u003e true\n\t\t| S n\u0027 \u003d\u003e \n\t\t\t\tmatch m with\n\t\t\t\t\t| O \u003d\u003e false\n\t\t\t\t\t| S m\u0027 \u003d\u003e ble_nat n\u0027 m\u0027\n\t\t\t\tend\n\tend.\n\nExample test_ble_nat1: (ble_nat (S (S O)) (S (S O))) \u003d true.\nProof. simpl. reflexivity. Qed.\nExample test_ble_nat2: (ble_nat (S (S O)) (S (S (S (S O))))) \u003d true.\nProof. simpl. reflexivity. Qed.\nExample test_ble_nat3: (ble_nat (S (S (S (S O)))) (S (S O))) \u003d false.\nProof. simpl. reflexivity. Qed.\n\nDefinition blt_nat (n m : nat) : bool :\u003d\n\t\t(andb (negb (beq_nat n m)) (ble_nat n m)).\n\nExample test_blt_nat1: (blt_nat (S (S O)) (S (S O))) \u003d false.\nProof. simpl. reflexivity. Qed.\nExample test_blt_nat3: (blt_nat (S (S (S (S O)))) (S (S O))) \u003d false.\nProof. simpl. reflexivity. Qed.\nExample test_blt_nat2 : (blt_nat (S (S O)) (S (S (S (S O))))) \u003d true.\nProof. simpl. reflexivity. Qed.\n\nTheorem plus_O_n : forall n : nat, O + n \u003d n.\nProof.\n\tsimpl. reflexivity. Qed.\n\nTheorem plus_O_n\u0027 : forall n : nat, O + n \u003d n.\nProof.\n\treflexivity. Qed.\n\nTheorem plus_O_n\u0027\u0027 : forall n : nat, O + n \u003d n.\nProof.\n\tintros n. reflexivity. Qed.\n\nTheorem plus_1_1 : forall n : nat, (S O) + n \u003d S n.\nProof.\n\tintros n. reflexivity. Qed.\n\nTheorem mult_0_1: forall n : nat, O * n \u003d O.\nProof.\n\tintros n. reflexivity. Qed.\n\nTheorem plus_id_example : forall n m:nat,\n\tn \u003d m -\u003e n + n \u003d m + m.\nProof.\n\tintros n m.\n\tintros H.\n\trewrite -\u003e H.\n\treflexivity. Qed.\n\nTheorem plus_id_exercise : forall n m o: nat,\n\tn \u003d m -\u003e m \u003d o -\u003e n + m \u003d m + o.\nProof.\n\tintros n m o.\n\tintros H.\n\tintros H\u0027.\n\trewrite -\u003e H.\n\trewrite \u003c- H\u0027.\n\treflexivity.\n\tQed.\n\nTheorem mult_0_plus : forall n m : nat,\n\t\t\t\t(O + n) * m \u003d n * m.\nProof.\n\tintros n m.\n\trewrite -\u003e plus_O_n.\n\treflexivity. Qed.\n\nTheorem mult_1_plus : forall n m: nat,\n\t((S O) + n) * m \u003d m + (n * m).\nProof.\n\tintros n m.\n\trewrite -\u003e plus_1_1.\n\treflexivity.\n\tQed.\n\nTheorem mult_1 : forall n : nat,\n\t\t\t\tn * (S O) \u003d n.\nProof.\n\tintros n.\n\tinduction n as [| n\u0027].\n\treflexivity.\n\tsimpl.\n\trewrite -\u003e IHn\u0027.\n\treflexivity.\n\tQed.\n\nTheorem plus_1_neq_0 : forall n : nat,\n\t\t\t\tbeq_nat (n + (S O)) O \u003d false.\nProof.\n\tintros n.\n\tdestruct n as [| n\u0027].\n\treflexivity.\n\treflexivity.\n\tQed.\n\nTheorem zero_nbeq_plus_1 : forall n : nat,\n\t\t\t\tbeq_nat O (n + (S O)) \u003d false.\nProof.\n\tintros n.\n\tdestruct n.\n\treflexivity.\n\treflexivity.\nQed.\n\nRequire String. Open Scope string_scope.\n\nLtac move_to_top x :\u003d\nmatch reverse goal with\n| H : _ |- _ \u003d\u003e try move x after H\nend.\n\nTactic Notation \"assert_eq\" ident(x) constr(v) :\u003d\n\tlet H :\u003d fresh in\n\tassert (x \u003d v) as H by reflexivity;\n\tclear H.\n\n\tTactic Notation \"Case_aux\" ident(x) constr(name) :\u003d\n\t\tfirst [\n\t\tset (x :\u003d name); move_to_top x\n\t\t| assert_eq x name; move_to_top x\n\t\t| fail 1 \"because we are working on a different case\" ].\n\n\t\tLtac Case name :\u003d Case_aux Case name.\n\t\tLtac SCase name :\u003d Case_aux SCase name.\n\t\tLtac SSCase name :\u003d Case_aux SSCase name.\n\t\tLtac SSSCase name :\u003d Case_aux SSSCase name.\n\t\tLtac SSSSCase name :\u003d Case_aux SSSSCase name.\n\t\tLtac SSSSSCase name :\u003d Case_aux SSSSSCase name.\n\t\tLtac SSSSSSCase name :\u003d Case_aux SSSSSSCase name.\n\t\tLtac SSSSSSSCase name :\u003d Case_aux SSSSSSSCase name.\n\nTheorem andb_true_elim1 : forall b c : bool,\n\t\t\t\tandb b c \u003d true -\u003e b \u003d true.\nProof.\n\tintros b c H.\n\tdestruct b.\n\tCase \"b \u003d true\".\n\t\treflexivity.\n\tCase \"b \u003d false\".\n\t\trewrite \u003c- H. reflexivity. Qed.\n\nTheorem plus_0_r : forall n : nat, n + O \u003d n.\nProof.\n\tintros n. induction n as [| n\u0027].\n\tCase \"n \u003d 0\". reflexivity.\n\tCase \"n \u003d S n\u0027\". simpl. rewrite -\u003e IHn\u0027. reflexivity. Qed.\n\nTheorem minus_diag : forall n,\n\t\t\t\tminus n n \u003d O.\nProof.\n\tintros n. induction n as [| n\u0027].\n\tCase \"n \u003d 0\".\n\t\tsimpl. reflexivity.\n\tCase \"n \u003d S n\u0027\".\n\t\tsimpl. rewrite -\u003e IHn\u0027. reflexivity. Qed.\n\n\nTheorem mult_0_r : forall n:nat,\n\t\t\t\tn * O \u003d O.\nProof.\n\tintros n. induction n as [| n\u0027].\n\tCase \"n \u003d 0\".\n\t\treflexivity.\n\tCase \"n \u003d S n\u0027\".\n\t\tsimpl. rewrite -\u003e IHn\u0027. reflexivity. Qed.\n\nTheorem plus_n_Sm : forall n m : nat,\n\t\t\t\tS (n + m) \u003d n + (S m).\nProof.\n\tintros n m. induction n as [| n\u0027].\n\tCase \"n \u003d 0\".\n\t\treflexivity.\n\tCase \"n \u003d S n\u0027\".\n\t\tsimpl. rewrite -\u003e IHn\u0027. reflexivity. Qed.\n\nTheorem plus_assoc : forall n m p : nat,\n\t\t\t\t\tn + (m + p) \u003d (n + m) + p.\nProof.\n\tintros n m p.\n\tinduction n as [| n\u0027].\n\treflexivity.\n\tsimpl.\n\trewrite -\u003e IHn\u0027.\n\treflexivity. Qed.\n\nTheorem plus_distr : forall n m: nat, S (n + m) \u003d n + (S m).\nProof.\n\tintros n m. induction n as [| n\u0027].\n\tCase \"n \u003d 0\".\n\t\treflexivity.\n\tCase \"n \u003d S n\u0027\".\n\t\tsimpl. rewrite -\u003e IHn\u0027. reflexivity. Qed.\n\nTheorem mult_distr : forall n m: nat, n * ((S O) + m) \u003d n * (S m).\nProof.\n\tintros n m.\n\tinduction n as [| n\u0027].\n\treflexivity.\n\treflexivity.\n\tQed.\n\nTheorem plus_comm : forall n m : nat,\n\tn + m \u003d m + n.\nProof.\n\tintros n m.\n\tinduction n as [| n\u0027].\n\tCase \"n \u003d 0\".\n\t\tsimpl.\n\t\trewrite -\u003e plus_0_r.\n\t\treflexivity.\n\tCase \"n \u003d S n\u0027\".\n\t\tsimpl.\n\t\trewrite -\u003e IHn\u0027.\n\t\trewrite -\u003e plus_distr.\n\t\treflexivity. Qed.\n\nFixpoint double (n:nat) :\u003d\n\tmatch n with\n\t\t| O \u003d\u003e O\n\t\t| S n\u0027 \u003d\u003e S (S (double n\u0027))\n\tend.\n\nLemma double_plus : forall n, double n \u003d n + n.\nProof.\n\tintros n. induction n as [| n\u0027].\n\tCase \"n \u003d 0\".\n\t\treflexivity.\n\tCase \"n \u003d S n\u0027\".\n\t\tsimpl. rewrite -\u003e IHn\u0027.\n\t\trewrite -\u003e plus_distr. reflexivity.\n\t\tQed.\n\nTheorem beq_nat_refl : forall n : nat,\n\ttrue \u003d beq_nat n n.\nProof.\n\tintros n. induction n as [| n\u0027].\n\tCase \"n \u003d 0\".\n\t\treflexivity.\n\tCase \"n \u003d S n\".\n\t\tsimpl. rewrite \u003c- IHn\u0027.\n\t\treflexivity. Qed.\n\nTheorem plus_rearrange: forall n m p q : nat,\n\t\t\t\t(n + m) + (p + q) \u003d (m + n) + (p + q).\nProof.\n\tintros n m p q.\n\tassert(H: n + m \u003d m + n).\n\t\tCase \"Proof by assertion\".\n\t\trewrite -\u003e plus_comm. reflexivity.\n\trewrite -\u003e H. reflexivity. Qed.\n\nTheorem plus_swap : forall n m p: nat,\n\t\t\t\tn + (m + p) \u003d m + (n + p).\nProof.\n\tintros n m p.\n\trewrite -\u003e plus_assoc.\n\tassert(H: m + (n + p) \u003d (m + n) + p).\n\trewrite -\u003e plus_assoc.\n\treflexivity.\n\trewrite -\u003e H.\n\tassert(H2: m + n \u003d n + m).\n\trewrite -\u003e plus_comm.\n\treflexivity.\n\trewrite -\u003e H2.\n\treflexivity.\n\tQed.\n\nTheorem plus_swap\u0027 : forall n m p: nat,\n\t\t\t\tn + (m + p) \u003d m + (n + p).\nProof.\n\tintros n m p.\n\trewrite -\u003e plus_assoc.\n\tassert(H: m + (n + p) \u003d (m + n) + p).\n\trewrite -\u003e plus_assoc.\n\treflexivity.\n\trewrite -\u003e H.\n\treplace (m + n) with (n + m).\n\trewrite -\u003e plus_comm.\n\treflexivity.\n\trewrite -\u003e plus_comm.\n\treflexivity.\n\tQed.\n\nTheorem mult_1_distr: forall m n: nat,\n\t\t\t\tn * ((S O) + m) \u003d n * (S O) + n * m.\nProof.\n\tintros n m.\n\trewrite -\u003e mult_1.\n\trewrite -\u003e plus_1_1.\n\tsimpl.\n\tinduction m as [|m\u0027].\n\tsimpl.\n\treflexivity.\n\tsimpl.\n\trewrite -\u003e plus_swap.\n\trewrite \u003c- IHm\u0027.\n\treflexivity.\n\tQed.\n\nTheorem mult_comm: forall m n : nat,\n\t\t\t\tm * n \u003d n * m.\nProof.\n\tintros m n.\n\tinduction n as [| n\u0027].\n\tCase \"n \u003d 0\".\n\t\tsimpl.\n\t\trewrite -\u003e mult_0_r.\n\t\treflexivity.\n\tCase \"n \u003d S n\u0027\".\n\t\tsimpl.\n\t\trewrite \u003c- mult_distr.\n\t\trewrite -\u003e mult_1_distr.\n\t\trewrite -\u003e mult_1.\n\t\trewrite -\u003e IHn\u0027.\n\t\treflexivity.\n\t\tQed.\n\nTheorem evenb_next : forall n : nat,\n\t\t\t\tevenb n \u003d evenb (S (S n)).\nProof.\n\tintros n.\nAdmitted.\n\nTheorem negb_negb : forall n : bool,\n\t\t\t\tn \u003d negb (negb n).\nProof.\n\tintros n.\n\tdestruct n.\n\treflexivity.\n\treflexivity.\n\tQed.\n\nTheorem evenb_n_oddb_Sn : forall n : nat,\n\t\t\t\tevenb n \u003d negb (evenb (S n)).\nProof.\n\tintros n.\n\tinduction n as [|n\u0027].\n\treflexivity.\n\tassert(H: evenb n\u0027 \u003d evenb (S (S n\u0027))).\n\treflexivity.\n\trewrite \u003c- H.\n\trewrite -\u003e IHn\u0027.\n\trewrite \u003c- negb_negb.\n\treflexivity.\n\tQed.\n\n(*Fixpoint bad (n : nat) : bool :\u003d\n\tmatch n with\n\t\t| O \u003d\u003e true\n\t\t| S O \u003d\u003e bad (S n)\n\t\t| S (S n\u0027) \u003d\u003e bad n\u0027\n\tend.*)\n\nTheorem ble_nat_refl : forall n:nat,\n\t\t\t\ttrue \u003d ble_nat n n.\nProof.\n\tintros n.\n\tinduction n as [|n\u0027].\n\tCase \"n \u003d 0\".\n\t\treflexivity.\n\tCase \"n \u003d S n\".\n\t\tsimpl.\n\t\trewrite \u003c- IHn\u0027.\n\t\treflexivity.\n\tQed.\n\nTheorem zero_nbeq_S : forall n: nat,\n\t\t\t\tbeq_nat O (S n) \u003d false.\nProof.\n\tintros n.\n\treflexivity.\n\tQed.\n\nTheorem andb_false_r : forall b : bool,\n\t\t\t\tandb b false \u003d false.\nProof.\n\tintros b.\n\tdestruct b.\n\treflexivity.\n\treflexivity.\n\tQed.\n\nTheorem plus_ble_compat_1 : forall n m p : nat,\n\t\t\t\tble_nat n m \u003d true -\u003e ble_nat (p + n) (p + m) \u003d true.\nProof.\n\tintros n m p.\n\tintros H.\n\tinduction p.\n\tCase \"p \u003d 0\".\n\t\tsimpl.\n\t\trewrite -\u003e H.\n\t\treflexivity.\n\tCase \"p \u003d S p\u0027\".\n\t\tsimpl.\n\t\trewrite -\u003e IHp.\n\t\treflexivity.\n\t\tQed.\n\nTheorem S_nbeq_0 : forall n:nat,\n\t\t\t\tbeq_nat (S n) O \u003d false.\nProof.\n\tintros n.\n\treflexivity.\n\tQed.\n\nTheorem mult_1_1 : forall n:nat, (S O) * n \u003d n.\nProof.\n\tintros n.\n\tsimpl.\n\trewrite -\u003e plus_0_r.\n\treflexivity. Qed.\n\nTheorem all3_spec : forall b c : bool,\n\torb (andb b c)\n\t\t\t(orb (negb b)\n\t\t\t \t\t (negb c))\n\t\u003d true.\nProof.\n\tintros b c.\n\tdestruct b.\n\tdestruct c.\n\treflexivity.\n\treflexivity.\n\treflexivity.\n\tQed.\n\nLemma mult_plus_1 : forall n m : nat,\n\t\t\tS(m + n) \u003d m + (S n).\nProof.\n\tintros n m.\n\tinduction m.\n\treflexivity.\n\tsimpl.\n\trewrite -\u003e IHm.\n\treflexivity.\n\tQed.\n\nTheorem mult_mult : forall n m : nat,\n\tn * (S m) \u003d n * m + n.\nProof.\n\tintros n m.\n\tinduction n.\n\treflexivity.\n\tsimpl.\n\trewrite -\u003e IHn.\n\trewrite -\u003e plus_assoc.\n\trewrite -\u003e mult_plus_1.\n\treflexivity.\n\tQed.\n\nTheorem mult_plus_distr_r : forall n m p:nat,\n\t\t\t\t(n + m) * p \u003d (n * p) + (m * p).\nProof.\n\tintros n m p.\n\tinduction p.\n\trewrite -\u003e mult_0_r.\n\trewrite -\u003e mult_0_r.\n\trewrite -\u003e mult_0_r.\n\treflexivity.\n\trewrite -\u003e mult_mult.\n\trewrite -\u003e mult_mult.\n\trewrite -\u003e mult_mult.\n\trewrite -\u003e IHp.\n\tassert(H1: ((n * p) + n) + (m * p + m) \u003d (n * p) + (n + (m * p + m))).\n\trewrite \u003c- plus_assoc.\n\treflexivity.\n\trewrite -\u003e H1.\n\tassert(H2: (n + (m * p + m)) \u003d (m * p + (n + m))).\n\trewrite -\u003e plus_swap.\n\treflexivity.\n\trewrite -\u003e H2.\n\tassert(H3: (n * p) + (m * p + (n + m)) \u003d ((n * p ) + (m * p)) + (n + m)).\n\trewrite -\u003e plus_assoc.\n\treflexivity.\n\trewrite -\u003e H3.\n\treflexivity.\n\tQed.\n\nTheorem mult_assoc : forall n m p : nat,\n\t\t\t\tn * (m * p) \u003d (n * m) * p.\nProof.\n\tintros n m p.\n\tinduction n.\n\tsimpl.\n\treflexivity.\n\tsimpl.\n\trewrite -\u003e mult_plus_distr_r.\n\trewrite -\u003e IHn.\n\treflexivity.\n\tQed.\n\nInductive bin : Type :\u003d\n\t| BO : bin\n\t| D : bin -\u003e bin\n\t| M : bin -\u003e bin.\n\nFixpoint incbin (n : bin) : bin :\u003d\n\tmatch n with\n\t\t| BO \u003d\u003e M (BO)\n\t\t| D n\u0027 \u003d\u003e M n\u0027\n\t\t| M n\u0027 \u003d\u003e D (incbin n\u0027)\n\tend.\n\nFixpoint bin2un (n : bin) : nat :\u003d\n\tmatch n with\n\t\t| BO \u003d\u003e O\n\t\t| D n\u0027 \u003d\u003e double (bin2un n\u0027)\n\t\t| M n\u0027 \u003d\u003e S (double (bin2un n\u0027))\n\tend.\n\nTheorem bin_comm : forall n : bin,\n\t\t\t\tbin2un(incbin n) \u003d S (bin2un n).\nProof.\n\tintros n.\n\tinduction n.\n\t\treflexivity.\n\t\treflexivity.\n\t\tsimpl.\n\t\trewrite -\u003e IHn.\n\t\treflexivity.\n\tQed.\n\nEnd Playground1.\n", + "license": "mit" +}, { + "repo_name": "ya7lelkom/linguist", + "path": "samples/Verilog/hex_display.v", + "copies": "93", + "size": "1286", + "content": "/*\n * Copyright (c) 2009 Zeus Gomez Marmolejo \u003czeus@opencores.org\u003e\n *\n * This file is part of the Zet processor. This processor is free\n * hardware; you can redistribute it and/or modify it under the terms of\n * the GNU General Public License as published by the Free Software\n * Foundation; either version 3, or (at your option) any later version.\n *\n * Zet is distrubuted in the hope that it will be useful, but WITHOUT\n * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\n * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public\n * License for more details.\n *\n * You should have received a copy of the GNU General Public License\n * along with Zet; see the file COPYING. If not, see\n * \u003chttp://www.gnu.org/licenses/\u003e.\n */\n\nmodule hex_display (\n input [15:0] num,\n input en,\n\n output [6:0] hex0,\n output [6:0] hex1,\n output [6:0] hex2,\n output [6:0] hex3\n );\n\n // Module instantiations\n seg_7 hex_group0 (\n .num (num[3:0]),\n .en (en),\n .seg (hex0)\n );\n\n seg_7 hex_group1 (\n .num (num[7:4]),\n .en (en),\n .seg (hex1)\n );\n\n seg_7 hex_group2 (\n .num (num[11:8]),\n .en (en),\n .seg (hex2)\n );\n\n seg_7 hex_group3 (\n .num (num[15:12]),\n .en (en),\n .seg (hex3)\n );\n\nendmodule\n", + "license": "mit" +}, { + "repo_name": "ethiwoo/stardict-3", + "path": "dict/stardict-plugins/stardict-man-plugin/stardict_man.v", + "copies": "252", + "size": "134", + "content": "{\n\tglobal:\n\t\textern \"C\" {\n\t\t\tstardict_plugin_init;\n\t\t\tstardict_plugin_exit;\n\t\t\tstardict_virtualdict_plugin_init;\n\t\t};\n\tlocal:\n\t\t*;\n};\n", + "license": "gpl-3.0" +}, { + "repo_name": "trip5ter/xbmc", + "path": "lib/ffmpeg/libavcodec/libavcodec.v", + "copies": "36", + "size": "1013", + "content": "LIBAVCODEC_$MAJOR {\n global: av*;\n audio_resample;\n audio_resample_close;\n #deprecated, remove after next bump\n img_get_alpha_info;\n dsputil_init;\n ff_find_pix_fmt;\n ff_framenum_to_drop_timecode;\n ff_framenum_to_smtpe_timecode;\n ff_raw_pix_fmt_tags;\n ff_init_smtpe_timecode;\n ff_fft*;\n ff_mdct*;\n ff_dct*;\n ff_rdft*;\n ff_prores_idct_put_10_sse2;\n ff_simple_idct*;\n ff_aanscales;\n ff_faan*;\n ff_mmx_idct;\n ff_fdct*;\n fdct_ifast;\n j_rev_dct;\n ff_mmxext_idct;\n ff_idct_xvid*;\n ff_jpeg_fdct*;\n #XBMC\u0027s configure checks for ff_vdpau_vc1_decode_picture()\n ff_vdpau_vc1_decode_picture;\n local: *;\n};\n", + "license": "gpl-2.0" +}, { + "repo_name": "MAV-RT-testbed/MAV-testbed", + "path": "Syma_Flight_Final/Syma_Flight_Final.srcs/sources_1/ipshared/xilinx.com/processing_system7_v5_5/da926f63/hdl/verilog/processing_system7_v5_5_atc.v", + "copies": "61", + "size": "17746", + "content": "//-----------------------------------------------------------------------------\n//-- (c) Copyright 2010 Xilinx, Inc. All rights reserved.\n//--\n//-- This file contains confidential and proprietary information\n//-- of Xilinx, Inc. and is protected under U.S. and\n//-- international copyright and other intellectual property\n//-- laws.\n//--\n//-- DISCLAIMER\n//-- This disclaimer is not a license and does not grant any\n//-- rights to the materials distributed herewith. Except as\n//-- otherwise provided in a valid license issued to you by\n//-- Xilinx, and to the maximum extent permitted by applicable\n//-- law: (1) THESE MATERIALS ARE MADE AVAILABLE \"AS IS\" AND\n//-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES\n//-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING\n//-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-\n//-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and\n//-- (2) Xilinx shall not be liable (whether in contract or tort,\n//-- including negligence, or under any other theory of\n//-- liability) for any loss or damage of any kind or nature\n//-- related to, arising under or in connection with these\n//-- materials, including for any direct, or any indirect,\n//-- special, incidental, or consequential loss or damage\n//-- (including loss of data, profits, goodwill, or any type of\n//-- loss or damage suffered as a result of any action brought\n//-- by a third party) even if such damage or loss was\n//-- reasonably foreseeable or Xilinx had been advised of the\n//-- possibility of the same.\n//--\n//-- CRITICAL APPLICATIONS\n//-- Xilinx products are not designed or intended to be fail-\n//-- safe, or for use in any application requiring fail-safe\n//-- performance, such as life-support or safety devices or\n//-- systems, Class III medical devices, nuclear facilities,\n//-- applications related to the deployment of airbags, or any\n//-- other applications that could lead to death, personal\n//-- injury, or severe property or environmental damage\n//-- (individually and collectively, \"Critical\n//-- Applications\"). Customer assumes the sole risk and\n//-- liability of any use of Xilinx products in Critical\n//-- Applications, subject only to applicable laws and\n//-- regulations governing limitations on product liability.\n//--\n//-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS\n//-- PART OF THIS FILE AT ALL TIMES.\n//-----------------------------------------------------------------------------\n//\n// Description: ACP Transaction Checker\n// \n// Check for optimized ACP transactions and flag if they are broken.\n// \n// \n//\n// Verilog-standard: Verilog 2001\n//--------------------------------------------------------------------------\n//\n// Structure:\n// atc\n// aw_atc\n// w_atc\n// b_atc\n//\n//--------------------------------------------------------------------------\n`timescale 1ps/1ps\n`default_nettype none\n\nmodule processing_system7_v5_5_atc #\n (\n parameter C_FAMILY \u003d \"rtl\",\n // FPGA Family. Current version: virtex6, spartan6 or later.\n parameter integer C_AXI_ID_WIDTH \u003d 4,\n // Width of all ID signals on SI and MI side of checker.\n // Range: \u003e\u003d 1.\n parameter integer C_AXI_ADDR_WIDTH \u003d 32,\n // Width of all ADDR signals on SI and MI side of checker.\n // Range: 32.\n parameter integer C_AXI_DATA_WIDTH \u003d 64,\n // Width of all DATA signals on SI and MI side of checker.\n // Range: 64.\n parameter integer C_AXI_AWUSER_WIDTH \u003d 1,\n // Width of AWUSER signals. \n // Range: \u003e\u003d 1.\n parameter integer C_AXI_ARUSER_WIDTH \u003d 1,\n // Width of ARUSER signals. \n // Range: \u003e\u003d 1.\n parameter integer C_AXI_WUSER_WIDTH \u003d 1,\n // Width of WUSER signals. \n // Range: \u003e\u003d 1.\n parameter integer C_AXI_RUSER_WIDTH \u003d 1,\n // Width of RUSER signals. \n // Range: \u003e\u003d 1.\n parameter integer C_AXI_BUSER_WIDTH \u003d 1\n // Width of BUSER signals. \n // Range: \u003e\u003d 1.\n )\n (\n // Global Signals\n input wire ACLK,\n input wire ARESETN,\n\n // Slave Interface Write Address Ports\n input wire [C_AXI_ID_WIDTH-1:0] S_AXI_AWID,\n input wire [C_AXI_ADDR_WIDTH-1:0] S_AXI_AWADDR,\n input wire [4-1:0] S_AXI_AWLEN,\n input wire [3-1:0] S_AXI_AWSIZE,\n input wire [2-1:0] S_AXI_AWBURST,\n input wire [2-1:0] S_AXI_AWLOCK,\n input wire [4-1:0] S_AXI_AWCACHE,\n input wire [3-1:0] S_AXI_AWPROT,\n input wire [C_AXI_AWUSER_WIDTH-1:0] S_AXI_AWUSER,\n input wire S_AXI_AWVALID,\n output wire S_AXI_AWREADY,\n // Slave Interface Write Data Ports\n input wire [C_AXI_ID_WIDTH-1:0] S_AXI_WID,\n input wire [C_AXI_DATA_WIDTH-1:0] S_AXI_WDATA,\n input wire [C_AXI_DATA_WIDTH/8-1:0] S_AXI_WSTRB,\n input wire S_AXI_WLAST,\n input wire [C_AXI_WUSER_WIDTH-1:0] S_AXI_WUSER,\n input wire S_AXI_WVALID,\n output wire S_AXI_WREADY,\n // Slave Interface Write Response Ports\n output wire [C_AXI_ID_WIDTH-1:0] S_AXI_BID,\n output wire [2-1:0] S_AXI_BRESP,\n output wire [C_AXI_BUSER_WIDTH-1:0] S_AXI_BUSER,\n output wire S_AXI_BVALID,\n input wire S_AXI_BREADY,\n // Slave Interface Read Address Ports\n input wire [C_AXI_ID_WIDTH-1:0] S_AXI_ARID,\n input wire [C_AXI_ADDR_WIDTH-1:0] S_AXI_ARADDR,\n input wire [4-1:0] S_AXI_ARLEN,\n input wire [3-1:0] S_AXI_ARSIZE,\n input wire [2-1:0] S_AXI_ARBURST,\n input wire [2-1:0] S_AXI_ARLOCK,\n input wire [4-1:0] S_AXI_ARCACHE,\n input wire [3-1:0] S_AXI_ARPROT,\n input wire [C_AXI_ARUSER_WIDTH-1:0] S_AXI_ARUSER,\n input wire S_AXI_ARVALID,\n output wire S_AXI_ARREADY,\n // Slave Interface Read Data Ports\n output wire [C_AXI_ID_WIDTH-1:0] S_AXI_RID,\n output wire [C_AXI_DATA_WIDTH-1:0] S_AXI_RDATA,\n output wire [2-1:0] S_AXI_RRESP,\n output wire S_AXI_RLAST,\n output wire [C_AXI_RUSER_WIDTH-1:0] S_AXI_RUSER,\n output wire S_AXI_RVALID,\n input wire S_AXI_RREADY,\n\n // Master Interface Write Address Port\n output wire [C_AXI_ID_WIDTH-1:0] M_AXI_AWID,\n output wire [C_AXI_ADDR_WIDTH-1:0] M_AXI_AWADDR,\n output wire [4-1:0] M_AXI_AWLEN,\n output wire [3-1:0] M_AXI_AWSIZE,\n output wire [2-1:0] M_AXI_AWBURST,\n output wire [2-1:0] M_AXI_AWLOCK,\n output wire [4-1:0] M_AXI_AWCACHE,\n output wire [3-1:0] M_AXI_AWPROT,\n output wire [C_AXI_AWUSER_WIDTH-1:0] M_AXI_AWUSER,\n output wire M_AXI_AWVALID,\n input wire M_AXI_AWREADY,\n // Master Interface Write Data Ports\n output wire [C_AXI_ID_WIDTH-1:0] M_AXI_WID,\n output wire [C_AXI_DATA_WIDTH-1:0] M_AXI_WDATA,\n output wire [C_AXI_DATA_WIDTH/8-1:0] M_AXI_WSTRB,\n output wire M_AXI_WLAST,\n output wire [C_AXI_WUSER_WIDTH-1:0] M_AXI_WUSER,\n output wire M_AXI_WVALID,\n input wire M_AXI_WREADY,\n // Master Interface Write Response Ports\n input wire [C_AXI_ID_WIDTH-1:0] M_AXI_BID,\n input wire [2-1:0] M_AXI_BRESP,\n input wire [C_AXI_BUSER_WIDTH-1:0] M_AXI_BUSER,\n input wire M_AXI_BVALID,\n output wire M_AXI_BREADY,\n // Master Interface Read Address Port\n output wire [C_AXI_ID_WIDTH-1:0] M_AXI_ARID,\n output wire [C_AXI_ADDR_WIDTH-1:0] M_AXI_ARADDR,\n output wire [4-1:0] M_AXI_ARLEN,\n output wire [3-1:0] M_AXI_ARSIZE,\n output wire [2-1:0] M_AXI_ARBURST,\n output wire [2-1:0] M_AXI_ARLOCK,\n output wire [4-1:0] M_AXI_ARCACHE,\n output wire [3-1:0] M_AXI_ARPROT,\n output wire [C_AXI_ARUSER_WIDTH-1:0] M_AXI_ARUSER,\n output wire M_AXI_ARVALID,\n input wire M_AXI_ARREADY,\n // Master Interface Read Data Ports\n input wire [C_AXI_ID_WIDTH-1:0] M_AXI_RID,\n input wire [C_AXI_DATA_WIDTH-1:0] M_AXI_RDATA,\n input wire [2-1:0] M_AXI_RRESP,\n input wire M_AXI_RLAST,\n input wire [C_AXI_RUSER_WIDTH-1:0] M_AXI_RUSER,\n input wire M_AXI_RVALID,\n output wire M_AXI_RREADY,\n \n output wire ERROR_TRIGGER,\n output wire [C_AXI_ID_WIDTH-1:0] ERROR_TRANSACTION_ID\n );\n\n \n /////////////////////////////////////////////////////////////////////////////\n // Functions\n /////////////////////////////////////////////////////////////////////////////\n \n \n /////////////////////////////////////////////////////////////////////////////\n // Local params\n /////////////////////////////////////////////////////////////////////////////\n \n localparam C_FIFO_DEPTH_LOG \u003d 4;\n \n \n /////////////////////////////////////////////////////////////////////////////\n // Internal signals\n /////////////////////////////////////////////////////////////////////////////\n \n // Internal reset.\n reg ARESET;\n \n // AW-\u003eW command queue signals.\n wire cmd_w_valid;\n wire cmd_w_check;\n wire [C_AXI_ID_WIDTH-1:0] cmd_w_id;\n wire cmd_w_ready;\n \n // W-\u003eB command queue signals.\n wire cmd_b_push;\n wire cmd_b_error;\n wire [C_AXI_ID_WIDTH-1:0] cmd_b_id;\n wire cmd_b_full;\n wire [C_FIFO_DEPTH_LOG-1:0] cmd_b_addr;\n wire cmd_b_ready;\n \n\n /////////////////////////////////////////////////////////////////////////////\n // Handle Internal Reset\n /////////////////////////////////////////////////////////////////////////////\n always @ (posedge ACLK) begin\n ARESET \u003c\u003d !ARESETN;\n end\n \n \n /////////////////////////////////////////////////////////////////////////////\n // Handle Write Channels (AW/W/B)\n /////////////////////////////////////////////////////////////////////////////\n \n // Write Address Channel.\n processing_system7_v5_5_aw_atc #\n (\n .C_FAMILY (C_FAMILY),\n .C_AXI_ID_WIDTH (C_AXI_ID_WIDTH),\n .C_AXI_ADDR_WIDTH (C_AXI_ADDR_WIDTH),\n .C_AXI_AWUSER_WIDTH (C_AXI_AWUSER_WIDTH),\n .C_FIFO_DEPTH_LOG (C_FIFO_DEPTH_LOG)\n ) write_addr_inst\n (\n // Global Signals\n .ARESET (ARESET),\n .ACLK (ACLK),\n\n // Command Interface (Out)\n .cmd_w_valid (cmd_w_valid),\n .cmd_w_check (cmd_w_check),\n .cmd_w_id (cmd_w_id),\n .cmd_w_ready (cmd_w_ready),\n .cmd_b_addr (cmd_b_addr),\n .cmd_b_ready (cmd_b_ready),\n \n // Slave Interface Write Address Ports\n .S_AXI_AWID (S_AXI_AWID),\n .S_AXI_AWADDR (S_AXI_AWADDR),\n .S_AXI_AWLEN (S_AXI_AWLEN),\n .S_AXI_AWSIZE (S_AXI_AWSIZE),\n .S_AXI_AWBURST (S_AXI_AWBURST),\n .S_AXI_AWLOCK (S_AXI_AWLOCK),\n .S_AXI_AWCACHE (S_AXI_AWCACHE),\n .S_AXI_AWPROT (S_AXI_AWPROT),\n .S_AXI_AWUSER (S_AXI_AWUSER),\n .S_AXI_AWVALID (S_AXI_AWVALID),\n .S_AXI_AWREADY (S_AXI_AWREADY),\n \n // Master Interface Write Address Port\n .M_AXI_AWID (M_AXI_AWID),\n .M_AXI_AWADDR (M_AXI_AWADDR),\n .M_AXI_AWLEN (M_AXI_AWLEN),\n .M_AXI_AWSIZE (M_AXI_AWSIZE),\n .M_AXI_AWBURST (M_AXI_AWBURST),\n .M_AXI_AWLOCK (M_AXI_AWLOCK),\n .M_AXI_AWCACHE (M_AXI_AWCACHE),\n .M_AXI_AWPROT (M_AXI_AWPROT),\n .M_AXI_AWUSER (M_AXI_AWUSER),\n .M_AXI_AWVALID (M_AXI_AWVALID),\n .M_AXI_AWREADY (M_AXI_AWREADY)\n );\n \n // Write Data channel.\n processing_system7_v5_5_w_atc #\n (\n .C_FAMILY (C_FAMILY),\n .C_AXI_ID_WIDTH (C_AXI_ID_WIDTH),\n .C_AXI_DATA_WIDTH (C_AXI_DATA_WIDTH),\n .C_AXI_WUSER_WIDTH (C_AXI_WUSER_WIDTH)\n ) write_data_inst\n (\n // Global Signals\n .ARESET (ARESET),\n .ACLK (ACLK),\n\n // Command Interface (In)\n .cmd_w_valid (cmd_w_valid),\n .cmd_w_check (cmd_w_check),\n .cmd_w_id (cmd_w_id),\n .cmd_w_ready (cmd_w_ready),\n \n // Command Interface (Out)\n .cmd_b_push (cmd_b_push),\n .cmd_b_error (cmd_b_error),\n .cmd_b_id (cmd_b_id),\n .cmd_b_full (cmd_b_full),\n \n // Slave Interface Write Data Ports\n .S_AXI_WID (S_AXI_WID),\n .S_AXI_WDATA (S_AXI_WDATA),\n .S_AXI_WSTRB (S_AXI_WSTRB),\n .S_AXI_WLAST (S_AXI_WLAST),\n .S_AXI_WUSER (S_AXI_WUSER),\n .S_AXI_WVALID (S_AXI_WVALID),\n .S_AXI_WREADY (S_AXI_WREADY),\n \n // Master Interface Write Data Ports\n .M_AXI_WID (M_AXI_WID),\n .M_AXI_WDATA (M_AXI_WDATA),\n .M_AXI_WSTRB (M_AXI_WSTRB),\n .M_AXI_WLAST (M_AXI_WLAST),\n .M_AXI_WUSER (M_AXI_WUSER),\n .M_AXI_WVALID (M_AXI_WVALID),\n .M_AXI_WREADY (M_AXI_WREADY)\n );\n \n // Write Response channel.\n processing_system7_v5_5_b_atc #\n (\n .C_FAMILY (C_FAMILY),\n .C_AXI_ID_WIDTH (C_AXI_ID_WIDTH),\n .C_AXI_BUSER_WIDTH (C_AXI_BUSER_WIDTH),\n .C_FIFO_DEPTH_LOG (C_FIFO_DEPTH_LOG)\n ) write_response_inst\n (\n // Global Signals\n .ARESET (ARESET),\n .ACLK (ACLK),\n\n // Command Interface (In)\n .cmd_b_push (cmd_b_push),\n .cmd_b_error (cmd_b_error),\n .cmd_b_id (cmd_b_id),\n .cmd_b_full (cmd_b_full),\n .cmd_b_addr (cmd_b_addr),\n .cmd_b_ready (cmd_b_ready),\n \n // Slave Interface Write Response Ports\n .S_AXI_BID (S_AXI_BID),\n .S_AXI_BRESP (S_AXI_BRESP),\n .S_AXI_BUSER (S_AXI_BUSER),\n .S_AXI_BVALID (S_AXI_BVALID),\n .S_AXI_BREADY (S_AXI_BREADY),\n \n // Master Interface Write Response Ports\n .M_AXI_BID (M_AXI_BID),\n .M_AXI_BRESP (M_AXI_BRESP),\n .M_AXI_BUSER (M_AXI_BUSER),\n .M_AXI_BVALID (M_AXI_BVALID),\n .M_AXI_BREADY (M_AXI_BREADY),\n \n // Trigger detection\n .ERROR_TRIGGER (ERROR_TRIGGER),\n .ERROR_TRANSACTION_ID (ERROR_TRANSACTION_ID)\n );\n \n \n \n /////////////////////////////////////////////////////////////////////////////\n // Handle Read Channels (AR/R)\n /////////////////////////////////////////////////////////////////////////////\n // Read Address Port\n assign M_AXI_ARID \u003d S_AXI_ARID;\n assign M_AXI_ARADDR \u003d S_AXI_ARADDR;\n assign M_AXI_ARLEN \u003d S_AXI_ARLEN;\n assign M_AXI_ARSIZE \u003d S_AXI_ARSIZE;\n assign M_AXI_ARBURST \u003d S_AXI_ARBURST;\n assign M_AXI_ARLOCK \u003d S_AXI_ARLOCK;\n assign M_AXI_ARCACHE \u003d S_AXI_ARCACHE;\n assign M_AXI_ARPROT \u003d S_AXI_ARPROT;\n assign M_AXI_ARUSER \u003d S_AXI_ARUSER;\n assign M_AXI_ARVALID \u003d S_AXI_ARVALID;\n assign S_AXI_ARREADY \u003d M_AXI_ARREADY;\n \n // Read Data Port\n assign S_AXI_RID \u003d M_AXI_RID;\n assign S_AXI_RDATA \u003d M_AXI_RDATA;\n assign S_AXI_RRESP \u003d M_AXI_RRESP;\n assign S_AXI_RLAST \u003d M_AXI_RLAST;\n assign S_AXI_RUSER \u003d M_AXI_RUSER;\n assign S_AXI_RVALID \u003d M_AXI_RVALID;\n assign M_AXI_RREADY \u003d S_AXI_RREADY;\n \n \nendmodule\n`default_nettype wire\n", + "license": "gpl-2.0" +}, { + "repo_name": "wcandillon/linguist", + "path": "samples/Coq/interval_discr.v", + "copies": "86", + "size": "10303", + "content": "(** Sketch of the proof of {p:nat|p\u003c\u003dn} \u003d {p:nat|p\u003c\u003dm} -\u003e n\u003dm\n\n - preliminary results on the irrelevance of boundedness proofs\n - introduce the notion of finite cardinal |A|\n - prove that |{p:nat|p\u003c\u003dn}| \u003d n\n - prove that |A| \u003d n /\\ |A| \u003d m -\u003e n \u003d m if equality is decidable on A\n - prove that equality is decidable on A\n - conclude\n*)\n\n(** * Preliminary results on [nat] and [le] *)\n\n(** Proving axiom K on [nat] *)\n\nRequire Import Eqdep_dec.\nRequire Import Arith.\n\nTheorem eq_rect_eq_nat :\n forall (p:nat) (Q:nat-\u003eType) (x:Q p) (h:p\u003dp), x \u003d eq_rect p Q x p h.\nProof.\nintros.\napply K_dec_set with (p :\u003d h).\napply eq_nat_dec.\nreflexivity.\nQed.\n\n(** Proving unicity of proofs of [(n\u003c\u003dm)%nat] *)\n\nScheme le_ind\u0027 :\u003d Induction for le Sort Prop.\n\nTheorem le_uniqueness_proof : forall (n m : nat) (p q : n \u003c\u003d m), p \u003d q.\nProof.\ninduction p using le_ind\u0027; intro q.\n replace (le_n n) with\n (eq_rect _ (fun n0 \u003d\u003e n \u003c\u003d n0) (le_n n) _ (refl_equal n)).\n 2:reflexivity.\n generalize (refl_equal n).\n pattern n at 2 4 6 10, q; case q; [intro | intros m l e].\n rewrite \u003c- eq_rect_eq_nat; trivial.\n contradiction (le_Sn_n m); rewrite \u003c- e; assumption.\n replace (le_S n m p) with\n (eq_rect _ (fun n0 \u003d\u003e n \u003c\u003d n0) (le_S n m p) _ (refl_equal (S m))).\n 2:reflexivity.\n generalize (refl_equal (S m)).\n pattern (S m) at 1 3 4 6, q; case q; [intro Heq | intros m0 l HeqS].\n contradiction (le_Sn_n m); rewrite Heq; assumption.\n injection HeqS; intro Heq; generalize l HeqS.\n rewrite \u003c- Heq; intros; rewrite \u003c- eq_rect_eq_nat.\n rewrite (IHp l0); reflexivity.\nQed.\n\n(** Proving irrelevance of boundedness proofs while building\n elements of interval *)\n\nLemma dep_pair_intro :\n forall (n x y:nat) (Hx : x\u003c\u003dn) (Hy : y\u003c\u003dn), x\u003dy -\u003e\n exist (fun x \u003d\u003e x \u003c\u003d n) x Hx \u003d exist (fun x \u003d\u003e x \u003c\u003d n) y Hy.\nProof.\nintros n x y Hx Hy Heq.\ngeneralize Hy.\nrewrite \u003c- Heq.\nintros.\nrewrite (le_uniqueness_proof x n Hx Hy0).\nreflexivity.\nQed.\n\n(** * Proving that {p:nat|p\u003c\u003dn} \u003d {p:nat|p\u003c\u003dm} -\u003e n\u003dm *)\n\n(** Definition of having finite cardinality [n+1] for a set [A] *)\n\nDefinition card (A:Set) n :\u003d\n exists f,\n (forall x:A, f x \u003c\u003d n) /\\\n (forall x y:A, f x \u003d f y -\u003e x \u003d y) /\\\n (forall m, m \u003c\u003d n -\u003e exists x:A, f x \u003d m).\n\nRequire Import Arith.\n\n(** Showing that the interval [0;n] has cardinality [n+1] *)\n\nTheorem card_interval : forall n, card {x:nat|x\u003c\u003dn} n.\nProof.\nintro n.\nexists (fun x:{x:nat|x\u003c\u003dn} \u003d\u003e proj1_sig x).\nsplit.\n(* bounded *)\nintro x; apply (proj2_sig x).\nsplit.\n(* injectivity *)\nintros (p,Hp) (q,Hq).\nsimpl.\nintro Hpq.\napply dep_pair_intro; assumption.\n(* surjectivity *)\nintros m Hmn.\nexists (exist (fun x : nat \u003d\u003e x \u003c\u003d n) m Hmn).\nreflexivity.\nQed.\n\n(** Showing that equality on the interval [0;n] is decidable *)\n\nLemma interval_dec :\n forall n (x y : {m:nat|m\u003c\u003dn}), {x\u003dy}+{x\u003c\u003ey}.\nProof.\nintros n (p,Hp).\ninduction p; intros ([|q],Hq).\nleft.\n apply dep_pair_intro.\n reflexivity.\nright.\n intro H; discriminate H.\nright.\n intro H; discriminate H.\nassert (Hp\u0027 : p \u003c\u003d n).\n apply le_Sn_le; assumption.\nassert (Hq\u0027 : q \u003c\u003d n).\n apply le_Sn_le; assumption.\ndestruct (IHp Hp\u0027 (exist (fun m \u003d\u003e m \u003c\u003d n) q Hq\u0027))\n as [Heq|Hneq].\nleft.\n injection Heq; intro Heq\u0027.\n apply dep_pair_intro.\n apply eq_S.\n assumption.\nright.\n intro HeqS.\n injection HeqS; intro Heq.\n apply Hneq.\n apply dep_pair_intro.\n assumption.\nQed.\n\n(** Showing that the cardinality relation is functional on decidable sets *)\n\nLemma card_inj_aux :\n forall (A:Type) f g n,\n (forall x:A, f x \u003c\u003d 0) -\u003e\n (forall x y:A, f x \u003d f y -\u003e x \u003d y) -\u003e\n (forall m, m \u003c\u003d S n -\u003e exists x:A, g x \u003d m)\n -\u003e False.\nProof.\nintros A f g n Hfbound Hfinj Hgsurj.\ndestruct (Hgsurj (S n) (le_n _)) as (x,Hx).\ndestruct (Hgsurj n (le_S _ _ (le_n _))) as (x\u0027,Hx\u0027).\nassert (Hfx : 0 \u003d f x).\napply le_n_O_eq.\napply Hfbound.\nassert (Hfx\u0027 : 0 \u003d f x\u0027).\napply le_n_O_eq.\napply Hfbound.\nassert (x\u003dx\u0027).\napply Hfinj.\nrewrite \u003c- Hfx.\nrewrite \u003c- Hfx\u0027.\nreflexivity.\nrewrite H in Hx.\nrewrite Hx\u0027 in Hx.\napply (n_Sn _ Hx).\nQed.\n\n(** For [dec_restrict], we use a lemma on the negation of equality\nthat requires proof-irrelevance. It should be possible to avoid this\nlemma by generalizing over a first-order definition of [x\u003c\u003ey], say\n[neq] such that [{x\u003dy}+{neq x y}] and [~(x\u003dy /\\ neq x y)]; for such\n[neq], unicity of proofs could be proven *)\n\n Require Import Classical.\n Lemma neq_dep_intro :\n forall (A:Set) (z x y:A) (p:x\u003c\u003ez) (q:y\u003c\u003ez), x\u003dy -\u003e\n exist (fun x \u003d\u003e x \u003c\u003e z) x p \u003d exist (fun x \u003d\u003e x \u003c\u003e z) y q.\n Proof.\n intros A z x y p q Heq.\n generalize q; clear q; rewrite \u003c- Heq; intro q.\n rewrite (proof_irrelevance _ p q); reflexivity.\n Qed.\n\nLemma dec_restrict :\n forall (A:Set),\n (forall x y :A, {x\u003dy}+{x\u003c\u003ey}) -\u003e\n forall z (x y :{a:A|a\u003c\u003ez}), {x\u003dy}+{x\u003c\u003ey}.\nProof.\nintros A Hdec z (x,Hx) (y,Hy).\ndestruct (Hdec x y) as [Heq|Hneq].\nleft; apply neq_dep_intro; assumption.\nright; intro Heq; injection Heq; exact Hneq.\nQed.\n\nLemma pred_inj : forall n m,\n 0 \u003c\u003e n -\u003e 0 \u003c\u003e m -\u003e pred m \u003d pred n -\u003e m \u003d n.\nProof.\ndestruct n.\nintros m H; destruct H; reflexivity.\ndestruct m.\nintros _ H; destruct H; reflexivity.\nsimpl; intros _ _ H.\nrewrite H.\nreflexivity.\nQed.\n\nLemma le_neq_lt : forall n m, n \u003c\u003d m -\u003e n\u003c\u003em -\u003e n \u003c m.\nProof.\nintros n m Hle Hneq.\ndestruct (le_lt_eq_dec n m Hle).\nassumption.\ncontradiction.\nQed.\n\nLemma inj_restrict :\n forall (A:Set) (f:A-\u003enat) x y z,\n (forall x y : A, f x \u003d f y -\u003e x \u003d y)\n -\u003e x \u003c\u003e z -\u003e f y \u003c f z -\u003e f z \u003c\u003d f x\n -\u003e pred (f x) \u003d f y\n -\u003e False.\n\n(* Search error sans le type de f !! *)\nProof.\nintros A f x y z Hfinj Hneqx Hfy Hfx Heq.\nassert (f z \u003c\u003e f x).\n apply sym_not_eq.\n intro Heqf.\n apply Hneqx.\n apply Hfinj.\n assumption.\nassert (f x \u003d S (f y)).\n assert (0 \u003c f x).\n apply le_lt_trans with (f z).\n apply le_O_n.\n apply le_neq_lt; assumption.\n apply pred_inj.\n apply O_S.\n apply lt_O_neq; assumption.\n exact Heq.\nassert (f z \u003c\u003d f y).\ndestruct (le_lt_or_eq _ _ Hfx).\n apply lt_n_Sm_le.\n rewrite \u003c- H0.\n assumption.\n contradiction Hneqx.\n symmetry.\n apply Hfinj.\n assumption.\ncontradiction (lt_not_le (f y) (f z)).\nQed.\n\nTheorem card_inj : forall m n (A:Set),\n (forall x y :A, {x\u003dy}+{x\u003c\u003ey}) -\u003e\n card A m -\u003e card A n -\u003e m \u003d n.\nProof.\ninduction m; destruct n;\nintros A Hdec\n (f,(Hfbound,(Hfinj,Hfsurj)))\n (g,(Hgbound,(Hginj,Hgsurj))).\n(* 0/0 *)\nreflexivity.\n(* 0/Sm *)\ndestruct (card_inj_aux _ _ _ _ Hfbound Hfinj Hgsurj).\n(* Sn/0 *)\ndestruct (card_inj_aux _ _ _ _ Hgbound Hginj Hfsurj).\n(* Sn/Sm *)\ndestruct (Hgsurj (S n) (le_n _)) as (xSn,HSnx).\nrewrite IHm with (n:\u003dn) (A :\u003d {x:A|x\u003c\u003exSn}).\nreflexivity.\n(* decidability of eq on {x:A|x\u003c\u003exSm} *)\napply dec_restrict.\nassumption.\n(* cardinality of {x:A|x\u003c\u003exSn} is m *)\npose (f\u0027 :\u003d fun x\u0027 : {x:A|x\u003c\u003exSn} \u003d\u003e\n let (x,Hneq) :\u003d x\u0027 in\n if le_lt_dec (f xSn) (f x)\n then pred (f x)\n else f x).\nexists f\u0027.\nsplit.\n(* f\u0027 is bounded *)\nunfold f\u0027.\nintros (x,_).\ndestruct (le_lt_dec (f xSn) (f x)) as [Hle|Hge].\nchange m with (pred (S m)).\napply le_pred.\napply Hfbound.\napply le_S_n.\napply le_trans with (f xSn).\nexact Hge.\napply Hfbound.\nsplit.\n(* f\u0027 is injective *)\nunfold f\u0027.\nintros (x,Hneqx) (y,Hneqy) Heqf\u0027.\ndestruct (le_lt_dec (f xSn) (f x)) as [Hlefx|Hgefx];\ndestruct (le_lt_dec (f xSn) (f y)) as [Hlefy|Hgefy].\n(* f xSn \u003c\u003d f x et f xSn \u003c\u003d f y *)\nassert (Heq : x \u003d y).\n apply Hfinj.\n assert (f xSn \u003c\u003e f y).\n apply sym_not_eq.\n intro Heqf.\n apply Hneqy.\n apply Hfinj.\n assumption.\n assert (0 \u003c f y).\n apply le_lt_trans with (f xSn).\n apply le_O_n.\n apply le_neq_lt; assumption.\n assert (f xSn \u003c\u003e f x).\n apply sym_not_eq.\n intro Heqf.\n apply Hneqx.\n apply Hfinj.\n assumption.\n assert (0 \u003c f x).\n apply le_lt_trans with (f xSn).\n apply le_O_n.\n apply le_neq_lt; assumption.\n apply pred_inj.\n apply lt_O_neq; assumption.\n apply lt_O_neq; assumption.\n assumption.\napply neq_dep_intro; assumption.\n(* f y \u003c f xSn \u003c\u003d f x *)\ndestruct (inj_restrict A f x y xSn); assumption.\n(* f x \u003c f xSn \u003c\u003d f y *)\nsymmetry in Heqf\u0027.\ndestruct (inj_restrict A f y x xSn); assumption.\n(* f x \u003c f xSn et f y \u003c f xSn *)\nassert (Heq : x\u003dy).\n apply Hfinj; assumption.\napply neq_dep_intro; assumption.\n(* f\u0027 is surjective *)\nintros p Hlep.\ndestruct (le_lt_dec (f xSn) p) as [Hle|Hlt].\n(* case f xSn \u003c\u003d p *)\ndestruct (Hfsurj (S p) (le_n_S _ _ Hlep)) as (x,Hx).\nassert (Hneq : x \u003c\u003e xSn).\n intro Heqx.\n rewrite Heqx in Hx.\n rewrite Hx in Hle.\n apply le_Sn_n with p; assumption.\nexists (exist (fun a \u003d\u003e a\u003c\u003exSn) x Hneq).\nunfold f\u0027.\ndestruct (le_lt_dec (f xSn) (f x)) as [Hle\u0027|Hlt\u0027].\nrewrite Hx; reflexivity.\nrewrite Hx in Hlt\u0027.\ncontradiction (le_not_lt (f xSn) p).\napply lt_trans with (S p).\napply lt_n_Sn.\nassumption.\n(* case p \u003c f xSn *)\ndestruct (Hfsurj p (le_S _ _ Hlep)) as (x,Hx).\nassert (Hneq : x \u003c\u003e xSn).\n intro Heqx.\n rewrite Heqx in Hx.\n rewrite Hx in Hlt.\n apply (lt_irrefl p).\n assumption.\nexists (exist (fun a \u003d\u003e a\u003c\u003exSn) x Hneq).\nunfold f\u0027.\ndestruct (le_lt_dec (f xSn) (f x)) as [Hle\u0027|Hlt\u0027].\n rewrite Hx in Hle\u0027.\n contradiction (lt_irrefl p).\n apply lt_le_trans with (f xSn); assumption.\n assumption.\n(* cardinality of {x:A|x\u003c\u003exSn} is n *)\npose (g\u0027 :\u003d fun x\u0027 : {x:A|x\u003c\u003exSn} \u003d\u003e\n let (x,Hneq) :\u003d x\u0027 in\n if Hdec x xSn then 0 else g x).\nexists g\u0027.\nsplit.\n(* g is bounded *)\nunfold g\u0027.\nintros (x,_).\ndestruct (Hdec x xSn) as [_|Hneq].\napply le_O_n.\nassert (Hle_gx:\u003dHgbound x).\ndestruct (le_lt_or_eq _ _ Hle_gx).\napply lt_n_Sm_le.\nassumption.\ncontradiction Hneq.\napply Hginj.\nrewrite HSnx.\nassumption.\nsplit.\n(* g is injective *)\nunfold g\u0027.\nintros (x,Hneqx) (y,Hneqy) Heqg\u0027.\ndestruct (Hdec x xSn) as [Heqx|_].\ncontradiction Hneqx.\ndestruct (Hdec y xSn) as [Heqy|_].\ncontradiction Hneqy.\nassert (Heq : x\u003dy).\n apply Hginj; assumption.\napply neq_dep_intro; assumption.\n(* g is surjective *)\nintros p Hlep.\ndestruct (Hgsurj p (le_S _ _ Hlep)) as (x,Hx).\nassert (Hneq : x\u003c\u003exSn).\n intro Heq.\n rewrite Heq in Hx.\n rewrite Hx in HSnx.\n rewrite HSnx in Hlep.\n contradiction (le_Sn_n _ Hlep).\nexists (exist (fun a \u003d\u003e a\u003c\u003exSn) x Hneq).\nsimpl.\ndestruct (Hdec x xSn) as [Heqx|_].\ncontradiction Hneq.\nassumption.\nQed.\n\n(** Conclusion *)\n\nTheorem interval_discr :\n forall n m, {p:nat|p\u003c\u003dn} \u003d {p:nat|p\u003c\u003dm} -\u003e n\u003dm.\nProof.\nintros n m Heq.\napply card_inj with (A :\u003d {p:nat|p\u003c\u003dn}).\napply interval_dec.\napply card_interval.\nrewrite Heq.\napply card_interval.\nQed.\n", + "license": "mit" +}, { + "repo_name": "yyx990803/linguist", + "path": "samples/Coq/Stlc.v", + "copies": "90", + "size": "15113", + "content": "\nRequire Export SfLib.\n\nModule STLC.\n\nInductive ty : Type :\u003d\n | ty_Bool : ty\n | ty_arrow : ty -\u003e ty -\u003e ty.\n\nInductive tm : Type :\u003d\n | tm_var : id -\u003e tm\n | tm_app : tm -\u003e tm -\u003e tm\n | tm_abs : id -\u003e ty -\u003e tm -\u003e tm\n | tm_true : tm\n | tm_false : tm\n | tm_if : tm -\u003e tm -\u003e tm -\u003e tm.\n\nTactic Notation \"tm_cases\" tactic(first) ident(c) :\u003d\n first;\n [ Case_aux c \"tm_var\" | Case_aux c \"tm_app\" \n | Case_aux c \"tm_abs\" | Case_aux c \"tm_true\" \n | Case_aux c \"tm_false\" | Case_aux c \"tm_if\" ].\n \nNotation a :\u003d (Id 0).\nNotation b :\u003d (Id 1).\nNotation c :\u003d (Id 2).\n\nNotation idB :\u003d\n (tm_abs a ty_Bool (tm_var a)).\n \nNotation idBB :\u003d\n (tm_abs a (ty_arrow ty_Bool ty_Bool) (tm_var a)).\n \nNotation idBBBB :\u003d\n (tm_abs a (ty_arrow (ty_arrow ty_Bool ty_Bool) \n (ty_arrow ty_Bool ty_Bool)) \n (tm_var a)).\n \nNotation k :\u003d (tm_abs a ty_Bool (tm_abs b ty_Bool (tm_var a))).\n\nInductive value : tm -\u003e Prop :\u003d\n | v_abs : forall x T t,\n value (tm_abs x T t)\n | t_true : \n value tm_true\n | t_false : \n value tm_false.\n\nHint Constructors value.\n\nFixpoint subst (s:tm) (x:id) (t:tm) : tm :\u003d\n match t with\n | tm_var x\u0027 \u003d\u003e if beq_id x x\u0027 then s else t\n | tm_abs x\u0027 T t1 \u003d\u003e tm_abs x\u0027 T (if beq_id x x\u0027 then t1 else (subst s x t1))\n | tm_app t1 t2 \u003d\u003e tm_app (subst s x t1) (subst s x t2)\n | tm_true \u003d\u003e tm_true\n | tm_false \u003d\u003e tm_false\n | tm_if t1 t2 t3 \u003d\u003e tm_if (subst s x t1) (subst s x t2) (subst s x t3)\nend.\n\nReserved Notation \"t1 \u0027\u003d\u003d\u003e\u0027 t2\" (at level 40).\n\nInductive step : tm -\u003e tm -\u003e Prop :\u003d\n | ST_AppAbs : forall x T t12 v2,\n value v2 -\u003e\n (tm_app (tm_abs x T t12) v2) \u003d\u003d\u003e (subst v2 x t12)\n | ST_App1 : forall t1 t1\u0027 t2,\n t1 \u003d\u003d\u003e t1\u0027 -\u003e\n tm_app t1 t2 \u003d\u003d\u003e tm_app t1\u0027 t2\n | ST_App2 : forall v1 t2 t2\u0027,\n value v1 -\u003e\n t2 \u003d\u003d\u003e t2\u0027 -\u003e\n tm_app v1 t2 \u003d\u003d\u003e tm_app v1 t2\u0027\n | ST_IfTrue : forall t1 t2,\n (tm_if tm_true t1 t2) \u003d\u003d\u003e t1\n | ST_IfFalse : forall t1 t2,\n (tm_if tm_false t1 t2) \u003d\u003d\u003e t2\n | ST_If : forall t1 t1\u0027 t2 t3,\n t1 \u003d\u003d\u003e t1\u0027 -\u003e\n (tm_if t1 t2 t3) \u003d\u003d\u003e (tm_if t1\u0027 t2 t3)\n\nwhere \"t1 \u0027\u003d\u003d\u003e\u0027 t2\" :\u003d (step t1 t2).\n\nTactic Notation \"step_cases\" tactic(first) ident(c) :\u003d\n first;\n [ Case_aux c \"ST_AppAbs\" | Case_aux c \"ST_App1\" \n | Case_aux c \"ST_App2\" | Case_aux c \"ST_IfTrue\" \n | Case_aux c \"ST_IfFalse\" | Case_aux c \"ST_If\" ].\n\nNotation stepmany :\u003d (refl_step_closure step).\nNotation \"t1 \u0027\u003d\u003d\u003e*\u0027 t2\" :\u003d (stepmany t1 t2) (at level 40).\n\nHint Constructors step.\n\nLemma step_example3 :\n (tm_app (tm_app idBBBB idBB) idB)\n \u003d\u003d\u003e* idB.\nProof.\n eapply rsc_step.\n apply ST_App1.\n apply ST_AppAbs.\n apply v_abs.\n \n simpl.\n eapply rsc_step.\n apply ST_AppAbs.\n apply v_abs.\n \n simpl.\n apply rsc_refl.\nQed.\n\nDefinition context :\u003d partial_map ty.\nModule Context.\n\nDefinition partial_map (A:Type) :\u003d id -\u003e option A.\nDefinition empty {A:Type} : partial_map A :\u003d (fun _ \u003d\u003e None).\nDefinition extend {A:Type} (Gamma : partial_map A) (x:id) (T : A) :\u003d\n fun x\u0027 \u003d\u003e if beq_id x x\u0027 then Some T else Gamma x\u0027.\n \nLemma extend_eq : forall A (ctxt: partial_map A) x T,\n (extend ctxt x T) x \u003d Some T.\nProof.\n intros. unfold extend. rewrite \u003c- beq_id_refl. auto.\nQed.\n\nLemma extend_neq : forall A (ctxt: partial_map A) x1 T x2,\n beq_id x2 x1 \u003d false -\u003e\n (extend ctxt x2 T) x1 \u003d ctxt x1.\nProof.\nintros. unfold extend. rewrite H. auto.\nQed.\n\nEnd Context.\n\nInductive has_type : context -\u003e tm -\u003e ty -\u003e Prop :\u003d\n | T_Var : forall Gamma x T,\n Gamma x \u003d Some T -\u003e\n has_type Gamma (tm_var x) T\n | T_Abs : forall Gamma x T11 T12 t12,\n has_type (extend Gamma x T11) t12 T12 -\u003e\n has_type Gamma (tm_abs x T11 t12) (ty_arrow T11 T12)\n | T_App : forall T11 T12 Gamma t1 t2,\n has_type Gamma t1 (ty_arrow T11 T12) -\u003e\n has_type Gamma t2 T11 -\u003e\n has_type Gamma (tm_app t1 t2) T12\n | T_True : forall Gamma,\n has_type Gamma tm_true ty_Bool\n | T_False : forall Gamma,\n has_type Gamma tm_false ty_Bool\n | T_If : forall t1 t2 t3 T Gamma,\n has_type Gamma t1 ty_Bool -\u003e\n has_type Gamma t2 T -\u003e\n has_type Gamma t3 T -\u003e\n has_type Gamma (tm_if t1 t2 t3) T.\n \nTactic Notation \"has_type_cases\" tactic(first) ident(c) :\u003d\n first;\n [ Case_aux c \"T_Var\" | Case_aux c \"T_Abs\" \n | Case_aux c \"T_App\" | Case_aux c \"T_True\" \n | Case_aux c \"T_False\" | Case_aux c \"T_If\" ].\n\nHint Constructors has_type.\n\nHint Unfold beq_id beq_nat extend.\n\nExample typing_example_2_full :\n has_type empty\n (tm_abs a ty_Bool\n (tm_abs b (ty_arrow ty_Bool ty_Bool)\n (tm_app (tm_var b) (tm_app (tm_var b) (tm_var a)))))\n (ty_arrow ty_Bool (ty_arrow (ty_arrow ty_Bool ty_Bool) ty_Bool)).\nProof.\napply T_Abs.\napply T_Abs.\napply T_App with (T11 :\u003d ty_Bool).\n apply T_Var.\n unfold extend.\n simpl.\n reflexivity.\n \n apply T_App with (T11 :\u003d ty_Bool).\n apply T_Var.\n unfold extend.\n simpl.\n reflexivity.\n \n apply T_Var.\n unfold extend.\n simpl.\n reflexivity.\nQed.\n\nExample typing_example_3 :\n exists T, \n has_type empty\n (tm_abs a (ty_arrow ty_Bool ty_Bool)\n (tm_abs b (ty_arrow ty_Bool ty_Bool)\n (tm_abs c ty_Bool\n (tm_app (tm_var b) (tm_app (tm_var a) (tm_var c))))))\n T.\n\nProof with auto.\nexists\n (ty_arrow (ty_arrow ty_Bool ty_Bool)\n (ty_arrow (ty_arrow ty_Bool ty_Bool) (ty_arrow ty_Bool ty_Bool))).\napply T_Abs.\napply T_Abs.\napply T_Abs.\napply T_App with (T11 :\u003d ty_Bool).\n apply T_Var.\n unfold extend.\n simpl.\n reflexivity.\n \n apply T_App with (T11 :\u003d ty_Bool).\n auto.\n \n auto.\nQed.\n\n\nTheorem coiso : forall a b e,\n a \u003d\u003d\u003e* b -\u003e\n tm_app a e \u003d\u003d\u003e* tm_app b e.\nProof.\nintros.\ninduction H.\n apply rsc_refl.\n \n apply rsc_step with (tm_app y e).\n apply ST_App1.\n assumption.\n \n assumption.\nQed.\n\nTheorem reptrans : forall a b c,\n a \u003d\u003d\u003e* b -\u003e\n b \u003d\u003d\u003e* c -\u003e\n a \u003d\u003d\u003e* c.\nProof.\n\nintros a b c H.\ninduction H.\n intros.\n assumption.\n \n intros H1.\n apply IHrefl_step_closure in H1.\n apply rsc_step with y.\n assumption.\n \n assumption.\nQed.\n\n(* TODO\nExample typing_nonexample_3 :\n ~ (exists S, exists T,\n has_type empty \n (tm_abs a S\n (tm_app (tm_var a) (tm_var a)))\n T).\nProof.\n*)\n\nInductive appears_free_in : id -\u003e tm -\u003e Prop :\u003d\n | afi_var : forall x,\n appears_free_in x (tm_var x)\n | afi_app1 : forall x t1 t2,\n appears_free_in x t1 -\u003e appears_free_in x (tm_app t1 t2)\n | afi_app2 : forall x t1 t2,\n appears_free_in x t2 -\u003e appears_free_in x (tm_app t1 t2)\n | afi_abs : forall x y T11 t12,\n y \u003c\u003e x -\u003e\n appears_free_in x t12 -\u003e\n appears_free_in x (tm_abs y T11 t12)\n | afi_if1 : forall x t1 t2 t3,\n appears_free_in x t1 -\u003e\n appears_free_in x (tm_if t1 t2 t3)\n | afi_if2 : forall x t1 t2 t3,\n appears_free_in x t2 -\u003e\n appears_free_in x (tm_if t1 t2 t3)\n | afi_if3 : forall x t1 t2 t3,\n appears_free_in x t3 -\u003e\n appears_free_in x (tm_if t1 t2 t3).\n \nTactic Notation \"afi_cases\" tactic(first) ident(c) :\u003d\n first;\n [ Case_aux c \"afi_var\"\n | Case_aux c \"afi_app1\" | Case_aux c \"afi_app2\" \n | Case_aux c \"afi_abs\" \n | Case_aux c \"afi_if1\" | Case_aux c \"afi_if2\" \n | Case_aux c \"afi_if3\" ].\n\nHint Constructors appears_free_in.\n\nDefinition closed (t:tm) :\u003d\n forall x, ~ appears_free_in x t.\n \nLemma free_in_context : forall x t T Gamma,\n appears_free_in x t -\u003e\n has_type Gamma t T -\u003e\n exists T\u0027, Gamma x \u003d Some T\u0027.\nProof.\n intros. generalize dependent Gamma. generalize dependent T.\n afi_cases (induction H) Case; \n intros; try solve [inversion H0; eauto].\n Case \"afi_abs\".\n inversion H1; subst.\n apply IHappears_free_in in H7.\n apply not_eq_beq_id_false in H.\n rewrite extend_neq in H7; assumption.\nQed.\n\nCorollary typable_empty__closed : forall t T, \n has_type empty t T -\u003e\n closed t.\nProof.\nintros t T H x H1.\nremember (@empty ty) as Gamma.\nassert (exists t\u0027 : _, Gamma x \u003d Some t\u0027).\n apply free_in_context with (t :\u003d t) (T :\u003d T).\n assumption.\n \n assumption.\n \n inversion H0.\n rewrite HeqGamma in H2.\n inversion H2.\nQed.\n\nLemma context_invariance : forall Gamma Gamma\u0027 t S,\n has_type Gamma t S -\u003e\n (forall x, appears_free_in x t -\u003e Gamma x \u003d Gamma\u0027 x) -\u003e\n has_type Gamma\u0027 t S.\nProof with auto.\nintros.\ngeneralize dependent Gamma\u0027.\nhas_type_cases (induction H) Case; intros; auto.\n apply T_Var.\n rewrite \u003c- H0...\n \n apply T_Abs.\n apply IHhas_type.\n intros x0 Hafi.\n unfold extend.\n remember (beq_id x x0) as e.\n destruct e.\n reflexivity.\n \n auto.\n apply H0.\n apply afi_abs.\n auto.\n eauto .\n apply beq_id_false_not_eq.\n rewrite Heqe.\n reflexivity.\n \n assumption.\n \n apply T_App with T11.\n auto.\n \n auto.\nQed.\n\nLemma substitution_preserves_typing : forall Gamma x U v t T,\n has_type (extend Gamma x U) t T -\u003e\n has_type empty v U -\u003e\n has_type Gamma (subst v x t) T.\nProof with eauto.\n intros Gamma x U v t T Ht Hv.\n generalize dependent Gamma.\n generalize dependent T.\n tm_cases (induction t) Case; intros T Gamma H; inversion H; subst; simpl...\n Case \"tm_var\".\n rename i into y. remember (beq_id x y) as e. destruct e.\n SCase \"x\u003dy\".\n apply beq_id_eq in Heqe. subst.\n rewrite extend_eq in H2.\n inversion H2; subst.\n clear H2.\n eapply context_invariance...\n intros x Hcontra.\n destruct (free_in_context _ _ T empty Hcontra) as (T\u0027, HT\u0027)...\n inversion HT\u0027.\n\n apply T_Var.\n rewrite extend_neq in H2.\n assumption.\n\n rewrite Heqe.\n reflexivity.\n\n rename i into y.\n apply T_Abs.\n remember (beq_id x y) as e.\n destruct e.\n eapply context_invariance...\n apply beq_id_eq in Heqe.\n subst.\n intros x Hafi.\n unfold extend.\n destruct (beq_id y x).\n reflexivity.\n\n reflexivity.\n\n apply IHt.\n eapply context_invariance...\n intros x0 Hafi.\n unfold extend.\n remember (beq_id y x0) as Coiso1.\n remember (beq_id x x0) as Coiso2.\n destruct Coiso1.\n auto.\n eauto .\n destruct Coiso2.\n eauto .\n auto.\n apply beq_id_eq in HeqCoiso1.\n apply beq_id_eq in HeqCoiso2.\n subst.\n assert (x0 \u003c\u003e x0).\n apply beq_id_false_not_eq.\n rewrite Heqe.\n auto.\n\n apply ex_falso_quodlibet.\n apply H0.\n reflexivity.\n\n reflexivity.\n\n destruct Coiso2.\n auto.\n\n auto.\nQed.\n\nTheorem preservation : forall t t\u0027 T,\n has_type empty t T -\u003e\n t \u003d\u003d\u003e t\u0027 -\u003e\n has_type empty t\u0027 T.\nProof.\nremember (@empty ty) as Gamma.\nintros t t\u0027 T HT.\ngeneralize dependent t\u0027.\ninduction HT.\n intros t\u0027 H1.\n inversion H1.\n \n intros t\u0027 H1.\n inversion H1.\n \n intros t\u0027 H1.\n inversion H1.\n apply substitution_preserves_typing with T11.\n subst.\n inversion HT1.\n subst.\n apply H2.\n \n subst.\n assumption.\n \n subst.\n apply T_App with T11.\n apply IHHT1.\n reflexivity.\n \n assumption.\n \n assumption.\n \n subst.\n apply T_App with T11.\n assumption.\n \n apply IHHT2.\n reflexivity.\n \n assumption.\n \n intros t\u0027 H.\n inversion H.\n \n intros t\u0027 H.\n inversion H.\n \n intros t\u0027 H.\n inversion H.\n subst.\n assumption.\n \n subst.\n assumption.\n \n subst.\n apply T_If.\n apply IHHT1.\n reflexivity.\n \n assumption.\n \n assumption.\n \n assumption.\nQed.\n\nTheorem progress : forall t T,\n has_type empty t T -\u003e\n value t \\/ exists t\u0027, t \u003d\u003d\u003e t\u0027.\nProof.\nintros t T.\nintros H.\nremember (@empty ty) as Gamma.\ninduction H.\n rewrite HeqGamma in H.\n unfold empty in H.\n inversion H.\n \n left.\n apply v_abs.\n \n right.\n assert (value t1 \\/ (exists t\u0027 : tm, t1 \u003d\u003d\u003e t\u0027)).\n apply IHhas_type1.\n assumption.\n \n assert (value t2 \\/ (exists t\u0027 : tm, t2 \u003d\u003d\u003e t\u0027)).\n apply IHhas_type2.\n assumption.\n \n inversion H1.\n inversion H2.\n inversion H3.\n subst.\n exists (subst t2 x t).\n apply ST_AppAbs.\n assumption.\n \n subst.\n inversion H.\n \n subst.\n inversion H.\n \n inversion H4.\n exists (tm_app t1 x).\n apply ST_App2.\n assumption.\n \n assumption.\n \n inversion H3.\n exists (tm_app x t2).\n apply ST_App1.\n assumption.\n \n left.\n auto.\n \n left.\n auto.\n \n right.\n assert (value t1 \\/ (exists t\u0027 : tm, t1 \u003d\u003d\u003e t\u0027)).\n apply IHhas_type1.\n assumption.\n \n inversion H2.\n inversion H3.\n subst.\n inversion H.\n \n subst.\n exists t2.\n apply ST_IfTrue.\n \n subst.\n exists t3.\n apply ST_IfFalse.\n \n inversion H3.\n exists (tm_if x t2 t3).\n apply ST_If.\n assumption.\nQed.\n\nTheorem progress\u0027 : forall t T,\n has_type empty t T -\u003e\n value t \\/ exists t\u0027, t \u003d\u003d\u003e t\u0027.\nProof.\nintros t.\ntm_cases (induction t) Case; intros T Ht; auto.\n inversion Ht.\n inversion H1.\n \n right.\n inversion Ht.\n subst.\n assert (value t1 \\/ (exists t\u0027 : tm, t1 \u003d\u003d\u003e t\u0027)).\n apply IHt1 with (T :\u003d ty_arrow T11 T).\n assumption.\n \n assert (value t2 \\/ (exists t\u0027 : tm, t2 \u003d\u003d\u003e t\u0027)).\n apply IHt2 with T11.\n assumption.\n \n inversion H.\n inversion H1.\n subst.\n inversion H0.\n exists (subst t2 x t).\n apply ST_AppAbs.\n assumption.\n \n inversion H3.\n exists (tm_app (tm_abs x T0 t) x0).\n apply ST_App2.\n assumption.\n \n assumption.\n \n subst.\n inversion H2.\n \n subst.\n inversion H2.\n \n inversion H1.\n exists (tm_app x t2).\n apply ST_App1.\n assumption.\n \n right.\n inversion Ht.\n subst.\n assert (value t1 \\/ (exists t\u0027 : tm, t1 \u003d\u003d\u003e t\u0027)).\n apply IHt1 with ty_Bool.\n assumption.\n \n assert (value t2 \\/ (exists t\u0027 : tm, t2 \u003d\u003d\u003e t\u0027)).\n apply IHt2 with T.\n assumption.\n \n assert (value t3 \\/ (exists t\u0027 : tm, t3 \u003d\u003d\u003e t\u0027)).\n apply IHt3 with T.\n assumption.\n \n inversion H.\n inversion H2.\n subst.\n inversion H3.\n \n subst.\n subst.\n exists t2.\n apply ST_IfTrue.\n \n exists t3.\n apply ST_IfFalse.\n \n inversion H2.\n exists (tm_if x t2 t3).\n apply ST_If.\n assumption.\nQed.\n\nTheorem types_unique : forall t T Gamma,\n has_type Gamma t T -\u003e\n (forall T\u0027, has_type Gamma t T\u0027 -\u003e T\u0027 \u003d T).\nProof.\nintros t T Gamma H.\ninduction H.\n intros T\u0027.\n intros H1.\n inversion H1.\n subst.\n subst.\n auto.\n eauto .\n inversion H1.\n subst.\n assert (Some T \u003d Some T\u0027).\n rewrite \u003c- H3.\n rewrite \u003c- H.\n reflexivity.\n \n inversion H0.\n reflexivity.\n \n intros T\u0027.\n intros H1.\n inversion H1.\n subst.\n assert (T1 \u003d T12).\n apply IHhas_type.\n assumption.\n \n rewrite H0.\n reflexivity.\n \n intros T\u0027 H1.\n subst.\n inversion H1.\n subst.\n assert (ty_arrow T0 T\u0027 \u003d ty_arrow T11 T12).\n apply IHhas_type1.\n assumption.\n \n inversion H2.\n reflexivity.\n \n intros T\u0027.\n intros H.\n inversion H.\n reflexivity.\n \n intros.\n inversion H.\n reflexivity.\n \n intros T\u0027.\n intros H2.\n inversion H2.\n subst.\n apply IHhas_type2.\n assumption.\nQed.", "license": "mit" }, { - "repo_name": "cybernet14/linguist", - "path": "samples/VHDL/foo.vhd", + "repo_name": "wcandillon/linguist", + "path": "samples/Coq/Lists.v", + "copies": "90", + "size": "12802", + "content": "Require Export Basics.\nModule NatList.\nImport Playground1.\n\nInductive natprod : Type :\u003d\n\tpair : nat -\u003e nat -\u003e natprod.\n\nDefinition fst (p : natprod) : nat :\u003d\n\tmatch p with\n\t\t| pair x y \u003d\u003e x\n\tend.\n\nDefinition snd (p : natprod) : nat :\u003d\n\tmatch p with\n\t\t| pair x y \u003d\u003e y\n\tend.\n\nNotation \"( x , y )\" :\u003d (pair x y).\n\nDefinition swap_pair (p : natprod) : natprod :\u003d\n\tmatch p with\n\t\t\t| (x, y) \u003d\u003e (y, x)\n\tend.\n\nTheorem surjective_pairing\u0027 : forall (n m : nat),\n\t(n, m) \u003d (fst (n, m), snd (n, m)).\nProof.\n\treflexivity. Qed.\n\nTheorem surjective_pairing : forall (p : natprod),\n\tp \u003d (fst p, snd p).\nProof.\n\tintros p.\n\tdestruct p as (n, m).\n\tsimpl.\n\treflexivity.\n\tQed.\n\nTheorem snd_fst_is_swap : forall (p : natprod),\n\t(snd p, fst p) \u003d swap_pair p.\nProof.\n\tintros p.\n\tdestruct p.\n\treflexivity.\n\tQed.\n\nTheorem fst_swap_is_snd : forall (p : natprod),\n\t fst (swap_pair p) \u003d snd p.\nProof.\n\tintros p.\n\tdestruct p.\n\treflexivity.\n\tQed.\n\nInductive natlist : Type :\u003d\n\t| nil : natlist\n\t| cons : nat -\u003e natlist -\u003e natlist.\n\nDefinition l_123 :\u003d cons (S O) (cons (S (S O)) (cons (S (S (S O))) nil)).\n\nNotation \"x :: l\" :\u003d (cons x l) (at level 60, right associativity).\nNotation \"[ ]\" :\u003d nil.\nNotation \"[]\" :\u003d nil.\nNotation \"[ x , .. , y ]\" :\u003d (cons x .. (cons y nil) ..).\n\nFixpoint repeat (n count : nat) : natlist :\u003d\n\tmatch count with\n\t\t| O \u003d\u003e nil\n\t\t| S count\u0027 \u003d\u003e n :: (repeat n count\u0027)\n\tend.\n\nFixpoint length (l:natlist) : nat :\u003d\n\tmatch l with\n\t\t| nil \u003d\u003e O\n\t\t| h :: t \u003d\u003e S (length t)\n\tend.\n\nFixpoint app (l1 l2 : natlist) : natlist :\u003d\n\tmatch l1 with\n\t\t| nil \u003d\u003e l2\n\t\t| h :: t \u003d\u003e h :: (app t l2)\n\tend.\n\nNotation \"x ++ y\" :\u003d (app x y) (right associativity, at level 60).\n\n(*\nExample test_app1: [1,2,3] ++ [4,5] \u003d [1,2,3,4,5].\nProof. reflexivity. Qed.\nExample test_app2: nil ++ [4,5] \u003d [4,5].\nProof. reflexivity. Qed.\nExample test_app3: [1,2,3] ++ [] \u003d [1,2,3].\nProof. reflexivity. Qed.\n*)\n\nDefinition head (l : natlist) : nat :\u003d\n\tmatch l with\n\t\t| nil \u003d\u003e O\n\t\t| h :: t \u003d\u003e h\n\tend.\n\nDefinition tl (l : natlist) : natlist :\u003d\n\tmatch l with\n\t\t| nil \u003d\u003e nil\n\t\t| h :: t \u003d\u003e t\n\tend.\n\n\t\t\t(*\nExample test_tl: tl [1,2,3] \u003d [2,3].\nProof. reflexivity. Qed.\n*)\n\nFixpoint nonzeros (l:natlist) : natlist :\u003d\n\tmatch l with\n\t\t| nil \u003d\u003e nil\n\t\t| O :: r \u003d\u003e nonzeros r\n\t\t| n :: r \u003d\u003e n :: (nonzeros r)\n\tend.\n\nExample test_nonzeros: nonzeros [O,S O,O,S (S O), S (S (S O)),O,O] \u003d [S O,S (S O), S (S (S O))].\nProof. reflexivity. Qed.\n\nFixpoint oddmembers (l:natlist) : natlist :\u003d\n\tmatch l with\n\t\t| nil \u003d\u003e nil\n\t\t| n :: r \u003d\u003e match (oddb n) with\n\t\t\t\t\t\t\t\t\t\t| true \u003d\u003e n :: (oddmembers r)\n\t\t\t\t\t\t\t\t\t\t| false \u003d\u003e oddmembers r\n\t\t\t\t\t\t\t\tend\n\tend.\n\nExample test_oddmembers: oddmembers [O, S O, O, S (S O), S (S (S O)), O, O] \u003d [S O, S (S (S O))].\nProof. reflexivity. Qed.\n\nFixpoint countoddmembers (l:natlist) : nat :\u003d\n\t\tlength (oddmembers l).\n\nExample test_countoddmembers2: countoddmembers [O, S (S O), S (S (S (S O)))] \u003d O.\nProof. reflexivity. Qed.\n\nExample test_countoddmembers3: countoddmembers [] \u003d O.\nProof. reflexivity. Qed.\n\nFixpoint alternate (l1 l2 : natlist) : natlist :\u003d\n\t\tmatch l1 with\n\t\t\t\t| nil \u003d\u003e l2\n\t\t\t\t| a :: r1 \u003d\u003e match l2 with\n\t\t\t\t\t\t\t\t\t\t\t| nil \u003d\u003e l1\n\t\t\t\t\t\t\t\t\t\t\t| b :: r2 \u003d\u003e a :: b :: (alternate r1 r2)\n\t\t\t\t\t\t\t\t\t\tend\n\t\tend.\n\nExample test_alternative1: alternate [S O, S (S O), S (S (S O))] [S (S (S (S O))), S (S (S (S (S O)))), S (S (S (S (S (S O)))))] \u003d\n\t\t[S O, S (S (S (S O))), S (S O), S (S (S (S (S O)))), S (S (S O)), S (S (S (S (S (S O)))))].\nProof. reflexivity. Qed.\n\nDefinition bag :\u003d natlist.\n\nFixpoint count (v : nat) (s: bag) : nat :\u003d\n\tmatch s with\n\t\t| nil \u003d\u003e O\n\t\t| v\u0027 :: r \u003d\u003e match (beq_nat v\u0027 v) with\n\t\t\t\t\t\t\t\t\t\t| true \u003d\u003e S (count v r)\n\t\t\t\t\t\t\t\t\t\t| false \u003d\u003e count v r\n\t\t\t\t\t\t\t\t end\n\tend.\n\nExample test_count1: count (S O) [S O, S (S O), S (S (S O)), S O, S (S (S (S O))), S O] \u003d S (S (S O)).\nProof. reflexivity. Qed.\n\nDefinition sum : bag -\u003e bag -\u003e bag :\u003d app.\n\nExample test_sum1: count (S O) (sum [S O, S (S O), S (S (S O))] [S O, S (S (S (S O))), S O]) \u003d S (S (S O)).\nProof. reflexivity. Qed.\n\nDefinition add (v:nat) (s:bag) : bag :\u003d v :: s.\n\nExample test_add1: count (S O) (add (S O) [S O, S (S (S (S O))), S O]) \u003d S (S (S O)).\nProof. reflexivity. Qed.\n\nDefinition member (v:nat) (s:bag) : bool :\u003d\n\tble_nat (S O) (count v s).\n\nExample test_member1: member (S O) [S O, S (S (S (S O))), S O] \u003d true.\nProof. reflexivity. Qed.\n\nExample test_member2: member (S (S O)) [S O, S (S (S (S O))), S O] \u003d false.\nProof. reflexivity. Qed.\n\nFixpoint remove_one (v:nat) (s:bag) : bag :\u003d\n\tmatch s with\n\t\t| nil \u003d\u003e nil\n\t\t| v\u0027 :: r \u003d\u003e match (beq_nat v v\u0027) with\n\t\t\t\t\t\t\t\t\t| true \u003d\u003e r\n\t\t\t\t\t\t\t\t\t| false \u003d\u003e v\u0027 :: (remove_one v r)\n\t\t\t\t\t\t\t\t end\n\tend.\n\nExample test_remove_one1: count (S (S (S (S (S O)))))\n\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t(remove_one (S (S (S (S (S O)))))\n\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t[S (S O), S O, S (S (S (S (S O)))), S (S (S (S O))), S O]) \u003d O.\nProof. reflexivity. Qed.\n\nFixpoint remove_all (v:nat) (s:bag) : bag :\u003d\n\tmatch s with\n\t\t| nil \u003d\u003e nil\n\t\t| v\u0027 :: r \u003d\u003e match (beq_nat v v\u0027) with\n\t\t\t\t\t\t\t\t\t\t| true \u003d\u003e remove_all v r\n\t\t\t\t\t\t\t\t\t\t| false \u003d\u003e v\u0027 :: (remove_all v r)\n\t\t\t\t\t\t\t\t end\n\tend.\n\nExample test_remove_all1: count (S (S (S (S (S O)))))\n\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t(remove_all (S (S (S (S (S O)))))\n\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t[S (S O), S O, S (S (S (S (S O)))), S (S (S (S O))), S O]) \u003d O.\nProof. reflexivity. Qed.\n\nFixpoint subset (s1:bag) (s2:bag) : bool :\u003d\n\t\tmatch s1 with\n\t\t\t| nil \u003d\u003e true\n\t\t\t| v :: r \u003d\u003e andb (member v s2)\n\t\t\t\t\t\t\t\t\t\t\t (subset r (remove_one v s2))\n\t\tend.\n\nDefinition test_subset1: subset [S O, S (S O)] [S (S O), S O, S (S (S (S O))), S O] \u003d true.\nProof. reflexivity. Qed.\nDefinition test_subset2: subset [S O, S (S O), S (S O)] [S (S O), S O, S (S (S (S O))), S O] \u003d false.\nProof. reflexivity. Qed.\n\nTheorem bag_count_add : forall n t: nat, forall s : bag,\n\t\t\t\tcount n s \u003d t -\u003e count n (add n s) \u003d S t.\nProof.\n\tintros n t s.\n\tintros H.\n\tinduction s.\n\tsimpl.\n\trewrite \u003c- beq_nat_refl.\n\trewrite \u003c- H.\n\treflexivity.\n\trewrite \u003c- H.\n\tsimpl.\n\trewrite \u003c- beq_nat_refl.\n\treflexivity.\nQed.\n\nTheorem nil_app : forall l:natlist,\n\t[] ++ l \u003d l.\nProof.\n\treflexivity. Qed.\n\nTheorem tl_length_pred : forall l:natlist,\n\tpred (length l) \u003d length (tl l).\nProof.\n\tintros l. destruct l as [| n l\u0027].\n\tCase \"l \u003d nil\".\n\t\treflexivity.\n\tCase \"l \u003d cons n l\u0027\".\n\t\treflexivity. Qed.\n\nTheorem app_ass:forall l1 l2 l3 : natlist,\n\t(l1 ++ l2) ++ l3 \u003d l1 ++ (l2 ++ l3).\nProof.\n\tintros l1 l2 l3. induction l1 as [| n l1\u0027].\n\tCase \"l1 \u003d nil\".\n\t\treflexivity.\n\tCase \"l1 \u003d cons n l1\u0027\".\n\t\tsimpl. rewrite -\u003e IHl1\u0027. reflexivity. Qed.\n\nTheorem app_length: forall l1 l2 : natlist,\n\tlength (l1 ++ l2) \u003d (length l1) + (length l2).\nProof.\n\tintros l1 l2. induction l1 as [| n l1\u0027].\n\tCase \"l1 \u003d nil\".\n\t\treflexivity.\n\tCase \"l1 \u003d cons\".\n\t\tsimpl. rewrite -\u003e IHl1\u0027. reflexivity. Qed.\n\nFixpoint snoc (l:natlist) (v:nat) : natlist :\u003d\n\tmatch l with\n\t\t| nil \u003d\u003e [v]\n\t\t| h :: t \u003d\u003e h :: (snoc t v)\n\tend.\n\nFixpoint rev (l:natlist) : natlist :\u003d\n\tmatch l with\n\t\t| nil \u003d\u003e nil\n\t\t| h :: t \u003d\u003e snoc (rev t) h\n\tend.\n\nExample test_rev1: rev [S O, S (S O), S (S (S O))] \u003d [S (S (S O)), S (S O), S O].\nProof. reflexivity. Qed.\n\nTheorem length_snoc : forall n : nat, forall l : natlist,\n\tlength (snoc l n) \u003d S (length l).\nProof.\n\tintros n l. induction l as [| n\u0027 l\u0027].\n\tCase \"l \u003d nil\".\n\t\treflexivity.\n\tCase \"l \u003d cons n\u0027 l\u0027\".\n\t\tsimpl. rewrite -\u003e IHl\u0027. reflexivity. Qed.\n\nTheorem rev_length : forall l : natlist,\n\tlength (rev l) \u003d length l.\nProof.\n\tintros l. induction l as [| n l\u0027].\n\tCase \"l \u003d nil\".\n\t\treflexivity.\n\tCase \"l \u003d cons\".\n\t\tsimpl. rewrite -\u003e length_snoc.\n\t\trewrite -\u003e IHl\u0027. reflexivity. Qed.\n\nTheorem app_nil_end : forall l :natlist,\n\tl ++ [] \u003d l.\nProof.\n\tintros l.\n\tinduction l.\n\tCase \"l \u003d nil\".\n\t\treflexivity.\n\tCase \"l \u003d cons\".\n\t\tsimpl. rewrite -\u003e IHl. reflexivity. Qed.\n\n\n\nTheorem rev_snoc : forall l: natlist, forall n : nat,\n\trev (snoc l n) \u003d n :: (rev l).\nProof.\n\tintros l n.\n\tinduction l.\n\tCase \"l \u003d nil\".\n\t\treflexivity.\n\tCase \"l \u003d cons\".\n\t\tsimpl.\n\t\trewrite -\u003e IHl.\n\t\treflexivity.\n\t\tQed.\n\nTheorem rev_involutive : forall l : natlist,\n\trev (rev l) \u003d l.\nProof.\n\tintros l.\n\tinduction l.\n\tCase \"l \u003d nil\".\n\t\treflexivity.\n\tCase \"l \u003d cons\".\n\t\tsimpl.\n\t\trewrite -\u003e rev_snoc.\n\t\trewrite -\u003e IHl.\n\t\treflexivity.\n\t\tQed.\n\nTheorem app_ass4 : forall l1 l2 l3 l4 : natlist,\n\tl1 ++ (l2 ++ (l3 ++ l4)) \u003d ((l1 ++ l2) ++ l3) ++ l4.\nProof.\n\tintros l1 l2 l3 l4.\n\trewrite -\u003e app_ass.\n\trewrite -\u003e app_ass.\n\treflexivity.\n\tQed.\n\nTheorem snoc_append : forall (l : natlist) (n : nat),\n\tsnoc l n \u003d l ++ [n].\nProof.\n\tintros l n.\n\tinduction l.\n\tCase \"l \u003d nil\".\n\t\treflexivity.\n\tCase \"l \u003d cons\".\n\t\tsimpl.\n\t\trewrite -\u003e IHl.\n\t\treflexivity.\n\t\tQed.\n\nTheorem nonzeros_length : forall l1 l2 : natlist,\n\tnonzeros (l1 ++ l2) \u003d (nonzeros l1) ++ (nonzeros l2).\nProof.\n\tintros l1 l2.\n\tinduction l1.\n\tCase \"l1 \u003d nil\".\n\t\treflexivity.\n\tCase \"l1 \u003d cons\".\n\t\tsimpl.\n\t\trewrite -\u003e IHl1.\n\t\tdestruct n.\n\t\treflexivity.\n\t\treflexivity.\n\t\tQed.\n\nTheorem distr_rev : forall l1 l2 : natlist,\n\trev (l1 ++ l2) \u003d (rev l2) ++ (rev l1).\nProof.\n\tintros l1 l2.\n\tinduction l1.\n\tCase \"l1 \u003d nil\".\n\t\tsimpl.\n\t\trewrite -\u003e app_nil_end.\n\t\treflexivity.\n\tCase \"l1 \u003d cons\".\n\t\tsimpl.\n\t\trewrite -\u003e IHl1.\n\t\tsimpl.\n\t\trewrite -\u003e snoc_append.\n\t\trewrite -\u003e snoc_append.\n\t\trewrite -\u003e app_ass.\n\t\treflexivity.\n\t\tQed.\n\nTheorem count_number_nonzero : forall (s : bag),\n\tble_nat O (count (S O) (S O :: s)) \u003d true.\nProof.\n\tintros s.\n\tinduction s.\n\t\treflexivity.\n\t\treflexivity.\n\t\tQed.\n\nTheorem ble_n_Sn : forall n,\n\tble_nat n (S n) \u003d true.\nProof.\n\tintros n. induction n as [| n\u0027].\n\tCase \"0\".\n\t\tsimpl. reflexivity.\n\tCase \"S n\u0027\".\n\t\tsimpl. rewrite -\u003e IHn\u0027. reflexivity. Qed.\n\nTheorem remove_decreases_count: forall (s : bag),\n\tble_nat (count O (remove_one O s)) (count O s) \u003d true.\nProof.\n\tintros s.\n\tinduction s.\n\tCase \"s \u003d nil\".\n\t\treflexivity.\n\tCase \"s \u003d cons\".\n\t\tsimpl.\n\t\tinduction n.\n\t\tSCase \"n \u003d O\".\n\t\t\tsimpl. rewrite -\u003e ble_n_Sn.\n\t\t\treflexivity.\n\t\tSCase \"n \u003d S n\u0027\".\n\t\t\tsimpl.\n\t\t\trewrite -\u003e IHs.\n\t\t\treflexivity.\n\t\t\tQed.\n\nInductive natoption : Type :\u003d\n\t| Some : nat -\u003e natoption\n\t| None : natoption.\n\nFixpoint index (n:nat) (l:natlist) : natoption :\u003d\n\tmatch l with\n\t\t| nil \u003d\u003e None\n\t\t| a :: l\u0027 \u003d\u003e if beq_nat n O then Some a else index (pred n) l\u0027\n end.\n\nDefinition option_elim (o : natoption) (d : nat) : nat :\u003d\n\tmatch o with\n\t\t| Some n\u0027 \u003d\u003e n\u0027\n\t\t| None \u003d\u003e d\n\tend.\n\nDefinition hd_opt (l : natlist) : natoption :\u003d\n\tmatch l with\n\t\t| nil \u003d\u003e None\n\t\t| v :: r \u003d\u003e Some v\n\tend.\n\nExample test_hd_opt1 : hd_opt [] \u003d None.\nProof. reflexivity. Qed.\nExample test_hd_opt2 : hd_opt [S O] \u003d Some (S O).\nProof. reflexivity. Qed.\n\nTheorem option_elim_hd : forall l:natlist,\n\thead l \u003d option_elim (hd_opt l) O.\nProof.\n\tintros l.\n\tdestruct l.\n\treflexivity.\n\treflexivity.\n\tQed.\n\nFixpoint beq_natlist (l1 l2 : natlist) : bool :\u003d\n\tmatch l1 with\n\t\t| nil \u003d\u003e match l2 with\n\t\t\t\t\t\t\t| nil \u003d\u003e true\n\t\t\t\t\t\t\t| _ \u003d\u003e false\n\t\t\t\t\t\t end\n\t\t| v1 :: r1 \u003d\u003e match l2 with\n\t\t\t\t\t\t\t\t\t | nil \u003d\u003e false\n\t\t\t\t\t\t\t\t\t | v2 :: r2 \u003d\u003e if beq_nat v1 v2 then beq_natlist r1 r2\n\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t else false\n\t\t\t\t\t\t\t\t\tend\n\tend.\n\nExample test_beq_natlist1 : (beq_natlist nil nil \u003d true).\nProof. reflexivity. Qed.\nExample test_beq_natlist2 : (beq_natlist [S O, S (S O), S (S (S O))]\n\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t [S O, S (S O), S (S (S O))] \u003d true).\nProof. reflexivity. Qed.\n\nTheorem beq_natlist_refl : forall l:natlist,\n\tbeq_natlist l l \u003d true.\nProof.\n\tintros l.\n\tinduction l.\n\tCase \"l \u003d nil\".\n\t\treflexivity.\n\tCase \"l \u003d cons\".\n\t\tsimpl.\n\t\trewrite \u003c- beq_nat_refl.\n\t\trewrite -\u003e IHl.\n\t\treflexivity.\n\tQed.\n\nTheorem silly1 : forall (n m o p : nat),\n\tn \u003d m -\u003e [n, o] \u003d [n, p] -\u003e [n, o] \u003d [m, p].\nProof.\n\tintros n m o p eq1 eq2.\n\trewrite \u003c- eq1.\n\tapply eq2. Qed.\n\nTheorem silly2a : forall (n m : nat),\n\t(n,n) \u003d (m,m) -\u003e\n\t\t(forall (q r : nat), (q, q) \u003d (r, r) -\u003e [q] \u003d [r]) -\u003e\n\t\t\t[n] \u003d [m].\nProof.\n\tintros n m eq1 eq2.\n\tapply eq2.\n\tapply eq1.\n\tQed.\n\nTheorem silly_ex :\n\t(forall n, evenb n \u003d true -\u003e oddb (S n) \u003d true) -\u003e\n\tevenb (S (S (S O))) \u003d true -\u003e\n\toddb (S (S (S (S O)))) \u003d true.\nProof.\n\tintros eq1 eq2.\n\tapply eq1.\n\tapply eq2.\n\tQed.\n\nTheorem silly3 : forall (n : nat),\n\ttrue \u003d beq_nat n (S (S (S (S (S O))))) -\u003e\n\tbeq_nat (S (S n)) (S (S (S (S (S (S (S O))))))) \u003d true.\nProof.\n\tintros n H.\n\tsymmetry.\n\tapply H.\n\tQed.\n\nTheorem rev_exercise : forall (l l\u0027 : natlist),\n\tl \u003d rev l\u0027 -\u003e l\u0027 \u003d rev l.\nProof.\n\tintros l l\u0027 H.\n\trewrite -\u003e H.\n\trewrite -\u003e rev_involutive.\n\treflexivity.\n\tQed.\n\nTheorem beq_nat_sym : forall (n m:nat), forall (b: bool),\n\tbeq_nat n m \u003d b -\u003e beq_nat m n \u003d b.\nProof.\n\tintros n.\n\tinduction n as [| n\u0027].\n\tCase \"n \u003d O\".\n\t\tintros m b eq1.\n\t\tinduction m.\n\t\tSCase \"m \u003d 0\".\n\t\t\tapply eq1.\n\t\tSCase \"m \u003d S m\u0027\".\n\t\t\tapply eq1.\n\tCase \"n \u003d S n\u0027\".\n\t\tinduction m.\n\t\tSCase \"m \u003d 0\".\n\t\t\tintros b eq1.\n\t\t\tapply eq1.\n\t\tSCase \"m \u003d S m\u0027\".\n\t\t\tintros b eq1.\n\t\t\tapply IHn\u0027.\n\t\t\tapply eq1.\n\t\tQed.\n\nTheorem app_ass\u0027 : forall l1 l2 l3 : natlist,\n\t(l1 ++ l2) ++ l3 \u003d l1 ++ (l2 ++ l3).\nProof.\n\tintros l1. induction l1 as [ | n l1\u0027].\n\treflexivity.\n\tsimpl.\n\tintros l2 l3.\n\trewrite -\u003e IHl1\u0027.\n\treflexivity.\n\tQed.\n\nEnd NatList.\n", + "license": "mit" +}, { + "repo_name": "pchaigno/linguist", + "path": "samples/Verilog/ps2_mouse.v", "copies": "91", - "size": "217", - "content": "-- VHDL example file\n\nlibrary ieee;\nuse ieee.std_logic_1164.all;\n\nentity inverter is\n\tport(a : in std_logic;\n\t b : out std_logic);\nend entity;\n\narchitecture rtl of inverter is\nbegin\n\tb \u003c\u003d not a;\nend architecture;\n", + "size": "7180", + "content": "/*\n * PS2 Mouse Interface\n * Copyright (C) 2010 Donna Polehn \u003cdpolehn@verizon.net\u003e\n *\n * This file is part of the Zet processor. This processor is free\n * hardware; you can redistribute it and/or modify it under the terms of\n * the GNU General Public License as published by the Free Software\n * Foundation; either version 3, or (at your option) any later version.\n *\n * Zet is distrubuted in the hope that it will be useful, but WITHOUT\n * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\n * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public\n * License for more details.\n *\n * You should have received a copy of the GNU General Public License\n * along with Zet; see the file COPYING. If not, see\n * \u003chttp://www.gnu.org/licenses/\u003e.\n */\n\nmodule ps2_mouse (\n input clk, // Clock Input\n input reset, // Reset Input\n inout ps2_clk, // PS2 Clock, Bidirectional\n inout ps2_dat, // PS2 Data, Bidirectional\n\n input [7:0] the_command, // Command to send to mouse\n input send_command, // Signal to send\n output command_was_sent, // Signal command finished sending\n output error_communication_timed_out,\n\n output [7:0] received_data, // Received data\n output received_data_en, // If 1 - new data has been received\n output start_receiving_data,\n output wait_for_incoming_data\n );\n\n // --------------------------------------------------------------------\n // Internal wires and registers Declarations\n // --------------------------------------------------------------------\n wire ps2_clk_posedge; // Internal Wires\n wire ps2_clk_negedge;\n\n reg [7:0] idle_counter; // Internal Registers\n reg ps2_clk_reg;\n reg ps2_data_reg;\n reg last_ps2_clk;\n\n reg [2:0] ns_ps2_transceiver; // State Machine Registers\n reg [2:0] s_ps2_transceiver;\n\n // --------------------------------------------------------------------\n // Constant Declarations\n // --------------------------------------------------------------------\n localparam PS2_STATE_0_IDLE \u003d 3\u0027h0, // states\n PS2_STATE_1_DATA_IN \u003d 3\u0027h1,\n PS2_STATE_2_COMMAND_OUT \u003d 3\u0027h2,\n PS2_STATE_3_END_TRANSFER \u003d 3\u0027h3,\n PS2_STATE_4_END_DELAYED \u003d 3\u0027h4;\n\n // --------------------------------------------------------------------\n // Finite State Machine(s)\n // --------------------------------------------------------------------\n always @(posedge clk) begin\n if(reset \u003d\u003d 1\u0027b1) s_ps2_transceiver \u003c\u003d PS2_STATE_0_IDLE;\n else s_ps2_transceiver \u003c\u003d ns_ps2_transceiver;\n end\n\n always @(*) begin\n ns_ps2_transceiver \u003d PS2_STATE_0_IDLE; // Defaults\n\n case (s_ps2_transceiver)\n PS2_STATE_0_IDLE:\n begin\n if((idle_counter \u003d\u003d 8\u0027hFF) \u0026\u0026 (send_command \u003d\u003d 1\u0027b1))\n ns_ps2_transceiver \u003d PS2_STATE_2_COMMAND_OUT;\n else if ((ps2_data_reg \u003d\u003d 1\u0027b0) \u0026\u0026 (ps2_clk_posedge \u003d\u003d 1\u0027b1))\n ns_ps2_transceiver \u003d PS2_STATE_1_DATA_IN;\n else ns_ps2_transceiver \u003d PS2_STATE_0_IDLE;\n end\n PS2_STATE_1_DATA_IN:\n begin\n // if((received_data_en \u003d\u003d 1\u0027b1) \u0026\u0026 (ps2_clk_posedge \u003d\u003d 1\u0027b1))\n if((received_data_en \u003d\u003d 1\u0027b1)) ns_ps2_transceiver \u003d PS2_STATE_0_IDLE;\n else ns_ps2_transceiver \u003d PS2_STATE_1_DATA_IN;\n end\n PS2_STATE_2_COMMAND_OUT:\n begin\n if((command_was_sent \u003d\u003d 1\u0027b1) || (error_communication_timed_out \u003d\u003d 1\u0027b1))\n ns_ps2_transceiver \u003d PS2_STATE_3_END_TRANSFER;\n else ns_ps2_transceiver \u003d PS2_STATE_2_COMMAND_OUT;\n end\n PS2_STATE_3_END_TRANSFER:\n begin\n if(send_command \u003d\u003d 1\u0027b0) ns_ps2_transceiver \u003d PS2_STATE_0_IDLE;\n else if((ps2_data_reg \u003d\u003d 1\u0027b0) \u0026\u0026 (ps2_clk_posedge \u003d\u003d 1\u0027b1))\n ns_ps2_transceiver \u003d PS2_STATE_4_END_DELAYED;\n else ns_ps2_transceiver \u003d PS2_STATE_3_END_TRANSFER;\n end\n PS2_STATE_4_END_DELAYED:\n begin\n if(received_data_en \u003d\u003d 1\u0027b1) begin\n if(send_command \u003d\u003d 1\u0027b0) ns_ps2_transceiver \u003d PS2_STATE_0_IDLE;\n else ns_ps2_transceiver \u003d PS2_STATE_3_END_TRANSFER;\n end\n else ns_ps2_transceiver \u003d PS2_STATE_4_END_DELAYED;\n end\n\n default:\n ns_ps2_transceiver \u003d PS2_STATE_0_IDLE;\n endcase\n end\n\n // --------------------------------------------------------------------\n // Sequential logic\n // --------------------------------------------------------------------\n always @(posedge clk) begin\n if(reset \u003d\u003d 1\u0027b1) begin\n last_ps2_clk \u003c\u003d 1\u0027b1;\n ps2_clk_reg \u003c\u003d 1\u0027b1;\n ps2_data_reg \u003c\u003d 1\u0027b1;\n end\n else begin\n last_ps2_clk \u003c\u003d ps2_clk_reg;\n ps2_clk_reg \u003c\u003d ps2_clk;\n ps2_data_reg \u003c\u003d ps2_dat;\n end\n end\n\n always @(posedge clk) begin\n if(reset \u003d\u003d 1\u0027b1) idle_counter \u003c\u003d 6\u0027h00;\n else if((s_ps2_transceiver \u003d\u003d PS2_STATE_0_IDLE) \u0026\u0026 (idle_counter !\u003d 8\u0027hFF))\n idle_counter \u003c\u003d idle_counter + 6\u0027h01;\n else if (s_ps2_transceiver !\u003d PS2_STATE_0_IDLE)\n idle_counter \u003c\u003d 6\u0027h00;\n end\n\n // --------------------------------------------------------------------\n // Combinational logic\n // --------------------------------------------------------------------\n assign ps2_clk_posedge \u003d ((ps2_clk_reg \u003d\u003d 1\u0027b1) \u0026\u0026 (last_ps2_clk \u003d\u003d 1\u0027b0)) ? 1\u0027b1 : 1\u0027b0;\n assign ps2_clk_negedge \u003d ((ps2_clk_reg \u003d\u003d 1\u0027b0) \u0026\u0026 (last_ps2_clk \u003d\u003d 1\u0027b1)) ? 1\u0027b1 : 1\u0027b0;\n\n assign start_receiving_data \u003d (s_ps2_transceiver \u003d\u003d PS2_STATE_1_DATA_IN);\n assign wait_for_incoming_data \u003d (s_ps2_transceiver \u003d\u003d PS2_STATE_3_END_TRANSFER);\n\n // --------------------------------------------------------------------\n // Internal Modules\n // --------------------------------------------------------------------\n ps2_mouse_cmdout mouse_cmdout (\n .clk (clk), // Inputs\n .reset (reset),\n .the_command (the_command),\n .send_command (send_command),\n .ps2_clk_posedge (ps2_clk_posedge),\n .ps2_clk_negedge (ps2_clk_negedge),\n .ps2_clk (ps2_clk), // Bidirectionals\n .ps2_dat (ps2_dat),\n .command_was_sent (command_was_sent), // Outputs\n .error_communication_timed_out (error_communication_timed_out)\n );\n\n ps2_mouse_datain mouse_datain (\n .clk (clk), // Inputs\n .reset (reset),\n .wait_for_incoming_data (wait_for_incoming_data),\n .start_receiving_data (start_receiving_data),\n .ps2_clk_posedge (ps2_clk_posedge),\n .ps2_clk_negedge (ps2_clk_negedge),\n .ps2_data (ps2_data_reg),\n .received_data (received_data), // Outputs\n .received_data_en (received_data_en)\n );\n\nendmodule\n\n", "license": "mit" -} +}, { + "repo_name": "pchaigno/linguist", + "path": "samples/Verilog/mux.v", + "copies": "90", + "size": "1180", + "content": "`timescale 1ns / 1ps\n// Copyright (C) 2008 Schuyler Eldridge, Boston University\n//\n// This program is free software: you can redistribute it and/or modify\n// it under the terms of the GNU General Public License as published by\n// the Free Software Foundation, either version 3 of the License.\n//\n// This program is distributed in the hope that it will be useful,\n// but WITHOUT ANY WARRANTY; without even the implied warranty of\n// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n// GNU General Public License for more details.\n//\n// You should have received a copy of the GNU General Public License\n// along with this program. If not, see \u003chttp://www.gnu.org/licenses/\u003e.\nmodule mux(opA,opB,sum,dsp_sel,out);\n\tinput [3:0] opA,opB;\n\tinput [4:0] sum;\n\tinput [1:0] dsp_sel;\n\toutput [3:0] out;\n\t\n\treg cout;\n\t\n\talways @ (sum)\n\t\tbegin\n\t\t\tif (sum[4] \u003d\u003d 1)\n\t\t\t\tcout \u003c\u003d 4\u0027b0001;\n\t\t\telse\n\t\t\t\tcout \u003c\u003d 4\u0027b0000;\n\t\tend\n\t\n\treg out;\n\t\n\talways @(dsp_sel,sum,cout,opB,opA)\n\t\tbegin\n\t\t\tif (dsp_sel \u003d\u003d 2\u0027b00)\n\t\t\t\tout \u003c\u003d sum[3:0];\n\t\t\telse if (dsp_sel \u003d\u003d 2\u0027b01)\n\t\t\t\tout \u003c\u003d cout;\n\t\t\telse if (dsp_sel \u003d\u003d 2\u0027b10)\n\t\t\t\tout \u003c\u003d opB;\n\t\t\telse if (dsp_sel \u003d\u003d 2\u0027b11)\n\t\t\t\tout \u003c\u003d opA;\n\t\tend\n\nendmodule\n", + "license": "mit" +}, { + "repo_name": "wcandillon/linguist", + "path": "samples/Verilog/t_div_pipelined.v", + "copies": "89", + "size": "1988", + "content": "////////////////////////////////////////////////////////////////////////////////\r\n// Original Author: Schuyler Eldridge\r\n// Contact Point: Schuyler Eldridge (schuyler.eldridge@gmail.com)\r\n// div_pipelined.v\r\n// Created: 4.3.2012\r\n// Modified: 4.5.2012\r\n//\r\n// Testbench for div_pipelined.v\r\n//\r\n// Copyright (C) 2012 Schuyler Eldridge, Boston University\r\n//\r\n// This program is free software: you can redistribute it and/or modify\r\n// it under the terms of the GNU General Public License as published by\r\n// the Free Software Foundation, either version 3 of the License.\r\n//\r\n// This program is distributed in the hope that it will be useful,\r\n// but WITHOUT ANY WARRANTY; without even the implied warranty of\r\n// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r\n// GNU General Public License for more details.\r\n//\r\n// You should have received a copy of the GNU General Public License\r\n// along with this program. If not, see \u003chttp://www.gnu.org/licenses/\u003e.\r\n////////////////////////////////////////////////////////////////////////////////\r\n`timescale 1ns / 1ps\r\nmodule t_div_pipelined();\r\n\r\n reg clk, start, reset_n;\r\n reg [7:0] dividend, divisor;\r\n wire data_valid, div_by_zero;\r\n wire [7:0] quotient, quotient_correct;\r\n\r\n parameter\r\n BITS \u003d 8;\r\n\r\n div_pipelined\r\n #(\r\n .BITS(BITS)\r\n )\r\n div_pipelined\r\n (\r\n .clk(clk),\r\n .reset_n(reset_n),\r\n .dividend(dividend),\r\n .divisor(divisor),\r\n .quotient(quotient),\r\n .div_by_zero(div_by_zero),\r\n // .quotient_correct(quotient_correct),\r\n .start(start),\r\n .data_valid(data_valid)\r\n );\r\n\r\n initial begin\r\n #10 reset_n \u003d 0;\r\n #50 reset_n \u003d 1;\r\n #1\r\n clk \u003d 0;\r\n dividend \u003d -1;\r\n divisor \u003d 127;\r\n #1000 $finish;\r\n end\r\n\r\n// always\r\n// #20 dividend \u003d dividend + 1;\r\n\r\n always begin\r\n #10 divisor \u003d divisor - 1; start \u003d 1;\r\n #10 start \u003d 0;\r\n end\r\n\r\n always\r\n #5 clk \u003d ~clk;\r\n\r\n \r\nendmodule\r\n ", + "license": "mit" +}, { + "repo_name": "aldatsa/ng-cordova", + "path": "demo/www/lib/ace-builds/demo/kitchen-sink/docs/verilog.v", + "copies": "479", + "size": "274", + "content": "always @(negedge reset or posedge clk) begin\n if (reset \u003d\u003d 0) begin\n d_out \u003c\u003d 16\u0027h0000;\n d_out_mem[resetcount] \u003c\u003d d_out;\n laststoredvalue \u003c\u003d d_out;\n end else begin\n d_out \u003c\u003d d_out + 1\u0027b1; \n end\nend\n\nalways @(bufreadaddr)\n bufreadval \u003d d_out_mem[bufreadaddr];", + "license": "mit" +}, { + "repo_name": "opendesignflow/indesign", + "path": "indesign-wwwui/src/main/resources/modules/wwwui/external/ace/1.2.6/demo/kitchen-sink/docs/verilog.v", + "copies": "479", + "size": "274", + "content": "always @(negedge reset or posedge clk) begin\n if (reset \u003d\u003d 0) begin\n d_out \u003c\u003d 16\u0027h0000;\n d_out_mem[resetcount] \u003c\u003d d_out;\n laststoredvalue \u003c\u003d d_out;\n end else begin\n d_out \u003c\u003d d_out + 1\u0027b1; \n end\nend\n\nalways @(bufreadaddr)\n bufreadval \u003d d_out_mem[bufreadaddr];", + "license": "gpl-3.0" +}, { + "repo_name": "sanjeevtripurari/hue", + "path": "tools/ace-editor/demo/kitchen-sink/docs/verilog.v", + "copies": "479", + "size": "274", + "content": "always @(negedge reset or posedge clk) begin\n if (reset \u003d\u003d 0) begin\n d_out \u003c\u003d 16\u0027h0000;\n d_out_mem[resetcount] \u003c\u003d d_out;\n laststoredvalue \u003c\u003d d_out;\n end else begin\n d_out \u003c\u003d d_out + 1\u0027b1; \n end\nend\n\nalways @(bufreadaddr)\n bufreadval \u003d d_out_mem[bufreadaddr];", + "license": "apache-2.0" +}, { + "repo_name": "wcandillon/linguist", + "path": "samples/Verilog/pipeline_registers.v", + "copies": "89", + "size": "3369", + "content": "////////////////////////////////////////////////////////////////////////////////\r\n// Original Author: Schuyler Eldridge\r\n// Contact Point: Schuyler Eldridge (schuyler.eldridge@gmail.com)\r\n// pipeline_registers.v\r\n// Created: 4.4.2012\r\n// Modified: 4.4.2012\r\n//\r\n// Implements a series of pipeline registers specified by the input\r\n// parameters BIT_WIDTH and NUMBER_OF_STAGES. BIT_WIDTH determines the\r\n// size of the signal passed through each of the pipeline\r\n// registers. NUMBER_OF_STAGES is the number of pipeline registers\r\n// generated. This accepts values of 0 (yes, it just passes data from\r\n// input to output...) up to however many stages specified.\r\n// Copyright (C) 2012 Schuyler Eldridge, Boston University\r\n//\r\n// This program is free software: you can redistribute it and/or modify\r\n// it under the terms of the GNU General Public License as published by\r\n// the Free Software Foundation, either version 3 of the License.\r\n//\r\n// This program is distributed in the hope that it will be useful,\r\n// but WITHOUT ANY WARRANTY; without even the implied warranty of\r\n// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r\n// GNU General Public License for more details.\r\n//\r\n// You should have received a copy of the GNU General Public License\r\n// along with this program. If not, see \u003chttp://www.gnu.org/licenses/\u003e.\r\n////////////////////////////////////////////////////////////////////////////////\r\n`timescale 1ns / 1ps\r\nmodule pipeline_registers\r\n (\r\n input clk,\r\n input reset_n,\r\n input [BIT_WIDTH-1:0] pipe_in,\r\n output reg [BIT_WIDTH-1:0] pipe_out\r\n );\r\n\r\n // WARNING!!! THESE PARAMETERS ARE INTENDED TO BE MODIFIED IN A TOP\r\n // LEVEL MODULE. LOCAL CHANGES HERE WILL, MOST LIKELY, BE\r\n // OVERWRITTEN!\r\n parameter \r\n BIT_WIDTH \u003d 10,\r\n NUMBER_OF_STAGES \u003d 5;\r\n\r\n // Main generate function for conditional hardware instantiation\r\n generate\r\n genvar i;\r\n // Pass-through case for the odd event that no pipeline stages are\r\n // specified.\r\n if (NUMBER_OF_STAGES \u003d\u003d 0) begin\r\n always @ *\r\n pipe_out \u003d pipe_in;\r\n end\r\n // Single flop case for a single stage pipeline\r\n else if (NUMBER_OF_STAGES \u003d\u003d 1) begin\r\n always @ (posedge clk or negedge reset_n)\r\n pipe_out \u003c\u003d (!reset_n) ? 0 : pipe_in;\r\n end\r\n // Case for 2 or more pipeline stages\r\n else begin\r\n // Create the necessary regs\r\n reg [BIT_WIDTH*(NUMBER_OF_STAGES-1)-1:0] pipe_gen;\r\n // Create logic for the initial and final pipeline registers\r\n always @ (posedge clk or negedge reset_n) begin\r\n if (!reset_n) begin\r\n pipe_gen[BIT_WIDTH-1:0] \u003c\u003d 0;\r\n pipe_out \u003c\u003d 0;\r\n end\r\n else begin\r\n pipe_gen[BIT_WIDTH-1:0] \u003c\u003d pipe_in;\r\n pipe_out \u003c\u003d pipe_gen[BIT_WIDTH*(NUMBER_OF_STAGES-1)-1:BIT_WIDTH*(NUMBER_OF_STAGES-2)];\r\n end\r\n end\r\n // Create the intermediate pipeline registers if there are 3 or\r\n // more pipeline stages\r\n for (i \u003d 1; i \u003c NUMBER_OF_STAGES-1; i \u003d i + 1) begin : pipeline\r\n always @ (posedge clk or negedge reset_n)\r\n pipe_gen[BIT_WIDTH*(i+1)-1:BIT_WIDTH*i] \u003c\u003d (!reset_n) ? 0 : pipe_gen[BIT_WIDTH*i-1:BIT_WIDTH*(i-1)];\r\n end\r\n end\r\n endgenerate\r\n \r\nendmodule\r\n", + "license": "mit" +}, { + "repo_name": "wcandillon/linguist", + "path": "samples/Verilog/hex_display.v", + "copies": "93", + "size": "1286", + "content": "/*\n * Copyright (c) 2009 Zeus Gomez Marmolejo \u003czeus@opencores.org\u003e\n *\n * This file is part of the Zet processor. This processor is free\n * hardware; you can redistribute it and/or modify it under the terms of\n * the GNU General Public License as published by the Free Software\n * Foundation; either version 3, or (at your option) any later version.\n *\n * Zet is distrubuted in the hope that it will be useful, but WITHOUT\n * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\n * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public\n * License for more details.\n *\n * You should have received a copy of the GNU General Public License\n * along with Zet; see the file COPYING. If not, see\n * \u003chttp://www.gnu.org/licenses/\u003e.\n */\n\nmodule hex_display (\n input [15:0] num,\n input en,\n\n output [6:0] hex0,\n output [6:0] hex1,\n output [6:0] hex2,\n output [6:0] hex3\n );\n\n // Module instantiations\n seg_7 hex_group0 (\n .num (num[3:0]),\n .en (en),\n .seg (hex0)\n );\n\n seg_7 hex_group1 (\n .num (num[7:4]),\n .en (en),\n .seg (hex1)\n );\n\n seg_7 hex_group2 (\n .num (num[11:8]),\n .en (en),\n .seg (hex2)\n );\n\n seg_7 hex_group3 (\n .num (num[15:12]),\n .en (en),\n .seg (hex3)\n );\n\nendmodule\n", + "license": "mit" +}, { + "repo_name": "SymbiFlow/prjxray-experiments-archive-2017", + "path": "nodes_wires_list/top.v", + "copies": "19", + "size": "57", + "content": "module top (input i, output o);\n\tassign o \u003d i;\nendmodule\n", + "license": "isc" +}, { + "repo_name": "psteckler/coq-8.4-timings", + "path": "test-suite/bugs/closed/1787.v", + "copies": "42", + "size": "264", + "content": "Parameter P : nat -\u003e nat -\u003e Prop.\nParameter Q : nat -\u003e nat -\u003e Prop.\nAxiom A : forall x x\u0027 x\u0027\u0027, P x x\u0027 -\u003e Q x\u0027\u0027 x\u0027 -\u003e P x x\u0027\u0027.\n\nGoal (P 1 3) -\u003e (Q 1 3) -\u003e (P 1 1).\nintros H H\u0027.\nrefine ((fun H1 : P 1 _ \u003d\u003e let H2 :\u003d (_:Q 1 _) in A _ _ _ H1 H2) _).\nclear.\nAdmitted.\n\n\n", + "license": "lgpl-2.1" +}, { + "repo_name": "psteckler/coq-8.4-timings", + "path": "test-suite/success/ImplicitTactic.v", + "copies": "42", + "size": "549", + "content": "(* A Wiedijk-Cruz-Filipe style tactic for solving implicit arguments *)\n\n(* Declare a term expression with a hole *)\nParameter quo : nat -\u003e forall n:nat, n\u003c\u003e0 -\u003e nat.\nNotation \"x / y\" :\u003d (quo x y _) : nat_scope.\n\n(* Declare the tactic for resolving implicit arguments still\n unresolved after type-checking; it must complete the subgoal to\n succeed *)\nDeclare Implicit Tactic assumption.\n\nGoal forall n d, d\u003c\u003e0 -\u003e { q:nat \u0026 { r:nat | d * q + r \u003d n }}.\nintros.\n(* Here, assumption is used to solve the implicit argument of quo *)\nexists (n / d).\n\n", + "license": "lgpl-2.1" +}, { + "repo_name": "aspiwack/coq", + "path": "test-suite/bugs/closed/2734.v", + "copies": "28", + "size": "344", + "content": "Require Import Arith List.\nRequire Import OrderedTypeEx.\n\nModule Adr.\n Include Nat_as_OT.\n Definition nat2t (i: nat) : t :\u003d i.\nEnd Adr.\n\nInductive expr :\u003d Const: Adr.t -\u003e expr.\n\nInductive control :\u003d Go: expr -\u003e control.\n\nDefinition program :\u003d (Adr.t * (control))%type.\n\nFail Definition myprog : program :\u003d (Adr.nat2t 0, Go (Adr.nat2t 0) ).", + "license": "lgpl-2.1" +}, { + "repo_name": "aspiwack/coq", + "path": "test-suite/bugs/closed/3282.v", + "copies": "27", + "size": "257", + "content": "(* Check let-ins in fix and Fixpoint *)\n\nDefinition foo :\u003d fix f (m : nat) (o :\u003d true) (n : nat) {struct n} :\u003d\n match n with 0 \u003d\u003e 0 | S n\u0027 \u003d\u003e f 0 n\u0027 end.\n\nFixpoint f (m : nat) (o :\u003d true) (n : nat) {struct n} :\u003d\n match n with 0 \u003d\u003e 0 | S n\u0027 \u003d\u003e f 0 n\u0027 end.\n", + "license": "lgpl-2.1" +}, { + "repo_name": "aspiwack/coq", + "path": "theories/Vectors/VectorEq.v", + "copies": "27", + "size": "2449", + "content": "(************************************************************************)\n(* v * The Coq Proof Assistant / The Coq Development Team *)\n(* \u003cO___,, * CNRS-Ecole Polytechnique-INRIA Futurs-Universite Paris Sud *)\n(* \\VV/ **************************************************************)\n(* // * This file is distributed under the terms of the *)\n(* * GNU Lesser General Public License Version 2.1 *)\n(************************************************************************)\n\n(** Equalities and Vector relations\n\n Author: Pierre Boutillier\n Institution: PPS, INRIA 07/2012\n*)\n\nRequire Import VectorDef.\nRequire Import VectorSpec.\nImport VectorNotations.\n\nSection BEQ.\n\n Variables (A: Type) (A_beq: A -\u003e A -\u003e bool).\n Hypothesis A_eqb_eq: forall x y, A_beq x y \u003d true \u003c-\u003e x \u003d y.\n\n Definition eqb:\n forall {m n} (v1: t A m) (v2: t A n), bool :\u003d\n fix fix_beq {m n} v1 v2 :\u003d\n match v1, v2 with\n |[], [] \u003d\u003e true\n |_ :: _, [] |[], _ :: _ \u003d\u003e false\n |h1 :: t1, h2 :: t2 \u003d\u003e A_beq h1 h2 \u0026\u0026 fix_beq t1 t2\n end%bool.\n\n Lemma eqb_nat_eq: forall m n (v1: t A m) (v2: t A n)\n (Hbeq: eqb v1 v2 \u003d true), m \u003d n.\n Proof.\n intros m n v1; revert n.\n induction v1; destruct v2;\n [now constructor | discriminate | discriminate | simpl].\n intros Hbeq; apply andb_prop in Hbeq; destruct Hbeq.\n f_equal; eauto.\n Qed.\n\n Lemma eqb_eq: forall n (v1: t A n) (v2: t A n),\n eqb v1 v2 \u003d true \u003c-\u003e v1 \u003d v2.\n Proof.\n refine (@rect2 _ _ _ _ _); [now constructor | simpl].\n intros ? ? ? Hrec h1 h2; destruct Hrec; destruct (A_eqb_eq h1 h2); split.\n + intros Hbeq. apply andb_prop in Hbeq; destruct Hbeq.\n f_equal; now auto.\n + intros Heq. destruct (cons_inj Heq). apply andb_true_intro.\n split; now auto.\n Qed.\n\n Definition eq_dec n (v1 v2: t A n): {v1 \u003d v2} + {v1 \u003c\u003e v2}.\n Proof.\n case_eq (eqb v1 v2); intros.\n + left; now apply eqb_eq.\n + right. intros Heq. apply \u003c- eqb_eq in Heq. congruence.\n Defined.\n\nEnd BEQ.\n\nSection CAST.\n\n Definition cast: forall {A m} (v: t A m) {n}, m \u003d n -\u003e t A n.\n Proof.\n refine (fix cast {A m} (v: t A m) {struct v} :\u003d\n match v in t _ m\u0027 return forall n, m\u0027 \u003d n -\u003e t A n with\n |[] \u003d\u003e fun n \u003d\u003e match n with\n | 0 \u003d\u003e fun _ \u003d\u003e []\n | S _ \u003d\u003e fun H \u003d\u003e False_rect _ _\n end\n |h :: w \u003d\u003e fun n \u003d\u003e match n with\n | 0 \u003d\u003e fun H \u003d\u003e False_rect _ _\n | S n\u0027 \u003d\u003e fun H \u003d\u003e h :: (cast w n\u0027 (f_equal pred H))\n end\n end); discriminate.\n Defined.\n\nEnd CAST.\n", + "license": "lgpl-2.1" +}] ``` ### Data Fields @@ -86,4 +240,4 @@ The dataset contains a train split only ### v1.0 - Initial release of dataset -- The query was executed on 21.07.2023, 00:02:38 UTC+2 +- The query was executed on 24.07.2023, 11:49:51 UTC+2