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#include <ATen/ATen.h> |
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#include <ATen/cuda/CUDAContext.h> |
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#include <THC/THC.h> |
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#include <THC/THCDeviceUtils.cuh> |
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#include <vector> |
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#include <iostream> |
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int const threadsPerBlock = sizeof(unsigned long long) * 8; |
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__device__ inline float devIoU(float const * const a, float const * const b) { |
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float left = max(a[0], b[0]), right = min(a[2], b[2]); |
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float top = max(a[1], b[1]), bottom = min(a[3], b[3]); |
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float width = max(right - left + 1, 0.f), height = max(bottom - top + 1, 0.f); |
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float interS = width * height; |
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float Sa = (a[2] - a[0] + 1) * (a[3] - a[1] + 1); |
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float Sb = (b[2] - b[0] + 1) * (b[3] - b[1] + 1); |
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return interS / (Sa + Sb - interS); |
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} |
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__global__ void nms_kernel(const int n_boxes, const float nms_overlap_thresh, |
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const float *dev_boxes, unsigned long long *dev_mask) { |
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const int row_start = blockIdx.y; |
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const int col_start = blockIdx.x; |
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const int row_size = |
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min(n_boxes - row_start * threadsPerBlock, threadsPerBlock); |
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const int col_size = |
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min(n_boxes - col_start * threadsPerBlock, threadsPerBlock); |
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__shared__ float block_boxes[threadsPerBlock * 5]; |
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if (threadIdx.x < col_size) { |
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block_boxes[threadIdx.x * 5 + 0] = |
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dev_boxes[(threadsPerBlock * col_start + threadIdx.x) * 5 + 0]; |
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block_boxes[threadIdx.x * 5 + 1] = |
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dev_boxes[(threadsPerBlock * col_start + threadIdx.x) * 5 + 1]; |
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block_boxes[threadIdx.x * 5 + 2] = |
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dev_boxes[(threadsPerBlock * col_start + threadIdx.x) * 5 + 2]; |
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block_boxes[threadIdx.x * 5 + 3] = |
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dev_boxes[(threadsPerBlock * col_start + threadIdx.x) * 5 + 3]; |
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block_boxes[threadIdx.x * 5 + 4] = |
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dev_boxes[(threadsPerBlock * col_start + threadIdx.x) * 5 + 4]; |
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} |
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__syncthreads(); |
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if (threadIdx.x < row_size) { |
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const int cur_box_idx = threadsPerBlock * row_start + threadIdx.x; |
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const float *cur_box = dev_boxes + cur_box_idx * 5; |
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int i = 0; |
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unsigned long long t = 0; |
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int start = 0; |
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if (row_start == col_start) { |
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start = threadIdx.x + 1; |
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} |
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for (i = start; i < col_size; i++) { |
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if (devIoU(cur_box, block_boxes + i * 5) > nms_overlap_thresh) { |
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t |= 1ULL << i; |
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} |
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} |
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const int col_blocks = THCCeilDiv(n_boxes, threadsPerBlock); |
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dev_mask[cur_box_idx * col_blocks + col_start] = t; |
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} |
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} |
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at::Tensor nms_cuda(const at::Tensor boxes, float nms_overlap_thresh) { |
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using scalar_t = float; |
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AT_ASSERTM(boxes.device().is_cuda(), "boxes must be a CUDA tensor"); |
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auto scores = boxes.select(1, 4); |
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auto order_t = std::get<1>(scores.sort(0, true)); |
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auto boxes_sorted = boxes.index_select(0, order_t); |
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int boxes_num = boxes.size(0); |
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const int col_blocks = THCCeilDiv(boxes_num, threadsPerBlock); |
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scalar_t* boxes_dev = boxes_sorted.data_ptr<scalar_t>(); |
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THCState *state = at::globalContext().lazyInitCUDA(); |
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unsigned long long* mask_dev = NULL; |
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mask_dev = (unsigned long long*) THCudaMalloc(state, boxes_num * col_blocks * sizeof(unsigned long long)); |
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dim3 blocks(THCCeilDiv(boxes_num, threadsPerBlock), |
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THCCeilDiv(boxes_num, threadsPerBlock)); |
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dim3 threads(threadsPerBlock); |
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nms_kernel<<<blocks, threads>>>(boxes_num, |
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nms_overlap_thresh, |
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boxes_dev, |
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mask_dev); |
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std::vector<unsigned long long> mask_host(boxes_num * col_blocks); |
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THCudaCheck(cudaMemcpy(&mask_host[0], |
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mask_dev, |
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sizeof(unsigned long long) * boxes_num * col_blocks, |
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cudaMemcpyDeviceToHost)); |
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std::vector<unsigned long long> remv(col_blocks); |
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memset(&remv[0], 0, sizeof(unsigned long long) * col_blocks); |
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at::Tensor keep = at::empty({boxes_num}, boxes.options().dtype(at::kLong).device(at::kCPU)); |
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int64_t* keep_out = keep.data_ptr<int64_t>(); |
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int num_to_keep = 0; |
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for (int i = 0; i < boxes_num; i++) { |
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int nblock = i / threadsPerBlock; |
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int inblock = i % threadsPerBlock; |
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if (!(remv[nblock] & (1ULL << inblock))) { |
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keep_out[num_to_keep++] = i; |
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unsigned long long *p = &mask_host[0] + i * col_blocks; |
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for (int j = nblock; j < col_blocks; j++) { |
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remv[j] |= p[j]; |
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} |
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} |
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} |
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THCudaFree(state, mask_dev); |
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return std::get<0>(order_t.index({ |
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keep.narrow(0, 0, num_to_keep).to( |
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order_t.device(), keep.scalar_type()) |
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}).sort(0, false)); |
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} |
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