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dtcxzyw commited on
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0787b90
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1 Parent(s): 8bbdd0c
dataset.jsonl CHANGED
@@ -188,6 +188,7 @@
188
  {"bug_id": "119173", "issue_url": "https://github.com/llvm/llvm-project/issues/119173", "bug_type": "miscompilation", "base_commit": "ab77db03ce28e86a61010e51ea13796ea09efc46", "knowledge_cutoff": "2024-12-09T07:19:06Z", "lit_test_dir": ["llvm/test/Transforms/LoopVectorize"], "hints": {"fix_commit": "30f3752e54fa7cd595a434a985efbe9a7abe9b65", "components": ["LoopVectorize"], "bug_location_lineno": {"llvm/lib/Transforms/Vectorize/LoopVectorize.cpp": [[6637, 6644], [8588, 8593]]}, "bug_location_funcname": {"llvm/lib/Transforms/Vectorize/LoopVectorize.cpp": ["LoopVectorizationCostModel::getInstructionCost", "VPRecipeBuilder::tryToWiden"]}}, "patch": "commit 30f3752e54fa7cd595a434a985efbe9a7abe9b65\nAuthor: Florian Hahn <[email protected]>\nDate: Mon Feb 3 17:01:02 2025 +0000\n\n [VPlan] Only use SCEV for live-ins in tryToWiden. (#125436)\n \n Replacing a recipe with a live-in may not be correct in all cases,\n e.g. when replacing recipes involving header-phi recipes, like\n reductions.\n \n For now, only use SCEV to simplify live-ins.\n \n More powerful input simplification can be built in top of\n https://github.com/llvm/llvm-project/pull/124432 in the future.\n \n \n Fixes https://github.com/llvm/llvm-project/issues/119173.\n Fixes https://github.com/llvm/llvm-project/issues/125374.\n \n PR: https://github.com/llvm/llvm-project/pull/125436\n\ndiff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp\nindex cbb9960959f2..ce66350669d5 100644\n--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp\n+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp\n@@ -6637,8 +6637,10 @@ LoopVectorizationCostModel::getInstructionCost(Instruction *I,\n // fold away. We can generalize this for all operations using the notion\n // of neutral elements. (TODO)\n if (I->getOpcode() == Instruction::Mul &&\n- (PSE.getSCEV(I->getOperand(0))->isOne() ||\n- PSE.getSCEV(I->getOperand(1))->isOne()))\n+ ((TheLoop->isLoopInvariant(I->getOperand(0)) &&\n+ PSE.getSCEV(I->getOperand(0))->isOne()) ||\n+ (TheLoop->isLoopInvariant(I->getOperand(1)) &&\n+ PSE.getSCEV(I->getOperand(1))->isOne())))\n return 0;\n \n // Detect reduction patterns\n@@ -8588,6 +8590,8 @@ VPWidenRecipe *VPRecipeBuilder::tryToWiden(Instruction *I,\n // to replace operands with constants.\n ScalarEvolution &SE = *PSE.getSE();\n auto GetConstantViaSCEV = [this, &SE](VPValue *Op) {\n+ if (!Op->isLiveIn())\n+ return Op;\n Value *V = Op->getUnderlyingValue();\n if (isa<Constant>(V) || !SE.isSCEVable(V->getType()))\n return Op;\n", "tests": [{"file": "llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll", "commands": ["opt -p loop-vectorize -S %s"], "tests": [{"test_name": "mul_select_operand_known_1_via_scev", "test_body": "target triple = \"arm64-apple-macosx\"\n\ndefine i64 @mul_select_operand_known_1_via_scev() {\nentry:\n br label %loop\n\nloop: ; preds = %loop, %entry\n %red = phi i64 [ 12, %entry ], [ %red.next, %loop ]\n %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]\n %0 = and i32 %iv, 1\n %cmp1.i = icmp eq i32 %0, 0\n %narrow.i = select i1 %cmp1.i, i32 1, i32 %iv\n %mul = zext nneg i32 %narrow.i to i64\n %red.next = mul nsw i64 %red, %mul\n %iv.next = add nuw nsw i32 %iv, 1\n %ec = icmp eq i32 %iv, 1\n br i1 %ec, label %exit, label %loop\n\nexit: ; preds = %loop\n %res = phi i64 [ %red.next, %loop ]\n ret i64 %res\n}\n", "additional_args": "-src-unroll=4 -tgt-unroll=4"}, {"test_name": "pr125374", "test_body": "target datalayout = \"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128\"\ntarget triple = \"x86_64-unknown-linux-gnu\"\n\ndefine i32 @main() {\nentry:\n br label %for.body.i.i\n\nfor.body.i.i: ; preds = %for.body.i.i, %entry\n %indvars.iv.i.i = phi i64 [ 0, %entry ], [ %indvars.iv.next.i.i, %for.body.i.i ]\n %conv678.i.i = phi i8 [ 1, %entry ], [ %add.i.i.i, %for.body.i.i ]\n %add.i.i.i = add i8 0, %conv678.i.i\n %indvars.iv.next.i.i = add i64 %indvars.iv.i.i, 1\n %exitcond.not.i.i = icmp eq i64 %indvars.iv.i.i, 1\n br i1 %exitcond.not.i.i, label %o.exit, label %for.body.i.i\n\no.exit: ; preds = %for.body.i.i\n %conv6.i.i = zext i8 %add.i.i.i to i32\n ret i32 %conv6.i.i\n}\n", "additional_args": "-src-unroll=2 -tgt-unroll=2"}]}], "issue": {"title": "[clang] Miscompilation at -O3", "body": "This code prints 15 at -O3, but prints 5 at -O0/1/2:\n```c\nint printf(const char *, ...);\nstatic int a[] = {4294967295, 5};\nint b, c;\nint main() {\n a[1] = b = 5;\n unsigned d = -13;\n for (; d >= 8; d = a[0] + d + 6) {\n int *e = &b;\n *e = a[0] - -1 + b;\n }\n a[c];\n printf(\"%d\\n\", b);\n}\n```\n\nCompiler Explorer: https://godbolt.org/z/4xdPqcjPb\n\nBisected to https://github.com/llvm/llvm-project/commit/6d6eea92e36c301e34a7ec11b2a40e3080f79f53, which was committed by @fhahn ", "author": "cardigan1008", "labels": ["miscompilation", "vectorizers"], "comments": [{"author": "hstk30-hw", "body": "Don't ignore the warning.\n\n```\n<source>:2:19: warning: implicit conversion from 'long' to 'int' changes value from 4294967294 to -2 [-Wconstant-conversion]\n 2 | static int a[] = {4294967294, 5};\n | ~^~~~~~~~~~\n```"}, {"author": "antoniofrighetto", "body": "Please leave the issue opened, as it's implementation-defined behaviour, not undefined behaviour."}, {"author": "antoniofrighetto", "body": "Reduced to:\n```llvm\ntarget triple = \"x86_64-unknown-linux-gnu\"\n\ndefine noundef i32 @src() {\nentry:\n br label %for.body\n\nfor.body: ; preds = %entry, %for.body\n %d.06 = phi i32 [ -13, %entry ], [ %add2.reass, %for.body ]\n %add45 = phi i32 [ 5, %entry ], [ %add, %for.body ]\n %add = add i32 0, %add45\n %add2.reass = add i32 %d.06, 5\n %cmp = icmp ugt i32 %add2.reass, 7\n br i1 %cmp, label %for.body, label %for.end\n\nfor.end: ; preds = %for.body\n ret i32 %add\n}\n```\n\n@fhahn I think the issue fundamentally here lies in the fact that we are incorrectly widening the constant 5 (retrieved from SCEV) to `<5, 5, 5, 5>`, when in fact it should be `<5, 0, 0, 0>` (VPlan value: `WIDEN-REDUCTION-PHI ir<%add45> = phi ir<5>`). The VPBasicBlock for the miscompiled basic block is the following one:\n```\nvector.body:\n EMIT vp<%4> = CANONICAL-INDUCTION ir<0>, vp<%7>\n WIDEN-INDUCTION %d.06 = phi -13, %add2.reass, ir<5>, vp<%0>\n WIDEN-REDUCTION-PHI ir<%add45> = phi ir<5>\n EMIT vp<%5> = WIDEN-CANONICAL-INDUCTION vp<%4>\n EMIT vp<%6> = icmp ule vp<%5>, vp<%3>\n```\nI'm not that familiar with VPlan, though I feel like that either we are not taking into account the active lane, or we should have not emitted a widen instruction in the first place.\n\n(Godbolt: https://llvm.godbolt.org/z/4Wz46ceh1)"}, {"author": "antoniofrighetto", "body": "@fhahn Would you be willing to have a look at it? Happy to help with any additional triage, if needed."}, {"author": "fhahn", "body": "Yep let me take a look!"}]}, "verified": true}
189
  {"bug_id": "112068", "issue_url": "https://github.com/llvm/llvm-project/issues/112068", "bug_type": "miscompilation", "base_commit": "b24acc06e1d465b3e3e4e28515dd437f6a7454f2", "knowledge_cutoff": "2024-10-12T02:41:57Z", "lit_test_dir": ["llvm/test/Transforms/InstCombine"], "hints": {"fix_commit": "a59976bea8ad76f18119a11391dc8ba3e6ba07d5", "components": ["InstCombine"], "bug_location_lineno": {"llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp": [[505, 512]]}, "bug_location_funcname": {"llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp": ["foldCttzCtlz"]}}, "patch": "commit a59976bea8ad76f18119a11391dc8ba3e6ba07d5\nAuthor: Yingwei Zheng <[email protected]>\nDate: Tue Nov 19 20:06:34 2024 +0800\n\n [InstCombine] Drop noundef attributes in `foldCttzCtlz` (#116718)\n \n Closes https://github.com/llvm/llvm-project/issues/112068.\n\ndiff --git a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp\nindex 6cff3c7af91e..42c0acd1e45e 100644\n--- a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp\n+++ b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp\n@@ -505,8 +505,10 @@ static Instruction *foldCttzCtlz(IntrinsicInst &II, InstCombinerImpl &IC) {\n \n // If ctlz/cttz is only used as a shift amount, set is_zero_poison to true.\n if (II.hasOneUse() && match(Op1, m_Zero()) &&\n- match(II.user_back(), m_Shift(m_Value(), m_Specific(&II))))\n+ match(II.user_back(), m_Shift(m_Value(), m_Specific(&II)))) {\n+ II.dropUBImplyingAttrsAndMetadata();\n return IC.replaceOperand(II, 1, IC.Builder.getTrue());\n+ }\n \n Constant *C;\n \n", "tests": [{"file": "llvm/test/Transforms/InstCombine/shift-cttz-ctlz.ll", "commands": ["opt < %s -passes=instcombine -S"], "tests": [{"test_name": "shl_cttz_false_multiuse", "test_body": "define i32 @shl_cttz_false_multiuse(i32 %x, i32 %y) {\nentry:\n %cttz = call i32 @llvm.cttz.i32(i32 %y, i1 false)\n call void @use(i32 %cttz)\n %res = shl i32 %x, %cttz\n ret i32 %res\n}\n\ndeclare void @use(i32)\n\n; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)\ndeclare i32 @llvm.cttz.i32(i32, i1 immarg) #0\n\nattributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }\n"}, {"test_name": "shl_cttz_false_noundef", "test_body": "define i32 @shl_cttz_false_noundef(i32 %x, i32 %y) {\nentry:\n %cttz = call noundef i32 @llvm.cttz.i32(i32 %y, i1 false)\n %res = shl i32 %x, %cttz\n ret i32 %res\n}\n\n; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)\ndeclare i32 @llvm.cttz.i32(i32, i1 immarg) #0\n\nattributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }\n"}, {"test_name": "ashr_cttz_false", "test_body": "define i32 @ashr_cttz_false(i32 %x, i32 %y) {\nentry:\n %cttz = call i32 @llvm.cttz.i32(i32 %y, i1 false)\n %res = ashr i32 %x, %cttz\n ret i32 %res\n}\n\n; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)\ndeclare i32 @llvm.cttz.i32(i32, i1 immarg) #0\n\nattributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }\n"}, {"test_name": "shl_cttz_false", "test_body": "define i32 @shl_cttz_false(i32 %x, i32 %y) {\nentry:\n %cttz = call i32 @llvm.cttz.i32(i32 %y, i1 false)\n %res = shl i32 %x, %cttz\n ret i32 %res\n}\n\n; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)\ndeclare i32 @llvm.cttz.i32(i32, i1 immarg) #0\n\nattributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }\n"}, {"test_name": "shl_cttz_as_lhs", "test_body": "define i32 @shl_cttz_as_lhs(i32 %x, i32 %y) {\nentry:\n %cttz = call i32 @llvm.cttz.i32(i32 %y, i1 false)\n %res = shl i32 %cttz, %x\n ret i32 %res\n}\n\n; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)\ndeclare i32 @llvm.cttz.i32(i32, i1 immarg) #0\n\nattributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }\n"}, {"test_name": "shl_ctlz_false", "test_body": "define i32 @shl_ctlz_false(i32 %x, i32 %y) {\nentry:\n %cttz = call i32 @llvm.ctlz.i32(i32 %y, i1 false)\n %res = shl i32 %x, %cttz\n ret i32 %res\n}\n\n; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)\ndeclare i32 @llvm.ctlz.i32(i32, i1 immarg) #0\n\nattributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }\n"}, {"test_name": "lshr_cttz_false", "test_body": "define i32 @lshr_cttz_false(i32 %x, i32 %y) {\nentry:\n %cttz = call i32 @llvm.cttz.i32(i32 %y, i1 false)\n %res = lshr i32 %x, %cttz\n ret i32 %res\n}\n\n; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)\ndeclare i32 @llvm.cttz.i32(i32, i1 immarg) #0\n\nattributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }\n"}]}], "issue": {"title": "[InstCombine] `noundef` attribute should be dropped after setting `is_zero_poison` to true", "body": "Reproducer: https://alive2.llvm.org/ce/z/7-TgAf\r\n```\r\ndefine i32 @src(i32 %x, i32 %y) {\r\nentry:\r\n %cttz = call noundef i32 @llvm.cttz.i32(i32 %y, i1 false)\r\n %res = lshr i32 %x, %cttz\r\n ret i32 %res\r\n}\r\n\r\ndefine i32 @tgt(i32 %x, i32 %y) {\r\nentry:\r\n %cttz = call noundef i32 @llvm.cttz.i32(i32 %y, i1 true)\r\n %res = lshr i32 %x, %cttz\r\n ret i32 %res\r\n}\r\n\r\ndefine i32 @src2(i32 %x) {\r\n %ct = call noundef i32 @llvm.ctlz.i32(i32 %x, i1 false)\r\n %cmp = icmp ne i32 %x, 0\r\n %res = select i1 %cmp, i32 %ct, i32 123\r\n ret i32 %res\r\n}\r\n\r\ndefine i32 @tgt2(i32 %x) {\r\n %ct = call noundef i32 @llvm.ctlz.i32(i32 %x, i1 true)\r\n %cmp = icmp ne i32 %x, 0\r\n %res = select i1 %cmp, i32 %ct, i32 123\r\n ret i32 %res\r\n}\r\n```\r\n`noundef` attribute should be dropped. Otherwise we will convert a poison value to immediate UB.\r\n", "author": "dtcxzyw", "labels": ["miscompilation", "llvm:instcombine"], "comments": []}, "verified": true}
190
  {"bug_id": "111934", "issue_url": "https://github.com/llvm/llvm-project/issues/111934", "bug_type": "miscompilation", "base_commit": "f74f568b29885c3fa63c44e33f91f3bb7281138e", "knowledge_cutoff": "2024-10-11T03:29:55Z", "lit_test_dir": ["llvm/test/Transforms/InstCombine"], "hints": {"fix_commit": "6a65e98fa7901dc1de91172d065fafb16ce89d77", "components": ["InstCombine"], "bug_location_lineno": {"llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp": [[955, 963], [971, 977], [980, 986], [3375, 3381]]}, "bug_location_funcname": {"llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp": ["InstCombinerImpl::foldAndOrOfICmps", "foldIsPowerOf2"]}}, "patch": "commit 6a65e98fa7901dc1de91172d065fafb16ce89d77\nAuthor: Yingwei Zheng <[email protected]>\nDate: Fri Oct 11 18:19:21 2024 +0800\n\n [InstCombine] Drop range attributes in `foldIsPowerOf2` (#111946)\n \n Fixes https://github.com/llvm/llvm-project/issues/111934.\n\ndiff --git a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp\nindex 688601a8ffa5..964616a4eb35 100644\n--- a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp\n+++ b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp\n@@ -955,9 +955,11 @@ static Value *foldIsPowerOf2OrZero(ICmpInst *Cmp0, ICmpInst *Cmp1, bool IsAnd,\n }\n \n /// Reduce a pair of compares that check if a value has exactly 1 bit set.\n-/// Also used for logical and/or, must be poison safe.\n+/// Also used for logical and/or, must be poison safe if range attributes are\n+/// dropped.\n static Value *foldIsPowerOf2(ICmpInst *Cmp0, ICmpInst *Cmp1, bool JoinedByAnd,\n- InstCombiner::BuilderTy &Builder) {\n+ InstCombiner::BuilderTy &Builder,\n+ InstCombinerImpl &IC) {\n // Handle 'and' / 'or' commutation: make the equality check the first operand.\n if (JoinedByAnd && Cmp1->getPredicate() == ICmpInst::ICMP_NE)\n std::swap(Cmp0, Cmp1);\n@@ -971,7 +973,10 @@ static Value *foldIsPowerOf2(ICmpInst *Cmp0, ICmpInst *Cmp1, bool JoinedByAnd,\n match(Cmp1, m_SpecificICmp(ICmpInst::ICMP_ULT,\n m_Intrinsic<Intrinsic::ctpop>(m_Specific(X)),\n m_SpecificInt(2)))) {\n- Value *CtPop = Cmp1->getOperand(0);\n+ auto *CtPop = cast<Instruction>(Cmp1->getOperand(0));\n+ // Drop range attributes and re-infer them in the next iteration.\n+ CtPop->dropPoisonGeneratingAnnotations();\n+ IC.addToWorklist(CtPop);\n return Builder.CreateICmpEQ(CtPop, ConstantInt::get(CtPop->getType(), 1));\n }\n // (X == 0) || (ctpop(X) u> 1) --> ctpop(X) != 1\n@@ -980,7 +985,10 @@ static Value *foldIsPowerOf2(ICmpInst *Cmp0, ICmpInst *Cmp1, bool JoinedByAnd,\n match(Cmp1, m_SpecificICmp(ICmpInst::ICMP_UGT,\n m_Intrinsic<Intrinsic::ctpop>(m_Specific(X)),\n m_SpecificInt(1)))) {\n- Value *CtPop = Cmp1->getOperand(0);\n+ auto *CtPop = cast<Instruction>(Cmp1->getOperand(0));\n+ // Drop range attributes and re-infer them in the next iteration.\n+ CtPop->dropPoisonGeneratingAnnotations();\n+ IC.addToWorklist(CtPop);\n return Builder.CreateICmpNE(CtPop, ConstantInt::get(CtPop->getType(), 1));\n }\n return nullptr;\n@@ -3375,7 +3383,7 @@ Value *InstCombinerImpl::foldAndOrOfICmps(ICmpInst *LHS, ICmpInst *RHS,\n if (Value *V = foldSignedTruncationCheck(LHS, RHS, I, Builder))\n return V;\n \n- if (Value *V = foldIsPowerOf2(LHS, RHS, IsAnd, Builder))\n+ if (Value *V = foldIsPowerOf2(LHS, RHS, IsAnd, Builder, *this))\n return V;\n \n if (Value *V = foldPowerOf2AndShiftedMask(LHS, RHS, IsAnd, Builder))\n", "tests": [{"file": "llvm/test/Transforms/InstCombine/ispow2.ll", "commands": ["opt < %s -passes=instcombine -S"], "tests": [{"test_name": "has_single_bit", "test_body": "; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)\ndeclare i32 @llvm.ctpop.i32(i32) #0\n\ndefine i1 @has_single_bit(i32 %x) {\nentry:\n %cmp1 = icmp ne i32 %x, 0\n %popcnt = call range(i32 1, 33) i32 @llvm.ctpop.i32(i32 %x)\n %cmp2 = icmp ult i32 %popcnt, 2\n %sel = select i1 %cmp1, i1 %cmp2, i1 false\n ret i1 %sel\n}\n\nattributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }\n"}, {"test_name": "has_single_bit_inv", "test_body": "; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)\ndeclare i32 @llvm.ctpop.i32(i32) #0\n\ndefine i1 @has_single_bit_inv(i32 %x) {\nentry:\n %cmp1 = icmp eq i32 %x, 0\n %popcnt = call range(i32 1, 33) i32 @llvm.ctpop.i32(i32 %x)\n %cmp2 = icmp ugt i32 %popcnt, 1\n %sel = select i1 %cmp1, i1 true, i1 %cmp2\n ret i1 %sel\n}\n\nattributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }\n"}, {"test_name": "not_pow2_or_z_known_bits_fail_wrong_cmp", "test_body": "define <2 x i1> @not_pow2_or_z_known_bits_fail_wrong_cmp(<2 x i32> %xin) {\n %x = or <2 x i32> %xin, splat (i32 64)\n %cnt = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %x)\n %r = icmp ugt <2 x i32> %cnt, splat (i32 2)\n ret <2 x i1> %r\n}\n\n; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)\ndeclare <2 x i32> @llvm.ctpop.v2i32(<2 x i32>) #0\n\nattributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }\n"}]}], "issue": {"title": "[InstCombine] poison-generating attributes are not dropped when folding logical and/or of icmps", "body": "Reproducer: https://alive2.llvm.org/ce/z/rSUfvo\r\n```\r\ndefine i1 @src(i32 noundef %Value) {\r\nentry:\r\n %cmp.not = icmp eq i32 %Value, 0\r\n %0 = call range(i32 1, 33) i32 @llvm.ctpop.i32(i32 %Value)\r\n %cmp1 = icmp ult i32 %0, 2\r\n %1 = select i1 %cmp.not, i1 false, i1 %cmp1\r\n ret i1 %1\r\n}\r\n\r\ndefine i1 @tgt(i32 noundef %Value) {\r\nentry:\r\n %0 = call range(i32 1, 33) i32 @llvm.ctpop.i32(i32 %Value)\r\n %1 = icmp eq i32 %0, 1\r\n ret i1 %1\r\n}\r\n```\r\nWhen `%Value == 0`, `@src` returns `false` but `@tgt` returns `poison`.\r\nThis miscompilation was triggered after https://github.com/llvm/llvm-project/pull/111284 was landed.\r\n", "author": "dtcxzyw", "labels": ["miscompilation", "llvm:instcombine"], "comments": []}, "verified": true}
 
191
  {"bug_id": "98660", "issue_url": "https://github.com/llvm/llvm-project/issues/98660", "bug_type": "crash", "base_commit": "efde640cdfede834fa79e0eea69f82fb769d6beb", "knowledge_cutoff": "2024-07-12T16:45:01Z", "lit_test_dir": ["llvm/test/Transforms/LoopVectorize"], "hints": {"fix_commit": "fc9cd3272b50f4ee9f18c4ab82c278bbb014d99f", "components": ["LoopVectorize"], "bug_location_lineno": {"llvm/lib/Transforms/Vectorize/LoopVectorize.cpp": [[8693, 8698]]}, "bug_location_funcname": {"llvm/lib/Transforms/Vectorize/LoopVectorize.cpp": ["addUsersInExitBlock"]}}, "patch": "commit fc9cd3272b50f4ee9f18c4ab82c278bbb014d99f\nAuthor: Florian Hahn <[email protected]>\nDate: Sun Jul 14 20:49:03 2024 +0100\n\n [VPlan] Don't add live-outs for IV phis.\n \n Resume and exit values for inductions are currently still created\n outside of VPlan and independent of the induction recipes. Don't add\n live-outs for now, as the additional unneeded users can pessimize other\n anlysis.\n \n Fixes https://github.com/llvm/llvm-project/issues/98660.\n\ndiff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp\nindex 7d37d67cde29..5520baef7152 100644\n--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp\n+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp\n@@ -8693,6 +8693,14 @@ static void addUsersInExitBlock(VPBasicBlock *HeaderVPBB, Loop *OrigLoop,\n Value *IncomingValue =\n ExitPhi.getIncomingValueForBlock(ExitingBB);\n VPValue *V = Builder.getVPValueOrAddLiveIn(IncomingValue, Plan);\n+ // Exit values for inductions are computed and updated outside of VPlan and\n+ // independent of induction recipes.\n+ // TODO: Compute induction exit values in VPlan, use VPLiveOuts to update\n+ // live-outs.\n+ if ((isa<VPWidenIntOrFpInductionRecipe>(V) &&\n+ !cast<VPWidenIntOrFpInductionRecipe>(V)->getTruncInst()) ||\n+ isa<VPWidenPointerInductionRecipe>(V))\n+ continue;\n Plan.addLiveOut(&ExitPhi, V);\n }\n }\n", "tests": [{"file": "llvm/test/Transforms/LoopVectorize/AArch64/sve-live-out-pointer-induction.ll", "commands": ["opt -passes=loop-vectorize -mtriple=aarch64-unknown -mattr=+sve -S %s"], "tests": [{"test_name": "test", "test_body": "define ptr @test(ptr %start.1, ptr %start.2, ptr %end) {\nentry:\n br label %loop\n\nloop: ; preds = %loop, %entry\n %iv.1 = phi ptr [ %start.1, %entry ], [ %iv.1.next, %loop ]\n %iv.2 = phi ptr [ %start.2, %entry ], [ %iv.2.next, %loop ]\n store i64 0, ptr %iv.2, align 4\n %iv.2.next = getelementptr inbounds ptr, ptr %iv.2, i64 1\n %iv.1.next = getelementptr inbounds ptr, ptr %iv.1, i64 1\n %cmp.i.i.not.i = icmp eq ptr %iv.2.next, %end\n br i1 %cmp.i.i.not.i, label %exit, label %loop\n\nexit: ; preds = %loop\n %res.lcssa = phi ptr [ %iv.1, %loop ]\n ret ptr %res.lcssa\n}\n"}]}, {"file": "llvm/test/Transforms/LoopVectorize/X86/ephemeral-recipes.ll", "commands": ["opt -p loop-vectorize -S %s"], "tests": [{"test_name": "ephemeral_load_and_compare_iv_used_outside", "test_body": "target datalayout = \"e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128\"\ntarget triple = \"x86_64-apple-macosx\"\n\ndefine i32 @ephemeral_load_and_compare_iv_used_outside(ptr %start, ptr %end) #0 {\nentry:\n br label %loop\n\nloop: ; preds = %loop, %entry\n %iv = phi ptr [ %start, %entry ], [ %iv.next, %loop ]\n %iv.next = getelementptr nusw i8, ptr %iv, i64 -8\n %l1 = load i32, ptr %iv, align 4\n %cmp = icmp ne i32 %l1, 0\n call void @llvm.assume(i1 %cmp)\n %cmp.not = icmp eq ptr %iv, %end\n br i1 %cmp.not, label %exit, label %loop\n\nexit: ; preds = %loop\n %final.load = load i32, ptr %iv, align 4\n ret i32 %final.load\n}\n\n; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write)\ndeclare void @llvm.assume(i1 noundef) #1\n\nattributes #0 = { \"target-cpu\"=\"skylake-avx512\" }\nattributes #1 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write) }\n"}]}, {"file": "llvm/test/Transforms/LoopVectorize/X86/iv-live-outs.ll", "commands": ["opt -p loop-vectorize -mcpu=skylake-avx512 -S %s"], "tests": [{"test_name": "<module>", "test_body": "\ntarget triple = \"x86_64-unknown-linux-gnu\"\n\ndefine i64 @test_pr98660(ptr %dst, i64 %N) {\n;\nentry:\n br label %loop.header\n\nloop.header:\n %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]\n %or = or disjoint i64 %iv, 1\n %gep = getelementptr i32, ptr %dst, i64 %or\n %l = load i32, ptr %gep\n %c = icmp eq i32 %l, 0\n br i1 %c, label %then, label %loop.latch\n\nthen:\n store i32 0, ptr %gep, align 4\n br label %loop.latch\n\nloop.latch:\n %iv.next = add i64 %iv, 1\n %ec = icmp ult i64 %iv, %N\n br i1 %ec, label %loop.header, label %exit\n\nexit:\n %ret = phi i64 [ %iv, %loop.latch ]\n ret i64 %ret\n}\n;.\n;."}]}, {"file": "llvm/test/Transforms/LoopVectorize/iv_outside_user.ll", "commands": ["opt -S -passes=loop-vectorize -force-vector-interleave=1 -force-vector-width=2 < %s", "opt -S -passes=loop-vectorize -force-vector-interleave=2 -force-vector-width=1 < %s"], "tests": [{"test_name": "iv_2_dead_in_loop_only_used_outside", "test_body": "define i32 @iv_2_dead_in_loop_only_used_outside(ptr %ptr) {\nentry:\n br label %loop\n\nloop: ; preds = %loop, %entry\n %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]\n %iv.2 = phi i32 [ 0, %entry ], [ %iv.2.next, %loop ]\n %iv.next = add nuw i64 %iv, 1\n %iv.2.next = add nuw i32 %iv.2, 2\n %gep.ptr = getelementptr inbounds i64, ptr %ptr, i64 %iv\n store i64 %iv, ptr %gep.ptr, align 4\n %exitcond = icmp ugt i64 %iv, 1000\n br i1 %exitcond, label %exit, label %loop\n\nexit: ; preds = %loop\n %iv.2.lcssa = phi i32 [ %iv.2, %loop ]\n ret i32 %iv.2.lcssa\n}\n"}]}, {"file": "llvm/test/Transforms/LoopVectorize/no-fold-tail-by-masking-iv-external-uses.ll", "commands": ["opt < %s -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S"], "tests": [{"test_name": "test", "test_body": "define i32 @test(ptr %arr, i64 %n) {\nentry:\n %cmp1 = icmp ugt i64 %n, 1\n br i1 %cmp1, label %preheader, label %done\n\npreheader: ; preds = %entry\n br label %loop\n\nloop: ; preds = %loop, %preheader\n %conv = phi i64 [ %conv2, %loop ], [ 1, %preheader ]\n %i = phi i8 [ %inc, %loop ], [ 1, %preheader ]\n %sub = add nsw i64 %conv, -1\n %ptr = getelementptr inbounds i32, ptr %arr, i64 %sub\n store i32 65, ptr %ptr, align 4\n %inc = add i8 %i, 1\n %conv2 = zext i8 %inc to i64\n %cmp2 = icmp ult i64 %conv2, %n\n br i1 %cmp2, label %loop, label %load_val, !llvm.loop !0\n\nload_val: ; preds = %loop\n %final = phi i64 [ %conv, %loop ]\n %ptr2 = getelementptr inbounds i32, ptr %arr, i64 %final\n %val = load i32, ptr %ptr2, align 4\n br label %done\n\ndone: ; preds = %load_val, %entry\n %value = phi i32 [ %val, %load_val ], [ 0, %entry ]\n ret i32 %value\n}\n\n!0 = distinct !{!0, !1, !2, !3}\n!1 = !{!\"llvm.loop.unroll.disable\"}\n!2 = !{!\"llvm.loop.vectorize.predicate.enable\", i1 true}\n!3 = !{!\"llvm.loop.vectorize.enable\", i1 true}\n"}]}, {"file": "llvm/test/Transforms/LoopVectorize/pr58811-scev-expansion.ll", "commands": ["opt -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S %s"], "tests": [{"test_name": "test1_pr58811", "test_body": "define void @test1_pr58811() {\nentry:\n br label %loop.1.preheader\n\nloop.1.preheader: ; preds = %unreachable.bb, %entry\n %iv.1.ph = phi i32 [ %sub93.2, %unreachable.bb ], [ 0, %entry ]\n br label %loop.1\n\nloop.1: ; preds = %loop.1, %loop.1.preheader\n %iv.1 = phi i32 [ %iv.1.next, %loop.1 ], [ %iv.1.ph, %loop.1.preheader ]\n %iv.2 = phi i32 [ %iv.2.next, %loop.1 ], [ 0, %loop.1.preheader ]\n %iv.2.next = add i32 %iv.2, 1\n %iv.1.next = add i32 %iv.2, %iv.1\n br i1 false, label %loop.1, label %loop.2.preheader\n\nloop.2.preheader: ; preds = %loop.1\n %iv.1.lcssa = phi i32 [ %iv.1, %loop.1 ]\n br label %loop.2\n\nloop.2: ; preds = %loop.2, %loop.2.preheader\n %iv.3 = phi i16 [ %iv.3.next, %loop.2 ], [ 0, %loop.2.preheader ]\n %iv.4 = phi i32 [ %iv.4.next, %loop.2 ], [ 0, %loop.2.preheader ]\n %iv.4.next = sub i32 %iv.4, %iv.1.lcssa\n %iv.3.next = add i16 %iv.3, 1\n %cmp88.1 = icmp ult i16 %iv.3, 198\n br i1 %cmp88.1, label %loop.2, label %loop.3.preheader\n\nloop.3.preheader: ; preds = %loop.2\n %iv.4.lcssa = phi i32 [ %iv.4, %loop.2 ]\n br label %loop.3\n\nloop.3: ; preds = %loop.3, %loop.3.preheader\n %iv.5 = phi i32 [ %sub93.2, %loop.3 ], [ 0, %loop.3.preheader ]\n %sub93.2 = sub i32 %iv.5, %iv.4.lcssa\n br label %loop.3\n\nunreachable.bb: ; No predecessors!\n br label %loop.1.preheader\n}\n"}, {"test_name": "test2_pr58811", "test_body": "define void @test2_pr58811() {\nentry:\n br label %loop.1.header\n\nloop.1.header: ; preds = %loop.4, %entry\n %p.1 = phi i32 [ 0, %entry ], [ %sub93.2, %loop.4 ]\n br label %loop.2\n\nloop.2: ; preds = %loop.2, %loop.1.header\n %iv.2 = phi i32 [ %p.1, %loop.1.header ], [ %add101, %loop.2 ]\n %iv.3 = phi i32 [ 0, %loop.1.header ], [ %sub93, %loop.2 ]\n %sub93 = add i32 %iv.3, 1\n %add101 = add i32 %iv.3, %iv.2\n br i1 false, label %loop.2, label %loop.3\n\nloop.3: ; preds = %loop.3, %loop.2\n %iv.4 = phi i16 [ 0, %loop.2 ], [ %inc.1, %loop.3 ]\n %iv.5 = phi i32 [ 0, %loop.2 ], [ %sub93.1, %loop.3 ]\n %sub93.1 = sub i32 %iv.5, %iv.2\n %inc.1 = add i16 %iv.4, 1\n %cmp88.1 = icmp ult i16 %iv.4, 198\n br i1 %cmp88.1, label %loop.3, label %loop.4\n\nloop.4: ; preds = %loop.4, %loop.3\n %iv.6 = phi i32 [ 0, %loop.3 ], [ %sub93.2, %loop.4 ]\n %sub93.2 = sub i32 %iv.6, %iv.5\n br i1 false, label %loop.4, label %loop.1.header\n}\n"}, {"test_name": "test3_pr58811", "test_body": "define void @test3_pr58811() {\nentry:\n br label %loop.1.header\n\nloop.1.header: ; preds = %loop.1.latch, %entry\n %p.1 = phi i32 [ 0, %entry ], [ %sub93.2, %loop.1.latch ]\n %rem85 = urem i32 1, %p.1\n br label %loop.2\n\nloop.2: ; preds = %loop.2, %loop.1.header\n %p.2 = phi i32 [ 1, %loop.1.header ], [ 0, %loop.2 ]\n %add101 = add i32 %rem85, %p.2\n br i1 false, label %loop.2, label %loop.3\n\nloop.3: ; preds = %loop.3, %loop.2\n %iv.3 = phi i16 [ 0, %loop.2 ], [ %inc.1, %loop.3 ]\n %iv.4 = phi i32 [ 0, %loop.2 ], [ %sub93.1, %loop.3 ]\n %sub93.1 = sub i32 %iv.4, %add101\n %inc.1 = add i16 %iv.3, 1\n %cmp88.1 = icmp ult i16 %iv.3, 198\n br i1 %cmp88.1, label %loop.3, label %loop.4\n\nloop.4: ; preds = %loop.4, %loop.3\n %iv.5 = phi i32 [ 0, %loop.3 ], [ %sub93.2, %loop.4 ]\n %sub93.2 = sub i32 %iv.5, %iv.4\n br label %loop.4\n\nloop.1.latch: ; No predecessors!\n br label %loop.1.header\n}\n"}]}], "issue": {"title": "Assertion `(VF.isScalar() || Def->isLiveIn() || hasVectorValue(Def, Part) || (hasScalarValue(Def, VPIteration(Part, 0)) && Data.PerPartScalars[Def][Part].size() == 1)) && \"Trying to access a single scalar per part but has multiple scalars \" \"per part.\"' failed.", "body": "To reproduce run opt opt with -passes loop-vectorize with the following test:\r\n```\r\n; ModuleID = './reduced.ll'\r\nsource_filename = \"./reduced.ll\"\r\ntarget datalayout = \"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128-ni:1-p2:32:8:8:32-ni:2\"\r\ntarget triple = \"x86_64-unknown-linux-gnu\"\r\n\r\ndefine void @wombat(i64 %arg) #0 gc \"statepoint-example\" {\r\nbb:\r\n br label %bb1\r\n\r\nbb1: ; preds = %bb3, %bb\r\n %phi = phi i64 [ 0, %bb ], [ %add, %bb3 ]\r\n br i1 false, label %bb2, label %bb3\r\n\r\nbb2: ; preds = %bb1\r\n %or = or disjoint i64 %phi, 0\r\n %getelementptr = getelementptr i32, ptr addrspace(1) null, i64 %or\r\n store i32 0, ptr addrspace(1) %getelementptr, align 4\r\n br label %bb3\r\n\r\nbb3: ; preds = %bb2, %bb1\r\n %add = add i64 %phi, 1\r\n %icmp = icmp ult i64 %phi, %arg\r\n br i1 %icmp, label %bb1, label %bb4\r\n\r\nbb4: ; preds = %bb3\r\n %phi5 = phi i64 [ %phi, %bb3 ]\r\n ret void\r\n}\r\n\r\nattributes #0 = { \"target-features\"=\"+prfchw,-cldemote,+avx,+aes,+sahf,+pclmul,-xop,+crc32,+xsaves,-avx512fp16,-usermsr,-sm4,-egpr,+sse4.1,-avx512ifma,+xsave,+sse4.2,-tsxldtrk,-sm3,-ptwrite,-widekl,+invpcid,+64bit,+xsavec,-avx10.1-512,-avx512vpopcntdq,+cmov,-avx512vp2intersect,+avx512cd,+movbe,-avxvnniint8,-ccmp,-amx-int8,-kl,-avx10.1-256,+evex512,-avxvnni,+rtm,+adx,+avx2,-hreset,-movdiri,-serialize,-sha512,-vpclmulqdq,+avx512vl,-uintr,-cf,+clflushopt,-raoint,-cmpccxadd,+bmi,-amx-tile,+sse,-gfni,-avxvnniint16,-amx-fp16,-ndd,+xsaveopt,+rdrnd,+avx512f,-amx-bf16,-avx512bf16,-avx512vnni,-push2pop2,+cx8,+avx512bw,+sse3,+pku,+fsgsbase,-clzero,-mwaitx,-lwp,+lzcnt,-sha,-movdir64b,-ppx,-wbnoinvd,-enqcmd,-avxneconvert,-tbm,-pconfig,-amx-complex,+ssse3,+cx16,+bmi2,+fma,+popcnt,-avxifma,+f16c,-avx512bitalg,-rdpru,+clwb,+mmx,+sse2,+rdseed,-avx512vbmi2,-prefetchi,-rdpid,-fma4,-avx512vbmi,-shstk,-vaes,-waitpkg,-sgx,+fxsr,+avx512dq,-sse4a,-avx512f\" }\r\n```\r\nReproducer:\r\nhttps://godbolt.org/z/Ghz3147nj\r\n\r\nStack dump:\r\n```\r\n0.\tProgram arguments: /opt/compiler-explorer/clang-assertions-trunk/bin/opt -o /app/output.s -S -passes loop-vectorize <source>\r\n1.\tRunning pass \"function(loop-vectorize<no-interleave-forced-only;no-vectorize-forced-only;>)\" on module \"<source>\"\r\n2.\tRunning pass \"loop-vectorize<no-interleave-forced-only;no-vectorize-forced-only;>\" on function \"wombat\"\r\n #0 0x0000000004e9b948 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x4e9b948)\r\n #1 0x0000000004e990bc SignalHandler(int) Signals.cpp:0:0\r\n #2 0x000070edf8442520 (/lib/x86_64-linux-gnu/libc.so.6+0x42520)\r\n #3 0x000070edf84969fc pthread_kill (/lib/x86_64-linux-gnu/libc.so.6+0x969fc)\r\n #4 0x000070edf8442476 gsignal (/lib/x86_64-linux-gnu/libc.so.6+0x42476)\r\n #5 0x000070edf84287f3 abort (/lib/x86_64-linux-gnu/libc.so.6+0x287f3)\r\n #6 0x000070edf842871b (/lib/x86_64-linux-gnu/libc.so.6+0x2871b)\r\n #7 0x000070edf8439e96 (/lib/x86_64-linux-gnu/libc.so.6+0x39e96)\r\n #8 0x00000000040395f7 llvm::VPTransformState::get(llvm::VPValue*, unsigned int, bool) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x40395f7)\r\n #9 0x0000000004056ece llvm::VPInstruction::generatePerPart(llvm::VPTransformState&, unsigned int) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x4056ece)\r\n#10 0x00000000040595ee llvm::VPInstruction::execute(llvm::VPTransformState&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x40595ee)\r\n#11 0x0000000004030a1f llvm::VPBasicBlock::executeRecipes(llvm::VPTransformState*, llvm::BasicBlock*) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x4030a1f)\r\n#12 0x00000000040320e8 llvm::VPBasicBlock::execute(llvm::VPTransformState*) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x40320e8)\r\n#13 0x0000000004030612 llvm::VPRegionBlock::execute(llvm::VPTransformState*) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x4030612)\r\n#14 0x0000000004039946 llvm::VPlan::execute(llvm::VPTransformState*) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x4039946)\r\n#15 0x0000000003f1d475 llvm::LoopVectorizationPlanner::executePlan(llvm::ElementCount, unsigned int, llvm::VPlan&, llvm::InnerLoopVectorizer&, llvm::DominatorTree*, bool, llvm::DenseMap<llvm::SCEV const*, llvm::Value*, llvm::DenseMapInfo<llvm::SCEV const*, void>, llvm::detail::DenseMapPair<llvm::SCEV const*, llvm::Value*>> const*) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x3f1d475)\r\n#16 0x0000000003f332ea llvm::LoopVectorizePass::processLoop(llvm::Loop*) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x3f332ea)\r\n#17 0x0000000003f35a29 llvm::LoopVectorizePass::runImpl(llvm::Function&, llvm::ScalarEvolution&, llvm::LoopInfo&, llvm::TargetTransformInfo&, llvm::DominatorTree&, llvm::BlockFrequencyInfo*, llvm::TargetLibraryInfo*, llvm::DemandedBits&, llvm::AssumptionCache&, llvm::LoopAccessInfoManager&, llvm::OptimizationRemarkEmitter&, llvm::ProfileSummaryInfo*) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x3f35a29)\r\n#18 0x0000000003f3614b llvm::LoopVectorizePass::run(llvm::Function&, llvm::AnalysisManager<llvm::Function>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x3f3614b)\r\n#19 0x0000000002e212be llvm::detail::PassModel<llvm::Function, llvm::LoopVectorizePass, llvm::AnalysisManager<llvm::Function>>::run(llvm::Function&, llvm::AnalysisManager<llvm::Function>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x2e212be)\r\n#20 0x0000000004c9f2d8 llvm::PassManager<llvm::Function, llvm::AnalysisManager<llvm::Function>>::run(llvm::Function&, llvm::AnalysisManager<llvm::Function>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x4c9f2d8)\r\n#21 0x0000000000dc9bee llvm::detail::PassModel<llvm::Function, llvm::PassManager<llvm::Function, llvm::AnalysisManager<llvm::Function>>, llvm::AnalysisManager<llvm::Function>>::run(llvm::Function&, llvm::AnalysisManager<llvm::Function>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0xdc9bee)\r\n#22 0x0000000004c9dd46 llvm::ModuleToFunctionPassAdaptor::run(llvm::Module&, llvm::AnalysisManager<llvm::Module>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x4c9dd46)\r\n#23 0x0000000000dca1fe llvm::detail::PassModel<llvm::Module, llvm::ModuleToFunctionPassAdaptor, llvm::AnalysisManager<llvm::Module>>::run(llvm::Module&, llvm::AnalysisManager<llvm::Module>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0xdca1fe)\r\n#24 0x0000000004c9bf10 llvm::PassManager<llvm::Module, llvm::AnalysisManager<llvm::Module>>::run(llvm::Module&, llvm::AnalysisManager<llvm::Module>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x4c9bf10)\r\n#25 0x00000000008db1d2 llvm::runPassPipeline(llvm::StringRef, llvm::Module&, llvm::TargetMachine*, llvm::TargetLibraryInfoImpl*, llvm::ToolOutputFile*, llvm::ToolOutputFile*, llvm::ToolOutputFile*, llvm::StringRef, llvm::ArrayRef<llvm::PassPlugin>, llvm::ArrayRef<std::function<void (llvm::PassBuilder&)>>, llvm::opt_tool::OutputKind, llvm::opt_tool::VerifierKind, bool, bool, bool, bool, bool, bool, bool) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x8db1d2)\r\n#26 0x00000000008ce0fc optMain (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x8ce0fc)\r\n#27 0x000070edf8429d90 (/lib/x86_64-linux-gnu/libc.so.6+0x29d90)\r\n#28 0x000070edf8429e40 __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x29e40)\r\n#29 0x00000000008c556e _start (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x8c556e)\r\nProgram terminated with signal: SIGSEGV\r\nCompiler returned: 139\r\n```", "author": "TatyanaDoubts", "labels": ["vectorizers", "crash"], "comments": [{"author": "fhahn", "body": "Interesting, let me take a look"}]}, "verified": true}
192
  {"bug_id": "89516", "issue_url": "https://github.com/llvm/llvm-project/issues/89516", "bug_type": "miscompilation", "base_commit": "18bb175428f520aaa4a5e388bd3b680a1a7c60c0", "knowledge_cutoff": "2024-04-20T22:58:16Z", "lit_test_dir": ["llvm/test/Transforms/InstCombine"], "hints": {"fix_commit": "6309440c218778db027306826993e484eab2be17", "components": ["InstCombine"], "bug_location_lineno": {"llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp": [[2720, 2726]]}, "bug_location_funcname": {"llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp": ["foldSelectWithSRem"]}}, "patch": "commit 6309440c218778db027306826993e484eab2be17\nAuthor: Yingwei Zheng <[email protected]>\nDate: Sun Apr 21 22:41:32 2024 +0800\n\n [InstCombine] Fix unexpected overwriting in `foldSelectWithSRem` (#89539)\n \n Fixes #89516\n\ndiff --git a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp\nindex 0262af28068b..73600206a55c 100644\n--- a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp\n+++ b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp\n@@ -2720,7 +2720,7 @@ static Instruction *foldSelectWithSRem(SelectInst &SI, InstCombinerImpl &IC,\n // %cnd = icmp slt i32 %rem, 0\n // %add = add i32 %rem, %n\n // %sel = select i1 %cnd, i32 %add, i32 %rem\n- if (match(TrueVal, m_Add(m_Value(RemRes), m_Value(Remainder))) &&\n+ if (match(TrueVal, m_Add(m_Specific(RemRes), m_Value(Remainder))) &&\n match(RemRes, m_SRem(m_Value(Op), m_Specific(Remainder))) &&\n IC.isKnownToBeAPowerOfTwo(Remainder, /*OrZero*/ true) &&\n FalseVal == RemRes)\n", "tests": [{"file": "llvm/test/Transforms/InstCombine/select-divrem.ll", "commands": ["opt < %s -passes=instcombine -S"], "tests": [{"test_name": "rem_euclid_pow2_false_arm_folded", "test_body": "define i32 @rem_euclid_pow2_false_arm_folded(i32 %n) {\n %rem = srem i32 %n, 2\n %nonneg = icmp sge i32 %rem, 0\n %res = select i1 %nonneg, i32 %rem, i32 1\n ret i32 %res\n}\n"}, {"test_name": "pr89516", "test_body": "define i8 @pr89516(i8 %n, i8 %x) {\n %cond = icmp slt i8 %x, 0\n %pow2 = shl nuw i8 1, %n\n %srem = srem i8 1, %pow2\n %add = add nuw i8 %srem, %pow2\n %res = select i1 %cond, i8 %add, i8 %srem\n ret i8 %res\n}\n"}]}], "issue": {"title": "miscompile of vanilla integer code by InstCombine", "body": "https://alive2.llvm.org/ce/z/jRfVLr\r\n\r\nthis function:\r\n```llvm\r\ndefine i8 @f(i8 %0, i8 %1) {\r\n %3 = icmp slt i8 %1, 0\r\n %4 = shl i8 1, %0\r\n %5 = srem i8 1, %4\r\n %6 = add i8 %5, %4\r\n %7 = select i1 %3, i8 %6, i8 %5\r\n ret i8 %7\r\n}\r\n```\r\nis getting mis-optimized to:\r\n```llvm\r\ndefine i8 @f(i8 %0, i8 %1) {\r\n %3 = icmp ne i8 %0, 0\r\n %4 = zext i1 %3 to i8\r\n ret i8 %4\r\n}\r\n```\r\nhere I'll just give Alive's work:\r\n```\r\nExample:\r\ni8 %#0 = #x00 (0)\r\ni8 %#1 = #xff (255, -1)\r\n\r\nSource:\r\ni1 %#3 = #x1 (1)\r\ni8 %#4 = #x01 (1)\r\ni8 %#5 = #x00 (0)\r\ni8 %#6 = #x01 (1)\r\ni8 %#7 = #x01 (1)\r\n\r\nTarget:\r\ni1 %#3 = #x0 (0)\r\ni8 %#4 = #x00 (0)\r\nSource value: #x01 (1)\r\nTarget value: #x00 (0)\r\n```\r\n\r\ncc @nunoplopes @hatsunespica", "author": "regehr", "labels": ["miscompilation", "llvm:instcombine"], "comments": []}, "verified": true}
193
  {"bug_id": "98139", "issue_url": "https://github.com/llvm/llvm-project/issues/98139", "bug_type": "miscompilation", "base_commit": "6aefa918768c834ec21e0b599fa14d03b9ce3dc0", "knowledge_cutoff": "2024-07-09T09:49:19Z", "lit_test_dir": ["llvm/test/Transforms/InstCombine"], "hints": {"fix_commit": "722151664ecfd53295392ad875ff9bfdcd1deaaf", "components": ["InstCombine"], "bug_location_lineno": {"llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp": [[411, 417]]}, "bug_location_funcname": {"llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp": ["InstCombinerImpl::SimplifyDemandedUseBits"]}}, "patch": "commit 722151664ecfd53295392ad875ff9bfdcd1deaaf\nAuthor: Yingwei Zheng <[email protected]>\nDate: Tue Jul 9 22:04:55 2024 +0800\n\n [InstCombine] Fix typo in `adjustKnownBitsForSelectArm` (#98155)\n \n Fixes https://github.com/llvm/llvm-project/issues/98139.\n\ndiff --git a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp\nindex 98f085a2c756..081e783c964f 100644\n--- a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp\n+++ b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp\n@@ -411,7 +411,7 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Instruction *I,\n // Only known if known in both the LHS and RHS.\n adjustKnownBitsForSelectArm(LHSKnown, I->getOperand(0), I->getOperand(1),\n /*Invert=*/false, Depth, Q);\n- adjustKnownBitsForSelectArm(LHSKnown, I->getOperand(0), I->getOperand(2),\n+ adjustKnownBitsForSelectArm(RHSKnown, I->getOperand(0), I->getOperand(2),\n /*Invert=*/true, Depth, Q);\n Known = LHSKnown.intersectWith(RHSKnown);\n break;\n", "tests": [{"file": "llvm/test/Transforms/InstCombine/pr98139.ll", "commands": ["opt -S -passes=instcombine < %s"], "tests": [{"test_name": "pr98139", "test_body": "define i8 @pr98139(i16 %a, i16 %b, i1 %cond) {\n %sel = select i1 %cond, i16 1, i16 254\n %cond1 = icmp ne i16 %b, 0\n %mask = and i16 %a, 255\n %cond2 = icmp ne i16 %mask, 255\n %cond3 = or i1 %cond1, %cond2\n %sel2 = select i1 %cond3, i16 %sel, i16 255\n %sub = sub i16 %sel2, %a\n %trunc = trunc i16 %sub to i8\n ret i8 %trunc\n}\n"}]}], "issue": {"title": "wrong code at -O{s,2,3} on x86_64-linux-gnu", "body": "It appears to be a recent regression as it doesn't reproduce with 18.1.0 and earlier.\r\n\r\nCompiler Explorer: https://godbolt.org/z/o595xsMdb\r\n\r\n```\r\n[512] % clangtk -v\r\nclang version 19.0.0git (https://github.com/llvm/llvm-project.git 765e2f9a8de27cc8fd8c75540844e9630d8229ad)\r\nTarget: x86_64-unknown-linux-gnu\r\nThread model: posix\r\nInstalledDir: /local/suz-local/software/local/clang-trunk/bin\r\nBuild config: +assertions\r\nFound candidate GCC installation: /usr/lib/gcc/x86_64-linux-gnu/10\r\nFound candidate GCC installation: /usr/lib/gcc/x86_64-linux-gnu/11\r\nFound candidate GCC installation: /usr/lib/gcc/x86_64-linux-gnu/9\r\nSelected GCC installation: /usr/lib/gcc/x86_64-linux-gnu/11\r\nCandidate multilib: .;@m64\r\nSelected multilib: .;@m64\r\n[513] % \r\n[513] % clangtk -O1 small.c; ./a.out\r\n1\r\n[514] % clangtk -O3 small.c; ./a.out\r\n-2\r\n1\r\n[515] % cat small.c\r\nint printf(const char *, ...);\r\nint a, b, c, e;\r\nchar d;\r\nint main() {\r\n int f = 1;\r\n unsigned g = 1;\r\n for (; c < 2; c++) {\r\n if (g)\r\n b = 1;\r\n char h = f;\r\n f = ~h;\r\n d = ~b - ~g * (a || f);\r\n g = ~g;\r\n if (g < 1)\r\n break;\r\n if (d)\r\n printf(\"%d\\n\", g);\r\n f = e;\r\n }\r\n return 0;\r\n}\r\n```", "author": "zhendongsu", "labels": ["miscompilation", "confirmed", "llvm:instcombine"], "comments": [{"author": "dtcxzyw", "body": "There is a bug in `SimplifyDemandedInstructionBits` :)\r\nI am working to provide a minimal reproducer.\r\n"}, {"author": "dtcxzyw", "body": "@nikic https://github.com/llvm/llvm-project/blob/a9183b8899f2c02ba3710b27c0cbdde6831a627b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp#L411-L416\r\n\r\nI will post a fix later.\r\n"}, {"author": "dtcxzyw", "body": "Reproducer: https://alive2.llvm.org/ce/z/GAUsBC\r\n```\r\ndefine i8 @src(i16 %a, i16 %b, i1 %cond) {\r\n %sel = select i1 %cond, i16 1, i16 254\r\n %cond1 = icmp ne i16 %b, 0\r\n %mask = and i16 %a, 255\r\n %cond2 = icmp ne i16 %mask, 255\r\n %cond3 = or i1 %cond1, %cond2\r\n %sel2 = select i1 %cond3, i16 %sel, i16 255\r\n %sub = sub i16 %sel2, %a\r\n %trunc = trunc i16 %sub to i8\r\n ret i8 %trunc\r\n}\r\n\r\ndefine i8 @tgt(i16 %a1, i16 %a2, i1 %cond) {\r\n %1 = trunc i16 %a1 to i8\r\n %conv6 = xor i8 %1, -1\r\n ret i8 %conv6\r\n}\r\n```"}]}, "verified": true}
 
188
  {"bug_id": "119173", "issue_url": "https://github.com/llvm/llvm-project/issues/119173", "bug_type": "miscompilation", "base_commit": "ab77db03ce28e86a61010e51ea13796ea09efc46", "knowledge_cutoff": "2024-12-09T07:19:06Z", "lit_test_dir": ["llvm/test/Transforms/LoopVectorize"], "hints": {"fix_commit": "30f3752e54fa7cd595a434a985efbe9a7abe9b65", "components": ["LoopVectorize"], "bug_location_lineno": {"llvm/lib/Transforms/Vectorize/LoopVectorize.cpp": [[6637, 6644], [8588, 8593]]}, "bug_location_funcname": {"llvm/lib/Transforms/Vectorize/LoopVectorize.cpp": ["LoopVectorizationCostModel::getInstructionCost", "VPRecipeBuilder::tryToWiden"]}}, "patch": "commit 30f3752e54fa7cd595a434a985efbe9a7abe9b65\nAuthor: Florian Hahn <[email protected]>\nDate: Mon Feb 3 17:01:02 2025 +0000\n\n [VPlan] Only use SCEV for live-ins in tryToWiden. (#125436)\n \n Replacing a recipe with a live-in may not be correct in all cases,\n e.g. when replacing recipes involving header-phi recipes, like\n reductions.\n \n For now, only use SCEV to simplify live-ins.\n \n More powerful input simplification can be built in top of\n https://github.com/llvm/llvm-project/pull/124432 in the future.\n \n \n Fixes https://github.com/llvm/llvm-project/issues/119173.\n Fixes https://github.com/llvm/llvm-project/issues/125374.\n \n PR: https://github.com/llvm/llvm-project/pull/125436\n\ndiff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp\nindex cbb9960959f2..ce66350669d5 100644\n--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp\n+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp\n@@ -6637,8 +6637,10 @@ LoopVectorizationCostModel::getInstructionCost(Instruction *I,\n // fold away. We can generalize this for all operations using the notion\n // of neutral elements. (TODO)\n if (I->getOpcode() == Instruction::Mul &&\n- (PSE.getSCEV(I->getOperand(0))->isOne() ||\n- PSE.getSCEV(I->getOperand(1))->isOne()))\n+ ((TheLoop->isLoopInvariant(I->getOperand(0)) &&\n+ PSE.getSCEV(I->getOperand(0))->isOne()) ||\n+ (TheLoop->isLoopInvariant(I->getOperand(1)) &&\n+ PSE.getSCEV(I->getOperand(1))->isOne())))\n return 0;\n \n // Detect reduction patterns\n@@ -8588,6 +8590,8 @@ VPWidenRecipe *VPRecipeBuilder::tryToWiden(Instruction *I,\n // to replace operands with constants.\n ScalarEvolution &SE = *PSE.getSE();\n auto GetConstantViaSCEV = [this, &SE](VPValue *Op) {\n+ if (!Op->isLiveIn())\n+ return Op;\n Value *V = Op->getUnderlyingValue();\n if (isa<Constant>(V) || !SE.isSCEVable(V->getType()))\n return Op;\n", "tests": [{"file": "llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll", "commands": ["opt -p loop-vectorize -S %s"], "tests": [{"test_name": "mul_select_operand_known_1_via_scev", "test_body": "target triple = \"arm64-apple-macosx\"\n\ndefine i64 @mul_select_operand_known_1_via_scev() {\nentry:\n br label %loop\n\nloop: ; preds = %loop, %entry\n %red = phi i64 [ 12, %entry ], [ %red.next, %loop ]\n %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]\n %0 = and i32 %iv, 1\n %cmp1.i = icmp eq i32 %0, 0\n %narrow.i = select i1 %cmp1.i, i32 1, i32 %iv\n %mul = zext nneg i32 %narrow.i to i64\n %red.next = mul nsw i64 %red, %mul\n %iv.next = add nuw nsw i32 %iv, 1\n %ec = icmp eq i32 %iv, 1\n br i1 %ec, label %exit, label %loop\n\nexit: ; preds = %loop\n %res = phi i64 [ %red.next, %loop ]\n ret i64 %res\n}\n", "additional_args": "-src-unroll=4 -tgt-unroll=4"}, {"test_name": "pr125374", "test_body": "target datalayout = \"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128\"\ntarget triple = \"x86_64-unknown-linux-gnu\"\n\ndefine i32 @main() {\nentry:\n br label %for.body.i.i\n\nfor.body.i.i: ; preds = %for.body.i.i, %entry\n %indvars.iv.i.i = phi i64 [ 0, %entry ], [ %indvars.iv.next.i.i, %for.body.i.i ]\n %conv678.i.i = phi i8 [ 1, %entry ], [ %add.i.i.i, %for.body.i.i ]\n %add.i.i.i = add i8 0, %conv678.i.i\n %indvars.iv.next.i.i = add i64 %indvars.iv.i.i, 1\n %exitcond.not.i.i = icmp eq i64 %indvars.iv.i.i, 1\n br i1 %exitcond.not.i.i, label %o.exit, label %for.body.i.i\n\no.exit: ; preds = %for.body.i.i\n %conv6.i.i = zext i8 %add.i.i.i to i32\n ret i32 %conv6.i.i\n}\n", "additional_args": "-src-unroll=2 -tgt-unroll=2"}]}], "issue": {"title": "[clang] Miscompilation at -O3", "body": "This code prints 15 at -O3, but prints 5 at -O0/1/2:\n```c\nint printf(const char *, ...);\nstatic int a[] = {4294967295, 5};\nint b, c;\nint main() {\n a[1] = b = 5;\n unsigned d = -13;\n for (; d >= 8; d = a[0] + d + 6) {\n int *e = &b;\n *e = a[0] - -1 + b;\n }\n a[c];\n printf(\"%d\\n\", b);\n}\n```\n\nCompiler Explorer: https://godbolt.org/z/4xdPqcjPb\n\nBisected to https://github.com/llvm/llvm-project/commit/6d6eea92e36c301e34a7ec11b2a40e3080f79f53, which was committed by @fhahn ", "author": "cardigan1008", "labels": ["miscompilation", "vectorizers"], "comments": [{"author": "hstk30-hw", "body": "Don't ignore the warning.\n\n```\n<source>:2:19: warning: implicit conversion from 'long' to 'int' changes value from 4294967294 to -2 [-Wconstant-conversion]\n 2 | static int a[] = {4294967294, 5};\n | ~^~~~~~~~~~\n```"}, {"author": "antoniofrighetto", "body": "Please leave the issue opened, as it's implementation-defined behaviour, not undefined behaviour."}, {"author": "antoniofrighetto", "body": "Reduced to:\n```llvm\ntarget triple = \"x86_64-unknown-linux-gnu\"\n\ndefine noundef i32 @src() {\nentry:\n br label %for.body\n\nfor.body: ; preds = %entry, %for.body\n %d.06 = phi i32 [ -13, %entry ], [ %add2.reass, %for.body ]\n %add45 = phi i32 [ 5, %entry ], [ %add, %for.body ]\n %add = add i32 0, %add45\n %add2.reass = add i32 %d.06, 5\n %cmp = icmp ugt i32 %add2.reass, 7\n br i1 %cmp, label %for.body, label %for.end\n\nfor.end: ; preds = %for.body\n ret i32 %add\n}\n```\n\n@fhahn I think the issue fundamentally here lies in the fact that we are incorrectly widening the constant 5 (retrieved from SCEV) to `<5, 5, 5, 5>`, when in fact it should be `<5, 0, 0, 0>` (VPlan value: `WIDEN-REDUCTION-PHI ir<%add45> = phi ir<5>`). The VPBasicBlock for the miscompiled basic block is the following one:\n```\nvector.body:\n EMIT vp<%4> = CANONICAL-INDUCTION ir<0>, vp<%7>\n WIDEN-INDUCTION %d.06 = phi -13, %add2.reass, ir<5>, vp<%0>\n WIDEN-REDUCTION-PHI ir<%add45> = phi ir<5>\n EMIT vp<%5> = WIDEN-CANONICAL-INDUCTION vp<%4>\n EMIT vp<%6> = icmp ule vp<%5>, vp<%3>\n```\nI'm not that familiar with VPlan, though I feel like that either we are not taking into account the active lane, or we should have not emitted a widen instruction in the first place.\n\n(Godbolt: https://llvm.godbolt.org/z/4Wz46ceh1)"}, {"author": "antoniofrighetto", "body": "@fhahn Would you be willing to have a look at it? Happy to help with any additional triage, if needed."}, {"author": "fhahn", "body": "Yep let me take a look!"}]}, "verified": true}
189
  {"bug_id": "112068", "issue_url": "https://github.com/llvm/llvm-project/issues/112068", "bug_type": "miscompilation", "base_commit": "b24acc06e1d465b3e3e4e28515dd437f6a7454f2", "knowledge_cutoff": "2024-10-12T02:41:57Z", "lit_test_dir": ["llvm/test/Transforms/InstCombine"], "hints": {"fix_commit": "a59976bea8ad76f18119a11391dc8ba3e6ba07d5", "components": ["InstCombine"], "bug_location_lineno": {"llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp": [[505, 512]]}, "bug_location_funcname": {"llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp": ["foldCttzCtlz"]}}, "patch": "commit a59976bea8ad76f18119a11391dc8ba3e6ba07d5\nAuthor: Yingwei Zheng <[email protected]>\nDate: Tue Nov 19 20:06:34 2024 +0800\n\n [InstCombine] Drop noundef attributes in `foldCttzCtlz` (#116718)\n \n Closes https://github.com/llvm/llvm-project/issues/112068.\n\ndiff --git a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp\nindex 6cff3c7af91e..42c0acd1e45e 100644\n--- a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp\n+++ b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp\n@@ -505,8 +505,10 @@ static Instruction *foldCttzCtlz(IntrinsicInst &II, InstCombinerImpl &IC) {\n \n // If ctlz/cttz is only used as a shift amount, set is_zero_poison to true.\n if (II.hasOneUse() && match(Op1, m_Zero()) &&\n- match(II.user_back(), m_Shift(m_Value(), m_Specific(&II))))\n+ match(II.user_back(), m_Shift(m_Value(), m_Specific(&II)))) {\n+ II.dropUBImplyingAttrsAndMetadata();\n return IC.replaceOperand(II, 1, IC.Builder.getTrue());\n+ }\n \n Constant *C;\n \n", "tests": [{"file": "llvm/test/Transforms/InstCombine/shift-cttz-ctlz.ll", "commands": ["opt < %s -passes=instcombine -S"], "tests": [{"test_name": "shl_cttz_false_multiuse", "test_body": "define i32 @shl_cttz_false_multiuse(i32 %x, i32 %y) {\nentry:\n %cttz = call i32 @llvm.cttz.i32(i32 %y, i1 false)\n call void @use(i32 %cttz)\n %res = shl i32 %x, %cttz\n ret i32 %res\n}\n\ndeclare void @use(i32)\n\n; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)\ndeclare i32 @llvm.cttz.i32(i32, i1 immarg) #0\n\nattributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }\n"}, {"test_name": "shl_cttz_false_noundef", "test_body": "define i32 @shl_cttz_false_noundef(i32 %x, i32 %y) {\nentry:\n %cttz = call noundef i32 @llvm.cttz.i32(i32 %y, i1 false)\n %res = shl i32 %x, %cttz\n ret i32 %res\n}\n\n; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)\ndeclare i32 @llvm.cttz.i32(i32, i1 immarg) #0\n\nattributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }\n"}, {"test_name": "ashr_cttz_false", "test_body": "define i32 @ashr_cttz_false(i32 %x, i32 %y) {\nentry:\n %cttz = call i32 @llvm.cttz.i32(i32 %y, i1 false)\n %res = ashr i32 %x, %cttz\n ret i32 %res\n}\n\n; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)\ndeclare i32 @llvm.cttz.i32(i32, i1 immarg) #0\n\nattributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }\n"}, {"test_name": "shl_cttz_false", "test_body": "define i32 @shl_cttz_false(i32 %x, i32 %y) {\nentry:\n %cttz = call i32 @llvm.cttz.i32(i32 %y, i1 false)\n %res = shl i32 %x, %cttz\n ret i32 %res\n}\n\n; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)\ndeclare i32 @llvm.cttz.i32(i32, i1 immarg) #0\n\nattributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }\n"}, {"test_name": "shl_cttz_as_lhs", "test_body": "define i32 @shl_cttz_as_lhs(i32 %x, i32 %y) {\nentry:\n %cttz = call i32 @llvm.cttz.i32(i32 %y, i1 false)\n %res = shl i32 %cttz, %x\n ret i32 %res\n}\n\n; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)\ndeclare i32 @llvm.cttz.i32(i32, i1 immarg) #0\n\nattributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }\n"}, {"test_name": "shl_ctlz_false", "test_body": "define i32 @shl_ctlz_false(i32 %x, i32 %y) {\nentry:\n %cttz = call i32 @llvm.ctlz.i32(i32 %y, i1 false)\n %res = shl i32 %x, %cttz\n ret i32 %res\n}\n\n; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)\ndeclare i32 @llvm.ctlz.i32(i32, i1 immarg) #0\n\nattributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }\n"}, {"test_name": "lshr_cttz_false", "test_body": "define i32 @lshr_cttz_false(i32 %x, i32 %y) {\nentry:\n %cttz = call i32 @llvm.cttz.i32(i32 %y, i1 false)\n %res = lshr i32 %x, %cttz\n ret i32 %res\n}\n\n; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)\ndeclare i32 @llvm.cttz.i32(i32, i1 immarg) #0\n\nattributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }\n"}]}], "issue": {"title": "[InstCombine] `noundef` attribute should be dropped after setting `is_zero_poison` to true", "body": "Reproducer: https://alive2.llvm.org/ce/z/7-TgAf\r\n```\r\ndefine i32 @src(i32 %x, i32 %y) {\r\nentry:\r\n %cttz = call noundef i32 @llvm.cttz.i32(i32 %y, i1 false)\r\n %res = lshr i32 %x, %cttz\r\n ret i32 %res\r\n}\r\n\r\ndefine i32 @tgt(i32 %x, i32 %y) {\r\nentry:\r\n %cttz = call noundef i32 @llvm.cttz.i32(i32 %y, i1 true)\r\n %res = lshr i32 %x, %cttz\r\n ret i32 %res\r\n}\r\n\r\ndefine i32 @src2(i32 %x) {\r\n %ct = call noundef i32 @llvm.ctlz.i32(i32 %x, i1 false)\r\n %cmp = icmp ne i32 %x, 0\r\n %res = select i1 %cmp, i32 %ct, i32 123\r\n ret i32 %res\r\n}\r\n\r\ndefine i32 @tgt2(i32 %x) {\r\n %ct = call noundef i32 @llvm.ctlz.i32(i32 %x, i1 true)\r\n %cmp = icmp ne i32 %x, 0\r\n %res = select i1 %cmp, i32 %ct, i32 123\r\n ret i32 %res\r\n}\r\n```\r\n`noundef` attribute should be dropped. Otherwise we will convert a poison value to immediate UB.\r\n", "author": "dtcxzyw", "labels": ["miscompilation", "llvm:instcombine"], "comments": []}, "verified": true}
190
  {"bug_id": "111934", "issue_url": "https://github.com/llvm/llvm-project/issues/111934", "bug_type": "miscompilation", "base_commit": "f74f568b29885c3fa63c44e33f91f3bb7281138e", "knowledge_cutoff": "2024-10-11T03:29:55Z", "lit_test_dir": ["llvm/test/Transforms/InstCombine"], "hints": {"fix_commit": "6a65e98fa7901dc1de91172d065fafb16ce89d77", "components": ["InstCombine"], "bug_location_lineno": {"llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp": [[955, 963], [971, 977], [980, 986], [3375, 3381]]}, "bug_location_funcname": {"llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp": ["InstCombinerImpl::foldAndOrOfICmps", "foldIsPowerOf2"]}}, "patch": "commit 6a65e98fa7901dc1de91172d065fafb16ce89d77\nAuthor: Yingwei Zheng <[email protected]>\nDate: Fri Oct 11 18:19:21 2024 +0800\n\n [InstCombine] Drop range attributes in `foldIsPowerOf2` (#111946)\n \n Fixes https://github.com/llvm/llvm-project/issues/111934.\n\ndiff --git a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp\nindex 688601a8ffa5..964616a4eb35 100644\n--- a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp\n+++ b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp\n@@ -955,9 +955,11 @@ static Value *foldIsPowerOf2OrZero(ICmpInst *Cmp0, ICmpInst *Cmp1, bool IsAnd,\n }\n \n /// Reduce a pair of compares that check if a value has exactly 1 bit set.\n-/// Also used for logical and/or, must be poison safe.\n+/// Also used for logical and/or, must be poison safe if range attributes are\n+/// dropped.\n static Value *foldIsPowerOf2(ICmpInst *Cmp0, ICmpInst *Cmp1, bool JoinedByAnd,\n- InstCombiner::BuilderTy &Builder) {\n+ InstCombiner::BuilderTy &Builder,\n+ InstCombinerImpl &IC) {\n // Handle 'and' / 'or' commutation: make the equality check the first operand.\n if (JoinedByAnd && Cmp1->getPredicate() == ICmpInst::ICMP_NE)\n std::swap(Cmp0, Cmp1);\n@@ -971,7 +973,10 @@ static Value *foldIsPowerOf2(ICmpInst *Cmp0, ICmpInst *Cmp1, bool JoinedByAnd,\n match(Cmp1, m_SpecificICmp(ICmpInst::ICMP_ULT,\n m_Intrinsic<Intrinsic::ctpop>(m_Specific(X)),\n m_SpecificInt(2)))) {\n- Value *CtPop = Cmp1->getOperand(0);\n+ auto *CtPop = cast<Instruction>(Cmp1->getOperand(0));\n+ // Drop range attributes and re-infer them in the next iteration.\n+ CtPop->dropPoisonGeneratingAnnotations();\n+ IC.addToWorklist(CtPop);\n return Builder.CreateICmpEQ(CtPop, ConstantInt::get(CtPop->getType(), 1));\n }\n // (X == 0) || (ctpop(X) u> 1) --> ctpop(X) != 1\n@@ -980,7 +985,10 @@ static Value *foldIsPowerOf2(ICmpInst *Cmp0, ICmpInst *Cmp1, bool JoinedByAnd,\n match(Cmp1, m_SpecificICmp(ICmpInst::ICMP_UGT,\n m_Intrinsic<Intrinsic::ctpop>(m_Specific(X)),\n m_SpecificInt(1)))) {\n- Value *CtPop = Cmp1->getOperand(0);\n+ auto *CtPop = cast<Instruction>(Cmp1->getOperand(0));\n+ // Drop range attributes and re-infer them in the next iteration.\n+ CtPop->dropPoisonGeneratingAnnotations();\n+ IC.addToWorklist(CtPop);\n return Builder.CreateICmpNE(CtPop, ConstantInt::get(CtPop->getType(), 1));\n }\n return nullptr;\n@@ -3375,7 +3383,7 @@ Value *InstCombinerImpl::foldAndOrOfICmps(ICmpInst *LHS, ICmpInst *RHS,\n if (Value *V = foldSignedTruncationCheck(LHS, RHS, I, Builder))\n return V;\n \n- if (Value *V = foldIsPowerOf2(LHS, RHS, IsAnd, Builder))\n+ if (Value *V = foldIsPowerOf2(LHS, RHS, IsAnd, Builder, *this))\n return V;\n \n if (Value *V = foldPowerOf2AndShiftedMask(LHS, RHS, IsAnd, Builder))\n", "tests": [{"file": "llvm/test/Transforms/InstCombine/ispow2.ll", "commands": ["opt < %s -passes=instcombine -S"], "tests": [{"test_name": "has_single_bit", "test_body": "; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)\ndeclare i32 @llvm.ctpop.i32(i32) #0\n\ndefine i1 @has_single_bit(i32 %x) {\nentry:\n %cmp1 = icmp ne i32 %x, 0\n %popcnt = call range(i32 1, 33) i32 @llvm.ctpop.i32(i32 %x)\n %cmp2 = icmp ult i32 %popcnt, 2\n %sel = select i1 %cmp1, i1 %cmp2, i1 false\n ret i1 %sel\n}\n\nattributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }\n"}, {"test_name": "has_single_bit_inv", "test_body": "; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)\ndeclare i32 @llvm.ctpop.i32(i32) #0\n\ndefine i1 @has_single_bit_inv(i32 %x) {\nentry:\n %cmp1 = icmp eq i32 %x, 0\n %popcnt = call range(i32 1, 33) i32 @llvm.ctpop.i32(i32 %x)\n %cmp2 = icmp ugt i32 %popcnt, 1\n %sel = select i1 %cmp1, i1 true, i1 %cmp2\n ret i1 %sel\n}\n\nattributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }\n"}, {"test_name": "not_pow2_or_z_known_bits_fail_wrong_cmp", "test_body": "define <2 x i1> @not_pow2_or_z_known_bits_fail_wrong_cmp(<2 x i32> %xin) {\n %x = or <2 x i32> %xin, splat (i32 64)\n %cnt = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %x)\n %r = icmp ugt <2 x i32> %cnt, splat (i32 2)\n ret <2 x i1> %r\n}\n\n; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)\ndeclare <2 x i32> @llvm.ctpop.v2i32(<2 x i32>) #0\n\nattributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }\n"}]}], "issue": {"title": "[InstCombine] poison-generating attributes are not dropped when folding logical and/or of icmps", "body": "Reproducer: https://alive2.llvm.org/ce/z/rSUfvo\r\n```\r\ndefine i1 @src(i32 noundef %Value) {\r\nentry:\r\n %cmp.not = icmp eq i32 %Value, 0\r\n %0 = call range(i32 1, 33) i32 @llvm.ctpop.i32(i32 %Value)\r\n %cmp1 = icmp ult i32 %0, 2\r\n %1 = select i1 %cmp.not, i1 false, i1 %cmp1\r\n ret i1 %1\r\n}\r\n\r\ndefine i1 @tgt(i32 noundef %Value) {\r\nentry:\r\n %0 = call range(i32 1, 33) i32 @llvm.ctpop.i32(i32 %Value)\r\n %1 = icmp eq i32 %0, 1\r\n ret i1 %1\r\n}\r\n```\r\nWhen `%Value == 0`, `@src` returns `false` but `@tgt` returns `poison`.\r\nThis miscompilation was triggered after https://github.com/llvm/llvm-project/pull/111284 was landed.\r\n", "author": "dtcxzyw", "labels": ["miscompilation", "llvm:instcombine"], "comments": []}, "verified": true}
191
+ {"bug_id": "133288", "issue_url": "https://github.com/llvm/llvm-project/issues/133288", "bug_type": "crash", "base_commit": "77ba6918a14ddef4ee639bf6221cc2eb95adf320", "knowledge_cutoff": "2025-03-27T17:54:31Z", "lit_test_dir": ["llvm/test/Transforms/SLPVectorizer"], "hints": {"fix_commit": "1bfc61064ab46e44865453d2c2176f5e7f96987c", "components": ["SLPVectorizer"], "bug_location_lineno": {"llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp": [[13347, 13353]]}, "bug_location_funcname": {"llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp": ["BoUpSLP::getSpillCost"]}}, "patch": "commit 1bfc61064ab46e44865453d2c2176f5e7f96987c\nAuthor: Alexey Bataev <[email protected]>\nDate: Fri Mar 28 11:37:42 2025 -0700\n\n [SLP]Fix spill cost analysis for split vectorized nodes\n \n If the entry is SplitVectorize, it can be skipped in favor of its\n operands, operands allow correctly detect spill costs.\n \n Fixes #133288\n\ndiff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp\nindex f29fb6780253..850895895d44 100644\n--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp\n+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp\n@@ -13347,7 +13347,8 @@ InstructionCost BoUpSLP::getSpillCost() {\n for (const TreeEntry *Op : Operands) {\n if (!Op->isGather())\n LiveEntries.push_back(Op);\n- if ((Entry->getOpcode() != Instruction::PHI && Op->isGather()) ||\n+ if (Entry->State == TreeEntry::SplitVectorize ||\n+ (Entry->getOpcode() != Instruction::PHI && Op->isGather()) ||\n (Op->isGather() && allConstant(Op->Scalars)))\n continue;\n Budget = 0;\n", "tests": [{"file": "llvm/test/Transforms/SLPVectorizer/X86/split-node-parent-operands-in-spill.ll", "commands": ["opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -slp-threshold=-99999 -mattr=+sse4.1 < %s"], "tests": [{"test_name": "<module>", "test_body": "\ndefine void @test(i32 %arg) {\n;\nbb:\n %load = load i32, ptr addrspace(3) null, align 4\n %load1 = load i32, ptr addrspace(3) null, align 4\n %load2 = load i32, ptr addrspace(3) null, align 4\n %load3 = load i32, ptr addrspace(3) null, align 4\n br label %bb4\n\nbb4:\n switch i32 0, label %bb8 [\n i32 0, label %bb7\n i32 1, label %bb21\n ]\n\nbb5:\n %srem = srem i32 0, 0\n br label %bb21\n\nbb6:\n br label %bb12\n\nbb7:\n ret void\n\nbb8:\n %phi = phi i32 [ 0, %bb4 ]\n %phi9 = phi i32 [ 0, %bb4 ]\n %phi10 = phi i32 [ 0, %bb4 ]\n %phi11 = phi i32 [ 0, %bb4 ]\n br label %bb12\n\nbb12:\n %phi13 = phi i32 [ %load, %bb8 ], [ 0, %bb6 ]\n %phi14 = phi i32 [ %load1, %bb8 ], [ 0, %bb6 ]\n %phi15 = phi i32 [ %load2, %bb8 ], [ %arg, %bb6 ]\n %phi16 = phi i32 [ %load3, %bb8 ], [ 0, %bb6 ]\n %phi17 = phi i32 [ %phi, %bb8 ], [ %srem, %bb6 ]\n %phi18 = phi i32 [ %phi11, %bb8 ], [ 0, %bb6 ]\n %phi19 = phi i32 [ %phi9, %bb8 ], [ 0, %bb6 ]\n %phi20 = phi i32 [ %phi10, %bb8 ], [ 0, %bb6 ]\n ret void\n\nbb21:\n ret void\n}"}]}], "issue": {"title": "slpvectorizer crash", "body": "To reproduce run opt with the test below with -passes=slp-vectorizer -slp-threshold=-99999\n```\n; ModuleID = './reduced.ll'\nsource_filename = \"./reduced.ll\"\ntarget datalayout = \"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128-ni:1-p2:32:8:8:32-ni:2\"\ntarget triple = \"x86_64-unknown-linux-gnu\"\n\ndefine void @wombat(i32 %arg) #0 gc \"statepoint-example\" {\nbb:\n %load = load i32, ptr addrspace(3) null, align 4\n %load1 = load i32, ptr addrspace(3) null, align 4\n %load2 = load i32, ptr addrspace(3) null, align 4\n %load3 = load i32, ptr addrspace(3) null, align 4\n br label %bb4\n\nbb4: ; preds = %bb\n switch i32 0, label %bb8 [\n i32 0, label %bb7\n i32 1, label %bb21\n ]\n\nbb5: ; No predecessors!\n %srem = srem i32 0, 0\n br label %bb21\n\nbb6: ; No predecessors!\n br label %bb12\n\nbb7: ; preds = %bb4\n ret void\n\nbb8: ; preds = %bb4\n %phi = phi i32 [ 0, %bb4 ]\n %phi9 = phi i32 [ 0, %bb4 ]\n %phi10 = phi i32 [ 0, %bb4 ]\n %phi11 = phi i32 [ 0, %bb4 ]\n br label %bb12\n\nbb12: ; preds = %bb8, %bb6\n %phi13 = phi i32 [ %load, %bb8 ], [ 0, %bb6 ]\n %phi14 = phi i32 [ %load1, %bb8 ], [ 0, %bb6 ]\n %phi15 = phi i32 [ %load2, %bb8 ], [ %arg, %bb6 ]\n %phi16 = phi i32 [ %load3, %bb8 ], [ 0, %bb6 ]\n %phi17 = phi i32 [ %phi, %bb8 ], [ %srem, %bb6 ]\n %phi18 = phi i32 [ %phi11, %bb8 ], [ 0, %bb6 ]\n %phi19 = phi i32 [ %phi9, %bb8 ], [ 0, %bb6 ]\n %phi20 = phi i32 [ %phi10, %bb8 ], [ 0, %bb6 ]\n ret void\n\nbb21: ; preds = %bb5, %bb4\n ret void\n}\n\nattributes #0 = { \"target-features\"=\"+prfchw,-cldemote,+avx,+aes,+sahf,+pclmul,-xop,+crc32,-amx-fp8,+xsaves,-avx512fp16,-usermsr,-sm4,-egpr,+sse4.1,-avx512ifma,+xsave,+sse4.2,-tsxldtrk,-sm3,-ptwrite,-widekl,-movrs,-invpcid,+64bit,+xsavec,-avx10.1-512,-avx512vpopcntdq,+cmov,-avx512vp2intersect,-avx512cd,+movbe,-avxvnniint8,-ccmp,-amx-int8,-kl,-avx10.1-256,-sha512,-avxvnni,-rtm,+adx,+avx2,-hreset,-movdiri,-serialize,-vpclmulqdq,-avx512vl,-uintr,-cf,+clflushopt,-raoint,-cmpccxadd,+bmi,-amx-tile,+sse,-avx10.2-256,-gfni,-avxvnniint16,-amx-fp16,-zu,-ndd,+xsaveopt,+rdrnd,-avx512f,-amx-bf16,-avx512bf16,-avx512vnni,-push2pop2,+cx8,-avx512bw,+sse3,-pku,-nf,-amx-tf32,-amx-avx512,+fsgsbase,+clzero,-mwaitx,-lwp,+lzcnt,+sha,-movdir64b,-ppx,+wbnoinvd,-enqcmd,-amx-transpose,-avx10.2-512,-avxneconvert,-tbm,-pconfig,-amx-complex,+ssse3,+cx16,+bmi2,+fma,+popcnt,-avxifma,+f16c,-avx512bitalg,-rdpru,+clwb,+mmx,+sse2,+rdseed,-avx512vbmi2,-prefetchi,-amx-movrs,+rdpid,-fma4,-avx512vbmi,-shstk,-vaes,-waitpkg,-sgx,+fxsr,-avx512dq,+sse4a\" }\n```\nReproducer: https://godbolt.org/z/1E6shqxdd\n\nStack dump:\n```\n0.\tProgram arguments: /opt/compiler-explorer/clang-assertions-trunk/bin/opt -o /app/output.s -S -passes=slp-vectorizer -slp-threshold=-99999 <source>\n1.\tRunning pass \"function(slp-vectorizer)\" on module \"<source>\"\n2.\tRunning pass \"slp-vectorizer\" on function \"wombat\"\n #0 0x000000000549f758 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x549f758)\n #1 0x000000000549d0e4 SignalHandler(int, siginfo_t*, void*) Signals.cpp:0:0\n #2 0x00007d8bfda42520 (/lib/x86_64-linux-gnu/libc.so.6+0x42520)\n #3 0x00000000017c9e90 llvm::BasicBlock::getTerminator() const (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x17c9e90)\n #4 0x0000000004492866 llvm::slpvectorizer::BoUpSLP::getSpillCost() (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x4492866)\n #5 0x00000000044fbea8 llvm::slpvectorizer::BoUpSLP::getTreeCost(llvm::ArrayRef<llvm::Value*>, llvm::InstructionCost) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x44fbea8)\n #6 0x0000000004504152 llvm::SLPVectorizerPass::tryToVectorizeList(llvm::ArrayRef<llvm::Value*>, llvm::slpvectorizer::BoUpSLP&, bool) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x4504152)\n #7 0x000000000450937d bool tryToVectorizeSequence<llvm::Value>(llvm::SmallVectorImpl<llvm::Value*>&, llvm::function_ref<bool (llvm::Value*, llvm::Value*)>, llvm::function_ref<bool (llvm::Value*, llvm::Value*)>, llvm::function_ref<bool (llvm::ArrayRef<llvm::Value*>, bool)>, bool, llvm::slpvectorizer::BoUpSLP&) (.constprop.0) SLPVectorizer.cpp:0:0\n #8 0x000000000450ad55 llvm::SLPVectorizerPass::vectorizeChainsInBlock(llvm::BasicBlock*, llvm::slpvectorizer::BoUpSLP&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x450ad55)\n #9 0x0000000004512cbe llvm::SLPVectorizerPass::runImpl(llvm::Function&, llvm::ScalarEvolution*, llvm::TargetTransformInfo*, llvm::TargetLibraryInfo*, llvm::AAResults*, llvm::LoopInfo*, llvm::DominatorTree*, llvm::AssumptionCache*, llvm::DemandedBits*, llvm::OptimizationRemarkEmitter*) (.part.0) SLPVectorizer.cpp:0:0\n#10 0x000000000451387b llvm::SLPVectorizerPass::run(llvm::Function&, llvm::AnalysisManager<llvm::Function>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x451387b)\n#11 0x00000000031ad81e llvm::detail::PassModel<llvm::Function, llvm::SLPVectorizerPass, llvm::AnalysisManager<llvm::Function>>::run(llvm::Function&, llvm::AnalysisManager<llvm::Function>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x31ad81e)\n#12 0x000000000529b7a0 llvm::PassManager<llvm::Function, llvm::AnalysisManager<llvm::Function>>::run(llvm::Function&, llvm::AnalysisManager<llvm::Function>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x529b7a0)\n#13 0x0000000000e7a28e llvm::detail::PassModel<llvm::Function, llvm::PassManager<llvm::Function, llvm::AnalysisManager<llvm::Function>>, llvm::AnalysisManager<llvm::Function>>::run(llvm::Function&, llvm::AnalysisManager<llvm::Function>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0xe7a28e)\n#14 0x000000000529a073 llvm::ModuleToFunctionPassAdaptor::run(llvm::Module&, llvm::AnalysisManager<llvm::Module>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x529a073)\n#15 0x0000000000e792ae llvm::detail::PassModel<llvm::Module, llvm::ModuleToFunctionPassAdaptor, llvm::AnalysisManager<llvm::Module>>::run(llvm::Module&, llvm::AnalysisManager<llvm::Module>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0xe792ae)\n#16 0x0000000005299a80 llvm::PassManager<llvm::Module, llvm::AnalysisManager<llvm::Module>>::run(llvm::Module&, llvm::AnalysisManager<llvm::Module>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x5299a80)\n#17 0x000000000093f60a llvm::runPassPipeline(llvm::StringRef, llvm::Module&, llvm::TargetMachine*, llvm::TargetLibraryInfoImpl*, llvm::ToolOutputFile*, llvm::ToolOutputFile*, llvm::ToolOutputFile*, llvm::StringRef, llvm::ArrayRef<llvm::PassPlugin>, llvm::ArrayRef<std::function<void (llvm::PassBuilder&)>>, llvm::opt_tool::OutputKind, llvm::opt_tool::VerifierKind, bool, bool, bool, bool, bool, bool, bool) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x93f60a)\n#18 0x0000000000932cfc optMain (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x932cfc)\n#19 0x00007d8bfda29d90 (/lib/x86_64-linux-gnu/libc.so.6+0x29d90)\n#20 0x00007d8bfda29e40 __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x29e40)\n#21 0x000000000092a935 _start (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x92a935)\nProgram terminated with signal: SIGSEGV\nCompiler returned: 139\n```", "author": "TatyanaDoubts", "labels": ["llvm:SLPVectorizer", "crash"], "comments": []}, "verified": true}
192
  {"bug_id": "98660", "issue_url": "https://github.com/llvm/llvm-project/issues/98660", "bug_type": "crash", "base_commit": "efde640cdfede834fa79e0eea69f82fb769d6beb", "knowledge_cutoff": "2024-07-12T16:45:01Z", "lit_test_dir": ["llvm/test/Transforms/LoopVectorize"], "hints": {"fix_commit": "fc9cd3272b50f4ee9f18c4ab82c278bbb014d99f", "components": ["LoopVectorize"], "bug_location_lineno": {"llvm/lib/Transforms/Vectorize/LoopVectorize.cpp": [[8693, 8698]]}, "bug_location_funcname": {"llvm/lib/Transforms/Vectorize/LoopVectorize.cpp": ["addUsersInExitBlock"]}}, "patch": "commit fc9cd3272b50f4ee9f18c4ab82c278bbb014d99f\nAuthor: Florian Hahn <[email protected]>\nDate: Sun Jul 14 20:49:03 2024 +0100\n\n [VPlan] Don't add live-outs for IV phis.\n \n Resume and exit values for inductions are currently still created\n outside of VPlan and independent of the induction recipes. Don't add\n live-outs for now, as the additional unneeded users can pessimize other\n anlysis.\n \n Fixes https://github.com/llvm/llvm-project/issues/98660.\n\ndiff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp\nindex 7d37d67cde29..5520baef7152 100644\n--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp\n+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp\n@@ -8693,6 +8693,14 @@ static void addUsersInExitBlock(VPBasicBlock *HeaderVPBB, Loop *OrigLoop,\n Value *IncomingValue =\n ExitPhi.getIncomingValueForBlock(ExitingBB);\n VPValue *V = Builder.getVPValueOrAddLiveIn(IncomingValue, Plan);\n+ // Exit values for inductions are computed and updated outside of VPlan and\n+ // independent of induction recipes.\n+ // TODO: Compute induction exit values in VPlan, use VPLiveOuts to update\n+ // live-outs.\n+ if ((isa<VPWidenIntOrFpInductionRecipe>(V) &&\n+ !cast<VPWidenIntOrFpInductionRecipe>(V)->getTruncInst()) ||\n+ isa<VPWidenPointerInductionRecipe>(V))\n+ continue;\n Plan.addLiveOut(&ExitPhi, V);\n }\n }\n", "tests": [{"file": "llvm/test/Transforms/LoopVectorize/AArch64/sve-live-out-pointer-induction.ll", "commands": ["opt -passes=loop-vectorize -mtriple=aarch64-unknown -mattr=+sve -S %s"], "tests": [{"test_name": "test", "test_body": "define ptr @test(ptr %start.1, ptr %start.2, ptr %end) {\nentry:\n br label %loop\n\nloop: ; preds = %loop, %entry\n %iv.1 = phi ptr [ %start.1, %entry ], [ %iv.1.next, %loop ]\n %iv.2 = phi ptr [ %start.2, %entry ], [ %iv.2.next, %loop ]\n store i64 0, ptr %iv.2, align 4\n %iv.2.next = getelementptr inbounds ptr, ptr %iv.2, i64 1\n %iv.1.next = getelementptr inbounds ptr, ptr %iv.1, i64 1\n %cmp.i.i.not.i = icmp eq ptr %iv.2.next, %end\n br i1 %cmp.i.i.not.i, label %exit, label %loop\n\nexit: ; preds = %loop\n %res.lcssa = phi ptr [ %iv.1, %loop ]\n ret ptr %res.lcssa\n}\n"}]}, {"file": "llvm/test/Transforms/LoopVectorize/X86/ephemeral-recipes.ll", "commands": ["opt -p loop-vectorize -S %s"], "tests": [{"test_name": "ephemeral_load_and_compare_iv_used_outside", "test_body": "target datalayout = \"e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128\"\ntarget triple = \"x86_64-apple-macosx\"\n\ndefine i32 @ephemeral_load_and_compare_iv_used_outside(ptr %start, ptr %end) #0 {\nentry:\n br label %loop\n\nloop: ; preds = %loop, %entry\n %iv = phi ptr [ %start, %entry ], [ %iv.next, %loop ]\n %iv.next = getelementptr nusw i8, ptr %iv, i64 -8\n %l1 = load i32, ptr %iv, align 4\n %cmp = icmp ne i32 %l1, 0\n call void @llvm.assume(i1 %cmp)\n %cmp.not = icmp eq ptr %iv, %end\n br i1 %cmp.not, label %exit, label %loop\n\nexit: ; preds = %loop\n %final.load = load i32, ptr %iv, align 4\n ret i32 %final.load\n}\n\n; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write)\ndeclare void @llvm.assume(i1 noundef) #1\n\nattributes #0 = { \"target-cpu\"=\"skylake-avx512\" }\nattributes #1 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write) }\n"}]}, {"file": "llvm/test/Transforms/LoopVectorize/X86/iv-live-outs.ll", "commands": ["opt -p loop-vectorize -mcpu=skylake-avx512 -S %s"], "tests": [{"test_name": "<module>", "test_body": "\ntarget triple = \"x86_64-unknown-linux-gnu\"\n\ndefine i64 @test_pr98660(ptr %dst, i64 %N) {\n;\nentry:\n br label %loop.header\n\nloop.header:\n %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]\n %or = or disjoint i64 %iv, 1\n %gep = getelementptr i32, ptr %dst, i64 %or\n %l = load i32, ptr %gep\n %c = icmp eq i32 %l, 0\n br i1 %c, label %then, label %loop.latch\n\nthen:\n store i32 0, ptr %gep, align 4\n br label %loop.latch\n\nloop.latch:\n %iv.next = add i64 %iv, 1\n %ec = icmp ult i64 %iv, %N\n br i1 %ec, label %loop.header, label %exit\n\nexit:\n %ret = phi i64 [ %iv, %loop.latch ]\n ret i64 %ret\n}\n;.\n;."}]}, {"file": "llvm/test/Transforms/LoopVectorize/iv_outside_user.ll", "commands": ["opt -S -passes=loop-vectorize -force-vector-interleave=1 -force-vector-width=2 < %s", "opt -S -passes=loop-vectorize -force-vector-interleave=2 -force-vector-width=1 < %s"], "tests": [{"test_name": "iv_2_dead_in_loop_only_used_outside", "test_body": "define i32 @iv_2_dead_in_loop_only_used_outside(ptr %ptr) {\nentry:\n br label %loop\n\nloop: ; preds = %loop, %entry\n %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]\n %iv.2 = phi i32 [ 0, %entry ], [ %iv.2.next, %loop ]\n %iv.next = add nuw i64 %iv, 1\n %iv.2.next = add nuw i32 %iv.2, 2\n %gep.ptr = getelementptr inbounds i64, ptr %ptr, i64 %iv\n store i64 %iv, ptr %gep.ptr, align 4\n %exitcond = icmp ugt i64 %iv, 1000\n br i1 %exitcond, label %exit, label %loop\n\nexit: ; preds = %loop\n %iv.2.lcssa = phi i32 [ %iv.2, %loop ]\n ret i32 %iv.2.lcssa\n}\n"}]}, {"file": "llvm/test/Transforms/LoopVectorize/no-fold-tail-by-masking-iv-external-uses.ll", "commands": ["opt < %s -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S"], "tests": [{"test_name": "test", "test_body": "define i32 @test(ptr %arr, i64 %n) {\nentry:\n %cmp1 = icmp ugt i64 %n, 1\n br i1 %cmp1, label %preheader, label %done\n\npreheader: ; preds = %entry\n br label %loop\n\nloop: ; preds = %loop, %preheader\n %conv = phi i64 [ %conv2, %loop ], [ 1, %preheader ]\n %i = phi i8 [ %inc, %loop ], [ 1, %preheader ]\n %sub = add nsw i64 %conv, -1\n %ptr = getelementptr inbounds i32, ptr %arr, i64 %sub\n store i32 65, ptr %ptr, align 4\n %inc = add i8 %i, 1\n %conv2 = zext i8 %inc to i64\n %cmp2 = icmp ult i64 %conv2, %n\n br i1 %cmp2, label %loop, label %load_val, !llvm.loop !0\n\nload_val: ; preds = %loop\n %final = phi i64 [ %conv, %loop ]\n %ptr2 = getelementptr inbounds i32, ptr %arr, i64 %final\n %val = load i32, ptr %ptr2, align 4\n br label %done\n\ndone: ; preds = %load_val, %entry\n %value = phi i32 [ %val, %load_val ], [ 0, %entry ]\n ret i32 %value\n}\n\n!0 = distinct !{!0, !1, !2, !3}\n!1 = !{!\"llvm.loop.unroll.disable\"}\n!2 = !{!\"llvm.loop.vectorize.predicate.enable\", i1 true}\n!3 = !{!\"llvm.loop.vectorize.enable\", i1 true}\n"}]}, {"file": "llvm/test/Transforms/LoopVectorize/pr58811-scev-expansion.ll", "commands": ["opt -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S %s"], "tests": [{"test_name": "test1_pr58811", "test_body": "define void @test1_pr58811() {\nentry:\n br label %loop.1.preheader\n\nloop.1.preheader: ; preds = %unreachable.bb, %entry\n %iv.1.ph = phi i32 [ %sub93.2, %unreachable.bb ], [ 0, %entry ]\n br label %loop.1\n\nloop.1: ; preds = %loop.1, %loop.1.preheader\n %iv.1 = phi i32 [ %iv.1.next, %loop.1 ], [ %iv.1.ph, %loop.1.preheader ]\n %iv.2 = phi i32 [ %iv.2.next, %loop.1 ], [ 0, %loop.1.preheader ]\n %iv.2.next = add i32 %iv.2, 1\n %iv.1.next = add i32 %iv.2, %iv.1\n br i1 false, label %loop.1, label %loop.2.preheader\n\nloop.2.preheader: ; preds = %loop.1\n %iv.1.lcssa = phi i32 [ %iv.1, %loop.1 ]\n br label %loop.2\n\nloop.2: ; preds = %loop.2, %loop.2.preheader\n %iv.3 = phi i16 [ %iv.3.next, %loop.2 ], [ 0, %loop.2.preheader ]\n %iv.4 = phi i32 [ %iv.4.next, %loop.2 ], [ 0, %loop.2.preheader ]\n %iv.4.next = sub i32 %iv.4, %iv.1.lcssa\n %iv.3.next = add i16 %iv.3, 1\n %cmp88.1 = icmp ult i16 %iv.3, 198\n br i1 %cmp88.1, label %loop.2, label %loop.3.preheader\n\nloop.3.preheader: ; preds = %loop.2\n %iv.4.lcssa = phi i32 [ %iv.4, %loop.2 ]\n br label %loop.3\n\nloop.3: ; preds = %loop.3, %loop.3.preheader\n %iv.5 = phi i32 [ %sub93.2, %loop.3 ], [ 0, %loop.3.preheader ]\n %sub93.2 = sub i32 %iv.5, %iv.4.lcssa\n br label %loop.3\n\nunreachable.bb: ; No predecessors!\n br label %loop.1.preheader\n}\n"}, {"test_name": "test2_pr58811", "test_body": "define void @test2_pr58811() {\nentry:\n br label %loop.1.header\n\nloop.1.header: ; preds = %loop.4, %entry\n %p.1 = phi i32 [ 0, %entry ], [ %sub93.2, %loop.4 ]\n br label %loop.2\n\nloop.2: ; preds = %loop.2, %loop.1.header\n %iv.2 = phi i32 [ %p.1, %loop.1.header ], [ %add101, %loop.2 ]\n %iv.3 = phi i32 [ 0, %loop.1.header ], [ %sub93, %loop.2 ]\n %sub93 = add i32 %iv.3, 1\n %add101 = add i32 %iv.3, %iv.2\n br i1 false, label %loop.2, label %loop.3\n\nloop.3: ; preds = %loop.3, %loop.2\n %iv.4 = phi i16 [ 0, %loop.2 ], [ %inc.1, %loop.3 ]\n %iv.5 = phi i32 [ 0, %loop.2 ], [ %sub93.1, %loop.3 ]\n %sub93.1 = sub i32 %iv.5, %iv.2\n %inc.1 = add i16 %iv.4, 1\n %cmp88.1 = icmp ult i16 %iv.4, 198\n br i1 %cmp88.1, label %loop.3, label %loop.4\n\nloop.4: ; preds = %loop.4, %loop.3\n %iv.6 = phi i32 [ 0, %loop.3 ], [ %sub93.2, %loop.4 ]\n %sub93.2 = sub i32 %iv.6, %iv.5\n br i1 false, label %loop.4, label %loop.1.header\n}\n"}, {"test_name": "test3_pr58811", "test_body": "define void @test3_pr58811() {\nentry:\n br label %loop.1.header\n\nloop.1.header: ; preds = %loop.1.latch, %entry\n %p.1 = phi i32 [ 0, %entry ], [ %sub93.2, %loop.1.latch ]\n %rem85 = urem i32 1, %p.1\n br label %loop.2\n\nloop.2: ; preds = %loop.2, %loop.1.header\n %p.2 = phi i32 [ 1, %loop.1.header ], [ 0, %loop.2 ]\n %add101 = add i32 %rem85, %p.2\n br i1 false, label %loop.2, label %loop.3\n\nloop.3: ; preds = %loop.3, %loop.2\n %iv.3 = phi i16 [ 0, %loop.2 ], [ %inc.1, %loop.3 ]\n %iv.4 = phi i32 [ 0, %loop.2 ], [ %sub93.1, %loop.3 ]\n %sub93.1 = sub i32 %iv.4, %add101\n %inc.1 = add i16 %iv.3, 1\n %cmp88.1 = icmp ult i16 %iv.3, 198\n br i1 %cmp88.1, label %loop.3, label %loop.4\n\nloop.4: ; preds = %loop.4, %loop.3\n %iv.5 = phi i32 [ 0, %loop.3 ], [ %sub93.2, %loop.4 ]\n %sub93.2 = sub i32 %iv.5, %iv.4\n br label %loop.4\n\nloop.1.latch: ; No predecessors!\n br label %loop.1.header\n}\n"}]}], "issue": {"title": "Assertion `(VF.isScalar() || Def->isLiveIn() || hasVectorValue(Def, Part) || (hasScalarValue(Def, VPIteration(Part, 0)) && Data.PerPartScalars[Def][Part].size() == 1)) && \"Trying to access a single scalar per part but has multiple scalars \" \"per part.\"' failed.", "body": "To reproduce run opt opt with -passes loop-vectorize with the following test:\r\n```\r\n; ModuleID = './reduced.ll'\r\nsource_filename = \"./reduced.ll\"\r\ntarget datalayout = \"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128-ni:1-p2:32:8:8:32-ni:2\"\r\ntarget triple = \"x86_64-unknown-linux-gnu\"\r\n\r\ndefine void @wombat(i64 %arg) #0 gc \"statepoint-example\" {\r\nbb:\r\n br label %bb1\r\n\r\nbb1: ; preds = %bb3, %bb\r\n %phi = phi i64 [ 0, %bb ], [ %add, %bb3 ]\r\n br i1 false, label %bb2, label %bb3\r\n\r\nbb2: ; preds = %bb1\r\n %or = or disjoint i64 %phi, 0\r\n %getelementptr = getelementptr i32, ptr addrspace(1) null, i64 %or\r\n store i32 0, ptr addrspace(1) %getelementptr, align 4\r\n br label %bb3\r\n\r\nbb3: ; preds = %bb2, %bb1\r\n %add = add i64 %phi, 1\r\n %icmp = icmp ult i64 %phi, %arg\r\n br i1 %icmp, label %bb1, label %bb4\r\n\r\nbb4: ; preds = %bb3\r\n %phi5 = phi i64 [ %phi, %bb3 ]\r\n ret void\r\n}\r\n\r\nattributes #0 = { \"target-features\"=\"+prfchw,-cldemote,+avx,+aes,+sahf,+pclmul,-xop,+crc32,+xsaves,-avx512fp16,-usermsr,-sm4,-egpr,+sse4.1,-avx512ifma,+xsave,+sse4.2,-tsxldtrk,-sm3,-ptwrite,-widekl,+invpcid,+64bit,+xsavec,-avx10.1-512,-avx512vpopcntdq,+cmov,-avx512vp2intersect,+avx512cd,+movbe,-avxvnniint8,-ccmp,-amx-int8,-kl,-avx10.1-256,+evex512,-avxvnni,+rtm,+adx,+avx2,-hreset,-movdiri,-serialize,-sha512,-vpclmulqdq,+avx512vl,-uintr,-cf,+clflushopt,-raoint,-cmpccxadd,+bmi,-amx-tile,+sse,-gfni,-avxvnniint16,-amx-fp16,-ndd,+xsaveopt,+rdrnd,+avx512f,-amx-bf16,-avx512bf16,-avx512vnni,-push2pop2,+cx8,+avx512bw,+sse3,+pku,+fsgsbase,-clzero,-mwaitx,-lwp,+lzcnt,-sha,-movdir64b,-ppx,-wbnoinvd,-enqcmd,-avxneconvert,-tbm,-pconfig,-amx-complex,+ssse3,+cx16,+bmi2,+fma,+popcnt,-avxifma,+f16c,-avx512bitalg,-rdpru,+clwb,+mmx,+sse2,+rdseed,-avx512vbmi2,-prefetchi,-rdpid,-fma4,-avx512vbmi,-shstk,-vaes,-waitpkg,-sgx,+fxsr,+avx512dq,-sse4a,-avx512f\" }\r\n```\r\nReproducer:\r\nhttps://godbolt.org/z/Ghz3147nj\r\n\r\nStack dump:\r\n```\r\n0.\tProgram arguments: /opt/compiler-explorer/clang-assertions-trunk/bin/opt -o /app/output.s -S -passes loop-vectorize <source>\r\n1.\tRunning pass \"function(loop-vectorize<no-interleave-forced-only;no-vectorize-forced-only;>)\" on module \"<source>\"\r\n2.\tRunning pass \"loop-vectorize<no-interleave-forced-only;no-vectorize-forced-only;>\" on function \"wombat\"\r\n #0 0x0000000004e9b948 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x4e9b948)\r\n #1 0x0000000004e990bc SignalHandler(int) Signals.cpp:0:0\r\n #2 0x000070edf8442520 (/lib/x86_64-linux-gnu/libc.so.6+0x42520)\r\n #3 0x000070edf84969fc pthread_kill (/lib/x86_64-linux-gnu/libc.so.6+0x969fc)\r\n #4 0x000070edf8442476 gsignal (/lib/x86_64-linux-gnu/libc.so.6+0x42476)\r\n #5 0x000070edf84287f3 abort (/lib/x86_64-linux-gnu/libc.so.6+0x287f3)\r\n #6 0x000070edf842871b (/lib/x86_64-linux-gnu/libc.so.6+0x2871b)\r\n #7 0x000070edf8439e96 (/lib/x86_64-linux-gnu/libc.so.6+0x39e96)\r\n #8 0x00000000040395f7 llvm::VPTransformState::get(llvm::VPValue*, unsigned int, bool) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x40395f7)\r\n #9 0x0000000004056ece llvm::VPInstruction::generatePerPart(llvm::VPTransformState&, unsigned int) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x4056ece)\r\n#10 0x00000000040595ee llvm::VPInstruction::execute(llvm::VPTransformState&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x40595ee)\r\n#11 0x0000000004030a1f llvm::VPBasicBlock::executeRecipes(llvm::VPTransformState*, llvm::BasicBlock*) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x4030a1f)\r\n#12 0x00000000040320e8 llvm::VPBasicBlock::execute(llvm::VPTransformState*) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x40320e8)\r\n#13 0x0000000004030612 llvm::VPRegionBlock::execute(llvm::VPTransformState*) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x4030612)\r\n#14 0x0000000004039946 llvm::VPlan::execute(llvm::VPTransformState*) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x4039946)\r\n#15 0x0000000003f1d475 llvm::LoopVectorizationPlanner::executePlan(llvm::ElementCount, unsigned int, llvm::VPlan&, llvm::InnerLoopVectorizer&, llvm::DominatorTree*, bool, llvm::DenseMap<llvm::SCEV const*, llvm::Value*, llvm::DenseMapInfo<llvm::SCEV const*, void>, llvm::detail::DenseMapPair<llvm::SCEV const*, llvm::Value*>> const*) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x3f1d475)\r\n#16 0x0000000003f332ea llvm::LoopVectorizePass::processLoop(llvm::Loop*) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x3f332ea)\r\n#17 0x0000000003f35a29 llvm::LoopVectorizePass::runImpl(llvm::Function&, llvm::ScalarEvolution&, llvm::LoopInfo&, llvm::TargetTransformInfo&, llvm::DominatorTree&, llvm::BlockFrequencyInfo*, llvm::TargetLibraryInfo*, llvm::DemandedBits&, llvm::AssumptionCache&, llvm::LoopAccessInfoManager&, llvm::OptimizationRemarkEmitter&, llvm::ProfileSummaryInfo*) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x3f35a29)\r\n#18 0x0000000003f3614b llvm::LoopVectorizePass::run(llvm::Function&, llvm::AnalysisManager<llvm::Function>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x3f3614b)\r\n#19 0x0000000002e212be llvm::detail::PassModel<llvm::Function, llvm::LoopVectorizePass, llvm::AnalysisManager<llvm::Function>>::run(llvm::Function&, llvm::AnalysisManager<llvm::Function>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x2e212be)\r\n#20 0x0000000004c9f2d8 llvm::PassManager<llvm::Function, llvm::AnalysisManager<llvm::Function>>::run(llvm::Function&, llvm::AnalysisManager<llvm::Function>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x4c9f2d8)\r\n#21 0x0000000000dc9bee llvm::detail::PassModel<llvm::Function, llvm::PassManager<llvm::Function, llvm::AnalysisManager<llvm::Function>>, llvm::AnalysisManager<llvm::Function>>::run(llvm::Function&, llvm::AnalysisManager<llvm::Function>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0xdc9bee)\r\n#22 0x0000000004c9dd46 llvm::ModuleToFunctionPassAdaptor::run(llvm::Module&, llvm::AnalysisManager<llvm::Module>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x4c9dd46)\r\n#23 0x0000000000dca1fe llvm::detail::PassModel<llvm::Module, llvm::ModuleToFunctionPassAdaptor, llvm::AnalysisManager<llvm::Module>>::run(llvm::Module&, llvm::AnalysisManager<llvm::Module>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0xdca1fe)\r\n#24 0x0000000004c9bf10 llvm::PassManager<llvm::Module, llvm::AnalysisManager<llvm::Module>>::run(llvm::Module&, llvm::AnalysisManager<llvm::Module>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x4c9bf10)\r\n#25 0x00000000008db1d2 llvm::runPassPipeline(llvm::StringRef, llvm::Module&, llvm::TargetMachine*, llvm::TargetLibraryInfoImpl*, llvm::ToolOutputFile*, llvm::ToolOutputFile*, llvm::ToolOutputFile*, llvm::StringRef, llvm::ArrayRef<llvm::PassPlugin>, llvm::ArrayRef<std::function<void (llvm::PassBuilder&)>>, llvm::opt_tool::OutputKind, llvm::opt_tool::VerifierKind, bool, bool, bool, bool, bool, bool, bool) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x8db1d2)\r\n#26 0x00000000008ce0fc optMain (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x8ce0fc)\r\n#27 0x000070edf8429d90 (/lib/x86_64-linux-gnu/libc.so.6+0x29d90)\r\n#28 0x000070edf8429e40 __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x29e40)\r\n#29 0x00000000008c556e _start (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x8c556e)\r\nProgram terminated with signal: SIGSEGV\r\nCompiler returned: 139\r\n```", "author": "TatyanaDoubts", "labels": ["vectorizers", "crash"], "comments": [{"author": "fhahn", "body": "Interesting, let me take a look"}]}, "verified": true}
193
  {"bug_id": "89516", "issue_url": "https://github.com/llvm/llvm-project/issues/89516", "bug_type": "miscompilation", "base_commit": "18bb175428f520aaa4a5e388bd3b680a1a7c60c0", "knowledge_cutoff": "2024-04-20T22:58:16Z", "lit_test_dir": ["llvm/test/Transforms/InstCombine"], "hints": {"fix_commit": "6309440c218778db027306826993e484eab2be17", "components": ["InstCombine"], "bug_location_lineno": {"llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp": [[2720, 2726]]}, "bug_location_funcname": {"llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp": ["foldSelectWithSRem"]}}, "patch": "commit 6309440c218778db027306826993e484eab2be17\nAuthor: Yingwei Zheng <[email protected]>\nDate: Sun Apr 21 22:41:32 2024 +0800\n\n [InstCombine] Fix unexpected overwriting in `foldSelectWithSRem` (#89539)\n \n Fixes #89516\n\ndiff --git a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp\nindex 0262af28068b..73600206a55c 100644\n--- a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp\n+++ b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp\n@@ -2720,7 +2720,7 @@ static Instruction *foldSelectWithSRem(SelectInst &SI, InstCombinerImpl &IC,\n // %cnd = icmp slt i32 %rem, 0\n // %add = add i32 %rem, %n\n // %sel = select i1 %cnd, i32 %add, i32 %rem\n- if (match(TrueVal, m_Add(m_Value(RemRes), m_Value(Remainder))) &&\n+ if (match(TrueVal, m_Add(m_Specific(RemRes), m_Value(Remainder))) &&\n match(RemRes, m_SRem(m_Value(Op), m_Specific(Remainder))) &&\n IC.isKnownToBeAPowerOfTwo(Remainder, /*OrZero*/ true) &&\n FalseVal == RemRes)\n", "tests": [{"file": "llvm/test/Transforms/InstCombine/select-divrem.ll", "commands": ["opt < %s -passes=instcombine -S"], "tests": [{"test_name": "rem_euclid_pow2_false_arm_folded", "test_body": "define i32 @rem_euclid_pow2_false_arm_folded(i32 %n) {\n %rem = srem i32 %n, 2\n %nonneg = icmp sge i32 %rem, 0\n %res = select i1 %nonneg, i32 %rem, i32 1\n ret i32 %res\n}\n"}, {"test_name": "pr89516", "test_body": "define i8 @pr89516(i8 %n, i8 %x) {\n %cond = icmp slt i8 %x, 0\n %pow2 = shl nuw i8 1, %n\n %srem = srem i8 1, %pow2\n %add = add nuw i8 %srem, %pow2\n %res = select i1 %cond, i8 %add, i8 %srem\n ret i8 %res\n}\n"}]}], "issue": {"title": "miscompile of vanilla integer code by InstCombine", "body": "https://alive2.llvm.org/ce/z/jRfVLr\r\n\r\nthis function:\r\n```llvm\r\ndefine i8 @f(i8 %0, i8 %1) {\r\n %3 = icmp slt i8 %1, 0\r\n %4 = shl i8 1, %0\r\n %5 = srem i8 1, %4\r\n %6 = add i8 %5, %4\r\n %7 = select i1 %3, i8 %6, i8 %5\r\n ret i8 %7\r\n}\r\n```\r\nis getting mis-optimized to:\r\n```llvm\r\ndefine i8 @f(i8 %0, i8 %1) {\r\n %3 = icmp ne i8 %0, 0\r\n %4 = zext i1 %3 to i8\r\n ret i8 %4\r\n}\r\n```\r\nhere I'll just give Alive's work:\r\n```\r\nExample:\r\ni8 %#0 = #x00 (0)\r\ni8 %#1 = #xff (255, -1)\r\n\r\nSource:\r\ni1 %#3 = #x1 (1)\r\ni8 %#4 = #x01 (1)\r\ni8 %#5 = #x00 (0)\r\ni8 %#6 = #x01 (1)\r\ni8 %#7 = #x01 (1)\r\n\r\nTarget:\r\ni1 %#3 = #x0 (0)\r\ni8 %#4 = #x00 (0)\r\nSource value: #x01 (1)\r\nTarget value: #x00 (0)\r\n```\r\n\r\ncc @nunoplopes @hatsunespica", "author": "regehr", "labels": ["miscompilation", "llvm:instcombine"], "comments": []}, "verified": true}
194
  {"bug_id": "98139", "issue_url": "https://github.com/llvm/llvm-project/issues/98139", "bug_type": "miscompilation", "base_commit": "6aefa918768c834ec21e0b599fa14d03b9ce3dc0", "knowledge_cutoff": "2024-07-09T09:49:19Z", "lit_test_dir": ["llvm/test/Transforms/InstCombine"], "hints": {"fix_commit": "722151664ecfd53295392ad875ff9bfdcd1deaaf", "components": ["InstCombine"], "bug_location_lineno": {"llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp": [[411, 417]]}, "bug_location_funcname": {"llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp": ["InstCombinerImpl::SimplifyDemandedUseBits"]}}, "patch": "commit 722151664ecfd53295392ad875ff9bfdcd1deaaf\nAuthor: Yingwei Zheng <[email protected]>\nDate: Tue Jul 9 22:04:55 2024 +0800\n\n [InstCombine] Fix typo in `adjustKnownBitsForSelectArm` (#98155)\n \n Fixes https://github.com/llvm/llvm-project/issues/98139.\n\ndiff --git a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp\nindex 98f085a2c756..081e783c964f 100644\n--- a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp\n+++ b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp\n@@ -411,7 +411,7 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Instruction *I,\n // Only known if known in both the LHS and RHS.\n adjustKnownBitsForSelectArm(LHSKnown, I->getOperand(0), I->getOperand(1),\n /*Invert=*/false, Depth, Q);\n- adjustKnownBitsForSelectArm(LHSKnown, I->getOperand(0), I->getOperand(2),\n+ adjustKnownBitsForSelectArm(RHSKnown, I->getOperand(0), I->getOperand(2),\n /*Invert=*/true, Depth, Q);\n Known = LHSKnown.intersectWith(RHSKnown);\n break;\n", "tests": [{"file": "llvm/test/Transforms/InstCombine/pr98139.ll", "commands": ["opt -S -passes=instcombine < %s"], "tests": [{"test_name": "pr98139", "test_body": "define i8 @pr98139(i16 %a, i16 %b, i1 %cond) {\n %sel = select i1 %cond, i16 1, i16 254\n %cond1 = icmp ne i16 %b, 0\n %mask = and i16 %a, 255\n %cond2 = icmp ne i16 %mask, 255\n %cond3 = or i1 %cond1, %cond2\n %sel2 = select i1 %cond3, i16 %sel, i16 255\n %sub = sub i16 %sel2, %a\n %trunc = trunc i16 %sub to i8\n ret i8 %trunc\n}\n"}]}], "issue": {"title": "wrong code at -O{s,2,3} on x86_64-linux-gnu", "body": "It appears to be a recent regression as it doesn't reproduce with 18.1.0 and earlier.\r\n\r\nCompiler Explorer: https://godbolt.org/z/o595xsMdb\r\n\r\n```\r\n[512] % clangtk -v\r\nclang version 19.0.0git (https://github.com/llvm/llvm-project.git 765e2f9a8de27cc8fd8c75540844e9630d8229ad)\r\nTarget: x86_64-unknown-linux-gnu\r\nThread model: posix\r\nInstalledDir: /local/suz-local/software/local/clang-trunk/bin\r\nBuild config: +assertions\r\nFound candidate GCC installation: /usr/lib/gcc/x86_64-linux-gnu/10\r\nFound candidate GCC installation: /usr/lib/gcc/x86_64-linux-gnu/11\r\nFound candidate GCC installation: /usr/lib/gcc/x86_64-linux-gnu/9\r\nSelected GCC installation: /usr/lib/gcc/x86_64-linux-gnu/11\r\nCandidate multilib: .;@m64\r\nSelected multilib: .;@m64\r\n[513] % \r\n[513] % clangtk -O1 small.c; ./a.out\r\n1\r\n[514] % clangtk -O3 small.c; ./a.out\r\n-2\r\n1\r\n[515] % cat small.c\r\nint printf(const char *, ...);\r\nint a, b, c, e;\r\nchar d;\r\nint main() {\r\n int f = 1;\r\n unsigned g = 1;\r\n for (; c < 2; c++) {\r\n if (g)\r\n b = 1;\r\n char h = f;\r\n f = ~h;\r\n d = ~b - ~g * (a || f);\r\n g = ~g;\r\n if (g < 1)\r\n break;\r\n if (d)\r\n printf(\"%d\\n\", g);\r\n f = e;\r\n }\r\n return 0;\r\n}\r\n```", "author": "zhendongsu", "labels": ["miscompilation", "confirmed", "llvm:instcombine"], "comments": [{"author": "dtcxzyw", "body": "There is a bug in `SimplifyDemandedInstructionBits` :)\r\nI am working to provide a minimal reproducer.\r\n"}, {"author": "dtcxzyw", "body": "@nikic https://github.com/llvm/llvm-project/blob/a9183b8899f2c02ba3710b27c0cbdde6831a627b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp#L411-L416\r\n\r\nI will post a fix later.\r\n"}, {"author": "dtcxzyw", "body": "Reproducer: https://alive2.llvm.org/ce/z/GAUsBC\r\n```\r\ndefine i8 @src(i16 %a, i16 %b, i1 %cond) {\r\n %sel = select i1 %cond, i16 1, i16 254\r\n %cond1 = icmp ne i16 %b, 0\r\n %mask = and i16 %a, 255\r\n %cond2 = icmp ne i16 %mask, 255\r\n %cond3 = or i1 %cond1, %cond2\r\n %sel2 = select i1 %cond3, i16 %sel, i16 255\r\n %sub = sub i16 %sel2, %a\r\n %trunc = trunc i16 %sub to i8\r\n ret i8 %trunc\r\n}\r\n\r\ndefine i8 @tgt(i16 %a1, i16 %a2, i1 %cond) {\r\n %1 = trunc i16 %a1 to i8\r\n %conv6 = xor i8 %1, -1\r\n ret i8 %conv6\r\n}\r\n```"}]}, "verified": true}
dataset/133288.json ADDED
@@ -0,0 +1,55 @@
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1
+ {
2
+ "bug_id": "133288",
3
+ "issue_url": "https://github.com/llvm/llvm-project/issues/133288",
4
+ "bug_type": "crash",
5
+ "base_commit": "77ba6918a14ddef4ee639bf6221cc2eb95adf320",
6
+ "knowledge_cutoff": "2025-03-27T17:54:31Z",
7
+ "lit_test_dir": [
8
+ "llvm/test/Transforms/SLPVectorizer"
9
+ ],
10
+ "hints": {
11
+ "fix_commit": "1bfc61064ab46e44865453d2c2176f5e7f96987c",
12
+ "components": [
13
+ "SLPVectorizer"
14
+ ],
15
+ "bug_location_lineno": {
16
+ "llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp": [
17
+ [
18
+ 13347,
19
+ 13353
20
+ ]
21
+ ]
22
+ },
23
+ "bug_location_funcname": {
24
+ "llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp": [
25
+ "BoUpSLP::getSpillCost"
26
+ ]
27
+ }
28
+ },
29
+ "patch": "commit 1bfc61064ab46e44865453d2c2176f5e7f96987c\nAuthor: Alexey Bataev <[email protected]>\nDate: Fri Mar 28 11:37:42 2025 -0700\n\n [SLP]Fix spill cost analysis for split vectorized nodes\n \n If the entry is SplitVectorize, it can be skipped in favor of its\n operands, operands allow correctly detect spill costs.\n \n Fixes #133288\n\ndiff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp\nindex f29fb6780253..850895895d44 100644\n--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp\n+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp\n@@ -13347,7 +13347,8 @@ InstructionCost BoUpSLP::getSpillCost() {\n for (const TreeEntry *Op : Operands) {\n if (!Op->isGather())\n LiveEntries.push_back(Op);\n- if ((Entry->getOpcode() != Instruction::PHI && Op->isGather()) ||\n+ if (Entry->State == TreeEntry::SplitVectorize ||\n+ (Entry->getOpcode() != Instruction::PHI && Op->isGather()) ||\n (Op->isGather() && allConstant(Op->Scalars)))\n continue;\n Budget = 0;\n",
30
+ "tests": [
31
+ {
32
+ "file": "llvm/test/Transforms/SLPVectorizer/X86/split-node-parent-operands-in-spill.ll",
33
+ "commands": [
34
+ "opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -slp-threshold=-99999 -mattr=+sse4.1 < %s"
35
+ ],
36
+ "tests": [
37
+ {
38
+ "test_name": "<module>",
39
+ "test_body": "\ndefine void @test(i32 %arg) {\n;\nbb:\n %load = load i32, ptr addrspace(3) null, align 4\n %load1 = load i32, ptr addrspace(3) null, align 4\n %load2 = load i32, ptr addrspace(3) null, align 4\n %load3 = load i32, ptr addrspace(3) null, align 4\n br label %bb4\n\nbb4:\n switch i32 0, label %bb8 [\n i32 0, label %bb7\n i32 1, label %bb21\n ]\n\nbb5:\n %srem = srem i32 0, 0\n br label %bb21\n\nbb6:\n br label %bb12\n\nbb7:\n ret void\n\nbb8:\n %phi = phi i32 [ 0, %bb4 ]\n %phi9 = phi i32 [ 0, %bb4 ]\n %phi10 = phi i32 [ 0, %bb4 ]\n %phi11 = phi i32 [ 0, %bb4 ]\n br label %bb12\n\nbb12:\n %phi13 = phi i32 [ %load, %bb8 ], [ 0, %bb6 ]\n %phi14 = phi i32 [ %load1, %bb8 ], [ 0, %bb6 ]\n %phi15 = phi i32 [ %load2, %bb8 ], [ %arg, %bb6 ]\n %phi16 = phi i32 [ %load3, %bb8 ], [ 0, %bb6 ]\n %phi17 = phi i32 [ %phi, %bb8 ], [ %srem, %bb6 ]\n %phi18 = phi i32 [ %phi11, %bb8 ], [ 0, %bb6 ]\n %phi19 = phi i32 [ %phi9, %bb8 ], [ 0, %bb6 ]\n %phi20 = phi i32 [ %phi10, %bb8 ], [ 0, %bb6 ]\n ret void\n\nbb21:\n ret void\n}"
40
+ }
41
+ ]
42
+ }
43
+ ],
44
+ "issue": {
45
+ "title": "slpvectorizer crash",
46
+ "body": "To reproduce run opt with the test below with -passes=slp-vectorizer -slp-threshold=-99999\n```\n; ModuleID = './reduced.ll'\nsource_filename = \"./reduced.ll\"\ntarget datalayout = \"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128-ni:1-p2:32:8:8:32-ni:2\"\ntarget triple = \"x86_64-unknown-linux-gnu\"\n\ndefine void @wombat(i32 %arg) #0 gc \"statepoint-example\" {\nbb:\n %load = load i32, ptr addrspace(3) null, align 4\n %load1 = load i32, ptr addrspace(3) null, align 4\n %load2 = load i32, ptr addrspace(3) null, align 4\n %load3 = load i32, ptr addrspace(3) null, align 4\n br label %bb4\n\nbb4: ; preds = %bb\n switch i32 0, label %bb8 [\n i32 0, label %bb7\n i32 1, label %bb21\n ]\n\nbb5: ; No predecessors!\n %srem = srem i32 0, 0\n br label %bb21\n\nbb6: ; No predecessors!\n br label %bb12\n\nbb7: ; preds = %bb4\n ret void\n\nbb8: ; preds = %bb4\n %phi = phi i32 [ 0, %bb4 ]\n %phi9 = phi i32 [ 0, %bb4 ]\n %phi10 = phi i32 [ 0, %bb4 ]\n %phi11 = phi i32 [ 0, %bb4 ]\n br label %bb12\n\nbb12: ; preds = %bb8, %bb6\n %phi13 = phi i32 [ %load, %bb8 ], [ 0, %bb6 ]\n %phi14 = phi i32 [ %load1, %bb8 ], [ 0, %bb6 ]\n %phi15 = phi i32 [ %load2, %bb8 ], [ %arg, %bb6 ]\n %phi16 = phi i32 [ %load3, %bb8 ], [ 0, %bb6 ]\n %phi17 = phi i32 [ %phi, %bb8 ], [ %srem, %bb6 ]\n %phi18 = phi i32 [ %phi11, %bb8 ], [ 0, %bb6 ]\n %phi19 = phi i32 [ %phi9, %bb8 ], [ 0, %bb6 ]\n %phi20 = phi i32 [ %phi10, %bb8 ], [ 0, %bb6 ]\n ret void\n\nbb21: ; preds = %bb5, %bb4\n ret void\n}\n\nattributes #0 = { \"target-features\"=\"+prfchw,-cldemote,+avx,+aes,+sahf,+pclmul,-xop,+crc32,-amx-fp8,+xsaves,-avx512fp16,-usermsr,-sm4,-egpr,+sse4.1,-avx512ifma,+xsave,+sse4.2,-tsxldtrk,-sm3,-ptwrite,-widekl,-movrs,-invpcid,+64bit,+xsavec,-avx10.1-512,-avx512vpopcntdq,+cmov,-avx512vp2intersect,-avx512cd,+movbe,-avxvnniint8,-ccmp,-amx-int8,-kl,-avx10.1-256,-sha512,-avxvnni,-rtm,+adx,+avx2,-hreset,-movdiri,-serialize,-vpclmulqdq,-avx512vl,-uintr,-cf,+clflushopt,-raoint,-cmpccxadd,+bmi,-amx-tile,+sse,-avx10.2-256,-gfni,-avxvnniint16,-amx-fp16,-zu,-ndd,+xsaveopt,+rdrnd,-avx512f,-amx-bf16,-avx512bf16,-avx512vnni,-push2pop2,+cx8,-avx512bw,+sse3,-pku,-nf,-amx-tf32,-amx-avx512,+fsgsbase,+clzero,-mwaitx,-lwp,+lzcnt,+sha,-movdir64b,-ppx,+wbnoinvd,-enqcmd,-amx-transpose,-avx10.2-512,-avxneconvert,-tbm,-pconfig,-amx-complex,+ssse3,+cx16,+bmi2,+fma,+popcnt,-avxifma,+f16c,-avx512bitalg,-rdpru,+clwb,+mmx,+sse2,+rdseed,-avx512vbmi2,-prefetchi,-amx-movrs,+rdpid,-fma4,-avx512vbmi,-shstk,-vaes,-waitpkg,-sgx,+fxsr,-avx512dq,+sse4a\" }\n```\nReproducer: https://godbolt.org/z/1E6shqxdd\n\nStack dump:\n```\n0.\tProgram arguments: /opt/compiler-explorer/clang-assertions-trunk/bin/opt -o /app/output.s -S -passes=slp-vectorizer -slp-threshold=-99999 <source>\n1.\tRunning pass \"function(slp-vectorizer)\" on module \"<source>\"\n2.\tRunning pass \"slp-vectorizer\" on function \"wombat\"\n #0 0x000000000549f758 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x549f758)\n #1 0x000000000549d0e4 SignalHandler(int, siginfo_t*, void*) Signals.cpp:0:0\n #2 0x00007d8bfda42520 (/lib/x86_64-linux-gnu/libc.so.6+0x42520)\n #3 0x00000000017c9e90 llvm::BasicBlock::getTerminator() const (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x17c9e90)\n #4 0x0000000004492866 llvm::slpvectorizer::BoUpSLP::getSpillCost() (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x4492866)\n #5 0x00000000044fbea8 llvm::slpvectorizer::BoUpSLP::getTreeCost(llvm::ArrayRef<llvm::Value*>, llvm::InstructionCost) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x44fbea8)\n #6 0x0000000004504152 llvm::SLPVectorizerPass::tryToVectorizeList(llvm::ArrayRef<llvm::Value*>, llvm::slpvectorizer::BoUpSLP&, bool) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x4504152)\n #7 0x000000000450937d bool tryToVectorizeSequence<llvm::Value>(llvm::SmallVectorImpl<llvm::Value*>&, llvm::function_ref<bool (llvm::Value*, llvm::Value*)>, llvm::function_ref<bool (llvm::Value*, llvm::Value*)>, llvm::function_ref<bool (llvm::ArrayRef<llvm::Value*>, bool)>, bool, llvm::slpvectorizer::BoUpSLP&) (.constprop.0) SLPVectorizer.cpp:0:0\n #8 0x000000000450ad55 llvm::SLPVectorizerPass::vectorizeChainsInBlock(llvm::BasicBlock*, llvm::slpvectorizer::BoUpSLP&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x450ad55)\n #9 0x0000000004512cbe llvm::SLPVectorizerPass::runImpl(llvm::Function&, llvm::ScalarEvolution*, llvm::TargetTransformInfo*, llvm::TargetLibraryInfo*, llvm::AAResults*, llvm::LoopInfo*, llvm::DominatorTree*, llvm::AssumptionCache*, llvm::DemandedBits*, llvm::OptimizationRemarkEmitter*) (.part.0) SLPVectorizer.cpp:0:0\n#10 0x000000000451387b llvm::SLPVectorizerPass::run(llvm::Function&, llvm::AnalysisManager<llvm::Function>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x451387b)\n#11 0x00000000031ad81e llvm::detail::PassModel<llvm::Function, llvm::SLPVectorizerPass, llvm::AnalysisManager<llvm::Function>>::run(llvm::Function&, llvm::AnalysisManager<llvm::Function>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x31ad81e)\n#12 0x000000000529b7a0 llvm::PassManager<llvm::Function, llvm::AnalysisManager<llvm::Function>>::run(llvm::Function&, llvm::AnalysisManager<llvm::Function>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x529b7a0)\n#13 0x0000000000e7a28e llvm::detail::PassModel<llvm::Function, llvm::PassManager<llvm::Function, llvm::AnalysisManager<llvm::Function>>, llvm::AnalysisManager<llvm::Function>>::run(llvm::Function&, llvm::AnalysisManager<llvm::Function>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0xe7a28e)\n#14 0x000000000529a073 llvm::ModuleToFunctionPassAdaptor::run(llvm::Module&, llvm::AnalysisManager<llvm::Module>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x529a073)\n#15 0x0000000000e792ae llvm::detail::PassModel<llvm::Module, llvm::ModuleToFunctionPassAdaptor, llvm::AnalysisManager<llvm::Module>>::run(llvm::Module&, llvm::AnalysisManager<llvm::Module>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0xe792ae)\n#16 0x0000000005299a80 llvm::PassManager<llvm::Module, llvm::AnalysisManager<llvm::Module>>::run(llvm::Module&, llvm::AnalysisManager<llvm::Module>&) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x5299a80)\n#17 0x000000000093f60a llvm::runPassPipeline(llvm::StringRef, llvm::Module&, llvm::TargetMachine*, llvm::TargetLibraryInfoImpl*, llvm::ToolOutputFile*, llvm::ToolOutputFile*, llvm::ToolOutputFile*, llvm::StringRef, llvm::ArrayRef<llvm::PassPlugin>, llvm::ArrayRef<std::function<void (llvm::PassBuilder&)>>, llvm::opt_tool::OutputKind, llvm::opt_tool::VerifierKind, bool, bool, bool, bool, bool, bool, bool) (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x93f60a)\n#18 0x0000000000932cfc optMain (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x932cfc)\n#19 0x00007d8bfda29d90 (/lib/x86_64-linux-gnu/libc.so.6+0x29d90)\n#20 0x00007d8bfda29e40 __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x29e40)\n#21 0x000000000092a935 _start (/opt/compiler-explorer/clang-assertions-trunk/bin/opt+0x92a935)\nProgram terminated with signal: SIGSEGV\nCompiler returned: 139\n```",
47
+ "author": "TatyanaDoubts",
48
+ "labels": [
49
+ "llvm:SLPVectorizer",
50
+ "crash"
51
+ ],
52
+ "comments": []
53
+ },
54
+ "verified": true
55
+ }
scripts/extract_from_issues.py CHANGED
@@ -34,7 +34,7 @@ session.headers.update(
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  issue_id_begin = 76663 # Since 2024-01-01
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