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systemdaemon/systemd | src/linux/drivers/clk/samsung/clk.c | 11155 | /*
* Copyright (c) 2013 Samsung Electronics Co., Ltd.
* Copyright (c) 2013 Linaro Ltd.
* Author: Thomas Abraham <[email protected]>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This file includes utility functions to register clocks to common
* clock framework for Samsung platforms.
*/
#include <linux/of_address.h>
#include <linux/syscore_ops.h>
#include "clk.h"
static LIST_HEAD(clock_reg_cache_list);
void samsung_clk_save(void __iomem *base,
struct samsung_clk_reg_dump *rd,
unsigned int num_regs)
{
for (; num_regs > 0; --num_regs, ++rd)
rd->value = readl(base + rd->offset);
}
void samsung_clk_restore(void __iomem *base,
const struct samsung_clk_reg_dump *rd,
unsigned int num_regs)
{
for (; num_regs > 0; --num_regs, ++rd)
writel(rd->value, base + rd->offset);
}
struct samsung_clk_reg_dump *samsung_clk_alloc_reg_dump(
const unsigned long *rdump,
unsigned long nr_rdump)
{
struct samsung_clk_reg_dump *rd;
unsigned int i;
rd = kcalloc(nr_rdump, sizeof(*rd), GFP_KERNEL);
if (!rd)
return NULL;
for (i = 0; i < nr_rdump; ++i)
rd[i].offset = rdump[i];
return rd;
}
/* setup the essentials required to support clock lookup using ccf */
struct samsung_clk_provider *__init samsung_clk_init(struct device_node *np,
void __iomem *base, unsigned long nr_clks)
{
struct samsung_clk_provider *ctx;
struct clk **clk_table;
int i;
ctx = kzalloc(sizeof(struct samsung_clk_provider), GFP_KERNEL);
if (!ctx)
panic("could not allocate clock provider context.\n");
clk_table = kcalloc(nr_clks, sizeof(struct clk *), GFP_KERNEL);
if (!clk_table)
panic("could not allocate clock lookup table\n");
for (i = 0; i < nr_clks; ++i)
clk_table[i] = ERR_PTR(-ENOENT);
ctx->reg_base = base;
ctx->clk_data.clks = clk_table;
ctx->clk_data.clk_num = nr_clks;
spin_lock_init(&ctx->lock);
return ctx;
}
void __init samsung_clk_of_add_provider(struct device_node *np,
struct samsung_clk_provider *ctx)
{
if (np) {
if (of_clk_add_provider(np, of_clk_src_onecell_get,
&ctx->clk_data))
panic("could not register clk provider\n");
}
}
/* add a clock instance to the clock lookup table used for dt based lookup */
void samsung_clk_add_lookup(struct samsung_clk_provider *ctx, struct clk *clk,
unsigned int id)
{
if (ctx->clk_data.clks && id)
ctx->clk_data.clks[id] = clk;
}
/* register a list of aliases */
void __init samsung_clk_register_alias(struct samsung_clk_provider *ctx,
struct samsung_clock_alias *list,
unsigned int nr_clk)
{
struct clk *clk;
unsigned int idx, ret;
if (!ctx->clk_data.clks) {
pr_err("%s: clock table missing\n", __func__);
return;
}
for (idx = 0; idx < nr_clk; idx++, list++) {
if (!list->id) {
pr_err("%s: clock id missing for index %d\n", __func__,
idx);
continue;
}
clk = ctx->clk_data.clks[list->id];
if (!clk) {
pr_err("%s: failed to find clock %d\n", __func__,
list->id);
continue;
}
ret = clk_register_clkdev(clk, list->alias, list->dev_name);
if (ret)
pr_err("%s: failed to register lookup %s\n",
__func__, list->alias);
}
}
/* register a list of fixed clocks */
void __init samsung_clk_register_fixed_rate(struct samsung_clk_provider *ctx,
struct samsung_fixed_rate_clock *list, unsigned int nr_clk)
{
struct clk *clk;
unsigned int idx, ret;
for (idx = 0; idx < nr_clk; idx++, list++) {
clk = clk_register_fixed_rate(NULL, list->name,
list->parent_name, list->flags, list->fixed_rate);
if (IS_ERR(clk)) {
pr_err("%s: failed to register clock %s\n", __func__,
list->name);
continue;
}
samsung_clk_add_lookup(ctx, clk, list->id);
/*
* Unconditionally add a clock lookup for the fixed rate clocks.
* There are not many of these on any of Samsung platforms.
*/
ret = clk_register_clkdev(clk, list->name, NULL);
if (ret)
pr_err("%s: failed to register clock lookup for %s",
__func__, list->name);
}
}
/* register a list of fixed factor clocks */
void __init samsung_clk_register_fixed_factor(struct samsung_clk_provider *ctx,
struct samsung_fixed_factor_clock *list, unsigned int nr_clk)
{
struct clk *clk;
unsigned int idx;
for (idx = 0; idx < nr_clk; idx++, list++) {
clk = clk_register_fixed_factor(NULL, list->name,
list->parent_name, list->flags, list->mult, list->div);
if (IS_ERR(clk)) {
pr_err("%s: failed to register clock %s\n", __func__,
list->name);
continue;
}
samsung_clk_add_lookup(ctx, clk, list->id);
}
}
/* register a list of mux clocks */
void __init samsung_clk_register_mux(struct samsung_clk_provider *ctx,
struct samsung_mux_clock *list,
unsigned int nr_clk)
{
struct clk *clk;
unsigned int idx, ret;
for (idx = 0; idx < nr_clk; idx++, list++) {
clk = clk_register_mux(NULL, list->name, list->parent_names,
list->num_parents, list->flags,
ctx->reg_base + list->offset,
list->shift, list->width, list->mux_flags, &ctx->lock);
if (IS_ERR(clk)) {
pr_err("%s: failed to register clock %s\n", __func__,
list->name);
continue;
}
samsung_clk_add_lookup(ctx, clk, list->id);
/* register a clock lookup only if a clock alias is specified */
if (list->alias) {
ret = clk_register_clkdev(clk, list->alias,
list->dev_name);
if (ret)
pr_err("%s: failed to register lookup %s\n",
__func__, list->alias);
}
}
}
/* register a list of div clocks */
void __init samsung_clk_register_div(struct samsung_clk_provider *ctx,
struct samsung_div_clock *list,
unsigned int nr_clk)
{
struct clk *clk;
unsigned int idx, ret;
for (idx = 0; idx < nr_clk; idx++, list++) {
if (list->table)
clk = clk_register_divider_table(NULL, list->name,
list->parent_name, list->flags,
ctx->reg_base + list->offset,
list->shift, list->width, list->div_flags,
list->table, &ctx->lock);
else
clk = clk_register_divider(NULL, list->name,
list->parent_name, list->flags,
ctx->reg_base + list->offset, list->shift,
list->width, list->div_flags, &ctx->lock);
if (IS_ERR(clk)) {
pr_err("%s: failed to register clock %s\n", __func__,
list->name);
continue;
}
samsung_clk_add_lookup(ctx, clk, list->id);
/* register a clock lookup only if a clock alias is specified */
if (list->alias) {
ret = clk_register_clkdev(clk, list->alias,
list->dev_name);
if (ret)
pr_err("%s: failed to register lookup %s\n",
__func__, list->alias);
}
}
}
/* register a list of gate clocks */
void __init samsung_clk_register_gate(struct samsung_clk_provider *ctx,
struct samsung_gate_clock *list,
unsigned int nr_clk)
{
struct clk *clk;
unsigned int idx, ret;
for (idx = 0; idx < nr_clk; idx++, list++) {
clk = clk_register_gate(NULL, list->name, list->parent_name,
list->flags, ctx->reg_base + list->offset,
list->bit_idx, list->gate_flags, &ctx->lock);
if (IS_ERR(clk)) {
pr_err("%s: failed to register clock %s\n", __func__,
list->name);
continue;
}
/* register a clock lookup only if a clock alias is specified */
if (list->alias) {
ret = clk_register_clkdev(clk, list->alias,
list->dev_name);
if (ret)
pr_err("%s: failed to register lookup %s\n",
__func__, list->alias);
}
samsung_clk_add_lookup(ctx, clk, list->id);
}
}
/*
* obtain the clock speed of all external fixed clock sources from device
* tree and register it
*/
void __init samsung_clk_of_register_fixed_ext(struct samsung_clk_provider *ctx,
struct samsung_fixed_rate_clock *fixed_rate_clk,
unsigned int nr_fixed_rate_clk,
const struct of_device_id *clk_matches)
{
const struct of_device_id *match;
struct device_node *clk_np;
u32 freq;
for_each_matching_node_and_match(clk_np, clk_matches, &match) {
if (of_property_read_u32(clk_np, "clock-frequency", &freq))
continue;
fixed_rate_clk[(unsigned long)match->data].fixed_rate = freq;
}
samsung_clk_register_fixed_rate(ctx, fixed_rate_clk, nr_fixed_rate_clk);
}
/* utility function to get the rate of a specified clock */
unsigned long _get_rate(const char *clk_name)
{
struct clk *clk;
clk = __clk_lookup(clk_name);
if (!clk) {
pr_err("%s: could not find clock %s\n", __func__, clk_name);
return 0;
}
return clk_get_rate(clk);
}
#ifdef CONFIG_PM_SLEEP
static int samsung_clk_suspend(void)
{
struct samsung_clock_reg_cache *reg_cache;
list_for_each_entry(reg_cache, &clock_reg_cache_list, node)
samsung_clk_save(reg_cache->reg_base, reg_cache->rdump,
reg_cache->rd_num);
return 0;
}
static void samsung_clk_resume(void)
{
struct samsung_clock_reg_cache *reg_cache;
list_for_each_entry(reg_cache, &clock_reg_cache_list, node)
samsung_clk_restore(reg_cache->reg_base, reg_cache->rdump,
reg_cache->rd_num);
}
static struct syscore_ops samsung_clk_syscore_ops = {
.suspend = samsung_clk_suspend,
.resume = samsung_clk_resume,
};
static void samsung_clk_sleep_init(void __iomem *reg_base,
const unsigned long *rdump,
unsigned long nr_rdump)
{
struct samsung_clock_reg_cache *reg_cache;
reg_cache = kzalloc(sizeof(struct samsung_clock_reg_cache),
GFP_KERNEL);
if (!reg_cache)
panic("could not allocate register reg_cache.\n");
reg_cache->rdump = samsung_clk_alloc_reg_dump(rdump, nr_rdump);
if (!reg_cache->rdump)
panic("could not allocate register dump storage.\n");
if (list_empty(&clock_reg_cache_list))
register_syscore_ops(&samsung_clk_syscore_ops);
reg_cache->reg_base = reg_base;
reg_cache->rd_num = nr_rdump;
list_add_tail(®_cache->node, &clock_reg_cache_list);
}
#else
static void samsung_clk_sleep_init(void __iomem *reg_base,
const unsigned long *rdump,
unsigned long nr_rdump) {}
#endif
/*
* Common function which registers plls, muxes, dividers and gates
* for each CMU. It also add CMU register list to register cache.
*/
struct samsung_clk_provider * __init samsung_cmu_register_one(
struct device_node *np,
struct samsung_cmu_info *cmu)
{
void __iomem *reg_base;
struct samsung_clk_provider *ctx;
reg_base = of_iomap(np, 0);
if (!reg_base) {
panic("%s: failed to map registers\n", __func__);
return NULL;
}
ctx = samsung_clk_init(np, reg_base, cmu->nr_clk_ids);
if (!ctx) {
panic("%s: unable to alllocate ctx\n", __func__);
return ctx;
}
if (cmu->pll_clks)
samsung_clk_register_pll(ctx, cmu->pll_clks, cmu->nr_pll_clks,
reg_base);
if (cmu->mux_clks)
samsung_clk_register_mux(ctx, cmu->mux_clks,
cmu->nr_mux_clks);
if (cmu->div_clks)
samsung_clk_register_div(ctx, cmu->div_clks, cmu->nr_div_clks);
if (cmu->gate_clks)
samsung_clk_register_gate(ctx, cmu->gate_clks,
cmu->nr_gate_clks);
if (cmu->fixed_clks)
samsung_clk_register_fixed_rate(ctx, cmu->fixed_clks,
cmu->nr_fixed_clks);
if (cmu->fixed_factor_clks)
samsung_clk_register_fixed_factor(ctx, cmu->fixed_factor_clks,
cmu->nr_fixed_factor_clks);
if (cmu->clk_regs)
samsung_clk_sleep_init(reg_base, cmu->clk_regs,
cmu->nr_clk_regs);
samsung_clk_of_add_provider(np, ctx);
return ctx;
}
| gpl-2.0 |
sandbox-team/techtalk-portal | vendor/zenpen/js/utils.js | 641 | // Utility functions
String.prototype.trim = function(){ return this.replace(/^\s+|\s+$/g, ''); };
function supportsHtmlStorage() {
try {
return 'localStorage' in window && window['localStorage'] !== null;
} catch (e) {
return false;
}
}
function get_text(el) {
ret = " ";
var length = el.childNodes.length;
for(var i = 0; i < length; i++) {
var node = el.childNodes[i];
if(node.nodeType != 8) {
if ( node.nodeType != 1 ) {
// Strip white space.
ret += node.nodeValue;
} else {
ret += get_text( node );
}
}
}
return ret.trim();
} | mit |
rperier/linux | drivers/leds/leds-lp50xx.c | 17111 | // SPDX-License-Identifier: GPL-2.0
// TI LP50XX LED chip family driver
// Copyright (C) 2018-20 Texas Instruments Incorporated - https://www.ti.com/
#include <linux/gpio/consumer.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/leds.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <uapi/linux/uleds.h>
#include <linux/led-class-multicolor.h>
#include "leds.h"
#define LP50XX_DEV_CFG0 0x00
#define LP50XX_DEV_CFG1 0x01
#define LP50XX_LED_CFG0 0x02
/* LP5009 and LP5012 registers */
#define LP5012_BNK_BRT 0x03
#define LP5012_BNKA_CLR 0x04
#define LP5012_BNKB_CLR 0x05
#define LP5012_BNKC_CLR 0x06
#define LP5012_LED0_BRT 0x07
#define LP5012_OUT0_CLR 0x0b
#define LP5012_RESET 0x17
/* LP5018 and LP5024 registers */
#define LP5024_BNK_BRT 0x03
#define LP5024_BNKA_CLR 0x04
#define LP5024_BNKB_CLR 0x05
#define LP5024_BNKC_CLR 0x06
#define LP5024_LED0_BRT 0x07
#define LP5024_OUT0_CLR 0x0f
#define LP5024_RESET 0x27
/* LP5030 and LP5036 registers */
#define LP5036_LED_CFG1 0x03
#define LP5036_BNK_BRT 0x04
#define LP5036_BNKA_CLR 0x05
#define LP5036_BNKB_CLR 0x06
#define LP5036_BNKC_CLR 0x07
#define LP5036_LED0_BRT 0x08
#define LP5036_OUT0_CLR 0x14
#define LP5036_RESET 0x38
#define LP50XX_SW_RESET 0xff
#define LP50XX_CHIP_EN BIT(6)
/* There are 3 LED outputs per bank */
#define LP50XX_LEDS_PER_MODULE 3
#define LP5009_MAX_LED_MODULES 2
#define LP5012_MAX_LED_MODULES 4
#define LP5018_MAX_LED_MODULES 6
#define LP5024_MAX_LED_MODULES 8
#define LP5030_MAX_LED_MODULES 10
#define LP5036_MAX_LED_MODULES 12
static const struct reg_default lp5012_reg_defs[] = {
{LP50XX_DEV_CFG0, 0x0},
{LP50XX_DEV_CFG1, 0x3c},
{LP50XX_LED_CFG0, 0x0},
{LP5012_BNK_BRT, 0xff},
{LP5012_BNKA_CLR, 0x0f},
{LP5012_BNKB_CLR, 0x0f},
{LP5012_BNKC_CLR, 0x0f},
{LP5012_LED0_BRT, 0x0f},
/* LEDX_BRT registers are all 0xff for defaults */
{0x08, 0xff}, {0x09, 0xff}, {0x0a, 0xff},
{LP5012_OUT0_CLR, 0x0f},
/* OUTX_CLR registers are all 0x0 for defaults */
{0x0c, 0x00}, {0x0d, 0x00}, {0x0e, 0x00}, {0x0f, 0x00}, {0x10, 0x00},
{0x11, 0x00}, {0x12, 0x00}, {0x13, 0x00}, {0x14, 0x00}, {0x15, 0x00},
{0x16, 0x00},
{LP5012_RESET, 0x00}
};
static const struct reg_default lp5024_reg_defs[] = {
{LP50XX_DEV_CFG0, 0x0},
{LP50XX_DEV_CFG1, 0x3c},
{LP50XX_LED_CFG0, 0x0},
{LP5024_BNK_BRT, 0xff},
{LP5024_BNKA_CLR, 0x0f},
{LP5024_BNKB_CLR, 0x0f},
{LP5024_BNKC_CLR, 0x0f},
{LP5024_LED0_BRT, 0x0f},
/* LEDX_BRT registers are all 0xff for defaults */
{0x08, 0xff}, {0x09, 0xff}, {0x0a, 0xff}, {0x0b, 0xff}, {0x0c, 0xff},
{0x0d, 0xff}, {0x0e, 0xff},
{LP5024_OUT0_CLR, 0x0f},
/* OUTX_CLR registers are all 0x0 for defaults */
{0x10, 0x00}, {0x11, 0x00}, {0x12, 0x00}, {0x13, 0x00}, {0x14, 0x00},
{0x15, 0x00}, {0x16, 0x00}, {0x17, 0x00}, {0x18, 0x00}, {0x19, 0x00},
{0x1a, 0x00}, {0x1b, 0x00}, {0x1c, 0x00}, {0x1d, 0x00}, {0x1e, 0x00},
{0x1f, 0x00}, {0x20, 0x00}, {0x21, 0x00}, {0x22, 0x00}, {0x23, 0x00},
{0x24, 0x00}, {0x25, 0x00}, {0x26, 0x00},
{LP5024_RESET, 0x00}
};
static const struct reg_default lp5036_reg_defs[] = {
{LP50XX_DEV_CFG0, 0x0},
{LP50XX_DEV_CFG1, 0x3c},
{LP50XX_LED_CFG0, 0x0},
{LP5036_LED_CFG1, 0x0},
{LP5036_BNK_BRT, 0xff},
{LP5036_BNKA_CLR, 0x0f},
{LP5036_BNKB_CLR, 0x0f},
{LP5036_BNKC_CLR, 0x0f},
{LP5036_LED0_BRT, 0x0f},
/* LEDX_BRT registers are all 0xff for defaults */
{0x08, 0xff}, {0x09, 0xff}, {0x0a, 0xff}, {0x0b, 0xff}, {0x0c, 0xff},
{0x0d, 0xff}, {0x0e, 0xff}, {0x0f, 0xff}, {0x10, 0xff}, {0x11, 0xff},
{0x12, 0xff}, {0x13, 0xff},
{LP5036_OUT0_CLR, 0x0f},
/* OUTX_CLR registers are all 0x0 for defaults */
{0x15, 0x00}, {0x16, 0x00}, {0x17, 0x00}, {0x18, 0x00}, {0x19, 0x00},
{0x1a, 0x00}, {0x1b, 0x00}, {0x1c, 0x00}, {0x1d, 0x00}, {0x1e, 0x00},
{0x1f, 0x00}, {0x20, 0x00}, {0x21, 0x00}, {0x22, 0x00}, {0x23, 0x00},
{0x24, 0x00}, {0x25, 0x00}, {0x26, 0x00}, {0x27, 0x00}, {0x28, 0x00},
{0x29, 0x00}, {0x2a, 0x00}, {0x2b, 0x00}, {0x2c, 0x00}, {0x2d, 0x00},
{0x2e, 0x00}, {0x2f, 0x00}, {0x30, 0x00}, {0x31, 0x00}, {0x32, 0x00},
{0x33, 0x00}, {0x34, 0x00}, {0x35, 0x00}, {0x36, 0x00}, {0x37, 0x00},
{LP5036_RESET, 0x00}
};
static const struct regmap_config lp5012_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = LP5012_RESET,
.reg_defaults = lp5012_reg_defs,
.num_reg_defaults = ARRAY_SIZE(lp5012_reg_defs),
.cache_type = REGCACHE_FLAT,
};
static const struct regmap_config lp5024_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = LP5024_RESET,
.reg_defaults = lp5024_reg_defs,
.num_reg_defaults = ARRAY_SIZE(lp5024_reg_defs),
.cache_type = REGCACHE_FLAT,
};
static const struct regmap_config lp5036_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = LP5036_RESET,
.reg_defaults = lp5036_reg_defs,
.num_reg_defaults = ARRAY_SIZE(lp5036_reg_defs),
.cache_type = REGCACHE_FLAT,
};
enum lp50xx_model {
LP5009,
LP5012,
LP5018,
LP5024,
LP5030,
LP5036,
};
/**
* struct lp50xx_chip_info -
* @lp50xx_regmap_config: regmap register configuration
* @model_id: LED device model
* @max_modules: total number of supported LED modules
* @num_leds: number of LED outputs available on the device
* @led_brightness0_reg: first brightness register of the device
* @mix_out0_reg: first color mix register of the device
* @bank_brt_reg: bank brightness register
* @bank_mix_reg: color mix register
* @reset_reg: device reset register
*/
struct lp50xx_chip_info {
const struct regmap_config *lp50xx_regmap_config;
int model_id;
u8 max_modules;
u8 num_leds;
u8 led_brightness0_reg;
u8 mix_out0_reg;
u8 bank_brt_reg;
u8 bank_mix_reg;
u8 reset_reg;
};
static const struct lp50xx_chip_info lp50xx_chip_info_tbl[] = {
[LP5009] = {
.model_id = LP5009,
.max_modules = LP5009_MAX_LED_MODULES,
.num_leds = LP5009_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE,
.led_brightness0_reg = LP5012_LED0_BRT,
.mix_out0_reg = LP5012_OUT0_CLR,
.bank_brt_reg = LP5012_BNK_BRT,
.bank_mix_reg = LP5012_BNKA_CLR,
.reset_reg = LP5012_RESET,
.lp50xx_regmap_config = &lp5012_regmap_config,
},
[LP5012] = {
.model_id = LP5012,
.max_modules = LP5012_MAX_LED_MODULES,
.num_leds = LP5012_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE,
.led_brightness0_reg = LP5012_LED0_BRT,
.mix_out0_reg = LP5012_OUT0_CLR,
.bank_brt_reg = LP5012_BNK_BRT,
.bank_mix_reg = LP5012_BNKA_CLR,
.reset_reg = LP5012_RESET,
.lp50xx_regmap_config = &lp5012_regmap_config,
},
[LP5018] = {
.model_id = LP5018,
.max_modules = LP5018_MAX_LED_MODULES,
.num_leds = LP5018_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE,
.led_brightness0_reg = LP5024_LED0_BRT,
.mix_out0_reg = LP5024_OUT0_CLR,
.bank_brt_reg = LP5024_BNK_BRT,
.bank_mix_reg = LP5024_BNKA_CLR,
.reset_reg = LP5024_RESET,
.lp50xx_regmap_config = &lp5024_regmap_config,
},
[LP5024] = {
.model_id = LP5024,
.max_modules = LP5024_MAX_LED_MODULES,
.num_leds = LP5024_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE,
.led_brightness0_reg = LP5024_LED0_BRT,
.mix_out0_reg = LP5024_OUT0_CLR,
.bank_brt_reg = LP5024_BNK_BRT,
.bank_mix_reg = LP5024_BNKA_CLR,
.reset_reg = LP5024_RESET,
.lp50xx_regmap_config = &lp5024_regmap_config,
},
[LP5030] = {
.model_id = LP5030,
.max_modules = LP5030_MAX_LED_MODULES,
.num_leds = LP5030_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE,
.led_brightness0_reg = LP5036_LED0_BRT,
.mix_out0_reg = LP5036_OUT0_CLR,
.bank_brt_reg = LP5036_BNK_BRT,
.bank_mix_reg = LP5036_BNKA_CLR,
.reset_reg = LP5036_RESET,
.lp50xx_regmap_config = &lp5036_regmap_config,
},
[LP5036] = {
.model_id = LP5036,
.max_modules = LP5036_MAX_LED_MODULES,
.num_leds = LP5036_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE,
.led_brightness0_reg = LP5036_LED0_BRT,
.mix_out0_reg = LP5036_OUT0_CLR,
.bank_brt_reg = LP5036_BNK_BRT,
.bank_mix_reg = LP5036_BNKA_CLR,
.reset_reg = LP5036_RESET,
.lp50xx_regmap_config = &lp5036_regmap_config,
},
};
struct lp50xx_led {
struct led_classdev_mc mc_cdev;
struct lp50xx *priv;
unsigned long bank_modules;
int led_intensity[LP50XX_LEDS_PER_MODULE];
u8 ctrl_bank_enabled;
int led_number;
};
/**
* struct lp50xx -
* @enable_gpio: hardware enable gpio
* @regulator: LED supply regulator pointer
* @client: pointer to the I2C client
* @regmap: device register map
* @dev: pointer to the devices device struct
* @lock: lock for reading/writing the device
* @chip_info: chip specific information (ie num_leds)
* @num_of_banked_leds: holds the number of banked LEDs
* @leds: array of LED strings
*/
struct lp50xx {
struct gpio_desc *enable_gpio;
struct regulator *regulator;
struct i2c_client *client;
struct regmap *regmap;
struct device *dev;
struct mutex lock;
const struct lp50xx_chip_info *chip_info;
int num_of_banked_leds;
/* This needs to be at the end of the struct */
struct lp50xx_led leds[];
};
static struct lp50xx_led *mcled_cdev_to_led(struct led_classdev_mc *mc_cdev)
{
return container_of(mc_cdev, struct lp50xx_led, mc_cdev);
}
static int lp50xx_brightness_set(struct led_classdev *cdev,
enum led_brightness brightness)
{
struct led_classdev_mc *mc_dev = lcdev_to_mccdev(cdev);
struct lp50xx_led *led = mcled_cdev_to_led(mc_dev);
const struct lp50xx_chip_info *led_chip = led->priv->chip_info;
u8 led_offset, reg_val;
int ret = 0;
int i;
mutex_lock(&led->priv->lock);
if (led->ctrl_bank_enabled)
reg_val = led_chip->bank_brt_reg;
else
reg_val = led_chip->led_brightness0_reg +
led->led_number;
ret = regmap_write(led->priv->regmap, reg_val, brightness);
if (ret) {
dev_err(led->priv->dev,
"Cannot write brightness value %d\n", ret);
goto out;
}
for (i = 0; i < led->mc_cdev.num_colors; i++) {
if (led->ctrl_bank_enabled) {
reg_val = led_chip->bank_mix_reg + i;
} else {
led_offset = (led->led_number * 3) + i;
reg_val = led_chip->mix_out0_reg + led_offset;
}
ret = regmap_write(led->priv->regmap, reg_val,
mc_dev->subled_info[i].intensity);
if (ret) {
dev_err(led->priv->dev,
"Cannot write intensity value %d\n", ret);
goto out;
}
}
out:
mutex_unlock(&led->priv->lock);
return ret;
}
static int lp50xx_set_banks(struct lp50xx *priv, u32 led_banks[])
{
u8 led_config_lo, led_config_hi;
u32 bank_enable_mask = 0;
int ret;
int i;
for (i = 0; i < priv->chip_info->max_modules; i++) {
if (led_banks[i])
bank_enable_mask |= (1 << led_banks[i]);
}
led_config_lo = bank_enable_mask;
led_config_hi = bank_enable_mask >> 8;
ret = regmap_write(priv->regmap, LP50XX_LED_CFG0, led_config_lo);
if (ret)
return ret;
if (priv->chip_info->model_id >= LP5030)
ret = regmap_write(priv->regmap, LP5036_LED_CFG1, led_config_hi);
return ret;
}
static int lp50xx_reset(struct lp50xx *priv)
{
return regmap_write(priv->regmap, priv->chip_info->reset_reg, LP50XX_SW_RESET);
}
static int lp50xx_enable_disable(struct lp50xx *priv, int enable_disable)
{
int ret;
ret = gpiod_direction_output(priv->enable_gpio, enable_disable);
if (ret)
return ret;
if (enable_disable)
return regmap_write(priv->regmap, LP50XX_DEV_CFG0, LP50XX_CHIP_EN);
else
return regmap_write(priv->regmap, LP50XX_DEV_CFG0, 0);
}
static int lp50xx_probe_leds(struct fwnode_handle *child, struct lp50xx *priv,
struct lp50xx_led *led, int num_leds)
{
u32 led_banks[LP5036_MAX_LED_MODULES] = {0};
int led_number;
int ret;
if (num_leds > 1) {
if (num_leds > priv->chip_info->max_modules) {
dev_err(priv->dev, "reg property is invalid\n");
return -EINVAL;
}
priv->num_of_banked_leds = num_leds;
ret = fwnode_property_read_u32_array(child, "reg", led_banks, num_leds);
if (ret) {
dev_err(priv->dev, "reg property is missing\n");
return ret;
}
ret = lp50xx_set_banks(priv, led_banks);
if (ret) {
dev_err(priv->dev, "Cannot setup banked LEDs\n");
return ret;
}
led->ctrl_bank_enabled = 1;
} else {
ret = fwnode_property_read_u32(child, "reg", &led_number);
if (ret) {
dev_err(priv->dev, "led reg property missing\n");
return ret;
}
if (led_number > priv->chip_info->num_leds) {
dev_err(priv->dev, "led-sources property is invalid\n");
return -EINVAL;
}
led->led_number = led_number;
}
return 0;
}
static int lp50xx_probe_dt(struct lp50xx *priv)
{
struct fwnode_handle *child = NULL;
struct fwnode_handle *led_node = NULL;
struct led_init_data init_data = {};
struct led_classdev *led_cdev;
struct mc_subled *mc_led_info;
struct lp50xx_led *led;
int ret = -EINVAL;
int num_colors;
u32 color_id;
int i = 0;
priv->enable_gpio = devm_gpiod_get_optional(priv->dev, "enable", GPIOD_OUT_LOW);
if (IS_ERR(priv->enable_gpio))
return dev_err_probe(priv->dev, PTR_ERR(priv->enable_gpio),
"Failed to get enable GPIO\n");
priv->regulator = devm_regulator_get(priv->dev, "vled");
if (IS_ERR(priv->regulator))
priv->regulator = NULL;
device_for_each_child_node(priv->dev, child) {
led = &priv->leds[i];
ret = fwnode_property_count_u32(child, "reg");
if (ret < 0) {
dev_err(priv->dev, "reg property is invalid\n");
goto child_out;
}
ret = lp50xx_probe_leds(child, priv, led, ret);
if (ret)
goto child_out;
init_data.fwnode = child;
num_colors = 0;
/*
* There are only 3 LEDs per module otherwise they should be
* banked which also is presented as 3 LEDs.
*/
mc_led_info = devm_kcalloc(priv->dev, LP50XX_LEDS_PER_MODULE,
sizeof(*mc_led_info), GFP_KERNEL);
if (!mc_led_info) {
ret = -ENOMEM;
goto child_out;
}
fwnode_for_each_child_node(child, led_node) {
ret = fwnode_property_read_u32(led_node, "color",
&color_id);
if (ret) {
fwnode_handle_put(led_node);
dev_err(priv->dev, "Cannot read color\n");
goto child_out;
}
mc_led_info[num_colors].color_index = color_id;
num_colors++;
}
led->priv = priv;
led->mc_cdev.num_colors = num_colors;
led->mc_cdev.subled_info = mc_led_info;
led_cdev = &led->mc_cdev.led_cdev;
led_cdev->brightness_set_blocking = lp50xx_brightness_set;
ret = devm_led_classdev_multicolor_register_ext(priv->dev,
&led->mc_cdev,
&init_data);
if (ret) {
dev_err(priv->dev, "led register err: %d\n", ret);
goto child_out;
}
i++;
}
return 0;
child_out:
fwnode_handle_put(child);
return ret;
}
static int lp50xx_probe(struct i2c_client *client)
{
struct lp50xx *led;
int count;
int ret;
count = device_get_child_node_count(&client->dev);
if (!count) {
dev_err(&client->dev, "LEDs are not defined in device tree!");
return -ENODEV;
}
led = devm_kzalloc(&client->dev, struct_size(led, leds, count),
GFP_KERNEL);
if (!led)
return -ENOMEM;
mutex_init(&led->lock);
led->client = client;
led->dev = &client->dev;
led->chip_info = device_get_match_data(&client->dev);
i2c_set_clientdata(client, led);
led->regmap = devm_regmap_init_i2c(client,
led->chip_info->lp50xx_regmap_config);
if (IS_ERR(led->regmap)) {
ret = PTR_ERR(led->regmap);
dev_err(&client->dev, "Failed to allocate register map: %d\n",
ret);
return ret;
}
ret = lp50xx_reset(led);
if (ret)
return ret;
ret = lp50xx_enable_disable(led, 1);
if (ret)
return ret;
return lp50xx_probe_dt(led);
}
static int lp50xx_remove(struct i2c_client *client)
{
struct lp50xx *led = i2c_get_clientdata(client);
int ret;
ret = lp50xx_enable_disable(led, 0);
if (ret) {
dev_err(led->dev, "Failed to disable chip\n");
return ret;
}
if (led->regulator) {
ret = regulator_disable(led->regulator);
if (ret)
dev_err(led->dev, "Failed to disable regulator\n");
}
mutex_destroy(&led->lock);
return 0;
}
static const struct i2c_device_id lp50xx_id[] = {
{ "lp5009", (kernel_ulong_t)&lp50xx_chip_info_tbl[LP5009] },
{ "lp5012", (kernel_ulong_t)&lp50xx_chip_info_tbl[LP5012] },
{ "lp5018", (kernel_ulong_t)&lp50xx_chip_info_tbl[LP5018] },
{ "lp5024", (kernel_ulong_t)&lp50xx_chip_info_tbl[LP5024] },
{ "lp5030", (kernel_ulong_t)&lp50xx_chip_info_tbl[LP5030] },
{ "lp5036", (kernel_ulong_t)&lp50xx_chip_info_tbl[LP5036] },
{ }
};
MODULE_DEVICE_TABLE(i2c, lp50xx_id);
static const struct of_device_id of_lp50xx_leds_match[] = {
{ .compatible = "ti,lp5009", .data = &lp50xx_chip_info_tbl[LP5009] },
{ .compatible = "ti,lp5012", .data = &lp50xx_chip_info_tbl[LP5012] },
{ .compatible = "ti,lp5018", .data = &lp50xx_chip_info_tbl[LP5018] },
{ .compatible = "ti,lp5024", .data = &lp50xx_chip_info_tbl[LP5024] },
{ .compatible = "ti,lp5030", .data = &lp50xx_chip_info_tbl[LP5030] },
{ .compatible = "ti,lp5036", .data = &lp50xx_chip_info_tbl[LP5036] },
{}
};
MODULE_DEVICE_TABLE(of, of_lp50xx_leds_match);
static struct i2c_driver lp50xx_driver = {
.driver = {
.name = "lp50xx",
.of_match_table = of_lp50xx_leds_match,
},
.probe_new = lp50xx_probe,
.remove = lp50xx_remove,
.id_table = lp50xx_id,
};
module_i2c_driver(lp50xx_driver);
MODULE_DESCRIPTION("Texas Instruments LP50XX LED driver");
MODULE_AUTHOR("Dan Murphy <[email protected]>");
MODULE_LICENSE("GPL v2");
| gpl-2.0 |
BigBoss424/portfolio | v8/development/node_modules/jimp/node_modules/core-js/internals/array-buffer-view-core.js | 6017 | 'use strict';
var NATIVE_ARRAY_BUFFER = require('../internals/array-buffer-native');
var DESCRIPTORS = require('../internals/descriptors');
var global = require('../internals/global');
var isObject = require('../internals/is-object');
var has = require('../internals/has');
var classof = require('../internals/classof');
var createNonEnumerableProperty = require('../internals/create-non-enumerable-property');
var redefine = require('../internals/redefine');
var defineProperty = require('../internals/object-define-property').f;
var getPrototypeOf = require('../internals/object-get-prototype-of');
var setPrototypeOf = require('../internals/object-set-prototype-of');
var wellKnownSymbol = require('../internals/well-known-symbol');
var uid = require('../internals/uid');
var Int8Array = global.Int8Array;
var Int8ArrayPrototype = Int8Array && Int8Array.prototype;
var Uint8ClampedArray = global.Uint8ClampedArray;
var Uint8ClampedArrayPrototype = Uint8ClampedArray && Uint8ClampedArray.prototype;
var TypedArray = Int8Array && getPrototypeOf(Int8Array);
var TypedArrayPrototype = Int8ArrayPrototype && getPrototypeOf(Int8ArrayPrototype);
var ObjectPrototype = Object.prototype;
var isPrototypeOf = ObjectPrototype.isPrototypeOf;
var TO_STRING_TAG = wellKnownSymbol('toStringTag');
var TYPED_ARRAY_TAG = uid('TYPED_ARRAY_TAG');
// Fixing native typed arrays in Opera Presto crashes the browser, see #595
var NATIVE_ARRAY_BUFFER_VIEWS = NATIVE_ARRAY_BUFFER && !!setPrototypeOf && classof(global.opera) !== 'Opera';
var TYPED_ARRAY_TAG_REQIRED = false;
var NAME;
var TypedArrayConstructorsList = {
Int8Array: 1,
Uint8Array: 1,
Uint8ClampedArray: 1,
Int16Array: 2,
Uint16Array: 2,
Int32Array: 4,
Uint32Array: 4,
Float32Array: 4,
Float64Array: 8
};
var isView = function isView(it) {
var klass = classof(it);
return klass === 'DataView' || has(TypedArrayConstructorsList, klass);
};
var isTypedArray = function (it) {
return isObject(it) && has(TypedArrayConstructorsList, classof(it));
};
var aTypedArray = function (it) {
if (isTypedArray(it)) return it;
throw TypeError('Target is not a typed array');
};
var aTypedArrayConstructor = function (C) {
if (setPrototypeOf) {
if (isPrototypeOf.call(TypedArray, C)) return C;
} else for (var ARRAY in TypedArrayConstructorsList) if (has(TypedArrayConstructorsList, NAME)) {
var TypedArrayConstructor = global[ARRAY];
if (TypedArrayConstructor && (C === TypedArrayConstructor || isPrototypeOf.call(TypedArrayConstructor, C))) {
return C;
}
} throw TypeError('Target is not a typed array constructor');
};
var exportTypedArrayMethod = function (KEY, property, forced) {
if (!DESCRIPTORS) return;
if (forced) for (var ARRAY in TypedArrayConstructorsList) {
var TypedArrayConstructor = global[ARRAY];
if (TypedArrayConstructor && has(TypedArrayConstructor.prototype, KEY)) {
delete TypedArrayConstructor.prototype[KEY];
}
}
if (!TypedArrayPrototype[KEY] || forced) {
redefine(TypedArrayPrototype, KEY, forced ? property
: NATIVE_ARRAY_BUFFER_VIEWS && Int8ArrayPrototype[KEY] || property);
}
};
var exportTypedArrayStaticMethod = function (KEY, property, forced) {
var ARRAY, TypedArrayConstructor;
if (!DESCRIPTORS) return;
if (setPrototypeOf) {
if (forced) for (ARRAY in TypedArrayConstructorsList) {
TypedArrayConstructor = global[ARRAY];
if (TypedArrayConstructor && has(TypedArrayConstructor, KEY)) {
delete TypedArrayConstructor[KEY];
}
}
if (!TypedArray[KEY] || forced) {
// V8 ~ Chrome 49-50 `%TypedArray%` methods are non-writable non-configurable
try {
return redefine(TypedArray, KEY, forced ? property : NATIVE_ARRAY_BUFFER_VIEWS && Int8Array[KEY] || property);
} catch (error) { /* empty */ }
} else return;
}
for (ARRAY in TypedArrayConstructorsList) {
TypedArrayConstructor = global[ARRAY];
if (TypedArrayConstructor && (!TypedArrayConstructor[KEY] || forced)) {
redefine(TypedArrayConstructor, KEY, property);
}
}
};
for (NAME in TypedArrayConstructorsList) {
if (!global[NAME]) NATIVE_ARRAY_BUFFER_VIEWS = false;
}
// WebKit bug - typed arrays constructors prototype is Object.prototype
if (!NATIVE_ARRAY_BUFFER_VIEWS || typeof TypedArray != 'function' || TypedArray === Function.prototype) {
// eslint-disable-next-line no-shadow
TypedArray = function TypedArray() {
throw TypeError('Incorrect invocation');
};
if (NATIVE_ARRAY_BUFFER_VIEWS) for (NAME in TypedArrayConstructorsList) {
if (global[NAME]) setPrototypeOf(global[NAME], TypedArray);
}
}
if (!NATIVE_ARRAY_BUFFER_VIEWS || !TypedArrayPrototype || TypedArrayPrototype === ObjectPrototype) {
TypedArrayPrototype = TypedArray.prototype;
if (NATIVE_ARRAY_BUFFER_VIEWS) for (NAME in TypedArrayConstructorsList) {
if (global[NAME]) setPrototypeOf(global[NAME].prototype, TypedArrayPrototype);
}
}
// WebKit bug - one more object in Uint8ClampedArray prototype chain
if (NATIVE_ARRAY_BUFFER_VIEWS && getPrototypeOf(Uint8ClampedArrayPrototype) !== TypedArrayPrototype) {
setPrototypeOf(Uint8ClampedArrayPrototype, TypedArrayPrototype);
}
if (DESCRIPTORS && !has(TypedArrayPrototype, TO_STRING_TAG)) {
TYPED_ARRAY_TAG_REQIRED = true;
defineProperty(TypedArrayPrototype, TO_STRING_TAG, { get: function () {
return isObject(this) ? this[TYPED_ARRAY_TAG] : undefined;
} });
for (NAME in TypedArrayConstructorsList) if (global[NAME]) {
createNonEnumerableProperty(global[NAME], TYPED_ARRAY_TAG, NAME);
}
}
module.exports = {
NATIVE_ARRAY_BUFFER_VIEWS: NATIVE_ARRAY_BUFFER_VIEWS,
TYPED_ARRAY_TAG: TYPED_ARRAY_TAG_REQIRED && TYPED_ARRAY_TAG,
aTypedArray: aTypedArray,
aTypedArrayConstructor: aTypedArrayConstructor,
exportTypedArrayMethod: exportTypedArrayMethod,
exportTypedArrayStaticMethod: exportTypedArrayStaticMethod,
isView: isView,
isTypedArray: isTypedArray,
TypedArray: TypedArray,
TypedArrayPrototype: TypedArrayPrototype
};
| apache-2.0 |
resir014/brackets | src/project/SidebarView.js | 10278 | /*
* Copyright (c) 2012 Adobe Systems Incorporated. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
*/
/*jslint vars: true, plusplus: true, devel: true, nomen: true, indent: 4, maxerr: 50 */
/*global define, $ */
/**
* The view that controls the showing and hiding of the sidebar.
*
* Although the sidebar view doesn't dispatch any events directly, it is a
* resizable element (../utils/Resizer.js), which means it can dispatch Resizer
* events. For example, if you want to listen for the sidebar showing
* or hiding itself, set up listeners for the corresponding Resizer events,
* panelCollapsed and panelExpanded:
*
* $("#sidebar").on("panelCollapsed", ...);
* $("#sidebar").on("panelExpanded", ...);
*/
define(function (require, exports, module) {
"use strict";
var AppInit = require("utils/AppInit"),
ProjectManager = require("project/ProjectManager"),
WorkingSetView = require("project/WorkingSetView"),
MainViewManager = require("view/MainViewManager"),
CommandManager = require("command/CommandManager"),
Commands = require("command/Commands"),
Strings = require("strings"),
Resizer = require("utils/Resizer"),
_ = require("thirdparty/lodash");
// These vars are initialized by the htmlReady handler
// below since they refer to DOM elements
var $sidebar,
$gearMenu,
$splitViewMenu,
$projectTitle,
$projectFilesContainer,
$workingSetViewsContainer;
var _cmdSplitNone,
_cmdSplitVertical,
_cmdSplitHorizontal;
/**
* @private
* Update project title when the project root changes
*/
function _updateProjectTitle() {
var displayName = ProjectManager.getProjectRoot().name;
var fullPath = ProjectManager.getProjectRoot().fullPath;
if (displayName === "" && fullPath === "/") {
displayName = "/";
}
$projectTitle.html(_.escape(displayName));
$projectTitle.attr("title", fullPath);
// Trigger a scroll on the project files container to
// reposition the scroller shadows and avoid issue #2255
$projectFilesContainer.trigger("scroll");
}
/**
* Toggle sidebar visibility.
*/
function toggle() {
Resizer.toggle($sidebar);
}
/**
* Show the sidebar.
*/
function show() {
Resizer.show($sidebar);
}
/**
* Hide the sidebar.
*/
function hide() {
Resizer.hide($sidebar);
}
/**
* Returns the visibility state of the sidebar.
* @return {boolean} true if element is visible, false if it is not visible
*/
function isVisible() {
return Resizer.isVisible($sidebar);
}
/**
* Update state of working set
* @private
*/
function _updateWorkingSetState() {
if (MainViewManager.getPaneCount() === 1 &&
MainViewManager.getWorkingSetSize(MainViewManager.ACTIVE_PANE) === 0) {
$workingSetViewsContainer.hide();
$gearMenu.hide();
} else {
$workingSetViewsContainer.show();
$gearMenu.show();
}
}
/**
* Update state of splitview and option elements
* @private
*/
function _updateUIStates() {
var spriteIndex,
ICON_CLASSES = ["splitview-icon-none", "splitview-icon-vertical", "splitview-icon-horizontal"],
layoutScheme = MainViewManager.getLayoutScheme();
if (layoutScheme.columns > 1) {
spriteIndex = 1;
} else if (layoutScheme.rows > 1) {
spriteIndex = 2;
} else {
spriteIndex = 0;
}
// SplitView Icon
$splitViewMenu.removeClass(ICON_CLASSES.join(" "))
.addClass(ICON_CLASSES[spriteIndex]);
// SplitView Menu
_cmdSplitNone.setChecked(spriteIndex === 0);
_cmdSplitVertical.setChecked(spriteIndex === 1);
_cmdSplitHorizontal.setChecked(spriteIndex === 2);
// Options icon
_updateWorkingSetState();
}
/**
* Handle No Split Command
* @private
*/
function _handleSplitViewNone() {
MainViewManager.setLayoutScheme(1, 1);
}
/**
* Handle Vertical Split Command
* @private
*/
function _handleSplitViewVertical() {
MainViewManager.setLayoutScheme(1, 2);
}
/**
* Handle Horizontal Split Command
* @private
*/
function _handleSplitViewHorizontal() {
MainViewManager.setLayoutScheme(2, 1);
}
// Initialize items dependent on HTML DOM
AppInit.htmlReady(function () {
$sidebar = $("#sidebar");
$gearMenu = $sidebar.find(".working-set-option-btn");
$splitViewMenu = $sidebar.find(".working-set-splitview-btn");
$projectTitle = $sidebar.find("#project-title");
$projectFilesContainer = $sidebar.find("#project-files-container");
$workingSetViewsContainer = $sidebar.find("#working-set-list-container");
function _resizeSidebarSelection() {
var $element;
$sidebar.find(".sidebar-selection").each(function (index, element) {
$element = $(element);
$element.width($element.parent()[0].scrollWidth);
});
}
// init
$sidebar.on("panelResizeStart", function (evt, width) {
$sidebar.find(".sidebar-selection-extension").css("display", "none");
$sidebar.find(".scroller-shadow").css("display", "none");
});
$sidebar.on("panelResizeUpdate", function (evt, width) {
$sidebar.find(".sidebar-selection").width(width);
ProjectManager._setFileTreeSelectionWidth(width);
});
$sidebar.on("panelResizeEnd", function (evt, width) {
_resizeSidebarSelection();
$sidebar.find(".sidebar-selection-extension").css("display", "block").css("left", width);
$sidebar.find(".scroller-shadow").css("display", "block");
$projectFilesContainer.triggerHandler("scroll");
WorkingSetView.syncSelectionIndicator();
});
$sidebar.on("panelCollapsed", function (evt, width) {
CommandManager.get(Commands.VIEW_HIDE_SIDEBAR).setName(Strings.CMD_SHOW_SIDEBAR);
});
$sidebar.on("panelExpanded", function (evt, width) {
WorkingSetView.refresh();
_resizeSidebarSelection();
$sidebar.find(".scroller-shadow").css("display", "block");
$sidebar.find(".sidebar-selection-extension").css("left", width);
$projectFilesContainer.triggerHandler("scroll");
WorkingSetView.syncSelectionIndicator();
CommandManager.get(Commands.VIEW_HIDE_SIDEBAR).setName(Strings.CMD_HIDE_SIDEBAR);
});
// AppInit.htmlReady in utils/Resizer executes before, so it's possible that the sidebar
// is collapsed before we add the event. Check here initially
if (!$sidebar.is(":visible")) {
$sidebar.trigger("panelCollapsed");
}
// wire up an event handler to monitor when panes are created
MainViewManager.on("paneCreate", function (evt, paneId) {
WorkingSetView.createWorkingSetViewForPane($workingSetViewsContainer, paneId);
});
MainViewManager.on("paneLayoutChange", function () {
_updateUIStates();
});
MainViewManager.on("workingSetAdd workingSetAddList workingSetRemove workingSetRemoveList workingSetUpdate", function () {
_updateWorkingSetState();
});
// create WorkingSetViews for each pane already created
_.forEach(MainViewManager.getPaneIdList(), function (paneId) {
WorkingSetView.createWorkingSetViewForPane($workingSetViewsContainer, paneId);
});
_updateUIStates();
// Tooltips
$gearMenu.attr("title", Strings.GEAR_MENU_TOOLTIP);
$splitViewMenu.attr("title", Strings.SPLITVIEW_MENU_TOOLTIP);
});
ProjectManager.on("projectOpen", _updateProjectTitle);
/**
* Register Command Handlers
*/
_cmdSplitNone = CommandManager.register(Strings.CMD_SPLITVIEW_NONE, Commands.CMD_SPLITVIEW_NONE, _handleSplitViewNone);
_cmdSplitVertical = CommandManager.register(Strings.CMD_SPLITVIEW_VERTICAL, Commands.CMD_SPLITVIEW_VERTICAL, _handleSplitViewVertical);
_cmdSplitHorizontal = CommandManager.register(Strings.CMD_SPLITVIEW_HORIZONTAL, Commands.CMD_SPLITVIEW_HORIZONTAL, _handleSplitViewHorizontal);
CommandManager.register(Strings.CMD_HIDE_SIDEBAR, Commands.VIEW_HIDE_SIDEBAR, toggle);
// Define public API
exports.toggle = toggle;
exports.show = show;
exports.hide = hide;
exports.isVisible = isVisible;
});
| mit |
xbmc/atv2 | xbmc/lib/libmms/glib-2.20.4/glib/gunidecomp.h | 492428 | /* This file is automatically generated. DO NOT EDIT! */
#ifndef DECOMP_H
#define DECOMP_H
#define G_UNICODE_LAST_CHAR 0x10ffff
#define G_UNICODE_MAX_TABLE_INDEX (0x110000 / 256)
#define G_UNICODE_LAST_CHAR_PART1 0x2FAFF
#define G_UNICODE_LAST_PAGE_PART1 762
#define G_UNICODE_NOT_PRESENT_OFFSET 65535
static const guchar cclass_data[][256] = {
{ /* page 3, index 0 */
230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230,
230, 230, 230, 230, 230, 230, 230, 232, 220, 220, 220, 220, 232, 216,
220, 220, 220, 220, 220, 202, 202, 220, 220, 220, 220, 202, 202, 220,
220, 220, 220, 220, 220, 220, 220, 220, 220, 220, 1, 1, 1, 1, 1, 220,
220, 220, 220, 230, 230, 230, 230, 230, 230, 230, 230, 240, 230, 220,
220, 220, 230, 230, 230, 220, 220, 0, 230, 230, 230, 220, 220, 220, 220,
230, 232, 220, 220, 230, 233, 234, 234, 233, 234, 234, 233, 230, 230,
230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 230, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
},
{ /* page 4, index 1 */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 230, 230, 230, 230, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
},
{ /* page 5, index 2 */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 220, 230, 230, 230, 230, 220, 230, 230, 230, 222, 220, 230, 230, 230,
230, 230, 230, 220, 220, 220, 220, 220, 220, 230, 230, 220, 230, 230,
222, 228, 230, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 19, 20, 21, 22, 0,
23, 0, 24, 25, 0, 230, 220, 0, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
},
{ /* page 6, index 3 */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 230, 230, 230, 230, 230,
230, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 27, 28, 29, 30, 31, 32, 33, 34, 230, 230, 220, 220,
230, 230, 230, 230, 230, 220, 230, 230, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 35, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 230, 230, 230, 230, 230, 230, 230, 0,
0, 230, 230, 230, 230, 220, 230, 0, 0, 230, 230, 0, 220, 230, 230, 220,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
},
{ /* page 7, index 4 */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 36, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
230, 220, 230, 230, 220, 230, 230, 220, 220, 220, 230, 220, 220, 230,
220, 230, 230, 230, 220, 230, 220, 230, 220, 230, 220, 230, 230, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 230, 230, 230, 230, 230, 230, 230,
220, 230, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
},
{ /* page 9, index 5 */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 9, 0, 0, 0, 230, 220, 230, 230, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 7, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 9, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
},
{ /* page 10, index 6 */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 7, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
},
{ /* page 11, index 7 */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
},
{ /* page 12, index 8 */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 9, 0, 0, 0, 0, 0, 0, 0, 84, 91, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 7, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
},
{ /* page 13, index 9 */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
},
{ /* page 14, index 10 */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 103, 103, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 107, 107, 107, 107, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 118, 118, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 122, 122, 122, 122, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
},
{ /* page 15, index 11 */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
220, 220, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 220, 0, 220, 0, 216, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 129, 130, 0,
132, 0, 0, 0, 0, 0, 130, 130, 130, 130, 0, 0, 130, 0, 230, 230, 9, 0,
230, 230, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 220, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0
},
{ /* page 16, index 12 */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 7, 0, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
},
{ /* page 19, index 13 */
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
}
};
static const gint16 combining_class_table_part1[763] = {
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 /* page 3 */,
1 /* page 4 */,
2 /* page 5 */,
3 /* page 6 */,
4 /* page 7 */,
0 + G_UNICODE_MAX_TABLE_INDEX,
5 /* page 9 */,
6 /* page 10 */,
7 /* page 11 */,
8 /* page 12 */,
9 /* page 13 */,
10 /* page 14 */,
11 /* page 15 */,
12 /* page 16 */,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
13 /* page 19 */,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
14 /* page 23 */,
15 /* page 24 */,
16 /* page 25 */,
17 /* page 26 */,
18 /* page 27 */,
0 + G_UNICODE_MAX_TABLE_INDEX,
19 /* page 29 */,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
20 /* page 32 */,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
21 /* page 48 */,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
22 /* page 168 */,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
23 /* page 251 */,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
24 /* page 254 */,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
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0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
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25 /* page 266 */,
0 + G_UNICODE_MAX_TABLE_INDEX,
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0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
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0 + G_UNICODE_MAX_TABLE_INDEX,
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26 /* page 465 */,
27 /* page 466 */,
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0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
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0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
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0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
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0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
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0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
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0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX
};
static const gint16 combining_class_table_part2[768] = {
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
0 + G_UNICODE_MAX_TABLE_INDEX,
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};
typedef struct
{
gunichar ch;
guint16 canon_offset;
guint16 compat_offset;
} decomposition;
static const decomposition decomp_table[] =
{
{ 0x00a0, G_UNICODE_NOT_PRESENT_OFFSET, 0 },
{ 0x00a8, G_UNICODE_NOT_PRESENT_OFFSET, 2 },
{ 0x00aa, G_UNICODE_NOT_PRESENT_OFFSET, 6 },
{ 0x00af, G_UNICODE_NOT_PRESENT_OFFSET, 8 },
{ 0x00b2, G_UNICODE_NOT_PRESENT_OFFSET, 12 },
{ 0x00b3, G_UNICODE_NOT_PRESENT_OFFSET, 14 },
{ 0x00b4, G_UNICODE_NOT_PRESENT_OFFSET, 16 },
{ 0x00b5, G_UNICODE_NOT_PRESENT_OFFSET, 20 },
{ 0x00b8, G_UNICODE_NOT_PRESENT_OFFSET, 23 },
{ 0x00b9, G_UNICODE_NOT_PRESENT_OFFSET, 27 },
{ 0x00ba, G_UNICODE_NOT_PRESENT_OFFSET, 29 },
{ 0x00bc, G_UNICODE_NOT_PRESENT_OFFSET, 31 },
{ 0x00bd, G_UNICODE_NOT_PRESENT_OFFSET, 37 },
{ 0x00be, G_UNICODE_NOT_PRESENT_OFFSET, 43 },
{ 0x00c0, 49, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00c1, 53, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00c2, 57, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00c3, 61, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00c4, 65, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00c5, 69, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00c7, 73, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00c8, 77, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00c9, 81, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00ca, 85, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00cb, 89, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00cc, 93, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00cd, 97, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00ce, 101, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00cf, 105, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00d1, 109, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00d2, 113, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00d3, 117, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00d4, 121, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00d5, 125, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00d6, 129, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00d9, 133, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00da, 137, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00db, 141, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00dc, 145, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00dd, 149, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00e0, 153, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00e1, 157, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00e2, 161, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00e3, 165, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00e4, 169, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00e5, 173, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00e7, 177, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00e8, 181, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00e9, 185, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00ea, 189, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00eb, 193, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00ec, 197, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00ed, 201, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00ee, 205, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00ef, 209, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00f1, 213, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00f2, 217, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00f3, 221, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00f4, 225, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00f5, 229, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00f6, 233, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00f9, 237, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00fa, 241, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00fb, 245, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00fc, 249, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00fd, 253, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x00ff, 257, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0100, 261, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0101, 265, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0102, 269, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0103, 273, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0104, 277, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0105, 281, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0106, 285, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0107, 289, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0108, 293, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0109, 297, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x010a, 301, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x010b, 305, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x010c, 309, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x010d, 313, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x010e, 317, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x010f, 321, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0112, 325, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0113, 329, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0114, 333, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0115, 337, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0116, 341, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0117, 345, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0118, 349, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0119, 353, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x011a, 357, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x011b, 361, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x011c, 365, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x011d, 369, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x011e, 373, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x011f, 377, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0120, 381, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0121, 385, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0122, 389, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0123, 393, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0124, 397, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0125, 401, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0128, 405, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0129, 409, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x012a, 413, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x012b, 417, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x012c, 421, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x012d, 425, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x012e, 429, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x012f, 433, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0130, 437, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0132, G_UNICODE_NOT_PRESENT_OFFSET, 441 },
{ 0x0133, G_UNICODE_NOT_PRESENT_OFFSET, 444 },
{ 0x0134, 447, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0135, 451, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0136, 455, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0137, 459, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0139, 463, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x013a, 467, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x013b, 471, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x013c, 475, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x013d, 479, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x013e, 483, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x013f, G_UNICODE_NOT_PRESENT_OFFSET, 487 },
{ 0x0140, G_UNICODE_NOT_PRESENT_OFFSET, 491 },
{ 0x0143, 495, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0144, 499, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0145, 503, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0146, 507, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0147, 511, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0148, 515, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0149, G_UNICODE_NOT_PRESENT_OFFSET, 519 },
{ 0x014c, 523, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x014d, 527, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x014e, 531, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x014f, 535, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0150, 539, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0151, 543, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0154, 547, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0155, 551, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0156, 555, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0157, 559, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0158, 563, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0159, 567, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x015a, 571, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x015b, 575, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x015c, 579, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x015d, 583, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x015e, 587, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x015f, 591, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0160, 595, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0161, 599, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0162, 603, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0163, 607, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0164, 611, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0165, 615, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0168, 619, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0169, 623, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x016a, 627, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x016b, 631, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x016c, 635, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x016d, 639, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x016e, 643, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x016f, 647, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0170, 651, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0171, 655, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0172, 659, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0173, 663, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0174, 667, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0175, 671, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0176, 675, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0177, 679, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0178, 683, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0179, 687, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x017a, 691, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x017b, 695, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x017c, 699, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x017d, 703, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x017e, 707, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x017f, G_UNICODE_NOT_PRESENT_OFFSET, 711 },
{ 0x01a0, 713, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01a1, 717, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01af, 721, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01b0, 725, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01c4, G_UNICODE_NOT_PRESENT_OFFSET, 729 },
{ 0x01c5, G_UNICODE_NOT_PRESENT_OFFSET, 734 },
{ 0x01c6, G_UNICODE_NOT_PRESENT_OFFSET, 739 },
{ 0x01c7, G_UNICODE_NOT_PRESENT_OFFSET, 744 },
{ 0x01c8, G_UNICODE_NOT_PRESENT_OFFSET, 747 },
{ 0x01c9, G_UNICODE_NOT_PRESENT_OFFSET, 750 },
{ 0x01ca, G_UNICODE_NOT_PRESENT_OFFSET, 753 },
{ 0x01cb, G_UNICODE_NOT_PRESENT_OFFSET, 756 },
{ 0x01cc, G_UNICODE_NOT_PRESENT_OFFSET, 759 },
{ 0x01cd, 762, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01ce, 766, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01cf, 770, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01d0, 774, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01d1, 778, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01d2, 782, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01d3, 786, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01d4, 790, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01d5, 794, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01d6, 800, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01d7, 806, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01d8, 812, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01d9, 818, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01da, 824, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01db, 830, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01dc, 836, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01de, 842, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01df, 848, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01e0, 854, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01e1, 860, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01e2, 866, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01e3, 871, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01e6, 876, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01e7, 880, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01e8, 884, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01e9, 888, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01ea, 892, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01eb, 896, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01ec, 900, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01ed, 906, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01ee, 912, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01ef, 917, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01f0, 922, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01f1, G_UNICODE_NOT_PRESENT_OFFSET, 926 },
{ 0x01f2, G_UNICODE_NOT_PRESENT_OFFSET, 929 },
{ 0x01f3, G_UNICODE_NOT_PRESENT_OFFSET, 932 },
{ 0x01f4, 935, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01f5, 939, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01f8, 943, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01f9, 947, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01fa, 951, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01fb, 957, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01fc, 963, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01fd, 968, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01fe, 973, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x01ff, 978, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0200, 983, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0201, 987, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0202, 991, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0203, 995, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0204, 999, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0205, 1003, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0206, 1007, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0207, 1011, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0208, 1015, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0209, 1019, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x020a, 1023, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x020b, 1027, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x020c, 1031, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x020d, 1035, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x020e, 1039, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x020f, 1043, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0210, 1047, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0211, 1051, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0212, 1055, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0213, 1059, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0214, 1063, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0215, 1067, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0216, 1071, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0217, 1075, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0218, 1079, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0219, 1083, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x021a, 1087, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x021b, 1091, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x021e, 1095, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x021f, 1099, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0226, 1103, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0227, 1107, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0228, 1111, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0229, 1115, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x022a, 1119, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x022b, 1125, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x022c, 1131, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x022d, 1137, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x022e, 1143, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x022f, 1147, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0230, 1151, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0231, 1157, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0232, 1163, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0233, 1167, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x02b0, G_UNICODE_NOT_PRESENT_OFFSET, 1171 },
{ 0x02b1, G_UNICODE_NOT_PRESENT_OFFSET, 1173 },
{ 0x02b2, G_UNICODE_NOT_PRESENT_OFFSET, 1176 },
{ 0x02b3, G_UNICODE_NOT_PRESENT_OFFSET, 1178 },
{ 0x02b4, G_UNICODE_NOT_PRESENT_OFFSET, 1180 },
{ 0x02b5, G_UNICODE_NOT_PRESENT_OFFSET, 1183 },
{ 0x02b6, G_UNICODE_NOT_PRESENT_OFFSET, 1186 },
{ 0x02b7, G_UNICODE_NOT_PRESENT_OFFSET, 1189 },
{ 0x02b8, G_UNICODE_NOT_PRESENT_OFFSET, 1191 },
{ 0x02d8, G_UNICODE_NOT_PRESENT_OFFSET, 1193 },
{ 0x02d9, G_UNICODE_NOT_PRESENT_OFFSET, 1197 },
{ 0x02da, G_UNICODE_NOT_PRESENT_OFFSET, 1201 },
{ 0x02db, G_UNICODE_NOT_PRESENT_OFFSET, 1205 },
{ 0x02dc, G_UNICODE_NOT_PRESENT_OFFSET, 1209 },
{ 0x02dd, G_UNICODE_NOT_PRESENT_OFFSET, 1213 },
{ 0x02e0, G_UNICODE_NOT_PRESENT_OFFSET, 1217 },
{ 0x02e1, G_UNICODE_NOT_PRESENT_OFFSET, 1220 },
{ 0x02e2, G_UNICODE_NOT_PRESENT_OFFSET, 711 },
{ 0x02e3, G_UNICODE_NOT_PRESENT_OFFSET, 1222 },
{ 0x02e4, G_UNICODE_NOT_PRESENT_OFFSET, 1224 },
{ 0x0340, 1227, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0341, 1230, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0343, 1233, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0344, 1236, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0374, 1241, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x037a, G_UNICODE_NOT_PRESENT_OFFSET, 1244 },
{ 0x037e, 1248, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0384, G_UNICODE_NOT_PRESENT_OFFSET, 16 },
{ 0x0385, 1250, 1255 },
{ 0x0386, 1261, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0387, 1266, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0388, 1269, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0389, 1274, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x038a, 1279, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x038c, 1284, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x038e, 1289, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x038f, 1294, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0390, 1299, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x03aa, 1306, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x03ab, 1311, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x03ac, 1316, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x03ad, 1321, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x03ae, 1326, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x03af, 1331, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x03b0, 1336, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x03ca, 1343, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x03cb, 1348, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x03cc, 1353, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x03cd, 1358, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x03ce, 1363, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x03d0, G_UNICODE_NOT_PRESENT_OFFSET, 1368 },
{ 0x03d1, G_UNICODE_NOT_PRESENT_OFFSET, 1371 },
{ 0x03d2, G_UNICODE_NOT_PRESENT_OFFSET, 1374 },
{ 0x03d3, 1377, 1289 },
{ 0x03d4, 1382, 1311 },
{ 0x03d5, G_UNICODE_NOT_PRESENT_OFFSET, 1387 },
{ 0x03d6, G_UNICODE_NOT_PRESENT_OFFSET, 1390 },
{ 0x03f0, G_UNICODE_NOT_PRESENT_OFFSET, 1393 },
{ 0x03f1, G_UNICODE_NOT_PRESENT_OFFSET, 1396 },
{ 0x03f2, G_UNICODE_NOT_PRESENT_OFFSET, 1399 },
{ 0x03f4, G_UNICODE_NOT_PRESENT_OFFSET, 1402 },
{ 0x03f5, G_UNICODE_NOT_PRESENT_OFFSET, 1405 },
{ 0x03f9, G_UNICODE_NOT_PRESENT_OFFSET, 1408 },
{ 0x0400, 1411, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0401, 1416, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0403, 1421, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0407, 1426, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x040c, 1431, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x040d, 1436, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x040e, 1441, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0419, 1446, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0439, 1451, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0450, 1456, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0451, 1461, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0453, 1466, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0457, 1471, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x045c, 1476, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x045d, 1481, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x045e, 1486, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0476, 1491, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0477, 1496, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04c1, 1501, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04c2, 1506, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04d0, 1511, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04d1, 1516, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04d2, 1521, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04d3, 1526, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04d6, 1531, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04d7, 1536, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04da, 1541, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04db, 1546, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04dc, 1551, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04dd, 1556, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04de, 1561, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04df, 1566, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04e2, 1571, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04e3, 1576, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04e4, 1581, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04e5, 1586, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04e6, 1591, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04e7, 1596, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04ea, 1601, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04eb, 1606, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04ec, 1611, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04ed, 1616, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04ee, 1621, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04ef, 1626, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04f0, 1631, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04f1, 1636, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04f2, 1641, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04f3, 1646, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04f4, 1651, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04f5, 1656, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04f8, 1661, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x04f9, 1666, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0587, G_UNICODE_NOT_PRESENT_OFFSET, 1671 },
{ 0x0622, 1676, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0623, 1681, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0624, 1686, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0625, 1691, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0626, 1696, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0675, G_UNICODE_NOT_PRESENT_OFFSET, 1701 },
{ 0x0676, G_UNICODE_NOT_PRESENT_OFFSET, 1706 },
{ 0x0677, G_UNICODE_NOT_PRESENT_OFFSET, 1711 },
{ 0x0678, G_UNICODE_NOT_PRESENT_OFFSET, 1716 },
{ 0x06c0, 1721, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x06c2, 1726, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x06d3, 1731, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0929, 1736, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0931, 1743, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0934, 1750, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0958, 1757, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0959, 1764, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x095a, 1771, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x095b, 1778, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x095c, 1785, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x095d, 1792, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x095e, 1799, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x095f, 1806, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x09cb, 1813, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x09cc, 1820, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x09dc, 1827, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x09dd, 1834, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x09df, 1841, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0a33, 1848, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0a36, 1855, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0a59, 1862, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0a5a, 1869, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0a5b, 1876, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0a5e, 1883, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0b48, 1890, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0b4b, 1897, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0b4c, 1904, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0b5c, 1911, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0b5d, 1918, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0b94, 1925, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0bca, 1932, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0bcb, 1939, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0bcc, 1946, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0c48, 1953, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0cc0, 1960, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0cc7, 1967, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0cc8, 1974, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0cca, 1981, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0ccb, 1988, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0d4a, 1998, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0d4b, 2005, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0d4c, 2012, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0dda, 2019, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0ddc, 2026, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0ddd, 2033, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0dde, 2043, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0e33, G_UNICODE_NOT_PRESENT_OFFSET, 2050 },
{ 0x0eb3, G_UNICODE_NOT_PRESENT_OFFSET, 2057 },
{ 0x0edc, G_UNICODE_NOT_PRESENT_OFFSET, 2064 },
{ 0x0edd, G_UNICODE_NOT_PRESENT_OFFSET, 2071 },
{ 0x0f0c, G_UNICODE_NOT_PRESENT_OFFSET, 2078 },
{ 0x0f43, 2082, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0f4d, 2089, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0f52, 2096, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0f57, 2103, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0f5c, 2110, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0f69, 2117, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0f73, 2124, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0f75, 2131, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0f76, 2138, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0f77, G_UNICODE_NOT_PRESENT_OFFSET, 2145 },
{ 0x0f78, 2155, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0f79, G_UNICODE_NOT_PRESENT_OFFSET, 2162 },
{ 0x0f81, 2172, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0f93, 2179, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0f9d, 2186, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0fa2, 2193, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0fa7, 2200, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0fac, 2207, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x0fb9, 2214, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1026, 2221, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x10fc, G_UNICODE_NOT_PRESENT_OFFSET, 2228 },
{ 0x1b06, 2232, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1b08, 2239, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1b0a, 2246, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1b0c, 2253, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1b0e, 2260, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1b12, 2267, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1b3b, 2274, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1b3d, 2281, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1b40, 2288, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1b41, 2295, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1b43, 2302, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1d2c, G_UNICODE_NOT_PRESENT_OFFSET, 2309 },
{ 0x1d2d, G_UNICODE_NOT_PRESENT_OFFSET, 2311 },
{ 0x1d2e, G_UNICODE_NOT_PRESENT_OFFSET, 2314 },
{ 0x1d30, G_UNICODE_NOT_PRESENT_OFFSET, 2316 },
{ 0x1d31, G_UNICODE_NOT_PRESENT_OFFSET, 2318 },
{ 0x1d32, G_UNICODE_NOT_PRESENT_OFFSET, 2320 },
{ 0x1d33, G_UNICODE_NOT_PRESENT_OFFSET, 2323 },
{ 0x1d34, G_UNICODE_NOT_PRESENT_OFFSET, 2325 },
{ 0x1d35, G_UNICODE_NOT_PRESENT_OFFSET, 2327 },
{ 0x1d36, G_UNICODE_NOT_PRESENT_OFFSET, 2329 },
{ 0x1d37, G_UNICODE_NOT_PRESENT_OFFSET, 2331 },
{ 0x1d38, G_UNICODE_NOT_PRESENT_OFFSET, 2333 },
{ 0x1d39, G_UNICODE_NOT_PRESENT_OFFSET, 2335 },
{ 0x1d3a, G_UNICODE_NOT_PRESENT_OFFSET, 2337 },
{ 0x1d3c, G_UNICODE_NOT_PRESENT_OFFSET, 2339 },
{ 0x1d3d, G_UNICODE_NOT_PRESENT_OFFSET, 2341 },
{ 0x1d3e, G_UNICODE_NOT_PRESENT_OFFSET, 2344 },
{ 0x1d3f, G_UNICODE_NOT_PRESENT_OFFSET, 2346 },
{ 0x1d40, G_UNICODE_NOT_PRESENT_OFFSET, 2348 },
{ 0x1d41, G_UNICODE_NOT_PRESENT_OFFSET, 2350 },
{ 0x1d42, G_UNICODE_NOT_PRESENT_OFFSET, 2352 },
{ 0x1d43, G_UNICODE_NOT_PRESENT_OFFSET, 6 },
{ 0x1d44, G_UNICODE_NOT_PRESENT_OFFSET, 2354 },
{ 0x1d45, G_UNICODE_NOT_PRESENT_OFFSET, 2357 },
{ 0x1d46, G_UNICODE_NOT_PRESENT_OFFSET, 2360 },
{ 0x1d47, G_UNICODE_NOT_PRESENT_OFFSET, 2364 },
{ 0x1d48, G_UNICODE_NOT_PRESENT_OFFSET, 2366 },
{ 0x1d49, G_UNICODE_NOT_PRESENT_OFFSET, 2368 },
{ 0x1d4a, G_UNICODE_NOT_PRESENT_OFFSET, 2370 },
{ 0x1d4b, G_UNICODE_NOT_PRESENT_OFFSET, 2373 },
{ 0x1d4c, G_UNICODE_NOT_PRESENT_OFFSET, 2376 },
{ 0x1d4d, G_UNICODE_NOT_PRESENT_OFFSET, 2379 },
{ 0x1d4f, G_UNICODE_NOT_PRESENT_OFFSET, 2381 },
{ 0x1d50, G_UNICODE_NOT_PRESENT_OFFSET, 2383 },
{ 0x1d51, G_UNICODE_NOT_PRESENT_OFFSET, 2385 },
{ 0x1d52, G_UNICODE_NOT_PRESENT_OFFSET, 29 },
{ 0x1d53, G_UNICODE_NOT_PRESENT_OFFSET, 2388 },
{ 0x1d54, G_UNICODE_NOT_PRESENT_OFFSET, 2391 },
{ 0x1d55, G_UNICODE_NOT_PRESENT_OFFSET, 2395 },
{ 0x1d56, G_UNICODE_NOT_PRESENT_OFFSET, 2399 },
{ 0x1d57, G_UNICODE_NOT_PRESENT_OFFSET, 2401 },
{ 0x1d58, G_UNICODE_NOT_PRESENT_OFFSET, 2403 },
{ 0x1d59, G_UNICODE_NOT_PRESENT_OFFSET, 2405 },
{ 0x1d5a, G_UNICODE_NOT_PRESENT_OFFSET, 2409 },
{ 0x1d5b, G_UNICODE_NOT_PRESENT_OFFSET, 2412 },
{ 0x1d5c, G_UNICODE_NOT_PRESENT_OFFSET, 2414 },
{ 0x1d5d, G_UNICODE_NOT_PRESENT_OFFSET, 1368 },
{ 0x1d5e, G_UNICODE_NOT_PRESENT_OFFSET, 2418 },
{ 0x1d5f, G_UNICODE_NOT_PRESENT_OFFSET, 2421 },
{ 0x1d60, G_UNICODE_NOT_PRESENT_OFFSET, 1387 },
{ 0x1d61, G_UNICODE_NOT_PRESENT_OFFSET, 2424 },
{ 0x1d62, G_UNICODE_NOT_PRESENT_OFFSET, 2427 },
{ 0x1d63, G_UNICODE_NOT_PRESENT_OFFSET, 1178 },
{ 0x1d64, G_UNICODE_NOT_PRESENT_OFFSET, 2403 },
{ 0x1d65, G_UNICODE_NOT_PRESENT_OFFSET, 2412 },
{ 0x1d66, G_UNICODE_NOT_PRESENT_OFFSET, 1368 },
{ 0x1d67, G_UNICODE_NOT_PRESENT_OFFSET, 2418 },
{ 0x1d68, G_UNICODE_NOT_PRESENT_OFFSET, 1396 },
{ 0x1d69, G_UNICODE_NOT_PRESENT_OFFSET, 1387 },
{ 0x1d6a, G_UNICODE_NOT_PRESENT_OFFSET, 2424 },
{ 0x1d78, G_UNICODE_NOT_PRESENT_OFFSET, 2429 },
{ 0x1d9b, G_UNICODE_NOT_PRESENT_OFFSET, 2432 },
{ 0x1d9c, G_UNICODE_NOT_PRESENT_OFFSET, 2435 },
{ 0x1d9d, G_UNICODE_NOT_PRESENT_OFFSET, 2437 },
{ 0x1d9e, G_UNICODE_NOT_PRESENT_OFFSET, 2440 },
{ 0x1d9f, G_UNICODE_NOT_PRESENT_OFFSET, 2376 },
{ 0x1da0, G_UNICODE_NOT_PRESENT_OFFSET, 2443 },
{ 0x1da1, G_UNICODE_NOT_PRESENT_OFFSET, 2445 },
{ 0x1da2, G_UNICODE_NOT_PRESENT_OFFSET, 2448 },
{ 0x1da3, G_UNICODE_NOT_PRESENT_OFFSET, 2451 },
{ 0x1da4, G_UNICODE_NOT_PRESENT_OFFSET, 2454 },
{ 0x1da5, G_UNICODE_NOT_PRESENT_OFFSET, 2457 },
{ 0x1da6, G_UNICODE_NOT_PRESENT_OFFSET, 2460 },
{ 0x1da7, G_UNICODE_NOT_PRESENT_OFFSET, 2463 },
{ 0x1da8, G_UNICODE_NOT_PRESENT_OFFSET, 2467 },
{ 0x1da9, G_UNICODE_NOT_PRESENT_OFFSET, 2470 },
{ 0x1daa, G_UNICODE_NOT_PRESENT_OFFSET, 2473 },
{ 0x1dab, G_UNICODE_NOT_PRESENT_OFFSET, 2477 },
{ 0x1dac, G_UNICODE_NOT_PRESENT_OFFSET, 2480 },
{ 0x1dad, G_UNICODE_NOT_PRESENT_OFFSET, 2483 },
{ 0x1dae, G_UNICODE_NOT_PRESENT_OFFSET, 2486 },
{ 0x1daf, G_UNICODE_NOT_PRESENT_OFFSET, 2489 },
{ 0x1db0, G_UNICODE_NOT_PRESENT_OFFSET, 2492 },
{ 0x1db1, G_UNICODE_NOT_PRESENT_OFFSET, 2495 },
{ 0x1db2, G_UNICODE_NOT_PRESENT_OFFSET, 2498 },
{ 0x1db3, G_UNICODE_NOT_PRESENT_OFFSET, 2501 },
{ 0x1db4, G_UNICODE_NOT_PRESENT_OFFSET, 2504 },
{ 0x1db5, G_UNICODE_NOT_PRESENT_OFFSET, 2507 },
{ 0x1db6, G_UNICODE_NOT_PRESENT_OFFSET, 2510 },
{ 0x1db7, G_UNICODE_NOT_PRESENT_OFFSET, 2513 },
{ 0x1db8, G_UNICODE_NOT_PRESENT_OFFSET, 2516 },
{ 0x1db9, G_UNICODE_NOT_PRESENT_OFFSET, 2520 },
{ 0x1dba, G_UNICODE_NOT_PRESENT_OFFSET, 2523 },
{ 0x1dbb, G_UNICODE_NOT_PRESENT_OFFSET, 2526 },
{ 0x1dbc, G_UNICODE_NOT_PRESENT_OFFSET, 2528 },
{ 0x1dbd, G_UNICODE_NOT_PRESENT_OFFSET, 2531 },
{ 0x1dbe, G_UNICODE_NOT_PRESENT_OFFSET, 2534 },
{ 0x1dbf, G_UNICODE_NOT_PRESENT_OFFSET, 1371 },
{ 0x1e00, 2537, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e01, 2541, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e02, 2545, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e03, 2549, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e04, 2553, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e05, 2557, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e06, 2561, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e07, 2565, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e08, 2569, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e09, 2575, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e0a, 2581, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e0b, 2585, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e0c, 2589, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e0d, 2593, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e0e, 2597, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e0f, 2601, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e10, 2605, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e11, 2609, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e12, 2613, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e13, 2617, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e14, 2621, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e15, 2627, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e16, 2633, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e17, 2639, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e18, 2645, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e19, 2649, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e1a, 2653, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e1b, 2657, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e1c, 2661, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e1d, 2667, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e1e, 2673, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e1f, 2677, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e20, 2681, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e21, 2685, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e22, 2689, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e23, 2693, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e24, 2697, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e25, 2701, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e26, 2705, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e27, 2709, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e28, 2713, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e29, 2717, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e2a, 2721, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e2b, 2725, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e2c, 2729, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e2d, 2733, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e2e, 2737, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e2f, 2743, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e30, 2749, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e31, 2753, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e32, 2757, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e33, 2761, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e34, 2765, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e35, 2769, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e36, 2773, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e37, 2777, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e38, 2781, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e39, 2787, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e3a, 2793, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e3b, 2797, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e3c, 2801, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e3d, 2805, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e3e, 2809, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e3f, 2813, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e40, 2817, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e41, 2821, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e42, 2825, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e43, 2829, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e44, 2833, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e45, 2837, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e46, 2841, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e47, 2845, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e48, 2849, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e49, 2853, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e4a, 2857, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e4b, 2861, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e4c, 2865, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e4d, 2871, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e4e, 2877, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e4f, 2883, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e50, 2889, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e51, 2895, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e52, 2901, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e53, 2907, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e54, 2913, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e55, 2917, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e56, 2921, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e57, 2925, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e58, 2929, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e59, 2933, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e5a, 2937, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e5b, 2941, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e5c, 2945, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e5d, 2951, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e5e, 2957, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e5f, 2961, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e60, 2965, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e61, 2969, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e62, 2973, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e63, 2977, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e64, 2981, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e65, 2987, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e66, 2993, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e67, 2999, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e68, 3005, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e69, 3011, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e6a, 3017, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e6b, 3021, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e6c, 3025, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e6d, 3029, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e6e, 3033, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e6f, 3037, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e70, 3041, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e71, 3045, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e72, 3049, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e73, 3053, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e74, 3057, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e75, 3061, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e76, 3065, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e77, 3069, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e78, 3073, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e79, 3079, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e7a, 3085, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e7b, 3091, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e7c, 3097, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e7d, 3101, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e7e, 3105, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e7f, 3109, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e80, 3113, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e81, 3117, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e82, 3121, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e83, 3125, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e84, 3129, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e85, 3133, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e86, 3137, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e87, 3141, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e88, 3145, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e89, 3149, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e8a, 3153, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e8b, 3157, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e8c, 3161, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e8d, 3165, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e8e, 3169, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e8f, 3173, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e90, 3177, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e91, 3181, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e92, 3185, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e93, 3189, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e94, 3193, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e95, 3197, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e96, 3201, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e97, 3205, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e98, 3209, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e99, 3213, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1e9a, G_UNICODE_NOT_PRESENT_OFFSET, 3217 },
{ 0x1e9b, 3221, 2969 },
{ 0x1ea0, 3226, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ea1, 3230, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ea2, 3234, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ea3, 3238, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ea4, 3242, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ea5, 3248, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ea6, 3254, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ea7, 3260, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ea8, 3266, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ea9, 3272, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1eaa, 3278, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1eab, 3284, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1eac, 3290, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ead, 3296, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1eae, 3302, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1eaf, 3308, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1eb0, 3314, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1eb1, 3320, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1eb2, 3326, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1eb3, 3332, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1eb4, 3338, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1eb5, 3344, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1eb6, 3350, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1eb7, 3356, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1eb8, 3362, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1eb9, 3366, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1eba, 3370, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ebb, 3374, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ebc, 3378, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ebd, 3382, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ebe, 3386, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ebf, 3392, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ec0, 3398, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ec1, 3404, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ec2, 3410, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ec3, 3416, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ec4, 3422, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ec5, 3428, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ec6, 3434, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ec7, 3440, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ec8, 3446, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ec9, 3450, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1eca, 3454, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ecb, 3458, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ecc, 3462, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ecd, 3466, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ece, 3470, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ecf, 3474, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ed0, 3478, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ed1, 3484, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ed2, 3490, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ed3, 3496, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ed4, 3502, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ed5, 3508, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ed6, 3514, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ed7, 3520, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ed8, 3526, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ed9, 3532, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1eda, 3538, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1edb, 3544, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1edc, 3550, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1edd, 3556, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ede, 3562, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1edf, 3568, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ee0, 3574, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ee1, 3580, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ee2, 3586, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ee3, 3592, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ee4, 3598, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ee5, 3602, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ee6, 3606, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ee7, 3610, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ee8, 3614, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ee9, 3620, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1eea, 3626, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1eeb, 3632, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1eec, 3638, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1eed, 3644, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1eee, 3650, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1eef, 3656, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ef0, 3662, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ef1, 3668, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ef2, 3674, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ef3, 3678, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ef4, 3682, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ef5, 3686, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ef6, 3690, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ef7, 3694, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ef8, 3698, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ef9, 3702, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f00, 3706, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f01, 3711, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f02, 3716, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f03, 3723, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f04, 3730, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f05, 3737, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f06, 3744, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f07, 3751, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f08, 3758, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f09, 3763, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f0a, 3768, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f0b, 3775, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f0c, 3782, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f0d, 3789, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f0e, 3796, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f0f, 3803, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f10, 3810, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f11, 3815, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f12, 3820, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f13, 3827, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f14, 3834, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f15, 3841, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f18, 3848, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f19, 3853, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f1a, 3858, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f1b, 3865, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f1c, 3872, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f1d, 3879, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f20, 3886, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f21, 3891, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f22, 3896, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f23, 3903, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f24, 3910, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f25, 3917, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f26, 3924, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f27, 3931, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f28, 3938, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f29, 3943, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f2a, 3948, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f2b, 3955, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f2c, 3962, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f2d, 3969, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f2e, 3976, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f2f, 3983, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f30, 3990, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f31, 3995, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f32, 4000, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f33, 4007, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f34, 4014, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f35, 4021, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f36, 4028, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f37, 4035, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f38, 4042, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f39, 4047, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f3a, 4052, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f3b, 4059, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f3c, 4066, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f3d, 4073, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f3e, 4080, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f3f, 4087, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f40, 4094, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f41, 4099, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f42, 4104, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f43, 4111, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f44, 4118, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f45, 4125, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f48, 4132, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f49, 4137, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f4a, 4142, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f4b, 4149, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f4c, 4156, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f4d, 4163, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f50, 4170, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f51, 4175, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f52, 4180, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f53, 4187, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f54, 4194, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f55, 4201, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f56, 4208, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f57, 4215, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f59, 4222, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f5b, 4227, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f5d, 4234, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f5f, 4241, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f60, 4248, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f61, 4253, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f62, 4258, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f63, 4265, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f64, 4272, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f65, 4279, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f66, 4286, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f67, 4293, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f68, 4300, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f69, 4305, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f6a, 4310, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f6b, 4317, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f6c, 4324, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f6d, 4331, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f6e, 4338, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f6f, 4345, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f70, 4352, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f71, 1316, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f72, 4357, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f73, 1321, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f74, 4362, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f75, 1326, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f76, 4367, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f77, 1331, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f78, 4372, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f79, 1353, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f7a, 4377, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f7b, 1358, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f7c, 4382, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f7d, 1363, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f80, 4387, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f81, 4394, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f82, 4401, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f83, 4410, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f84, 4419, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f85, 4428, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f86, 4437, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f87, 4446, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f88, 4455, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f89, 4462, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f8a, 4469, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f8b, 4478, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f8c, 4487, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f8d, 4496, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f8e, 4505, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f8f, 4514, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f90, 4523, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f91, 4530, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f92, 4537, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f93, 4546, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f94, 4555, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f95, 4564, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f96, 4573, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f97, 4582, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f98, 4591, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f99, 4598, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f9a, 4605, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f9b, 4614, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f9c, 4623, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f9d, 4632, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f9e, 4641, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1f9f, 4650, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fa0, 4659, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fa1, 4666, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fa2, 4673, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fa3, 4682, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fa4, 4691, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fa5, 4700, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fa6, 4709, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fa7, 4718, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fa8, 4727, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fa9, 4734, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1faa, 4741, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fab, 4750, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fac, 4759, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fad, 4768, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fae, 4777, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1faf, 4786, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fb0, 4795, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fb1, 4800, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fb2, 4805, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fb3, 4812, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fb4, 4817, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fb6, 4824, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fb7, 4829, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fb8, 4836, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fb9, 4841, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fba, 4846, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fbb, 1261, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fbc, 4851, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fbd, G_UNICODE_NOT_PRESENT_OFFSET, 4856 },
{ 0x1fbe, 4860, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fbf, G_UNICODE_NOT_PRESENT_OFFSET, 4856 },
{ 0x1fc0, G_UNICODE_NOT_PRESENT_OFFSET, 4863 },
{ 0x1fc1, 4867, 4872 },
{ 0x1fc2, 4878, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fc3, 4885, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fc4, 4890, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fc6, 4897, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fc7, 4902, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fc8, 4909, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fc9, 1269, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fca, 4914, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fcb, 1274, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fcc, 4919, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fcd, 4924, 4930 },
{ 0x1fce, 4936, 4942 },
{ 0x1fcf, 4948, 4954 },
{ 0x1fd0, 4960, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fd1, 4965, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fd2, 4970, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fd3, 1299, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fd6, 4977, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fd7, 4982, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fd8, 4989, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fd9, 4994, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fda, 4999, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fdb, 1279, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fdd, 5004, 5010 },
{ 0x1fde, 5016, 5022 },
{ 0x1fdf, 5028, 5034 },
{ 0x1fe0, 5040, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fe1, 5045, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fe2, 5050, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fe3, 1336, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fe4, 5057, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fe5, 5062, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fe6, 5067, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fe7, 5072, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fe8, 5079, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fe9, 5084, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fea, 5089, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1feb, 1289, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fec, 5094, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1fed, 5099, 5104 },
{ 0x1fee, 1250, 1255 },
{ 0x1fef, 5110, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ff2, 5112, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ff3, 5119, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ff4, 5124, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ff6, 5131, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ff7, 5136, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ff8, 5143, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ff9, 1284, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ffa, 5148, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ffb, 1294, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ffc, 5153, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1ffd, 5158, 16 },
{ 0x1ffe, G_UNICODE_NOT_PRESENT_OFFSET, 5161 },
{ 0x2000, 5165, 0 },
{ 0x2001, 5169, 0 },
{ 0x2002, G_UNICODE_NOT_PRESENT_OFFSET, 0 },
{ 0x2003, G_UNICODE_NOT_PRESENT_OFFSET, 0 },
{ 0x2004, G_UNICODE_NOT_PRESENT_OFFSET, 0 },
{ 0x2005, G_UNICODE_NOT_PRESENT_OFFSET, 0 },
{ 0x2006, G_UNICODE_NOT_PRESENT_OFFSET, 0 },
{ 0x2007, G_UNICODE_NOT_PRESENT_OFFSET, 0 },
{ 0x2008, G_UNICODE_NOT_PRESENT_OFFSET, 0 },
{ 0x2009, G_UNICODE_NOT_PRESENT_OFFSET, 0 },
{ 0x200a, G_UNICODE_NOT_PRESENT_OFFSET, 0 },
{ 0x2011, G_UNICODE_NOT_PRESENT_OFFSET, 5173 },
{ 0x2017, G_UNICODE_NOT_PRESENT_OFFSET, 5177 },
{ 0x2024, G_UNICODE_NOT_PRESENT_OFFSET, 5181 },
{ 0x2025, G_UNICODE_NOT_PRESENT_OFFSET, 5183 },
{ 0x2026, G_UNICODE_NOT_PRESENT_OFFSET, 5186 },
{ 0x202f, G_UNICODE_NOT_PRESENT_OFFSET, 0 },
{ 0x2033, G_UNICODE_NOT_PRESENT_OFFSET, 5190 },
{ 0x2034, G_UNICODE_NOT_PRESENT_OFFSET, 5197 },
{ 0x2036, G_UNICODE_NOT_PRESENT_OFFSET, 5207 },
{ 0x2037, G_UNICODE_NOT_PRESENT_OFFSET, 5214 },
{ 0x203c, G_UNICODE_NOT_PRESENT_OFFSET, 5224 },
{ 0x203e, G_UNICODE_NOT_PRESENT_OFFSET, 5227 },
{ 0x2047, G_UNICODE_NOT_PRESENT_OFFSET, 5231 },
{ 0x2048, G_UNICODE_NOT_PRESENT_OFFSET, 5234 },
{ 0x2049, G_UNICODE_NOT_PRESENT_OFFSET, 5237 },
{ 0x2057, G_UNICODE_NOT_PRESENT_OFFSET, 5240 },
{ 0x205f, G_UNICODE_NOT_PRESENT_OFFSET, 0 },
{ 0x2070, G_UNICODE_NOT_PRESENT_OFFSET, 5253 },
{ 0x2071, G_UNICODE_NOT_PRESENT_OFFSET, 2427 },
{ 0x2074, G_UNICODE_NOT_PRESENT_OFFSET, 5255 },
{ 0x2075, G_UNICODE_NOT_PRESENT_OFFSET, 5257 },
{ 0x2076, G_UNICODE_NOT_PRESENT_OFFSET, 5259 },
{ 0x2077, G_UNICODE_NOT_PRESENT_OFFSET, 5261 },
{ 0x2078, G_UNICODE_NOT_PRESENT_OFFSET, 5263 },
{ 0x2079, G_UNICODE_NOT_PRESENT_OFFSET, 5265 },
{ 0x207a, G_UNICODE_NOT_PRESENT_OFFSET, 5267 },
{ 0x207b, G_UNICODE_NOT_PRESENT_OFFSET, 5269 },
{ 0x207c, G_UNICODE_NOT_PRESENT_OFFSET, 5273 },
{ 0x207d, G_UNICODE_NOT_PRESENT_OFFSET, 5275 },
{ 0x207e, G_UNICODE_NOT_PRESENT_OFFSET, 5277 },
{ 0x207f, G_UNICODE_NOT_PRESENT_OFFSET, 5279 },
{ 0x2080, G_UNICODE_NOT_PRESENT_OFFSET, 5253 },
{ 0x2081, G_UNICODE_NOT_PRESENT_OFFSET, 27 },
{ 0x2082, G_UNICODE_NOT_PRESENT_OFFSET, 12 },
{ 0x2083, G_UNICODE_NOT_PRESENT_OFFSET, 14 },
{ 0x2084, G_UNICODE_NOT_PRESENT_OFFSET, 5255 },
{ 0x2085, G_UNICODE_NOT_PRESENT_OFFSET, 5257 },
{ 0x2086, G_UNICODE_NOT_PRESENT_OFFSET, 5259 },
{ 0x2087, G_UNICODE_NOT_PRESENT_OFFSET, 5261 },
{ 0x2088, G_UNICODE_NOT_PRESENT_OFFSET, 5263 },
{ 0x2089, G_UNICODE_NOT_PRESENT_OFFSET, 5265 },
{ 0x208a, G_UNICODE_NOT_PRESENT_OFFSET, 5267 },
{ 0x208b, G_UNICODE_NOT_PRESENT_OFFSET, 5269 },
{ 0x208c, G_UNICODE_NOT_PRESENT_OFFSET, 5273 },
{ 0x208d, G_UNICODE_NOT_PRESENT_OFFSET, 5275 },
{ 0x208e, G_UNICODE_NOT_PRESENT_OFFSET, 5277 },
{ 0x2090, G_UNICODE_NOT_PRESENT_OFFSET, 6 },
{ 0x2091, G_UNICODE_NOT_PRESENT_OFFSET, 2368 },
{ 0x2092, G_UNICODE_NOT_PRESENT_OFFSET, 29 },
{ 0x2093, G_UNICODE_NOT_PRESENT_OFFSET, 1222 },
{ 0x2094, G_UNICODE_NOT_PRESENT_OFFSET, 2370 },
{ 0x20a8, G_UNICODE_NOT_PRESENT_OFFSET, 5281 },
{ 0x2100, G_UNICODE_NOT_PRESENT_OFFSET, 5284 },
{ 0x2101, G_UNICODE_NOT_PRESENT_OFFSET, 5288 },
{ 0x2102, G_UNICODE_NOT_PRESENT_OFFSET, 5292 },
{ 0x2103, G_UNICODE_NOT_PRESENT_OFFSET, 5294 },
{ 0x2105, G_UNICODE_NOT_PRESENT_OFFSET, 5298 },
{ 0x2106, G_UNICODE_NOT_PRESENT_OFFSET, 5302 },
{ 0x2107, G_UNICODE_NOT_PRESENT_OFFSET, 5306 },
{ 0x2109, G_UNICODE_NOT_PRESENT_OFFSET, 5309 },
{ 0x210a, G_UNICODE_NOT_PRESENT_OFFSET, 2379 },
{ 0x210b, G_UNICODE_NOT_PRESENT_OFFSET, 2325 },
{ 0x210c, G_UNICODE_NOT_PRESENT_OFFSET, 2325 },
{ 0x210d, G_UNICODE_NOT_PRESENT_OFFSET, 2325 },
{ 0x210e, G_UNICODE_NOT_PRESENT_OFFSET, 1171 },
{ 0x210f, G_UNICODE_NOT_PRESENT_OFFSET, 5313 },
{ 0x2110, G_UNICODE_NOT_PRESENT_OFFSET, 2327 },
{ 0x2111, G_UNICODE_NOT_PRESENT_OFFSET, 2327 },
{ 0x2112, G_UNICODE_NOT_PRESENT_OFFSET, 2333 },
{ 0x2113, G_UNICODE_NOT_PRESENT_OFFSET, 1220 },
{ 0x2115, G_UNICODE_NOT_PRESENT_OFFSET, 2337 },
{ 0x2116, G_UNICODE_NOT_PRESENT_OFFSET, 5316 },
{ 0x2119, G_UNICODE_NOT_PRESENT_OFFSET, 2344 },
{ 0x211a, G_UNICODE_NOT_PRESENT_OFFSET, 5319 },
{ 0x211b, G_UNICODE_NOT_PRESENT_OFFSET, 2346 },
{ 0x211c, G_UNICODE_NOT_PRESENT_OFFSET, 2346 },
{ 0x211d, G_UNICODE_NOT_PRESENT_OFFSET, 2346 },
{ 0x2120, G_UNICODE_NOT_PRESENT_OFFSET, 5321 },
{ 0x2121, G_UNICODE_NOT_PRESENT_OFFSET, 5324 },
{ 0x2122, G_UNICODE_NOT_PRESENT_OFFSET, 5328 },
{ 0x2124, G_UNICODE_NOT_PRESENT_OFFSET, 5331 },
{ 0x2126, 5333, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2128, G_UNICODE_NOT_PRESENT_OFFSET, 5331 },
{ 0x212a, 2331, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x212b, 69, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x212c, G_UNICODE_NOT_PRESENT_OFFSET, 2314 },
{ 0x212d, G_UNICODE_NOT_PRESENT_OFFSET, 5292 },
{ 0x212f, G_UNICODE_NOT_PRESENT_OFFSET, 2368 },
{ 0x2130, G_UNICODE_NOT_PRESENT_OFFSET, 2318 },
{ 0x2131, G_UNICODE_NOT_PRESENT_OFFSET, 5336 },
{ 0x2133, G_UNICODE_NOT_PRESENT_OFFSET, 2335 },
{ 0x2134, G_UNICODE_NOT_PRESENT_OFFSET, 29 },
{ 0x2135, G_UNICODE_NOT_PRESENT_OFFSET, 5338 },
{ 0x2136, G_UNICODE_NOT_PRESENT_OFFSET, 5341 },
{ 0x2137, G_UNICODE_NOT_PRESENT_OFFSET, 5344 },
{ 0x2138, G_UNICODE_NOT_PRESENT_OFFSET, 5347 },
{ 0x2139, G_UNICODE_NOT_PRESENT_OFFSET, 2427 },
{ 0x213b, G_UNICODE_NOT_PRESENT_OFFSET, 5350 },
{ 0x213c, G_UNICODE_NOT_PRESENT_OFFSET, 1390 },
{ 0x213d, G_UNICODE_NOT_PRESENT_OFFSET, 2418 },
{ 0x213e, G_UNICODE_NOT_PRESENT_OFFSET, 5354 },
{ 0x213f, G_UNICODE_NOT_PRESENT_OFFSET, 5357 },
{ 0x2140, G_UNICODE_NOT_PRESENT_OFFSET, 5360 },
{ 0x2145, G_UNICODE_NOT_PRESENT_OFFSET, 2316 },
{ 0x2146, G_UNICODE_NOT_PRESENT_OFFSET, 2366 },
{ 0x2147, G_UNICODE_NOT_PRESENT_OFFSET, 2368 },
{ 0x2148, G_UNICODE_NOT_PRESENT_OFFSET, 2427 },
{ 0x2149, G_UNICODE_NOT_PRESENT_OFFSET, 1176 },
{ 0x2153, G_UNICODE_NOT_PRESENT_OFFSET, 5364 },
{ 0x2154, G_UNICODE_NOT_PRESENT_OFFSET, 5370 },
{ 0x2155, G_UNICODE_NOT_PRESENT_OFFSET, 5376 },
{ 0x2156, G_UNICODE_NOT_PRESENT_OFFSET, 5382 },
{ 0x2157, G_UNICODE_NOT_PRESENT_OFFSET, 5388 },
{ 0x2158, G_UNICODE_NOT_PRESENT_OFFSET, 5394 },
{ 0x2159, G_UNICODE_NOT_PRESENT_OFFSET, 5400 },
{ 0x215a, G_UNICODE_NOT_PRESENT_OFFSET, 5406 },
{ 0x215b, G_UNICODE_NOT_PRESENT_OFFSET, 5412 },
{ 0x215c, G_UNICODE_NOT_PRESENT_OFFSET, 5418 },
{ 0x215d, G_UNICODE_NOT_PRESENT_OFFSET, 5424 },
{ 0x215e, G_UNICODE_NOT_PRESENT_OFFSET, 5430 },
{ 0x215f, G_UNICODE_NOT_PRESENT_OFFSET, 5436 },
{ 0x2160, G_UNICODE_NOT_PRESENT_OFFSET, 2327 },
{ 0x2161, G_UNICODE_NOT_PRESENT_OFFSET, 5441 },
{ 0x2162, G_UNICODE_NOT_PRESENT_OFFSET, 5444 },
{ 0x2163, G_UNICODE_NOT_PRESENT_OFFSET, 5448 },
{ 0x2164, G_UNICODE_NOT_PRESENT_OFFSET, 5451 },
{ 0x2165, G_UNICODE_NOT_PRESENT_OFFSET, 5453 },
{ 0x2166, G_UNICODE_NOT_PRESENT_OFFSET, 5456 },
{ 0x2167, G_UNICODE_NOT_PRESENT_OFFSET, 5460 },
{ 0x2168, G_UNICODE_NOT_PRESENT_OFFSET, 5465 },
{ 0x2169, G_UNICODE_NOT_PRESENT_OFFSET, 5468 },
{ 0x216a, G_UNICODE_NOT_PRESENT_OFFSET, 5470 },
{ 0x216b, G_UNICODE_NOT_PRESENT_OFFSET, 5473 },
{ 0x216c, G_UNICODE_NOT_PRESENT_OFFSET, 2333 },
{ 0x216d, G_UNICODE_NOT_PRESENT_OFFSET, 5292 },
{ 0x216e, G_UNICODE_NOT_PRESENT_OFFSET, 2316 },
{ 0x216f, G_UNICODE_NOT_PRESENT_OFFSET, 2335 },
{ 0x2170, G_UNICODE_NOT_PRESENT_OFFSET, 2427 },
{ 0x2171, G_UNICODE_NOT_PRESENT_OFFSET, 5477 },
{ 0x2172, G_UNICODE_NOT_PRESENT_OFFSET, 5480 },
{ 0x2173, G_UNICODE_NOT_PRESENT_OFFSET, 5484 },
{ 0x2174, G_UNICODE_NOT_PRESENT_OFFSET, 2412 },
{ 0x2175, G_UNICODE_NOT_PRESENT_OFFSET, 5487 },
{ 0x2176, G_UNICODE_NOT_PRESENT_OFFSET, 5490 },
{ 0x2177, G_UNICODE_NOT_PRESENT_OFFSET, 5494 },
{ 0x2178, G_UNICODE_NOT_PRESENT_OFFSET, 5499 },
{ 0x2179, G_UNICODE_NOT_PRESENT_OFFSET, 1222 },
{ 0x217a, G_UNICODE_NOT_PRESENT_OFFSET, 5502 },
{ 0x217b, G_UNICODE_NOT_PRESENT_OFFSET, 5505 },
{ 0x217c, G_UNICODE_NOT_PRESENT_OFFSET, 1220 },
{ 0x217d, G_UNICODE_NOT_PRESENT_OFFSET, 2435 },
{ 0x217e, G_UNICODE_NOT_PRESENT_OFFSET, 2366 },
{ 0x217f, G_UNICODE_NOT_PRESENT_OFFSET, 2383 },
{ 0x219a, 5509, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x219b, 5515, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x21ae, 5521, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x21cd, 5527, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x21ce, 5533, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x21cf, 5539, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2204, 5545, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2209, 5551, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x220c, 5557, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2224, 5563, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2226, 5569, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x222c, G_UNICODE_NOT_PRESENT_OFFSET, 5575 },
{ 0x222d, G_UNICODE_NOT_PRESENT_OFFSET, 5582 },
{ 0x222f, G_UNICODE_NOT_PRESENT_OFFSET, 5592 },
{ 0x2230, G_UNICODE_NOT_PRESENT_OFFSET, 5599 },
{ 0x2241, 5609, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2244, 5615, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2247, 5621, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2249, 5627, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2260, 5633, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2262, 5637, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x226d, 5643, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x226e, 5649, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x226f, 5653, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2270, 5657, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2271, 5663, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2274, 5669, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2275, 5675, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2278, 5681, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2279, 5687, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2280, 5693, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2281, 5699, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2284, 5705, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2285, 5711, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2288, 5717, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2289, 5723, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x22ac, 5729, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x22ad, 5735, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x22ae, 5741, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x22af, 5747, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x22e0, 5753, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x22e1, 5759, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x22e2, 5765, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x22e3, 5771, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x22ea, 5777, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x22eb, 5783, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x22ec, 5789, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x22ed, 5795, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2329, 5801, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x232a, 5805, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2460, G_UNICODE_NOT_PRESENT_OFFSET, 27 },
{ 0x2461, G_UNICODE_NOT_PRESENT_OFFSET, 12 },
{ 0x2462, G_UNICODE_NOT_PRESENT_OFFSET, 14 },
{ 0x2463, G_UNICODE_NOT_PRESENT_OFFSET, 5255 },
{ 0x2464, G_UNICODE_NOT_PRESENT_OFFSET, 5257 },
{ 0x2465, G_UNICODE_NOT_PRESENT_OFFSET, 5259 },
{ 0x2466, G_UNICODE_NOT_PRESENT_OFFSET, 5261 },
{ 0x2467, G_UNICODE_NOT_PRESENT_OFFSET, 5263 },
{ 0x2468, G_UNICODE_NOT_PRESENT_OFFSET, 5265 },
{ 0x2469, G_UNICODE_NOT_PRESENT_OFFSET, 5809 },
{ 0x246a, G_UNICODE_NOT_PRESENT_OFFSET, 5812 },
{ 0x246b, G_UNICODE_NOT_PRESENT_OFFSET, 5815 },
{ 0x246c, G_UNICODE_NOT_PRESENT_OFFSET, 5818 },
{ 0x246d, G_UNICODE_NOT_PRESENT_OFFSET, 5821 },
{ 0x246e, G_UNICODE_NOT_PRESENT_OFFSET, 5824 },
{ 0x246f, G_UNICODE_NOT_PRESENT_OFFSET, 5827 },
{ 0x2470, G_UNICODE_NOT_PRESENT_OFFSET, 5830 },
{ 0x2471, G_UNICODE_NOT_PRESENT_OFFSET, 5833 },
{ 0x2472, G_UNICODE_NOT_PRESENT_OFFSET, 5836 },
{ 0x2473, G_UNICODE_NOT_PRESENT_OFFSET, 5839 },
{ 0x2474, G_UNICODE_NOT_PRESENT_OFFSET, 5842 },
{ 0x2475, G_UNICODE_NOT_PRESENT_OFFSET, 5846 },
{ 0x2476, G_UNICODE_NOT_PRESENT_OFFSET, 5850 },
{ 0x2477, G_UNICODE_NOT_PRESENT_OFFSET, 5854 },
{ 0x2478, G_UNICODE_NOT_PRESENT_OFFSET, 5858 },
{ 0x2479, G_UNICODE_NOT_PRESENT_OFFSET, 5862 },
{ 0x247a, G_UNICODE_NOT_PRESENT_OFFSET, 5866 },
{ 0x247b, G_UNICODE_NOT_PRESENT_OFFSET, 5870 },
{ 0x247c, G_UNICODE_NOT_PRESENT_OFFSET, 5874 },
{ 0x247d, G_UNICODE_NOT_PRESENT_OFFSET, 5878 },
{ 0x247e, G_UNICODE_NOT_PRESENT_OFFSET, 5883 },
{ 0x247f, G_UNICODE_NOT_PRESENT_OFFSET, 5888 },
{ 0x2480, G_UNICODE_NOT_PRESENT_OFFSET, 5893 },
{ 0x2481, G_UNICODE_NOT_PRESENT_OFFSET, 5898 },
{ 0x2482, G_UNICODE_NOT_PRESENT_OFFSET, 5903 },
{ 0x2483, G_UNICODE_NOT_PRESENT_OFFSET, 5908 },
{ 0x2484, G_UNICODE_NOT_PRESENT_OFFSET, 5913 },
{ 0x2485, G_UNICODE_NOT_PRESENT_OFFSET, 5918 },
{ 0x2486, G_UNICODE_NOT_PRESENT_OFFSET, 5923 },
{ 0x2487, G_UNICODE_NOT_PRESENT_OFFSET, 5928 },
{ 0x2488, G_UNICODE_NOT_PRESENT_OFFSET, 5933 },
{ 0x2489, G_UNICODE_NOT_PRESENT_OFFSET, 5936 },
{ 0x248a, G_UNICODE_NOT_PRESENT_OFFSET, 5939 },
{ 0x248b, G_UNICODE_NOT_PRESENT_OFFSET, 5942 },
{ 0x248c, G_UNICODE_NOT_PRESENT_OFFSET, 5945 },
{ 0x248d, G_UNICODE_NOT_PRESENT_OFFSET, 5948 },
{ 0x248e, G_UNICODE_NOT_PRESENT_OFFSET, 5951 },
{ 0x248f, G_UNICODE_NOT_PRESENT_OFFSET, 5954 },
{ 0x2490, G_UNICODE_NOT_PRESENT_OFFSET, 5957 },
{ 0x2491, G_UNICODE_NOT_PRESENT_OFFSET, 5960 },
{ 0x2492, G_UNICODE_NOT_PRESENT_OFFSET, 5964 },
{ 0x2493, G_UNICODE_NOT_PRESENT_OFFSET, 5968 },
{ 0x2494, G_UNICODE_NOT_PRESENT_OFFSET, 5972 },
{ 0x2495, G_UNICODE_NOT_PRESENT_OFFSET, 5976 },
{ 0x2496, G_UNICODE_NOT_PRESENT_OFFSET, 5980 },
{ 0x2497, G_UNICODE_NOT_PRESENT_OFFSET, 5984 },
{ 0x2498, G_UNICODE_NOT_PRESENT_OFFSET, 5988 },
{ 0x2499, G_UNICODE_NOT_PRESENT_OFFSET, 5992 },
{ 0x249a, G_UNICODE_NOT_PRESENT_OFFSET, 5996 },
{ 0x249b, G_UNICODE_NOT_PRESENT_OFFSET, 6000 },
{ 0x249c, G_UNICODE_NOT_PRESENT_OFFSET, 6004 },
{ 0x249d, G_UNICODE_NOT_PRESENT_OFFSET, 6008 },
{ 0x249e, G_UNICODE_NOT_PRESENT_OFFSET, 6012 },
{ 0x249f, G_UNICODE_NOT_PRESENT_OFFSET, 6016 },
{ 0x24a0, G_UNICODE_NOT_PRESENT_OFFSET, 6020 },
{ 0x24a1, G_UNICODE_NOT_PRESENT_OFFSET, 6024 },
{ 0x24a2, G_UNICODE_NOT_PRESENT_OFFSET, 6028 },
{ 0x24a3, G_UNICODE_NOT_PRESENT_OFFSET, 6032 },
{ 0x24a4, G_UNICODE_NOT_PRESENT_OFFSET, 6036 },
{ 0x24a5, G_UNICODE_NOT_PRESENT_OFFSET, 6040 },
{ 0x24a6, G_UNICODE_NOT_PRESENT_OFFSET, 6044 },
{ 0x24a7, G_UNICODE_NOT_PRESENT_OFFSET, 6048 },
{ 0x24a8, G_UNICODE_NOT_PRESENT_OFFSET, 6052 },
{ 0x24a9, G_UNICODE_NOT_PRESENT_OFFSET, 6056 },
{ 0x24aa, G_UNICODE_NOT_PRESENT_OFFSET, 6060 },
{ 0x24ab, G_UNICODE_NOT_PRESENT_OFFSET, 6064 },
{ 0x24ac, G_UNICODE_NOT_PRESENT_OFFSET, 6068 },
{ 0x24ad, G_UNICODE_NOT_PRESENT_OFFSET, 6072 },
{ 0x24ae, G_UNICODE_NOT_PRESENT_OFFSET, 6076 },
{ 0x24af, G_UNICODE_NOT_PRESENT_OFFSET, 6080 },
{ 0x24b0, G_UNICODE_NOT_PRESENT_OFFSET, 6084 },
{ 0x24b1, G_UNICODE_NOT_PRESENT_OFFSET, 6088 },
{ 0x24b2, G_UNICODE_NOT_PRESENT_OFFSET, 6092 },
{ 0x24b3, G_UNICODE_NOT_PRESENT_OFFSET, 6096 },
{ 0x24b4, G_UNICODE_NOT_PRESENT_OFFSET, 6100 },
{ 0x24b5, G_UNICODE_NOT_PRESENT_OFFSET, 6104 },
{ 0x24b6, G_UNICODE_NOT_PRESENT_OFFSET, 2309 },
{ 0x24b7, G_UNICODE_NOT_PRESENT_OFFSET, 2314 },
{ 0x24b8, G_UNICODE_NOT_PRESENT_OFFSET, 5292 },
{ 0x24b9, G_UNICODE_NOT_PRESENT_OFFSET, 2316 },
{ 0x24ba, G_UNICODE_NOT_PRESENT_OFFSET, 2318 },
{ 0x24bb, G_UNICODE_NOT_PRESENT_OFFSET, 5336 },
{ 0x24bc, G_UNICODE_NOT_PRESENT_OFFSET, 2323 },
{ 0x24bd, G_UNICODE_NOT_PRESENT_OFFSET, 2325 },
{ 0x24be, G_UNICODE_NOT_PRESENT_OFFSET, 2327 },
{ 0x24bf, G_UNICODE_NOT_PRESENT_OFFSET, 2329 },
{ 0x24c0, G_UNICODE_NOT_PRESENT_OFFSET, 2331 },
{ 0x24c1, G_UNICODE_NOT_PRESENT_OFFSET, 2333 },
{ 0x24c2, G_UNICODE_NOT_PRESENT_OFFSET, 2335 },
{ 0x24c3, G_UNICODE_NOT_PRESENT_OFFSET, 2337 },
{ 0x24c4, G_UNICODE_NOT_PRESENT_OFFSET, 2339 },
{ 0x24c5, G_UNICODE_NOT_PRESENT_OFFSET, 2344 },
{ 0x24c6, G_UNICODE_NOT_PRESENT_OFFSET, 5319 },
{ 0x24c7, G_UNICODE_NOT_PRESENT_OFFSET, 2346 },
{ 0x24c8, G_UNICODE_NOT_PRESENT_OFFSET, 6108 },
{ 0x24c9, G_UNICODE_NOT_PRESENT_OFFSET, 2348 },
{ 0x24ca, G_UNICODE_NOT_PRESENT_OFFSET, 2350 },
{ 0x24cb, G_UNICODE_NOT_PRESENT_OFFSET, 5451 },
{ 0x24cc, G_UNICODE_NOT_PRESENT_OFFSET, 2352 },
{ 0x24cd, G_UNICODE_NOT_PRESENT_OFFSET, 5468 },
{ 0x24ce, G_UNICODE_NOT_PRESENT_OFFSET, 6110 },
{ 0x24cf, G_UNICODE_NOT_PRESENT_OFFSET, 5331 },
{ 0x24d0, G_UNICODE_NOT_PRESENT_OFFSET, 6 },
{ 0x24d1, G_UNICODE_NOT_PRESENT_OFFSET, 2364 },
{ 0x24d2, G_UNICODE_NOT_PRESENT_OFFSET, 2435 },
{ 0x24d3, G_UNICODE_NOT_PRESENT_OFFSET, 2366 },
{ 0x24d4, G_UNICODE_NOT_PRESENT_OFFSET, 2368 },
{ 0x24d5, G_UNICODE_NOT_PRESENT_OFFSET, 2443 },
{ 0x24d6, G_UNICODE_NOT_PRESENT_OFFSET, 2379 },
{ 0x24d7, G_UNICODE_NOT_PRESENT_OFFSET, 1171 },
{ 0x24d8, G_UNICODE_NOT_PRESENT_OFFSET, 2427 },
{ 0x24d9, G_UNICODE_NOT_PRESENT_OFFSET, 1176 },
{ 0x24da, G_UNICODE_NOT_PRESENT_OFFSET, 2381 },
{ 0x24db, G_UNICODE_NOT_PRESENT_OFFSET, 1220 },
{ 0x24dc, G_UNICODE_NOT_PRESENT_OFFSET, 2383 },
{ 0x24dd, G_UNICODE_NOT_PRESENT_OFFSET, 5279 },
{ 0x24de, G_UNICODE_NOT_PRESENT_OFFSET, 29 },
{ 0x24df, G_UNICODE_NOT_PRESENT_OFFSET, 2399 },
{ 0x24e0, G_UNICODE_NOT_PRESENT_OFFSET, 6112 },
{ 0x24e1, G_UNICODE_NOT_PRESENT_OFFSET, 1178 },
{ 0x24e2, G_UNICODE_NOT_PRESENT_OFFSET, 711 },
{ 0x24e3, G_UNICODE_NOT_PRESENT_OFFSET, 2401 },
{ 0x24e4, G_UNICODE_NOT_PRESENT_OFFSET, 2403 },
{ 0x24e5, G_UNICODE_NOT_PRESENT_OFFSET, 2412 },
{ 0x24e6, G_UNICODE_NOT_PRESENT_OFFSET, 1189 },
{ 0x24e7, G_UNICODE_NOT_PRESENT_OFFSET, 1222 },
{ 0x24e8, G_UNICODE_NOT_PRESENT_OFFSET, 1191 },
{ 0x24e9, G_UNICODE_NOT_PRESENT_OFFSET, 2526 },
{ 0x24ea, G_UNICODE_NOT_PRESENT_OFFSET, 5253 },
{ 0x2a0c, G_UNICODE_NOT_PRESENT_OFFSET, 6114 },
{ 0x2a74, G_UNICODE_NOT_PRESENT_OFFSET, 6127 },
{ 0x2a75, G_UNICODE_NOT_PRESENT_OFFSET, 6131 },
{ 0x2a76, G_UNICODE_NOT_PRESENT_OFFSET, 6134 },
{ 0x2adc, 6138, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2d6f, G_UNICODE_NOT_PRESENT_OFFSET, 6144 },
{ 0x2e9f, G_UNICODE_NOT_PRESENT_OFFSET, 6148 },
{ 0x2ef3, G_UNICODE_NOT_PRESENT_OFFSET, 6152 },
{ 0x2f00, G_UNICODE_NOT_PRESENT_OFFSET, 6156 },
{ 0x2f01, G_UNICODE_NOT_PRESENT_OFFSET, 6160 },
{ 0x2f02, G_UNICODE_NOT_PRESENT_OFFSET, 6164 },
{ 0x2f03, G_UNICODE_NOT_PRESENT_OFFSET, 6168 },
{ 0x2f04, G_UNICODE_NOT_PRESENT_OFFSET, 6172 },
{ 0x2f05, G_UNICODE_NOT_PRESENT_OFFSET, 6176 },
{ 0x2f06, G_UNICODE_NOT_PRESENT_OFFSET, 6180 },
{ 0x2f07, G_UNICODE_NOT_PRESENT_OFFSET, 6184 },
{ 0x2f08, G_UNICODE_NOT_PRESENT_OFFSET, 6188 },
{ 0x2f09, G_UNICODE_NOT_PRESENT_OFFSET, 6192 },
{ 0x2f0a, G_UNICODE_NOT_PRESENT_OFFSET, 6196 },
{ 0x2f0b, G_UNICODE_NOT_PRESENT_OFFSET, 6200 },
{ 0x2f0c, G_UNICODE_NOT_PRESENT_OFFSET, 6204 },
{ 0x2f0d, G_UNICODE_NOT_PRESENT_OFFSET, 6208 },
{ 0x2f0e, G_UNICODE_NOT_PRESENT_OFFSET, 6212 },
{ 0x2f0f, G_UNICODE_NOT_PRESENT_OFFSET, 6216 },
{ 0x2f10, G_UNICODE_NOT_PRESENT_OFFSET, 6220 },
{ 0x2f11, G_UNICODE_NOT_PRESENT_OFFSET, 6224 },
{ 0x2f12, G_UNICODE_NOT_PRESENT_OFFSET, 6228 },
{ 0x2f13, G_UNICODE_NOT_PRESENT_OFFSET, 6232 },
{ 0x2f14, G_UNICODE_NOT_PRESENT_OFFSET, 6236 },
{ 0x2f15, G_UNICODE_NOT_PRESENT_OFFSET, 6240 },
{ 0x2f16, G_UNICODE_NOT_PRESENT_OFFSET, 6244 },
{ 0x2f17, G_UNICODE_NOT_PRESENT_OFFSET, 6248 },
{ 0x2f18, G_UNICODE_NOT_PRESENT_OFFSET, 6252 },
{ 0x2f19, G_UNICODE_NOT_PRESENT_OFFSET, 6256 },
{ 0x2f1a, G_UNICODE_NOT_PRESENT_OFFSET, 6260 },
{ 0x2f1b, G_UNICODE_NOT_PRESENT_OFFSET, 6264 },
{ 0x2f1c, G_UNICODE_NOT_PRESENT_OFFSET, 6268 },
{ 0x2f1d, G_UNICODE_NOT_PRESENT_OFFSET, 6272 },
{ 0x2f1e, G_UNICODE_NOT_PRESENT_OFFSET, 6276 },
{ 0x2f1f, G_UNICODE_NOT_PRESENT_OFFSET, 6280 },
{ 0x2f20, G_UNICODE_NOT_PRESENT_OFFSET, 6284 },
{ 0x2f21, G_UNICODE_NOT_PRESENT_OFFSET, 6288 },
{ 0x2f22, G_UNICODE_NOT_PRESENT_OFFSET, 6292 },
{ 0x2f23, G_UNICODE_NOT_PRESENT_OFFSET, 6296 },
{ 0x2f24, G_UNICODE_NOT_PRESENT_OFFSET, 6300 },
{ 0x2f25, G_UNICODE_NOT_PRESENT_OFFSET, 6304 },
{ 0x2f26, G_UNICODE_NOT_PRESENT_OFFSET, 6308 },
{ 0x2f27, G_UNICODE_NOT_PRESENT_OFFSET, 6312 },
{ 0x2f28, G_UNICODE_NOT_PRESENT_OFFSET, 6316 },
{ 0x2f29, G_UNICODE_NOT_PRESENT_OFFSET, 6320 },
{ 0x2f2a, G_UNICODE_NOT_PRESENT_OFFSET, 6324 },
{ 0x2f2b, G_UNICODE_NOT_PRESENT_OFFSET, 6328 },
{ 0x2f2c, G_UNICODE_NOT_PRESENT_OFFSET, 6332 },
{ 0x2f2d, G_UNICODE_NOT_PRESENT_OFFSET, 6336 },
{ 0x2f2e, G_UNICODE_NOT_PRESENT_OFFSET, 6340 },
{ 0x2f2f, G_UNICODE_NOT_PRESENT_OFFSET, 6344 },
{ 0x2f30, G_UNICODE_NOT_PRESENT_OFFSET, 6348 },
{ 0x2f31, G_UNICODE_NOT_PRESENT_OFFSET, 6352 },
{ 0x2f32, G_UNICODE_NOT_PRESENT_OFFSET, 6356 },
{ 0x2f33, G_UNICODE_NOT_PRESENT_OFFSET, 6360 },
{ 0x2f34, G_UNICODE_NOT_PRESENT_OFFSET, 6364 },
{ 0x2f35, G_UNICODE_NOT_PRESENT_OFFSET, 6368 },
{ 0x2f36, G_UNICODE_NOT_PRESENT_OFFSET, 6372 },
{ 0x2f37, G_UNICODE_NOT_PRESENT_OFFSET, 6376 },
{ 0x2f38, G_UNICODE_NOT_PRESENT_OFFSET, 6380 },
{ 0x2f39, G_UNICODE_NOT_PRESENT_OFFSET, 6384 },
{ 0x2f3a, G_UNICODE_NOT_PRESENT_OFFSET, 6388 },
{ 0x2f3b, G_UNICODE_NOT_PRESENT_OFFSET, 6392 },
{ 0x2f3c, G_UNICODE_NOT_PRESENT_OFFSET, 6396 },
{ 0x2f3d, G_UNICODE_NOT_PRESENT_OFFSET, 6400 },
{ 0x2f3e, G_UNICODE_NOT_PRESENT_OFFSET, 6404 },
{ 0x2f3f, G_UNICODE_NOT_PRESENT_OFFSET, 6408 },
{ 0x2f40, G_UNICODE_NOT_PRESENT_OFFSET, 6412 },
{ 0x2f41, G_UNICODE_NOT_PRESENT_OFFSET, 6416 },
{ 0x2f42, G_UNICODE_NOT_PRESENT_OFFSET, 6420 },
{ 0x2f43, G_UNICODE_NOT_PRESENT_OFFSET, 6424 },
{ 0x2f44, G_UNICODE_NOT_PRESENT_OFFSET, 6428 },
{ 0x2f45, G_UNICODE_NOT_PRESENT_OFFSET, 6432 },
{ 0x2f46, G_UNICODE_NOT_PRESENT_OFFSET, 6436 },
{ 0x2f47, G_UNICODE_NOT_PRESENT_OFFSET, 6440 },
{ 0x2f48, G_UNICODE_NOT_PRESENT_OFFSET, 6444 },
{ 0x2f49, G_UNICODE_NOT_PRESENT_OFFSET, 6448 },
{ 0x2f4a, G_UNICODE_NOT_PRESENT_OFFSET, 6452 },
{ 0x2f4b, G_UNICODE_NOT_PRESENT_OFFSET, 6456 },
{ 0x2f4c, G_UNICODE_NOT_PRESENT_OFFSET, 6460 },
{ 0x2f4d, G_UNICODE_NOT_PRESENT_OFFSET, 6464 },
{ 0x2f4e, G_UNICODE_NOT_PRESENT_OFFSET, 6468 },
{ 0x2f4f, G_UNICODE_NOT_PRESENT_OFFSET, 6472 },
{ 0x2f50, G_UNICODE_NOT_PRESENT_OFFSET, 6476 },
{ 0x2f51, G_UNICODE_NOT_PRESENT_OFFSET, 6480 },
{ 0x2f52, G_UNICODE_NOT_PRESENT_OFFSET, 6484 },
{ 0x2f53, G_UNICODE_NOT_PRESENT_OFFSET, 6488 },
{ 0x2f54, G_UNICODE_NOT_PRESENT_OFFSET, 6492 },
{ 0x2f55, G_UNICODE_NOT_PRESENT_OFFSET, 6496 },
{ 0x2f56, G_UNICODE_NOT_PRESENT_OFFSET, 6500 },
{ 0x2f57, G_UNICODE_NOT_PRESENT_OFFSET, 6504 },
{ 0x2f58, G_UNICODE_NOT_PRESENT_OFFSET, 6508 },
{ 0x2f59, G_UNICODE_NOT_PRESENT_OFFSET, 6512 },
{ 0x2f5a, G_UNICODE_NOT_PRESENT_OFFSET, 6516 },
{ 0x2f5b, G_UNICODE_NOT_PRESENT_OFFSET, 6520 },
{ 0x2f5c, G_UNICODE_NOT_PRESENT_OFFSET, 6524 },
{ 0x2f5d, G_UNICODE_NOT_PRESENT_OFFSET, 6528 },
{ 0x2f5e, G_UNICODE_NOT_PRESENT_OFFSET, 6532 },
{ 0x2f5f, G_UNICODE_NOT_PRESENT_OFFSET, 6536 },
{ 0x2f60, G_UNICODE_NOT_PRESENT_OFFSET, 6540 },
{ 0x2f61, G_UNICODE_NOT_PRESENT_OFFSET, 6544 },
{ 0x2f62, G_UNICODE_NOT_PRESENT_OFFSET, 6548 },
{ 0x2f63, G_UNICODE_NOT_PRESENT_OFFSET, 6552 },
{ 0x2f64, G_UNICODE_NOT_PRESENT_OFFSET, 6556 },
{ 0x2f65, G_UNICODE_NOT_PRESENT_OFFSET, 6560 },
{ 0x2f66, G_UNICODE_NOT_PRESENT_OFFSET, 6564 },
{ 0x2f67, G_UNICODE_NOT_PRESENT_OFFSET, 6568 },
{ 0x2f68, G_UNICODE_NOT_PRESENT_OFFSET, 6572 },
{ 0x2f69, G_UNICODE_NOT_PRESENT_OFFSET, 6576 },
{ 0x2f6a, G_UNICODE_NOT_PRESENT_OFFSET, 6580 },
{ 0x2f6b, G_UNICODE_NOT_PRESENT_OFFSET, 6584 },
{ 0x2f6c, G_UNICODE_NOT_PRESENT_OFFSET, 6588 },
{ 0x2f6d, G_UNICODE_NOT_PRESENT_OFFSET, 6592 },
{ 0x2f6e, G_UNICODE_NOT_PRESENT_OFFSET, 6596 },
{ 0x2f6f, G_UNICODE_NOT_PRESENT_OFFSET, 6600 },
{ 0x2f70, G_UNICODE_NOT_PRESENT_OFFSET, 6604 },
{ 0x2f71, G_UNICODE_NOT_PRESENT_OFFSET, 6608 },
{ 0x2f72, G_UNICODE_NOT_PRESENT_OFFSET, 6612 },
{ 0x2f73, G_UNICODE_NOT_PRESENT_OFFSET, 6616 },
{ 0x2f74, G_UNICODE_NOT_PRESENT_OFFSET, 6620 },
{ 0x2f75, G_UNICODE_NOT_PRESENT_OFFSET, 6624 },
{ 0x2f76, G_UNICODE_NOT_PRESENT_OFFSET, 6628 },
{ 0x2f77, G_UNICODE_NOT_PRESENT_OFFSET, 6632 },
{ 0x2f78, G_UNICODE_NOT_PRESENT_OFFSET, 6636 },
{ 0x2f79, G_UNICODE_NOT_PRESENT_OFFSET, 6640 },
{ 0x2f7a, G_UNICODE_NOT_PRESENT_OFFSET, 6644 },
{ 0x2f7b, G_UNICODE_NOT_PRESENT_OFFSET, 6648 },
{ 0x2f7c, G_UNICODE_NOT_PRESENT_OFFSET, 6652 },
{ 0x2f7d, G_UNICODE_NOT_PRESENT_OFFSET, 6656 },
{ 0x2f7e, G_UNICODE_NOT_PRESENT_OFFSET, 6660 },
{ 0x2f7f, G_UNICODE_NOT_PRESENT_OFFSET, 6664 },
{ 0x2f80, G_UNICODE_NOT_PRESENT_OFFSET, 6668 },
{ 0x2f81, G_UNICODE_NOT_PRESENT_OFFSET, 6672 },
{ 0x2f82, G_UNICODE_NOT_PRESENT_OFFSET, 6676 },
{ 0x2f83, G_UNICODE_NOT_PRESENT_OFFSET, 6680 },
{ 0x2f84, G_UNICODE_NOT_PRESENT_OFFSET, 6684 },
{ 0x2f85, G_UNICODE_NOT_PRESENT_OFFSET, 6688 },
{ 0x2f86, G_UNICODE_NOT_PRESENT_OFFSET, 6692 },
{ 0x2f87, G_UNICODE_NOT_PRESENT_OFFSET, 6696 },
{ 0x2f88, G_UNICODE_NOT_PRESENT_OFFSET, 6700 },
{ 0x2f89, G_UNICODE_NOT_PRESENT_OFFSET, 6704 },
{ 0x2f8a, G_UNICODE_NOT_PRESENT_OFFSET, 6708 },
{ 0x2f8b, G_UNICODE_NOT_PRESENT_OFFSET, 6712 },
{ 0x2f8c, G_UNICODE_NOT_PRESENT_OFFSET, 6716 },
{ 0x2f8d, G_UNICODE_NOT_PRESENT_OFFSET, 6720 },
{ 0x2f8e, G_UNICODE_NOT_PRESENT_OFFSET, 6724 },
{ 0x2f8f, G_UNICODE_NOT_PRESENT_OFFSET, 6728 },
{ 0x2f90, G_UNICODE_NOT_PRESENT_OFFSET, 6732 },
{ 0x2f91, G_UNICODE_NOT_PRESENT_OFFSET, 6736 },
{ 0x2f92, G_UNICODE_NOT_PRESENT_OFFSET, 6740 },
{ 0x2f93, G_UNICODE_NOT_PRESENT_OFFSET, 6744 },
{ 0x2f94, G_UNICODE_NOT_PRESENT_OFFSET, 6748 },
{ 0x2f95, G_UNICODE_NOT_PRESENT_OFFSET, 6752 },
{ 0x2f96, G_UNICODE_NOT_PRESENT_OFFSET, 6756 },
{ 0x2f97, G_UNICODE_NOT_PRESENT_OFFSET, 6760 },
{ 0x2f98, G_UNICODE_NOT_PRESENT_OFFSET, 6764 },
{ 0x2f99, G_UNICODE_NOT_PRESENT_OFFSET, 6768 },
{ 0x2f9a, G_UNICODE_NOT_PRESENT_OFFSET, 6772 },
{ 0x2f9b, G_UNICODE_NOT_PRESENT_OFFSET, 6776 },
{ 0x2f9c, G_UNICODE_NOT_PRESENT_OFFSET, 6780 },
{ 0x2f9d, G_UNICODE_NOT_PRESENT_OFFSET, 6784 },
{ 0x2f9e, G_UNICODE_NOT_PRESENT_OFFSET, 6788 },
{ 0x2f9f, G_UNICODE_NOT_PRESENT_OFFSET, 6792 },
{ 0x2fa0, G_UNICODE_NOT_PRESENT_OFFSET, 6796 },
{ 0x2fa1, G_UNICODE_NOT_PRESENT_OFFSET, 6800 },
{ 0x2fa2, G_UNICODE_NOT_PRESENT_OFFSET, 6804 },
{ 0x2fa3, G_UNICODE_NOT_PRESENT_OFFSET, 6808 },
{ 0x2fa4, G_UNICODE_NOT_PRESENT_OFFSET, 6812 },
{ 0x2fa5, G_UNICODE_NOT_PRESENT_OFFSET, 6816 },
{ 0x2fa6, G_UNICODE_NOT_PRESENT_OFFSET, 6820 },
{ 0x2fa7, G_UNICODE_NOT_PRESENT_OFFSET, 6824 },
{ 0x2fa8, G_UNICODE_NOT_PRESENT_OFFSET, 6828 },
{ 0x2fa9, G_UNICODE_NOT_PRESENT_OFFSET, 6832 },
{ 0x2faa, G_UNICODE_NOT_PRESENT_OFFSET, 6836 },
{ 0x2fab, G_UNICODE_NOT_PRESENT_OFFSET, 6840 },
{ 0x2fac, G_UNICODE_NOT_PRESENT_OFFSET, 6844 },
{ 0x2fad, G_UNICODE_NOT_PRESENT_OFFSET, 6848 },
{ 0x2fae, G_UNICODE_NOT_PRESENT_OFFSET, 6852 },
{ 0x2faf, G_UNICODE_NOT_PRESENT_OFFSET, 6856 },
{ 0x2fb0, G_UNICODE_NOT_PRESENT_OFFSET, 6860 },
{ 0x2fb1, G_UNICODE_NOT_PRESENT_OFFSET, 6864 },
{ 0x2fb2, G_UNICODE_NOT_PRESENT_OFFSET, 6868 },
{ 0x2fb3, G_UNICODE_NOT_PRESENT_OFFSET, 6872 },
{ 0x2fb4, G_UNICODE_NOT_PRESENT_OFFSET, 6876 },
{ 0x2fb5, G_UNICODE_NOT_PRESENT_OFFSET, 6880 },
{ 0x2fb6, G_UNICODE_NOT_PRESENT_OFFSET, 6884 },
{ 0x2fb7, G_UNICODE_NOT_PRESENT_OFFSET, 6888 },
{ 0x2fb8, G_UNICODE_NOT_PRESENT_OFFSET, 6892 },
{ 0x2fb9, G_UNICODE_NOT_PRESENT_OFFSET, 6896 },
{ 0x2fba, G_UNICODE_NOT_PRESENT_OFFSET, 6900 },
{ 0x2fbb, G_UNICODE_NOT_PRESENT_OFFSET, 6904 },
{ 0x2fbc, G_UNICODE_NOT_PRESENT_OFFSET, 6908 },
{ 0x2fbd, G_UNICODE_NOT_PRESENT_OFFSET, 6912 },
{ 0x2fbe, G_UNICODE_NOT_PRESENT_OFFSET, 6916 },
{ 0x2fbf, G_UNICODE_NOT_PRESENT_OFFSET, 6920 },
{ 0x2fc0, G_UNICODE_NOT_PRESENT_OFFSET, 6924 },
{ 0x2fc1, G_UNICODE_NOT_PRESENT_OFFSET, 6928 },
{ 0x2fc2, G_UNICODE_NOT_PRESENT_OFFSET, 6932 },
{ 0x2fc3, G_UNICODE_NOT_PRESENT_OFFSET, 6936 },
{ 0x2fc4, G_UNICODE_NOT_PRESENT_OFFSET, 6940 },
{ 0x2fc5, G_UNICODE_NOT_PRESENT_OFFSET, 6944 },
{ 0x2fc6, G_UNICODE_NOT_PRESENT_OFFSET, 6948 },
{ 0x2fc7, G_UNICODE_NOT_PRESENT_OFFSET, 6952 },
{ 0x2fc8, G_UNICODE_NOT_PRESENT_OFFSET, 6956 },
{ 0x2fc9, G_UNICODE_NOT_PRESENT_OFFSET, 6960 },
{ 0x2fca, G_UNICODE_NOT_PRESENT_OFFSET, 6964 },
{ 0x2fcb, G_UNICODE_NOT_PRESENT_OFFSET, 6968 },
{ 0x2fcc, G_UNICODE_NOT_PRESENT_OFFSET, 6972 },
{ 0x2fcd, G_UNICODE_NOT_PRESENT_OFFSET, 6976 },
{ 0x2fce, G_UNICODE_NOT_PRESENT_OFFSET, 6980 },
{ 0x2fcf, G_UNICODE_NOT_PRESENT_OFFSET, 6984 },
{ 0x2fd0, G_UNICODE_NOT_PRESENT_OFFSET, 6988 },
{ 0x2fd1, G_UNICODE_NOT_PRESENT_OFFSET, 6992 },
{ 0x2fd2, G_UNICODE_NOT_PRESENT_OFFSET, 6996 },
{ 0x2fd3, G_UNICODE_NOT_PRESENT_OFFSET, 7000 },
{ 0x2fd4, G_UNICODE_NOT_PRESENT_OFFSET, 7004 },
{ 0x2fd5, G_UNICODE_NOT_PRESENT_OFFSET, 7008 },
{ 0x3000, G_UNICODE_NOT_PRESENT_OFFSET, 0 },
{ 0x3036, G_UNICODE_NOT_PRESENT_OFFSET, 7012 },
{ 0x3038, G_UNICODE_NOT_PRESENT_OFFSET, 6248 },
{ 0x3039, G_UNICODE_NOT_PRESENT_OFFSET, 7016 },
{ 0x303a, G_UNICODE_NOT_PRESENT_OFFSET, 7020 },
{ 0x304c, 7024, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x304e, 7031, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x3050, 7038, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x3052, 7045, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x3054, 7052, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x3056, 7059, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x3058, 7066, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x305a, 7073, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x305c, 7080, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x305e, 7087, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x3060, 7094, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x3062, 7101, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x3065, 7108, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x3067, 7115, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x3069, 7122, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x3070, 7129, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x3071, 7136, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x3073, 7143, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x3074, 7150, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x3076, 7157, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x3077, 7164, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x3079, 7171, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x307a, 7178, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x307c, 7185, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x307d, 7192, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x3094, 7199, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x309b, G_UNICODE_NOT_PRESENT_OFFSET, 7206 },
{ 0x309c, G_UNICODE_NOT_PRESENT_OFFSET, 7211 },
{ 0x309e, 7216, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x309f, G_UNICODE_NOT_PRESENT_OFFSET, 7223 },
{ 0x30ac, 7230, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30ae, 7237, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30b0, 7244, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30b2, 7251, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30b4, 7258, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30b6, 7265, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30b8, 7272, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30ba, 7279, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30bc, 7286, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30be, 7293, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30c0, 7300, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30c2, 7307, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30c5, 7314, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30c7, 7321, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30c9, 7328, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30d0, 7335, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30d1, 7342, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30d3, 7349, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30d4, 7356, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30d6, 7363, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30d7, 7370, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30d9, 7377, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30da, 7384, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30dc, 7391, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30dd, 7398, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30f4, 7405, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30f7, 7412, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30f8, 7419, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30f9, 7426, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30fa, 7433, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30fe, 7440, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x30ff, G_UNICODE_NOT_PRESENT_OFFSET, 7447 },
{ 0x3131, G_UNICODE_NOT_PRESENT_OFFSET, 7454 },
{ 0x3132, G_UNICODE_NOT_PRESENT_OFFSET, 7458 },
{ 0x3133, G_UNICODE_NOT_PRESENT_OFFSET, 7462 },
{ 0x3134, G_UNICODE_NOT_PRESENT_OFFSET, 7466 },
{ 0x3135, G_UNICODE_NOT_PRESENT_OFFSET, 7470 },
{ 0x3136, G_UNICODE_NOT_PRESENT_OFFSET, 7474 },
{ 0x3137, G_UNICODE_NOT_PRESENT_OFFSET, 7478 },
{ 0x3138, G_UNICODE_NOT_PRESENT_OFFSET, 7482 },
{ 0x3139, G_UNICODE_NOT_PRESENT_OFFSET, 7486 },
{ 0x313a, G_UNICODE_NOT_PRESENT_OFFSET, 7490 },
{ 0x313b, G_UNICODE_NOT_PRESENT_OFFSET, 7494 },
{ 0x313c, G_UNICODE_NOT_PRESENT_OFFSET, 7498 },
{ 0x313d, G_UNICODE_NOT_PRESENT_OFFSET, 7502 },
{ 0x313e, G_UNICODE_NOT_PRESENT_OFFSET, 7506 },
{ 0x313f, G_UNICODE_NOT_PRESENT_OFFSET, 7510 },
{ 0x3140, G_UNICODE_NOT_PRESENT_OFFSET, 7514 },
{ 0x3141, G_UNICODE_NOT_PRESENT_OFFSET, 7518 },
{ 0x3142, G_UNICODE_NOT_PRESENT_OFFSET, 7522 },
{ 0x3143, G_UNICODE_NOT_PRESENT_OFFSET, 7526 },
{ 0x3144, G_UNICODE_NOT_PRESENT_OFFSET, 7530 },
{ 0x3145, G_UNICODE_NOT_PRESENT_OFFSET, 7534 },
{ 0x3146, G_UNICODE_NOT_PRESENT_OFFSET, 7538 },
{ 0x3147, G_UNICODE_NOT_PRESENT_OFFSET, 7542 },
{ 0x3148, G_UNICODE_NOT_PRESENT_OFFSET, 7546 },
{ 0x3149, G_UNICODE_NOT_PRESENT_OFFSET, 7550 },
{ 0x314a, G_UNICODE_NOT_PRESENT_OFFSET, 7554 },
{ 0x314b, G_UNICODE_NOT_PRESENT_OFFSET, 7558 },
{ 0x314c, G_UNICODE_NOT_PRESENT_OFFSET, 7562 },
{ 0x314d, G_UNICODE_NOT_PRESENT_OFFSET, 7566 },
{ 0x314e, G_UNICODE_NOT_PRESENT_OFFSET, 7570 },
{ 0x314f, G_UNICODE_NOT_PRESENT_OFFSET, 7574 },
{ 0x3150, G_UNICODE_NOT_PRESENT_OFFSET, 7578 },
{ 0x3151, G_UNICODE_NOT_PRESENT_OFFSET, 7582 },
{ 0x3152, G_UNICODE_NOT_PRESENT_OFFSET, 7586 },
{ 0x3153, G_UNICODE_NOT_PRESENT_OFFSET, 7590 },
{ 0x3154, G_UNICODE_NOT_PRESENT_OFFSET, 7594 },
{ 0x3155, G_UNICODE_NOT_PRESENT_OFFSET, 7598 },
{ 0x3156, G_UNICODE_NOT_PRESENT_OFFSET, 7602 },
{ 0x3157, G_UNICODE_NOT_PRESENT_OFFSET, 7606 },
{ 0x3158, G_UNICODE_NOT_PRESENT_OFFSET, 7610 },
{ 0x3159, G_UNICODE_NOT_PRESENT_OFFSET, 7614 },
{ 0x315a, G_UNICODE_NOT_PRESENT_OFFSET, 7618 },
{ 0x315b, G_UNICODE_NOT_PRESENT_OFFSET, 7622 },
{ 0x315c, G_UNICODE_NOT_PRESENT_OFFSET, 7626 },
{ 0x315d, G_UNICODE_NOT_PRESENT_OFFSET, 7630 },
{ 0x315e, G_UNICODE_NOT_PRESENT_OFFSET, 7634 },
{ 0x315f, G_UNICODE_NOT_PRESENT_OFFSET, 7638 },
{ 0x3160, G_UNICODE_NOT_PRESENT_OFFSET, 7642 },
{ 0x3161, G_UNICODE_NOT_PRESENT_OFFSET, 7646 },
{ 0x3162, G_UNICODE_NOT_PRESENT_OFFSET, 7650 },
{ 0x3163, G_UNICODE_NOT_PRESENT_OFFSET, 7654 },
{ 0x3164, G_UNICODE_NOT_PRESENT_OFFSET, 7658 },
{ 0x3165, G_UNICODE_NOT_PRESENT_OFFSET, 7662 },
{ 0x3166, G_UNICODE_NOT_PRESENT_OFFSET, 7666 },
{ 0x3167, G_UNICODE_NOT_PRESENT_OFFSET, 7670 },
{ 0x3168, G_UNICODE_NOT_PRESENT_OFFSET, 7674 },
{ 0x3169, G_UNICODE_NOT_PRESENT_OFFSET, 7678 },
{ 0x316a, G_UNICODE_NOT_PRESENT_OFFSET, 7682 },
{ 0x316b, G_UNICODE_NOT_PRESENT_OFFSET, 7686 },
{ 0x316c, G_UNICODE_NOT_PRESENT_OFFSET, 7690 },
{ 0x316d, G_UNICODE_NOT_PRESENT_OFFSET, 7694 },
{ 0x316e, G_UNICODE_NOT_PRESENT_OFFSET, 7698 },
{ 0x316f, G_UNICODE_NOT_PRESENT_OFFSET, 7702 },
{ 0x3170, G_UNICODE_NOT_PRESENT_OFFSET, 7706 },
{ 0x3171, G_UNICODE_NOT_PRESENT_OFFSET, 7710 },
{ 0x3172, G_UNICODE_NOT_PRESENT_OFFSET, 7714 },
{ 0x3173, G_UNICODE_NOT_PRESENT_OFFSET, 7718 },
{ 0x3174, G_UNICODE_NOT_PRESENT_OFFSET, 7722 },
{ 0x3175, G_UNICODE_NOT_PRESENT_OFFSET, 7726 },
{ 0x3176, G_UNICODE_NOT_PRESENT_OFFSET, 7730 },
{ 0x3177, G_UNICODE_NOT_PRESENT_OFFSET, 7734 },
{ 0x3178, G_UNICODE_NOT_PRESENT_OFFSET, 7738 },
{ 0x3179, G_UNICODE_NOT_PRESENT_OFFSET, 7742 },
{ 0x317a, G_UNICODE_NOT_PRESENT_OFFSET, 7746 },
{ 0x317b, G_UNICODE_NOT_PRESENT_OFFSET, 7750 },
{ 0x317c, G_UNICODE_NOT_PRESENT_OFFSET, 7754 },
{ 0x317d, G_UNICODE_NOT_PRESENT_OFFSET, 7758 },
{ 0x317e, G_UNICODE_NOT_PRESENT_OFFSET, 7762 },
{ 0x317f, G_UNICODE_NOT_PRESENT_OFFSET, 7766 },
{ 0x3180, G_UNICODE_NOT_PRESENT_OFFSET, 7770 },
{ 0x3181, G_UNICODE_NOT_PRESENT_OFFSET, 7774 },
{ 0x3182, G_UNICODE_NOT_PRESENT_OFFSET, 7778 },
{ 0x3183, G_UNICODE_NOT_PRESENT_OFFSET, 7782 },
{ 0x3184, G_UNICODE_NOT_PRESENT_OFFSET, 7786 },
{ 0x3185, G_UNICODE_NOT_PRESENT_OFFSET, 7790 },
{ 0x3186, G_UNICODE_NOT_PRESENT_OFFSET, 7794 },
{ 0x3187, G_UNICODE_NOT_PRESENT_OFFSET, 7798 },
{ 0x3188, G_UNICODE_NOT_PRESENT_OFFSET, 7802 },
{ 0x3189, G_UNICODE_NOT_PRESENT_OFFSET, 7806 },
{ 0x318a, G_UNICODE_NOT_PRESENT_OFFSET, 7810 },
{ 0x318b, G_UNICODE_NOT_PRESENT_OFFSET, 7814 },
{ 0x318c, G_UNICODE_NOT_PRESENT_OFFSET, 7818 },
{ 0x318d, G_UNICODE_NOT_PRESENT_OFFSET, 7822 },
{ 0x318e, G_UNICODE_NOT_PRESENT_OFFSET, 7826 },
{ 0x3192, G_UNICODE_NOT_PRESENT_OFFSET, 6156 },
{ 0x3193, G_UNICODE_NOT_PRESENT_OFFSET, 6180 },
{ 0x3194, G_UNICODE_NOT_PRESENT_OFFSET, 7830 },
{ 0x3195, G_UNICODE_NOT_PRESENT_OFFSET, 7834 },
{ 0x3196, G_UNICODE_NOT_PRESENT_OFFSET, 7838 },
{ 0x3197, G_UNICODE_NOT_PRESENT_OFFSET, 7842 },
{ 0x3198, G_UNICODE_NOT_PRESENT_OFFSET, 7846 },
{ 0x3199, G_UNICODE_NOT_PRESENT_OFFSET, 7850 },
{ 0x319a, G_UNICODE_NOT_PRESENT_OFFSET, 6172 },
{ 0x319b, G_UNICODE_NOT_PRESENT_OFFSET, 7854 },
{ 0x319c, G_UNICODE_NOT_PRESENT_OFFSET, 7858 },
{ 0x319d, G_UNICODE_NOT_PRESENT_OFFSET, 7862 },
{ 0x319e, G_UNICODE_NOT_PRESENT_OFFSET, 7866 },
{ 0x319f, G_UNICODE_NOT_PRESENT_OFFSET, 6188 },
{ 0x3200, G_UNICODE_NOT_PRESENT_OFFSET, 7870 },
{ 0x3201, G_UNICODE_NOT_PRESENT_OFFSET, 7876 },
{ 0x3202, G_UNICODE_NOT_PRESENT_OFFSET, 7882 },
{ 0x3203, G_UNICODE_NOT_PRESENT_OFFSET, 7888 },
{ 0x3204, G_UNICODE_NOT_PRESENT_OFFSET, 7894 },
{ 0x3205, G_UNICODE_NOT_PRESENT_OFFSET, 7900 },
{ 0x3206, G_UNICODE_NOT_PRESENT_OFFSET, 7906 },
{ 0x3207, G_UNICODE_NOT_PRESENT_OFFSET, 7912 },
{ 0x3208, G_UNICODE_NOT_PRESENT_OFFSET, 7918 },
{ 0x3209, G_UNICODE_NOT_PRESENT_OFFSET, 7924 },
{ 0x320a, G_UNICODE_NOT_PRESENT_OFFSET, 7930 },
{ 0x320b, G_UNICODE_NOT_PRESENT_OFFSET, 7936 },
{ 0x320c, G_UNICODE_NOT_PRESENT_OFFSET, 7942 },
{ 0x320d, G_UNICODE_NOT_PRESENT_OFFSET, 7948 },
{ 0x320e, G_UNICODE_NOT_PRESENT_OFFSET, 7954 },
{ 0x320f, G_UNICODE_NOT_PRESENT_OFFSET, 7963 },
{ 0x3210, G_UNICODE_NOT_PRESENT_OFFSET, 7972 },
{ 0x3211, G_UNICODE_NOT_PRESENT_OFFSET, 7981 },
{ 0x3212, G_UNICODE_NOT_PRESENT_OFFSET, 7990 },
{ 0x3213, G_UNICODE_NOT_PRESENT_OFFSET, 7999 },
{ 0x3214, G_UNICODE_NOT_PRESENT_OFFSET, 8008 },
{ 0x3215, G_UNICODE_NOT_PRESENT_OFFSET, 8017 },
{ 0x3216, G_UNICODE_NOT_PRESENT_OFFSET, 8026 },
{ 0x3217, G_UNICODE_NOT_PRESENT_OFFSET, 8035 },
{ 0x3218, G_UNICODE_NOT_PRESENT_OFFSET, 8044 },
{ 0x3219, G_UNICODE_NOT_PRESENT_OFFSET, 8053 },
{ 0x321a, G_UNICODE_NOT_PRESENT_OFFSET, 8062 },
{ 0x321b, G_UNICODE_NOT_PRESENT_OFFSET, 8071 },
{ 0x321c, G_UNICODE_NOT_PRESENT_OFFSET, 8080 },
{ 0x321d, G_UNICODE_NOT_PRESENT_OFFSET, 8089 },
{ 0x321e, G_UNICODE_NOT_PRESENT_OFFSET, 8107 },
{ 0x3220, G_UNICODE_NOT_PRESENT_OFFSET, 8122 },
{ 0x3221, G_UNICODE_NOT_PRESENT_OFFSET, 8128 },
{ 0x3222, G_UNICODE_NOT_PRESENT_OFFSET, 8134 },
{ 0x3223, G_UNICODE_NOT_PRESENT_OFFSET, 8140 },
{ 0x3224, G_UNICODE_NOT_PRESENT_OFFSET, 8146 },
{ 0x3225, G_UNICODE_NOT_PRESENT_OFFSET, 8152 },
{ 0x3226, G_UNICODE_NOT_PRESENT_OFFSET, 8158 },
{ 0x3227, G_UNICODE_NOT_PRESENT_OFFSET, 8164 },
{ 0x3228, G_UNICODE_NOT_PRESENT_OFFSET, 8170 },
{ 0x3229, G_UNICODE_NOT_PRESENT_OFFSET, 8176 },
{ 0x322a, G_UNICODE_NOT_PRESENT_OFFSET, 8182 },
{ 0x322b, G_UNICODE_NOT_PRESENT_OFFSET, 8188 },
{ 0x322c, G_UNICODE_NOT_PRESENT_OFFSET, 8194 },
{ 0x322d, G_UNICODE_NOT_PRESENT_OFFSET, 8200 },
{ 0x322e, G_UNICODE_NOT_PRESENT_OFFSET, 8206 },
{ 0x322f, G_UNICODE_NOT_PRESENT_OFFSET, 8212 },
{ 0x3230, G_UNICODE_NOT_PRESENT_OFFSET, 8218 },
{ 0x3231, G_UNICODE_NOT_PRESENT_OFFSET, 8224 },
{ 0x3232, G_UNICODE_NOT_PRESENT_OFFSET, 8230 },
{ 0x3233, G_UNICODE_NOT_PRESENT_OFFSET, 8236 },
{ 0x3234, G_UNICODE_NOT_PRESENT_OFFSET, 8242 },
{ 0x3235, G_UNICODE_NOT_PRESENT_OFFSET, 8248 },
{ 0x3236, G_UNICODE_NOT_PRESENT_OFFSET, 8254 },
{ 0x3237, G_UNICODE_NOT_PRESENT_OFFSET, 8260 },
{ 0x3238, G_UNICODE_NOT_PRESENT_OFFSET, 8266 },
{ 0x3239, G_UNICODE_NOT_PRESENT_OFFSET, 8272 },
{ 0x323a, G_UNICODE_NOT_PRESENT_OFFSET, 8278 },
{ 0x323b, G_UNICODE_NOT_PRESENT_OFFSET, 8284 },
{ 0x323c, G_UNICODE_NOT_PRESENT_OFFSET, 8290 },
{ 0x323d, G_UNICODE_NOT_PRESENT_OFFSET, 8296 },
{ 0x323e, G_UNICODE_NOT_PRESENT_OFFSET, 8302 },
{ 0x323f, G_UNICODE_NOT_PRESENT_OFFSET, 8308 },
{ 0x3240, G_UNICODE_NOT_PRESENT_OFFSET, 8314 },
{ 0x3241, G_UNICODE_NOT_PRESENT_OFFSET, 8320 },
{ 0x3242, G_UNICODE_NOT_PRESENT_OFFSET, 8326 },
{ 0x3243, G_UNICODE_NOT_PRESENT_OFFSET, 8332 },
{ 0x3250, G_UNICODE_NOT_PRESENT_OFFSET, 8338 },
{ 0x3251, G_UNICODE_NOT_PRESENT_OFFSET, 8342 },
{ 0x3252, G_UNICODE_NOT_PRESENT_OFFSET, 8345 },
{ 0x3253, G_UNICODE_NOT_PRESENT_OFFSET, 8348 },
{ 0x3254, G_UNICODE_NOT_PRESENT_OFFSET, 8351 },
{ 0x3255, G_UNICODE_NOT_PRESENT_OFFSET, 8354 },
{ 0x3256, G_UNICODE_NOT_PRESENT_OFFSET, 8357 },
{ 0x3257, G_UNICODE_NOT_PRESENT_OFFSET, 8360 },
{ 0x3258, G_UNICODE_NOT_PRESENT_OFFSET, 8363 },
{ 0x3259, G_UNICODE_NOT_PRESENT_OFFSET, 8366 },
{ 0x325a, G_UNICODE_NOT_PRESENT_OFFSET, 8369 },
{ 0x325b, G_UNICODE_NOT_PRESENT_OFFSET, 8372 },
{ 0x325c, G_UNICODE_NOT_PRESENT_OFFSET, 8375 },
{ 0x325d, G_UNICODE_NOT_PRESENT_OFFSET, 8378 },
{ 0x325e, G_UNICODE_NOT_PRESENT_OFFSET, 8381 },
{ 0x325f, G_UNICODE_NOT_PRESENT_OFFSET, 8384 },
{ 0x3260, G_UNICODE_NOT_PRESENT_OFFSET, 7454 },
{ 0x3261, G_UNICODE_NOT_PRESENT_OFFSET, 7466 },
{ 0x3262, G_UNICODE_NOT_PRESENT_OFFSET, 7478 },
{ 0x3263, G_UNICODE_NOT_PRESENT_OFFSET, 7486 },
{ 0x3264, G_UNICODE_NOT_PRESENT_OFFSET, 7518 },
{ 0x3265, G_UNICODE_NOT_PRESENT_OFFSET, 7522 },
{ 0x3266, G_UNICODE_NOT_PRESENT_OFFSET, 7534 },
{ 0x3267, G_UNICODE_NOT_PRESENT_OFFSET, 7542 },
{ 0x3268, G_UNICODE_NOT_PRESENT_OFFSET, 7546 },
{ 0x3269, G_UNICODE_NOT_PRESENT_OFFSET, 7554 },
{ 0x326a, G_UNICODE_NOT_PRESENT_OFFSET, 7558 },
{ 0x326b, G_UNICODE_NOT_PRESENT_OFFSET, 7562 },
{ 0x326c, G_UNICODE_NOT_PRESENT_OFFSET, 7566 },
{ 0x326d, G_UNICODE_NOT_PRESENT_OFFSET, 7570 },
{ 0x326e, G_UNICODE_NOT_PRESENT_OFFSET, 8387 },
{ 0x326f, G_UNICODE_NOT_PRESENT_OFFSET, 8394 },
{ 0x3270, G_UNICODE_NOT_PRESENT_OFFSET, 8401 },
{ 0x3271, G_UNICODE_NOT_PRESENT_OFFSET, 8408 },
{ 0x3272, G_UNICODE_NOT_PRESENT_OFFSET, 8415 },
{ 0x3273, G_UNICODE_NOT_PRESENT_OFFSET, 8422 },
{ 0x3274, G_UNICODE_NOT_PRESENT_OFFSET, 8429 },
{ 0x3275, G_UNICODE_NOT_PRESENT_OFFSET, 8436 },
{ 0x3276, G_UNICODE_NOT_PRESENT_OFFSET, 8443 },
{ 0x3277, G_UNICODE_NOT_PRESENT_OFFSET, 8450 },
{ 0x3278, G_UNICODE_NOT_PRESENT_OFFSET, 8457 },
{ 0x3279, G_UNICODE_NOT_PRESENT_OFFSET, 8464 },
{ 0x327a, G_UNICODE_NOT_PRESENT_OFFSET, 8471 },
{ 0x327b, G_UNICODE_NOT_PRESENT_OFFSET, 8478 },
{ 0x327c, G_UNICODE_NOT_PRESENT_OFFSET, 8485 },
{ 0x327d, G_UNICODE_NOT_PRESENT_OFFSET, 8501 },
{ 0x327e, G_UNICODE_NOT_PRESENT_OFFSET, 8514 },
{ 0x3280, G_UNICODE_NOT_PRESENT_OFFSET, 6156 },
{ 0x3281, G_UNICODE_NOT_PRESENT_OFFSET, 6180 },
{ 0x3282, G_UNICODE_NOT_PRESENT_OFFSET, 7830 },
{ 0x3283, G_UNICODE_NOT_PRESENT_OFFSET, 7834 },
{ 0x3284, G_UNICODE_NOT_PRESENT_OFFSET, 8521 },
{ 0x3285, G_UNICODE_NOT_PRESENT_OFFSET, 8525 },
{ 0x3286, G_UNICODE_NOT_PRESENT_OFFSET, 8529 },
{ 0x3287, G_UNICODE_NOT_PRESENT_OFFSET, 6200 },
{ 0x3288, G_UNICODE_NOT_PRESENT_OFFSET, 8533 },
{ 0x3289, G_UNICODE_NOT_PRESENT_OFFSET, 6248 },
{ 0x328a, G_UNICODE_NOT_PRESENT_OFFSET, 6448 },
{ 0x328b, G_UNICODE_NOT_PRESENT_OFFSET, 6496 },
{ 0x328c, G_UNICODE_NOT_PRESENT_OFFSET, 6492 },
{ 0x328d, G_UNICODE_NOT_PRESENT_OFFSET, 6452 },
{ 0x328e, G_UNICODE_NOT_PRESENT_OFFSET, 6820 },
{ 0x328f, G_UNICODE_NOT_PRESENT_OFFSET, 6280 },
{ 0x3290, G_UNICODE_NOT_PRESENT_OFFSET, 6440 },
{ 0x3291, G_UNICODE_NOT_PRESENT_OFFSET, 8537 },
{ 0x3292, G_UNICODE_NOT_PRESENT_OFFSET, 8541 },
{ 0x3293, G_UNICODE_NOT_PRESENT_OFFSET, 8545 },
{ 0x3294, G_UNICODE_NOT_PRESENT_OFFSET, 8549 },
{ 0x3295, G_UNICODE_NOT_PRESENT_OFFSET, 8553 },
{ 0x3296, G_UNICODE_NOT_PRESENT_OFFSET, 8557 },
{ 0x3297, G_UNICODE_NOT_PRESENT_OFFSET, 8561 },
{ 0x3298, G_UNICODE_NOT_PRESENT_OFFSET, 8565 },
{ 0x3299, G_UNICODE_NOT_PRESENT_OFFSET, 8569 },
{ 0x329a, G_UNICODE_NOT_PRESENT_OFFSET, 8573 },
{ 0x329b, G_UNICODE_NOT_PRESENT_OFFSET, 6304 },
{ 0x329c, G_UNICODE_NOT_PRESENT_OFFSET, 8577 },
{ 0x329d, G_UNICODE_NOT_PRESENT_OFFSET, 8581 },
{ 0x329e, G_UNICODE_NOT_PRESENT_OFFSET, 8585 },
{ 0x329f, G_UNICODE_NOT_PRESENT_OFFSET, 8589 },
{ 0x32a0, G_UNICODE_NOT_PRESENT_OFFSET, 8593 },
{ 0x32a1, G_UNICODE_NOT_PRESENT_OFFSET, 8597 },
{ 0x32a2, G_UNICODE_NOT_PRESENT_OFFSET, 8601 },
{ 0x32a3, G_UNICODE_NOT_PRESENT_OFFSET, 8605 },
{ 0x32a4, G_UNICODE_NOT_PRESENT_OFFSET, 7838 },
{ 0x32a5, G_UNICODE_NOT_PRESENT_OFFSET, 7842 },
{ 0x32a6, G_UNICODE_NOT_PRESENT_OFFSET, 7846 },
{ 0x32a7, G_UNICODE_NOT_PRESENT_OFFSET, 8609 },
{ 0x32a8, G_UNICODE_NOT_PRESENT_OFFSET, 8613 },
{ 0x32a9, G_UNICODE_NOT_PRESENT_OFFSET, 8617 },
{ 0x32aa, G_UNICODE_NOT_PRESENT_OFFSET, 8621 },
{ 0x32ab, G_UNICODE_NOT_PRESENT_OFFSET, 8625 },
{ 0x32ac, G_UNICODE_NOT_PRESENT_OFFSET, 8629 },
{ 0x32ad, G_UNICODE_NOT_PRESENT_OFFSET, 8633 },
{ 0x32ae, G_UNICODE_NOT_PRESENT_OFFSET, 8637 },
{ 0x32af, G_UNICODE_NOT_PRESENT_OFFSET, 8641 },
{ 0x32b0, G_UNICODE_NOT_PRESENT_OFFSET, 8645 },
{ 0x32b1, G_UNICODE_NOT_PRESENT_OFFSET, 8649 },
{ 0x32b2, G_UNICODE_NOT_PRESENT_OFFSET, 8652 },
{ 0x32b3, G_UNICODE_NOT_PRESENT_OFFSET, 8655 },
{ 0x32b4, G_UNICODE_NOT_PRESENT_OFFSET, 8658 },
{ 0x32b5, G_UNICODE_NOT_PRESENT_OFFSET, 8661 },
{ 0x32b6, G_UNICODE_NOT_PRESENT_OFFSET, 8664 },
{ 0x32b7, G_UNICODE_NOT_PRESENT_OFFSET, 8667 },
{ 0x32b8, G_UNICODE_NOT_PRESENT_OFFSET, 8670 },
{ 0x32b9, G_UNICODE_NOT_PRESENT_OFFSET, 8673 },
{ 0x32ba, G_UNICODE_NOT_PRESENT_OFFSET, 8676 },
{ 0x32bb, G_UNICODE_NOT_PRESENT_OFFSET, 8679 },
{ 0x32bc, G_UNICODE_NOT_PRESENT_OFFSET, 8682 },
{ 0x32bd, G_UNICODE_NOT_PRESENT_OFFSET, 8685 },
{ 0x32be, G_UNICODE_NOT_PRESENT_OFFSET, 8688 },
{ 0x32bf, G_UNICODE_NOT_PRESENT_OFFSET, 8691 },
{ 0x32c0, G_UNICODE_NOT_PRESENT_OFFSET, 8694 },
{ 0x32c1, G_UNICODE_NOT_PRESENT_OFFSET, 8699 },
{ 0x32c2, G_UNICODE_NOT_PRESENT_OFFSET, 8704 },
{ 0x32c3, G_UNICODE_NOT_PRESENT_OFFSET, 8709 },
{ 0x32c4, G_UNICODE_NOT_PRESENT_OFFSET, 8714 },
{ 0x32c5, G_UNICODE_NOT_PRESENT_OFFSET, 8719 },
{ 0x32c6, G_UNICODE_NOT_PRESENT_OFFSET, 8724 },
{ 0x32c7, G_UNICODE_NOT_PRESENT_OFFSET, 8729 },
{ 0x32c8, G_UNICODE_NOT_PRESENT_OFFSET, 8734 },
{ 0x32c9, G_UNICODE_NOT_PRESENT_OFFSET, 8739 },
{ 0x32ca, G_UNICODE_NOT_PRESENT_OFFSET, 8745 },
{ 0x32cb, G_UNICODE_NOT_PRESENT_OFFSET, 8751 },
{ 0x32cc, G_UNICODE_NOT_PRESENT_OFFSET, 8757 },
{ 0x32cd, G_UNICODE_NOT_PRESENT_OFFSET, 8760 },
{ 0x32ce, G_UNICODE_NOT_PRESENT_OFFSET, 8764 },
{ 0x32cf, G_UNICODE_NOT_PRESENT_OFFSET, 8767 },
{ 0x32d0, G_UNICODE_NOT_PRESENT_OFFSET, 8771 },
{ 0x32d1, G_UNICODE_NOT_PRESENT_OFFSET, 8775 },
{ 0x32d2, G_UNICODE_NOT_PRESENT_OFFSET, 8779 },
{ 0x32d3, G_UNICODE_NOT_PRESENT_OFFSET, 8783 },
{ 0x32d4, G_UNICODE_NOT_PRESENT_OFFSET, 8787 },
{ 0x32d5, G_UNICODE_NOT_PRESENT_OFFSET, 8791 },
{ 0x32d6, G_UNICODE_NOT_PRESENT_OFFSET, 8795 },
{ 0x32d7, G_UNICODE_NOT_PRESENT_OFFSET, 8799 },
{ 0x32d8, G_UNICODE_NOT_PRESENT_OFFSET, 8803 },
{ 0x32d9, G_UNICODE_NOT_PRESENT_OFFSET, 8807 },
{ 0x32da, G_UNICODE_NOT_PRESENT_OFFSET, 8811 },
{ 0x32db, G_UNICODE_NOT_PRESENT_OFFSET, 8815 },
{ 0x32dc, G_UNICODE_NOT_PRESENT_OFFSET, 8819 },
{ 0x32dd, G_UNICODE_NOT_PRESENT_OFFSET, 8823 },
{ 0x32de, G_UNICODE_NOT_PRESENT_OFFSET, 8827 },
{ 0x32df, G_UNICODE_NOT_PRESENT_OFFSET, 8831 },
{ 0x32e0, G_UNICODE_NOT_PRESENT_OFFSET, 8835 },
{ 0x32e1, G_UNICODE_NOT_PRESENT_OFFSET, 8839 },
{ 0x32e2, G_UNICODE_NOT_PRESENT_OFFSET, 8843 },
{ 0x32e3, G_UNICODE_NOT_PRESENT_OFFSET, 8847 },
{ 0x32e4, G_UNICODE_NOT_PRESENT_OFFSET, 8851 },
{ 0x32e5, G_UNICODE_NOT_PRESENT_OFFSET, 8855 },
{ 0x32e6, G_UNICODE_NOT_PRESENT_OFFSET, 8859 },
{ 0x32e7, G_UNICODE_NOT_PRESENT_OFFSET, 8863 },
{ 0x32e8, G_UNICODE_NOT_PRESENT_OFFSET, 8867 },
{ 0x32e9, G_UNICODE_NOT_PRESENT_OFFSET, 8871 },
{ 0x32ea, G_UNICODE_NOT_PRESENT_OFFSET, 8875 },
{ 0x32eb, G_UNICODE_NOT_PRESENT_OFFSET, 8879 },
{ 0x32ec, G_UNICODE_NOT_PRESENT_OFFSET, 8883 },
{ 0x32ed, G_UNICODE_NOT_PRESENT_OFFSET, 8887 },
{ 0x32ee, G_UNICODE_NOT_PRESENT_OFFSET, 8891 },
{ 0x32ef, G_UNICODE_NOT_PRESENT_OFFSET, 8895 },
{ 0x32f0, G_UNICODE_NOT_PRESENT_OFFSET, 8899 },
{ 0x32f1, G_UNICODE_NOT_PRESENT_OFFSET, 8903 },
{ 0x32f2, G_UNICODE_NOT_PRESENT_OFFSET, 8907 },
{ 0x32f3, G_UNICODE_NOT_PRESENT_OFFSET, 8911 },
{ 0x32f4, G_UNICODE_NOT_PRESENT_OFFSET, 8915 },
{ 0x32f5, G_UNICODE_NOT_PRESENT_OFFSET, 8919 },
{ 0x32f6, G_UNICODE_NOT_PRESENT_OFFSET, 8923 },
{ 0x32f7, G_UNICODE_NOT_PRESENT_OFFSET, 8927 },
{ 0x32f8, G_UNICODE_NOT_PRESENT_OFFSET, 8931 },
{ 0x32f9, G_UNICODE_NOT_PRESENT_OFFSET, 8935 },
{ 0x32fa, G_UNICODE_NOT_PRESENT_OFFSET, 8939 },
{ 0x32fb, G_UNICODE_NOT_PRESENT_OFFSET, 8943 },
{ 0x32fc, G_UNICODE_NOT_PRESENT_OFFSET, 8947 },
{ 0x32fd, G_UNICODE_NOT_PRESENT_OFFSET, 8951 },
{ 0x32fe, G_UNICODE_NOT_PRESENT_OFFSET, 8955 },
{ 0x3300, G_UNICODE_NOT_PRESENT_OFFSET, 8959 },
{ 0x3301, G_UNICODE_NOT_PRESENT_OFFSET, 8975 },
{ 0x3302, G_UNICODE_NOT_PRESENT_OFFSET, 8988 },
{ 0x3303, G_UNICODE_NOT_PRESENT_OFFSET, 9004 },
{ 0x3304, G_UNICODE_NOT_PRESENT_OFFSET, 9014 },
{ 0x3305, G_UNICODE_NOT_PRESENT_OFFSET, 9030 },
{ 0x3306, G_UNICODE_NOT_PRESENT_OFFSET, 9040 },
{ 0x3307, G_UNICODE_NOT_PRESENT_OFFSET, 9050 },
{ 0x3308, G_UNICODE_NOT_PRESENT_OFFSET, 9069 },
{ 0x3309, G_UNICODE_NOT_PRESENT_OFFSET, 9082 },
{ 0x330a, G_UNICODE_NOT_PRESENT_OFFSET, 9092 },
{ 0x330b, G_UNICODE_NOT_PRESENT_OFFSET, 9102 },
{ 0x330c, G_UNICODE_NOT_PRESENT_OFFSET, 9112 },
{ 0x330d, G_UNICODE_NOT_PRESENT_OFFSET, 9125 },
{ 0x330e, G_UNICODE_NOT_PRESENT_OFFSET, 9138 },
{ 0x330f, G_UNICODE_NOT_PRESENT_OFFSET, 9151 },
{ 0x3310, G_UNICODE_NOT_PRESENT_OFFSET, 9164 },
{ 0x3311, G_UNICODE_NOT_PRESENT_OFFSET, 9177 },
{ 0x3312, G_UNICODE_NOT_PRESENT_OFFSET, 9190 },
{ 0x3313, G_UNICODE_NOT_PRESENT_OFFSET, 9203 },
{ 0x3314, G_UNICODE_NOT_PRESENT_OFFSET, 9222 },
{ 0x3315, G_UNICODE_NOT_PRESENT_OFFSET, 9229 },
{ 0x3316, G_UNICODE_NOT_PRESENT_OFFSET, 9248 },
{ 0x3317, G_UNICODE_NOT_PRESENT_OFFSET, 9267 },
{ 0x3318, G_UNICODE_NOT_PRESENT_OFFSET, 9283 },
{ 0x3319, G_UNICODE_NOT_PRESENT_OFFSET, 9296 },
{ 0x331a, G_UNICODE_NOT_PRESENT_OFFSET, 9315 },
{ 0x331b, G_UNICODE_NOT_PRESENT_OFFSET, 9334 },
{ 0x331c, G_UNICODE_NOT_PRESENT_OFFSET, 9347 },
{ 0x331d, G_UNICODE_NOT_PRESENT_OFFSET, 9357 },
{ 0x331e, G_UNICODE_NOT_PRESENT_OFFSET, 9367 },
{ 0x331f, G_UNICODE_NOT_PRESENT_OFFSET, 9380 },
{ 0x3320, G_UNICODE_NOT_PRESENT_OFFSET, 9393 },
{ 0x3321, G_UNICODE_NOT_PRESENT_OFFSET, 9409 },
{ 0x3322, G_UNICODE_NOT_PRESENT_OFFSET, 9425 },
{ 0x3323, G_UNICODE_NOT_PRESENT_OFFSET, 9435 },
{ 0x3324, G_UNICODE_NOT_PRESENT_OFFSET, 9445 },
{ 0x3325, G_UNICODE_NOT_PRESENT_OFFSET, 9458 },
{ 0x3326, G_UNICODE_NOT_PRESENT_OFFSET, 9468 },
{ 0x3327, G_UNICODE_NOT_PRESENT_OFFSET, 9478 },
{ 0x3328, G_UNICODE_NOT_PRESENT_OFFSET, 9485 },
{ 0x3329, G_UNICODE_NOT_PRESENT_OFFSET, 9492 },
{ 0x332a, G_UNICODE_NOT_PRESENT_OFFSET, 9502 },
{ 0x332b, G_UNICODE_NOT_PRESENT_OFFSET, 9512 },
{ 0x332c, G_UNICODE_NOT_PRESENT_OFFSET, 9531 },
{ 0x332d, G_UNICODE_NOT_PRESENT_OFFSET, 9544 },
{ 0x332e, G_UNICODE_NOT_PRESENT_OFFSET, 9560 },
{ 0x332f, G_UNICODE_NOT_PRESENT_OFFSET, 9579 },
{ 0x3330, G_UNICODE_NOT_PRESENT_OFFSET, 9592 },
{ 0x3331, G_UNICODE_NOT_PRESENT_OFFSET, 9602 },
{ 0x3332, G_UNICODE_NOT_PRESENT_OFFSET, 9612 },
{ 0x3333, G_UNICODE_NOT_PRESENT_OFFSET, 9631 },
{ 0x3334, G_UNICODE_NOT_PRESENT_OFFSET, 9644 },
{ 0x3335, G_UNICODE_NOT_PRESENT_OFFSET, 9663 },
{ 0x3336, G_UNICODE_NOT_PRESENT_OFFSET, 9673 },
{ 0x3337, G_UNICODE_NOT_PRESENT_OFFSET, 9689 },
{ 0x3338, G_UNICODE_NOT_PRESENT_OFFSET, 9699 },
{ 0x3339, G_UNICODE_NOT_PRESENT_OFFSET, 9712 },
{ 0x333a, G_UNICODE_NOT_PRESENT_OFFSET, 9722 },
{ 0x333b, G_UNICODE_NOT_PRESENT_OFFSET, 9735 },
{ 0x333c, G_UNICODE_NOT_PRESENT_OFFSET, 9751 },
{ 0x333d, G_UNICODE_NOT_PRESENT_OFFSET, 9764 },
{ 0x333e, G_UNICODE_NOT_PRESENT_OFFSET, 9780 },
{ 0x333f, G_UNICODE_NOT_PRESENT_OFFSET, 9793 },
{ 0x3340, G_UNICODE_NOT_PRESENT_OFFSET, 9800 },
{ 0x3341, G_UNICODE_NOT_PRESENT_OFFSET, 9816 },
{ 0x3342, G_UNICODE_NOT_PRESENT_OFFSET, 9826 },
{ 0x3343, G_UNICODE_NOT_PRESENT_OFFSET, 9836 },
{ 0x3344, G_UNICODE_NOT_PRESENT_OFFSET, 9849 },
{ 0x3345, G_UNICODE_NOT_PRESENT_OFFSET, 9859 },
{ 0x3346, G_UNICODE_NOT_PRESENT_OFFSET, 9869 },
{ 0x3347, G_UNICODE_NOT_PRESENT_OFFSET, 9879 },
{ 0x3348, G_UNICODE_NOT_PRESENT_OFFSET, 9895 },
{ 0x3349, G_UNICODE_NOT_PRESENT_OFFSET, 9908 },
{ 0x334a, G_UNICODE_NOT_PRESENT_OFFSET, 9915 },
{ 0x334b, G_UNICODE_NOT_PRESENT_OFFSET, 9934 },
{ 0x334c, G_UNICODE_NOT_PRESENT_OFFSET, 9944 },
{ 0x334d, G_UNICODE_NOT_PRESENT_OFFSET, 9960 },
{ 0x334e, G_UNICODE_NOT_PRESENT_OFFSET, 9973 },
{ 0x334f, G_UNICODE_NOT_PRESENT_OFFSET, 9986 },
{ 0x3350, G_UNICODE_NOT_PRESENT_OFFSET, 9996 },
{ 0x3351, G_UNICODE_NOT_PRESENT_OFFSET, 10006 },
{ 0x3352, G_UNICODE_NOT_PRESENT_OFFSET, 10019 },
{ 0x3353, G_UNICODE_NOT_PRESENT_OFFSET, 10026 },
{ 0x3354, G_UNICODE_NOT_PRESENT_OFFSET, 10039 },
{ 0x3355, G_UNICODE_NOT_PRESENT_OFFSET, 10055 },
{ 0x3356, G_UNICODE_NOT_PRESENT_OFFSET, 10062 },
{ 0x3357, G_UNICODE_NOT_PRESENT_OFFSET, 10081 },
{ 0x3358, G_UNICODE_NOT_PRESENT_OFFSET, 10091 },
{ 0x3359, G_UNICODE_NOT_PRESENT_OFFSET, 10096 },
{ 0x335a, G_UNICODE_NOT_PRESENT_OFFSET, 10101 },
{ 0x335b, G_UNICODE_NOT_PRESENT_OFFSET, 10106 },
{ 0x335c, G_UNICODE_NOT_PRESENT_OFFSET, 10111 },
{ 0x335d, G_UNICODE_NOT_PRESENT_OFFSET, 10116 },
{ 0x335e, G_UNICODE_NOT_PRESENT_OFFSET, 10121 },
{ 0x335f, G_UNICODE_NOT_PRESENT_OFFSET, 10126 },
{ 0x3360, G_UNICODE_NOT_PRESENT_OFFSET, 10131 },
{ 0x3361, G_UNICODE_NOT_PRESENT_OFFSET, 10136 },
{ 0x3362, G_UNICODE_NOT_PRESENT_OFFSET, 10141 },
{ 0x3363, G_UNICODE_NOT_PRESENT_OFFSET, 10147 },
{ 0x3364, G_UNICODE_NOT_PRESENT_OFFSET, 10153 },
{ 0x3365, G_UNICODE_NOT_PRESENT_OFFSET, 10159 },
{ 0x3366, G_UNICODE_NOT_PRESENT_OFFSET, 10165 },
{ 0x3367, G_UNICODE_NOT_PRESENT_OFFSET, 10171 },
{ 0x3368, G_UNICODE_NOT_PRESENT_OFFSET, 10177 },
{ 0x3369, G_UNICODE_NOT_PRESENT_OFFSET, 10183 },
{ 0x336a, G_UNICODE_NOT_PRESENT_OFFSET, 10189 },
{ 0x336b, G_UNICODE_NOT_PRESENT_OFFSET, 10195 },
{ 0x336c, G_UNICODE_NOT_PRESENT_OFFSET, 10201 },
{ 0x336d, G_UNICODE_NOT_PRESENT_OFFSET, 10207 },
{ 0x336e, G_UNICODE_NOT_PRESENT_OFFSET, 10213 },
{ 0x336f, G_UNICODE_NOT_PRESENT_OFFSET, 10219 },
{ 0x3370, G_UNICODE_NOT_PRESENT_OFFSET, 10225 },
{ 0x3371, G_UNICODE_NOT_PRESENT_OFFSET, 10231 },
{ 0x3372, G_UNICODE_NOT_PRESENT_OFFSET, 10235 },
{ 0x3373, G_UNICODE_NOT_PRESENT_OFFSET, 10238 },
{ 0x3374, G_UNICODE_NOT_PRESENT_OFFSET, 10241 },
{ 0x3375, G_UNICODE_NOT_PRESENT_OFFSET, 10245 },
{ 0x3376, G_UNICODE_NOT_PRESENT_OFFSET, 10248 },
{ 0x3377, G_UNICODE_NOT_PRESENT_OFFSET, 10251 },
{ 0x3378, G_UNICODE_NOT_PRESENT_OFFSET, 10254 },
{ 0x3379, G_UNICODE_NOT_PRESENT_OFFSET, 10258 },
{ 0x337a, G_UNICODE_NOT_PRESENT_OFFSET, 10262 },
{ 0x337b, G_UNICODE_NOT_PRESENT_OFFSET, 10265 },
{ 0x337c, G_UNICODE_NOT_PRESENT_OFFSET, 10272 },
{ 0x337d, G_UNICODE_NOT_PRESENT_OFFSET, 10279 },
{ 0x337e, G_UNICODE_NOT_PRESENT_OFFSET, 10286 },
{ 0x337f, G_UNICODE_NOT_PRESENT_OFFSET, 10293 },
{ 0x3380, G_UNICODE_NOT_PRESENT_OFFSET, 10306 },
{ 0x3381, G_UNICODE_NOT_PRESENT_OFFSET, 10309 },
{ 0x3382, G_UNICODE_NOT_PRESENT_OFFSET, 10312 },
{ 0x3383, G_UNICODE_NOT_PRESENT_OFFSET, 10316 },
{ 0x3384, G_UNICODE_NOT_PRESENT_OFFSET, 10319 },
{ 0x3385, G_UNICODE_NOT_PRESENT_OFFSET, 10322 },
{ 0x3386, G_UNICODE_NOT_PRESENT_OFFSET, 10325 },
{ 0x3387, G_UNICODE_NOT_PRESENT_OFFSET, 10328 },
{ 0x3388, G_UNICODE_NOT_PRESENT_OFFSET, 10331 },
{ 0x3389, G_UNICODE_NOT_PRESENT_OFFSET, 10335 },
{ 0x338a, G_UNICODE_NOT_PRESENT_OFFSET, 10340 },
{ 0x338b, G_UNICODE_NOT_PRESENT_OFFSET, 10343 },
{ 0x338c, G_UNICODE_NOT_PRESENT_OFFSET, 10346 },
{ 0x338d, G_UNICODE_NOT_PRESENT_OFFSET, 10350 },
{ 0x338e, G_UNICODE_NOT_PRESENT_OFFSET, 10354 },
{ 0x338f, G_UNICODE_NOT_PRESENT_OFFSET, 10357 },
{ 0x3390, G_UNICODE_NOT_PRESENT_OFFSET, 10360 },
{ 0x3391, G_UNICODE_NOT_PRESENT_OFFSET, 10363 },
{ 0x3392, G_UNICODE_NOT_PRESENT_OFFSET, 10367 },
{ 0x3393, G_UNICODE_NOT_PRESENT_OFFSET, 10371 },
{ 0x3394, G_UNICODE_NOT_PRESENT_OFFSET, 10375 },
{ 0x3395, G_UNICODE_NOT_PRESENT_OFFSET, 10379 },
{ 0x3396, G_UNICODE_NOT_PRESENT_OFFSET, 10383 },
{ 0x3397, G_UNICODE_NOT_PRESENT_OFFSET, 10386 },
{ 0x3398, G_UNICODE_NOT_PRESENT_OFFSET, 10389 },
{ 0x3399, G_UNICODE_NOT_PRESENT_OFFSET, 10392 },
{ 0x339a, G_UNICODE_NOT_PRESENT_OFFSET, 10395 },
{ 0x339b, G_UNICODE_NOT_PRESENT_OFFSET, 10398 },
{ 0x339c, G_UNICODE_NOT_PRESENT_OFFSET, 10402 },
{ 0x339d, G_UNICODE_NOT_PRESENT_OFFSET, 10405 },
{ 0x339e, G_UNICODE_NOT_PRESENT_OFFSET, 10408 },
{ 0x339f, G_UNICODE_NOT_PRESENT_OFFSET, 10411 },
{ 0x33a0, G_UNICODE_NOT_PRESENT_OFFSET, 10415 },
{ 0x33a1, G_UNICODE_NOT_PRESENT_OFFSET, 10419 },
{ 0x33a2, G_UNICODE_NOT_PRESENT_OFFSET, 10422 },
{ 0x33a3, G_UNICODE_NOT_PRESENT_OFFSET, 10426 },
{ 0x33a4, G_UNICODE_NOT_PRESENT_OFFSET, 10430 },
{ 0x33a5, G_UNICODE_NOT_PRESENT_OFFSET, 10434 },
{ 0x33a6, G_UNICODE_NOT_PRESENT_OFFSET, 10437 },
{ 0x33a7, G_UNICODE_NOT_PRESENT_OFFSET, 10441 },
{ 0x33a8, G_UNICODE_NOT_PRESENT_OFFSET, 10447 },
{ 0x33a9, G_UNICODE_NOT_PRESENT_OFFSET, 10454 },
{ 0x33aa, G_UNICODE_NOT_PRESENT_OFFSET, 10457 },
{ 0x33ab, G_UNICODE_NOT_PRESENT_OFFSET, 10461 },
{ 0x33ac, G_UNICODE_NOT_PRESENT_OFFSET, 10465 },
{ 0x33ad, G_UNICODE_NOT_PRESENT_OFFSET, 10469 },
{ 0x33ae, G_UNICODE_NOT_PRESENT_OFFSET, 10473 },
{ 0x33af, G_UNICODE_NOT_PRESENT_OFFSET, 10481 },
{ 0x33b0, G_UNICODE_NOT_PRESENT_OFFSET, 10490 },
{ 0x33b1, G_UNICODE_NOT_PRESENT_OFFSET, 10493 },
{ 0x33b2, G_UNICODE_NOT_PRESENT_OFFSET, 10496 },
{ 0x33b3, G_UNICODE_NOT_PRESENT_OFFSET, 10500 },
{ 0x33b4, G_UNICODE_NOT_PRESENT_OFFSET, 10503 },
{ 0x33b5, G_UNICODE_NOT_PRESENT_OFFSET, 10506 },
{ 0x33b6, G_UNICODE_NOT_PRESENT_OFFSET, 10509 },
{ 0x33b7, G_UNICODE_NOT_PRESENT_OFFSET, 10513 },
{ 0x33b8, G_UNICODE_NOT_PRESENT_OFFSET, 10516 },
{ 0x33b9, G_UNICODE_NOT_PRESENT_OFFSET, 10519 },
{ 0x33ba, G_UNICODE_NOT_PRESENT_OFFSET, 10522 },
{ 0x33bb, G_UNICODE_NOT_PRESENT_OFFSET, 10525 },
{ 0x33bc, G_UNICODE_NOT_PRESENT_OFFSET, 10528 },
{ 0x33bd, G_UNICODE_NOT_PRESENT_OFFSET, 10532 },
{ 0x33be, G_UNICODE_NOT_PRESENT_OFFSET, 10535 },
{ 0x33bf, G_UNICODE_NOT_PRESENT_OFFSET, 10538 },
{ 0x33c0, G_UNICODE_NOT_PRESENT_OFFSET, 10541 },
{ 0x33c1, G_UNICODE_NOT_PRESENT_OFFSET, 10545 },
{ 0x33c2, G_UNICODE_NOT_PRESENT_OFFSET, 10549 },
{ 0x33c3, G_UNICODE_NOT_PRESENT_OFFSET, 10554 },
{ 0x33c4, G_UNICODE_NOT_PRESENT_OFFSET, 10557 },
{ 0x33c5, G_UNICODE_NOT_PRESENT_OFFSET, 10560 },
{ 0x33c6, G_UNICODE_NOT_PRESENT_OFFSET, 10563 },
{ 0x33c7, G_UNICODE_NOT_PRESENT_OFFSET, 10570 },
{ 0x33c8, G_UNICODE_NOT_PRESENT_OFFSET, 10574 },
{ 0x33c9, G_UNICODE_NOT_PRESENT_OFFSET, 10577 },
{ 0x33ca, G_UNICODE_NOT_PRESENT_OFFSET, 10580 },
{ 0x33cb, G_UNICODE_NOT_PRESENT_OFFSET, 10583 },
{ 0x33cc, G_UNICODE_NOT_PRESENT_OFFSET, 10586 },
{ 0x33cd, G_UNICODE_NOT_PRESENT_OFFSET, 10589 },
{ 0x33ce, G_UNICODE_NOT_PRESENT_OFFSET, 10592 },
{ 0x33cf, G_UNICODE_NOT_PRESENT_OFFSET, 10595 },
{ 0x33d0, G_UNICODE_NOT_PRESENT_OFFSET, 10598 },
{ 0x33d1, G_UNICODE_NOT_PRESENT_OFFSET, 10601 },
{ 0x33d2, G_UNICODE_NOT_PRESENT_OFFSET, 10604 },
{ 0x33d3, G_UNICODE_NOT_PRESENT_OFFSET, 10608 },
{ 0x33d4, G_UNICODE_NOT_PRESENT_OFFSET, 10611 },
{ 0x33d5, G_UNICODE_NOT_PRESENT_OFFSET, 10614 },
{ 0x33d6, G_UNICODE_NOT_PRESENT_OFFSET, 10618 },
{ 0x33d7, G_UNICODE_NOT_PRESENT_OFFSET, 10622 },
{ 0x33d8, G_UNICODE_NOT_PRESENT_OFFSET, 10625 },
{ 0x33d9, G_UNICODE_NOT_PRESENT_OFFSET, 10630 },
{ 0x33da, G_UNICODE_NOT_PRESENT_OFFSET, 10634 },
{ 0x33db, G_UNICODE_NOT_PRESENT_OFFSET, 10637 },
{ 0x33dc, G_UNICODE_NOT_PRESENT_OFFSET, 10640 },
{ 0x33dd, G_UNICODE_NOT_PRESENT_OFFSET, 10643 },
{ 0x33de, G_UNICODE_NOT_PRESENT_OFFSET, 10646 },
{ 0x33df, G_UNICODE_NOT_PRESENT_OFFSET, 10652 },
{ 0x33e0, G_UNICODE_NOT_PRESENT_OFFSET, 10658 },
{ 0x33e1, G_UNICODE_NOT_PRESENT_OFFSET, 10663 },
{ 0x33e2, G_UNICODE_NOT_PRESENT_OFFSET, 10668 },
{ 0x33e3, G_UNICODE_NOT_PRESENT_OFFSET, 10673 },
{ 0x33e4, G_UNICODE_NOT_PRESENT_OFFSET, 10678 },
{ 0x33e5, G_UNICODE_NOT_PRESENT_OFFSET, 10683 },
{ 0x33e6, G_UNICODE_NOT_PRESENT_OFFSET, 10688 },
{ 0x33e7, G_UNICODE_NOT_PRESENT_OFFSET, 10693 },
{ 0x33e8, G_UNICODE_NOT_PRESENT_OFFSET, 10698 },
{ 0x33e9, G_UNICODE_NOT_PRESENT_OFFSET, 10703 },
{ 0x33ea, G_UNICODE_NOT_PRESENT_OFFSET, 10709 },
{ 0x33eb, G_UNICODE_NOT_PRESENT_OFFSET, 10715 },
{ 0x33ec, G_UNICODE_NOT_PRESENT_OFFSET, 10721 },
{ 0x33ed, G_UNICODE_NOT_PRESENT_OFFSET, 10727 },
{ 0x33ee, G_UNICODE_NOT_PRESENT_OFFSET, 10733 },
{ 0x33ef, G_UNICODE_NOT_PRESENT_OFFSET, 10739 },
{ 0x33f0, G_UNICODE_NOT_PRESENT_OFFSET, 10745 },
{ 0x33f1, G_UNICODE_NOT_PRESENT_OFFSET, 10751 },
{ 0x33f2, G_UNICODE_NOT_PRESENT_OFFSET, 10757 },
{ 0x33f3, G_UNICODE_NOT_PRESENT_OFFSET, 10763 },
{ 0x33f4, G_UNICODE_NOT_PRESENT_OFFSET, 10769 },
{ 0x33f5, G_UNICODE_NOT_PRESENT_OFFSET, 10775 },
{ 0x33f6, G_UNICODE_NOT_PRESENT_OFFSET, 10781 },
{ 0x33f7, G_UNICODE_NOT_PRESENT_OFFSET, 10787 },
{ 0x33f8, G_UNICODE_NOT_PRESENT_OFFSET, 10793 },
{ 0x33f9, G_UNICODE_NOT_PRESENT_OFFSET, 10799 },
{ 0x33fa, G_UNICODE_NOT_PRESENT_OFFSET, 10805 },
{ 0x33fb, G_UNICODE_NOT_PRESENT_OFFSET, 10811 },
{ 0x33fc, G_UNICODE_NOT_PRESENT_OFFSET, 10817 },
{ 0x33fd, G_UNICODE_NOT_PRESENT_OFFSET, 10823 },
{ 0x33fe, G_UNICODE_NOT_PRESENT_OFFSET, 10829 },
{ 0x33ff, G_UNICODE_NOT_PRESENT_OFFSET, 10835 },
{ 0xf900, 10839, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf901, 10843, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf902, 6788, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf903, 10847, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf904, 10851, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf905, 10855, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf906, 10859, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf907, 7004, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf908, 7004, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf909, 10863, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf90a, 6820, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf90b, 10867, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf90c, 10871, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf90d, 10875, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf90e, 10879, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf90f, 10883, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf910, 10887, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf911, 10891, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf912, 10895, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf913, 10899, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf914, 10903, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf915, 10907, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf916, 10911, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf917, 10915, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf918, 10919, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf919, 10923, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf91a, 10927, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf91b, 10931, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf91c, 10935, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf91d, 10939, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf91e, 10943, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf91f, 10947, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf920, 10951, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf921, 10955, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf922, 10959, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf923, 10963, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf924, 10967, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf925, 10971, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf926, 10975, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf927, 10979, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf928, 10983, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf929, 10987, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf92a, 10991, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf92b, 10995, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf92c, 10999, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf92d, 11003, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf92e, 11007, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf92f, 11011, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf930, 11015, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf931, 11019, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf932, 11023, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf933, 11027, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf934, 6652, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf935, 11031, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf936, 11035, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf937, 11039, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf938, 11043, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf939, 11047, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf93a, 11051, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf93b, 11055, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf93c, 11059, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf93d, 11063, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf93e, 11067, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf93f, 11071, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf940, 6944, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf941, 11075, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf942, 11079, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf943, 11083, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf944, 11087, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf945, 11091, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf946, 11095, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf947, 11099, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf948, 11103, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf949, 11107, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf94a, 11111, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf94b, 11115, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf94c, 11119, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf94d, 11123, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf94e, 11127, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf94f, 11131, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf950, 11135, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf951, 11139, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf952, 11143, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf953, 11147, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf954, 11151, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf955, 11155, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf956, 11159, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf957, 11163, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf958, 11167, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf959, 11171, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf95a, 11175, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf95b, 11179, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf95c, 10903, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf95d, 11183, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf95e, 11187, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf95f, 11191, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf960, 11195, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf961, 11199, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf962, 11203, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf963, 11207, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf964, 11211, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf965, 11215, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf966, 11219, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf967, 11223, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf968, 11227, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf969, 11231, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf96a, 11235, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf96b, 11239, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf96c, 11243, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf96d, 11247, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf96e, 11251, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf96f, 11255, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf970, 11259, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf971, 6796, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf972, 11263, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf973, 11267, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf974, 11271, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf975, 11275, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf976, 11279, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf977, 11283, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf978, 11287, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf979, 11291, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf97a, 11295, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf97b, 11299, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf97c, 11303, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf97d, 11307, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf97e, 11311, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf97f, 11315, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf980, 11319, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf981, 6304, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf982, 11323, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf983, 11327, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf984, 11331, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf985, 11335, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf986, 11339, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf987, 11343, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf988, 11347, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf989, 11351, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf98a, 6228, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf98b, 11355, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf98c, 11359, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf98d, 11363, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf98e, 11367, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf98f, 11371, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf990, 11375, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf991, 11379, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf992, 11383, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf993, 11387, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf994, 11391, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf995, 11395, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf996, 11399, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf997, 11403, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf998, 11407, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf999, 11411, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf99a, 11415, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf99b, 11419, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf99c, 11423, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf99d, 11427, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf99e, 11431, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf99f, 11435, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9a0, 11439, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9a1, 11255, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9a2, 11443, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9a3, 11447, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9a4, 11451, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9a5, 11455, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9a6, 11459, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9a7, 11463, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9a8, 11467, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9a9, 11471, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9aa, 11191, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9ab, 11475, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9ac, 11479, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9ad, 11483, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9ae, 11487, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9af, 11491, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9b0, 11495, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9b1, 11499, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9b2, 11503, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9b3, 11507, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9b4, 11511, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9b5, 11515, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9b6, 11519, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9b7, 11523, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9b8, 11527, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9b9, 11531, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9ba, 11535, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9bb, 11539, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9bc, 11543, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9bd, 11547, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9be, 11551, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9bf, 10903, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9c0, 11555, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9c1, 11559, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9c2, 11563, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9c3, 11567, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9c4, 7000, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9c5, 11571, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9c6, 11575, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9c7, 11579, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9c8, 11583, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9c9, 11587, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9ca, 11591, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9cb, 11595, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9cc, 11599, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9cd, 11603, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9ce, 11607, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9cf, 11611, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9d0, 11615, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9d1, 8525, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9d2, 11619, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9d3, 11623, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9d4, 11627, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9d5, 11631, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9d6, 11635, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9d7, 11639, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9d8, 11643, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9d9, 11647, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9da, 11651, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9db, 11199, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9dc, 11655, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9dd, 11659, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9de, 11663, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9df, 11667, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9e0, 11671, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9e1, 11675, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9e2, 11679, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9e3, 11683, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9e4, 11687, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9e5, 11691, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9e6, 11695, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9e7, 11699, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9e8, 11703, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9e9, 6816, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9ea, 11707, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9eb, 11711, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9ec, 11715, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9ed, 11719, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9ee, 11723, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9ef, 11727, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9f0, 11731, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9f1, 11735, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9f2, 11739, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9f3, 11743, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9f4, 11747, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9f5, 11751, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9f6, 11755, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9f7, 6620, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9f8, 11759, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9f9, 11763, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9fa, 11767, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9fb, 11771, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9fc, 11775, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9fd, 11779, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9fe, 11783, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xf9ff, 11787, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa00, 11791, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa01, 11795, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa02, 11799, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa03, 11803, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa04, 11807, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa05, 11811, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa06, 11815, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa07, 11819, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa08, 6728, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa09, 11823, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa0a, 6740, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa0b, 11827, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa0c, 11831, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa0d, 11835, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa10, 11839, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa12, 11843, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa15, 11847, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa16, 11851, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa17, 11855, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa18, 11859, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa19, 11863, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa1a, 11867, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa1b, 11871, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa1c, 11875, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa1d, 11879, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa1e, 6648, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa20, 11883, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa22, 11887, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa25, 11891, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa26, 11895, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa2a, 11899, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa2b, 11903, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa2c, 11907, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa2d, 11911, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa30, 11915, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa31, 11919, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa32, 11923, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa33, 11927, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa34, 11931, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa35, 11935, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa36, 11939, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa37, 11943, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa38, 11947, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa39, 11951, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa3a, 11955, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa3b, 11959, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa3c, 6332, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa3d, 11963, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa3e, 11967, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa3f, 11971, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa40, 11975, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa41, 11979, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa42, 11983, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa43, 11987, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa44, 11991, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa45, 11995, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa46, 11999, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa47, 12003, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa48, 12007, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa49, 12011, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa4a, 12015, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa4b, 12019, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa4c, 8545, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa4d, 12023, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa4e, 12027, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa4f, 12031, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa50, 12035, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa51, 8561, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa52, 12039, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa53, 12043, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa54, 12047, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa55, 12051, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa56, 12055, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa57, 11399, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa58, 12059, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa59, 12063, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa5a, 12067, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa5b, 12071, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa5c, 12075, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa5d, 12079, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa5e, 12079, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa5f, 12083, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa60, 12087, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa61, 12091, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa62, 12095, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa63, 12099, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa64, 12103, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa65, 12107, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa66, 12111, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa67, 11891, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa68, 12115, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa69, 12119, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa6a, 12123, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa70, 12127, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa71, 12131, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa72, 12135, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa73, 12139, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa74, 12143, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa75, 12147, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa76, 12151, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa77, 12155, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa78, 11939, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa79, 12159, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa7a, 12163, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa7b, 12167, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa7c, 11839, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa7d, 12171, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa7e, 12175, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa7f, 12179, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa80, 12183, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa81, 12187, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa82, 12191, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa83, 12195, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa84, 12199, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa85, 12203, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa86, 12207, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa87, 12211, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa88, 12215, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa89, 11971, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa8a, 12219, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa8b, 11975, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa8c, 12223, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa8d, 12227, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa8e, 12231, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa8f, 12235, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa90, 12239, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa91, 11843, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa92, 10987, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa93, 12243, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa94, 12247, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa95, 6464, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa96, 11259, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa97, 11591, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa98, 12251, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa99, 12255, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa9a, 12003, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa9b, 12259, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa9c, 12007, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa9d, 12263, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa9e, 12267, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfa9f, 12271, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfaa0, 11851, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfaa1, 12275, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfaa2, 12279, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfaa3, 12283, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfaa4, 12287, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfaa5, 12291, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfaa6, 11855, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfaa7, 12295, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfaa8, 12299, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfaa9, 12303, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfaaa, 12307, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfaab, 12311, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfaac, 12315, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfaad, 12055, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfaae, 12319, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfaaf, 12323, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfab0, 11399, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfab1, 12327, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfab2, 12071, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfab3, 12331, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfab4, 12335, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfab5, 12339, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfab6, 12343, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfab7, 12347, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfab8, 12091, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfab9, 12351, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfaba, 11887, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfabb, 12355, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfabc, 12095, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfabd, 11183, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfabe, 12359, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfabf, 12099, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfac0, 12363, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfac1, 12107, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfac2, 12367, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfac3, 12371, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfac4, 12375, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfac5, 12379, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfac6, 12383, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfac7, 12115, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfac8, 11875, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfac9, 12387, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfaca, 12119, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfacb, 12391, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfacc, 12123, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfacd, 12395, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xface, 7004, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfacf, 12399, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfad0, 12404, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfad1, 12409, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfad2, 12414, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfad3, 12418, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfad4, 12422, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfad5, 12426, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfad6, 12431, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfad7, 12436, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfad8, 12441, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfad9, 12445, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb00, G_UNICODE_NOT_PRESENT_OFFSET, 12449 },
{ 0xfb01, G_UNICODE_NOT_PRESENT_OFFSET, 12452 },
{ 0xfb02, G_UNICODE_NOT_PRESENT_OFFSET, 12455 },
{ 0xfb03, G_UNICODE_NOT_PRESENT_OFFSET, 12458 },
{ 0xfb04, G_UNICODE_NOT_PRESENT_OFFSET, 12462 },
{ 0xfb05, G_UNICODE_NOT_PRESENT_OFFSET, 12466 },
{ 0xfb06, G_UNICODE_NOT_PRESENT_OFFSET, 12466 },
{ 0xfb13, G_UNICODE_NOT_PRESENT_OFFSET, 12469 },
{ 0xfb14, G_UNICODE_NOT_PRESENT_OFFSET, 12474 },
{ 0xfb15, G_UNICODE_NOT_PRESENT_OFFSET, 12479 },
{ 0xfb16, G_UNICODE_NOT_PRESENT_OFFSET, 12484 },
{ 0xfb17, G_UNICODE_NOT_PRESENT_OFFSET, 12489 },
{ 0xfb1d, 12494, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb1f, 12499, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb20, G_UNICODE_NOT_PRESENT_OFFSET, 12504 },
{ 0xfb21, G_UNICODE_NOT_PRESENT_OFFSET, 5338 },
{ 0xfb22, G_UNICODE_NOT_PRESENT_OFFSET, 5347 },
{ 0xfb23, G_UNICODE_NOT_PRESENT_OFFSET, 12507 },
{ 0xfb24, G_UNICODE_NOT_PRESENT_OFFSET, 12510 },
{ 0xfb25, G_UNICODE_NOT_PRESENT_OFFSET, 12513 },
{ 0xfb26, G_UNICODE_NOT_PRESENT_OFFSET, 12516 },
{ 0xfb27, G_UNICODE_NOT_PRESENT_OFFSET, 12519 },
{ 0xfb28, G_UNICODE_NOT_PRESENT_OFFSET, 12522 },
{ 0xfb29, G_UNICODE_NOT_PRESENT_OFFSET, 5267 },
{ 0xfb2a, 12525, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb2b, 12530, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb2c, 12535, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb2d, 12542, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb2e, 12549, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb2f, 12554, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb30, 12559, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb31, 12564, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb32, 12569, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb33, 12574, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb34, 12579, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb35, 12584, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb36, 12589, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb38, 12594, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb39, 12599, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb3a, 12604, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb3b, 12609, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb3c, 12614, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb3e, 12619, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb40, 12624, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb41, 12629, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb43, 12634, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb44, 12639, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb46, 12644, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb47, 12649, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb48, 12654, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb49, 12659, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb4a, 12664, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb4b, 12669, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb4c, 12674, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb4d, 12679, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb4e, 12684, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0xfb4f, G_UNICODE_NOT_PRESENT_OFFSET, 12689 },
{ 0xfb50, G_UNICODE_NOT_PRESENT_OFFSET, 12694 },
{ 0xfb51, G_UNICODE_NOT_PRESENT_OFFSET, 12694 },
{ 0xfb52, G_UNICODE_NOT_PRESENT_OFFSET, 12697 },
{ 0xfb53, G_UNICODE_NOT_PRESENT_OFFSET, 12697 },
{ 0xfb54, G_UNICODE_NOT_PRESENT_OFFSET, 12697 },
{ 0xfb55, G_UNICODE_NOT_PRESENT_OFFSET, 12697 },
{ 0xfb56, G_UNICODE_NOT_PRESENT_OFFSET, 12700 },
{ 0xfb57, G_UNICODE_NOT_PRESENT_OFFSET, 12700 },
{ 0xfb58, G_UNICODE_NOT_PRESENT_OFFSET, 12700 },
{ 0xfb59, G_UNICODE_NOT_PRESENT_OFFSET, 12700 },
{ 0xfb5a, G_UNICODE_NOT_PRESENT_OFFSET, 12703 },
{ 0xfb5b, G_UNICODE_NOT_PRESENT_OFFSET, 12703 },
{ 0xfb5c, G_UNICODE_NOT_PRESENT_OFFSET, 12703 },
{ 0xfb5d, G_UNICODE_NOT_PRESENT_OFFSET, 12703 },
{ 0xfb5e, G_UNICODE_NOT_PRESENT_OFFSET, 12706 },
{ 0xfb5f, G_UNICODE_NOT_PRESENT_OFFSET, 12706 },
{ 0xfb60, G_UNICODE_NOT_PRESENT_OFFSET, 12706 },
{ 0xfb61, G_UNICODE_NOT_PRESENT_OFFSET, 12706 },
{ 0xfb62, G_UNICODE_NOT_PRESENT_OFFSET, 12709 },
{ 0xfb63, G_UNICODE_NOT_PRESENT_OFFSET, 12709 },
{ 0xfb64, G_UNICODE_NOT_PRESENT_OFFSET, 12709 },
{ 0xfb65, G_UNICODE_NOT_PRESENT_OFFSET, 12709 },
{ 0xfb66, G_UNICODE_NOT_PRESENT_OFFSET, 12712 },
{ 0xfb67, G_UNICODE_NOT_PRESENT_OFFSET, 12712 },
{ 0xfb68, G_UNICODE_NOT_PRESENT_OFFSET, 12712 },
{ 0xfb69, G_UNICODE_NOT_PRESENT_OFFSET, 12712 },
{ 0xfb6a, G_UNICODE_NOT_PRESENT_OFFSET, 12715 },
{ 0xfb6b, G_UNICODE_NOT_PRESENT_OFFSET, 12715 },
{ 0xfb6c, G_UNICODE_NOT_PRESENT_OFFSET, 12715 },
{ 0xfb6d, G_UNICODE_NOT_PRESENT_OFFSET, 12715 },
{ 0xfb6e, G_UNICODE_NOT_PRESENT_OFFSET, 12718 },
{ 0xfb6f, G_UNICODE_NOT_PRESENT_OFFSET, 12718 },
{ 0xfb70, G_UNICODE_NOT_PRESENT_OFFSET, 12718 },
{ 0xfb71, G_UNICODE_NOT_PRESENT_OFFSET, 12718 },
{ 0xfb72, G_UNICODE_NOT_PRESENT_OFFSET, 12721 },
{ 0xfb73, G_UNICODE_NOT_PRESENT_OFFSET, 12721 },
{ 0xfb74, G_UNICODE_NOT_PRESENT_OFFSET, 12721 },
{ 0xfb75, G_UNICODE_NOT_PRESENT_OFFSET, 12721 },
{ 0xfb76, G_UNICODE_NOT_PRESENT_OFFSET, 12724 },
{ 0xfb77, G_UNICODE_NOT_PRESENT_OFFSET, 12724 },
{ 0xfb78, G_UNICODE_NOT_PRESENT_OFFSET, 12724 },
{ 0xfb79, G_UNICODE_NOT_PRESENT_OFFSET, 12724 },
{ 0xfb7a, G_UNICODE_NOT_PRESENT_OFFSET, 12727 },
{ 0xfb7b, G_UNICODE_NOT_PRESENT_OFFSET, 12727 },
{ 0xfb7c, G_UNICODE_NOT_PRESENT_OFFSET, 12727 },
{ 0xfb7d, G_UNICODE_NOT_PRESENT_OFFSET, 12727 },
{ 0xfb7e, G_UNICODE_NOT_PRESENT_OFFSET, 12730 },
{ 0xfb7f, G_UNICODE_NOT_PRESENT_OFFSET, 12730 },
{ 0xfb80, G_UNICODE_NOT_PRESENT_OFFSET, 12730 },
{ 0xfb81, G_UNICODE_NOT_PRESENT_OFFSET, 12730 },
{ 0xfb82, G_UNICODE_NOT_PRESENT_OFFSET, 12733 },
{ 0xfb83, G_UNICODE_NOT_PRESENT_OFFSET, 12733 },
{ 0xfb84, G_UNICODE_NOT_PRESENT_OFFSET, 12736 },
{ 0xfb85, G_UNICODE_NOT_PRESENT_OFFSET, 12736 },
{ 0xfb86, G_UNICODE_NOT_PRESENT_OFFSET, 12739 },
{ 0xfb87, G_UNICODE_NOT_PRESENT_OFFSET, 12739 },
{ 0xfb88, G_UNICODE_NOT_PRESENT_OFFSET, 12742 },
{ 0xfb89, G_UNICODE_NOT_PRESENT_OFFSET, 12742 },
{ 0xfb8a, G_UNICODE_NOT_PRESENT_OFFSET, 12745 },
{ 0xfb8b, G_UNICODE_NOT_PRESENT_OFFSET, 12745 },
{ 0xfb8c, G_UNICODE_NOT_PRESENT_OFFSET, 12748 },
{ 0xfb8d, G_UNICODE_NOT_PRESENT_OFFSET, 12748 },
{ 0xfb8e, G_UNICODE_NOT_PRESENT_OFFSET, 12751 },
{ 0xfb8f, G_UNICODE_NOT_PRESENT_OFFSET, 12751 },
{ 0xfb90, G_UNICODE_NOT_PRESENT_OFFSET, 12751 },
{ 0xfb91, G_UNICODE_NOT_PRESENT_OFFSET, 12751 },
{ 0xfb92, G_UNICODE_NOT_PRESENT_OFFSET, 12754 },
{ 0xfb93, G_UNICODE_NOT_PRESENT_OFFSET, 12754 },
{ 0xfb94, G_UNICODE_NOT_PRESENT_OFFSET, 12754 },
{ 0xfb95, G_UNICODE_NOT_PRESENT_OFFSET, 12754 },
{ 0xfb96, G_UNICODE_NOT_PRESENT_OFFSET, 12757 },
{ 0xfb97, G_UNICODE_NOT_PRESENT_OFFSET, 12757 },
{ 0xfb98, G_UNICODE_NOT_PRESENT_OFFSET, 12757 },
{ 0xfb99, G_UNICODE_NOT_PRESENT_OFFSET, 12757 },
{ 0xfb9a, G_UNICODE_NOT_PRESENT_OFFSET, 12760 },
{ 0xfb9b, G_UNICODE_NOT_PRESENT_OFFSET, 12760 },
{ 0xfb9c, G_UNICODE_NOT_PRESENT_OFFSET, 12760 },
{ 0xfb9d, G_UNICODE_NOT_PRESENT_OFFSET, 12760 },
{ 0xfb9e, G_UNICODE_NOT_PRESENT_OFFSET, 12763 },
{ 0xfb9f, G_UNICODE_NOT_PRESENT_OFFSET, 12763 },
{ 0xfba0, G_UNICODE_NOT_PRESENT_OFFSET, 12766 },
{ 0xfba1, G_UNICODE_NOT_PRESENT_OFFSET, 12766 },
{ 0xfba2, G_UNICODE_NOT_PRESENT_OFFSET, 12766 },
{ 0xfba3, G_UNICODE_NOT_PRESENT_OFFSET, 12766 },
{ 0xfba4, G_UNICODE_NOT_PRESENT_OFFSET, 1721 },
{ 0xfba5, G_UNICODE_NOT_PRESENT_OFFSET, 1721 },
{ 0xfba6, G_UNICODE_NOT_PRESENT_OFFSET, 12769 },
{ 0xfba7, G_UNICODE_NOT_PRESENT_OFFSET, 12769 },
{ 0xfba8, G_UNICODE_NOT_PRESENT_OFFSET, 12769 },
{ 0xfba9, G_UNICODE_NOT_PRESENT_OFFSET, 12769 },
{ 0xfbaa, G_UNICODE_NOT_PRESENT_OFFSET, 12772 },
{ 0xfbab, G_UNICODE_NOT_PRESENT_OFFSET, 12772 },
{ 0xfbac, G_UNICODE_NOT_PRESENT_OFFSET, 12772 },
{ 0xfbad, G_UNICODE_NOT_PRESENT_OFFSET, 12772 },
{ 0xfbae, G_UNICODE_NOT_PRESENT_OFFSET, 12775 },
{ 0xfbaf, G_UNICODE_NOT_PRESENT_OFFSET, 12775 },
{ 0xfbb0, G_UNICODE_NOT_PRESENT_OFFSET, 1731 },
{ 0xfbb1, G_UNICODE_NOT_PRESENT_OFFSET, 1731 },
{ 0xfbd3, G_UNICODE_NOT_PRESENT_OFFSET, 12778 },
{ 0xfbd4, G_UNICODE_NOT_PRESENT_OFFSET, 12778 },
{ 0xfbd5, G_UNICODE_NOT_PRESENT_OFFSET, 12778 },
{ 0xfbd6, G_UNICODE_NOT_PRESENT_OFFSET, 12778 },
{ 0xfbd7, G_UNICODE_NOT_PRESENT_OFFSET, 12781 },
{ 0xfbd8, G_UNICODE_NOT_PRESENT_OFFSET, 12781 },
{ 0xfbd9, G_UNICODE_NOT_PRESENT_OFFSET, 12784 },
{ 0xfbda, G_UNICODE_NOT_PRESENT_OFFSET, 12784 },
{ 0xfbdb, G_UNICODE_NOT_PRESENT_OFFSET, 12787 },
{ 0xfbdc, G_UNICODE_NOT_PRESENT_OFFSET, 12787 },
{ 0xfbdd, G_UNICODE_NOT_PRESENT_OFFSET, 1711 },
{ 0xfbde, G_UNICODE_NOT_PRESENT_OFFSET, 12790 },
{ 0xfbdf, G_UNICODE_NOT_PRESENT_OFFSET, 12790 },
{ 0xfbe0, G_UNICODE_NOT_PRESENT_OFFSET, 12793 },
{ 0xfbe1, G_UNICODE_NOT_PRESENT_OFFSET, 12793 },
{ 0xfbe2, G_UNICODE_NOT_PRESENT_OFFSET, 12796 },
{ 0xfbe3, G_UNICODE_NOT_PRESENT_OFFSET, 12796 },
{ 0xfbe4, G_UNICODE_NOT_PRESENT_OFFSET, 12799 },
{ 0xfbe5, G_UNICODE_NOT_PRESENT_OFFSET, 12799 },
{ 0xfbe6, G_UNICODE_NOT_PRESENT_OFFSET, 12799 },
{ 0xfbe7, G_UNICODE_NOT_PRESENT_OFFSET, 12799 },
{ 0xfbe8, G_UNICODE_NOT_PRESENT_OFFSET, 12802 },
{ 0xfbe9, G_UNICODE_NOT_PRESENT_OFFSET, 12802 },
{ 0xfbea, G_UNICODE_NOT_PRESENT_OFFSET, 12805 },
{ 0xfbeb, G_UNICODE_NOT_PRESENT_OFFSET, 12805 },
{ 0xfbec, G_UNICODE_NOT_PRESENT_OFFSET, 12812 },
{ 0xfbed, G_UNICODE_NOT_PRESENT_OFFSET, 12812 },
{ 0xfbee, G_UNICODE_NOT_PRESENT_OFFSET, 12819 },
{ 0xfbef, G_UNICODE_NOT_PRESENT_OFFSET, 12819 },
{ 0xfbf0, G_UNICODE_NOT_PRESENT_OFFSET, 12826 },
{ 0xfbf1, G_UNICODE_NOT_PRESENT_OFFSET, 12826 },
{ 0xfbf2, G_UNICODE_NOT_PRESENT_OFFSET, 12833 },
{ 0xfbf3, G_UNICODE_NOT_PRESENT_OFFSET, 12833 },
{ 0xfbf4, G_UNICODE_NOT_PRESENT_OFFSET, 12840 },
{ 0xfbf5, G_UNICODE_NOT_PRESENT_OFFSET, 12840 },
{ 0xfbf6, G_UNICODE_NOT_PRESENT_OFFSET, 12847 },
{ 0xfbf7, G_UNICODE_NOT_PRESENT_OFFSET, 12847 },
{ 0xfbf8, G_UNICODE_NOT_PRESENT_OFFSET, 12847 },
{ 0xfbf9, G_UNICODE_NOT_PRESENT_OFFSET, 12854 },
{ 0xfbfa, G_UNICODE_NOT_PRESENT_OFFSET, 12854 },
{ 0xfbfb, G_UNICODE_NOT_PRESENT_OFFSET, 12854 },
{ 0xfbfc, G_UNICODE_NOT_PRESENT_OFFSET, 12861 },
{ 0xfbfd, G_UNICODE_NOT_PRESENT_OFFSET, 12861 },
{ 0xfbfe, G_UNICODE_NOT_PRESENT_OFFSET, 12861 },
{ 0xfbff, G_UNICODE_NOT_PRESENT_OFFSET, 12861 },
{ 0xfc00, G_UNICODE_NOT_PRESENT_OFFSET, 12864 },
{ 0xfc01, G_UNICODE_NOT_PRESENT_OFFSET, 12871 },
{ 0xfc02, G_UNICODE_NOT_PRESENT_OFFSET, 12878 },
{ 0xfc03, G_UNICODE_NOT_PRESENT_OFFSET, 12854 },
{ 0xfc04, G_UNICODE_NOT_PRESENT_OFFSET, 12885 },
{ 0xfc05, G_UNICODE_NOT_PRESENT_OFFSET, 12892 },
{ 0xfc06, G_UNICODE_NOT_PRESENT_OFFSET, 12897 },
{ 0xfc07, G_UNICODE_NOT_PRESENT_OFFSET, 12902 },
{ 0xfc08, G_UNICODE_NOT_PRESENT_OFFSET, 12907 },
{ 0xfc09, G_UNICODE_NOT_PRESENT_OFFSET, 12912 },
{ 0xfc0a, G_UNICODE_NOT_PRESENT_OFFSET, 12917 },
{ 0xfc0b, G_UNICODE_NOT_PRESENT_OFFSET, 12922 },
{ 0xfc0c, G_UNICODE_NOT_PRESENT_OFFSET, 12927 },
{ 0xfc0d, G_UNICODE_NOT_PRESENT_OFFSET, 12932 },
{ 0xfc0e, G_UNICODE_NOT_PRESENT_OFFSET, 12937 },
{ 0xfc0f, G_UNICODE_NOT_PRESENT_OFFSET, 12942 },
{ 0xfc10, G_UNICODE_NOT_PRESENT_OFFSET, 12947 },
{ 0xfc11, G_UNICODE_NOT_PRESENT_OFFSET, 12952 },
{ 0xfc12, G_UNICODE_NOT_PRESENT_OFFSET, 12957 },
{ 0xfc13, G_UNICODE_NOT_PRESENT_OFFSET, 12962 },
{ 0xfc14, G_UNICODE_NOT_PRESENT_OFFSET, 12967 },
{ 0xfc15, G_UNICODE_NOT_PRESENT_OFFSET, 12972 },
{ 0xfc16, G_UNICODE_NOT_PRESENT_OFFSET, 12977 },
{ 0xfc17, G_UNICODE_NOT_PRESENT_OFFSET, 12982 },
{ 0xfc18, G_UNICODE_NOT_PRESENT_OFFSET, 12987 },
{ 0xfc19, G_UNICODE_NOT_PRESENT_OFFSET, 12992 },
{ 0xfc1a, G_UNICODE_NOT_PRESENT_OFFSET, 12997 },
{ 0xfc1b, G_UNICODE_NOT_PRESENT_OFFSET, 13002 },
{ 0xfc1c, G_UNICODE_NOT_PRESENT_OFFSET, 13007 },
{ 0xfc1d, G_UNICODE_NOT_PRESENT_OFFSET, 13012 },
{ 0xfc1e, G_UNICODE_NOT_PRESENT_OFFSET, 13017 },
{ 0xfc1f, G_UNICODE_NOT_PRESENT_OFFSET, 13022 },
{ 0xfc20, G_UNICODE_NOT_PRESENT_OFFSET, 13027 },
{ 0xfc21, G_UNICODE_NOT_PRESENT_OFFSET, 13032 },
{ 0xfc22, G_UNICODE_NOT_PRESENT_OFFSET, 13037 },
{ 0xfc23, G_UNICODE_NOT_PRESENT_OFFSET, 13042 },
{ 0xfc24, G_UNICODE_NOT_PRESENT_OFFSET, 13047 },
{ 0xfc25, G_UNICODE_NOT_PRESENT_OFFSET, 13052 },
{ 0xfc26, G_UNICODE_NOT_PRESENT_OFFSET, 13057 },
{ 0xfc27, G_UNICODE_NOT_PRESENT_OFFSET, 13062 },
{ 0xfc28, G_UNICODE_NOT_PRESENT_OFFSET, 13067 },
{ 0xfc29, G_UNICODE_NOT_PRESENT_OFFSET, 13072 },
{ 0xfc2a, G_UNICODE_NOT_PRESENT_OFFSET, 13077 },
{ 0xfc2b, G_UNICODE_NOT_PRESENT_OFFSET, 13082 },
{ 0xfc2c, G_UNICODE_NOT_PRESENT_OFFSET, 13087 },
{ 0xfc2d, G_UNICODE_NOT_PRESENT_OFFSET, 13092 },
{ 0xfc2e, G_UNICODE_NOT_PRESENT_OFFSET, 13097 },
{ 0xfc2f, G_UNICODE_NOT_PRESENT_OFFSET, 13102 },
{ 0xfc30, G_UNICODE_NOT_PRESENT_OFFSET, 13107 },
{ 0xfc31, G_UNICODE_NOT_PRESENT_OFFSET, 13112 },
{ 0xfc32, G_UNICODE_NOT_PRESENT_OFFSET, 13117 },
{ 0xfc33, G_UNICODE_NOT_PRESENT_OFFSET, 13122 },
{ 0xfc34, G_UNICODE_NOT_PRESENT_OFFSET, 13127 },
{ 0xfc35, G_UNICODE_NOT_PRESENT_OFFSET, 13132 },
{ 0xfc36, G_UNICODE_NOT_PRESENT_OFFSET, 13137 },
{ 0xfc37, G_UNICODE_NOT_PRESENT_OFFSET, 13142 },
{ 0xfc38, G_UNICODE_NOT_PRESENT_OFFSET, 13147 },
{ 0xfc39, G_UNICODE_NOT_PRESENT_OFFSET, 13152 },
{ 0xfc3a, G_UNICODE_NOT_PRESENT_OFFSET, 13157 },
{ 0xfc3b, G_UNICODE_NOT_PRESENT_OFFSET, 13162 },
{ 0xfc3c, G_UNICODE_NOT_PRESENT_OFFSET, 13167 },
{ 0xfc3d, G_UNICODE_NOT_PRESENT_OFFSET, 13172 },
{ 0xfc3e, G_UNICODE_NOT_PRESENT_OFFSET, 13177 },
{ 0xfc3f, G_UNICODE_NOT_PRESENT_OFFSET, 13182 },
{ 0xfc40, G_UNICODE_NOT_PRESENT_OFFSET, 13187 },
{ 0xfc41, G_UNICODE_NOT_PRESENT_OFFSET, 13192 },
{ 0xfc42, G_UNICODE_NOT_PRESENT_OFFSET, 13197 },
{ 0xfc43, G_UNICODE_NOT_PRESENT_OFFSET, 13202 },
{ 0xfc44, G_UNICODE_NOT_PRESENT_OFFSET, 13207 },
{ 0xfc45, G_UNICODE_NOT_PRESENT_OFFSET, 13212 },
{ 0xfc46, G_UNICODE_NOT_PRESENT_OFFSET, 13217 },
{ 0xfc47, G_UNICODE_NOT_PRESENT_OFFSET, 13222 },
{ 0xfc48, G_UNICODE_NOT_PRESENT_OFFSET, 13227 },
{ 0xfc49, G_UNICODE_NOT_PRESENT_OFFSET, 13232 },
{ 0xfc4a, G_UNICODE_NOT_PRESENT_OFFSET, 13237 },
{ 0xfc4b, G_UNICODE_NOT_PRESENT_OFFSET, 13242 },
{ 0xfc4c, G_UNICODE_NOT_PRESENT_OFFSET, 13247 },
{ 0xfc4d, G_UNICODE_NOT_PRESENT_OFFSET, 13252 },
{ 0xfc4e, G_UNICODE_NOT_PRESENT_OFFSET, 13257 },
{ 0xfc4f, G_UNICODE_NOT_PRESENT_OFFSET, 13262 },
{ 0xfc50, G_UNICODE_NOT_PRESENT_OFFSET, 13267 },
{ 0xfc51, G_UNICODE_NOT_PRESENT_OFFSET, 13272 },
{ 0xfc52, G_UNICODE_NOT_PRESENT_OFFSET, 13277 },
{ 0xfc53, G_UNICODE_NOT_PRESENT_OFFSET, 13282 },
{ 0xfc54, G_UNICODE_NOT_PRESENT_OFFSET, 13287 },
{ 0xfc55, G_UNICODE_NOT_PRESENT_OFFSET, 13292 },
{ 0xfc56, G_UNICODE_NOT_PRESENT_OFFSET, 13297 },
{ 0xfc57, G_UNICODE_NOT_PRESENT_OFFSET, 13302 },
{ 0xfc58, G_UNICODE_NOT_PRESENT_OFFSET, 13307 },
{ 0xfc59, G_UNICODE_NOT_PRESENT_OFFSET, 13312 },
{ 0xfc5a, G_UNICODE_NOT_PRESENT_OFFSET, 13317 },
{ 0xfc5b, G_UNICODE_NOT_PRESENT_OFFSET, 13322 },
{ 0xfc5c, G_UNICODE_NOT_PRESENT_OFFSET, 13327 },
{ 0xfc5d, G_UNICODE_NOT_PRESENT_OFFSET, 13332 },
{ 0xfc5e, G_UNICODE_NOT_PRESENT_OFFSET, 13337 },
{ 0xfc5f, G_UNICODE_NOT_PRESENT_OFFSET, 13343 },
{ 0xfc60, G_UNICODE_NOT_PRESENT_OFFSET, 13349 },
{ 0xfc61, G_UNICODE_NOT_PRESENT_OFFSET, 13355 },
{ 0xfc62, G_UNICODE_NOT_PRESENT_OFFSET, 13361 },
{ 0xfc63, G_UNICODE_NOT_PRESENT_OFFSET, 13367 },
{ 0xfc64, G_UNICODE_NOT_PRESENT_OFFSET, 13373 },
{ 0xfc65, G_UNICODE_NOT_PRESENT_OFFSET, 13380 },
{ 0xfc66, G_UNICODE_NOT_PRESENT_OFFSET, 12878 },
{ 0xfc67, G_UNICODE_NOT_PRESENT_OFFSET, 13387 },
{ 0xfc68, G_UNICODE_NOT_PRESENT_OFFSET, 12854 },
{ 0xfc69, G_UNICODE_NOT_PRESENT_OFFSET, 12885 },
{ 0xfc6a, G_UNICODE_NOT_PRESENT_OFFSET, 13394 },
{ 0xfc6b, G_UNICODE_NOT_PRESENT_OFFSET, 13399 },
{ 0xfc6c, G_UNICODE_NOT_PRESENT_OFFSET, 12907 },
{ 0xfc6d, G_UNICODE_NOT_PRESENT_OFFSET, 13404 },
{ 0xfc6e, G_UNICODE_NOT_PRESENT_OFFSET, 12912 },
{ 0xfc6f, G_UNICODE_NOT_PRESENT_OFFSET, 12917 },
{ 0xfc70, G_UNICODE_NOT_PRESENT_OFFSET, 13409 },
{ 0xfc71, G_UNICODE_NOT_PRESENT_OFFSET, 13414 },
{ 0xfc72, G_UNICODE_NOT_PRESENT_OFFSET, 12937 },
{ 0xfc73, G_UNICODE_NOT_PRESENT_OFFSET, 13419 },
{ 0xfc74, G_UNICODE_NOT_PRESENT_OFFSET, 12942 },
{ 0xfc75, G_UNICODE_NOT_PRESENT_OFFSET, 12947 },
{ 0xfc76, G_UNICODE_NOT_PRESENT_OFFSET, 13424 },
{ 0xfc77, G_UNICODE_NOT_PRESENT_OFFSET, 13429 },
{ 0xfc78, G_UNICODE_NOT_PRESENT_OFFSET, 12957 },
{ 0xfc79, G_UNICODE_NOT_PRESENT_OFFSET, 13434 },
{ 0xfc7a, G_UNICODE_NOT_PRESENT_OFFSET, 12962 },
{ 0xfc7b, G_UNICODE_NOT_PRESENT_OFFSET, 12967 },
{ 0xfc7c, G_UNICODE_NOT_PRESENT_OFFSET, 13112 },
{ 0xfc7d, G_UNICODE_NOT_PRESENT_OFFSET, 13117 },
{ 0xfc7e, G_UNICODE_NOT_PRESENT_OFFSET, 13132 },
{ 0xfc7f, G_UNICODE_NOT_PRESENT_OFFSET, 13137 },
{ 0xfc80, G_UNICODE_NOT_PRESENT_OFFSET, 13142 },
{ 0xfc81, G_UNICODE_NOT_PRESENT_OFFSET, 13162 },
{ 0xfc82, G_UNICODE_NOT_PRESENT_OFFSET, 13167 },
{ 0xfc83, G_UNICODE_NOT_PRESENT_OFFSET, 13172 },
{ 0xfc84, G_UNICODE_NOT_PRESENT_OFFSET, 13177 },
{ 0xfc85, G_UNICODE_NOT_PRESENT_OFFSET, 13197 },
{ 0xfc86, G_UNICODE_NOT_PRESENT_OFFSET, 13202 },
{ 0xfc87, G_UNICODE_NOT_PRESENT_OFFSET, 13207 },
{ 0xfc88, G_UNICODE_NOT_PRESENT_OFFSET, 13439 },
{ 0xfc89, G_UNICODE_NOT_PRESENT_OFFSET, 13227 },
{ 0xfc8a, G_UNICODE_NOT_PRESENT_OFFSET, 13444 },
{ 0xfc8b, G_UNICODE_NOT_PRESENT_OFFSET, 13449 },
{ 0xfc8c, G_UNICODE_NOT_PRESENT_OFFSET, 13257 },
{ 0xfc8d, G_UNICODE_NOT_PRESENT_OFFSET, 13454 },
{ 0xfc8e, G_UNICODE_NOT_PRESENT_OFFSET, 13262 },
{ 0xfc8f, G_UNICODE_NOT_PRESENT_OFFSET, 13267 },
{ 0xfc90, G_UNICODE_NOT_PRESENT_OFFSET, 13332 },
{ 0xfc91, G_UNICODE_NOT_PRESENT_OFFSET, 13459 },
{ 0xfc92, G_UNICODE_NOT_PRESENT_OFFSET, 13464 },
{ 0xfc93, G_UNICODE_NOT_PRESENT_OFFSET, 13307 },
{ 0xfc94, G_UNICODE_NOT_PRESENT_OFFSET, 13469 },
{ 0xfc95, G_UNICODE_NOT_PRESENT_OFFSET, 13312 },
{ 0xfc96, G_UNICODE_NOT_PRESENT_OFFSET, 13317 },
{ 0xfc97, G_UNICODE_NOT_PRESENT_OFFSET, 12864 },
{ 0xfc98, G_UNICODE_NOT_PRESENT_OFFSET, 12871 },
{ 0xfc99, G_UNICODE_NOT_PRESENT_OFFSET, 13474 },
{ 0xfc9a, G_UNICODE_NOT_PRESENT_OFFSET, 12878 },
{ 0xfc9b, G_UNICODE_NOT_PRESENT_OFFSET, 13481 },
{ 0xfc9c, G_UNICODE_NOT_PRESENT_OFFSET, 12892 },
{ 0xfc9d, G_UNICODE_NOT_PRESENT_OFFSET, 12897 },
{ 0xfc9e, G_UNICODE_NOT_PRESENT_OFFSET, 12902 },
{ 0xfc9f, G_UNICODE_NOT_PRESENT_OFFSET, 12907 },
{ 0xfca0, G_UNICODE_NOT_PRESENT_OFFSET, 13488 },
{ 0xfca1, G_UNICODE_NOT_PRESENT_OFFSET, 12922 },
{ 0xfca2, G_UNICODE_NOT_PRESENT_OFFSET, 12927 },
{ 0xfca3, G_UNICODE_NOT_PRESENT_OFFSET, 12932 },
{ 0xfca4, G_UNICODE_NOT_PRESENT_OFFSET, 12937 },
{ 0xfca5, G_UNICODE_NOT_PRESENT_OFFSET, 13493 },
{ 0xfca6, G_UNICODE_NOT_PRESENT_OFFSET, 12957 },
{ 0xfca7, G_UNICODE_NOT_PRESENT_OFFSET, 12972 },
{ 0xfca8, G_UNICODE_NOT_PRESENT_OFFSET, 12977 },
{ 0xfca9, G_UNICODE_NOT_PRESENT_OFFSET, 12982 },
{ 0xfcaa, G_UNICODE_NOT_PRESENT_OFFSET, 12987 },
{ 0xfcab, G_UNICODE_NOT_PRESENT_OFFSET, 12992 },
{ 0xfcac, G_UNICODE_NOT_PRESENT_OFFSET, 13002 },
{ 0xfcad, G_UNICODE_NOT_PRESENT_OFFSET, 13007 },
{ 0xfcae, G_UNICODE_NOT_PRESENT_OFFSET, 13012 },
{ 0xfcaf, G_UNICODE_NOT_PRESENT_OFFSET, 13017 },
{ 0xfcb0, G_UNICODE_NOT_PRESENT_OFFSET, 13022 },
{ 0xfcb1, G_UNICODE_NOT_PRESENT_OFFSET, 13027 },
{ 0xfcb2, G_UNICODE_NOT_PRESENT_OFFSET, 13498 },
{ 0xfcb3, G_UNICODE_NOT_PRESENT_OFFSET, 13032 },
{ 0xfcb4, G_UNICODE_NOT_PRESENT_OFFSET, 13037 },
{ 0xfcb5, G_UNICODE_NOT_PRESENT_OFFSET, 13042 },
{ 0xfcb6, G_UNICODE_NOT_PRESENT_OFFSET, 13047 },
{ 0xfcb7, G_UNICODE_NOT_PRESENT_OFFSET, 13052 },
{ 0xfcb8, G_UNICODE_NOT_PRESENT_OFFSET, 13057 },
{ 0xfcb9, G_UNICODE_NOT_PRESENT_OFFSET, 13067 },
{ 0xfcba, G_UNICODE_NOT_PRESENT_OFFSET, 13072 },
{ 0xfcbb, G_UNICODE_NOT_PRESENT_OFFSET, 13077 },
{ 0xfcbc, G_UNICODE_NOT_PRESENT_OFFSET, 13082 },
{ 0xfcbd, G_UNICODE_NOT_PRESENT_OFFSET, 13087 },
{ 0xfcbe, G_UNICODE_NOT_PRESENT_OFFSET, 13092 },
{ 0xfcbf, G_UNICODE_NOT_PRESENT_OFFSET, 13097 },
{ 0xfcc0, G_UNICODE_NOT_PRESENT_OFFSET, 13102 },
{ 0xfcc1, G_UNICODE_NOT_PRESENT_OFFSET, 13107 },
{ 0xfcc2, G_UNICODE_NOT_PRESENT_OFFSET, 13122 },
{ 0xfcc3, G_UNICODE_NOT_PRESENT_OFFSET, 13127 },
{ 0xfcc4, G_UNICODE_NOT_PRESENT_OFFSET, 13147 },
{ 0xfcc5, G_UNICODE_NOT_PRESENT_OFFSET, 13152 },
{ 0xfcc6, G_UNICODE_NOT_PRESENT_OFFSET, 13157 },
{ 0xfcc7, G_UNICODE_NOT_PRESENT_OFFSET, 13162 },
{ 0xfcc8, G_UNICODE_NOT_PRESENT_OFFSET, 13167 },
{ 0xfcc9, G_UNICODE_NOT_PRESENT_OFFSET, 13182 },
{ 0xfcca, G_UNICODE_NOT_PRESENT_OFFSET, 13187 },
{ 0xfccb, G_UNICODE_NOT_PRESENT_OFFSET, 13192 },
{ 0xfccc, G_UNICODE_NOT_PRESENT_OFFSET, 13197 },
{ 0xfccd, G_UNICODE_NOT_PRESENT_OFFSET, 13503 },
{ 0xfcce, G_UNICODE_NOT_PRESENT_OFFSET, 13212 },
{ 0xfccf, G_UNICODE_NOT_PRESENT_OFFSET, 13217 },
{ 0xfcd0, G_UNICODE_NOT_PRESENT_OFFSET, 13222 },
{ 0xfcd1, G_UNICODE_NOT_PRESENT_OFFSET, 13227 },
{ 0xfcd2, G_UNICODE_NOT_PRESENT_OFFSET, 13242 },
{ 0xfcd3, G_UNICODE_NOT_PRESENT_OFFSET, 13247 },
{ 0xfcd4, G_UNICODE_NOT_PRESENT_OFFSET, 13252 },
{ 0xfcd5, G_UNICODE_NOT_PRESENT_OFFSET, 13257 },
{ 0xfcd6, G_UNICODE_NOT_PRESENT_OFFSET, 13508 },
{ 0xfcd7, G_UNICODE_NOT_PRESENT_OFFSET, 13272 },
{ 0xfcd8, G_UNICODE_NOT_PRESENT_OFFSET, 13277 },
{ 0xfcd9, G_UNICODE_NOT_PRESENT_OFFSET, 13513 },
{ 0xfcda, G_UNICODE_NOT_PRESENT_OFFSET, 13292 },
{ 0xfcdb, G_UNICODE_NOT_PRESENT_OFFSET, 13297 },
{ 0xfcdc, G_UNICODE_NOT_PRESENT_OFFSET, 13302 },
{ 0xfcdd, G_UNICODE_NOT_PRESENT_OFFSET, 13307 },
{ 0xfcde, G_UNICODE_NOT_PRESENT_OFFSET, 13518 },
{ 0xfcdf, G_UNICODE_NOT_PRESENT_OFFSET, 12878 },
{ 0xfce0, G_UNICODE_NOT_PRESENT_OFFSET, 13481 },
{ 0xfce1, G_UNICODE_NOT_PRESENT_OFFSET, 12907 },
{ 0xfce2, G_UNICODE_NOT_PRESENT_OFFSET, 13488 },
{ 0xfce3, G_UNICODE_NOT_PRESENT_OFFSET, 12937 },
{ 0xfce4, G_UNICODE_NOT_PRESENT_OFFSET, 13493 },
{ 0xfce5, G_UNICODE_NOT_PRESENT_OFFSET, 12957 },
{ 0xfce6, G_UNICODE_NOT_PRESENT_OFFSET, 13523 },
{ 0xfce7, G_UNICODE_NOT_PRESENT_OFFSET, 13022 },
{ 0xfce8, G_UNICODE_NOT_PRESENT_OFFSET, 13528 },
{ 0xfce9, G_UNICODE_NOT_PRESENT_OFFSET, 13533 },
{ 0xfcea, G_UNICODE_NOT_PRESENT_OFFSET, 13538 },
{ 0xfceb, G_UNICODE_NOT_PRESENT_OFFSET, 13162 },
{ 0xfcec, G_UNICODE_NOT_PRESENT_OFFSET, 13167 },
{ 0xfced, G_UNICODE_NOT_PRESENT_OFFSET, 13197 },
{ 0xfcee, G_UNICODE_NOT_PRESENT_OFFSET, 13257 },
{ 0xfcef, G_UNICODE_NOT_PRESENT_OFFSET, 13508 },
{ 0xfcf0, G_UNICODE_NOT_PRESENT_OFFSET, 13307 },
{ 0xfcf1, G_UNICODE_NOT_PRESENT_OFFSET, 13518 },
{ 0xfcf2, G_UNICODE_NOT_PRESENT_OFFSET, 13543 },
{ 0xfcf3, G_UNICODE_NOT_PRESENT_OFFSET, 13550 },
{ 0xfcf4, G_UNICODE_NOT_PRESENT_OFFSET, 13557 },
{ 0xfcf5, G_UNICODE_NOT_PRESENT_OFFSET, 13564 },
{ 0xfcf6, G_UNICODE_NOT_PRESENT_OFFSET, 13569 },
{ 0xfcf7, G_UNICODE_NOT_PRESENT_OFFSET, 13574 },
{ 0xfcf8, G_UNICODE_NOT_PRESENT_OFFSET, 13579 },
{ 0xfcf9, G_UNICODE_NOT_PRESENT_OFFSET, 13584 },
{ 0xfcfa, G_UNICODE_NOT_PRESENT_OFFSET, 13589 },
{ 0xfcfb, G_UNICODE_NOT_PRESENT_OFFSET, 13594 },
{ 0xfcfc, G_UNICODE_NOT_PRESENT_OFFSET, 13599 },
{ 0xfcfd, G_UNICODE_NOT_PRESENT_OFFSET, 13604 },
{ 0xfcfe, G_UNICODE_NOT_PRESENT_OFFSET, 13609 },
{ 0xfcff, G_UNICODE_NOT_PRESENT_OFFSET, 13614 },
{ 0xfd00, G_UNICODE_NOT_PRESENT_OFFSET, 13619 },
{ 0xfd01, G_UNICODE_NOT_PRESENT_OFFSET, 13624 },
{ 0xfd02, G_UNICODE_NOT_PRESENT_OFFSET, 13629 },
{ 0xfd03, G_UNICODE_NOT_PRESENT_OFFSET, 13634 },
{ 0xfd04, G_UNICODE_NOT_PRESENT_OFFSET, 13639 },
{ 0xfd05, G_UNICODE_NOT_PRESENT_OFFSET, 13644 },
{ 0xfd06, G_UNICODE_NOT_PRESENT_OFFSET, 13649 },
{ 0xfd07, G_UNICODE_NOT_PRESENT_OFFSET, 13654 },
{ 0xfd08, G_UNICODE_NOT_PRESENT_OFFSET, 13659 },
{ 0xfd09, G_UNICODE_NOT_PRESENT_OFFSET, 13664 },
{ 0xfd0a, G_UNICODE_NOT_PRESENT_OFFSET, 13669 },
{ 0xfd0b, G_UNICODE_NOT_PRESENT_OFFSET, 13674 },
{ 0xfd0c, G_UNICODE_NOT_PRESENT_OFFSET, 13533 },
{ 0xfd0d, G_UNICODE_NOT_PRESENT_OFFSET, 13679 },
{ 0xfd0e, G_UNICODE_NOT_PRESENT_OFFSET, 13684 },
{ 0xfd0f, G_UNICODE_NOT_PRESENT_OFFSET, 13689 },
{ 0xfd10, G_UNICODE_NOT_PRESENT_OFFSET, 13694 },
{ 0xfd11, G_UNICODE_NOT_PRESENT_OFFSET, 13564 },
{ 0xfd12, G_UNICODE_NOT_PRESENT_OFFSET, 13569 },
{ 0xfd13, G_UNICODE_NOT_PRESENT_OFFSET, 13574 },
{ 0xfd14, G_UNICODE_NOT_PRESENT_OFFSET, 13579 },
{ 0xfd15, G_UNICODE_NOT_PRESENT_OFFSET, 13584 },
{ 0xfd16, G_UNICODE_NOT_PRESENT_OFFSET, 13589 },
{ 0xfd17, G_UNICODE_NOT_PRESENT_OFFSET, 13594 },
{ 0xfd18, G_UNICODE_NOT_PRESENT_OFFSET, 13599 },
{ 0xfd19, G_UNICODE_NOT_PRESENT_OFFSET, 13604 },
{ 0xfd1a, G_UNICODE_NOT_PRESENT_OFFSET, 13609 },
{ 0xfd1b, G_UNICODE_NOT_PRESENT_OFFSET, 13614 },
{ 0xfd1c, G_UNICODE_NOT_PRESENT_OFFSET, 13619 },
{ 0xfd1d, G_UNICODE_NOT_PRESENT_OFFSET, 13624 },
{ 0xfd1e, G_UNICODE_NOT_PRESENT_OFFSET, 13629 },
{ 0xfd1f, G_UNICODE_NOT_PRESENT_OFFSET, 13634 },
{ 0xfd20, G_UNICODE_NOT_PRESENT_OFFSET, 13639 },
{ 0xfd21, G_UNICODE_NOT_PRESENT_OFFSET, 13644 },
{ 0xfd22, G_UNICODE_NOT_PRESENT_OFFSET, 13649 },
{ 0xfd23, G_UNICODE_NOT_PRESENT_OFFSET, 13654 },
{ 0xfd24, G_UNICODE_NOT_PRESENT_OFFSET, 13659 },
{ 0xfd25, G_UNICODE_NOT_PRESENT_OFFSET, 13664 },
{ 0xfd26, G_UNICODE_NOT_PRESENT_OFFSET, 13669 },
{ 0xfd27, G_UNICODE_NOT_PRESENT_OFFSET, 13674 },
{ 0xfd28, G_UNICODE_NOT_PRESENT_OFFSET, 13533 },
{ 0xfd29, G_UNICODE_NOT_PRESENT_OFFSET, 13679 },
{ 0xfd2a, G_UNICODE_NOT_PRESENT_OFFSET, 13684 },
{ 0xfd2b, G_UNICODE_NOT_PRESENT_OFFSET, 13689 },
{ 0xfd2c, G_UNICODE_NOT_PRESENT_OFFSET, 13694 },
{ 0xfd2d, G_UNICODE_NOT_PRESENT_OFFSET, 13664 },
{ 0xfd2e, G_UNICODE_NOT_PRESENT_OFFSET, 13669 },
{ 0xfd2f, G_UNICODE_NOT_PRESENT_OFFSET, 13674 },
{ 0xfd30, G_UNICODE_NOT_PRESENT_OFFSET, 13533 },
{ 0xfd31, G_UNICODE_NOT_PRESENT_OFFSET, 13528 },
{ 0xfd32, G_UNICODE_NOT_PRESENT_OFFSET, 13538 },
{ 0xfd33, G_UNICODE_NOT_PRESENT_OFFSET, 13062 },
{ 0xfd34, G_UNICODE_NOT_PRESENT_OFFSET, 13007 },
{ 0xfd35, G_UNICODE_NOT_PRESENT_OFFSET, 13012 },
{ 0xfd36, G_UNICODE_NOT_PRESENT_OFFSET, 13017 },
{ 0xfd37, G_UNICODE_NOT_PRESENT_OFFSET, 13664 },
{ 0xfd38, G_UNICODE_NOT_PRESENT_OFFSET, 13669 },
{ 0xfd39, G_UNICODE_NOT_PRESENT_OFFSET, 13674 },
{ 0xfd3a, G_UNICODE_NOT_PRESENT_OFFSET, 13062 },
{ 0xfd3b, G_UNICODE_NOT_PRESENT_OFFSET, 13067 },
{ 0xfd3c, G_UNICODE_NOT_PRESENT_OFFSET, 13699 },
{ 0xfd3d, G_UNICODE_NOT_PRESENT_OFFSET, 13699 },
{ 0xfd50, G_UNICODE_NOT_PRESENT_OFFSET, 13704 },
{ 0xfd51, G_UNICODE_NOT_PRESENT_OFFSET, 13711 },
{ 0xfd52, G_UNICODE_NOT_PRESENT_OFFSET, 13711 },
{ 0xfd53, G_UNICODE_NOT_PRESENT_OFFSET, 13718 },
{ 0xfd54, G_UNICODE_NOT_PRESENT_OFFSET, 13725 },
{ 0xfd55, G_UNICODE_NOT_PRESENT_OFFSET, 13732 },
{ 0xfd56, G_UNICODE_NOT_PRESENT_OFFSET, 13739 },
{ 0xfd57, G_UNICODE_NOT_PRESENT_OFFSET, 13746 },
{ 0xfd58, G_UNICODE_NOT_PRESENT_OFFSET, 13753 },
{ 0xfd59, G_UNICODE_NOT_PRESENT_OFFSET, 13753 },
{ 0xfd5a, G_UNICODE_NOT_PRESENT_OFFSET, 13760 },
{ 0xfd5b, G_UNICODE_NOT_PRESENT_OFFSET, 13767 },
{ 0xfd5c, G_UNICODE_NOT_PRESENT_OFFSET, 13774 },
{ 0xfd5d, G_UNICODE_NOT_PRESENT_OFFSET, 13781 },
{ 0xfd5e, G_UNICODE_NOT_PRESENT_OFFSET, 13788 },
{ 0xfd5f, G_UNICODE_NOT_PRESENT_OFFSET, 13795 },
{ 0xfd60, G_UNICODE_NOT_PRESENT_OFFSET, 13795 },
{ 0xfd61, G_UNICODE_NOT_PRESENT_OFFSET, 13802 },
{ 0xfd62, G_UNICODE_NOT_PRESENT_OFFSET, 13809 },
{ 0xfd63, G_UNICODE_NOT_PRESENT_OFFSET, 13809 },
{ 0xfd64, G_UNICODE_NOT_PRESENT_OFFSET, 13816 },
{ 0xfd65, G_UNICODE_NOT_PRESENT_OFFSET, 13816 },
{ 0xfd66, G_UNICODE_NOT_PRESENT_OFFSET, 13823 },
{ 0xfd67, G_UNICODE_NOT_PRESENT_OFFSET, 13830 },
{ 0xfd68, G_UNICODE_NOT_PRESENT_OFFSET, 13830 },
{ 0xfd69, G_UNICODE_NOT_PRESENT_OFFSET, 13837 },
{ 0xfd6a, G_UNICODE_NOT_PRESENT_OFFSET, 13844 },
{ 0xfd6b, G_UNICODE_NOT_PRESENT_OFFSET, 13844 },
{ 0xfd6c, G_UNICODE_NOT_PRESENT_OFFSET, 13851 },
{ 0xfd6d, G_UNICODE_NOT_PRESENT_OFFSET, 13851 },
{ 0xfd6e, G_UNICODE_NOT_PRESENT_OFFSET, 13858 },
{ 0xfd6f, G_UNICODE_NOT_PRESENT_OFFSET, 13865 },
{ 0xfd70, G_UNICODE_NOT_PRESENT_OFFSET, 13865 },
{ 0xfd71, G_UNICODE_NOT_PRESENT_OFFSET, 13872 },
{ 0xfd72, G_UNICODE_NOT_PRESENT_OFFSET, 13872 },
{ 0xfd73, G_UNICODE_NOT_PRESENT_OFFSET, 13879 },
{ 0xfd74, G_UNICODE_NOT_PRESENT_OFFSET, 13886 },
{ 0xfd75, G_UNICODE_NOT_PRESENT_OFFSET, 13893 },
{ 0xfd76, G_UNICODE_NOT_PRESENT_OFFSET, 13900 },
{ 0xfd77, G_UNICODE_NOT_PRESENT_OFFSET, 13900 },
{ 0xfd78, G_UNICODE_NOT_PRESENT_OFFSET, 13907 },
{ 0xfd79, G_UNICODE_NOT_PRESENT_OFFSET, 13914 },
{ 0xfd7a, G_UNICODE_NOT_PRESENT_OFFSET, 13921 },
{ 0xfd7b, G_UNICODE_NOT_PRESENT_OFFSET, 13928 },
{ 0xfd7c, G_UNICODE_NOT_PRESENT_OFFSET, 13935 },
{ 0xfd7d, G_UNICODE_NOT_PRESENT_OFFSET, 13935 },
{ 0xfd7e, G_UNICODE_NOT_PRESENT_OFFSET, 13942 },
{ 0xfd7f, G_UNICODE_NOT_PRESENT_OFFSET, 13949 },
{ 0xfd80, G_UNICODE_NOT_PRESENT_OFFSET, 13956 },
{ 0xfd81, G_UNICODE_NOT_PRESENT_OFFSET, 13963 },
{ 0xfd82, G_UNICODE_NOT_PRESENT_OFFSET, 13970 },
{ 0xfd83, G_UNICODE_NOT_PRESENT_OFFSET, 13977 },
{ 0xfd84, G_UNICODE_NOT_PRESENT_OFFSET, 13977 },
{ 0xfd85, G_UNICODE_NOT_PRESENT_OFFSET, 13984 },
{ 0xfd86, G_UNICODE_NOT_PRESENT_OFFSET, 13984 },
{ 0xfd87, G_UNICODE_NOT_PRESENT_OFFSET, 13991 },
{ 0xfd88, G_UNICODE_NOT_PRESENT_OFFSET, 13991 },
{ 0xfd89, G_UNICODE_NOT_PRESENT_OFFSET, 13998 },
{ 0xfd8a, G_UNICODE_NOT_PRESENT_OFFSET, 14005 },
{ 0xfd8b, G_UNICODE_NOT_PRESENT_OFFSET, 14012 },
{ 0xfd8c, G_UNICODE_NOT_PRESENT_OFFSET, 14019 },
{ 0xfd8d, G_UNICODE_NOT_PRESENT_OFFSET, 14026 },
{ 0xfd8e, G_UNICODE_NOT_PRESENT_OFFSET, 14033 },
{ 0xfd8f, G_UNICODE_NOT_PRESENT_OFFSET, 14040 },
{ 0xfd92, G_UNICODE_NOT_PRESENT_OFFSET, 14047 },
{ 0xfd93, G_UNICODE_NOT_PRESENT_OFFSET, 14054 },
{ 0xfd94, G_UNICODE_NOT_PRESENT_OFFSET, 14061 },
{ 0xfd95, G_UNICODE_NOT_PRESENT_OFFSET, 14068 },
{ 0xfd96, G_UNICODE_NOT_PRESENT_OFFSET, 14075 },
{ 0xfd97, G_UNICODE_NOT_PRESENT_OFFSET, 14082 },
{ 0xfd98, G_UNICODE_NOT_PRESENT_OFFSET, 14082 },
{ 0xfd99, G_UNICODE_NOT_PRESENT_OFFSET, 14089 },
{ 0xfd9a, G_UNICODE_NOT_PRESENT_OFFSET, 14096 },
{ 0xfd9b, G_UNICODE_NOT_PRESENT_OFFSET, 14103 },
{ 0xfd9c, G_UNICODE_NOT_PRESENT_OFFSET, 14110 },
{ 0xfd9d, G_UNICODE_NOT_PRESENT_OFFSET, 14110 },
{ 0xfd9e, G_UNICODE_NOT_PRESENT_OFFSET, 14117 },
{ 0xfd9f, G_UNICODE_NOT_PRESENT_OFFSET, 14124 },
{ 0xfda0, G_UNICODE_NOT_PRESENT_OFFSET, 14131 },
{ 0xfda1, G_UNICODE_NOT_PRESENT_OFFSET, 14138 },
{ 0xfda2, G_UNICODE_NOT_PRESENT_OFFSET, 14145 },
{ 0xfda3, G_UNICODE_NOT_PRESENT_OFFSET, 14152 },
{ 0xfda4, G_UNICODE_NOT_PRESENT_OFFSET, 14159 },
{ 0xfda5, G_UNICODE_NOT_PRESENT_OFFSET, 14166 },
{ 0xfda6, G_UNICODE_NOT_PRESENT_OFFSET, 14173 },
{ 0xfda7, G_UNICODE_NOT_PRESENT_OFFSET, 14180 },
{ 0xfda8, G_UNICODE_NOT_PRESENT_OFFSET, 14187 },
{ 0xfda9, G_UNICODE_NOT_PRESENT_OFFSET, 14194 },
{ 0xfdaa, G_UNICODE_NOT_PRESENT_OFFSET, 14201 },
{ 0xfdab, G_UNICODE_NOT_PRESENT_OFFSET, 14208 },
{ 0xfdac, G_UNICODE_NOT_PRESENT_OFFSET, 14215 },
{ 0xfdad, G_UNICODE_NOT_PRESENT_OFFSET, 14222 },
{ 0xfdae, G_UNICODE_NOT_PRESENT_OFFSET, 14229 },
{ 0xfdaf, G_UNICODE_NOT_PRESENT_OFFSET, 14236 },
{ 0xfdb0, G_UNICODE_NOT_PRESENT_OFFSET, 14243 },
{ 0xfdb1, G_UNICODE_NOT_PRESENT_OFFSET, 14250 },
{ 0xfdb2, G_UNICODE_NOT_PRESENT_OFFSET, 14257 },
{ 0xfdb3, G_UNICODE_NOT_PRESENT_OFFSET, 14264 },
{ 0xfdb4, G_UNICODE_NOT_PRESENT_OFFSET, 13942 },
{ 0xfdb5, G_UNICODE_NOT_PRESENT_OFFSET, 13956 },
{ 0xfdb6, G_UNICODE_NOT_PRESENT_OFFSET, 14271 },
{ 0xfdb7, G_UNICODE_NOT_PRESENT_OFFSET, 14278 },
{ 0xfdb8, G_UNICODE_NOT_PRESENT_OFFSET, 14285 },
{ 0xfdb9, G_UNICODE_NOT_PRESENT_OFFSET, 14292 },
{ 0xfdba, G_UNICODE_NOT_PRESENT_OFFSET, 14299 },
{ 0xfdbb, G_UNICODE_NOT_PRESENT_OFFSET, 14306 },
{ 0xfdbc, G_UNICODE_NOT_PRESENT_OFFSET, 14299 },
{ 0xfdbd, G_UNICODE_NOT_PRESENT_OFFSET, 14285 },
{ 0xfdbe, G_UNICODE_NOT_PRESENT_OFFSET, 14313 },
{ 0xfdbf, G_UNICODE_NOT_PRESENT_OFFSET, 14320 },
{ 0xfdc0, G_UNICODE_NOT_PRESENT_OFFSET, 14327 },
{ 0xfdc1, G_UNICODE_NOT_PRESENT_OFFSET, 14334 },
{ 0xfdc2, G_UNICODE_NOT_PRESENT_OFFSET, 14341 },
{ 0xfdc3, G_UNICODE_NOT_PRESENT_OFFSET, 14306 },
{ 0xfdc4, G_UNICODE_NOT_PRESENT_OFFSET, 13893 },
{ 0xfdc5, G_UNICODE_NOT_PRESENT_OFFSET, 13823 },
{ 0xfdc6, G_UNICODE_NOT_PRESENT_OFFSET, 14348 },
{ 0xfdc7, G_UNICODE_NOT_PRESENT_OFFSET, 14355 },
{ 0xfdf0, G_UNICODE_NOT_PRESENT_OFFSET, 14362 },
{ 0xfdf1, G_UNICODE_NOT_PRESENT_OFFSET, 14369 },
{ 0xfdf2, G_UNICODE_NOT_PRESENT_OFFSET, 14376 },
{ 0xfdf3, G_UNICODE_NOT_PRESENT_OFFSET, 14385 },
{ 0xfdf4, G_UNICODE_NOT_PRESENT_OFFSET, 14394 },
{ 0xfdf5, G_UNICODE_NOT_PRESENT_OFFSET, 14403 },
{ 0xfdf6, G_UNICODE_NOT_PRESENT_OFFSET, 14412 },
{ 0xfdf7, G_UNICODE_NOT_PRESENT_OFFSET, 14421 },
{ 0xfdf8, G_UNICODE_NOT_PRESENT_OFFSET, 14430 },
{ 0xfdf9, G_UNICODE_NOT_PRESENT_OFFSET, 14439 },
{ 0xfdfa, G_UNICODE_NOT_PRESENT_OFFSET, 14446 },
{ 0xfdfb, G_UNICODE_NOT_PRESENT_OFFSET, 14480 },
{ 0xfdfc, G_UNICODE_NOT_PRESENT_OFFSET, 14496 },
{ 0xfe10, G_UNICODE_NOT_PRESENT_OFFSET, 14505 },
{ 0xfe11, G_UNICODE_NOT_PRESENT_OFFSET, 14507 },
{ 0xfe12, G_UNICODE_NOT_PRESENT_OFFSET, 14511 },
{ 0xfe13, G_UNICODE_NOT_PRESENT_OFFSET, 14515 },
{ 0xfe14, G_UNICODE_NOT_PRESENT_OFFSET, 1248 },
{ 0xfe15, G_UNICODE_NOT_PRESENT_OFFSET, 14517 },
{ 0xfe16, G_UNICODE_NOT_PRESENT_OFFSET, 14519 },
{ 0xfe17, G_UNICODE_NOT_PRESENT_OFFSET, 14521 },
{ 0xfe18, G_UNICODE_NOT_PRESENT_OFFSET, 14525 },
{ 0xfe19, G_UNICODE_NOT_PRESENT_OFFSET, 5186 },
{ 0xfe30, G_UNICODE_NOT_PRESENT_OFFSET, 5183 },
{ 0xfe31, G_UNICODE_NOT_PRESENT_OFFSET, 14529 },
{ 0xfe32, G_UNICODE_NOT_PRESENT_OFFSET, 14533 },
{ 0xfe33, G_UNICODE_NOT_PRESENT_OFFSET, 14537 },
{ 0xfe34, G_UNICODE_NOT_PRESENT_OFFSET, 14537 },
{ 0xfe35, G_UNICODE_NOT_PRESENT_OFFSET, 5275 },
{ 0xfe36, G_UNICODE_NOT_PRESENT_OFFSET, 5277 },
{ 0xfe37, G_UNICODE_NOT_PRESENT_OFFSET, 14539 },
{ 0xfe38, G_UNICODE_NOT_PRESENT_OFFSET, 14541 },
{ 0xfe39, G_UNICODE_NOT_PRESENT_OFFSET, 14543 },
{ 0xfe3a, G_UNICODE_NOT_PRESENT_OFFSET, 14547 },
{ 0xfe3b, G_UNICODE_NOT_PRESENT_OFFSET, 14551 },
{ 0xfe3c, G_UNICODE_NOT_PRESENT_OFFSET, 14555 },
{ 0xfe3d, G_UNICODE_NOT_PRESENT_OFFSET, 14559 },
{ 0xfe3e, G_UNICODE_NOT_PRESENT_OFFSET, 14563 },
{ 0xfe3f, G_UNICODE_NOT_PRESENT_OFFSET, 5801 },
{ 0xfe40, G_UNICODE_NOT_PRESENT_OFFSET, 5805 },
{ 0xfe41, G_UNICODE_NOT_PRESENT_OFFSET, 14567 },
{ 0xfe42, G_UNICODE_NOT_PRESENT_OFFSET, 14571 },
{ 0xfe43, G_UNICODE_NOT_PRESENT_OFFSET, 14575 },
{ 0xfe44, G_UNICODE_NOT_PRESENT_OFFSET, 14579 },
{ 0xfe47, G_UNICODE_NOT_PRESENT_OFFSET, 14583 },
{ 0xfe48, G_UNICODE_NOT_PRESENT_OFFSET, 14585 },
{ 0xfe49, G_UNICODE_NOT_PRESENT_OFFSET, 5227 },
{ 0xfe4a, G_UNICODE_NOT_PRESENT_OFFSET, 5227 },
{ 0xfe4b, G_UNICODE_NOT_PRESENT_OFFSET, 5227 },
{ 0xfe4c, G_UNICODE_NOT_PRESENT_OFFSET, 5227 },
{ 0xfe4d, G_UNICODE_NOT_PRESENT_OFFSET, 14537 },
{ 0xfe4e, G_UNICODE_NOT_PRESENT_OFFSET, 14537 },
{ 0xfe4f, G_UNICODE_NOT_PRESENT_OFFSET, 14537 },
{ 0xfe50, G_UNICODE_NOT_PRESENT_OFFSET, 14505 },
{ 0xfe51, G_UNICODE_NOT_PRESENT_OFFSET, 14507 },
{ 0xfe52, G_UNICODE_NOT_PRESENT_OFFSET, 5181 },
{ 0xfe54, G_UNICODE_NOT_PRESENT_OFFSET, 1248 },
{ 0xfe55, G_UNICODE_NOT_PRESENT_OFFSET, 14515 },
{ 0xfe56, G_UNICODE_NOT_PRESENT_OFFSET, 14519 },
{ 0xfe57, G_UNICODE_NOT_PRESENT_OFFSET, 14517 },
{ 0xfe58, G_UNICODE_NOT_PRESENT_OFFSET, 14529 },
{ 0xfe59, G_UNICODE_NOT_PRESENT_OFFSET, 5275 },
{ 0xfe5a, G_UNICODE_NOT_PRESENT_OFFSET, 5277 },
{ 0xfe5b, G_UNICODE_NOT_PRESENT_OFFSET, 14539 },
{ 0xfe5c, G_UNICODE_NOT_PRESENT_OFFSET, 14541 },
{ 0xfe5d, G_UNICODE_NOT_PRESENT_OFFSET, 14543 },
{ 0xfe5e, G_UNICODE_NOT_PRESENT_OFFSET, 14547 },
{ 0xfe5f, G_UNICODE_NOT_PRESENT_OFFSET, 14587 },
{ 0xfe60, G_UNICODE_NOT_PRESENT_OFFSET, 14589 },
{ 0xfe61, G_UNICODE_NOT_PRESENT_OFFSET, 14591 },
{ 0xfe62, G_UNICODE_NOT_PRESENT_OFFSET, 5267 },
{ 0xfe63, G_UNICODE_NOT_PRESENT_OFFSET, 14593 },
{ 0xfe64, G_UNICODE_NOT_PRESENT_OFFSET, 14595 },
{ 0xfe65, G_UNICODE_NOT_PRESENT_OFFSET, 14597 },
{ 0xfe66, G_UNICODE_NOT_PRESENT_OFFSET, 5273 },
{ 0xfe68, G_UNICODE_NOT_PRESENT_OFFSET, 14599 },
{ 0xfe69, G_UNICODE_NOT_PRESENT_OFFSET, 14601 },
{ 0xfe6a, G_UNICODE_NOT_PRESENT_OFFSET, 14603 },
{ 0xfe6b, G_UNICODE_NOT_PRESENT_OFFSET, 14605 },
{ 0xfe70, G_UNICODE_NOT_PRESENT_OFFSET, 14607 },
{ 0xfe71, G_UNICODE_NOT_PRESENT_OFFSET, 14611 },
{ 0xfe72, G_UNICODE_NOT_PRESENT_OFFSET, 14616 },
{ 0xfe74, G_UNICODE_NOT_PRESENT_OFFSET, 14620 },
{ 0xfe76, G_UNICODE_NOT_PRESENT_OFFSET, 14624 },
{ 0xfe77, G_UNICODE_NOT_PRESENT_OFFSET, 14628 },
{ 0xfe78, G_UNICODE_NOT_PRESENT_OFFSET, 14633 },
{ 0xfe79, G_UNICODE_NOT_PRESENT_OFFSET, 14637 },
{ 0xfe7a, G_UNICODE_NOT_PRESENT_OFFSET, 14642 },
{ 0xfe7b, G_UNICODE_NOT_PRESENT_OFFSET, 14646 },
{ 0xfe7c, G_UNICODE_NOT_PRESENT_OFFSET, 14651 },
{ 0xfe7d, G_UNICODE_NOT_PRESENT_OFFSET, 14655 },
{ 0xfe7e, G_UNICODE_NOT_PRESENT_OFFSET, 14660 },
{ 0xfe7f, G_UNICODE_NOT_PRESENT_OFFSET, 14664 },
{ 0xfe80, G_UNICODE_NOT_PRESENT_OFFSET, 14669 },
{ 0xfe81, G_UNICODE_NOT_PRESENT_OFFSET, 1676 },
{ 0xfe82, G_UNICODE_NOT_PRESENT_OFFSET, 1676 },
{ 0xfe83, G_UNICODE_NOT_PRESENT_OFFSET, 1681 },
{ 0xfe84, G_UNICODE_NOT_PRESENT_OFFSET, 1681 },
{ 0xfe85, G_UNICODE_NOT_PRESENT_OFFSET, 1686 },
{ 0xfe86, G_UNICODE_NOT_PRESENT_OFFSET, 1686 },
{ 0xfe87, G_UNICODE_NOT_PRESENT_OFFSET, 1691 },
{ 0xfe88, G_UNICODE_NOT_PRESENT_OFFSET, 1691 },
{ 0xfe89, G_UNICODE_NOT_PRESENT_OFFSET, 1696 },
{ 0xfe8a, G_UNICODE_NOT_PRESENT_OFFSET, 1696 },
{ 0xfe8b, G_UNICODE_NOT_PRESENT_OFFSET, 1696 },
{ 0xfe8c, G_UNICODE_NOT_PRESENT_OFFSET, 1696 },
{ 0xfe8d, G_UNICODE_NOT_PRESENT_OFFSET, 14672 },
{ 0xfe8e, G_UNICODE_NOT_PRESENT_OFFSET, 14672 },
{ 0xfe8f, G_UNICODE_NOT_PRESENT_OFFSET, 14675 },
{ 0xfe90, G_UNICODE_NOT_PRESENT_OFFSET, 14675 },
{ 0xfe91, G_UNICODE_NOT_PRESENT_OFFSET, 14675 },
{ 0xfe92, G_UNICODE_NOT_PRESENT_OFFSET, 14675 },
{ 0xfe93, G_UNICODE_NOT_PRESENT_OFFSET, 14678 },
{ 0xfe94, G_UNICODE_NOT_PRESENT_OFFSET, 14678 },
{ 0xfe95, G_UNICODE_NOT_PRESENT_OFFSET, 14681 },
{ 0xfe96, G_UNICODE_NOT_PRESENT_OFFSET, 14681 },
{ 0xfe97, G_UNICODE_NOT_PRESENT_OFFSET, 14681 },
{ 0xfe98, G_UNICODE_NOT_PRESENT_OFFSET, 14681 },
{ 0xfe99, G_UNICODE_NOT_PRESENT_OFFSET, 14684 },
{ 0xfe9a, G_UNICODE_NOT_PRESENT_OFFSET, 14684 },
{ 0xfe9b, G_UNICODE_NOT_PRESENT_OFFSET, 14684 },
{ 0xfe9c, G_UNICODE_NOT_PRESENT_OFFSET, 14684 },
{ 0xfe9d, G_UNICODE_NOT_PRESENT_OFFSET, 14687 },
{ 0xfe9e, G_UNICODE_NOT_PRESENT_OFFSET, 14687 },
{ 0xfe9f, G_UNICODE_NOT_PRESENT_OFFSET, 14687 },
{ 0xfea0, G_UNICODE_NOT_PRESENT_OFFSET, 14687 },
{ 0xfea1, G_UNICODE_NOT_PRESENT_OFFSET, 14690 },
{ 0xfea2, G_UNICODE_NOT_PRESENT_OFFSET, 14690 },
{ 0xfea3, G_UNICODE_NOT_PRESENT_OFFSET, 14690 },
{ 0xfea4, G_UNICODE_NOT_PRESENT_OFFSET, 14690 },
{ 0xfea5, G_UNICODE_NOT_PRESENT_OFFSET, 14693 },
{ 0xfea6, G_UNICODE_NOT_PRESENT_OFFSET, 14693 },
{ 0xfea7, G_UNICODE_NOT_PRESENT_OFFSET, 14693 },
{ 0xfea8, G_UNICODE_NOT_PRESENT_OFFSET, 14693 },
{ 0xfea9, G_UNICODE_NOT_PRESENT_OFFSET, 14696 },
{ 0xfeaa, G_UNICODE_NOT_PRESENT_OFFSET, 14696 },
{ 0xfeab, G_UNICODE_NOT_PRESENT_OFFSET, 14699 },
{ 0xfeac, G_UNICODE_NOT_PRESENT_OFFSET, 14699 },
{ 0xfead, G_UNICODE_NOT_PRESENT_OFFSET, 14702 },
{ 0xfeae, G_UNICODE_NOT_PRESENT_OFFSET, 14702 },
{ 0xfeaf, G_UNICODE_NOT_PRESENT_OFFSET, 14705 },
{ 0xfeb0, G_UNICODE_NOT_PRESENT_OFFSET, 14705 },
{ 0xfeb1, G_UNICODE_NOT_PRESENT_OFFSET, 14708 },
{ 0xfeb2, G_UNICODE_NOT_PRESENT_OFFSET, 14708 },
{ 0xfeb3, G_UNICODE_NOT_PRESENT_OFFSET, 14708 },
{ 0xfeb4, G_UNICODE_NOT_PRESENT_OFFSET, 14708 },
{ 0xfeb5, G_UNICODE_NOT_PRESENT_OFFSET, 14711 },
{ 0xfeb6, G_UNICODE_NOT_PRESENT_OFFSET, 14711 },
{ 0xfeb7, G_UNICODE_NOT_PRESENT_OFFSET, 14711 },
{ 0xfeb8, G_UNICODE_NOT_PRESENT_OFFSET, 14711 },
{ 0xfeb9, G_UNICODE_NOT_PRESENT_OFFSET, 14714 },
{ 0xfeba, G_UNICODE_NOT_PRESENT_OFFSET, 14714 },
{ 0xfebb, G_UNICODE_NOT_PRESENT_OFFSET, 14714 },
{ 0xfebc, G_UNICODE_NOT_PRESENT_OFFSET, 14714 },
{ 0xfebd, G_UNICODE_NOT_PRESENT_OFFSET, 14717 },
{ 0xfebe, G_UNICODE_NOT_PRESENT_OFFSET, 14717 },
{ 0xfebf, G_UNICODE_NOT_PRESENT_OFFSET, 14717 },
{ 0xfec0, G_UNICODE_NOT_PRESENT_OFFSET, 14717 },
{ 0xfec1, G_UNICODE_NOT_PRESENT_OFFSET, 14720 },
{ 0xfec2, G_UNICODE_NOT_PRESENT_OFFSET, 14720 },
{ 0xfec3, G_UNICODE_NOT_PRESENT_OFFSET, 14720 },
{ 0xfec4, G_UNICODE_NOT_PRESENT_OFFSET, 14720 },
{ 0xfec5, G_UNICODE_NOT_PRESENT_OFFSET, 14723 },
{ 0xfec6, G_UNICODE_NOT_PRESENT_OFFSET, 14723 },
{ 0xfec7, G_UNICODE_NOT_PRESENT_OFFSET, 14723 },
{ 0xfec8, G_UNICODE_NOT_PRESENT_OFFSET, 14723 },
{ 0xfec9, G_UNICODE_NOT_PRESENT_OFFSET, 14726 },
{ 0xfeca, G_UNICODE_NOT_PRESENT_OFFSET, 14726 },
{ 0xfecb, G_UNICODE_NOT_PRESENT_OFFSET, 14726 },
{ 0xfecc, G_UNICODE_NOT_PRESENT_OFFSET, 14726 },
{ 0xfecd, G_UNICODE_NOT_PRESENT_OFFSET, 14729 },
{ 0xfece, G_UNICODE_NOT_PRESENT_OFFSET, 14729 },
{ 0xfecf, G_UNICODE_NOT_PRESENT_OFFSET, 14729 },
{ 0xfed0, G_UNICODE_NOT_PRESENT_OFFSET, 14729 },
{ 0xfed1, G_UNICODE_NOT_PRESENT_OFFSET, 14732 },
{ 0xfed2, G_UNICODE_NOT_PRESENT_OFFSET, 14732 },
{ 0xfed3, G_UNICODE_NOT_PRESENT_OFFSET, 14732 },
{ 0xfed4, G_UNICODE_NOT_PRESENT_OFFSET, 14732 },
{ 0xfed5, G_UNICODE_NOT_PRESENT_OFFSET, 14735 },
{ 0xfed6, G_UNICODE_NOT_PRESENT_OFFSET, 14735 },
{ 0xfed7, G_UNICODE_NOT_PRESENT_OFFSET, 14735 },
{ 0xfed8, G_UNICODE_NOT_PRESENT_OFFSET, 14735 },
{ 0xfed9, G_UNICODE_NOT_PRESENT_OFFSET, 14738 },
{ 0xfeda, G_UNICODE_NOT_PRESENT_OFFSET, 14738 },
{ 0xfedb, G_UNICODE_NOT_PRESENT_OFFSET, 14738 },
{ 0xfedc, G_UNICODE_NOT_PRESENT_OFFSET, 14738 },
{ 0xfedd, G_UNICODE_NOT_PRESENT_OFFSET, 14741 },
{ 0xfede, G_UNICODE_NOT_PRESENT_OFFSET, 14741 },
{ 0xfedf, G_UNICODE_NOT_PRESENT_OFFSET, 14741 },
{ 0xfee0, G_UNICODE_NOT_PRESENT_OFFSET, 14741 },
{ 0xfee1, G_UNICODE_NOT_PRESENT_OFFSET, 14744 },
{ 0xfee2, G_UNICODE_NOT_PRESENT_OFFSET, 14744 },
{ 0xfee3, G_UNICODE_NOT_PRESENT_OFFSET, 14744 },
{ 0xfee4, G_UNICODE_NOT_PRESENT_OFFSET, 14744 },
{ 0xfee5, G_UNICODE_NOT_PRESENT_OFFSET, 14747 },
{ 0xfee6, G_UNICODE_NOT_PRESENT_OFFSET, 14747 },
{ 0xfee7, G_UNICODE_NOT_PRESENT_OFFSET, 14747 },
{ 0xfee8, G_UNICODE_NOT_PRESENT_OFFSET, 14747 },
{ 0xfee9, G_UNICODE_NOT_PRESENT_OFFSET, 14750 },
{ 0xfeea, G_UNICODE_NOT_PRESENT_OFFSET, 14750 },
{ 0xfeeb, G_UNICODE_NOT_PRESENT_OFFSET, 14750 },
{ 0xfeec, G_UNICODE_NOT_PRESENT_OFFSET, 14750 },
{ 0xfeed, G_UNICODE_NOT_PRESENT_OFFSET, 14753 },
{ 0xfeee, G_UNICODE_NOT_PRESENT_OFFSET, 14753 },
{ 0xfeef, G_UNICODE_NOT_PRESENT_OFFSET, 12802 },
{ 0xfef0, G_UNICODE_NOT_PRESENT_OFFSET, 12802 },
{ 0xfef1, G_UNICODE_NOT_PRESENT_OFFSET, 14756 },
{ 0xfef2, G_UNICODE_NOT_PRESENT_OFFSET, 14756 },
{ 0xfef3, G_UNICODE_NOT_PRESENT_OFFSET, 14756 },
{ 0xfef4, G_UNICODE_NOT_PRESENT_OFFSET, 14756 },
{ 0xfef5, G_UNICODE_NOT_PRESENT_OFFSET, 14759 },
{ 0xfef6, G_UNICODE_NOT_PRESENT_OFFSET, 14759 },
{ 0xfef7, G_UNICODE_NOT_PRESENT_OFFSET, 14766 },
{ 0xfef8, G_UNICODE_NOT_PRESENT_OFFSET, 14766 },
{ 0xfef9, G_UNICODE_NOT_PRESENT_OFFSET, 14773 },
{ 0xfefa, G_UNICODE_NOT_PRESENT_OFFSET, 14773 },
{ 0xfefb, G_UNICODE_NOT_PRESENT_OFFSET, 14780 },
{ 0xfefc, G_UNICODE_NOT_PRESENT_OFFSET, 14780 },
{ 0xff01, G_UNICODE_NOT_PRESENT_OFFSET, 14517 },
{ 0xff02, G_UNICODE_NOT_PRESENT_OFFSET, 14785 },
{ 0xff03, G_UNICODE_NOT_PRESENT_OFFSET, 14587 },
{ 0xff04, G_UNICODE_NOT_PRESENT_OFFSET, 14601 },
{ 0xff05, G_UNICODE_NOT_PRESENT_OFFSET, 14603 },
{ 0xff06, G_UNICODE_NOT_PRESENT_OFFSET, 14589 },
{ 0xff07, G_UNICODE_NOT_PRESENT_OFFSET, 14787 },
{ 0xff08, G_UNICODE_NOT_PRESENT_OFFSET, 5275 },
{ 0xff09, G_UNICODE_NOT_PRESENT_OFFSET, 5277 },
{ 0xff0a, G_UNICODE_NOT_PRESENT_OFFSET, 14591 },
{ 0xff0b, G_UNICODE_NOT_PRESENT_OFFSET, 5267 },
{ 0xff0c, G_UNICODE_NOT_PRESENT_OFFSET, 14505 },
{ 0xff0d, G_UNICODE_NOT_PRESENT_OFFSET, 14593 },
{ 0xff0e, G_UNICODE_NOT_PRESENT_OFFSET, 5181 },
{ 0xff0f, G_UNICODE_NOT_PRESENT_OFFSET, 14789 },
{ 0xff10, G_UNICODE_NOT_PRESENT_OFFSET, 5253 },
{ 0xff11, G_UNICODE_NOT_PRESENT_OFFSET, 27 },
{ 0xff12, G_UNICODE_NOT_PRESENT_OFFSET, 12 },
{ 0xff13, G_UNICODE_NOT_PRESENT_OFFSET, 14 },
{ 0xff14, G_UNICODE_NOT_PRESENT_OFFSET, 5255 },
{ 0xff15, G_UNICODE_NOT_PRESENT_OFFSET, 5257 },
{ 0xff16, G_UNICODE_NOT_PRESENT_OFFSET, 5259 },
{ 0xff17, G_UNICODE_NOT_PRESENT_OFFSET, 5261 },
{ 0xff18, G_UNICODE_NOT_PRESENT_OFFSET, 5263 },
{ 0xff19, G_UNICODE_NOT_PRESENT_OFFSET, 5265 },
{ 0xff1a, G_UNICODE_NOT_PRESENT_OFFSET, 14515 },
{ 0xff1b, G_UNICODE_NOT_PRESENT_OFFSET, 1248 },
{ 0xff1c, G_UNICODE_NOT_PRESENT_OFFSET, 14595 },
{ 0xff1d, G_UNICODE_NOT_PRESENT_OFFSET, 5273 },
{ 0xff1e, G_UNICODE_NOT_PRESENT_OFFSET, 14597 },
{ 0xff1f, G_UNICODE_NOT_PRESENT_OFFSET, 14519 },
{ 0xff20, G_UNICODE_NOT_PRESENT_OFFSET, 14605 },
{ 0xff21, G_UNICODE_NOT_PRESENT_OFFSET, 2309 },
{ 0xff22, G_UNICODE_NOT_PRESENT_OFFSET, 2314 },
{ 0xff23, G_UNICODE_NOT_PRESENT_OFFSET, 5292 },
{ 0xff24, G_UNICODE_NOT_PRESENT_OFFSET, 2316 },
{ 0xff25, G_UNICODE_NOT_PRESENT_OFFSET, 2318 },
{ 0xff26, G_UNICODE_NOT_PRESENT_OFFSET, 5336 },
{ 0xff27, G_UNICODE_NOT_PRESENT_OFFSET, 2323 },
{ 0xff28, G_UNICODE_NOT_PRESENT_OFFSET, 2325 },
{ 0xff29, G_UNICODE_NOT_PRESENT_OFFSET, 2327 },
{ 0xff2a, G_UNICODE_NOT_PRESENT_OFFSET, 2329 },
{ 0xff2b, G_UNICODE_NOT_PRESENT_OFFSET, 2331 },
{ 0xff2c, G_UNICODE_NOT_PRESENT_OFFSET, 2333 },
{ 0xff2d, G_UNICODE_NOT_PRESENT_OFFSET, 2335 },
{ 0xff2e, G_UNICODE_NOT_PRESENT_OFFSET, 2337 },
{ 0xff2f, G_UNICODE_NOT_PRESENT_OFFSET, 2339 },
{ 0xff30, G_UNICODE_NOT_PRESENT_OFFSET, 2344 },
{ 0xff31, G_UNICODE_NOT_PRESENT_OFFSET, 5319 },
{ 0xff32, G_UNICODE_NOT_PRESENT_OFFSET, 2346 },
{ 0xff33, G_UNICODE_NOT_PRESENT_OFFSET, 6108 },
{ 0xff34, G_UNICODE_NOT_PRESENT_OFFSET, 2348 },
{ 0xff35, G_UNICODE_NOT_PRESENT_OFFSET, 2350 },
{ 0xff36, G_UNICODE_NOT_PRESENT_OFFSET, 5451 },
{ 0xff37, G_UNICODE_NOT_PRESENT_OFFSET, 2352 },
{ 0xff38, G_UNICODE_NOT_PRESENT_OFFSET, 5468 },
{ 0xff39, G_UNICODE_NOT_PRESENT_OFFSET, 6110 },
{ 0xff3a, G_UNICODE_NOT_PRESENT_OFFSET, 5331 },
{ 0xff3b, G_UNICODE_NOT_PRESENT_OFFSET, 14583 },
{ 0xff3c, G_UNICODE_NOT_PRESENT_OFFSET, 14599 },
{ 0xff3d, G_UNICODE_NOT_PRESENT_OFFSET, 14585 },
{ 0xff3e, G_UNICODE_NOT_PRESENT_OFFSET, 14791 },
{ 0xff3f, G_UNICODE_NOT_PRESENT_OFFSET, 14537 },
{ 0xff40, G_UNICODE_NOT_PRESENT_OFFSET, 5110 },
{ 0xff41, G_UNICODE_NOT_PRESENT_OFFSET, 6 },
{ 0xff42, G_UNICODE_NOT_PRESENT_OFFSET, 2364 },
{ 0xff43, G_UNICODE_NOT_PRESENT_OFFSET, 2435 },
{ 0xff44, G_UNICODE_NOT_PRESENT_OFFSET, 2366 },
{ 0xff45, G_UNICODE_NOT_PRESENT_OFFSET, 2368 },
{ 0xff46, G_UNICODE_NOT_PRESENT_OFFSET, 2443 },
{ 0xff47, G_UNICODE_NOT_PRESENT_OFFSET, 2379 },
{ 0xff48, G_UNICODE_NOT_PRESENT_OFFSET, 1171 },
{ 0xff49, G_UNICODE_NOT_PRESENT_OFFSET, 2427 },
{ 0xff4a, G_UNICODE_NOT_PRESENT_OFFSET, 1176 },
{ 0xff4b, G_UNICODE_NOT_PRESENT_OFFSET, 2381 },
{ 0xff4c, G_UNICODE_NOT_PRESENT_OFFSET, 1220 },
{ 0xff4d, G_UNICODE_NOT_PRESENT_OFFSET, 2383 },
{ 0xff4e, G_UNICODE_NOT_PRESENT_OFFSET, 5279 },
{ 0xff4f, G_UNICODE_NOT_PRESENT_OFFSET, 29 },
{ 0xff50, G_UNICODE_NOT_PRESENT_OFFSET, 2399 },
{ 0xff51, G_UNICODE_NOT_PRESENT_OFFSET, 6112 },
{ 0xff52, G_UNICODE_NOT_PRESENT_OFFSET, 1178 },
{ 0xff53, G_UNICODE_NOT_PRESENT_OFFSET, 711 },
{ 0xff54, G_UNICODE_NOT_PRESENT_OFFSET, 2401 },
{ 0xff55, G_UNICODE_NOT_PRESENT_OFFSET, 2403 },
{ 0xff56, G_UNICODE_NOT_PRESENT_OFFSET, 2412 },
{ 0xff57, G_UNICODE_NOT_PRESENT_OFFSET, 1189 },
{ 0xff58, G_UNICODE_NOT_PRESENT_OFFSET, 1222 },
{ 0xff59, G_UNICODE_NOT_PRESENT_OFFSET, 1191 },
{ 0xff5a, G_UNICODE_NOT_PRESENT_OFFSET, 2526 },
{ 0xff5b, G_UNICODE_NOT_PRESENT_OFFSET, 14539 },
{ 0xff5c, G_UNICODE_NOT_PRESENT_OFFSET, 14793 },
{ 0xff5d, G_UNICODE_NOT_PRESENT_OFFSET, 14541 },
{ 0xff5e, G_UNICODE_NOT_PRESENT_OFFSET, 14795 },
{ 0xff5f, G_UNICODE_NOT_PRESENT_OFFSET, 14797 },
{ 0xff60, G_UNICODE_NOT_PRESENT_OFFSET, 14801 },
{ 0xff61, G_UNICODE_NOT_PRESENT_OFFSET, 14511 },
{ 0xff62, G_UNICODE_NOT_PRESENT_OFFSET, 14567 },
{ 0xff63, G_UNICODE_NOT_PRESENT_OFFSET, 14571 },
{ 0xff64, G_UNICODE_NOT_PRESENT_OFFSET, 14507 },
{ 0xff65, G_UNICODE_NOT_PRESENT_OFFSET, 14805 },
{ 0xff66, G_UNICODE_NOT_PRESENT_OFFSET, 8955 },
{ 0xff67, G_UNICODE_NOT_PRESENT_OFFSET, 14809 },
{ 0xff68, G_UNICODE_NOT_PRESENT_OFFSET, 14813 },
{ 0xff69, G_UNICODE_NOT_PRESENT_OFFSET, 14817 },
{ 0xff6a, G_UNICODE_NOT_PRESENT_OFFSET, 14821 },
{ 0xff6b, G_UNICODE_NOT_PRESENT_OFFSET, 14825 },
{ 0xff6c, G_UNICODE_NOT_PRESENT_OFFSET, 14829 },
{ 0xff6d, G_UNICODE_NOT_PRESENT_OFFSET, 14833 },
{ 0xff6e, G_UNICODE_NOT_PRESENT_OFFSET, 14837 },
{ 0xff6f, G_UNICODE_NOT_PRESENT_OFFSET, 14841 },
{ 0xff70, G_UNICODE_NOT_PRESENT_OFFSET, 14845 },
{ 0xff71, G_UNICODE_NOT_PRESENT_OFFSET, 8771 },
{ 0xff72, G_UNICODE_NOT_PRESENT_OFFSET, 8775 },
{ 0xff73, G_UNICODE_NOT_PRESENT_OFFSET, 8779 },
{ 0xff74, G_UNICODE_NOT_PRESENT_OFFSET, 8783 },
{ 0xff75, G_UNICODE_NOT_PRESENT_OFFSET, 8787 },
{ 0xff76, G_UNICODE_NOT_PRESENT_OFFSET, 8791 },
{ 0xff77, G_UNICODE_NOT_PRESENT_OFFSET, 8795 },
{ 0xff78, G_UNICODE_NOT_PRESENT_OFFSET, 8799 },
{ 0xff79, G_UNICODE_NOT_PRESENT_OFFSET, 8803 },
{ 0xff7a, G_UNICODE_NOT_PRESENT_OFFSET, 8807 },
{ 0xff7b, G_UNICODE_NOT_PRESENT_OFFSET, 8811 },
{ 0xff7c, G_UNICODE_NOT_PRESENT_OFFSET, 8815 },
{ 0xff7d, G_UNICODE_NOT_PRESENT_OFFSET, 8819 },
{ 0xff7e, G_UNICODE_NOT_PRESENT_OFFSET, 8823 },
{ 0xff7f, G_UNICODE_NOT_PRESENT_OFFSET, 8827 },
{ 0xff80, G_UNICODE_NOT_PRESENT_OFFSET, 8831 },
{ 0xff81, G_UNICODE_NOT_PRESENT_OFFSET, 8835 },
{ 0xff82, G_UNICODE_NOT_PRESENT_OFFSET, 8839 },
{ 0xff83, G_UNICODE_NOT_PRESENT_OFFSET, 8843 },
{ 0xff84, G_UNICODE_NOT_PRESENT_OFFSET, 8847 },
{ 0xff85, G_UNICODE_NOT_PRESENT_OFFSET, 8851 },
{ 0xff86, G_UNICODE_NOT_PRESENT_OFFSET, 8855 },
{ 0xff87, G_UNICODE_NOT_PRESENT_OFFSET, 8859 },
{ 0xff88, G_UNICODE_NOT_PRESENT_OFFSET, 8863 },
{ 0xff89, G_UNICODE_NOT_PRESENT_OFFSET, 8867 },
{ 0xff8a, G_UNICODE_NOT_PRESENT_OFFSET, 8871 },
{ 0xff8b, G_UNICODE_NOT_PRESENT_OFFSET, 8875 },
{ 0xff8c, G_UNICODE_NOT_PRESENT_OFFSET, 8879 },
{ 0xff8d, G_UNICODE_NOT_PRESENT_OFFSET, 8883 },
{ 0xff8e, G_UNICODE_NOT_PRESENT_OFFSET, 8887 },
{ 0xff8f, G_UNICODE_NOT_PRESENT_OFFSET, 8891 },
{ 0xff90, G_UNICODE_NOT_PRESENT_OFFSET, 8895 },
{ 0xff91, G_UNICODE_NOT_PRESENT_OFFSET, 8899 },
{ 0xff92, G_UNICODE_NOT_PRESENT_OFFSET, 8903 },
{ 0xff93, G_UNICODE_NOT_PRESENT_OFFSET, 8907 },
{ 0xff94, G_UNICODE_NOT_PRESENT_OFFSET, 8911 },
{ 0xff95, G_UNICODE_NOT_PRESENT_OFFSET, 8915 },
{ 0xff96, G_UNICODE_NOT_PRESENT_OFFSET, 8919 },
{ 0xff97, G_UNICODE_NOT_PRESENT_OFFSET, 8923 },
{ 0xff98, G_UNICODE_NOT_PRESENT_OFFSET, 8927 },
{ 0xff99, G_UNICODE_NOT_PRESENT_OFFSET, 8931 },
{ 0xff9a, G_UNICODE_NOT_PRESENT_OFFSET, 8935 },
{ 0xff9b, G_UNICODE_NOT_PRESENT_OFFSET, 8939 },
{ 0xff9c, G_UNICODE_NOT_PRESENT_OFFSET, 8943 },
{ 0xff9d, G_UNICODE_NOT_PRESENT_OFFSET, 14849 },
{ 0xff9e, G_UNICODE_NOT_PRESENT_OFFSET, 14853 },
{ 0xff9f, G_UNICODE_NOT_PRESENT_OFFSET, 14857 },
{ 0xffa0, G_UNICODE_NOT_PRESENT_OFFSET, 7658 },
{ 0xffa1, G_UNICODE_NOT_PRESENT_OFFSET, 7454 },
{ 0xffa2, G_UNICODE_NOT_PRESENT_OFFSET, 7458 },
{ 0xffa3, G_UNICODE_NOT_PRESENT_OFFSET, 7462 },
{ 0xffa4, G_UNICODE_NOT_PRESENT_OFFSET, 7466 },
{ 0xffa5, G_UNICODE_NOT_PRESENT_OFFSET, 7470 },
{ 0xffa6, G_UNICODE_NOT_PRESENT_OFFSET, 7474 },
{ 0xffa7, G_UNICODE_NOT_PRESENT_OFFSET, 7478 },
{ 0xffa8, G_UNICODE_NOT_PRESENT_OFFSET, 7482 },
{ 0xffa9, G_UNICODE_NOT_PRESENT_OFFSET, 7486 },
{ 0xffaa, G_UNICODE_NOT_PRESENT_OFFSET, 7490 },
{ 0xffab, G_UNICODE_NOT_PRESENT_OFFSET, 7494 },
{ 0xffac, G_UNICODE_NOT_PRESENT_OFFSET, 7498 },
{ 0xffad, G_UNICODE_NOT_PRESENT_OFFSET, 7502 },
{ 0xffae, G_UNICODE_NOT_PRESENT_OFFSET, 7506 },
{ 0xffaf, G_UNICODE_NOT_PRESENT_OFFSET, 7510 },
{ 0xffb0, G_UNICODE_NOT_PRESENT_OFFSET, 7514 },
{ 0xffb1, G_UNICODE_NOT_PRESENT_OFFSET, 7518 },
{ 0xffb2, G_UNICODE_NOT_PRESENT_OFFSET, 7522 },
{ 0xffb3, G_UNICODE_NOT_PRESENT_OFFSET, 7526 },
{ 0xffb4, G_UNICODE_NOT_PRESENT_OFFSET, 7530 },
{ 0xffb5, G_UNICODE_NOT_PRESENT_OFFSET, 7534 },
{ 0xffb6, G_UNICODE_NOT_PRESENT_OFFSET, 7538 },
{ 0xffb7, G_UNICODE_NOT_PRESENT_OFFSET, 7542 },
{ 0xffb8, G_UNICODE_NOT_PRESENT_OFFSET, 7546 },
{ 0xffb9, G_UNICODE_NOT_PRESENT_OFFSET, 7550 },
{ 0xffba, G_UNICODE_NOT_PRESENT_OFFSET, 7554 },
{ 0xffbb, G_UNICODE_NOT_PRESENT_OFFSET, 7558 },
{ 0xffbc, G_UNICODE_NOT_PRESENT_OFFSET, 7562 },
{ 0xffbd, G_UNICODE_NOT_PRESENT_OFFSET, 7566 },
{ 0xffbe, G_UNICODE_NOT_PRESENT_OFFSET, 7570 },
{ 0xffc2, G_UNICODE_NOT_PRESENT_OFFSET, 7574 },
{ 0xffc3, G_UNICODE_NOT_PRESENT_OFFSET, 7578 },
{ 0xffc4, G_UNICODE_NOT_PRESENT_OFFSET, 7582 },
{ 0xffc5, G_UNICODE_NOT_PRESENT_OFFSET, 7586 },
{ 0xffc6, G_UNICODE_NOT_PRESENT_OFFSET, 7590 },
{ 0xffc7, G_UNICODE_NOT_PRESENT_OFFSET, 7594 },
{ 0xffca, G_UNICODE_NOT_PRESENT_OFFSET, 7598 },
{ 0xffcb, G_UNICODE_NOT_PRESENT_OFFSET, 7602 },
{ 0xffcc, G_UNICODE_NOT_PRESENT_OFFSET, 7606 },
{ 0xffcd, G_UNICODE_NOT_PRESENT_OFFSET, 7610 },
{ 0xffce, G_UNICODE_NOT_PRESENT_OFFSET, 7614 },
{ 0xffcf, G_UNICODE_NOT_PRESENT_OFFSET, 7618 },
{ 0xffd2, G_UNICODE_NOT_PRESENT_OFFSET, 7622 },
{ 0xffd3, G_UNICODE_NOT_PRESENT_OFFSET, 7626 },
{ 0xffd4, G_UNICODE_NOT_PRESENT_OFFSET, 7630 },
{ 0xffd5, G_UNICODE_NOT_PRESENT_OFFSET, 7634 },
{ 0xffd6, G_UNICODE_NOT_PRESENT_OFFSET, 7638 },
{ 0xffd7, G_UNICODE_NOT_PRESENT_OFFSET, 7642 },
{ 0xffda, G_UNICODE_NOT_PRESENT_OFFSET, 7646 },
{ 0xffdb, G_UNICODE_NOT_PRESENT_OFFSET, 7650 },
{ 0xffdc, G_UNICODE_NOT_PRESENT_OFFSET, 7654 },
{ 0xffe0, G_UNICODE_NOT_PRESENT_OFFSET, 14861 },
{ 0xffe1, G_UNICODE_NOT_PRESENT_OFFSET, 14864 },
{ 0xffe2, G_UNICODE_NOT_PRESENT_OFFSET, 14867 },
{ 0xffe3, G_UNICODE_NOT_PRESENT_OFFSET, 8 },
{ 0xffe4, G_UNICODE_NOT_PRESENT_OFFSET, 14870 },
{ 0xffe5, G_UNICODE_NOT_PRESENT_OFFSET, 14873 },
{ 0xffe6, G_UNICODE_NOT_PRESENT_OFFSET, 14876 },
{ 0xffe8, G_UNICODE_NOT_PRESENT_OFFSET, 14880 },
{ 0xffe9, G_UNICODE_NOT_PRESENT_OFFSET, 14884 },
{ 0xffea, G_UNICODE_NOT_PRESENT_OFFSET, 14888 },
{ 0xffeb, G_UNICODE_NOT_PRESENT_OFFSET, 14892 },
{ 0xffec, G_UNICODE_NOT_PRESENT_OFFSET, 14896 },
{ 0xffed, G_UNICODE_NOT_PRESENT_OFFSET, 14900 },
{ 0xffee, G_UNICODE_NOT_PRESENT_OFFSET, 14904 },
{ 0x1d15e, 14908, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1d15f, 14917, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1d160, 14926, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1d161, 14939, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1d162, 14952, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1d163, 14965, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1d164, 14978, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1d1bb, 14991, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1d1bc, 15000, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1d1bd, 15009, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1d1be, 15022, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1d1bf, 15035, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1d1c0, 15048, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x1d400, G_UNICODE_NOT_PRESENT_OFFSET, 2309 },
{ 0x1d401, G_UNICODE_NOT_PRESENT_OFFSET, 2314 },
{ 0x1d402, G_UNICODE_NOT_PRESENT_OFFSET, 5292 },
{ 0x1d403, G_UNICODE_NOT_PRESENT_OFFSET, 2316 },
{ 0x1d404, G_UNICODE_NOT_PRESENT_OFFSET, 2318 },
{ 0x1d405, G_UNICODE_NOT_PRESENT_OFFSET, 5336 },
{ 0x1d406, G_UNICODE_NOT_PRESENT_OFFSET, 2323 },
{ 0x1d407, G_UNICODE_NOT_PRESENT_OFFSET, 2325 },
{ 0x1d408, G_UNICODE_NOT_PRESENT_OFFSET, 2327 },
{ 0x1d409, G_UNICODE_NOT_PRESENT_OFFSET, 2329 },
{ 0x1d40a, G_UNICODE_NOT_PRESENT_OFFSET, 2331 },
{ 0x1d40b, G_UNICODE_NOT_PRESENT_OFFSET, 2333 },
{ 0x1d40c, G_UNICODE_NOT_PRESENT_OFFSET, 2335 },
{ 0x1d40d, G_UNICODE_NOT_PRESENT_OFFSET, 2337 },
{ 0x1d40e, G_UNICODE_NOT_PRESENT_OFFSET, 2339 },
{ 0x1d40f, G_UNICODE_NOT_PRESENT_OFFSET, 2344 },
{ 0x1d410, G_UNICODE_NOT_PRESENT_OFFSET, 5319 },
{ 0x1d411, G_UNICODE_NOT_PRESENT_OFFSET, 2346 },
{ 0x1d412, G_UNICODE_NOT_PRESENT_OFFSET, 6108 },
{ 0x1d413, G_UNICODE_NOT_PRESENT_OFFSET, 2348 },
{ 0x1d414, G_UNICODE_NOT_PRESENT_OFFSET, 2350 },
{ 0x1d415, G_UNICODE_NOT_PRESENT_OFFSET, 5451 },
{ 0x1d416, G_UNICODE_NOT_PRESENT_OFFSET, 2352 },
{ 0x1d417, G_UNICODE_NOT_PRESENT_OFFSET, 5468 },
{ 0x1d418, G_UNICODE_NOT_PRESENT_OFFSET, 6110 },
{ 0x1d419, G_UNICODE_NOT_PRESENT_OFFSET, 5331 },
{ 0x1d41a, G_UNICODE_NOT_PRESENT_OFFSET, 6 },
{ 0x1d41b, G_UNICODE_NOT_PRESENT_OFFSET, 2364 },
{ 0x1d41c, G_UNICODE_NOT_PRESENT_OFFSET, 2435 },
{ 0x1d41d, G_UNICODE_NOT_PRESENT_OFFSET, 2366 },
{ 0x1d41e, G_UNICODE_NOT_PRESENT_OFFSET, 2368 },
{ 0x1d41f, G_UNICODE_NOT_PRESENT_OFFSET, 2443 },
{ 0x1d420, G_UNICODE_NOT_PRESENT_OFFSET, 2379 },
{ 0x1d421, G_UNICODE_NOT_PRESENT_OFFSET, 1171 },
{ 0x1d422, G_UNICODE_NOT_PRESENT_OFFSET, 2427 },
{ 0x1d423, G_UNICODE_NOT_PRESENT_OFFSET, 1176 },
{ 0x1d424, G_UNICODE_NOT_PRESENT_OFFSET, 2381 },
{ 0x1d425, G_UNICODE_NOT_PRESENT_OFFSET, 1220 },
{ 0x1d426, G_UNICODE_NOT_PRESENT_OFFSET, 2383 },
{ 0x1d427, G_UNICODE_NOT_PRESENT_OFFSET, 5279 },
{ 0x1d428, G_UNICODE_NOT_PRESENT_OFFSET, 29 },
{ 0x1d429, G_UNICODE_NOT_PRESENT_OFFSET, 2399 },
{ 0x1d42a, G_UNICODE_NOT_PRESENT_OFFSET, 6112 },
{ 0x1d42b, G_UNICODE_NOT_PRESENT_OFFSET, 1178 },
{ 0x1d42c, G_UNICODE_NOT_PRESENT_OFFSET, 711 },
{ 0x1d42d, G_UNICODE_NOT_PRESENT_OFFSET, 2401 },
{ 0x1d42e, G_UNICODE_NOT_PRESENT_OFFSET, 2403 },
{ 0x1d42f, G_UNICODE_NOT_PRESENT_OFFSET, 2412 },
{ 0x1d430, G_UNICODE_NOT_PRESENT_OFFSET, 1189 },
{ 0x1d431, G_UNICODE_NOT_PRESENT_OFFSET, 1222 },
{ 0x1d432, G_UNICODE_NOT_PRESENT_OFFSET, 1191 },
{ 0x1d433, G_UNICODE_NOT_PRESENT_OFFSET, 2526 },
{ 0x1d434, G_UNICODE_NOT_PRESENT_OFFSET, 2309 },
{ 0x1d435, G_UNICODE_NOT_PRESENT_OFFSET, 2314 },
{ 0x1d436, G_UNICODE_NOT_PRESENT_OFFSET, 5292 },
{ 0x1d437, G_UNICODE_NOT_PRESENT_OFFSET, 2316 },
{ 0x1d438, G_UNICODE_NOT_PRESENT_OFFSET, 2318 },
{ 0x1d439, G_UNICODE_NOT_PRESENT_OFFSET, 5336 },
{ 0x1d43a, G_UNICODE_NOT_PRESENT_OFFSET, 2323 },
{ 0x1d43b, G_UNICODE_NOT_PRESENT_OFFSET, 2325 },
{ 0x1d43c, G_UNICODE_NOT_PRESENT_OFFSET, 2327 },
{ 0x1d43d, G_UNICODE_NOT_PRESENT_OFFSET, 2329 },
{ 0x1d43e, G_UNICODE_NOT_PRESENT_OFFSET, 2331 },
{ 0x1d43f, G_UNICODE_NOT_PRESENT_OFFSET, 2333 },
{ 0x1d440, G_UNICODE_NOT_PRESENT_OFFSET, 2335 },
{ 0x1d441, G_UNICODE_NOT_PRESENT_OFFSET, 2337 },
{ 0x1d442, G_UNICODE_NOT_PRESENT_OFFSET, 2339 },
{ 0x1d443, G_UNICODE_NOT_PRESENT_OFFSET, 2344 },
{ 0x1d444, G_UNICODE_NOT_PRESENT_OFFSET, 5319 },
{ 0x1d445, G_UNICODE_NOT_PRESENT_OFFSET, 2346 },
{ 0x1d446, G_UNICODE_NOT_PRESENT_OFFSET, 6108 },
{ 0x1d447, G_UNICODE_NOT_PRESENT_OFFSET, 2348 },
{ 0x1d448, G_UNICODE_NOT_PRESENT_OFFSET, 2350 },
{ 0x1d449, G_UNICODE_NOT_PRESENT_OFFSET, 5451 },
{ 0x1d44a, G_UNICODE_NOT_PRESENT_OFFSET, 2352 },
{ 0x1d44b, G_UNICODE_NOT_PRESENT_OFFSET, 5468 },
{ 0x1d44c, G_UNICODE_NOT_PRESENT_OFFSET, 6110 },
{ 0x1d44d, G_UNICODE_NOT_PRESENT_OFFSET, 5331 },
{ 0x1d44e, G_UNICODE_NOT_PRESENT_OFFSET, 6 },
{ 0x1d44f, G_UNICODE_NOT_PRESENT_OFFSET, 2364 },
{ 0x1d450, G_UNICODE_NOT_PRESENT_OFFSET, 2435 },
{ 0x1d451, G_UNICODE_NOT_PRESENT_OFFSET, 2366 },
{ 0x1d452, G_UNICODE_NOT_PRESENT_OFFSET, 2368 },
{ 0x1d453, G_UNICODE_NOT_PRESENT_OFFSET, 2443 },
{ 0x1d454, G_UNICODE_NOT_PRESENT_OFFSET, 2379 },
{ 0x1d456, G_UNICODE_NOT_PRESENT_OFFSET, 2427 },
{ 0x1d457, G_UNICODE_NOT_PRESENT_OFFSET, 1176 },
{ 0x1d458, G_UNICODE_NOT_PRESENT_OFFSET, 2381 },
{ 0x1d459, G_UNICODE_NOT_PRESENT_OFFSET, 1220 },
{ 0x1d45a, G_UNICODE_NOT_PRESENT_OFFSET, 2383 },
{ 0x1d45b, G_UNICODE_NOT_PRESENT_OFFSET, 5279 },
{ 0x1d45c, G_UNICODE_NOT_PRESENT_OFFSET, 29 },
{ 0x1d45d, G_UNICODE_NOT_PRESENT_OFFSET, 2399 },
{ 0x1d45e, G_UNICODE_NOT_PRESENT_OFFSET, 6112 },
{ 0x1d45f, G_UNICODE_NOT_PRESENT_OFFSET, 1178 },
{ 0x1d460, G_UNICODE_NOT_PRESENT_OFFSET, 711 },
{ 0x1d461, G_UNICODE_NOT_PRESENT_OFFSET, 2401 },
{ 0x1d462, G_UNICODE_NOT_PRESENT_OFFSET, 2403 },
{ 0x1d463, G_UNICODE_NOT_PRESENT_OFFSET, 2412 },
{ 0x1d464, G_UNICODE_NOT_PRESENT_OFFSET, 1189 },
{ 0x1d465, G_UNICODE_NOT_PRESENT_OFFSET, 1222 },
{ 0x1d466, G_UNICODE_NOT_PRESENT_OFFSET, 1191 },
{ 0x1d467, G_UNICODE_NOT_PRESENT_OFFSET, 2526 },
{ 0x1d468, G_UNICODE_NOT_PRESENT_OFFSET, 2309 },
{ 0x1d469, G_UNICODE_NOT_PRESENT_OFFSET, 2314 },
{ 0x1d46a, G_UNICODE_NOT_PRESENT_OFFSET, 5292 },
{ 0x1d46b, G_UNICODE_NOT_PRESENT_OFFSET, 2316 },
{ 0x1d46c, G_UNICODE_NOT_PRESENT_OFFSET, 2318 },
{ 0x1d46d, G_UNICODE_NOT_PRESENT_OFFSET, 5336 },
{ 0x1d46e, G_UNICODE_NOT_PRESENT_OFFSET, 2323 },
{ 0x1d46f, G_UNICODE_NOT_PRESENT_OFFSET, 2325 },
{ 0x1d470, G_UNICODE_NOT_PRESENT_OFFSET, 2327 },
{ 0x1d471, G_UNICODE_NOT_PRESENT_OFFSET, 2329 },
{ 0x1d472, G_UNICODE_NOT_PRESENT_OFFSET, 2331 },
{ 0x1d473, G_UNICODE_NOT_PRESENT_OFFSET, 2333 },
{ 0x1d474, G_UNICODE_NOT_PRESENT_OFFSET, 2335 },
{ 0x1d475, G_UNICODE_NOT_PRESENT_OFFSET, 2337 },
{ 0x1d476, G_UNICODE_NOT_PRESENT_OFFSET, 2339 },
{ 0x1d477, G_UNICODE_NOT_PRESENT_OFFSET, 2344 },
{ 0x1d478, G_UNICODE_NOT_PRESENT_OFFSET, 5319 },
{ 0x1d479, G_UNICODE_NOT_PRESENT_OFFSET, 2346 },
{ 0x1d47a, G_UNICODE_NOT_PRESENT_OFFSET, 6108 },
{ 0x1d47b, G_UNICODE_NOT_PRESENT_OFFSET, 2348 },
{ 0x1d47c, G_UNICODE_NOT_PRESENT_OFFSET, 2350 },
{ 0x1d47d, G_UNICODE_NOT_PRESENT_OFFSET, 5451 },
{ 0x1d47e, G_UNICODE_NOT_PRESENT_OFFSET, 2352 },
{ 0x1d47f, G_UNICODE_NOT_PRESENT_OFFSET, 5468 },
{ 0x1d480, G_UNICODE_NOT_PRESENT_OFFSET, 6110 },
{ 0x1d481, G_UNICODE_NOT_PRESENT_OFFSET, 5331 },
{ 0x1d482, G_UNICODE_NOT_PRESENT_OFFSET, 6 },
{ 0x1d483, G_UNICODE_NOT_PRESENT_OFFSET, 2364 },
{ 0x1d484, G_UNICODE_NOT_PRESENT_OFFSET, 2435 },
{ 0x1d485, G_UNICODE_NOT_PRESENT_OFFSET, 2366 },
{ 0x1d486, G_UNICODE_NOT_PRESENT_OFFSET, 2368 },
{ 0x1d487, G_UNICODE_NOT_PRESENT_OFFSET, 2443 },
{ 0x1d488, G_UNICODE_NOT_PRESENT_OFFSET, 2379 },
{ 0x1d489, G_UNICODE_NOT_PRESENT_OFFSET, 1171 },
{ 0x1d48a, G_UNICODE_NOT_PRESENT_OFFSET, 2427 },
{ 0x1d48b, G_UNICODE_NOT_PRESENT_OFFSET, 1176 },
{ 0x1d48c, G_UNICODE_NOT_PRESENT_OFFSET, 2381 },
{ 0x1d48d, G_UNICODE_NOT_PRESENT_OFFSET, 1220 },
{ 0x1d48e, G_UNICODE_NOT_PRESENT_OFFSET, 2383 },
{ 0x1d48f, G_UNICODE_NOT_PRESENT_OFFSET, 5279 },
{ 0x1d490, G_UNICODE_NOT_PRESENT_OFFSET, 29 },
{ 0x1d491, G_UNICODE_NOT_PRESENT_OFFSET, 2399 },
{ 0x1d492, G_UNICODE_NOT_PRESENT_OFFSET, 6112 },
{ 0x1d493, G_UNICODE_NOT_PRESENT_OFFSET, 1178 },
{ 0x1d494, G_UNICODE_NOT_PRESENT_OFFSET, 711 },
{ 0x1d495, G_UNICODE_NOT_PRESENT_OFFSET, 2401 },
{ 0x1d496, G_UNICODE_NOT_PRESENT_OFFSET, 2403 },
{ 0x1d497, G_UNICODE_NOT_PRESENT_OFFSET, 2412 },
{ 0x1d498, G_UNICODE_NOT_PRESENT_OFFSET, 1189 },
{ 0x1d499, G_UNICODE_NOT_PRESENT_OFFSET, 1222 },
{ 0x1d49a, G_UNICODE_NOT_PRESENT_OFFSET, 1191 },
{ 0x1d49b, G_UNICODE_NOT_PRESENT_OFFSET, 2526 },
{ 0x1d49c, G_UNICODE_NOT_PRESENT_OFFSET, 2309 },
{ 0x1d49e, G_UNICODE_NOT_PRESENT_OFFSET, 5292 },
{ 0x1d49f, G_UNICODE_NOT_PRESENT_OFFSET, 2316 },
{ 0x1d4a2, G_UNICODE_NOT_PRESENT_OFFSET, 2323 },
{ 0x1d4a5, G_UNICODE_NOT_PRESENT_OFFSET, 2329 },
{ 0x1d4a6, G_UNICODE_NOT_PRESENT_OFFSET, 2331 },
{ 0x1d4a9, G_UNICODE_NOT_PRESENT_OFFSET, 2337 },
{ 0x1d4aa, G_UNICODE_NOT_PRESENT_OFFSET, 2339 },
{ 0x1d4ab, G_UNICODE_NOT_PRESENT_OFFSET, 2344 },
{ 0x1d4ac, G_UNICODE_NOT_PRESENT_OFFSET, 5319 },
{ 0x1d4ae, G_UNICODE_NOT_PRESENT_OFFSET, 6108 },
{ 0x1d4af, G_UNICODE_NOT_PRESENT_OFFSET, 2348 },
{ 0x1d4b0, G_UNICODE_NOT_PRESENT_OFFSET, 2350 },
{ 0x1d4b1, G_UNICODE_NOT_PRESENT_OFFSET, 5451 },
{ 0x1d4b2, G_UNICODE_NOT_PRESENT_OFFSET, 2352 },
{ 0x1d4b3, G_UNICODE_NOT_PRESENT_OFFSET, 5468 },
{ 0x1d4b4, G_UNICODE_NOT_PRESENT_OFFSET, 6110 },
{ 0x1d4b5, G_UNICODE_NOT_PRESENT_OFFSET, 5331 },
{ 0x1d4b6, G_UNICODE_NOT_PRESENT_OFFSET, 6 },
{ 0x1d4b7, G_UNICODE_NOT_PRESENT_OFFSET, 2364 },
{ 0x1d4b8, G_UNICODE_NOT_PRESENT_OFFSET, 2435 },
{ 0x1d4b9, G_UNICODE_NOT_PRESENT_OFFSET, 2366 },
{ 0x1d4bb, G_UNICODE_NOT_PRESENT_OFFSET, 2443 },
{ 0x1d4bd, G_UNICODE_NOT_PRESENT_OFFSET, 1171 },
{ 0x1d4be, G_UNICODE_NOT_PRESENT_OFFSET, 2427 },
{ 0x1d4bf, G_UNICODE_NOT_PRESENT_OFFSET, 1176 },
{ 0x1d4c0, G_UNICODE_NOT_PRESENT_OFFSET, 2381 },
{ 0x1d4c1, G_UNICODE_NOT_PRESENT_OFFSET, 1220 },
{ 0x1d4c2, G_UNICODE_NOT_PRESENT_OFFSET, 2383 },
{ 0x1d4c3, G_UNICODE_NOT_PRESENT_OFFSET, 5279 },
{ 0x1d4c5, G_UNICODE_NOT_PRESENT_OFFSET, 2399 },
{ 0x1d4c6, G_UNICODE_NOT_PRESENT_OFFSET, 6112 },
{ 0x1d4c7, G_UNICODE_NOT_PRESENT_OFFSET, 1178 },
{ 0x1d4c8, G_UNICODE_NOT_PRESENT_OFFSET, 711 },
{ 0x1d4c9, G_UNICODE_NOT_PRESENT_OFFSET, 2401 },
{ 0x1d4ca, G_UNICODE_NOT_PRESENT_OFFSET, 2403 },
{ 0x1d4cb, G_UNICODE_NOT_PRESENT_OFFSET, 2412 },
{ 0x1d4cc, G_UNICODE_NOT_PRESENT_OFFSET, 1189 },
{ 0x1d4cd, G_UNICODE_NOT_PRESENT_OFFSET, 1222 },
{ 0x1d4ce, G_UNICODE_NOT_PRESENT_OFFSET, 1191 },
{ 0x1d4cf, G_UNICODE_NOT_PRESENT_OFFSET, 2526 },
{ 0x1d4d0, G_UNICODE_NOT_PRESENT_OFFSET, 2309 },
{ 0x1d4d1, G_UNICODE_NOT_PRESENT_OFFSET, 2314 },
{ 0x1d4d2, G_UNICODE_NOT_PRESENT_OFFSET, 5292 },
{ 0x1d4d3, G_UNICODE_NOT_PRESENT_OFFSET, 2316 },
{ 0x1d4d4, G_UNICODE_NOT_PRESENT_OFFSET, 2318 },
{ 0x1d4d5, G_UNICODE_NOT_PRESENT_OFFSET, 5336 },
{ 0x1d4d6, G_UNICODE_NOT_PRESENT_OFFSET, 2323 },
{ 0x1d4d7, G_UNICODE_NOT_PRESENT_OFFSET, 2325 },
{ 0x1d4d8, G_UNICODE_NOT_PRESENT_OFFSET, 2327 },
{ 0x1d4d9, G_UNICODE_NOT_PRESENT_OFFSET, 2329 },
{ 0x1d4da, G_UNICODE_NOT_PRESENT_OFFSET, 2331 },
{ 0x1d4db, G_UNICODE_NOT_PRESENT_OFFSET, 2333 },
{ 0x1d4dc, G_UNICODE_NOT_PRESENT_OFFSET, 2335 },
{ 0x1d4dd, G_UNICODE_NOT_PRESENT_OFFSET, 2337 },
{ 0x1d4de, G_UNICODE_NOT_PRESENT_OFFSET, 2339 },
{ 0x1d4df, G_UNICODE_NOT_PRESENT_OFFSET, 2344 },
{ 0x1d4e0, G_UNICODE_NOT_PRESENT_OFFSET, 5319 },
{ 0x1d4e1, G_UNICODE_NOT_PRESENT_OFFSET, 2346 },
{ 0x1d4e2, G_UNICODE_NOT_PRESENT_OFFSET, 6108 },
{ 0x1d4e3, G_UNICODE_NOT_PRESENT_OFFSET, 2348 },
{ 0x1d4e4, G_UNICODE_NOT_PRESENT_OFFSET, 2350 },
{ 0x1d4e5, G_UNICODE_NOT_PRESENT_OFFSET, 5451 },
{ 0x1d4e6, G_UNICODE_NOT_PRESENT_OFFSET, 2352 },
{ 0x1d4e7, G_UNICODE_NOT_PRESENT_OFFSET, 5468 },
{ 0x1d4e8, G_UNICODE_NOT_PRESENT_OFFSET, 6110 },
{ 0x1d4e9, G_UNICODE_NOT_PRESENT_OFFSET, 5331 },
{ 0x1d4ea, G_UNICODE_NOT_PRESENT_OFFSET, 6 },
{ 0x1d4eb, G_UNICODE_NOT_PRESENT_OFFSET, 2364 },
{ 0x1d4ec, G_UNICODE_NOT_PRESENT_OFFSET, 2435 },
{ 0x1d4ed, G_UNICODE_NOT_PRESENT_OFFSET, 2366 },
{ 0x1d4ee, G_UNICODE_NOT_PRESENT_OFFSET, 2368 },
{ 0x1d4ef, G_UNICODE_NOT_PRESENT_OFFSET, 2443 },
{ 0x1d4f0, G_UNICODE_NOT_PRESENT_OFFSET, 2379 },
{ 0x1d4f1, G_UNICODE_NOT_PRESENT_OFFSET, 1171 },
{ 0x1d4f2, G_UNICODE_NOT_PRESENT_OFFSET, 2427 },
{ 0x1d4f3, G_UNICODE_NOT_PRESENT_OFFSET, 1176 },
{ 0x1d4f4, G_UNICODE_NOT_PRESENT_OFFSET, 2381 },
{ 0x1d4f5, G_UNICODE_NOT_PRESENT_OFFSET, 1220 },
{ 0x1d4f6, G_UNICODE_NOT_PRESENT_OFFSET, 2383 },
{ 0x1d4f7, G_UNICODE_NOT_PRESENT_OFFSET, 5279 },
{ 0x1d4f8, G_UNICODE_NOT_PRESENT_OFFSET, 29 },
{ 0x1d4f9, G_UNICODE_NOT_PRESENT_OFFSET, 2399 },
{ 0x1d4fa, G_UNICODE_NOT_PRESENT_OFFSET, 6112 },
{ 0x1d4fb, G_UNICODE_NOT_PRESENT_OFFSET, 1178 },
{ 0x1d4fc, G_UNICODE_NOT_PRESENT_OFFSET, 711 },
{ 0x1d4fd, G_UNICODE_NOT_PRESENT_OFFSET, 2401 },
{ 0x1d4fe, G_UNICODE_NOT_PRESENT_OFFSET, 2403 },
{ 0x1d4ff, G_UNICODE_NOT_PRESENT_OFFSET, 2412 },
{ 0x1d500, G_UNICODE_NOT_PRESENT_OFFSET, 1189 },
{ 0x1d501, G_UNICODE_NOT_PRESENT_OFFSET, 1222 },
{ 0x1d502, G_UNICODE_NOT_PRESENT_OFFSET, 1191 },
{ 0x1d503, G_UNICODE_NOT_PRESENT_OFFSET, 2526 },
{ 0x1d504, G_UNICODE_NOT_PRESENT_OFFSET, 2309 },
{ 0x1d505, G_UNICODE_NOT_PRESENT_OFFSET, 2314 },
{ 0x1d507, G_UNICODE_NOT_PRESENT_OFFSET, 2316 },
{ 0x1d508, G_UNICODE_NOT_PRESENT_OFFSET, 2318 },
{ 0x1d509, G_UNICODE_NOT_PRESENT_OFFSET, 5336 },
{ 0x1d50a, G_UNICODE_NOT_PRESENT_OFFSET, 2323 },
{ 0x1d50d, G_UNICODE_NOT_PRESENT_OFFSET, 2329 },
{ 0x1d50e, G_UNICODE_NOT_PRESENT_OFFSET, 2331 },
{ 0x1d50f, G_UNICODE_NOT_PRESENT_OFFSET, 2333 },
{ 0x1d510, G_UNICODE_NOT_PRESENT_OFFSET, 2335 },
{ 0x1d511, G_UNICODE_NOT_PRESENT_OFFSET, 2337 },
{ 0x1d512, G_UNICODE_NOT_PRESENT_OFFSET, 2339 },
{ 0x1d513, G_UNICODE_NOT_PRESENT_OFFSET, 2344 },
{ 0x1d514, G_UNICODE_NOT_PRESENT_OFFSET, 5319 },
{ 0x1d516, G_UNICODE_NOT_PRESENT_OFFSET, 6108 },
{ 0x1d517, G_UNICODE_NOT_PRESENT_OFFSET, 2348 },
{ 0x1d518, G_UNICODE_NOT_PRESENT_OFFSET, 2350 },
{ 0x1d519, G_UNICODE_NOT_PRESENT_OFFSET, 5451 },
{ 0x1d51a, G_UNICODE_NOT_PRESENT_OFFSET, 2352 },
{ 0x1d51b, G_UNICODE_NOT_PRESENT_OFFSET, 5468 },
{ 0x1d51c, G_UNICODE_NOT_PRESENT_OFFSET, 6110 },
{ 0x1d51e, G_UNICODE_NOT_PRESENT_OFFSET, 6 },
{ 0x1d51f, G_UNICODE_NOT_PRESENT_OFFSET, 2364 },
{ 0x1d520, G_UNICODE_NOT_PRESENT_OFFSET, 2435 },
{ 0x1d521, G_UNICODE_NOT_PRESENT_OFFSET, 2366 },
{ 0x1d522, G_UNICODE_NOT_PRESENT_OFFSET, 2368 },
{ 0x1d523, G_UNICODE_NOT_PRESENT_OFFSET, 2443 },
{ 0x1d524, G_UNICODE_NOT_PRESENT_OFFSET, 2379 },
{ 0x1d525, G_UNICODE_NOT_PRESENT_OFFSET, 1171 },
{ 0x1d526, G_UNICODE_NOT_PRESENT_OFFSET, 2427 },
{ 0x1d527, G_UNICODE_NOT_PRESENT_OFFSET, 1176 },
{ 0x1d528, G_UNICODE_NOT_PRESENT_OFFSET, 2381 },
{ 0x1d529, G_UNICODE_NOT_PRESENT_OFFSET, 1220 },
{ 0x1d52a, G_UNICODE_NOT_PRESENT_OFFSET, 2383 },
{ 0x1d52b, G_UNICODE_NOT_PRESENT_OFFSET, 5279 },
{ 0x1d52c, G_UNICODE_NOT_PRESENT_OFFSET, 29 },
{ 0x1d52d, G_UNICODE_NOT_PRESENT_OFFSET, 2399 },
{ 0x1d52e, G_UNICODE_NOT_PRESENT_OFFSET, 6112 },
{ 0x1d52f, G_UNICODE_NOT_PRESENT_OFFSET, 1178 },
{ 0x1d530, G_UNICODE_NOT_PRESENT_OFFSET, 711 },
{ 0x1d531, G_UNICODE_NOT_PRESENT_OFFSET, 2401 },
{ 0x1d532, G_UNICODE_NOT_PRESENT_OFFSET, 2403 },
{ 0x1d533, G_UNICODE_NOT_PRESENT_OFFSET, 2412 },
{ 0x1d534, G_UNICODE_NOT_PRESENT_OFFSET, 1189 },
{ 0x1d535, G_UNICODE_NOT_PRESENT_OFFSET, 1222 },
{ 0x1d536, G_UNICODE_NOT_PRESENT_OFFSET, 1191 },
{ 0x1d537, G_UNICODE_NOT_PRESENT_OFFSET, 2526 },
{ 0x1d538, G_UNICODE_NOT_PRESENT_OFFSET, 2309 },
{ 0x1d539, G_UNICODE_NOT_PRESENT_OFFSET, 2314 },
{ 0x1d53b, G_UNICODE_NOT_PRESENT_OFFSET, 2316 },
{ 0x1d53c, G_UNICODE_NOT_PRESENT_OFFSET, 2318 },
{ 0x1d53d, G_UNICODE_NOT_PRESENT_OFFSET, 5336 },
{ 0x1d53e, G_UNICODE_NOT_PRESENT_OFFSET, 2323 },
{ 0x1d540, G_UNICODE_NOT_PRESENT_OFFSET, 2327 },
{ 0x1d541, G_UNICODE_NOT_PRESENT_OFFSET, 2329 },
{ 0x1d542, G_UNICODE_NOT_PRESENT_OFFSET, 2331 },
{ 0x1d543, G_UNICODE_NOT_PRESENT_OFFSET, 2333 },
{ 0x1d544, G_UNICODE_NOT_PRESENT_OFFSET, 2335 },
{ 0x1d546, G_UNICODE_NOT_PRESENT_OFFSET, 2339 },
{ 0x1d54a, G_UNICODE_NOT_PRESENT_OFFSET, 6108 },
{ 0x1d54b, G_UNICODE_NOT_PRESENT_OFFSET, 2348 },
{ 0x1d54c, G_UNICODE_NOT_PRESENT_OFFSET, 2350 },
{ 0x1d54d, G_UNICODE_NOT_PRESENT_OFFSET, 5451 },
{ 0x1d54e, G_UNICODE_NOT_PRESENT_OFFSET, 2352 },
{ 0x1d54f, G_UNICODE_NOT_PRESENT_OFFSET, 5468 },
{ 0x1d550, G_UNICODE_NOT_PRESENT_OFFSET, 6110 },
{ 0x1d552, G_UNICODE_NOT_PRESENT_OFFSET, 6 },
{ 0x1d553, G_UNICODE_NOT_PRESENT_OFFSET, 2364 },
{ 0x1d554, G_UNICODE_NOT_PRESENT_OFFSET, 2435 },
{ 0x1d555, G_UNICODE_NOT_PRESENT_OFFSET, 2366 },
{ 0x1d556, G_UNICODE_NOT_PRESENT_OFFSET, 2368 },
{ 0x1d557, G_UNICODE_NOT_PRESENT_OFFSET, 2443 },
{ 0x1d558, G_UNICODE_NOT_PRESENT_OFFSET, 2379 },
{ 0x1d559, G_UNICODE_NOT_PRESENT_OFFSET, 1171 },
{ 0x1d55a, G_UNICODE_NOT_PRESENT_OFFSET, 2427 },
{ 0x1d55b, G_UNICODE_NOT_PRESENT_OFFSET, 1176 },
{ 0x1d55c, G_UNICODE_NOT_PRESENT_OFFSET, 2381 },
{ 0x1d55d, G_UNICODE_NOT_PRESENT_OFFSET, 1220 },
{ 0x1d55e, G_UNICODE_NOT_PRESENT_OFFSET, 2383 },
{ 0x1d55f, G_UNICODE_NOT_PRESENT_OFFSET, 5279 },
{ 0x1d560, G_UNICODE_NOT_PRESENT_OFFSET, 29 },
{ 0x1d561, G_UNICODE_NOT_PRESENT_OFFSET, 2399 },
{ 0x1d562, G_UNICODE_NOT_PRESENT_OFFSET, 6112 },
{ 0x1d563, G_UNICODE_NOT_PRESENT_OFFSET, 1178 },
{ 0x1d564, G_UNICODE_NOT_PRESENT_OFFSET, 711 },
{ 0x1d565, G_UNICODE_NOT_PRESENT_OFFSET, 2401 },
{ 0x1d566, G_UNICODE_NOT_PRESENT_OFFSET, 2403 },
{ 0x1d567, G_UNICODE_NOT_PRESENT_OFFSET, 2412 },
{ 0x1d568, G_UNICODE_NOT_PRESENT_OFFSET, 1189 },
{ 0x1d569, G_UNICODE_NOT_PRESENT_OFFSET, 1222 },
{ 0x1d56a, G_UNICODE_NOT_PRESENT_OFFSET, 1191 },
{ 0x1d56b, G_UNICODE_NOT_PRESENT_OFFSET, 2526 },
{ 0x1d56c, G_UNICODE_NOT_PRESENT_OFFSET, 2309 },
{ 0x1d56d, G_UNICODE_NOT_PRESENT_OFFSET, 2314 },
{ 0x1d56e, G_UNICODE_NOT_PRESENT_OFFSET, 5292 },
{ 0x1d56f, G_UNICODE_NOT_PRESENT_OFFSET, 2316 },
{ 0x1d570, G_UNICODE_NOT_PRESENT_OFFSET, 2318 },
{ 0x1d571, G_UNICODE_NOT_PRESENT_OFFSET, 5336 },
{ 0x1d572, G_UNICODE_NOT_PRESENT_OFFSET, 2323 },
{ 0x1d573, G_UNICODE_NOT_PRESENT_OFFSET, 2325 },
{ 0x1d574, G_UNICODE_NOT_PRESENT_OFFSET, 2327 },
{ 0x1d575, G_UNICODE_NOT_PRESENT_OFFSET, 2329 },
{ 0x1d576, G_UNICODE_NOT_PRESENT_OFFSET, 2331 },
{ 0x1d577, G_UNICODE_NOT_PRESENT_OFFSET, 2333 },
{ 0x1d578, G_UNICODE_NOT_PRESENT_OFFSET, 2335 },
{ 0x1d579, G_UNICODE_NOT_PRESENT_OFFSET, 2337 },
{ 0x1d57a, G_UNICODE_NOT_PRESENT_OFFSET, 2339 },
{ 0x1d57b, G_UNICODE_NOT_PRESENT_OFFSET, 2344 },
{ 0x1d57c, G_UNICODE_NOT_PRESENT_OFFSET, 5319 },
{ 0x1d57d, G_UNICODE_NOT_PRESENT_OFFSET, 2346 },
{ 0x1d57e, G_UNICODE_NOT_PRESENT_OFFSET, 6108 },
{ 0x1d57f, G_UNICODE_NOT_PRESENT_OFFSET, 2348 },
{ 0x1d580, G_UNICODE_NOT_PRESENT_OFFSET, 2350 },
{ 0x1d581, G_UNICODE_NOT_PRESENT_OFFSET, 5451 },
{ 0x1d582, G_UNICODE_NOT_PRESENT_OFFSET, 2352 },
{ 0x1d583, G_UNICODE_NOT_PRESENT_OFFSET, 5468 },
{ 0x1d584, G_UNICODE_NOT_PRESENT_OFFSET, 6110 },
{ 0x1d585, G_UNICODE_NOT_PRESENT_OFFSET, 5331 },
{ 0x1d586, G_UNICODE_NOT_PRESENT_OFFSET, 6 },
{ 0x1d587, G_UNICODE_NOT_PRESENT_OFFSET, 2364 },
{ 0x1d588, G_UNICODE_NOT_PRESENT_OFFSET, 2435 },
{ 0x1d589, G_UNICODE_NOT_PRESENT_OFFSET, 2366 },
{ 0x1d58a, G_UNICODE_NOT_PRESENT_OFFSET, 2368 },
{ 0x1d58b, G_UNICODE_NOT_PRESENT_OFFSET, 2443 },
{ 0x1d58c, G_UNICODE_NOT_PRESENT_OFFSET, 2379 },
{ 0x1d58d, G_UNICODE_NOT_PRESENT_OFFSET, 1171 },
{ 0x1d58e, G_UNICODE_NOT_PRESENT_OFFSET, 2427 },
{ 0x1d58f, G_UNICODE_NOT_PRESENT_OFFSET, 1176 },
{ 0x1d590, G_UNICODE_NOT_PRESENT_OFFSET, 2381 },
{ 0x1d591, G_UNICODE_NOT_PRESENT_OFFSET, 1220 },
{ 0x1d592, G_UNICODE_NOT_PRESENT_OFFSET, 2383 },
{ 0x1d593, G_UNICODE_NOT_PRESENT_OFFSET, 5279 },
{ 0x1d594, G_UNICODE_NOT_PRESENT_OFFSET, 29 },
{ 0x1d595, G_UNICODE_NOT_PRESENT_OFFSET, 2399 },
{ 0x1d596, G_UNICODE_NOT_PRESENT_OFFSET, 6112 },
{ 0x1d597, G_UNICODE_NOT_PRESENT_OFFSET, 1178 },
{ 0x1d598, G_UNICODE_NOT_PRESENT_OFFSET, 711 },
{ 0x1d599, G_UNICODE_NOT_PRESENT_OFFSET, 2401 },
{ 0x1d59a, G_UNICODE_NOT_PRESENT_OFFSET, 2403 },
{ 0x1d59b, G_UNICODE_NOT_PRESENT_OFFSET, 2412 },
{ 0x1d59c, G_UNICODE_NOT_PRESENT_OFFSET, 1189 },
{ 0x1d59d, G_UNICODE_NOT_PRESENT_OFFSET, 1222 },
{ 0x1d59e, G_UNICODE_NOT_PRESENT_OFFSET, 1191 },
{ 0x1d59f, G_UNICODE_NOT_PRESENT_OFFSET, 2526 },
{ 0x1d5a0, G_UNICODE_NOT_PRESENT_OFFSET, 2309 },
{ 0x1d5a1, G_UNICODE_NOT_PRESENT_OFFSET, 2314 },
{ 0x1d5a2, G_UNICODE_NOT_PRESENT_OFFSET, 5292 },
{ 0x1d5a3, G_UNICODE_NOT_PRESENT_OFFSET, 2316 },
{ 0x1d5a4, G_UNICODE_NOT_PRESENT_OFFSET, 2318 },
{ 0x1d5a5, G_UNICODE_NOT_PRESENT_OFFSET, 5336 },
{ 0x1d5a6, G_UNICODE_NOT_PRESENT_OFFSET, 2323 },
{ 0x1d5a7, G_UNICODE_NOT_PRESENT_OFFSET, 2325 },
{ 0x1d5a8, G_UNICODE_NOT_PRESENT_OFFSET, 2327 },
{ 0x1d5a9, G_UNICODE_NOT_PRESENT_OFFSET, 2329 },
{ 0x1d5aa, G_UNICODE_NOT_PRESENT_OFFSET, 2331 },
{ 0x1d5ab, G_UNICODE_NOT_PRESENT_OFFSET, 2333 },
{ 0x1d5ac, G_UNICODE_NOT_PRESENT_OFFSET, 2335 },
{ 0x1d5ad, G_UNICODE_NOT_PRESENT_OFFSET, 2337 },
{ 0x1d5ae, G_UNICODE_NOT_PRESENT_OFFSET, 2339 },
{ 0x1d5af, G_UNICODE_NOT_PRESENT_OFFSET, 2344 },
{ 0x1d5b0, G_UNICODE_NOT_PRESENT_OFFSET, 5319 },
{ 0x1d5b1, G_UNICODE_NOT_PRESENT_OFFSET, 2346 },
{ 0x1d5b2, G_UNICODE_NOT_PRESENT_OFFSET, 6108 },
{ 0x1d5b3, G_UNICODE_NOT_PRESENT_OFFSET, 2348 },
{ 0x1d5b4, G_UNICODE_NOT_PRESENT_OFFSET, 2350 },
{ 0x1d5b5, G_UNICODE_NOT_PRESENT_OFFSET, 5451 },
{ 0x1d5b6, G_UNICODE_NOT_PRESENT_OFFSET, 2352 },
{ 0x1d5b7, G_UNICODE_NOT_PRESENT_OFFSET, 5468 },
{ 0x1d5b8, G_UNICODE_NOT_PRESENT_OFFSET, 6110 },
{ 0x1d5b9, G_UNICODE_NOT_PRESENT_OFFSET, 5331 },
{ 0x1d5ba, G_UNICODE_NOT_PRESENT_OFFSET, 6 },
{ 0x1d5bb, G_UNICODE_NOT_PRESENT_OFFSET, 2364 },
{ 0x1d5bc, G_UNICODE_NOT_PRESENT_OFFSET, 2435 },
{ 0x1d5bd, G_UNICODE_NOT_PRESENT_OFFSET, 2366 },
{ 0x1d5be, G_UNICODE_NOT_PRESENT_OFFSET, 2368 },
{ 0x1d5bf, G_UNICODE_NOT_PRESENT_OFFSET, 2443 },
{ 0x1d5c0, G_UNICODE_NOT_PRESENT_OFFSET, 2379 },
{ 0x1d5c1, G_UNICODE_NOT_PRESENT_OFFSET, 1171 },
{ 0x1d5c2, G_UNICODE_NOT_PRESENT_OFFSET, 2427 },
{ 0x1d5c3, G_UNICODE_NOT_PRESENT_OFFSET, 1176 },
{ 0x1d5c4, G_UNICODE_NOT_PRESENT_OFFSET, 2381 },
{ 0x1d5c5, G_UNICODE_NOT_PRESENT_OFFSET, 1220 },
{ 0x1d5c6, G_UNICODE_NOT_PRESENT_OFFSET, 2383 },
{ 0x1d5c7, G_UNICODE_NOT_PRESENT_OFFSET, 5279 },
{ 0x1d5c8, G_UNICODE_NOT_PRESENT_OFFSET, 29 },
{ 0x1d5c9, G_UNICODE_NOT_PRESENT_OFFSET, 2399 },
{ 0x1d5ca, G_UNICODE_NOT_PRESENT_OFFSET, 6112 },
{ 0x1d5cb, G_UNICODE_NOT_PRESENT_OFFSET, 1178 },
{ 0x1d5cc, G_UNICODE_NOT_PRESENT_OFFSET, 711 },
{ 0x1d5cd, G_UNICODE_NOT_PRESENT_OFFSET, 2401 },
{ 0x1d5ce, G_UNICODE_NOT_PRESENT_OFFSET, 2403 },
{ 0x1d5cf, G_UNICODE_NOT_PRESENT_OFFSET, 2412 },
{ 0x1d5d0, G_UNICODE_NOT_PRESENT_OFFSET, 1189 },
{ 0x1d5d1, G_UNICODE_NOT_PRESENT_OFFSET, 1222 },
{ 0x1d5d2, G_UNICODE_NOT_PRESENT_OFFSET, 1191 },
{ 0x1d5d3, G_UNICODE_NOT_PRESENT_OFFSET, 2526 },
{ 0x1d5d4, G_UNICODE_NOT_PRESENT_OFFSET, 2309 },
{ 0x1d5d5, G_UNICODE_NOT_PRESENT_OFFSET, 2314 },
{ 0x1d5d6, G_UNICODE_NOT_PRESENT_OFFSET, 5292 },
{ 0x1d5d7, G_UNICODE_NOT_PRESENT_OFFSET, 2316 },
{ 0x1d5d8, G_UNICODE_NOT_PRESENT_OFFSET, 2318 },
{ 0x1d5d9, G_UNICODE_NOT_PRESENT_OFFSET, 5336 },
{ 0x1d5da, G_UNICODE_NOT_PRESENT_OFFSET, 2323 },
{ 0x1d5db, G_UNICODE_NOT_PRESENT_OFFSET, 2325 },
{ 0x1d5dc, G_UNICODE_NOT_PRESENT_OFFSET, 2327 },
{ 0x1d5dd, G_UNICODE_NOT_PRESENT_OFFSET, 2329 },
{ 0x1d5de, G_UNICODE_NOT_PRESENT_OFFSET, 2331 },
{ 0x1d5df, G_UNICODE_NOT_PRESENT_OFFSET, 2333 },
{ 0x1d5e0, G_UNICODE_NOT_PRESENT_OFFSET, 2335 },
{ 0x1d5e1, G_UNICODE_NOT_PRESENT_OFFSET, 2337 },
{ 0x1d5e2, G_UNICODE_NOT_PRESENT_OFFSET, 2339 },
{ 0x1d5e3, G_UNICODE_NOT_PRESENT_OFFSET, 2344 },
{ 0x1d5e4, G_UNICODE_NOT_PRESENT_OFFSET, 5319 },
{ 0x1d5e5, G_UNICODE_NOT_PRESENT_OFFSET, 2346 },
{ 0x1d5e6, G_UNICODE_NOT_PRESENT_OFFSET, 6108 },
{ 0x1d5e7, G_UNICODE_NOT_PRESENT_OFFSET, 2348 },
{ 0x1d5e8, G_UNICODE_NOT_PRESENT_OFFSET, 2350 },
{ 0x1d5e9, G_UNICODE_NOT_PRESENT_OFFSET, 5451 },
{ 0x1d5ea, G_UNICODE_NOT_PRESENT_OFFSET, 2352 },
{ 0x1d5eb, G_UNICODE_NOT_PRESENT_OFFSET, 5468 },
{ 0x1d5ec, G_UNICODE_NOT_PRESENT_OFFSET, 6110 },
{ 0x1d5ed, G_UNICODE_NOT_PRESENT_OFFSET, 5331 },
{ 0x1d5ee, G_UNICODE_NOT_PRESENT_OFFSET, 6 },
{ 0x1d5ef, G_UNICODE_NOT_PRESENT_OFFSET, 2364 },
{ 0x1d5f0, G_UNICODE_NOT_PRESENT_OFFSET, 2435 },
{ 0x1d5f1, G_UNICODE_NOT_PRESENT_OFFSET, 2366 },
{ 0x1d5f2, G_UNICODE_NOT_PRESENT_OFFSET, 2368 },
{ 0x1d5f3, G_UNICODE_NOT_PRESENT_OFFSET, 2443 },
{ 0x1d5f4, G_UNICODE_NOT_PRESENT_OFFSET, 2379 },
{ 0x1d5f5, G_UNICODE_NOT_PRESENT_OFFSET, 1171 },
{ 0x1d5f6, G_UNICODE_NOT_PRESENT_OFFSET, 2427 },
{ 0x1d5f7, G_UNICODE_NOT_PRESENT_OFFSET, 1176 },
{ 0x1d5f8, G_UNICODE_NOT_PRESENT_OFFSET, 2381 },
{ 0x1d5f9, G_UNICODE_NOT_PRESENT_OFFSET, 1220 },
{ 0x1d5fa, G_UNICODE_NOT_PRESENT_OFFSET, 2383 },
{ 0x1d5fb, G_UNICODE_NOT_PRESENT_OFFSET, 5279 },
{ 0x1d5fc, G_UNICODE_NOT_PRESENT_OFFSET, 29 },
{ 0x1d5fd, G_UNICODE_NOT_PRESENT_OFFSET, 2399 },
{ 0x1d5fe, G_UNICODE_NOT_PRESENT_OFFSET, 6112 },
{ 0x1d5ff, G_UNICODE_NOT_PRESENT_OFFSET, 1178 },
{ 0x1d600, G_UNICODE_NOT_PRESENT_OFFSET, 711 },
{ 0x1d601, G_UNICODE_NOT_PRESENT_OFFSET, 2401 },
{ 0x1d602, G_UNICODE_NOT_PRESENT_OFFSET, 2403 },
{ 0x1d603, G_UNICODE_NOT_PRESENT_OFFSET, 2412 },
{ 0x1d604, G_UNICODE_NOT_PRESENT_OFFSET, 1189 },
{ 0x1d605, G_UNICODE_NOT_PRESENT_OFFSET, 1222 },
{ 0x1d606, G_UNICODE_NOT_PRESENT_OFFSET, 1191 },
{ 0x1d607, G_UNICODE_NOT_PRESENT_OFFSET, 2526 },
{ 0x1d608, G_UNICODE_NOT_PRESENT_OFFSET, 2309 },
{ 0x1d609, G_UNICODE_NOT_PRESENT_OFFSET, 2314 },
{ 0x1d60a, G_UNICODE_NOT_PRESENT_OFFSET, 5292 },
{ 0x1d60b, G_UNICODE_NOT_PRESENT_OFFSET, 2316 },
{ 0x1d60c, G_UNICODE_NOT_PRESENT_OFFSET, 2318 },
{ 0x1d60d, G_UNICODE_NOT_PRESENT_OFFSET, 5336 },
{ 0x1d60e, G_UNICODE_NOT_PRESENT_OFFSET, 2323 },
{ 0x1d60f, G_UNICODE_NOT_PRESENT_OFFSET, 2325 },
{ 0x1d610, G_UNICODE_NOT_PRESENT_OFFSET, 2327 },
{ 0x1d611, G_UNICODE_NOT_PRESENT_OFFSET, 2329 },
{ 0x1d612, G_UNICODE_NOT_PRESENT_OFFSET, 2331 },
{ 0x1d613, G_UNICODE_NOT_PRESENT_OFFSET, 2333 },
{ 0x1d614, G_UNICODE_NOT_PRESENT_OFFSET, 2335 },
{ 0x1d615, G_UNICODE_NOT_PRESENT_OFFSET, 2337 },
{ 0x1d616, G_UNICODE_NOT_PRESENT_OFFSET, 2339 },
{ 0x1d617, G_UNICODE_NOT_PRESENT_OFFSET, 2344 },
{ 0x1d618, G_UNICODE_NOT_PRESENT_OFFSET, 5319 },
{ 0x1d619, G_UNICODE_NOT_PRESENT_OFFSET, 2346 },
{ 0x1d61a, G_UNICODE_NOT_PRESENT_OFFSET, 6108 },
{ 0x1d61b, G_UNICODE_NOT_PRESENT_OFFSET, 2348 },
{ 0x1d61c, G_UNICODE_NOT_PRESENT_OFFSET, 2350 },
{ 0x1d61d, G_UNICODE_NOT_PRESENT_OFFSET, 5451 },
{ 0x1d61e, G_UNICODE_NOT_PRESENT_OFFSET, 2352 },
{ 0x1d61f, G_UNICODE_NOT_PRESENT_OFFSET, 5468 },
{ 0x1d620, G_UNICODE_NOT_PRESENT_OFFSET, 6110 },
{ 0x1d621, G_UNICODE_NOT_PRESENT_OFFSET, 5331 },
{ 0x1d622, G_UNICODE_NOT_PRESENT_OFFSET, 6 },
{ 0x1d623, G_UNICODE_NOT_PRESENT_OFFSET, 2364 },
{ 0x1d624, G_UNICODE_NOT_PRESENT_OFFSET, 2435 },
{ 0x1d625, G_UNICODE_NOT_PRESENT_OFFSET, 2366 },
{ 0x1d626, G_UNICODE_NOT_PRESENT_OFFSET, 2368 },
{ 0x1d627, G_UNICODE_NOT_PRESENT_OFFSET, 2443 },
{ 0x1d628, G_UNICODE_NOT_PRESENT_OFFSET, 2379 },
{ 0x1d629, G_UNICODE_NOT_PRESENT_OFFSET, 1171 },
{ 0x1d62a, G_UNICODE_NOT_PRESENT_OFFSET, 2427 },
{ 0x1d62b, G_UNICODE_NOT_PRESENT_OFFSET, 1176 },
{ 0x1d62c, G_UNICODE_NOT_PRESENT_OFFSET, 2381 },
{ 0x1d62d, G_UNICODE_NOT_PRESENT_OFFSET, 1220 },
{ 0x1d62e, G_UNICODE_NOT_PRESENT_OFFSET, 2383 },
{ 0x1d62f, G_UNICODE_NOT_PRESENT_OFFSET, 5279 },
{ 0x1d630, G_UNICODE_NOT_PRESENT_OFFSET, 29 },
{ 0x1d631, G_UNICODE_NOT_PRESENT_OFFSET, 2399 },
{ 0x1d632, G_UNICODE_NOT_PRESENT_OFFSET, 6112 },
{ 0x1d633, G_UNICODE_NOT_PRESENT_OFFSET, 1178 },
{ 0x1d634, G_UNICODE_NOT_PRESENT_OFFSET, 711 },
{ 0x1d635, G_UNICODE_NOT_PRESENT_OFFSET, 2401 },
{ 0x1d636, G_UNICODE_NOT_PRESENT_OFFSET, 2403 },
{ 0x1d637, G_UNICODE_NOT_PRESENT_OFFSET, 2412 },
{ 0x1d638, G_UNICODE_NOT_PRESENT_OFFSET, 1189 },
{ 0x1d639, G_UNICODE_NOT_PRESENT_OFFSET, 1222 },
{ 0x1d63a, G_UNICODE_NOT_PRESENT_OFFSET, 1191 },
{ 0x1d63b, G_UNICODE_NOT_PRESENT_OFFSET, 2526 },
{ 0x1d63c, G_UNICODE_NOT_PRESENT_OFFSET, 2309 },
{ 0x1d63d, G_UNICODE_NOT_PRESENT_OFFSET, 2314 },
{ 0x1d63e, G_UNICODE_NOT_PRESENT_OFFSET, 5292 },
{ 0x1d63f, G_UNICODE_NOT_PRESENT_OFFSET, 2316 },
{ 0x1d640, G_UNICODE_NOT_PRESENT_OFFSET, 2318 },
{ 0x1d641, G_UNICODE_NOT_PRESENT_OFFSET, 5336 },
{ 0x1d642, G_UNICODE_NOT_PRESENT_OFFSET, 2323 },
{ 0x1d643, G_UNICODE_NOT_PRESENT_OFFSET, 2325 },
{ 0x1d644, G_UNICODE_NOT_PRESENT_OFFSET, 2327 },
{ 0x1d645, G_UNICODE_NOT_PRESENT_OFFSET, 2329 },
{ 0x1d646, G_UNICODE_NOT_PRESENT_OFFSET, 2331 },
{ 0x1d647, G_UNICODE_NOT_PRESENT_OFFSET, 2333 },
{ 0x1d648, G_UNICODE_NOT_PRESENT_OFFSET, 2335 },
{ 0x1d649, G_UNICODE_NOT_PRESENT_OFFSET, 2337 },
{ 0x1d64a, G_UNICODE_NOT_PRESENT_OFFSET, 2339 },
{ 0x1d64b, G_UNICODE_NOT_PRESENT_OFFSET, 2344 },
{ 0x1d64c, G_UNICODE_NOT_PRESENT_OFFSET, 5319 },
{ 0x1d64d, G_UNICODE_NOT_PRESENT_OFFSET, 2346 },
{ 0x1d64e, G_UNICODE_NOT_PRESENT_OFFSET, 6108 },
{ 0x1d64f, G_UNICODE_NOT_PRESENT_OFFSET, 2348 },
{ 0x1d650, G_UNICODE_NOT_PRESENT_OFFSET, 2350 },
{ 0x1d651, G_UNICODE_NOT_PRESENT_OFFSET, 5451 },
{ 0x1d652, G_UNICODE_NOT_PRESENT_OFFSET, 2352 },
{ 0x1d653, G_UNICODE_NOT_PRESENT_OFFSET, 5468 },
{ 0x1d654, G_UNICODE_NOT_PRESENT_OFFSET, 6110 },
{ 0x1d655, G_UNICODE_NOT_PRESENT_OFFSET, 5331 },
{ 0x1d656, G_UNICODE_NOT_PRESENT_OFFSET, 6 },
{ 0x1d657, G_UNICODE_NOT_PRESENT_OFFSET, 2364 },
{ 0x1d658, G_UNICODE_NOT_PRESENT_OFFSET, 2435 },
{ 0x1d659, G_UNICODE_NOT_PRESENT_OFFSET, 2366 },
{ 0x1d65a, G_UNICODE_NOT_PRESENT_OFFSET, 2368 },
{ 0x1d65b, G_UNICODE_NOT_PRESENT_OFFSET, 2443 },
{ 0x1d65c, G_UNICODE_NOT_PRESENT_OFFSET, 2379 },
{ 0x1d65d, G_UNICODE_NOT_PRESENT_OFFSET, 1171 },
{ 0x1d65e, G_UNICODE_NOT_PRESENT_OFFSET, 2427 },
{ 0x1d65f, G_UNICODE_NOT_PRESENT_OFFSET, 1176 },
{ 0x1d660, G_UNICODE_NOT_PRESENT_OFFSET, 2381 },
{ 0x1d661, G_UNICODE_NOT_PRESENT_OFFSET, 1220 },
{ 0x1d662, G_UNICODE_NOT_PRESENT_OFFSET, 2383 },
{ 0x1d663, G_UNICODE_NOT_PRESENT_OFFSET, 5279 },
{ 0x1d664, G_UNICODE_NOT_PRESENT_OFFSET, 29 },
{ 0x1d665, G_UNICODE_NOT_PRESENT_OFFSET, 2399 },
{ 0x1d666, G_UNICODE_NOT_PRESENT_OFFSET, 6112 },
{ 0x1d667, G_UNICODE_NOT_PRESENT_OFFSET, 1178 },
{ 0x1d668, G_UNICODE_NOT_PRESENT_OFFSET, 711 },
{ 0x1d669, G_UNICODE_NOT_PRESENT_OFFSET, 2401 },
{ 0x1d66a, G_UNICODE_NOT_PRESENT_OFFSET, 2403 },
{ 0x1d66b, G_UNICODE_NOT_PRESENT_OFFSET, 2412 },
{ 0x1d66c, G_UNICODE_NOT_PRESENT_OFFSET, 1189 },
{ 0x1d66d, G_UNICODE_NOT_PRESENT_OFFSET, 1222 },
{ 0x1d66e, G_UNICODE_NOT_PRESENT_OFFSET, 1191 },
{ 0x1d66f, G_UNICODE_NOT_PRESENT_OFFSET, 2526 },
{ 0x1d670, G_UNICODE_NOT_PRESENT_OFFSET, 2309 },
{ 0x1d671, G_UNICODE_NOT_PRESENT_OFFSET, 2314 },
{ 0x1d672, G_UNICODE_NOT_PRESENT_OFFSET, 5292 },
{ 0x1d673, G_UNICODE_NOT_PRESENT_OFFSET, 2316 },
{ 0x1d674, G_UNICODE_NOT_PRESENT_OFFSET, 2318 },
{ 0x1d675, G_UNICODE_NOT_PRESENT_OFFSET, 5336 },
{ 0x1d676, G_UNICODE_NOT_PRESENT_OFFSET, 2323 },
{ 0x1d677, G_UNICODE_NOT_PRESENT_OFFSET, 2325 },
{ 0x1d678, G_UNICODE_NOT_PRESENT_OFFSET, 2327 },
{ 0x1d679, G_UNICODE_NOT_PRESENT_OFFSET, 2329 },
{ 0x1d67a, G_UNICODE_NOT_PRESENT_OFFSET, 2331 },
{ 0x1d67b, G_UNICODE_NOT_PRESENT_OFFSET, 2333 },
{ 0x1d67c, G_UNICODE_NOT_PRESENT_OFFSET, 2335 },
{ 0x1d67d, G_UNICODE_NOT_PRESENT_OFFSET, 2337 },
{ 0x1d67e, G_UNICODE_NOT_PRESENT_OFFSET, 2339 },
{ 0x1d67f, G_UNICODE_NOT_PRESENT_OFFSET, 2344 },
{ 0x1d680, G_UNICODE_NOT_PRESENT_OFFSET, 5319 },
{ 0x1d681, G_UNICODE_NOT_PRESENT_OFFSET, 2346 },
{ 0x1d682, G_UNICODE_NOT_PRESENT_OFFSET, 6108 },
{ 0x1d683, G_UNICODE_NOT_PRESENT_OFFSET, 2348 },
{ 0x1d684, G_UNICODE_NOT_PRESENT_OFFSET, 2350 },
{ 0x1d685, G_UNICODE_NOT_PRESENT_OFFSET, 5451 },
{ 0x1d686, G_UNICODE_NOT_PRESENT_OFFSET, 2352 },
{ 0x1d687, G_UNICODE_NOT_PRESENT_OFFSET, 5468 },
{ 0x1d688, G_UNICODE_NOT_PRESENT_OFFSET, 6110 },
{ 0x1d689, G_UNICODE_NOT_PRESENT_OFFSET, 5331 },
{ 0x1d68a, G_UNICODE_NOT_PRESENT_OFFSET, 6 },
{ 0x1d68b, G_UNICODE_NOT_PRESENT_OFFSET, 2364 },
{ 0x1d68c, G_UNICODE_NOT_PRESENT_OFFSET, 2435 },
{ 0x1d68d, G_UNICODE_NOT_PRESENT_OFFSET, 2366 },
{ 0x1d68e, G_UNICODE_NOT_PRESENT_OFFSET, 2368 },
{ 0x1d68f, G_UNICODE_NOT_PRESENT_OFFSET, 2443 },
{ 0x1d690, G_UNICODE_NOT_PRESENT_OFFSET, 2379 },
{ 0x1d691, G_UNICODE_NOT_PRESENT_OFFSET, 1171 },
{ 0x1d692, G_UNICODE_NOT_PRESENT_OFFSET, 2427 },
{ 0x1d693, G_UNICODE_NOT_PRESENT_OFFSET, 1176 },
{ 0x1d694, G_UNICODE_NOT_PRESENT_OFFSET, 2381 },
{ 0x1d695, G_UNICODE_NOT_PRESENT_OFFSET, 1220 },
{ 0x1d696, G_UNICODE_NOT_PRESENT_OFFSET, 2383 },
{ 0x1d697, G_UNICODE_NOT_PRESENT_OFFSET, 5279 },
{ 0x1d698, G_UNICODE_NOT_PRESENT_OFFSET, 29 },
{ 0x1d699, G_UNICODE_NOT_PRESENT_OFFSET, 2399 },
{ 0x1d69a, G_UNICODE_NOT_PRESENT_OFFSET, 6112 },
{ 0x1d69b, G_UNICODE_NOT_PRESENT_OFFSET, 1178 },
{ 0x1d69c, G_UNICODE_NOT_PRESENT_OFFSET, 711 },
{ 0x1d69d, G_UNICODE_NOT_PRESENT_OFFSET, 2401 },
{ 0x1d69e, G_UNICODE_NOT_PRESENT_OFFSET, 2403 },
{ 0x1d69f, G_UNICODE_NOT_PRESENT_OFFSET, 2412 },
{ 0x1d6a0, G_UNICODE_NOT_PRESENT_OFFSET, 1189 },
{ 0x1d6a1, G_UNICODE_NOT_PRESENT_OFFSET, 1222 },
{ 0x1d6a2, G_UNICODE_NOT_PRESENT_OFFSET, 1191 },
{ 0x1d6a3, G_UNICODE_NOT_PRESENT_OFFSET, 2526 },
{ 0x1d6a4, G_UNICODE_NOT_PRESENT_OFFSET, 15061 },
{ 0x1d6a5, G_UNICODE_NOT_PRESENT_OFFSET, 15064 },
{ 0x1d6a8, G_UNICODE_NOT_PRESENT_OFFSET, 15067 },
{ 0x1d6a9, G_UNICODE_NOT_PRESENT_OFFSET, 15070 },
{ 0x1d6aa, G_UNICODE_NOT_PRESENT_OFFSET, 5354 },
{ 0x1d6ab, G_UNICODE_NOT_PRESENT_OFFSET, 15073 },
{ 0x1d6ac, G_UNICODE_NOT_PRESENT_OFFSET, 15076 },
{ 0x1d6ad, G_UNICODE_NOT_PRESENT_OFFSET, 15079 },
{ 0x1d6ae, G_UNICODE_NOT_PRESENT_OFFSET, 15082 },
{ 0x1d6af, G_UNICODE_NOT_PRESENT_OFFSET, 1402 },
{ 0x1d6b0, G_UNICODE_NOT_PRESENT_OFFSET, 15085 },
{ 0x1d6b1, G_UNICODE_NOT_PRESENT_OFFSET, 15088 },
{ 0x1d6b2, G_UNICODE_NOT_PRESENT_OFFSET, 15091 },
{ 0x1d6b3, G_UNICODE_NOT_PRESENT_OFFSET, 15094 },
{ 0x1d6b4, G_UNICODE_NOT_PRESENT_OFFSET, 15097 },
{ 0x1d6b5, G_UNICODE_NOT_PRESENT_OFFSET, 15100 },
{ 0x1d6b6, G_UNICODE_NOT_PRESENT_OFFSET, 15103 },
{ 0x1d6b7, G_UNICODE_NOT_PRESENT_OFFSET, 5357 },
{ 0x1d6b8, G_UNICODE_NOT_PRESENT_OFFSET, 15106 },
{ 0x1d6b9, G_UNICODE_NOT_PRESENT_OFFSET, 1402 },
{ 0x1d6ba, G_UNICODE_NOT_PRESENT_OFFSET, 1408 },
{ 0x1d6bb, G_UNICODE_NOT_PRESENT_OFFSET, 15109 },
{ 0x1d6bc, G_UNICODE_NOT_PRESENT_OFFSET, 1374 },
{ 0x1d6bd, G_UNICODE_NOT_PRESENT_OFFSET, 15112 },
{ 0x1d6be, G_UNICODE_NOT_PRESENT_OFFSET, 15115 },
{ 0x1d6bf, G_UNICODE_NOT_PRESENT_OFFSET, 15118 },
{ 0x1d6c0, G_UNICODE_NOT_PRESENT_OFFSET, 5333 },
{ 0x1d6c1, G_UNICODE_NOT_PRESENT_OFFSET, 15121 },
{ 0x1d6c2, G_UNICODE_NOT_PRESENT_OFFSET, 15125 },
{ 0x1d6c3, G_UNICODE_NOT_PRESENT_OFFSET, 1368 },
{ 0x1d6c4, G_UNICODE_NOT_PRESENT_OFFSET, 2418 },
{ 0x1d6c5, G_UNICODE_NOT_PRESENT_OFFSET, 2421 },
{ 0x1d6c6, G_UNICODE_NOT_PRESENT_OFFSET, 1405 },
{ 0x1d6c7, G_UNICODE_NOT_PRESENT_OFFSET, 15128 },
{ 0x1d6c8, G_UNICODE_NOT_PRESENT_OFFSET, 15131 },
{ 0x1d6c9, G_UNICODE_NOT_PRESENT_OFFSET, 1371 },
{ 0x1d6ca, G_UNICODE_NOT_PRESENT_OFFSET, 4860 },
{ 0x1d6cb, G_UNICODE_NOT_PRESENT_OFFSET, 1393 },
{ 0x1d6cc, G_UNICODE_NOT_PRESENT_OFFSET, 15134 },
{ 0x1d6cd, G_UNICODE_NOT_PRESENT_OFFSET, 20 },
{ 0x1d6ce, G_UNICODE_NOT_PRESENT_OFFSET, 15137 },
{ 0x1d6cf, G_UNICODE_NOT_PRESENT_OFFSET, 15140 },
{ 0x1d6d0, G_UNICODE_NOT_PRESENT_OFFSET, 15143 },
{ 0x1d6d1, G_UNICODE_NOT_PRESENT_OFFSET, 1390 },
{ 0x1d6d2, G_UNICODE_NOT_PRESENT_OFFSET, 1396 },
{ 0x1d6d3, G_UNICODE_NOT_PRESENT_OFFSET, 1399 },
{ 0x1d6d4, G_UNICODE_NOT_PRESENT_OFFSET, 15146 },
{ 0x1d6d5, G_UNICODE_NOT_PRESENT_OFFSET, 15149 },
{ 0x1d6d6, G_UNICODE_NOT_PRESENT_OFFSET, 15152 },
{ 0x1d6d7, G_UNICODE_NOT_PRESENT_OFFSET, 1387 },
{ 0x1d6d8, G_UNICODE_NOT_PRESENT_OFFSET, 2424 },
{ 0x1d6d9, G_UNICODE_NOT_PRESENT_OFFSET, 15155 },
{ 0x1d6da, G_UNICODE_NOT_PRESENT_OFFSET, 15158 },
{ 0x1d6db, G_UNICODE_NOT_PRESENT_OFFSET, 15161 },
{ 0x1d6dc, G_UNICODE_NOT_PRESENT_OFFSET, 1405 },
{ 0x1d6dd, G_UNICODE_NOT_PRESENT_OFFSET, 1371 },
{ 0x1d6de, G_UNICODE_NOT_PRESENT_OFFSET, 1393 },
{ 0x1d6df, G_UNICODE_NOT_PRESENT_OFFSET, 1387 },
{ 0x1d6e0, G_UNICODE_NOT_PRESENT_OFFSET, 1396 },
{ 0x1d6e1, G_UNICODE_NOT_PRESENT_OFFSET, 1390 },
{ 0x1d6e2, G_UNICODE_NOT_PRESENT_OFFSET, 15067 },
{ 0x1d6e3, G_UNICODE_NOT_PRESENT_OFFSET, 15070 },
{ 0x1d6e4, G_UNICODE_NOT_PRESENT_OFFSET, 5354 },
{ 0x1d6e5, G_UNICODE_NOT_PRESENT_OFFSET, 15073 },
{ 0x1d6e6, G_UNICODE_NOT_PRESENT_OFFSET, 15076 },
{ 0x1d6e7, G_UNICODE_NOT_PRESENT_OFFSET, 15079 },
{ 0x1d6e8, G_UNICODE_NOT_PRESENT_OFFSET, 15082 },
{ 0x1d6e9, G_UNICODE_NOT_PRESENT_OFFSET, 1402 },
{ 0x1d6ea, G_UNICODE_NOT_PRESENT_OFFSET, 15085 },
{ 0x1d6eb, G_UNICODE_NOT_PRESENT_OFFSET, 15088 },
{ 0x1d6ec, G_UNICODE_NOT_PRESENT_OFFSET, 15091 },
{ 0x1d6ed, G_UNICODE_NOT_PRESENT_OFFSET, 15094 },
{ 0x1d6ee, G_UNICODE_NOT_PRESENT_OFFSET, 15097 },
{ 0x1d6ef, G_UNICODE_NOT_PRESENT_OFFSET, 15100 },
{ 0x1d6f0, G_UNICODE_NOT_PRESENT_OFFSET, 15103 },
{ 0x1d6f1, G_UNICODE_NOT_PRESENT_OFFSET, 5357 },
{ 0x1d6f2, G_UNICODE_NOT_PRESENT_OFFSET, 15106 },
{ 0x1d6f3, G_UNICODE_NOT_PRESENT_OFFSET, 1402 },
{ 0x1d6f4, G_UNICODE_NOT_PRESENT_OFFSET, 1408 },
{ 0x1d6f5, G_UNICODE_NOT_PRESENT_OFFSET, 15109 },
{ 0x1d6f6, G_UNICODE_NOT_PRESENT_OFFSET, 1374 },
{ 0x1d6f7, G_UNICODE_NOT_PRESENT_OFFSET, 15112 },
{ 0x1d6f8, G_UNICODE_NOT_PRESENT_OFFSET, 15115 },
{ 0x1d6f9, G_UNICODE_NOT_PRESENT_OFFSET, 15118 },
{ 0x1d6fa, G_UNICODE_NOT_PRESENT_OFFSET, 5333 },
{ 0x1d6fb, G_UNICODE_NOT_PRESENT_OFFSET, 15121 },
{ 0x1d6fc, G_UNICODE_NOT_PRESENT_OFFSET, 15125 },
{ 0x1d6fd, G_UNICODE_NOT_PRESENT_OFFSET, 1368 },
{ 0x1d6fe, G_UNICODE_NOT_PRESENT_OFFSET, 2418 },
{ 0x1d6ff, G_UNICODE_NOT_PRESENT_OFFSET, 2421 },
{ 0x1d700, G_UNICODE_NOT_PRESENT_OFFSET, 1405 },
{ 0x1d701, G_UNICODE_NOT_PRESENT_OFFSET, 15128 },
{ 0x1d702, G_UNICODE_NOT_PRESENT_OFFSET, 15131 },
{ 0x1d703, G_UNICODE_NOT_PRESENT_OFFSET, 1371 },
{ 0x1d704, G_UNICODE_NOT_PRESENT_OFFSET, 4860 },
{ 0x1d705, G_UNICODE_NOT_PRESENT_OFFSET, 1393 },
{ 0x1d706, G_UNICODE_NOT_PRESENT_OFFSET, 15134 },
{ 0x1d707, G_UNICODE_NOT_PRESENT_OFFSET, 20 },
{ 0x1d708, G_UNICODE_NOT_PRESENT_OFFSET, 15137 },
{ 0x1d709, G_UNICODE_NOT_PRESENT_OFFSET, 15140 },
{ 0x1d70a, G_UNICODE_NOT_PRESENT_OFFSET, 15143 },
{ 0x1d70b, G_UNICODE_NOT_PRESENT_OFFSET, 1390 },
{ 0x1d70c, G_UNICODE_NOT_PRESENT_OFFSET, 1396 },
{ 0x1d70d, G_UNICODE_NOT_PRESENT_OFFSET, 1399 },
{ 0x1d70e, G_UNICODE_NOT_PRESENT_OFFSET, 15146 },
{ 0x1d70f, G_UNICODE_NOT_PRESENT_OFFSET, 15149 },
{ 0x1d710, G_UNICODE_NOT_PRESENT_OFFSET, 15152 },
{ 0x1d711, G_UNICODE_NOT_PRESENT_OFFSET, 1387 },
{ 0x1d712, G_UNICODE_NOT_PRESENT_OFFSET, 2424 },
{ 0x1d713, G_UNICODE_NOT_PRESENT_OFFSET, 15155 },
{ 0x1d714, G_UNICODE_NOT_PRESENT_OFFSET, 15158 },
{ 0x1d715, G_UNICODE_NOT_PRESENT_OFFSET, 15161 },
{ 0x1d716, G_UNICODE_NOT_PRESENT_OFFSET, 1405 },
{ 0x1d717, G_UNICODE_NOT_PRESENT_OFFSET, 1371 },
{ 0x1d718, G_UNICODE_NOT_PRESENT_OFFSET, 1393 },
{ 0x1d719, G_UNICODE_NOT_PRESENT_OFFSET, 1387 },
{ 0x1d71a, G_UNICODE_NOT_PRESENT_OFFSET, 1396 },
{ 0x1d71b, G_UNICODE_NOT_PRESENT_OFFSET, 1390 },
{ 0x1d71c, G_UNICODE_NOT_PRESENT_OFFSET, 15067 },
{ 0x1d71d, G_UNICODE_NOT_PRESENT_OFFSET, 15070 },
{ 0x1d71e, G_UNICODE_NOT_PRESENT_OFFSET, 5354 },
{ 0x1d71f, G_UNICODE_NOT_PRESENT_OFFSET, 15073 },
{ 0x1d720, G_UNICODE_NOT_PRESENT_OFFSET, 15076 },
{ 0x1d721, G_UNICODE_NOT_PRESENT_OFFSET, 15079 },
{ 0x1d722, G_UNICODE_NOT_PRESENT_OFFSET, 15082 },
{ 0x1d723, G_UNICODE_NOT_PRESENT_OFFSET, 1402 },
{ 0x1d724, G_UNICODE_NOT_PRESENT_OFFSET, 15085 },
{ 0x1d725, G_UNICODE_NOT_PRESENT_OFFSET, 15088 },
{ 0x1d726, G_UNICODE_NOT_PRESENT_OFFSET, 15091 },
{ 0x1d727, G_UNICODE_NOT_PRESENT_OFFSET, 15094 },
{ 0x1d728, G_UNICODE_NOT_PRESENT_OFFSET, 15097 },
{ 0x1d729, G_UNICODE_NOT_PRESENT_OFFSET, 15100 },
{ 0x1d72a, G_UNICODE_NOT_PRESENT_OFFSET, 15103 },
{ 0x1d72b, G_UNICODE_NOT_PRESENT_OFFSET, 5357 },
{ 0x1d72c, G_UNICODE_NOT_PRESENT_OFFSET, 15106 },
{ 0x1d72d, G_UNICODE_NOT_PRESENT_OFFSET, 1402 },
{ 0x1d72e, G_UNICODE_NOT_PRESENT_OFFSET, 1408 },
{ 0x1d72f, G_UNICODE_NOT_PRESENT_OFFSET, 15109 },
{ 0x1d730, G_UNICODE_NOT_PRESENT_OFFSET, 1374 },
{ 0x1d731, G_UNICODE_NOT_PRESENT_OFFSET, 15112 },
{ 0x1d732, G_UNICODE_NOT_PRESENT_OFFSET, 15115 },
{ 0x1d733, G_UNICODE_NOT_PRESENT_OFFSET, 15118 },
{ 0x1d734, G_UNICODE_NOT_PRESENT_OFFSET, 5333 },
{ 0x1d735, G_UNICODE_NOT_PRESENT_OFFSET, 15121 },
{ 0x1d736, G_UNICODE_NOT_PRESENT_OFFSET, 15125 },
{ 0x1d737, G_UNICODE_NOT_PRESENT_OFFSET, 1368 },
{ 0x1d738, G_UNICODE_NOT_PRESENT_OFFSET, 2418 },
{ 0x1d739, G_UNICODE_NOT_PRESENT_OFFSET, 2421 },
{ 0x1d73a, G_UNICODE_NOT_PRESENT_OFFSET, 1405 },
{ 0x1d73b, G_UNICODE_NOT_PRESENT_OFFSET, 15128 },
{ 0x1d73c, G_UNICODE_NOT_PRESENT_OFFSET, 15131 },
{ 0x1d73d, G_UNICODE_NOT_PRESENT_OFFSET, 1371 },
{ 0x1d73e, G_UNICODE_NOT_PRESENT_OFFSET, 4860 },
{ 0x1d73f, G_UNICODE_NOT_PRESENT_OFFSET, 1393 },
{ 0x1d740, G_UNICODE_NOT_PRESENT_OFFSET, 15134 },
{ 0x1d741, G_UNICODE_NOT_PRESENT_OFFSET, 20 },
{ 0x1d742, G_UNICODE_NOT_PRESENT_OFFSET, 15137 },
{ 0x1d743, G_UNICODE_NOT_PRESENT_OFFSET, 15140 },
{ 0x1d744, G_UNICODE_NOT_PRESENT_OFFSET, 15143 },
{ 0x1d745, G_UNICODE_NOT_PRESENT_OFFSET, 1390 },
{ 0x1d746, G_UNICODE_NOT_PRESENT_OFFSET, 1396 },
{ 0x1d747, G_UNICODE_NOT_PRESENT_OFFSET, 1399 },
{ 0x1d748, G_UNICODE_NOT_PRESENT_OFFSET, 15146 },
{ 0x1d749, G_UNICODE_NOT_PRESENT_OFFSET, 15149 },
{ 0x1d74a, G_UNICODE_NOT_PRESENT_OFFSET, 15152 },
{ 0x1d74b, G_UNICODE_NOT_PRESENT_OFFSET, 1387 },
{ 0x1d74c, G_UNICODE_NOT_PRESENT_OFFSET, 2424 },
{ 0x1d74d, G_UNICODE_NOT_PRESENT_OFFSET, 15155 },
{ 0x1d74e, G_UNICODE_NOT_PRESENT_OFFSET, 15158 },
{ 0x1d74f, G_UNICODE_NOT_PRESENT_OFFSET, 15161 },
{ 0x1d750, G_UNICODE_NOT_PRESENT_OFFSET, 1405 },
{ 0x1d751, G_UNICODE_NOT_PRESENT_OFFSET, 1371 },
{ 0x1d752, G_UNICODE_NOT_PRESENT_OFFSET, 1393 },
{ 0x1d753, G_UNICODE_NOT_PRESENT_OFFSET, 1387 },
{ 0x1d754, G_UNICODE_NOT_PRESENT_OFFSET, 1396 },
{ 0x1d755, G_UNICODE_NOT_PRESENT_OFFSET, 1390 },
{ 0x1d756, G_UNICODE_NOT_PRESENT_OFFSET, 15067 },
{ 0x1d757, G_UNICODE_NOT_PRESENT_OFFSET, 15070 },
{ 0x1d758, G_UNICODE_NOT_PRESENT_OFFSET, 5354 },
{ 0x1d759, G_UNICODE_NOT_PRESENT_OFFSET, 15073 },
{ 0x1d75a, G_UNICODE_NOT_PRESENT_OFFSET, 15076 },
{ 0x1d75b, G_UNICODE_NOT_PRESENT_OFFSET, 15079 },
{ 0x1d75c, G_UNICODE_NOT_PRESENT_OFFSET, 15082 },
{ 0x1d75d, G_UNICODE_NOT_PRESENT_OFFSET, 1402 },
{ 0x1d75e, G_UNICODE_NOT_PRESENT_OFFSET, 15085 },
{ 0x1d75f, G_UNICODE_NOT_PRESENT_OFFSET, 15088 },
{ 0x1d760, G_UNICODE_NOT_PRESENT_OFFSET, 15091 },
{ 0x1d761, G_UNICODE_NOT_PRESENT_OFFSET, 15094 },
{ 0x1d762, G_UNICODE_NOT_PRESENT_OFFSET, 15097 },
{ 0x1d763, G_UNICODE_NOT_PRESENT_OFFSET, 15100 },
{ 0x1d764, G_UNICODE_NOT_PRESENT_OFFSET, 15103 },
{ 0x1d765, G_UNICODE_NOT_PRESENT_OFFSET, 5357 },
{ 0x1d766, G_UNICODE_NOT_PRESENT_OFFSET, 15106 },
{ 0x1d767, G_UNICODE_NOT_PRESENT_OFFSET, 1402 },
{ 0x1d768, G_UNICODE_NOT_PRESENT_OFFSET, 1408 },
{ 0x1d769, G_UNICODE_NOT_PRESENT_OFFSET, 15109 },
{ 0x1d76a, G_UNICODE_NOT_PRESENT_OFFSET, 1374 },
{ 0x1d76b, G_UNICODE_NOT_PRESENT_OFFSET, 15112 },
{ 0x1d76c, G_UNICODE_NOT_PRESENT_OFFSET, 15115 },
{ 0x1d76d, G_UNICODE_NOT_PRESENT_OFFSET, 15118 },
{ 0x1d76e, G_UNICODE_NOT_PRESENT_OFFSET, 5333 },
{ 0x1d76f, G_UNICODE_NOT_PRESENT_OFFSET, 15121 },
{ 0x1d770, G_UNICODE_NOT_PRESENT_OFFSET, 15125 },
{ 0x1d771, G_UNICODE_NOT_PRESENT_OFFSET, 1368 },
{ 0x1d772, G_UNICODE_NOT_PRESENT_OFFSET, 2418 },
{ 0x1d773, G_UNICODE_NOT_PRESENT_OFFSET, 2421 },
{ 0x1d774, G_UNICODE_NOT_PRESENT_OFFSET, 1405 },
{ 0x1d775, G_UNICODE_NOT_PRESENT_OFFSET, 15128 },
{ 0x1d776, G_UNICODE_NOT_PRESENT_OFFSET, 15131 },
{ 0x1d777, G_UNICODE_NOT_PRESENT_OFFSET, 1371 },
{ 0x1d778, G_UNICODE_NOT_PRESENT_OFFSET, 4860 },
{ 0x1d779, G_UNICODE_NOT_PRESENT_OFFSET, 1393 },
{ 0x1d77a, G_UNICODE_NOT_PRESENT_OFFSET, 15134 },
{ 0x1d77b, G_UNICODE_NOT_PRESENT_OFFSET, 20 },
{ 0x1d77c, G_UNICODE_NOT_PRESENT_OFFSET, 15137 },
{ 0x1d77d, G_UNICODE_NOT_PRESENT_OFFSET, 15140 },
{ 0x1d77e, G_UNICODE_NOT_PRESENT_OFFSET, 15143 },
{ 0x1d77f, G_UNICODE_NOT_PRESENT_OFFSET, 1390 },
{ 0x1d780, G_UNICODE_NOT_PRESENT_OFFSET, 1396 },
{ 0x1d781, G_UNICODE_NOT_PRESENT_OFFSET, 1399 },
{ 0x1d782, G_UNICODE_NOT_PRESENT_OFFSET, 15146 },
{ 0x1d783, G_UNICODE_NOT_PRESENT_OFFSET, 15149 },
{ 0x1d784, G_UNICODE_NOT_PRESENT_OFFSET, 15152 },
{ 0x1d785, G_UNICODE_NOT_PRESENT_OFFSET, 1387 },
{ 0x1d786, G_UNICODE_NOT_PRESENT_OFFSET, 2424 },
{ 0x1d787, G_UNICODE_NOT_PRESENT_OFFSET, 15155 },
{ 0x1d788, G_UNICODE_NOT_PRESENT_OFFSET, 15158 },
{ 0x1d789, G_UNICODE_NOT_PRESENT_OFFSET, 15161 },
{ 0x1d78a, G_UNICODE_NOT_PRESENT_OFFSET, 1405 },
{ 0x1d78b, G_UNICODE_NOT_PRESENT_OFFSET, 1371 },
{ 0x1d78c, G_UNICODE_NOT_PRESENT_OFFSET, 1393 },
{ 0x1d78d, G_UNICODE_NOT_PRESENT_OFFSET, 1387 },
{ 0x1d78e, G_UNICODE_NOT_PRESENT_OFFSET, 1396 },
{ 0x1d78f, G_UNICODE_NOT_PRESENT_OFFSET, 1390 },
{ 0x1d790, G_UNICODE_NOT_PRESENT_OFFSET, 15067 },
{ 0x1d791, G_UNICODE_NOT_PRESENT_OFFSET, 15070 },
{ 0x1d792, G_UNICODE_NOT_PRESENT_OFFSET, 5354 },
{ 0x1d793, G_UNICODE_NOT_PRESENT_OFFSET, 15073 },
{ 0x1d794, G_UNICODE_NOT_PRESENT_OFFSET, 15076 },
{ 0x1d795, G_UNICODE_NOT_PRESENT_OFFSET, 15079 },
{ 0x1d796, G_UNICODE_NOT_PRESENT_OFFSET, 15082 },
{ 0x1d797, G_UNICODE_NOT_PRESENT_OFFSET, 1402 },
{ 0x1d798, G_UNICODE_NOT_PRESENT_OFFSET, 15085 },
{ 0x1d799, G_UNICODE_NOT_PRESENT_OFFSET, 15088 },
{ 0x1d79a, G_UNICODE_NOT_PRESENT_OFFSET, 15091 },
{ 0x1d79b, G_UNICODE_NOT_PRESENT_OFFSET, 15094 },
{ 0x1d79c, G_UNICODE_NOT_PRESENT_OFFSET, 15097 },
{ 0x1d79d, G_UNICODE_NOT_PRESENT_OFFSET, 15100 },
{ 0x1d79e, G_UNICODE_NOT_PRESENT_OFFSET, 15103 },
{ 0x1d79f, G_UNICODE_NOT_PRESENT_OFFSET, 5357 },
{ 0x1d7a0, G_UNICODE_NOT_PRESENT_OFFSET, 15106 },
{ 0x1d7a1, G_UNICODE_NOT_PRESENT_OFFSET, 1402 },
{ 0x1d7a2, G_UNICODE_NOT_PRESENT_OFFSET, 1408 },
{ 0x1d7a3, G_UNICODE_NOT_PRESENT_OFFSET, 15109 },
{ 0x1d7a4, G_UNICODE_NOT_PRESENT_OFFSET, 1374 },
{ 0x1d7a5, G_UNICODE_NOT_PRESENT_OFFSET, 15112 },
{ 0x1d7a6, G_UNICODE_NOT_PRESENT_OFFSET, 15115 },
{ 0x1d7a7, G_UNICODE_NOT_PRESENT_OFFSET, 15118 },
{ 0x1d7a8, G_UNICODE_NOT_PRESENT_OFFSET, 5333 },
{ 0x1d7a9, G_UNICODE_NOT_PRESENT_OFFSET, 15121 },
{ 0x1d7aa, G_UNICODE_NOT_PRESENT_OFFSET, 15125 },
{ 0x1d7ab, G_UNICODE_NOT_PRESENT_OFFSET, 1368 },
{ 0x1d7ac, G_UNICODE_NOT_PRESENT_OFFSET, 2418 },
{ 0x1d7ad, G_UNICODE_NOT_PRESENT_OFFSET, 2421 },
{ 0x1d7ae, G_UNICODE_NOT_PRESENT_OFFSET, 1405 },
{ 0x1d7af, G_UNICODE_NOT_PRESENT_OFFSET, 15128 },
{ 0x1d7b0, G_UNICODE_NOT_PRESENT_OFFSET, 15131 },
{ 0x1d7b1, G_UNICODE_NOT_PRESENT_OFFSET, 1371 },
{ 0x1d7b2, G_UNICODE_NOT_PRESENT_OFFSET, 4860 },
{ 0x1d7b3, G_UNICODE_NOT_PRESENT_OFFSET, 1393 },
{ 0x1d7b4, G_UNICODE_NOT_PRESENT_OFFSET, 15134 },
{ 0x1d7b5, G_UNICODE_NOT_PRESENT_OFFSET, 20 },
{ 0x1d7b6, G_UNICODE_NOT_PRESENT_OFFSET, 15137 },
{ 0x1d7b7, G_UNICODE_NOT_PRESENT_OFFSET, 15140 },
{ 0x1d7b8, G_UNICODE_NOT_PRESENT_OFFSET, 15143 },
{ 0x1d7b9, G_UNICODE_NOT_PRESENT_OFFSET, 1390 },
{ 0x1d7ba, G_UNICODE_NOT_PRESENT_OFFSET, 1396 },
{ 0x1d7bb, G_UNICODE_NOT_PRESENT_OFFSET, 1399 },
{ 0x1d7bc, G_UNICODE_NOT_PRESENT_OFFSET, 15146 },
{ 0x1d7bd, G_UNICODE_NOT_PRESENT_OFFSET, 15149 },
{ 0x1d7be, G_UNICODE_NOT_PRESENT_OFFSET, 15152 },
{ 0x1d7bf, G_UNICODE_NOT_PRESENT_OFFSET, 1387 },
{ 0x1d7c0, G_UNICODE_NOT_PRESENT_OFFSET, 2424 },
{ 0x1d7c1, G_UNICODE_NOT_PRESENT_OFFSET, 15155 },
{ 0x1d7c2, G_UNICODE_NOT_PRESENT_OFFSET, 15158 },
{ 0x1d7c3, G_UNICODE_NOT_PRESENT_OFFSET, 15161 },
{ 0x1d7c4, G_UNICODE_NOT_PRESENT_OFFSET, 1405 },
{ 0x1d7c5, G_UNICODE_NOT_PRESENT_OFFSET, 1371 },
{ 0x1d7c6, G_UNICODE_NOT_PRESENT_OFFSET, 1393 },
{ 0x1d7c7, G_UNICODE_NOT_PRESENT_OFFSET, 1387 },
{ 0x1d7c8, G_UNICODE_NOT_PRESENT_OFFSET, 1396 },
{ 0x1d7c9, G_UNICODE_NOT_PRESENT_OFFSET, 1390 },
{ 0x1d7ca, G_UNICODE_NOT_PRESENT_OFFSET, 15165 },
{ 0x1d7cb, G_UNICODE_NOT_PRESENT_OFFSET, 15168 },
{ 0x1d7ce, G_UNICODE_NOT_PRESENT_OFFSET, 5253 },
{ 0x1d7cf, G_UNICODE_NOT_PRESENT_OFFSET, 27 },
{ 0x1d7d0, G_UNICODE_NOT_PRESENT_OFFSET, 12 },
{ 0x1d7d1, G_UNICODE_NOT_PRESENT_OFFSET, 14 },
{ 0x1d7d2, G_UNICODE_NOT_PRESENT_OFFSET, 5255 },
{ 0x1d7d3, G_UNICODE_NOT_PRESENT_OFFSET, 5257 },
{ 0x1d7d4, G_UNICODE_NOT_PRESENT_OFFSET, 5259 },
{ 0x1d7d5, G_UNICODE_NOT_PRESENT_OFFSET, 5261 },
{ 0x1d7d6, G_UNICODE_NOT_PRESENT_OFFSET, 5263 },
{ 0x1d7d7, G_UNICODE_NOT_PRESENT_OFFSET, 5265 },
{ 0x1d7d8, G_UNICODE_NOT_PRESENT_OFFSET, 5253 },
{ 0x1d7d9, G_UNICODE_NOT_PRESENT_OFFSET, 27 },
{ 0x1d7da, G_UNICODE_NOT_PRESENT_OFFSET, 12 },
{ 0x1d7db, G_UNICODE_NOT_PRESENT_OFFSET, 14 },
{ 0x1d7dc, G_UNICODE_NOT_PRESENT_OFFSET, 5255 },
{ 0x1d7dd, G_UNICODE_NOT_PRESENT_OFFSET, 5257 },
{ 0x1d7de, G_UNICODE_NOT_PRESENT_OFFSET, 5259 },
{ 0x1d7df, G_UNICODE_NOT_PRESENT_OFFSET, 5261 },
{ 0x1d7e0, G_UNICODE_NOT_PRESENT_OFFSET, 5263 },
{ 0x1d7e1, G_UNICODE_NOT_PRESENT_OFFSET, 5265 },
{ 0x1d7e2, G_UNICODE_NOT_PRESENT_OFFSET, 5253 },
{ 0x1d7e3, G_UNICODE_NOT_PRESENT_OFFSET, 27 },
{ 0x1d7e4, G_UNICODE_NOT_PRESENT_OFFSET, 12 },
{ 0x1d7e5, G_UNICODE_NOT_PRESENT_OFFSET, 14 },
{ 0x1d7e6, G_UNICODE_NOT_PRESENT_OFFSET, 5255 },
{ 0x1d7e7, G_UNICODE_NOT_PRESENT_OFFSET, 5257 },
{ 0x1d7e8, G_UNICODE_NOT_PRESENT_OFFSET, 5259 },
{ 0x1d7e9, G_UNICODE_NOT_PRESENT_OFFSET, 5261 },
{ 0x1d7ea, G_UNICODE_NOT_PRESENT_OFFSET, 5263 },
{ 0x1d7eb, G_UNICODE_NOT_PRESENT_OFFSET, 5265 },
{ 0x1d7ec, G_UNICODE_NOT_PRESENT_OFFSET, 5253 },
{ 0x1d7ed, G_UNICODE_NOT_PRESENT_OFFSET, 27 },
{ 0x1d7ee, G_UNICODE_NOT_PRESENT_OFFSET, 12 },
{ 0x1d7ef, G_UNICODE_NOT_PRESENT_OFFSET, 14 },
{ 0x1d7f0, G_UNICODE_NOT_PRESENT_OFFSET, 5255 },
{ 0x1d7f1, G_UNICODE_NOT_PRESENT_OFFSET, 5257 },
{ 0x1d7f2, G_UNICODE_NOT_PRESENT_OFFSET, 5259 },
{ 0x1d7f3, G_UNICODE_NOT_PRESENT_OFFSET, 5261 },
{ 0x1d7f4, G_UNICODE_NOT_PRESENT_OFFSET, 5263 },
{ 0x1d7f5, G_UNICODE_NOT_PRESENT_OFFSET, 5265 },
{ 0x1d7f6, G_UNICODE_NOT_PRESENT_OFFSET, 5253 },
{ 0x1d7f7, G_UNICODE_NOT_PRESENT_OFFSET, 27 },
{ 0x1d7f8, G_UNICODE_NOT_PRESENT_OFFSET, 12 },
{ 0x1d7f9, G_UNICODE_NOT_PRESENT_OFFSET, 14 },
{ 0x1d7fa, G_UNICODE_NOT_PRESENT_OFFSET, 5255 },
{ 0x1d7fb, G_UNICODE_NOT_PRESENT_OFFSET, 5257 },
{ 0x1d7fc, G_UNICODE_NOT_PRESENT_OFFSET, 5259 },
{ 0x1d7fd, G_UNICODE_NOT_PRESENT_OFFSET, 5261 },
{ 0x1d7fe, G_UNICODE_NOT_PRESENT_OFFSET, 5263 },
{ 0x1d7ff, G_UNICODE_NOT_PRESENT_OFFSET, 5265 },
{ 0x2f800, 15171, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f801, 15175, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f802, 15179, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f803, 15183, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f804, 15188, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f805, 11915, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f806, 15192, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f807, 15196, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f808, 15200, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f809, 15204, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f80a, 11919, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f80b, 15208, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f80c, 15212, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f80d, 15216, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f80e, 11923, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f80f, 15221, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f810, 15225, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f811, 15229, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f812, 15233, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f813, 15238, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f814, 15242, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f815, 15246, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f816, 15250, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f817, 15255, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f818, 15259, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f819, 15263, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f81a, 15267, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f81b, 12131, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f81c, 15271, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f81d, 6220, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f81e, 15276, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f81f, 15280, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f820, 15284, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f821, 15288, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f822, 15292, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f823, 15296, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f824, 15300, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f825, 12151, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f826, 11927, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f827, 11931, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f828, 12155, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f829, 15304, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f82a, 15308, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f82b, 11207, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f82c, 15312, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f82d, 11935, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f82e, 15316, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f82f, 15320, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f830, 15324, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f831, 15328, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f832, 15328, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f833, 15328, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f834, 15332, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f835, 15337, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f836, 15341, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f837, 15345, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f838, 15349, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f839, 15354, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f83a, 15358, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f83b, 15362, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f83c, 15366, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f83d, 15370, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f83e, 15374, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f83f, 15378, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f840, 15382, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f841, 15386, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f842, 15390, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f843, 15394, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f844, 15398, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f845, 15402, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f846, 15402, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f847, 12163, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f848, 15406, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f849, 15410, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f84a, 15414, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f84b, 15418, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f84c, 11943, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f84d, 15422, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f84e, 15426, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f84f, 15430, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f850, 11791, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f851, 15434, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f852, 15438, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f853, 15442, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f854, 15446, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f855, 15450, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f856, 15454, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f857, 15458, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f858, 15462, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f859, 15466, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f85a, 15471, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f85b, 15475, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f85c, 15479, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f85d, 15483, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f85e, 15487, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f85f, 15491, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f860, 15495, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f861, 15500, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f862, 15505, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f863, 15509, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f864, 15513, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f865, 15517, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f866, 15521, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f867, 15525, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f868, 15529, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f869, 15533, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f86a, 15537, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f86b, 15537, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f86c, 15541, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f86d, 15546, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f86e, 15550, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f86f, 11191, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f870, 15554, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f871, 15558, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f872, 15563, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f873, 15567, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f874, 15571, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f875, 6324, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f876, 15575, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f877, 15579, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f878, 6332, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f879, 15583, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f87a, 15587, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f87b, 15591, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f87c, 15596, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f87d, 15600, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f87e, 15605, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f87f, 15609, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f880, 15613, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f881, 15617, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f882, 15621, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f883, 15625, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f884, 15629, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f885, 15633, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f886, 15637, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f887, 15641, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f888, 15645, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f889, 15649, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f88a, 15654, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f88b, 15658, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f88c, 15662, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f88d, 15666, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f88e, 10983, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f88f, 15670, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f890, 6372, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f891, 15675, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f892, 15675, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f893, 15680, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f894, 15684, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f895, 15684, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f896, 15688, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f897, 15692, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f898, 15697, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f899, 15702, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f89a, 15706, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f89b, 15710, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f89c, 15714, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f89d, 15718, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f89e, 15722, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f89f, 15726, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8a0, 15730, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8a1, 15734, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8a2, 15738, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8a3, 11963, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8a4, 15742, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8a5, 15747, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8a6, 15751, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8a7, 15755, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8a8, 12211, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8a9, 15755, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8aa, 15759, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8ab, 11971, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8ac, 15763, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8ad, 15767, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8ae, 15771, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8af, 15775, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8b0, 11975, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8b1, 10875, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8b2, 15779, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8b3, 15783, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8b4, 15787, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8b5, 15791, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8b6, 15795, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8b7, 15799, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8b8, 15803, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8b9, 15808, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8ba, 15812, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8bb, 15816, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8bc, 15820, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8bd, 15824, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8be, 15828, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8bf, 15833, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8c0, 15837, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8c1, 15841, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8c2, 15845, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8c3, 15849, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8c4, 15853, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8c5, 15857, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8c6, 15861, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8c7, 15865, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8c8, 11979, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8c9, 15869, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8ca, 15873, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8cb, 15878, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8cc, 15882, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8cd, 15886, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8ce, 15890, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8cf, 11987, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8d0, 15894, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8d1, 15898, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8d2, 15902, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8d3, 15906, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8d4, 15910, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8d5, 15914, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8d6, 15918, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8d7, 15922, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8d8, 10987, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8d9, 12243, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8da, 15926, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8db, 15930, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8dc, 15934, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8dd, 15938, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8de, 15943, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8df, 15947, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8e0, 15951, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8e1, 15955, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8e2, 11991, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8e3, 15959, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8e4, 15964, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8e5, 15968, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8e6, 15972, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8e7, 12414, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8e8, 15976, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8e9, 15980, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8ea, 15984, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8eb, 15988, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8ec, 15992, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8ed, 15997, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8ee, 16001, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8ef, 16005, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8f0, 16009, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8f1, 16014, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8f2, 16018, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8f3, 16022, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8f4, 16026, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8f5, 11259, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8f6, 16030, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8f7, 16034, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8f8, 16039, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8f9, 16044, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8fa, 16049, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8fb, 16053, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8fc, 16058, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8fd, 16062, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8fe, 16066, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f8ff, 16070, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f900, 16074, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f901, 11995, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f902, 11591, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f903, 16078, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f904, 16082, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f905, 16086, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f906, 16090, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f907, 16095, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f908, 16099, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f909, 16103, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f90a, 16107, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f90b, 12255, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f90c, 16111, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f90d, 16115, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f90e, 16120, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f90f, 16124, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f910, 16128, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f911, 16133, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f912, 16138, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f913, 16142, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f914, 12259, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f915, 16146, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f916, 16150, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f917, 16154, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f918, 16158, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f919, 16162, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f91a, 16166, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f91b, 16170, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f91c, 16175, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f91d, 16179, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f91e, 16184, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f91f, 16188, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f920, 16193, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f921, 12267, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f922, 16197, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f923, 16201, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f924, 16206, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f925, 16210, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f926, 16214, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f927, 16219, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f928, 16224, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f929, 16228, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f92a, 16232, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f92b, 16236, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f92c, 16240, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f92d, 16240, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f92e, 16244, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f92f, 16248, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f930, 12275, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f931, 16252, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f932, 16256, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f933, 16260, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f934, 16264, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f935, 16268, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f936, 16273, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f937, 16277, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f938, 11203, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f939, 16282, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f93a, 16287, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f93b, 16291, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f93c, 16296, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f93d, 16301, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f93e, 16306, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f93f, 16310, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f940, 12299, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f941, 16314, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f942, 16319, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f943, 16324, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f944, 16329, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f945, 16334, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f946, 16338, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f947, 16338, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f948, 12303, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f949, 12422, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f94a, 16342, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f94b, 16346, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f94c, 16350, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f94d, 16354, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f94e, 16359, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f94f, 11055, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f950, 12311, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f951, 16363, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f952, 16367, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f953, 12035, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f954, 16372, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f955, 16377, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f956, 11871, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f957, 16382, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f958, 16386, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f959, 12047, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f95a, 16390, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f95b, 16394, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f95c, 16398, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f95d, 16403, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f95e, 16403, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f95f, 16408, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f960, 16412, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f961, 16416, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f962, 16421, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f963, 16425, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f964, 16429, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f965, 16433, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f966, 16438, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f967, 16442, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f968, 16446, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f969, 16450, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f96a, 16454, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f96b, 16458, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f96c, 16463, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f96d, 16467, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f96e, 16471, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f96f, 16475, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f970, 16479, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f971, 16483, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f972, 16487, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f973, 16492, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f974, 16497, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f975, 16501, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f976, 16506, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f977, 16510, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f978, 16515, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f979, 16519, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f97a, 12071, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f97b, 16523, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f97c, 16528, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f97d, 16533, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f97e, 16537, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f97f, 16542, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f980, 16546, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f981, 16551, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f982, 16555, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f983, 16559, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f984, 16563, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f985, 16567, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f986, 16571, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f987, 16575, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f988, 16580, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f989, 16585, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f98a, 16590, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f98b, 15680, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f98c, 16595, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f98d, 16599, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f98e, 16603, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f98f, 16607, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f990, 16611, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f991, 16615, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f992, 16619, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f993, 16623, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f994, 16627, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f995, 16631, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f996, 16635, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f997, 16639, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f998, 11271, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f999, 16644, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f99a, 16648, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f99b, 16652, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f99c, 16656, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f99d, 16660, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f99e, 16664, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f99f, 12083, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9a0, 16668, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9a1, 16672, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9a2, 16676, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9a3, 16680, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9a4, 16684, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9a5, 16689, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9a6, 16694, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9a7, 16699, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9a8, 16703, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9a9, 16707, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9aa, 16711, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9ab, 16715, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9ac, 16720, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9ad, 16724, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9ae, 16729, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9af, 16733, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9b0, 16737, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9b1, 16742, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9b2, 16747, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9b3, 16751, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9b4, 11035, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9b5, 16755, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9b6, 16759, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9b7, 16763, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9b8, 16767, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9b9, 16771, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9ba, 16775, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9bb, 12339, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9bc, 16779, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9bd, 16783, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9be, 16787, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9bf, 16791, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9c0, 16795, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9c1, 16799, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9c2, 16803, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9c3, 16807, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9c4, 6732, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9c5, 16811, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9c6, 16816, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9c7, 16820, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9c8, 16824, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9c9, 16828, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9ca, 16832, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9cb, 16836, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9cc, 16841, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9cd, 16846, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9ce, 16850, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9cf, 16854, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9d0, 12359, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9d1, 12363, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9d2, 6760, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9d3, 16858, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9d4, 16863, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9d5, 16867, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9d6, 16871, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9d7, 16875, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9d8, 16879, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9d9, 16884, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9da, 16889, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9db, 16893, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9dc, 16897, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9dd, 16901, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9de, 16906, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9df, 12367, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9e0, 16910, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9e1, 16915, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9e2, 16920, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9e3, 16924, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9e4, 16928, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9e5, 16932, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9e6, 16937, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9e7, 16941, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9e8, 16945, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9e9, 16949, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9ea, 16953, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9eb, 16957, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9ec, 16961, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9ed, 16965, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9ee, 16970, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9ef, 16974, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9f0, 16978, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9f1, 16982, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9f2, 16987, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9f3, 16991, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9f4, 16995, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9f5, 16999, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9f6, 17003, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9f7, 17008, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9f8, 17013, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9f9, 17017, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9fa, 17021, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9fb, 17025, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9fc, 17030, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9fd, 17034, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9fe, 12391, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2f9ff, 12391, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa00, 17039, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa01, 17043, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa02, 17048, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa03, 17052, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa04, 17056, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa05, 17060, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa06, 17064, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa07, 17068, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa08, 17072, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa09, 17076, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa0a, 12395, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa0b, 17081, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa0c, 17085, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa0d, 17089, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa0e, 17093, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa0f, 17097, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa10, 17101, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa11, 17106, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa12, 17110, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa13, 17115, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa14, 17120, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa15, 6952, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa16, 17125, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa17, 6968, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa18, 17129, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa19, 17133, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa1a, 17137, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa1b, 17141, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa1c, 6988, G_UNICODE_NOT_PRESENT_OFFSET },
{ 0x2fa1d, 17145, G_UNICODE_NOT_PRESENT_OFFSET }
};
static const gchar decomp_expansion_string[] =
"\x20\0" /* offset 0 */
"\x20\xcc\x88\0" /* offset 2 */
"\x61\0" /* offset 6 */
"\x20\xcc\x84\0" /* offset 8 */
"\x32\0" /* offset 12 */
"\x33\0" /* offset 14 */
"\x20\xcc\x81\0" /* offset 16 */
"\xce\xbc\0" /* offset 20 */
"\x20\xcc\xa7\0" /* offset 23 */
"\x31\0" /* offset 27 */
"\x6f\0" /* offset 29 */
"\x31\xe2\x81\x84\x34\0" /* offset 31 */
"\x31\xe2\x81\x84\x32\0" /* offset 37 */
"\x33\xe2\x81\x84\x34\0" /* offset 43 */
"\x41\xcc\x80\0" /* offset 49 */
"\x41\xcc\x81\0" /* offset 53 */
"\x41\xcc\x82\0" /* offset 57 */
"\x41\xcc\x83\0" /* offset 61 */
"\x41\xcc\x88\0" /* offset 65 */
"\x41\xcc\x8a\0" /* offset 69 */
"\x43\xcc\xa7\0" /* offset 73 */
"\x45\xcc\x80\0" /* offset 77 */
"\x45\xcc\x81\0" /* offset 81 */
"\x45\xcc\x82\0" /* offset 85 */
"\x45\xcc\x88\0" /* offset 89 */
"\x49\xcc\x80\0" /* offset 93 */
"\x49\xcc\x81\0" /* offset 97 */
"\x49\xcc\x82\0" /* offset 101 */
"\x49\xcc\x88\0" /* offset 105 */
"\x4e\xcc\x83\0" /* offset 109 */
"\x4f\xcc\x80\0" /* offset 113 */
"\x4f\xcc\x81\0" /* offset 117 */
"\x4f\xcc\x82\0" /* offset 121 */
"\x4f\xcc\x83\0" /* offset 125 */
"\x4f\xcc\x88\0" /* offset 129 */
"\x55\xcc\x80\0" /* offset 133 */
"\x55\xcc\x81\0" /* offset 137 */
"\x55\xcc\x82\0" /* offset 141 */
"\x55\xcc\x88\0" /* offset 145 */
"\x59\xcc\x81\0" /* offset 149 */
"\x61\xcc\x80\0" /* offset 153 */
"\x61\xcc\x81\0" /* offset 157 */
"\x61\xcc\x82\0" /* offset 161 */
"\x61\xcc\x83\0" /* offset 165 */
"\x61\xcc\x88\0" /* offset 169 */
"\x61\xcc\x8a\0" /* offset 173 */
"\x63\xcc\xa7\0" /* offset 177 */
"\x65\xcc\x80\0" /* offset 181 */
"\x65\xcc\x81\0" /* offset 185 */
"\x65\xcc\x82\0" /* offset 189 */
"\x65\xcc\x88\0" /* offset 193 */
"\x69\xcc\x80\0" /* offset 197 */
"\x69\xcc\x81\0" /* offset 201 */
"\x69\xcc\x82\0" /* offset 205 */
"\x69\xcc\x88\0" /* offset 209 */
"\x6e\xcc\x83\0" /* offset 213 */
"\x6f\xcc\x80\0" /* offset 217 */
"\x6f\xcc\x81\0" /* offset 221 */
"\x6f\xcc\x82\0" /* offset 225 */
"\x6f\xcc\x83\0" /* offset 229 */
"\x6f\xcc\x88\0" /* offset 233 */
"\x75\xcc\x80\0" /* offset 237 */
"\x75\xcc\x81\0" /* offset 241 */
"\x75\xcc\x82\0" /* offset 245 */
"\x75\xcc\x88\0" /* offset 249 */
"\x79\xcc\x81\0" /* offset 253 */
"\x79\xcc\x88\0" /* offset 257 */
"\x41\xcc\x84\0" /* offset 261 */
"\x61\xcc\x84\0" /* offset 265 */
"\x41\xcc\x86\0" /* offset 269 */
"\x61\xcc\x86\0" /* offset 273 */
"\x41\xcc\xa8\0" /* offset 277 */
"\x61\xcc\xa8\0" /* offset 281 */
"\x43\xcc\x81\0" /* offset 285 */
"\x63\xcc\x81\0" /* offset 289 */
"\x43\xcc\x82\0" /* offset 293 */
"\x63\xcc\x82\0" /* offset 297 */
"\x43\xcc\x87\0" /* offset 301 */
"\x63\xcc\x87\0" /* offset 305 */
"\x43\xcc\x8c\0" /* offset 309 */
"\x63\xcc\x8c\0" /* offset 313 */
"\x44\xcc\x8c\0" /* offset 317 */
"\x64\xcc\x8c\0" /* offset 321 */
"\x45\xcc\x84\0" /* offset 325 */
"\x65\xcc\x84\0" /* offset 329 */
"\x45\xcc\x86\0" /* offset 333 */
"\x65\xcc\x86\0" /* offset 337 */
"\x45\xcc\x87\0" /* offset 341 */
"\x65\xcc\x87\0" /* offset 345 */
"\x45\xcc\xa8\0" /* offset 349 */
"\x65\xcc\xa8\0" /* offset 353 */
"\x45\xcc\x8c\0" /* offset 357 */
"\x65\xcc\x8c\0" /* offset 361 */
"\x47\xcc\x82\0" /* offset 365 */
"\x67\xcc\x82\0" /* offset 369 */
"\x47\xcc\x86\0" /* offset 373 */
"\x67\xcc\x86\0" /* offset 377 */
"\x47\xcc\x87\0" /* offset 381 */
"\x67\xcc\x87\0" /* offset 385 */
"\x47\xcc\xa7\0" /* offset 389 */
"\x67\xcc\xa7\0" /* offset 393 */
"\x48\xcc\x82\0" /* offset 397 */
"\x68\xcc\x82\0" /* offset 401 */
"\x49\xcc\x83\0" /* offset 405 */
"\x69\xcc\x83\0" /* offset 409 */
"\x49\xcc\x84\0" /* offset 413 */
"\x69\xcc\x84\0" /* offset 417 */
"\x49\xcc\x86\0" /* offset 421 */
"\x69\xcc\x86\0" /* offset 425 */
"\x49\xcc\xa8\0" /* offset 429 */
"\x69\xcc\xa8\0" /* offset 433 */
"\x49\xcc\x87\0" /* offset 437 */
"\x49\x4a\0" /* offset 441 */
"\x69\x6a\0" /* offset 444 */
"\x4a\xcc\x82\0" /* offset 447 */
"\x6a\xcc\x82\0" /* offset 451 */
"\x4b\xcc\xa7\0" /* offset 455 */
"\x6b\xcc\xa7\0" /* offset 459 */
"\x4c\xcc\x81\0" /* offset 463 */
"\x6c\xcc\x81\0" /* offset 467 */
"\x4c\xcc\xa7\0" /* offset 471 */
"\x6c\xcc\xa7\0" /* offset 475 */
"\x4c\xcc\x8c\0" /* offset 479 */
"\x6c\xcc\x8c\0" /* offset 483 */
"\x4c\xc2\xb7\0" /* offset 487 */
"\x6c\xc2\xb7\0" /* offset 491 */
"\x4e\xcc\x81\0" /* offset 495 */
"\x6e\xcc\x81\0" /* offset 499 */
"\x4e\xcc\xa7\0" /* offset 503 */
"\x6e\xcc\xa7\0" /* offset 507 */
"\x4e\xcc\x8c\0" /* offset 511 */
"\x6e\xcc\x8c\0" /* offset 515 */
"\xca\xbc\x6e\0" /* offset 519 */
"\x4f\xcc\x84\0" /* offset 523 */
"\x6f\xcc\x84\0" /* offset 527 */
"\x4f\xcc\x86\0" /* offset 531 */
"\x6f\xcc\x86\0" /* offset 535 */
"\x4f\xcc\x8b\0" /* offset 539 */
"\x6f\xcc\x8b\0" /* offset 543 */
"\x52\xcc\x81\0" /* offset 547 */
"\x72\xcc\x81\0" /* offset 551 */
"\x52\xcc\xa7\0" /* offset 555 */
"\x72\xcc\xa7\0" /* offset 559 */
"\x52\xcc\x8c\0" /* offset 563 */
"\x72\xcc\x8c\0" /* offset 567 */
"\x53\xcc\x81\0" /* offset 571 */
"\x73\xcc\x81\0" /* offset 575 */
"\x53\xcc\x82\0" /* offset 579 */
"\x73\xcc\x82\0" /* offset 583 */
"\x53\xcc\xa7\0" /* offset 587 */
"\x73\xcc\xa7\0" /* offset 591 */
"\x53\xcc\x8c\0" /* offset 595 */
"\x73\xcc\x8c\0" /* offset 599 */
"\x54\xcc\xa7\0" /* offset 603 */
"\x74\xcc\xa7\0" /* offset 607 */
"\x54\xcc\x8c\0" /* offset 611 */
"\x74\xcc\x8c\0" /* offset 615 */
"\x55\xcc\x83\0" /* offset 619 */
"\x75\xcc\x83\0" /* offset 623 */
"\x55\xcc\x84\0" /* offset 627 */
"\x75\xcc\x84\0" /* offset 631 */
"\x55\xcc\x86\0" /* offset 635 */
"\x75\xcc\x86\0" /* offset 639 */
"\x55\xcc\x8a\0" /* offset 643 */
"\x75\xcc\x8a\0" /* offset 647 */
"\x55\xcc\x8b\0" /* offset 651 */
"\x75\xcc\x8b\0" /* offset 655 */
"\x55\xcc\xa8\0" /* offset 659 */
"\x75\xcc\xa8\0" /* offset 663 */
"\x57\xcc\x82\0" /* offset 667 */
"\x77\xcc\x82\0" /* offset 671 */
"\x59\xcc\x82\0" /* offset 675 */
"\x79\xcc\x82\0" /* offset 679 */
"\x59\xcc\x88\0" /* offset 683 */
"\x5a\xcc\x81\0" /* offset 687 */
"\x7a\xcc\x81\0" /* offset 691 */
"\x5a\xcc\x87\0" /* offset 695 */
"\x7a\xcc\x87\0" /* offset 699 */
"\x5a\xcc\x8c\0" /* offset 703 */
"\x7a\xcc\x8c\0" /* offset 707 */
"\x73\0" /* offset 711 */
"\x4f\xcc\x9b\0" /* offset 713 */
"\x6f\xcc\x9b\0" /* offset 717 */
"\x55\xcc\x9b\0" /* offset 721 */
"\x75\xcc\x9b\0" /* offset 725 */
"\x44\x5a\xcc\x8c\0" /* offset 729 */
"\x44\x7a\xcc\x8c\0" /* offset 734 */
"\x64\x7a\xcc\x8c\0" /* offset 739 */
"\x4c\x4a\0" /* offset 744 */
"\x4c\x6a\0" /* offset 747 */
"\x6c\x6a\0" /* offset 750 */
"\x4e\x4a\0" /* offset 753 */
"\x4e\x6a\0" /* offset 756 */
"\x6e\x6a\0" /* offset 759 */
"\x41\xcc\x8c\0" /* offset 762 */
"\x61\xcc\x8c\0" /* offset 766 */
"\x49\xcc\x8c\0" /* offset 770 */
"\x69\xcc\x8c\0" /* offset 774 */
"\x4f\xcc\x8c\0" /* offset 778 */
"\x6f\xcc\x8c\0" /* offset 782 */
"\x55\xcc\x8c\0" /* offset 786 */
"\x75\xcc\x8c\0" /* offset 790 */
"\x55\xcc\x88\xcc\x84\0" /* offset 794 */
"\x75\xcc\x88\xcc\x84\0" /* offset 800 */
"\x55\xcc\x88\xcc\x81\0" /* offset 806 */
"\x75\xcc\x88\xcc\x81\0" /* offset 812 */
"\x55\xcc\x88\xcc\x8c\0" /* offset 818 */
"\x75\xcc\x88\xcc\x8c\0" /* offset 824 */
"\x55\xcc\x88\xcc\x80\0" /* offset 830 */
"\x75\xcc\x88\xcc\x80\0" /* offset 836 */
"\x41\xcc\x88\xcc\x84\0" /* offset 842 */
"\x61\xcc\x88\xcc\x84\0" /* offset 848 */
"\x41\xcc\x87\xcc\x84\0" /* offset 854 */
"\x61\xcc\x87\xcc\x84\0" /* offset 860 */
"\xc3\x86\xcc\x84\0" /* offset 866 */
"\xc3\xa6\xcc\x84\0" /* offset 871 */
"\x47\xcc\x8c\0" /* offset 876 */
"\x67\xcc\x8c\0" /* offset 880 */
"\x4b\xcc\x8c\0" /* offset 884 */
"\x6b\xcc\x8c\0" /* offset 888 */
"\x4f\xcc\xa8\0" /* offset 892 */
"\x6f\xcc\xa8\0" /* offset 896 */
"\x4f\xcc\xa8\xcc\x84\0" /* offset 900 */
"\x6f\xcc\xa8\xcc\x84\0" /* offset 906 */
"\xc6\xb7\xcc\x8c\0" /* offset 912 */
"\xca\x92\xcc\x8c\0" /* offset 917 */
"\x6a\xcc\x8c\0" /* offset 922 */
"\x44\x5a\0" /* offset 926 */
"\x44\x7a\0" /* offset 929 */
"\x64\x7a\0" /* offset 932 */
"\x47\xcc\x81\0" /* offset 935 */
"\x67\xcc\x81\0" /* offset 939 */
"\x4e\xcc\x80\0" /* offset 943 */
"\x6e\xcc\x80\0" /* offset 947 */
"\x41\xcc\x8a\xcc\x81\0" /* offset 951 */
"\x61\xcc\x8a\xcc\x81\0" /* offset 957 */
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"\xe0\xa4\x9c\xe0\xa4\xbc\0" /* offset 1778 */
"\xe0\xa4\xa1\xe0\xa4\xbc\0" /* offset 1785 */
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"\xe0\xa7\x87\xe0\xa6\xbe\0" /* offset 1813 */
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"\xe0\xa6\xa1\xe0\xa6\xbc\0" /* offset 1827 */
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"\xe0\xa8\xb2\xe0\xa8\xbc\0" /* offset 1848 */
"\xe0\xa8\xb8\xe0\xa8\xbc\0" /* offset 1855 */
"\xe0\xa8\x96\xe0\xa8\xbc\0" /* offset 1862 */
"\xe0\xa8\x97\xe0\xa8\xbc\0" /* offset 1869 */
"\xe0\xa8\x9c\xe0\xa8\xbc\0" /* offset 1876 */
"\xe0\xa8\xab\xe0\xa8\xbc\0" /* offset 1883 */
"\xe0\xad\x87\xe0\xad\x96\0" /* offset 1890 */
"\xe0\xad\x87\xe0\xac\xbe\0" /* offset 1897 */
"\xe0\xad\x87\xe0\xad\x97\0" /* offset 1904 */
"\xe0\xac\xa1\xe0\xac\xbc\0" /* offset 1911 */
"\xe0\xac\xa2\xe0\xac\xbc\0" /* offset 1918 */
"\xe0\xae\x92\xe0\xaf\x97\0" /* offset 1925 */
"\xe0\xaf\x86\xe0\xae\xbe\0" /* offset 1932 */
"\xe0\xaf\x87\xe0\xae\xbe\0" /* offset 1939 */
"\xe0\xaf\x86\xe0\xaf\x97\0" /* offset 1946 */
"\xe0\xb1\x86\xe0\xb1\x96\0" /* offset 1953 */
"\xe0\xb2\xbf\xe0\xb3\x95\0" /* offset 1960 */
"\xe0\xb3\x86\xe0\xb3\x95\0" /* offset 1967 */
"\xe0\xb3\x86\xe0\xb3\x96\0" /* offset 1974 */
"\xe0\xb3\x86\xe0\xb3\x82\0" /* offset 1981 */
"\xe0\xb3\x86\xe0\xb3\x82\xe0\xb3\x95\0" /* offset 1988 */
"\xe0\xb5\x86\xe0\xb4\xbe\0" /* offset 1998 */
"\xe0\xb5\x87\xe0\xb4\xbe\0" /* offset 2005 */
"\xe0\xb5\x86\xe0\xb5\x97\0" /* offset 2012 */
"\xe0\xb7\x99\xe0\xb7\x8a\0" /* offset 2019 */
"\xe0\xb7\x99\xe0\xb7\x8f\0" /* offset 2026 */
"\xe0\xb7\x99\xe0\xb7\x8f\xe0\xb7\x8a\0" /* offset 2033 */
"\xe0\xb7\x99\xe0\xb7\x9f\0" /* offset 2043 */
"\xe0\xb9\x8d\xe0\xb8\xb2\0" /* offset 2050 */
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"\xe0\xbe\xb2\xe0\xbd\xb1\xe0\xbe\x80\0" /* offset 2145 */
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"\xe0\xbe\xb3\xe0\xbd\xb1\xe0\xbe\x80\0" /* offset 2162 */
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"\x45\xcc\x84\xcc\x81\0" /* offset 2633 */
"\x65\xcc\x84\xcc\x81\0" /* offset 2639 */
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"\x45\xcc\xa7\xcc\x86\0" /* offset 2661 */
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"\xce\x97\xcc\x93\xcc\x81\xcd\x85\0" /* offset 4623 */
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"\xce\x97\xcc\x93\xcd\x82\xcd\x85\0" /* offset 4641 */
"\xce\x97\xcc\x94\xcd\x82\xcd\x85\0" /* offset 4650 */
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"\xcf\x89\xcc\x94\xcd\x85\0" /* offset 4666 */
"\xcf\x89\xcc\x93\xcc\x80\xcd\x85\0" /* offset 4673 */
"\xcf\x89\xcc\x94\xcc\x80\xcd\x85\0" /* offset 4682 */
"\xcf\x89\xcc\x93\xcc\x81\xcd\x85\0" /* offset 4691 */
"\xcf\x89\xcc\x94\xcc\x81\xcd\x85\0" /* offset 4700 */
"\xcf\x89\xcc\x93\xcd\x82\xcd\x85\0" /* offset 4709 */
"\xcf\x89\xcc\x94\xcd\x82\xcd\x85\0" /* offset 4718 */
"\xce\xa9\xcc\x93\xcd\x85\0" /* offset 4727 */
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"\xce\xa9\xcc\x93\xcc\x80\xcd\x85\0" /* offset 4741 */
"\xce\xa9\xcc\x94\xcc\x80\xcd\x85\0" /* offset 4750 */
"\xce\xa9\xcc\x93\xcc\x81\xcd\x85\0" /* offset 4759 */
"\xce\xa9\xcc\x94\xcc\x81\xcd\x85\0" /* offset 4768 */
"\xce\xa9\xcc\x93\xcd\x82\xcd\x85\0" /* offset 4777 */
"\xce\xa9\xcc\x94\xcd\x82\xcd\x85\0" /* offset 4786 */
"\xce\xb1\xcc\x86\0" /* offset 4795 */
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"\xce\x91\xcc\x86\0" /* offset 4836 */
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"\xe2\x80\xb5\xe2\x80\xb5\xe2\x80\xb5\0" /* offset 5214 */
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"\xe2\x88\xab\xe2\x88\xab\xe2\x88\xab\0" /* offset 5582 */
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"\xe2\x88\xae\xe2\x88\xae\xe2\x88\xae\0" /* offset 5599 */
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"\xe6\x94\xb4\0" /* offset 6416 */
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"\xe6\x96\x97\0" /* offset 6424 */
"\xe6\x96\xa4\0" /* offset 6428 */
"\xe6\x96\xb9\0" /* offset 6432 */
"\xe6\x97\xa0\0" /* offset 6436 */
"\xe6\x97\xa5\0" /* offset 6440 */
"\xe6\x9b\xb0\0" /* offset 6444 */
"\xe6\x9c\x88\0" /* offset 6448 */
"\xe6\x9c\xa8\0" /* offset 6452 */
"\xe6\xac\xa0\0" /* offset 6456 */
"\xe6\xad\xa2\0" /* offset 6460 */
"\xe6\xad\xb9\0" /* offset 6464 */
"\xe6\xae\xb3\0" /* offset 6468 */
"\xe6\xaf\x8b\0" /* offset 6472 */
"\xe6\xaf\x94\0" /* offset 6476 */
"\xe6\xaf\x9b\0" /* offset 6480 */
"\xe6\xb0\x8f\0" /* offset 6484 */
"\xe6\xb0\x94\0" /* offset 6488 */
"\xe6\xb0\xb4\0" /* offset 6492 */
"\xe7\x81\xab\0" /* offset 6496 */
"\xe7\x88\xaa\0" /* offset 6500 */
"\xe7\x88\xb6\0" /* offset 6504 */
"\xe7\x88\xbb\0" /* offset 6508 */
"\xe7\x88\xbf\0" /* offset 6512 */
"\xe7\x89\x87\0" /* offset 6516 */
"\xe7\x89\x99\0" /* offset 6520 */
"\xe7\x89\x9b\0" /* offset 6524 */
"\xe7\x8a\xac\0" /* offset 6528 */
"\xe7\x8e\x84\0" /* offset 6532 */
"\xe7\x8e\x89\0" /* offset 6536 */
"\xe7\x93\x9c\0" /* offset 6540 */
"\xe7\x93\xa6\0" /* offset 6544 */
"\xe7\x94\x98\0" /* offset 6548 */
"\xe7\x94\x9f\0" /* offset 6552 */
"\xe7\x94\xa8\0" /* offset 6556 */
"\xe7\x94\xb0\0" /* offset 6560 */
"\xe7\x96\x8b\0" /* offset 6564 */
"\xe7\x96\x92\0" /* offset 6568 */
"\xe7\x99\xb6\0" /* offset 6572 */
"\xe7\x99\xbd\0" /* offset 6576 */
"\xe7\x9a\xae\0" /* offset 6580 */
"\xe7\x9a\xbf\0" /* offset 6584 */
"\xe7\x9b\xae\0" /* offset 6588 */
"\xe7\x9f\x9b\0" /* offset 6592 */
"\xe7\x9f\xa2\0" /* offset 6596 */
"\xe7\x9f\xb3\0" /* offset 6600 */
"\xe7\xa4\xba\0" /* offset 6604 */
"\xe7\xa6\xb8\0" /* offset 6608 */
"\xe7\xa6\xbe\0" /* offset 6612 */
"\xe7\xa9\xb4\0" /* offset 6616 */
"\xe7\xab\x8b\0" /* offset 6620 */
"\xe7\xab\xb9\0" /* offset 6624 */
"\xe7\xb1\xb3\0" /* offset 6628 */
"\xe7\xb3\xb8\0" /* offset 6632 */
"\xe7\xbc\xb6\0" /* offset 6636 */
"\xe7\xbd\x91\0" /* offset 6640 */
"\xe7\xbe\x8a\0" /* offset 6644 */
"\xe7\xbe\xbd\0" /* offset 6648 */
"\xe8\x80\x81\0" /* offset 6652 */
"\xe8\x80\x8c\0" /* offset 6656 */
"\xe8\x80\x92\0" /* offset 6660 */
"\xe8\x80\xb3\0" /* offset 6664 */
"\xe8\x81\xbf\0" /* offset 6668 */
"\xe8\x82\x89\0" /* offset 6672 */
"\xe8\x87\xa3\0" /* offset 6676 */
"\xe8\x87\xaa\0" /* offset 6680 */
"\xe8\x87\xb3\0" /* offset 6684 */
"\xe8\x87\xbc\0" /* offset 6688 */
"\xe8\x88\x8c\0" /* offset 6692 */
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"\xe8\x88\x9f\0" /* offset 6700 */
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"\xe8\x89\xb2\0" /* offset 6708 */
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"\xe8\xa6\x8b\0" /* offset 6740 */
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"\xe8\xb0\xb7\0" /* offset 6752 */
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"\xe8\xb1\x95\0" /* offset 6760 */
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"\xe8\xb2\x9d\0" /* offset 6768 */
"\xe8\xb5\xa4\0" /* offset 6772 */
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"\xe8\xbb\x8a\0" /* offset 6788 */
"\xe8\xbe\x9b\0" /* offset 6792 */
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"\xe9\x82\x91\0" /* offset 6804 */
"\xe9\x85\x89\0" /* offset 6808 */
"\xe9\x87\x86\0" /* offset 6812 */
"\xe9\x87\x8c\0" /* offset 6816 */
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"\xe9\x9d\x9e\0" /* offset 6852 */
"\xe9\x9d\xa2\0" /* offset 6856 */
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"\xe9\x9f\x8b\0" /* offset 6864 */
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"\xe9\x9f\xb3\0" /* offset 6872 */
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"\xe9\xa2\xa8\0" /* offset 6880 */
"\xe9\xa3\x9b\0" /* offset 6884 */
"\xe9\xa3\x9f\0" /* offset 6888 */
"\xe9\xa6\x96\0" /* offset 6892 */
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"\xe9\xa6\xac\0" /* offset 6900 */
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"\xe9\xab\x98\0" /* offset 6908 */
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"\xe9\xad\x9a\0" /* offset 6932 */
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"\xe9\xbb\x83\0" /* offset 6956 */
"\xe9\xbb\x8d\0" /* offset 6960 */
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"\xe9\xbc\x8e\0" /* offset 6976 */
"\xe9\xbc\x93\0" /* offset 6980 */
"\xe9\xbc\xa0\0" /* offset 6984 */
"\xe9\xbc\xbb\0" /* offset 6988 */
"\xe9\xbd\x8a\0" /* offset 6992 */
"\xe9\xbd\x92\0" /* offset 6996 */
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"\xe3\x80\x92\0" /* offset 7012 */
"\xe5\x8d\x84\0" /* offset 7016 */
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"\xe3\x81\x8b\xe3\x82\x99\0" /* offset 7024 */
"\xe3\x81\x8d\xe3\x82\x99\0" /* offset 7031 */
"\xe3\x81\x8f\xe3\x82\x99\0" /* offset 7038 */
"\xe3\x81\x91\xe3\x82\x99\0" /* offset 7045 */
"\xe3\x81\x93\xe3\x82\x99\0" /* offset 7052 */
"\xe3\x81\x95\xe3\x82\x99\0" /* offset 7059 */
"\xe3\x81\x97\xe3\x82\x99\0" /* offset 7066 */
"\xe3\x81\x99\xe3\x82\x99\0" /* offset 7073 */
"\xe3\x81\x9b\xe3\x82\x99\0" /* offset 7080 */
"\xe3\x81\x9d\xe3\x82\x99\0" /* offset 7087 */
"\xe3\x81\x9f\xe3\x82\x99\0" /* offset 7094 */
"\xe3\x81\xa1\xe3\x82\x99\0" /* offset 7101 */
"\xe3\x81\xa4\xe3\x82\x99\0" /* offset 7108 */
"\xe3\x81\xa6\xe3\x82\x99\0" /* offset 7115 */
"\xe3\x81\xa8\xe3\x82\x99\0" /* offset 7122 */
"\xe3\x81\xaf\xe3\x82\x99\0" /* offset 7129 */
"\xe3\x81\xaf\xe3\x82\x9a\0" /* offset 7136 */
"\xe3\x81\xb2\xe3\x82\x99\0" /* offset 7143 */
"\xe3\x81\xb2\xe3\x82\x9a\0" /* offset 7150 */
"\xe3\x81\xb5\xe3\x82\x99\0" /* offset 7157 */
"\xe3\x81\xb5\xe3\x82\x9a\0" /* offset 7164 */
"\xe3\x81\xb8\xe3\x82\x99\0" /* offset 7171 */
"\xe3\x81\xb8\xe3\x82\x9a\0" /* offset 7178 */
"\xe3\x81\xbb\xe3\x82\x99\0" /* offset 7185 */
"\xe3\x81\xbb\xe3\x82\x9a\0" /* offset 7192 */
"\xe3\x81\x86\xe3\x82\x99\0" /* offset 7199 */
"\x20\xe3\x82\x99\0" /* offset 7206 */
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"\xe3\x82\x9d\xe3\x82\x99\0" /* offset 7216 */
"\xe3\x82\x88\xe3\x82\x8a\0" /* offset 7223 */
"\xe3\x82\xab\xe3\x82\x99\0" /* offset 7230 */
"\xe3\x82\xad\xe3\x82\x99\0" /* offset 7237 */
"\xe3\x82\xaf\xe3\x82\x99\0" /* offset 7244 */
"\xe3\x82\xb1\xe3\x82\x99\0" /* offset 7251 */
"\xe3\x82\xb3\xe3\x82\x99\0" /* offset 7258 */
"\xe3\x82\xb5\xe3\x82\x99\0" /* offset 7265 */
"\xe3\x82\xb7\xe3\x82\x99\0" /* offset 7272 */
"\xe3\x82\xb9\xe3\x82\x99\0" /* offset 7279 */
"\xe3\x82\xbb\xe3\x82\x99\0" /* offset 7286 */
"\xe3\x82\xbd\xe3\x82\x99\0" /* offset 7293 */
"\xe3\x82\xbf\xe3\x82\x99\0" /* offset 7300 */
"\xe3\x83\x81\xe3\x82\x99\0" /* offset 7307 */
"\xe3\x83\x84\xe3\x82\x99\0" /* offset 7314 */
"\xe3\x83\x86\xe3\x82\x99\0" /* offset 7321 */
"\xe3\x83\x88\xe3\x82\x99\0" /* offset 7328 */
"\xe3\x83\x8f\xe3\x82\x99\0" /* offset 7335 */
"\xe3\x83\x8f\xe3\x82\x9a\0" /* offset 7342 */
"\xe3\x83\x92\xe3\x82\x99\0" /* offset 7349 */
"\xe3\x83\x92\xe3\x82\x9a\0" /* offset 7356 */
"\xe3\x83\x95\xe3\x82\x99\0" /* offset 7363 */
"\xe3\x83\x95\xe3\x82\x9a\0" /* offset 7370 */
"\xe3\x83\x98\xe3\x82\x99\0" /* offset 7377 */
"\xe3\x83\x98\xe3\x82\x9a\0" /* offset 7384 */
"\xe3\x83\x9b\xe3\x82\x99\0" /* offset 7391 */
"\xe3\x83\x9b\xe3\x82\x9a\0" /* offset 7398 */
"\xe3\x82\xa6\xe3\x82\x99\0" /* offset 7405 */
"\xe3\x83\xaf\xe3\x82\x99\0" /* offset 7412 */
"\xe3\x83\xb0\xe3\x82\x99\0" /* offset 7419 */
"\xe3\x83\xb1\xe3\x82\x99\0" /* offset 7426 */
"\xe3\x83\xb2\xe3\x82\x99\0" /* offset 7433 */
"\xe3\x83\xbd\xe3\x82\x99\0" /* offset 7440 */
"\xe3\x82\xb3\xe3\x83\x88\0" /* offset 7447 */
"\xe1\x84\x80\0" /* offset 7454 */
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"\xe1\x84\x83\0" /* offset 7478 */
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"\xe1\x86\xb0\0" /* offset 7490 */
"\xe1\x86\xb1\0" /* offset 7494 */
"\xe1\x86\xb2\0" /* offset 7498 */
"\xe1\x86\xb3\0" /* offset 7502 */
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"\xe1\x84\x9a\0" /* offset 7514 */
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"\xe1\x84\x87\0" /* offset 7522 */
"\xe1\x84\x88\0" /* offset 7526 */
"\xe1\x84\xa1\0" /* offset 7530 */
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"\xe1\x84\x8a\0" /* offset 7538 */
"\xe1\x84\x8b\0" /* offset 7542 */
"\xe1\x84\x8c\0" /* offset 7546 */
"\xe1\x84\x8d\0" /* offset 7550 */
"\xe1\x84\x8e\0" /* offset 7554 */
"\xe1\x84\x8f\0" /* offset 7558 */
"\xe1\x84\x90\0" /* offset 7562 */
"\xe1\x84\x91\0" /* offset 7566 */
"\xe1\x84\x92\0" /* offset 7570 */
"\xe1\x85\xa1\0" /* offset 7574 */
"\xe1\x85\xa2\0" /* offset 7578 */
"\xe1\x85\xa3\0" /* offset 7582 */
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"\xe1\x85\xa6\0" /* offset 7594 */
"\xe1\x85\xa7\0" /* offset 7598 */
"\xe1\x85\xa8\0" /* offset 7602 */
"\xe1\x85\xa9\0" /* offset 7606 */
"\xe1\x85\xaa\0" /* offset 7610 */
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"\xe1\x85\xac\0" /* offset 7618 */
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"\xe1\x85\xb4\0" /* offset 7650 */
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"\xe1\x84\x94\0" /* offset 7662 */
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"\xe1\x87\x87\0" /* offset 7670 */
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"\xe1\x87\x8c\0" /* offset 7678 */
"\xe1\x87\x8e\0" /* offset 7682 */
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"\xe1\x87\x99\0" /* offset 7694 */
"\xe1\x84\x9c\0" /* offset 7698 */
"\xe1\x87\x9d\0" /* offset 7702 */
"\xe1\x87\x9f\0" /* offset 7706 */
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"\xe1\x84\xa2\0" /* offset 7722 */
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"\xe1\x87\xb2\0" /* offset 7782 */
"\xe1\x85\x97\0" /* offset 7786 */
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"\xe1\x86\x84\0" /* offset 7798 */
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"\xe1\x86\x91\0" /* offset 7810 */
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"\xe1\x86\x9e\0" /* offset 7822 */
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"\xe4\xb8\x89\0" /* offset 7830 */
"\xe5\x9b\x9b\0" /* offset 7834 */
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"\xe5\x9c\xb0\0" /* offset 7866 */
"\x28\xe1\x84\x80\x29\0" /* offset 7870 */
"\x28\xe1\x84\x82\x29\0" /* offset 7876 */
"\x28\xe1\x84\x83\x29\0" /* offset 7882 */
"\x28\xe1\x84\x85\x29\0" /* offset 7888 */
"\x28\xe1\x84\x86\x29\0" /* offset 7894 */
"\x28\xe1\x84\x87\x29\0" /* offset 7900 */
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"\x28\xe1\x84\x8b\x29\0" /* offset 7912 */
"\x28\xe1\x84\x8c\x29\0" /* offset 7918 */
"\x28\xe1\x84\x8e\x29\0" /* offset 7924 */
"\x28\xe1\x84\x8f\x29\0" /* offset 7930 */
"\x28\xe1\x84\x90\x29\0" /* offset 7936 */
"\x28\xe1\x84\x91\x29\0" /* offset 7942 */
"\x28\xe1\x84\x92\x29\0" /* offset 7948 */
"\x28\xe1\x84\x80\xe1\x85\xa1\x29\0" /* offset 7954 */
"\x28\xe1\x84\x82\xe1\x85\xa1\x29\0" /* offset 7963 */
"\x28\xe1\x84\x83\xe1\x85\xa1\x29\0" /* offset 7972 */
"\x28\xe1\x84\x85\xe1\x85\xa1\x29\0" /* offset 7981 */
"\x28\xe1\x84\x86\xe1\x85\xa1\x29\0" /* offset 7990 */
"\x28\xe1\x84\x87\xe1\x85\xa1\x29\0" /* offset 7999 */
"\x28\xe1\x84\x89\xe1\x85\xa1\x29\0" /* offset 8008 */
"\x28\xe1\x84\x8b\xe1\x85\xa1\x29\0" /* offset 8017 */
"\x28\xe1\x84\x8c\xe1\x85\xa1\x29\0" /* offset 8026 */
"\x28\xe1\x84\x8e\xe1\x85\xa1\x29\0" /* offset 8035 */
"\x28\xe1\x84\x8f\xe1\x85\xa1\x29\0" /* offset 8044 */
"\x28\xe1\x84\x90\xe1\x85\xa1\x29\0" /* offset 8053 */
"\x28\xe1\x84\x91\xe1\x85\xa1\x29\0" /* offset 8062 */
"\x28\xe1\x84\x92\xe1\x85\xa1\x29\0" /* offset 8071 */
"\x28\xe1\x84\x8c\xe1\x85\xae\x29\0" /* offset 8080 */
"\x28\xe1\x84\x8b\xe1\x85\xa9\xe1\x84\x8c\xe1\x85\xa5\xe1\x86\xab\x29\0" /* offset 8089 */
"\x28\xe1\x84\x8b\xe1\x85\xa9\xe1\x84\x92\xe1\x85\xae\x29\0" /* offset 8107 */
"\x28\xe4\xb8\x80\x29\0" /* offset 8122 */
"\x28\xe4\xba\x8c\x29\0" /* offset 8128 */
"\x28\xe4\xb8\x89\x29\0" /* offset 8134 */
"\x28\xe5\x9b\x9b\x29\0" /* offset 8140 */
"\x28\xe4\xba\x94\x29\0" /* offset 8146 */
"\x28\xe5\x85\xad\x29\0" /* offset 8152 */
"\x28\xe4\xb8\x83\x29\0" /* offset 8158 */
"\x28\xe5\x85\xab\x29\0" /* offset 8164 */
"\x28\xe4\xb9\x9d\x29\0" /* offset 8170 */
"\x28\xe5\x8d\x81\x29\0" /* offset 8176 */
"\x28\xe6\x9c\x88\x29\0" /* offset 8182 */
"\x28\xe7\x81\xab\x29\0" /* offset 8188 */
"\x28\xe6\xb0\xb4\x29\0" /* offset 8194 */
"\x28\xe6\x9c\xa8\x29\0" /* offset 8200 */
"\x28\xe9\x87\x91\x29\0" /* offset 8206 */
"\x28\xe5\x9c\x9f\x29\0" /* offset 8212 */
"\x28\xe6\x97\xa5\x29\0" /* offset 8218 */
"\x28\xe6\xa0\xaa\x29\0" /* offset 8224 */
"\x28\xe6\x9c\x89\x29\0" /* offset 8230 */
"\x28\xe7\xa4\xbe\x29\0" /* offset 8236 */
"\x28\xe5\x90\x8d\x29\0" /* offset 8242 */
"\x28\xe7\x89\xb9\x29\0" /* offset 8248 */
"\x28\xe8\xb2\xa1\x29\0" /* offset 8254 */
"\x28\xe7\xa5\x9d\x29\0" /* offset 8260 */
"\x28\xe5\x8a\xb4\x29\0" /* offset 8266 */
"\x28\xe4\xbb\xa3\x29\0" /* offset 8272 */
"\x28\xe5\x91\xbc\x29\0" /* offset 8278 */
"\x28\xe5\xad\xa6\x29\0" /* offset 8284 */
"\x28\xe7\x9b\xa3\x29\0" /* offset 8290 */
"\x28\xe4\xbc\x81\x29\0" /* offset 8296 */
"\x28\xe8\xb3\x87\x29\0" /* offset 8302 */
"\x28\xe5\x8d\x94\x29\0" /* offset 8308 */
"\x28\xe7\xa5\xad\x29\0" /* offset 8314 */
"\x28\xe4\xbc\x91\x29\0" /* offset 8320 */
"\x28\xe8\x87\xaa\x29\0" /* offset 8326 */
"\x28\xe8\x87\xb3\x29\0" /* offset 8332 */
"\x50\x54\x45\0" /* offset 8338 */
"\x32\x31\0" /* offset 8342 */
"\x32\x32\0" /* offset 8345 */
"\x32\x33\0" /* offset 8348 */
"\x32\x34\0" /* offset 8351 */
"\x32\x35\0" /* offset 8354 */
"\x32\x36\0" /* offset 8357 */
"\x32\x37\0" /* offset 8360 */
"\x32\x38\0" /* offset 8363 */
"\x32\x39\0" /* offset 8366 */
"\x33\x30\0" /* offset 8369 */
"\x33\x31\0" /* offset 8372 */
"\x33\x32\0" /* offset 8375 */
"\x33\x33\0" /* offset 8378 */
"\x33\x34\0" /* offset 8381 */
"\x33\x35\0" /* offset 8384 */
"\xe1\x84\x80\xe1\x85\xa1\0" /* offset 8387 */
"\xe1\x84\x82\xe1\x85\xa1\0" /* offset 8394 */
"\xe1\x84\x83\xe1\x85\xa1\0" /* offset 8401 */
"\xe1\x84\x85\xe1\x85\xa1\0" /* offset 8408 */
"\xe1\x84\x86\xe1\x85\xa1\0" /* offset 8415 */
"\xe1\x84\x87\xe1\x85\xa1\0" /* offset 8422 */
"\xe1\x84\x89\xe1\x85\xa1\0" /* offset 8429 */
"\xe1\x84\x8b\xe1\x85\xa1\0" /* offset 8436 */
"\xe1\x84\x8c\xe1\x85\xa1\0" /* offset 8443 */
"\xe1\x84\x8e\xe1\x85\xa1\0" /* offset 8450 */
"\xe1\x84\x8f\xe1\x85\xa1\0" /* offset 8457 */
"\xe1\x84\x90\xe1\x85\xa1\0" /* offset 8464 */
"\xe1\x84\x91\xe1\x85\xa1\0" /* offset 8471 */
"\xe1\x84\x92\xe1\x85\xa1\0" /* offset 8478 */
"\xe1\x84\x8e\xe1\x85\xa1\xe1\x86\xb7\xe1\x84\x80\xe1\x85\xa9\0" /* offset 8485 */
"\xe1\x84\x8c\xe1\x85\xae\xe1\x84\x8b\xe1\x85\xb4\0" /* offset 8501 */
"\xe1\x84\x8b\xe1\x85\xae\0" /* offset 8514 */
"\xe4\xba\x94\0" /* offset 8521 */
"\xe5\x85\xad\0" /* offset 8525 */
"\xe4\xb8\x83\0" /* offset 8529 */
"\xe4\xb9\x9d\0" /* offset 8533 */
"\xe6\xa0\xaa\0" /* offset 8537 */
"\xe6\x9c\x89\0" /* offset 8541 */
"\xe7\xa4\xbe\0" /* offset 8545 */
"\xe5\x90\x8d\0" /* offset 8549 */
"\xe7\x89\xb9\0" /* offset 8553 */
"\xe8\xb2\xa1\0" /* offset 8557 */
"\xe7\xa5\x9d\0" /* offset 8561 */
"\xe5\x8a\xb4\0" /* offset 8565 */
"\xe7\xa7\x98\0" /* offset 8569 */
"\xe7\x94\xb7\0" /* offset 8573 */
"\xe9\x81\xa9\0" /* offset 8577 */
"\xe5\x84\xaa\0" /* offset 8581 */
"\xe5\x8d\xb0\0" /* offset 8585 */
"\xe6\xb3\xa8\0" /* offset 8589 */
"\xe9\xa0\x85\0" /* offset 8593 */
"\xe4\xbc\x91\0" /* offset 8597 */
"\xe5\x86\x99\0" /* offset 8601 */
"\xe6\xad\xa3\0" /* offset 8605 */
"\xe5\xb7\xa6\0" /* offset 8609 */
"\xe5\x8f\xb3\0" /* offset 8613 */
"\xe5\x8c\xbb\0" /* offset 8617 */
"\xe5\xae\x97\0" /* offset 8621 */
"\xe5\xad\xa6\0" /* offset 8625 */
"\xe7\x9b\xa3\0" /* offset 8629 */
"\xe4\xbc\x81\0" /* offset 8633 */
"\xe8\xb3\x87\0" /* offset 8637 */
"\xe5\x8d\x94\0" /* offset 8641 */
"\xe5\xa4\x9c\0" /* offset 8645 */
"\x33\x36\0" /* offset 8649 */
"\x33\x37\0" /* offset 8652 */
"\x33\x38\0" /* offset 8655 */
"\x33\x39\0" /* offset 8658 */
"\x34\x30\0" /* offset 8661 */
"\x34\x31\0" /* offset 8664 */
"\x34\x32\0" /* offset 8667 */
"\x34\x33\0" /* offset 8670 */
"\x34\x34\0" /* offset 8673 */
"\x34\x35\0" /* offset 8676 */
"\x34\x36\0" /* offset 8679 */
"\x34\x37\0" /* offset 8682 */
"\x34\x38\0" /* offset 8685 */
"\x34\x39\0" /* offset 8688 */
"\x35\x30\0" /* offset 8691 */
"\x31\xe6\x9c\x88\0" /* offset 8694 */
"\x32\xe6\x9c\x88\0" /* offset 8699 */
"\x33\xe6\x9c\x88\0" /* offset 8704 */
"\x34\xe6\x9c\x88\0" /* offset 8709 */
"\x35\xe6\x9c\x88\0" /* offset 8714 */
"\x36\xe6\x9c\x88\0" /* offset 8719 */
"\x37\xe6\x9c\x88\0" /* offset 8724 */
"\x38\xe6\x9c\x88\0" /* offset 8729 */
"\x39\xe6\x9c\x88\0" /* offset 8734 */
"\x31\x30\xe6\x9c\x88\0" /* offset 8739 */
"\x31\x31\xe6\x9c\x88\0" /* offset 8745 */
"\x31\x32\xe6\x9c\x88\0" /* offset 8751 */
"\x48\x67\0" /* offset 8757 */
"\x65\x72\x67\0" /* offset 8760 */
"\x65\x56\0" /* offset 8764 */
"\x4c\x54\x44\0" /* offset 8767 */
"\xe3\x82\xa2\0" /* offset 8771 */
"\xe3\x82\xa4\0" /* offset 8775 */
"\xe3\x82\xa6\0" /* offset 8779 */
"\xe3\x82\xa8\0" /* offset 8783 */
"\xe3\x82\xaa\0" /* offset 8787 */
"\xe3\x82\xab\0" /* offset 8791 */
"\xe3\x82\xad\0" /* offset 8795 */
"\xe3\x82\xaf\0" /* offset 8799 */
"\xe3\x82\xb1\0" /* offset 8803 */
"\xe3\x82\xb3\0" /* offset 8807 */
"\xe3\x82\xb5\0" /* offset 8811 */
"\xe3\x82\xb7\0" /* offset 8815 */
"\xe3\x82\xb9\0" /* offset 8819 */
"\xe3\x82\xbb\0" /* offset 8823 */
"\xe3\x82\xbd\0" /* offset 8827 */
"\xe3\x82\xbf\0" /* offset 8831 */
"\xe3\x83\x81\0" /* offset 8835 */
"\xe3\x83\x84\0" /* offset 8839 */
"\xe3\x83\x86\0" /* offset 8843 */
"\xe3\x83\x88\0" /* offset 8847 */
"\xe3\x83\x8a\0" /* offset 8851 */
"\xe3\x83\x8b\0" /* offset 8855 */
"\xe3\x83\x8c\0" /* offset 8859 */
"\xe3\x83\x8d\0" /* offset 8863 */
"\xe3\x83\x8e\0" /* offset 8867 */
"\xe3\x83\x8f\0" /* offset 8871 */
"\xe3\x83\x92\0" /* offset 8875 */
"\xe3\x83\x95\0" /* offset 8879 */
"\xe3\x83\x98\0" /* offset 8883 */
"\xe3\x83\x9b\0" /* offset 8887 */
"\xe3\x83\x9e\0" /* offset 8891 */
"\xe3\x83\x9f\0" /* offset 8895 */
"\xe3\x83\xa0\0" /* offset 8899 */
"\xe3\x83\xa1\0" /* offset 8903 */
"\xe3\x83\xa2\0" /* offset 8907 */
"\xe3\x83\xa4\0" /* offset 8911 */
"\xe3\x83\xa6\0" /* offset 8915 */
"\xe3\x83\xa8\0" /* offset 8919 */
"\xe3\x83\xa9\0" /* offset 8923 */
"\xe3\x83\xaa\0" /* offset 8927 */
"\xe3\x83\xab\0" /* offset 8931 */
"\xe3\x83\xac\0" /* offset 8935 */
"\xe3\x83\xad\0" /* offset 8939 */
"\xe3\x83\xaf\0" /* offset 8943 */
"\xe3\x83\xb0\0" /* offset 8947 */
"\xe3\x83\xb1\0" /* offset 8951 */
"\xe3\x83\xb2\0" /* offset 8955 */
"\xe3\x82\xa2\xe3\x83\x8f\xe3\x82\x9a\xe3\x83\xbc\xe3\x83\x88\0" /* offset 8959 */
"\xe3\x82\xa2\xe3\x83\xab\xe3\x83\x95\xe3\x82\xa1\0" /* offset 8975 */
"\xe3\x82\xa2\xe3\x83\xb3\xe3\x83\x98\xe3\x82\x9a\xe3\x82\xa2\0" /* offset 8988 */
"\xe3\x82\xa2\xe3\x83\xbc\xe3\x83\xab\0" /* offset 9004 */
"\xe3\x82\xa4\xe3\x83\x8b\xe3\x83\xb3\xe3\x82\xaf\xe3\x82\x99\0" /* offset 9014 */
"\xe3\x82\xa4\xe3\x83\xb3\xe3\x83\x81\0" /* offset 9030 */
"\xe3\x82\xa6\xe3\x82\xa9\xe3\x83\xb3\0" /* offset 9040 */
"\xe3\x82\xa8\xe3\x82\xb9\xe3\x82\xaf\xe3\x83\xbc\xe3\x83\x88\xe3\x82\x99\0" /* offset 9050 */
"\xe3\x82\xa8\xe3\x83\xbc\xe3\x82\xab\xe3\x83\xbc\0" /* offset 9069 */
"\xe3\x82\xaa\xe3\x83\xb3\xe3\x82\xb9\0" /* offset 9082 */
"\xe3\x82\xaa\xe3\x83\xbc\xe3\x83\xa0\0" /* offset 9092 */
"\xe3\x82\xab\xe3\x82\xa4\xe3\x83\xaa\0" /* offset 9102 */
"\xe3\x82\xab\xe3\x83\xa9\xe3\x83\x83\xe3\x83\x88\0" /* offset 9112 */
"\xe3\x82\xab\xe3\x83\xad\xe3\x83\xaa\xe3\x83\xbc\0" /* offset 9125 */
"\xe3\x82\xab\xe3\x82\x99\xe3\x83\xad\xe3\x83\xb3\0" /* offset 9138 */
"\xe3\x82\xab\xe3\x82\x99\xe3\x83\xb3\xe3\x83\x9e\0" /* offset 9151 */
"\xe3\x82\xad\xe3\x82\x99\xe3\x82\xab\xe3\x82\x99\0" /* offset 9164 */
"\xe3\x82\xad\xe3\x82\x99\xe3\x83\x8b\xe3\x83\xbc\0" /* offset 9177 */
"\xe3\x82\xad\xe3\x83\xa5\xe3\x83\xaa\xe3\x83\xbc\0" /* offset 9190 */
"\xe3\x82\xad\xe3\x82\x99\xe3\x83\xab\xe3\x82\xbf\xe3\x82\x99\xe3\x83\xbc\0" /* offset 9203 */
"\xe3\x82\xad\xe3\x83\xad\0" /* offset 9222 */
"\xe3\x82\xad\xe3\x83\xad\xe3\x82\xaf\xe3\x82\x99\xe3\x83\xa9\xe3\x83\xa0\0" /* offset 9229 */
"\xe3\x82\xad\xe3\x83\xad\xe3\x83\xa1\xe3\x83\xbc\xe3\x83\x88\xe3\x83\xab\0" /* offset 9248 */
"\xe3\x82\xad\xe3\x83\xad\xe3\x83\xaf\xe3\x83\x83\xe3\x83\x88\0" /* offset 9267 */
"\xe3\x82\xaf\xe3\x82\x99\xe3\x83\xa9\xe3\x83\xa0\0" /* offset 9283 */
"\xe3\x82\xaf\xe3\x82\x99\xe3\x83\xa9\xe3\x83\xa0\xe3\x83\x88\xe3\x83\xb3\0" /* offset 9296 */
"\xe3\x82\xaf\xe3\x83\xab\xe3\x82\xbb\xe3\x82\x99\xe3\x82\xa4\xe3\x83\xad\0" /* offset 9315 */
"\xe3\x82\xaf\xe3\x83\xad\xe3\x83\xbc\xe3\x83\x8d\0" /* offset 9334 */
"\xe3\x82\xb1\xe3\x83\xbc\xe3\x82\xb9\0" /* offset 9347 */
"\xe3\x82\xb3\xe3\x83\xab\xe3\x83\x8a\0" /* offset 9357 */
"\xe3\x82\xb3\xe3\x83\xbc\xe3\x83\x9b\xe3\x82\x9a\0" /* offset 9367 */
"\xe3\x82\xb5\xe3\x82\xa4\xe3\x82\xaf\xe3\x83\xab\0" /* offset 9380 */
"\xe3\x82\xb5\xe3\x83\xb3\xe3\x83\x81\xe3\x83\xbc\xe3\x83\xa0\0" /* offset 9393 */
"\xe3\x82\xb7\xe3\x83\xaa\xe3\x83\xb3\xe3\x82\xaf\xe3\x82\x99\0" /* offset 9409 */
"\xe3\x82\xbb\xe3\x83\xb3\xe3\x83\x81\0" /* offset 9425 */
"\xe3\x82\xbb\xe3\x83\xb3\xe3\x83\x88\0" /* offset 9435 */
"\xe3\x82\xbf\xe3\x82\x99\xe3\x83\xbc\xe3\x82\xb9\0" /* offset 9445 */
"\xe3\x83\x86\xe3\x82\x99\xe3\x82\xb7\0" /* offset 9458 */
"\xe3\x83\x88\xe3\x82\x99\xe3\x83\xab\0" /* offset 9468 */
"\xe3\x83\x88\xe3\x83\xb3\0" /* offset 9478 */
"\xe3\x83\x8a\xe3\x83\x8e\0" /* offset 9485 */
"\xe3\x83\x8e\xe3\x83\x83\xe3\x83\x88\0" /* offset 9492 */
"\xe3\x83\x8f\xe3\x82\xa4\xe3\x83\x84\0" /* offset 9502 */
"\xe3\x83\x8f\xe3\x82\x9a\xe3\x83\xbc\xe3\x82\xbb\xe3\x83\xb3\xe3\x83\x88\0" /* offset 9512 */
"\xe3\x83\x8f\xe3\x82\x9a\xe3\x83\xbc\xe3\x83\x84\0" /* offset 9531 */
"\xe3\x83\x8f\xe3\x82\x99\xe3\x83\xbc\xe3\x83\xac\xe3\x83\xab\0" /* offset 9544 */
"\xe3\x83\x92\xe3\x82\x9a\xe3\x82\xa2\xe3\x82\xb9\xe3\x83\x88\xe3\x83\xab\0" /* offset 9560 */
"\xe3\x83\x92\xe3\x82\x9a\xe3\x82\xaf\xe3\x83\xab\0" /* offset 9579 */
"\xe3\x83\x92\xe3\x82\x9a\xe3\x82\xb3\0" /* offset 9592 */
"\xe3\x83\x92\xe3\x82\x99\xe3\x83\xab\0" /* offset 9602 */
"\xe3\x83\x95\xe3\x82\xa1\xe3\x83\xa9\xe3\x83\x83\xe3\x83\x88\xe3\x82\x99\0" /* offset 9612 */
"\xe3\x83\x95\xe3\x82\xa3\xe3\x83\xbc\xe3\x83\x88\0" /* offset 9631 */
"\xe3\x83\x95\xe3\x82\x99\xe3\x83\x83\xe3\x82\xb7\xe3\x82\xa7\xe3\x83\xab\0" /* offset 9644 */
"\xe3\x83\x95\xe3\x83\xa9\xe3\x83\xb3\0" /* offset 9663 */
"\xe3\x83\x98\xe3\x82\xaf\xe3\x82\xbf\xe3\x83\xbc\xe3\x83\xab\0" /* offset 9673 */
"\xe3\x83\x98\xe3\x82\x9a\xe3\x82\xbd\0" /* offset 9689 */
"\xe3\x83\x98\xe3\x82\x9a\xe3\x83\x8b\xe3\x83\x92\0" /* offset 9699 */
"\xe3\x83\x98\xe3\x83\xab\xe3\x83\x84\0" /* offset 9712 */
"\xe3\x83\x98\xe3\x82\x9a\xe3\x83\xb3\xe3\x82\xb9\0" /* offset 9722 */
"\xe3\x83\x98\xe3\x82\x9a\xe3\x83\xbc\xe3\x82\xb7\xe3\x82\x99\0" /* offset 9735 */
"\xe3\x83\x98\xe3\x82\x99\xe3\x83\xbc\xe3\x82\xbf\0" /* offset 9751 */
"\xe3\x83\x9b\xe3\x82\x9a\xe3\x82\xa4\xe3\x83\xb3\xe3\x83\x88\0" /* offset 9764 */
"\xe3\x83\x9b\xe3\x82\x99\xe3\x83\xab\xe3\x83\x88\0" /* offset 9780 */
"\xe3\x83\x9b\xe3\x83\xb3\0" /* offset 9793 */
"\xe3\x83\x9b\xe3\x82\x9a\xe3\x83\xb3\xe3\x83\x88\xe3\x82\x99\0" /* offset 9800 */
"\xe3\x83\x9b\xe3\x83\xbc\xe3\x83\xab\0" /* offset 9816 */
"\xe3\x83\x9b\xe3\x83\xbc\xe3\x83\xb3\0" /* offset 9826 */
"\xe3\x83\x9e\xe3\x82\xa4\xe3\x82\xaf\xe3\x83\xad\0" /* offset 9836 */
"\xe3\x83\x9e\xe3\x82\xa4\xe3\x83\xab\0" /* offset 9849 */
"\xe3\x83\x9e\xe3\x83\x83\xe3\x83\x8f\0" /* offset 9859 */
"\xe3\x83\x9e\xe3\x83\xab\xe3\x82\xaf\0" /* offset 9869 */
"\xe3\x83\x9e\xe3\x83\xb3\xe3\x82\xb7\xe3\x83\xa7\xe3\x83\xb3\0" /* offset 9879 */
"\xe3\x83\x9f\xe3\x82\xaf\xe3\x83\xad\xe3\x83\xb3\0" /* offset 9895 */
"\xe3\x83\x9f\xe3\x83\xaa\0" /* offset 9908 */
"\xe3\x83\x9f\xe3\x83\xaa\xe3\x83\x8f\xe3\x82\x99\xe3\x83\xbc\xe3\x83\xab\0" /* offset 9915 */
"\xe3\x83\xa1\xe3\x82\xab\xe3\x82\x99\0" /* offset 9934 */
"\xe3\x83\xa1\xe3\x82\xab\xe3\x82\x99\xe3\x83\x88\xe3\x83\xb3\0" /* offset 9944 */
"\xe3\x83\xa1\xe3\x83\xbc\xe3\x83\x88\xe3\x83\xab\0" /* offset 9960 */
"\xe3\x83\xa4\xe3\x83\xbc\xe3\x83\x88\xe3\x82\x99\0" /* offset 9973 */
"\xe3\x83\xa4\xe3\x83\xbc\xe3\x83\xab\0" /* offset 9986 */
"\xe3\x83\xa6\xe3\x82\xa2\xe3\x83\xb3\0" /* offset 9996 */
"\xe3\x83\xaa\xe3\x83\x83\xe3\x83\x88\xe3\x83\xab\0" /* offset 10006 */
"\xe3\x83\xaa\xe3\x83\xa9\0" /* offset 10019 */
"\xe3\x83\xab\xe3\x83\x92\xe3\x82\x9a\xe3\x83\xbc\0" /* offset 10026 */
"\xe3\x83\xab\xe3\x83\xbc\xe3\x83\x95\xe3\x82\x99\xe3\x83\xab\0" /* offset 10039 */
"\xe3\x83\xac\xe3\x83\xa0\0" /* offset 10055 */
"\xe3\x83\xac\xe3\x83\xb3\xe3\x83\x88\xe3\x82\xb1\xe3\x82\x99\xe3\x83\xb3\0" /* offset 10062 */
"\xe3\x83\xaf\xe3\x83\x83\xe3\x83\x88\0" /* offset 10081 */
"\x30\xe7\x82\xb9\0" /* offset 10091 */
"\x31\xe7\x82\xb9\0" /* offset 10096 */
"\x32\xe7\x82\xb9\0" /* offset 10101 */
"\x33\xe7\x82\xb9\0" /* offset 10106 */
"\x34\xe7\x82\xb9\0" /* offset 10111 */
"\x35\xe7\x82\xb9\0" /* offset 10116 */
"\x36\xe7\x82\xb9\0" /* offset 10121 */
"\x37\xe7\x82\xb9\0" /* offset 10126 */
"\x38\xe7\x82\xb9\0" /* offset 10131 */
"\x39\xe7\x82\xb9\0" /* offset 10136 */
"\x31\x30\xe7\x82\xb9\0" /* offset 10141 */
"\x31\x31\xe7\x82\xb9\0" /* offset 10147 */
"\x31\x32\xe7\x82\xb9\0" /* offset 10153 */
"\x31\x33\xe7\x82\xb9\0" /* offset 10159 */
"\x31\x34\xe7\x82\xb9\0" /* offset 10165 */
"\x31\x35\xe7\x82\xb9\0" /* offset 10171 */
"\x31\x36\xe7\x82\xb9\0" /* offset 10177 */
"\x31\x37\xe7\x82\xb9\0" /* offset 10183 */
"\x31\x38\xe7\x82\xb9\0" /* offset 10189 */
"\x31\x39\xe7\x82\xb9\0" /* offset 10195 */
"\x32\x30\xe7\x82\xb9\0" /* offset 10201 */
"\x32\x31\xe7\x82\xb9\0" /* offset 10207 */
"\x32\x32\xe7\x82\xb9\0" /* offset 10213 */
"\x32\x33\xe7\x82\xb9\0" /* offset 10219 */
"\x32\x34\xe7\x82\xb9\0" /* offset 10225 */
"\x68\x50\x61\0" /* offset 10231 */
"\x64\x61\0" /* offset 10235 */
"\x41\x55\0" /* offset 10238 */
"\x62\x61\x72\0" /* offset 10241 */
"\x6f\x56\0" /* offset 10245 */
"\x70\x63\0" /* offset 10248 */
"\x64\x6d\0" /* offset 10251 */
"\x64\x6d\x32\0" /* offset 10254 */
"\x64\x6d\x33\0" /* offset 10258 */
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"\xe5\x98\x86\0" /* offset 11943 */
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"\xe5\xa1\x80\0" /* offset 11951 */
"\xe5\xa2\xa8\0" /* offset 11955 */
"\xe5\xb1\xa4\0" /* offset 11959 */
"\xe6\x82\x94\0" /* offset 11963 */
"\xe6\x85\xa8\0" /* offset 11967 */
"\xe6\x86\x8e\0" /* offset 11971 */
"\xe6\x87\xb2\0" /* offset 11975 */
"\xe6\x95\x8f\0" /* offset 11979 */
"\xe6\x97\xa2\0" /* offset 11983 */
"\xe6\x9a\x91\0" /* offset 11987 */
"\xe6\xa2\x85\0" /* offset 11991 */
"\xe6\xb5\xb7\0" /* offset 11995 */
"\xe6\xb8\x9a\0" /* offset 11999 */
"\xe6\xbc\xa2\0" /* offset 12003 */
"\xe7\x85\xae\0" /* offset 12007 */
"\xe7\x88\xab\0" /* offset 12011 */
"\xe7\x90\xa2\0" /* offset 12015 */
"\xe7\xa2\x91\0" /* offset 12019 */
"\xe7\xa5\x89\0" /* offset 12023 */
"\xe7\xa5\x88\0" /* offset 12027 */
"\xe7\xa5\x90\0" /* offset 12031 */
"\xe7\xa5\x96\0" /* offset 12035 */
"\xe7\xa6\x8d\0" /* offset 12039 */
"\xe7\xa6\x8e\0" /* offset 12043 */
"\xe7\xa9\x80\0" /* offset 12047 */
"\xe7\xaa\x81\0" /* offset 12051 */
"\xe7\xaf\x80\0" /* offset 12055 */
"\xe7\xb8\x89\0" /* offset 12059 */
"\xe7\xb9\x81\0" /* offset 12063 */
"\xe7\xbd\xb2\0" /* offset 12067 */
"\xe8\x80\x85\0" /* offset 12071 */
"\xe8\x87\xad\0" /* offset 12075 */
"\xe8\x89\xb9\0" /* offset 12079 */
"\xe8\x91\x97\0" /* offset 12083 */
"\xe8\xa4\x90\0" /* offset 12087 */
"\xe8\xa6\x96\0" /* offset 12091 */
"\xe8\xac\x81\0" /* offset 12095 */
"\xe8\xac\xb9\0" /* offset 12099 */
"\xe8\xb3\x93\0" /* offset 12103 */
"\xe8\xb4\x88\0" /* offset 12107 */
"\xe8\xbe\xb6\0" /* offset 12111 */
"\xe9\x9b\xa3\0" /* offset 12115 */
"\xe9\x9f\xbf\0" /* offset 12119 */
"\xe9\xa0\xbb\0" /* offset 12123 */
"\xe4\xb8\xa6\0" /* offset 12127 */
"\xe5\x86\xb5\0" /* offset 12131 */
"\xe5\x85\xa8\0" /* offset 12135 */
"\xe4\xbe\x80\0" /* offset 12139 */
"\xe5\x85\x85\0" /* offset 12143 */
"\xe5\x86\x80\0" /* offset 12147 */
"\xe5\x8b\x87\0" /* offset 12151 */
"\xe5\x8b\xba\0" /* offset 12155 */
"\xe5\x95\x95\0" /* offset 12159 */
"\xe5\x96\x99\0" /* offset 12163 */
"\xe5\x97\xa2\0" /* offset 12167 */
"\xe5\xa2\xb3\0" /* offset 12171 */
"\xe5\xa5\x84\0" /* offset 12175 */
"\xe5\xa5\x94\0" /* offset 12179 */
"\xe5\xa9\xa2\0" /* offset 12183 */
"\xe5\xac\xa8\0" /* offset 12187 */
"\xe5\xbb\x92\0" /* offset 12191 */
"\xe5\xbb\x99\0" /* offset 12195 */
"\xe5\xbd\xa9\0" /* offset 12199 */
"\xe5\xbe\xad\0" /* offset 12203 */
"\xe6\x83\x98\0" /* offset 12207 */
"\xe6\x85\x8e\0" /* offset 12211 */
"\xe6\x84\x88\0" /* offset 12215 */
"\xe6\x85\xa0\0" /* offset 12219 */
"\xe6\x88\xb4\0" /* offset 12223 */
"\xe6\x8f\x84\0" /* offset 12227 */
"\xe6\x90\x9c\0" /* offset 12231 */
"\xe6\x91\x92\0" /* offset 12235 */
"\xe6\x95\x96\0" /* offset 12239 */
"\xe6\x9c\x9b\0" /* offset 12243 */
"\xe6\x9d\x96\0" /* offset 12247 */
"\xe6\xbb\x9b\0" /* offset 12251 */
"\xe6\xbb\x8b\0" /* offset 12255 */
"\xe7\x80\x9e\0" /* offset 12259 */
"\xe7\x9e\xa7\0" /* offset 12263 */
"\xe7\x88\xb5\0" /* offset 12267 */
"\xe7\x8a\xaf\0" /* offset 12271 */
"\xe7\x91\xb1\0" /* offset 12275 */
"\xe7\x94\x86\0" /* offset 12279 */
"\xe7\x94\xbb\0" /* offset 12283 */
"\xe7\x98\x9d\0" /* offset 12287 */
"\xe7\x98\x9f\0" /* offset 12291 */
"\xe7\x9b\x9b\0" /* offset 12295 */
"\xe7\x9b\xb4\0" /* offset 12299 */
"\xe7\x9d\x8a\0" /* offset 12303 */
"\xe7\x9d\x80\0" /* offset 12307 */
"\xe7\xa3\x8c\0" /* offset 12311 */
"\xe7\xaa\xb1\0" /* offset 12315 */
"\xe7\xb1\xbb\0" /* offset 12319 */
"\xe7\xb5\x9b\0" /* offset 12323 */
"\xe7\xbc\xbe\0" /* offset 12327 */
"\xe8\x8d\x92\0" /* offset 12331 */
"\xe8\x8f\xaf\0" /* offset 12335 */
"\xe8\x9d\xb9\0" /* offset 12339 */
"\xe8\xa5\x81\0" /* offset 12343 */
"\xe8\xa6\x86\0" /* offset 12347 */
"\xe8\xaa\xbf\0" /* offset 12351 */
"\xe8\xab\x8b\0" /* offset 12355 */
"\xe8\xab\xad\0" /* offset 12359 */
"\xe8\xae\x8a\0" /* offset 12363 */
"\xe8\xbc\xb8\0" /* offset 12367 */
"\xe9\x81\xb2\0" /* offset 12371 */
"\xe9\x86\x99\0" /* offset 12375 */
"\xe9\x89\xb6\0" /* offset 12379 */
"\xe9\x99\xbc\0" /* offset 12383 */
"\xe9\x9f\x9b\0" /* offset 12387 */
"\xe9\xa0\x8b\0" /* offset 12391 */
"\xe9\xac\x92\0" /* offset 12395 */
"\xf0\xa2\xa1\x8a\0" /* offset 12399 */
"\xf0\xa2\xa1\x84\0" /* offset 12404 */
"\xf0\xa3\x8f\x95\0" /* offset 12409 */
"\xe3\xae\x9d\0" /* offset 12414 */
"\xe4\x80\x98\0" /* offset 12418 */
"\xe4\x80\xb9\0" /* offset 12422 */
"\xf0\xa5\x89\x89\0" /* offset 12426 */
"\xf0\xa5\xb3\x90\0" /* offset 12431 */
"\xf0\xa7\xbb\x93\0" /* offset 12436 */
"\xe9\xbd\x83\0" /* offset 12441 */
"\xe9\xbe\x8e\0" /* offset 12445 */
"\x66\x66\0" /* offset 12449 */
"\x66\x69\0" /* offset 12452 */
"\x66\x6c\0" /* offset 12455 */
"\x66\x66\x69\0" /* offset 12458 */
"\x66\x66\x6c\0" /* offset 12462 */
"\x73\x74\0" /* offset 12466 */
"\xd5\xb4\xd5\xb6\0" /* offset 12469 */
"\xd5\xb4\xd5\xa5\0" /* offset 12474 */
"\xd5\xb4\xd5\xab\0" /* offset 12479 */
"\xd5\xbe\xd5\xb6\0" /* offset 12484 */
"\xd5\xb4\xd5\xad\0" /* offset 12489 */
"\xd7\x99\xd6\xb4\0" /* offset 12494 */
"\xd7\xb2\xd6\xb7\0" /* offset 12499 */
"\xd7\xa2\0" /* offset 12504 */
"\xd7\x94\0" /* offset 12507 */
"\xd7\x9b\0" /* offset 12510 */
"\xd7\x9c\0" /* offset 12513 */
"\xd7\x9d\0" /* offset 12516 */
"\xd7\xa8\0" /* offset 12519 */
"\xd7\xaa\0" /* offset 12522 */
"\xd7\xa9\xd7\x81\0" /* offset 12525 */
"\xd7\xa9\xd7\x82\0" /* offset 12530 */
"\xd7\xa9\xd6\xbc\xd7\x81\0" /* offset 12535 */
"\xd7\xa9\xd6\xbc\xd7\x82\0" /* offset 12542 */
"\xd7\x90\xd6\xb7\0" /* offset 12549 */
"\xd7\x90\xd6\xb8\0" /* offset 12554 */
"\xd7\x90\xd6\xbc\0" /* offset 12559 */
"\xd7\x91\xd6\xbc\0" /* offset 12564 */
"\xd7\x92\xd6\xbc\0" /* offset 12569 */
"\xd7\x93\xd6\xbc\0" /* offset 12574 */
"\xd7\x94\xd6\xbc\0" /* offset 12579 */
"\xd7\x95\xd6\xbc\0" /* offset 12584 */
"\xd7\x96\xd6\xbc\0" /* offset 12589 */
"\xd7\x98\xd6\xbc\0" /* offset 12594 */
"\xd7\x99\xd6\xbc\0" /* offset 12599 */
"\xd7\x9a\xd6\xbc\0" /* offset 12604 */
"\xd7\x9b\xd6\xbc\0" /* offset 12609 */
"\xd7\x9c\xd6\xbc\0" /* offset 12614 */
"\xd7\x9e\xd6\xbc\0" /* offset 12619 */
"\xd7\xa0\xd6\xbc\0" /* offset 12624 */
"\xd7\xa1\xd6\xbc\0" /* offset 12629 */
"\xd7\xa3\xd6\xbc\0" /* offset 12634 */
"\xd7\xa4\xd6\xbc\0" /* offset 12639 */
"\xd7\xa6\xd6\xbc\0" /* offset 12644 */
"\xd7\xa7\xd6\xbc\0" /* offset 12649 */
"\xd7\xa8\xd6\xbc\0" /* offset 12654 */
"\xd7\xa9\xd6\xbc\0" /* offset 12659 */
"\xd7\xaa\xd6\xbc\0" /* offset 12664 */
"\xd7\x95\xd6\xb9\0" /* offset 12669 */
"\xd7\x91\xd6\xbf\0" /* offset 12674 */
"\xd7\x9b\xd6\xbf\0" /* offset 12679 */
"\xd7\xa4\xd6\xbf\0" /* offset 12684 */
"\xd7\x90\xd7\x9c\0" /* offset 12689 */
"\xd9\xb1\0" /* offset 12694 */
"\xd9\xbb\0" /* offset 12697 */
"\xd9\xbe\0" /* offset 12700 */
"\xda\x80\0" /* offset 12703 */
"\xd9\xba\0" /* offset 12706 */
"\xd9\xbf\0" /* offset 12709 */
"\xd9\xb9\0" /* offset 12712 */
"\xda\xa4\0" /* offset 12715 */
"\xda\xa6\0" /* offset 12718 */
"\xda\x84\0" /* offset 12721 */
"\xda\x83\0" /* offset 12724 */
"\xda\x86\0" /* offset 12727 */
"\xda\x87\0" /* offset 12730 */
"\xda\x8d\0" /* offset 12733 */
"\xda\x8c\0" /* offset 12736 */
"\xda\x8e\0" /* offset 12739 */
"\xda\x88\0" /* offset 12742 */
"\xda\x98\0" /* offset 12745 */
"\xda\x91\0" /* offset 12748 */
"\xda\xa9\0" /* offset 12751 */
"\xda\xaf\0" /* offset 12754 */
"\xda\xb3\0" /* offset 12757 */
"\xda\xb1\0" /* offset 12760 */
"\xda\xba\0" /* offset 12763 */
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"\xdb\x81\0" /* offset 12769 */
"\xda\xbe\0" /* offset 12772 */
"\xdb\x92\0" /* offset 12775 */
"\xda\xad\0" /* offset 12778 */
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"\xdb\x86\0" /* offset 12784 */
"\xdb\x88\0" /* offset 12787 */
"\xdb\x8b\0" /* offset 12790 */
"\xdb\x85\0" /* offset 12793 */
"\xdb\x89\0" /* offset 12796 */
"\xdb\x90\0" /* offset 12799 */
"\xd9\x89\0" /* offset 12802 */
"\xd9\x8a\xd9\x94\xd8\xa7\0" /* offset 12805 */
"\xd9\x8a\xd9\x94\xdb\x95\0" /* offset 12812 */
"\xd9\x8a\xd9\x94\xd9\x88\0" /* offset 12819 */
"\xd9\x8a\xd9\x94\xdb\x87\0" /* offset 12826 */
"\xd9\x8a\xd9\x94\xdb\x86\0" /* offset 12833 */
"\xd9\x8a\xd9\x94\xdb\x88\0" /* offset 12840 */
"\xd9\x8a\xd9\x94\xdb\x90\0" /* offset 12847 */
"\xd9\x8a\xd9\x94\xd9\x89\0" /* offset 12854 */
"\xdb\x8c\0" /* offset 12861 */
"\xd9\x8a\xd9\x94\xd8\xac\0" /* offset 12864 */
"\xd9\x8a\xd9\x94\xd8\xad\0" /* offset 12871 */
"\xd9\x8a\xd9\x94\xd9\x85\0" /* offset 12878 */
"\xd9\x8a\xd9\x94\xd9\x8a\0" /* offset 12885 */
"\xd8\xa8\xd8\xac\0" /* offset 12892 */
"\xd8\xa8\xd8\xad\0" /* offset 12897 */
"\xd8\xa8\xd8\xae\0" /* offset 12902 */
"\xd8\xa8\xd9\x85\0" /* offset 12907 */
"\xd8\xa8\xd9\x89\0" /* offset 12912 */
"\xd8\xa8\xd9\x8a\0" /* offset 12917 */
"\xd8\xaa\xd8\xac\0" /* offset 12922 */
"\xd8\xaa\xd8\xad\0" /* offset 12927 */
"\xd8\xaa\xd8\xae\0" /* offset 12932 */
"\xd8\xaa\xd9\x85\0" /* offset 12937 */
"\xd8\xaa\xd9\x89\0" /* offset 12942 */
"\xd8\xaa\xd9\x8a\0" /* offset 12947 */
"\xd8\xab\xd8\xac\0" /* offset 12952 */
"\xd8\xab\xd9\x85\0" /* offset 12957 */
"\xd8\xab\xd9\x89\0" /* offset 12962 */
"\xd8\xab\xd9\x8a\0" /* offset 12967 */
"\xd8\xac\xd8\xad\0" /* offset 12972 */
"\xd8\xac\xd9\x85\0" /* offset 12977 */
"\xd8\xad\xd8\xac\0" /* offset 12982 */
"\xd8\xad\xd9\x85\0" /* offset 12987 */
"\xd8\xae\xd8\xac\0" /* offset 12992 */
"\xd8\xae\xd8\xad\0" /* offset 12997 */
"\xd8\xae\xd9\x85\0" /* offset 13002 */
"\xd8\xb3\xd8\xac\0" /* offset 13007 */
"\xd8\xb3\xd8\xad\0" /* offset 13012 */
"\xd8\xb3\xd8\xae\0" /* offset 13017 */
"\xd8\xb3\xd9\x85\0" /* offset 13022 */
"\xd8\xb5\xd8\xad\0" /* offset 13027 */
"\xd8\xb5\xd9\x85\0" /* offset 13032 */
"\xd8\xb6\xd8\xac\0" /* offset 13037 */
"\xd8\xb6\xd8\xad\0" /* offset 13042 */
"\xd8\xb6\xd8\xae\0" /* offset 13047 */
"\xd8\xb6\xd9\x85\0" /* offset 13052 */
"\xd8\xb7\xd8\xad\0" /* offset 13057 */
"\xd8\xb7\xd9\x85\0" /* offset 13062 */
"\xd8\xb8\xd9\x85\0" /* offset 13067 */
"\xd8\xb9\xd8\xac\0" /* offset 13072 */
"\xd8\xb9\xd9\x85\0" /* offset 13077 */
"\xd8\xba\xd8\xac\0" /* offset 13082 */
"\xd8\xba\xd9\x85\0" /* offset 13087 */
"\xd9\x81\xd8\xac\0" /* offset 13092 */
"\xd9\x81\xd8\xad\0" /* offset 13097 */
"\xd9\x81\xd8\xae\0" /* offset 13102 */
"\xd9\x81\xd9\x85\0" /* offset 13107 */
"\xd9\x81\xd9\x89\0" /* offset 13112 */
"\xd9\x81\xd9\x8a\0" /* offset 13117 */
"\xd9\x82\xd8\xad\0" /* offset 13122 */
"\xd9\x82\xd9\x85\0" /* offset 13127 */
"\xd9\x82\xd9\x89\0" /* offset 13132 */
"\xd9\x82\xd9\x8a\0" /* offset 13137 */
"\xd9\x83\xd8\xa7\0" /* offset 13142 */
"\xd9\x83\xd8\xac\0" /* offset 13147 */
"\xd9\x83\xd8\xad\0" /* offset 13152 */
"\xd9\x83\xd8\xae\0" /* offset 13157 */
"\xd9\x83\xd9\x84\0" /* offset 13162 */
"\xd9\x83\xd9\x85\0" /* offset 13167 */
"\xd9\x83\xd9\x89\0" /* offset 13172 */
"\xd9\x83\xd9\x8a\0" /* offset 13177 */
"\xd9\x84\xd8\xac\0" /* offset 13182 */
"\xd9\x84\xd8\xad\0" /* offset 13187 */
"\xd9\x84\xd8\xae\0" /* offset 13192 */
"\xd9\x84\xd9\x85\0" /* offset 13197 */
"\xd9\x84\xd9\x89\0" /* offset 13202 */
"\xd9\x84\xd9\x8a\0" /* offset 13207 */
"\xd9\x85\xd8\xac\0" /* offset 13212 */
"\xd9\x85\xd8\xad\0" /* offset 13217 */
"\xd9\x85\xd8\xae\0" /* offset 13222 */
"\xd9\x85\xd9\x85\0" /* offset 13227 */
"\xd9\x85\xd9\x89\0" /* offset 13232 */
"\xd9\x85\xd9\x8a\0" /* offset 13237 */
"\xd9\x86\xd8\xac\0" /* offset 13242 */
"\xd9\x86\xd8\xad\0" /* offset 13247 */
"\xd9\x86\xd8\xae\0" /* offset 13252 */
"\xd9\x86\xd9\x85\0" /* offset 13257 */
"\xd9\x86\xd9\x89\0" /* offset 13262 */
"\xd9\x86\xd9\x8a\0" /* offset 13267 */
"\xd9\x87\xd8\xac\0" /* offset 13272 */
"\xd9\x87\xd9\x85\0" /* offset 13277 */
"\xd9\x87\xd9\x89\0" /* offset 13282 */
"\xd9\x87\xd9\x8a\0" /* offset 13287 */
"\xd9\x8a\xd8\xac\0" /* offset 13292 */
"\xd9\x8a\xd8\xad\0" /* offset 13297 */
"\xd9\x8a\xd8\xae\0" /* offset 13302 */
"\xd9\x8a\xd9\x85\0" /* offset 13307 */
"\xd9\x8a\xd9\x89\0" /* offset 13312 */
"\xd9\x8a\xd9\x8a\0" /* offset 13317 */
"\xd8\xb0\xd9\xb0\0" /* offset 13322 */
"\xd8\xb1\xd9\xb0\0" /* offset 13327 */
"\xd9\x89\xd9\xb0\0" /* offset 13332 */
"\x20\xd9\x8c\xd9\x91\0" /* offset 13337 */
"\x20\xd9\x8d\xd9\x91\0" /* offset 13343 */
"\x20\xd9\x8e\xd9\x91\0" /* offset 13349 */
"\x20\xd9\x8f\xd9\x91\0" /* offset 13355 */
"\x20\xd9\x90\xd9\x91\0" /* offset 13361 */
"\x20\xd9\x91\xd9\xb0\0" /* offset 13367 */
"\xd9\x8a\xd9\x94\xd8\xb1\0" /* offset 13373 */
"\xd9\x8a\xd9\x94\xd8\xb2\0" /* offset 13380 */
"\xd9\x8a\xd9\x94\xd9\x86\0" /* offset 13387 */
"\xd8\xa8\xd8\xb1\0" /* offset 13394 */
"\xd8\xa8\xd8\xb2\0" /* offset 13399 */
"\xd8\xa8\xd9\x86\0" /* offset 13404 */
"\xd8\xaa\xd8\xb1\0" /* offset 13409 */
"\xd8\xaa\xd8\xb2\0" /* offset 13414 */
"\xd8\xaa\xd9\x86\0" /* offset 13419 */
"\xd8\xab\xd8\xb1\0" /* offset 13424 */
"\xd8\xab\xd8\xb2\0" /* offset 13429 */
"\xd8\xab\xd9\x86\0" /* offset 13434 */
"\xd9\x85\xd8\xa7\0" /* offset 13439 */
"\xd9\x86\xd8\xb1\0" /* offset 13444 */
"\xd9\x86\xd8\xb2\0" /* offset 13449 */
"\xd9\x86\xd9\x86\0" /* offset 13454 */
"\xd9\x8a\xd8\xb1\0" /* offset 13459 */
"\xd9\x8a\xd8\xb2\0" /* offset 13464 */
"\xd9\x8a\xd9\x86\0" /* offset 13469 */
"\xd9\x8a\xd9\x94\xd8\xae\0" /* offset 13474 */
"\xd9\x8a\xd9\x94\xd9\x87\0" /* offset 13481 */
"\xd8\xa8\xd9\x87\0" /* offset 13488 */
"\xd8\xaa\xd9\x87\0" /* offset 13493 */
"\xd8\xb5\xd8\xae\0" /* offset 13498 */
"\xd9\x84\xd9\x87\0" /* offset 13503 */
"\xd9\x86\xd9\x87\0" /* offset 13508 */
"\xd9\x87\xd9\xb0\0" /* offset 13513 */
"\xd9\x8a\xd9\x87\0" /* offset 13518 */
"\xd8\xab\xd9\x87\0" /* offset 13523 */
"\xd8\xb3\xd9\x87\0" /* offset 13528 */
"\xd8\xb4\xd9\x85\0" /* offset 13533 */
"\xd8\xb4\xd9\x87\0" /* offset 13538 */
"\xd9\x80\xd9\x8e\xd9\x91\0" /* offset 13543 */
"\xd9\x80\xd9\x8f\xd9\x91\0" /* offset 13550 */
"\xd9\x80\xd9\x90\xd9\x91\0" /* offset 13557 */
"\xd8\xb7\xd9\x89\0" /* offset 13564 */
"\xd8\xb7\xd9\x8a\0" /* offset 13569 */
"\xd8\xb9\xd9\x89\0" /* offset 13574 */
"\xd8\xb9\xd9\x8a\0" /* offset 13579 */
"\xd8\xba\xd9\x89\0" /* offset 13584 */
"\xd8\xba\xd9\x8a\0" /* offset 13589 */
"\xd8\xb3\xd9\x89\0" /* offset 13594 */
"\xd8\xb3\xd9\x8a\0" /* offset 13599 */
"\xd8\xb4\xd9\x89\0" /* offset 13604 */
"\xd8\xb4\xd9\x8a\0" /* offset 13609 */
"\xd8\xad\xd9\x89\0" /* offset 13614 */
"\xd8\xad\xd9\x8a\0" /* offset 13619 */
"\xd8\xac\xd9\x89\0" /* offset 13624 */
"\xd8\xac\xd9\x8a\0" /* offset 13629 */
"\xd8\xae\xd9\x89\0" /* offset 13634 */
"\xd8\xae\xd9\x8a\0" /* offset 13639 */
"\xd8\xb5\xd9\x89\0" /* offset 13644 */
"\xd8\xb5\xd9\x8a\0" /* offset 13649 */
"\xd8\xb6\xd9\x89\0" /* offset 13654 */
"\xd8\xb6\xd9\x8a\0" /* offset 13659 */
"\xd8\xb4\xd8\xac\0" /* offset 13664 */
"\xd8\xb4\xd8\xad\0" /* offset 13669 */
"\xd8\xb4\xd8\xae\0" /* offset 13674 */
"\xd8\xb4\xd8\xb1\0" /* offset 13679 */
"\xd8\xb3\xd8\xb1\0" /* offset 13684 */
"\xd8\xb5\xd8\xb1\0" /* offset 13689 */
"\xd8\xb6\xd8\xb1\0" /* offset 13694 */
"\xd8\xa7\xd9\x8b\0" /* offset 13699 */
"\xd8\xaa\xd8\xac\xd9\x85\0" /* offset 13704 */
"\xd8\xaa\xd8\xad\xd8\xac\0" /* offset 13711 */
"\xd8\xaa\xd8\xad\xd9\x85\0" /* offset 13718 */
"\xd8\xaa\xd8\xae\xd9\x85\0" /* offset 13725 */
"\xd8\xaa\xd9\x85\xd8\xac\0" /* offset 13732 */
"\xd8\xaa\xd9\x85\xd8\xad\0" /* offset 13739 */
"\xd8\xaa\xd9\x85\xd8\xae\0" /* offset 13746 */
"\xd8\xac\xd9\x85\xd8\xad\0" /* offset 13753 */
"\xd8\xad\xd9\x85\xd9\x8a\0" /* offset 13760 */
"\xd8\xad\xd9\x85\xd9\x89\0" /* offset 13767 */
"\xd8\xb3\xd8\xad\xd8\xac\0" /* offset 13774 */
"\xd8\xb3\xd8\xac\xd8\xad\0" /* offset 13781 */
"\xd8\xb3\xd8\xac\xd9\x89\0" /* offset 13788 */
"\xd8\xb3\xd9\x85\xd8\xad\0" /* offset 13795 */
"\xd8\xb3\xd9\x85\xd8\xac\0" /* offset 13802 */
"\xd8\xb3\xd9\x85\xd9\x85\0" /* offset 13809 */
"\xd8\xb5\xd8\xad\xd8\xad\0" /* offset 13816 */
"\xd8\xb5\xd9\x85\xd9\x85\0" /* offset 13823 */
"\xd8\xb4\xd8\xad\xd9\x85\0" /* offset 13830 */
"\xd8\xb4\xd8\xac\xd9\x8a\0" /* offset 13837 */
"\xd8\xb4\xd9\x85\xd8\xae\0" /* offset 13844 */
"\xd8\xb4\xd9\x85\xd9\x85\0" /* offset 13851 */
"\xd8\xb6\xd8\xad\xd9\x89\0" /* offset 13858 */
"\xd8\xb6\xd8\xae\xd9\x85\0" /* offset 13865 */
"\xd8\xb7\xd9\x85\xd8\xad\0" /* offset 13872 */
"\xd8\xb7\xd9\x85\xd9\x85\0" /* offset 13879 */
"\xd8\xb7\xd9\x85\xd9\x8a\0" /* offset 13886 */
"\xd8\xb9\xd8\xac\xd9\x85\0" /* offset 13893 */
"\xd8\xb9\xd9\x85\xd9\x85\0" /* offset 13900 */
"\xd8\xb9\xd9\x85\xd9\x89\0" /* offset 13907 */
"\xd8\xba\xd9\x85\xd9\x85\0" /* offset 13914 */
"\xd8\xba\xd9\x85\xd9\x8a\0" /* offset 13921 */
"\xd8\xba\xd9\x85\xd9\x89\0" /* offset 13928 */
"\xd9\x81\xd8\xae\xd9\x85\0" /* offset 13935 */
"\xd9\x82\xd9\x85\xd8\xad\0" /* offset 13942 */
"\xd9\x82\xd9\x85\xd9\x85\0" /* offset 13949 */
"\xd9\x84\xd8\xad\xd9\x85\0" /* offset 13956 */
"\xd9\x84\xd8\xad\xd9\x8a\0" /* offset 13963 */
"\xd9\x84\xd8\xad\xd9\x89\0" /* offset 13970 */
"\xd9\x84\xd8\xac\xd8\xac\0" /* offset 13977 */
"\xd9\x84\xd8\xae\xd9\x85\0" /* offset 13984 */
"\xd9\x84\xd9\x85\xd8\xad\0" /* offset 13991 */
"\xd9\x85\xd8\xad\xd8\xac\0" /* offset 13998 */
"\xd9\x85\xd8\xad\xd9\x85\0" /* offset 14005 */
"\xd9\x85\xd8\xad\xd9\x8a\0" /* offset 14012 */
"\xd9\x85\xd8\xac\xd8\xad\0" /* offset 14019 */
"\xd9\x85\xd8\xac\xd9\x85\0" /* offset 14026 */
"\xd9\x85\xd8\xae\xd8\xac\0" /* offset 14033 */
"\xd9\x85\xd8\xae\xd9\x85\0" /* offset 14040 */
"\xd9\x85\xd8\xac\xd8\xae\0" /* offset 14047 */
"\xd9\x87\xd9\x85\xd8\xac\0" /* offset 14054 */
"\xd9\x87\xd9\x85\xd9\x85\0" /* offset 14061 */
"\xd9\x86\xd8\xad\xd9\x85\0" /* offset 14068 */
"\xd9\x86\xd8\xad\xd9\x89\0" /* offset 14075 */
"\xd9\x86\xd8\xac\xd9\x85\0" /* offset 14082 */
"\xd9\x86\xd8\xac\xd9\x89\0" /* offset 14089 */
"\xd9\x86\xd9\x85\xd9\x8a\0" /* offset 14096 */
"\xd9\x86\xd9\x85\xd9\x89\0" /* offset 14103 */
"\xd9\x8a\xd9\x85\xd9\x85\0" /* offset 14110 */
"\xd8\xa8\xd8\xae\xd9\x8a\0" /* offset 14117 */
"\xd8\xaa\xd8\xac\xd9\x8a\0" /* offset 14124 */
"\xd8\xaa\xd8\xac\xd9\x89\0" /* offset 14131 */
"\xd8\xaa\xd8\xae\xd9\x8a\0" /* offset 14138 */
"\xd8\xaa\xd8\xae\xd9\x89\0" /* offset 14145 */
"\xd8\xaa\xd9\x85\xd9\x8a\0" /* offset 14152 */
"\xd8\xaa\xd9\x85\xd9\x89\0" /* offset 14159 */
"\xd8\xac\xd9\x85\xd9\x8a\0" /* offset 14166 */
"\xd8\xac\xd8\xad\xd9\x89\0" /* offset 14173 */
"\xd8\xac\xd9\x85\xd9\x89\0" /* offset 14180 */
"\xd8\xb3\xd8\xae\xd9\x89\0" /* offset 14187 */
"\xd8\xb5\xd8\xad\xd9\x8a\0" /* offset 14194 */
"\xd8\xb4\xd8\xad\xd9\x8a\0" /* offset 14201 */
"\xd8\xb6\xd8\xad\xd9\x8a\0" /* offset 14208 */
"\xd9\x84\xd8\xac\xd9\x8a\0" /* offset 14215 */
"\xd9\x84\xd9\x85\xd9\x8a\0" /* offset 14222 */
"\xd9\x8a\xd8\xad\xd9\x8a\0" /* offset 14229 */
"\xd9\x8a\xd8\xac\xd9\x8a\0" /* offset 14236 */
"\xd9\x8a\xd9\x85\xd9\x8a\0" /* offset 14243 */
"\xd9\x85\xd9\x85\xd9\x8a\0" /* offset 14250 */
"\xd9\x82\xd9\x85\xd9\x8a\0" /* offset 14257 */
"\xd9\x86\xd8\xad\xd9\x8a\0" /* offset 14264 */
"\xd8\xb9\xd9\x85\xd9\x8a\0" /* offset 14271 */
"\xd9\x83\xd9\x85\xd9\x8a\0" /* offset 14278 */
"\xd9\x86\xd8\xac\xd8\xad\0" /* offset 14285 */
"\xd9\x85\xd8\xae\xd9\x8a\0" /* offset 14292 */
"\xd9\x84\xd8\xac\xd9\x85\0" /* offset 14299 */
"\xd9\x83\xd9\x85\xd9\x85\0" /* offset 14306 */
"\xd8\xac\xd8\xad\xd9\x8a\0" /* offset 14313 */
"\xd8\xad\xd8\xac\xd9\x8a\0" /* offset 14320 */
"\xd9\x85\xd8\xac\xd9\x8a\0" /* offset 14327 */
"\xd9\x81\xd9\x85\xd9\x8a\0" /* offset 14334 */
"\xd8\xa8\xd8\xad\xd9\x8a\0" /* offset 14341 */
"\xd8\xb3\xd8\xae\xd9\x8a\0" /* offset 14348 */
"\xd9\x86\xd8\xac\xd9\x8a\0" /* offset 14355 */
"\xd8\xb5\xd9\x84\xdb\x92\0" /* offset 14362 */
"\xd9\x82\xd9\x84\xdb\x92\0" /* offset 14369 */
"\xd8\xa7\xd9\x84\xd9\x84\xd9\x87\0" /* offset 14376 */
"\xd8\xa7\xd9\x83\xd8\xa8\xd8\xb1\0" /* offset 14385 */
"\xd9\x85\xd8\xad\xd9\x85\xd8\xaf\0" /* offset 14394 */
"\xd8\xb5\xd9\x84\xd8\xb9\xd9\x85\0" /* offset 14403 */
"\xd8\xb1\xd8\xb3\xd9\x88\xd9\x84\0" /* offset 14412 */
"\xd8\xb9\xd9\x84\xd9\x8a\xd9\x87\0" /* offset 14421 */
"\xd9\x88\xd8\xb3\xd9\x84\xd9\x85\0" /* offset 14430 */
"\xd8\xb5\xd9\x84\xd9\x89\0" /* offset 14439 */
"\xd8\xb5\xd9\x84\xd9\x89\x20\xd8\xa7\xd9\x84\xd9\x84\xd9\x87\x20\xd8\xb9\xd9\x84\xd9\x8a\xd9\x87\x20\xd9\x88\xd8\xb3\xd9\x84\xd9\x85\0" /* offset 14446 */
"\xd8\xac\xd9\x84\x20\xd8\xac\xd9\x84\xd8\xa7\xd9\x84\xd9\x87\0" /* offset 14480 */
"\xd8\xb1\xdb\x8c\xd8\xa7\xd9\x84\0" /* offset 14496 */
"\x2c\0" /* offset 14505 */
"\xe3\x80\x81\0" /* offset 14507 */
"\xe3\x80\x82\0" /* offset 14511 */
"\x3a\0" /* offset 14515 */
"\x21\0" /* offset 14517 */
"\x3f\0" /* offset 14519 */
"\xe3\x80\x96\0" /* offset 14521 */
"\xe3\x80\x97\0" /* offset 14525 */
"\xe2\x80\x94\0" /* offset 14529 */
"\xe2\x80\x93\0" /* offset 14533 */
"\x5f\0" /* offset 14537 */
"\x7b\0" /* offset 14539 */
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"\xe3\x80\x94\0" /* offset 14543 */
"\xe3\x80\x95\0" /* offset 14547 */
"\xe3\x80\x90\0" /* offset 14551 */
"\xe3\x80\x91\0" /* offset 14555 */
"\xe3\x80\x8a\0" /* offset 14559 */
"\xe3\x80\x8b\0" /* offset 14563 */
"\xe3\x80\x8c\0" /* offset 14567 */
"\xe3\x80\x8d\0" /* offset 14571 */
"\xe3\x80\x8e\0" /* offset 14575 */
"\xe3\x80\x8f\0" /* offset 14579 */
"\x5b\0" /* offset 14583 */
"\x5d\0" /* offset 14585 */
"\x23\0" /* offset 14587 */
"\x26\0" /* offset 14589 */
"\x2a\0" /* offset 14591 */
"\x2d\0" /* offset 14593 */
"\x3c\0" /* offset 14595 */
"\x3e\0" /* offset 14597 */
"\x5c\0" /* offset 14599 */
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"\x25\0" /* offset 14603 */
"\x40\0" /* offset 14605 */
"\x20\xd9\x8b\0" /* offset 14607 */
"\xd9\x80\xd9\x8b\0" /* offset 14611 */
"\x20\xd9\x8c\0" /* offset 14616 */
"\x20\xd9\x8d\0" /* offset 14620 */
"\x20\xd9\x8e\0" /* offset 14624 */
"\xd9\x80\xd9\x8e\0" /* offset 14628 */
"\x20\xd9\x8f\0" /* offset 14633 */
"\xd9\x80\xd9\x8f\0" /* offset 14637 */
"\x20\xd9\x90\0" /* offset 14642 */
"\xd9\x80\xd9\x90\0" /* offset 14646 */
"\x20\xd9\x91\0" /* offset 14651 */
"\xd9\x80\xd9\x91\0" /* offset 14655 */
"\x20\xd9\x92\0" /* offset 14660 */
"\xd9\x80\xd9\x92\0" /* offset 14664 */
"\xd8\xa1\0" /* offset 14669 */
"\xd8\xa7\0" /* offset 14672 */
"\xd8\xa8\0" /* offset 14675 */
"\xd8\xa9\0" /* offset 14678 */
"\xd8\xaa\0" /* offset 14681 */
"\xd8\xab\0" /* offset 14684 */
"\xd8\xac\0" /* offset 14687 */
"\xd8\xad\0" /* offset 14690 */
"\xd8\xae\0" /* offset 14693 */
"\xd8\xaf\0" /* offset 14696 */
"\xd8\xb0\0" /* offset 14699 */
"\xd8\xb1\0" /* offset 14702 */
"\xd8\xb2\0" /* offset 14705 */
"\xd8\xb3\0" /* offset 14708 */
"\xd8\xb4\0" /* offset 14711 */
"\xd8\xb5\0" /* offset 14714 */
"\xd8\xb6\0" /* offset 14717 */
"\xd8\xb7\0" /* offset 14720 */
"\xd8\xb8\0" /* offset 14723 */
"\xd8\xb9\0" /* offset 14726 */
"\xd8\xba\0" /* offset 14729 */
"\xd9\x81\0" /* offset 14732 */
"\xd9\x82\0" /* offset 14735 */
"\xd9\x83\0" /* offset 14738 */
"\xd9\x84\0" /* offset 14741 */
"\xd9\x85\0" /* offset 14744 */
"\xd9\x86\0" /* offset 14747 */
"\xd9\x87\0" /* offset 14750 */
"\xd9\x88\0" /* offset 14753 */
"\xd9\x8a\0" /* offset 14756 */
"\xd9\x84\xd8\xa7\xd9\x93\0" /* offset 14759 */
"\xd9\x84\xd8\xa7\xd9\x94\0" /* offset 14766 */
"\xd9\x84\xd8\xa7\xd9\x95\0" /* offset 14773 */
"\xd9\x84\xd8\xa7\0" /* offset 14780 */
"\x22\0" /* offset 14785 */
"\x27\0" /* offset 14787 */
"\x2f\0" /* offset 14789 */
"\x5e\0" /* offset 14791 */
"\x7c\0" /* offset 14793 */
"\x7e\0" /* offset 14795 */
"\xe2\xa6\x85\0" /* offset 14797 */
"\xe2\xa6\x86\0" /* offset 14801 */
"\xe3\x83\xbb\0" /* offset 14805 */
"\xe3\x82\xa1\0" /* offset 14809 */
"\xe3\x82\xa3\0" /* offset 14813 */
"\xe3\x82\xa5\0" /* offset 14817 */
"\xe3\x82\xa7\0" /* offset 14821 */
"\xe3\x82\xa9\0" /* offset 14825 */
"\xe3\x83\xa3\0" /* offset 14829 */
"\xe3\x83\xa5\0" /* offset 14833 */
"\xe3\x83\xa7\0" /* offset 14837 */
"\xe3\x83\x83\0" /* offset 14841 */
"\xe3\x83\xbc\0" /* offset 14845 */
"\xe3\x83\xb3\0" /* offset 14849 */
"\xe3\x82\x99\0" /* offset 14853 */
"\xe3\x82\x9a\0" /* offset 14857 */
"\xc2\xa2\0" /* offset 14861 */
"\xc2\xa3\0" /* offset 14864 */
"\xc2\xac\0" /* offset 14867 */
"\xc2\xa6\0" /* offset 14870 */
"\xc2\xa5\0" /* offset 14873 */
"\xe2\x82\xa9\0" /* offset 14876 */
"\xe2\x94\x82\0" /* offset 14880 */
"\xe2\x86\x90\0" /* offset 14884 */
"\xe2\x86\x91\0" /* offset 14888 */
"\xe2\x86\x92\0" /* offset 14892 */
"\xe2\x86\x93\0" /* offset 14896 */
"\xe2\x96\xa0\0" /* offset 14900 */
"\xe2\x97\x8b\0" /* offset 14904 */
"\xf0\x9d\x85\x97\xf0\x9d\x85\xa5\0" /* offset 14908 */
"\xf0\x9d\x85\x98\xf0\x9d\x85\xa5\0" /* offset 14917 */
"\xf0\x9d\x85\x98\xf0\x9d\x85\xa5\xf0\x9d\x85\xae\0" /* offset 14926 */
"\xf0\x9d\x85\x98\xf0\x9d\x85\xa5\xf0\x9d\x85\xaf\0" /* offset 14939 */
"\xf0\x9d\x85\x98\xf0\x9d\x85\xa5\xf0\x9d\x85\xb0\0" /* offset 14952 */
"\xf0\x9d\x85\x98\xf0\x9d\x85\xa5\xf0\x9d\x85\xb1\0" /* offset 14965 */
"\xf0\x9d\x85\x98\xf0\x9d\x85\xa5\xf0\x9d\x85\xb2\0" /* offset 14978 */
"\xf0\x9d\x86\xb9\xf0\x9d\x85\xa5\0" /* offset 14991 */
"\xf0\x9d\x86\xba\xf0\x9d\x85\xa5\0" /* offset 15000 */
"\xf0\x9d\x86\xb9\xf0\x9d\x85\xa5\xf0\x9d\x85\xae\0" /* offset 15009 */
"\xf0\x9d\x86\xba\xf0\x9d\x85\xa5\xf0\x9d\x85\xae\0" /* offset 15022 */
"\xf0\x9d\x86\xb9\xf0\x9d\x85\xa5\xf0\x9d\x85\xaf\0" /* offset 15035 */
"\xf0\x9d\x86\xba\xf0\x9d\x85\xa5\xf0\x9d\x85\xaf\0" /* offset 15048 */
"\xc4\xb1\0" /* offset 15061 */
"\xc8\xb7\0" /* offset 15064 */
"\xce\x91\0" /* offset 15067 */
"\xce\x92\0" /* offset 15070 */
"\xce\x94\0" /* offset 15073 */
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"\xce\x96\0" /* offset 15079 */
"\xce\x97\0" /* offset 15082 */
"\xce\x99\0" /* offset 15085 */
"\xce\x9a\0" /* offset 15088 */
"\xce\x9b\0" /* offset 15091 */
"\xce\x9c\0" /* offset 15094 */
"\xce\x9d\0" /* offset 15097 */
"\xce\x9e\0" /* offset 15100 */
"\xce\x9f\0" /* offset 15103 */
"\xce\xa1\0" /* offset 15106 */
"\xce\xa4\0" /* offset 15109 */
"\xce\xa6\0" /* offset 15112 */
"\xce\xa7\0" /* offset 15115 */
"\xce\xa8\0" /* offset 15118 */
"\xe2\x88\x87\0" /* offset 15121 */
"\xce\xb1\0" /* offset 15125 */
"\xce\xb6\0" /* offset 15128 */
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"\xce\xbb\0" /* offset 15134 */
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"\xce\xbe\0" /* offset 15140 */
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"\xe2\x88\x82\0" /* offset 15161 */
"\xcf\x9c\0" /* offset 15165 */
"\xcf\x9d\0" /* offset 15168 */
"\xe4\xb8\xbd\0" /* offset 15171 */
"\xe4\xb8\xb8\0" /* offset 15175 */
"\xe4\xb9\x81\0" /* offset 15179 */
"\xf0\xa0\x84\xa2\0" /* offset 15183 */
"\xe4\xbd\xa0\0" /* offset 15188 */
"\xe4\xbe\xbb\0" /* offset 15192 */
"\xe5\x80\x82\0" /* offset 15196 */
"\xe5\x81\xba\0" /* offset 15200 */
"\xe5\x82\x99\0" /* offset 15204 */
"\xe5\x83\x8f\0" /* offset 15208 */
"\xe3\x92\x9e\0" /* offset 15212 */
"\xf0\xa0\x98\xba\0" /* offset 15216 */
"\xe5\x85\x94\0" /* offset 15221 */
"\xe5\x85\xa4\0" /* offset 15225 */
"\xe5\x85\xb7\0" /* offset 15229 */
"\xf0\xa0\x94\x9c\0" /* offset 15233 */
"\xe3\x92\xb9\0" /* offset 15238 */
"\xe5\x85\xa7\0" /* offset 15242 */
"\xe5\x86\x8d\0" /* offset 15246 */
"\xf0\xa0\x95\x8b\0" /* offset 15250 */
"\xe5\x86\x97\0" /* offset 15255 */
"\xe5\x86\xa4\0" /* offset 15259 */
"\xe4\xbb\x8c\0" /* offset 15263 */
"\xe5\x86\xac\0" /* offset 15267 */
"\xf0\xa9\x87\x9f\0" /* offset 15271 */
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"\xe3\x93\x9f\0" /* offset 15280 */
"\xe5\x88\xbb\0" /* offset 15284 */
"\xe5\x89\x86\0" /* offset 15288 */
"\xe5\x89\xb2\0" /* offset 15292 */
"\xe5\x89\xb7\0" /* offset 15296 */
"\xe3\x94\x95\0" /* offset 15300 */
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"\xe5\x8c\x86\0" /* offset 15308 */
"\xe5\x8d\x89\0" /* offset 15312 */
"\xe5\x8d\x9a\0" /* offset 15316 */
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"\xe5\x8d\xbd\0" /* offset 15324 */
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"\xf0\xa0\xa8\xac\0" /* offset 15332 */
"\xe7\x81\xb0\0" /* offset 15337 */
"\xe5\x8f\x8a\0" /* offset 15341 */
"\xe5\x8f\x9f\0" /* offset 15345 */
"\xf0\xa0\xad\xa3\0" /* offset 15349 */
"\xe5\x8f\xab\0" /* offset 15354 */
"\xe5\x8f\xb1\0" /* offset 15358 */
"\xe5\x90\x86\0" /* offset 15362 */
"\xe5\x92\x9e\0" /* offset 15366 */
"\xe5\x90\xb8\0" /* offset 15370 */
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"\xe5\x91\xa8\0" /* offset 15378 */
"\xe5\x92\xa2\0" /* offset 15382 */
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"\xe5\x94\x90\0" /* offset 15390 */
"\xe5\x95\x93\0" /* offset 15394 */
"\xe5\x95\xa3\0" /* offset 15398 */
"\xe5\x96\x84\0" /* offset 15402 */
"\xe5\x96\xab\0" /* offset 15406 */
"\xe5\x96\xb3\0" /* offset 15410 */
"\xe5\x97\x82\0" /* offset 15414 */
"\xe5\x9c\x96\0" /* offset 15418 */
"\xe5\x9c\x97\0" /* offset 15422 */
"\xe5\x99\x91\0" /* offset 15426 */
"\xe5\x99\xb4\0" /* offset 15430 */
"\xe5\xa3\xae\0" /* offset 15434 */
"\xe5\x9f\x8e\0" /* offset 15438 */
"\xe5\x9f\xb4\0" /* offset 15442 */
"\xe5\xa0\x8d\0" /* offset 15446 */
"\xe5\x9e\x8b\0" /* offset 15450 */
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"\xe5\xa0\xb1\0" /* offset 15458 */
"\xe5\xa2\xac\0" /* offset 15462 */
"\xf0\xa1\x93\xa4\0" /* offset 15466 */
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"\xe5\xa4\x9a\0" /* offset 15483 */
"\xe5\xa4\xa2\0" /* offset 15487 */
"\xe5\xa5\xa2\0" /* offset 15491 */
"\xf0\xa1\x9a\xa8\0" /* offset 15495 */
"\xf0\xa1\x9b\xaa\0" /* offset 15500 */
"\xe5\xa7\xac\0" /* offset 15505 */
"\xe5\xa8\x9b\0" /* offset 15509 */
"\xe5\xa8\xa7\0" /* offset 15513 */
"\xe5\xa7\x98\0" /* offset 15517 */
"\xe5\xa9\xa6\0" /* offset 15521 */
"\xe3\x9b\xae\0" /* offset 15525 */
"\xe3\x9b\xbc\0" /* offset 15529 */
"\xe5\xac\x88\0" /* offset 15533 */
"\xe5\xac\xbe\0" /* offset 15537 */
"\xf0\xa1\xa7\x88\0" /* offset 15541 */
"\xe5\xaf\x83\0" /* offset 15546 */
"\xe5\xaf\x98\0" /* offset 15550 */
"\xe5\xaf\xb3\0" /* offset 15554 */
"\xf0\xa1\xac\x98\0" /* offset 15558 */
"\xe5\xaf\xbf\0" /* offset 15563 */
"\xe5\xb0\x86\0" /* offset 15567 */
"\xe5\xbd\x93\0" /* offset 15571 */
"\xe3\x9e\x81\0" /* offset 15575 */
"\xe5\xb1\xa0\0" /* offset 15579 */
"\xe5\xb3\x80\0" /* offset 15583 */
"\xe5\xb2\x8d\0" /* offset 15587 */
"\xf0\xa1\xb7\xa4\0" /* offset 15591 */
"\xe5\xb5\x83\0" /* offset 15596 */
"\xf0\xa1\xb7\xa6\0" /* offset 15600 */
"\xe5\xb5\xae\0" /* offset 15605 */
"\xe5\xb5\xab\0" /* offset 15609 */
"\xe5\xb5\xbc\0" /* offset 15613 */
"\xe5\xb7\xa1\0" /* offset 15617 */
"\xe5\xb7\xa2\0" /* offset 15621 */
"\xe3\xa0\xaf\0" /* offset 15625 */
"\xe5\xb7\xbd\0" /* offset 15629 */
"\xe5\xb8\xa8\0" /* offset 15633 */
"\xe5\xb8\xbd\0" /* offset 15637 */
"\xe5\xb9\xa9\0" /* offset 15641 */
"\xe3\xa1\xa2\0" /* offset 15645 */
"\xf0\xa2\x86\x83\0" /* offset 15649 */
"\xe3\xa1\xbc\0" /* offset 15654 */
"\xe5\xba\xb0\0" /* offset 15658 */
"\xe5\xba\xb3\0" /* offset 15662 */
"\xe5\xba\xb6\0" /* offset 15666 */
"\xf0\xaa\x8e\x92\0" /* offset 15670 */
"\xf0\xa2\x8c\xb1\0" /* offset 15675 */
"\xe8\x88\x81\0" /* offset 15680 */
"\xe5\xbc\xa2\0" /* offset 15684 */
"\xe3\xa3\x87\0" /* offset 15688 */
"\xf0\xa3\x8a\xb8\0" /* offset 15692 */
"\xf0\xa6\x87\x9a\0" /* offset 15697 */
"\xe5\xbd\xa2\0" /* offset 15702 */
"\xe5\xbd\xab\0" /* offset 15706 */
"\xe3\xa3\xa3\0" /* offset 15710 */
"\xe5\xbe\x9a\0" /* offset 15714 */
"\xe5\xbf\x8d\0" /* offset 15718 */
"\xe5\xbf\x97\0" /* offset 15722 */
"\xe5\xbf\xb9\0" /* offset 15726 */
"\xe6\x82\x81\0" /* offset 15730 */
"\xe3\xa4\xba\0" /* offset 15734 */
"\xe3\xa4\x9c\0" /* offset 15738 */
"\xf0\xa2\x9b\x94\0" /* offset 15742 */
"\xe6\x83\x87\0" /* offset 15747 */
"\xe6\x85\x88\0" /* offset 15751 */
"\xe6\x85\x8c\0" /* offset 15755 */
"\xe6\x85\xba\0" /* offset 15759 */
"\xe6\x86\xb2\0" /* offset 15763 */
"\xe6\x86\xa4\0" /* offset 15767 */
"\xe6\x86\xaf\0" /* offset 15771 */
"\xe6\x87\x9e\0" /* offset 15775 */
"\xe6\x88\x90\0" /* offset 15779 */
"\xe6\x88\x9b\0" /* offset 15783 */
"\xe6\x89\x9d\0" /* offset 15787 */
"\xe6\x8a\xb1\0" /* offset 15791 */
"\xe6\x8b\x94\0" /* offset 15795 */
"\xe6\x8d\x90\0" /* offset 15799 */
"\xf0\xa2\xac\x8c\0" /* offset 15803 */
"\xe6\x8c\xbd\0" /* offset 15808 */
"\xe6\x8b\xbc\0" /* offset 15812 */
"\xe6\x8d\xa8\0" /* offset 15816 */
"\xe6\x8e\x83\0" /* offset 15820 */
"\xe6\x8f\xa4\0" /* offset 15824 */
"\xf0\xa2\xaf\xb1\0" /* offset 15828 */
"\xe6\x90\xa2\0" /* offset 15833 */
"\xe6\x8f\x85\0" /* offset 15837 */
"\xe6\x8e\xa9\0" /* offset 15841 */
"\xe3\xa8\xae\0" /* offset 15845 */
"\xe6\x91\xa9\0" /* offset 15849 */
"\xe6\x91\xbe\0" /* offset 15853 */
"\xe6\x92\x9d\0" /* offset 15857 */
"\xe6\x91\xb7\0" /* offset 15861 */
"\xe3\xa9\xac\0" /* offset 15865 */
"\xe6\x95\xac\0" /* offset 15869 */
"\xf0\xa3\x80\x8a\0" /* offset 15873 */
"\xe6\x97\xa3\0" /* offset 15878 */
"\xe6\x9b\xb8\0" /* offset 15882 */
"\xe6\x99\x89\0" /* offset 15886 */
"\xe3\xac\x99\0" /* offset 15890 */
"\xe3\xac\x88\0" /* offset 15894 */
"\xe3\xab\xa4\0" /* offset 15898 */
"\xe5\x86\x92\0" /* offset 15902 */
"\xe5\x86\x95\0" /* offset 15906 */
"\xe6\x9c\x80\0" /* offset 15910 */
"\xe6\x9a\x9c\0" /* offset 15914 */
"\xe8\x82\xad\0" /* offset 15918 */
"\xe4\x8f\x99\0" /* offset 15922 */
"\xe6\x9c\xa1\0" /* offset 15926 */
"\xe6\x9d\x9e\0" /* offset 15930 */
"\xe6\x9d\x93\0" /* offset 15934 */
"\xf0\xa3\x8f\x83\0" /* offset 15938 */
"\xe3\xad\x89\0" /* offset 15943 */
"\xe6\x9f\xba\0" /* offset 15947 */
"\xe6\x9e\x85\0" /* offset 15951 */
"\xe6\xa1\x92\0" /* offset 15955 */
"\xf0\xa3\x91\xad\0" /* offset 15959 */
"\xe6\xa2\x8e\0" /* offset 15964 */
"\xe6\xa0\x9f\0" /* offset 15968 */
"\xe6\xa4\x94\0" /* offset 15972 */
"\xe6\xa5\x82\0" /* offset 15976 */
"\xe6\xa6\xa3\0" /* offset 15980 */
"\xe6\xa7\xaa\0" /* offset 15984 */
"\xe6\xaa\xa8\0" /* offset 15988 */
"\xf0\xa3\x9a\xa3\0" /* offset 15992 */
"\xe6\xab\x9b\0" /* offset 15997 */
"\xe3\xb0\x98\0" /* offset 16001 */
"\xe6\xac\xa1\0" /* offset 16005 */
"\xf0\xa3\xa2\xa7\0" /* offset 16009 */
"\xe6\xad\x94\0" /* offset 16014 */
"\xe3\xb1\x8e\0" /* offset 16018 */
"\xe6\xad\xb2\0" /* offset 16022 */
"\xe6\xae\x9f\0" /* offset 16026 */
"\xe6\xae\xbb\0" /* offset 16030 */
"\xf0\xa3\xaa\x8d\0" /* offset 16034 */
"\xf0\xa1\xb4\x8b\0" /* offset 16039 */
"\xf0\xa3\xab\xba\0" /* offset 16044 */
"\xe6\xb1\x8e\0" /* offset 16049 */
"\xf0\xa3\xb2\xbc\0" /* offset 16053 */
"\xe6\xb2\xbf\0" /* offset 16058 */
"\xe6\xb3\x8d\0" /* offset 16062 */
"\xe6\xb1\xa7\0" /* offset 16066 */
"\xe6\xb4\x96\0" /* offset 16070 */
"\xe6\xb4\xbe\0" /* offset 16074 */
"\xe6\xb5\xa9\0" /* offset 16078 */
"\xe6\xb5\xb8\0" /* offset 16082 */
"\xe6\xb6\x85\0" /* offset 16086 */
"\xf0\xa3\xb4\x9e\0" /* offset 16090 */
"\xe6\xb4\xb4\0" /* offset 16095 */
"\xe6\xb8\xaf\0" /* offset 16099 */
"\xe6\xb9\xae\0" /* offset 16103 */
"\xe3\xb4\xb3\0" /* offset 16107 */
"\xe6\xbb\x87\0" /* offset 16111 */
"\xf0\xa3\xbb\x91\0" /* offset 16115 */
"\xe6\xb7\xb9\0" /* offset 16120 */
"\xe6\xbd\xae\0" /* offset 16124 */
"\xf0\xa3\xbd\x9e\0" /* offset 16128 */
"\xf0\xa3\xbe\x8e\0" /* offset 16133 */
"\xe6\xbf\x86\0" /* offset 16138 */
"\xe7\x80\xb9\0" /* offset 16142 */
"\xe7\x80\x9b\0" /* offset 16146 */
"\xe3\xb6\x96\0" /* offset 16150 */
"\xe7\x81\x8a\0" /* offset 16154 */
"\xe7\x81\xbd\0" /* offset 16158 */
"\xe7\x81\xb7\0" /* offset 16162 */
"\xe7\x82\xad\0" /* offset 16166 */
"\xf0\xa0\x94\xa5\0" /* offset 16170 */
"\xe7\x85\x85\0" /* offset 16175 */
"\xf0\xa4\x89\xa3\0" /* offset 16179 */
"\xe7\x86\x9c\0" /* offset 16184 */
"\xf0\xa4\x8e\xab\0" /* offset 16188 */
"\xe7\x88\xa8\0" /* offset 16193 */
"\xe7\x89\x90\0" /* offset 16197 */
"\xf0\xa4\x98\x88\0" /* offset 16201 */
"\xe7\x8a\x80\0" /* offset 16206 */
"\xe7\x8a\x95\0" /* offset 16210 */
"\xf0\xa4\x9c\xb5\0" /* offset 16214 */
"\xf0\xa4\xa0\x94\0" /* offset 16219 */
"\xe7\x8d\xba\0" /* offset 16224 */
"\xe7\x8e\x8b\0" /* offset 16228 */
"\xe3\xba\xac\0" /* offset 16232 */
"\xe7\x8e\xa5\0" /* offset 16236 */
"\xe3\xba\xb8\0" /* offset 16240 */
"\xe7\x91\x87\0" /* offset 16244 */
"\xe7\x91\x9c\0" /* offset 16248 */
"\xe7\x92\x85\0" /* offset 16252 */
"\xe7\x93\x8a\0" /* offset 16256 */
"\xe3\xbc\x9b\0" /* offset 16260 */
"\xe7\x94\xa4\0" /* offset 16264 */
"\xf0\xa4\xb0\xb6\0" /* offset 16268 */
"\xe7\x94\xbe\0" /* offset 16273 */
"\xf0\xa4\xb2\x92\0" /* offset 16277 */
"\xf0\xa2\x86\x9f\0" /* offset 16282 */
"\xe7\x98\x90\0" /* offset 16287 */
"\xf0\xa4\xbe\xa1\0" /* offset 16291 */
"\xf0\xa4\xbe\xb8\0" /* offset 16296 */
"\xf0\xa5\x81\x84\0" /* offset 16301 */
"\xe3\xbf\xbc\0" /* offset 16306 */
"\xe4\x80\x88\0" /* offset 16310 */
"\xf0\xa5\x83\xb3\0" /* offset 16314 */
"\xf0\xa5\x83\xb2\0" /* offset 16319 */
"\xf0\xa5\x84\x99\0" /* offset 16324 */
"\xf0\xa5\x84\xb3\0" /* offset 16329 */
"\xe7\x9c\x9e\0" /* offset 16334 */
"\xe7\x9c\x9f\0" /* offset 16338 */
"\xe7\x9e\x8b\0" /* offset 16342 */
"\xe4\x81\x86\0" /* offset 16346 */
"\xe4\x82\x96\0" /* offset 16350 */
"\xf0\xa5\x90\x9d\0" /* offset 16354 */
"\xe7\xa1\x8e\0" /* offset 16359 */
"\xe4\x83\xa3\0" /* offset 16363 */
"\xf0\xa5\x98\xa6\0" /* offset 16367 */
"\xf0\xa5\x9a\x9a\0" /* offset 16372 */
"\xf0\xa5\x9b\x85\0" /* offset 16377 */
"\xe7\xa7\xab\0" /* offset 16382 */
"\xe4\x84\xaf\0" /* offset 16386 */
"\xe7\xa9\x8a\0" /* offset 16390 */
"\xe7\xa9\x8f\0" /* offset 16394 */
"\xf0\xa5\xa5\xbc\0" /* offset 16398 */
"\xf0\xa5\xaa\xa7\0" /* offset 16403 */
"\xe7\xab\xae\0" /* offset 16408 */
"\xe4\x88\x82\0" /* offset 16412 */
"\xf0\xa5\xae\xab\0" /* offset 16416 */
"\xe7\xaf\x86\0" /* offset 16421 */
"\xe7\xaf\x89\0" /* offset 16425 */
"\xe4\x88\xa7\0" /* offset 16429 */
"\xf0\xa5\xb2\x80\0" /* offset 16433 */
"\xe7\xb3\x92\0" /* offset 16438 */
"\xe4\x8a\xa0\0" /* offset 16442 */
"\xe7\xb3\xa8\0" /* offset 16446 */
"\xe7\xb3\xa3\0" /* offset 16450 */
"\xe7\xb4\x80\0" /* offset 16454 */
"\xf0\xa5\xbe\x86\0" /* offset 16458 */
"\xe7\xb5\xa3\0" /* offset 16463 */
"\xe4\x8c\x81\0" /* offset 16467 */
"\xe7\xb7\x87\0" /* offset 16471 */
"\xe7\xb8\x82\0" /* offset 16475 */
"\xe7\xb9\x85\0" /* offset 16479 */
"\xe4\x8c\xb4\0" /* offset 16483 */
"\xf0\xa6\x88\xa8\0" /* offset 16487 */
"\xf0\xa6\x89\x87\0" /* offset 16492 */
"\xe4\x8d\x99\0" /* offset 16497 */
"\xf0\xa6\x8b\x99\0" /* offset 16501 */
"\xe7\xbd\xba\0" /* offset 16506 */
"\xf0\xa6\x8c\xbe\0" /* offset 16510 */
"\xe7\xbe\x95\0" /* offset 16515 */
"\xe7\xbf\xba\0" /* offset 16519 */
"\xf0\xa6\x93\x9a\0" /* offset 16523 */
"\xf0\xa6\x94\xa3\0" /* offset 16528 */
"\xe8\x81\xa0\0" /* offset 16533 */
"\xf0\xa6\x96\xa8\0" /* offset 16537 */
"\xe8\x81\xb0\0" /* offset 16542 */
"\xf0\xa3\x8d\x9f\0" /* offset 16546 */
"\xe4\x8f\x95\0" /* offset 16551 */
"\xe8\x82\xb2\0" /* offset 16555 */
"\xe8\x84\x83\0" /* offset 16559 */
"\xe4\x90\x8b\0" /* offset 16563 */
"\xe8\x84\xbe\0" /* offset 16567 */
"\xe5\xaa\xb5\0" /* offset 16571 */
"\xf0\xa6\x9e\xa7\0" /* offset 16575 */
"\xf0\xa6\x9e\xb5\0" /* offset 16580 */
"\xf0\xa3\x8e\x93\0" /* offset 16585 */
"\xf0\xa3\x8e\x9c\0" /* offset 16590 */
"\xe8\x88\x84\0" /* offset 16595 */
"\xe8\xbe\x9e\0" /* offset 16599 */
"\xe4\x91\xab\0" /* offset 16603 */
"\xe8\x8a\x91\0" /* offset 16607 */
"\xe8\x8a\x8b\0" /* offset 16611 */
"\xe8\x8a\x9d\0" /* offset 16615 */
"\xe5\x8a\xb3\0" /* offset 16619 */
"\xe8\x8a\xb1\0" /* offset 16623 */
"\xe8\x8a\xb3\0" /* offset 16627 */
"\xe8\x8a\xbd\0" /* offset 16631 */
"\xe8\x8b\xa6\0" /* offset 16635 */
"\xf0\xa6\xac\xbc\0" /* offset 16639 */
"\xe8\x8c\x9d\0" /* offset 16644 */
"\xe8\x8d\xa3\0" /* offset 16648 */
"\xe8\x8e\xad\0" /* offset 16652 */
"\xe8\x8c\xa3\0" /* offset 16656 */
"\xe8\x8e\xbd\0" /* offset 16660 */
"\xe8\x8f\xa7\0" /* offset 16664 */
"\xe8\x8d\x93\0" /* offset 16668 */
"\xe8\x8f\x8a\0" /* offset 16672 */
"\xe8\x8f\x8c\0" /* offset 16676 */
"\xe8\x8f\x9c\0" /* offset 16680 */
"\xf0\xa6\xb0\xb6\0" /* offset 16684 */
"\xf0\xa6\xb5\xab\0" /* offset 16689 */
"\xf0\xa6\xb3\x95\0" /* offset 16694 */
"\xe4\x94\xab\0" /* offset 16699 */
"\xe8\x93\xb1\0" /* offset 16703 */
"\xe8\x93\xb3\0" /* offset 16707 */
"\xe8\x94\x96\0" /* offset 16711 */
"\xf0\xa7\x8f\x8a\0" /* offset 16715 */
"\xe8\x95\xa4\0" /* offset 16720 */
"\xf0\xa6\xbc\xac\0" /* offset 16724 */
"\xe4\x95\x9d\0" /* offset 16729 */
"\xe4\x95\xa1\0" /* offset 16733 */
"\xf0\xa6\xbe\xb1\0" /* offset 16737 */
"\xf0\xa7\x83\x92\0" /* offset 16742 */
"\xe4\x95\xab\0" /* offset 16747 */
"\xe8\x99\x90\0" /* offset 16751 */
"\xe8\x99\xa7\0" /* offset 16755 */
"\xe8\x99\xa9\0" /* offset 16759 */
"\xe8\x9a\xa9\0" /* offset 16763 */
"\xe8\x9a\x88\0" /* offset 16767 */
"\xe8\x9c\x8e\0" /* offset 16771 */
"\xe8\x9b\xa2\0" /* offset 16775 */
"\xe8\x9c\xa8\0" /* offset 16779 */
"\xe8\x9d\xab\0" /* offset 16783 */
"\xe8\x9e\x86\0" /* offset 16787 */
"\xe4\x97\x97\0" /* offset 16791 */
"\xe8\x9f\xa1\0" /* offset 16795 */
"\xe8\xa0\x81\0" /* offset 16799 */
"\xe4\x97\xb9\0" /* offset 16803 */
"\xe8\xa1\xa0\0" /* offset 16807 */
"\xf0\xa7\x99\xa7\0" /* offset 16811 */
"\xe8\xa3\x97\0" /* offset 16816 */
"\xe8\xa3\x9e\0" /* offset 16820 */
"\xe4\x98\xb5\0" /* offset 16824 */
"\xe8\xa3\xba\0" /* offset 16828 */
"\xe3\x92\xbb\0" /* offset 16832 */
"\xf0\xa7\xa2\xae\0" /* offset 16836 */
"\xf0\xa7\xa5\xa6\0" /* offset 16841 */
"\xe4\x9a\xbe\0" /* offset 16846 */
"\xe4\x9b\x87\0" /* offset 16850 */
"\xe8\xaa\xa0\0" /* offset 16854 */
"\xf0\xa7\xb2\xa8\0" /* offset 16858 */
"\xe8\xb2\xab\0" /* offset 16863 */
"\xe8\xb3\x81\0" /* offset 16867 */
"\xe8\xb4\x9b\0" /* offset 16871 */
"\xe8\xb5\xb7\0" /* offset 16875 */
"\xf0\xa7\xbc\xaf\0" /* offset 16879 */
"\xf0\xa0\xa0\x84\0" /* offset 16884 */
"\xe8\xb7\x8b\0" /* offset 16889 */
"\xe8\xb6\xbc\0" /* offset 16893 */
"\xe8\xb7\xb0\0" /* offset 16897 */
"\xf0\xa0\xa3\x9e\0" /* offset 16901 */
"\xe8\xbb\x94\0" /* offset 16906 */
"\xf0\xa8\x97\x92\0" /* offset 16910 */
"\xf0\xa8\x97\xad\0" /* offset 16915 */
"\xe9\x82\x94\0" /* offset 16920 */
"\xe9\x83\xb1\0" /* offset 16924 */
"\xe9\x84\x91\0" /* offset 16928 */
"\xf0\xa8\x9c\xae\0" /* offset 16932 */
"\xe9\x84\x9b\0" /* offset 16937 */
"\xe9\x88\xb8\0" /* offset 16941 */
"\xe9\x8b\x97\0" /* offset 16945 */
"\xe9\x8b\x98\0" /* offset 16949 */
"\xe9\x89\xbc\0" /* offset 16953 */
"\xe9\x8f\xb9\0" /* offset 16957 */
"\xe9\x90\x95\0" /* offset 16961 */
"\xf0\xa8\xaf\xba\0" /* offset 16965 */
"\xe9\x96\x8b\0" /* offset 16970 */
"\xe4\xa6\x95\0" /* offset 16974 */
"\xe9\x96\xb7\0" /* offset 16978 */
"\xf0\xa8\xb5\xb7\0" /* offset 16982 */
"\xe4\xa7\xa6\0" /* offset 16987 */
"\xe9\x9b\x83\0" /* offset 16991 */
"\xe5\xb6\xb2\0" /* offset 16995 */
"\xe9\x9c\xa3\0" /* offset 16999 */
"\xf0\xa9\x85\x85\0" /* offset 17003 */
"\xf0\xa9\x88\x9a\0" /* offset 17008 */
"\xe4\xa9\xae\0" /* offset 17013 */
"\xe4\xa9\xb6\0" /* offset 17017 */
"\xe9\x9f\xa0\0" /* offset 17021 */
"\xf0\xa9\x90\x8a\0" /* offset 17025 */
"\xe4\xaa\xb2\0" /* offset 17030 */
"\xf0\xa9\x92\x96\0" /* offset 17034 */
"\xe9\xa0\xa9\0" /* offset 17039 */
"\xf0\xa9\x96\xb6\0" /* offset 17043 */
"\xe9\xa3\xa2\0" /* offset 17048 */
"\xe4\xac\xb3\0" /* offset 17052 */
"\xe9\xa4\xa9\0" /* offset 17056 */
"\xe9\xa6\xa7\0" /* offset 17060 */
"\xe9\xa7\x82\0" /* offset 17064 */
"\xe9\xa7\xbe\0" /* offset 17068 */
"\xe4\xaf\x8e\0" /* offset 17072 */
"\xf0\xa9\xac\xb0\0" /* offset 17076 */
"\xe9\xb1\x80\0" /* offset 17081 */
"\xe9\xb3\xbd\0" /* offset 17085 */
"\xe4\xb3\x8e\0" /* offset 17089 */
"\xe4\xb3\xad\0" /* offset 17093 */
"\xe9\xb5\xa7\0" /* offset 17097 */
"\xf0\xaa\x83\x8e\0" /* offset 17101 */
"\xe4\xb3\xb8\0" /* offset 17106 */
"\xf0\xaa\x84\x85\0" /* offset 17110 */
"\xf0\xaa\x88\x8e\0" /* offset 17115 */
"\xf0\xaa\x8a\x91\0" /* offset 17120 */
"\xe4\xb5\x96\0" /* offset 17125 */
"\xe9\xbb\xbe\0" /* offset 17129 */
"\xe9\xbc\x85\0" /* offset 17133 */
"\xe9\xbc\x8f\0" /* offset 17137 */
"\xe9\xbc\x96\0" /* offset 17141 */
"\xf0\xaa\x98\x80\0" /* offset 17145 */;
#endif /* DECOMP_H */
| gpl-2.0 |
rex-xxx/Explay_A350_kernel_source_code | fs/nfs/pnfs.h | 7087 | /*
* pNFS client data structures.
*
* Copyright (c) 2002
* The Regents of the University of Michigan
* All Rights Reserved
*
* Dean Hildebrand <[email protected]>
*
* Permission is granted to use, copy, create derivative works, and
* redistribute this software and such derivative works for any purpose,
* so long as the name of the University of Michigan is not used in
* any advertising or publicity pertaining to the use or distribution
* of this software without specific, written prior authorization. If
* the above copyright notice or any other identification of the
* University of Michigan is included in any copy of any portion of
* this software, then the disclaimer below must also be included.
*
* This software is provided as is, without representation or warranty
* of any kind either express or implied, including without limitation
* the implied warranties of merchantability, fitness for a particular
* purpose, or noninfringement. The Regents of the University of
* Michigan shall not be liable for any damages, including special,
* indirect, incidental, or consequential damages, with respect to any
* claim arising out of or in connection with the use of the software,
* even if it has been or is hereafter advised of the possibility of
* such damages.
*/
#ifndef FS_NFS_PNFS_H
#define FS_NFS_PNFS_H
enum {
NFS_LSEG_VALID = 0, /* cleared when lseg is recalled/returned */
NFS_LSEG_ROC, /* roc bit received from server */
};
struct pnfs_layout_segment {
struct list_head pls_list;
struct pnfs_layout_range pls_range;
atomic_t pls_refcount;
unsigned long pls_flags;
struct pnfs_layout_hdr *pls_layout;
};
#ifdef CONFIG_NFS_V4_1
#define LAYOUT_NFSV4_1_MODULE_PREFIX "nfs-layouttype4"
enum {
NFS_LAYOUT_RO_FAILED = 0, /* get ro layout failed stop trying */
NFS_LAYOUT_RW_FAILED, /* get rw layout failed stop trying */
NFS_LAYOUT_BULK_RECALL, /* bulk recall affecting layout */
NFS_LAYOUT_ROC, /* some lseg had roc bit set */
NFS_LAYOUT_DESTROYED, /* no new use of layout allowed */
};
/* Per-layout driver specific registration structure */
struct pnfs_layoutdriver_type {
struct list_head pnfs_tblid;
const u32 id;
const char *name;
struct module *owner;
int (*set_layoutdriver) (struct nfs_server *);
int (*clear_layoutdriver) (struct nfs_server *);
struct pnfs_layout_segment * (*alloc_lseg) (struct pnfs_layout_hdr *layoutid, struct nfs4_layoutget_res *lgr);
void (*free_lseg) (struct pnfs_layout_segment *lseg);
};
struct pnfs_layout_hdr {
atomic_t plh_refcount;
struct list_head plh_layouts; /* other client layouts */
struct list_head plh_bulk_recall; /* clnt list of bulk recalls */
struct list_head plh_segs; /* layout segments list */
nfs4_stateid plh_stateid;
atomic_t plh_outstanding; /* number of RPCs out */
unsigned long plh_block_lgets; /* block LAYOUTGET if >0 */
u32 plh_barrier; /* ignore lower seqids */
unsigned long plh_flags;
struct inode *plh_inode;
};
struct pnfs_device {
struct nfs4_deviceid dev_id;
unsigned int layout_type;
unsigned int mincount;
struct page **pages;
void *area;
unsigned int pgbase;
unsigned int pglen;
};
/*
* Device ID RCU cache. A device ID is unique per client ID and layout type.
*/
#define NFS4_DEVICE_ID_HASH_BITS 5
#define NFS4_DEVICE_ID_HASH_SIZE (1 << NFS4_DEVICE_ID_HASH_BITS)
#define NFS4_DEVICE_ID_HASH_MASK (NFS4_DEVICE_ID_HASH_SIZE - 1)
static inline u32
nfs4_deviceid_hash(struct nfs4_deviceid *id)
{
unsigned char *cptr = (unsigned char *)id->data;
unsigned int nbytes = NFS4_DEVICEID4_SIZE;
u32 x = 0;
while (nbytes--) {
x *= 37;
x += *cptr++;
}
return x & NFS4_DEVICE_ID_HASH_MASK;
}
struct pnfs_deviceid_node {
struct hlist_node de_node;
struct nfs4_deviceid de_id;
atomic_t de_ref;
};
struct pnfs_deviceid_cache {
spinlock_t dc_lock;
atomic_t dc_ref;
void (*dc_free_callback)(struct pnfs_deviceid_node *);
struct hlist_head dc_deviceids[NFS4_DEVICE_ID_HASH_SIZE];
};
extern int pnfs_alloc_init_deviceid_cache(struct nfs_client *,
void (*free_callback)(struct pnfs_deviceid_node *));
extern void pnfs_put_deviceid_cache(struct nfs_client *);
extern struct pnfs_deviceid_node *pnfs_find_get_deviceid(
struct pnfs_deviceid_cache *,
struct nfs4_deviceid *);
extern struct pnfs_deviceid_node *pnfs_add_deviceid(
struct pnfs_deviceid_cache *,
struct pnfs_deviceid_node *);
extern void pnfs_put_deviceid(struct pnfs_deviceid_cache *c,
struct pnfs_deviceid_node *devid);
extern int pnfs_register_layoutdriver(struct pnfs_layoutdriver_type *);
extern void pnfs_unregister_layoutdriver(struct pnfs_layoutdriver_type *);
/* nfs4proc.c */
extern int nfs4_proc_getdeviceinfo(struct nfs_server *server,
struct pnfs_device *dev);
extern int nfs4_proc_layoutget(struct nfs4_layoutget *lgp);
/* pnfs.c */
void get_layout_hdr(struct pnfs_layout_hdr *lo);
struct pnfs_layout_segment *
pnfs_update_layout(struct inode *ino, struct nfs_open_context *ctx,
enum pnfs_iomode access_type);
void set_pnfs_layoutdriver(struct nfs_server *, u32 id);
void unset_pnfs_layoutdriver(struct nfs_server *);
int pnfs_layout_process(struct nfs4_layoutget *lgp);
void pnfs_free_lseg_list(struct list_head *tmp_list);
void pnfs_destroy_layout(struct nfs_inode *);
void pnfs_destroy_all_layouts(struct nfs_client *);
void put_layout_hdr(struct pnfs_layout_hdr *lo);
void pnfs_set_layout_stateid(struct pnfs_layout_hdr *lo,
const nfs4_stateid *new,
bool update_barrier);
int pnfs_choose_layoutget_stateid(nfs4_stateid *dst,
struct pnfs_layout_hdr *lo,
struct nfs4_state *open_state);
int mark_matching_lsegs_invalid(struct pnfs_layout_hdr *lo,
struct list_head *tmp_list,
u32 iomode);
bool pnfs_roc(struct inode *ino);
void pnfs_roc_release(struct inode *ino);
void pnfs_roc_set_barrier(struct inode *ino, u32 barrier);
bool pnfs_roc_drain(struct inode *ino, u32 *barrier);
static inline int lo_fail_bit(u32 iomode)
{
return iomode == IOMODE_RW ?
NFS_LAYOUT_RW_FAILED : NFS_LAYOUT_RO_FAILED;
}
/* Return true if a layout driver is being used for this mountpoint */
static inline int pnfs_enabled_sb(struct nfs_server *nfss)
{
return nfss->pnfs_curr_ld != NULL;
}
#else /* CONFIG_NFS_V4_1 */
static inline void pnfs_destroy_all_layouts(struct nfs_client *clp)
{
}
static inline void pnfs_destroy_layout(struct nfs_inode *nfsi)
{
}
static inline struct pnfs_layout_segment *
pnfs_update_layout(struct inode *ino, struct nfs_open_context *ctx,
enum pnfs_iomode access_type)
{
return NULL;
}
static inline bool
pnfs_roc(struct inode *ino)
{
return false;
}
static inline void
pnfs_roc_release(struct inode *ino)
{
}
static inline void
pnfs_roc_set_barrier(struct inode *ino, u32 barrier)
{
}
static inline bool
pnfs_roc_drain(struct inode *ino, u32 *barrier)
{
return false;
}
static inline void set_pnfs_layoutdriver(struct nfs_server *s, u32 id)
{
}
static inline void unset_pnfs_layoutdriver(struct nfs_server *s)
{
}
#endif /* CONFIG_NFS_V4_1 */
#endif /* FS_NFS_PNFS_H */
| gpl-2.0 |
selmentdev/selment-toolchain | source/gcc-latest/gcc/testsuite/gfortran.dg/typebound_override_6.f90 | 1090 | ! { dg-do compile }
!
! PR 54190: TYPE(*)/assumed-rank: Type/rank check too relaxed for dummy procedure
! PR 57217: [4.7/4.8/4.9 Regression][OOP] Accepts invalid TBP overriding - lacking arguments check
!
! Contributed by Tobias Burnus <[email protected]>
module base_mod
implicit none
type base_type
integer :: kind
contains
procedure, pass(map) :: clone => base_clone
end type
contains
subroutine base_clone(map,mapout,info)
class(base_type), intent(inout) :: map
class(base_type), intent(inout) :: mapout
integer :: info
end subroutine
end module
module r_mod
use base_mod
implicit none
type, extends(base_type) :: r_type
real :: dat
contains
procedure, pass(map) :: clone => r_clone ! { dg-error "Rank mismatch in argument" }
end type
contains
subroutine r_clone(map,mapout,info)
class(r_type), intent(inout) :: map
class(base_type), intent(inout) :: mapout(..)
integer :: info
end subroutine
end module
! { dg-final { cleanup-modules "base_mod r_mod" } }
| gpl-3.0 |
whosonfirst/go-whosonfirst-updated | vendor/github.com/whosonfirst/go-whosonfirst-s3/vendor/src/github.com/aws/aws-sdk-go/service/rds/rdsutils/connect.go | 2417 | package rdsutils
import (
"net/http"
"strings"
"time"
"github.com/aws/aws-sdk-go/aws/credentials"
"github.com/aws/aws-sdk-go/aws/signer/v4"
)
// BuildAuthToken will return a authentication token for the database's connect
// based on the RDS database endpoint, AWS region, IAM user or role, and AWS credentials.
//
// Endpoint consists of the hostname and port, IE hostname:port, of the RDS database.
// Region is the AWS region the RDS database is in and where the authentication token
// will be generated for. DbUser is the IAM user or role the request will be authenticated
// for. The creds is the AWS credentials the authentication token is signed with.
//
// An error is returned if the authentication token is unable to be signed with
// the credentials, or the endpoint is not a valid URL.
//
// The following example shows how to use BuildAuthToken to create an authentication
// token for connecting to a MySQL database in RDS.
//
// authToken, err := BuildAuthToken(dbEndpoint, awsRegion, dbUser, awsCreds)
//
// // Create the MySQL DNS string for the DB connection
// // user:password@protocol(endpoint)/dbname?<params>
// dnsStr = fmt.Sprintf("%s:%s@tcp(%s)/%s?tls=true",
// dbUser, authToken, dbEndpoint, dbName,
// )
//
// // Use db to perform SQL operations on database
// db, err := sql.Open("mysql", dnsStr)
//
// See http://docs.aws.amazon.com/AmazonRDS/latest/UserGuide/UsingWithRDS.IAMDBAuth.html
// for more information on using IAM database authentication with RDS.
func BuildAuthToken(endpoint, region, dbUser string, creds *credentials.Credentials) (string, error) {
// the scheme is arbitrary and is only needed because validation of the URL requires one.
if !(strings.HasPrefix(endpoint, "http://") || strings.HasPrefix(endpoint, "https://")) {
endpoint = "https://" + endpoint
}
req, err := http.NewRequest("GET", endpoint, nil)
if err != nil {
return "", err
}
values := req.URL.Query()
values.Set("Action", "connect")
values.Set("DBUser", dbUser)
req.URL.RawQuery = values.Encode()
signer := v4.Signer{
Credentials: creds,
}
_, err = signer.Presign(req, nil, "rds-db", region, 15*time.Minute, time.Now())
if err != nil {
return "", err
}
url := req.URL.String()
if strings.HasPrefix(url, "http://") {
url = url[len("http://"):]
} else if strings.HasPrefix(url, "https://") {
url = url[len("https://"):]
}
return url, nil
}
| bsd-3-clause |
Achuth17/scikit-learn | sklearn/learning_curve.py | 13467 | """Utilities to evaluate models with respect to a variable
"""
# Author: Alexander Fabisch <[email protected]>
#
# License: BSD 3 clause
import warnings
import numpy as np
from .base import is_classifier, clone
from .cross_validation import check_cv
from .externals.joblib import Parallel, delayed
from .cross_validation import _safe_split, _score, _fit_and_score
from .metrics.scorer import check_scoring
from .utils import indexable
from .utils.fixes import astype
__all__ = ['learning_curve', 'validation_curve']
def learning_curve(estimator, X, y, train_sizes=np.linspace(0.1, 1.0, 5),
cv=None, scoring=None, exploit_incremental_learning=False,
n_jobs=1, pre_dispatch="all", verbose=0):
"""Learning curve.
Determines cross-validated training and test scores for different training
set sizes.
A cross-validation generator splits the whole dataset k times in training
and test data. Subsets of the training set with varying sizes will be used
to train the estimator and a score for each training subset size and the
test set will be computed. Afterwards, the scores will be averaged over
all k runs for each training subset size.
Read more in the :ref:`User Guide <learning_curves>`.
Parameters
----------
estimator : object type that implements the "fit" and "predict" methods
An object of that type which is cloned for each validation.
X : array-like, shape (n_samples, n_features)
Training vector, where n_samples is the number of samples and
n_features is the number of features.
y : array-like, shape (n_samples) or (n_samples, n_features), optional
Target relative to X for classification or regression;
None for unsupervised learning.
train_sizes : array-like, shape (n_ticks,), dtype float or int
Relative or absolute numbers of training examples that will be used to
generate the learning curve. If the dtype is float, it is regarded as a
fraction of the maximum size of the training set (that is determined
by the selected validation method), i.e. it has to be within (0, 1].
Otherwise it is interpreted as absolute sizes of the training sets.
Note that for classification the number of samples usually have to
be big enough to contain at least one sample from each class.
(default: np.linspace(0.1, 1.0, 5))
cv : integer, cross-validation generator, optional
If an integer is passed, it is the number of folds (defaults to 3).
Specific cross-validation objects can be passed, see
sklearn.cross_validation module for the list of possible objects
scoring : string, callable or None, optional, default: None
A string (see model evaluation documentation) or
a scorer callable object / function with signature
``scorer(estimator, X, y)``.
exploit_incremental_learning : boolean, optional, default: False
If the estimator supports incremental learning, this will be
used to speed up fitting for different training set sizes.
n_jobs : integer, optional
Number of jobs to run in parallel (default 1).
pre_dispatch : integer or string, optional
Number of predispatched jobs for parallel execution (default is
all). The option can reduce the allocated memory. The string can
be an expression like '2*n_jobs'.
verbose : integer, optional
Controls the verbosity: the higher, the more messages.
Returns
-------
train_sizes_abs : array, shape = (n_unique_ticks,), dtype int
Numbers of training examples that has been used to generate the
learning curve. Note that the number of ticks might be less
than n_ticks because duplicate entries will be removed.
train_scores : array, shape (n_ticks, n_cv_folds)
Scores on training sets.
test_scores : array, shape (n_ticks, n_cv_folds)
Scores on test set.
Notes
-----
See :ref:`examples/model_selection/plot_learning_curve.py
<example_model_selection_plot_learning_curve.py>`
"""
if exploit_incremental_learning and not hasattr(estimator, "partial_fit"):
raise ValueError("An estimator must support the partial_fit interface "
"to exploit incremental learning")
X, y = indexable(X, y)
# Make a list since we will be iterating multiple times over the folds
cv = list(check_cv(cv, X, y, classifier=is_classifier(estimator)))
scorer = check_scoring(estimator, scoring=scoring)
# HACK as long as boolean indices are allowed in cv generators
if cv[0][0].dtype == bool:
new_cv = []
for i in range(len(cv)):
new_cv.append((np.nonzero(cv[i][0])[0], np.nonzero(cv[i][1])[0]))
cv = new_cv
n_max_training_samples = len(cv[0][0])
# Because the lengths of folds can be significantly different, it is
# not guaranteed that we use all of the available training data when we
# use the first 'n_max_training_samples' samples.
train_sizes_abs = _translate_train_sizes(train_sizes,
n_max_training_samples)
n_unique_ticks = train_sizes_abs.shape[0]
if verbose > 0:
print("[learning_curve] Training set sizes: " + str(train_sizes_abs))
parallel = Parallel(n_jobs=n_jobs, pre_dispatch=pre_dispatch,
verbose=verbose)
if exploit_incremental_learning:
classes = np.unique(y) if is_classifier(estimator) else None
out = parallel(delayed(_incremental_fit_estimator)(
clone(estimator), X, y, classes, train, test, train_sizes_abs,
scorer, verbose) for train, test in cv)
else:
out = parallel(delayed(_fit_and_score)(
clone(estimator), X, y, scorer, train[:n_train_samples], test,
verbose, parameters=None, fit_params=None, return_train_score=True)
for train, test in cv for n_train_samples in train_sizes_abs)
out = np.array(out)[:, :2]
n_cv_folds = out.shape[0] // n_unique_ticks
out = out.reshape(n_cv_folds, n_unique_ticks, 2)
out = np.asarray(out).transpose((2, 1, 0))
return train_sizes_abs, out[0], out[1]
def _translate_train_sizes(train_sizes, n_max_training_samples):
"""Determine absolute sizes of training subsets and validate 'train_sizes'.
Examples:
_translate_train_sizes([0.5, 1.0], 10) -> [5, 10]
_translate_train_sizes([5, 10], 10) -> [5, 10]
Parameters
----------
train_sizes : array-like, shape (n_ticks,), dtype float or int
Numbers of training examples that will be used to generate the
learning curve. If the dtype is float, it is regarded as a
fraction of 'n_max_training_samples', i.e. it has to be within (0, 1].
n_max_training_samples : int
Maximum number of training samples (upper bound of 'train_sizes').
Returns
-------
train_sizes_abs : array, shape (n_unique_ticks,), dtype int
Numbers of training examples that will be used to generate the
learning curve. Note that the number of ticks might be less
than n_ticks because duplicate entries will be removed.
"""
train_sizes_abs = np.asarray(train_sizes)
n_ticks = train_sizes_abs.shape[0]
n_min_required_samples = np.min(train_sizes_abs)
n_max_required_samples = np.max(train_sizes_abs)
if np.issubdtype(train_sizes_abs.dtype, np.float):
if n_min_required_samples <= 0.0 or n_max_required_samples > 1.0:
raise ValueError("train_sizes has been interpreted as fractions "
"of the maximum number of training samples and "
"must be within (0, 1], but is within [%f, %f]."
% (n_min_required_samples,
n_max_required_samples))
train_sizes_abs = astype(train_sizes_abs * n_max_training_samples,
dtype=np.int, copy=False)
train_sizes_abs = np.clip(train_sizes_abs, 1,
n_max_training_samples)
else:
if (n_min_required_samples <= 0 or
n_max_required_samples > n_max_training_samples):
raise ValueError("train_sizes has been interpreted as absolute "
"numbers of training samples and must be within "
"(0, %d], but is within [%d, %d]."
% (n_max_training_samples,
n_min_required_samples,
n_max_required_samples))
train_sizes_abs = np.unique(train_sizes_abs)
if n_ticks > train_sizes_abs.shape[0]:
warnings.warn("Removed duplicate entries from 'train_sizes'. Number "
"of ticks will be less than than the size of "
"'train_sizes' %d instead of %d)."
% (train_sizes_abs.shape[0], n_ticks), RuntimeWarning)
return train_sizes_abs
def _incremental_fit_estimator(estimator, X, y, classes, train, test,
train_sizes, scorer, verbose):
"""Train estimator on training subsets incrementally and compute scores."""
train_scores, test_scores = [], []
partitions = zip(train_sizes, np.split(train, train_sizes)[:-1])
for n_train_samples, partial_train in partitions:
train_subset = train[:n_train_samples]
X_train, y_train = _safe_split(estimator, X, y, train_subset)
X_partial_train, y_partial_train = _safe_split(estimator, X, y,
partial_train)
X_test, y_test = _safe_split(estimator, X, y, test, train_subset)
if y_partial_train is None:
estimator.partial_fit(X_partial_train, classes=classes)
else:
estimator.partial_fit(X_partial_train, y_partial_train,
classes=classes)
train_scores.append(_score(estimator, X_train, y_train, scorer))
test_scores.append(_score(estimator, X_test, y_test, scorer))
return np.array((train_scores, test_scores)).T
def validation_curve(estimator, X, y, param_name, param_range, cv=None,
scoring=None, n_jobs=1, pre_dispatch="all", verbose=0):
"""Validation curve.
Determine training and test scores for varying parameter values.
Compute scores for an estimator with different values of a specified
parameter. This is similar to grid search with one parameter. However, this
will also compute training scores and is merely a utility for plotting the
results.
Read more in the :ref:`User Guide <validation_curve>`.
Parameters
----------
estimator : object type that implements the "fit" and "predict" methods
An object of that type which is cloned for each validation.
X : array-like, shape (n_samples, n_features)
Training vector, where n_samples is the number of samples and
n_features is the number of features.
y : array-like, shape (n_samples) or (n_samples, n_features), optional
Target relative to X for classification or regression;
None for unsupervised learning.
param_name : string
Name of the parameter that will be varied.
param_range : array-like, shape (n_values,)
The values of the parameter that will be evaluated.
cv : integer, cross-validation generator, optional
If an integer is passed, it is the number of folds (defaults to 3).
Specific cross-validation objects can be passed, see
sklearn.cross_validation module for the list of possible objects
scoring : string, callable or None, optional, default: None
A string (see model evaluation documentation) or
a scorer callable object / function with signature
``scorer(estimator, X, y)``.
n_jobs : integer, optional
Number of jobs to run in parallel (default 1).
pre_dispatch : integer or string, optional
Number of predispatched jobs for parallel execution (default is
all). The option can reduce the allocated memory. The string can
be an expression like '2*n_jobs'.
verbose : integer, optional
Controls the verbosity: the higher, the more messages.
Returns
-------
train_scores : array, shape (n_ticks, n_cv_folds)
Scores on training sets.
test_scores : array, shape (n_ticks, n_cv_folds)
Scores on test set.
Notes
-----
See
:ref:`examples/model_selection/plot_validation_curve.py
<example_model_selection_plot_validation_curve.py>`
"""
X, y = indexable(X, y)
cv = check_cv(cv, X, y, classifier=is_classifier(estimator))
scorer = check_scoring(estimator, scoring=scoring)
parallel = Parallel(n_jobs=n_jobs, pre_dispatch=pre_dispatch,
verbose=verbose)
out = parallel(delayed(_fit_and_score)(
estimator, X, y, scorer, train, test, verbose,
parameters={param_name: v}, fit_params=None, return_train_score=True)
for train, test in cv for v in param_range)
out = np.asarray(out)[:, :2]
n_params = len(param_range)
n_cv_folds = out.shape[0] // n_params
out = out.reshape(n_cv_folds, n_params, 2).transpose((2, 1, 0))
return out[0], out[1]
| bsd-3-clause |
AiJiaZone/linux-4.0 | virt/tools/perf/builtin-buildid-cache.c | 10517 | /*
* builtin-buildid-cache.c
*
* Builtin buildid-cache command: Manages build-id cache
*
* Copyright (C) 2010, Red Hat Inc.
* Copyright (C) 2010, Arnaldo Carvalho de Melo <[email protected]>
*/
#include <sys/types.h>
#include <sys/time.h>
#include <time.h>
#include <dirent.h>
#include <unistd.h>
#include "builtin.h"
#include "perf.h"
#include "util/cache.h"
#include "util/debug.h"
#include "util/header.h"
#include "util/parse-options.h"
#include "util/strlist.h"
#include "util/build-id.h"
#include "util/session.h"
#include "util/symbol.h"
static int build_id_cache__kcore_buildid(const char *proc_dir, char *sbuildid)
{
char root_dir[PATH_MAX];
char *p;
strlcpy(root_dir, proc_dir, sizeof(root_dir));
p = strrchr(root_dir, '/');
if (!p)
return -1;
*p = '\0';
return sysfs__sprintf_build_id(root_dir, sbuildid);
}
static int build_id_cache__kcore_dir(char *dir, size_t sz)
{
struct timeval tv;
struct tm tm;
char dt[32];
if (gettimeofday(&tv, NULL) || !localtime_r(&tv.tv_sec, &tm))
return -1;
if (!strftime(dt, sizeof(dt), "%Y%m%d%H%M%S", &tm))
return -1;
scnprintf(dir, sz, "%s%02u", dt, (unsigned)tv.tv_usec / 10000);
return 0;
}
static bool same_kallsyms_reloc(const char *from_dir, char *to_dir)
{
char from[PATH_MAX];
char to[PATH_MAX];
const char *name;
u64 addr1 = 0, addr2 = 0;
int i;
scnprintf(from, sizeof(from), "%s/kallsyms", from_dir);
scnprintf(to, sizeof(to), "%s/kallsyms", to_dir);
for (i = 0; (name = ref_reloc_sym_names[i]) != NULL; i++) {
addr1 = kallsyms__get_function_start(from, name);
if (addr1)
break;
}
if (name)
addr2 = kallsyms__get_function_start(to, name);
return addr1 == addr2;
}
static int build_id_cache__kcore_existing(const char *from_dir, char *to_dir,
size_t to_dir_sz)
{
char from[PATH_MAX];
char to[PATH_MAX];
char to_subdir[PATH_MAX];
struct dirent *dent;
int ret = -1;
DIR *d;
d = opendir(to_dir);
if (!d)
return -1;
scnprintf(from, sizeof(from), "%s/modules", from_dir);
while (1) {
dent = readdir(d);
if (!dent)
break;
if (dent->d_type != DT_DIR)
continue;
scnprintf(to, sizeof(to), "%s/%s/modules", to_dir,
dent->d_name);
scnprintf(to_subdir, sizeof(to_subdir), "%s/%s",
to_dir, dent->d_name);
if (!compare_proc_modules(from, to) &&
same_kallsyms_reloc(from_dir, to_subdir)) {
strlcpy(to_dir, to_subdir, to_dir_sz);
ret = 0;
break;
}
}
closedir(d);
return ret;
}
static int build_id_cache__add_kcore(const char *filename, bool force)
{
char dir[32], sbuildid[SBUILD_ID_SIZE];
char from_dir[PATH_MAX], to_dir[PATH_MAX];
char *p;
strlcpy(from_dir, filename, sizeof(from_dir));
p = strrchr(from_dir, '/');
if (!p || strcmp(p + 1, "kcore"))
return -1;
*p = '\0';
if (build_id_cache__kcore_buildid(from_dir, sbuildid) < 0)
return -1;
scnprintf(to_dir, sizeof(to_dir), "%s/[kernel.kcore]/%s",
buildid_dir, sbuildid);
if (!force &&
!build_id_cache__kcore_existing(from_dir, to_dir, sizeof(to_dir))) {
pr_debug("same kcore found in %s\n", to_dir);
return 0;
}
if (build_id_cache__kcore_dir(dir, sizeof(dir)))
return -1;
scnprintf(to_dir, sizeof(to_dir), "%s/[kernel.kcore]/%s/%s",
buildid_dir, sbuildid, dir);
if (mkdir_p(to_dir, 0755))
return -1;
if (kcore_copy(from_dir, to_dir)) {
/* Remove YYYYmmddHHMMSShh directory */
if (!rmdir(to_dir)) {
p = strrchr(to_dir, '/');
if (p)
*p = '\0';
/* Try to remove buildid directory */
if (!rmdir(to_dir)) {
p = strrchr(to_dir, '/');
if (p)
*p = '\0';
/* Try to remove [kernel.kcore] directory */
rmdir(to_dir);
}
}
return -1;
}
pr_debug("kcore added to build-id cache directory %s\n", to_dir);
return 0;
}
static int build_id_cache__add_file(const char *filename)
{
char sbuild_id[SBUILD_ID_SIZE];
u8 build_id[BUILD_ID_SIZE];
int err;
if (filename__read_build_id(filename, &build_id, sizeof(build_id)) < 0) {
pr_debug("Couldn't read a build-id in %s\n", filename);
return -1;
}
build_id__sprintf(build_id, sizeof(build_id), sbuild_id);
err = build_id_cache__add_s(sbuild_id, filename,
false, false);
pr_debug("Adding %s %s: %s\n", sbuild_id, filename,
err ? "FAIL" : "Ok");
return err;
}
static int build_id_cache__remove_file(const char *filename)
{
u8 build_id[BUILD_ID_SIZE];
char sbuild_id[SBUILD_ID_SIZE];
int err;
if (filename__read_build_id(filename, &build_id, sizeof(build_id)) < 0) {
pr_debug("Couldn't read a build-id in %s\n", filename);
return -1;
}
build_id__sprintf(build_id, sizeof(build_id), sbuild_id);
err = build_id_cache__remove_s(sbuild_id);
pr_debug("Removing %s %s: %s\n", sbuild_id, filename,
err ? "FAIL" : "Ok");
return err;
}
static int build_id_cache__purge_path(const char *pathname)
{
struct strlist *list;
struct str_node *pos;
int err;
err = build_id_cache__list_build_ids(pathname, &list);
if (err)
goto out;
strlist__for_each(pos, list) {
err = build_id_cache__remove_s(pos->s);
pr_debug("Removing %s %s: %s\n", pos->s, pathname,
err ? "FAIL" : "Ok");
if (err)
break;
}
strlist__delete(list);
out:
pr_debug("Purging %s: %s\n", pathname, err ? "FAIL" : "Ok");
return err;
}
static bool dso__missing_buildid_cache(struct dso *dso, int parm __maybe_unused)
{
char filename[PATH_MAX];
u8 build_id[BUILD_ID_SIZE];
if (dso__build_id_filename(dso, filename, sizeof(filename)) &&
filename__read_build_id(filename, build_id,
sizeof(build_id)) != sizeof(build_id)) {
if (errno == ENOENT)
return false;
pr_warning("Problems with %s file, consider removing it from the cache\n",
filename);
} else if (memcmp(dso->build_id, build_id, sizeof(dso->build_id))) {
pr_warning("Problems with %s file, consider removing it from the cache\n",
filename);
}
return true;
}
static int build_id_cache__fprintf_missing(struct perf_session *session, FILE *fp)
{
perf_session__fprintf_dsos_buildid(session, fp, dso__missing_buildid_cache, 0);
return 0;
}
static int build_id_cache__update_file(const char *filename)
{
u8 build_id[BUILD_ID_SIZE];
char sbuild_id[SBUILD_ID_SIZE];
int err = 0;
if (filename__read_build_id(filename, &build_id, sizeof(build_id)) < 0) {
pr_debug("Couldn't read a build-id in %s\n", filename);
return -1;
}
build_id__sprintf(build_id, sizeof(build_id), sbuild_id);
if (build_id_cache__cached(sbuild_id))
err = build_id_cache__remove_s(sbuild_id);
if (!err)
err = build_id_cache__add_s(sbuild_id, filename, false, false);
pr_debug("Updating %s %s: %s\n", sbuild_id, filename,
err ? "FAIL" : "Ok");
return err;
}
int cmd_buildid_cache(int argc, const char **argv,
const char *prefix __maybe_unused)
{
struct strlist *list;
struct str_node *pos;
int ret = 0;
bool force = false;
char const *add_name_list_str = NULL,
*remove_name_list_str = NULL,
*purge_name_list_str = NULL,
*missing_filename = NULL,
*update_name_list_str = NULL,
*kcore_filename = NULL;
char sbuf[STRERR_BUFSIZE];
struct perf_data_file file = {
.mode = PERF_DATA_MODE_READ,
};
struct perf_session *session = NULL;
const struct option buildid_cache_options[] = {
OPT_STRING('a', "add", &add_name_list_str,
"file list", "file(s) to add"),
OPT_STRING('k', "kcore", &kcore_filename,
"file", "kcore file to add"),
OPT_STRING('r', "remove", &remove_name_list_str, "file list",
"file(s) to remove"),
OPT_STRING('p', "purge", &purge_name_list_str, "path list",
"path(s) to remove (remove old caches too)"),
OPT_STRING('M', "missing", &missing_filename, "file",
"to find missing build ids in the cache"),
OPT_BOOLEAN('f', "force", &force, "don't complain, do it"),
OPT_STRING('u', "update", &update_name_list_str, "file list",
"file(s) to update"),
OPT_INCR('v', "verbose", &verbose, "be more verbose"),
OPT_END()
};
const char * const buildid_cache_usage[] = {
"perf buildid-cache [<options>]",
NULL
};
argc = parse_options(argc, argv, buildid_cache_options,
buildid_cache_usage, 0);
if (argc || (!add_name_list_str && !kcore_filename &&
!remove_name_list_str && !purge_name_list_str &&
!missing_filename && !update_name_list_str))
usage_with_options(buildid_cache_usage, buildid_cache_options);
if (missing_filename) {
file.path = missing_filename;
file.force = force;
session = perf_session__new(&file, false, NULL);
if (session == NULL)
return -1;
}
if (symbol__init(session ? &session->header.env : NULL) < 0)
goto out;
setup_pager();
if (add_name_list_str) {
list = strlist__new(add_name_list_str, NULL);
if (list) {
strlist__for_each(pos, list)
if (build_id_cache__add_file(pos->s)) {
if (errno == EEXIST) {
pr_debug("%s already in the cache\n",
pos->s);
continue;
}
pr_warning("Couldn't add %s: %s\n",
pos->s, strerror_r(errno, sbuf, sizeof(sbuf)));
}
strlist__delete(list);
}
}
if (remove_name_list_str) {
list = strlist__new(remove_name_list_str, NULL);
if (list) {
strlist__for_each(pos, list)
if (build_id_cache__remove_file(pos->s)) {
if (errno == ENOENT) {
pr_debug("%s wasn't in the cache\n",
pos->s);
continue;
}
pr_warning("Couldn't remove %s: %s\n",
pos->s, strerror_r(errno, sbuf, sizeof(sbuf)));
}
strlist__delete(list);
}
}
if (purge_name_list_str) {
list = strlist__new(purge_name_list_str, NULL);
if (list) {
strlist__for_each(pos, list)
if (build_id_cache__purge_path(pos->s)) {
if (errno == ENOENT) {
pr_debug("%s wasn't in the cache\n",
pos->s);
continue;
}
pr_warning("Couldn't remove %s: %s\n",
pos->s, strerror_r(errno, sbuf, sizeof(sbuf)));
}
strlist__delete(list);
}
}
if (missing_filename)
ret = build_id_cache__fprintf_missing(session, stdout);
if (update_name_list_str) {
list = strlist__new(update_name_list_str, NULL);
if (list) {
strlist__for_each(pos, list)
if (build_id_cache__update_file(pos->s)) {
if (errno == ENOENT) {
pr_debug("%s wasn't in the cache\n",
pos->s);
continue;
}
pr_warning("Couldn't update %s: %s\n",
pos->s, strerror_r(errno, sbuf, sizeof(sbuf)));
}
strlist__delete(list);
}
}
if (kcore_filename && build_id_cache__add_kcore(kcore_filename, force))
pr_warning("Couldn't add %s\n", kcore_filename);
out:
if (session)
perf_session__delete(session);
return ret;
}
| gpl-2.0 |
zhangf911/TrinityCore | sql/old/4.3.4/TDB5_to_TDB6_updates/world/093_2014_03_20_01_world_sai.sql | 748 | /*
UPDATE `creature_template` SET `ainame`='SmartAI', `scriptname`='' WHERE `entry`=8816;
DELETE FROM `smart_scripts` WHERE `entryorguid`=8816 AND `source_type`=0;
INSERT INTO `smart_scripts` (`entryorguid`, `source_type`, `id`, `link`, `event_type`, `event_phase_mask`, `event_chance`, `event_flags`, `event_param1`, `event_param2`, `event_param3`, `event_param4`, `action_type`, `action_param1`, `action_param2`, `action_param3`, `action_param4`, `action_param5`, `action_param6`, `target_type`, `target_param1`, `target_param2`, `target_param3`, `target_x`, `target_y`, `target_z`, `target_o`, `comment`) VALUES
(8816,0,0,0,62,0,100,0,1541,0,0,0,11,12885,2,0,0,0,0,7,0,0,0,0,0,0,0,'On Gossip Option Selected - Cast ''Teleport to Razelikh''');
*/ | gpl-2.0 |
dmirubtsov/k8s-executor | vendor/k8s.io/kubernetes/vendor/github.com/coreos/etcd/store/watcher.go | 3230 | // Copyright 2015 CoreOS, Inc.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
package store
type Watcher interface {
EventChan() chan *Event
StartIndex() uint64 // The EtcdIndex at which the Watcher was created
Remove()
}
type watcher struct {
eventChan chan *Event
stream bool
recursive bool
sinceIndex uint64
startIndex uint64
hub *watcherHub
removed bool
remove func()
}
func (w *watcher) EventChan() chan *Event {
return w.eventChan
}
func (w *watcher) StartIndex() uint64 {
return w.startIndex
}
// notify function notifies the watcher. If the watcher interests in the given path,
// the function will return true.
func (w *watcher) notify(e *Event, originalPath bool, deleted bool) bool {
// watcher is interested the path in three cases and under one condition
// the condition is that the event happens after the watcher's sinceIndex
// 1. the path at which the event happens is the path the watcher is watching at.
// For example if the watcher is watching at "/foo" and the event happens at "/foo",
// the watcher must be interested in that event.
// 2. the watcher is a recursive watcher, it interests in the event happens after
// its watching path. For example if watcher A watches at "/foo" and it is a recursive
// one, it will interest in the event happens at "/foo/bar".
// 3. when we delete a directory, we need to force notify all the watchers who watches
// at the file we need to delete.
// For example a watcher is watching at "/foo/bar". And we deletes "/foo". The watcher
// should get notified even if "/foo" is not the path it is watching.
if (w.recursive || originalPath || deleted) && e.Index() >= w.sinceIndex {
// We cannot block here if the eventChan capacity is full, otherwise
// etcd will hang. eventChan capacity is full when the rate of
// notifications are higher than our send rate.
// If this happens, we close the channel.
select {
case w.eventChan <- e:
default:
// We have missed a notification. Remove the watcher.
// Removing the watcher also closes the eventChan.
w.remove()
}
return true
}
return false
}
// Remove removes the watcher from watcherHub
// The actual remove function is guaranteed to only be executed once
func (w *watcher) Remove() {
w.hub.mutex.Lock()
defer w.hub.mutex.Unlock()
close(w.eventChan)
if w.remove != nil {
w.remove()
}
}
// nopWatcher is a watcher that receives nothing, always blocking.
type nopWatcher struct{}
func NewNopWatcher() Watcher { return &nopWatcher{} }
func (w *nopWatcher) EventChan() chan *Event { return nil }
func (w *nopWatcher) StartIndex() uint64 { return 0 }
func (w *nopWatcher) Remove() {}
| apache-2.0 |
TA-Team-Giant/PAaaS | pAaaS/Notifications/Model/IScenario.cs | 218 | using System;
namespace Notifications.Model
{
public interface IScenario
{
string Name { get; }
bool Contains(Type scenarioType);
Scenario FindScenario(Type scenarioType);
}
}
| mit |
iwinoto/v4l-media_build | media/drivers/scsi/bnx2fc/bnx2fc_tgt.c | 25310 | /* bnx2fc_tgt.c: Broadcom NetXtreme II Linux FCoE offload driver.
* Handles operations such as session offload/upload etc, and manages
* session resources such as connection id and qp resources.
*
* Copyright (c) 2008 - 2013 Broadcom Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation.
*
* Written by: Bhanu Prakash Gollapudi ([email protected])
*/
#include "bnx2fc.h"
static void bnx2fc_upld_timer(unsigned long data);
static void bnx2fc_ofld_timer(unsigned long data);
static int bnx2fc_init_tgt(struct bnx2fc_rport *tgt,
struct fcoe_port *port,
struct fc_rport_priv *rdata);
static u32 bnx2fc_alloc_conn_id(struct bnx2fc_hba *hba,
struct bnx2fc_rport *tgt);
static int bnx2fc_alloc_session_resc(struct bnx2fc_hba *hba,
struct bnx2fc_rport *tgt);
static void bnx2fc_free_session_resc(struct bnx2fc_hba *hba,
struct bnx2fc_rport *tgt);
static void bnx2fc_free_conn_id(struct bnx2fc_hba *hba, u32 conn_id);
static void bnx2fc_upld_timer(unsigned long data)
{
struct bnx2fc_rport *tgt = (struct bnx2fc_rport *)data;
BNX2FC_TGT_DBG(tgt, "upld_timer - Upload compl not received!!\n");
/* fake upload completion */
clear_bit(BNX2FC_FLAG_OFFLOADED, &tgt->flags);
clear_bit(BNX2FC_FLAG_ENABLED, &tgt->flags);
set_bit(BNX2FC_FLAG_UPLD_REQ_COMPL, &tgt->flags);
wake_up_interruptible(&tgt->upld_wait);
}
static void bnx2fc_ofld_timer(unsigned long data)
{
struct bnx2fc_rport *tgt = (struct bnx2fc_rport *)data;
BNX2FC_TGT_DBG(tgt, "entered bnx2fc_ofld_timer\n");
/* NOTE: This function should never be called, as
* offload should never timeout
*/
/*
* If the timer has expired, this session is dead
* Clear offloaded flag and logout of this device.
* Since OFFLOADED flag is cleared, this case
* will be considered as offload error and the
* port will be logged off, and conn_id, session
* resources are freed up in bnx2fc_offload_session
*/
clear_bit(BNX2FC_FLAG_OFFLOADED, &tgt->flags);
clear_bit(BNX2FC_FLAG_ENABLED, &tgt->flags);
set_bit(BNX2FC_FLAG_OFLD_REQ_CMPL, &tgt->flags);
wake_up_interruptible(&tgt->ofld_wait);
}
static void bnx2fc_ofld_wait(struct bnx2fc_rport *tgt)
{
setup_timer(&tgt->ofld_timer, bnx2fc_ofld_timer, (unsigned long)tgt);
mod_timer(&tgt->ofld_timer, jiffies + BNX2FC_FW_TIMEOUT);
wait_event_interruptible(tgt->ofld_wait,
(test_bit(
BNX2FC_FLAG_OFLD_REQ_CMPL,
&tgt->flags)));
if (signal_pending(current))
flush_signals(current);
del_timer_sync(&tgt->ofld_timer);
}
static void bnx2fc_offload_session(struct fcoe_port *port,
struct bnx2fc_rport *tgt,
struct fc_rport_priv *rdata)
{
struct fc_lport *lport = rdata->local_port;
struct fc_rport *rport = rdata->rport;
struct bnx2fc_interface *interface = port->priv;
struct bnx2fc_hba *hba = interface->hba;
int rval;
int i = 0;
/* Initialize bnx2fc_rport */
/* NOTE: tgt is already bzero'd */
rval = bnx2fc_init_tgt(tgt, port, rdata);
if (rval) {
printk(KERN_ERR PFX "Failed to allocate conn id for "
"port_id (%6x)\n", rport->port_id);
goto tgt_init_err;
}
/* Allocate session resources */
rval = bnx2fc_alloc_session_resc(hba, tgt);
if (rval) {
printk(KERN_ERR PFX "Failed to allocate resources\n");
goto ofld_err;
}
/*
* Initialize FCoE session offload process.
* Upon completion of offload process add
* rport to list of rports
*/
retry_ofld:
clear_bit(BNX2FC_FLAG_OFLD_REQ_CMPL, &tgt->flags);
rval = bnx2fc_send_session_ofld_req(port, tgt);
if (rval) {
printk(KERN_ERR PFX "ofld_req failed\n");
goto ofld_err;
}
/*
* wait for the session is offloaded and enabled. 3 Secs
* should be ample time for this process to complete.
*/
bnx2fc_ofld_wait(tgt);
if (!(test_bit(BNX2FC_FLAG_OFFLOADED, &tgt->flags))) {
if (test_and_clear_bit(BNX2FC_FLAG_CTX_ALLOC_FAILURE,
&tgt->flags)) {
BNX2FC_TGT_DBG(tgt, "ctx_alloc_failure, "
"retry ofld..%d\n", i++);
msleep_interruptible(1000);
if (i > 3) {
i = 0;
goto ofld_err;
}
goto retry_ofld;
}
goto ofld_err;
}
if (bnx2fc_map_doorbell(tgt)) {
printk(KERN_ERR PFX "map doorbell failed - no mem\n");
goto ofld_err;
}
clear_bit(BNX2FC_FLAG_OFLD_REQ_CMPL, &tgt->flags);
rval = bnx2fc_send_session_enable_req(port, tgt);
if (rval) {
pr_err(PFX "enable session failed\n");
goto ofld_err;
}
bnx2fc_ofld_wait(tgt);
if (!(test_bit(BNX2FC_FLAG_ENABLED, &tgt->flags)))
goto ofld_err;
return;
ofld_err:
/* couldn't offload the session. log off from this rport */
BNX2FC_TGT_DBG(tgt, "bnx2fc_offload_session - offload error\n");
clear_bit(BNX2FC_FLAG_OFFLOADED, &tgt->flags);
/* Free session resources */
bnx2fc_free_session_resc(hba, tgt);
tgt_init_err:
if (tgt->fcoe_conn_id != -1)
bnx2fc_free_conn_id(hba, tgt->fcoe_conn_id);
lport->tt.rport_logoff(rdata);
}
void bnx2fc_flush_active_ios(struct bnx2fc_rport *tgt)
{
struct bnx2fc_cmd *io_req;
struct bnx2fc_cmd *tmp;
int rc;
int i = 0;
BNX2FC_TGT_DBG(tgt, "Entered flush_active_ios - %d\n",
tgt->num_active_ios.counter);
spin_lock_bh(&tgt->tgt_lock);
tgt->flush_in_prog = 1;
list_for_each_entry_safe(io_req, tmp, &tgt->active_cmd_queue, link) {
i++;
list_del_init(&io_req->link);
io_req->on_active_queue = 0;
BNX2FC_IO_DBG(io_req, "cmd_queue cleanup\n");
if (cancel_delayed_work(&io_req->timeout_work)) {
if (test_and_clear_bit(BNX2FC_FLAG_EH_ABORT,
&io_req->req_flags)) {
/* Handle eh_abort timeout */
BNX2FC_IO_DBG(io_req, "eh_abort for IO "
"cleaned up\n");
complete(&io_req->tm_done);
}
kref_put(&io_req->refcount,
bnx2fc_cmd_release); /* drop timer hold */
}
set_bit(BNX2FC_FLAG_IO_COMPL, &io_req->req_flags);
set_bit(BNX2FC_FLAG_IO_CLEANUP, &io_req->req_flags);
/* Do not issue cleanup when disable request failed */
if (test_bit(BNX2FC_FLAG_DISABLE_FAILED, &tgt->flags))
bnx2fc_process_cleanup_compl(io_req, io_req->task, 0);
else {
rc = bnx2fc_initiate_cleanup(io_req);
BUG_ON(rc);
}
}
list_for_each_entry_safe(io_req, tmp, &tgt->active_tm_queue, link) {
i++;
list_del_init(&io_req->link);
io_req->on_tmf_queue = 0;
BNX2FC_IO_DBG(io_req, "tm_queue cleanup\n");
if (io_req->wait_for_comp)
complete(&io_req->tm_done);
}
list_for_each_entry_safe(io_req, tmp, &tgt->els_queue, link) {
i++;
list_del_init(&io_req->link);
io_req->on_active_queue = 0;
BNX2FC_IO_DBG(io_req, "els_queue cleanup\n");
if (cancel_delayed_work(&io_req->timeout_work))
kref_put(&io_req->refcount,
bnx2fc_cmd_release); /* drop timer hold */
if ((io_req->cb_func) && (io_req->cb_arg)) {
io_req->cb_func(io_req->cb_arg);
io_req->cb_arg = NULL;
}
/* Do not issue cleanup when disable request failed */
if (test_bit(BNX2FC_FLAG_DISABLE_FAILED, &tgt->flags))
bnx2fc_process_cleanup_compl(io_req, io_req->task, 0);
else {
rc = bnx2fc_initiate_cleanup(io_req);
BUG_ON(rc);
}
}
list_for_each_entry_safe(io_req, tmp, &tgt->io_retire_queue, link) {
i++;
list_del_init(&io_req->link);
BNX2FC_IO_DBG(io_req, "retire_queue flush\n");
if (cancel_delayed_work(&io_req->timeout_work)) {
if (test_and_clear_bit(BNX2FC_FLAG_EH_ABORT,
&io_req->req_flags)) {
/* Handle eh_abort timeout */
BNX2FC_IO_DBG(io_req, "eh_abort for IO "
"in retire_q\n");
if (io_req->wait_for_comp)
complete(&io_req->tm_done);
}
kref_put(&io_req->refcount, bnx2fc_cmd_release);
}
clear_bit(BNX2FC_FLAG_ISSUE_RRQ, &io_req->req_flags);
}
BNX2FC_TGT_DBG(tgt, "IOs flushed = %d\n", i);
i = 0;
spin_unlock_bh(&tgt->tgt_lock);
/* wait for active_ios to go to 0 */
while ((tgt->num_active_ios.counter != 0) && (i++ < BNX2FC_WAIT_CNT))
msleep(25);
if (tgt->num_active_ios.counter != 0)
printk(KERN_ERR PFX "CLEANUP on port 0x%x:"
" active_ios = %d\n",
tgt->rdata->ids.port_id, tgt->num_active_ios.counter);
spin_lock_bh(&tgt->tgt_lock);
tgt->flush_in_prog = 0;
spin_unlock_bh(&tgt->tgt_lock);
}
static void bnx2fc_upld_wait(struct bnx2fc_rport *tgt)
{
setup_timer(&tgt->upld_timer, bnx2fc_upld_timer, (unsigned long)tgt);
mod_timer(&tgt->upld_timer, jiffies + BNX2FC_FW_TIMEOUT);
wait_event_interruptible(tgt->upld_wait,
(test_bit(
BNX2FC_FLAG_UPLD_REQ_COMPL,
&tgt->flags)));
if (signal_pending(current))
flush_signals(current);
del_timer_sync(&tgt->upld_timer);
}
static void bnx2fc_upload_session(struct fcoe_port *port,
struct bnx2fc_rport *tgt)
{
struct bnx2fc_interface *interface = port->priv;
struct bnx2fc_hba *hba = interface->hba;
BNX2FC_TGT_DBG(tgt, "upload_session: active_ios = %d\n",
tgt->num_active_ios.counter);
/*
* Called with hba->hba_mutex held.
* This is a blocking call
*/
clear_bit(BNX2FC_FLAG_UPLD_REQ_COMPL, &tgt->flags);
bnx2fc_send_session_disable_req(port, tgt);
/*
* wait for upload to complete. 3 Secs
* should be sufficient time for this process to complete.
*/
BNX2FC_TGT_DBG(tgt, "waiting for disable compl\n");
bnx2fc_upld_wait(tgt);
/*
* traverse thru the active_q and tmf_q and cleanup
* IOs in these lists
*/
BNX2FC_TGT_DBG(tgt, "flush/upload - disable wait flags = 0x%lx\n",
tgt->flags);
bnx2fc_flush_active_ios(tgt);
/* Issue destroy KWQE */
if (test_bit(BNX2FC_FLAG_DISABLED, &tgt->flags)) {
BNX2FC_TGT_DBG(tgt, "send destroy req\n");
clear_bit(BNX2FC_FLAG_UPLD_REQ_COMPL, &tgt->flags);
bnx2fc_send_session_destroy_req(hba, tgt);
/* wait for destroy to complete */
bnx2fc_upld_wait(tgt);
if (!(test_bit(BNX2FC_FLAG_DESTROYED, &tgt->flags)))
printk(KERN_ERR PFX "ERROR!! destroy timed out\n");
BNX2FC_TGT_DBG(tgt, "destroy wait complete flags = 0x%lx\n",
tgt->flags);
} else if (test_bit(BNX2FC_FLAG_DISABLE_FAILED, &tgt->flags)) {
printk(KERN_ERR PFX "ERROR!! DISABLE req failed, destroy"
" not sent to FW\n");
} else {
printk(KERN_ERR PFX "ERROR!! DISABLE req timed out, destroy"
" not sent to FW\n");
}
/* Free session resources */
bnx2fc_free_session_resc(hba, tgt);
bnx2fc_free_conn_id(hba, tgt->fcoe_conn_id);
}
static int bnx2fc_init_tgt(struct bnx2fc_rport *tgt,
struct fcoe_port *port,
struct fc_rport_priv *rdata)
{
struct fc_rport *rport = rdata->rport;
struct bnx2fc_interface *interface = port->priv;
struct bnx2fc_hba *hba = interface->hba;
struct b577xx_doorbell_set_prod *sq_db = &tgt->sq_db;
struct b577xx_fcoe_rx_doorbell *rx_db = &tgt->rx_db;
tgt->rport = rport;
tgt->rdata = rdata;
tgt->port = port;
if (hba->num_ofld_sess >= BNX2FC_NUM_MAX_SESS) {
BNX2FC_TGT_DBG(tgt, "exceeded max sessions. logoff this tgt\n");
tgt->fcoe_conn_id = -1;
return -1;
}
tgt->fcoe_conn_id = bnx2fc_alloc_conn_id(hba, tgt);
if (tgt->fcoe_conn_id == -1)
return -1;
BNX2FC_TGT_DBG(tgt, "init_tgt - conn_id = 0x%x\n", tgt->fcoe_conn_id);
tgt->max_sqes = BNX2FC_SQ_WQES_MAX;
tgt->max_rqes = BNX2FC_RQ_WQES_MAX;
tgt->max_cqes = BNX2FC_CQ_WQES_MAX;
atomic_set(&tgt->free_sqes, BNX2FC_SQ_WQES_MAX);
/* Initialize the toggle bit */
tgt->sq_curr_toggle_bit = 1;
tgt->cq_curr_toggle_bit = 1;
tgt->sq_prod_idx = 0;
tgt->cq_cons_idx = 0;
tgt->rq_prod_idx = 0x8000;
tgt->rq_cons_idx = 0;
atomic_set(&tgt->num_active_ios, 0);
tgt->retry_delay_timestamp = 0;
if (rdata->flags & FC_RP_FLAGS_RETRY &&
rdata->ids.roles & FC_RPORT_ROLE_FCP_TARGET &&
!(rdata->ids.roles & FC_RPORT_ROLE_FCP_INITIATOR)) {
tgt->dev_type = TYPE_TAPE;
tgt->io_timeout = 0; /* use default ULP timeout */
} else {
tgt->dev_type = TYPE_DISK;
tgt->io_timeout = BNX2FC_IO_TIMEOUT;
}
/* initialize sq doorbell */
sq_db->header.header = B577XX_DOORBELL_HDR_DB_TYPE;
sq_db->header.header |= B577XX_FCOE_CONNECTION_TYPE <<
B577XX_DOORBELL_HDR_CONN_TYPE_SHIFT;
/* initialize rx doorbell */
rx_db->hdr.header = ((0x1 << B577XX_DOORBELL_HDR_RX_SHIFT) |
(0x1 << B577XX_DOORBELL_HDR_DB_TYPE_SHIFT) |
(B577XX_FCOE_CONNECTION_TYPE <<
B577XX_DOORBELL_HDR_CONN_TYPE_SHIFT));
rx_db->params = (0x2 << B577XX_FCOE_RX_DOORBELL_NEGATIVE_ARM_SHIFT) |
(0x3 << B577XX_FCOE_RX_DOORBELL_OPCODE_SHIFT);
spin_lock_init(&tgt->tgt_lock);
spin_lock_init(&tgt->cq_lock);
/* Initialize active_cmd_queue list */
INIT_LIST_HEAD(&tgt->active_cmd_queue);
/* Initialize IO retire queue */
INIT_LIST_HEAD(&tgt->io_retire_queue);
INIT_LIST_HEAD(&tgt->els_queue);
/* Initialize active_tm_queue list */
INIT_LIST_HEAD(&tgt->active_tm_queue);
init_waitqueue_head(&tgt->ofld_wait);
init_waitqueue_head(&tgt->upld_wait);
return 0;
}
/**
* This event_callback is called after successful completion of libfc
* initiated target login. bnx2fc can proceed with initiating the session
* establishment.
*/
void bnx2fc_rport_event_handler(struct fc_lport *lport,
struct fc_rport_priv *rdata,
enum fc_rport_event event)
{
struct fcoe_port *port = lport_priv(lport);
struct bnx2fc_interface *interface = port->priv;
struct bnx2fc_hba *hba = interface->hba;
struct fc_rport *rport = rdata->rport;
struct fc_rport_libfc_priv *rp;
struct bnx2fc_rport *tgt;
u32 port_id;
BNX2FC_HBA_DBG(lport, "rport_event_hdlr: event = %d, port_id = 0x%x\n",
event, rdata->ids.port_id);
switch (event) {
case RPORT_EV_READY:
if (!rport) {
printk(KERN_ERR PFX "rport is NULL: ERROR!\n");
break;
}
rp = rport->dd_data;
if (rport->port_id == FC_FID_DIR_SERV) {
/*
* bnx2fc_rport structure doesn't exist for
* directory server.
* We should not come here, as lport will
* take care of fabric login
*/
printk(KERN_ERR PFX "%x - rport_event_handler ERROR\n",
rdata->ids.port_id);
break;
}
if (rdata->spp_type != FC_TYPE_FCP) {
BNX2FC_HBA_DBG(lport, "not FCP type target."
" not offloading\n");
break;
}
if (!(rdata->ids.roles & FC_RPORT_ROLE_FCP_TARGET)) {
BNX2FC_HBA_DBG(lport, "not FCP_TARGET"
" not offloading\n");
break;
}
/*
* Offlaod process is protected with hba mutex.
* Use the same mutex_lock for upload process too
*/
mutex_lock(&hba->hba_mutex);
tgt = (struct bnx2fc_rport *)&rp[1];
/* This can happen when ADISC finds the same target */
if (test_bit(BNX2FC_FLAG_ENABLED, &tgt->flags)) {
BNX2FC_TGT_DBG(tgt, "already offloaded\n");
mutex_unlock(&hba->hba_mutex);
return;
}
/*
* Offload the session. This is a blocking call, and will
* wait until the session is offloaded.
*/
bnx2fc_offload_session(port, tgt, rdata);
BNX2FC_TGT_DBG(tgt, "OFFLOAD num_ofld_sess = %d\n",
hba->num_ofld_sess);
if (test_bit(BNX2FC_FLAG_ENABLED, &tgt->flags)) {
/* Session is offloaded and enabled. */
BNX2FC_TGT_DBG(tgt, "sess offloaded\n");
/* This counter is protected with hba mutex */
hba->num_ofld_sess++;
set_bit(BNX2FC_FLAG_SESSION_READY, &tgt->flags);
} else {
/*
* Offload or enable would have failed.
* In offload/enable completion path, the
* rport would have already been removed
*/
BNX2FC_TGT_DBG(tgt, "Port is being logged off as "
"offloaded flag not set\n");
}
mutex_unlock(&hba->hba_mutex);
break;
case RPORT_EV_LOGO:
case RPORT_EV_FAILED:
case RPORT_EV_STOP:
port_id = rdata->ids.port_id;
if (port_id == FC_FID_DIR_SERV)
break;
if (!rport) {
printk(KERN_INFO PFX "%x - rport not created Yet!!\n",
port_id);
break;
}
rp = rport->dd_data;
mutex_lock(&hba->hba_mutex);
/*
* Perform session upload. Note that rdata->peers is already
* removed from disc->rports list before we get this event.
*/
tgt = (struct bnx2fc_rport *)&rp[1];
if (!(test_bit(BNX2FC_FLAG_ENABLED, &tgt->flags))) {
mutex_unlock(&hba->hba_mutex);
break;
}
clear_bit(BNX2FC_FLAG_SESSION_READY, &tgt->flags);
bnx2fc_upload_session(port, tgt);
hba->num_ofld_sess--;
BNX2FC_TGT_DBG(tgt, "UPLOAD num_ofld_sess = %d\n",
hba->num_ofld_sess);
/*
* Try to wake up the linkdown wait thread. If num_ofld_sess
* is 0, the waiting therad wakes up
*/
if ((hba->wait_for_link_down) &&
(hba->num_ofld_sess == 0)) {
wake_up_interruptible(&hba->shutdown_wait);
}
if (test_bit(BNX2FC_FLAG_EXPL_LOGO, &tgt->flags)) {
printk(KERN_ERR PFX "Relogin to the tgt\n");
mutex_lock(&lport->disc.disc_mutex);
lport->tt.rport_login(rdata);
mutex_unlock(&lport->disc.disc_mutex);
}
mutex_unlock(&hba->hba_mutex);
break;
case RPORT_EV_NONE:
break;
}
}
/**
* bnx2fc_tgt_lookup() - Lookup a bnx2fc_rport by port_id
*
* @port: fcoe_port struct to lookup the target port on
* @port_id: The remote port ID to look up
*/
struct bnx2fc_rport *bnx2fc_tgt_lookup(struct fcoe_port *port,
u32 port_id)
{
struct bnx2fc_interface *interface = port->priv;
struct bnx2fc_hba *hba = interface->hba;
struct bnx2fc_rport *tgt;
struct fc_rport_priv *rdata;
int i;
for (i = 0; i < BNX2FC_NUM_MAX_SESS; i++) {
tgt = hba->tgt_ofld_list[i];
if ((tgt) && (tgt->port == port)) {
rdata = tgt->rdata;
if (rdata->ids.port_id == port_id) {
if (rdata->rp_state != RPORT_ST_DELETE) {
BNX2FC_TGT_DBG(tgt, "rport "
"obtained\n");
return tgt;
} else {
BNX2FC_TGT_DBG(tgt, "rport 0x%x "
"is in DELETED state\n",
rdata->ids.port_id);
return NULL;
}
}
}
}
return NULL;
}
/**
* bnx2fc_alloc_conn_id - allocates FCOE Connection id
*
* @hba: pointer to adapter structure
* @tgt: pointer to bnx2fc_rport structure
*/
static u32 bnx2fc_alloc_conn_id(struct bnx2fc_hba *hba,
struct bnx2fc_rport *tgt)
{
u32 conn_id, next;
/* called with hba mutex held */
/*
* tgt_ofld_list access is synchronized using
* both hba mutex and hba lock. Atleast hba mutex or
* hba lock needs to be held for read access.
*/
spin_lock_bh(&hba->hba_lock);
next = hba->next_conn_id;
conn_id = hba->next_conn_id++;
if (hba->next_conn_id == BNX2FC_NUM_MAX_SESS)
hba->next_conn_id = 0;
while (hba->tgt_ofld_list[conn_id] != NULL) {
conn_id++;
if (conn_id == BNX2FC_NUM_MAX_SESS)
conn_id = 0;
if (conn_id == next) {
/* No free conn_ids are available */
spin_unlock_bh(&hba->hba_lock);
return -1;
}
}
hba->tgt_ofld_list[conn_id] = tgt;
tgt->fcoe_conn_id = conn_id;
spin_unlock_bh(&hba->hba_lock);
return conn_id;
}
static void bnx2fc_free_conn_id(struct bnx2fc_hba *hba, u32 conn_id)
{
/* called with hba mutex held */
spin_lock_bh(&hba->hba_lock);
hba->tgt_ofld_list[conn_id] = NULL;
spin_unlock_bh(&hba->hba_lock);
}
/**
*bnx2fc_alloc_session_resc - Allocate qp resources for the session
*
*/
static int bnx2fc_alloc_session_resc(struct bnx2fc_hba *hba,
struct bnx2fc_rport *tgt)
{
dma_addr_t page;
int num_pages;
u32 *pbl;
/* Allocate and map SQ */
tgt->sq_mem_size = tgt->max_sqes * BNX2FC_SQ_WQE_SIZE;
tgt->sq_mem_size = (tgt->sq_mem_size + (CNIC_PAGE_SIZE - 1)) &
CNIC_PAGE_MASK;
tgt->sq = dma_alloc_coherent(&hba->pcidev->dev, tgt->sq_mem_size,
&tgt->sq_dma, GFP_KERNEL);
if (!tgt->sq) {
printk(KERN_ERR PFX "unable to allocate SQ memory %d\n",
tgt->sq_mem_size);
goto mem_alloc_failure;
}
memset(tgt->sq, 0, tgt->sq_mem_size);
/* Allocate and map CQ */
tgt->cq_mem_size = tgt->max_cqes * BNX2FC_CQ_WQE_SIZE;
tgt->cq_mem_size = (tgt->cq_mem_size + (CNIC_PAGE_SIZE - 1)) &
CNIC_PAGE_MASK;
tgt->cq = dma_alloc_coherent(&hba->pcidev->dev, tgt->cq_mem_size,
&tgt->cq_dma, GFP_KERNEL);
if (!tgt->cq) {
printk(KERN_ERR PFX "unable to allocate CQ memory %d\n",
tgt->cq_mem_size);
goto mem_alloc_failure;
}
memset(tgt->cq, 0, tgt->cq_mem_size);
/* Allocate and map RQ and RQ PBL */
tgt->rq_mem_size = tgt->max_rqes * BNX2FC_RQ_WQE_SIZE;
tgt->rq_mem_size = (tgt->rq_mem_size + (CNIC_PAGE_SIZE - 1)) &
CNIC_PAGE_MASK;
tgt->rq = dma_alloc_coherent(&hba->pcidev->dev, tgt->rq_mem_size,
&tgt->rq_dma, GFP_KERNEL);
if (!tgt->rq) {
printk(KERN_ERR PFX "unable to allocate RQ memory %d\n",
tgt->rq_mem_size);
goto mem_alloc_failure;
}
memset(tgt->rq, 0, tgt->rq_mem_size);
tgt->rq_pbl_size = (tgt->rq_mem_size / CNIC_PAGE_SIZE) * sizeof(void *);
tgt->rq_pbl_size = (tgt->rq_pbl_size + (CNIC_PAGE_SIZE - 1)) &
CNIC_PAGE_MASK;
tgt->rq_pbl = dma_alloc_coherent(&hba->pcidev->dev, tgt->rq_pbl_size,
&tgt->rq_pbl_dma, GFP_KERNEL);
if (!tgt->rq_pbl) {
printk(KERN_ERR PFX "unable to allocate RQ PBL %d\n",
tgt->rq_pbl_size);
goto mem_alloc_failure;
}
memset(tgt->rq_pbl, 0, tgt->rq_pbl_size);
num_pages = tgt->rq_mem_size / CNIC_PAGE_SIZE;
page = tgt->rq_dma;
pbl = (u32 *)tgt->rq_pbl;
while (num_pages--) {
*pbl = (u32)page;
pbl++;
*pbl = (u32)((u64)page >> 32);
pbl++;
page += CNIC_PAGE_SIZE;
}
/* Allocate and map XFERQ */
tgt->xferq_mem_size = tgt->max_sqes * BNX2FC_XFERQ_WQE_SIZE;
tgt->xferq_mem_size = (tgt->xferq_mem_size + (CNIC_PAGE_SIZE - 1)) &
CNIC_PAGE_MASK;
tgt->xferq = dma_alloc_coherent(&hba->pcidev->dev, tgt->xferq_mem_size,
&tgt->xferq_dma, GFP_KERNEL);
if (!tgt->xferq) {
printk(KERN_ERR PFX "unable to allocate XFERQ %d\n",
tgt->xferq_mem_size);
goto mem_alloc_failure;
}
memset(tgt->xferq, 0, tgt->xferq_mem_size);
/* Allocate and map CONFQ & CONFQ PBL */
tgt->confq_mem_size = tgt->max_sqes * BNX2FC_CONFQ_WQE_SIZE;
tgt->confq_mem_size = (tgt->confq_mem_size + (CNIC_PAGE_SIZE - 1)) &
CNIC_PAGE_MASK;
tgt->confq = dma_alloc_coherent(&hba->pcidev->dev, tgt->confq_mem_size,
&tgt->confq_dma, GFP_KERNEL);
if (!tgt->confq) {
printk(KERN_ERR PFX "unable to allocate CONFQ %d\n",
tgt->confq_mem_size);
goto mem_alloc_failure;
}
memset(tgt->confq, 0, tgt->confq_mem_size);
tgt->confq_pbl_size =
(tgt->confq_mem_size / CNIC_PAGE_SIZE) * sizeof(void *);
tgt->confq_pbl_size =
(tgt->confq_pbl_size + (CNIC_PAGE_SIZE - 1)) & CNIC_PAGE_MASK;
tgt->confq_pbl = dma_alloc_coherent(&hba->pcidev->dev,
tgt->confq_pbl_size,
&tgt->confq_pbl_dma, GFP_KERNEL);
if (!tgt->confq_pbl) {
printk(KERN_ERR PFX "unable to allocate CONFQ PBL %d\n",
tgt->confq_pbl_size);
goto mem_alloc_failure;
}
memset(tgt->confq_pbl, 0, tgt->confq_pbl_size);
num_pages = tgt->confq_mem_size / CNIC_PAGE_SIZE;
page = tgt->confq_dma;
pbl = (u32 *)tgt->confq_pbl;
while (num_pages--) {
*pbl = (u32)page;
pbl++;
*pbl = (u32)((u64)page >> 32);
pbl++;
page += CNIC_PAGE_SIZE;
}
/* Allocate and map ConnDB */
tgt->conn_db_mem_size = sizeof(struct fcoe_conn_db);
tgt->conn_db = dma_alloc_coherent(&hba->pcidev->dev,
tgt->conn_db_mem_size,
&tgt->conn_db_dma, GFP_KERNEL);
if (!tgt->conn_db) {
printk(KERN_ERR PFX "unable to allocate conn_db %d\n",
tgt->conn_db_mem_size);
goto mem_alloc_failure;
}
memset(tgt->conn_db, 0, tgt->conn_db_mem_size);
/* Allocate and map LCQ */
tgt->lcq_mem_size = (tgt->max_sqes + 8) * BNX2FC_SQ_WQE_SIZE;
tgt->lcq_mem_size = (tgt->lcq_mem_size + (CNIC_PAGE_SIZE - 1)) &
CNIC_PAGE_MASK;
tgt->lcq = dma_alloc_coherent(&hba->pcidev->dev, tgt->lcq_mem_size,
&tgt->lcq_dma, GFP_KERNEL);
if (!tgt->lcq) {
printk(KERN_ERR PFX "unable to allocate lcq %d\n",
tgt->lcq_mem_size);
goto mem_alloc_failure;
}
memset(tgt->lcq, 0, tgt->lcq_mem_size);
tgt->conn_db->rq_prod = 0x8000;
return 0;
mem_alloc_failure:
return -ENOMEM;
}
/**
* bnx2i_free_session_resc - free qp resources for the session
*
* @hba: adapter structure pointer
* @tgt: bnx2fc_rport structure pointer
*
* Free QP resources - SQ/RQ/CQ/XFERQ memory and PBL
*/
static void bnx2fc_free_session_resc(struct bnx2fc_hba *hba,
struct bnx2fc_rport *tgt)
{
void __iomem *ctx_base_ptr;
BNX2FC_TGT_DBG(tgt, "Freeing up session resources\n");
spin_lock_bh(&tgt->cq_lock);
ctx_base_ptr = tgt->ctx_base;
tgt->ctx_base = NULL;
/* Free LCQ */
if (tgt->lcq) {
dma_free_coherent(&hba->pcidev->dev, tgt->lcq_mem_size,
tgt->lcq, tgt->lcq_dma);
tgt->lcq = NULL;
}
/* Free connDB */
if (tgt->conn_db) {
dma_free_coherent(&hba->pcidev->dev, tgt->conn_db_mem_size,
tgt->conn_db, tgt->conn_db_dma);
tgt->conn_db = NULL;
}
/* Free confq and confq pbl */
if (tgt->confq_pbl) {
dma_free_coherent(&hba->pcidev->dev, tgt->confq_pbl_size,
tgt->confq_pbl, tgt->confq_pbl_dma);
tgt->confq_pbl = NULL;
}
if (tgt->confq) {
dma_free_coherent(&hba->pcidev->dev, tgt->confq_mem_size,
tgt->confq, tgt->confq_dma);
tgt->confq = NULL;
}
/* Free XFERQ */
if (tgt->xferq) {
dma_free_coherent(&hba->pcidev->dev, tgt->xferq_mem_size,
tgt->xferq, tgt->xferq_dma);
tgt->xferq = NULL;
}
/* Free RQ PBL and RQ */
if (tgt->rq_pbl) {
dma_free_coherent(&hba->pcidev->dev, tgt->rq_pbl_size,
tgt->rq_pbl, tgt->rq_pbl_dma);
tgt->rq_pbl = NULL;
}
if (tgt->rq) {
dma_free_coherent(&hba->pcidev->dev, tgt->rq_mem_size,
tgt->rq, tgt->rq_dma);
tgt->rq = NULL;
}
/* Free CQ */
if (tgt->cq) {
dma_free_coherent(&hba->pcidev->dev, tgt->cq_mem_size,
tgt->cq, tgt->cq_dma);
tgt->cq = NULL;
}
/* Free SQ */
if (tgt->sq) {
dma_free_coherent(&hba->pcidev->dev, tgt->sq_mem_size,
tgt->sq, tgt->sq_dma);
tgt->sq = NULL;
}
spin_unlock_bh(&tgt->cq_lock);
if (ctx_base_ptr)
iounmap(ctx_base_ptr);
}
| gpl-2.0 |
youtube/cobalt | third_party/web_platform_tests/referrer-policy/origin-only/meta-referrer/cross-origin/http-https/xhr-request/generic.swap-origin-redirect.http.html | 1973 | <!DOCTYPE html>
<!-- DO NOT EDIT! Generated by referrer-policy/generic/tools/generate.py using referrer-policy/generic/template/test.release.html.template. -->
<html>
<head>
<title>Referrer-Policy: Referrer Policy is set to 'origin-only'</title>
<meta name="description" content="Check that all subresources in all casses get only the origin portion of the referrer URL.">
<meta name="referrer" content="origin">
<link rel="author" title="Kristijan Burnik" href="[email protected]">
<link rel="help" href="https://w3c.github.io/webappsec/specs/referrer-policy/#referrer-policy-state-origin">
<meta name="assert" content="The referrer URL is origin when a
document served over http requires an https
sub-resource via xhr-request using the meta-referrer
delivery method with swap-origin-redirect and when
the target request is cross-origin.">
<script src="/resources/testharness.js"></script>
<script src="/resources/testharnessreport.js"></script>
<!-- TODO(kristijanburnik): Minify and merge both: -->
<script src="/referrer-policy/generic/common.js"></script>
<script src="/referrer-policy/generic/referrer-policy-test-case.js?pipe=sub"></script>
</head>
<body>
<script>
ReferrerPolicyTestCase(
{
"referrer_policy": "origin",
"delivery_method": "meta-referrer",
"redirection": "swap-origin-redirect",
"origin": "cross-origin",
"source_protocol": "http",
"target_protocol": "https",
"subresource": "xhr-request",
"subresource_path": "/referrer-policy/generic/subresource/xhr.py",
"referrer_url": "origin"
},
document.querySelector("meta[name=assert]").content,
new SanityChecker()
).start();
</script>
<div id="log"></div>
</body>
</html>
| bsd-3-clause |
youtube/cobalt | third_party/web_platform_tests/referrer-policy/unsafe-url/meta-csp/cross-origin/http-https/iframe-tag/generic.swap-origin-redirect.http.html | 1998 | <!DOCTYPE html>
<!-- DO NOT EDIT! Generated by referrer-policy/generic/tools/generate.py using referrer-policy/generic/template/test.release.html.template. -->
<html>
<head>
<title>Referrer-Policy: Referrer Policy is set to 'unsafe-url'</title>
<meta name="description" content="Check that all sub-resources get the stripped referrer URL.">
<meta http-equiv="Content-Security-Policy" content="referrer unsafe-url">
<link rel="author" title="Kristijan Burnik" href="[email protected]">
<link rel="help" href="https://w3c.github.io/webappsec/specs/referrer-policy/#referrer-policy-state-unsafe-url">
<meta name="assert" content="The referrer URL is stripped-referrer when a
document served over http requires an https
sub-resource via iframe-tag using the meta-csp
delivery method with swap-origin-redirect and when
the target request is cross-origin.">
<script src="/resources/testharness.js"></script>
<script src="/resources/testharnessreport.js"></script>
<!-- TODO(kristijanburnik): Minify and merge both: -->
<script src="/referrer-policy/generic/common.js"></script>
<script src="/referrer-policy/generic/referrer-policy-test-case.js?pipe=sub"></script>
</head>
<body>
<script>
ReferrerPolicyTestCase(
{
"referrer_policy": "unsafe-url",
"delivery_method": "meta-csp",
"redirection": "swap-origin-redirect",
"origin": "cross-origin",
"source_protocol": "http",
"target_protocol": "https",
"subresource": "iframe-tag",
"subresource_path": "/referrer-policy/generic/subresource/document.py",
"referrer_url": "stripped-referrer"
},
document.querySelector("meta[name=assert]").content,
new SanityChecker()
).start();
</script>
<div id="log"></div>
</body>
</html>
| bsd-3-clause |
nbarbettini/corefx | src/System.Net.Security/tests/Scripts/Unix/setup-kdc.sh | 8851 | #!/usr/bin/env bash
OS=`cat /etc/os-release | grep "^ID=" | sed 's/ID=//g' | sed 's/["]//g' | awk '{print $1}'`
echo -e "Operating System: ${OS}\n"
realm="TEST.COREFX.NET"
domain="TEST"
principal1="TESTHOST/testfqdn.test.corefx.net"
principal2="TESTHTTP/localhost"
krb_user="krb_user"
krb_password="password"
ntlm_user="ntlm_user"
ntlm_password="ntlm_password"
kadmin="kadmin.local"
krb5kdc="krb5kdc"
kdb5_util="kdb5_util"
krb_conf="krb5.conf"
krb_conf_location="/etc/krb5.conf"
keytabfile="/etc/krb5.keytab"
# NTLM credentials file
ntlm_user_file="/var/tmp/ntlm_user_file"
PROGNAME=$(basename $0)
usage()
{
echo "This script must be run with super-user privileges."
echo "Usage: ${PROGNAME} [-h|--help] [-y|--yes] [-u|--uninstall]";
}
# Cleanup config files and uninstall KDC
clean_up()
{
echo "Stopping KDC.."
if pgrep krb5kdc 2> /dev/null; then pkill krb5kdc 2> /dev/null ; fi
case ${OS} in
"ubuntu" | "debian")
kdc_conf_location="/etc/krb5kdc/kdc.conf"
dpkg -s krb5-kdc >/dev/null 2>&1
if [ $? -eq 0 ]; then
echo "Uninstalling krb5-kdc"
apt-get -y purge krb5-kdc
fi
;;
"centos" | "rhel" | "fedora")
kdc_conf_location="/var/kerberos/krb5kdc/kdc.conf"
yum list installed krb5-server >/dev/null 2>&1
if [ $? -eq 0 ]; then
echo "Uninstalling krb5-server"
yum -y remove krb5-server
fi
;;
"opensuse")
kdc_conf_location="/var/lib/kerberos/krb5kdc/kdc.conf"
zypper search --installed-only krb5-server >/dev/null 2>&1
if [ $? -eq 0 ]; then
echo "Uninstalling krb5-server"
zypper --non-interactive remove krb5-server >/dev/null 2>&1
fi
;;
*)
echo "This is an unsupported operating system"
exit 1
;;
esac
echo "Removing config files"
if [ -f ${krb_conf_location} ]; then
rm -f ${krb_conf_location}
fi
if [ -f ${kdc_conf_location} ]; then
rm -f ${kdc_conf_location}
fi
echo "Removing KDC database"
rm -f ${database_files}
if [ -f ${keytabfile} ]; then
rm -f ${keytabfile}
fi
echo "Removing NTLM credentials file"
if [ -f ${ntlm_user_file} ]; then
rm -f ${ntlm_user_file}
fi
echo "Cleanup completed"
}
error_exit()
{
echo "${1:-"Unknown Error"}"
echo "Aborting"
clean_up
exit 1
}
# Common function across linux distros to configure KDC post installation
configure_kdc()
{
echo "Stopping KDC.."
if pgrep krb5kdc 2> /dev/null; then pkill krb5kdc ; fi
# Remove database files if exist
rm -f ${database_files}
add_principal_cmd="add_principal -pw ${krb_password}"
# Create/copy krb5.conf and kdc.conf
echo "Copying krb5.conf and kdc.conf.."
cp ${krb_conf} ${krb_conf_location} || \
error_exit "Cannot copy ${krb_conf} to ${krb_conf_location}"
cp ${kdc_conf} ${kdc_conf_location} || \
error_exit "Cannot copy ${kdc_conf} to ${kdc_conf_location}"
echo "Creating KDC database for realm ${realm}.."
${kdb5_util} create -r ${realm} -P ${krb_password} -s || \
error_exit "Cannot create KDC database for realm ${realm}"
echo "Adding principal ${principal1}.."
${kadmin} -q "${add_principal_cmd} ${principal1}@${realm}" || \
error_exit "Cannot add ${principal1}"
echo "Adding principal ${principal2}.."
${kadmin} -q "${add_principal_cmd} ${principal2}@${realm}" || \
error_exit "Cannot add ${principal2}"
echo "Adding user ${krb_user}.."
${kadmin} -q "${add_principal_cmd} ${krb_user}@${realm}" || \
error_exit "Cannot add ${krb_user}"
echo "Exporting keytab for ${principal1}"
${kadmin} -q "ktadd -norandkey ${principal1}@${realm}" || \
error_exit "Cannot export kytab for ${principal1}"
echo "Exporting keytab for ${principal2}"
${kadmin} -q "ktadd -norandkey ${principal2}@${realm}" || \
error_exit "Cannot export kytab for ${principal2}"
echo "Exporting keytab for ${krb_user}"
${kadmin} -q "ktadd -norandkey ${krb_user}@${realm}" || \
error_exit "Cannot export kytab for ${krb_user}"
}
# check the invoker of this script
if [ $EUID -ne 0 ]; then
usage
exit 1
fi
# Parse command-line arguments
TEMP=`getopt -o p:hyu --long password:,help,yes,uninstall -n 'test.sh' -- "$@"`
[ $? -eq 0 ] || {
usage
exit 1
}
eval set -- "$TEMP"
uninstall=0
force=0
while true; do
case $1 in
-h|--help) usage; exit 0;;
-y|--yes) force=1; shift ;;
-u|--uninstall) uninstall=1; shift;;
-p|--password) shift; krb_password=$1; shift;;
--) shift; break;;
*) usage; exit 1;;
esac
done
# Uninstallation
if [ $uninstall -eq 1 ]; then
if [ $force -eq 0 ]; then
echo "This will uninstall KDC from your machine and cleanup the related config files."
read -p "Do you want to continue? ([Y]es/[N]o)? " choice
case $(echo $choice | tr '[A-Z]' '[a-z]') in
y|yes) clean_up;;
*) echo "Skipping uninstallation";;
esac
else
clean_up
fi
exit 0
fi
# Installation
if [ $force -eq 0 ]; then
read -p "This will install KDC on your machine and create KDC principals. Do you want to continue? ([Y]es/[N]o)? " choice
case $(echo $choice | tr '[A-Z]' '[a-z]') in
y|yes) ;;
*) echo "Skipping installation"; exit 0;;
esac
fi
case ${OS} in
"ubuntu" | "debian")
kdc_conf="kdc.conf.ubuntu"
kdc_conf_location="/etc/krb5kdc/kdc.conf"
database_files="/var/lib/krb5kdc/principal*"
dpkg -s krb5-kdc >/dev/null 2>&1
if [ $? -ne 0 ]; then
echo "Installing krb5-kdc.."
export DEBIAN_FRONTEND=noninteractive
apt-get -y install krb5-kdc krb5-admin-server
if [ $? -ne 0 ]; then
echo "Error occurred during installation, aborting"
exit 1
fi
else
echo "krb5-kdc already installed.."
exit 2
fi
configure_kdc
echo "Starting KDC.."
${krb5kdc}
;;
"centos" | "rhel" | "fedora" )
kdc_conf="kdc.conf.centos"
kdc_conf_location="/var/kerberos/krb5kdc/kdc.conf"
database_files="/var/kerberos/krb5kdc/principal*"
yum list installed krb5-server >/dev/null 2>&1
if [ $? -ne 0 ]; then
echo "Installing krb5-server.."
yum -y install krb5-server krb5-libs krb5-workstation
if [ $? -ne 0 ]; then
echo "Error occurred during installation, aborting"
exit 1
fi
else
echo "krb5-server already installed.."
exit 2
fi
configure_kdc
echo "Starting KDC.."
systemctl start krb5kdc.service
systemctl enable krb5kdc.service
;;
"opensuse")
# the following is a workaround for opensuse
# details at https://groups.google.com/forum/#!topic/comp.protocols.kerberos/3itzZQ4fETA
# and http://lists.opensuse.org/opensuse-factory/2013-10/msg00099.html
export KRB5CCNAME=$PWD
krb5kdc="/usr/lib/mit/sbin/krb5kdc"
kadmin="/usr/lib/mit/sbin/kadmin.local"
kdb5_util="/usr/lib/mit/sbin/kdb5_util"
kdc_conf="kdc.conf.opensuse"
kdc_conf_location="/var/lib/kerberos/krb5kdc/kdc.conf"
database_files="/var/lib/kerberos/krb5kdc/principal*"
zypper search --installed-only krb5-mini >/dev/null 2>&1
if [ $? -eq 0 ]; then
echo "removing krb5-mini which conflicts with krb5-server and krb5-devel"
zypper --non-interactive remove krb5-mini
fi
zypper search --installed-only krb5-server >/dev/null 2>&1
if [ $? -ne 0 ]; then
echo "Installing krb5-server.."
zypper --non-interactive install krb5-server krb5-client krb5-devel
if [ $? -ne 0 ]; then
echo "Error occurred during installation, aborting"
exit 1
fi
else
echo "krb5-server already installed.."
exit 2
fi
configure_kdc
echo "Starting KDC..${krb5kdc}"
${krb5kdc}
;;
*)
echo "This is an unsupported operating system"
exit 1
;;
esac
# Create NTLM credentials file
grep -ir gssntlmssp.so /etc/gss/mech.d > /dev/null 2>&1
if [ $? -eq 0 ]; then
echo "$domain:$ntlm_user:$ntlm_password" > $ntlm_user_file
echo "$realm:$krb_user:$krb_password" >> $ntlm_user_file
chmod +r $ntlm_user_file
fi
chmod +r ${keytabfile}
| mit |
lxl1140989/sdk-for-tb | uboot/u-boot-dm6291/arch/arm/include/asm/dma-mapping.h | 1493 | /*
* (C) Copyright 2007
* Stelian Pop <[email protected]>
* Lead Tech Design <www.leadtechdesign.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __ASM_ARM_DMA_MAPPING_H
#define __ASM_ARM_DMA_MAPPING_H
enum dma_data_direction {
DMA_BIDIRECTIONAL = 0,
DMA_TO_DEVICE = 1,
DMA_FROM_DEVICE = 2,
};
static void *dma_alloc_coherent(size_t len, unsigned long *handle)
{
*handle = (unsigned long)malloc(len);
return (void *)*handle;
}
static inline unsigned long dma_map_single(volatile void *vaddr, size_t len,
enum dma_data_direction dir)
{
return (unsigned long)vaddr;
}
static inline void dma_unmap_single(volatile void *vaddr, size_t len,
unsigned long paddr)
{
}
#endif /* __ASM_ARM_DMA_MAPPING_H */
| gpl-2.0 |
flybayer/next.js | test/integration/scss-fixtures/webpack-error/pages/index.js | 101 | export default function Home() {
return <div className="red-text">This text should be red.</div>
}
| mit |
pauldijou/outdated | test/basic/jspm_packages/npm/[email protected]/core-js/math/sign.js | 97 | /* */
module.exports = { "default": require("core-js/library/fn/math/sign"), __esModule: true }; | apache-2.0 |
jtrag/homebrew | Library/Formula/avce00.rb | 333 | require 'formula'
class Avce00 < Formula
homepage 'http://avce00.maptools.org/avce00/index.html'
url 'http://avce00.maptools.org/dl/avce00-2.0.0.tar.gz'
sha1 '2948d9b1cfb6e80faf2e9b90c86fd224617efd75'
def install
system "make", "CC=#{ENV.cc}"
bin.install "avcimport", "avcexport", "avcdelete", "avctest"
end
end
| bsd-2-clause |
tya/kubernetes | plugin/pkg/scheduler/api/validation/validation_test.go | 1732 | /*
Copyright 2015 The Kubernetes Authors All rights reserved.
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
package validation
import (
"testing"
"github.com/GoogleCloudPlatform/kubernetes/plugin/pkg/scheduler/api"
)
func TestValidatePriorityWithNoWeight(t *testing.T) {
policy := api.Policy{Priorities: []api.PriorityPolicy{{Name: "NoWeightPriority"}}}
if ValidatePolicy(policy) == nil {
t.Errorf("Expected error about priority weight not being positive")
}
}
func TestValidatePriorityWithZeroWeight(t *testing.T) {
policy := api.Policy{Priorities: []api.PriorityPolicy{{Name: "NoWeightPriority", Weight: 0}}}
if ValidatePolicy(policy) == nil {
t.Errorf("Expected error about priority weight not being positive")
}
}
func TestValidatePriorityWithNonZeroWeight(t *testing.T) {
policy := api.Policy{Priorities: []api.PriorityPolicy{{Name: "WeightPriority", Weight: 2}}}
errs := ValidatePolicy(policy)
if errs != nil {
t.Errorf("Unexpected errors %v", errs)
}
}
func TestValidatePriorityWithNegativeWeight(t *testing.T) {
policy := api.Policy{Priorities: []api.PriorityPolicy{{Name: "WeightPriority", Weight: -2}}}
if ValidatePolicy(policy) == nil {
t.Errorf("Expected error about priority weight not being positive")
}
}
| apache-2.0 |
CSE3320/kernel-code | linux-5.8/drivers/ipack/devices/ipoctal.c | 18979 | // SPDX-License-Identifier: GPL-2.0-only
/**
* ipoctal.c
*
* driver for the GE IP-OCTAL boards
*
* Copyright (C) 2009-2012 CERN (www.cern.ch)
* Author: Nicolas Serafini, EIC2 SA
* Author: Samuel Iglesias Gonsalvez <[email protected]>
*/
#include <linux/device.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/sched.h>
#include <linux/tty.h>
#include <linux/serial.h>
#include <linux/tty_flip.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/ipack.h>
#include "ipoctal.h"
#include "scc2698.h"
#define IP_OCTAL_ID_SPACE_VECTOR 0x41
#define IP_OCTAL_NB_BLOCKS 4
static const struct tty_operations ipoctal_fops;
struct ipoctal_channel {
struct ipoctal_stats stats;
unsigned int nb_bytes;
wait_queue_head_t queue;
spinlock_t lock;
unsigned int pointer_read;
unsigned int pointer_write;
struct tty_port tty_port;
union scc2698_channel __iomem *regs;
union scc2698_block __iomem *block_regs;
unsigned int board_id;
u8 isr_rx_rdy_mask;
u8 isr_tx_rdy_mask;
unsigned int rx_enable;
};
struct ipoctal {
struct ipack_device *dev;
unsigned int board_id;
struct ipoctal_channel channel[NR_CHANNELS];
struct tty_driver *tty_drv;
u8 __iomem *mem8_space;
u8 __iomem *int_space;
};
static inline struct ipoctal *chan_to_ipoctal(struct ipoctal_channel *chan,
unsigned int index)
{
return container_of(chan, struct ipoctal, channel[index]);
}
static void ipoctal_reset_channel(struct ipoctal_channel *channel)
{
iowrite8(CR_DISABLE_RX | CR_DISABLE_TX, &channel->regs->w.cr);
channel->rx_enable = 0;
iowrite8(CR_CMD_RESET_RX, &channel->regs->w.cr);
iowrite8(CR_CMD_RESET_TX, &channel->regs->w.cr);
iowrite8(CR_CMD_RESET_ERR_STATUS, &channel->regs->w.cr);
iowrite8(CR_CMD_RESET_MR, &channel->regs->w.cr);
}
static int ipoctal_port_activate(struct tty_port *port, struct tty_struct *tty)
{
struct ipoctal_channel *channel;
channel = dev_get_drvdata(tty->dev);
/*
* Enable RX. TX will be enabled when
* there is something to send
*/
iowrite8(CR_ENABLE_RX, &channel->regs->w.cr);
channel->rx_enable = 1;
return 0;
}
static int ipoctal_open(struct tty_struct *tty, struct file *file)
{
struct ipoctal_channel *channel = dev_get_drvdata(tty->dev);
struct ipoctal *ipoctal = chan_to_ipoctal(channel, tty->index);
int err;
tty->driver_data = channel;
if (!ipack_get_carrier(ipoctal->dev))
return -EBUSY;
err = tty_port_open(&channel->tty_port, tty, file);
if (err)
ipack_put_carrier(ipoctal->dev);
return err;
}
static void ipoctal_reset_stats(struct ipoctal_stats *stats)
{
stats->tx = 0;
stats->rx = 0;
stats->rcv_break = 0;
stats->framing_err = 0;
stats->overrun_err = 0;
stats->parity_err = 0;
}
static void ipoctal_free_channel(struct ipoctal_channel *channel)
{
ipoctal_reset_stats(&channel->stats);
channel->pointer_read = 0;
channel->pointer_write = 0;
channel->nb_bytes = 0;
}
static void ipoctal_close(struct tty_struct *tty, struct file *filp)
{
struct ipoctal_channel *channel = tty->driver_data;
tty_port_close(&channel->tty_port, tty, filp);
ipoctal_free_channel(channel);
}
static int ipoctal_get_icount(struct tty_struct *tty,
struct serial_icounter_struct *icount)
{
struct ipoctal_channel *channel = tty->driver_data;
icount->cts = 0;
icount->dsr = 0;
icount->rng = 0;
icount->dcd = 0;
icount->rx = channel->stats.rx;
icount->tx = channel->stats.tx;
icount->frame = channel->stats.framing_err;
icount->parity = channel->stats.parity_err;
icount->brk = channel->stats.rcv_break;
return 0;
}
static void ipoctal_irq_rx(struct ipoctal_channel *channel, u8 sr)
{
struct tty_port *port = &channel->tty_port;
unsigned char value;
unsigned char flag;
u8 isr;
do {
value = ioread8(&channel->regs->r.rhr);
flag = TTY_NORMAL;
/* Error: count statistics */
if (sr & SR_ERROR) {
iowrite8(CR_CMD_RESET_ERR_STATUS, &channel->regs->w.cr);
if (sr & SR_OVERRUN_ERROR) {
channel->stats.overrun_err++;
/* Overrun doesn't affect the current character*/
tty_insert_flip_char(port, 0, TTY_OVERRUN);
}
if (sr & SR_PARITY_ERROR) {
channel->stats.parity_err++;
flag = TTY_PARITY;
}
if (sr & SR_FRAMING_ERROR) {
channel->stats.framing_err++;
flag = TTY_FRAME;
}
if (sr & SR_RECEIVED_BREAK) {
channel->stats.rcv_break++;
flag = TTY_BREAK;
}
}
tty_insert_flip_char(port, value, flag);
/* Check if there are more characters in RX FIFO
* If there are more, the isr register for this channel
* has enabled the RxRDY|FFULL bit.
*/
isr = ioread8(&channel->block_regs->r.isr);
sr = ioread8(&channel->regs->r.sr);
} while (isr & channel->isr_rx_rdy_mask);
tty_flip_buffer_push(port);
}
static void ipoctal_irq_tx(struct ipoctal_channel *channel)
{
unsigned char value;
unsigned int *pointer_write = &channel->pointer_write;
if (channel->nb_bytes == 0)
return;
spin_lock(&channel->lock);
value = channel->tty_port.xmit_buf[*pointer_write];
iowrite8(value, &channel->regs->w.thr);
channel->stats.tx++;
(*pointer_write)++;
*pointer_write = *pointer_write % PAGE_SIZE;
channel->nb_bytes--;
spin_unlock(&channel->lock);
}
static void ipoctal_irq_channel(struct ipoctal_channel *channel)
{
u8 isr, sr;
/* The HW is organized in pair of channels. See which register we need
* to read from */
isr = ioread8(&channel->block_regs->r.isr);
sr = ioread8(&channel->regs->r.sr);
if (isr & (IMR_DELTA_BREAK_A | IMR_DELTA_BREAK_B))
iowrite8(CR_CMD_RESET_BREAK_CHANGE, &channel->regs->w.cr);
if ((sr & SR_TX_EMPTY) && (channel->nb_bytes == 0)) {
iowrite8(CR_DISABLE_TX, &channel->regs->w.cr);
/* In case of RS-485, change from TX to RX when finishing TX.
* Half-duplex. */
if (channel->board_id == IPACK1_DEVICE_ID_SBS_OCTAL_485) {
iowrite8(CR_CMD_NEGATE_RTSN, &channel->regs->w.cr);
iowrite8(CR_ENABLE_RX, &channel->regs->w.cr);
channel->rx_enable = 1;
}
}
/* RX data */
if ((isr & channel->isr_rx_rdy_mask) && (sr & SR_RX_READY))
ipoctal_irq_rx(channel, sr);
/* TX of each character */
if ((isr & channel->isr_tx_rdy_mask) && (sr & SR_TX_READY))
ipoctal_irq_tx(channel);
}
static irqreturn_t ipoctal_irq_handler(void *arg)
{
unsigned int i;
struct ipoctal *ipoctal = (struct ipoctal *) arg;
/* Clear the IPack device interrupt */
readw(ipoctal->int_space + ACK_INT_REQ0);
readw(ipoctal->int_space + ACK_INT_REQ1);
/* Check all channels */
for (i = 0; i < NR_CHANNELS; i++)
ipoctal_irq_channel(&ipoctal->channel[i]);
return IRQ_HANDLED;
}
static const struct tty_port_operations ipoctal_tty_port_ops = {
.dtr_rts = NULL,
.activate = ipoctal_port_activate,
};
static int ipoctal_inst_slot(struct ipoctal *ipoctal, unsigned int bus_nr,
unsigned int slot)
{
int res;
int i;
struct tty_driver *tty;
char name[20];
struct ipoctal_channel *channel;
struct ipack_region *region;
void __iomem *addr;
union scc2698_channel __iomem *chan_regs;
union scc2698_block __iomem *block_regs;
ipoctal->board_id = ipoctal->dev->id_device;
region = &ipoctal->dev->region[IPACK_IO_SPACE];
addr = devm_ioremap(&ipoctal->dev->dev,
region->start, region->size);
if (!addr) {
dev_err(&ipoctal->dev->dev,
"Unable to map slot [%d:%d] IO space!\n",
bus_nr, slot);
return -EADDRNOTAVAIL;
}
/* Save the virtual address to access the registers easily */
chan_regs =
(union scc2698_channel __iomem *) addr;
block_regs =
(union scc2698_block __iomem *) addr;
region = &ipoctal->dev->region[IPACK_INT_SPACE];
ipoctal->int_space =
devm_ioremap(&ipoctal->dev->dev,
region->start, region->size);
if (!ipoctal->int_space) {
dev_err(&ipoctal->dev->dev,
"Unable to map slot [%d:%d] INT space!\n",
bus_nr, slot);
return -EADDRNOTAVAIL;
}
region = &ipoctal->dev->region[IPACK_MEM8_SPACE];
ipoctal->mem8_space =
devm_ioremap(&ipoctal->dev->dev,
region->start, 0x8000);
if (!ipoctal->mem8_space) {
dev_err(&ipoctal->dev->dev,
"Unable to map slot [%d:%d] MEM8 space!\n",
bus_nr, slot);
return -EADDRNOTAVAIL;
}
/* Disable RX and TX before touching anything */
for (i = 0; i < NR_CHANNELS ; i++) {
struct ipoctal_channel *channel = &ipoctal->channel[i];
channel->regs = chan_regs + i;
channel->block_regs = block_regs + (i >> 1);
channel->board_id = ipoctal->board_id;
if (i & 1) {
channel->isr_tx_rdy_mask = ISR_TxRDY_B;
channel->isr_rx_rdy_mask = ISR_RxRDY_FFULL_B;
} else {
channel->isr_tx_rdy_mask = ISR_TxRDY_A;
channel->isr_rx_rdy_mask = ISR_RxRDY_FFULL_A;
}
ipoctal_reset_channel(channel);
iowrite8(MR1_CHRL_8_BITS | MR1_ERROR_CHAR | MR1_RxINT_RxRDY,
&channel->regs->w.mr); /* mr1 */
iowrite8(0, &channel->regs->w.mr); /* mr2 */
iowrite8(TX_CLK_9600 | RX_CLK_9600, &channel->regs->w.csr);
}
for (i = 0; i < IP_OCTAL_NB_BLOCKS; i++) {
iowrite8(ACR_BRG_SET2, &block_regs[i].w.acr);
iowrite8(OPCR_MPP_OUTPUT | OPCR_MPOa_RTSN | OPCR_MPOb_RTSN,
&block_regs[i].w.opcr);
iowrite8(IMR_TxRDY_A | IMR_RxRDY_FFULL_A | IMR_DELTA_BREAK_A |
IMR_TxRDY_B | IMR_RxRDY_FFULL_B | IMR_DELTA_BREAK_B,
&block_regs[i].w.imr);
}
/* Dummy write */
iowrite8(1, ipoctal->mem8_space + 1);
/* Register the TTY device */
/* Each IP-OCTAL channel is a TTY port */
tty = alloc_tty_driver(NR_CHANNELS);
if (!tty)
return -ENOMEM;
/* Fill struct tty_driver with ipoctal data */
tty->owner = THIS_MODULE;
tty->driver_name = KBUILD_MODNAME;
sprintf(name, KBUILD_MODNAME ".%d.%d.", bus_nr, slot);
tty->name = name;
tty->major = 0;
tty->minor_start = 0;
tty->type = TTY_DRIVER_TYPE_SERIAL;
tty->subtype = SERIAL_TYPE_NORMAL;
tty->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
tty->init_termios = tty_std_termios;
tty->init_termios.c_cflag = B9600 | CS8 | CREAD | HUPCL | CLOCAL;
tty->init_termios.c_ispeed = 9600;
tty->init_termios.c_ospeed = 9600;
tty_set_operations(tty, &ipoctal_fops);
res = tty_register_driver(tty);
if (res) {
dev_err(&ipoctal->dev->dev, "Can't register tty driver.\n");
put_tty_driver(tty);
return res;
}
/* Save struct tty_driver for use it when uninstalling the device */
ipoctal->tty_drv = tty;
for (i = 0; i < NR_CHANNELS; i++) {
struct device *tty_dev;
channel = &ipoctal->channel[i];
tty_port_init(&channel->tty_port);
tty_port_alloc_xmit_buf(&channel->tty_port);
channel->tty_port.ops = &ipoctal_tty_port_ops;
ipoctal_reset_stats(&channel->stats);
channel->nb_bytes = 0;
spin_lock_init(&channel->lock);
channel->pointer_read = 0;
channel->pointer_write = 0;
tty_dev = tty_port_register_device(&channel->tty_port, tty, i, NULL);
if (IS_ERR(tty_dev)) {
dev_err(&ipoctal->dev->dev, "Failed to register tty device.\n");
tty_port_destroy(&channel->tty_port);
continue;
}
dev_set_drvdata(tty_dev, channel);
}
/*
* IP-OCTAL has different addresses to copy its IRQ vector.
* Depending of the carrier these addresses are accesible or not.
* More info in the datasheet.
*/
ipoctal->dev->bus->ops->request_irq(ipoctal->dev,
ipoctal_irq_handler, ipoctal);
return 0;
}
static inline int ipoctal_copy_write_buffer(struct ipoctal_channel *channel,
const unsigned char *buf,
int count)
{
unsigned long flags;
int i;
unsigned int *pointer_read = &channel->pointer_read;
/* Copy the bytes from the user buffer to the internal one */
for (i = 0; i < count; i++) {
if (i <= (PAGE_SIZE - channel->nb_bytes)) {
spin_lock_irqsave(&channel->lock, flags);
channel->tty_port.xmit_buf[*pointer_read] = buf[i];
*pointer_read = (*pointer_read + 1) % PAGE_SIZE;
channel->nb_bytes++;
spin_unlock_irqrestore(&channel->lock, flags);
} else {
break;
}
}
return i;
}
static int ipoctal_write_tty(struct tty_struct *tty,
const unsigned char *buf, int count)
{
struct ipoctal_channel *channel = tty->driver_data;
unsigned int char_copied;
char_copied = ipoctal_copy_write_buffer(channel, buf, count);
/* As the IP-OCTAL 485 only supports half duplex, do it manually */
if (channel->board_id == IPACK1_DEVICE_ID_SBS_OCTAL_485) {
iowrite8(CR_DISABLE_RX, &channel->regs->w.cr);
channel->rx_enable = 0;
iowrite8(CR_CMD_ASSERT_RTSN, &channel->regs->w.cr);
}
/*
* Send a packet and then disable TX to avoid failure after several send
* operations
*/
iowrite8(CR_ENABLE_TX, &channel->regs->w.cr);
return char_copied;
}
static int ipoctal_write_room(struct tty_struct *tty)
{
struct ipoctal_channel *channel = tty->driver_data;
return PAGE_SIZE - channel->nb_bytes;
}
static int ipoctal_chars_in_buffer(struct tty_struct *tty)
{
struct ipoctal_channel *channel = tty->driver_data;
return channel->nb_bytes;
}
static void ipoctal_set_termios(struct tty_struct *tty,
struct ktermios *old_termios)
{
unsigned int cflag;
unsigned char mr1 = 0;
unsigned char mr2 = 0;
unsigned char csr = 0;
struct ipoctal_channel *channel = tty->driver_data;
speed_t baud;
cflag = tty->termios.c_cflag;
/* Disable and reset everything before change the setup */
ipoctal_reset_channel(channel);
/* Set Bits per chars */
switch (cflag & CSIZE) {
case CS6:
mr1 |= MR1_CHRL_6_BITS;
break;
case CS7:
mr1 |= MR1_CHRL_7_BITS;
break;
case CS8:
default:
mr1 |= MR1_CHRL_8_BITS;
/* By default, select CS8 */
tty->termios.c_cflag = (cflag & ~CSIZE) | CS8;
break;
}
/* Set Parity */
if (cflag & PARENB)
if (cflag & PARODD)
mr1 |= MR1_PARITY_ON | MR1_PARITY_ODD;
else
mr1 |= MR1_PARITY_ON | MR1_PARITY_EVEN;
else
mr1 |= MR1_PARITY_OFF;
/* Mark or space parity is not supported */
tty->termios.c_cflag &= ~CMSPAR;
/* Set stop bits */
if (cflag & CSTOPB)
mr2 |= MR2_STOP_BITS_LENGTH_2;
else
mr2 |= MR2_STOP_BITS_LENGTH_1;
/* Set the flow control */
switch (channel->board_id) {
case IPACK1_DEVICE_ID_SBS_OCTAL_232:
if (cflag & CRTSCTS) {
mr1 |= MR1_RxRTS_CONTROL_ON;
mr2 |= MR2_TxRTS_CONTROL_OFF | MR2_CTS_ENABLE_TX_ON;
} else {
mr1 |= MR1_RxRTS_CONTROL_OFF;
mr2 |= MR2_TxRTS_CONTROL_OFF | MR2_CTS_ENABLE_TX_OFF;
}
break;
case IPACK1_DEVICE_ID_SBS_OCTAL_422:
mr1 |= MR1_RxRTS_CONTROL_OFF;
mr2 |= MR2_TxRTS_CONTROL_OFF | MR2_CTS_ENABLE_TX_OFF;
break;
case IPACK1_DEVICE_ID_SBS_OCTAL_485:
mr1 |= MR1_RxRTS_CONTROL_OFF;
mr2 |= MR2_TxRTS_CONTROL_ON | MR2_CTS_ENABLE_TX_OFF;
break;
default:
return;
break;
}
baud = tty_get_baud_rate(tty);
tty_termios_encode_baud_rate(&tty->termios, baud, baud);
/* Set baud rate */
switch (baud) {
case 75:
csr |= TX_CLK_75 | RX_CLK_75;
break;
case 110:
csr |= TX_CLK_110 | RX_CLK_110;
break;
case 150:
csr |= TX_CLK_150 | RX_CLK_150;
break;
case 300:
csr |= TX_CLK_300 | RX_CLK_300;
break;
case 600:
csr |= TX_CLK_600 | RX_CLK_600;
break;
case 1200:
csr |= TX_CLK_1200 | RX_CLK_1200;
break;
case 1800:
csr |= TX_CLK_1800 | RX_CLK_1800;
break;
case 2000:
csr |= TX_CLK_2000 | RX_CLK_2000;
break;
case 2400:
csr |= TX_CLK_2400 | RX_CLK_2400;
break;
case 4800:
csr |= TX_CLK_4800 | RX_CLK_4800;
break;
case 9600:
csr |= TX_CLK_9600 | RX_CLK_9600;
break;
case 19200:
csr |= TX_CLK_19200 | RX_CLK_19200;
break;
case 38400:
default:
csr |= TX_CLK_38400 | RX_CLK_38400;
/* In case of default, we establish 38400 bps */
tty_termios_encode_baud_rate(&tty->termios, 38400, 38400);
break;
}
mr1 |= MR1_ERROR_CHAR;
mr1 |= MR1_RxINT_RxRDY;
/* Write the control registers */
iowrite8(mr1, &channel->regs->w.mr);
iowrite8(mr2, &channel->regs->w.mr);
iowrite8(csr, &channel->regs->w.csr);
/* Enable again the RX, if it was before */
if (channel->rx_enable)
iowrite8(CR_ENABLE_RX, &channel->regs->w.cr);
}
static void ipoctal_hangup(struct tty_struct *tty)
{
unsigned long flags;
struct ipoctal_channel *channel = tty->driver_data;
if (channel == NULL)
return;
spin_lock_irqsave(&channel->lock, flags);
channel->nb_bytes = 0;
channel->pointer_read = 0;
channel->pointer_write = 0;
spin_unlock_irqrestore(&channel->lock, flags);
tty_port_hangup(&channel->tty_port);
ipoctal_reset_channel(channel);
tty_port_set_initialized(&channel->tty_port, 0);
wake_up_interruptible(&channel->tty_port.open_wait);
}
static void ipoctal_shutdown(struct tty_struct *tty)
{
struct ipoctal_channel *channel = tty->driver_data;
if (channel == NULL)
return;
ipoctal_reset_channel(channel);
tty_port_set_initialized(&channel->tty_port, 0);
}
static void ipoctal_cleanup(struct tty_struct *tty)
{
struct ipoctal_channel *channel = tty->driver_data;
struct ipoctal *ipoctal = chan_to_ipoctal(channel, tty->index);
/* release the carrier driver */
ipack_put_carrier(ipoctal->dev);
}
static const struct tty_operations ipoctal_fops = {
.ioctl = NULL,
.open = ipoctal_open,
.close = ipoctal_close,
.write = ipoctal_write_tty,
.set_termios = ipoctal_set_termios,
.write_room = ipoctal_write_room,
.chars_in_buffer = ipoctal_chars_in_buffer,
.get_icount = ipoctal_get_icount,
.hangup = ipoctal_hangup,
.shutdown = ipoctal_shutdown,
.cleanup = ipoctal_cleanup,
};
static int ipoctal_probe(struct ipack_device *dev)
{
int res;
struct ipoctal *ipoctal;
ipoctal = kzalloc(sizeof(struct ipoctal), GFP_KERNEL);
if (ipoctal == NULL)
return -ENOMEM;
ipoctal->dev = dev;
res = ipoctal_inst_slot(ipoctal, dev->bus->bus_nr, dev->slot);
if (res)
goto out_uninst;
dev_set_drvdata(&dev->dev, ipoctal);
return 0;
out_uninst:
kfree(ipoctal);
return res;
}
static void __ipoctal_remove(struct ipoctal *ipoctal)
{
int i;
ipoctal->dev->bus->ops->free_irq(ipoctal->dev);
for (i = 0; i < NR_CHANNELS; i++) {
struct ipoctal_channel *channel = &ipoctal->channel[i];
tty_unregister_device(ipoctal->tty_drv, i);
tty_port_free_xmit_buf(&channel->tty_port);
tty_port_destroy(&channel->tty_port);
}
tty_unregister_driver(ipoctal->tty_drv);
put_tty_driver(ipoctal->tty_drv);
kfree(ipoctal);
}
static void ipoctal_remove(struct ipack_device *idev)
{
__ipoctal_remove(dev_get_drvdata(&idev->dev));
}
static DEFINE_IPACK_DEVICE_TABLE(ipoctal_ids) = {
{ IPACK_DEVICE(IPACK_ID_VERSION_1, IPACK1_VENDOR_ID_SBS,
IPACK1_DEVICE_ID_SBS_OCTAL_232) },
{ IPACK_DEVICE(IPACK_ID_VERSION_1, IPACK1_VENDOR_ID_SBS,
IPACK1_DEVICE_ID_SBS_OCTAL_422) },
{ IPACK_DEVICE(IPACK_ID_VERSION_1, IPACK1_VENDOR_ID_SBS,
IPACK1_DEVICE_ID_SBS_OCTAL_485) },
{ 0, },
};
MODULE_DEVICE_TABLE(ipack, ipoctal_ids);
static const struct ipack_driver_ops ipoctal_drv_ops = {
.probe = ipoctal_probe,
.remove = ipoctal_remove,
};
static struct ipack_driver driver = {
.ops = &ipoctal_drv_ops,
.id_table = ipoctal_ids,
};
static int __init ipoctal_init(void)
{
return ipack_driver_register(&driver, THIS_MODULE, KBUILD_MODNAME);
}
static void __exit ipoctal_exit(void)
{
ipack_driver_unregister(&driver);
}
MODULE_DESCRIPTION("IP-Octal 232, 422 and 485 device driver");
MODULE_LICENSE("GPL");
module_init(ipoctal_init);
module_exit(ipoctal_exit);
| gpl-2.0 |
emineKoc/WiseWit | wisewitapi/vendor/bundle/gems/coderay-1.1.1/lib/coderay/helpers/word_list.rb | 1662 | module CodeRay
# = WordList
#
# <b>A Hash subclass designed for mapping word lists to token types.</b>
#
# A WordList is a Hash with some additional features.
# It is intended to be used for keyword recognition.
#
# WordList is optimized to be used in Scanners,
# typically to decide whether a given ident is a special token.
#
# For case insensitive words use WordList::CaseIgnoring.
#
# Example:
#
# # define word arrays
# RESERVED_WORDS = %w[
# asm break case continue default do else
# ]
#
# PREDEFINED_TYPES = %w[
# int long short char void
# ]
#
# # make a WordList
# IDENT_KIND = WordList.new(:ident).
# add(RESERVED_WORDS, :reserved).
# add(PREDEFINED_TYPES, :predefined_type)
#
# ...
#
# def scan_tokens tokens, options
# ...
#
# elsif scan(/[A-Za-z_][A-Za-z_0-9]*/)
# # use it
# kind = IDENT_KIND[match]
# ...
class WordList < Hash
# Create a new WordList with +default+ as default value.
def initialize default = false
super default
end
# Add words to the list and associate them with +value+.
#
# Returns +self+, so you can concat add calls.
def add words, value = true
words.each { |word| self[word] = value }
self
end
end
# A CaseIgnoring WordList is like a WordList, only that
# keys are compared case-insensitively (normalizing keys using +downcase+).
class WordList::CaseIgnoring < WordList
def [] key
super key.downcase
end
def []= key, value
super key.downcase, value
end
end
end
| gpl-3.0 |
zhengyongbo/phantomjs | src/qt/qtwebkit/Source/WebCore/page/PageConsole.h | 2858 | /*
* Copyright (C) 2013 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of Apple Computer, Inc. ("Apple") nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY APPLE AND ITS CONTRIBUTORS "AS IS" AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL APPLE OR ITS CONTRIBUTORS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef PageConsole_h
#define PageConsole_h
#include "ConsoleTypes.h"
#include "ScriptCallStack.h"
#include "ScriptState.h"
#include <wtf/Forward.h>
#include <wtf/PassOwnPtr.h>
namespace WebCore {
class Document;
class Page;
class PageConsole {
public:
static PassOwnPtr<PageConsole> create(Page* page) { return adoptPtr(new PageConsole(page)); }
virtual ~PageConsole();
static void printSourceURLAndLine(const String& sourceURL, unsigned lineNumber);
static void printMessageSourceAndLevelPrefix(MessageSource, MessageLevel);
void addMessage(MessageSource, MessageLevel, const String& message, const String& sourceURL, unsigned lineNumber, unsigned columnNumber, PassRefPtr<ScriptCallStack> = 0, ScriptState* = 0, unsigned long requestIdentifier = 0);
void addMessage(MessageSource, MessageLevel, const String& message, PassRefPtr<ScriptCallStack>);
void addMessage(MessageSource, MessageLevel, const String& message, unsigned long requestIdentifier = 0, Document* = 0);
static void mute();
static void unmute();
static bool shouldPrintExceptions();
static void setShouldPrintExceptions(bool);
private:
PageConsole(Page*);
Page* page() { return m_page; };
Page* m_page;
};
} // namespace WebCore
#endif // PageConsole_h
| bsd-3-clause |
butkevicius/motorola-moto-z-permissive-kernel | kernel/drivers/media/platform/msm/camera_v2/common/msm_camera_io_util.h | 3577 | /* Copyright (c) 2011-2014, The Linux Foundataion. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __MSM_CAMERA_IO_UTIL_H
#define __MSM_CAMERA_IO_UTIL_H
#include <linux/regulator/consumer.h>
#include <linux/gpio.h>
#include <linux/clk.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <soc/qcom/camera2.h>
#include <media/msm_cam_sensor.h>
#include <media/v4l2-ioctl.h>
#define NO_SET_RATE -1
#define INIT_RATE -2
struct msm_gpio_set_tbl {
unsigned gpio;
unsigned long flags;
uint32_t delay;
};
struct msm_cam_dump_string_info {
const char *print;
uint32_t offset;
};
void msm_camera_io_w(u32 data, void __iomem *addr);
void msm_camera_io_w_mb(u32 data, void __iomem *addr);
u32 msm_camera_io_r(void __iomem *addr);
u32 msm_camera_io_r_mb(void __iomem *addr);
void msm_camera_io_dump(void __iomem *addr, int size, int enable);
void msm_camera_io_memcpy(void __iomem *dest_addr,
void __iomem *src_addr, u32 len);
void msm_camera_io_memcpy_mb(void __iomem *dest_addr,
void __iomem *src_addr, u32 len);
int msm_cam_clk_sel_src(struct device *dev, struct msm_cam_clk_info *clk_info,
struct msm_cam_clk_info *clk_src_info, int num_clk);
int msm_cam_clk_enable(struct device *dev, struct msm_cam_clk_info *clk_info,
struct clk **clk_ptr, int num_clk, int enable);
int msm_camera_config_vreg(struct device *dev, struct camera_vreg_t *cam_vreg,
int num_vreg, enum msm_camera_vreg_name_t *vreg_seq,
int num_vreg_seq, struct regulator **reg_ptr, int config);
int msm_camera_enable_vreg(struct device *dev, struct camera_vreg_t *cam_vreg,
int num_vreg, enum msm_camera_vreg_name_t *vreg_seq,
int num_vreg_seq, struct regulator **reg_ptr, int enable);
void msm_camera_bus_scale_cfg(uint32_t bus_perf_client,
enum msm_bus_perf_setting perf_setting);
int msm_camera_set_gpio_table(struct msm_gpio_set_tbl *gpio_tbl,
uint8_t gpio_tbl_size, int gpio_en);
void msm_camera_config_single_gpio(uint16_t gpio, unsigned long flags,
int gpio_en);
int msm_camera_config_single_vreg(struct device *dev,
struct camera_vreg_t *cam_vreg, struct regulator **reg_ptr, int config);
int msm_camera_request_gpio_table(struct gpio *gpio_tbl, uint8_t size,
int gpio_en);
void msm_camera_io_dump_wstring_base(void __iomem *addr,
struct msm_cam_dump_string_info *dump_data,
int size);
int32_t msm_camera_io_poll_value_wmask(void __iomem *addr, u32 wait_data,
u32 bmask, u32 retry, unsigned long min_usecs,
unsigned long max_usecs);
int32_t msm_camera_io_poll_value(void __iomem *addr, u32 wait_data, u32 retry,
unsigned long min_usecs, unsigned long max_usecs);
int32_t msm_camera_io_w_block(const u32 *addr, void __iomem *base, u32 len);
int32_t msm_camera_io_w_reg_block(const u32 *addr, void __iomem *base, u32 len);
int32_t msm_camera_io_w_mb_block(const u32 *addr, void __iomem *base, u32 len);
int msm_camera_get_dt_reg_settings(struct device_node *of_node,
const char *dt_prop_name, uint32_t **reg_s,
unsigned int *size);
void msm_camera_put_dt_reg_settings(uint32_t **reg_s,
unsigned int *size);
int msm_camera_hw_write_dt_reg_settings(void __iomem *base,
uint32_t *reg_s,
unsigned int size);
#endif
| gpl-2.0 |
klim-iv/phantomjs-qt5 | src/webkit/Source/WebCore/platform/network/Credential.h | 2971 | /*
* Copyright (C) 2007 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY APPLE COMPUTER, INC. ``AS IS'' AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL APPLE COMPUTER, INC. OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef Credential_h
#define Credential_h
#include <wtf/text/WTFString.h>
#define CERTIFICATE_CREDENTIALS_SUPPORTED PLATFORM(MAC)
#if CERTIFICATE_CREDENTIALS_SUPPORTED
#include <Security/SecBase.h>
#include <wtf/RetainPtr.h>
#endif
namespace WebCore {
enum CredentialPersistence {
CredentialPersistenceNone,
CredentialPersistenceForSession,
CredentialPersistencePermanent
};
#if CERTIFICATE_CREDENTIALS_SUPPORTED
enum CredentialType {
CredentialTypePassword,
CredentialTypeClientCertificate
};
#endif
class Credential {
public:
Credential();
Credential(const String& user, const String& password, CredentialPersistence);
Credential(const Credential& original, CredentialPersistence);
#if CERTIFICATE_CREDENTIALS_SUPPORTED
Credential(SecIdentityRef identity, CFArrayRef certificates, CredentialPersistence);
#endif
bool isEmpty() const;
const String& user() const;
const String& password() const;
bool hasPassword() const;
CredentialPersistence persistence() const;
#if CERTIFICATE_CREDENTIALS_SUPPORTED
SecIdentityRef identity() const;
CFArrayRef certificates() const;
CredentialType type() const;
#endif
private:
String m_user;
String m_password;
CredentialPersistence m_persistence;
#if CERTIFICATE_CREDENTIALS_SUPPORTED
RetainPtr<SecIdentityRef> m_identity;
RetainPtr<CFArrayRef> m_certificates;
CredentialType m_type;
#endif
};
bool operator==(const Credential& a, const Credential& b);
inline bool operator!=(const Credential& a, const Credential& b) { return !(a == b); }
};
#endif
| bsd-3-clause |
1nv4d3r5/joomla-cms | tests/unit/suites/libraries/joomla/github/orgs/JGithubPackageOrgsMembersTest.php | 7908 | <?php
/**
* Generated by PHPUnit_SkeletonGenerator 1.2.0 on 2013-02-01 at 23:10:44.
*/
class JGithubPackageOrgsMembersTest extends PHPUnit_Framework_TestCase
{
/**
* @var JRegistry Options for the GitHub object.
* @since 11.4
*/
protected $options;
/**
* @var JGithubHttp Mock client object.
* @since 11.4
*/
protected $client;
/**
* @var JHttpResponse Mock response object.
* @since 12.3
*/
protected $response;
/**
* @var JGithubPackageOrgsMembers
*/
protected $object;
/**
* @var string Sample JSON string.
* @since 12.3
*/
protected $sampleString = '{"a":1,"b":2,"c":3,"d":4,"e":5}';
/**
* @var string Sample JSON error message.
* @since 12.3
*/
protected $errorString = '{"message": "Generic Error"}';
/**
* Sets up the fixture, for example, opens a network connection.
* This method is called before a test is executed.
*
* @since ¿
*
* @return void
*/
protected function setUp()
{
parent::setUp();
$this->options = new JRegistry;
$this->client = $this->getMock('JGithubHttp', array('get', 'post', 'delete', 'patch', 'put'));
$this->response = $this->getMock('JHttpResponse');
$this->object = new JGithubPackageOrgsMembers($this->options, $this->client);
}
/**
* @covers JGithubPackageOrgsMembers::getList
*/
public function testGetList()
{
$this->response->code = 200;
$this->response->body = $this->sampleString;
$this->client->expects($this->once())
->method('get')
->with('/orgs/joomla/members')
->will($this->returnValue($this->response));
$this->assertThat(
$this->object->getList('joomla'),
$this->equalTo(json_decode($this->sampleString))
);
}
/**
* @covers JGithubPackageOrgsMembers::getList
*/
public function testGetListNotAMember()
{
$this->response->code = 302;
$this->response->body = $this->sampleString;
$this->client->expects($this->once())
->method('get')
->with('/orgs/joomla/members')
->will($this->returnValue($this->response));
$this->assertThat(
$this->object->getList('joomla'),
$this->equalTo(false)
);
}
/**
* @covers JGithubPackageOrgsMembers::getList
*
* @expectedException UnexpectedValueException
*/
public function testGetListUnexpected()
{
$this->response->code = 666;
$this->response->body = $this->sampleString;
$this->client->expects($this->once())
->method('get')
->with('/orgs/joomla/members')
->will($this->returnValue($this->response));
$this->assertThat(
$this->object->getList('joomla'),
$this->equalTo(json_decode($this->sampleString))
);
}
/**
* @covers JGithubPackageOrgsMembers::check
*/
public function testCheck()
{
$this->response->code = 204;
$this->response->body = $this->sampleString;
$this->client->expects($this->once())
->method('get')
->with('/orgs/joomla/members/elkuku')
->will($this->returnValue($this->response));
$this->assertThat(
$this->object->check('joomla', 'elkuku'),
$this->equalTo(true)
);
}
/**
* @covers JGithubPackageOrgsMembers::check
*/
public function testCheckNoMember()
{
$this->response->code = 404;
$this->response->body = $this->sampleString;
$this->client->expects($this->once())
->method('get')
->with('/orgs/joomla/members/elkuku')
->will($this->returnValue($this->response));
$this->assertThat(
$this->object->check('joomla', 'elkuku'),
$this->equalTo(false)
);
}
/**
* @covers JGithubPackageOrgsMembers::check
*/
public function testCheckRequesterNoMember()
{
$this->response->code = 302;
$this->response->body = $this->sampleString;
$this->client->expects($this->once())
->method('get')
->with('/orgs/joomla/members/elkuku')
->will($this->returnValue($this->response));
$this->assertThat(
$this->object->check('joomla', 'elkuku'),
$this->equalTo(false)
);
}
/**
* @covers JGithubPackageOrgsMembers::check
*
* @expectedException UnexpectedValueException
*/
public function testCheckUnexpectedr()
{
$this->response->code = 666;
$this->response->body = $this->sampleString;
$this->client->expects($this->once())
->method('get')
->with('/orgs/joomla/members/elkuku')
->will($this->returnValue($this->response));
$this->assertThat(
$this->object->check('joomla', 'elkuku'),
$this->equalTo(false)
);
}
/**
* @covers JGithubPackageOrgsMembers::remove
*/
public function testRemove()
{
$this->response->code = 204;
$this->response->body = $this->sampleString;
$this->client->expects($this->once())
->method('delete')
->with('/orgs/joomla/members/elkuku')
->will($this->returnValue($this->response));
$this->assertThat(
$this->object->remove('joomla', 'elkuku'),
$this->equalTo(json_decode($this->sampleString))
);
}
/**
* @covers JGithubPackageOrgsMembers::getListPublic
*/
public function testGetListPublic()
{
$this->response->code = 200;
$this->response->body = $this->sampleString;
$this->client->expects($this->once())
->method('get')
->with('/orgs/joomla/public_members')
->will($this->returnValue($this->response));
$this->assertThat(
$this->object->getListPublic('joomla'),
$this->equalTo(json_decode($this->sampleString))
);
}
/**
* @covers JGithubPackageOrgsMembers::checkPublic
*/
public function testCheckPublic()
{
$this->response->code = 204;
$this->response->body = $this->sampleString;
$this->client->expects($this->once())
->method('get')
->with('/orgs/joomla/public_members/elkuku')
->will($this->returnValue($this->response));
$this->assertThat(
$this->object->checkPublic('joomla', 'elkuku'),
$this->equalTo(true)
);
}
/**
* @covers JGithubPackageOrgsMembers::checkPublic
*/
public function testCheckPublicNo()
{
$this->response->code = 404;
$this->response->body = $this->sampleString;
$this->client->expects($this->once())
->method('get')
->with('/orgs/joomla/public_members/elkuku')
->will($this->returnValue($this->response));
$this->assertThat(
$this->object->checkPublic('joomla', 'elkuku'),
$this->equalTo(false)
);
}
/**
* @covers JGithubPackageOrgsMembers::checkPublic
*
* @expectedException UnexpectedValueException
*/
public function testCheckPublicUnexpected()
{
$this->response->code = 666;
$this->response->body = $this->sampleString;
$this->client->expects($this->once())
->method('get')
->with('/orgs/joomla/public_members/elkuku')
->will($this->returnValue($this->response));
$this->assertThat(
$this->object->checkPublic('joomla', 'elkuku'),
$this->equalTo(false)
);
}
/**
* @covers JGithubPackageOrgsMembers::publicize
*/
public function testPublicize()
{
$this->response->code = 204;
$this->response->body = $this->sampleString;
$this->client->expects($this->once())
->method('put')
->with('/orgs/joomla/public_members/elkuku')
->will($this->returnValue($this->response));
$this->assertThat(
$this->object->publicize('joomla', 'elkuku'),
$this->equalTo(json_decode($this->sampleString))
);
}
/**
* @covers JGithubPackageOrgsMembers::conceal
*/
public function testConceal()
{
$this->response->code = 204;
$this->response->body = $this->sampleString;
$this->client->expects($this->once())
->method('delete')
->with('/orgs/joomla/public_members/elkuku')
->will($this->returnValue($this->response));
$this->assertThat(
$this->object->conceal('joomla', 'elkuku'),
$this->equalTo(json_decode($this->sampleString))
);
}
}
| gpl-2.0 |
DerArtem/android_kernel_dell_streak7 | arch/arm/mach-omap2/powerdomain.c | 28873 | /*
* OMAP powerdomain control
*
* Copyright (C) 2007-2008 Texas Instruments, Inc.
* Copyright (C) 2007-2009 Nokia Corporation
*
* Written by Paul Walmsley
* Added OMAP4 specific support by Abhijit Pagare <[email protected]>
* State counting code by Tero Kristo <[email protected]>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#undef DEBUG
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/delay.h>
#include <linux/spinlock.h>
#include <linux/list.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <linux/io.h>
#include <asm/atomic.h>
#include "cm.h"
#include "cm-regbits-34xx.h"
#include "cm-regbits-44xx.h"
#include "prm.h"
#include "prm-regbits-34xx.h"
#include "prm-regbits-44xx.h"
#include <plat/cpu.h>
#include <plat/powerdomain.h>
#include <plat/clockdomain.h>
#include <plat/prcm.h>
#include "pm.h"
enum {
PWRDM_STATE_NOW = 0,
PWRDM_STATE_PREV,
};
/* Variable holding value of the CPU dependent PWRSTCTRL Register Offset */
static u16 pwrstctrl_reg_offs;
/* Variable holding value of the CPU dependent PWRSTST Register Offset */
static u16 pwrstst_reg_offs;
/* OMAP3 and OMAP4 specific register bit initialisations
* Notice that the names here are not according to each power
* domain but the bit mapping used applies to all of them
*/
/* OMAP3 and OMAP4 Memory Onstate Masks (common across all power domains) */
#define OMAP_MEM0_ONSTATE_MASK OMAP3430_SHAREDL1CACHEFLATONSTATE_MASK
#define OMAP_MEM1_ONSTATE_MASK OMAP3430_L1FLATMEMONSTATE_MASK
#define OMAP_MEM2_ONSTATE_MASK OMAP3430_SHAREDL2CACHEFLATONSTATE_MASK
#define OMAP_MEM3_ONSTATE_MASK OMAP3430_L2FLATMEMONSTATE_MASK
#define OMAP_MEM4_ONSTATE_MASK OMAP4430_OCP_NRET_BANK_ONSTATE_MASK
/* OMAP3 and OMAP4 Memory Retstate Masks (common across all power domains) */
#define OMAP_MEM0_RETSTATE_MASK OMAP3430_SHAREDL1CACHEFLATRETSTATE_MASK
#define OMAP_MEM1_RETSTATE_MASK OMAP3430_L1FLATMEMRETSTATE_MASK
#define OMAP_MEM2_RETSTATE_MASK OMAP3430_SHAREDL2CACHEFLATRETSTATE_MASK
#define OMAP_MEM3_RETSTATE_MASK OMAP3430_L2FLATMEMRETSTATE_MASK
#define OMAP_MEM4_RETSTATE_MASK OMAP4430_OCP_NRET_BANK_RETSTATE_MASK
/* OMAP3 and OMAP4 Memory Status bits */
#define OMAP_MEM0_STATEST_MASK OMAP3430_SHAREDL1CACHEFLATSTATEST_MASK
#define OMAP_MEM1_STATEST_MASK OMAP3430_L1FLATMEMSTATEST_MASK
#define OMAP_MEM2_STATEST_MASK OMAP3430_SHAREDL2CACHEFLATSTATEST_MASK
#define OMAP_MEM3_STATEST_MASK OMAP3430_L2FLATMEMSTATEST_MASK
#define OMAP_MEM4_STATEST_MASK OMAP4430_OCP_NRET_BANK_STATEST_MASK
/* pwrdm_list contains all registered struct powerdomains */
static LIST_HEAD(pwrdm_list);
/* Private functions */
static struct powerdomain *_pwrdm_lookup(const char *name)
{
struct powerdomain *pwrdm, *temp_pwrdm;
pwrdm = NULL;
list_for_each_entry(temp_pwrdm, &pwrdm_list, node) {
if (!strcmp(name, temp_pwrdm->name)) {
pwrdm = temp_pwrdm;
break;
}
}
return pwrdm;
}
/**
* _pwrdm_register - register a powerdomain
* @pwrdm: struct powerdomain * to register
*
* Adds a powerdomain to the internal powerdomain list. Returns
* -EINVAL if given a null pointer, -EEXIST if a powerdomain is
* already registered by the provided name, or 0 upon success.
*/
static int _pwrdm_register(struct powerdomain *pwrdm)
{
int i;
if (!pwrdm)
return -EINVAL;
if (!omap_chip_is(pwrdm->omap_chip))
return -EINVAL;
if (_pwrdm_lookup(pwrdm->name))
return -EEXIST;
list_add(&pwrdm->node, &pwrdm_list);
/* Initialize the powerdomain's state counter */
for (i = 0; i < PWRDM_MAX_PWRSTS; i++)
pwrdm->state_counter[i] = 0;
pwrdm->ret_logic_off_counter = 0;
for (i = 0; i < pwrdm->banks; i++)
pwrdm->ret_mem_off_counter[i] = 0;
pwrdm_wait_transition(pwrdm);
pwrdm->state = pwrdm_read_pwrst(pwrdm);
pwrdm->state_counter[pwrdm->state] = 1;
pr_debug("powerdomain: registered %s\n", pwrdm->name);
return 0;
}
static void _update_logic_membank_counters(struct powerdomain *pwrdm)
{
int i;
u8 prev_logic_pwrst, prev_mem_pwrst;
prev_logic_pwrst = pwrdm_read_prev_logic_pwrst(pwrdm);
if ((pwrdm->pwrsts_logic_ret == PWRSTS_OFF_RET) &&
(prev_logic_pwrst == PWRDM_POWER_OFF))
pwrdm->ret_logic_off_counter++;
for (i = 0; i < pwrdm->banks; i++) {
prev_mem_pwrst = pwrdm_read_prev_mem_pwrst(pwrdm, i);
if ((pwrdm->pwrsts_mem_ret[i] == PWRSTS_OFF_RET) &&
(prev_mem_pwrst == PWRDM_POWER_OFF))
pwrdm->ret_mem_off_counter[i]++;
}
}
static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)
{
int prev;
int state;
if (pwrdm == NULL)
return -EINVAL;
state = pwrdm_read_pwrst(pwrdm);
switch (flag) {
case PWRDM_STATE_NOW:
prev = pwrdm->state;
break;
case PWRDM_STATE_PREV:
prev = pwrdm_read_prev_pwrst(pwrdm);
if (pwrdm->state != prev)
pwrdm->state_counter[prev]++;
if (prev == PWRDM_POWER_RET)
_update_logic_membank_counters(pwrdm);
break;
default:
return -EINVAL;
}
if (state != prev)
pwrdm->state_counter[state]++;
pm_dbg_update_time(pwrdm, prev);
pwrdm->state = state;
return 0;
}
static int _pwrdm_pre_transition_cb(struct powerdomain *pwrdm, void *unused)
{
pwrdm_clear_all_prev_pwrst(pwrdm);
_pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
return 0;
}
static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused)
{
_pwrdm_state_switch(pwrdm, PWRDM_STATE_PREV);
return 0;
}
/* Public functions */
/**
* pwrdm_init - set up the powerdomain layer
* @pwrdm_list: array of struct powerdomain pointers to register
*
* Loop through the array of powerdomains @pwrdm_list, registering all
* that are available on the current CPU. If pwrdm_list is supplied
* and not null, all of the referenced powerdomains will be
* registered. No return value. XXX pwrdm_list is not really a
* "list"; it is an array. Rename appropriately.
*/
void pwrdm_init(struct powerdomain **pwrdm_list)
{
struct powerdomain **p = NULL;
if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
pwrstctrl_reg_offs = OMAP2_PM_PWSTCTRL;
pwrstst_reg_offs = OMAP2_PM_PWSTST;
} else if (cpu_is_omap44xx()) {
pwrstctrl_reg_offs = OMAP4_PM_PWSTCTRL;
pwrstst_reg_offs = OMAP4_PM_PWSTST;
} else {
printk(KERN_ERR "Power Domain struct not supported for " \
"this CPU\n");
return;
}
if (pwrdm_list) {
for (p = pwrdm_list; *p; p++)
_pwrdm_register(*p);
}
}
/**
* pwrdm_lookup - look up a powerdomain by name, return a pointer
* @name: name of powerdomain
*
* Find a registered powerdomain by its name @name. Returns a pointer
* to the struct powerdomain if found, or NULL otherwise.
*/
struct powerdomain *pwrdm_lookup(const char *name)
{
struct powerdomain *pwrdm;
if (!name)
return NULL;
pwrdm = _pwrdm_lookup(name);
return pwrdm;
}
/**
* pwrdm_for_each - call function on each registered clockdomain
* @fn: callback function *
*
* Call the supplied function @fn for each registered powerdomain.
* The callback function @fn can return anything but 0 to bail out
* early from the iterator. Returns the last return value of the
* callback function, which should be 0 for success or anything else
* to indicate failure; or -EINVAL if the function pointer is null.
*/
int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
void *user)
{
struct powerdomain *temp_pwrdm;
int ret = 0;
if (!fn)
return -EINVAL;
list_for_each_entry(temp_pwrdm, &pwrdm_list, node) {
ret = (*fn)(temp_pwrdm, user);
if (ret)
break;
}
return ret;
}
/**
* pwrdm_add_clkdm - add a clockdomain to a powerdomain
* @pwrdm: struct powerdomain * to add the clockdomain to
* @clkdm: struct clockdomain * to associate with a powerdomain
*
* Associate the clockdomain @clkdm with a powerdomain @pwrdm. This
* enables the use of pwrdm_for_each_clkdm(). Returns -EINVAL if
* presented with invalid pointers; -ENOMEM if memory could not be allocated;
* or 0 upon success.
*/
int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm)
{
int i;
int ret = -EINVAL;
if (!pwrdm || !clkdm)
return -EINVAL;
pr_debug("powerdomain: associating clockdomain %s with powerdomain "
"%s\n", clkdm->name, pwrdm->name);
for (i = 0; i < PWRDM_MAX_CLKDMS; i++) {
if (!pwrdm->pwrdm_clkdms[i])
break;
#ifdef DEBUG
if (pwrdm->pwrdm_clkdms[i] == clkdm) {
ret = -EINVAL;
goto pac_exit;
}
#endif
}
if (i == PWRDM_MAX_CLKDMS) {
pr_debug("powerdomain: increase PWRDM_MAX_CLKDMS for "
"pwrdm %s clkdm %s\n", pwrdm->name, clkdm->name);
WARN_ON(1);
ret = -ENOMEM;
goto pac_exit;
}
pwrdm->pwrdm_clkdms[i] = clkdm;
ret = 0;
pac_exit:
return ret;
}
/**
* pwrdm_del_clkdm - remove a clockdomain from a powerdomain
* @pwrdm: struct powerdomain * to add the clockdomain to
* @clkdm: struct clockdomain * to associate with a powerdomain
*
* Dissociate the clockdomain @clkdm from the powerdomain
* @pwrdm. Returns -EINVAL if presented with invalid pointers; -ENOENT
* if @clkdm was not associated with the powerdomain, or 0 upon
* success.
*/
int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm)
{
int ret = -EINVAL;
int i;
if (!pwrdm || !clkdm)
return -EINVAL;
pr_debug("powerdomain: dissociating clockdomain %s from powerdomain "
"%s\n", clkdm->name, pwrdm->name);
for (i = 0; i < PWRDM_MAX_CLKDMS; i++)
if (pwrdm->pwrdm_clkdms[i] == clkdm)
break;
if (i == PWRDM_MAX_CLKDMS) {
pr_debug("powerdomain: clkdm %s not associated with pwrdm "
"%s ?!\n", clkdm->name, pwrdm->name);
ret = -ENOENT;
goto pdc_exit;
}
pwrdm->pwrdm_clkdms[i] = NULL;
ret = 0;
pdc_exit:
return ret;
}
/**
* pwrdm_for_each_clkdm - call function on each clkdm in a pwrdm
* @pwrdm: struct powerdomain * to iterate over
* @fn: callback function *
*
* Call the supplied function @fn for each clockdomain in the powerdomain
* @pwrdm. The callback function can return anything but 0 to bail
* out early from the iterator. Returns -EINVAL if presented with
* invalid pointers; or passes along the last return value of the
* callback function, which should be 0 for success or anything else
* to indicate failure.
*/
int pwrdm_for_each_clkdm(struct powerdomain *pwrdm,
int (*fn)(struct powerdomain *pwrdm,
struct clockdomain *clkdm))
{
int ret = 0;
int i;
if (!fn)
return -EINVAL;
for (i = 0; i < PWRDM_MAX_CLKDMS && !ret; i++)
ret = (*fn)(pwrdm, pwrdm->pwrdm_clkdms[i]);
return ret;
}
/**
* pwrdm_get_mem_bank_count - get number of memory banks in this powerdomain
* @pwrdm: struct powerdomain *
*
* Return the number of controllable memory banks in powerdomain @pwrdm,
* starting with 1. Returns -EINVAL if the powerdomain pointer is null.
*/
int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm)
{
if (!pwrdm)
return -EINVAL;
return pwrdm->banks;
}
/**
* pwrdm_set_next_pwrst - set next powerdomain power state
* @pwrdm: struct powerdomain * to set
* @pwrst: one of the PWRDM_POWER_* macros
*
* Set the powerdomain @pwrdm's next power state to @pwrst. The powerdomain
* may not enter this state immediately if the preconditions for this state
* have not been satisfied. Returns -EINVAL if the powerdomain pointer is
* null or if the power state is invalid for the powerdomin, or returns 0
* upon success.
*/
int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
{
if (!pwrdm)
return -EINVAL;
if (!(pwrdm->pwrsts & (1 << pwrst)))
return -EINVAL;
pr_debug("powerdomain: setting next powerstate for %s to %0x\n",
pwrdm->name, pwrst);
prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
(pwrst << OMAP_POWERSTATE_SHIFT),
pwrdm->prcm_offs, pwrstctrl_reg_offs);
return 0;
}
/**
* pwrdm_read_next_pwrst - get next powerdomain power state
* @pwrdm: struct powerdomain * to get power state
*
* Return the powerdomain @pwrdm's next power state. Returns -EINVAL
* if the powerdomain pointer is null or returns the next power state
* upon success.
*/
int pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
{
if (!pwrdm)
return -EINVAL;
return prm_read_mod_bits_shift(pwrdm->prcm_offs,
pwrstctrl_reg_offs, OMAP_POWERSTATE_MASK);
}
/**
* pwrdm_read_pwrst - get current powerdomain power state
* @pwrdm: struct powerdomain * to get power state
*
* Return the powerdomain @pwrdm's current power state. Returns -EINVAL
* if the powerdomain pointer is null or returns the current power state
* upon success.
*/
int pwrdm_read_pwrst(struct powerdomain *pwrdm)
{
if (!pwrdm)
return -EINVAL;
return prm_read_mod_bits_shift(pwrdm->prcm_offs,
pwrstst_reg_offs, OMAP_POWERSTATEST_MASK);
}
/**
* pwrdm_read_prev_pwrst - get previous powerdomain power state
* @pwrdm: struct powerdomain * to get previous power state
*
* Return the powerdomain @pwrdm's previous power state. Returns -EINVAL
* if the powerdomain pointer is null or returns the previous power state
* upon success.
*/
int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
{
if (!pwrdm)
return -EINVAL;
return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST,
OMAP3430_LASTPOWERSTATEENTERED_MASK);
}
/**
* pwrdm_set_logic_retst - set powerdomain logic power state upon retention
* @pwrdm: struct powerdomain * to set
* @pwrst: one of the PWRDM_POWER_* macros
*
* Set the next power state @pwrst that the logic portion of the
* powerdomain @pwrdm will enter when the powerdomain enters retention.
* This will be either RETENTION or OFF, if supported. Returns
* -EINVAL if the powerdomain pointer is null or the target power
* state is not not supported, or returns 0 upon success.
*/
int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
{
u32 v;
if (!pwrdm)
return -EINVAL;
if (!(pwrdm->pwrsts_logic_ret & (1 << pwrst)))
return -EINVAL;
pr_debug("powerdomain: setting next logic powerstate for %s to %0x\n",
pwrdm->name, pwrst);
/*
* The register bit names below may not correspond to the
* actual names of the bits in each powerdomain's register,
* but the type of value returned is the same for each
* powerdomain.
*/
v = pwrst << __ffs(OMAP3430_LOGICL1CACHERETSTATE_MASK);
prm_rmw_mod_reg_bits(OMAP3430_LOGICL1CACHERETSTATE_MASK, v,
pwrdm->prcm_offs, pwrstctrl_reg_offs);
return 0;
}
/**
* pwrdm_set_mem_onst - set memory power state while powerdomain ON
* @pwrdm: struct powerdomain * to set
* @bank: memory bank number to set (0-3)
* @pwrst: one of the PWRDM_POWER_* macros
*
* Set the next power state @pwrst that memory bank @bank of the
* powerdomain @pwrdm will enter when the powerdomain enters the ON
* state. @bank will be a number from 0 to 3, and represents different
* types of memory, depending on the powerdomain. Returns -EINVAL if
* the powerdomain pointer is null or the target power state is not
* not supported for this memory bank, -EEXIST if the target memory
* bank does not exist or is not controllable, or returns 0 upon
* success.
*/
int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst)
{
u32 m;
if (!pwrdm)
return -EINVAL;
if (pwrdm->banks < (bank + 1))
return -EEXIST;
if (!(pwrdm->pwrsts_mem_on[bank] & (1 << pwrst)))
return -EINVAL;
pr_debug("powerdomain: setting next memory powerstate for domain %s "
"bank %0x while pwrdm-ON to %0x\n", pwrdm->name, bank, pwrst);
/*
* The register bit names below may not correspond to the
* actual names of the bits in each powerdomain's register,
* but the type of value returned is the same for each
* powerdomain.
*/
switch (bank) {
case 0:
m = OMAP_MEM0_ONSTATE_MASK;
break;
case 1:
m = OMAP_MEM1_ONSTATE_MASK;
break;
case 2:
m = OMAP_MEM2_ONSTATE_MASK;
break;
case 3:
m = OMAP_MEM3_ONSTATE_MASK;
break;
case 4:
m = OMAP_MEM4_ONSTATE_MASK;
break;
default:
WARN_ON(1); /* should never happen */
return -EEXIST;
}
prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)),
pwrdm->prcm_offs, pwrstctrl_reg_offs);
return 0;
}
/**
* pwrdm_set_mem_retst - set memory power state while powerdomain in RET
* @pwrdm: struct powerdomain * to set
* @bank: memory bank number to set (0-3)
* @pwrst: one of the PWRDM_POWER_* macros
*
* Set the next power state @pwrst that memory bank @bank of the
* powerdomain @pwrdm will enter when the powerdomain enters the
* RETENTION state. Bank will be a number from 0 to 3, and represents
* different types of memory, depending on the powerdomain. @pwrst
* will be either RETENTION or OFF, if supported. Returns -EINVAL if
* the powerdomain pointer is null or the target power state is not
* not supported for this memory bank, -EEXIST if the target memory
* bank does not exist or is not controllable, or returns 0 upon
* success.
*/
int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst)
{
u32 m;
if (!pwrdm)
return -EINVAL;
if (pwrdm->banks < (bank + 1))
return -EEXIST;
if (!(pwrdm->pwrsts_mem_ret[bank] & (1 << pwrst)))
return -EINVAL;
pr_debug("powerdomain: setting next memory powerstate for domain %s "
"bank %0x while pwrdm-RET to %0x\n", pwrdm->name, bank, pwrst);
/*
* The register bit names below may not correspond to the
* actual names of the bits in each powerdomain's register,
* but the type of value returned is the same for each
* powerdomain.
*/
switch (bank) {
case 0:
m = OMAP_MEM0_RETSTATE_MASK;
break;
case 1:
m = OMAP_MEM1_RETSTATE_MASK;
break;
case 2:
m = OMAP_MEM2_RETSTATE_MASK;
break;
case 3:
m = OMAP_MEM3_RETSTATE_MASK;
break;
case 4:
m = OMAP_MEM4_RETSTATE_MASK;
break;
default:
WARN_ON(1); /* should never happen */
return -EEXIST;
}
prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
pwrstctrl_reg_offs);
return 0;
}
/**
* pwrdm_read_logic_pwrst - get current powerdomain logic retention power state
* @pwrdm: struct powerdomain * to get current logic retention power state
*
* Return the power state that the logic portion of powerdomain @pwrdm
* will enter when the powerdomain enters retention. Returns -EINVAL
* if the powerdomain pointer is null or returns the logic retention
* power state upon success.
*/
int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
{
if (!pwrdm)
return -EINVAL;
return prm_read_mod_bits_shift(pwrdm->prcm_offs, pwrstst_reg_offs,
OMAP3430_LOGICSTATEST_MASK);
}
/**
* pwrdm_read_prev_logic_pwrst - get previous powerdomain logic power state
* @pwrdm: struct powerdomain * to get previous logic power state
*
* Return the powerdomain @pwrdm's previous logic power state. Returns
* -EINVAL if the powerdomain pointer is null or returns the previous
* logic power state upon success.
*/
int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm)
{
if (!pwrdm)
return -EINVAL;
/*
* The register bit names below may not correspond to the
* actual names of the bits in each powerdomain's register,
* but the type of value returned is the same for each
* powerdomain.
*/
return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST,
OMAP3430_LASTLOGICSTATEENTERED_MASK);
}
/**
* pwrdm_read_logic_retst - get next powerdomain logic power state
* @pwrdm: struct powerdomain * to get next logic power state
*
* Return the powerdomain pwrdm's logic power state. Returns -EINVAL
* if the powerdomain pointer is null or returns the next logic
* power state upon success.
*/
int pwrdm_read_logic_retst(struct powerdomain *pwrdm)
{
if (!pwrdm)
return -EINVAL;
/*
* The register bit names below may not correspond to the
* actual names of the bits in each powerdomain's register,
* but the type of value returned is the same for each
* powerdomain.
*/
return prm_read_mod_bits_shift(pwrdm->prcm_offs, pwrstctrl_reg_offs,
OMAP3430_LOGICSTATEST_MASK);
}
/**
* pwrdm_read_mem_pwrst - get current memory bank power state
* @pwrdm: struct powerdomain * to get current memory bank power state
* @bank: memory bank number (0-3)
*
* Return the powerdomain @pwrdm's current memory power state for bank
* @bank. Returns -EINVAL if the powerdomain pointer is null, -EEXIST if
* the target memory bank does not exist or is not controllable, or
* returns the current memory power state upon success.
*/
int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
{
u32 m;
if (!pwrdm)
return -EINVAL;
if (pwrdm->banks < (bank + 1))
return -EEXIST;
if (pwrdm->flags & PWRDM_HAS_MPU_QUIRK)
bank = 1;
/*
* The register bit names below may not correspond to the
* actual names of the bits in each powerdomain's register,
* but the type of value returned is the same for each
* powerdomain.
*/
switch (bank) {
case 0:
m = OMAP_MEM0_STATEST_MASK;
break;
case 1:
m = OMAP_MEM1_STATEST_MASK;
break;
case 2:
m = OMAP_MEM2_STATEST_MASK;
break;
case 3:
m = OMAP_MEM3_STATEST_MASK;
break;
case 4:
m = OMAP_MEM4_STATEST_MASK;
break;
default:
WARN_ON(1); /* should never happen */
return -EEXIST;
}
return prm_read_mod_bits_shift(pwrdm->prcm_offs,
pwrstst_reg_offs, m);
}
/**
* pwrdm_read_prev_mem_pwrst - get previous memory bank power state
* @pwrdm: struct powerdomain * to get previous memory bank power state
* @bank: memory bank number (0-3)
*
* Return the powerdomain @pwrdm's previous memory power state for
* bank @bank. Returns -EINVAL if the powerdomain pointer is null,
* -EEXIST if the target memory bank does not exist or is not
* controllable, or returns the previous memory power state upon
* success.
*/
int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
{
u32 m;
if (!pwrdm)
return -EINVAL;
if (pwrdm->banks < (bank + 1))
return -EEXIST;
if (pwrdm->flags & PWRDM_HAS_MPU_QUIRK)
bank = 1;
/*
* The register bit names below may not correspond to the
* actual names of the bits in each powerdomain's register,
* but the type of value returned is the same for each
* powerdomain.
*/
switch (bank) {
case 0:
m = OMAP3430_LASTMEM1STATEENTERED_MASK;
break;
case 1:
m = OMAP3430_LASTMEM2STATEENTERED_MASK;
break;
case 2:
m = OMAP3430_LASTSHAREDL2CACHEFLATSTATEENTERED_MASK;
break;
case 3:
m = OMAP3430_LASTL2FLATMEMSTATEENTERED_MASK;
break;
default:
WARN_ON(1); /* should never happen */
return -EEXIST;
}
return prm_read_mod_bits_shift(pwrdm->prcm_offs,
OMAP3430_PM_PREPWSTST, m);
}
/**
* pwrdm_read_mem_retst - get next memory bank power state
* @pwrdm: struct powerdomain * to get mext memory bank power state
* @bank: memory bank number (0-3)
*
* Return the powerdomain pwrdm's next memory power state for bank
* x. Returns -EINVAL if the powerdomain pointer is null, -EEXIST if
* the target memory bank does not exist or is not controllable, or
* returns the next memory power state upon success.
*/
int pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
{
u32 m;
if (!pwrdm)
return -EINVAL;
if (pwrdm->banks < (bank + 1))
return -EEXIST;
/*
* The register bit names below may not correspond to the
* actual names of the bits in each powerdomain's register,
* but the type of value returned is the same for each
* powerdomain.
*/
switch (bank) {
case 0:
m = OMAP_MEM0_RETSTATE_MASK;
break;
case 1:
m = OMAP_MEM1_RETSTATE_MASK;
break;
case 2:
m = OMAP_MEM2_RETSTATE_MASK;
break;
case 3:
m = OMAP_MEM3_RETSTATE_MASK;
break;
case 4:
m = OMAP_MEM4_RETSTATE_MASK;
break;
default:
WARN_ON(1); /* should never happen */
return -EEXIST;
}
return prm_read_mod_bits_shift(pwrdm->prcm_offs,
pwrstctrl_reg_offs, m);
}
/**
* pwrdm_clear_all_prev_pwrst - clear previous powerstate register for a pwrdm
* @pwrdm: struct powerdomain * to clear
*
* Clear the powerdomain's previous power state register @pwrdm.
* Clears the entire register, including logic and memory bank
* previous power states. Returns -EINVAL if the powerdomain pointer
* is null, or returns 0 upon success.
*/
int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
{
if (!pwrdm)
return -EINVAL;
/*
* XXX should get the powerdomain's current state here;
* warn & fail if it is not ON.
*/
pr_debug("powerdomain: clearing previous power state reg for %s\n",
pwrdm->name);
prm_write_mod_reg(0, pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST);
return 0;
}
/**
* pwrdm_enable_hdwr_sar - enable automatic hardware SAR for a pwrdm
* @pwrdm: struct powerdomain *
*
* Enable automatic context save-and-restore upon power state change
* for some devices in the powerdomain @pwrdm. Warning: this only
* affects a subset of devices in a powerdomain; check the TRM
* closely. Returns -EINVAL if the powerdomain pointer is null or if
* the powerdomain does not support automatic save-and-restore, or
* returns 0 upon success.
*/
int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm)
{
if (!pwrdm)
return -EINVAL;
if (!(pwrdm->flags & PWRDM_HAS_HDWR_SAR))
return -EINVAL;
pr_debug("powerdomain: %s: setting SAVEANDRESTORE bit\n",
pwrdm->name);
prm_rmw_mod_reg_bits(0, 1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT,
pwrdm->prcm_offs, pwrstctrl_reg_offs);
return 0;
}
/**
* pwrdm_disable_hdwr_sar - disable automatic hardware SAR for a pwrdm
* @pwrdm: struct powerdomain *
*
* Disable automatic context save-and-restore upon power state change
* for some devices in the powerdomain @pwrdm. Warning: this only
* affects a subset of devices in a powerdomain; check the TRM
* closely. Returns -EINVAL if the powerdomain pointer is null or if
* the powerdomain does not support automatic save-and-restore, or
* returns 0 upon success.
*/
int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm)
{
if (!pwrdm)
return -EINVAL;
if (!(pwrdm->flags & PWRDM_HAS_HDWR_SAR))
return -EINVAL;
pr_debug("powerdomain: %s: clearing SAVEANDRESTORE bit\n",
pwrdm->name);
prm_rmw_mod_reg_bits(1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, 0,
pwrdm->prcm_offs, pwrstctrl_reg_offs);
return 0;
}
/**
* pwrdm_has_hdwr_sar - test whether powerdomain supports hardware SAR
* @pwrdm: struct powerdomain *
*
* Returns 1 if powerdomain @pwrdm supports hardware save-and-restore
* for some devices, or 0 if it does not.
*/
bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm)
{
return (pwrdm && pwrdm->flags & PWRDM_HAS_HDWR_SAR) ? 1 : 0;
}
/**
* pwrdm_set_lowpwrstchange - Request a low power state change
* @pwrdm: struct powerdomain *
*
* Allows a powerdomain to transtion to a lower power sleep state
* from an existing sleep state without waking up the powerdomain.
* Returns -EINVAL if the powerdomain pointer is null or if the
* powerdomain does not support LOWPOWERSTATECHANGE, or returns 0
* upon success.
*/
int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm)
{
if (!pwrdm)
return -EINVAL;
if (!(pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE))
return -EINVAL;
pr_debug("powerdomain: %s: setting LOWPOWERSTATECHANGE bit\n",
pwrdm->name);
prm_rmw_mod_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK,
(1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT),
pwrdm->prcm_offs, pwrstctrl_reg_offs);
return 0;
}
/**
* pwrdm_wait_transition - wait for powerdomain power transition to finish
* @pwrdm: struct powerdomain * to wait for
*
* If the powerdomain @pwrdm is in the process of a state transition,
* spin until it completes the power transition, or until an iteration
* bailout value is reached. Returns -EINVAL if the powerdomain
* pointer is null, -EAGAIN if the bailout value was reached, or
* returns 0 upon success.
*/
int pwrdm_wait_transition(struct powerdomain *pwrdm)
{
u32 c = 0;
if (!pwrdm)
return -EINVAL;
/*
* REVISIT: pwrdm_wait_transition() may be better implemented
* via a callback and a periodic timer check -- how long do we expect
* powerdomain transitions to take?
*/
/* XXX Is this udelay() value meaningful? */
while ((prm_read_mod_reg(pwrdm->prcm_offs, pwrstst_reg_offs) &
OMAP_INTRANSITION_MASK) &&
(c++ < PWRDM_TRANSITION_BAILOUT))
udelay(1);
if (c > PWRDM_TRANSITION_BAILOUT) {
printk(KERN_ERR "powerdomain: waited too long for "
"powerdomain %s to complete transition\n", pwrdm->name);
return -EAGAIN;
}
pr_debug("powerdomain: completed transition in %d loops\n", c);
return 0;
}
int pwrdm_state_switch(struct powerdomain *pwrdm)
{
return _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
}
int pwrdm_clkdm_state_switch(struct clockdomain *clkdm)
{
if (clkdm != NULL && clkdm->pwrdm.ptr != NULL) {
pwrdm_wait_transition(clkdm->pwrdm.ptr);
return pwrdm_state_switch(clkdm->pwrdm.ptr);
}
return -EINVAL;
}
int pwrdm_pre_transition(void)
{
pwrdm_for_each(_pwrdm_pre_transition_cb, NULL);
return 0;
}
int pwrdm_post_transition(void)
{
pwrdm_for_each(_pwrdm_post_transition_cb, NULL);
return 0;
}
| gpl-2.0 |
nwjs/chromium.src | third_party/blink/web_tests/external/wpt/svg/linking/scripted/testScripts/externalScript1.js | 56 | function loadedScript() {
return "externalScript1";
}
| bsd-3-clause |
bjohare/cloughjordan.ie | wp-content/themes/outreach-pro/api/OpenLayers-2.13.1/tests/Layer/ArcGIS93Rest.html | 13271 | <html>
<head>
<script type="text/javascript">var oldAlert = window.alert, gMess; window.alert = function(message) {gMess = message; return true;};</script>
<script type="text/javascript">window.alert = oldAlert;</script>
<script src="../OLLoader.js"></script>
<script type="text/javascript">
var isMozilla = (navigator.userAgent.indexOf("compatible") == -1);
var layer;
var name = 'Test Layer';
var url = "http://sampleserver1.arcgisonline.com/ArcGIS/rest/services/Specialty/ESRI_StateCityHighway_USA/MapServer/export";
var params = {layers: "show:0,2"};
function test_Layer_AGS93_constructor (t) {
var params = {layers: "show:0,2"};
t.plan( 14 );
var trans_format = "png";
if (OpenLayers.Util.alphaHack()) { trans_format = "gif"; }
layer = new OpenLayers.Layer.ArcGIS93Rest(name, url, params);
t.ok( layer instanceof OpenLayers.Layer.ArcGIS93Rest, "new OpenLayers.Layer.ArcGIS93Rest returns object" );
t.eq( layer.url, url, "layer.url is correct (HTTPRequest inited)" );
t.eq( layer.params.LAYERS, "show:0,2", "params passed in correctly uppercased" );
t.eq( layer.params.FORMAT, "png", "default params correclty uppercased and copied");
t.eq(layer.isBaseLayer, true, "no transparency setting, wms is baselayer");
params.format = 'jpg';
layer = new OpenLayers.Layer.ArcGIS93Rest(name, url, params);
t.eq( layer.params.FORMAT, "jpg", "default params correclty uppercased and overridden");
params.TRANSPARENT = "true";
var layer2 = new OpenLayers.Layer.ArcGIS93Rest(name, url, params);
t.eq(layer2.isBaseLayer, false, "transparency == 'true', wms is not baselayer");
params.TRANSPARENT = "TRUE";
var layer3 = new OpenLayers.Layer.ArcGIS93Rest(name, url, params);
t.eq(layer3.isBaseLayer, false, "transparency == 'TRUE', wms is not baselayer");
t.eq(layer3.params.FORMAT, trans_format, "transparent = TRUE causes non-image/jpeg format");
params.TRANSPARENT = "TRuE";
var layer4 = new OpenLayers.Layer.ArcGIS93Rest(name, url, params);
t.eq(layer4.isBaseLayer, false, "transparency == 'TRuE', wms is not baselayer");
t.eq(layer4.params.FORMAT, trans_format, "transparent = TRuE causes non-image/jpeg format");
params.TRANSPARENT = true;
var layer5 = new OpenLayers.Layer.ArcGIS93Rest(name, url, params);
t.eq(layer5.isBaseLayer, false, "transparency == true, wms is not baselayer");
t.eq(layer5.params.FORMAT, trans_format, "transparent = true causes non-image/jpeg format");
params.TRANSPARENT = false;
var layer6 = new OpenLayers.Layer.ArcGIS93Rest(name, url, params);
t.eq(layer6.isBaseLayer, true, "transparency == false, wms is baselayer");
}
function test_Layer_AGS93_addtile (t) {
var params = {layers: "show:0,2"};
t.plan( 6 );
layer = new OpenLayers.Layer.ArcGIS93Rest(name, url, params);
var map = new OpenLayers.Map('map', {tileManager: null});
map.addLayer(layer);
var pixel = new OpenLayers.Pixel(5,6);
var tile = layer.addTile(new OpenLayers.Bounds(1,2,3,4), pixel);
tile.draw();
var img = tile.imgDiv;
var tParams = OpenLayers.Util.extend({},
OpenLayers.Util.upperCaseObject(params));
tParams = OpenLayers.Util.extend(tParams, {
FORMAT: "png", BBOX: "1,2,3,4", SIZE: "256,256", F: "image", BBOXSR: "4326", IMAGESR: "4326"
});
t.eq( tile.url,
url + "?" + OpenLayers.Util.getParameterString(tParams),
"image src is created correctly via addtile" );
t.eq( tile.getTile().style.top, "6px", "image top is set correctly via addtile" );
t.eq( tile.getTile().style.left, "5px", "image top is set correctly via addtile" );
var firstChild = layer.div.firstChild;
t.eq( firstChild.nodeName.toLowerCase(), "img", "div first child is an image object" );
t.ok( firstChild == img, "div first child is correct image object" );
t.eq( tile.position.toString(), "x=5,y=6", "Position of tile is set correctly." );
map.destroy();
}
function test_Layer_AGS93_inittiles (t) {
var params = {layers: "show:0,2"};
t.plan( 2 );
var map = new OpenLayers.Map('map');
layer = new OpenLayers.Layer.ArcGIS93Rest(name, url, params, {buffer: 2});
map.addLayer(layer);
map.setCenter(new OpenLayers.LonLat(0,0),5);
t.eq( layer.grid.length, 8, "Grid rows is correct." );
t.eq( layer.grid[0].length, 7, "Grid cols is correct." );
map.destroy();
}
function test_Layer_AGS93_clone (t) {
var params = {layers: "show:0,2"};
t.plan(4);
var options = {tileSize: new OpenLayers.Size(500,50)};
var map = new OpenLayers.Map('map', options);
layer = new OpenLayers.Layer.ArcGIS93Rest(name, url, params);
map.addLayer(layer);
layer.grid = [ [6, 7],
[8, 9]];
var clone = layer.clone();
t.ok( clone.grid != layer.grid, "clone does not copy grid");
t.ok( clone.tileSize.equals(layer.tileSize), "tileSize correctly cloned");
layer.tileSize.w += 40;
t.eq( clone.tileSize.w, 500, "changing layer.tileSize does not change clone.tileSize -- a fresh copy was made, not just copied reference");
t.eq( clone.alpha, layer.alpha, "alpha copied correctly");
layer.grid = null;
map.destroy();
}
function test_Layer_AGS93_isBaseLayer(t) {
var params = {layers: "show:0,2"};
t.plan(3);
layer = new OpenLayers.Layer.ArcGIS93Rest(name, url, params);
t.ok( layer.isBaseLayer, "baselayer is true by default");
var newParams = OpenLayers.Util.extend({}, params);
newParams.transparent = "true";
layer = new OpenLayers.Layer.ArcGIS93Rest(name, url, newParams);
t.ok( !layer.isBaseLayer, "baselayer is false when transparent is set to true");
layer = new OpenLayers.Layer.ArcGIS93Rest(name, url, params, {isBaseLayer: false});
t.ok( !layer.isBaseLayer, "baselayer is false when option is set to false" );
}
function test_Layer_AGS93_mergeNewParams (t) {
var params = {layers: "show:0,2"};
t.plan( 4 );
var map = new OpenLayers.Map("map");
layer = new OpenLayers.Layer.ArcGIS93Rest(name, url, params);
var newParams = { layers: 'sooper',
chickpeas: 'png'};
map.addLayer(layer);
map.zoomToMaxExtent();
layer.redraw = function() {
t.ok(true, "layer is redrawn after new params merged");
}
layer.mergeNewParams(newParams);
t.eq( layer.params.LAYERS, "sooper", "mergeNewParams() overwrites well");
t.eq( layer.params.CHICKPEAS, "png", "mergeNewParams() adds well");
newParams.CHICKPEAS = 151;
t.eq( layer.params.CHICKPEAS, "png", "mergeNewParams() makes clean copy of hashtable");
map.destroy();
}
function test_Layer_AGS93_getFullRequestString (t) {
var params = {layers: "show:0,2"};
t.plan( 1 );
var map = new OpenLayers.Map('map');
map.projection = "xx";
tParams = { layers: 'show:0,2',
format: 'png'};
var tLayer = new OpenLayers.Layer.ArcGIS93Rest(name, url, tParams);
map.addLayer(tLayer);
str = tLayer.getFullRequestString();
var tParams = {
LAYERS: "show:0,2", FORMAT: "png"
};
t.eq(str,
url + "?" + OpenLayers.Util.getParameterString(tParams),
"getFullRequestString() adds SRS value");
map.destroy();
}
function test_Layer_AGS93_noGutters (t) {
t.plan(2);
var map = new OpenLayers.Map('map');
var layer = new OpenLayers.Layer.ArcGIS93Rest("no gutter layer", url, params, {gutter: 0});
map.addLayer(layer);
map.setCenter(new OpenLayers.LonLat(0,0), 5);
var tile = layer.grid[0][0];
var request = layer.getURL(tile.bounds);
var args = OpenLayers.Util.getParameters(request);
t.eq(parseInt(args['SIZE'][0]),
tile.size.w,
"layer without gutter requests images that are as wide as the tile");
t.eq(parseInt(args['SIZE'][1]),
tile.size.h,
"layer without gutter requests images that are as tall as the tile");
layer.destroy();
map.destroy();
}
function test_Layer_AGS93_gutters (t) {
var params = {layers: "show:0,2"};
t.plan(2);
var gutter = 15;
var map = new OpenLayers.Map('map');
var layer = new OpenLayers.Layer.ArcGIS93Rest("gutter layer", url, params, {gutter: gutter});
map.addLayer(layer);
map.setCenter(new OpenLayers.LonLat(0,0), 5);
var tile = layer.grid[0][0];
var request = layer.getURL(tile.bounds);
var args = OpenLayers.Util.getParameters(request);
t.eq(parseInt(args['SIZE'][0]),
tile.size.w + (2 * gutter),
"layer with gutter requests images that are wider by twice the gutter");
t.eq(parseInt(args['SIZE'][1]),
tile.size.h + (2 * gutter),
"layer with gutter requests images that are taller by twice the gutter");
layer.destroy();
map.destroy();
}
function test_Layer_AGS93_destroy (t) {
t.plan( 1 );
var map = new OpenLayers.Map('map');
layer = new OpenLayers.Layer.ArcGIS93Rest(name, url, params);
map.addLayer(layer);
map.setCenter(new OpenLayers.LonLat(0,0), 5);
//grab a reference to one of the tiles
var tile = layer.grid[0][0];
layer.destroy();
// checks to make sure superclass (grid) destroy() was called
t.ok( layer.grid == null, "grid set to null");
}
function test_Layer_ADG93_Filter(t) {
var params = {layers: "show:0,2"};
t.plan( 9 );
layer = new OpenLayers.Layer.ArcGIS93Rest(name, url, params);
var map = new OpenLayers.Map('map', {tileManager: null});
map.addLayer(layer);
var pixel = new OpenLayers.Pixel(5,6);
var tile = layer.addTile(new OpenLayers.Bounds(1,2,3,4), pixel);
// Set up basic params.
var tParams = OpenLayers.Util.extend({}, OpenLayers.Util.upperCaseObject(params));
tParams = OpenLayers.Util.extend(tParams, {
FORMAT: "png", BBOX: "1,2,3,4", SIZE: "256,256", F: "image", BBOXSR: "4326", IMAGESR: "4326"
});
// We need to actually set the "correct" url on a dom element, because doing so encodes things not encoded by getParameterString.
var encodingHack = document.createElement("img");
tile.draw();
t.eq( tile.url, url + "?" + OpenLayers.Util.getParameterString(tParams), "image src no filter" );
layer.setLayerFilter('1', "MR_TOAD = 'FLYING'");
tParams["LAYERDEFS"] = "1:MR_TOAD = 'FLYING';";
tile.draw();
t.eq( tile.url, url + "?" + OpenLayers.Util.getParameterString(tParams), "image src one filter" );
layer.setLayerFilter('1', "MR_TOAD = 'NOT FLYING'");
tParams["LAYERDEFS"] = "1:MR_TOAD = 'NOT FLYING';";
tile.draw();
t.eq( tile.url, url + "?" + OpenLayers.Util.getParameterString(tParams), "image src change one filter" );
layer.setLayerFilter('2', "true = false");
tParams["LAYERDEFS"] = "1:MR_TOAD = 'NOT FLYING';2:true = false;";
tile.draw();
t.eq( tile.url, url + "?" + OpenLayers.Util.getParameterString(tParams), "image src two filters" );
layer.setLayerFilter('99', "some_col > 5");
tParams["LAYERDEFS"] = "1:MR_TOAD = 'NOT FLYING';2:true = false;99:some_col > 5;";
tile.draw();
t.eq( tile.url, url + "?" + OpenLayers.Util.getParameterString(tParams), "image src three filters" );
layer.clearLayerFilter('2');
tParams["LAYERDEFS"] = "1:MR_TOAD = 'NOT FLYING';99:some_col > 5;";
tile.draw();
t.eq( tile.url, url + "?" + OpenLayers.Util.getParameterString(tParams), "image src removed middle filter" );
layer.clearLayerFilter('2');
tParams["LAYERDEFS"] = "1:MR_TOAD = 'NOT FLYING';99:some_col > 5;";
tile.draw();
t.eq( tile.url, url + "?" + OpenLayers.Util.getParameterString(tParams), "image src removed missing filter (no change)" );
layer.clearLayerFilter();
delete tParams["LAYERDEFS"];
tile.draw();
t.eq( tile.url, url + "?" + OpenLayers.Util.getParameterString(tParams), "image src removed all filters" );
layer.clearLayerFilter();
tile.draw();
t.eq( tile.url, url + "?" + OpenLayers.Util.getParameterString(tParams), "image src removed all (no) filters" );
}
</script>
</head>
<body>
<div id="map" style="width:500px;height:550px"></div>
</body>
</html>
| cc0-1.0 |
kv193/buildroot | linux/linux-kernel/arch/x86/mm/fault.c | 29531 | /*
* Copyright (C) 1995 Linus Torvalds
* Copyright (C) 2001, 2002 Andi Kleen, SuSE Labs.
* Copyright (C) 2008-2009, Red Hat Inc., Ingo Molnar
*/
#include <linux/magic.h> /* STACK_END_MAGIC */
#include <linux/sched.h> /* test_thread_flag(), ... */
#include <linux/kdebug.h> /* oops_begin/end, ... */
#include <linux/module.h> /* search_exception_table */
#include <linux/bootmem.h> /* max_low_pfn */
#include <linux/kprobes.h> /* __kprobes, ... */
#include <linux/mmiotrace.h> /* kmmio_handler, ... */
#include <linux/perf_event.h> /* perf_sw_event */
#include <linux/hugetlb.h> /* hstate_index_to_shift */
#include <linux/prefetch.h> /* prefetchw */
#include <asm/traps.h> /* dotraplinkage, ... */
#include <asm/pgalloc.h> /* pgd_*(), ... */
#include <asm/kmemcheck.h> /* kmemcheck_*(), ... */
#include <asm/fixmap.h> /* VSYSCALL_START */
/*
* Page fault error code bits:
*
* bit 0 == 0: no page found 1: protection fault
* bit 1 == 0: read access 1: write access
* bit 2 == 0: kernel-mode access 1: user-mode access
* bit 3 == 1: use of reserved bit detected
* bit 4 == 1: fault was an instruction fetch
*/
enum x86_pf_error_code {
PF_PROT = 1 << 0,
PF_WRITE = 1 << 1,
PF_USER = 1 << 2,
PF_RSVD = 1 << 3,
PF_INSTR = 1 << 4,
};
/*
* Returns 0 if mmiotrace is disabled, or if the fault is not
* handled by mmiotrace:
*/
static inline int __kprobes
kmmio_fault(struct pt_regs *regs, unsigned long addr)
{
if (unlikely(is_kmmio_active()))
if (kmmio_handler(regs, addr) == 1)
return -1;
return 0;
}
static inline int __kprobes notify_page_fault(struct pt_regs *regs)
{
int ret = 0;
/* kprobe_running() needs smp_processor_id() */
if (kprobes_built_in() && !user_mode_vm(regs)) {
preempt_disable();
if (kprobe_running() && kprobe_fault_handler(regs, 14))
ret = 1;
preempt_enable();
}
return ret;
}
/*
* Prefetch quirks:
*
* 32-bit mode:
*
* Sometimes AMD Athlon/Opteron CPUs report invalid exceptions on prefetch.
* Check that here and ignore it.
*
* 64-bit mode:
*
* Sometimes the CPU reports invalid exceptions on prefetch.
* Check that here and ignore it.
*
* Opcode checker based on code by Richard Brunner.
*/
static inline int
check_prefetch_opcode(struct pt_regs *regs, unsigned char *instr,
unsigned char opcode, int *prefetch)
{
unsigned char instr_hi = opcode & 0xf0;
unsigned char instr_lo = opcode & 0x0f;
switch (instr_hi) {
case 0x20:
case 0x30:
/*
* Values 0x26,0x2E,0x36,0x3E are valid x86 prefixes.
* In X86_64 long mode, the CPU will signal invalid
* opcode if some of these prefixes are present so
* X86_64 will never get here anyway
*/
return ((instr_lo & 7) == 0x6);
#ifdef CONFIG_X86_64
case 0x40:
/*
* In AMD64 long mode 0x40..0x4F are valid REX prefixes
* Need to figure out under what instruction mode the
* instruction was issued. Could check the LDT for lm,
* but for now it's good enough to assume that long
* mode only uses well known segments or kernel.
*/
return (!user_mode(regs) || user_64bit_mode(regs));
#endif
case 0x60:
/* 0x64 thru 0x67 are valid prefixes in all modes. */
return (instr_lo & 0xC) == 0x4;
case 0xF0:
/* 0xF0, 0xF2, 0xF3 are valid prefixes in all modes. */
return !instr_lo || (instr_lo>>1) == 1;
case 0x00:
/* Prefetch instruction is 0x0F0D or 0x0F18 */
if (probe_kernel_address(instr, opcode))
return 0;
*prefetch = (instr_lo == 0xF) &&
(opcode == 0x0D || opcode == 0x18);
return 0;
default:
return 0;
}
}
static int
is_prefetch(struct pt_regs *regs, unsigned long error_code, unsigned long addr)
{
unsigned char *max_instr;
unsigned char *instr;
int prefetch = 0;
/*
* If it was a exec (instruction fetch) fault on NX page, then
* do not ignore the fault:
*/
if (error_code & PF_INSTR)
return 0;
instr = (void *)convert_ip_to_linear(current, regs);
max_instr = instr + 15;
if (user_mode(regs) && instr >= (unsigned char *)TASK_SIZE)
return 0;
while (instr < max_instr) {
unsigned char opcode;
if (probe_kernel_address(instr, opcode))
break;
instr++;
if (!check_prefetch_opcode(regs, instr, opcode, &prefetch))
break;
}
return prefetch;
}
static void
force_sig_info_fault(int si_signo, int si_code, unsigned long address,
struct task_struct *tsk, int fault)
{
unsigned lsb = 0;
siginfo_t info;
info.si_signo = si_signo;
info.si_errno = 0;
info.si_code = si_code;
info.si_addr = (void __user *)address;
if (fault & VM_FAULT_HWPOISON_LARGE)
lsb = hstate_index_to_shift(VM_FAULT_GET_HINDEX(fault));
if (fault & VM_FAULT_HWPOISON)
lsb = PAGE_SHIFT;
info.si_addr_lsb = lsb;
force_sig_info(si_signo, &info, tsk);
}
DEFINE_SPINLOCK(pgd_lock);
LIST_HEAD(pgd_list);
#ifdef CONFIG_X86_32
static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address)
{
unsigned index = pgd_index(address);
pgd_t *pgd_k;
pud_t *pud, *pud_k;
pmd_t *pmd, *pmd_k;
pgd += index;
pgd_k = init_mm.pgd + index;
if (!pgd_present(*pgd_k))
return NULL;
/*
* set_pgd(pgd, *pgd_k); here would be useless on PAE
* and redundant with the set_pmd() on non-PAE. As would
* set_pud.
*/
pud = pud_offset(pgd, address);
pud_k = pud_offset(pgd_k, address);
if (!pud_present(*pud_k))
return NULL;
pmd = pmd_offset(pud, address);
pmd_k = pmd_offset(pud_k, address);
if (!pmd_present(*pmd_k))
return NULL;
if (!pmd_present(*pmd))
set_pmd(pmd, *pmd_k);
else
BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k));
return pmd_k;
}
void vmalloc_sync_all(void)
{
unsigned long address;
if (SHARED_KERNEL_PMD)
return;
for (address = VMALLOC_START & PMD_MASK;
address >= TASK_SIZE && address < FIXADDR_TOP;
address += PMD_SIZE) {
struct page *page;
spin_lock(&pgd_lock);
list_for_each_entry(page, &pgd_list, lru) {
spinlock_t *pgt_lock;
pmd_t *ret;
/* the pgt_lock only for Xen */
pgt_lock = &pgd_page_get_mm(page)->page_table_lock;
spin_lock(pgt_lock);
ret = vmalloc_sync_one(page_address(page), address);
spin_unlock(pgt_lock);
if (!ret)
break;
}
spin_unlock(&pgd_lock);
}
}
/*
* 32-bit:
*
* Handle a fault on the vmalloc or module mapping area
*/
static noinline __kprobes int vmalloc_fault(unsigned long address)
{
unsigned long pgd_paddr;
pmd_t *pmd_k;
pte_t *pte_k;
/* Make sure we are in vmalloc area: */
if (!(address >= VMALLOC_START && address < VMALLOC_END))
return -1;
WARN_ON_ONCE(in_nmi());
/*
* Synchronize this task's top level page-table
* with the 'reference' page table.
*
* Do _not_ use "current" here. We might be inside
* an interrupt in the middle of a task switch..
*/
pgd_paddr = read_cr3();
pmd_k = vmalloc_sync_one(__va(pgd_paddr), address);
if (!pmd_k)
return -1;
pte_k = pte_offset_kernel(pmd_k, address);
if (!pte_present(*pte_k))
return -1;
return 0;
}
/*
* Did it hit the DOS screen memory VA from vm86 mode?
*/
static inline void
check_v8086_mode(struct pt_regs *regs, unsigned long address,
struct task_struct *tsk)
{
unsigned long bit;
if (!v8086_mode(regs))
return;
bit = (address - 0xA0000) >> PAGE_SHIFT;
if (bit < 32)
tsk->thread.screen_bitmap |= 1 << bit;
}
static bool low_pfn(unsigned long pfn)
{
return pfn < max_low_pfn;
}
static void dump_pagetable(unsigned long address)
{
pgd_t *base = __va(read_cr3());
pgd_t *pgd = &base[pgd_index(address)];
pmd_t *pmd;
pte_t *pte;
#ifdef CONFIG_X86_PAE
printk("*pdpt = %016Lx ", pgd_val(*pgd));
if (!low_pfn(pgd_val(*pgd) >> PAGE_SHIFT) || !pgd_present(*pgd))
goto out;
#endif
pmd = pmd_offset(pud_offset(pgd, address), address);
printk(KERN_CONT "*pde = %0*Lx ", sizeof(*pmd) * 2, (u64)pmd_val(*pmd));
/*
* We must not directly access the pte in the highpte
* case if the page table is located in highmem.
* And let's rather not kmap-atomic the pte, just in case
* it's allocated already:
*/
if (!low_pfn(pmd_pfn(*pmd)) || !pmd_present(*pmd) || pmd_large(*pmd))
goto out;
pte = pte_offset_kernel(pmd, address);
printk("*pte = %0*Lx ", sizeof(*pte) * 2, (u64)pte_val(*pte));
out:
printk("\n");
}
#else /* CONFIG_X86_64: */
void vmalloc_sync_all(void)
{
sync_global_pgds(VMALLOC_START & PGDIR_MASK, VMALLOC_END);
}
/*
* 64-bit:
*
* Handle a fault on the vmalloc area
*
* This assumes no large pages in there.
*/
static noinline __kprobes int vmalloc_fault(unsigned long address)
{
pgd_t *pgd, *pgd_ref;
pud_t *pud, *pud_ref;
pmd_t *pmd, *pmd_ref;
pte_t *pte, *pte_ref;
/* Make sure we are in vmalloc area: */
if (!(address >= VMALLOC_START && address < VMALLOC_END))
return -1;
WARN_ON_ONCE(in_nmi());
/*
* Copy kernel mappings over when needed. This can also
* happen within a race in page table update. In the later
* case just flush:
*/
pgd = pgd_offset(current->active_mm, address);
pgd_ref = pgd_offset_k(address);
if (pgd_none(*pgd_ref))
return -1;
if (pgd_none(*pgd))
set_pgd(pgd, *pgd_ref);
else
BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref));
/*
* Below here mismatches are bugs because these lower tables
* are shared:
*/
pud = pud_offset(pgd, address);
pud_ref = pud_offset(pgd_ref, address);
if (pud_none(*pud_ref))
return -1;
if (pud_none(*pud) || pud_page_vaddr(*pud) != pud_page_vaddr(*pud_ref))
BUG();
pmd = pmd_offset(pud, address);
pmd_ref = pmd_offset(pud_ref, address);
if (pmd_none(*pmd_ref))
return -1;
if (pmd_none(*pmd) || pmd_page(*pmd) != pmd_page(*pmd_ref))
BUG();
pte_ref = pte_offset_kernel(pmd_ref, address);
if (!pte_present(*pte_ref))
return -1;
pte = pte_offset_kernel(pmd, address);
/*
* Don't use pte_page here, because the mappings can point
* outside mem_map, and the NUMA hash lookup cannot handle
* that:
*/
if (!pte_present(*pte) || pte_pfn(*pte) != pte_pfn(*pte_ref))
BUG();
return 0;
}
#ifdef CONFIG_CPU_SUP_AMD
static const char errata93_warning[] =
KERN_ERR
"******* Your BIOS seems to not contain a fix for K8 errata #93\n"
"******* Working around it, but it may cause SEGVs or burn power.\n"
"******* Please consider a BIOS update.\n"
"******* Disabling USB legacy in the BIOS may also help.\n";
#endif
/*
* No vm86 mode in 64-bit mode:
*/
static inline void
check_v8086_mode(struct pt_regs *regs, unsigned long address,
struct task_struct *tsk)
{
}
static int bad_address(void *p)
{
unsigned long dummy;
return probe_kernel_address((unsigned long *)p, dummy);
}
static void dump_pagetable(unsigned long address)
{
pgd_t *base = __va(read_cr3() & PHYSICAL_PAGE_MASK);
pgd_t *pgd = base + pgd_index(address);
pud_t *pud;
pmd_t *pmd;
pte_t *pte;
if (bad_address(pgd))
goto bad;
printk("PGD %lx ", pgd_val(*pgd));
if (!pgd_present(*pgd))
goto out;
pud = pud_offset(pgd, address);
if (bad_address(pud))
goto bad;
printk("PUD %lx ", pud_val(*pud));
if (!pud_present(*pud) || pud_large(*pud))
goto out;
pmd = pmd_offset(pud, address);
if (bad_address(pmd))
goto bad;
printk("PMD %lx ", pmd_val(*pmd));
if (!pmd_present(*pmd) || pmd_large(*pmd))
goto out;
pte = pte_offset_kernel(pmd, address);
if (bad_address(pte))
goto bad;
printk("PTE %lx", pte_val(*pte));
out:
printk("\n");
return;
bad:
printk("BAD\n");
}
#endif /* CONFIG_X86_64 */
/*
* Workaround for K8 erratum #93 & buggy BIOS.
*
* BIOS SMM functions are required to use a specific workaround
* to avoid corruption of the 64bit RIP register on C stepping K8.
*
* A lot of BIOS that didn't get tested properly miss this.
*
* The OS sees this as a page fault with the upper 32bits of RIP cleared.
* Try to work around it here.
*
* Note we only handle faults in kernel here.
* Does nothing on 32-bit.
*/
static int is_errata93(struct pt_regs *regs, unsigned long address)
{
#if defined(CONFIG_X86_64) && defined(CONFIG_CPU_SUP_AMD)
if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD
|| boot_cpu_data.x86 != 0xf)
return 0;
if (address != regs->ip)
return 0;
if ((address >> 32) != 0)
return 0;
address |= 0xffffffffUL << 32;
if ((address >= (u64)_stext && address <= (u64)_etext) ||
(address >= MODULES_VADDR && address <= MODULES_END)) {
printk_once(errata93_warning);
regs->ip = address;
return 1;
}
#endif
return 0;
}
/*
* Work around K8 erratum #100 K8 in compat mode occasionally jumps
* to illegal addresses >4GB.
*
* We catch this in the page fault handler because these addresses
* are not reachable. Just detect this case and return. Any code
* segment in LDT is compatibility mode.
*/
static int is_errata100(struct pt_regs *regs, unsigned long address)
{
#ifdef CONFIG_X86_64
if ((regs->cs == __USER32_CS || (regs->cs & (1<<2))) && (address >> 32))
return 1;
#endif
return 0;
}
static int is_f00f_bug(struct pt_regs *regs, unsigned long address)
{
#ifdef CONFIG_X86_F00F_BUG
unsigned long nr;
/*
* Pentium F0 0F C7 C8 bug workaround:
*/
if (boot_cpu_data.f00f_bug) {
nr = (address - idt_descr.address) >> 3;
if (nr == 6) {
do_invalid_op(regs, 0);
return 1;
}
}
#endif
return 0;
}
static const char nx_warning[] = KERN_CRIT
"kernel tried to execute NX-protected page - exploit attempt? (uid: %d)\n";
static void
show_fault_oops(struct pt_regs *regs, unsigned long error_code,
unsigned long address)
{
if (!oops_may_print())
return;
if (error_code & PF_INSTR) {
unsigned int level;
pte_t *pte = lookup_address(address, &level);
if (pte && pte_present(*pte) && !pte_exec(*pte))
printk(nx_warning, from_kuid(&init_user_ns, current_uid()));
}
printk(KERN_ALERT "BUG: unable to handle kernel ");
if (address < PAGE_SIZE)
printk(KERN_CONT "NULL pointer dereference");
else
printk(KERN_CONT "paging request");
printk(KERN_CONT " at %p\n", (void *) address);
printk(KERN_ALERT "IP:");
printk_address(regs->ip, 1);
dump_pagetable(address);
}
static noinline void
pgtable_bad(struct pt_regs *regs, unsigned long error_code,
unsigned long address)
{
struct task_struct *tsk;
unsigned long flags;
int sig;
flags = oops_begin();
tsk = current;
sig = SIGKILL;
printk(KERN_ALERT "%s: Corrupted page table at address %lx\n",
tsk->comm, address);
dump_pagetable(address);
tsk->thread.cr2 = address;
tsk->thread.trap_nr = X86_TRAP_PF;
tsk->thread.error_code = error_code;
if (__die("Bad pagetable", regs, error_code))
sig = 0;
oops_end(flags, regs, sig);
}
static noinline void
no_context(struct pt_regs *regs, unsigned long error_code,
unsigned long address, int signal, int si_code)
{
struct task_struct *tsk = current;
unsigned long *stackend;
unsigned long flags;
int sig;
/* Are we prepared to handle this kernel fault? */
if (fixup_exception(regs)) {
if (current_thread_info()->sig_on_uaccess_error && signal) {
tsk->thread.trap_nr = X86_TRAP_PF;
tsk->thread.error_code = error_code | PF_USER;
tsk->thread.cr2 = address;
/* XXX: hwpoison faults will set the wrong code. */
force_sig_info_fault(signal, si_code, address, tsk, 0);
}
return;
}
/*
* 32-bit:
*
* Valid to do another page fault here, because if this fault
* had been triggered by is_prefetch fixup_exception would have
* handled it.
*
* 64-bit:
*
* Hall of shame of CPU/BIOS bugs.
*/
if (is_prefetch(regs, error_code, address))
return;
if (is_errata93(regs, address))
return;
/*
* Oops. The kernel tried to access some bad page. We'll have to
* terminate things with extreme prejudice:
*/
flags = oops_begin();
show_fault_oops(regs, error_code, address);
stackend = end_of_stack(tsk);
if (tsk != &init_task && *stackend != STACK_END_MAGIC)
printk(KERN_EMERG "Thread overran stack, or stack corrupted\n");
tsk->thread.cr2 = address;
tsk->thread.trap_nr = X86_TRAP_PF;
tsk->thread.error_code = error_code;
sig = SIGKILL;
if (__die("Oops", regs, error_code))
sig = 0;
/* Executive summary in case the body of the oops scrolled away */
printk(KERN_DEFAULT "CR2: %016lx\n", address);
oops_end(flags, regs, sig);
}
/*
* Print out info about fatal segfaults, if the show_unhandled_signals
* sysctl is set:
*/
static inline void
show_signal_msg(struct pt_regs *regs, unsigned long error_code,
unsigned long address, struct task_struct *tsk)
{
if (!unhandled_signal(tsk, SIGSEGV))
return;
if (!printk_ratelimit())
return;
printk("%s%s[%d]: segfault at %lx ip %p sp %p error %lx",
task_pid_nr(tsk) > 1 ? KERN_INFO : KERN_EMERG,
tsk->comm, task_pid_nr(tsk), address,
(void *)regs->ip, (void *)regs->sp, error_code);
print_vma_addr(KERN_CONT " in ", regs->ip);
printk(KERN_CONT "\n");
}
static void
__bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code,
unsigned long address, int si_code)
{
struct task_struct *tsk = current;
/* User mode accesses just cause a SIGSEGV */
if (error_code & PF_USER) {
/*
* It's possible to have interrupts off here:
*/
local_irq_enable();
/*
* Valid to do another page fault here because this one came
* from user space:
*/
if (is_prefetch(regs, error_code, address))
return;
if (is_errata100(regs, address))
return;
#ifdef CONFIG_X86_64
/*
* Instruction fetch faults in the vsyscall page might need
* emulation.
*/
if (unlikely((error_code & PF_INSTR) &&
((address & ~0xfff) == VSYSCALL_START))) {
if (emulate_vsyscall(regs, address))
return;
}
#endif
if (unlikely(show_unhandled_signals))
show_signal_msg(regs, error_code, address, tsk);
/* Kernel addresses are always protection faults: */
tsk->thread.cr2 = address;
tsk->thread.error_code = error_code | (address >= TASK_SIZE);
tsk->thread.trap_nr = X86_TRAP_PF;
force_sig_info_fault(SIGSEGV, si_code, address, tsk, 0);
return;
}
if (is_f00f_bug(regs, address))
return;
no_context(regs, error_code, address, SIGSEGV, si_code);
}
static noinline void
bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code,
unsigned long address)
{
__bad_area_nosemaphore(regs, error_code, address, SEGV_MAPERR);
}
static void
__bad_area(struct pt_regs *regs, unsigned long error_code,
unsigned long address, int si_code)
{
struct mm_struct *mm = current->mm;
/*
* Something tried to access memory that isn't in our memory map..
* Fix it, but check if it's kernel or user first..
*/
up_read(&mm->mmap_sem);
__bad_area_nosemaphore(regs, error_code, address, si_code);
}
static noinline void
bad_area(struct pt_regs *regs, unsigned long error_code, unsigned long address)
{
__bad_area(regs, error_code, address, SEGV_MAPERR);
}
static noinline void
bad_area_access_error(struct pt_regs *regs, unsigned long error_code,
unsigned long address)
{
__bad_area(regs, error_code, address, SEGV_ACCERR);
}
/* TODO: fixup for "mm-invoke-oom-killer-from-page-fault.patch" */
static void
out_of_memory(struct pt_regs *regs, unsigned long error_code,
unsigned long address)
{
/*
* We ran out of memory, call the OOM killer, and return the userspace
* (which will retry the fault, or kill us if we got oom-killed):
*/
up_read(¤t->mm->mmap_sem);
pagefault_out_of_memory();
}
static void
do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long address,
unsigned int fault)
{
struct task_struct *tsk = current;
struct mm_struct *mm = tsk->mm;
int code = BUS_ADRERR;
up_read(&mm->mmap_sem);
/* Kernel mode? Handle exceptions or die: */
if (!(error_code & PF_USER)) {
no_context(regs, error_code, address, SIGBUS, BUS_ADRERR);
return;
}
/* User-space => ok to do another page fault: */
if (is_prefetch(regs, error_code, address))
return;
tsk->thread.cr2 = address;
tsk->thread.error_code = error_code;
tsk->thread.trap_nr = X86_TRAP_PF;
#ifdef CONFIG_MEMORY_FAILURE
if (fault & (VM_FAULT_HWPOISON|VM_FAULT_HWPOISON_LARGE)) {
printk(KERN_ERR
"MCE: Killing %s:%d due to hardware memory corruption fault at %lx\n",
tsk->comm, tsk->pid, address);
code = BUS_MCEERR_AR;
}
#endif
force_sig_info_fault(SIGBUS, code, address, tsk, fault);
}
static noinline int
mm_fault_error(struct pt_regs *regs, unsigned long error_code,
unsigned long address, unsigned int fault)
{
/*
* Pagefault was interrupted by SIGKILL. We have no reason to
* continue pagefault.
*/
if (fatal_signal_pending(current)) {
if (!(fault & VM_FAULT_RETRY))
up_read(¤t->mm->mmap_sem);
if (!(error_code & PF_USER))
no_context(regs, error_code, address, 0, 0);
return 1;
}
if (!(fault & VM_FAULT_ERROR))
return 0;
if (fault & VM_FAULT_OOM) {
/* Kernel mode? Handle exceptions or die: */
if (!(error_code & PF_USER)) {
up_read(¤t->mm->mmap_sem);
no_context(regs, error_code, address,
SIGSEGV, SEGV_MAPERR);
return 1;
}
out_of_memory(regs, error_code, address);
} else {
if (fault & (VM_FAULT_SIGBUS|VM_FAULT_HWPOISON|
VM_FAULT_HWPOISON_LARGE))
do_sigbus(regs, error_code, address, fault);
else
BUG();
}
return 1;
}
static int spurious_fault_check(unsigned long error_code, pte_t *pte)
{
if ((error_code & PF_WRITE) && !pte_write(*pte))
return 0;
if ((error_code & PF_INSTR) && !pte_exec(*pte))
return 0;
return 1;
}
/*
* Handle a spurious fault caused by a stale TLB entry.
*
* This allows us to lazily refresh the TLB when increasing the
* permissions of a kernel page (RO -> RW or NX -> X). Doing it
* eagerly is very expensive since that implies doing a full
* cross-processor TLB flush, even if no stale TLB entries exist
* on other processors.
*
* There are no security implications to leaving a stale TLB when
* increasing the permissions on a page.
*/
static noinline __kprobes int
spurious_fault(unsigned long error_code, unsigned long address)
{
pgd_t *pgd;
pud_t *pud;
pmd_t *pmd;
pte_t *pte;
int ret;
/* Reserved-bit violation or user access to kernel space? */
if (error_code & (PF_USER | PF_RSVD))
return 0;
pgd = init_mm.pgd + pgd_index(address);
if (!pgd_present(*pgd))
return 0;
pud = pud_offset(pgd, address);
if (!pud_present(*pud))
return 0;
if (pud_large(*pud))
return spurious_fault_check(error_code, (pte_t *) pud);
pmd = pmd_offset(pud, address);
if (!pmd_present(*pmd))
return 0;
if (pmd_large(*pmd))
return spurious_fault_check(error_code, (pte_t *) pmd);
/*
* Note: don't use pte_present() here, since it returns true
* if the _PAGE_PROTNONE bit is set. However, this aliases the
* _PAGE_GLOBAL bit, which for kernel pages give false positives
* when CONFIG_DEBUG_PAGEALLOC is used.
*/
pte = pte_offset_kernel(pmd, address);
if (!(pte_flags(*pte) & _PAGE_PRESENT))
return 0;
ret = spurious_fault_check(error_code, pte);
if (!ret)
return 0;
/*
* Make sure we have permissions in PMD.
* If not, then there's a bug in the page tables:
*/
ret = spurious_fault_check(error_code, (pte_t *) pmd);
WARN_ONCE(!ret, "PMD has incorrect permission bits\n");
return ret;
}
int show_unhandled_signals = 1;
static inline int
access_error(unsigned long error_code, struct vm_area_struct *vma)
{
if (error_code & PF_WRITE) {
/* write, present and write, not present: */
if (unlikely(!(vma->vm_flags & VM_WRITE)))
return 1;
return 0;
}
/* read, present: */
if (unlikely(error_code & PF_PROT))
return 1;
/* read, not present: */
if (unlikely(!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE))))
return 1;
return 0;
}
static int fault_in_kernel_space(unsigned long address)
{
return address >= TASK_SIZE_MAX;
}
/*
* This routine handles page faults. It determines the address,
* and the problem, and then passes it off to one of the appropriate
* routines.
*/
dotraplinkage void __kprobes
do_page_fault(struct pt_regs *regs, unsigned long error_code)
{
struct vm_area_struct *vma;
struct task_struct *tsk;
unsigned long address;
struct mm_struct *mm;
int fault;
int write = error_code & PF_WRITE;
unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |
(write ? FAULT_FLAG_WRITE : 0);
tsk = current;
mm = tsk->mm;
/* Get the faulting address: */
address = read_cr2();
/*
* Detect and handle instructions that would cause a page fault for
* both a tracked kernel page and a userspace page.
*/
if (kmemcheck_active(regs))
kmemcheck_hide(regs);
prefetchw(&mm->mmap_sem);
if (unlikely(kmmio_fault(regs, address)))
return;
/*
* We fault-in kernel-space virtual memory on-demand. The
* 'reference' page table is init_mm.pgd.
*
* NOTE! We MUST NOT take any locks for this case. We may
* be in an interrupt or a critical region, and should
* only copy the information from the master page table,
* nothing more.
*
* This verifies that the fault happens in kernel space
* (error_code & 4) == 0, and that the fault was not a
* protection error (error_code & 9) == 0.
*/
if (unlikely(fault_in_kernel_space(address))) {
if (!(error_code & (PF_RSVD | PF_USER | PF_PROT))) {
if (vmalloc_fault(address) >= 0)
return;
if (kmemcheck_fault(regs, address, error_code))
return;
}
/* Can handle a stale RO->RW TLB: */
if (spurious_fault(error_code, address))
return;
/* kprobes don't want to hook the spurious faults: */
if (notify_page_fault(regs))
return;
/*
* Don't take the mm semaphore here. If we fixup a prefetch
* fault we could otherwise deadlock:
*/
bad_area_nosemaphore(regs, error_code, address);
return;
}
/* kprobes don't want to hook the spurious faults: */
if (unlikely(notify_page_fault(regs)))
return;
/*
* It's safe to allow irq's after cr2 has been saved and the
* vmalloc fault has been handled.
*
* User-mode registers count as a user access even for any
* potential system fault or CPU buglet:
*/
if (user_mode_vm(regs)) {
local_irq_enable();
error_code |= PF_USER;
} else {
if (regs->flags & X86_EFLAGS_IF)
local_irq_enable();
}
if (unlikely(error_code & PF_RSVD))
pgtable_bad(regs, error_code, address);
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);
/*
* If we're in an interrupt, have no user context or are running
* in an atomic region then we must not take the fault:
*/
if (unlikely(in_atomic() || !mm)) {
bad_area_nosemaphore(regs, error_code, address);
return;
}
/*
* When running in the kernel we expect faults to occur only to
* addresses in user space. All other faults represent errors in
* the kernel and should generate an OOPS. Unfortunately, in the
* case of an erroneous fault occurring in a code path which already
* holds mmap_sem we will deadlock attempting to validate the fault
* against the address space. Luckily the kernel only validly
* references user space from well defined areas of code, which are
* listed in the exceptions table.
*
* As the vast majority of faults will be valid we will only perform
* the source reference check when there is a possibility of a
* deadlock. Attempt to lock the address space, if we cannot we then
* validate the source. If this is invalid we can skip the address
* space check, thus avoiding the deadlock:
*/
if (unlikely(!down_read_trylock(&mm->mmap_sem))) {
if ((error_code & PF_USER) == 0 &&
!search_exception_tables(regs->ip)) {
bad_area_nosemaphore(regs, error_code, address);
return;
}
retry:
down_read(&mm->mmap_sem);
} else {
/*
* The above down_read_trylock() might have succeeded in
* which case we'll have missed the might_sleep() from
* down_read():
*/
might_sleep();
}
vma = find_vma(mm, address);
if (unlikely(!vma)) {
bad_area(regs, error_code, address);
return;
}
if (likely(vma->vm_start <= address))
goto good_area;
if (unlikely(!(vma->vm_flags & VM_GROWSDOWN))) {
bad_area(regs, error_code, address);
return;
}
if (error_code & PF_USER) {
/*
* Accessing the stack below %sp is always a bug.
* The large cushion allows instructions like enter
* and pusha to work. ("enter $65535, $31" pushes
* 32 pointers and then decrements %sp by 65535.)
*/
if (unlikely(address + 65536 + 32 * sizeof(unsigned long) < regs->sp)) {
bad_area(regs, error_code, address);
return;
}
}
if (unlikely(expand_stack(vma, address))) {
bad_area(regs, error_code, address);
return;
}
/*
* Ok, we have a good vm_area for this memory access, so
* we can handle it..
*/
good_area:
if (unlikely(access_error(error_code, vma))) {
bad_area_access_error(regs, error_code, address);
return;
}
/*
* If for any reason at all we couldn't handle the fault,
* make sure we exit gracefully rather than endlessly redo
* the fault:
*/
fault = handle_mm_fault(mm, vma, address, flags);
if (unlikely(fault & (VM_FAULT_RETRY|VM_FAULT_ERROR))) {
if (mm_fault_error(regs, error_code, address, fault))
return;
}
/*
* Major/minor page fault accounting is only done on the
* initial attempt. If we go through a retry, it is extremely
* likely that the page will be found in page cache at that point.
*/
if (flags & FAULT_FLAG_ALLOW_RETRY) {
if (fault & VM_FAULT_MAJOR) {
tsk->maj_flt++;
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,
regs, address);
} else {
tsk->min_flt++;
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1,
regs, address);
}
if (fault & VM_FAULT_RETRY) {
/* Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk
* of starvation. */
flags &= ~FAULT_FLAG_ALLOW_RETRY;
goto retry;
}
}
check_v8086_mode(regs, address, tsk);
up_read(&mm->mmap_sem);
}
| gpl-2.0 |
akumar21NCSU/servo | tests/wpt/mozilla/tests/css/stacked_layers.html | 4673 | <!DOCTYPE html>
<html>
<head>
<link rel='match' href='stacked_layers_ref.html'>
<style>
.test { float: left; margin-right: 25px; }
.box { height: 50px; width: 50px; }
.gray { background: rgb(200, 200, 200); }
.grayer { background: rgb(80, 80, 80); }
.grayest { background: rgb(0, 0, 0); }
iframe { display: block; border: 0; }
</style>
</head>
<body>
<div class="test grayest box">
<div class="grayer box" style="margin-left: 10px; margin-top: 10px; position: fixed;"></div>
<div class="gray box" style="margin-left: 20px; margin-top: 10px; position: relative; top: 10px; z-index: 5;"> </div>
</div>
<div class="test grayest box">
<div class="grayer box" style="margin-left: 10px; margin-top: 10px; position: fixed;"></div>
<div class="gray box" style="margin-left: 20px; margin-top: 10px; position: absolute; top: 20px; z-index: 5;"> </div>
</div>
<!-- These divs should be stacked in tree order, even though the second one
initiates a stacking context and the third one does not. -->
<div class="test grayest box">
<div class="grayer box" style="transform: translateX(10px) translateY(10px);"> </div>
<div class="gray box" style="top: -30px; left: 20px; position: relative; "></div>
</div>
<!-- The z-index of the second box should be ignored since it is not a positioned element.
so these boxes stack in tree order. -->
<div class="test grayest box">
<div class="grayer box" style="margin-left: 10px; margin-top: 10px; opacity: 0.999; z-index: -1;"></div>
<div class="gray box" style="margin-left: 20px; margin-top: -40px; opacity: 0.999;"> </div>
</div>
<!-- The iframe should be painted in tree order since it is not positioned and
the following div is. -->
<div class="test grayest box">
<iframe class="box" style="margin-left: 10px; margin-top: 10px;" src="data:text/html;charset=utf-8;base64,PGh0bWw+PGJvZHkgc3R5bGU9ImJhY2tncm91bmQ6IHJnYig4MCwgODAsIDgwKTsiPjwvYm9keT48L2Rpdj4="></iframe>
<div class="gray box" style="position: relative; left: 20px; top: -40px;"> </div>
</div>
<!-- Same as the previous test case, but the iframe is now a descendant
of the sibling of the second div, instead of a direct sibling. -->
<div class="test grayest box">
<div>
<iframe class="box" style="margin-left: 10px; margin-top: 10px;" src="data:text/html;charset=utf-8;base64,PGh0bWw+PGJvZHkgc3R5bGU9ImJhY2tncm91bmQ6IHJnYig4MCwgODAsIDgwKTsiPjwvYm9keT48L2Rpdj4="></iframe>
</div>
<div class="gray box" style="position: relative; left: 20px; top: -40px;"> </div>
</div>
<!-- The iframe should be painted in tree order since both it and the inner div are
not positioned elements. -->
<div class="test grayest box">
<iframe class="box" style="position: relative; left: 10px; top: 10px;" src="data:text/html;charset=utf-8;base64,PGh0bWw+PGJvZHkgc3R5bGU9ImJhY2tncm91bmQ6IHJnYig4MCwgODAsIDgwKTsiPjwvYm9keT48L2Rpdj4="></iframe>
<div class="gray box" style="position: relative; left: 20px; top: -30px;"> </div>
</div>
<!-- The canvas should be painted in tree order since it is not positioned and
the following div is. -->
<div class="test grayest box">
<canvas class="box" id="canvas1" style="display: block; padding-left: 10px; padding-top: 10px;" width="50" height="50"></canvas>
<div class="gray box" style="position: relative; left: 20px; top: -40px;"> </div>
</div>
<!-- The canvas should be painted in tree order since both it and the inner div are
not positioned elements. -->
<div class="test grayest box">
<canvas class="box" id="canvas2" style="display: block; position: relative; left: 10px; top: 10px;" width="50" height="50"></canvas>
<div class="gray box" style="position: relative; left: 20px; top: -30px;"> </div>
</div>
<script>
function paintCanvas(id) {
var canvas = document.getElementById(id);
var context = canvas.getContext("2d");
context.fillStyle = "rgb(80, 80, 80)";
context.fillRect(0, 0, 100, 100);
}
paintCanvas("canvas1");
paintCanvas("canvas2");
</script>
</body>
</html>
| mpl-2.0 |
cdut007/PMS_TASK | third_party/okhttp-master/okhttp-tests/src/test/java/com/squareup/okhttp/internal/RecordingOkAuthenticator.java | 1901 | /*
* Copyright (C) 2013 Square, Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
package com.squareup.okhttp.internal;
import com.squareup.okhttp.Authenticator;
import com.squareup.okhttp.Request;
import com.squareup.okhttp.Response;
import java.net.Proxy;
import java.util.ArrayList;
import java.util.List;
public final class RecordingOkAuthenticator implements Authenticator {
public final List<Response> responses = new ArrayList<>();
public final List<Proxy> proxies = new ArrayList<>();
public final String credential;
public RecordingOkAuthenticator(String credential) {
this.credential = credential;
}
public Response onlyResponse() {
if (responses.size() != 1) throw new IllegalStateException();
return responses.get(0);
}
public Proxy onlyProxy() {
if (proxies.size() != 1) throw new IllegalStateException();
return proxies.get(0);
}
@Override public Request authenticate(Proxy proxy, Response response) {
responses.add(response);
proxies.add(proxy);
return response.request().newBuilder()
.addHeader("Authorization", credential)
.build();
}
@Override public Request authenticateProxy(Proxy proxy, Response response) {
responses.add(response);
proxies.add(proxy);
return response.request().newBuilder()
.addHeader("Proxy-Authorization", credential)
.build();
}
}
| mit |
wkritzinger/asuswrt-merlin | release/src-rt-7.x.main/src/linux/linux-2.6.36/fs/ecryptfs/miscdev.c | 16067 | /**
* eCryptfs: Linux filesystem encryption layer
*
* Copyright (C) 2008 International Business Machines Corp.
* Author(s): Michael A. Halcrow <[email protected]>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License version
* 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
* 02111-1307, USA.
*/
#include <linux/fs.h>
#include <linux/hash.h>
#include <linux/random.h>
#include <linux/miscdevice.h>
#include <linux/poll.h>
#include <linux/slab.h>
#include <linux/wait.h>
#include <linux/module.h>
#include "ecryptfs_kernel.h"
static atomic_t ecryptfs_num_miscdev_opens;
/**
* ecryptfs_miscdev_poll
* @file: dev file (ignored)
* @pt: dev poll table (ignored)
*
* Returns the poll mask
*/
static unsigned int
ecryptfs_miscdev_poll(struct file *file, poll_table *pt)
{
struct ecryptfs_daemon *daemon;
unsigned int mask = 0;
uid_t euid = current_euid();
int rc;
mutex_lock(&ecryptfs_daemon_hash_mux);
/* TODO: Just use file->private_data? */
rc = ecryptfs_find_daemon_by_euid(&daemon, euid, current_user_ns());
BUG_ON(rc || !daemon);
mutex_lock(&daemon->mux);
mutex_unlock(&ecryptfs_daemon_hash_mux);
if (daemon->flags & ECRYPTFS_DAEMON_ZOMBIE) {
printk(KERN_WARNING "%s: Attempt to poll on zombified "
"daemon\n", __func__);
goto out_unlock_daemon;
}
if (daemon->flags & ECRYPTFS_DAEMON_IN_READ)
goto out_unlock_daemon;
if (daemon->flags & ECRYPTFS_DAEMON_IN_POLL)
goto out_unlock_daemon;
daemon->flags |= ECRYPTFS_DAEMON_IN_POLL;
mutex_unlock(&daemon->mux);
poll_wait(file, &daemon->wait, pt);
mutex_lock(&daemon->mux);
if (!list_empty(&daemon->msg_ctx_out_queue))
mask |= POLLIN | POLLRDNORM;
out_unlock_daemon:
daemon->flags &= ~ECRYPTFS_DAEMON_IN_POLL;
mutex_unlock(&daemon->mux);
return mask;
}
/**
* ecryptfs_miscdev_open
* @inode: inode of miscdev handle (ignored)
* @file: file for miscdev handle (ignored)
*
* Returns zero on success; non-zero otherwise
*/
static int
ecryptfs_miscdev_open(struct inode *inode, struct file *file)
{
struct ecryptfs_daemon *daemon = NULL;
uid_t euid = current_euid();
int rc;
mutex_lock(&ecryptfs_daemon_hash_mux);
rc = try_module_get(THIS_MODULE);
if (rc == 0) {
rc = -EIO;
printk(KERN_ERR "%s: Error attempting to increment module use "
"count; rc = [%d]\n", __func__, rc);
goto out_unlock_daemon_list;
}
rc = ecryptfs_find_daemon_by_euid(&daemon, euid, current_user_ns());
if (rc || !daemon) {
rc = ecryptfs_spawn_daemon(&daemon, euid, current_user_ns(),
task_pid(current));
if (rc) {
printk(KERN_ERR "%s: Error attempting to spawn daemon; "
"rc = [%d]\n", __func__, rc);
goto out_module_put_unlock_daemon_list;
}
}
mutex_lock(&daemon->mux);
if (daemon->pid != task_pid(current)) {
rc = -EINVAL;
printk(KERN_ERR "%s: pid [0x%p] has registered with euid [%d], "
"but pid [0x%p] has attempted to open the handle "
"instead\n", __func__, daemon->pid, daemon->euid,
task_pid(current));
goto out_unlock_daemon;
}
if (daemon->flags & ECRYPTFS_DAEMON_MISCDEV_OPEN) {
rc = -EBUSY;
printk(KERN_ERR "%s: Miscellaneous device handle may only be "
"opened once per daemon; pid [0x%p] already has this "
"handle open\n", __func__, daemon->pid);
goto out_unlock_daemon;
}
daemon->flags |= ECRYPTFS_DAEMON_MISCDEV_OPEN;
atomic_inc(&ecryptfs_num_miscdev_opens);
out_unlock_daemon:
mutex_unlock(&daemon->mux);
out_module_put_unlock_daemon_list:
if (rc)
module_put(THIS_MODULE);
out_unlock_daemon_list:
mutex_unlock(&ecryptfs_daemon_hash_mux);
return rc;
}
/**
* ecryptfs_miscdev_release
* @inode: inode of fs/ecryptfs/euid handle (ignored)
* @file: file for fs/ecryptfs/euid handle (ignored)
*
* This keeps the daemon registered until the daemon sends another
* ioctl to fs/ecryptfs/ctl or until the kernel module unregisters.
*
* Returns zero on success; non-zero otherwise
*/
static int
ecryptfs_miscdev_release(struct inode *inode, struct file *file)
{
struct ecryptfs_daemon *daemon = NULL;
uid_t euid = current_euid();
int rc;
mutex_lock(&ecryptfs_daemon_hash_mux);
rc = ecryptfs_find_daemon_by_euid(&daemon, euid, current_user_ns());
BUG_ON(rc || !daemon);
mutex_lock(&daemon->mux);
BUG_ON(daemon->pid != task_pid(current));
BUG_ON(!(daemon->flags & ECRYPTFS_DAEMON_MISCDEV_OPEN));
daemon->flags &= ~ECRYPTFS_DAEMON_MISCDEV_OPEN;
atomic_dec(&ecryptfs_num_miscdev_opens);
mutex_unlock(&daemon->mux);
rc = ecryptfs_exorcise_daemon(daemon);
if (rc) {
printk(KERN_CRIT "%s: Fatal error whilst attempting to "
"shut down daemon; rc = [%d]. Please report this "
"bug.\n", __func__, rc);
BUG();
}
module_put(THIS_MODULE);
mutex_unlock(&ecryptfs_daemon_hash_mux);
return rc;
}
/**
* ecryptfs_send_miscdev
* @data: Data to send to daemon; may be NULL
* @data_size: Amount of data to send to daemon
* @msg_ctx: Message context, which is used to handle the reply. If
* this is NULL, then we do not expect a reply.
* @msg_type: Type of message
* @msg_flags: Flags for message
* @daemon: eCryptfs daemon object
*
* Add msg_ctx to queue and then, if it exists, notify the blocked
* miscdevess about the data being available. Must be called with
* ecryptfs_daemon_hash_mux held.
*
* Returns zero on success; non-zero otherwise
*/
int ecryptfs_send_miscdev(char *data, size_t data_size,
struct ecryptfs_msg_ctx *msg_ctx, u8 msg_type,
u16 msg_flags, struct ecryptfs_daemon *daemon)
{
int rc = 0;
mutex_lock(&msg_ctx->mux);
msg_ctx->msg = kmalloc((sizeof(*msg_ctx->msg) + data_size),
GFP_KERNEL);
if (!msg_ctx->msg) {
rc = -ENOMEM;
printk(KERN_ERR "%s: Out of memory whilst attempting "
"to kmalloc(%zd, GFP_KERNEL)\n", __func__,
(sizeof(*msg_ctx->msg) + data_size));
goto out_unlock;
}
msg_ctx->msg->index = msg_ctx->index;
msg_ctx->msg->data_len = data_size;
msg_ctx->type = msg_type;
memcpy(msg_ctx->msg->data, data, data_size);
msg_ctx->msg_size = (sizeof(*msg_ctx->msg) + data_size);
mutex_lock(&daemon->mux);
list_add_tail(&msg_ctx->daemon_out_list, &daemon->msg_ctx_out_queue);
daemon->num_queued_msg_ctx++;
wake_up_interruptible(&daemon->wait);
mutex_unlock(&daemon->mux);
out_unlock:
mutex_unlock(&msg_ctx->mux);
return rc;
}
/**
* ecryptfs_miscdev_read - format and send message from queue
* @file: fs/ecryptfs/euid miscdevfs handle (ignored)
* @buf: User buffer into which to copy the next message on the daemon queue
* @count: Amount of space available in @buf
* @ppos: Offset in file (ignored)
*
* Pulls the most recent message from the daemon queue, formats it for
* being sent via a miscdevfs handle, and copies it into @buf
*
* Returns the number of bytes copied into the user buffer
*/
static ssize_t
ecryptfs_miscdev_read(struct file *file, char __user *buf, size_t count,
loff_t *ppos)
{
struct ecryptfs_daemon *daemon;
struct ecryptfs_msg_ctx *msg_ctx;
size_t packet_length_size;
char packet_length[3];
size_t i;
size_t total_length;
uid_t euid = current_euid();
int rc;
mutex_lock(&ecryptfs_daemon_hash_mux);
/* TODO: Just use file->private_data? */
rc = ecryptfs_find_daemon_by_euid(&daemon, euid, current_user_ns());
BUG_ON(rc || !daemon);
mutex_lock(&daemon->mux);
if (daemon->flags & ECRYPTFS_DAEMON_ZOMBIE) {
rc = 0;
mutex_unlock(&ecryptfs_daemon_hash_mux);
printk(KERN_WARNING "%s: Attempt to read from zombified "
"daemon\n", __func__);
goto out_unlock_daemon;
}
if (daemon->flags & ECRYPTFS_DAEMON_IN_READ) {
rc = 0;
mutex_unlock(&ecryptfs_daemon_hash_mux);
goto out_unlock_daemon;
}
/* This daemon will not go away so long as this flag is set */
daemon->flags |= ECRYPTFS_DAEMON_IN_READ;
mutex_unlock(&ecryptfs_daemon_hash_mux);
check_list:
if (list_empty(&daemon->msg_ctx_out_queue)) {
mutex_unlock(&daemon->mux);
rc = wait_event_interruptible(
daemon->wait, !list_empty(&daemon->msg_ctx_out_queue));
mutex_lock(&daemon->mux);
if (rc < 0) {
rc = 0;
goto out_unlock_daemon;
}
}
if (daemon->flags & ECRYPTFS_DAEMON_ZOMBIE) {
rc = 0;
goto out_unlock_daemon;
}
if (list_empty(&daemon->msg_ctx_out_queue)) {
/* Something else jumped in since the
* wait_event_interruptable() and removed the
* message from the queue; try again */
goto check_list;
}
BUG_ON(euid != daemon->euid);
BUG_ON(current_user_ns() != daemon->user_ns);
BUG_ON(task_pid(current) != daemon->pid);
msg_ctx = list_first_entry(&daemon->msg_ctx_out_queue,
struct ecryptfs_msg_ctx, daemon_out_list);
BUG_ON(!msg_ctx);
mutex_lock(&msg_ctx->mux);
if (msg_ctx->msg) {
rc = ecryptfs_write_packet_length(packet_length,
msg_ctx->msg_size,
&packet_length_size);
if (rc) {
rc = 0;
printk(KERN_WARNING "%s: Error writing packet length; "
"rc = [%d]\n", __func__, rc);
goto out_unlock_msg_ctx;
}
} else {
packet_length_size = 0;
msg_ctx->msg_size = 0;
}
/* miscdevfs packet format:
* Octet 0: Type
* Octets 1-4: network byte order msg_ctx->counter
* Octets 5-N0: Size of struct ecryptfs_message to follow
* Octets N0-N1: struct ecryptfs_message (including data)
*
* Octets 5-N1 not written if the packet type does not
* include a message */
total_length = (1 + 4 + packet_length_size + msg_ctx->msg_size);
if (count < total_length) {
rc = 0;
printk(KERN_WARNING "%s: Only given user buffer of "
"size [%zd], but we need [%zd] to read the "
"pending message\n", __func__, count, total_length);
goto out_unlock_msg_ctx;
}
rc = -EFAULT;
if (put_user(msg_ctx->type, buf))
goto out_unlock_msg_ctx;
if (put_user(cpu_to_be32(msg_ctx->counter), (__be32 __user *)(buf + 1)))
goto out_unlock_msg_ctx;
i = 5;
if (msg_ctx->msg) {
if (copy_to_user(&buf[i], packet_length, packet_length_size))
goto out_unlock_msg_ctx;
i += packet_length_size;
if (copy_to_user(&buf[i], msg_ctx->msg, msg_ctx->msg_size))
goto out_unlock_msg_ctx;
i += msg_ctx->msg_size;
}
rc = i;
list_del(&msg_ctx->daemon_out_list);
kfree(msg_ctx->msg);
msg_ctx->msg = NULL;
/* We do not expect a reply from the userspace daemon for any
* message type other than ECRYPTFS_MSG_REQUEST */
if (msg_ctx->type != ECRYPTFS_MSG_REQUEST)
ecryptfs_msg_ctx_alloc_to_free(msg_ctx);
out_unlock_msg_ctx:
mutex_unlock(&msg_ctx->mux);
out_unlock_daemon:
daemon->flags &= ~ECRYPTFS_DAEMON_IN_READ;
mutex_unlock(&daemon->mux);
return rc;
}
/**
* ecryptfs_miscdev_response - miscdevess response to message previously sent to daemon
* @data: Bytes comprising struct ecryptfs_message
* @data_size: sizeof(struct ecryptfs_message) + data len
* @euid: Effective user id of miscdevess sending the miscdev response
* @user_ns: The namespace in which @euid applies
* @pid: Miscdevess id of miscdevess sending the miscdev response
* @seq: Sequence number for miscdev response packet
*
* Returns zero on success; non-zero otherwise
*/
static int ecryptfs_miscdev_response(char *data, size_t data_size,
uid_t euid, struct user_namespace *user_ns,
struct pid *pid, u32 seq)
{
struct ecryptfs_message *msg = (struct ecryptfs_message *)data;
int rc;
if ((sizeof(*msg) + msg->data_len) != data_size) {
printk(KERN_WARNING "%s: (sizeof(*msg) + msg->data_len) = "
"[%zd]; data_size = [%zd]. Invalid packet.\n", __func__,
(sizeof(*msg) + msg->data_len), data_size);
rc = -EINVAL;
goto out;
}
rc = ecryptfs_process_response(msg, euid, user_ns, pid, seq);
if (rc)
printk(KERN_ERR
"Error processing response message; rc = [%d]\n", rc);
out:
return rc;
}
/**
* ecryptfs_miscdev_write - handle write to daemon miscdev handle
* @file: File for misc dev handle (ignored)
* @buf: Buffer containing user data
* @count: Amount of data in @buf
* @ppos: Pointer to offset in file (ignored)
*
* miscdevfs packet format:
* Octet 0: Type
* Octets 1-4: network byte order msg_ctx->counter (0's for non-response)
* Octets 5-N0: Size of struct ecryptfs_message to follow
* Octets N0-N1: struct ecryptfs_message (including data)
*
* Returns the number of bytes read from @buf
*/
static ssize_t
ecryptfs_miscdev_write(struct file *file, const char __user *buf,
size_t count, loff_t *ppos)
{
__be32 counter_nbo;
u32 seq;
size_t packet_size, packet_size_length, i;
ssize_t sz = 0;
char *data;
uid_t euid = current_euid();
int rc;
if (count == 0)
goto out;
data = memdup_user(buf, count);
if (IS_ERR(data)) {
printk(KERN_ERR "%s: memdup_user returned error [%ld]\n",
__func__, PTR_ERR(data));
goto out;
}
sz = count;
i = 0;
switch (data[i++]) {
case ECRYPTFS_MSG_RESPONSE:
if (count < (1 + 4 + 1 + sizeof(struct ecryptfs_message))) {
printk(KERN_WARNING "%s: Minimum acceptable packet "
"size is [%zd], but amount of data written is "
"only [%zd]. Discarding response packet.\n",
__func__,
(1 + 4 + 1 + sizeof(struct ecryptfs_message)),
count);
goto out_free;
}
memcpy(&counter_nbo, &data[i], 4);
seq = be32_to_cpu(counter_nbo);
i += 4;
rc = ecryptfs_parse_packet_length(&data[i], &packet_size,
&packet_size_length);
if (rc) {
printk(KERN_WARNING "%s: Error parsing packet length; "
"rc = [%d]\n", __func__, rc);
goto out_free;
}
i += packet_size_length;
if ((1 + 4 + packet_size_length + packet_size) != count) {
printk(KERN_WARNING "%s: (1 + packet_size_length([%zd])"
" + packet_size([%zd]))([%zd]) != "
"count([%zd]). Invalid packet format.\n",
__func__, packet_size_length, packet_size,
(1 + packet_size_length + packet_size), count);
goto out_free;
}
rc = ecryptfs_miscdev_response(&data[i], packet_size,
euid, current_user_ns(),
task_pid(current), seq);
if (rc)
printk(KERN_WARNING "%s: Failed to deliver miscdev "
"response to requesting operation; rc = [%d]\n",
__func__, rc);
break;
case ECRYPTFS_MSG_HELO:
case ECRYPTFS_MSG_QUIT:
break;
default:
ecryptfs_printk(KERN_WARNING, "Dropping miscdev "
"message of unrecognized type [%d]\n",
data[0]);
break;
}
out_free:
kfree(data);
out:
return sz;
}
static const struct file_operations ecryptfs_miscdev_fops = {
.open = ecryptfs_miscdev_open,
.poll = ecryptfs_miscdev_poll,
.read = ecryptfs_miscdev_read,
.write = ecryptfs_miscdev_write,
.release = ecryptfs_miscdev_release,
};
static struct miscdevice ecryptfs_miscdev = {
.minor = MISC_DYNAMIC_MINOR,
.name = "ecryptfs",
.fops = &ecryptfs_miscdev_fops
};
/**
* ecryptfs_init_ecryptfs_miscdev
*
* Messages sent to the userspace daemon from the kernel are placed on
* a queue associated with the daemon. The next read against the
* miscdev handle by that daemon will return the oldest message placed
* on the message queue for the daemon.
*
* Returns zero on success; non-zero otherwise
*/
int __init ecryptfs_init_ecryptfs_miscdev(void)
{
int rc;
atomic_set(&ecryptfs_num_miscdev_opens, 0);
rc = misc_register(&ecryptfs_miscdev);
if (rc)
printk(KERN_ERR "%s: Failed to register miscellaneous device "
"for communications with userspace daemons; rc = [%d]\n",
__func__, rc);
return rc;
}
/**
* ecryptfs_destroy_ecryptfs_miscdev
*
* All of the daemons must be exorcised prior to calling this
* function.
*/
void ecryptfs_destroy_ecryptfs_miscdev(void)
{
BUG_ON(atomic_read(&ecryptfs_num_miscdev_opens) != 0);
misc_deregister(&ecryptfs_miscdev);
}
| gpl-2.0 |
stoshiya/homebrew | Library/Formula/gplcver.rb | 576 | require 'formula'
class Gplcver < Formula
desc "Pragmatic C Software GPL Cver 2001"
homepage 'http://gplcver.sourceforge.net/'
url 'https://downloads.sourceforge.net/project/gplcver/gplcver/2.12a/gplcver-2.12a.src.tar.bz2'
sha1 '946bb35b6279646c6e10c309922ed17deb2aca8a'
def install
inreplace 'src/makefile.osx' do |s|
s.gsub! '-mcpu=powerpc', ''
s.change_make_var! 'CFLAGS', "$(INCS) $(OPTFLGS) #{ENV.cflags}"
s.change_make_var! 'LFLAGS', ''
end
system "make", "-C", "src", "-f", "makefile.osx"
bin.install 'bin/cver'
end
end
| bsd-2-clause |
radhikabhanu/crowdsource-platform | staticfiles/bower_components/angular-strap/dist/modules/popover.tpl.js | 553 | /**
* angular-strap
* @version v2.1.2 - 2014-10-19
* @link http://mgcrea.github.io/angular-strap
* @author Olivier Louvignes ([email protected])
* @license MIT License, http://www.opensource.org/licenses/MIT
*/
'use strict';
angular.module('mgcrea.ngStrap.popover').run(['$templateCache', function($templateCache) {
$templateCache.put('popover/popover.tpl.html', '<div class="popover"><div class="arrow"></div><h3 class="popover-title" ng-bind="title" ng-show="title"></h3><div class="popover-content" ng-bind="content"></div></div>');
}]); | mit |
joshdrink/app_swig | wp-content/themes/brew/node_modules/grunt-contrib-nodeunit/node_modules/nodeunit/node_modules/tap/lib/tap-producer.js | 3516 | module.exports = TapProducer
var Results = require("./tap-results")
, inherits = require("inherits")
, yamlish = require("yamlish")
TapProducer.encode = function (result, diag) {
var tp = new TapProducer(diag)
, out = ""
tp.on("data", function (c) { out += c })
if (Array.isArray(result)) {
result.forEach(tp.write, tp)
} else tp.write(result)
tp.end()
return out
}
var Stream = require("stream").Stream
inherits(TapProducer, Stream)
function TapProducer (diag) {
Stream.call(this)
this.diag = diag
this.count = 0
this.readable = this.writable = true
this.results = new Results
}
TapProducer.prototype.trailer = true
TapProducer.prototype.write = function (res) {
// console.error("TapProducer.write", res)
if (typeof res === "function") throw new Error("wtf?")
if (!this.writable) this.emit("error", new Error("not writable"))
if (!this._didHead) {
this.emit("data", "TAP version 13\n")
this._didHead = true
}
var diag = res.diag
if (diag === undefined) diag = this.diag
this.emit("data", encodeResult(res, this.count + 1, diag))
if (typeof res === "string") return true
if (res.bailout) {
var bo = "bail out!"
if (typeof res.bailout === "string") bo += " " + res.bailout
this.emit("data", bo)
return
}
this.results.add(res, false)
this.count ++
}
TapProducer.prototype.end = function (res) {
if (res) this.write(res)
// console.error("TapProducer end", res, this.results)
this.emit("data", "\n1.."+this.results.testsTotal+"\n")
if (this.trailer && typeof this.trailer !== "string") {
// summary trailer.
var trailer = "tests "+this.results.testsTotal + "\n"
if (this.results.pass) {
trailer += "pass " + this.results.pass + "\n"
}
if (this.results.fail) {
trailer += "fail " + this.results.fail + "\n"
}
if (this.results.skip) {
trailer += "skip "+this.results.skip + "\n"
}
if (this.results.todo) {
trailer += "todo "+this.results.todo + "\n"
}
if (this.results.bailedOut) {
trailer += "bailed out" + "\n"
}
if (this.results.testsTotal === this.results.pass) {
trailer += "\nok\n"
}
this.trailer = trailer
}
if (this.trailer) this.write(this.trailer)
this.writable = false
this.emit("end", null, this.count, this.ok)
}
function encodeResult (res, count, diag) {
// console.error(res, count, diag)
if (typeof res === "string") {
res = res.split(/\r?\n/).map(function (l) {
if (!l.trim()) return l.trim()
return "# " + l
}).join("\n")
if (res.substr(-1) !== "\n") res += "\n"
return res
}
if (res.bailout) return ""
if (!!process.env.TAP_NODIAG) diag = false
else if (!!process.env.TAP_DIAG) diag = true
else if (diag === undefined) diag = !res.ok
var output = ""
res.name = res.name && ("" + res.name).trim()
output += ( !res.ok ? "not " : "") + "ok " + count
+ ( !res.name ? ""
: " " + res.name.replace(/[\r\n]/g, " ") )
+ ( res.skip ? " # SKIP " + ( res.explanation || "" )
: res.todo ? " # TODO " + ( res.explanation || "" )
: "" )
+ "\n"
if (!diag) return output
var d = {}
, dc = 0
Object.keys(res).filter(function (k) {
return k !== "ok" && k !== "name" && k !== "id"
}).forEach(function (k) {
dc ++
d[k] = res[k]
})
//console.error(d, "about to encode")
if (dc > 0) output += " ---"+yamlish.encode(d)+"\n ...\n"
return output
}
| gpl-2.0 |
BPI-SINOVOIP/BPI-Mainline-kernel | linux-4.14/drivers/regulator/bd9571mwv-regulator.c | 5031 | /*
* ROHM BD9571MWV-M regulator driver
*
* Copyright (C) 2017 Marek Vasut <[email protected]>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether expressed or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License version 2 for more details.
*
* Based on the TPS65086 driver
*
* NOTE: VD09 is missing
*/
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/regulator/driver.h>
#include <linux/mfd/bd9571mwv.h>
enum bd9571mwv_regulators { VD09, VD18, VD25, VD33, DVFS };
#define BD9571MWV_REG(_name, _of, _id, _ops, _vr, _vm, _nv, _min, _step, _lmin)\
{ \
.name = _name, \
.of_match = of_match_ptr(_of), \
.regulators_node = "regulators", \
.id = _id, \
.ops = &_ops, \
.n_voltages = _nv, \
.type = REGULATOR_VOLTAGE, \
.owner = THIS_MODULE, \
.vsel_reg = _vr, \
.vsel_mask = _vm, \
.min_uV = _min, \
.uV_step = _step, \
.linear_min_sel = _lmin, \
}
static int bd9571mwv_avs_get_moni_state(struct regulator_dev *rdev)
{
unsigned int val;
int ret;
ret = regmap_read(rdev->regmap, BD9571MWV_AVS_SET_MONI, &val);
if (ret != 0)
return ret;
return val & BD9571MWV_AVS_SET_MONI_MASK;
}
static int bd9571mwv_avs_set_voltage_sel_regmap(struct regulator_dev *rdev,
unsigned int sel)
{
int ret;
ret = bd9571mwv_avs_get_moni_state(rdev);
if (ret < 0)
return ret;
return regmap_write_bits(rdev->regmap, BD9571MWV_AVS_VD09_VID(ret),
rdev->desc->vsel_mask, sel);
}
static int bd9571mwv_avs_get_voltage_sel_regmap(struct regulator_dev *rdev)
{
unsigned int val;
int ret;
ret = bd9571mwv_avs_get_moni_state(rdev);
if (ret < 0)
return ret;
ret = regmap_read(rdev->regmap, BD9571MWV_AVS_VD09_VID(ret), &val);
if (ret != 0)
return ret;
val &= rdev->desc->vsel_mask;
val >>= ffs(rdev->desc->vsel_mask) - 1;
return val;
}
static int bd9571mwv_reg_set_voltage_sel_regmap(struct regulator_dev *rdev,
unsigned int sel)
{
return regmap_write_bits(rdev->regmap, BD9571MWV_DVFS_SETVID,
rdev->desc->vsel_mask, sel);
}
/* Operations permitted on AVS voltage regulator */
static struct regulator_ops avs_ops = {
.set_voltage_sel = bd9571mwv_avs_set_voltage_sel_regmap,
.map_voltage = regulator_map_voltage_linear,
.get_voltage_sel = bd9571mwv_avs_get_voltage_sel_regmap,
.list_voltage = regulator_list_voltage_linear,
};
/* Operations permitted on voltage regulators */
static struct regulator_ops reg_ops = {
.set_voltage_sel = bd9571mwv_reg_set_voltage_sel_regmap,
.map_voltage = regulator_map_voltage_linear,
.get_voltage_sel = regulator_get_voltage_sel_regmap,
.list_voltage = regulator_list_voltage_linear,
};
/* Operations permitted on voltage monitors */
static struct regulator_ops vid_ops = {
.map_voltage = regulator_map_voltage_linear,
.get_voltage_sel = regulator_get_voltage_sel_regmap,
.list_voltage = regulator_list_voltage_linear,
};
static struct regulator_desc regulators[] = {
BD9571MWV_REG("VD09", "vd09", VD09, avs_ops, 0, 0x7f,
0x80, 600000, 10000, 0x3c),
BD9571MWV_REG("VD18", "vd18", VD18, vid_ops, BD9571MWV_VD18_VID, 0xf,
16, 1625000, 25000, 0),
BD9571MWV_REG("VD25", "vd25", VD25, vid_ops, BD9571MWV_VD25_VID, 0xf,
16, 2150000, 50000, 0),
BD9571MWV_REG("VD33", "vd33", VD33, vid_ops, BD9571MWV_VD33_VID, 0xf,
11, 2800000, 100000, 0),
BD9571MWV_REG("DVFS", "dvfs", DVFS, reg_ops,
BD9571MWV_DVFS_MONIVDAC, 0x7f,
0x80, 600000, 10000, 0x3c),
};
static int bd9571mwv_regulator_probe(struct platform_device *pdev)
{
struct bd9571mwv *bd = dev_get_drvdata(pdev->dev.parent);
struct regulator_config config = { };
struct regulator_dev *rdev;
int i;
platform_set_drvdata(pdev, bd);
config.dev = &pdev->dev;
config.dev->of_node = bd->dev->of_node;
config.driver_data = bd;
config.regmap = bd->regmap;
for (i = 0; i < ARRAY_SIZE(regulators); i++) {
rdev = devm_regulator_register(&pdev->dev, ®ulators[i],
&config);
if (IS_ERR(rdev)) {
dev_err(bd->dev, "failed to register %s regulator\n",
pdev->name);
return PTR_ERR(rdev);
}
}
return 0;
}
static const struct platform_device_id bd9571mwv_regulator_id_table[] = {
{ "bd9571mwv-regulator", },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(platform, bd9571mwv_regulator_id_table);
static struct platform_driver bd9571mwv_regulator_driver = {
.driver = {
.name = "bd9571mwv-regulator",
},
.probe = bd9571mwv_regulator_probe,
.id_table = bd9571mwv_regulator_id_table,
};
module_platform_driver(bd9571mwv_regulator_driver);
MODULE_AUTHOR("Marek Vasut <[email protected]>");
MODULE_DESCRIPTION("BD9571MWV Regulator driver");
MODULE_LICENSE("GPL v2");
| gpl-2.0 |
kadel/kedge | vendor/github.com/openshift/origin/cmd/service-catalog/go/src/github.com/kubernetes-incubator/service-catalog/vendor/github.com/gogo/protobuf/test/oneof/combos/unsafeboth/one.pb.go | 156343 | // Code generated by protoc-gen-gogo.
// source: combos/unsafeboth/one.proto
// DO NOT EDIT!
/*
Package one is a generated protocol buffer package.
It is generated from these files:
combos/unsafeboth/one.proto
It has these top-level messages:
Subby
AllTypesOneOf
TwoOneofs
CustomOneof
*/
package one
import proto "github.com/gogo/protobuf/proto"
import fmt "fmt"
import math "math"
import _ "github.com/gogo/protobuf/gogoproto"
import github_com_gogo_protobuf_test_custom "github.com/gogo/protobuf/test/custom"
import github_com_gogo_protobuf_test_casttype "github.com/gogo/protobuf/test/casttype"
import github_com_gogo_protobuf_protoc_gen_gogo_descriptor "github.com/gogo/protobuf/protoc-gen-gogo/descriptor"
import github_com_gogo_protobuf_proto "github.com/gogo/protobuf/proto"
import compress_gzip "compress/gzip"
import bytes "bytes"
import io_ioutil "io/ioutil"
import strings "strings"
import reflect "reflect"
import unsafe "unsafe"
import io "io"
// Reference imports to suppress errors if they are not otherwise used.
var _ = proto.Marshal
var _ = fmt.Errorf
var _ = math.Inf
// This is a compile-time assertion to ensure that this generated file
// is compatible with the proto package it is being compiled against.
// A compilation error at this line likely means your copy of the
// proto package needs to be updated.
const _ = proto.GoGoProtoPackageIsVersion2 // please upgrade the proto package
type Subby struct {
Sub *string `protobuf:"bytes,1,opt,name=sub" json:"sub,omitempty"`
XXX_unrecognized []byte `json:"-"`
}
func (m *Subby) Reset() { *m = Subby{} }
func (*Subby) ProtoMessage() {}
func (*Subby) Descriptor() ([]byte, []int) { return fileDescriptorOne, []int{0} }
type AllTypesOneOf struct {
// Types that are valid to be assigned to TestOneof:
// *AllTypesOneOf_Field1
// *AllTypesOneOf_Field2
// *AllTypesOneOf_Field3
// *AllTypesOneOf_Field4
// *AllTypesOneOf_Field5
// *AllTypesOneOf_Field6
// *AllTypesOneOf_Field7
// *AllTypesOneOf_Field8
// *AllTypesOneOf_Field9
// *AllTypesOneOf_Field10
// *AllTypesOneOf_Field11
// *AllTypesOneOf_Field12
// *AllTypesOneOf_Field13
// *AllTypesOneOf_Field14
// *AllTypesOneOf_Field15
// *AllTypesOneOf_SubMessage
TestOneof isAllTypesOneOf_TestOneof `protobuf_oneof:"test_oneof"`
XXX_unrecognized []byte `json:"-"`
}
func (m *AllTypesOneOf) Reset() { *m = AllTypesOneOf{} }
func (*AllTypesOneOf) ProtoMessage() {}
func (*AllTypesOneOf) Descriptor() ([]byte, []int) { return fileDescriptorOne, []int{1} }
type isAllTypesOneOf_TestOneof interface {
isAllTypesOneOf_TestOneof()
Equal(interface{}) bool
VerboseEqual(interface{}) error
MarshalTo([]byte) (int, error)
Size() int
}
type AllTypesOneOf_Field1 struct {
Field1 float64 `protobuf:"fixed64,1,opt,name=Field1,oneof"`
}
type AllTypesOneOf_Field2 struct {
Field2 float32 `protobuf:"fixed32,2,opt,name=Field2,oneof"`
}
type AllTypesOneOf_Field3 struct {
Field3 int32 `protobuf:"varint,3,opt,name=Field3,oneof"`
}
type AllTypesOneOf_Field4 struct {
Field4 int64 `protobuf:"varint,4,opt,name=Field4,oneof"`
}
type AllTypesOneOf_Field5 struct {
Field5 uint32 `protobuf:"varint,5,opt,name=Field5,oneof"`
}
type AllTypesOneOf_Field6 struct {
Field6 uint64 `protobuf:"varint,6,opt,name=Field6,oneof"`
}
type AllTypesOneOf_Field7 struct {
Field7 int32 `protobuf:"zigzag32,7,opt,name=Field7,oneof"`
}
type AllTypesOneOf_Field8 struct {
Field8 int64 `protobuf:"zigzag64,8,opt,name=Field8,oneof"`
}
type AllTypesOneOf_Field9 struct {
Field9 uint32 `protobuf:"fixed32,9,opt,name=Field9,oneof"`
}
type AllTypesOneOf_Field10 struct {
Field10 int32 `protobuf:"fixed32,10,opt,name=Field10,oneof"`
}
type AllTypesOneOf_Field11 struct {
Field11 uint64 `protobuf:"fixed64,11,opt,name=Field11,oneof"`
}
type AllTypesOneOf_Field12 struct {
Field12 int64 `protobuf:"fixed64,12,opt,name=Field12,oneof"`
}
type AllTypesOneOf_Field13 struct {
Field13 bool `protobuf:"varint,13,opt,name=Field13,oneof"`
}
type AllTypesOneOf_Field14 struct {
Field14 string `protobuf:"bytes,14,opt,name=Field14,oneof"`
}
type AllTypesOneOf_Field15 struct {
Field15 []byte `protobuf:"bytes,15,opt,name=Field15,oneof"`
}
type AllTypesOneOf_SubMessage struct {
SubMessage *Subby `protobuf:"bytes,16,opt,name=sub_message,json=subMessage,oneof"`
}
func (*AllTypesOneOf_Field1) isAllTypesOneOf_TestOneof() {}
func (*AllTypesOneOf_Field2) isAllTypesOneOf_TestOneof() {}
func (*AllTypesOneOf_Field3) isAllTypesOneOf_TestOneof() {}
func (*AllTypesOneOf_Field4) isAllTypesOneOf_TestOneof() {}
func (*AllTypesOneOf_Field5) isAllTypesOneOf_TestOneof() {}
func (*AllTypesOneOf_Field6) isAllTypesOneOf_TestOneof() {}
func (*AllTypesOneOf_Field7) isAllTypesOneOf_TestOneof() {}
func (*AllTypesOneOf_Field8) isAllTypesOneOf_TestOneof() {}
func (*AllTypesOneOf_Field9) isAllTypesOneOf_TestOneof() {}
func (*AllTypesOneOf_Field10) isAllTypesOneOf_TestOneof() {}
func (*AllTypesOneOf_Field11) isAllTypesOneOf_TestOneof() {}
func (*AllTypesOneOf_Field12) isAllTypesOneOf_TestOneof() {}
func (*AllTypesOneOf_Field13) isAllTypesOneOf_TestOneof() {}
func (*AllTypesOneOf_Field14) isAllTypesOneOf_TestOneof() {}
func (*AllTypesOneOf_Field15) isAllTypesOneOf_TestOneof() {}
func (*AllTypesOneOf_SubMessage) isAllTypesOneOf_TestOneof() {}
func (m *AllTypesOneOf) GetTestOneof() isAllTypesOneOf_TestOneof {
if m != nil {
return m.TestOneof
}
return nil
}
func (m *AllTypesOneOf) GetField1() float64 {
if x, ok := m.GetTestOneof().(*AllTypesOneOf_Field1); ok {
return x.Field1
}
return 0
}
func (m *AllTypesOneOf) GetField2() float32 {
if x, ok := m.GetTestOneof().(*AllTypesOneOf_Field2); ok {
return x.Field2
}
return 0
}
func (m *AllTypesOneOf) GetField3() int32 {
if x, ok := m.GetTestOneof().(*AllTypesOneOf_Field3); ok {
return x.Field3
}
return 0
}
func (m *AllTypesOneOf) GetField4() int64 {
if x, ok := m.GetTestOneof().(*AllTypesOneOf_Field4); ok {
return x.Field4
}
return 0
}
func (m *AllTypesOneOf) GetField5() uint32 {
if x, ok := m.GetTestOneof().(*AllTypesOneOf_Field5); ok {
return x.Field5
}
return 0
}
func (m *AllTypesOneOf) GetField6() uint64 {
if x, ok := m.GetTestOneof().(*AllTypesOneOf_Field6); ok {
return x.Field6
}
return 0
}
func (m *AllTypesOneOf) GetField7() int32 {
if x, ok := m.GetTestOneof().(*AllTypesOneOf_Field7); ok {
return x.Field7
}
return 0
}
func (m *AllTypesOneOf) GetField8() int64 {
if x, ok := m.GetTestOneof().(*AllTypesOneOf_Field8); ok {
return x.Field8
}
return 0
}
func (m *AllTypesOneOf) GetField9() uint32 {
if x, ok := m.GetTestOneof().(*AllTypesOneOf_Field9); ok {
return x.Field9
}
return 0
}
func (m *AllTypesOneOf) GetField10() int32 {
if x, ok := m.GetTestOneof().(*AllTypesOneOf_Field10); ok {
return x.Field10
}
return 0
}
func (m *AllTypesOneOf) GetField11() uint64 {
if x, ok := m.GetTestOneof().(*AllTypesOneOf_Field11); ok {
return x.Field11
}
return 0
}
func (m *AllTypesOneOf) GetField12() int64 {
if x, ok := m.GetTestOneof().(*AllTypesOneOf_Field12); ok {
return x.Field12
}
return 0
}
func (m *AllTypesOneOf) GetField13() bool {
if x, ok := m.GetTestOneof().(*AllTypesOneOf_Field13); ok {
return x.Field13
}
return false
}
func (m *AllTypesOneOf) GetField14() string {
if x, ok := m.GetTestOneof().(*AllTypesOneOf_Field14); ok {
return x.Field14
}
return ""
}
func (m *AllTypesOneOf) GetField15() []byte {
if x, ok := m.GetTestOneof().(*AllTypesOneOf_Field15); ok {
return x.Field15
}
return nil
}
func (m *AllTypesOneOf) GetSubMessage() *Subby {
if x, ok := m.GetTestOneof().(*AllTypesOneOf_SubMessage); ok {
return x.SubMessage
}
return nil
}
// XXX_OneofFuncs is for the internal use of the proto package.
func (*AllTypesOneOf) XXX_OneofFuncs() (func(msg proto.Message, b *proto.Buffer) error, func(msg proto.Message, tag, wire int, b *proto.Buffer) (bool, error), func(msg proto.Message) (n int), []interface{}) {
return _AllTypesOneOf_OneofMarshaler, _AllTypesOneOf_OneofUnmarshaler, _AllTypesOneOf_OneofSizer, []interface{}{
(*AllTypesOneOf_Field1)(nil),
(*AllTypesOneOf_Field2)(nil),
(*AllTypesOneOf_Field3)(nil),
(*AllTypesOneOf_Field4)(nil),
(*AllTypesOneOf_Field5)(nil),
(*AllTypesOneOf_Field6)(nil),
(*AllTypesOneOf_Field7)(nil),
(*AllTypesOneOf_Field8)(nil),
(*AllTypesOneOf_Field9)(nil),
(*AllTypesOneOf_Field10)(nil),
(*AllTypesOneOf_Field11)(nil),
(*AllTypesOneOf_Field12)(nil),
(*AllTypesOneOf_Field13)(nil),
(*AllTypesOneOf_Field14)(nil),
(*AllTypesOneOf_Field15)(nil),
(*AllTypesOneOf_SubMessage)(nil),
}
}
func _AllTypesOneOf_OneofMarshaler(msg proto.Message, b *proto.Buffer) error {
m := msg.(*AllTypesOneOf)
// test_oneof
switch x := m.TestOneof.(type) {
case *AllTypesOneOf_Field1:
_ = b.EncodeVarint(1<<3 | proto.WireFixed64)
_ = b.EncodeFixed64(math.Float64bits(x.Field1))
case *AllTypesOneOf_Field2:
_ = b.EncodeVarint(2<<3 | proto.WireFixed32)
_ = b.EncodeFixed32(uint64(math.Float32bits(x.Field2)))
case *AllTypesOneOf_Field3:
_ = b.EncodeVarint(3<<3 | proto.WireVarint)
_ = b.EncodeVarint(uint64(x.Field3))
case *AllTypesOneOf_Field4:
_ = b.EncodeVarint(4<<3 | proto.WireVarint)
_ = b.EncodeVarint(uint64(x.Field4))
case *AllTypesOneOf_Field5:
_ = b.EncodeVarint(5<<3 | proto.WireVarint)
_ = b.EncodeVarint(uint64(x.Field5))
case *AllTypesOneOf_Field6:
_ = b.EncodeVarint(6<<3 | proto.WireVarint)
_ = b.EncodeVarint(uint64(x.Field6))
case *AllTypesOneOf_Field7:
_ = b.EncodeVarint(7<<3 | proto.WireVarint)
_ = b.EncodeZigzag32(uint64(x.Field7))
case *AllTypesOneOf_Field8:
_ = b.EncodeVarint(8<<3 | proto.WireVarint)
_ = b.EncodeZigzag64(uint64(x.Field8))
case *AllTypesOneOf_Field9:
_ = b.EncodeVarint(9<<3 | proto.WireFixed32)
_ = b.EncodeFixed32(uint64(x.Field9))
case *AllTypesOneOf_Field10:
_ = b.EncodeVarint(10<<3 | proto.WireFixed32)
_ = b.EncodeFixed32(uint64(x.Field10))
case *AllTypesOneOf_Field11:
_ = b.EncodeVarint(11<<3 | proto.WireFixed64)
_ = b.EncodeFixed64(uint64(x.Field11))
case *AllTypesOneOf_Field12:
_ = b.EncodeVarint(12<<3 | proto.WireFixed64)
_ = b.EncodeFixed64(uint64(x.Field12))
case *AllTypesOneOf_Field13:
t := uint64(0)
if x.Field13 {
t = 1
}
_ = b.EncodeVarint(13<<3 | proto.WireVarint)
_ = b.EncodeVarint(t)
case *AllTypesOneOf_Field14:
_ = b.EncodeVarint(14<<3 | proto.WireBytes)
_ = b.EncodeStringBytes(x.Field14)
case *AllTypesOneOf_Field15:
_ = b.EncodeVarint(15<<3 | proto.WireBytes)
_ = b.EncodeRawBytes(x.Field15)
case *AllTypesOneOf_SubMessage:
_ = b.EncodeVarint(16<<3 | proto.WireBytes)
if err := b.EncodeMessage(x.SubMessage); err != nil {
return err
}
case nil:
default:
return fmt.Errorf("AllTypesOneOf.TestOneof has unexpected type %T", x)
}
return nil
}
func _AllTypesOneOf_OneofUnmarshaler(msg proto.Message, tag, wire int, b *proto.Buffer) (bool, error) {
m := msg.(*AllTypesOneOf)
switch tag {
case 1: // test_oneof.Field1
if wire != proto.WireFixed64 {
return true, proto.ErrInternalBadWireType
}
x, err := b.DecodeFixed64()
m.TestOneof = &AllTypesOneOf_Field1{math.Float64frombits(x)}
return true, err
case 2: // test_oneof.Field2
if wire != proto.WireFixed32 {
return true, proto.ErrInternalBadWireType
}
x, err := b.DecodeFixed32()
m.TestOneof = &AllTypesOneOf_Field2{math.Float32frombits(uint32(x))}
return true, err
case 3: // test_oneof.Field3
if wire != proto.WireVarint {
return true, proto.ErrInternalBadWireType
}
x, err := b.DecodeVarint()
m.TestOneof = &AllTypesOneOf_Field3{int32(x)}
return true, err
case 4: // test_oneof.Field4
if wire != proto.WireVarint {
return true, proto.ErrInternalBadWireType
}
x, err := b.DecodeVarint()
m.TestOneof = &AllTypesOneOf_Field4{int64(x)}
return true, err
case 5: // test_oneof.Field5
if wire != proto.WireVarint {
return true, proto.ErrInternalBadWireType
}
x, err := b.DecodeVarint()
m.TestOneof = &AllTypesOneOf_Field5{uint32(x)}
return true, err
case 6: // test_oneof.Field6
if wire != proto.WireVarint {
return true, proto.ErrInternalBadWireType
}
x, err := b.DecodeVarint()
m.TestOneof = &AllTypesOneOf_Field6{x}
return true, err
case 7: // test_oneof.Field7
if wire != proto.WireVarint {
return true, proto.ErrInternalBadWireType
}
x, err := b.DecodeZigzag32()
m.TestOneof = &AllTypesOneOf_Field7{int32(x)}
return true, err
case 8: // test_oneof.Field8
if wire != proto.WireVarint {
return true, proto.ErrInternalBadWireType
}
x, err := b.DecodeZigzag64()
m.TestOneof = &AllTypesOneOf_Field8{int64(x)}
return true, err
case 9: // test_oneof.Field9
if wire != proto.WireFixed32 {
return true, proto.ErrInternalBadWireType
}
x, err := b.DecodeFixed32()
m.TestOneof = &AllTypesOneOf_Field9{uint32(x)}
return true, err
case 10: // test_oneof.Field10
if wire != proto.WireFixed32 {
return true, proto.ErrInternalBadWireType
}
x, err := b.DecodeFixed32()
m.TestOneof = &AllTypesOneOf_Field10{int32(x)}
return true, err
case 11: // test_oneof.Field11
if wire != proto.WireFixed64 {
return true, proto.ErrInternalBadWireType
}
x, err := b.DecodeFixed64()
m.TestOneof = &AllTypesOneOf_Field11{x}
return true, err
case 12: // test_oneof.Field12
if wire != proto.WireFixed64 {
return true, proto.ErrInternalBadWireType
}
x, err := b.DecodeFixed64()
m.TestOneof = &AllTypesOneOf_Field12{int64(x)}
return true, err
case 13: // test_oneof.Field13
if wire != proto.WireVarint {
return true, proto.ErrInternalBadWireType
}
x, err := b.DecodeVarint()
m.TestOneof = &AllTypesOneOf_Field13{x != 0}
return true, err
case 14: // test_oneof.Field14
if wire != proto.WireBytes {
return true, proto.ErrInternalBadWireType
}
x, err := b.DecodeStringBytes()
m.TestOneof = &AllTypesOneOf_Field14{x}
return true, err
case 15: // test_oneof.Field15
if wire != proto.WireBytes {
return true, proto.ErrInternalBadWireType
}
x, err := b.DecodeRawBytes(true)
m.TestOneof = &AllTypesOneOf_Field15{x}
return true, err
case 16: // test_oneof.sub_message
if wire != proto.WireBytes {
return true, proto.ErrInternalBadWireType
}
msg := new(Subby)
err := b.DecodeMessage(msg)
m.TestOneof = &AllTypesOneOf_SubMessage{msg}
return true, err
default:
return false, nil
}
}
func _AllTypesOneOf_OneofSizer(msg proto.Message) (n int) {
m := msg.(*AllTypesOneOf)
// test_oneof
switch x := m.TestOneof.(type) {
case *AllTypesOneOf_Field1:
n += proto.SizeVarint(1<<3 | proto.WireFixed64)
n += 8
case *AllTypesOneOf_Field2:
n += proto.SizeVarint(2<<3 | proto.WireFixed32)
n += 4
case *AllTypesOneOf_Field3:
n += proto.SizeVarint(3<<3 | proto.WireVarint)
n += proto.SizeVarint(uint64(x.Field3))
case *AllTypesOneOf_Field4:
n += proto.SizeVarint(4<<3 | proto.WireVarint)
n += proto.SizeVarint(uint64(x.Field4))
case *AllTypesOneOf_Field5:
n += proto.SizeVarint(5<<3 | proto.WireVarint)
n += proto.SizeVarint(uint64(x.Field5))
case *AllTypesOneOf_Field6:
n += proto.SizeVarint(6<<3 | proto.WireVarint)
n += proto.SizeVarint(uint64(x.Field6))
case *AllTypesOneOf_Field7:
n += proto.SizeVarint(7<<3 | proto.WireVarint)
n += proto.SizeVarint(uint64((uint32(x.Field7) << 1) ^ uint32((int32(x.Field7) >> 31))))
case *AllTypesOneOf_Field8:
n += proto.SizeVarint(8<<3 | proto.WireVarint)
n += proto.SizeVarint(uint64(uint64(x.Field8<<1) ^ uint64((int64(x.Field8) >> 63))))
case *AllTypesOneOf_Field9:
n += proto.SizeVarint(9<<3 | proto.WireFixed32)
n += 4
case *AllTypesOneOf_Field10:
n += proto.SizeVarint(10<<3 | proto.WireFixed32)
n += 4
case *AllTypesOneOf_Field11:
n += proto.SizeVarint(11<<3 | proto.WireFixed64)
n += 8
case *AllTypesOneOf_Field12:
n += proto.SizeVarint(12<<3 | proto.WireFixed64)
n += 8
case *AllTypesOneOf_Field13:
n += proto.SizeVarint(13<<3 | proto.WireVarint)
n += 1
case *AllTypesOneOf_Field14:
n += proto.SizeVarint(14<<3 | proto.WireBytes)
n += proto.SizeVarint(uint64(len(x.Field14)))
n += len(x.Field14)
case *AllTypesOneOf_Field15:
n += proto.SizeVarint(15<<3 | proto.WireBytes)
n += proto.SizeVarint(uint64(len(x.Field15)))
n += len(x.Field15)
case *AllTypesOneOf_SubMessage:
s := proto.Size(x.SubMessage)
n += proto.SizeVarint(16<<3 | proto.WireBytes)
n += proto.SizeVarint(uint64(s))
n += s
case nil:
default:
panic(fmt.Sprintf("proto: unexpected type %T in oneof", x))
}
return n
}
type TwoOneofs struct {
// Types that are valid to be assigned to One:
// *TwoOneofs_Field1
// *TwoOneofs_Field2
// *TwoOneofs_Field3
One isTwoOneofs_One `protobuf_oneof:"one"`
// Types that are valid to be assigned to Two:
// *TwoOneofs_Field34
// *TwoOneofs_Field35
// *TwoOneofs_SubMessage2
Two isTwoOneofs_Two `protobuf_oneof:"two"`
XXX_unrecognized []byte `json:"-"`
}
func (m *TwoOneofs) Reset() { *m = TwoOneofs{} }
func (*TwoOneofs) ProtoMessage() {}
func (*TwoOneofs) Descriptor() ([]byte, []int) { return fileDescriptorOne, []int{2} }
type isTwoOneofs_One interface {
isTwoOneofs_One()
Equal(interface{}) bool
VerboseEqual(interface{}) error
MarshalTo([]byte) (int, error)
Size() int
}
type isTwoOneofs_Two interface {
isTwoOneofs_Two()
Equal(interface{}) bool
VerboseEqual(interface{}) error
MarshalTo([]byte) (int, error)
Size() int
}
type TwoOneofs_Field1 struct {
Field1 float64 `protobuf:"fixed64,1,opt,name=Field1,oneof"`
}
type TwoOneofs_Field2 struct {
Field2 float32 `protobuf:"fixed32,2,opt,name=Field2,oneof"`
}
type TwoOneofs_Field3 struct {
Field3 int32 `protobuf:"varint,3,opt,name=Field3,oneof"`
}
type TwoOneofs_Field34 struct {
Field34 string `protobuf:"bytes,34,opt,name=Field34,oneof"`
}
type TwoOneofs_Field35 struct {
Field35 []byte `protobuf:"bytes,35,opt,name=Field35,oneof"`
}
type TwoOneofs_SubMessage2 struct {
SubMessage2 *Subby `protobuf:"bytes,36,opt,name=sub_message2,json=subMessage2,oneof"`
}
func (*TwoOneofs_Field1) isTwoOneofs_One() {}
func (*TwoOneofs_Field2) isTwoOneofs_One() {}
func (*TwoOneofs_Field3) isTwoOneofs_One() {}
func (*TwoOneofs_Field34) isTwoOneofs_Two() {}
func (*TwoOneofs_Field35) isTwoOneofs_Two() {}
func (*TwoOneofs_SubMessage2) isTwoOneofs_Two() {}
func (m *TwoOneofs) GetOne() isTwoOneofs_One {
if m != nil {
return m.One
}
return nil
}
func (m *TwoOneofs) GetTwo() isTwoOneofs_Two {
if m != nil {
return m.Two
}
return nil
}
func (m *TwoOneofs) GetField1() float64 {
if x, ok := m.GetOne().(*TwoOneofs_Field1); ok {
return x.Field1
}
return 0
}
func (m *TwoOneofs) GetField2() float32 {
if x, ok := m.GetOne().(*TwoOneofs_Field2); ok {
return x.Field2
}
return 0
}
func (m *TwoOneofs) GetField3() int32 {
if x, ok := m.GetOne().(*TwoOneofs_Field3); ok {
return x.Field3
}
return 0
}
func (m *TwoOneofs) GetField34() string {
if x, ok := m.GetTwo().(*TwoOneofs_Field34); ok {
return x.Field34
}
return ""
}
func (m *TwoOneofs) GetField35() []byte {
if x, ok := m.GetTwo().(*TwoOneofs_Field35); ok {
return x.Field35
}
return nil
}
func (m *TwoOneofs) GetSubMessage2() *Subby {
if x, ok := m.GetTwo().(*TwoOneofs_SubMessage2); ok {
return x.SubMessage2
}
return nil
}
// XXX_OneofFuncs is for the internal use of the proto package.
func (*TwoOneofs) XXX_OneofFuncs() (func(msg proto.Message, b *proto.Buffer) error, func(msg proto.Message, tag, wire int, b *proto.Buffer) (bool, error), func(msg proto.Message) (n int), []interface{}) {
return _TwoOneofs_OneofMarshaler, _TwoOneofs_OneofUnmarshaler, _TwoOneofs_OneofSizer, []interface{}{
(*TwoOneofs_Field1)(nil),
(*TwoOneofs_Field2)(nil),
(*TwoOneofs_Field3)(nil),
(*TwoOneofs_Field34)(nil),
(*TwoOneofs_Field35)(nil),
(*TwoOneofs_SubMessage2)(nil),
}
}
func _TwoOneofs_OneofMarshaler(msg proto.Message, b *proto.Buffer) error {
m := msg.(*TwoOneofs)
// one
switch x := m.One.(type) {
case *TwoOneofs_Field1:
_ = b.EncodeVarint(1<<3 | proto.WireFixed64)
_ = b.EncodeFixed64(math.Float64bits(x.Field1))
case *TwoOneofs_Field2:
_ = b.EncodeVarint(2<<3 | proto.WireFixed32)
_ = b.EncodeFixed32(uint64(math.Float32bits(x.Field2)))
case *TwoOneofs_Field3:
_ = b.EncodeVarint(3<<3 | proto.WireVarint)
_ = b.EncodeVarint(uint64(x.Field3))
case nil:
default:
return fmt.Errorf("TwoOneofs.One has unexpected type %T", x)
}
// two
switch x := m.Two.(type) {
case *TwoOneofs_Field34:
_ = b.EncodeVarint(34<<3 | proto.WireBytes)
_ = b.EncodeStringBytes(x.Field34)
case *TwoOneofs_Field35:
_ = b.EncodeVarint(35<<3 | proto.WireBytes)
_ = b.EncodeRawBytes(x.Field35)
case *TwoOneofs_SubMessage2:
_ = b.EncodeVarint(36<<3 | proto.WireBytes)
if err := b.EncodeMessage(x.SubMessage2); err != nil {
return err
}
case nil:
default:
return fmt.Errorf("TwoOneofs.Two has unexpected type %T", x)
}
return nil
}
func _TwoOneofs_OneofUnmarshaler(msg proto.Message, tag, wire int, b *proto.Buffer) (bool, error) {
m := msg.(*TwoOneofs)
switch tag {
case 1: // one.Field1
if wire != proto.WireFixed64 {
return true, proto.ErrInternalBadWireType
}
x, err := b.DecodeFixed64()
m.One = &TwoOneofs_Field1{math.Float64frombits(x)}
return true, err
case 2: // one.Field2
if wire != proto.WireFixed32 {
return true, proto.ErrInternalBadWireType
}
x, err := b.DecodeFixed32()
m.One = &TwoOneofs_Field2{math.Float32frombits(uint32(x))}
return true, err
case 3: // one.Field3
if wire != proto.WireVarint {
return true, proto.ErrInternalBadWireType
}
x, err := b.DecodeVarint()
m.One = &TwoOneofs_Field3{int32(x)}
return true, err
case 34: // two.Field34
if wire != proto.WireBytes {
return true, proto.ErrInternalBadWireType
}
x, err := b.DecodeStringBytes()
m.Two = &TwoOneofs_Field34{x}
return true, err
case 35: // two.Field35
if wire != proto.WireBytes {
return true, proto.ErrInternalBadWireType
}
x, err := b.DecodeRawBytes(true)
m.Two = &TwoOneofs_Field35{x}
return true, err
case 36: // two.sub_message2
if wire != proto.WireBytes {
return true, proto.ErrInternalBadWireType
}
msg := new(Subby)
err := b.DecodeMessage(msg)
m.Two = &TwoOneofs_SubMessage2{msg}
return true, err
default:
return false, nil
}
}
func _TwoOneofs_OneofSizer(msg proto.Message) (n int) {
m := msg.(*TwoOneofs)
// one
switch x := m.One.(type) {
case *TwoOneofs_Field1:
n += proto.SizeVarint(1<<3 | proto.WireFixed64)
n += 8
case *TwoOneofs_Field2:
n += proto.SizeVarint(2<<3 | proto.WireFixed32)
n += 4
case *TwoOneofs_Field3:
n += proto.SizeVarint(3<<3 | proto.WireVarint)
n += proto.SizeVarint(uint64(x.Field3))
case nil:
default:
panic(fmt.Sprintf("proto: unexpected type %T in oneof", x))
}
// two
switch x := m.Two.(type) {
case *TwoOneofs_Field34:
n += proto.SizeVarint(34<<3 | proto.WireBytes)
n += proto.SizeVarint(uint64(len(x.Field34)))
n += len(x.Field34)
case *TwoOneofs_Field35:
n += proto.SizeVarint(35<<3 | proto.WireBytes)
n += proto.SizeVarint(uint64(len(x.Field35)))
n += len(x.Field35)
case *TwoOneofs_SubMessage2:
s := proto.Size(x.SubMessage2)
n += proto.SizeVarint(36<<3 | proto.WireBytes)
n += proto.SizeVarint(uint64(s))
n += s
case nil:
default:
panic(fmt.Sprintf("proto: unexpected type %T in oneof", x))
}
return n
}
type CustomOneof struct {
// Types that are valid to be assigned to Custom:
// *CustomOneof_Stringy
// *CustomOneof_CustomType
// *CustomOneof_CastType
// *CustomOneof_MyCustomName
Custom isCustomOneof_Custom `protobuf_oneof:"custom"`
XXX_unrecognized []byte `json:"-"`
}
func (m *CustomOneof) Reset() { *m = CustomOneof{} }
func (*CustomOneof) ProtoMessage() {}
func (*CustomOneof) Descriptor() ([]byte, []int) { return fileDescriptorOne, []int{3} }
type isCustomOneof_Custom interface {
isCustomOneof_Custom()
Equal(interface{}) bool
VerboseEqual(interface{}) error
MarshalTo([]byte) (int, error)
Size() int
}
type CustomOneof_Stringy struct {
Stringy string `protobuf:"bytes,34,opt,name=Stringy,oneof"`
}
type CustomOneof_CustomType struct {
CustomType github_com_gogo_protobuf_test_custom.Uint128 `protobuf:"bytes,35,opt,name=CustomType,oneof,customtype=github.com/gogo/protobuf/test/custom.Uint128"`
}
type CustomOneof_CastType struct {
CastType github_com_gogo_protobuf_test_casttype.MyUint64Type `protobuf:"varint,36,opt,name=CastType,oneof,casttype=github.com/gogo/protobuf/test/casttype.MyUint64Type"`
}
type CustomOneof_MyCustomName struct {
MyCustomName int64 `protobuf:"varint,37,opt,name=CustomName,oneof"`
}
func (*CustomOneof_Stringy) isCustomOneof_Custom() {}
func (*CustomOneof_CustomType) isCustomOneof_Custom() {}
func (*CustomOneof_CastType) isCustomOneof_Custom() {}
func (*CustomOneof_MyCustomName) isCustomOneof_Custom() {}
func (m *CustomOneof) GetCustom() isCustomOneof_Custom {
if m != nil {
return m.Custom
}
return nil
}
func (m *CustomOneof) GetStringy() string {
if x, ok := m.GetCustom().(*CustomOneof_Stringy); ok {
return x.Stringy
}
return ""
}
func (m *CustomOneof) GetCastType() github_com_gogo_protobuf_test_casttype.MyUint64Type {
if x, ok := m.GetCustom().(*CustomOneof_CastType); ok {
return x.CastType
}
return 0
}
func (m *CustomOneof) GetMyCustomName() int64 {
if x, ok := m.GetCustom().(*CustomOneof_MyCustomName); ok {
return x.MyCustomName
}
return 0
}
// XXX_OneofFuncs is for the internal use of the proto package.
func (*CustomOneof) XXX_OneofFuncs() (func(msg proto.Message, b *proto.Buffer) error, func(msg proto.Message, tag, wire int, b *proto.Buffer) (bool, error), func(msg proto.Message) (n int), []interface{}) {
return _CustomOneof_OneofMarshaler, _CustomOneof_OneofUnmarshaler, _CustomOneof_OneofSizer, []interface{}{
(*CustomOneof_Stringy)(nil),
(*CustomOneof_CustomType)(nil),
(*CustomOneof_CastType)(nil),
(*CustomOneof_MyCustomName)(nil),
}
}
func _CustomOneof_OneofMarshaler(msg proto.Message, b *proto.Buffer) error {
m := msg.(*CustomOneof)
// custom
switch x := m.Custom.(type) {
case *CustomOneof_Stringy:
_ = b.EncodeVarint(34<<3 | proto.WireBytes)
_ = b.EncodeStringBytes(x.Stringy)
case *CustomOneof_CustomType:
_ = b.EncodeVarint(35<<3 | proto.WireBytes)
dAtA, err := x.CustomType.Marshal()
if err != nil {
return err
}
_ = b.EncodeRawBytes(dAtA)
case *CustomOneof_CastType:
_ = b.EncodeVarint(36<<3 | proto.WireVarint)
_ = b.EncodeVarint(uint64(x.CastType))
case *CustomOneof_MyCustomName:
_ = b.EncodeVarint(37<<3 | proto.WireVarint)
_ = b.EncodeVarint(uint64(x.MyCustomName))
case nil:
default:
return fmt.Errorf("CustomOneof.Custom has unexpected type %T", x)
}
return nil
}
func _CustomOneof_OneofUnmarshaler(msg proto.Message, tag, wire int, b *proto.Buffer) (bool, error) {
m := msg.(*CustomOneof)
switch tag {
case 34: // custom.Stringy
if wire != proto.WireBytes {
return true, proto.ErrInternalBadWireType
}
x, err := b.DecodeStringBytes()
m.Custom = &CustomOneof_Stringy{x}
return true, err
case 35: // custom.CustomType
if wire != proto.WireBytes {
return true, proto.ErrInternalBadWireType
}
x, err := b.DecodeRawBytes(true)
if err != nil {
return true, err
}
var cc github_com_gogo_protobuf_test_custom.Uint128
c := &cc
err = c.Unmarshal(x)
m.Custom = &CustomOneof_CustomType{*c}
return true, err
case 36: // custom.CastType
if wire != proto.WireVarint {
return true, proto.ErrInternalBadWireType
}
x, err := b.DecodeVarint()
m.Custom = &CustomOneof_CastType{github_com_gogo_protobuf_test_casttype.MyUint64Type(x)}
return true, err
case 37: // custom.CustomName
if wire != proto.WireVarint {
return true, proto.ErrInternalBadWireType
}
x, err := b.DecodeVarint()
m.Custom = &CustomOneof_MyCustomName{int64(x)}
return true, err
default:
return false, nil
}
}
func _CustomOneof_OneofSizer(msg proto.Message) (n int) {
m := msg.(*CustomOneof)
// custom
switch x := m.Custom.(type) {
case *CustomOneof_Stringy:
n += proto.SizeVarint(34<<3 | proto.WireBytes)
n += proto.SizeVarint(uint64(len(x.Stringy)))
n += len(x.Stringy)
case *CustomOneof_CustomType:
n += proto.SizeVarint(35<<3 | proto.WireBytes)
n += proto.SizeVarint(uint64(x.CustomType.Size()))
n += x.CustomType.Size()
case *CustomOneof_CastType:
n += proto.SizeVarint(36<<3 | proto.WireVarint)
n += proto.SizeVarint(uint64(x.CastType))
case *CustomOneof_MyCustomName:
n += proto.SizeVarint(37<<3 | proto.WireVarint)
n += proto.SizeVarint(uint64(x.MyCustomName))
case nil:
default:
panic(fmt.Sprintf("proto: unexpected type %T in oneof", x))
}
return n
}
func init() {
proto.RegisterType((*Subby)(nil), "one.Subby")
proto.RegisterType((*AllTypesOneOf)(nil), "one.AllTypesOneOf")
proto.RegisterType((*TwoOneofs)(nil), "one.TwoOneofs")
proto.RegisterType((*CustomOneof)(nil), "one.CustomOneof")
}
func (this *Subby) Description() (desc *github_com_gogo_protobuf_protoc_gen_gogo_descriptor.FileDescriptorSet) {
return OneDescription()
}
func (this *AllTypesOneOf) Description() (desc *github_com_gogo_protobuf_protoc_gen_gogo_descriptor.FileDescriptorSet) {
return OneDescription()
}
func (this *TwoOneofs) Description() (desc *github_com_gogo_protobuf_protoc_gen_gogo_descriptor.FileDescriptorSet) {
return OneDescription()
}
func (this *CustomOneof) Description() (desc *github_com_gogo_protobuf_protoc_gen_gogo_descriptor.FileDescriptorSet) {
return OneDescription()
}
func OneDescription() (desc *github_com_gogo_protobuf_protoc_gen_gogo_descriptor.FileDescriptorSet) {
d := &github_com_gogo_protobuf_protoc_gen_gogo_descriptor.FileDescriptorSet{}
var gzipped = []byte{
// 4043 bytes of a gzipped FileDescriptorSet
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0xd0, 0x9d, 0x97, 0xa7, 0xf1, 0xfa, 0x07, 0xba, 0xf3, 0x81, 0x6e, 0x55, 0xce, 0xe1, 0x15, 0x08,
0x74, 0xab, 0x81, 0x6e, 0x4d, 0x9e, 0x39, 0x2b, 0x2c, 0x66, 0x03, 0xdd, 0x9a, 0xf4, 0x2c, 0x64,
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0xc1, 0x2c, 0xbc, 0x2d, 0x40, 0x7a, 0xef, 0x8e, 0x4d, 0x7e, 0x93, 0x75, 0xff, 0x9f, 0x17, 0x97,
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0x42, 0xe1, 0x02, 0x49, 0x01, 0xa0, 0xa6, 0x38, 0xc3, 0xa9, 0x27, 0xe5, 0xe7, 0xfe, 0xf1, 0x9d,
0x33, 0x9f, 0x38, 0x76, 0x07, 0xe1, 0xd8, 0x2d, 0xd3, 0x02, 0xbb, 0xb4, 0x6f, 0x58, 0xde, 0xf3,
0x2b, 0x97, 0x70, 0x80, 0x03, 0x16, 0x69, 0x1f, 0x52, 0x15, 0xcd, 0x25, 0x5f, 0x98, 0x11, 0xd7,
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0xd6, 0x0b, 0xab, 0x18, 0x7e, 0x6d, 0x42, 0xf1, 0xa9, 0xa4, 0x15, 0xee, 0xea, 0x8e, 0xd6, 0xa1,
0x5f, 0xd2, 0xc4, 0xcb, 0xe2, 0xd1, 0x3b, 0x67, 0xb2, 0xdb, 0x87, 0x81, 0x3c, 0x70, 0x05, 0x5f,
0x95, 0x53, 0x30, 0x49, 0x5d, 0x2d, 0xaf, 0xbf, 0x75, 0x2f, 0x3f, 0xf1, 0xf6, 0xbd, 0xfc, 0xc4,
0x3f, 0xdc, 0xcb, 0x4f, 0xbc, 0x7b, 0x2f, 0x2f, 0x7c, 0x70, 0x2f, 0x2f, 0xfc, 0xf0, 0x5e, 0x5e,
0xb8, 0x7b, 0x94, 0x17, 0xbe, 0x7a, 0x94, 0x17, 0xbe, 0x71, 0x94, 0x17, 0xbe, 0x7d, 0x94, 0x17,
0xde, 0x3a, 0xca, 0x4f, 0xbc, 0x7d, 0x94, 0x9f, 0x78, 0xf7, 0x28, 0x2f, 0x7c, 0xff, 0x28, 0x3f,
0xf1, 0xc1, 0x51, 0x5e, 0xf8, 0xe1, 0x51, 0x5e, 0xb8, 0xfb, 0xbd, 0xbc, 0xf0, 0x7f, 0x01, 0x00,
0x00, 0xff, 0xff, 0x92, 0x09, 0x9d, 0x38, 0xda, 0x32, 0x00, 0x00,
}
r := bytes.NewReader(gzipped)
gzipr, err := compress_gzip.NewReader(r)
if err != nil {
panic(err)
}
ungzipped, err := io_ioutil.ReadAll(gzipr)
if err != nil {
panic(err)
}
if err := github_com_gogo_protobuf_proto.Unmarshal(ungzipped, d); err != nil {
panic(err)
}
return d
}
func (this *Subby) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*Subby)
if !ok {
that2, ok := that.(Subby)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *Subby")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *Subby but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *Subby but is not nil && this == nil")
}
if this.Sub != nil && that1.Sub != nil {
if *this.Sub != *that1.Sub {
return fmt.Errorf("Sub this(%v) Not Equal that(%v)", *this.Sub, *that1.Sub)
}
} else if this.Sub != nil {
return fmt.Errorf("this.Sub == nil && that.Sub != nil")
} else if that1.Sub != nil {
return fmt.Errorf("Sub this(%v) Not Equal that(%v)", this.Sub, that1.Sub)
}
if !bytes.Equal(this.XXX_unrecognized, that1.XXX_unrecognized) {
return fmt.Errorf("XXX_unrecognized this(%v) Not Equal that(%v)", this.XXX_unrecognized, that1.XXX_unrecognized)
}
return nil
}
func (this *Subby) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*Subby)
if !ok {
that2, ok := that.(Subby)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if this.Sub != nil && that1.Sub != nil {
if *this.Sub != *that1.Sub {
return false
}
} else if this.Sub != nil {
return false
} else if that1.Sub != nil {
return false
}
if !bytes.Equal(this.XXX_unrecognized, that1.XXX_unrecognized) {
return false
}
return true
}
func (this *AllTypesOneOf) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*AllTypesOneOf)
if !ok {
that2, ok := that.(AllTypesOneOf)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *AllTypesOneOf")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *AllTypesOneOf but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *AllTypesOneOf but is not nil && this == nil")
}
if that1.TestOneof == nil {
if this.TestOneof != nil {
return fmt.Errorf("this.TestOneof != nil && that1.TestOneof == nil")
}
} else if this.TestOneof == nil {
return fmt.Errorf("this.TestOneof == nil && that1.TestOneof != nil")
} else if err := this.TestOneof.VerboseEqual(that1.TestOneof); err != nil {
return err
}
if !bytes.Equal(this.XXX_unrecognized, that1.XXX_unrecognized) {
return fmt.Errorf("XXX_unrecognized this(%v) Not Equal that(%v)", this.XXX_unrecognized, that1.XXX_unrecognized)
}
return nil
}
func (this *AllTypesOneOf_Field1) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*AllTypesOneOf_Field1)
if !ok {
that2, ok := that.(AllTypesOneOf_Field1)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *AllTypesOneOf_Field1")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *AllTypesOneOf_Field1 but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *AllTypesOneOf_Field1 but is not nil && this == nil")
}
if this.Field1 != that1.Field1 {
return fmt.Errorf("Field1 this(%v) Not Equal that(%v)", this.Field1, that1.Field1)
}
return nil
}
func (this *AllTypesOneOf_Field2) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*AllTypesOneOf_Field2)
if !ok {
that2, ok := that.(AllTypesOneOf_Field2)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *AllTypesOneOf_Field2")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *AllTypesOneOf_Field2 but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *AllTypesOneOf_Field2 but is not nil && this == nil")
}
if this.Field2 != that1.Field2 {
return fmt.Errorf("Field2 this(%v) Not Equal that(%v)", this.Field2, that1.Field2)
}
return nil
}
func (this *AllTypesOneOf_Field3) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*AllTypesOneOf_Field3)
if !ok {
that2, ok := that.(AllTypesOneOf_Field3)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *AllTypesOneOf_Field3")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *AllTypesOneOf_Field3 but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *AllTypesOneOf_Field3 but is not nil && this == nil")
}
if this.Field3 != that1.Field3 {
return fmt.Errorf("Field3 this(%v) Not Equal that(%v)", this.Field3, that1.Field3)
}
return nil
}
func (this *AllTypesOneOf_Field4) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*AllTypesOneOf_Field4)
if !ok {
that2, ok := that.(AllTypesOneOf_Field4)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *AllTypesOneOf_Field4")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *AllTypesOneOf_Field4 but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *AllTypesOneOf_Field4 but is not nil && this == nil")
}
if this.Field4 != that1.Field4 {
return fmt.Errorf("Field4 this(%v) Not Equal that(%v)", this.Field4, that1.Field4)
}
return nil
}
func (this *AllTypesOneOf_Field5) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*AllTypesOneOf_Field5)
if !ok {
that2, ok := that.(AllTypesOneOf_Field5)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *AllTypesOneOf_Field5")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *AllTypesOneOf_Field5 but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *AllTypesOneOf_Field5 but is not nil && this == nil")
}
if this.Field5 != that1.Field5 {
return fmt.Errorf("Field5 this(%v) Not Equal that(%v)", this.Field5, that1.Field5)
}
return nil
}
func (this *AllTypesOneOf_Field6) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*AllTypesOneOf_Field6)
if !ok {
that2, ok := that.(AllTypesOneOf_Field6)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *AllTypesOneOf_Field6")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *AllTypesOneOf_Field6 but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *AllTypesOneOf_Field6 but is not nil && this == nil")
}
if this.Field6 != that1.Field6 {
return fmt.Errorf("Field6 this(%v) Not Equal that(%v)", this.Field6, that1.Field6)
}
return nil
}
func (this *AllTypesOneOf_Field7) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*AllTypesOneOf_Field7)
if !ok {
that2, ok := that.(AllTypesOneOf_Field7)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *AllTypesOneOf_Field7")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *AllTypesOneOf_Field7 but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *AllTypesOneOf_Field7 but is not nil && this == nil")
}
if this.Field7 != that1.Field7 {
return fmt.Errorf("Field7 this(%v) Not Equal that(%v)", this.Field7, that1.Field7)
}
return nil
}
func (this *AllTypesOneOf_Field8) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*AllTypesOneOf_Field8)
if !ok {
that2, ok := that.(AllTypesOneOf_Field8)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *AllTypesOneOf_Field8")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *AllTypesOneOf_Field8 but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *AllTypesOneOf_Field8 but is not nil && this == nil")
}
if this.Field8 != that1.Field8 {
return fmt.Errorf("Field8 this(%v) Not Equal that(%v)", this.Field8, that1.Field8)
}
return nil
}
func (this *AllTypesOneOf_Field9) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*AllTypesOneOf_Field9)
if !ok {
that2, ok := that.(AllTypesOneOf_Field9)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *AllTypesOneOf_Field9")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *AllTypesOneOf_Field9 but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *AllTypesOneOf_Field9 but is not nil && this == nil")
}
if this.Field9 != that1.Field9 {
return fmt.Errorf("Field9 this(%v) Not Equal that(%v)", this.Field9, that1.Field9)
}
return nil
}
func (this *AllTypesOneOf_Field10) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*AllTypesOneOf_Field10)
if !ok {
that2, ok := that.(AllTypesOneOf_Field10)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *AllTypesOneOf_Field10")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *AllTypesOneOf_Field10 but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *AllTypesOneOf_Field10 but is not nil && this == nil")
}
if this.Field10 != that1.Field10 {
return fmt.Errorf("Field10 this(%v) Not Equal that(%v)", this.Field10, that1.Field10)
}
return nil
}
func (this *AllTypesOneOf_Field11) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*AllTypesOneOf_Field11)
if !ok {
that2, ok := that.(AllTypesOneOf_Field11)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *AllTypesOneOf_Field11")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *AllTypesOneOf_Field11 but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *AllTypesOneOf_Field11 but is not nil && this == nil")
}
if this.Field11 != that1.Field11 {
return fmt.Errorf("Field11 this(%v) Not Equal that(%v)", this.Field11, that1.Field11)
}
return nil
}
func (this *AllTypesOneOf_Field12) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*AllTypesOneOf_Field12)
if !ok {
that2, ok := that.(AllTypesOneOf_Field12)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *AllTypesOneOf_Field12")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *AllTypesOneOf_Field12 but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *AllTypesOneOf_Field12 but is not nil && this == nil")
}
if this.Field12 != that1.Field12 {
return fmt.Errorf("Field12 this(%v) Not Equal that(%v)", this.Field12, that1.Field12)
}
return nil
}
func (this *AllTypesOneOf_Field13) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*AllTypesOneOf_Field13)
if !ok {
that2, ok := that.(AllTypesOneOf_Field13)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *AllTypesOneOf_Field13")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *AllTypesOneOf_Field13 but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *AllTypesOneOf_Field13 but is not nil && this == nil")
}
if this.Field13 != that1.Field13 {
return fmt.Errorf("Field13 this(%v) Not Equal that(%v)", this.Field13, that1.Field13)
}
return nil
}
func (this *AllTypesOneOf_Field14) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*AllTypesOneOf_Field14)
if !ok {
that2, ok := that.(AllTypesOneOf_Field14)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *AllTypesOneOf_Field14")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *AllTypesOneOf_Field14 but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *AllTypesOneOf_Field14 but is not nil && this == nil")
}
if this.Field14 != that1.Field14 {
return fmt.Errorf("Field14 this(%v) Not Equal that(%v)", this.Field14, that1.Field14)
}
return nil
}
func (this *AllTypesOneOf_Field15) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*AllTypesOneOf_Field15)
if !ok {
that2, ok := that.(AllTypesOneOf_Field15)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *AllTypesOneOf_Field15")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *AllTypesOneOf_Field15 but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *AllTypesOneOf_Field15 but is not nil && this == nil")
}
if !bytes.Equal(this.Field15, that1.Field15) {
return fmt.Errorf("Field15 this(%v) Not Equal that(%v)", this.Field15, that1.Field15)
}
return nil
}
func (this *AllTypesOneOf_SubMessage) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*AllTypesOneOf_SubMessage)
if !ok {
that2, ok := that.(AllTypesOneOf_SubMessage)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *AllTypesOneOf_SubMessage")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *AllTypesOneOf_SubMessage but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *AllTypesOneOf_SubMessage but is not nil && this == nil")
}
if !this.SubMessage.Equal(that1.SubMessage) {
return fmt.Errorf("SubMessage this(%v) Not Equal that(%v)", this.SubMessage, that1.SubMessage)
}
return nil
}
func (this *AllTypesOneOf) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*AllTypesOneOf)
if !ok {
that2, ok := that.(AllTypesOneOf)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if that1.TestOneof == nil {
if this.TestOneof != nil {
return false
}
} else if this.TestOneof == nil {
return false
} else if !this.TestOneof.Equal(that1.TestOneof) {
return false
}
if !bytes.Equal(this.XXX_unrecognized, that1.XXX_unrecognized) {
return false
}
return true
}
func (this *AllTypesOneOf_Field1) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*AllTypesOneOf_Field1)
if !ok {
that2, ok := that.(AllTypesOneOf_Field1)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if this.Field1 != that1.Field1 {
return false
}
return true
}
func (this *AllTypesOneOf_Field2) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*AllTypesOneOf_Field2)
if !ok {
that2, ok := that.(AllTypesOneOf_Field2)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if this.Field2 != that1.Field2 {
return false
}
return true
}
func (this *AllTypesOneOf_Field3) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*AllTypesOneOf_Field3)
if !ok {
that2, ok := that.(AllTypesOneOf_Field3)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if this.Field3 != that1.Field3 {
return false
}
return true
}
func (this *AllTypesOneOf_Field4) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*AllTypesOneOf_Field4)
if !ok {
that2, ok := that.(AllTypesOneOf_Field4)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if this.Field4 != that1.Field4 {
return false
}
return true
}
func (this *AllTypesOneOf_Field5) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*AllTypesOneOf_Field5)
if !ok {
that2, ok := that.(AllTypesOneOf_Field5)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if this.Field5 != that1.Field5 {
return false
}
return true
}
func (this *AllTypesOneOf_Field6) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*AllTypesOneOf_Field6)
if !ok {
that2, ok := that.(AllTypesOneOf_Field6)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if this.Field6 != that1.Field6 {
return false
}
return true
}
func (this *AllTypesOneOf_Field7) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*AllTypesOneOf_Field7)
if !ok {
that2, ok := that.(AllTypesOneOf_Field7)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if this.Field7 != that1.Field7 {
return false
}
return true
}
func (this *AllTypesOneOf_Field8) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*AllTypesOneOf_Field8)
if !ok {
that2, ok := that.(AllTypesOneOf_Field8)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if this.Field8 != that1.Field8 {
return false
}
return true
}
func (this *AllTypesOneOf_Field9) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*AllTypesOneOf_Field9)
if !ok {
that2, ok := that.(AllTypesOneOf_Field9)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if this.Field9 != that1.Field9 {
return false
}
return true
}
func (this *AllTypesOneOf_Field10) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*AllTypesOneOf_Field10)
if !ok {
that2, ok := that.(AllTypesOneOf_Field10)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if this.Field10 != that1.Field10 {
return false
}
return true
}
func (this *AllTypesOneOf_Field11) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*AllTypesOneOf_Field11)
if !ok {
that2, ok := that.(AllTypesOneOf_Field11)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if this.Field11 != that1.Field11 {
return false
}
return true
}
func (this *AllTypesOneOf_Field12) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*AllTypesOneOf_Field12)
if !ok {
that2, ok := that.(AllTypesOneOf_Field12)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if this.Field12 != that1.Field12 {
return false
}
return true
}
func (this *AllTypesOneOf_Field13) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*AllTypesOneOf_Field13)
if !ok {
that2, ok := that.(AllTypesOneOf_Field13)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if this.Field13 != that1.Field13 {
return false
}
return true
}
func (this *AllTypesOneOf_Field14) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*AllTypesOneOf_Field14)
if !ok {
that2, ok := that.(AllTypesOneOf_Field14)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if this.Field14 != that1.Field14 {
return false
}
return true
}
func (this *AllTypesOneOf_Field15) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*AllTypesOneOf_Field15)
if !ok {
that2, ok := that.(AllTypesOneOf_Field15)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if !bytes.Equal(this.Field15, that1.Field15) {
return false
}
return true
}
func (this *AllTypesOneOf_SubMessage) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*AllTypesOneOf_SubMessage)
if !ok {
that2, ok := that.(AllTypesOneOf_SubMessage)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if !this.SubMessage.Equal(that1.SubMessage) {
return false
}
return true
}
func (this *TwoOneofs) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*TwoOneofs)
if !ok {
that2, ok := that.(TwoOneofs)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *TwoOneofs")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *TwoOneofs but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *TwoOneofs but is not nil && this == nil")
}
if that1.One == nil {
if this.One != nil {
return fmt.Errorf("this.One != nil && that1.One == nil")
}
} else if this.One == nil {
return fmt.Errorf("this.One == nil && that1.One != nil")
} else if err := this.One.VerboseEqual(that1.One); err != nil {
return err
}
if that1.Two == nil {
if this.Two != nil {
return fmt.Errorf("this.Two != nil && that1.Two == nil")
}
} else if this.Two == nil {
return fmt.Errorf("this.Two == nil && that1.Two != nil")
} else if err := this.Two.VerboseEqual(that1.Two); err != nil {
return err
}
if !bytes.Equal(this.XXX_unrecognized, that1.XXX_unrecognized) {
return fmt.Errorf("XXX_unrecognized this(%v) Not Equal that(%v)", this.XXX_unrecognized, that1.XXX_unrecognized)
}
return nil
}
func (this *TwoOneofs_Field1) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*TwoOneofs_Field1)
if !ok {
that2, ok := that.(TwoOneofs_Field1)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *TwoOneofs_Field1")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *TwoOneofs_Field1 but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *TwoOneofs_Field1 but is not nil && this == nil")
}
if this.Field1 != that1.Field1 {
return fmt.Errorf("Field1 this(%v) Not Equal that(%v)", this.Field1, that1.Field1)
}
return nil
}
func (this *TwoOneofs_Field2) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*TwoOneofs_Field2)
if !ok {
that2, ok := that.(TwoOneofs_Field2)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *TwoOneofs_Field2")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *TwoOneofs_Field2 but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *TwoOneofs_Field2 but is not nil && this == nil")
}
if this.Field2 != that1.Field2 {
return fmt.Errorf("Field2 this(%v) Not Equal that(%v)", this.Field2, that1.Field2)
}
return nil
}
func (this *TwoOneofs_Field3) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*TwoOneofs_Field3)
if !ok {
that2, ok := that.(TwoOneofs_Field3)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *TwoOneofs_Field3")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *TwoOneofs_Field3 but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *TwoOneofs_Field3 but is not nil && this == nil")
}
if this.Field3 != that1.Field3 {
return fmt.Errorf("Field3 this(%v) Not Equal that(%v)", this.Field3, that1.Field3)
}
return nil
}
func (this *TwoOneofs_Field34) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*TwoOneofs_Field34)
if !ok {
that2, ok := that.(TwoOneofs_Field34)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *TwoOneofs_Field34")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *TwoOneofs_Field34 but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *TwoOneofs_Field34 but is not nil && this == nil")
}
if this.Field34 != that1.Field34 {
return fmt.Errorf("Field34 this(%v) Not Equal that(%v)", this.Field34, that1.Field34)
}
return nil
}
func (this *TwoOneofs_Field35) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*TwoOneofs_Field35)
if !ok {
that2, ok := that.(TwoOneofs_Field35)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *TwoOneofs_Field35")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *TwoOneofs_Field35 but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *TwoOneofs_Field35 but is not nil && this == nil")
}
if !bytes.Equal(this.Field35, that1.Field35) {
return fmt.Errorf("Field35 this(%v) Not Equal that(%v)", this.Field35, that1.Field35)
}
return nil
}
func (this *TwoOneofs_SubMessage2) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*TwoOneofs_SubMessage2)
if !ok {
that2, ok := that.(TwoOneofs_SubMessage2)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *TwoOneofs_SubMessage2")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *TwoOneofs_SubMessage2 but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *TwoOneofs_SubMessage2 but is not nil && this == nil")
}
if !this.SubMessage2.Equal(that1.SubMessage2) {
return fmt.Errorf("SubMessage2 this(%v) Not Equal that(%v)", this.SubMessage2, that1.SubMessage2)
}
return nil
}
func (this *TwoOneofs) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*TwoOneofs)
if !ok {
that2, ok := that.(TwoOneofs)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if that1.One == nil {
if this.One != nil {
return false
}
} else if this.One == nil {
return false
} else if !this.One.Equal(that1.One) {
return false
}
if that1.Two == nil {
if this.Two != nil {
return false
}
} else if this.Two == nil {
return false
} else if !this.Two.Equal(that1.Two) {
return false
}
if !bytes.Equal(this.XXX_unrecognized, that1.XXX_unrecognized) {
return false
}
return true
}
func (this *TwoOneofs_Field1) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*TwoOneofs_Field1)
if !ok {
that2, ok := that.(TwoOneofs_Field1)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if this.Field1 != that1.Field1 {
return false
}
return true
}
func (this *TwoOneofs_Field2) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*TwoOneofs_Field2)
if !ok {
that2, ok := that.(TwoOneofs_Field2)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if this.Field2 != that1.Field2 {
return false
}
return true
}
func (this *TwoOneofs_Field3) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*TwoOneofs_Field3)
if !ok {
that2, ok := that.(TwoOneofs_Field3)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if this.Field3 != that1.Field3 {
return false
}
return true
}
func (this *TwoOneofs_Field34) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*TwoOneofs_Field34)
if !ok {
that2, ok := that.(TwoOneofs_Field34)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if this.Field34 != that1.Field34 {
return false
}
return true
}
func (this *TwoOneofs_Field35) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*TwoOneofs_Field35)
if !ok {
that2, ok := that.(TwoOneofs_Field35)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if !bytes.Equal(this.Field35, that1.Field35) {
return false
}
return true
}
func (this *TwoOneofs_SubMessage2) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*TwoOneofs_SubMessage2)
if !ok {
that2, ok := that.(TwoOneofs_SubMessage2)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if !this.SubMessage2.Equal(that1.SubMessage2) {
return false
}
return true
}
func (this *CustomOneof) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*CustomOneof)
if !ok {
that2, ok := that.(CustomOneof)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *CustomOneof")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *CustomOneof but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *CustomOneof but is not nil && this == nil")
}
if that1.Custom == nil {
if this.Custom != nil {
return fmt.Errorf("this.Custom != nil && that1.Custom == nil")
}
} else if this.Custom == nil {
return fmt.Errorf("this.Custom == nil && that1.Custom != nil")
} else if err := this.Custom.VerboseEqual(that1.Custom); err != nil {
return err
}
if !bytes.Equal(this.XXX_unrecognized, that1.XXX_unrecognized) {
return fmt.Errorf("XXX_unrecognized this(%v) Not Equal that(%v)", this.XXX_unrecognized, that1.XXX_unrecognized)
}
return nil
}
func (this *CustomOneof_Stringy) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*CustomOneof_Stringy)
if !ok {
that2, ok := that.(CustomOneof_Stringy)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *CustomOneof_Stringy")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *CustomOneof_Stringy but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *CustomOneof_Stringy but is not nil && this == nil")
}
if this.Stringy != that1.Stringy {
return fmt.Errorf("Stringy this(%v) Not Equal that(%v)", this.Stringy, that1.Stringy)
}
return nil
}
func (this *CustomOneof_CustomType) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*CustomOneof_CustomType)
if !ok {
that2, ok := that.(CustomOneof_CustomType)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *CustomOneof_CustomType")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *CustomOneof_CustomType but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *CustomOneof_CustomType but is not nil && this == nil")
}
if !this.CustomType.Equal(that1.CustomType) {
return fmt.Errorf("CustomType this(%v) Not Equal that(%v)", this.CustomType, that1.CustomType)
}
return nil
}
func (this *CustomOneof_CastType) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*CustomOneof_CastType)
if !ok {
that2, ok := that.(CustomOneof_CastType)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *CustomOneof_CastType")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *CustomOneof_CastType but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *CustomOneof_CastType but is not nil && this == nil")
}
if this.CastType != that1.CastType {
return fmt.Errorf("CastType this(%v) Not Equal that(%v)", this.CastType, that1.CastType)
}
return nil
}
func (this *CustomOneof_MyCustomName) VerboseEqual(that interface{}) error {
if that == nil {
if this == nil {
return nil
}
return fmt.Errorf("that == nil && this != nil")
}
that1, ok := that.(*CustomOneof_MyCustomName)
if !ok {
that2, ok := that.(CustomOneof_MyCustomName)
if ok {
that1 = &that2
} else {
return fmt.Errorf("that is not of type *CustomOneof_MyCustomName")
}
}
if that1 == nil {
if this == nil {
return nil
}
return fmt.Errorf("that is type *CustomOneof_MyCustomName but is nil && this != nil")
} else if this == nil {
return fmt.Errorf("that is type *CustomOneof_MyCustomName but is not nil && this == nil")
}
if this.MyCustomName != that1.MyCustomName {
return fmt.Errorf("MyCustomName this(%v) Not Equal that(%v)", this.MyCustomName, that1.MyCustomName)
}
return nil
}
func (this *CustomOneof) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*CustomOneof)
if !ok {
that2, ok := that.(CustomOneof)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if that1.Custom == nil {
if this.Custom != nil {
return false
}
} else if this.Custom == nil {
return false
} else if !this.Custom.Equal(that1.Custom) {
return false
}
if !bytes.Equal(this.XXX_unrecognized, that1.XXX_unrecognized) {
return false
}
return true
}
func (this *CustomOneof_Stringy) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*CustomOneof_Stringy)
if !ok {
that2, ok := that.(CustomOneof_Stringy)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if this.Stringy != that1.Stringy {
return false
}
return true
}
func (this *CustomOneof_CustomType) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*CustomOneof_CustomType)
if !ok {
that2, ok := that.(CustomOneof_CustomType)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if !this.CustomType.Equal(that1.CustomType) {
return false
}
return true
}
func (this *CustomOneof_CastType) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*CustomOneof_CastType)
if !ok {
that2, ok := that.(CustomOneof_CastType)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if this.CastType != that1.CastType {
return false
}
return true
}
func (this *CustomOneof_MyCustomName) Equal(that interface{}) bool {
if that == nil {
if this == nil {
return true
}
return false
}
that1, ok := that.(*CustomOneof_MyCustomName)
if !ok {
that2, ok := that.(CustomOneof_MyCustomName)
if ok {
that1 = &that2
} else {
return false
}
}
if that1 == nil {
if this == nil {
return true
}
return false
} else if this == nil {
return false
}
if this.MyCustomName != that1.MyCustomName {
return false
}
return true
}
func (this *Subby) GoString() string {
if this == nil {
return "nil"
}
s := make([]string, 0, 5)
s = append(s, "&one.Subby{")
if this.Sub != nil {
s = append(s, "Sub: "+valueToGoStringOne(this.Sub, "string")+",\n")
}
if this.XXX_unrecognized != nil {
s = append(s, "XXX_unrecognized:"+fmt.Sprintf("%#v", this.XXX_unrecognized)+",\n")
}
s = append(s, "}")
return strings.Join(s, "")
}
func (this *AllTypesOneOf) GoString() string {
if this == nil {
return "nil"
}
s := make([]string, 0, 20)
s = append(s, "&one.AllTypesOneOf{")
if this.TestOneof != nil {
s = append(s, "TestOneof: "+fmt.Sprintf("%#v", this.TestOneof)+",\n")
}
if this.XXX_unrecognized != nil {
s = append(s, "XXX_unrecognized:"+fmt.Sprintf("%#v", this.XXX_unrecognized)+",\n")
}
s = append(s, "}")
return strings.Join(s, "")
}
func (this *AllTypesOneOf_Field1) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.AllTypesOneOf_Field1{` +
`Field1:` + fmt.Sprintf("%#v", this.Field1) + `}`}, ", ")
return s
}
func (this *AllTypesOneOf_Field2) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.AllTypesOneOf_Field2{` +
`Field2:` + fmt.Sprintf("%#v", this.Field2) + `}`}, ", ")
return s
}
func (this *AllTypesOneOf_Field3) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.AllTypesOneOf_Field3{` +
`Field3:` + fmt.Sprintf("%#v", this.Field3) + `}`}, ", ")
return s
}
func (this *AllTypesOneOf_Field4) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.AllTypesOneOf_Field4{` +
`Field4:` + fmt.Sprintf("%#v", this.Field4) + `}`}, ", ")
return s
}
func (this *AllTypesOneOf_Field5) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.AllTypesOneOf_Field5{` +
`Field5:` + fmt.Sprintf("%#v", this.Field5) + `}`}, ", ")
return s
}
func (this *AllTypesOneOf_Field6) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.AllTypesOneOf_Field6{` +
`Field6:` + fmt.Sprintf("%#v", this.Field6) + `}`}, ", ")
return s
}
func (this *AllTypesOneOf_Field7) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.AllTypesOneOf_Field7{` +
`Field7:` + fmt.Sprintf("%#v", this.Field7) + `}`}, ", ")
return s
}
func (this *AllTypesOneOf_Field8) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.AllTypesOneOf_Field8{` +
`Field8:` + fmt.Sprintf("%#v", this.Field8) + `}`}, ", ")
return s
}
func (this *AllTypesOneOf_Field9) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.AllTypesOneOf_Field9{` +
`Field9:` + fmt.Sprintf("%#v", this.Field9) + `}`}, ", ")
return s
}
func (this *AllTypesOneOf_Field10) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.AllTypesOneOf_Field10{` +
`Field10:` + fmt.Sprintf("%#v", this.Field10) + `}`}, ", ")
return s
}
func (this *AllTypesOneOf_Field11) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.AllTypesOneOf_Field11{` +
`Field11:` + fmt.Sprintf("%#v", this.Field11) + `}`}, ", ")
return s
}
func (this *AllTypesOneOf_Field12) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.AllTypesOneOf_Field12{` +
`Field12:` + fmt.Sprintf("%#v", this.Field12) + `}`}, ", ")
return s
}
func (this *AllTypesOneOf_Field13) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.AllTypesOneOf_Field13{` +
`Field13:` + fmt.Sprintf("%#v", this.Field13) + `}`}, ", ")
return s
}
func (this *AllTypesOneOf_Field14) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.AllTypesOneOf_Field14{` +
`Field14:` + fmt.Sprintf("%#v", this.Field14) + `}`}, ", ")
return s
}
func (this *AllTypesOneOf_Field15) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.AllTypesOneOf_Field15{` +
`Field15:` + fmt.Sprintf("%#v", this.Field15) + `}`}, ", ")
return s
}
func (this *AllTypesOneOf_SubMessage) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.AllTypesOneOf_SubMessage{` +
`SubMessage:` + fmt.Sprintf("%#v", this.SubMessage) + `}`}, ", ")
return s
}
func (this *TwoOneofs) GoString() string {
if this == nil {
return "nil"
}
s := make([]string, 0, 10)
s = append(s, "&one.TwoOneofs{")
if this.One != nil {
s = append(s, "One: "+fmt.Sprintf("%#v", this.One)+",\n")
}
if this.Two != nil {
s = append(s, "Two: "+fmt.Sprintf("%#v", this.Two)+",\n")
}
if this.XXX_unrecognized != nil {
s = append(s, "XXX_unrecognized:"+fmt.Sprintf("%#v", this.XXX_unrecognized)+",\n")
}
s = append(s, "}")
return strings.Join(s, "")
}
func (this *TwoOneofs_Field1) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.TwoOneofs_Field1{` +
`Field1:` + fmt.Sprintf("%#v", this.Field1) + `}`}, ", ")
return s
}
func (this *TwoOneofs_Field2) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.TwoOneofs_Field2{` +
`Field2:` + fmt.Sprintf("%#v", this.Field2) + `}`}, ", ")
return s
}
func (this *TwoOneofs_Field3) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.TwoOneofs_Field3{` +
`Field3:` + fmt.Sprintf("%#v", this.Field3) + `}`}, ", ")
return s
}
func (this *TwoOneofs_Field34) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.TwoOneofs_Field34{` +
`Field34:` + fmt.Sprintf("%#v", this.Field34) + `}`}, ", ")
return s
}
func (this *TwoOneofs_Field35) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.TwoOneofs_Field35{` +
`Field35:` + fmt.Sprintf("%#v", this.Field35) + `}`}, ", ")
return s
}
func (this *TwoOneofs_SubMessage2) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.TwoOneofs_SubMessage2{` +
`SubMessage2:` + fmt.Sprintf("%#v", this.SubMessage2) + `}`}, ", ")
return s
}
func (this *CustomOneof) GoString() string {
if this == nil {
return "nil"
}
s := make([]string, 0, 8)
s = append(s, "&one.CustomOneof{")
if this.Custom != nil {
s = append(s, "Custom: "+fmt.Sprintf("%#v", this.Custom)+",\n")
}
if this.XXX_unrecognized != nil {
s = append(s, "XXX_unrecognized:"+fmt.Sprintf("%#v", this.XXX_unrecognized)+",\n")
}
s = append(s, "}")
return strings.Join(s, "")
}
func (this *CustomOneof_Stringy) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.CustomOneof_Stringy{` +
`Stringy:` + fmt.Sprintf("%#v", this.Stringy) + `}`}, ", ")
return s
}
func (this *CustomOneof_CustomType) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.CustomOneof_CustomType{` +
`CustomType:` + fmt.Sprintf("%#v", this.CustomType) + `}`}, ", ")
return s
}
func (this *CustomOneof_CastType) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.CustomOneof_CastType{` +
`CastType:` + fmt.Sprintf("%#v", this.CastType) + `}`}, ", ")
return s
}
func (this *CustomOneof_MyCustomName) GoString() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&one.CustomOneof_MyCustomName{` +
`MyCustomName:` + fmt.Sprintf("%#v", this.MyCustomName) + `}`}, ", ")
return s
}
func valueToGoStringOne(v interface{}, typ string) string {
rv := reflect.ValueOf(v)
if rv.IsNil() {
return "nil"
}
pv := reflect.Indirect(rv).Interface()
return fmt.Sprintf("func(v %v) *%v { return &v } ( %#v )", typ, typ, pv)
}
func NewPopulatedSubby(r randyOne, easy bool) *Subby {
this := &Subby{}
if r.Intn(10) != 0 {
v1 := string(randStringOne(r))
this.Sub = &v1
}
if !easy && r.Intn(10) != 0 {
this.XXX_unrecognized = randUnrecognizedOne(r, 2)
}
return this
}
func NewPopulatedAllTypesOneOf(r randyOne, easy bool) *AllTypesOneOf {
this := &AllTypesOneOf{}
oneofNumber_TestOneof := []int32{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}[r.Intn(16)]
switch oneofNumber_TestOneof {
case 1:
this.TestOneof = NewPopulatedAllTypesOneOf_Field1(r, easy)
case 2:
this.TestOneof = NewPopulatedAllTypesOneOf_Field2(r, easy)
case 3:
this.TestOneof = NewPopulatedAllTypesOneOf_Field3(r, easy)
case 4:
this.TestOneof = NewPopulatedAllTypesOneOf_Field4(r, easy)
case 5:
this.TestOneof = NewPopulatedAllTypesOneOf_Field5(r, easy)
case 6:
this.TestOneof = NewPopulatedAllTypesOneOf_Field6(r, easy)
case 7:
this.TestOneof = NewPopulatedAllTypesOneOf_Field7(r, easy)
case 8:
this.TestOneof = NewPopulatedAllTypesOneOf_Field8(r, easy)
case 9:
this.TestOneof = NewPopulatedAllTypesOneOf_Field9(r, easy)
case 10:
this.TestOneof = NewPopulatedAllTypesOneOf_Field10(r, easy)
case 11:
this.TestOneof = NewPopulatedAllTypesOneOf_Field11(r, easy)
case 12:
this.TestOneof = NewPopulatedAllTypesOneOf_Field12(r, easy)
case 13:
this.TestOneof = NewPopulatedAllTypesOneOf_Field13(r, easy)
case 14:
this.TestOneof = NewPopulatedAllTypesOneOf_Field14(r, easy)
case 15:
this.TestOneof = NewPopulatedAllTypesOneOf_Field15(r, easy)
case 16:
this.TestOneof = NewPopulatedAllTypesOneOf_SubMessage(r, easy)
}
if !easy && r.Intn(10) != 0 {
this.XXX_unrecognized = randUnrecognizedOne(r, 17)
}
return this
}
func NewPopulatedAllTypesOneOf_Field1(r randyOne, easy bool) *AllTypesOneOf_Field1 {
this := &AllTypesOneOf_Field1{}
this.Field1 = float64(r.Float64())
if r.Intn(2) == 0 {
this.Field1 *= -1
}
return this
}
func NewPopulatedAllTypesOneOf_Field2(r randyOne, easy bool) *AllTypesOneOf_Field2 {
this := &AllTypesOneOf_Field2{}
this.Field2 = float32(r.Float32())
if r.Intn(2) == 0 {
this.Field2 *= -1
}
return this
}
func NewPopulatedAllTypesOneOf_Field3(r randyOne, easy bool) *AllTypesOneOf_Field3 {
this := &AllTypesOneOf_Field3{}
this.Field3 = int32(r.Int31())
if r.Intn(2) == 0 {
this.Field3 *= -1
}
return this
}
func NewPopulatedAllTypesOneOf_Field4(r randyOne, easy bool) *AllTypesOneOf_Field4 {
this := &AllTypesOneOf_Field4{}
this.Field4 = int64(r.Int63())
if r.Intn(2) == 0 {
this.Field4 *= -1
}
return this
}
func NewPopulatedAllTypesOneOf_Field5(r randyOne, easy bool) *AllTypesOneOf_Field5 {
this := &AllTypesOneOf_Field5{}
this.Field5 = uint32(r.Uint32())
return this
}
func NewPopulatedAllTypesOneOf_Field6(r randyOne, easy bool) *AllTypesOneOf_Field6 {
this := &AllTypesOneOf_Field6{}
this.Field6 = uint64(uint64(r.Uint32()))
return this
}
func NewPopulatedAllTypesOneOf_Field7(r randyOne, easy bool) *AllTypesOneOf_Field7 {
this := &AllTypesOneOf_Field7{}
this.Field7 = int32(r.Int31())
if r.Intn(2) == 0 {
this.Field7 *= -1
}
return this
}
func NewPopulatedAllTypesOneOf_Field8(r randyOne, easy bool) *AllTypesOneOf_Field8 {
this := &AllTypesOneOf_Field8{}
this.Field8 = int64(r.Int63())
if r.Intn(2) == 0 {
this.Field8 *= -1
}
return this
}
func NewPopulatedAllTypesOneOf_Field9(r randyOne, easy bool) *AllTypesOneOf_Field9 {
this := &AllTypesOneOf_Field9{}
this.Field9 = uint32(r.Uint32())
return this
}
func NewPopulatedAllTypesOneOf_Field10(r randyOne, easy bool) *AllTypesOneOf_Field10 {
this := &AllTypesOneOf_Field10{}
this.Field10 = int32(r.Int31())
if r.Intn(2) == 0 {
this.Field10 *= -1
}
return this
}
func NewPopulatedAllTypesOneOf_Field11(r randyOne, easy bool) *AllTypesOneOf_Field11 {
this := &AllTypesOneOf_Field11{}
this.Field11 = uint64(uint64(r.Uint32()))
return this
}
func NewPopulatedAllTypesOneOf_Field12(r randyOne, easy bool) *AllTypesOneOf_Field12 {
this := &AllTypesOneOf_Field12{}
this.Field12 = int64(r.Int63())
if r.Intn(2) == 0 {
this.Field12 *= -1
}
return this
}
func NewPopulatedAllTypesOneOf_Field13(r randyOne, easy bool) *AllTypesOneOf_Field13 {
this := &AllTypesOneOf_Field13{}
this.Field13 = bool(bool(r.Intn(2) == 0))
return this
}
func NewPopulatedAllTypesOneOf_Field14(r randyOne, easy bool) *AllTypesOneOf_Field14 {
this := &AllTypesOneOf_Field14{}
this.Field14 = string(randStringOne(r))
return this
}
func NewPopulatedAllTypesOneOf_Field15(r randyOne, easy bool) *AllTypesOneOf_Field15 {
this := &AllTypesOneOf_Field15{}
v2 := r.Intn(100)
this.Field15 = make([]byte, v2)
for i := 0; i < v2; i++ {
this.Field15[i] = byte(r.Intn(256))
}
return this
}
func NewPopulatedAllTypesOneOf_SubMessage(r randyOne, easy bool) *AllTypesOneOf_SubMessage {
this := &AllTypesOneOf_SubMessage{}
this.SubMessage = NewPopulatedSubby(r, easy)
return this
}
func NewPopulatedTwoOneofs(r randyOne, easy bool) *TwoOneofs {
this := &TwoOneofs{}
oneofNumber_One := []int32{1, 2, 3}[r.Intn(3)]
switch oneofNumber_One {
case 1:
this.One = NewPopulatedTwoOneofs_Field1(r, easy)
case 2:
this.One = NewPopulatedTwoOneofs_Field2(r, easy)
case 3:
this.One = NewPopulatedTwoOneofs_Field3(r, easy)
}
oneofNumber_Two := []int32{34, 35, 36}[r.Intn(3)]
switch oneofNumber_Two {
case 34:
this.Two = NewPopulatedTwoOneofs_Field34(r, easy)
case 35:
this.Two = NewPopulatedTwoOneofs_Field35(r, easy)
case 36:
this.Two = NewPopulatedTwoOneofs_SubMessage2(r, easy)
}
if !easy && r.Intn(10) != 0 {
this.XXX_unrecognized = randUnrecognizedOne(r, 37)
}
return this
}
func NewPopulatedTwoOneofs_Field1(r randyOne, easy bool) *TwoOneofs_Field1 {
this := &TwoOneofs_Field1{}
this.Field1 = float64(r.Float64())
if r.Intn(2) == 0 {
this.Field1 *= -1
}
return this
}
func NewPopulatedTwoOneofs_Field2(r randyOne, easy bool) *TwoOneofs_Field2 {
this := &TwoOneofs_Field2{}
this.Field2 = float32(r.Float32())
if r.Intn(2) == 0 {
this.Field2 *= -1
}
return this
}
func NewPopulatedTwoOneofs_Field3(r randyOne, easy bool) *TwoOneofs_Field3 {
this := &TwoOneofs_Field3{}
this.Field3 = int32(r.Int31())
if r.Intn(2) == 0 {
this.Field3 *= -1
}
return this
}
func NewPopulatedTwoOneofs_Field34(r randyOne, easy bool) *TwoOneofs_Field34 {
this := &TwoOneofs_Field34{}
this.Field34 = string(randStringOne(r))
return this
}
func NewPopulatedTwoOneofs_Field35(r randyOne, easy bool) *TwoOneofs_Field35 {
this := &TwoOneofs_Field35{}
v3 := r.Intn(100)
this.Field35 = make([]byte, v3)
for i := 0; i < v3; i++ {
this.Field35[i] = byte(r.Intn(256))
}
return this
}
func NewPopulatedTwoOneofs_SubMessage2(r randyOne, easy bool) *TwoOneofs_SubMessage2 {
this := &TwoOneofs_SubMessage2{}
this.SubMessage2 = NewPopulatedSubby(r, easy)
return this
}
func NewPopulatedCustomOneof(r randyOne, easy bool) *CustomOneof {
this := &CustomOneof{}
oneofNumber_Custom := []int32{34, 35, 36, 37}[r.Intn(4)]
switch oneofNumber_Custom {
case 34:
this.Custom = NewPopulatedCustomOneof_Stringy(r, easy)
case 35:
this.Custom = NewPopulatedCustomOneof_CustomType(r, easy)
case 36:
this.Custom = NewPopulatedCustomOneof_CastType(r, easy)
case 37:
this.Custom = NewPopulatedCustomOneof_MyCustomName(r, easy)
}
if !easy && r.Intn(10) != 0 {
this.XXX_unrecognized = randUnrecognizedOne(r, 38)
}
return this
}
func NewPopulatedCustomOneof_Stringy(r randyOne, easy bool) *CustomOneof_Stringy {
this := &CustomOneof_Stringy{}
this.Stringy = string(randStringOne(r))
return this
}
func NewPopulatedCustomOneof_CustomType(r randyOne, easy bool) *CustomOneof_CustomType {
this := &CustomOneof_CustomType{}
v4 := github_com_gogo_protobuf_test_custom.NewPopulatedUint128(r)
this.CustomType = *v4
return this
}
func NewPopulatedCustomOneof_CastType(r randyOne, easy bool) *CustomOneof_CastType {
this := &CustomOneof_CastType{}
this.CastType = github_com_gogo_protobuf_test_casttype.MyUint64Type(uint64(r.Uint32()))
return this
}
func NewPopulatedCustomOneof_MyCustomName(r randyOne, easy bool) *CustomOneof_MyCustomName {
this := &CustomOneof_MyCustomName{}
this.MyCustomName = int64(r.Int63())
if r.Intn(2) == 0 {
this.MyCustomName *= -1
}
return this
}
type randyOne interface {
Float32() float32
Float64() float64
Int63() int64
Int31() int32
Uint32() uint32
Intn(n int) int
}
func randUTF8RuneOne(r randyOne) rune {
ru := r.Intn(62)
if ru < 10 {
return rune(ru + 48)
} else if ru < 36 {
return rune(ru + 55)
}
return rune(ru + 61)
}
func randStringOne(r randyOne) string {
v5 := r.Intn(100)
tmps := make([]rune, v5)
for i := 0; i < v5; i++ {
tmps[i] = randUTF8RuneOne(r)
}
return string(tmps)
}
func randUnrecognizedOne(r randyOne, maxFieldNumber int) (dAtA []byte) {
l := r.Intn(5)
for i := 0; i < l; i++ {
wire := r.Intn(4)
if wire == 3 {
wire = 5
}
fieldNumber := maxFieldNumber + r.Intn(100)
dAtA = randFieldOne(dAtA, r, fieldNumber, wire)
}
return dAtA
}
func randFieldOne(dAtA []byte, r randyOne, fieldNumber int, wire int) []byte {
key := uint32(fieldNumber)<<3 | uint32(wire)
switch wire {
case 0:
dAtA = encodeVarintPopulateOne(dAtA, uint64(key))
v6 := r.Int63()
if r.Intn(2) == 0 {
v6 *= -1
}
dAtA = encodeVarintPopulateOne(dAtA, uint64(v6))
case 1:
dAtA = encodeVarintPopulateOne(dAtA, uint64(key))
dAtA = append(dAtA, byte(r.Intn(256)), byte(r.Intn(256)), byte(r.Intn(256)), byte(r.Intn(256)), byte(r.Intn(256)), byte(r.Intn(256)), byte(r.Intn(256)), byte(r.Intn(256)))
case 2:
dAtA = encodeVarintPopulateOne(dAtA, uint64(key))
ll := r.Intn(100)
dAtA = encodeVarintPopulateOne(dAtA, uint64(ll))
for j := 0; j < ll; j++ {
dAtA = append(dAtA, byte(r.Intn(256)))
}
default:
dAtA = encodeVarintPopulateOne(dAtA, uint64(key))
dAtA = append(dAtA, byte(r.Intn(256)), byte(r.Intn(256)), byte(r.Intn(256)), byte(r.Intn(256)))
}
return dAtA
}
func encodeVarintPopulateOne(dAtA []byte, v uint64) []byte {
for v >= 1<<7 {
dAtA = append(dAtA, uint8(uint64(v)&0x7f|0x80))
v >>= 7
}
dAtA = append(dAtA, uint8(v))
return dAtA
}
func (m *Subby) Size() (n int) {
var l int
_ = l
if m.Sub != nil {
l = len(*m.Sub)
n += 1 + l + sovOne(uint64(l))
}
if m.XXX_unrecognized != nil {
n += len(m.XXX_unrecognized)
}
return n
}
func (m *AllTypesOneOf) Size() (n int) {
var l int
_ = l
if m.TestOneof != nil {
n += m.TestOneof.Size()
}
if m.XXX_unrecognized != nil {
n += len(m.XXX_unrecognized)
}
return n
}
func (m *AllTypesOneOf_Field1) Size() (n int) {
var l int
_ = l
n += 9
return n
}
func (m *AllTypesOneOf_Field2) Size() (n int) {
var l int
_ = l
n += 5
return n
}
func (m *AllTypesOneOf_Field3) Size() (n int) {
var l int
_ = l
n += 1 + sovOne(uint64(m.Field3))
return n
}
func (m *AllTypesOneOf_Field4) Size() (n int) {
var l int
_ = l
n += 1 + sovOne(uint64(m.Field4))
return n
}
func (m *AllTypesOneOf_Field5) Size() (n int) {
var l int
_ = l
n += 1 + sovOne(uint64(m.Field5))
return n
}
func (m *AllTypesOneOf_Field6) Size() (n int) {
var l int
_ = l
n += 1 + sovOne(uint64(m.Field6))
return n
}
func (m *AllTypesOneOf_Field7) Size() (n int) {
var l int
_ = l
n += 1 + sozOne(uint64(m.Field7))
return n
}
func (m *AllTypesOneOf_Field8) Size() (n int) {
var l int
_ = l
n += 1 + sozOne(uint64(m.Field8))
return n
}
func (m *AllTypesOneOf_Field9) Size() (n int) {
var l int
_ = l
n += 5
return n
}
func (m *AllTypesOneOf_Field10) Size() (n int) {
var l int
_ = l
n += 5
return n
}
func (m *AllTypesOneOf_Field11) Size() (n int) {
var l int
_ = l
n += 9
return n
}
func (m *AllTypesOneOf_Field12) Size() (n int) {
var l int
_ = l
n += 9
return n
}
func (m *AllTypesOneOf_Field13) Size() (n int) {
var l int
_ = l
n += 2
return n
}
func (m *AllTypesOneOf_Field14) Size() (n int) {
var l int
_ = l
l = len(m.Field14)
n += 1 + l + sovOne(uint64(l))
return n
}
func (m *AllTypesOneOf_Field15) Size() (n int) {
var l int
_ = l
if m.Field15 != nil {
l = len(m.Field15)
n += 1 + l + sovOne(uint64(l))
}
return n
}
func (m *AllTypesOneOf_SubMessage) Size() (n int) {
var l int
_ = l
if m.SubMessage != nil {
l = m.SubMessage.Size()
n += 2 + l + sovOne(uint64(l))
}
return n
}
func (m *TwoOneofs) Size() (n int) {
var l int
_ = l
if m.One != nil {
n += m.One.Size()
}
if m.Two != nil {
n += m.Two.Size()
}
if m.XXX_unrecognized != nil {
n += len(m.XXX_unrecognized)
}
return n
}
func (m *TwoOneofs_Field1) Size() (n int) {
var l int
_ = l
n += 9
return n
}
func (m *TwoOneofs_Field2) Size() (n int) {
var l int
_ = l
n += 5
return n
}
func (m *TwoOneofs_Field3) Size() (n int) {
var l int
_ = l
n += 1 + sovOne(uint64(m.Field3))
return n
}
func (m *TwoOneofs_Field34) Size() (n int) {
var l int
_ = l
l = len(m.Field34)
n += 2 + l + sovOne(uint64(l))
return n
}
func (m *TwoOneofs_Field35) Size() (n int) {
var l int
_ = l
if m.Field35 != nil {
l = len(m.Field35)
n += 2 + l + sovOne(uint64(l))
}
return n
}
func (m *TwoOneofs_SubMessage2) Size() (n int) {
var l int
_ = l
if m.SubMessage2 != nil {
l = m.SubMessage2.Size()
n += 2 + l + sovOne(uint64(l))
}
return n
}
func (m *CustomOneof) Size() (n int) {
var l int
_ = l
if m.Custom != nil {
n += m.Custom.Size()
}
if m.XXX_unrecognized != nil {
n += len(m.XXX_unrecognized)
}
return n
}
func (m *CustomOneof_Stringy) Size() (n int) {
var l int
_ = l
l = len(m.Stringy)
n += 2 + l + sovOne(uint64(l))
return n
}
func (m *CustomOneof_CustomType) Size() (n int) {
var l int
_ = l
l = m.CustomType.Size()
n += 2 + l + sovOne(uint64(l))
return n
}
func (m *CustomOneof_CastType) Size() (n int) {
var l int
_ = l
n += 2 + sovOne(uint64(m.CastType))
return n
}
func (m *CustomOneof_MyCustomName) Size() (n int) {
var l int
_ = l
n += 2 + sovOne(uint64(m.MyCustomName))
return n
}
func sovOne(x uint64) (n int) {
for {
n++
x >>= 7
if x == 0 {
break
}
}
return n
}
func sozOne(x uint64) (n int) {
return sovOne(uint64((x << 1) ^ uint64((int64(x) >> 63))))
}
func (this *Subby) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&Subby{`,
`Sub:` + valueToStringOne(this.Sub) + `,`,
`XXX_unrecognized:` + fmt.Sprintf("%v", this.XXX_unrecognized) + `,`,
`}`,
}, "")
return s
}
func (this *AllTypesOneOf) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&AllTypesOneOf{`,
`TestOneof:` + fmt.Sprintf("%v", this.TestOneof) + `,`,
`XXX_unrecognized:` + fmt.Sprintf("%v", this.XXX_unrecognized) + `,`,
`}`,
}, "")
return s
}
func (this *AllTypesOneOf_Field1) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&AllTypesOneOf_Field1{`,
`Field1:` + fmt.Sprintf("%v", this.Field1) + `,`,
`}`,
}, "")
return s
}
func (this *AllTypesOneOf_Field2) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&AllTypesOneOf_Field2{`,
`Field2:` + fmt.Sprintf("%v", this.Field2) + `,`,
`}`,
}, "")
return s
}
func (this *AllTypesOneOf_Field3) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&AllTypesOneOf_Field3{`,
`Field3:` + fmt.Sprintf("%v", this.Field3) + `,`,
`}`,
}, "")
return s
}
func (this *AllTypesOneOf_Field4) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&AllTypesOneOf_Field4{`,
`Field4:` + fmt.Sprintf("%v", this.Field4) + `,`,
`}`,
}, "")
return s
}
func (this *AllTypesOneOf_Field5) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&AllTypesOneOf_Field5{`,
`Field5:` + fmt.Sprintf("%v", this.Field5) + `,`,
`}`,
}, "")
return s
}
func (this *AllTypesOneOf_Field6) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&AllTypesOneOf_Field6{`,
`Field6:` + fmt.Sprintf("%v", this.Field6) + `,`,
`}`,
}, "")
return s
}
func (this *AllTypesOneOf_Field7) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&AllTypesOneOf_Field7{`,
`Field7:` + fmt.Sprintf("%v", this.Field7) + `,`,
`}`,
}, "")
return s
}
func (this *AllTypesOneOf_Field8) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&AllTypesOneOf_Field8{`,
`Field8:` + fmt.Sprintf("%v", this.Field8) + `,`,
`}`,
}, "")
return s
}
func (this *AllTypesOneOf_Field9) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&AllTypesOneOf_Field9{`,
`Field9:` + fmt.Sprintf("%v", this.Field9) + `,`,
`}`,
}, "")
return s
}
func (this *AllTypesOneOf_Field10) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&AllTypesOneOf_Field10{`,
`Field10:` + fmt.Sprintf("%v", this.Field10) + `,`,
`}`,
}, "")
return s
}
func (this *AllTypesOneOf_Field11) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&AllTypesOneOf_Field11{`,
`Field11:` + fmt.Sprintf("%v", this.Field11) + `,`,
`}`,
}, "")
return s
}
func (this *AllTypesOneOf_Field12) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&AllTypesOneOf_Field12{`,
`Field12:` + fmt.Sprintf("%v", this.Field12) + `,`,
`}`,
}, "")
return s
}
func (this *AllTypesOneOf_Field13) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&AllTypesOneOf_Field13{`,
`Field13:` + fmt.Sprintf("%v", this.Field13) + `,`,
`}`,
}, "")
return s
}
func (this *AllTypesOneOf_Field14) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&AllTypesOneOf_Field14{`,
`Field14:` + fmt.Sprintf("%v", this.Field14) + `,`,
`}`,
}, "")
return s
}
func (this *AllTypesOneOf_Field15) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&AllTypesOneOf_Field15{`,
`Field15:` + fmt.Sprintf("%v", this.Field15) + `,`,
`}`,
}, "")
return s
}
func (this *AllTypesOneOf_SubMessage) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&AllTypesOneOf_SubMessage{`,
`SubMessage:` + strings.Replace(fmt.Sprintf("%v", this.SubMessage), "Subby", "Subby", 1) + `,`,
`}`,
}, "")
return s
}
func (this *TwoOneofs) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&TwoOneofs{`,
`One:` + fmt.Sprintf("%v", this.One) + `,`,
`Two:` + fmt.Sprintf("%v", this.Two) + `,`,
`XXX_unrecognized:` + fmt.Sprintf("%v", this.XXX_unrecognized) + `,`,
`}`,
}, "")
return s
}
func (this *TwoOneofs_Field1) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&TwoOneofs_Field1{`,
`Field1:` + fmt.Sprintf("%v", this.Field1) + `,`,
`}`,
}, "")
return s
}
func (this *TwoOneofs_Field2) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&TwoOneofs_Field2{`,
`Field2:` + fmt.Sprintf("%v", this.Field2) + `,`,
`}`,
}, "")
return s
}
func (this *TwoOneofs_Field3) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&TwoOneofs_Field3{`,
`Field3:` + fmt.Sprintf("%v", this.Field3) + `,`,
`}`,
}, "")
return s
}
func (this *TwoOneofs_Field34) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&TwoOneofs_Field34{`,
`Field34:` + fmt.Sprintf("%v", this.Field34) + `,`,
`}`,
}, "")
return s
}
func (this *TwoOneofs_Field35) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&TwoOneofs_Field35{`,
`Field35:` + fmt.Sprintf("%v", this.Field35) + `,`,
`}`,
}, "")
return s
}
func (this *TwoOneofs_SubMessage2) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&TwoOneofs_SubMessage2{`,
`SubMessage2:` + strings.Replace(fmt.Sprintf("%v", this.SubMessage2), "Subby", "Subby", 1) + `,`,
`}`,
}, "")
return s
}
func (this *CustomOneof) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&CustomOneof{`,
`Custom:` + fmt.Sprintf("%v", this.Custom) + `,`,
`XXX_unrecognized:` + fmt.Sprintf("%v", this.XXX_unrecognized) + `,`,
`}`,
}, "")
return s
}
func (this *CustomOneof_Stringy) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&CustomOneof_Stringy{`,
`Stringy:` + fmt.Sprintf("%v", this.Stringy) + `,`,
`}`,
}, "")
return s
}
func (this *CustomOneof_CustomType) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&CustomOneof_CustomType{`,
`CustomType:` + fmt.Sprintf("%v", this.CustomType) + `,`,
`}`,
}, "")
return s
}
func (this *CustomOneof_CastType) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&CustomOneof_CastType{`,
`CastType:` + fmt.Sprintf("%v", this.CastType) + `,`,
`}`,
}, "")
return s
}
func (this *CustomOneof_MyCustomName) String() string {
if this == nil {
return "nil"
}
s := strings.Join([]string{`&CustomOneof_MyCustomName{`,
`MyCustomName:` + fmt.Sprintf("%v", this.MyCustomName) + `,`,
`}`,
}, "")
return s
}
func valueToStringOne(v interface{}) string {
rv := reflect.ValueOf(v)
if rv.IsNil() {
return "nil"
}
pv := reflect.Indirect(rv).Interface()
return fmt.Sprintf("*%v", pv)
}
func (m *Subby) Marshal() (dAtA []byte, err error) {
size := m.Size()
dAtA = make([]byte, size)
n, err := m.MarshalTo(dAtA)
if err != nil {
return nil, err
}
return dAtA[:n], nil
}
func (m *Subby) MarshalTo(dAtA []byte) (int, error) {
var i int
_ = i
var l int
_ = l
if m.Sub != nil {
dAtA[i] = 0xa
i++
i = encodeVarintOne(dAtA, i, uint64(len(*m.Sub)))
i += copy(dAtA[i:], *m.Sub)
}
if m.XXX_unrecognized != nil {
i += copy(dAtA[i:], m.XXX_unrecognized)
}
return i, nil
}
func (m *AllTypesOneOf) Marshal() (dAtA []byte, err error) {
size := m.Size()
dAtA = make([]byte, size)
n, err := m.MarshalTo(dAtA)
if err != nil {
return nil, err
}
return dAtA[:n], nil
}
func (m *AllTypesOneOf) MarshalTo(dAtA []byte) (int, error) {
var i int
_ = i
var l int
_ = l
if m.TestOneof != nil {
nn1, err := m.TestOneof.MarshalTo(dAtA[i:])
if err != nil {
return 0, err
}
i += nn1
}
if m.XXX_unrecognized != nil {
i += copy(dAtA[i:], m.XXX_unrecognized)
}
return i, nil
}
func (m *AllTypesOneOf_Field1) MarshalTo(dAtA []byte) (int, error) {
i := 0
dAtA[i] = 0x9
i++
*(*float64)(unsafe.Pointer(&dAtA[i])) = m.Field1
i += 8
return i, nil
}
func (m *AllTypesOneOf_Field2) MarshalTo(dAtA []byte) (int, error) {
i := 0
dAtA[i] = 0x15
i++
*(*float32)(unsafe.Pointer(&dAtA[i])) = m.Field2
i += 4
return i, nil
}
func (m *AllTypesOneOf_Field3) MarshalTo(dAtA []byte) (int, error) {
i := 0
dAtA[i] = 0x18
i++
i = encodeVarintOne(dAtA, i, uint64(m.Field3))
return i, nil
}
func (m *AllTypesOneOf_Field4) MarshalTo(dAtA []byte) (int, error) {
i := 0
dAtA[i] = 0x20
i++
i = encodeVarintOne(dAtA, i, uint64(m.Field4))
return i, nil
}
func (m *AllTypesOneOf_Field5) MarshalTo(dAtA []byte) (int, error) {
i := 0
dAtA[i] = 0x28
i++
i = encodeVarintOne(dAtA, i, uint64(m.Field5))
return i, nil
}
func (m *AllTypesOneOf_Field6) MarshalTo(dAtA []byte) (int, error) {
i := 0
dAtA[i] = 0x30
i++
i = encodeVarintOne(dAtA, i, uint64(m.Field6))
return i, nil
}
func (m *AllTypesOneOf_Field7) MarshalTo(dAtA []byte) (int, error) {
i := 0
dAtA[i] = 0x38
i++
i = encodeVarintOne(dAtA, i, uint64((uint32(m.Field7)<<1)^uint32((m.Field7>>31))))
return i, nil
}
func (m *AllTypesOneOf_Field8) MarshalTo(dAtA []byte) (int, error) {
i := 0
dAtA[i] = 0x40
i++
i = encodeVarintOne(dAtA, i, uint64((uint64(m.Field8)<<1)^uint64((m.Field8>>63))))
return i, nil
}
func (m *AllTypesOneOf_Field9) MarshalTo(dAtA []byte) (int, error) {
i := 0
dAtA[i] = 0x4d
i++
*(*uint32)(unsafe.Pointer(&dAtA[i])) = m.Field9
i += 4
return i, nil
}
func (m *AllTypesOneOf_Field10) MarshalTo(dAtA []byte) (int, error) {
i := 0
dAtA[i] = 0x55
i++
*(*int32)(unsafe.Pointer(&dAtA[i])) = m.Field10
i += 4
return i, nil
}
func (m *AllTypesOneOf_Field11) MarshalTo(dAtA []byte) (int, error) {
i := 0
dAtA[i] = 0x59
i++
*(*uint64)(unsafe.Pointer(&dAtA[i])) = m.Field11
i += 8
return i, nil
}
func (m *AllTypesOneOf_Field12) MarshalTo(dAtA []byte) (int, error) {
i := 0
dAtA[i] = 0x61
i++
*(*int64)(unsafe.Pointer(&dAtA[i])) = m.Field12
i += 8
return i, nil
}
func (m *AllTypesOneOf_Field13) MarshalTo(dAtA []byte) (int, error) {
i := 0
dAtA[i] = 0x68
i++
if m.Field13 {
dAtA[i] = 1
} else {
dAtA[i] = 0
}
i++
return i, nil
}
func (m *AllTypesOneOf_Field14) MarshalTo(dAtA []byte) (int, error) {
i := 0
dAtA[i] = 0x72
i++
i = encodeVarintOne(dAtA, i, uint64(len(m.Field14)))
i += copy(dAtA[i:], m.Field14)
return i, nil
}
func (m *AllTypesOneOf_Field15) MarshalTo(dAtA []byte) (int, error) {
i := 0
if m.Field15 != nil {
dAtA[i] = 0x7a
i++
i = encodeVarintOne(dAtA, i, uint64(len(m.Field15)))
i += copy(dAtA[i:], m.Field15)
}
return i, nil
}
func (m *AllTypesOneOf_SubMessage) MarshalTo(dAtA []byte) (int, error) {
i := 0
if m.SubMessage != nil {
dAtA[i] = 0x82
i++
dAtA[i] = 0x1
i++
i = encodeVarintOne(dAtA, i, uint64(m.SubMessage.Size()))
n2, err := m.SubMessage.MarshalTo(dAtA[i:])
if err != nil {
return 0, err
}
i += n2
}
return i, nil
}
func (m *TwoOneofs) Marshal() (dAtA []byte, err error) {
size := m.Size()
dAtA = make([]byte, size)
n, err := m.MarshalTo(dAtA)
if err != nil {
return nil, err
}
return dAtA[:n], nil
}
func (m *TwoOneofs) MarshalTo(dAtA []byte) (int, error) {
var i int
_ = i
var l int
_ = l
if m.One != nil {
nn3, err := m.One.MarshalTo(dAtA[i:])
if err != nil {
return 0, err
}
i += nn3
}
if m.Two != nil {
nn4, err := m.Two.MarshalTo(dAtA[i:])
if err != nil {
return 0, err
}
i += nn4
}
if m.XXX_unrecognized != nil {
i += copy(dAtA[i:], m.XXX_unrecognized)
}
return i, nil
}
func (m *TwoOneofs_Field1) MarshalTo(dAtA []byte) (int, error) {
i := 0
dAtA[i] = 0x9
i++
*(*float64)(unsafe.Pointer(&dAtA[i])) = m.Field1
i += 8
return i, nil
}
func (m *TwoOneofs_Field2) MarshalTo(dAtA []byte) (int, error) {
i := 0
dAtA[i] = 0x15
i++
*(*float32)(unsafe.Pointer(&dAtA[i])) = m.Field2
i += 4
return i, nil
}
func (m *TwoOneofs_Field3) MarshalTo(dAtA []byte) (int, error) {
i := 0
dAtA[i] = 0x18
i++
i = encodeVarintOne(dAtA, i, uint64(m.Field3))
return i, nil
}
func (m *TwoOneofs_Field34) MarshalTo(dAtA []byte) (int, error) {
i := 0
dAtA[i] = 0x92
i++
dAtA[i] = 0x2
i++
i = encodeVarintOne(dAtA, i, uint64(len(m.Field34)))
i += copy(dAtA[i:], m.Field34)
return i, nil
}
func (m *TwoOneofs_Field35) MarshalTo(dAtA []byte) (int, error) {
i := 0
if m.Field35 != nil {
dAtA[i] = 0x9a
i++
dAtA[i] = 0x2
i++
i = encodeVarintOne(dAtA, i, uint64(len(m.Field35)))
i += copy(dAtA[i:], m.Field35)
}
return i, nil
}
func (m *TwoOneofs_SubMessage2) MarshalTo(dAtA []byte) (int, error) {
i := 0
if m.SubMessage2 != nil {
dAtA[i] = 0xa2
i++
dAtA[i] = 0x2
i++
i = encodeVarintOne(dAtA, i, uint64(m.SubMessage2.Size()))
n5, err := m.SubMessage2.MarshalTo(dAtA[i:])
if err != nil {
return 0, err
}
i += n5
}
return i, nil
}
func (m *CustomOneof) Marshal() (dAtA []byte, err error) {
size := m.Size()
dAtA = make([]byte, size)
n, err := m.MarshalTo(dAtA)
if err != nil {
return nil, err
}
return dAtA[:n], nil
}
func (m *CustomOneof) MarshalTo(dAtA []byte) (int, error) {
var i int
_ = i
var l int
_ = l
if m.Custom != nil {
nn6, err := m.Custom.MarshalTo(dAtA[i:])
if err != nil {
return 0, err
}
i += nn6
}
if m.XXX_unrecognized != nil {
i += copy(dAtA[i:], m.XXX_unrecognized)
}
return i, nil
}
func (m *CustomOneof_Stringy) MarshalTo(dAtA []byte) (int, error) {
i := 0
dAtA[i] = 0x92
i++
dAtA[i] = 0x2
i++
i = encodeVarintOne(dAtA, i, uint64(len(m.Stringy)))
i += copy(dAtA[i:], m.Stringy)
return i, nil
}
func (m *CustomOneof_CustomType) MarshalTo(dAtA []byte) (int, error) {
i := 0
dAtA[i] = 0x9a
i++
dAtA[i] = 0x2
i++
i = encodeVarintOne(dAtA, i, uint64(m.CustomType.Size()))
n7, err := m.CustomType.MarshalTo(dAtA[i:])
if err != nil {
return 0, err
}
i += n7
return i, nil
}
func (m *CustomOneof_CastType) MarshalTo(dAtA []byte) (int, error) {
i := 0
dAtA[i] = 0xa0
i++
dAtA[i] = 0x2
i++
i = encodeVarintOne(dAtA, i, uint64(m.CastType))
return i, nil
}
func (m *CustomOneof_MyCustomName) MarshalTo(dAtA []byte) (int, error) {
i := 0
dAtA[i] = 0xa8
i++
dAtA[i] = 0x2
i++
i = encodeVarintOne(dAtA, i, uint64(m.MyCustomName))
return i, nil
}
func encodeFixed64One(dAtA []byte, offset int, v uint64) int {
dAtA[offset] = uint8(v)
dAtA[offset+1] = uint8(v >> 8)
dAtA[offset+2] = uint8(v >> 16)
dAtA[offset+3] = uint8(v >> 24)
dAtA[offset+4] = uint8(v >> 32)
dAtA[offset+5] = uint8(v >> 40)
dAtA[offset+6] = uint8(v >> 48)
dAtA[offset+7] = uint8(v >> 56)
return offset + 8
}
func encodeFixed32One(dAtA []byte, offset int, v uint32) int {
dAtA[offset] = uint8(v)
dAtA[offset+1] = uint8(v >> 8)
dAtA[offset+2] = uint8(v >> 16)
dAtA[offset+3] = uint8(v >> 24)
return offset + 4
}
func encodeVarintOne(dAtA []byte, offset int, v uint64) int {
for v >= 1<<7 {
dAtA[offset] = uint8(v&0x7f | 0x80)
v >>= 7
offset++
}
dAtA[offset] = uint8(v)
return offset + 1
}
func (m *Subby) Unmarshal(dAtA []byte) error {
l := len(dAtA)
iNdEx := 0
for iNdEx < l {
preIndex := iNdEx
var wire uint64
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
wire |= (uint64(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
fieldNum := int32(wire >> 3)
wireType := int(wire & 0x7)
if wireType == 4 {
return fmt.Errorf("proto: Subby: wiretype end group for non-group")
}
if fieldNum <= 0 {
return fmt.Errorf("proto: Subby: illegal tag %d (wire type %d)", fieldNum, wire)
}
switch fieldNum {
case 1:
if wireType != 2 {
return fmt.Errorf("proto: wrong wireType = %d for field Sub", wireType)
}
var stringLen uint64
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
stringLen |= (uint64(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
intStringLen := int(stringLen)
if intStringLen < 0 {
return ErrInvalidLengthOneUnsafe
}
postIndex := iNdEx + intStringLen
if postIndex > l {
return io.ErrUnexpectedEOF
}
s := string(dAtA[iNdEx:postIndex])
m.Sub = &s
iNdEx = postIndex
default:
iNdEx = preIndex
skippy, err := skipOneUnsafe(dAtA[iNdEx:])
if err != nil {
return err
}
if skippy < 0 {
return ErrInvalidLengthOneUnsafe
}
if (iNdEx + skippy) > l {
return io.ErrUnexpectedEOF
}
m.XXX_unrecognized = append(m.XXX_unrecognized, dAtA[iNdEx:iNdEx+skippy]...)
iNdEx += skippy
}
}
if iNdEx > l {
return io.ErrUnexpectedEOF
}
return nil
}
func (m *AllTypesOneOf) Unmarshal(dAtA []byte) error {
l := len(dAtA)
iNdEx := 0
for iNdEx < l {
preIndex := iNdEx
var wire uint64
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
wire |= (uint64(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
fieldNum := int32(wire >> 3)
wireType := int(wire & 0x7)
if wireType == 4 {
return fmt.Errorf("proto: AllTypesOneOf: wiretype end group for non-group")
}
if fieldNum <= 0 {
return fmt.Errorf("proto: AllTypesOneOf: illegal tag %d (wire type %d)", fieldNum, wire)
}
switch fieldNum {
case 1:
if wireType != 1 {
return fmt.Errorf("proto: wrong wireType = %d for field Field1", wireType)
}
var v float64
if iNdEx+8 > l {
return io.ErrUnexpectedEOF
}
v = *(*float64)(unsafe.Pointer(&dAtA[iNdEx]))
iNdEx += 8
m.TestOneof = &AllTypesOneOf_Field1{v}
case 2:
if wireType != 5 {
return fmt.Errorf("proto: wrong wireType = %d for field Field2", wireType)
}
var v float32
if iNdEx+4 > l {
return io.ErrUnexpectedEOF
}
v = *(*float32)(unsafe.Pointer(&dAtA[iNdEx]))
iNdEx += 4
m.TestOneof = &AllTypesOneOf_Field2{v}
case 3:
if wireType != 0 {
return fmt.Errorf("proto: wrong wireType = %d for field Field3", wireType)
}
var v int32
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
v |= (int32(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
m.TestOneof = &AllTypesOneOf_Field3{v}
case 4:
if wireType != 0 {
return fmt.Errorf("proto: wrong wireType = %d for field Field4", wireType)
}
var v int64
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
v |= (int64(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
m.TestOneof = &AllTypesOneOf_Field4{v}
case 5:
if wireType != 0 {
return fmt.Errorf("proto: wrong wireType = %d for field Field5", wireType)
}
var v uint32
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
v |= (uint32(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
m.TestOneof = &AllTypesOneOf_Field5{v}
case 6:
if wireType != 0 {
return fmt.Errorf("proto: wrong wireType = %d for field Field6", wireType)
}
var v uint64
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
v |= (uint64(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
m.TestOneof = &AllTypesOneOf_Field6{v}
case 7:
if wireType != 0 {
return fmt.Errorf("proto: wrong wireType = %d for field Field7", wireType)
}
var v int32
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
v |= (int32(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
v = int32((uint32(v) >> 1) ^ uint32(((v&1)<<31)>>31))
m.TestOneof = &AllTypesOneOf_Field7{v}
case 8:
if wireType != 0 {
return fmt.Errorf("proto: wrong wireType = %d for field Field8", wireType)
}
var v uint64
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
v |= (uint64(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
v = (v >> 1) ^ uint64((int64(v&1)<<63)>>63)
m.TestOneof = &AllTypesOneOf_Field8{int64(v)}
case 9:
if wireType != 5 {
return fmt.Errorf("proto: wrong wireType = %d for field Field9", wireType)
}
var v uint32
if iNdEx+4 > l {
return io.ErrUnexpectedEOF
}
v = *(*uint32)(unsafe.Pointer(&dAtA[iNdEx]))
iNdEx += 4
m.TestOneof = &AllTypesOneOf_Field9{v}
case 10:
if wireType != 5 {
return fmt.Errorf("proto: wrong wireType = %d for field Field10", wireType)
}
var v int32
if iNdEx+4 > l {
return io.ErrUnexpectedEOF
}
v = *(*int32)(unsafe.Pointer(&dAtA[iNdEx]))
iNdEx += 4
m.TestOneof = &AllTypesOneOf_Field10{v}
case 11:
if wireType != 1 {
return fmt.Errorf("proto: wrong wireType = %d for field Field11", wireType)
}
var v uint64
if iNdEx+8 > l {
return io.ErrUnexpectedEOF
}
v = *(*uint64)(unsafe.Pointer(&dAtA[iNdEx]))
iNdEx += 8
m.TestOneof = &AllTypesOneOf_Field11{v}
case 12:
if wireType != 1 {
return fmt.Errorf("proto: wrong wireType = %d for field Field12", wireType)
}
var v int64
if iNdEx+8 > l {
return io.ErrUnexpectedEOF
}
v = *(*int64)(unsafe.Pointer(&dAtA[iNdEx]))
iNdEx += 8
m.TestOneof = &AllTypesOneOf_Field12{v}
case 13:
if wireType != 0 {
return fmt.Errorf("proto: wrong wireType = %d for field Field13", wireType)
}
var v int
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
v |= (int(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
b := bool(v != 0)
m.TestOneof = &AllTypesOneOf_Field13{b}
case 14:
if wireType != 2 {
return fmt.Errorf("proto: wrong wireType = %d for field Field14", wireType)
}
var stringLen uint64
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
stringLen |= (uint64(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
intStringLen := int(stringLen)
if intStringLen < 0 {
return ErrInvalidLengthOneUnsafe
}
postIndex := iNdEx + intStringLen
if postIndex > l {
return io.ErrUnexpectedEOF
}
m.TestOneof = &AllTypesOneOf_Field14{string(dAtA[iNdEx:postIndex])}
iNdEx = postIndex
case 15:
if wireType != 2 {
return fmt.Errorf("proto: wrong wireType = %d for field Field15", wireType)
}
var byteLen int
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
byteLen |= (int(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
if byteLen < 0 {
return ErrInvalidLengthOneUnsafe
}
postIndex := iNdEx + byteLen
if postIndex > l {
return io.ErrUnexpectedEOF
}
v := make([]byte, postIndex-iNdEx)
copy(v, dAtA[iNdEx:postIndex])
m.TestOneof = &AllTypesOneOf_Field15{v}
iNdEx = postIndex
case 16:
if wireType != 2 {
return fmt.Errorf("proto: wrong wireType = %d for field SubMessage", wireType)
}
var msglen int
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
msglen |= (int(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
if msglen < 0 {
return ErrInvalidLengthOneUnsafe
}
postIndex := iNdEx + msglen
if postIndex > l {
return io.ErrUnexpectedEOF
}
v := &Subby{}
if err := v.Unmarshal(dAtA[iNdEx:postIndex]); err != nil {
return err
}
m.TestOneof = &AllTypesOneOf_SubMessage{v}
iNdEx = postIndex
default:
iNdEx = preIndex
skippy, err := skipOneUnsafe(dAtA[iNdEx:])
if err != nil {
return err
}
if skippy < 0 {
return ErrInvalidLengthOneUnsafe
}
if (iNdEx + skippy) > l {
return io.ErrUnexpectedEOF
}
m.XXX_unrecognized = append(m.XXX_unrecognized, dAtA[iNdEx:iNdEx+skippy]...)
iNdEx += skippy
}
}
if iNdEx > l {
return io.ErrUnexpectedEOF
}
return nil
}
func (m *TwoOneofs) Unmarshal(dAtA []byte) error {
l := len(dAtA)
iNdEx := 0
for iNdEx < l {
preIndex := iNdEx
var wire uint64
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
wire |= (uint64(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
fieldNum := int32(wire >> 3)
wireType := int(wire & 0x7)
if wireType == 4 {
return fmt.Errorf("proto: TwoOneofs: wiretype end group for non-group")
}
if fieldNum <= 0 {
return fmt.Errorf("proto: TwoOneofs: illegal tag %d (wire type %d)", fieldNum, wire)
}
switch fieldNum {
case 1:
if wireType != 1 {
return fmt.Errorf("proto: wrong wireType = %d for field Field1", wireType)
}
var v float64
if iNdEx+8 > l {
return io.ErrUnexpectedEOF
}
v = *(*float64)(unsafe.Pointer(&dAtA[iNdEx]))
iNdEx += 8
m.One = &TwoOneofs_Field1{v}
case 2:
if wireType != 5 {
return fmt.Errorf("proto: wrong wireType = %d for field Field2", wireType)
}
var v float32
if iNdEx+4 > l {
return io.ErrUnexpectedEOF
}
v = *(*float32)(unsafe.Pointer(&dAtA[iNdEx]))
iNdEx += 4
m.One = &TwoOneofs_Field2{v}
case 3:
if wireType != 0 {
return fmt.Errorf("proto: wrong wireType = %d for field Field3", wireType)
}
var v int32
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
v |= (int32(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
m.One = &TwoOneofs_Field3{v}
case 34:
if wireType != 2 {
return fmt.Errorf("proto: wrong wireType = %d for field Field34", wireType)
}
var stringLen uint64
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
stringLen |= (uint64(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
intStringLen := int(stringLen)
if intStringLen < 0 {
return ErrInvalidLengthOneUnsafe
}
postIndex := iNdEx + intStringLen
if postIndex > l {
return io.ErrUnexpectedEOF
}
m.Two = &TwoOneofs_Field34{string(dAtA[iNdEx:postIndex])}
iNdEx = postIndex
case 35:
if wireType != 2 {
return fmt.Errorf("proto: wrong wireType = %d for field Field35", wireType)
}
var byteLen int
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
byteLen |= (int(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
if byteLen < 0 {
return ErrInvalidLengthOneUnsafe
}
postIndex := iNdEx + byteLen
if postIndex > l {
return io.ErrUnexpectedEOF
}
v := make([]byte, postIndex-iNdEx)
copy(v, dAtA[iNdEx:postIndex])
m.Two = &TwoOneofs_Field35{v}
iNdEx = postIndex
case 36:
if wireType != 2 {
return fmt.Errorf("proto: wrong wireType = %d for field SubMessage2", wireType)
}
var msglen int
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
msglen |= (int(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
if msglen < 0 {
return ErrInvalidLengthOneUnsafe
}
postIndex := iNdEx + msglen
if postIndex > l {
return io.ErrUnexpectedEOF
}
v := &Subby{}
if err := v.Unmarshal(dAtA[iNdEx:postIndex]); err != nil {
return err
}
m.Two = &TwoOneofs_SubMessage2{v}
iNdEx = postIndex
default:
iNdEx = preIndex
skippy, err := skipOneUnsafe(dAtA[iNdEx:])
if err != nil {
return err
}
if skippy < 0 {
return ErrInvalidLengthOneUnsafe
}
if (iNdEx + skippy) > l {
return io.ErrUnexpectedEOF
}
m.XXX_unrecognized = append(m.XXX_unrecognized, dAtA[iNdEx:iNdEx+skippy]...)
iNdEx += skippy
}
}
if iNdEx > l {
return io.ErrUnexpectedEOF
}
return nil
}
func (m *CustomOneof) Unmarshal(dAtA []byte) error {
l := len(dAtA)
iNdEx := 0
for iNdEx < l {
preIndex := iNdEx
var wire uint64
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
wire |= (uint64(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
fieldNum := int32(wire >> 3)
wireType := int(wire & 0x7)
if wireType == 4 {
return fmt.Errorf("proto: CustomOneof: wiretype end group for non-group")
}
if fieldNum <= 0 {
return fmt.Errorf("proto: CustomOneof: illegal tag %d (wire type %d)", fieldNum, wire)
}
switch fieldNum {
case 34:
if wireType != 2 {
return fmt.Errorf("proto: wrong wireType = %d for field Stringy", wireType)
}
var stringLen uint64
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
stringLen |= (uint64(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
intStringLen := int(stringLen)
if intStringLen < 0 {
return ErrInvalidLengthOneUnsafe
}
postIndex := iNdEx + intStringLen
if postIndex > l {
return io.ErrUnexpectedEOF
}
m.Custom = &CustomOneof_Stringy{string(dAtA[iNdEx:postIndex])}
iNdEx = postIndex
case 35:
if wireType != 2 {
return fmt.Errorf("proto: wrong wireType = %d for field CustomType", wireType)
}
var byteLen int
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
byteLen |= (int(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
if byteLen < 0 {
return ErrInvalidLengthOneUnsafe
}
postIndex := iNdEx + byteLen
if postIndex > l {
return io.ErrUnexpectedEOF
}
var vv github_com_gogo_protobuf_test_custom.Uint128
v := &vv
if err := v.Unmarshal(dAtA[iNdEx:postIndex]); err != nil {
return err
}
m.Custom = &CustomOneof_CustomType{*v}
iNdEx = postIndex
case 36:
if wireType != 0 {
return fmt.Errorf("proto: wrong wireType = %d for field CastType", wireType)
}
var v github_com_gogo_protobuf_test_casttype.MyUint64Type
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
v |= (github_com_gogo_protobuf_test_casttype.MyUint64Type(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
m.Custom = &CustomOneof_CastType{v}
case 37:
if wireType != 0 {
return fmt.Errorf("proto: wrong wireType = %d for field MyCustomName", wireType)
}
var v int64
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
v |= (int64(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
m.Custom = &CustomOneof_MyCustomName{v}
default:
iNdEx = preIndex
skippy, err := skipOneUnsafe(dAtA[iNdEx:])
if err != nil {
return err
}
if skippy < 0 {
return ErrInvalidLengthOneUnsafe
}
if (iNdEx + skippy) > l {
return io.ErrUnexpectedEOF
}
m.XXX_unrecognized = append(m.XXX_unrecognized, dAtA[iNdEx:iNdEx+skippy]...)
iNdEx += skippy
}
}
if iNdEx > l {
return io.ErrUnexpectedEOF
}
return nil
}
func skipOneUnsafe(dAtA []byte) (n int, err error) {
l := len(dAtA)
iNdEx := 0
for iNdEx < l {
var wire uint64
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return 0, ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return 0, io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
wire |= (uint64(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
wireType := int(wire & 0x7)
switch wireType {
case 0:
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return 0, ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return 0, io.ErrUnexpectedEOF
}
iNdEx++
if dAtA[iNdEx-1] < 0x80 {
break
}
}
return iNdEx, nil
case 1:
iNdEx += 8
return iNdEx, nil
case 2:
var length int
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return 0, ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return 0, io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
length |= (int(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
iNdEx += length
if length < 0 {
return 0, ErrInvalidLengthOneUnsafe
}
return iNdEx, nil
case 3:
for {
var innerWire uint64
var start int = iNdEx
for shift := uint(0); ; shift += 7 {
if shift >= 64 {
return 0, ErrIntOverflowOneUnsafe
}
if iNdEx >= l {
return 0, io.ErrUnexpectedEOF
}
b := dAtA[iNdEx]
iNdEx++
innerWire |= (uint64(b) & 0x7F) << shift
if b < 0x80 {
break
}
}
innerWireType := int(innerWire & 0x7)
if innerWireType == 4 {
break
}
next, err := skipOneUnsafe(dAtA[start:])
if err != nil {
return 0, err
}
iNdEx = start + next
}
return iNdEx, nil
case 4:
return iNdEx, nil
case 5:
iNdEx += 4
return iNdEx, nil
default:
return 0, fmt.Errorf("proto: illegal wireType %d", wireType)
}
}
panic("unreachable")
}
var (
ErrInvalidLengthOneUnsafe = fmt.Errorf("proto: negative length found during unmarshaling")
ErrIntOverflowOneUnsafe = fmt.Errorf("proto: integer overflow")
)
func init() { proto.RegisterFile("combos/unsafeboth/one.proto", fileDescriptorOne) }
var fileDescriptorOne = []byte{
// 600 bytes of a gzipped FileDescriptorProto
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}
| apache-2.0 |
HinTak/linux | drivers/gpu/drm/nouveau/nvif/object.c | 7523 | /*
* Copyright 2014 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <[email protected]>
*/
#include <nvif/object.h>
#include <nvif/client.h>
#include <nvif/driver.h>
#include <nvif/ioctl.h>
int
nvif_object_ioctl(struct nvif_object *object, void *data, u32 size, void **hack)
{
struct nvif_client *client = object->client;
union {
struct nvif_ioctl_v0 v0;
} *args = data;
if (size >= sizeof(*args) && args->v0.version == 0) {
if (object != &client->object)
args->v0.object = nvif_handle(object);
else
args->v0.object = 0;
args->v0.owner = NVIF_IOCTL_V0_OWNER_ANY;
} else
return -ENOSYS;
return client->driver->ioctl(client->object.priv, client->super,
data, size, hack);
}
void
nvif_object_sclass_put(struct nvif_sclass **psclass)
{
kfree(*psclass);
*psclass = NULL;
}
int
nvif_object_sclass_get(struct nvif_object *object, struct nvif_sclass **psclass)
{
struct {
struct nvif_ioctl_v0 ioctl;
struct nvif_ioctl_sclass_v0 sclass;
} *args = NULL;
int ret, cnt = 0, i;
u32 size;
while (1) {
size = sizeof(*args) + cnt * sizeof(args->sclass.oclass[0]);
if (!(args = kmalloc(size, GFP_KERNEL)))
return -ENOMEM;
args->ioctl.version = 0;
args->ioctl.type = NVIF_IOCTL_V0_SCLASS;
args->sclass.version = 0;
args->sclass.count = cnt;
ret = nvif_object_ioctl(object, args, size, NULL);
if (ret == 0 && args->sclass.count <= cnt)
break;
cnt = args->sclass.count;
kfree(args);
if (ret != 0)
return ret;
}
*psclass = kcalloc(args->sclass.count, sizeof(**psclass), GFP_KERNEL);
if (*psclass) {
for (i = 0; i < args->sclass.count; i++) {
(*psclass)[i].oclass = args->sclass.oclass[i].oclass;
(*psclass)[i].minver = args->sclass.oclass[i].minver;
(*psclass)[i].maxver = args->sclass.oclass[i].maxver;
}
ret = args->sclass.count;
} else {
ret = -ENOMEM;
}
kfree(args);
return ret;
}
u32
nvif_object_rd(struct nvif_object *object, int size, u64 addr)
{
struct {
struct nvif_ioctl_v0 ioctl;
struct nvif_ioctl_rd_v0 rd;
} args = {
.ioctl.type = NVIF_IOCTL_V0_RD,
.rd.size = size,
.rd.addr = addr,
};
int ret = nvif_object_ioctl(object, &args, sizeof(args), NULL);
if (ret) {
/*XXX: warn? */
return 0;
}
return args.rd.data;
}
void
nvif_object_wr(struct nvif_object *object, int size, u64 addr, u32 data)
{
struct {
struct nvif_ioctl_v0 ioctl;
struct nvif_ioctl_wr_v0 wr;
} args = {
.ioctl.type = NVIF_IOCTL_V0_WR,
.wr.size = size,
.wr.addr = addr,
.wr.data = data,
};
int ret = nvif_object_ioctl(object, &args, sizeof(args), NULL);
if (ret) {
/*XXX: warn? */
}
}
int
nvif_object_mthd(struct nvif_object *object, u32 mthd, void *data, u32 size)
{
struct {
struct nvif_ioctl_v0 ioctl;
struct nvif_ioctl_mthd_v0 mthd;
} *args;
u8 stack[128];
int ret;
if (sizeof(*args) + size > sizeof(stack)) {
if (!(args = kmalloc(sizeof(*args) + size, GFP_KERNEL)))
return -ENOMEM;
} else {
args = (void *)stack;
}
args->ioctl.version = 0;
args->ioctl.type = NVIF_IOCTL_V0_MTHD;
args->mthd.version = 0;
args->mthd.method = mthd;
memcpy(args->mthd.data, data, size);
ret = nvif_object_ioctl(object, args, sizeof(*args) + size, NULL);
memcpy(data, args->mthd.data, size);
if (args != (void *)stack)
kfree(args);
return ret;
}
void
nvif_object_unmap_handle(struct nvif_object *object)
{
struct {
struct nvif_ioctl_v0 ioctl;
struct nvif_ioctl_unmap unmap;
} args = {
.ioctl.type = NVIF_IOCTL_V0_UNMAP,
};
nvif_object_ioctl(object, &args, sizeof(args), NULL);
}
int
nvif_object_map_handle(struct nvif_object *object, void *argv, u32 argc,
u64 *handle, u64 *length)
{
struct {
struct nvif_ioctl_v0 ioctl;
struct nvif_ioctl_map_v0 map;
} *args;
u32 argn = sizeof(*args) + argc;
int ret, maptype;
if (!(args = kzalloc(argn, GFP_KERNEL)))
return -ENOMEM;
args->ioctl.type = NVIF_IOCTL_V0_MAP;
memcpy(args->map.data, argv, argc);
ret = nvif_object_ioctl(object, args, argn, NULL);
*handle = args->map.handle;
*length = args->map.length;
maptype = args->map.type;
kfree(args);
return ret ? ret : (maptype == NVIF_IOCTL_MAP_V0_IO);
}
void
nvif_object_unmap(struct nvif_object *object)
{
struct nvif_client *client = object->client;
if (object->map.ptr) {
if (object->map.size) {
client->driver->unmap(client, object->map.ptr,
object->map.size);
object->map.size = 0;
}
object->map.ptr = NULL;
nvif_object_unmap_handle(object);
}
}
int
nvif_object_map(struct nvif_object *object, void *argv, u32 argc)
{
struct nvif_client *client = object->client;
u64 handle, length;
int ret = nvif_object_map_handle(object, argv, argc, &handle, &length);
if (ret >= 0) {
if (ret) {
object->map.ptr = client->driver->map(client,
handle,
length);
if (ret = -ENOMEM, object->map.ptr) {
object->map.size = length;
return 0;
}
} else {
object->map.ptr = (void *)(unsigned long)handle;
return 0;
}
nvif_object_unmap_handle(object);
}
return ret;
}
void
nvif_object_dtor(struct nvif_object *object)
{
struct {
struct nvif_ioctl_v0 ioctl;
struct nvif_ioctl_del del;
} args = {
.ioctl.type = NVIF_IOCTL_V0_DEL,
};
if (!object->client)
return;
nvif_object_unmap(object);
nvif_object_ioctl(object, &args, sizeof(args), NULL);
object->client = NULL;
}
int
nvif_object_ctor(struct nvif_object *parent, const char *name, u32 handle,
s32 oclass, void *data, u32 size, struct nvif_object *object)
{
struct {
struct nvif_ioctl_v0 ioctl;
struct nvif_ioctl_new_v0 new;
} *args;
int ret = 0;
object->client = NULL;
object->name = name ? name : "nvifObject";
object->handle = handle;
object->oclass = oclass;
object->map.ptr = NULL;
object->map.size = 0;
if (parent) {
if (!(args = kmalloc(sizeof(*args) + size, GFP_KERNEL))) {
nvif_object_dtor(object);
return -ENOMEM;
}
object->parent = parent->parent;
args->ioctl.version = 0;
args->ioctl.type = NVIF_IOCTL_V0_NEW;
args->new.version = 0;
args->new.route = parent->client->route;
args->new.token = nvif_handle(object);
args->new.object = nvif_handle(object);
args->new.handle = handle;
args->new.oclass = oclass;
memcpy(args->new.data, data, size);
ret = nvif_object_ioctl(parent, args, sizeof(*args) + size,
&object->priv);
memcpy(data, args->new.data, size);
kfree(args);
if (ret == 0)
object->client = parent->client;
}
if (ret)
nvif_object_dtor(object);
return ret;
}
| gpl-2.0 |
geminy/aidear | oss/linux/linux-4.7/arch/arm/mach-imx/mach-mx31moboard.c | 16520 | /*
* Copyright (C) 2008 Valentin Longchamp, EPFL Mobots group
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/gfp.h>
#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/moduleparam.h>
#include <linux/leds.h>
#include <linux/memory.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/partitions.h>
#include <linux/platform_device.h>
#include <linux/regulator/machine.h>
#include <linux/mfd/mc13783.h>
#include <linux/spi/spi.h>
#include <linux/types.h>
#include <linux/memblock.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/err.h>
#include <linux/input.h>
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>
#include <asm/memblock.h>
#include <linux/platform_data/asoc-imx-ssi.h>
#include "board-mx31moboard.h"
#include "common.h"
#include "devices-imx31.h"
#include "ehci.h"
#include "hardware.h"
#include "iomux-mx3.h"
#include "ulpi.h"
static unsigned int moboard_pins[] = {
/* UART0 */
MX31_PIN_TXD1__TXD1, MX31_PIN_RXD1__RXD1,
MX31_PIN_CTS1__GPIO2_7,
/* UART4 */
MX31_PIN_PC_RST__CTS5, MX31_PIN_PC_VS2__RTS5,
MX31_PIN_PC_BVD2__TXD5, MX31_PIN_PC_BVD1__RXD5,
/* I2C0 */
MX31_PIN_I2C_DAT__I2C1_SDA, MX31_PIN_I2C_CLK__I2C1_SCL,
/* I2C1 */
MX31_PIN_DCD_DTE1__I2C2_SDA, MX31_PIN_RI_DTE1__I2C2_SCL,
/* SDHC1 */
MX31_PIN_SD1_DATA3__SD1_DATA3, MX31_PIN_SD1_DATA2__SD1_DATA2,
MX31_PIN_SD1_DATA1__SD1_DATA1, MX31_PIN_SD1_DATA0__SD1_DATA0,
MX31_PIN_SD1_CLK__SD1_CLK, MX31_PIN_SD1_CMD__SD1_CMD,
MX31_PIN_ATA_CS0__GPIO3_26, MX31_PIN_ATA_CS1__GPIO3_27,
/* USB reset */
MX31_PIN_GPIO1_0__GPIO1_0,
/* USB OTG */
MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR,
MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP,
MX31_PIN_USB_OC__GPIO1_30,
/* USB H2 */
MX31_PIN_USBH2_DATA0__USBH2_DATA0,
MX31_PIN_USBH2_DATA1__USBH2_DATA1,
MX31_PIN_STXD3__USBH2_DATA2, MX31_PIN_SRXD3__USBH2_DATA3,
MX31_PIN_SCK3__USBH2_DATA4, MX31_PIN_SFS3__USBH2_DATA5,
MX31_PIN_STXD6__USBH2_DATA6, MX31_PIN_SRXD6__USBH2_DATA7,
MX31_PIN_USBH2_CLK__USBH2_CLK, MX31_PIN_USBH2_DIR__USBH2_DIR,
MX31_PIN_USBH2_NXT__USBH2_NXT, MX31_PIN_USBH2_STP__USBH2_STP,
MX31_PIN_SCK6__GPIO1_25,
/* LEDs */
MX31_PIN_SVEN0__GPIO2_0, MX31_PIN_STX0__GPIO2_1,
MX31_PIN_SRX0__GPIO2_2, MX31_PIN_SIMPD0__GPIO2_3,
/* SPI1 */
MX31_PIN_CSPI2_MOSI__MOSI, MX31_PIN_CSPI2_MISO__MISO,
MX31_PIN_CSPI2_SCLK__SCLK, MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
MX31_PIN_CSPI2_SS0__SS0, MX31_PIN_CSPI2_SS2__SS2,
/* Atlas IRQ */
MX31_PIN_GPIO1_3__GPIO1_3,
/* SPI2 */
MX31_PIN_CSPI3_MOSI__MOSI, MX31_PIN_CSPI3_MISO__MISO,
MX31_PIN_CSPI3_SCLK__SCLK, MX31_PIN_CSPI3_SPI_RDY__SPI_RDY,
MX31_PIN_CSPI2_SS1__CSPI3_SS1,
/* SSI */
MX31_PIN_STXD4__STXD4, MX31_PIN_SRXD4__SRXD4,
MX31_PIN_SCK4__SCK4, MX31_PIN_SFS4__SFS4,
};
static struct physmap_flash_data mx31moboard_flash_data = {
.width = 2,
};
static struct resource mx31moboard_flash_resource = {
.start = 0xa0000000,
.end = 0xa1ffffff,
.flags = IORESOURCE_MEM,
};
static struct platform_device mx31moboard_flash = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &mx31moboard_flash_data,
},
.resource = &mx31moboard_flash_resource,
.num_resources = 1,
};
static void __init moboard_uart0_init(void)
{
if (!gpio_request(IOMUX_TO_GPIO(MX31_PIN_CTS1), "uart0-cts-hack")) {
gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CTS1), 0);
gpio_free(IOMUX_TO_GPIO(MX31_PIN_CTS1));
}
}
static const struct imxuart_platform_data uart0_pdata __initconst = {
};
static const struct imxuart_platform_data uart4_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static const struct imxi2c_platform_data moboard_i2c0_data __initconst = {
.bitrate = 400000,
};
static const struct imxi2c_platform_data moboard_i2c1_data __initconst = {
.bitrate = 100000,
};
static int moboard_spi1_cs[] = {
MXC_SPI_CS(0),
MXC_SPI_CS(2),
};
static const struct spi_imx_master moboard_spi1_pdata __initconst = {
.chipselect = moboard_spi1_cs,
.num_chipselect = ARRAY_SIZE(moboard_spi1_cs),
};
static struct regulator_consumer_supply sdhc_consumers[] = {
{
.dev_name = "imx31-mmc.0",
.supply = "sdhc0_vcc",
},
{
.dev_name = "imx31-mmc.1",
.supply = "sdhc1_vcc",
},
};
static struct regulator_init_data sdhc_vreg_data = {
.constraints = {
.min_uV = 2700000,
.max_uV = 3000000,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
.valid_modes_mask = REGULATOR_MODE_NORMAL |
REGULATOR_MODE_FAST,
.always_on = 0,
.boot_on = 1,
},
.num_consumer_supplies = ARRAY_SIZE(sdhc_consumers),
.consumer_supplies = sdhc_consumers,
};
static struct regulator_consumer_supply cam_consumers[] = {
{
.dev_name = "mx3_camera.0",
.supply = "cam_vcc",
},
};
static struct regulator_init_data cam_vreg_data = {
.constraints = {
.min_uV = 2700000,
.max_uV = 3000000,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
.valid_modes_mask = REGULATOR_MODE_NORMAL |
REGULATOR_MODE_FAST,
.always_on = 0,
.boot_on = 1,
},
.num_consumer_supplies = ARRAY_SIZE(cam_consumers),
.consumer_supplies = cam_consumers,
};
static struct mc13xxx_regulator_init_data moboard_regulators[] = {
{
.id = MC13783_REG_VMMC1,
.init_data = &sdhc_vreg_data,
},
{
.id = MC13783_REG_VCAM,
.init_data = &cam_vreg_data,
},
};
static struct mc13xxx_led_platform_data moboard_led[] = {
{
.id = MC13783_LED_R1,
.name = "coreboard-led-4:red",
},
{
.id = MC13783_LED_G1,
.name = "coreboard-led-4:green",
},
{
.id = MC13783_LED_B1,
.name = "coreboard-led-4:blue",
},
{
.id = MC13783_LED_R2,
.name = "coreboard-led-5:red",
},
{
.id = MC13783_LED_G2,
.name = "coreboard-led-5:green",
},
{
.id = MC13783_LED_B2,
.name = "coreboard-led-5:blue",
},
};
static struct mc13xxx_leds_platform_data moboard_leds = {
.num_leds = ARRAY_SIZE(moboard_led),
.led = moboard_led,
.led_control[0] = MC13783_LED_C0_ENABLE | MC13783_LED_C0_ABMODE(0),
.led_control[1] = MC13783_LED_C1_SLEWLIM,
.led_control[2] = MC13783_LED_C2_SLEWLIM,
.led_control[3] = MC13783_LED_C3_PERIOD(0) |
MC13783_LED_C3_CURRENT_R1(2) |
MC13783_LED_C3_CURRENT_G1(2) |
MC13783_LED_C3_CURRENT_B1(2),
.led_control[4] = MC13783_LED_C4_PERIOD(0) |
MC13783_LED_C4_CURRENT_R2(3) |
MC13783_LED_C4_CURRENT_G2(3) |
MC13783_LED_C4_CURRENT_B2(3),
};
static struct mc13xxx_buttons_platform_data moboard_buttons = {
.b1on_flags = MC13783_BUTTON_DBNC_750MS | MC13783_BUTTON_ENABLE |
MC13783_BUTTON_POL_INVERT,
.b1on_key = KEY_POWER,
};
static struct mc13xxx_codec_platform_data moboard_codec = {
.dac_ssi_port = MC13783_SSI1_PORT,
.adc_ssi_port = MC13783_SSI1_PORT,
};
static struct mc13xxx_platform_data moboard_pmic = {
.regulators = {
.regulators = moboard_regulators,
.num_regulators = ARRAY_SIZE(moboard_regulators),
},
.leds = &moboard_leds,
.buttons = &moboard_buttons,
.codec = &moboard_codec,
.flags = MC13XXX_USE_RTC | MC13XXX_USE_ADC | MC13XXX_USE_CODEC,
};
static struct imx_ssi_platform_data moboard_ssi_pdata = {
.flags = IMX_SSI_DMA | IMX_SSI_NET,
};
static struct spi_board_info moboard_spi_board_info[] __initdata = {
{
.modalias = "mc13783",
/* irq number is run-time assigned */
.max_speed_hz = 300000,
.bus_num = 1,
.chip_select = 0,
.platform_data = &moboard_pmic,
.mode = SPI_CS_HIGH,
},
};
static int moboard_spi2_cs[] = {
MXC_SPI_CS(1),
};
static const struct spi_imx_master moboard_spi2_pdata __initconst = {
.chipselect = moboard_spi2_cs,
.num_chipselect = ARRAY_SIZE(moboard_spi2_cs),
};
#define SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_ATA_CS0)
#define SDHC1_WP IOMUX_TO_GPIO(MX31_PIN_ATA_CS1)
static int moboard_sdhc1_get_ro(struct device *dev)
{
return !gpio_get_value(SDHC1_WP);
}
static int moboard_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
void *data)
{
int ret;
ret = gpio_request(SDHC1_CD, "sdhc-detect");
if (ret)
return ret;
gpio_direction_input(SDHC1_CD);
ret = gpio_request(SDHC1_WP, "sdhc-wp");
if (ret)
goto err_gpio_free;
gpio_direction_input(SDHC1_WP);
ret = request_irq(gpio_to_irq(SDHC1_CD), detect_irq,
IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
"sdhc1-card-detect", data);
if (ret)
goto err_gpio_free_2;
return 0;
err_gpio_free_2:
gpio_free(SDHC1_WP);
err_gpio_free:
gpio_free(SDHC1_CD);
return ret;
}
static void moboard_sdhc1_exit(struct device *dev, void *data)
{
free_irq(gpio_to_irq(SDHC1_CD), data);
gpio_free(SDHC1_WP);
gpio_free(SDHC1_CD);
}
static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
.get_ro = moboard_sdhc1_get_ro,
.init = moboard_sdhc1_init,
.exit = moboard_sdhc1_exit,
};
/*
* this pin is dedicated for all mx31moboard systems, so we do it here
*/
#define USB_RESET_B IOMUX_TO_GPIO(MX31_PIN_GPIO1_0)
#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
PAD_CTL_ODE_CMOS)
#define OTG_EN_B IOMUX_TO_GPIO(MX31_PIN_USB_OC)
#define USBH2_EN_B IOMUX_TO_GPIO(MX31_PIN_SCK6)
static void usb_xcvr_reset(void)
{
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG | PAD_CTL_100K_PU);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG | PAD_CTL_100K_PU);
mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG | PAD_CTL_100K_PU);
mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG | PAD_CTL_100K_PU);
mxc_iomux_set_gpr(MUX_PGP_UH2, true);
mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG | PAD_CTL_100K_PU);
mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG | PAD_CTL_100K_PU);
mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG | PAD_CTL_100K_PU);
mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG | PAD_CTL_100K_PU);
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG | PAD_CTL_100K_PD);
mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG | PAD_CTL_100K_PD);
gpio_request(OTG_EN_B, "usb-udc-en");
gpio_direction_output(OTG_EN_B, 0);
gpio_request(USBH2_EN_B, "usbh2-en");
gpio_direction_output(USBH2_EN_B, 0);
gpio_request(USB_RESET_B, "usb-reset");
gpio_direction_output(USB_RESET_B, 0);
mdelay(1);
gpio_set_value(USB_RESET_B, 1);
mdelay(1);
}
static int moboard_usbh2_init_hw(struct platform_device *pdev)
{
return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
}
static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
.init = moboard_usbh2_init_hw,
.portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
};
static int __init moboard_usbh2_init(void)
{
struct platform_device *pdev;
usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
ULPI_OTG_DRVVBUS_EXT);
if (!usbh2_pdata.otg)
return -ENODEV;
pdev = imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
return PTR_ERR_OR_ZERO(pdev);
}
static const struct gpio_led mx31moboard_leds[] __initconst = {
{
.name = "coreboard-led-0:red:running",
.default_trigger = "heartbeat",
.gpio = IOMUX_TO_GPIO(MX31_PIN_SVEN0),
}, {
.name = "coreboard-led-1:red",
.gpio = IOMUX_TO_GPIO(MX31_PIN_STX0),
}, {
.name = "coreboard-led-2:red",
.gpio = IOMUX_TO_GPIO(MX31_PIN_SRX0),
}, {
.name = "coreboard-led-3:red",
.gpio = IOMUX_TO_GPIO(MX31_PIN_SIMPD0),
},
};
static const struct gpio_led_platform_data mx31moboard_led_pdata __initconst = {
.num_leds = ARRAY_SIZE(mx31moboard_leds),
.leds = mx31moboard_leds,
};
static struct platform_device *devices[] __initdata = {
&mx31moboard_flash,
};
static struct mx3_camera_pdata camera_pdata __initdata = {
.flags = MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10,
.mclk_10khz = 4800,
};
static phys_addr_t mx3_camera_base __initdata;
#define MX3_CAMERA_BUF_SIZE SZ_4M
static int __init mx31moboard_init_cam(void)
{
int dma, ret = -ENOMEM;
struct platform_device *pdev;
imx31_add_ipu_core();
pdev = imx31_alloc_mx3_camera(&camera_pdata);
if (IS_ERR(pdev))
return PTR_ERR(pdev);
dma = dma_declare_coherent_memory(&pdev->dev,
mx3_camera_base, mx3_camera_base,
MX3_CAMERA_BUF_SIZE,
DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
if (!(dma & DMA_MEMORY_MAP))
goto err;
ret = platform_device_add(pdev);
if (ret)
err:
platform_device_put(pdev);
return ret;
}
static void mx31moboard_poweroff(void)
{
struct clk *clk = clk_get_sys("imx2-wdt.0", NULL);
if (!IS_ERR(clk))
clk_prepare_enable(clk);
mxc_iomux_mode(MX31_PIN_WATCHDOG_RST__WATCHDOG_RST);
imx_writew(1 << 6 | 1 << 2, MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
}
static int mx31moboard_baseboard;
core_param(mx31moboard_baseboard, mx31moboard_baseboard, int, 0444);
/*
* Board specific initialization.
*/
static void __init mx31moboard_init(void)
{
imx31_soc_init();
mxc_iomux_setup_multiple_pins(moboard_pins, ARRAY_SIZE(moboard_pins),
"moboard");
platform_add_devices(devices, ARRAY_SIZE(devices));
gpio_led_register_device(-1, &mx31moboard_led_pdata);
imx31_add_imx2_wdt();
moboard_uart0_init();
imx31_add_imx_uart0(&uart0_pdata);
imx31_add_imx_uart4(&uart4_pdata);
imx31_add_imx_i2c0(&moboard_i2c0_data);
imx31_add_imx_i2c1(&moboard_i2c1_data);
imx31_add_spi_imx1(&moboard_spi1_pdata);
imx31_add_spi_imx2(&moboard_spi2_pdata);
gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3), "pmic-irq");
gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
moboard_spi_board_info[0].irq =
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
spi_register_board_info(moboard_spi_board_info,
ARRAY_SIZE(moboard_spi_board_info));
imx31_add_mxc_mmc(0, &sdhc1_pdata);
mx31moboard_init_cam();
usb_xcvr_reset();
moboard_usbh2_init();
imx31_add_imx_ssi(0, &moboard_ssi_pdata);
imx_add_platform_device("imx_mc13783", 0, NULL, 0, NULL, 0);
pm_power_off = mx31moboard_poweroff;
switch (mx31moboard_baseboard) {
case MX31NOBOARD:
break;
case MX31DEVBOARD:
mx31moboard_devboard_init();
break;
case MX31MARXBOT:
mx31moboard_marxbot_init();
break;
case MX31SMARTBOT:
case MX31EYEBOT:
mx31moboard_smartbot_init(mx31moboard_baseboard);
break;
default:
printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n",
mx31moboard_baseboard);
}
}
static void __init mx31moboard_timer_init(void)
{
mx31_clocks_init(26000000);
}
static void __init mx31moboard_reserve(void)
{
/* reserve 4 MiB for mx3-camera */
mx3_camera_base = arm_memblock_steal(MX3_CAMERA_BUF_SIZE,
MX3_CAMERA_BUF_SIZE);
}
MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard")
/* Maintainer: Philippe Retornaz, EPFL Mobots group */
.atag_offset = 0x100,
.reserve = mx31moboard_reserve,
.map_io = mx31_map_io,
.init_early = imx31_init_early,
.init_irq = mx31_init_irq,
.init_time = mx31moboard_timer_init,
.init_machine = mx31moboard_init,
.restart = mxc_restart,
MACHINE_END
| gpl-3.0 |
AiJiaZone/linux-4.0 | virt/arch/arm/mach-spear/spear300.c | 4524 | /*
* arch/arm/mach-spear3xx/spear300.c
*
* SPEAr300 machine source file
*
* Copyright (C) 2009-2012 ST Microelectronics
* Viresh Kumar <[email protected]>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#define pr_fmt(fmt) "SPEAr300: " fmt
#include <linux/amba/pl08x.h>
#include <linux/of_platform.h>
#include <asm/mach/arch.h>
#include "generic.h"
#include <mach/spear.h>
/* DMAC platform data's slave info */
struct pl08x_channel_data spear300_dma_info[] = {
{
.bus_id = "uart0_rx",
.min_signal = 2,
.max_signal = 2,
.muxval = 0,
.periph_buses = PL08X_AHB1,
}, {
.bus_id = "uart0_tx",
.min_signal = 3,
.max_signal = 3,
.muxval = 0,
.periph_buses = PL08X_AHB1,
}, {
.bus_id = "ssp0_rx",
.min_signal = 8,
.max_signal = 8,
.muxval = 0,
.periph_buses = PL08X_AHB1,
}, {
.bus_id = "ssp0_tx",
.min_signal = 9,
.max_signal = 9,
.muxval = 0,
.periph_buses = PL08X_AHB1,
}, {
.bus_id = "i2c_rx",
.min_signal = 10,
.max_signal = 10,
.muxval = 0,
.periph_buses = PL08X_AHB1,
}, {
.bus_id = "i2c_tx",
.min_signal = 11,
.max_signal = 11,
.muxval = 0,
.periph_buses = PL08X_AHB1,
}, {
.bus_id = "irda",
.min_signal = 12,
.max_signal = 12,
.muxval = 0,
.periph_buses = PL08X_AHB1,
}, {
.bus_id = "adc",
.min_signal = 13,
.max_signal = 13,
.muxval = 0,
.periph_buses = PL08X_AHB1,
}, {
.bus_id = "to_jpeg",
.min_signal = 14,
.max_signal = 14,
.muxval = 0,
.periph_buses = PL08X_AHB1,
}, {
.bus_id = "from_jpeg",
.min_signal = 15,
.max_signal = 15,
.muxval = 0,
.periph_buses = PL08X_AHB1,
}, {
.bus_id = "ras0_rx",
.min_signal = 0,
.max_signal = 0,
.muxval = 1,
.periph_buses = PL08X_AHB1,
}, {
.bus_id = "ras0_tx",
.min_signal = 1,
.max_signal = 1,
.muxval = 1,
.periph_buses = PL08X_AHB1,
}, {
.bus_id = "ras1_rx",
.min_signal = 2,
.max_signal = 2,
.muxval = 1,
.periph_buses = PL08X_AHB1,
}, {
.bus_id = "ras1_tx",
.min_signal = 3,
.max_signal = 3,
.muxval = 1,
.periph_buses = PL08X_AHB1,
}, {
.bus_id = "ras2_rx",
.min_signal = 4,
.max_signal = 4,
.muxval = 1,
.periph_buses = PL08X_AHB1,
}, {
.bus_id = "ras2_tx",
.min_signal = 5,
.max_signal = 5,
.muxval = 1,
.periph_buses = PL08X_AHB1,
}, {
.bus_id = "ras3_rx",
.min_signal = 6,
.max_signal = 6,
.muxval = 1,
.periph_buses = PL08X_AHB1,
}, {
.bus_id = "ras3_tx",
.min_signal = 7,
.max_signal = 7,
.muxval = 1,
.periph_buses = PL08X_AHB1,
}, {
.bus_id = "ras4_rx",
.min_signal = 8,
.max_signal = 8,
.muxval = 1,
.periph_buses = PL08X_AHB1,
}, {
.bus_id = "ras4_tx",
.min_signal = 9,
.max_signal = 9,
.muxval = 1,
.periph_buses = PL08X_AHB1,
}, {
.bus_id = "ras5_rx",
.min_signal = 10,
.max_signal = 10,
.muxval = 1,
.periph_buses = PL08X_AHB1,
}, {
.bus_id = "ras5_tx",
.min_signal = 11,
.max_signal = 11,
.muxval = 1,
.periph_buses = PL08X_AHB1,
}, {
.bus_id = "ras6_rx",
.min_signal = 12,
.max_signal = 12,
.muxval = 1,
.periph_buses = PL08X_AHB1,
}, {
.bus_id = "ras6_tx",
.min_signal = 13,
.max_signal = 13,
.muxval = 1,
.periph_buses = PL08X_AHB1,
}, {
.bus_id = "ras7_rx",
.min_signal = 14,
.max_signal = 14,
.muxval = 1,
.periph_buses = PL08X_AHB1,
}, {
.bus_id = "ras7_tx",
.min_signal = 15,
.max_signal = 15,
.muxval = 1,
.periph_buses = PL08X_AHB1,
},
};
/* Add SPEAr300 auxdata to pass platform data */
static struct of_dev_auxdata spear300_auxdata_lookup[] __initdata = {
OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
&pl022_plat_data),
OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL,
&pl080_plat_data),
{}
};
static void __init spear300_dt_init(void)
{
pl080_plat_data.slave_channels = spear300_dma_info;
pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear300_dma_info);
of_platform_populate(NULL, of_default_bus_match_table,
spear300_auxdata_lookup, NULL);
}
static const char * const spear300_dt_board_compat[] = {
"st,spear300",
"st,spear300-evb",
NULL,
};
static void __init spear300_map_io(void)
{
spear3xx_map_io();
}
DT_MACHINE_START(SPEAR300_DT, "ST SPEAr300 SoC with Flattened Device Tree")
.map_io = spear300_map_io,
.init_time = spear3xx_timer_init,
.init_machine = spear300_dt_init,
.restart = spear_restart,
.dt_compat = spear300_dt_board_compat,
MACHINE_END
| gpl-2.0 |
ccollins/dotfiles | zsh/oh-my-zsh.symlink/CONTRIBUTING.md | 4914 | # CONTRIBUTING GUIDELINES
Oh-My-Zsh is a community-driven project. Contribution is welcome, encouraged and appreciated.
It is also essential for the development of the project.
These guidelines are an attempt at better addressing the huge amount of pending
issues and pull requests. Please read them closely.
Foremost, be so kind as to [search](#use-the-search-luke). This ensures any contribution
you would make is not already covered.
* [Issues](#reporting-issues)
* [You have a problem](#you-have-a-problem)
* [You have a suggestion](#you-have-a-suggestion)
* [Pull Requests](#submitting-pull-requests)
* [Getting started](#getting-started)
* [You have a solution](#you-have-a-solution)
* [You have an addition](#you-have-an-addition)
* [Information sources (_aka_ search)](#use-the-search-luke)
**BONUS:** [Volunteering](#you-have-spare-time-to-volunteer)
## Reporting Issues
### You have a problem
Please be so kind as to [search](#use-the-search-luke) for any open issue already covering
your problem.
If you find one, comment on it so we can know there are more people experiencing it.
If not, look at the [Troubleshooting](https://github.com/robbyrussell/oh-my-zsh/wiki/Troubleshooting)
page for instructions on how to gather data to better debug your problem.
Then, you can go ahead and create an issue with as much detail as you can provide.
It should include the data gathered as indicated above, along with:
1. How to reproduce the problem
2. What the correct behavior should be
3. What the actual behavior is
Please copy to anyone relevant (_eg_ plugin maintainers) by mentioning their GitHub handle
(starting with `@`) in your message.
We will do our very best to help you.
### You have a suggestion
Please be so kind as to [search](#use-the-search-luke) for any open issue already covering
your suggestion.
If you find one, comment on it so we can know there are more people supporting it.
If not, you can go ahead and create an issue. Please copy to anyone relevant (_eg_ plugin
maintainers) by mentioning their GitHub handle (starting with `@`) in your message.
## Submitting Pull Requests
### Getting started
You should be familiar with the basics of
[contributing on GitHub](https://help.github.com/articles/using-pull-requests) and have a fork
[properly set up](https://github.com/robbyrussell/oh-my-zsh/wiki/Contribution-Technical-Practices).
You MUST always create PRs with _a dedicated branch_ based on the latest upstream tree.
If you create your own PR, please make sure you do it right. Also be so kind as to reference
any issue that would be solved in the PR description body,
[for instance](https://help.github.com/articles/closing-issues-via-commit-messages/)
_"Fixes #XXXX"_ for issue number XXXX.
### You have a solution
Please be so kind as to [search](#use-the-search-luke) for any open issue already covering
your [problem](#you-have-a-problem), and any pending/merged/rejected PR covering your solution.
If the solution is already reported, try it out and +1 the pull request if the
solution works ok. On the other hand, if you think your solution is better, post
it with a reference to the other one so we can have both solutions to compare.
If not, then go ahead and submit a PR. Please copy to anyone relevant (e.g. plugin
maintainers) by mentioning their GitHub handle (starting with `@`) in your message.
### You have an addition
Please [do not](https://github.com/robbyrussell/oh-my-zsh/wiki/Themes#dont-send-us-your-theme-for-now)
send themes for now.
Please be so kind as to [search](#use-the-search-luke) for any pending, merged or rejected Pull Requests
covering or related to what you want to add.
If you find one, try it out and work with the author on a common solution.
If not, then go ahead and submit a PR. Please copy to anyone relevant (_eg_ plugin
maintainers) by mentioning their GitHub handle (starting with `@`) in your message.
For any extensive change, _eg_ a new plugin, you will have to find testers to +1 your PR.
----
## Use the Search, Luke
_May the Force (of past experiences) be with you_
GitHub offers [many search features](https://help.github.com/articles/searching-github/)
to help you check whether a similar contribution to yours already exists. Please search
before making any contribution, it avoids duplicates and eases maintenance. Trust me,
that works 90% of the time.
You can also take a look at the [FAQ](https://github.com/robbyrussell/oh-my-zsh/wiki/FAQ)
to be sure your contribution has not already come up.
If all fails, your thing has probably not been reported yet, so you can go ahead
and [create an issue](#reporting-issues) or [submit a PR](#submitting-pull-requests).
----
### You have spare time to volunteer
Very nice!! :)
Please have a look at the [Volunteer](https://github.com/robbyrussell/oh-my-zsh/wiki/Volunteers)
page for instructions on where to start and more.
| mit |
felixhaedicke/nst-kernel | src/drivers/media/video/cx18/cx18-vbi.c | 5995 | /*
* cx18 Vertical Blank Interval support functions
*
* Derived from ivtv-vbi.c
*
* Copyright (C) 2007 Hans Verkuil <[email protected]>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
* 02111-1307 USA
*/
#include "cx18-driver.h"
#include "cx18-vbi.h"
#include "cx18-ioctl.h"
#include "cx18-queue.h"
#include "cx18-av-core.h"
static void copy_vbi_data(struct cx18 *cx, int lines, u32 pts_stamp)
{
int line = 0;
int i;
u32 linemask[2] = { 0, 0 };
unsigned short size;
static const u8 mpeg_hdr_data[] = {
0x00, 0x00, 0x01, 0xba, 0x44, 0x00, 0x0c, 0x66,
0x24, 0x01, 0x01, 0xd1, 0xd3, 0xfa, 0xff, 0xff,
0x00, 0x00, 0x01, 0xbd, 0x00, 0x1a, 0x84, 0x80,
0x07, 0x21, 0x00, 0x5d, 0x63, 0xa7, 0xff, 0xff
};
const int sd = sizeof(mpeg_hdr_data); /* start of vbi data */
int idx = cx->vbi.frame % CX18_VBI_FRAMES;
u8 *dst = &cx->vbi.sliced_mpeg_data[idx][0];
for (i = 0; i < lines; i++) {
struct v4l2_sliced_vbi_data *sdata = cx->vbi.sliced_data + i;
int f, l;
if (sdata->id == 0)
continue;
l = sdata->line - 6;
f = sdata->field;
if (f)
l += 18;
if (l < 32)
linemask[0] |= (1 << l);
else
linemask[1] |= (1 << (l - 32));
dst[sd + 12 + line * 43] = cx18_service2vbi(sdata->id);
memcpy(dst + sd + 12 + line * 43 + 1, sdata->data, 42);
line++;
}
memcpy(dst, mpeg_hdr_data, sizeof(mpeg_hdr_data));
if (line == 36) {
/* All lines are used, so there is no space for the linemask
(the max size of the VBI data is 36 * 43 + 4 bytes).
So in this case we use the magic number 'ITV0'. */
memcpy(dst + sd, "ITV0", 4);
memcpy(dst + sd + 4, dst + sd + 12, line * 43);
size = 4 + ((43 * line + 3) & ~3);
} else {
memcpy(dst + sd, "cx0", 4);
memcpy(dst + sd + 4, &linemask[0], 8);
size = 12 + ((43 * line + 3) & ~3);
}
dst[4+16] = (size + 10) >> 8;
dst[5+16] = (size + 10) & 0xff;
dst[9+16] = 0x21 | ((pts_stamp >> 29) & 0x6);
dst[10+16] = (pts_stamp >> 22) & 0xff;
dst[11+16] = 1 | ((pts_stamp >> 14) & 0xff);
dst[12+16] = (pts_stamp >> 7) & 0xff;
dst[13+16] = 1 | ((pts_stamp & 0x7f) << 1);
cx->vbi.sliced_mpeg_size[idx] = sd + size;
}
/* Compress raw VBI format, removes leading SAV codes and surplus space
after the field.
Returns new compressed size. */
static u32 compress_raw_buf(struct cx18 *cx, u8 *buf, u32 size)
{
u32 line_size = cx->vbi.raw_decoder_line_size;
u32 lines = cx->vbi.count;
u8 sav1 = cx->vbi.raw_decoder_sav_odd_field;
u8 sav2 = cx->vbi.raw_decoder_sav_even_field;
u8 *q = buf;
u8 *p;
int i;
for (i = 0; i < lines; i++) {
p = buf + i * line_size;
/* Look for SAV code */
if (p[0] != 0xff || p[1] || p[2] ||
(p[3] != sav1 && p[3] != sav2))
break;
memcpy(q, p + 4, line_size - 4);
q += line_size - 4;
}
return lines * (line_size - 4);
}
/* Compressed VBI format, all found sliced blocks put next to one another
Returns new compressed size */
static u32 compress_sliced_buf(struct cx18 *cx, u32 line, u8 *buf,
u32 size, u8 sav)
{
u32 line_size = cx->vbi.sliced_decoder_line_size;
struct v4l2_decode_vbi_line vbi;
int i;
/* find the first valid line */
for (i = 0; i < size; i++, buf++) {
if (buf[0] == 0xff && !buf[1] && !buf[2] && buf[3] == sav)
break;
}
size -= i;
if (size < line_size)
return line;
for (i = 0; i < size / line_size; i++) {
u8 *p = buf + i * line_size;
/* Look for SAV code */
if (p[0] != 0xff || p[1] || p[2] || p[3] != sav)
continue;
vbi.p = p + 4;
cx18_av_cmd(cx, VIDIOC_INT_DECODE_VBI_LINE, &vbi);
if (vbi.type) {
cx->vbi.sliced_data[line].id = vbi.type;
cx->vbi.sliced_data[line].field = vbi.is_second_field;
cx->vbi.sliced_data[line].line = vbi.line;
memcpy(cx->vbi.sliced_data[line].data, vbi.p, 42);
line++;
}
}
return line;
}
void cx18_process_vbi_data(struct cx18 *cx, struct cx18_buffer *buf,
u64 pts_stamp, int streamtype)
{
u8 *p = (u8 *) buf->buf;
u32 size = buf->bytesused;
int lines;
if (streamtype != CX18_ENC_STREAM_TYPE_VBI)
return;
/* Raw VBI data */
if (cx18_raw_vbi(cx)) {
u8 type;
cx18_buf_swap(buf);
/* Skip 12 bytes of header that gets stuffed in */
size -= 12;
memcpy(p, &buf->buf[12], size);
type = p[3];
size = buf->bytesused = compress_raw_buf(cx, p, size);
/* second field of the frame? */
if (type == cx->vbi.raw_decoder_sav_even_field) {
/* Dirty hack needed for backwards
compatibility of old VBI software. */
p += size - 4;
memcpy(p, &cx->vbi.frame, 4);
cx->vbi.frame++;
}
return;
}
/* Sliced VBI data with data insertion */
cx18_buf_swap(buf);
/* first field */
lines = compress_sliced_buf(cx, 0, p, size / 2,
cx->vbi.sliced_decoder_sav_odd_field);
/* second field */
/* experimentation shows that the second half does not always
begin at the exact address. So start a bit earlier
(hence 32). */
lines = compress_sliced_buf(cx, lines, p + size / 2 - 32,
size / 2 + 32, cx->vbi.sliced_decoder_sav_even_field);
/* always return at least one empty line */
if (lines == 0) {
cx->vbi.sliced_data[0].id = 0;
cx->vbi.sliced_data[0].line = 0;
cx->vbi.sliced_data[0].field = 0;
lines = 1;
}
buf->bytesused = size = lines * sizeof(cx->vbi.sliced_data[0]);
memcpy(p, &cx->vbi.sliced_data[0], size);
if (cx->vbi.insert_mpeg)
copy_vbi_data(cx, lines, pts_stamp);
cx->vbi.frame++;
}
| gpl-2.0 |
UgoLouche/QPacman | src/includes/SFML/Graphics/RenderStates.hpp | 6538 | ////////////////////////////////////////////////////////////
//
// SFML - Simple and Fast Multimedia Library
// Copyright (C) 2007-2015 Laurent Gomila ([email protected])
//
// This software is provided 'as-is', without any express or implied warranty.
// In no event will the authors be held liable for any damages arising from the use of this software.
//
// Permission is granted to anyone to use this software for any purpose,
// including commercial applications, and to alter it and redistribute it freely,
// subject to the following restrictions:
//
// 1. The origin of this software must not be misrepresented;
// you must not claim that you wrote the original software.
// If you use this software in a product, an acknowledgment
// in the product documentation would be appreciated but is not required.
//
// 2. Altered source versions must be plainly marked as such,
// and must not be misrepresented as being the original software.
//
// 3. This notice may not be removed or altered from any source distribution.
//
////////////////////////////////////////////////////////////
#ifndef SFML_RENDERSTATES_HPP
#define SFML_RENDERSTATES_HPP
////////////////////////////////////////////////////////////
// Headers
////////////////////////////////////////////////////////////
#include <SFML/Graphics/Export.hpp>
#include <SFML/Graphics/BlendMode.hpp>
#include <SFML/Graphics/Transform.hpp>
namespace sf
{
class Shader;
class Texture;
////////////////////////////////////////////////////////////
/// \brief Define the states used for drawing to a RenderTarget
///
////////////////////////////////////////////////////////////
class SFML_GRAPHICS_API RenderStates
{
public:
////////////////////////////////////////////////////////////
/// \brief Default constructor
///
/// Constructing a default set of render states is equivalent
/// to using sf::RenderStates::Default.
/// The default set defines:
/// \li the BlendAlpha blend mode
/// \li the identity transform
/// \li a null texture
/// \li a null shader
///
////////////////////////////////////////////////////////////
RenderStates();
////////////////////////////////////////////////////////////
/// \brief Construct a default set of render states with a custom blend mode
///
/// \param theBlendMode Blend mode to use
///
////////////////////////////////////////////////////////////
RenderStates(const BlendMode& theBlendMode);
////////////////////////////////////////////////////////////
/// \brief Construct a default set of render states with a custom transform
///
/// \param theTransform Transform to use
///
////////////////////////////////////////////////////////////
RenderStates(const Transform& theTransform);
////////////////////////////////////////////////////////////
/// \brief Construct a default set of render states with a custom texture
///
/// \param theTexture Texture to use
///
////////////////////////////////////////////////////////////
RenderStates(const Texture* theTexture);
////////////////////////////////////////////////////////////
/// \brief Construct a default set of render states with a custom shader
///
/// \param theShader Shader to use
///
////////////////////////////////////////////////////////////
RenderStates(const Shader* theShader);
////////////////////////////////////////////////////////////
/// \brief Construct a set of render states with all its attributes
///
/// \param theBlendMode Blend mode to use
/// \param theTransform Transform to use
/// \param theTexture Texture to use
/// \param theShader Shader to use
///
////////////////////////////////////////////////////////////
RenderStates(const BlendMode& theBlendMode, const Transform& theTransform,
const Texture* theTexture, const Shader* theShader);
////////////////////////////////////////////////////////////
// Static member data
////////////////////////////////////////////////////////////
static const RenderStates Default; ///< Special instance holding the default render states
////////////////////////////////////////////////////////////
// Member data
////////////////////////////////////////////////////////////
BlendMode blendMode; ///< Blending mode
Transform transform; ///< Transform
const Texture* texture; ///< Texture
const Shader* shader; ///< Shader
};
} // namespace sf
#endif // SFML_RENDERSTATES_HPP
////////////////////////////////////////////////////////////
/// \class sf::RenderStates
/// \ingroup graphics
///
/// There are four global states that can be applied to
/// the drawn objects:
/// \li the blend mode: how pixels of the object are blended with the background
/// \li the transform: how the object is positioned/rotated/scaled
/// \li the texture: what image is mapped to the object
/// \li the shader: what custom effect is applied to the object
///
/// High-level objects such as sprites or text force some of
/// these states when they are drawn. For example, a sprite
/// will set its own texture, so that you don't have to care
/// about it when drawing the sprite.
///
/// The transform is a special case: sprites, texts and shapes
/// (and it's a good idea to do it with your own drawable classes
/// too) combine their transform with the one that is passed in the
/// RenderStates structure. So that you can use a "global" transform
/// on top of each object's transform.
///
/// Most objects, especially high-level drawables, can be drawn
/// directly without defining render states explicitly -- the
/// default set of states is ok in most cases.
/// \code
/// window.draw(sprite);
/// \endcode
///
/// If you want to use a single specific render state,
/// for example a shader, you can pass it directly to the Draw
/// function: sf::RenderStates has an implicit one-argument
/// constructor for each state.
/// \code
/// window.draw(sprite, shader);
/// \endcode
///
/// When you're inside the Draw function of a drawable
/// object (inherited from sf::Drawable), you can
/// either pass the render states unmodified, or change
/// some of them.
/// For example, a transformable object will combine the
/// current transform with its own transform. A sprite will
/// set its texture. Etc.
///
/// \see sf::RenderTarget, sf::Drawable
///
////////////////////////////////////////////////////////////
| gpl-3.0 |
kv193/buildroot | linux/linux-kernel/drivers/ata/pata_ep93xx.c | 29622 | /*
* EP93XX PATA controller driver.
*
* Copyright (c) 2012, Metasoft s.c.
* Rafal Prylowski <[email protected]>
*
* Based on pata_scc.c, pata_icside.c and on earlier version of EP93XX
* PATA driver by Lennert Buytenhek and Alessandro Zummo.
* Read/Write timings, resource management and other improvements
* from driver by Joao Ramos and Bartlomiej Zolnierkiewicz.
* DMA engine support based on spi-ep93xx.c by Mika Westerberg.
*
* Original copyrights:
*
* Support for Cirrus Logic's EP93xx (EP9312, EP9315) CPUs
* PATA host controller driver.
*
* Copyright (c) 2009, Bartlomiej Zolnierkiewicz
*
* Heavily based on the ep93xx-ide.c driver:
*
* Copyright (c) 2009, Joao Ramos <[email protected]>
* INESC Inovacao (INOV)
*
* EP93XX PATA controller driver.
* Copyright (C) 2007 Lennert Buytenhek <[email protected]>
*
* An ATA driver for the Cirrus Logic EP93xx PATA controller.
*
* Based on an earlier version by Alessandro Zummo, which is:
* Copyright (C) 2006 Tower Technologies
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/blkdev.h>
#include <scsi/scsi_host.h>
#include <linux/ata.h>
#include <linux/libata.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/dmaengine.h>
#include <linux/ktime.h>
#include <mach/dma.h>
#include <mach/platform.h>
#define DRV_NAME "ep93xx-ide"
#define DRV_VERSION "1.0"
enum {
/* IDE Control Register */
IDECTRL = 0x00,
IDECTRL_CS0N = (1 << 0),
IDECTRL_CS1N = (1 << 1),
IDECTRL_DIORN = (1 << 5),
IDECTRL_DIOWN = (1 << 6),
IDECTRL_INTRQ = (1 << 9),
IDECTRL_IORDY = (1 << 10),
/*
* the device IDE register to be accessed is selected through
* IDECTRL register's specific bitfields 'DA', 'CS1N' and 'CS0N':
* b4 b3 b2 b1 b0
* A2 A1 A0 CS1N CS0N
* the values filled in this structure allows the value to be directly
* ORed to the IDECTRL register, hence giving directly the A[2:0] and
* CS1N/CS0N values for each IDE register.
* The values correspond to the transformation:
* ((real IDE address) << 2) | CS1N value << 1 | CS0N value
*/
IDECTRL_ADDR_CMD = 0 + 2, /* CS1 */
IDECTRL_ADDR_DATA = (ATA_REG_DATA << 2) + 2,
IDECTRL_ADDR_ERROR = (ATA_REG_ERR << 2) + 2,
IDECTRL_ADDR_FEATURE = (ATA_REG_FEATURE << 2) + 2,
IDECTRL_ADDR_NSECT = (ATA_REG_NSECT << 2) + 2,
IDECTRL_ADDR_LBAL = (ATA_REG_LBAL << 2) + 2,
IDECTRL_ADDR_LBAM = (ATA_REG_LBAM << 2) + 2,
IDECTRL_ADDR_LBAH = (ATA_REG_LBAH << 2) + 2,
IDECTRL_ADDR_DEVICE = (ATA_REG_DEVICE << 2) + 2,
IDECTRL_ADDR_STATUS = (ATA_REG_STATUS << 2) + 2,
IDECTRL_ADDR_COMMAND = (ATA_REG_CMD << 2) + 2,
IDECTRL_ADDR_ALTSTATUS = (0x06 << 2) + 1, /* CS0 */
IDECTRL_ADDR_CTL = (0x06 << 2) + 1, /* CS0 */
/* IDE Configuration Register */
IDECFG = 0x04,
IDECFG_IDEEN = (1 << 0),
IDECFG_PIO = (1 << 1),
IDECFG_MDMA = (1 << 2),
IDECFG_UDMA = (1 << 3),
IDECFG_MODE_SHIFT = 4,
IDECFG_MODE_MASK = (0xf << 4),
IDECFG_WST_SHIFT = 8,
IDECFG_WST_MASK = (0x3 << 8),
/* MDMA Operation Register */
IDEMDMAOP = 0x08,
/* UDMA Operation Register */
IDEUDMAOP = 0x0c,
IDEUDMAOP_UEN = (1 << 0),
IDEUDMAOP_RWOP = (1 << 1),
/* PIO/MDMA/UDMA Data Registers */
IDEDATAOUT = 0x10,
IDEDATAIN = 0x14,
IDEMDMADATAOUT = 0x18,
IDEMDMADATAIN = 0x1c,
IDEUDMADATAOUT = 0x20,
IDEUDMADATAIN = 0x24,
/* UDMA Status Register */
IDEUDMASTS = 0x28,
IDEUDMASTS_DMAIDE = (1 << 16),
IDEUDMASTS_INTIDE = (1 << 17),
IDEUDMASTS_SBUSY = (1 << 18),
IDEUDMASTS_NDO = (1 << 24),
IDEUDMASTS_NDI = (1 << 25),
IDEUDMASTS_N4X = (1 << 26),
/* UDMA Debug Status Register */
IDEUDMADEBUG = 0x2c,
};
struct ep93xx_pata_data {
const struct platform_device *pdev;
void __iomem *ide_base;
struct ata_timing t;
bool iordy;
unsigned long udma_in_phys;
unsigned long udma_out_phys;
struct dma_chan *dma_rx_channel;
struct ep93xx_dma_data dma_rx_data;
struct dma_chan *dma_tx_channel;
struct ep93xx_dma_data dma_tx_data;
};
static void ep93xx_pata_clear_regs(void __iomem *base)
{
writel(IDECTRL_CS0N | IDECTRL_CS1N | IDECTRL_DIORN |
IDECTRL_DIOWN, base + IDECTRL);
writel(0, base + IDECFG);
writel(0, base + IDEMDMAOP);
writel(0, base + IDEUDMAOP);
writel(0, base + IDEDATAOUT);
writel(0, base + IDEDATAIN);
writel(0, base + IDEMDMADATAOUT);
writel(0, base + IDEMDMADATAIN);
writel(0, base + IDEUDMADATAOUT);
writel(0, base + IDEUDMADATAIN);
writel(0, base + IDEUDMADEBUG);
}
static bool ep93xx_pata_check_iordy(void __iomem *base)
{
return !!(readl(base + IDECTRL) & IDECTRL_IORDY);
}
/*
* According to EP93xx User's Guide, WST field of IDECFG specifies number
* of HCLK cycles to hold the data bus after a PIO write operation.
* It should be programmed to guarantee following delays:
*
* PIO Mode [ns]
* 0 30
* 1 20
* 2 15
* 3 10
* 4 5
*
* Maximum possible value for HCLK is 100MHz.
*/
static int ep93xx_pata_get_wst(int pio_mode)
{
int val;
if (pio_mode == 0)
val = 3;
else if (pio_mode < 3)
val = 2;
else
val = 1;
return val << IDECFG_WST_SHIFT;
}
static void ep93xx_pata_enable_pio(void __iomem *base, int pio_mode)
{
writel(IDECFG_IDEEN | IDECFG_PIO |
ep93xx_pata_get_wst(pio_mode) |
(pio_mode << IDECFG_MODE_SHIFT), base + IDECFG);
}
/*
* Based on delay loop found in mach-pxa/mp900.c.
*
* Single iteration should take 5 cpu cycles. This is 25ns assuming the
* fastest ep93xx cpu speed (200MHz) and is better optimized for PIO4 timings
* than eg. 20ns.
*/
static void ep93xx_pata_delay(unsigned long count)
{
__asm__ volatile (
"0:\n"
"mov r0, r0\n"
"subs %0, %1, #1\n"
"bge 0b\n"
: "=r" (count)
: "0" (count)
);
}
static unsigned long ep93xx_pata_wait_for_iordy(void __iomem *base,
unsigned long t2)
{
/*
* According to ATA specification, IORDY pin can be first sampled
* tA = 35ns after activation of DIOR-/DIOW-. Maximum IORDY pulse
* width is tB = 1250ns.
*
* We are already t2 delay loop iterations after activation of
* DIOR-/DIOW-, so we set timeout to (1250 + 35) / 25 - t2 additional
* delay loop iterations.
*/
unsigned long start = (1250 + 35) / 25 - t2;
unsigned long counter = start;
while (!ep93xx_pata_check_iordy(base) && counter--)
ep93xx_pata_delay(1);
return start - counter;
}
/* common part at start of ep93xx_pata_read/write() */
static void ep93xx_pata_rw_begin(void __iomem *base, unsigned long addr,
unsigned long t1)
{
writel(IDECTRL_DIOWN | IDECTRL_DIORN | addr, base + IDECTRL);
ep93xx_pata_delay(t1);
}
/* common part at end of ep93xx_pata_read/write() */
static void ep93xx_pata_rw_end(void __iomem *base, unsigned long addr,
bool iordy, unsigned long t0, unsigned long t2,
unsigned long t2i)
{
ep93xx_pata_delay(t2);
/* lengthen t2 if needed */
if (iordy)
t2 += ep93xx_pata_wait_for_iordy(base, t2);
writel(IDECTRL_DIOWN | IDECTRL_DIORN | addr, base + IDECTRL);
if (t0 > t2 && t0 - t2 > t2i)
ep93xx_pata_delay(t0 - t2);
else
ep93xx_pata_delay(t2i);
}
static u16 ep93xx_pata_read(struct ep93xx_pata_data *drv_data,
unsigned long addr,
bool reg)
{
void __iomem *base = drv_data->ide_base;
const struct ata_timing *t = &drv_data->t;
unsigned long t0 = reg ? t->cyc8b : t->cycle;
unsigned long t2 = reg ? t->act8b : t->active;
unsigned long t2i = reg ? t->rec8b : t->recover;
ep93xx_pata_rw_begin(base, addr, t->setup);
writel(IDECTRL_DIOWN | addr, base + IDECTRL);
/*
* The IDEDATAIN register is loaded from the DD pins at the positive
* edge of the DIORN signal. (EP93xx UG p27-14)
*/
ep93xx_pata_rw_end(base, addr, drv_data->iordy, t0, t2, t2i);
return readl(base + IDEDATAIN);
}
/* IDE register read */
static u16 ep93xx_pata_read_reg(struct ep93xx_pata_data *drv_data,
unsigned long addr)
{
return ep93xx_pata_read(drv_data, addr, true);
}
/* PIO data read */
static u16 ep93xx_pata_read_data(struct ep93xx_pata_data *drv_data,
unsigned long addr)
{
return ep93xx_pata_read(drv_data, addr, false);
}
static void ep93xx_pata_write(struct ep93xx_pata_data *drv_data,
u16 value, unsigned long addr,
bool reg)
{
void __iomem *base = drv_data->ide_base;
const struct ata_timing *t = &drv_data->t;
unsigned long t0 = reg ? t->cyc8b : t->cycle;
unsigned long t2 = reg ? t->act8b : t->active;
unsigned long t2i = reg ? t->rec8b : t->recover;
ep93xx_pata_rw_begin(base, addr, t->setup);
/*
* Value from IDEDATAOUT register is driven onto the DD pins when
* DIOWN is low. (EP93xx UG p27-13)
*/
writel(value, base + IDEDATAOUT);
writel(IDECTRL_DIORN | addr, base + IDECTRL);
ep93xx_pata_rw_end(base, addr, drv_data->iordy, t0, t2, t2i);
}
/* IDE register write */
static void ep93xx_pata_write_reg(struct ep93xx_pata_data *drv_data,
u16 value, unsigned long addr)
{
ep93xx_pata_write(drv_data, value, addr, true);
}
/* PIO data write */
static void ep93xx_pata_write_data(struct ep93xx_pata_data *drv_data,
u16 value, unsigned long addr)
{
ep93xx_pata_write(drv_data, value, addr, false);
}
static void ep93xx_pata_set_piomode(struct ata_port *ap,
struct ata_device *adev)
{
struct ep93xx_pata_data *drv_data = ap->host->private_data;
struct ata_device *pair = ata_dev_pair(adev);
/*
* Calculate timings for the delay loop, assuming ep93xx cpu speed
* is 200MHz (maximum possible for ep93xx). If actual cpu speed is
* slower, we will wait a bit longer in each delay.
* Additional division of cpu speed by 5, because single iteration
* of our delay loop takes 5 cpu cycles (25ns).
*/
unsigned long T = 1000000 / (200 / 5);
ata_timing_compute(adev, adev->pio_mode, &drv_data->t, T, 0);
if (pair && pair->pio_mode) {
struct ata_timing t;
ata_timing_compute(pair, pair->pio_mode, &t, T, 0);
ata_timing_merge(&t, &drv_data->t, &drv_data->t,
ATA_TIMING_SETUP | ATA_TIMING_8BIT);
}
drv_data->iordy = ata_pio_need_iordy(adev);
ep93xx_pata_enable_pio(drv_data->ide_base,
adev->pio_mode - XFER_PIO_0);
}
/* Note: original code is ata_sff_check_status */
static u8 ep93xx_pata_check_status(struct ata_port *ap)
{
struct ep93xx_pata_data *drv_data = ap->host->private_data;
return ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_STATUS);
}
static u8 ep93xx_pata_check_altstatus(struct ata_port *ap)
{
struct ep93xx_pata_data *drv_data = ap->host->private_data;
return ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_ALTSTATUS);
}
/* Note: original code is ata_sff_tf_load */
static void ep93xx_pata_tf_load(struct ata_port *ap,
const struct ata_taskfile *tf)
{
struct ep93xx_pata_data *drv_data = ap->host->private_data;
unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
if (tf->ctl != ap->last_ctl) {
ep93xx_pata_write_reg(drv_data, tf->ctl, IDECTRL_ADDR_CTL);
ap->last_ctl = tf->ctl;
ata_wait_idle(ap);
}
if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
ep93xx_pata_write_reg(drv_data, tf->hob_feature,
IDECTRL_ADDR_FEATURE);
ep93xx_pata_write_reg(drv_data, tf->hob_nsect,
IDECTRL_ADDR_NSECT);
ep93xx_pata_write_reg(drv_data, tf->hob_lbal,
IDECTRL_ADDR_LBAL);
ep93xx_pata_write_reg(drv_data, tf->hob_lbam,
IDECTRL_ADDR_LBAM);
ep93xx_pata_write_reg(drv_data, tf->hob_lbah,
IDECTRL_ADDR_LBAH);
}
if (is_addr) {
ep93xx_pata_write_reg(drv_data, tf->feature,
IDECTRL_ADDR_FEATURE);
ep93xx_pata_write_reg(drv_data, tf->nsect, IDECTRL_ADDR_NSECT);
ep93xx_pata_write_reg(drv_data, tf->lbal, IDECTRL_ADDR_LBAL);
ep93xx_pata_write_reg(drv_data, tf->lbam, IDECTRL_ADDR_LBAM);
ep93xx_pata_write_reg(drv_data, tf->lbah, IDECTRL_ADDR_LBAH);
}
if (tf->flags & ATA_TFLAG_DEVICE)
ep93xx_pata_write_reg(drv_data, tf->device,
IDECTRL_ADDR_DEVICE);
ata_wait_idle(ap);
}
/* Note: original code is ata_sff_tf_read */
static void ep93xx_pata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
{
struct ep93xx_pata_data *drv_data = ap->host->private_data;
tf->command = ep93xx_pata_check_status(ap);
tf->feature = ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_FEATURE);
tf->nsect = ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_NSECT);
tf->lbal = ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_LBAL);
tf->lbam = ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_LBAM);
tf->lbah = ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_LBAH);
tf->device = ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_DEVICE);
if (tf->flags & ATA_TFLAG_LBA48) {
ep93xx_pata_write_reg(drv_data, tf->ctl | ATA_HOB,
IDECTRL_ADDR_CTL);
tf->hob_feature = ep93xx_pata_read_reg(drv_data,
IDECTRL_ADDR_FEATURE);
tf->hob_nsect = ep93xx_pata_read_reg(drv_data,
IDECTRL_ADDR_NSECT);
tf->hob_lbal = ep93xx_pata_read_reg(drv_data,
IDECTRL_ADDR_LBAL);
tf->hob_lbam = ep93xx_pata_read_reg(drv_data,
IDECTRL_ADDR_LBAM);
tf->hob_lbah = ep93xx_pata_read_reg(drv_data,
IDECTRL_ADDR_LBAH);
ep93xx_pata_write_reg(drv_data, tf->ctl, IDECTRL_ADDR_CTL);
ap->last_ctl = tf->ctl;
}
}
/* Note: original code is ata_sff_exec_command */
static void ep93xx_pata_exec_command(struct ata_port *ap,
const struct ata_taskfile *tf)
{
struct ep93xx_pata_data *drv_data = ap->host->private_data;
ep93xx_pata_write_reg(drv_data, tf->command,
IDECTRL_ADDR_COMMAND);
ata_sff_pause(ap);
}
/* Note: original code is ata_sff_dev_select */
static void ep93xx_pata_dev_select(struct ata_port *ap, unsigned int device)
{
struct ep93xx_pata_data *drv_data = ap->host->private_data;
u8 tmp = ATA_DEVICE_OBS;
if (device != 0)
tmp |= ATA_DEV1;
ep93xx_pata_write_reg(drv_data, tmp, IDECTRL_ADDR_DEVICE);
ata_sff_pause(ap); /* needed; also flushes, for mmio */
}
/* Note: original code is ata_sff_set_devctl */
static void ep93xx_pata_set_devctl(struct ata_port *ap, u8 ctl)
{
struct ep93xx_pata_data *drv_data = ap->host->private_data;
ep93xx_pata_write_reg(drv_data, ctl, IDECTRL_ADDR_CTL);
}
/* Note: original code is ata_sff_data_xfer */
static unsigned int ep93xx_pata_data_xfer(struct ata_device *adev,
unsigned char *buf,
unsigned int buflen, int rw)
{
struct ata_port *ap = adev->link->ap;
struct ep93xx_pata_data *drv_data = ap->host->private_data;
u16 *data = (u16 *)buf;
unsigned int words = buflen >> 1;
/* Transfer multiple of 2 bytes */
while (words--)
if (rw == READ)
*data++ = cpu_to_le16(
ep93xx_pata_read_data(
drv_data, IDECTRL_ADDR_DATA));
else
ep93xx_pata_write_data(drv_data, le16_to_cpu(*data++),
IDECTRL_ADDR_DATA);
/* Transfer trailing 1 byte, if any. */
if (unlikely(buflen & 0x01)) {
unsigned char pad[2] = { };
buf += buflen - 1;
if (rw == READ) {
*pad = cpu_to_le16(
ep93xx_pata_read_data(
drv_data, IDECTRL_ADDR_DATA));
*buf = pad[0];
} else {
pad[0] = *buf;
ep93xx_pata_write_data(drv_data, le16_to_cpu(*pad),
IDECTRL_ADDR_DATA);
}
words++;
}
return words << 1;
}
/* Note: original code is ata_devchk */
static bool ep93xx_pata_device_is_present(struct ata_port *ap,
unsigned int device)
{
struct ep93xx_pata_data *drv_data = ap->host->private_data;
u8 nsect, lbal;
ap->ops->sff_dev_select(ap, device);
ep93xx_pata_write_reg(drv_data, 0x55, IDECTRL_ADDR_NSECT);
ep93xx_pata_write_reg(drv_data, 0xaa, IDECTRL_ADDR_LBAL);
ep93xx_pata_write_reg(drv_data, 0xaa, IDECTRL_ADDR_NSECT);
ep93xx_pata_write_reg(drv_data, 0x55, IDECTRL_ADDR_LBAL);
ep93xx_pata_write_reg(drv_data, 0x55, IDECTRL_ADDR_NSECT);
ep93xx_pata_write_reg(drv_data, 0xaa, IDECTRL_ADDR_LBAL);
nsect = ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_NSECT);
lbal = ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_LBAL);
if ((nsect == 0x55) && (lbal == 0xaa))
return true;
return false;
}
/* Note: original code is ata_sff_wait_after_reset */
static int ep93xx_pata_wait_after_reset(struct ata_link *link,
unsigned int devmask,
unsigned long deadline)
{
struct ata_port *ap = link->ap;
struct ep93xx_pata_data *drv_data = ap->host->private_data;
unsigned int dev0 = devmask & (1 << 0);
unsigned int dev1 = devmask & (1 << 1);
int rc, ret = 0;
ata_msleep(ap, ATA_WAIT_AFTER_RESET);
/* always check readiness of the master device */
rc = ata_sff_wait_ready(link, deadline);
/*
* -ENODEV means the odd clown forgot the D7 pulldown resistor
* and TF status is 0xff, bail out on it too.
*/
if (rc)
return rc;
/*
* if device 1 was found in ata_devchk, wait for register
* access briefly, then wait for BSY to clear.
*/
if (dev1) {
int i;
ap->ops->sff_dev_select(ap, 1);
/*
* Wait for register access. Some ATAPI devices fail
* to set nsect/lbal after reset, so don't waste too
* much time on it. We're gonna wait for !BSY anyway.
*/
for (i = 0; i < 2; i++) {
u8 nsect, lbal;
nsect = ep93xx_pata_read_reg(drv_data,
IDECTRL_ADDR_NSECT);
lbal = ep93xx_pata_read_reg(drv_data,
IDECTRL_ADDR_LBAL);
if (nsect == 1 && lbal == 1)
break;
msleep(50); /* give drive a breather */
}
rc = ata_sff_wait_ready(link, deadline);
if (rc) {
if (rc != -ENODEV)
return rc;
ret = rc;
}
}
/* is all this really necessary? */
ap->ops->sff_dev_select(ap, 0);
if (dev1)
ap->ops->sff_dev_select(ap, 1);
if (dev0)
ap->ops->sff_dev_select(ap, 0);
return ret;
}
/* Note: original code is ata_bus_softreset */
static int ep93xx_pata_bus_softreset(struct ata_port *ap, unsigned int devmask,
unsigned long deadline)
{
struct ep93xx_pata_data *drv_data = ap->host->private_data;
ep93xx_pata_write_reg(drv_data, ap->ctl, IDECTRL_ADDR_CTL);
udelay(20); /* FIXME: flush */
ep93xx_pata_write_reg(drv_data, ap->ctl | ATA_SRST, IDECTRL_ADDR_CTL);
udelay(20); /* FIXME: flush */
ep93xx_pata_write_reg(drv_data, ap->ctl, IDECTRL_ADDR_CTL);
ap->last_ctl = ap->ctl;
return ep93xx_pata_wait_after_reset(&ap->link, devmask, deadline);
}
static void ep93xx_pata_release_dma(struct ep93xx_pata_data *drv_data)
{
if (drv_data->dma_rx_channel) {
dma_release_channel(drv_data->dma_rx_channel);
drv_data->dma_rx_channel = NULL;
}
if (drv_data->dma_tx_channel) {
dma_release_channel(drv_data->dma_tx_channel);
drv_data->dma_tx_channel = NULL;
}
}
static bool ep93xx_pata_dma_filter(struct dma_chan *chan, void *filter_param)
{
if (ep93xx_dma_chan_is_m2p(chan))
return false;
chan->private = filter_param;
return true;
}
static void ep93xx_pata_dma_init(struct ep93xx_pata_data *drv_data)
{
const struct platform_device *pdev = drv_data->pdev;
dma_cap_mask_t mask;
struct dma_slave_config conf;
dma_cap_zero(mask);
dma_cap_set(DMA_SLAVE, mask);
/*
* Request two channels for IDE. Another possibility would be
* to request only one channel, and reprogram it's direction at
* start of new transfer.
*/
drv_data->dma_rx_data.port = EP93XX_DMA_IDE;
drv_data->dma_rx_data.direction = DMA_FROM_DEVICE;
drv_data->dma_rx_data.name = "ep93xx-pata-rx";
drv_data->dma_rx_channel = dma_request_channel(mask,
ep93xx_pata_dma_filter, &drv_data->dma_rx_data);
if (!drv_data->dma_rx_channel)
return;
drv_data->dma_tx_data.port = EP93XX_DMA_IDE;
drv_data->dma_tx_data.direction = DMA_TO_DEVICE;
drv_data->dma_tx_data.name = "ep93xx-pata-tx";
drv_data->dma_tx_channel = dma_request_channel(mask,
ep93xx_pata_dma_filter, &drv_data->dma_tx_data);
if (!drv_data->dma_tx_channel) {
dma_release_channel(drv_data->dma_rx_channel);
return;
}
/* Configure receive channel direction and source address */
memset(&conf, 0, sizeof(conf));
conf.direction = DMA_FROM_DEVICE;
conf.src_addr = drv_data->udma_in_phys;
conf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
if (dmaengine_slave_config(drv_data->dma_rx_channel, &conf)) {
dev_err(&pdev->dev, "failed to configure rx dma channel\n");
ep93xx_pata_release_dma(drv_data);
return;
}
/* Configure transmit channel direction and destination address */
memset(&conf, 0, sizeof(conf));
conf.direction = DMA_TO_DEVICE;
conf.dst_addr = drv_data->udma_out_phys;
conf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
if (dmaengine_slave_config(drv_data->dma_tx_channel, &conf)) {
dev_err(&pdev->dev, "failed to configure tx dma channel\n");
ep93xx_pata_release_dma(drv_data);
}
}
static void ep93xx_pata_dma_start(struct ata_queued_cmd *qc)
{
struct dma_async_tx_descriptor *txd;
struct ep93xx_pata_data *drv_data = qc->ap->host->private_data;
void __iomem *base = drv_data->ide_base;
struct ata_device *adev = qc->dev;
u32 v = qc->dma_dir == DMA_TO_DEVICE ? IDEUDMAOP_RWOP : 0;
struct dma_chan *channel = qc->dma_dir == DMA_TO_DEVICE
? drv_data->dma_tx_channel : drv_data->dma_rx_channel;
txd = channel->device->device_prep_slave_sg(channel, qc->sg,
qc->n_elem, qc->dma_dir, DMA_CTRL_ACK, NULL);
if (!txd) {
dev_err(qc->ap->dev, "failed to prepare slave for sg dma\n");
return;
}
txd->callback = NULL;
txd->callback_param = NULL;
if (dmaengine_submit(txd) < 0) {
dev_err(qc->ap->dev, "failed to submit dma transfer\n");
return;
}
dma_async_issue_pending(channel);
/*
* When enabling UDMA operation, IDEUDMAOP register needs to be
* programmed in three step sequence:
* 1) set or clear the RWOP bit,
* 2) perform dummy read of the register,
* 3) set the UEN bit.
*/
writel(v, base + IDEUDMAOP);
readl(base + IDEUDMAOP);
writel(v | IDEUDMAOP_UEN, base + IDEUDMAOP);
writel(IDECFG_IDEEN | IDECFG_UDMA |
((adev->xfer_mode - XFER_UDMA_0) << IDECFG_MODE_SHIFT),
base + IDECFG);
}
static void ep93xx_pata_dma_stop(struct ata_queued_cmd *qc)
{
struct ep93xx_pata_data *drv_data = qc->ap->host->private_data;
void __iomem *base = drv_data->ide_base;
/* terminate all dma transfers, if not yet finished */
dmaengine_terminate_all(drv_data->dma_rx_channel);
dmaengine_terminate_all(drv_data->dma_tx_channel);
/*
* To properly stop IDE-DMA, IDEUDMAOP register must to be cleared
* and IDECTRL register must be set to default value.
*/
writel(0, base + IDEUDMAOP);
writel(readl(base + IDECTRL) | IDECTRL_DIOWN | IDECTRL_DIORN |
IDECTRL_CS0N | IDECTRL_CS1N, base + IDECTRL);
ep93xx_pata_enable_pio(drv_data->ide_base,
qc->dev->pio_mode - XFER_PIO_0);
ata_sff_dma_pause(qc->ap);
}
static void ep93xx_pata_dma_setup(struct ata_queued_cmd *qc)
{
qc->ap->ops->sff_exec_command(qc->ap, &qc->tf);
}
static u8 ep93xx_pata_dma_status(struct ata_port *ap)
{
struct ep93xx_pata_data *drv_data = ap->host->private_data;
u32 val = readl(drv_data->ide_base + IDEUDMASTS);
/*
* UDMA Status Register bits:
*
* DMAIDE - DMA request signal from UDMA state machine,
* INTIDE - INT line generated by UDMA because of errors in the
* state machine,
* SBUSY - UDMA state machine busy, not in idle state,
* NDO - error for data-out not completed,
* NDI - error for data-in not completed,
* N4X - error for data transferred not multiplies of four
* 32-bit words.
* (EP93xx UG p27-17)
*/
if (val & IDEUDMASTS_NDO || val & IDEUDMASTS_NDI ||
val & IDEUDMASTS_N4X || val & IDEUDMASTS_INTIDE)
return ATA_DMA_ERR;
/* read INTRQ (INT[3]) pin input state */
if (readl(drv_data->ide_base + IDECTRL) & IDECTRL_INTRQ)
return ATA_DMA_INTR;
if (val & IDEUDMASTS_SBUSY || val & IDEUDMASTS_DMAIDE)
return ATA_DMA_ACTIVE;
return 0;
}
/* Note: original code is ata_sff_softreset */
static int ep93xx_pata_softreset(struct ata_link *al, unsigned int *classes,
unsigned long deadline)
{
struct ata_port *ap = al->ap;
unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
unsigned int devmask = 0;
int rc;
u8 err;
/* determine if device 0/1 are present */
if (ep93xx_pata_device_is_present(ap, 0))
devmask |= (1 << 0);
if (slave_possible && ep93xx_pata_device_is_present(ap, 1))
devmask |= (1 << 1);
/* select device 0 again */
ap->ops->sff_dev_select(al->ap, 0);
/* issue bus reset */
rc = ep93xx_pata_bus_softreset(ap, devmask, deadline);
/* if link is ocuppied, -ENODEV too is an error */
if (rc && (rc != -ENODEV || sata_scr_valid(al))) {
ata_link_printk(al, KERN_ERR, "SRST failed (errno=%d)\n",
rc);
return rc;
}
/* determine by signature whether we have ATA or ATAPI devices */
classes[0] = ata_sff_dev_classify(&al->device[0], devmask & (1 << 0),
&err);
if (slave_possible && err != 0x81)
classes[1] = ata_sff_dev_classify(&al->device[1],
devmask & (1 << 1), &err);
return 0;
}
/* Note: original code is ata_sff_drain_fifo */
static void ep93xx_pata_drain_fifo(struct ata_queued_cmd *qc)
{
int count;
struct ata_port *ap;
struct ep93xx_pata_data *drv_data;
/* We only need to flush incoming data when a command was running */
if (qc == NULL || qc->dma_dir == DMA_TO_DEVICE)
return;
ap = qc->ap;
drv_data = ap->host->private_data;
/* Drain up to 64K of data before we give up this recovery method */
for (count = 0; (ap->ops->sff_check_status(ap) & ATA_DRQ)
&& count < 65536; count += 2)
ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_DATA);
/* Can become DEBUG later */
if (count)
ata_port_printk(ap, KERN_DEBUG,
"drained %d bytes to clear DRQ.\n", count);
}
static int ep93xx_pata_port_start(struct ata_port *ap)
{
struct ep93xx_pata_data *drv_data = ap->host->private_data;
/*
* Set timings to safe values at startup (= number of ns from ATA
* specification), we'll switch to properly calculated values later.
*/
drv_data->t = *ata_timing_find_mode(XFER_PIO_0);
return 0;
}
static struct scsi_host_template ep93xx_pata_sht = {
ATA_BASE_SHT(DRV_NAME),
/* ep93xx dma implementation limit */
.sg_tablesize = 32,
/* ep93xx dma can't transfer 65536 bytes at once */
.dma_boundary = 0x7fff,
};
static struct ata_port_operations ep93xx_pata_port_ops = {
.inherits = &ata_bmdma_port_ops,
.qc_prep = ata_noop_qc_prep,
.softreset = ep93xx_pata_softreset,
.hardreset = ATA_OP_NULL,
.sff_dev_select = ep93xx_pata_dev_select,
.sff_set_devctl = ep93xx_pata_set_devctl,
.sff_check_status = ep93xx_pata_check_status,
.sff_check_altstatus = ep93xx_pata_check_altstatus,
.sff_tf_load = ep93xx_pata_tf_load,
.sff_tf_read = ep93xx_pata_tf_read,
.sff_exec_command = ep93xx_pata_exec_command,
.sff_data_xfer = ep93xx_pata_data_xfer,
.sff_drain_fifo = ep93xx_pata_drain_fifo,
.sff_irq_clear = ATA_OP_NULL,
.set_piomode = ep93xx_pata_set_piomode,
.bmdma_setup = ep93xx_pata_dma_setup,
.bmdma_start = ep93xx_pata_dma_start,
.bmdma_stop = ep93xx_pata_dma_stop,
.bmdma_status = ep93xx_pata_dma_status,
.cable_detect = ata_cable_unknown,
.port_start = ep93xx_pata_port_start,
};
static int __devinit ep93xx_pata_probe(struct platform_device *pdev)
{
struct ep93xx_pata_data *drv_data;
struct ata_host *host;
struct ata_port *ap;
unsigned int irq;
struct resource *mem_res;
void __iomem *ide_base;
int err;
err = ep93xx_ide_acquire_gpio(pdev);
if (err)
return err;
/* INT[3] (IRQ_EP93XX_EXT3) line connected as pull down */
irq = platform_get_irq(pdev, 0);
if (irq < 0) {
err = -ENXIO;
goto err_rel_gpio;
}
mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!mem_res) {
err = -ENXIO;
goto err_rel_gpio;
}
ide_base = devm_request_and_ioremap(&pdev->dev, mem_res);
if (!ide_base) {
err = -ENXIO;
goto err_rel_gpio;
}
drv_data = devm_kzalloc(&pdev->dev, sizeof(*drv_data), GFP_KERNEL);
if (!drv_data) {
err = -ENXIO;
goto err_rel_gpio;
}
platform_set_drvdata(pdev, drv_data);
drv_data->pdev = pdev;
drv_data->ide_base = ide_base;
drv_data->udma_in_phys = mem_res->start + IDEUDMADATAIN;
drv_data->udma_out_phys = mem_res->start + IDEUDMADATAOUT;
ep93xx_pata_dma_init(drv_data);
/* allocate host */
host = ata_host_alloc(&pdev->dev, 1);
if (!host) {
err = -ENXIO;
goto err_rel_dma;
}
ep93xx_pata_clear_regs(ide_base);
host->private_data = drv_data;
ap = host->ports[0];
ap->dev = &pdev->dev;
ap->ops = &ep93xx_pata_port_ops;
ap->flags |= ATA_FLAG_SLAVE_POSS;
ap->pio_mask = ATA_PIO4;
/*
* Maximum UDMA modes:
* EP931x rev.E0 - UDMA2
* EP931x rev.E1 - UDMA3
* EP931x rev.E2 - UDMA4
*
* MWDMA support was removed from EP931x rev.E2,
* so this driver supports only UDMA modes.
*/
if (drv_data->dma_rx_channel && drv_data->dma_tx_channel) {
int chip_rev = ep93xx_chip_revision();
if (chip_rev == EP93XX_CHIP_REV_E1)
ap->udma_mask = ATA_UDMA3;
else if (chip_rev == EP93XX_CHIP_REV_E2)
ap->udma_mask = ATA_UDMA4;
else
ap->udma_mask = ATA_UDMA2;
}
/* defaults, pio 0 */
ep93xx_pata_enable_pio(ide_base, 0);
dev_info(&pdev->dev, "version " DRV_VERSION "\n");
/* activate host */
err = ata_host_activate(host, irq, ata_bmdma_interrupt, 0,
&ep93xx_pata_sht);
if (err == 0)
return 0;
err_rel_dma:
ep93xx_pata_release_dma(drv_data);
err_rel_gpio:
ep93xx_ide_release_gpio(pdev);
return err;
}
static int __devexit ep93xx_pata_remove(struct platform_device *pdev)
{
struct ata_host *host = platform_get_drvdata(pdev);
struct ep93xx_pata_data *drv_data = host->private_data;
ata_host_detach(host);
ep93xx_pata_release_dma(drv_data);
ep93xx_pata_clear_regs(drv_data->ide_base);
ep93xx_ide_release_gpio(pdev);
return 0;
}
static struct platform_driver ep93xx_pata_platform_driver = {
.driver = {
.name = DRV_NAME,
.owner = THIS_MODULE,
},
.probe = ep93xx_pata_probe,
.remove = __devexit_p(ep93xx_pata_remove),
};
module_platform_driver(ep93xx_pata_platform_driver);
MODULE_AUTHOR("Alessandro Zummo, Lennert Buytenhek, Joao Ramos, "
"Bartlomiej Zolnierkiewicz, Rafal Prylowski");
MODULE_DESCRIPTION("low-level driver for cirrus ep93xx IDE controller");
MODULE_LICENSE("GPL");
MODULE_VERSION(DRV_VERSION);
MODULE_ALIAS("platform:pata_ep93xx");
| gpl-2.0 |
systemdaemon/systemd | src/linux/include/sound/soc.h | 52148 | /*
* linux/sound/soc.h -- ALSA SoC Layer
*
* Author: Liam Girdwood
* Created: Aug 11th 2005
* Copyright: Wolfson Microelectronics. PLC.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __LINUX_SND_SOC_H
#define __LINUX_SND_SOC_H
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/types.h>
#include <linux/notifier.h>
#include <linux/workqueue.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/regmap.h>
#include <linux/log2.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/compress_driver.h>
#include <sound/control.h>
#include <sound/ac97_codec.h>
/*
* Convenience kcontrol builders
*/
#define SOC_DOUBLE_VALUE(xreg, shift_left, shift_right, xmax, xinvert, xautodisable) \
((unsigned long)&(struct soc_mixer_control) \
{.reg = xreg, .rreg = xreg, .shift = shift_left, \
.rshift = shift_right, .max = xmax, .platform_max = xmax, \
.invert = xinvert, .autodisable = xautodisable})
#define SOC_DOUBLE_S_VALUE(xreg, shift_left, shift_right, xmin, xmax, xsign_bit, xinvert, xautodisable) \
((unsigned long)&(struct soc_mixer_control) \
{.reg = xreg, .rreg = xreg, .shift = shift_left, \
.rshift = shift_right, .min = xmin, .max = xmax, .platform_max = xmax, \
.sign_bit = xsign_bit, .invert = xinvert, .autodisable = xautodisable})
#define SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert, xautodisable) \
SOC_DOUBLE_VALUE(xreg, xshift, xshift, xmax, xinvert, xautodisable)
#define SOC_SINGLE_VALUE_EXT(xreg, xmax, xinvert) \
((unsigned long)&(struct soc_mixer_control) \
{.reg = xreg, .max = xmax, .platform_max = xmax, .invert = xinvert})
#define SOC_DOUBLE_R_VALUE(xlreg, xrreg, xshift, xmax, xinvert) \
((unsigned long)&(struct soc_mixer_control) \
{.reg = xlreg, .rreg = xrreg, .shift = xshift, .rshift = xshift, \
.max = xmax, .platform_max = xmax, .invert = xinvert})
#define SOC_DOUBLE_R_S_VALUE(xlreg, xrreg, xshift, xmin, xmax, xsign_bit, xinvert) \
((unsigned long)&(struct soc_mixer_control) \
{.reg = xlreg, .rreg = xrreg, .shift = xshift, .rshift = xshift, \
.max = xmax, .min = xmin, .platform_max = xmax, .sign_bit = xsign_bit, \
.invert = xinvert})
#define SOC_DOUBLE_R_RANGE_VALUE(xlreg, xrreg, xshift, xmin, xmax, xinvert) \
((unsigned long)&(struct soc_mixer_control) \
{.reg = xlreg, .rreg = xrreg, .shift = xshift, .rshift = xshift, \
.min = xmin, .max = xmax, .platform_max = xmax, .invert = xinvert})
#define SOC_SINGLE(xname, reg, shift, max, invert) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
.info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\
.put = snd_soc_put_volsw, \
.private_value = SOC_SINGLE_VALUE(reg, shift, max, invert, 0) }
#define SOC_SINGLE_RANGE(xname, xreg, xshift, xmin, xmax, xinvert) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
.info = snd_soc_info_volsw_range, .get = snd_soc_get_volsw_range, \
.put = snd_soc_put_volsw_range, \
.private_value = (unsigned long)&(struct soc_mixer_control) \
{.reg = xreg, .rreg = xreg, .shift = xshift, \
.rshift = xshift, .min = xmin, .max = xmax, \
.platform_max = xmax, .invert = xinvert} }
#define SOC_SINGLE_TLV(xname, reg, shift, max, invert, tlv_array) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
SNDRV_CTL_ELEM_ACCESS_READWRITE,\
.tlv.p = (tlv_array), \
.info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\
.put = snd_soc_put_volsw, \
.private_value = SOC_SINGLE_VALUE(reg, shift, max, invert, 0) }
#define SOC_SINGLE_SX_TLV(xname, xreg, xshift, xmin, xmax, tlv_array) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
SNDRV_CTL_ELEM_ACCESS_READWRITE, \
.tlv.p = (tlv_array),\
.info = snd_soc_info_volsw, \
.get = snd_soc_get_volsw_sx,\
.put = snd_soc_put_volsw_sx, \
.private_value = (unsigned long)&(struct soc_mixer_control) \
{.reg = xreg, .rreg = xreg, \
.shift = xshift, .rshift = xshift, \
.max = xmax, .min = xmin} }
#define SOC_SINGLE_RANGE_TLV(xname, xreg, xshift, xmin, xmax, xinvert, tlv_array) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
SNDRV_CTL_ELEM_ACCESS_READWRITE,\
.tlv.p = (tlv_array), \
.info = snd_soc_info_volsw_range, \
.get = snd_soc_get_volsw_range, .put = snd_soc_put_volsw_range, \
.private_value = (unsigned long)&(struct soc_mixer_control) \
{.reg = xreg, .rreg = xreg, .shift = xshift, \
.rshift = xshift, .min = xmin, .max = xmax, \
.platform_max = xmax, .invert = xinvert} }
#define SOC_DOUBLE(xname, reg, shift_left, shift_right, max, invert) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
.info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \
.put = snd_soc_put_volsw, \
.private_value = SOC_DOUBLE_VALUE(reg, shift_left, shift_right, \
max, invert, 0) }
#define SOC_DOUBLE_R(xname, reg_left, reg_right, xshift, xmax, xinvert) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
.info = snd_soc_info_volsw, \
.get = snd_soc_get_volsw, .put = snd_soc_put_volsw, \
.private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \
xmax, xinvert) }
#define SOC_DOUBLE_R_RANGE(xname, reg_left, reg_right, xshift, xmin, \
xmax, xinvert) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
.info = snd_soc_info_volsw_range, \
.get = snd_soc_get_volsw_range, .put = snd_soc_put_volsw_range, \
.private_value = SOC_DOUBLE_R_RANGE_VALUE(reg_left, reg_right, \
xshift, xmin, xmax, xinvert) }
#define SOC_DOUBLE_TLV(xname, reg, shift_left, shift_right, max, invert, tlv_array) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
SNDRV_CTL_ELEM_ACCESS_READWRITE,\
.tlv.p = (tlv_array), \
.info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \
.put = snd_soc_put_volsw, \
.private_value = SOC_DOUBLE_VALUE(reg, shift_left, shift_right, \
max, invert, 0) }
#define SOC_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax, xinvert, tlv_array) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
SNDRV_CTL_ELEM_ACCESS_READWRITE,\
.tlv.p = (tlv_array), \
.info = snd_soc_info_volsw, \
.get = snd_soc_get_volsw, .put = snd_soc_put_volsw, \
.private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \
xmax, xinvert) }
#define SOC_DOUBLE_R_RANGE_TLV(xname, reg_left, reg_right, xshift, xmin, \
xmax, xinvert, tlv_array) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
SNDRV_CTL_ELEM_ACCESS_READWRITE,\
.tlv.p = (tlv_array), \
.info = snd_soc_info_volsw_range, \
.get = snd_soc_get_volsw_range, .put = snd_soc_put_volsw_range, \
.private_value = SOC_DOUBLE_R_RANGE_VALUE(reg_left, reg_right, \
xshift, xmin, xmax, xinvert) }
#define SOC_DOUBLE_R_SX_TLV(xname, xreg, xrreg, xshift, xmin, xmax, tlv_array) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
SNDRV_CTL_ELEM_ACCESS_READWRITE, \
.tlv.p = (tlv_array), \
.info = snd_soc_info_volsw, \
.get = snd_soc_get_volsw_sx, \
.put = snd_soc_put_volsw_sx, \
.private_value = (unsigned long)&(struct soc_mixer_control) \
{.reg = xreg, .rreg = xrreg, \
.shift = xshift, .rshift = xshift, \
.max = xmax, .min = xmin} }
#define SOC_DOUBLE_R_S_TLV(xname, reg_left, reg_right, xshift, xmin, xmax, xsign_bit, xinvert, tlv_array) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
SNDRV_CTL_ELEM_ACCESS_READWRITE,\
.tlv.p = (tlv_array), \
.info = snd_soc_info_volsw, \
.get = snd_soc_get_volsw, .put = snd_soc_put_volsw, \
.private_value = SOC_DOUBLE_R_S_VALUE(reg_left, reg_right, xshift, \
xmin, xmax, xsign_bit, xinvert) }
#define SOC_DOUBLE_S8_TLV(xname, xreg, xmin, xmax, tlv_array) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
SNDRV_CTL_ELEM_ACCESS_READWRITE, \
.tlv.p = (tlv_array), \
.info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\
.put = snd_soc_put_volsw, \
.private_value = SOC_DOUBLE_S_VALUE(xreg, 0, 8, xmin, xmax, 7, 0, 0) }
#define SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xitems, xtexts) \
{ .reg = xreg, .shift_l = xshift_l, .shift_r = xshift_r, \
.items = xitems, .texts = xtexts, \
.mask = xitems ? roundup_pow_of_two(xitems) - 1 : 0}
#define SOC_ENUM_SINGLE(xreg, xshift, xitems, xtexts) \
SOC_ENUM_DOUBLE(xreg, xshift, xshift, xitems, xtexts)
#define SOC_ENUM_SINGLE_EXT(xitems, xtexts) \
{ .items = xitems, .texts = xtexts }
#define SOC_VALUE_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmask, xitems, xtexts, xvalues) \
{ .reg = xreg, .shift_l = xshift_l, .shift_r = xshift_r, \
.mask = xmask, .items = xitems, .texts = xtexts, .values = xvalues}
#define SOC_VALUE_ENUM_SINGLE(xreg, xshift, xmask, xnitmes, xtexts, xvalues) \
SOC_VALUE_ENUM_DOUBLE(xreg, xshift, xshift, xmask, xnitmes, xtexts, xvalues)
#define SOC_ENUM_SINGLE_VIRT(xitems, xtexts) \
SOC_ENUM_SINGLE(SND_SOC_NOPM, 0, xitems, xtexts)
#define SOC_ENUM(xname, xenum) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\
.info = snd_soc_info_enum_double, \
.get = snd_soc_get_enum_double, .put = snd_soc_put_enum_double, \
.private_value = (unsigned long)&xenum }
#define SOC_SINGLE_EXT(xname, xreg, xshift, xmax, xinvert,\
xhandler_get, xhandler_put) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
.info = snd_soc_info_volsw, \
.get = xhandler_get, .put = xhandler_put, \
.private_value = SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert, 0) }
#define SOC_DOUBLE_EXT(xname, reg, shift_left, shift_right, max, invert,\
xhandler_get, xhandler_put) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
.info = snd_soc_info_volsw, \
.get = xhandler_get, .put = xhandler_put, \
.private_value = \
SOC_DOUBLE_VALUE(reg, shift_left, shift_right, max, invert, 0) }
#define SOC_SINGLE_EXT_TLV(xname, xreg, xshift, xmax, xinvert,\
xhandler_get, xhandler_put, tlv_array) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
SNDRV_CTL_ELEM_ACCESS_READWRITE,\
.tlv.p = (tlv_array), \
.info = snd_soc_info_volsw, \
.get = xhandler_get, .put = xhandler_put, \
.private_value = SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert, 0) }
#define SOC_DOUBLE_EXT_TLV(xname, xreg, shift_left, shift_right, xmax, xinvert,\
xhandler_get, xhandler_put, tlv_array) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
SNDRV_CTL_ELEM_ACCESS_READWRITE, \
.tlv.p = (tlv_array), \
.info = snd_soc_info_volsw, \
.get = xhandler_get, .put = xhandler_put, \
.private_value = SOC_DOUBLE_VALUE(xreg, shift_left, shift_right, \
xmax, xinvert, 0) }
#define SOC_DOUBLE_R_EXT_TLV(xname, reg_left, reg_right, xshift, xmax, xinvert,\
xhandler_get, xhandler_put, tlv_array) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
SNDRV_CTL_ELEM_ACCESS_READWRITE, \
.tlv.p = (tlv_array), \
.info = snd_soc_info_volsw, \
.get = xhandler_get, .put = xhandler_put, \
.private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \
xmax, xinvert) }
#define SOC_SINGLE_BOOL_EXT(xname, xdata, xhandler_get, xhandler_put) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
.info = snd_soc_info_bool_ext, \
.get = xhandler_get, .put = xhandler_put, \
.private_value = xdata }
#define SOC_ENUM_EXT(xname, xenum, xhandler_get, xhandler_put) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
.info = snd_soc_info_enum_double, \
.get = xhandler_get, .put = xhandler_put, \
.private_value = (unsigned long)&xenum }
#define SOC_VALUE_ENUM_EXT(xname, xenum, xhandler_get, xhandler_put) \
SOC_ENUM_EXT(xname, xenum, xhandler_get, xhandler_put)
#define SND_SOC_BYTES(xname, xbase, xregs) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
.info = snd_soc_bytes_info, .get = snd_soc_bytes_get, \
.put = snd_soc_bytes_put, .private_value = \
((unsigned long)&(struct soc_bytes) \
{.base = xbase, .num_regs = xregs }) }
#define SND_SOC_BYTES_MASK(xname, xbase, xregs, xmask) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
.info = snd_soc_bytes_info, .get = snd_soc_bytes_get, \
.put = snd_soc_bytes_put, .private_value = \
((unsigned long)&(struct soc_bytes) \
{.base = xbase, .num_regs = xregs, \
.mask = xmask }) }
#define SND_SOC_BYTES_EXT(xname, xcount, xhandler_get, xhandler_put) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
.info = snd_soc_bytes_info_ext, \
.get = xhandler_get, .put = xhandler_put, \
.private_value = (unsigned long)&(struct soc_bytes_ext) \
{.max = xcount} }
#define SND_SOC_BYTES_TLV(xname, xcount, xhandler_get, xhandler_put) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
.access = SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE | \
SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
.tlv.c = (snd_soc_bytes_tlv_callback), \
.info = snd_soc_bytes_info_ext, \
.private_value = (unsigned long)&(struct soc_bytes_ext) \
{.max = xcount, .get = xhandler_get, .put = xhandler_put, } }
#define SOC_SINGLE_XR_SX(xname, xregbase, xregcount, xnbits, \
xmin, xmax, xinvert) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
.info = snd_soc_info_xr_sx, .get = snd_soc_get_xr_sx, \
.put = snd_soc_put_xr_sx, \
.private_value = (unsigned long)&(struct soc_mreg_control) \
{.regbase = xregbase, .regcount = xregcount, .nbits = xnbits, \
.invert = xinvert, .min = xmin, .max = xmax} }
#define SOC_SINGLE_STROBE(xname, xreg, xshift, xinvert) \
SOC_SINGLE_EXT(xname, xreg, xshift, 1, xinvert, \
snd_soc_get_strobe, snd_soc_put_strobe)
/*
* Simplified versions of above macros, declaring a struct and calculating
* ARRAY_SIZE internally
*/
#define SOC_ENUM_DOUBLE_DECL(name, xreg, xshift_l, xshift_r, xtexts) \
const struct soc_enum name = SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, \
ARRAY_SIZE(xtexts), xtexts)
#define SOC_ENUM_SINGLE_DECL(name, xreg, xshift, xtexts) \
SOC_ENUM_DOUBLE_DECL(name, xreg, xshift, xshift, xtexts)
#define SOC_ENUM_SINGLE_EXT_DECL(name, xtexts) \
const struct soc_enum name = SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(xtexts), xtexts)
#define SOC_VALUE_ENUM_DOUBLE_DECL(name, xreg, xshift_l, xshift_r, xmask, xtexts, xvalues) \
const struct soc_enum name = SOC_VALUE_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmask, \
ARRAY_SIZE(xtexts), xtexts, xvalues)
#define SOC_VALUE_ENUM_SINGLE_DECL(name, xreg, xshift, xmask, xtexts, xvalues) \
SOC_VALUE_ENUM_DOUBLE_DECL(name, xreg, xshift, xshift, xmask, xtexts, xvalues)
#define SOC_ENUM_SINGLE_VIRT_DECL(name, xtexts) \
const struct soc_enum name = SOC_ENUM_SINGLE_VIRT(ARRAY_SIZE(xtexts), xtexts)
/*
* Component probe and remove ordering levels for components with runtime
* dependencies.
*/
#define SND_SOC_COMP_ORDER_FIRST -2
#define SND_SOC_COMP_ORDER_EARLY -1
#define SND_SOC_COMP_ORDER_NORMAL 0
#define SND_SOC_COMP_ORDER_LATE 1
#define SND_SOC_COMP_ORDER_LAST 2
/*
* Bias levels
*
* @ON: Bias is fully on for audio playback and capture operations.
* @PREPARE: Prepare for audio operations. Called before DAPM switching for
* stream start and stop operations.
* @STANDBY: Low power standby state when no playback/capture operations are
* in progress. NOTE: The transition time between STANDBY and ON
* should be as fast as possible and no longer than 10ms.
* @OFF: Power Off. No restrictions on transition times.
*/
enum snd_soc_bias_level {
SND_SOC_BIAS_OFF = 0,
SND_SOC_BIAS_STANDBY = 1,
SND_SOC_BIAS_PREPARE = 2,
SND_SOC_BIAS_ON = 3,
};
struct device_node;
struct snd_jack;
struct snd_soc_card;
struct snd_soc_pcm_stream;
struct snd_soc_ops;
struct snd_soc_pcm_runtime;
struct snd_soc_dai;
struct snd_soc_dai_driver;
struct snd_soc_platform;
struct snd_soc_dai_link;
struct snd_soc_platform_driver;
struct snd_soc_codec;
struct snd_soc_codec_driver;
struct snd_soc_component;
struct snd_soc_component_driver;
struct soc_enum;
struct snd_soc_jack;
struct snd_soc_jack_zone;
struct snd_soc_jack_pin;
#include <sound/soc-dapm.h>
#include <sound/soc-dpcm.h>
struct snd_soc_jack_gpio;
typedef int (*hw_write_t)(void *,const char* ,int);
enum snd_soc_pcm_subclass {
SND_SOC_PCM_CLASS_PCM = 0,
SND_SOC_PCM_CLASS_BE = 1,
};
enum snd_soc_card_subclass {
SND_SOC_CARD_CLASS_INIT = 0,
SND_SOC_CARD_CLASS_RUNTIME = 1,
};
int snd_soc_codec_set_sysclk(struct snd_soc_codec *codec, int clk_id,
int source, unsigned int freq, int dir);
int snd_soc_codec_set_pll(struct snd_soc_codec *codec, int pll_id, int source,
unsigned int freq_in, unsigned int freq_out);
int snd_soc_register_card(struct snd_soc_card *card);
int snd_soc_unregister_card(struct snd_soc_card *card);
int devm_snd_soc_register_card(struct device *dev, struct snd_soc_card *card);
int snd_soc_suspend(struct device *dev);
int snd_soc_resume(struct device *dev);
int snd_soc_poweroff(struct device *dev);
int snd_soc_register_platform(struct device *dev,
const struct snd_soc_platform_driver *platform_drv);
int devm_snd_soc_register_platform(struct device *dev,
const struct snd_soc_platform_driver *platform_drv);
void snd_soc_unregister_platform(struct device *dev);
int snd_soc_add_platform(struct device *dev, struct snd_soc_platform *platform,
const struct snd_soc_platform_driver *platform_drv);
void snd_soc_remove_platform(struct snd_soc_platform *platform);
struct snd_soc_platform *snd_soc_lookup_platform(struct device *dev);
int snd_soc_register_codec(struct device *dev,
const struct snd_soc_codec_driver *codec_drv,
struct snd_soc_dai_driver *dai_drv, int num_dai);
void snd_soc_unregister_codec(struct device *dev);
int snd_soc_register_component(struct device *dev,
const struct snd_soc_component_driver *cmpnt_drv,
struct snd_soc_dai_driver *dai_drv, int num_dai);
int devm_snd_soc_register_component(struct device *dev,
const struct snd_soc_component_driver *cmpnt_drv,
struct snd_soc_dai_driver *dai_drv, int num_dai);
void snd_soc_unregister_component(struct device *dev);
int snd_soc_cache_init(struct snd_soc_codec *codec);
int snd_soc_cache_exit(struct snd_soc_codec *codec);
int snd_soc_platform_read(struct snd_soc_platform *platform,
unsigned int reg);
int snd_soc_platform_write(struct snd_soc_platform *platform,
unsigned int reg, unsigned int val);
int soc_new_pcm(struct snd_soc_pcm_runtime *rtd, int num);
int soc_new_compress(struct snd_soc_pcm_runtime *rtd, int num);
struct snd_pcm_substream *snd_soc_get_dai_substream(struct snd_soc_card *card,
const char *dai_link, int stream);
struct snd_soc_pcm_runtime *snd_soc_get_pcm_runtime(struct snd_soc_card *card,
const char *dai_link);
bool snd_soc_runtime_ignore_pmdown_time(struct snd_soc_pcm_runtime *rtd);
void snd_soc_runtime_activate(struct snd_soc_pcm_runtime *rtd, int stream);
void snd_soc_runtime_deactivate(struct snd_soc_pcm_runtime *rtd, int stream);
int snd_soc_runtime_set_dai_fmt(struct snd_soc_pcm_runtime *rtd,
unsigned int dai_fmt);
/* Utility functions to get clock rates from various things */
int snd_soc_calc_frame_size(int sample_size, int channels, int tdm_slots);
int snd_soc_params_to_frame_size(struct snd_pcm_hw_params *params);
int snd_soc_calc_bclk(int fs, int sample_size, int channels, int tdm_slots);
int snd_soc_params_to_bclk(struct snd_pcm_hw_params *parms);
/* set runtime hw params */
int snd_soc_set_runtime_hwparams(struct snd_pcm_substream *substream,
const struct snd_pcm_hardware *hw);
int snd_soc_platform_trigger(struct snd_pcm_substream *substream,
int cmd, struct snd_soc_platform *platform);
int soc_dai_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai);
/* Jack reporting */
int snd_soc_jack_new(struct snd_soc_codec *codec, const char *id, int type,
struct snd_soc_jack *jack);
void snd_soc_jack_report(struct snd_soc_jack *jack, int status, int mask);
int snd_soc_jack_add_pins(struct snd_soc_jack *jack, int count,
struct snd_soc_jack_pin *pins);
void snd_soc_jack_notifier_register(struct snd_soc_jack *jack,
struct notifier_block *nb);
void snd_soc_jack_notifier_unregister(struct snd_soc_jack *jack,
struct notifier_block *nb);
int snd_soc_jack_add_zones(struct snd_soc_jack *jack, int count,
struct snd_soc_jack_zone *zones);
int snd_soc_jack_get_type(struct snd_soc_jack *jack, int micbias_voltage);
#ifdef CONFIG_GPIOLIB
int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count,
struct snd_soc_jack_gpio *gpios);
int snd_soc_jack_add_gpiods(struct device *gpiod_dev,
struct snd_soc_jack *jack,
int count, struct snd_soc_jack_gpio *gpios);
void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count,
struct snd_soc_jack_gpio *gpios);
#else
static inline int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count,
struct snd_soc_jack_gpio *gpios)
{
return 0;
}
static inline int snd_soc_jack_add_gpiods(struct device *gpiod_dev,
struct snd_soc_jack *jack,
int count,
struct snd_soc_jack_gpio *gpios)
{
return 0;
}
static inline void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count,
struct snd_soc_jack_gpio *gpios)
{
}
#endif
/* codec register bit access */
int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned int reg,
unsigned int mask, unsigned int value);
int snd_soc_update_bits_locked(struct snd_soc_codec *codec,
unsigned int reg, unsigned int mask,
unsigned int value);
int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned int reg,
unsigned int mask, unsigned int value);
#ifdef CONFIG_SND_SOC_AC97_BUS
struct snd_ac97 *snd_soc_alloc_ac97_codec(struct snd_soc_codec *codec);
struct snd_ac97 *snd_soc_new_ac97_codec(struct snd_soc_codec *codec);
void snd_soc_free_ac97_codec(struct snd_ac97 *ac97);
int snd_soc_set_ac97_ops(struct snd_ac97_bus_ops *ops);
int snd_soc_set_ac97_ops_of_reset(struct snd_ac97_bus_ops *ops,
struct platform_device *pdev);
extern struct snd_ac97_bus_ops *soc_ac97_ops;
#else
static inline int snd_soc_set_ac97_ops_of_reset(struct snd_ac97_bus_ops *ops,
struct platform_device *pdev)
{
return 0;
}
static inline int snd_soc_set_ac97_ops(struct snd_ac97_bus_ops *ops)
{
return 0;
}
#endif
/*
*Controls
*/
struct snd_kcontrol *snd_soc_cnew(const struct snd_kcontrol_new *_template,
void *data, const char *long_name,
const char *prefix);
struct snd_kcontrol *snd_soc_card_get_kcontrol(struct snd_soc_card *soc_card,
const char *name);
int snd_soc_add_component_controls(struct snd_soc_component *component,
const struct snd_kcontrol_new *controls, unsigned int num_controls);
int snd_soc_add_codec_controls(struct snd_soc_codec *codec,
const struct snd_kcontrol_new *controls, unsigned int num_controls);
int snd_soc_add_platform_controls(struct snd_soc_platform *platform,
const struct snd_kcontrol_new *controls, unsigned int num_controls);
int snd_soc_add_card_controls(struct snd_soc_card *soc_card,
const struct snd_kcontrol_new *controls, int num_controls);
int snd_soc_add_dai_controls(struct snd_soc_dai *dai,
const struct snd_kcontrol_new *controls, int num_controls);
int snd_soc_info_enum_double(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo);
int snd_soc_get_enum_double(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
int snd_soc_put_enum_double(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
int snd_soc_info_volsw(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo);
#define snd_soc_info_bool_ext snd_ctl_boolean_mono_info
int snd_soc_get_volsw(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
int snd_soc_put_volsw(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
#define snd_soc_get_volsw_2r snd_soc_get_volsw
#define snd_soc_put_volsw_2r snd_soc_put_volsw
int snd_soc_get_volsw_sx(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
int snd_soc_info_volsw_range(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo);
int snd_soc_put_volsw_range(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
int snd_soc_get_volsw_range(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
int snd_soc_limit_volume(struct snd_soc_codec *codec,
const char *name, int max);
int snd_soc_bytes_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo);
int snd_soc_bytes_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
int snd_soc_bytes_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
int snd_soc_bytes_info_ext(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *ucontrol);
int snd_soc_bytes_tlv_callback(struct snd_kcontrol *kcontrol, int op_flag,
unsigned int size, unsigned int __user *tlv);
int snd_soc_info_xr_sx(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo);
int snd_soc_get_xr_sx(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
int snd_soc_put_xr_sx(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
int snd_soc_get_strobe(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
int snd_soc_put_strobe(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
/**
* struct snd_soc_jack_pin - Describes a pin to update based on jack detection
*
* @pin: name of the pin to update
* @mask: bits to check for in reported jack status
* @invert: if non-zero then pin is enabled when status is not reported
*/
struct snd_soc_jack_pin {
struct list_head list;
const char *pin;
int mask;
bool invert;
};
/**
* struct snd_soc_jack_zone - Describes voltage zones of jack detection
*
* @min_mv: start voltage in mv
* @max_mv: end voltage in mv
* @jack_type: type of jack that is expected for this voltage
* @debounce_time: debounce_time for jack, codec driver should wait for this
* duration before reading the adc for voltages
* @:list: list container
*/
struct snd_soc_jack_zone {
unsigned int min_mv;
unsigned int max_mv;
unsigned int jack_type;
unsigned int debounce_time;
struct list_head list;
};
/**
* struct snd_soc_jack_gpio - Describes a gpio pin for jack detection
*
* @gpio: legacy gpio number
* @idx: gpio descriptor index within the function of the GPIO
* consumer device
* @gpiod_dev GPIO consumer device
* @name: gpio name. Also as connection ID for the GPIO consumer
* device function name lookup
* @report: value to report when jack detected
* @invert: report presence in low state
* @debouce_time: debouce time in ms
* @wake: enable as wake source
* @jack_status_check: callback function which overrides the detection
* to provide more complex checks (eg, reading an
* ADC).
*/
struct snd_soc_jack_gpio {
unsigned int gpio;
unsigned int idx;
struct device *gpiod_dev;
const char *name;
int report;
int invert;
int debounce_time;
bool wake;
struct snd_soc_jack *jack;
struct delayed_work work;
struct gpio_desc *desc;
void *data;
int (*jack_status_check)(void *data);
};
struct snd_soc_jack {
struct mutex mutex;
struct snd_jack *jack;
struct snd_soc_codec *codec;
struct list_head pins;
int status;
struct blocking_notifier_head notifier;
struct list_head jack_zones;
};
/* SoC PCM stream information */
struct snd_soc_pcm_stream {
const char *stream_name;
u64 formats; /* SNDRV_PCM_FMTBIT_* */
unsigned int rates; /* SNDRV_PCM_RATE_* */
unsigned int rate_min; /* min rate */
unsigned int rate_max; /* max rate */
unsigned int channels_min; /* min channels */
unsigned int channels_max; /* max channels */
unsigned int sig_bits; /* number of bits of content */
};
/* SoC audio ops */
struct snd_soc_ops {
int (*startup)(struct snd_pcm_substream *);
void (*shutdown)(struct snd_pcm_substream *);
int (*hw_params)(struct snd_pcm_substream *, struct snd_pcm_hw_params *);
int (*hw_free)(struct snd_pcm_substream *);
int (*prepare)(struct snd_pcm_substream *);
int (*trigger)(struct snd_pcm_substream *, int);
};
struct snd_soc_compr_ops {
int (*startup)(struct snd_compr_stream *);
void (*shutdown)(struct snd_compr_stream *);
int (*set_params)(struct snd_compr_stream *);
int (*trigger)(struct snd_compr_stream *);
};
/* component interface */
struct snd_soc_component_driver {
const char *name;
/* Default control and setup, added after probe() is run */
const struct snd_kcontrol_new *controls;
unsigned int num_controls;
const struct snd_soc_dapm_widget *dapm_widgets;
unsigned int num_dapm_widgets;
const struct snd_soc_dapm_route *dapm_routes;
unsigned int num_dapm_routes;
int (*probe)(struct snd_soc_component *);
void (*remove)(struct snd_soc_component *);
/* DT */
int (*of_xlate_dai_name)(struct snd_soc_component *component,
struct of_phandle_args *args,
const char **dai_name);
void (*seq_notifier)(struct snd_soc_component *, enum snd_soc_dapm_type,
int subseq);
int (*stream_event)(struct snd_soc_component *, int event);
/* probe ordering - for components with runtime dependencies */
int probe_order;
int remove_order;
};
struct snd_soc_component {
const char *name;
int id;
const char *name_prefix;
struct device *dev;
struct snd_soc_card *card;
unsigned int active;
unsigned int ignore_pmdown_time:1; /* pmdown_time is ignored at stop */
unsigned int registered_as_component:1;
unsigned int probed:1;
struct list_head list;
struct snd_soc_dai_driver *dai_drv;
int num_dai;
const struct snd_soc_component_driver *driver;
struct list_head dai_list;
int (*read)(struct snd_soc_component *, unsigned int, unsigned int *);
int (*write)(struct snd_soc_component *, unsigned int, unsigned int);
struct regmap *regmap;
int val_bytes;
struct mutex io_mutex;
#ifdef CONFIG_DEBUG_FS
struct dentry *debugfs_root;
#endif
/*
* DO NOT use any of the fields below in drivers, they are temporary and
* are going to be removed again soon. If you use them in driver code the
* driver will be marked as BROKEN when these fields are removed.
*/
/* Don't use these, use snd_soc_component_get_dapm() */
struct snd_soc_dapm_context dapm;
struct snd_soc_dapm_context *dapm_ptr;
const struct snd_kcontrol_new *controls;
unsigned int num_controls;
const struct snd_soc_dapm_widget *dapm_widgets;
unsigned int num_dapm_widgets;
const struct snd_soc_dapm_route *dapm_routes;
unsigned int num_dapm_routes;
struct snd_soc_codec *codec;
int (*probe)(struct snd_soc_component *);
void (*remove)(struct snd_soc_component *);
#ifdef CONFIG_DEBUG_FS
void (*init_debugfs)(struct snd_soc_component *component);
const char *debugfs_prefix;
#endif
};
/* SoC Audio Codec device */
struct snd_soc_codec {
struct device *dev;
const struct snd_soc_codec_driver *driver;
struct list_head list;
struct list_head card_list;
/* runtime */
unsigned int cache_bypass:1; /* Suppress access to the cache */
unsigned int suspended:1; /* Codec is in suspend PM state */
unsigned int cache_init:1; /* codec cache has been initialized */
/* codec IO */
void *control_data; /* codec control (i2c/3wire) data */
hw_write_t hw_write;
void *reg_cache;
/* component */
struct snd_soc_component component;
/* dapm */
struct snd_soc_dapm_context dapm;
#ifdef CONFIG_DEBUG_FS
struct dentry *debugfs_reg;
#endif
};
/* codec driver */
struct snd_soc_codec_driver {
/* driver ops */
int (*probe)(struct snd_soc_codec *);
int (*remove)(struct snd_soc_codec *);
int (*suspend)(struct snd_soc_codec *);
int (*resume)(struct snd_soc_codec *);
struct snd_soc_component_driver component_driver;
/* Default control and setup, added after probe() is run */
const struct snd_kcontrol_new *controls;
int num_controls;
const struct snd_soc_dapm_widget *dapm_widgets;
int num_dapm_widgets;
const struct snd_soc_dapm_route *dapm_routes;
int num_dapm_routes;
/* codec wide operations */
int (*set_sysclk)(struct snd_soc_codec *codec,
int clk_id, int source, unsigned int freq, int dir);
int (*set_pll)(struct snd_soc_codec *codec, int pll_id, int source,
unsigned int freq_in, unsigned int freq_out);
/* codec IO */
struct regmap *(*get_regmap)(struct device *);
unsigned int (*read)(struct snd_soc_codec *, unsigned int);
int (*write)(struct snd_soc_codec *, unsigned int, unsigned int);
unsigned int reg_cache_size;
short reg_cache_step;
short reg_word_size;
const void *reg_cache_default;
/* codec bias level */
int (*set_bias_level)(struct snd_soc_codec *,
enum snd_soc_bias_level level);
bool idle_bias_off;
bool suspend_bias_off;
void (*seq_notifier)(struct snd_soc_dapm_context *,
enum snd_soc_dapm_type, int);
bool ignore_pmdown_time; /* Doesn't benefit from pmdown delay */
};
/* SoC platform interface */
struct snd_soc_platform_driver {
int (*probe)(struct snd_soc_platform *);
int (*remove)(struct snd_soc_platform *);
struct snd_soc_component_driver component_driver;
/* pcm creation and destruction */
int (*pcm_new)(struct snd_soc_pcm_runtime *);
void (*pcm_free)(struct snd_pcm *);
/*
* For platform caused delay reporting.
* Optional.
*/
snd_pcm_sframes_t (*delay)(struct snd_pcm_substream *,
struct snd_soc_dai *);
/* platform stream pcm ops */
const struct snd_pcm_ops *ops;
/* platform stream compress ops */
const struct snd_compr_ops *compr_ops;
int (*bespoke_trigger)(struct snd_pcm_substream *, int);
};
struct snd_soc_dai_link_component {
const char *name;
struct device_node *of_node;
const char *dai_name;
};
struct snd_soc_platform {
struct device *dev;
const struct snd_soc_platform_driver *driver;
struct list_head list;
struct snd_soc_component component;
};
struct snd_soc_dai_link {
/* config - must be set by machine driver */
const char *name; /* Codec name */
const char *stream_name; /* Stream name */
/*
* You MAY specify the link's CPU-side device, either by device name,
* or by DT/OF node, but not both. If this information is omitted,
* the CPU-side DAI is matched using .cpu_dai_name only, which hence
* must be globally unique. These fields are currently typically used
* only for codec to codec links, or systems using device tree.
*/
const char *cpu_name;
struct device_node *cpu_of_node;
/*
* You MAY specify the DAI name of the CPU DAI. If this information is
* omitted, the CPU-side DAI is matched using .cpu_name/.cpu_of_node
* only, which only works well when that device exposes a single DAI.
*/
const char *cpu_dai_name;
/*
* You MUST specify the link's codec, either by device name, or by
* DT/OF node, but not both.
*/
const char *codec_name;
struct device_node *codec_of_node;
/* You MUST specify the DAI name within the codec */
const char *codec_dai_name;
struct snd_soc_dai_link_component *codecs;
unsigned int num_codecs;
/*
* You MAY specify the link's platform/PCM/DMA driver, either by
* device name, or by DT/OF node, but not both. Some forms of link
* do not need a platform.
*/
const char *platform_name;
struct device_node *platform_of_node;
int be_id; /* optional ID for machine driver BE identification */
const struct snd_soc_pcm_stream *params;
unsigned int dai_fmt; /* format to set on init */
enum snd_soc_dpcm_trigger trigger[2]; /* trigger type for DPCM */
/* Keep DAI active over suspend */
unsigned int ignore_suspend:1;
/* Symmetry requirements */
unsigned int symmetric_rates:1;
unsigned int symmetric_channels:1;
unsigned int symmetric_samplebits:1;
/* Do not create a PCM for this DAI link (Backend link) */
unsigned int no_pcm:1;
/* This DAI link can route to other DAI links at runtime (Frontend)*/
unsigned int dynamic:1;
/* DPCM capture and Playback support */
unsigned int dpcm_capture:1;
unsigned int dpcm_playback:1;
/* pmdown_time is ignored at stop */
unsigned int ignore_pmdown_time:1;
/* codec/machine specific init - e.g. add machine controls */
int (*init)(struct snd_soc_pcm_runtime *rtd);
/* optional hw_params re-writing for BE and FE sync */
int (*be_hw_params_fixup)(struct snd_soc_pcm_runtime *rtd,
struct snd_pcm_hw_params *params);
/* machine stream operations */
const struct snd_soc_ops *ops;
const struct snd_soc_compr_ops *compr_ops;
/* For unidirectional dai links */
bool playback_only;
bool capture_only;
};
struct snd_soc_codec_conf {
/*
* specify device either by device name, or by
* DT/OF node, but not both.
*/
const char *dev_name;
struct device_node *of_node;
/*
* optional map of kcontrol, widget and path name prefixes that are
* associated per device
*/
const char *name_prefix;
};
struct snd_soc_aux_dev {
const char *name; /* Codec name */
/*
* specify multi-codec either by device name, or by
* DT/OF node, but not both.
*/
const char *codec_name;
struct device_node *codec_of_node;
/* codec/machine specific init - e.g. add machine controls */
int (*init)(struct snd_soc_component *component);
};
/* SoC card */
struct snd_soc_card {
const char *name;
const char *long_name;
const char *driver_name;
struct device *dev;
struct snd_card *snd_card;
struct module *owner;
struct mutex mutex;
struct mutex dapm_mutex;
bool instantiated;
int (*probe)(struct snd_soc_card *card);
int (*late_probe)(struct snd_soc_card *card);
int (*remove)(struct snd_soc_card *card);
/* the pre and post PM functions are used to do any PM work before and
* after the codec and DAI's do any PM work. */
int (*suspend_pre)(struct snd_soc_card *card);
int (*suspend_post)(struct snd_soc_card *card);
int (*resume_pre)(struct snd_soc_card *card);
int (*resume_post)(struct snd_soc_card *card);
/* callbacks */
int (*set_bias_level)(struct snd_soc_card *,
struct snd_soc_dapm_context *dapm,
enum snd_soc_bias_level level);
int (*set_bias_level_post)(struct snd_soc_card *,
struct snd_soc_dapm_context *dapm,
enum snd_soc_bias_level level);
long pmdown_time;
/* CPU <--> Codec DAI links */
struct snd_soc_dai_link *dai_link;
int num_links;
struct snd_soc_pcm_runtime *rtd;
int num_rtd;
/* optional codec specific configuration */
struct snd_soc_codec_conf *codec_conf;
int num_configs;
/*
* optional auxiliary devices such as amplifiers or codecs with DAI
* link unused
*/
struct snd_soc_aux_dev *aux_dev;
int num_aux_devs;
struct snd_soc_pcm_runtime *rtd_aux;
int num_aux_rtd;
const struct snd_kcontrol_new *controls;
int num_controls;
/*
* Card-specific routes and widgets.
*/
const struct snd_soc_dapm_widget *dapm_widgets;
int num_dapm_widgets;
const struct snd_soc_dapm_route *dapm_routes;
int num_dapm_routes;
bool fully_routed;
struct work_struct deferred_resume_work;
/* lists of probed devices belonging to this card */
struct list_head codec_dev_list;
struct list_head widgets;
struct list_head paths;
struct list_head dapm_list;
struct list_head dapm_dirty;
/* Generic DAPM context for the card */
struct snd_soc_dapm_context dapm;
struct snd_soc_dapm_stats dapm_stats;
struct snd_soc_dapm_update *update;
#ifdef CONFIG_DEBUG_FS
struct dentry *debugfs_card_root;
struct dentry *debugfs_pop_time;
#endif
u32 pop_time;
void *drvdata;
};
/* SoC machine DAI configuration, glues a codec and cpu DAI together */
struct snd_soc_pcm_runtime {
struct device *dev;
struct snd_soc_card *card;
struct snd_soc_dai_link *dai_link;
struct mutex pcm_mutex;
enum snd_soc_pcm_subclass pcm_subclass;
struct snd_pcm_ops ops;
unsigned int dev_registered:1;
/* Dynamic PCM BE runtime data */
struct snd_soc_dpcm_runtime dpcm[2];
int fe_compr;
long pmdown_time;
unsigned char pop_wait:1;
/* runtime devices */
struct snd_pcm *pcm;
struct snd_compr *compr;
struct snd_soc_codec *codec;
struct snd_soc_platform *platform;
struct snd_soc_dai *codec_dai;
struct snd_soc_dai *cpu_dai;
struct snd_soc_component *component; /* Only valid for AUX dev rtds */
struct snd_soc_dai **codec_dais;
unsigned int num_codecs;
struct delayed_work delayed_work;
#ifdef CONFIG_DEBUG_FS
struct dentry *debugfs_dpcm_root;
struct dentry *debugfs_dpcm_state;
#endif
};
/* mixer control */
struct soc_mixer_control {
int min, max, platform_max;
int reg, rreg;
unsigned int shift, rshift;
unsigned int sign_bit;
unsigned int invert:1;
unsigned int autodisable:1;
};
struct soc_bytes {
int base;
int num_regs;
u32 mask;
};
struct soc_bytes_ext {
int max;
/* used for TLV byte control */
int (*get)(unsigned int __user *bytes, unsigned int size);
int (*put)(const unsigned int __user *bytes, unsigned int size);
};
/* multi register control */
struct soc_mreg_control {
long min, max;
unsigned int regbase, regcount, nbits, invert;
};
/* enumerated kcontrol */
struct soc_enum {
int reg;
unsigned char shift_l;
unsigned char shift_r;
unsigned int items;
unsigned int mask;
const char * const *texts;
const unsigned int *values;
};
/**
* snd_soc_component_to_codec() - Casts a component to the CODEC it is embedded in
* @component: The component to cast to a CODEC
*
* This function must only be used on components that are known to be CODECs.
* Otherwise the behavior is undefined.
*/
static inline struct snd_soc_codec *snd_soc_component_to_codec(
struct snd_soc_component *component)
{
return container_of(component, struct snd_soc_codec, component);
}
/**
* snd_soc_component_to_platform() - Casts a component to the platform it is embedded in
* @component: The component to cast to a platform
*
* This function must only be used on components that are known to be platforms.
* Otherwise the behavior is undefined.
*/
static inline struct snd_soc_platform *snd_soc_component_to_platform(
struct snd_soc_component *component)
{
return container_of(component, struct snd_soc_platform, component);
}
/**
* snd_soc_dapm_to_component() - Casts a DAPM context to the component it is
* embedded in
* @dapm: The DAPM context to cast to the component
*
* This function must only be used on DAPM contexts that are known to be part of
* a component (e.g. in a component driver). Otherwise the behavior is
* undefined.
*/
static inline struct snd_soc_component *snd_soc_dapm_to_component(
struct snd_soc_dapm_context *dapm)
{
return container_of(dapm, struct snd_soc_component, dapm);
}
/**
* snd_soc_dapm_to_codec() - Casts a DAPM context to the CODEC it is embedded in
* @dapm: The DAPM context to cast to the CODEC
*
* This function must only be used on DAPM contexts that are known to be part of
* a CODEC (e.g. in a CODEC driver). Otherwise the behavior is undefined.
*/
static inline struct snd_soc_codec *snd_soc_dapm_to_codec(
struct snd_soc_dapm_context *dapm)
{
return container_of(dapm, struct snd_soc_codec, dapm);
}
/**
* snd_soc_dapm_to_platform() - Casts a DAPM context to the platform it is
* embedded in
* @dapm: The DAPM context to cast to the platform.
*
* This function must only be used on DAPM contexts that are known to be part of
* a platform (e.g. in a platform driver). Otherwise the behavior is undefined.
*/
static inline struct snd_soc_platform *snd_soc_dapm_to_platform(
struct snd_soc_dapm_context *dapm)
{
return snd_soc_component_to_platform(snd_soc_dapm_to_component(dapm));
}
/**
* snd_soc_component_get_dapm() - Returns the DAPM context associated with a
* component
* @component: The component for which to get the DAPM context
*/
static inline struct snd_soc_dapm_context *snd_soc_component_get_dapm(
struct snd_soc_component *component)
{
return component->dapm_ptr;
}
/* codec IO */
unsigned int snd_soc_read(struct snd_soc_codec *codec, unsigned int reg);
int snd_soc_write(struct snd_soc_codec *codec, unsigned int reg,
unsigned int val);
/**
* snd_soc_cache_sync() - Sync the register cache with the hardware
* @codec: CODEC to sync
*
* Note: This function will call regcache_sync()
*/
static inline int snd_soc_cache_sync(struct snd_soc_codec *codec)
{
return regcache_sync(codec->component.regmap);
}
/* component IO */
int snd_soc_component_read(struct snd_soc_component *component,
unsigned int reg, unsigned int *val);
int snd_soc_component_write(struct snd_soc_component *component,
unsigned int reg, unsigned int val);
int snd_soc_component_update_bits(struct snd_soc_component *component,
unsigned int reg, unsigned int mask, unsigned int val);
int snd_soc_component_update_bits_async(struct snd_soc_component *component,
unsigned int reg, unsigned int mask, unsigned int val);
void snd_soc_component_async_complete(struct snd_soc_component *component);
int snd_soc_component_test_bits(struct snd_soc_component *component,
unsigned int reg, unsigned int mask, unsigned int value);
#ifdef CONFIG_REGMAP
void snd_soc_component_init_regmap(struct snd_soc_component *component,
struct regmap *regmap);
void snd_soc_component_exit_regmap(struct snd_soc_component *component);
/**
* snd_soc_codec_init_regmap() - Initialize regmap instance for the CODEC
* @codec: The CODEC for which to initialize the regmap instance
* @regmap: The regmap instance that should be used by the CODEC
*
* This function allows deferred assignment of the regmap instance that is
* associated with the CODEC. Only use this if the regmap instance is not yet
* ready when the CODEC is registered. The function must also be called before
* the first IO attempt of the CODEC.
*/
static inline void snd_soc_codec_init_regmap(struct snd_soc_codec *codec,
struct regmap *regmap)
{
snd_soc_component_init_regmap(&codec->component, regmap);
}
/**
* snd_soc_codec_exit_regmap() - De-initialize regmap instance for the CODEC
* @codec: The CODEC for which to de-initialize the regmap instance
*
* Calls regmap_exit() on the regmap instance associated to the CODEC and
* removes the regmap instance from the CODEC.
*
* This function should only be used if snd_soc_codec_init_regmap() was used to
* initialize the regmap instance.
*/
static inline void snd_soc_codec_exit_regmap(struct snd_soc_codec *codec)
{
snd_soc_component_exit_regmap(&codec->component);
}
#endif
/* device driver data */
static inline void snd_soc_card_set_drvdata(struct snd_soc_card *card,
void *data)
{
card->drvdata = data;
}
static inline void *snd_soc_card_get_drvdata(struct snd_soc_card *card)
{
return card->drvdata;
}
static inline void snd_soc_component_set_drvdata(struct snd_soc_component *c,
void *data)
{
dev_set_drvdata(c->dev, data);
}
static inline void *snd_soc_component_get_drvdata(struct snd_soc_component *c)
{
return dev_get_drvdata(c->dev);
}
static inline void snd_soc_codec_set_drvdata(struct snd_soc_codec *codec,
void *data)
{
snd_soc_component_set_drvdata(&codec->component, data);
}
static inline void *snd_soc_codec_get_drvdata(struct snd_soc_codec *codec)
{
return snd_soc_component_get_drvdata(&codec->component);
}
static inline void snd_soc_platform_set_drvdata(struct snd_soc_platform *platform,
void *data)
{
snd_soc_component_set_drvdata(&platform->component, data);
}
static inline void *snd_soc_platform_get_drvdata(struct snd_soc_platform *platform)
{
return snd_soc_component_get_drvdata(&platform->component);
}
static inline void snd_soc_pcm_set_drvdata(struct snd_soc_pcm_runtime *rtd,
void *data)
{
dev_set_drvdata(rtd->dev, data);
}
static inline void *snd_soc_pcm_get_drvdata(struct snd_soc_pcm_runtime *rtd)
{
return dev_get_drvdata(rtd->dev);
}
static inline void snd_soc_initialize_card_lists(struct snd_soc_card *card)
{
INIT_LIST_HEAD(&card->codec_dev_list);
INIT_LIST_HEAD(&card->widgets);
INIT_LIST_HEAD(&card->paths);
INIT_LIST_HEAD(&card->dapm_list);
}
static inline bool snd_soc_volsw_is_stereo(struct soc_mixer_control *mc)
{
if (mc->reg == mc->rreg && mc->shift == mc->rshift)
return 0;
/*
* mc->reg == mc->rreg && mc->shift != mc->rshift, or
* mc->reg != mc->rreg means that the control is
* stereo (bits in one register or in two registers)
*/
return 1;
}
static inline unsigned int snd_soc_enum_val_to_item(struct soc_enum *e,
unsigned int val)
{
unsigned int i;
if (!e->values)
return val;
for (i = 0; i < e->items; i++)
if (val == e->values[i])
return i;
return 0;
}
static inline unsigned int snd_soc_enum_item_to_val(struct soc_enum *e,
unsigned int item)
{
if (!e->values)
return item;
return e->values[item];
}
static inline bool snd_soc_component_is_active(
struct snd_soc_component *component)
{
return component->active != 0;
}
static inline bool snd_soc_codec_is_active(struct snd_soc_codec *codec)
{
return snd_soc_component_is_active(&codec->component);
}
/**
* snd_soc_kcontrol_component() - Returns the component that registered the
* control
* @kcontrol: The control for which to get the component
*
* Note: This function will work correctly if the control has been registered
* for a component. Either with snd_soc_add_codec_controls() or
* snd_soc_add_platform_controls() or via table based setup for either a
* CODEC, a platform or component driver. Otherwise the behavior is undefined.
*/
static inline struct snd_soc_component *snd_soc_kcontrol_component(
struct snd_kcontrol *kcontrol)
{
return snd_kcontrol_chip(kcontrol);
}
/**
* snd_soc_kcontrol_codec() - Returns the CODEC that registered the control
* @kcontrol: The control for which to get the CODEC
*
* Note: This function will only work correctly if the control has been
* registered with snd_soc_add_codec_controls() or via table based setup of
* snd_soc_codec_driver. Otherwise the behavior is undefined.
*/
static inline struct snd_soc_codec *snd_soc_kcontrol_codec(
struct snd_kcontrol *kcontrol)
{
return snd_soc_component_to_codec(snd_soc_kcontrol_component(kcontrol));
}
/**
* snd_soc_kcontrol_platform() - Returns the platform that registerd the control
* @kcontrol: The control for which to get the platform
*
* Note: This function will only work correctly if the control has been
* registered with snd_soc_add_platform_controls() or via table based setup of
* a snd_soc_platform_driver. Otherwise the behavior is undefined.
*/
static inline struct snd_soc_platform *snd_soc_kcontrol_platform(
struct snd_kcontrol *kcontrol)
{
return snd_soc_component_to_platform(snd_soc_kcontrol_component(kcontrol));
}
int snd_soc_util_init(void);
void snd_soc_util_exit(void);
int snd_soc_of_parse_card_name(struct snd_soc_card *card,
const char *propname);
int snd_soc_of_parse_audio_simple_widgets(struct snd_soc_card *card,
const char *propname);
int snd_soc_of_parse_tdm_slot(struct device_node *np,
unsigned int *slots,
unsigned int *slot_width);
int snd_soc_of_parse_audio_routing(struct snd_soc_card *card,
const char *propname);
unsigned int snd_soc_of_parse_daifmt(struct device_node *np,
const char *prefix,
struct device_node **bitclkmaster,
struct device_node **framemaster);
int snd_soc_of_get_dai_name(struct device_node *of_node,
const char **dai_name);
int snd_soc_of_get_dai_link_codecs(struct device *dev,
struct device_node *of_node,
struct snd_soc_dai_link *dai_link);
#include <sound/soc-dai.h>
#ifdef CONFIG_DEBUG_FS
extern struct dentry *snd_soc_debugfs_root;
#endif
extern const struct dev_pm_ops snd_soc_pm_ops;
/* Helper functions */
static inline void snd_soc_dapm_mutex_lock(struct snd_soc_dapm_context *dapm)
{
mutex_lock(&dapm->card->dapm_mutex);
}
static inline void snd_soc_dapm_mutex_unlock(struct snd_soc_dapm_context *dapm)
{
mutex_unlock(&dapm->card->dapm_mutex);
}
#endif
| gpl-2.0 |
sfumato77/Kernel-4.8_Android-x86_BayTrail | drivers/media/platform/mtk-vcodec/Makefile | 376 |
obj-$(CONFIG_VIDEO_MEDIATEK_VCODEC) += mtk-vcodec-enc.o mtk-vcodec-common.o
mtk-vcodec-enc-y := venc/venc_vp8_if.o \
venc/venc_h264_if.o \
mtk_vcodec_enc.o \
mtk_vcodec_enc_drv.o \
mtk_vcodec_enc_pm.o \
venc_drv_if.o \
venc_vpu_if.o \
mtk-vcodec-common-y := mtk_vcodec_intr.o \
mtk_vcodec_util.o\
ccflags-y += -I$(srctree)/drivers/media/platform/mtk-vpu
| gpl-2.0 |
RCBiczok/ArticleRefs | src/test/lib/joomla/3_1_5/modules/mod_related_items/mod_related_items.php | 921 | <?php
/**
* @package Joomla.Site
* @subpackage mod_related_items
*
* @copyright Copyright (C) 2005 - 2013 Open Source Matters, Inc. All rights reserved.
* @license GNU General Public License version 2 or later; see LICENSE.txt
*/
defined('_JEXEC') or die;
// Include the syndicate functions only once
require_once __DIR__ . '/helper.php';
$cacheparams = new stdClass;
$cacheparams->cachemode = 'safeuri';
$cacheparams->class = 'ModRelatedItemsHelper';
$cacheparams->method = 'getList';
$cacheparams->methodparams = $params;
$cacheparams->modeparams = array('id' => 'int', 'Itemid' => 'int');
$list = JModuleHelper::moduleCache($module, $params, $cacheparams);
if (!count($list))
{
return;
}
$moduleclass_sfx = htmlspecialchars($params->get('moduleclass_sfx'));
$showDate = $params->get('showDate', 0);
require JModuleHelper::getLayoutPath('mod_related_items', $params->get('layout', 'default'));
| gpl-3.0 |
felixhaedicke/nst-kernel | src/fs/btrfs/async-thread.h | 3309 | /*
* Copyright (C) 2007 Oracle. All rights reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public
* License v2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public
* License along with this program; if not, write to the
* Free Software Foundation, Inc., 59 Temple Place - Suite 330,
* Boston, MA 021110-1307, USA.
*/
#ifndef __BTRFS_ASYNC_THREAD_
#define __BTRFS_ASYNC_THREAD_
struct btrfs_worker_thread;
/*
* This is similar to a workqueue, but it is meant to spread the operations
* across all available cpus instead of just the CPU that was used to
* queue the work. There is also some batching introduced to try and
* cut down on context switches.
*
* By default threads are added on demand up to 2 * the number of cpus.
* Changing struct btrfs_workers->max_workers is one way to prevent
* demand creation of kthreads.
*
* the basic model of these worker threads is to embed a btrfs_work
* structure in your own data struct, and use container_of in a
* work function to get back to your data struct.
*/
struct btrfs_work {
/*
* func should be set to the function you want called
* your work struct is passed as the only arg
*
* ordered_func must be set for work sent to an ordered work queue,
* and it is called to complete a given work item in the same
* order they were sent to the queue.
*/
void (*func)(struct btrfs_work *work);
void (*ordered_func)(struct btrfs_work *work);
void (*ordered_free)(struct btrfs_work *work);
/*
* flags should be set to zero. It is used to make sure the
* struct is only inserted once into the list.
*/
unsigned long flags;
/* don't touch these */
struct btrfs_worker_thread *worker;
struct list_head list;
struct list_head order_list;
};
struct btrfs_workers {
/* current number of running workers */
int num_workers;
/* max number of workers allowed. changed by btrfs_start_workers */
int max_workers;
/* once a worker has this many requests or fewer, it is idle */
int idle_thresh;
/* force completions in the order they were queued */
int ordered;
/* list with all the work threads. The workers on the idle thread
* may be actively servicing jobs, but they haven't yet hit the
* idle thresh limit above.
*/
struct list_head worker_list;
struct list_head idle_list;
/*
* when operating in ordered mode, this maintains the list
* of work items waiting for completion
*/
struct list_head order_list;
/* lock for finding the next worker thread to queue on */
spinlock_t lock;
/* extra name for this worker, used for current->name */
char *name;
};
int btrfs_queue_worker(struct btrfs_workers *workers, struct btrfs_work *work);
int btrfs_start_workers(struct btrfs_workers *workers, int num_workers);
int btrfs_stop_workers(struct btrfs_workers *workers);
void btrfs_init_workers(struct btrfs_workers *workers, char *name, int max);
int btrfs_requeue_work(struct btrfs_work *work);
#endif
| gpl-2.0 |
norrs/debian-tomahawk | thirdparty/breakpad/client/mac/tests/exception_handler_test.cc | 23972 | // Copyright (c) 2010, Google Inc.
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are
// met:
//
// * Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
// * Redistributions in binary form must reproduce the above
// copyright notice, this list of conditions and the following disclaimer
// in the documentation and/or other materials provided with the
// distribution.
// * Neither the name of Google Inc. nor the names of its
// contributors may be used to endorse or promote products derived from
// this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// exception_handler_test.cc: Unit tests for google_breakpad::ExceptionHandler
#include <pthread.h>
#include <sys/mman.h>
#include <sys/stat.h>
#include <unistd.h>
#include "breakpad_googletest_includes.h"
#include "client/mac/handler/exception_handler.h"
#include "common/mac/MachIPC.h"
#include "common/tests/auto_tempdir.h"
#include "google_breakpad/processor/minidump.h"
namespace google_breakpad {
// This acts as the log sink for INFO logging from the processor
// logging code. The logging output confuses XCode and makes it think
// there are unit test failures. testlogging.h handles the overriding.
std::ostringstream info_log;
}
namespace {
using std::string;
using google_breakpad::AutoTempDir;
using google_breakpad::ExceptionHandler;
using google_breakpad::MachPortSender;
using google_breakpad::MachReceiveMessage;
using google_breakpad::MachSendMessage;
using google_breakpad::Minidump;
using google_breakpad::MinidumpContext;
using google_breakpad::MinidumpException;
using google_breakpad::MinidumpMemoryList;
using google_breakpad::MinidumpMemoryRegion;
using google_breakpad::ReceivePort;
using testing::Test;
class ExceptionHandlerTest : public Test {
public:
void InProcessCrash(bool aborting);
AutoTempDir tempDir;
string lastDumpName;
};
static void Crasher() {
int *a = (int*)0x42;
fprintf(stdout, "Going to crash...\n");
fprintf(stdout, "A = %d", *a);
}
static void AbortCrasher() {
fprintf(stdout, "Going to crash...\n");
abort();
}
static void SoonToCrash(void(*crasher)()) {
crasher();
}
static bool MDCallback(const char *dump_dir, const char *file_name,
void *context, bool success) {
string path(dump_dir);
path.append("/");
path.append(file_name);
path.append(".dmp");
int fd = *reinterpret_cast<int*>(context);
(void)write(fd, path.c_str(), path.length() + 1);
close(fd);
exit(0);
// not reached
return true;
}
void ExceptionHandlerTest::InProcessCrash(bool aborting) {
// Give the child process a pipe to report back on.
int fds[2];
ASSERT_EQ(0, pipe(fds));
// Fork off a child process so it can crash.
pid_t pid = fork();
if (pid == 0) {
// In the child process.
close(fds[0]);
ExceptionHandler eh(tempDir.path(), NULL, MDCallback, &fds[1], true, NULL);
// crash
SoonToCrash(aborting ? &AbortCrasher : &Crasher);
// not reached
exit(1);
}
// In the parent process.
ASSERT_NE(-1, pid);
// Wait for the background process to return the minidump file.
close(fds[1]);
char minidump_file[PATH_MAX];
ssize_t nbytes = read(fds[0], minidump_file, sizeof(minidump_file));
ASSERT_NE(0, nbytes);
// Ensure that minidump file exists and is > 0 bytes.
struct stat st;
ASSERT_EQ(0, stat(minidump_file, &st));
ASSERT_LT(0, st.st_size);
// Child process should have exited with a zero status.
int ret;
ASSERT_EQ(pid, waitpid(pid, &ret, 0));
EXPECT_NE(0, WIFEXITED(ret));
EXPECT_EQ(0, WEXITSTATUS(ret));
}
TEST_F(ExceptionHandlerTest, InProcess) {
InProcessCrash(false);
}
#if TARGET_OS_IPHONE
TEST_F(ExceptionHandlerTest, InProcessAbort) {
InProcessCrash(true);
}
#endif
static bool DumpNameMDCallback(const char *dump_dir, const char *file_name,
void *context, bool success) {
ExceptionHandlerTest *self = reinterpret_cast<ExceptionHandlerTest*>(context);
if (dump_dir && file_name) {
self->lastDumpName = dump_dir;
self->lastDumpName += "/";
self->lastDumpName += file_name;
self->lastDumpName += ".dmp";
}
return true;
}
TEST_F(ExceptionHandlerTest, WriteMinidump) {
ExceptionHandler eh(tempDir.path(), NULL, DumpNameMDCallback, this, true,
NULL);
ASSERT_TRUE(eh.WriteMinidump());
// Ensure that minidump file exists and is > 0 bytes.
ASSERT_FALSE(lastDumpName.empty());
struct stat st;
ASSERT_EQ(0, stat(lastDumpName.c_str(), &st));
ASSERT_LT(0, st.st_size);
// The minidump should not contain an exception stream.
Minidump minidump(lastDumpName);
ASSERT_TRUE(minidump.Read());
MinidumpException* exception = minidump.GetException();
EXPECT_FALSE(exception);
}
TEST_F(ExceptionHandlerTest, WriteMinidumpWithException) {
ExceptionHandler eh(tempDir.path(), NULL, DumpNameMDCallback, this, true,
NULL);
ASSERT_TRUE(eh.WriteMinidump(true));
// Ensure that minidump file exists and is > 0 bytes.
ASSERT_FALSE(lastDumpName.empty());
struct stat st;
ASSERT_EQ(0, stat(lastDumpName.c_str(), &st));
ASSERT_LT(0, st.st_size);
// The minidump should contain an exception stream.
Minidump minidump(lastDumpName);
ASSERT_TRUE(minidump.Read());
MinidumpException* exception = minidump.GetException();
ASSERT_TRUE(exception);
const MDRawExceptionStream* raw_exception = exception->exception();
ASSERT_TRUE(raw_exception);
EXPECT_EQ(MD_EXCEPTION_MAC_BREAKPOINT,
raw_exception->exception_record.exception_code);
}
TEST_F(ExceptionHandlerTest, DumpChildProcess) {
const int kTimeoutMs = 2000;
// Create a mach port to receive the child task on.
char machPortName[128];
sprintf(machPortName, "ExceptionHandlerTest.%d", getpid());
ReceivePort parent_recv_port(machPortName);
// Give the child process a pipe to block on.
int fds[2];
ASSERT_EQ(0, pipe(fds));
// Fork off a child process to dump.
pid_t pid = fork();
if (pid == 0) {
// In the child process
close(fds[1]);
// Send parent process the task and thread ports.
MachSendMessage child_message(0);
child_message.AddDescriptor(mach_task_self());
child_message.AddDescriptor(mach_thread_self());
MachPortSender child_sender(machPortName);
if (child_sender.SendMessage(child_message, kTimeoutMs) != KERN_SUCCESS)
exit(1);
// Wait for the parent process.
uint8_t data;
read(fds[0], &data, 1);
exit(0);
}
// In the parent process.
ASSERT_NE(-1, pid);
close(fds[0]);
// Read the child's task and thread ports.
MachReceiveMessage child_message;
ASSERT_EQ(KERN_SUCCESS,
parent_recv_port.WaitForMessage(&child_message, kTimeoutMs));
mach_port_t child_task = child_message.GetTranslatedPort(0);
mach_port_t child_thread = child_message.GetTranslatedPort(1);
ASSERT_NE((mach_port_t)MACH_PORT_NULL, child_task);
ASSERT_NE((mach_port_t)MACH_PORT_NULL, child_thread);
// Write a minidump of the child process.
bool result = ExceptionHandler::WriteMinidumpForChild(child_task,
child_thread,
tempDir.path(),
DumpNameMDCallback,
this);
ASSERT_EQ(true, result);
// Ensure that minidump file exists and is > 0 bytes.
ASSERT_FALSE(lastDumpName.empty());
struct stat st;
ASSERT_EQ(0, stat(lastDumpName.c_str(), &st));
ASSERT_LT(0, st.st_size);
// Unblock child process
uint8_t data = 1;
(void)write(fds[1], &data, 1);
// Child process should have exited with a zero status.
int ret;
ASSERT_EQ(pid, waitpid(pid, &ret, 0));
EXPECT_NE(0, WIFEXITED(ret));
EXPECT_EQ(0, WEXITSTATUS(ret));
}
// Test that memory around the instruction pointer is written
// to the dump as a MinidumpMemoryRegion.
TEST_F(ExceptionHandlerTest, InstructionPointerMemory) {
// Give the child process a pipe to report back on.
int fds[2];
ASSERT_EQ(0, pipe(fds));
// These are defined here so the parent can use them to check the
// data from the minidump afterwards.
const u_int32_t kMemorySize = 256; // bytes
const int kOffset = kMemorySize / 2;
// This crashes with SIGILL on x86/x86-64/arm.
const unsigned char instructions[] = { 0xff, 0xff, 0xff, 0xff };
pid_t pid = fork();
if (pid == 0) {
close(fds[0]);
ExceptionHandler eh(tempDir.path(), NULL, MDCallback, &fds[1], true, NULL);
// Get some executable memory.
char* memory =
reinterpret_cast<char*>(mmap(NULL,
kMemorySize,
PROT_READ | PROT_WRITE | PROT_EXEC,
MAP_PRIVATE | MAP_ANON,
-1,
0));
if (!memory)
exit(0);
// Write some instructions that will crash. Put them in the middle
// of the block of memory, because the minidump should contain 128
// bytes on either side of the instruction pointer.
memcpy(memory + kOffset, instructions, sizeof(instructions));
// Now execute the instructions, which should crash.
typedef void (*void_function)(void);
void_function memory_function =
reinterpret_cast<void_function>(memory + kOffset);
memory_function();
// not reached
exit(1);
}
// In the parent process.
ASSERT_NE(-1, pid);
close(fds[1]);
// Wait for the background process to return the minidump file.
close(fds[1]);
char minidump_file[PATH_MAX];
ssize_t nbytes = read(fds[0], minidump_file, sizeof(minidump_file));
ASSERT_NE(0, nbytes);
// Ensure that minidump file exists and is > 0 bytes.
struct stat st;
ASSERT_EQ(0, stat(minidump_file, &st));
ASSERT_LT(0, st.st_size);
// Child process should have exited with a zero status.
int ret;
ASSERT_EQ(pid, waitpid(pid, &ret, 0));
EXPECT_NE(0, WIFEXITED(ret));
EXPECT_EQ(0, WEXITSTATUS(ret));
// Read the minidump. Locate the exception record and the
// memory list, and then ensure that there is a memory region
// in the memory list that covers the instruction pointer from
// the exception record.
Minidump minidump(minidump_file);
ASSERT_TRUE(minidump.Read());
MinidumpException* exception = minidump.GetException();
MinidumpMemoryList* memory_list = minidump.GetMemoryList();
ASSERT_TRUE(exception);
ASSERT_TRUE(memory_list);
ASSERT_NE((unsigned int)0, memory_list->region_count());
MinidumpContext* context = exception->GetContext();
ASSERT_TRUE(context);
u_int64_t instruction_pointer;
switch (context->GetContextCPU()) {
case MD_CONTEXT_X86:
instruction_pointer = context->GetContextX86()->eip;
break;
case MD_CONTEXT_AMD64:
instruction_pointer = context->GetContextAMD64()->rip;
break;
case MD_CONTEXT_ARM:
instruction_pointer = context->GetContextARM()->iregs[15];
break;
default:
FAIL() << "Unknown context CPU: " << context->GetContextCPU();
break;
}
MinidumpMemoryRegion* region =
memory_list->GetMemoryRegionForAddress(instruction_pointer);
EXPECT_TRUE(region);
EXPECT_EQ(kMemorySize, region->GetSize());
const u_int8_t* bytes = region->GetMemory();
ASSERT_TRUE(bytes);
u_int8_t prefix_bytes[kOffset];
u_int8_t suffix_bytes[kMemorySize - kOffset - sizeof(instructions)];
memset(prefix_bytes, 0, sizeof(prefix_bytes));
memset(suffix_bytes, 0, sizeof(suffix_bytes));
EXPECT_TRUE(memcmp(bytes, prefix_bytes, sizeof(prefix_bytes)) == 0);
EXPECT_TRUE(memcmp(bytes + kOffset, instructions, sizeof(instructions)) == 0);
EXPECT_TRUE(memcmp(bytes + kOffset + sizeof(instructions),
suffix_bytes, sizeof(suffix_bytes)) == 0);
}
// Test that the memory region around the instruction pointer is
// bounded correctly on the low end.
TEST_F(ExceptionHandlerTest, InstructionPointerMemoryMinBound) {
// Give the child process a pipe to report back on.
int fds[2];
ASSERT_EQ(0, pipe(fds));
// These are defined here so the parent can use them to check the
// data from the minidump afterwards.
const u_int32_t kMemorySize = 256; // bytes
const int kOffset = 0;
// This crashes with SIGILL on x86/x86-64/arm.
const unsigned char instructions[] = { 0xff, 0xff, 0xff, 0xff };
pid_t pid = fork();
if (pid == 0) {
close(fds[0]);
ExceptionHandler eh(tempDir.path(), NULL, MDCallback, &fds[1], true, NULL);
// Get some executable memory.
char* memory =
reinterpret_cast<char*>(mmap(NULL,
kMemorySize,
PROT_READ | PROT_WRITE | PROT_EXEC,
MAP_PRIVATE | MAP_ANON,
-1,
0));
if (!memory)
exit(0);
// Write some instructions that will crash. Put them at the start
// of the block of memory, to ensure that the memory bounding
// works properly.
memcpy(memory + kOffset, instructions, sizeof(instructions));
// Now execute the instructions, which should crash.
typedef void (*void_function)(void);
void_function memory_function =
reinterpret_cast<void_function>(memory + kOffset);
memory_function();
// not reached
exit(1);
}
// In the parent process.
ASSERT_NE(-1, pid);
close(fds[1]);
// Wait for the background process to return the minidump file.
close(fds[1]);
char minidump_file[PATH_MAX];
ssize_t nbytes = read(fds[0], minidump_file, sizeof(minidump_file));
ASSERT_NE(0, nbytes);
// Ensure that minidump file exists and is > 0 bytes.
struct stat st;
ASSERT_EQ(0, stat(minidump_file, &st));
ASSERT_LT(0, st.st_size);
// Child process should have exited with a zero status.
int ret;
ASSERT_EQ(pid, waitpid(pid, &ret, 0));
EXPECT_NE(0, WIFEXITED(ret));
EXPECT_EQ(0, WEXITSTATUS(ret));
// Read the minidump. Locate the exception record and the
// memory list, and then ensure that there is a memory region
// in the memory list that covers the instruction pointer from
// the exception record.
Minidump minidump(minidump_file);
ASSERT_TRUE(minidump.Read());
MinidumpException* exception = minidump.GetException();
MinidumpMemoryList* memory_list = minidump.GetMemoryList();
ASSERT_TRUE(exception);
ASSERT_TRUE(memory_list);
ASSERT_NE((unsigned int)0, memory_list->region_count());
MinidumpContext* context = exception->GetContext();
ASSERT_TRUE(context);
u_int64_t instruction_pointer;
switch (context->GetContextCPU()) {
case MD_CONTEXT_X86:
instruction_pointer = context->GetContextX86()->eip;
break;
case MD_CONTEXT_AMD64:
instruction_pointer = context->GetContextAMD64()->rip;
break;
case MD_CONTEXT_ARM:
instruction_pointer = context->GetContextARM()->iregs[15];
break;
default:
FAIL() << "Unknown context CPU: " << context->GetContextCPU();
break;
}
MinidumpMemoryRegion* region =
memory_list->GetMemoryRegionForAddress(instruction_pointer);
EXPECT_TRUE(region);
EXPECT_EQ(kMemorySize / 2, region->GetSize());
const u_int8_t* bytes = region->GetMemory();
ASSERT_TRUE(bytes);
u_int8_t suffix_bytes[kMemorySize / 2 - sizeof(instructions)];
memset(suffix_bytes, 0, sizeof(suffix_bytes));
EXPECT_TRUE(memcmp(bytes + kOffset, instructions, sizeof(instructions)) == 0);
EXPECT_TRUE(memcmp(bytes + kOffset + sizeof(instructions),
suffix_bytes, sizeof(suffix_bytes)) == 0);
}
// Test that the memory region around the instruction pointer is
// bounded correctly on the high end.
TEST_F(ExceptionHandlerTest, InstructionPointerMemoryMaxBound) {
// Give the child process a pipe to report back on.
int fds[2];
ASSERT_EQ(0, pipe(fds));
// These are defined here so the parent can use them to check the
// data from the minidump afterwards.
// Use 4k here because the OS will hand out a single page even
// if a smaller size is requested, and this test wants to
// test the upper bound of the memory range.
const u_int32_t kMemorySize = 4096; // bytes
// This crashes with SIGILL on x86/x86-64/arm.
const unsigned char instructions[] = { 0xff, 0xff, 0xff, 0xff };
const int kOffset = kMemorySize - sizeof(instructions);
pid_t pid = fork();
if (pid == 0) {
close(fds[0]);
ExceptionHandler eh(tempDir.path(), NULL, MDCallback, &fds[1], true, NULL);
// Get some executable memory.
char* memory =
reinterpret_cast<char*>(mmap(NULL,
kMemorySize,
PROT_READ | PROT_WRITE | PROT_EXEC,
MAP_PRIVATE | MAP_ANON,
-1,
0));
if (!memory)
exit(0);
// Write some instructions that will crash. Put them at the start
// of the block of memory, to ensure that the memory bounding
// works properly.
memcpy(memory + kOffset, instructions, sizeof(instructions));
// Now execute the instructions, which should crash.
typedef void (*void_function)(void);
void_function memory_function =
reinterpret_cast<void_function>(memory + kOffset);
memory_function();
// not reached
exit(1);
}
// In the parent process.
ASSERT_NE(-1, pid);
close(fds[1]);
// Wait for the background process to return the minidump file.
close(fds[1]);
char minidump_file[PATH_MAX];
ssize_t nbytes = read(fds[0], minidump_file, sizeof(minidump_file));
ASSERT_NE(0, nbytes);
// Ensure that minidump file exists and is > 0 bytes.
struct stat st;
ASSERT_EQ(0, stat(minidump_file, &st));
ASSERT_LT(0, st.st_size);
// Child process should have exited with a zero status.
int ret;
ASSERT_EQ(pid, waitpid(pid, &ret, 0));
EXPECT_NE(0, WIFEXITED(ret));
EXPECT_EQ(0, WEXITSTATUS(ret));
// Read the minidump. Locate the exception record and the
// memory list, and then ensure that there is a memory region
// in the memory list that covers the instruction pointer from
// the exception record.
Minidump minidump(minidump_file);
ASSERT_TRUE(minidump.Read());
MinidumpException* exception = minidump.GetException();
MinidumpMemoryList* memory_list = minidump.GetMemoryList();
ASSERT_TRUE(exception);
ASSERT_TRUE(memory_list);
ASSERT_NE((unsigned int)0, memory_list->region_count());
MinidumpContext* context = exception->GetContext();
ASSERT_TRUE(context);
u_int64_t instruction_pointer;
switch (context->GetContextCPU()) {
case MD_CONTEXT_X86:
instruction_pointer = context->GetContextX86()->eip;
break;
case MD_CONTEXT_AMD64:
instruction_pointer = context->GetContextAMD64()->rip;
break;
case MD_CONTEXT_ARM:
instruction_pointer = context->GetContextARM()->iregs[15];
break;
default:
FAIL() << "Unknown context CPU: " << context->GetContextCPU();
break;
}
MinidumpMemoryRegion* region =
memory_list->GetMemoryRegionForAddress(instruction_pointer);
EXPECT_TRUE(region);
const size_t kPrefixSize = 128; // bytes
EXPECT_EQ(kPrefixSize + sizeof(instructions), region->GetSize());
const u_int8_t* bytes = region->GetMemory();
ASSERT_TRUE(bytes);
u_int8_t prefix_bytes[kPrefixSize];
memset(prefix_bytes, 0, sizeof(prefix_bytes));
EXPECT_TRUE(memcmp(bytes, prefix_bytes, sizeof(prefix_bytes)) == 0);
EXPECT_TRUE(memcmp(bytes + kPrefixSize,
instructions, sizeof(instructions)) == 0);
}
// Ensure that an extra memory block doesn't get added when the
// instruction pointer is not in mapped memory.
TEST_F(ExceptionHandlerTest, InstructionPointerMemoryNullPointer) {
// Give the child process a pipe to report back on.
int fds[2];
ASSERT_EQ(0, pipe(fds));
pid_t pid = fork();
if (pid == 0) {
close(fds[0]);
ExceptionHandler eh(tempDir.path(), NULL, MDCallback, &fds[1], true, NULL);
// Try calling a NULL pointer.
typedef void (*void_function)(void);
void_function memory_function =
reinterpret_cast<void_function>(NULL);
memory_function();
// not reached
exit(1);
}
// In the parent process.
ASSERT_NE(-1, pid);
close(fds[1]);
// Wait for the background process to return the minidump file.
close(fds[1]);
char minidump_file[PATH_MAX];
ssize_t nbytes = read(fds[0], minidump_file, sizeof(minidump_file));
ASSERT_NE(0, nbytes);
// Ensure that minidump file exists and is > 0 bytes.
struct stat st;
ASSERT_EQ(0, stat(minidump_file, &st));
ASSERT_LT(0, st.st_size);
// Child process should have exited with a zero status.
int ret;
ASSERT_EQ(pid, waitpid(pid, &ret, 0));
EXPECT_NE(0, WIFEXITED(ret));
EXPECT_EQ(0, WEXITSTATUS(ret));
// Read the minidump. Locate the exception record and the
// memory list, and then ensure that there is only one memory region
// in the memory list (the thread memory from the single thread).
Minidump minidump(minidump_file);
ASSERT_TRUE(minidump.Read());
MinidumpException* exception = minidump.GetException();
MinidumpMemoryList* memory_list = minidump.GetMemoryList();
ASSERT_TRUE(exception);
ASSERT_TRUE(memory_list);
ASSERT_EQ((unsigned int)1, memory_list->region_count());
}
static void *Junk(void *) {
sleep(1000000);
return NULL;
}
// Test that the memory list gets written correctly when multiple
// threads are running.
TEST_F(ExceptionHandlerTest, MemoryListMultipleThreads) {
// Give the child process a pipe to report back on.
int fds[2];
ASSERT_EQ(0, pipe(fds));
pid_t pid = fork();
if (pid == 0) {
close(fds[0]);
ExceptionHandler eh(tempDir.path(), NULL, MDCallback, &fds[1], true, NULL);
// Run an extra thread so >2 memory regions will be written.
pthread_t junk_thread;
if (pthread_create(&junk_thread, NULL, Junk, NULL) == 0)
pthread_detach(junk_thread);
// Just crash.
Crasher();
// not reached
exit(1);
}
// In the parent process.
ASSERT_NE(-1, pid);
close(fds[1]);
// Wait for the background process to return the minidump file.
close(fds[1]);
char minidump_file[PATH_MAX];
ssize_t nbytes = read(fds[0], minidump_file, sizeof(minidump_file));
ASSERT_NE(0, nbytes);
// Ensure that minidump file exists and is > 0 bytes.
struct stat st;
ASSERT_EQ(0, stat(minidump_file, &st));
ASSERT_LT(0, st.st_size);
// Child process should have exited with a zero status.
int ret;
ASSERT_EQ(pid, waitpid(pid, &ret, 0));
EXPECT_NE(0, WIFEXITED(ret));
EXPECT_EQ(0, WEXITSTATUS(ret));
// Read the minidump, and verify that the memory list can be read.
Minidump minidump(minidump_file);
ASSERT_TRUE(minidump.Read());
MinidumpMemoryList* memory_list = minidump.GetMemoryList();
ASSERT_TRUE(memory_list);
// Verify that there are three memory regions:
// one per thread, and one for the instruction pointer memory.
ASSERT_EQ((unsigned int)3, memory_list->region_count());
}
}
| gpl-3.0 |
felixhaedicke/nst-kernel | src/sound/arm/aaci.c | 27252 | /*
* linux/sound/arm/aaci.c - ARM PrimeCell AACI PL041 driver
*
* Copyright (C) 2003 Deep Blue Solutions Ltd, All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Documentation: ARM DDI 0173B
*/
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/device.h>
#include <linux/spinlock.h>
#include <linux/interrupt.h>
#include <linux/err.h>
#include <linux/amba/bus.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/sizes.h>
#include <sound/core.h>
#include <sound/initval.h>
#include <sound/ac97_codec.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include "aaci.h"
#include "devdma.h"
#define DRIVER_NAME "aaci-pl041"
/*
* PM support is not complete. Turn it off.
*/
#undef CONFIG_PM
static void aaci_ac97_select_codec(struct aaci *aaci, struct snd_ac97 *ac97)
{
u32 v, maincr = aaci->maincr | MAINCR_SCRA(ac97->num);
/*
* Ensure that the slot 1/2 RX registers are empty.
*/
v = readl(aaci->base + AACI_SLFR);
if (v & SLFR_2RXV)
readl(aaci->base + AACI_SL2RX);
if (v & SLFR_1RXV)
readl(aaci->base + AACI_SL1RX);
writel(maincr, aaci->base + AACI_MAINCR);
}
/*
* P29:
* The recommended use of programming the external codec through slot 1
* and slot 2 data is to use the channels during setup routines and the
* slot register at any other time. The data written into slot 1, slot 2
* and slot 12 registers is transmitted only when their corresponding
* SI1TxEn, SI2TxEn and SI12TxEn bits are set in the AACI_MAINCR
* register.
*/
static void aaci_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
unsigned short val)
{
struct aaci *aaci = ac97->private_data;
u32 v;
int timeout = 5000;
if (ac97->num >= 4)
return;
mutex_lock(&aaci->ac97_sem);
aaci_ac97_select_codec(aaci, ac97);
/*
* P54: You must ensure that AACI_SL2TX is always written
* to, if required, before data is written to AACI_SL1TX.
*/
writel(val << 4, aaci->base + AACI_SL2TX);
writel(reg << 12, aaci->base + AACI_SL1TX);
/*
* Wait for the transmission of both slots to complete.
*/
do {
v = readl(aaci->base + AACI_SLFR);
} while ((v & (SLFR_1TXB|SLFR_2TXB)) && --timeout);
if (!timeout)
dev_err(&aaci->dev->dev,
"timeout waiting for write to complete\n");
mutex_unlock(&aaci->ac97_sem);
}
/*
* Read an AC'97 register.
*/
static unsigned short aaci_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
{
struct aaci *aaci = ac97->private_data;
u32 v;
int timeout = 5000;
int retries = 10;
if (ac97->num >= 4)
return ~0;
mutex_lock(&aaci->ac97_sem);
aaci_ac97_select_codec(aaci, ac97);
/*
* Write the register address to slot 1.
*/
writel((reg << 12) | (1 << 19), aaci->base + AACI_SL1TX);
/*
* Wait for the transmission to complete.
*/
do {
v = readl(aaci->base + AACI_SLFR);
} while ((v & SLFR_1TXB) && --timeout);
if (!timeout) {
dev_err(&aaci->dev->dev, "timeout on slot 1 TX busy\n");
v = ~0;
goto out;
}
/*
* Give the AC'97 codec more than enough time
* to respond. (42us = ~2 frames at 48kHz.)
*/
udelay(42);
/*
* Wait for slot 2 to indicate data.
*/
timeout = 5000;
do {
cond_resched();
v = readl(aaci->base + AACI_SLFR) & (SLFR_1RXV|SLFR_2RXV);
} while ((v != (SLFR_1RXV|SLFR_2RXV)) && --timeout);
if (!timeout) {
dev_err(&aaci->dev->dev, "timeout on RX valid\n");
v = ~0;
goto out;
}
do {
v = readl(aaci->base + AACI_SL1RX) >> 12;
if (v == reg) {
v = readl(aaci->base + AACI_SL2RX) >> 4;
break;
} else if (--retries) {
dev_warn(&aaci->dev->dev,
"ac97 read back fail. retry\n");
continue;
} else {
dev_warn(&aaci->dev->dev,
"wrong ac97 register read back (%x != %x)\n",
v, reg);
v = ~0;
}
} while (retries);
out:
mutex_unlock(&aaci->ac97_sem);
return v;
}
static inline void aaci_chan_wait_ready(struct aaci_runtime *aacirun)
{
u32 val;
int timeout = 5000;
do {
val = readl(aacirun->base + AACI_SR);
} while (val & (SR_TXB|SR_RXB) && timeout--);
}
/*
* Interrupt support.
*/
static void aaci_fifo_irq(struct aaci *aaci, int channel, u32 mask)
{
if (mask & ISR_ORINTR) {
dev_warn(&aaci->dev->dev, "RX overrun on chan %d\n", channel);
writel(ICLR_RXOEC1 << channel, aaci->base + AACI_INTCLR);
}
if (mask & ISR_RXTOINTR) {
dev_warn(&aaci->dev->dev, "RX timeout on chan %d\n", channel);
writel(ICLR_RXTOFEC1 << channel, aaci->base + AACI_INTCLR);
}
if (mask & ISR_RXINTR) {
struct aaci_runtime *aacirun = &aaci->capture;
void *ptr;
if (!aacirun->substream || !aacirun->start) {
dev_warn(&aaci->dev->dev, "RX interrupt???\n");
writel(0, aacirun->base + AACI_IE);
return;
}
ptr = aacirun->ptr;
do {
unsigned int len = aacirun->fifosz;
u32 val;
if (aacirun->bytes <= 0) {
aacirun->bytes += aacirun->period;
aacirun->ptr = ptr;
spin_unlock(&aaci->lock);
snd_pcm_period_elapsed(aacirun->substream);
spin_lock(&aaci->lock);
}
if (!(aacirun->cr & CR_EN))
break;
val = readl(aacirun->base + AACI_SR);
if (!(val & SR_RXHF))
break;
if (!(val & SR_RXFF))
len >>= 1;
aacirun->bytes -= len;
/* reading 16 bytes at a time */
for( ; len > 0; len -= 16) {
asm(
"ldmia %1, {r0, r1, r2, r3}\n\t"
"stmia %0!, {r0, r1, r2, r3}"
: "+r" (ptr)
: "r" (aacirun->fifo)
: "r0", "r1", "r2", "r3", "cc");
if (ptr >= aacirun->end)
ptr = aacirun->start;
}
} while(1);
aacirun->ptr = ptr;
}
if (mask & ISR_URINTR) {
dev_dbg(&aaci->dev->dev, "TX underrun on chan %d\n", channel);
writel(ICLR_TXUEC1 << channel, aaci->base + AACI_INTCLR);
}
if (mask & ISR_TXINTR) {
struct aaci_runtime *aacirun = &aaci->playback;
void *ptr;
if (!aacirun->substream || !aacirun->start) {
dev_warn(&aaci->dev->dev, "TX interrupt???\n");
writel(0, aacirun->base + AACI_IE);
return;
}
ptr = aacirun->ptr;
do {
unsigned int len = aacirun->fifosz;
u32 val;
if (aacirun->bytes <= 0) {
aacirun->bytes += aacirun->period;
aacirun->ptr = ptr;
spin_unlock(&aaci->lock);
snd_pcm_period_elapsed(aacirun->substream);
spin_lock(&aaci->lock);
}
if (!(aacirun->cr & CR_EN))
break;
val = readl(aacirun->base + AACI_SR);
if (!(val & SR_TXHE))
break;
if (!(val & SR_TXFE))
len >>= 1;
aacirun->bytes -= len;
/* writing 16 bytes at a time */
for ( ; len > 0; len -= 16) {
asm(
"ldmia %0!, {r0, r1, r2, r3}\n\t"
"stmia %1, {r0, r1, r2, r3}"
: "+r" (ptr)
: "r" (aacirun->fifo)
: "r0", "r1", "r2", "r3", "cc");
if (ptr >= aacirun->end)
ptr = aacirun->start;
}
} while (1);
aacirun->ptr = ptr;
}
}
static irqreturn_t aaci_irq(int irq, void *devid)
{
struct aaci *aaci = devid;
u32 mask;
int i;
spin_lock(&aaci->lock);
mask = readl(aaci->base + AACI_ALLINTS);
if (mask) {
u32 m = mask;
for (i = 0; i < 4; i++, m >>= 7) {
if (m & 0x7f) {
aaci_fifo_irq(aaci, i, m);
}
}
}
spin_unlock(&aaci->lock);
return mask ? IRQ_HANDLED : IRQ_NONE;
}
/*
* ALSA support.
*/
struct aaci_stream {
unsigned char codec_idx;
unsigned char rate_idx;
};
static struct aaci_stream aaci_streams[] = {
[ACSTREAM_FRONT] = {
.codec_idx = 0,
.rate_idx = AC97_RATES_FRONT_DAC,
},
[ACSTREAM_SURROUND] = {
.codec_idx = 0,
.rate_idx = AC97_RATES_SURR_DAC,
},
[ACSTREAM_LFE] = {
.codec_idx = 0,
.rate_idx = AC97_RATES_LFE_DAC,
},
};
static inline unsigned int aaci_rate_mask(struct aaci *aaci, int streamid)
{
struct aaci_stream *s = aaci_streams + streamid;
return aaci->ac97_bus->codec[s->codec_idx]->rates[s->rate_idx];
}
static unsigned int rate_list[] = {
5512, 8000, 11025, 16000, 22050, 32000, 44100,
48000, 64000, 88200, 96000, 176400, 192000
};
/*
* Double-rate rule: we can support double rate iff channels == 2
* (unimplemented)
*/
static int
aaci_rule_rate_by_channels(struct snd_pcm_hw_params *p, struct snd_pcm_hw_rule *rule)
{
struct aaci *aaci = rule->private;
unsigned int rate_mask = SNDRV_PCM_RATE_8000_48000|SNDRV_PCM_RATE_5512;
struct snd_interval *c = hw_param_interval(p, SNDRV_PCM_HW_PARAM_CHANNELS);
switch (c->max) {
case 6:
rate_mask &= aaci_rate_mask(aaci, ACSTREAM_LFE);
case 4:
rate_mask &= aaci_rate_mask(aaci, ACSTREAM_SURROUND);
case 2:
rate_mask &= aaci_rate_mask(aaci, ACSTREAM_FRONT);
}
return snd_interval_list(hw_param_interval(p, rule->var),
ARRAY_SIZE(rate_list), rate_list,
rate_mask);
}
static struct snd_pcm_hardware aaci_hw_info = {
.info = SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_RESUME,
/*
* ALSA doesn't support 18-bit or 20-bit packed into 32-bit
* words. It also doesn't support 12-bit at all.
*/
.formats = SNDRV_PCM_FMTBIT_S16_LE,
/* should this be continuous or knot? */
.rates = SNDRV_PCM_RATE_CONTINUOUS,
.rate_max = 48000,
.rate_min = 4000,
.channels_min = 2,
.channels_max = 6,
.buffer_bytes_max = 64 * 1024,
.period_bytes_min = 256,
.period_bytes_max = PAGE_SIZE,
.periods_min = 4,
.periods_max = PAGE_SIZE / 16,
};
static int __aaci_pcm_open(struct aaci *aaci,
struct snd_pcm_substream *substream,
struct aaci_runtime *aacirun)
{
struct snd_pcm_runtime *runtime = substream->runtime;
int ret;
aacirun->substream = substream;
runtime->private_data = aacirun;
runtime->hw = aaci_hw_info;
/*
* FIXME: ALSA specifies fifo_size in bytes. If we're in normal
* mode, each 32-bit word contains one sample. If we're in
* compact mode, each 32-bit word contains two samples, effectively
* halving the FIFO size. However, we don't know for sure which
* we'll be using at this point. We set this to the lower limit.
*/
runtime->hw.fifo_size = aaci->fifosize * 2;
/*
* Add rule describing hardware rate dependency
* on the number of channels.
*/
ret = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
aaci_rule_rate_by_channels, aaci,
SNDRV_PCM_HW_PARAM_CHANNELS,
SNDRV_PCM_HW_PARAM_RATE, -1);
if (ret)
goto out;
ret = request_irq(aaci->dev->irq[0], aaci_irq, IRQF_SHARED|IRQF_DISABLED,
DRIVER_NAME, aaci);
if (ret)
goto out;
return 0;
out:
return ret;
}
/*
* Common ALSA stuff
*/
static int aaci_pcm_close(struct snd_pcm_substream *substream)
{
struct aaci *aaci = substream->private_data;
struct aaci_runtime *aacirun = substream->runtime->private_data;
WARN_ON(aacirun->cr & CR_EN);
aacirun->substream = NULL;
free_irq(aaci->dev->irq[0], aaci);
return 0;
}
static int aaci_pcm_hw_free(struct snd_pcm_substream *substream)
{
struct aaci_runtime *aacirun = substream->runtime->private_data;
/*
* This must not be called with the device enabled.
*/
WARN_ON(aacirun->cr & CR_EN);
if (aacirun->pcm_open)
snd_ac97_pcm_close(aacirun->pcm);
aacirun->pcm_open = 0;
/*
* Clear out the DMA and any allocated buffers.
*/
devdma_hw_free(NULL, substream);
return 0;
}
static int aaci_pcm_hw_params(struct snd_pcm_substream *substream,
struct aaci_runtime *aacirun,
struct snd_pcm_hw_params *params)
{
int err;
aaci_pcm_hw_free(substream);
err = devdma_hw_alloc(NULL, substream,
params_buffer_bytes(params));
if (err < 0)
goto out;
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
err = snd_ac97_pcm_open(aacirun->pcm, params_rate(params),
params_channels(params),
aacirun->pcm->r[0].slots);
else
err = snd_ac97_pcm_open(aacirun->pcm, params_rate(params),
params_channels(params),
aacirun->pcm->r[1].slots);
if (err)
goto out;
aacirun->pcm_open = 1;
out:
return err;
}
static int aaci_pcm_prepare(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct aaci_runtime *aacirun = runtime->private_data;
aacirun->start = (void *)runtime->dma_area;
aacirun->end = aacirun->start + runtime->dma_bytes;
aacirun->ptr = aacirun->start;
aacirun->period =
aacirun->bytes = frames_to_bytes(runtime, runtime->period_size);
return 0;
}
static snd_pcm_uframes_t aaci_pcm_pointer(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct aaci_runtime *aacirun = runtime->private_data;
ssize_t bytes = aacirun->ptr - aacirun->start;
return bytes_to_frames(runtime, bytes);
}
static int aaci_pcm_mmap(struct snd_pcm_substream *substream, struct vm_area_struct *vma)
{
return devdma_mmap(NULL, substream, vma);
}
/*
* Playback specific ALSA stuff
*/
static const u32 channels_to_txmask[] = {
[2] = CR_SL3 | CR_SL4,
[4] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8,
[6] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8 | CR_SL6 | CR_SL9,
};
/*
* We can support two and four channel audio. Unfortunately
* six channel audio requires a non-standard channel ordering:
* 2 -> FL(3), FR(4)
* 4 -> FL(3), FR(4), SL(7), SR(8)
* 6 -> FL(3), FR(4), SL(7), SR(8), C(6), LFE(9) (required)
* FL(3), FR(4), C(6), SL(7), SR(8), LFE(9) (actual)
* This requires an ALSA configuration file to correct.
*/
static unsigned int channel_list[] = { 2, 4, 6 };
static int
aaci_rule_channels(struct snd_pcm_hw_params *p, struct snd_pcm_hw_rule *rule)
{
struct aaci *aaci = rule->private;
unsigned int chan_mask = 1 << 0, slots;
/*
* pcms[0] is the our 5.1 PCM instance.
*/
slots = aaci->ac97_bus->pcms[0].r[0].slots;
if (slots & (1 << AC97_SLOT_PCM_SLEFT)) {
chan_mask |= 1 << 1;
if (slots & (1 << AC97_SLOT_LFE))
chan_mask |= 1 << 2;
}
return snd_interval_list(hw_param_interval(p, rule->var),
ARRAY_SIZE(channel_list), channel_list,
chan_mask);
}
static int aaci_pcm_open(struct snd_pcm_substream *substream)
{
struct aaci *aaci = substream->private_data;
int ret;
/*
* Add rule describing channel dependency.
*/
ret = snd_pcm_hw_rule_add(substream->runtime, 0,
SNDRV_PCM_HW_PARAM_CHANNELS,
aaci_rule_channels, aaci,
SNDRV_PCM_HW_PARAM_CHANNELS, -1);
if (ret)
return ret;
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
ret = __aaci_pcm_open(aaci, substream, &aaci->playback);
} else {
ret = __aaci_pcm_open(aaci, substream, &aaci->capture);
}
return ret;
}
static int aaci_pcm_playback_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
struct aaci *aaci = substream->private_data;
struct aaci_runtime *aacirun = substream->runtime->private_data;
unsigned int channels = params_channels(params);
int ret;
WARN_ON(channels >= ARRAY_SIZE(channels_to_txmask) ||
!channels_to_txmask[channels]);
ret = aaci_pcm_hw_params(substream, aacirun, params);
/*
* Enable FIFO, compact mode, 16 bits per sample.
* FIXME: double rate slots?
*/
if (ret >= 0) {
aacirun->cr = CR_FEN | CR_COMPACT | CR_SZ16;
aacirun->cr |= channels_to_txmask[channels];
aacirun->fifosz = aaci->fifosize * 4;
if (aacirun->cr & CR_COMPACT)
aacirun->fifosz >>= 1;
}
return ret;
}
static void aaci_pcm_playback_stop(struct aaci_runtime *aacirun)
{
u32 ie;
ie = readl(aacirun->base + AACI_IE);
ie &= ~(IE_URIE|IE_TXIE);
writel(ie, aacirun->base + AACI_IE);
aacirun->cr &= ~CR_EN;
aaci_chan_wait_ready(aacirun);
writel(aacirun->cr, aacirun->base + AACI_TXCR);
}
static void aaci_pcm_playback_start(struct aaci_runtime *aacirun)
{
u32 ie;
aaci_chan_wait_ready(aacirun);
aacirun->cr |= CR_EN;
ie = readl(aacirun->base + AACI_IE);
ie |= IE_URIE | IE_TXIE;
writel(ie, aacirun->base + AACI_IE);
writel(aacirun->cr, aacirun->base + AACI_TXCR);
}
static int aaci_pcm_playback_trigger(struct snd_pcm_substream *substream, int cmd)
{
struct aaci *aaci = substream->private_data;
struct aaci_runtime *aacirun = substream->runtime->private_data;
unsigned long flags;
int ret = 0;
spin_lock_irqsave(&aaci->lock, flags);
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
aaci_pcm_playback_start(aacirun);
break;
case SNDRV_PCM_TRIGGER_RESUME:
aaci_pcm_playback_start(aacirun);
break;
case SNDRV_PCM_TRIGGER_STOP:
aaci_pcm_playback_stop(aacirun);
break;
case SNDRV_PCM_TRIGGER_SUSPEND:
aaci_pcm_playback_stop(aacirun);
break;
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
break;
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
break;
default:
ret = -EINVAL;
}
spin_unlock_irqrestore(&aaci->lock, flags);
return ret;
}
static struct snd_pcm_ops aaci_playback_ops = {
.open = aaci_pcm_open,
.close = aaci_pcm_close,
.ioctl = snd_pcm_lib_ioctl,
.hw_params = aaci_pcm_playback_hw_params,
.hw_free = aaci_pcm_hw_free,
.prepare = aaci_pcm_prepare,
.trigger = aaci_pcm_playback_trigger,
.pointer = aaci_pcm_pointer,
.mmap = aaci_pcm_mmap,
};
static int aaci_pcm_capture_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
struct aaci *aaci = substream->private_data;
struct aaci_runtime *aacirun = substream->runtime->private_data;
int ret;
ret = aaci_pcm_hw_params(substream, aacirun, params);
if (ret >= 0) {
aacirun->cr = CR_FEN | CR_COMPACT | CR_SZ16;
/* Line in record: slot 3 and 4 */
aacirun->cr |= CR_SL3 | CR_SL4;
aacirun->fifosz = aaci->fifosize * 4;
if (aacirun->cr & CR_COMPACT)
aacirun->fifosz >>= 1;
}
return ret;
}
static void aaci_pcm_capture_stop(struct aaci_runtime *aacirun)
{
u32 ie;
aaci_chan_wait_ready(aacirun);
ie = readl(aacirun->base + AACI_IE);
ie &= ~(IE_ORIE | IE_RXIE);
writel(ie, aacirun->base+AACI_IE);
aacirun->cr &= ~CR_EN;
writel(aacirun->cr, aacirun->base + AACI_RXCR);
}
static void aaci_pcm_capture_start(struct aaci_runtime *aacirun)
{
u32 ie;
aaci_chan_wait_ready(aacirun);
#ifdef DEBUG
/* RX Timeout value: bits 28:17 in RXCR */
aacirun->cr |= 0xf << 17;
#endif
aacirun->cr |= CR_EN;
writel(aacirun->cr, aacirun->base + AACI_RXCR);
ie = readl(aacirun->base + AACI_IE);
ie |= IE_ORIE |IE_RXIE; // overrun and rx interrupt -- half full
writel(ie, aacirun->base + AACI_IE);
}
static int aaci_pcm_capture_trigger(struct snd_pcm_substream *substream, int cmd)
{
struct aaci *aaci = substream->private_data;
struct aaci_runtime *aacirun = substream->runtime->private_data;
unsigned long flags;
int ret = 0;
spin_lock_irqsave(&aaci->lock, flags);
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
aaci_pcm_capture_start(aacirun);
break;
case SNDRV_PCM_TRIGGER_RESUME:
aaci_pcm_capture_start(aacirun);
break;
case SNDRV_PCM_TRIGGER_STOP:
aaci_pcm_capture_stop(aacirun);
break;
case SNDRV_PCM_TRIGGER_SUSPEND:
aaci_pcm_capture_stop(aacirun);
break;
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
break;
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
break;
default:
ret = -EINVAL;
}
spin_unlock_irqrestore(&aaci->lock, flags);
return ret;
}
static int aaci_pcm_capture_prepare(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct aaci *aaci = substream->private_data;
aaci_pcm_prepare(substream);
/* allow changing of sample rate */
aaci_ac97_write(aaci->ac97, AC97_EXTENDED_STATUS, 0x0001); /* VRA */
aaci_ac97_write(aaci->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
aaci_ac97_write(aaci->ac97, AC97_PCM_MIC_ADC_RATE, runtime->rate);
/* Record select: Mic: 0, Aux: 3, Line: 4 */
aaci_ac97_write(aaci->ac97, AC97_REC_SEL, 0x0404);
return 0;
}
static struct snd_pcm_ops aaci_capture_ops = {
.open = aaci_pcm_open,
.close = aaci_pcm_close,
.ioctl = snd_pcm_lib_ioctl,
.hw_params = aaci_pcm_capture_hw_params,
.hw_free = aaci_pcm_hw_free,
.prepare = aaci_pcm_capture_prepare,
.trigger = aaci_pcm_capture_trigger,
.pointer = aaci_pcm_pointer,
.mmap = aaci_pcm_mmap,
};
/*
* Power Management.
*/
#ifdef CONFIG_PM
static int aaci_do_suspend(struct snd_card *card, unsigned int state)
{
struct aaci *aaci = card->private_data;
snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
snd_pcm_suspend_all(aaci->pcm);
return 0;
}
static int aaci_do_resume(struct snd_card *card, unsigned int state)
{
snd_power_change_state(card, SNDRV_CTL_POWER_D0);
return 0;
}
static int aaci_suspend(struct amba_device *dev, pm_message_t state)
{
struct snd_card *card = amba_get_drvdata(dev);
return card ? aaci_do_suspend(card) : 0;
}
static int aaci_resume(struct amba_device *dev)
{
struct snd_card *card = amba_get_drvdata(dev);
return card ? aaci_do_resume(card) : 0;
}
#else
#define aaci_do_suspend NULL
#define aaci_do_resume NULL
#define aaci_suspend NULL
#define aaci_resume NULL
#endif
static struct ac97_pcm ac97_defs[] __devinitdata = {
[0] = { /* Front PCM */
.exclusive = 1,
.r = {
[0] = {
.slots = (1 << AC97_SLOT_PCM_LEFT) |
(1 << AC97_SLOT_PCM_RIGHT) |
(1 << AC97_SLOT_PCM_CENTER) |
(1 << AC97_SLOT_PCM_SLEFT) |
(1 << AC97_SLOT_PCM_SRIGHT) |
(1 << AC97_SLOT_LFE),
},
},
},
[1] = { /* PCM in */
.stream = 1,
.exclusive = 1,
.r = {
[0] = {
.slots = (1 << AC97_SLOT_PCM_LEFT) |
(1 << AC97_SLOT_PCM_RIGHT),
},
},
},
[2] = { /* Mic in */
.stream = 1,
.exclusive = 1,
.r = {
[0] = {
.slots = (1 << AC97_SLOT_MIC),
},
},
}
};
static struct snd_ac97_bus_ops aaci_bus_ops = {
.write = aaci_ac97_write,
.read = aaci_ac97_read,
};
static int __devinit aaci_probe_ac97(struct aaci *aaci)
{
struct snd_ac97_template ac97_template;
struct snd_ac97_bus *ac97_bus;
struct snd_ac97 *ac97;
int ret;
/*
* Assert AACIRESET for 2us
*/
writel(0, aaci->base + AACI_RESET);
udelay(2);
writel(RESET_NRST, aaci->base + AACI_RESET);
/*
* Give the AC'97 codec more than enough time
* to wake up. (42us = ~2 frames at 48kHz.)
*/
udelay(42);
ret = snd_ac97_bus(aaci->card, 0, &aaci_bus_ops, aaci, &ac97_bus);
if (ret)
goto out;
ac97_bus->clock = 48000;
aaci->ac97_bus = ac97_bus;
memset(&ac97_template, 0, sizeof(struct snd_ac97_template));
ac97_template.private_data = aaci;
ac97_template.num = 0;
ac97_template.scaps = AC97_SCAP_SKIP_MODEM;
ret = snd_ac97_mixer(ac97_bus, &ac97_template, &ac97);
if (ret)
goto out;
aaci->ac97 = ac97;
/*
* Disable AC97 PC Beep input on audio codecs.
*/
if (ac97_is_audio(ac97))
snd_ac97_write_cache(ac97, AC97_PC_BEEP, 0x801e);
ret = snd_ac97_pcm_assign(ac97_bus, ARRAY_SIZE(ac97_defs), ac97_defs);
if (ret)
goto out;
aaci->playback.pcm = &ac97_bus->pcms[0];
aaci->capture.pcm = &ac97_bus->pcms[1];
out:
return ret;
}
static void aaci_free_card(struct snd_card *card)
{
struct aaci *aaci = card->private_data;
if (aaci->base)
iounmap(aaci->base);
}
static struct aaci * __devinit aaci_init_card(struct amba_device *dev)
{
struct aaci *aaci;
struct snd_card *card;
card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
THIS_MODULE, sizeof(struct aaci));
if (card == NULL)
return NULL;
card->private_free = aaci_free_card;
strlcpy(card->driver, DRIVER_NAME, sizeof(card->driver));
strlcpy(card->shortname, "ARM AC'97 Interface", sizeof(card->shortname));
snprintf(card->longname, sizeof(card->longname),
"%s at 0x%016llx, irq %d",
card->shortname, (unsigned long long)dev->res.start,
dev->irq[0]);
aaci = card->private_data;
mutex_init(&aaci->ac97_sem);
spin_lock_init(&aaci->lock);
aaci->card = card;
aaci->dev = dev;
/* Set MAINCR to allow slot 1 and 2 data IO */
aaci->maincr = MAINCR_IE | MAINCR_SL1RXEN | MAINCR_SL1TXEN |
MAINCR_SL2RXEN | MAINCR_SL2TXEN;
return aaci;
}
static int __devinit aaci_init_pcm(struct aaci *aaci)
{
struct snd_pcm *pcm;
int ret;
ret = snd_pcm_new(aaci->card, "AACI AC'97", 0, 1, 1, &pcm);
if (ret == 0) {
aaci->pcm = pcm;
pcm->private_data = aaci;
pcm->info_flags = 0;
strlcpy(pcm->name, DRIVER_NAME, sizeof(pcm->name));
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &aaci_playback_ops);
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &aaci_capture_ops);
}
return ret;
}
static unsigned int __devinit aaci_size_fifo(struct aaci *aaci)
{
struct aaci_runtime *aacirun = &aaci->playback;
int i;
writel(CR_FEN | CR_SZ16 | CR_EN, aacirun->base + AACI_TXCR);
for (i = 0; !(readl(aacirun->base + AACI_SR) & SR_TXFF) && i < 4096; i++)
writel(0, aacirun->fifo);
writel(0, aacirun->base + AACI_TXCR);
/*
* Re-initialise the AACI after the FIFO depth test, to
* ensure that the FIFOs are empty. Unfortunately, merely
* disabling the channel doesn't clear the FIFO.
*/
writel(aaci->maincr & ~MAINCR_IE, aaci->base + AACI_MAINCR);
writel(aaci->maincr, aaci->base + AACI_MAINCR);
/*
* If we hit 4096, we failed. Go back to the specified
* fifo depth.
*/
if (i == 4096)
i = 8;
return i;
}
static int __devinit aaci_probe(struct amba_device *dev, void *id)
{
struct aaci *aaci;
int ret, i;
ret = amba_request_regions(dev, NULL);
if (ret)
return ret;
aaci = aaci_init_card(dev);
if (!aaci) {
ret = -ENOMEM;
goto out;
}
aaci->base = ioremap(dev->res.start, SZ_4K);
if (!aaci->base) {
ret = -ENOMEM;
goto out;
}
/*
* Playback uses AACI channel 0
*/
aaci->playback.base = aaci->base + AACI_CSCH1;
aaci->playback.fifo = aaci->base + AACI_DR1;
/*
* Capture uses AACI channel 0
*/
aaci->capture.base = aaci->base + AACI_CSCH1;
aaci->capture.fifo = aaci->base + AACI_DR1;
for (i = 0; i < 4; i++) {
void __iomem *base = aaci->base + i * 0x14;
writel(0, base + AACI_IE);
writel(0, base + AACI_TXCR);
writel(0, base + AACI_RXCR);
}
writel(0x1fff, aaci->base + AACI_INTCLR);
writel(aaci->maincr, aaci->base + AACI_MAINCR);
ret = aaci_probe_ac97(aaci);
if (ret)
goto out;
/*
* Size the FIFOs (must be multiple of 16).
*/
aaci->fifosize = aaci_size_fifo(aaci);
if (aaci->fifosize & 15) {
printk(KERN_WARNING "AACI: fifosize = %d not supported\n",
aaci->fifosize);
ret = -ENODEV;
goto out;
}
ret = aaci_init_pcm(aaci);
if (ret)
goto out;
snd_card_set_dev(aaci->card, &dev->dev);
ret = snd_card_register(aaci->card);
if (ret == 0) {
dev_info(&dev->dev, "%s, fifo %d\n", aaci->card->longname,
aaci->fifosize);
amba_set_drvdata(dev, aaci->card);
return ret;
}
out:
if (aaci)
snd_card_free(aaci->card);
amba_release_regions(dev);
return ret;
}
static int __devexit aaci_remove(struct amba_device *dev)
{
struct snd_card *card = amba_get_drvdata(dev);
amba_set_drvdata(dev, NULL);
if (card) {
struct aaci *aaci = card->private_data;
writel(0, aaci->base + AACI_MAINCR);
snd_card_free(card);
amba_release_regions(dev);
}
return 0;
}
static struct amba_id aaci_ids[] = {
{
.id = 0x00041041,
.mask = 0x000fffff,
},
{ 0, 0 },
};
static struct amba_driver aaci_driver = {
.drv = {
.name = DRIVER_NAME,
},
.probe = aaci_probe,
.remove = __devexit_p(aaci_remove),
.suspend = aaci_suspend,
.resume = aaci_resume,
.id_table = aaci_ids,
};
static int __init aaci_init(void)
{
return amba_driver_register(&aaci_driver);
}
static void __exit aaci_exit(void)
{
amba_driver_unregister(&aaci_driver);
}
module_init(aaci_init);
module_exit(aaci_exit);
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("ARM PrimeCell PL041 Advanced Audio CODEC Interface driver");
| gpl-2.0 |
dperezde/little-penguin | linux-eudyptula/drivers/scsi/qla2xxx/qla_nx2.c | 109734 | /*
* QLogic Fibre Channel HBA Driver
* Copyright (c) 2003-2014 QLogic Corporation
*
* See LICENSE.qla2xxx for copyright and licensing details.
*/
#include <linux/vmalloc.h>
#include <linux/delay.h>
#include "qla_def.h"
#include "qla_gbl.h"
#include <linux/delay.h>
#define TIMEOUT_100_MS 100
/* 8044 Flash Read/Write functions */
uint32_t
qla8044_rd_reg(struct qla_hw_data *ha, ulong addr)
{
return readl((void __iomem *) (ha->nx_pcibase + addr));
}
void
qla8044_wr_reg(struct qla_hw_data *ha, ulong addr, uint32_t val)
{
writel(val, (void __iomem *)((ha)->nx_pcibase + addr));
}
int
qla8044_rd_direct(struct scsi_qla_host *vha,
const uint32_t crb_reg)
{
struct qla_hw_data *ha = vha->hw;
if (crb_reg < CRB_REG_INDEX_MAX)
return qla8044_rd_reg(ha, qla8044_reg_tbl[crb_reg]);
else
return QLA_FUNCTION_FAILED;
}
void
qla8044_wr_direct(struct scsi_qla_host *vha,
const uint32_t crb_reg,
const uint32_t value)
{
struct qla_hw_data *ha = vha->hw;
if (crb_reg < CRB_REG_INDEX_MAX)
qla8044_wr_reg(ha, qla8044_reg_tbl[crb_reg], value);
}
static int
qla8044_set_win_base(scsi_qla_host_t *vha, uint32_t addr)
{
uint32_t val;
int ret_val = QLA_SUCCESS;
struct qla_hw_data *ha = vha->hw;
qla8044_wr_reg(ha, QLA8044_CRB_WIN_FUNC(ha->portnum), addr);
val = qla8044_rd_reg(ha, QLA8044_CRB_WIN_FUNC(ha->portnum));
if (val != addr) {
ql_log(ql_log_warn, vha, 0xb087,
"%s: Failed to set register window : "
"addr written 0x%x, read 0x%x!\n",
__func__, addr, val);
ret_val = QLA_FUNCTION_FAILED;
}
return ret_val;
}
static int
qla8044_rd_reg_indirect(scsi_qla_host_t *vha, uint32_t addr, uint32_t *data)
{
int ret_val = QLA_SUCCESS;
struct qla_hw_data *ha = vha->hw;
ret_val = qla8044_set_win_base(vha, addr);
if (!ret_val)
*data = qla8044_rd_reg(ha, QLA8044_WILDCARD);
else
ql_log(ql_log_warn, vha, 0xb088,
"%s: failed read of addr 0x%x!\n", __func__, addr);
return ret_val;
}
static int
qla8044_wr_reg_indirect(scsi_qla_host_t *vha, uint32_t addr, uint32_t data)
{
int ret_val = QLA_SUCCESS;
struct qla_hw_data *ha = vha->hw;
ret_val = qla8044_set_win_base(vha, addr);
if (!ret_val)
qla8044_wr_reg(ha, QLA8044_WILDCARD, data);
else
ql_log(ql_log_warn, vha, 0xb089,
"%s: failed wrt to addr 0x%x, data 0x%x\n",
__func__, addr, data);
return ret_val;
}
/*
* qla8044_read_write_crb_reg - Read from raddr and write value to waddr.
*
* @ha : Pointer to adapter structure
* @raddr : CRB address to read from
* @waddr : CRB address to write to
*
*/
static void
qla8044_read_write_crb_reg(struct scsi_qla_host *vha,
uint32_t raddr, uint32_t waddr)
{
uint32_t value;
qla8044_rd_reg_indirect(vha, raddr, &value);
qla8044_wr_reg_indirect(vha, waddr, value);
}
static int
qla8044_poll_wait_for_ready(struct scsi_qla_host *vha, uint32_t addr1,
uint32_t mask)
{
unsigned long timeout;
uint32_t temp;
/* jiffies after 100ms */
timeout = jiffies + msecs_to_jiffies(TIMEOUT_100_MS);
do {
qla8044_rd_reg_indirect(vha, addr1, &temp);
if ((temp & mask) != 0)
break;
if (time_after_eq(jiffies, timeout)) {
ql_log(ql_log_warn, vha, 0xb151,
"Error in processing rdmdio entry\n");
return -1;
}
} while (1);
return 0;
}
static uint32_t
qla8044_ipmdio_rd_reg(struct scsi_qla_host *vha,
uint32_t addr1, uint32_t addr3, uint32_t mask, uint32_t addr)
{
uint32_t temp;
int ret = 0;
ret = qla8044_poll_wait_for_ready(vha, addr1, mask);
if (ret == -1)
return -1;
temp = (0x40000000 | addr);
qla8044_wr_reg_indirect(vha, addr1, temp);
ret = qla8044_poll_wait_for_ready(vha, addr1, mask);
if (ret == -1)
return 0;
qla8044_rd_reg_indirect(vha, addr3, &ret);
return ret;
}
static int
qla8044_poll_wait_ipmdio_bus_idle(struct scsi_qla_host *vha,
uint32_t addr1, uint32_t addr2, uint32_t addr3, uint32_t mask)
{
unsigned long timeout;
uint32_t temp;
/* jiffies after 100 msecs */
timeout = jiffies + msecs_to_jiffies(TIMEOUT_100_MS);
do {
temp = qla8044_ipmdio_rd_reg(vha, addr1, addr3, mask, addr2);
if ((temp & 0x1) != 1)
break;
if (time_after_eq(jiffies, timeout)) {
ql_log(ql_log_warn, vha, 0xb152,
"Error in processing mdiobus idle\n");
return -1;
}
} while (1);
return 0;
}
static int
qla8044_ipmdio_wr_reg(struct scsi_qla_host *vha, uint32_t addr1,
uint32_t addr3, uint32_t mask, uint32_t addr, uint32_t value)
{
int ret = 0;
ret = qla8044_poll_wait_for_ready(vha, addr1, mask);
if (ret == -1)
return -1;
qla8044_wr_reg_indirect(vha, addr3, value);
qla8044_wr_reg_indirect(vha, addr1, addr);
ret = qla8044_poll_wait_for_ready(vha, addr1, mask);
if (ret == -1)
return -1;
return 0;
}
/*
* qla8044_rmw_crb_reg - Read value from raddr, AND with test_mask,
* Shift Left,Right/OR/XOR with values RMW header and write value to waddr.
*
* @vha : Pointer to adapter structure
* @raddr : CRB address to read from
* @waddr : CRB address to write to
* @p_rmw_hdr : header with shift/or/xor values.
*
*/
static void
qla8044_rmw_crb_reg(struct scsi_qla_host *vha,
uint32_t raddr, uint32_t waddr, struct qla8044_rmw *p_rmw_hdr)
{
uint32_t value;
if (p_rmw_hdr->index_a)
value = vha->reset_tmplt.array[p_rmw_hdr->index_a];
else
qla8044_rd_reg_indirect(vha, raddr, &value);
value &= p_rmw_hdr->test_mask;
value <<= p_rmw_hdr->shl;
value >>= p_rmw_hdr->shr;
value |= p_rmw_hdr->or_value;
value ^= p_rmw_hdr->xor_value;
qla8044_wr_reg_indirect(vha, waddr, value);
return;
}
inline void
qla8044_set_qsnt_ready(struct scsi_qla_host *vha)
{
uint32_t qsnt_state;
struct qla_hw_data *ha = vha->hw;
qsnt_state = qla8044_rd_direct(vha, QLA8044_CRB_DRV_STATE_INDEX);
qsnt_state |= (1 << ha->portnum);
qla8044_wr_direct(vha, QLA8044_CRB_DRV_STATE_INDEX, qsnt_state);
ql_log(ql_log_info, vha, 0xb08e, "%s(%ld): qsnt_state: 0x%08x\n",
__func__, vha->host_no, qsnt_state);
}
void
qla8044_clear_qsnt_ready(struct scsi_qla_host *vha)
{
uint32_t qsnt_state;
struct qla_hw_data *ha = vha->hw;
qsnt_state = qla8044_rd_direct(vha, QLA8044_CRB_DRV_STATE_INDEX);
qsnt_state &= ~(1 << ha->portnum);
qla8044_wr_direct(vha, QLA8044_CRB_DRV_STATE_INDEX, qsnt_state);
ql_log(ql_log_info, vha, 0xb08f, "%s(%ld): qsnt_state: 0x%08x\n",
__func__, vha->host_no, qsnt_state);
}
/**
*
* qla8044_lock_recovery - Recovers the idc_lock.
* @ha : Pointer to adapter structure
*
* Lock Recovery Register
* 5-2 Lock recovery owner: Function ID of driver doing lock recovery,
* valid if bits 1..0 are set by driver doing lock recovery.
* 1-0 1 - Driver intends to force unlock the IDC lock.
* 2 - Driver is moving forward to unlock the IDC lock. Driver clears
* this field after force unlocking the IDC lock.
*
* Lock Recovery process
* a. Read the IDC_LOCK_RECOVERY register. If the value in bits 1..0 is
* greater than 0, then wait for the other driver to unlock otherwise
* move to the next step.
* b. Indicate intent to force-unlock by writing 1h to the IDC_LOCK_RECOVERY
* register bits 1..0 and also set the function# in bits 5..2.
* c. Read the IDC_LOCK_RECOVERY register again after a delay of 200ms.
* Wait for the other driver to perform lock recovery if the function
* number in bits 5..2 has changed, otherwise move to the next step.
* d. Write a value of 2h to the IDC_LOCK_RECOVERY register bits 1..0
* leaving your function# in bits 5..2.
* e. Force unlock using the DRIVER_UNLOCK register and immediately clear
* the IDC_LOCK_RECOVERY bits 5..0 by writing 0.
**/
static int
qla8044_lock_recovery(struct scsi_qla_host *vha)
{
uint32_t lock = 0, lockid;
struct qla_hw_data *ha = vha->hw;
lockid = qla8044_rd_reg(ha, QLA8044_DRV_LOCKRECOVERY);
/* Check for other Recovery in progress, go wait */
if ((lockid & IDC_LOCK_RECOVERY_STATE_MASK) != 0)
return QLA_FUNCTION_FAILED;
/* Intent to Recover */
qla8044_wr_reg(ha, QLA8044_DRV_LOCKRECOVERY,
(ha->portnum <<
IDC_LOCK_RECOVERY_STATE_SHIFT_BITS) | INTENT_TO_RECOVER);
msleep(200);
/* Check Intent to Recover is advertised */
lockid = qla8044_rd_reg(ha, QLA8044_DRV_LOCKRECOVERY);
if ((lockid & IDC_LOCK_RECOVERY_OWNER_MASK) != (ha->portnum <<
IDC_LOCK_RECOVERY_STATE_SHIFT_BITS))
return QLA_FUNCTION_FAILED;
ql_dbg(ql_dbg_p3p, vha, 0xb08B, "%s:%d: IDC Lock recovery initiated\n"
, __func__, ha->portnum);
/* Proceed to Recover */
qla8044_wr_reg(ha, QLA8044_DRV_LOCKRECOVERY,
(ha->portnum << IDC_LOCK_RECOVERY_STATE_SHIFT_BITS) |
PROCEED_TO_RECOVER);
/* Force Unlock() */
qla8044_wr_reg(ha, QLA8044_DRV_LOCK_ID, 0xFF);
qla8044_rd_reg(ha, QLA8044_DRV_UNLOCK);
/* Clear bits 0-5 in IDC_RECOVERY register*/
qla8044_wr_reg(ha, QLA8044_DRV_LOCKRECOVERY, 0);
/* Get lock() */
lock = qla8044_rd_reg(ha, QLA8044_DRV_LOCK);
if (lock) {
lockid = qla8044_rd_reg(ha, QLA8044_DRV_LOCK_ID);
lockid = ((lockid + (1 << 8)) & ~0xFF) | ha->portnum;
qla8044_wr_reg(ha, QLA8044_DRV_LOCK_ID, lockid);
return QLA_SUCCESS;
} else
return QLA_FUNCTION_FAILED;
}
int
qla8044_idc_lock(struct qla_hw_data *ha)
{
uint32_t ret_val = QLA_SUCCESS, timeout = 0, status = 0;
uint32_t lock_id, lock_cnt, func_num, tmo_owner = 0, first_owner = 0;
scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
while (status == 0) {
/* acquire semaphore5 from PCI HW block */
status = qla8044_rd_reg(ha, QLA8044_DRV_LOCK);
if (status) {
/* Increment Counter (8-31) and update func_num (0-7) on
* getting a successful lock */
lock_id = qla8044_rd_reg(ha, QLA8044_DRV_LOCK_ID);
lock_id = ((lock_id + (1 << 8)) & ~0xFF) | ha->portnum;
qla8044_wr_reg(ha, QLA8044_DRV_LOCK_ID, lock_id);
break;
}
if (timeout == 0)
first_owner = qla8044_rd_reg(ha, QLA8044_DRV_LOCK_ID);
if (++timeout >=
(QLA8044_DRV_LOCK_TIMEOUT / QLA8044_DRV_LOCK_MSLEEP)) {
tmo_owner = qla8044_rd_reg(ha, QLA8044_DRV_LOCK_ID);
func_num = tmo_owner & 0xFF;
lock_cnt = tmo_owner >> 8;
ql_log(ql_log_warn, vha, 0xb114,
"%s: Lock by func %d failed after 2s, lock held "
"by func %d, lock count %d, first_owner %d\n",
__func__, ha->portnum, func_num, lock_cnt,
(first_owner & 0xFF));
if (first_owner != tmo_owner) {
/* Some other driver got lock,
* OR same driver got lock again (counter
* value changed), when we were waiting for
* lock. Retry for another 2 sec */
ql_dbg(ql_dbg_p3p, vha, 0xb115,
"%s: %d: IDC lock failed\n",
__func__, ha->portnum);
timeout = 0;
} else {
/* Same driver holding lock > 2sec.
* Force Recovery */
if (qla8044_lock_recovery(vha) == QLA_SUCCESS) {
/* Recovered and got lock */
ret_val = QLA_SUCCESS;
ql_dbg(ql_dbg_p3p, vha, 0xb116,
"%s:IDC lock Recovery by %d"
"successful...\n", __func__,
ha->portnum);
}
/* Recovery Failed, some other function
* has the lock, wait for 2secs
* and retry
*/
ql_dbg(ql_dbg_p3p, vha, 0xb08a,
"%s: IDC lock Recovery by %d "
"failed, Retrying timout\n", __func__,
ha->portnum);
timeout = 0;
}
}
msleep(QLA8044_DRV_LOCK_MSLEEP);
}
return ret_val;
}
void
qla8044_idc_unlock(struct qla_hw_data *ha)
{
int id;
scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
id = qla8044_rd_reg(ha, QLA8044_DRV_LOCK_ID);
if ((id & 0xFF) != ha->portnum) {
ql_log(ql_log_warn, vha, 0xb118,
"%s: IDC Unlock by %d failed, lock owner is %d!\n",
__func__, ha->portnum, (id & 0xFF));
return;
}
/* Keep lock counter value, update the ha->func_num to 0xFF */
qla8044_wr_reg(ha, QLA8044_DRV_LOCK_ID, (id | 0xFF));
qla8044_rd_reg(ha, QLA8044_DRV_UNLOCK);
}
/* 8044 Flash Lock/Unlock functions */
static int
qla8044_flash_lock(scsi_qla_host_t *vha)
{
int lock_owner;
int timeout = 0;
uint32_t lock_status = 0;
int ret_val = QLA_SUCCESS;
struct qla_hw_data *ha = vha->hw;
while (lock_status == 0) {
lock_status = qla8044_rd_reg(ha, QLA8044_FLASH_LOCK);
if (lock_status)
break;
if (++timeout >= QLA8044_FLASH_LOCK_TIMEOUT / 20) {
lock_owner = qla8044_rd_reg(ha,
QLA8044_FLASH_LOCK_ID);
ql_log(ql_log_warn, vha, 0xb113,
"%s: Simultaneous flash access by following ports, active port = %d: accessing port = %d",
__func__, ha->portnum, lock_owner);
ret_val = QLA_FUNCTION_FAILED;
break;
}
msleep(20);
}
qla8044_wr_reg(ha, QLA8044_FLASH_LOCK_ID, ha->portnum);
return ret_val;
}
static void
qla8044_flash_unlock(scsi_qla_host_t *vha)
{
int ret_val;
struct qla_hw_data *ha = vha->hw;
/* Reading FLASH_UNLOCK register unlocks the Flash */
qla8044_wr_reg(ha, QLA8044_FLASH_LOCK_ID, 0xFF);
ret_val = qla8044_rd_reg(ha, QLA8044_FLASH_UNLOCK);
}
static
void qla8044_flash_lock_recovery(struct scsi_qla_host *vha)
{
if (qla8044_flash_lock(vha)) {
/* Someone else is holding the lock. */
ql_log(ql_log_warn, vha, 0xb120, "Resetting flash_lock\n");
}
/*
* Either we got the lock, or someone
* else died while holding it.
* In either case, unlock.
*/
qla8044_flash_unlock(vha);
}
/*
* Address and length are byte address
*/
static int
qla8044_read_flash_data(scsi_qla_host_t *vha, uint8_t *p_data,
uint32_t flash_addr, int u32_word_count)
{
int i, ret_val = QLA_SUCCESS;
uint32_t u32_word;
if (qla8044_flash_lock(vha) != QLA_SUCCESS) {
ret_val = QLA_FUNCTION_FAILED;
goto exit_lock_error;
}
if (flash_addr & 0x03) {
ql_log(ql_log_warn, vha, 0xb117,
"%s: Illegal addr = 0x%x\n", __func__, flash_addr);
ret_val = QLA_FUNCTION_FAILED;
goto exit_flash_read;
}
for (i = 0; i < u32_word_count; i++) {
if (qla8044_wr_reg_indirect(vha, QLA8044_FLASH_DIRECT_WINDOW,
(flash_addr & 0xFFFF0000))) {
ql_log(ql_log_warn, vha, 0xb119,
"%s: failed to write addr 0x%x to "
"FLASH_DIRECT_WINDOW\n! ",
__func__, flash_addr);
ret_val = QLA_FUNCTION_FAILED;
goto exit_flash_read;
}
ret_val = qla8044_rd_reg_indirect(vha,
QLA8044_FLASH_DIRECT_DATA(flash_addr),
&u32_word);
if (ret_val != QLA_SUCCESS) {
ql_log(ql_log_warn, vha, 0xb08c,
"%s: failed to read addr 0x%x!\n",
__func__, flash_addr);
goto exit_flash_read;
}
*(uint32_t *)p_data = u32_word;
p_data = p_data + 4;
flash_addr = flash_addr + 4;
}
exit_flash_read:
qla8044_flash_unlock(vha);
exit_lock_error:
return ret_val;
}
/*
* Address and length are byte address
*/
uint8_t *
qla8044_read_optrom_data(struct scsi_qla_host *vha, uint8_t *buf,
uint32_t offset, uint32_t length)
{
scsi_block_requests(vha->host);
if (qla8044_read_flash_data(vha, (uint8_t *)buf, offset, length / 4)
!= QLA_SUCCESS) {
ql_log(ql_log_warn, vha, 0xb08d,
"%s: Failed to read from flash\n",
__func__);
}
scsi_unblock_requests(vha->host);
return buf;
}
inline int
qla8044_need_reset(struct scsi_qla_host *vha)
{
uint32_t drv_state, drv_active;
int rval;
struct qla_hw_data *ha = vha->hw;
drv_active = qla8044_rd_direct(vha, QLA8044_CRB_DRV_ACTIVE_INDEX);
drv_state = qla8044_rd_direct(vha, QLA8044_CRB_DRV_STATE_INDEX);
rval = drv_state & (1 << ha->portnum);
if (ha->flags.eeh_busy && drv_active)
rval = 1;
return rval;
}
/*
* qla8044_write_list - Write the value (p_entry->arg2) to address specified
* by p_entry->arg1 for all entries in header with delay of p_hdr->delay between
* entries.
*
* @vha : Pointer to adapter structure
* @p_hdr : reset_entry header for WRITE_LIST opcode.
*
*/
static void
qla8044_write_list(struct scsi_qla_host *vha,
struct qla8044_reset_entry_hdr *p_hdr)
{
struct qla8044_entry *p_entry;
uint32_t i;
p_entry = (struct qla8044_entry *)((char *)p_hdr +
sizeof(struct qla8044_reset_entry_hdr));
for (i = 0; i < p_hdr->count; i++, p_entry++) {
qla8044_wr_reg_indirect(vha, p_entry->arg1, p_entry->arg2);
if (p_hdr->delay)
udelay((uint32_t)(p_hdr->delay));
}
}
/*
* qla8044_read_write_list - Read from address specified by p_entry->arg1,
* write value read to address specified by p_entry->arg2, for all entries in
* header with delay of p_hdr->delay between entries.
*
* @vha : Pointer to adapter structure
* @p_hdr : reset_entry header for READ_WRITE_LIST opcode.
*
*/
static void
qla8044_read_write_list(struct scsi_qla_host *vha,
struct qla8044_reset_entry_hdr *p_hdr)
{
struct qla8044_entry *p_entry;
uint32_t i;
p_entry = (struct qla8044_entry *)((char *)p_hdr +
sizeof(struct qla8044_reset_entry_hdr));
for (i = 0; i < p_hdr->count; i++, p_entry++) {
qla8044_read_write_crb_reg(vha, p_entry->arg1,
p_entry->arg2);
if (p_hdr->delay)
udelay((uint32_t)(p_hdr->delay));
}
}
/*
* qla8044_poll_reg - Poll the given CRB addr for duration msecs till
* value read ANDed with test_mask is equal to test_result.
*
* @ha : Pointer to adapter structure
* @addr : CRB register address
* @duration : Poll for total of "duration" msecs
* @test_mask : Mask value read with "test_mask"
* @test_result : Compare (value&test_mask) with test_result.
*
* Return Value - QLA_SUCCESS/QLA_FUNCTION_FAILED
*/
static int
qla8044_poll_reg(struct scsi_qla_host *vha, uint32_t addr,
int duration, uint32_t test_mask, uint32_t test_result)
{
uint32_t value;
int timeout_error;
uint8_t retries;
int ret_val = QLA_SUCCESS;
ret_val = qla8044_rd_reg_indirect(vha, addr, &value);
if (ret_val == QLA_FUNCTION_FAILED) {
timeout_error = 1;
goto exit_poll_reg;
}
/* poll every 1/10 of the total duration */
retries = duration/10;
do {
if ((value & test_mask) != test_result) {
timeout_error = 1;
msleep(duration/10);
ret_val = qla8044_rd_reg_indirect(vha, addr, &value);
if (ret_val == QLA_FUNCTION_FAILED) {
timeout_error = 1;
goto exit_poll_reg;
}
} else {
timeout_error = 0;
break;
}
} while (retries--);
exit_poll_reg:
if (timeout_error) {
vha->reset_tmplt.seq_error++;
ql_log(ql_log_fatal, vha, 0xb090,
"%s: Poll Failed: 0x%08x 0x%08x 0x%08x\n",
__func__, value, test_mask, test_result);
}
return timeout_error;
}
/*
* qla8044_poll_list - For all entries in the POLL_LIST header, poll read CRB
* register specified by p_entry->arg1 and compare (value AND test_mask) with
* test_result to validate it. Wait for p_hdr->delay between processing entries.
*
* @ha : Pointer to adapter structure
* @p_hdr : reset_entry header for POLL_LIST opcode.
*
*/
static void
qla8044_poll_list(struct scsi_qla_host *vha,
struct qla8044_reset_entry_hdr *p_hdr)
{
long delay;
struct qla8044_entry *p_entry;
struct qla8044_poll *p_poll;
uint32_t i;
uint32_t value;
p_poll = (struct qla8044_poll *)
((char *)p_hdr + sizeof(struct qla8044_reset_entry_hdr));
/* Entries start after 8 byte qla8044_poll, poll header contains
* the test_mask, test_value.
*/
p_entry = (struct qla8044_entry *)((char *)p_poll +
sizeof(struct qla8044_poll));
delay = (long)p_hdr->delay;
if (!delay) {
for (i = 0; i < p_hdr->count; i++, p_entry++)
qla8044_poll_reg(vha, p_entry->arg1,
delay, p_poll->test_mask, p_poll->test_value);
} else {
for (i = 0; i < p_hdr->count; i++, p_entry++) {
if (delay) {
if (qla8044_poll_reg(vha,
p_entry->arg1, delay,
p_poll->test_mask,
p_poll->test_value)) {
/*If
* (data_read&test_mask != test_value)
* read TIMEOUT_ADDR (arg1) and
* ADDR (arg2) registers
*/
qla8044_rd_reg_indirect(vha,
p_entry->arg1, &value);
qla8044_rd_reg_indirect(vha,
p_entry->arg2, &value);
}
}
}
}
}
/*
* qla8044_poll_write_list - Write dr_value, ar_value to dr_addr/ar_addr,
* read ar_addr, if (value& test_mask != test_mask) re-read till timeout
* expires.
*
* @vha : Pointer to adapter structure
* @p_hdr : reset entry header for POLL_WRITE_LIST opcode.
*
*/
static void
qla8044_poll_write_list(struct scsi_qla_host *vha,
struct qla8044_reset_entry_hdr *p_hdr)
{
long delay;
struct qla8044_quad_entry *p_entry;
struct qla8044_poll *p_poll;
uint32_t i;
p_poll = (struct qla8044_poll *)((char *)p_hdr +
sizeof(struct qla8044_reset_entry_hdr));
p_entry = (struct qla8044_quad_entry *)((char *)p_poll +
sizeof(struct qla8044_poll));
delay = (long)p_hdr->delay;
for (i = 0; i < p_hdr->count; i++, p_entry++) {
qla8044_wr_reg_indirect(vha,
p_entry->dr_addr, p_entry->dr_value);
qla8044_wr_reg_indirect(vha,
p_entry->ar_addr, p_entry->ar_value);
if (delay) {
if (qla8044_poll_reg(vha,
p_entry->ar_addr, delay,
p_poll->test_mask,
p_poll->test_value)) {
ql_dbg(ql_dbg_p3p, vha, 0xb091,
"%s: Timeout Error: poll list, ",
__func__);
ql_dbg(ql_dbg_p3p, vha, 0xb092,
"item_num %d, entry_num %d\n", i,
vha->reset_tmplt.seq_index);
}
}
}
}
/*
* qla8044_read_modify_write - Read value from p_entry->arg1, modify the
* value, write value to p_entry->arg2. Process entries with p_hdr->delay
* between entries.
*
* @vha : Pointer to adapter structure
* @p_hdr : header with shift/or/xor values.
*
*/
static void
qla8044_read_modify_write(struct scsi_qla_host *vha,
struct qla8044_reset_entry_hdr *p_hdr)
{
struct qla8044_entry *p_entry;
struct qla8044_rmw *p_rmw_hdr;
uint32_t i;
p_rmw_hdr = (struct qla8044_rmw *)((char *)p_hdr +
sizeof(struct qla8044_reset_entry_hdr));
p_entry = (struct qla8044_entry *)((char *)p_rmw_hdr +
sizeof(struct qla8044_rmw));
for (i = 0; i < p_hdr->count; i++, p_entry++) {
qla8044_rmw_crb_reg(vha, p_entry->arg1,
p_entry->arg2, p_rmw_hdr);
if (p_hdr->delay)
udelay((uint32_t)(p_hdr->delay));
}
}
/*
* qla8044_pause - Wait for p_hdr->delay msecs, called between processing
* two entries of a sequence.
*
* @vha : Pointer to adapter structure
* @p_hdr : Common reset entry header.
*
*/
static
void qla8044_pause(struct scsi_qla_host *vha,
struct qla8044_reset_entry_hdr *p_hdr)
{
if (p_hdr->delay)
mdelay((uint32_t)((long)p_hdr->delay));
}
/*
* qla8044_template_end - Indicates end of reset sequence processing.
*
* @vha : Pointer to adapter structure
* @p_hdr : Common reset entry header.
*
*/
static void
qla8044_template_end(struct scsi_qla_host *vha,
struct qla8044_reset_entry_hdr *p_hdr)
{
vha->reset_tmplt.template_end = 1;
if (vha->reset_tmplt.seq_error == 0) {
ql_dbg(ql_dbg_p3p, vha, 0xb093,
"%s: Reset sequence completed SUCCESSFULLY.\n", __func__);
} else {
ql_log(ql_log_fatal, vha, 0xb094,
"%s: Reset sequence completed with some timeout "
"errors.\n", __func__);
}
}
/*
* qla8044_poll_read_list - Write ar_value to ar_addr register, read ar_addr,
* if (value & test_mask != test_value) re-read till timeout value expires,
* read dr_addr register and assign to reset_tmplt.array.
*
* @vha : Pointer to adapter structure
* @p_hdr : Common reset entry header.
*
*/
static void
qla8044_poll_read_list(struct scsi_qla_host *vha,
struct qla8044_reset_entry_hdr *p_hdr)
{
long delay;
int index;
struct qla8044_quad_entry *p_entry;
struct qla8044_poll *p_poll;
uint32_t i;
uint32_t value;
p_poll = (struct qla8044_poll *)
((char *)p_hdr + sizeof(struct qla8044_reset_entry_hdr));
p_entry = (struct qla8044_quad_entry *)
((char *)p_poll + sizeof(struct qla8044_poll));
delay = (long)p_hdr->delay;
for (i = 0; i < p_hdr->count; i++, p_entry++) {
qla8044_wr_reg_indirect(vha, p_entry->ar_addr,
p_entry->ar_value);
if (delay) {
if (qla8044_poll_reg(vha, p_entry->ar_addr, delay,
p_poll->test_mask, p_poll->test_value)) {
ql_dbg(ql_dbg_p3p, vha, 0xb095,
"%s: Timeout Error: poll "
"list, ", __func__);
ql_dbg(ql_dbg_p3p, vha, 0xb096,
"Item_num %d, "
"entry_num %d\n", i,
vha->reset_tmplt.seq_index);
} else {
index = vha->reset_tmplt.array_index;
qla8044_rd_reg_indirect(vha,
p_entry->dr_addr, &value);
vha->reset_tmplt.array[index++] = value;
if (index == QLA8044_MAX_RESET_SEQ_ENTRIES)
vha->reset_tmplt.array_index = 1;
}
}
}
}
/*
* qla8031_process_reset_template - Process all entries in reset template
* till entry with SEQ_END opcode, which indicates end of the reset template
* processing. Each entry has a Reset Entry header, entry opcode/command, with
* size of the entry, number of entries in sub-sequence and delay in microsecs
* or timeout in millisecs.
*
* @ha : Pointer to adapter structure
* @p_buff : Common reset entry header.
*
*/
static void
qla8044_process_reset_template(struct scsi_qla_host *vha,
char *p_buff)
{
int index, entries;
struct qla8044_reset_entry_hdr *p_hdr;
char *p_entry = p_buff;
vha->reset_tmplt.seq_end = 0;
vha->reset_tmplt.template_end = 0;
entries = vha->reset_tmplt.hdr->entries;
index = vha->reset_tmplt.seq_index;
for (; (!vha->reset_tmplt.seq_end) && (index < entries); index++) {
p_hdr = (struct qla8044_reset_entry_hdr *)p_entry;
switch (p_hdr->cmd) {
case OPCODE_NOP:
break;
case OPCODE_WRITE_LIST:
qla8044_write_list(vha, p_hdr);
break;
case OPCODE_READ_WRITE_LIST:
qla8044_read_write_list(vha, p_hdr);
break;
case OPCODE_POLL_LIST:
qla8044_poll_list(vha, p_hdr);
break;
case OPCODE_POLL_WRITE_LIST:
qla8044_poll_write_list(vha, p_hdr);
break;
case OPCODE_READ_MODIFY_WRITE:
qla8044_read_modify_write(vha, p_hdr);
break;
case OPCODE_SEQ_PAUSE:
qla8044_pause(vha, p_hdr);
break;
case OPCODE_SEQ_END:
vha->reset_tmplt.seq_end = 1;
break;
case OPCODE_TMPL_END:
qla8044_template_end(vha, p_hdr);
break;
case OPCODE_POLL_READ_LIST:
qla8044_poll_read_list(vha, p_hdr);
break;
default:
ql_log(ql_log_fatal, vha, 0xb097,
"%s: Unknown command ==> 0x%04x on "
"entry = %d\n", __func__, p_hdr->cmd, index);
break;
}
/*
*Set pointer to next entry in the sequence.
*/
p_entry += p_hdr->size;
}
vha->reset_tmplt.seq_index = index;
}
static void
qla8044_process_init_seq(struct scsi_qla_host *vha)
{
qla8044_process_reset_template(vha,
vha->reset_tmplt.init_offset);
if (vha->reset_tmplt.seq_end != 1)
ql_log(ql_log_fatal, vha, 0xb098,
"%s: Abrupt INIT Sub-Sequence end.\n",
__func__);
}
static void
qla8044_process_stop_seq(struct scsi_qla_host *vha)
{
vha->reset_tmplt.seq_index = 0;
qla8044_process_reset_template(vha, vha->reset_tmplt.stop_offset);
if (vha->reset_tmplt.seq_end != 1)
ql_log(ql_log_fatal, vha, 0xb099,
"%s: Abrupt STOP Sub-Sequence end.\n", __func__);
}
static void
qla8044_process_start_seq(struct scsi_qla_host *vha)
{
qla8044_process_reset_template(vha, vha->reset_tmplt.start_offset);
if (vha->reset_tmplt.template_end != 1)
ql_log(ql_log_fatal, vha, 0xb09a,
"%s: Abrupt START Sub-Sequence end.\n",
__func__);
}
static int
qla8044_lockless_flash_read_u32(struct scsi_qla_host *vha,
uint32_t flash_addr, uint8_t *p_data, int u32_word_count)
{
uint32_t i;
uint32_t u32_word;
uint32_t flash_offset;
uint32_t addr = flash_addr;
int ret_val = QLA_SUCCESS;
flash_offset = addr & (QLA8044_FLASH_SECTOR_SIZE - 1);
if (addr & 0x3) {
ql_log(ql_log_fatal, vha, 0xb09b, "%s: Illegal addr = 0x%x\n",
__func__, addr);
ret_val = QLA_FUNCTION_FAILED;
goto exit_lockless_read;
}
ret_val = qla8044_wr_reg_indirect(vha,
QLA8044_FLASH_DIRECT_WINDOW, (addr));
if (ret_val != QLA_SUCCESS) {
ql_log(ql_log_fatal, vha, 0xb09c,
"%s: failed to write addr 0x%x to FLASH_DIRECT_WINDOW!\n",
__func__, addr);
goto exit_lockless_read;
}
/* Check if data is spread across multiple sectors */
if ((flash_offset + (u32_word_count * sizeof(uint32_t))) >
(QLA8044_FLASH_SECTOR_SIZE - 1)) {
/* Multi sector read */
for (i = 0; i < u32_word_count; i++) {
ret_val = qla8044_rd_reg_indirect(vha,
QLA8044_FLASH_DIRECT_DATA(addr), &u32_word);
if (ret_val != QLA_SUCCESS) {
ql_log(ql_log_fatal, vha, 0xb09d,
"%s: failed to read addr 0x%x!\n",
__func__, addr);
goto exit_lockless_read;
}
*(uint32_t *)p_data = u32_word;
p_data = p_data + 4;
addr = addr + 4;
flash_offset = flash_offset + 4;
if (flash_offset > (QLA8044_FLASH_SECTOR_SIZE - 1)) {
/* This write is needed once for each sector */
ret_val = qla8044_wr_reg_indirect(vha,
QLA8044_FLASH_DIRECT_WINDOW, (addr));
if (ret_val != QLA_SUCCESS) {
ql_log(ql_log_fatal, vha, 0xb09f,
"%s: failed to write addr "
"0x%x to FLASH_DIRECT_WINDOW!\n",
__func__, addr);
goto exit_lockless_read;
}
flash_offset = 0;
}
}
} else {
/* Single sector read */
for (i = 0; i < u32_word_count; i++) {
ret_val = qla8044_rd_reg_indirect(vha,
QLA8044_FLASH_DIRECT_DATA(addr), &u32_word);
if (ret_val != QLA_SUCCESS) {
ql_log(ql_log_fatal, vha, 0xb0a0,
"%s: failed to read addr 0x%x!\n",
__func__, addr);
goto exit_lockless_read;
}
*(uint32_t *)p_data = u32_word;
p_data = p_data + 4;
addr = addr + 4;
}
}
exit_lockless_read:
return ret_val;
}
/*
* qla8044_ms_mem_write_128b - Writes data to MS/off-chip memory
*
* @vha : Pointer to adapter structure
* addr : Flash address to write to
* data : Data to be written
* count : word_count to be written
*
* Return Value - QLA_SUCCESS/QLA_FUNCTION_FAILED
*/
static int
qla8044_ms_mem_write_128b(struct scsi_qla_host *vha,
uint64_t addr, uint32_t *data, uint32_t count)
{
int i, j, ret_val = QLA_SUCCESS;
uint32_t agt_ctrl;
unsigned long flags;
struct qla_hw_data *ha = vha->hw;
/* Only 128-bit aligned access */
if (addr & 0xF) {
ret_val = QLA_FUNCTION_FAILED;
goto exit_ms_mem_write;
}
write_lock_irqsave(&ha->hw_lock, flags);
/* Write address */
ret_val = qla8044_wr_reg_indirect(vha, MD_MIU_TEST_AGT_ADDR_HI, 0);
if (ret_val == QLA_FUNCTION_FAILED) {
ql_log(ql_log_fatal, vha, 0xb0a1,
"%s: write to AGT_ADDR_HI failed!\n", __func__);
goto exit_ms_mem_write_unlock;
}
for (i = 0; i < count; i++, addr += 16) {
if (!((QLA8044_ADDR_IN_RANGE(addr, QLA8044_ADDR_QDR_NET,
QLA8044_ADDR_QDR_NET_MAX)) ||
(QLA8044_ADDR_IN_RANGE(addr, QLA8044_ADDR_DDR_NET,
QLA8044_ADDR_DDR_NET_MAX)))) {
ret_val = QLA_FUNCTION_FAILED;
goto exit_ms_mem_write_unlock;
}
ret_val = qla8044_wr_reg_indirect(vha,
MD_MIU_TEST_AGT_ADDR_LO, addr);
/* Write data */
ret_val += qla8044_wr_reg_indirect(vha,
MD_MIU_TEST_AGT_WRDATA_LO, *data++);
ret_val += qla8044_wr_reg_indirect(vha,
MD_MIU_TEST_AGT_WRDATA_HI, *data++);
ret_val += qla8044_wr_reg_indirect(vha,
MD_MIU_TEST_AGT_WRDATA_ULO, *data++);
ret_val += qla8044_wr_reg_indirect(vha,
MD_MIU_TEST_AGT_WRDATA_UHI, *data++);
if (ret_val == QLA_FUNCTION_FAILED) {
ql_log(ql_log_fatal, vha, 0xb0a2,
"%s: write to AGT_WRDATA failed!\n",
__func__);
goto exit_ms_mem_write_unlock;
}
/* Check write status */
ret_val = qla8044_wr_reg_indirect(vha, MD_MIU_TEST_AGT_CTRL,
MIU_TA_CTL_WRITE_ENABLE);
ret_val += qla8044_wr_reg_indirect(vha, MD_MIU_TEST_AGT_CTRL,
MIU_TA_CTL_WRITE_START);
if (ret_val == QLA_FUNCTION_FAILED) {
ql_log(ql_log_fatal, vha, 0xb0a3,
"%s: write to AGT_CTRL failed!\n", __func__);
goto exit_ms_mem_write_unlock;
}
for (j = 0; j < MAX_CTL_CHECK; j++) {
ret_val = qla8044_rd_reg_indirect(vha,
MD_MIU_TEST_AGT_CTRL, &agt_ctrl);
if (ret_val == QLA_FUNCTION_FAILED) {
ql_log(ql_log_fatal, vha, 0xb0a4,
"%s: failed to read "
"MD_MIU_TEST_AGT_CTRL!\n", __func__);
goto exit_ms_mem_write_unlock;
}
if ((agt_ctrl & MIU_TA_CTL_BUSY) == 0)
break;
}
/* Status check failed */
if (j >= MAX_CTL_CHECK) {
ql_log(ql_log_fatal, vha, 0xb0a5,
"%s: MS memory write failed!\n",
__func__);
ret_val = QLA_FUNCTION_FAILED;
goto exit_ms_mem_write_unlock;
}
}
exit_ms_mem_write_unlock:
write_unlock_irqrestore(&ha->hw_lock, flags);
exit_ms_mem_write:
return ret_val;
}
static int
qla8044_copy_bootloader(struct scsi_qla_host *vha)
{
uint8_t *p_cache;
uint32_t src, count, size;
uint64_t dest;
int ret_val = QLA_SUCCESS;
struct qla_hw_data *ha = vha->hw;
src = QLA8044_BOOTLOADER_FLASH_ADDR;
dest = qla8044_rd_reg(ha, QLA8044_BOOTLOADER_ADDR);
size = qla8044_rd_reg(ha, QLA8044_BOOTLOADER_SIZE);
/* 128 bit alignment check */
if (size & 0xF)
size = (size + 16) & ~0xF;
/* 16 byte count */
count = size/16;
p_cache = vmalloc(size);
if (p_cache == NULL) {
ql_log(ql_log_fatal, vha, 0xb0a6,
"%s: Failed to allocate memory for "
"boot loader cache\n", __func__);
ret_val = QLA_FUNCTION_FAILED;
goto exit_copy_bootloader;
}
ret_val = qla8044_lockless_flash_read_u32(vha, src,
p_cache, size/sizeof(uint32_t));
if (ret_val == QLA_FUNCTION_FAILED) {
ql_log(ql_log_fatal, vha, 0xb0a7,
"%s: Error reading F/W from flash!!!\n", __func__);
goto exit_copy_error;
}
ql_dbg(ql_dbg_p3p, vha, 0xb0a8, "%s: Read F/W from flash!\n",
__func__);
/* 128 bit/16 byte write to MS memory */
ret_val = qla8044_ms_mem_write_128b(vha, dest,
(uint32_t *)p_cache, count);
if (ret_val == QLA_FUNCTION_FAILED) {
ql_log(ql_log_fatal, vha, 0xb0a9,
"%s: Error writing F/W to MS !!!\n", __func__);
goto exit_copy_error;
}
ql_dbg(ql_dbg_p3p, vha, 0xb0aa,
"%s: Wrote F/W (size %d) to MS !!!\n",
__func__, size);
exit_copy_error:
vfree(p_cache);
exit_copy_bootloader:
return ret_val;
}
static int
qla8044_restart(struct scsi_qla_host *vha)
{
int ret_val = QLA_SUCCESS;
struct qla_hw_data *ha = vha->hw;
qla8044_process_stop_seq(vha);
/* Collect minidump */
if (ql2xmdenable)
qla8044_get_minidump(vha);
else
ql_log(ql_log_fatal, vha, 0xb14c,
"Minidump disabled.\n");
qla8044_process_init_seq(vha);
if (qla8044_copy_bootloader(vha)) {
ql_log(ql_log_fatal, vha, 0xb0ab,
"%s: Copy bootloader, firmware restart failed!\n",
__func__);
ret_val = QLA_FUNCTION_FAILED;
goto exit_restart;
}
/*
* Loads F/W from flash
*/
qla8044_wr_reg(ha, QLA8044_FW_IMAGE_VALID, QLA8044_BOOT_FROM_FLASH);
qla8044_process_start_seq(vha);
exit_restart:
return ret_val;
}
/*
* qla8044_check_cmd_peg_status - Check peg status to see if Peg is
* initialized.
*
* @ha : Pointer to adapter structure
*
* Return Value - QLA_SUCCESS/QLA_FUNCTION_FAILED
*/
static int
qla8044_check_cmd_peg_status(struct scsi_qla_host *vha)
{
uint32_t val, ret_val = QLA_FUNCTION_FAILED;
int retries = CRB_CMDPEG_CHECK_RETRY_COUNT;
struct qla_hw_data *ha = vha->hw;
do {
val = qla8044_rd_reg(ha, QLA8044_CMDPEG_STATE);
if (val == PHAN_INITIALIZE_COMPLETE) {
ql_dbg(ql_dbg_p3p, vha, 0xb0ac,
"%s: Command Peg initialization "
"complete! state=0x%x\n", __func__, val);
ret_val = QLA_SUCCESS;
break;
}
msleep(CRB_CMDPEG_CHECK_DELAY);
} while (--retries);
return ret_val;
}
static int
qla8044_start_firmware(struct scsi_qla_host *vha)
{
int ret_val = QLA_SUCCESS;
if (qla8044_restart(vha)) {
ql_log(ql_log_fatal, vha, 0xb0ad,
"%s: Restart Error!!!, Need Reset!!!\n",
__func__);
ret_val = QLA_FUNCTION_FAILED;
goto exit_start_fw;
} else
ql_dbg(ql_dbg_p3p, vha, 0xb0af,
"%s: Restart done!\n", __func__);
ret_val = qla8044_check_cmd_peg_status(vha);
if (ret_val) {
ql_log(ql_log_fatal, vha, 0xb0b0,
"%s: Peg not initialized!\n", __func__);
ret_val = QLA_FUNCTION_FAILED;
}
exit_start_fw:
return ret_val;
}
void
qla8044_clear_drv_active(struct qla_hw_data *ha)
{
uint32_t drv_active;
struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
drv_active = qla8044_rd_direct(vha, QLA8044_CRB_DRV_ACTIVE_INDEX);
drv_active &= ~(1 << (ha->portnum));
ql_log(ql_log_info, vha, 0xb0b1,
"%s(%ld): drv_active: 0x%08x\n",
__func__, vha->host_no, drv_active);
qla8044_wr_direct(vha, QLA8044_CRB_DRV_ACTIVE_INDEX, drv_active);
}
/*
* qla8044_device_bootstrap - Initialize device, set DEV_READY, start fw
* @ha: pointer to adapter structure
*
* Note: IDC lock must be held upon entry
**/
static int
qla8044_device_bootstrap(struct scsi_qla_host *vha)
{
int rval = QLA_FUNCTION_FAILED;
int i;
uint32_t old_count = 0, count = 0;
int need_reset = 0;
uint32_t idc_ctrl;
struct qla_hw_data *ha = vha->hw;
need_reset = qla8044_need_reset(vha);
if (!need_reset) {
old_count = qla8044_rd_direct(vha,
QLA8044_PEG_ALIVE_COUNTER_INDEX);
for (i = 0; i < 10; i++) {
msleep(200);
count = qla8044_rd_direct(vha,
QLA8044_PEG_ALIVE_COUNTER_INDEX);
if (count != old_count) {
rval = QLA_SUCCESS;
goto dev_ready;
}
}
qla8044_flash_lock_recovery(vha);
} else {
/* We are trying to perform a recovery here. */
if (ha->flags.isp82xx_fw_hung)
qla8044_flash_lock_recovery(vha);
}
/* set to DEV_INITIALIZING */
ql_log(ql_log_info, vha, 0xb0b2,
"%s: HW State: INITIALIZING\n", __func__);
qla8044_wr_direct(vha, QLA8044_CRB_DEV_STATE_INDEX,
QLA8XXX_DEV_INITIALIZING);
qla8044_idc_unlock(ha);
rval = qla8044_start_firmware(vha);
qla8044_idc_lock(ha);
if (rval != QLA_SUCCESS) {
ql_log(ql_log_info, vha, 0xb0b3,
"%s: HW State: FAILED\n", __func__);
qla8044_clear_drv_active(ha);
qla8044_wr_direct(vha, QLA8044_CRB_DEV_STATE_INDEX,
QLA8XXX_DEV_FAILED);
return rval;
}
/* For ISP8044, If IDC_CTRL GRACEFUL_RESET_BIT1 is set , reset it after
* device goes to INIT state. */
idc_ctrl = qla8044_rd_reg(ha, QLA8044_IDC_DRV_CTRL);
if (idc_ctrl & GRACEFUL_RESET_BIT1) {
qla8044_wr_reg(ha, QLA8044_IDC_DRV_CTRL,
(idc_ctrl & ~GRACEFUL_RESET_BIT1));
ha->fw_dumped = 0;
}
dev_ready:
ql_log(ql_log_info, vha, 0xb0b4,
"%s: HW State: READY\n", __func__);
qla8044_wr_direct(vha, QLA8044_CRB_DEV_STATE_INDEX, QLA8XXX_DEV_READY);
return rval;
}
/*-------------------------Reset Sequence Functions-----------------------*/
static void
qla8044_dump_reset_seq_hdr(struct scsi_qla_host *vha)
{
u8 *phdr;
if (!vha->reset_tmplt.buff) {
ql_log(ql_log_fatal, vha, 0xb0b5,
"%s: Error Invalid reset_seq_template\n", __func__);
return;
}
phdr = vha->reset_tmplt.buff;
ql_dbg(ql_dbg_p3p, vha, 0xb0b6,
"Reset Template :\n\t0x%X 0x%X 0x%X 0x%X"
"0x%X 0x%X 0x%X 0x%X 0x%X 0x%X\n"
"\t0x%X 0x%X 0x%X 0x%X 0x%X 0x%X\n\n",
*phdr, *(phdr+1), *(phdr+2), *(phdr+3), *(phdr+4),
*(phdr+5), *(phdr+6), *(phdr+7), *(phdr + 8),
*(phdr+9), *(phdr+10), *(phdr+11), *(phdr+12),
*(phdr+13), *(phdr+14), *(phdr+15));
}
/*
* qla8044_reset_seq_checksum_test - Validate Reset Sequence template.
*
* @ha : Pointer to adapter structure
*
* Return Value - QLA_SUCCESS/QLA_FUNCTION_FAILED
*/
static int
qla8044_reset_seq_checksum_test(struct scsi_qla_host *vha)
{
uint32_t sum = 0;
uint16_t *buff = (uint16_t *)vha->reset_tmplt.buff;
int u16_count = vha->reset_tmplt.hdr->size / sizeof(uint16_t);
while (u16_count-- > 0)
sum += *buff++;
while (sum >> 16)
sum = (sum & 0xFFFF) + (sum >> 16);
/* checksum of 0 indicates a valid template */
if (~sum) {
return QLA_SUCCESS;
} else {
ql_log(ql_log_fatal, vha, 0xb0b7,
"%s: Reset seq checksum failed\n", __func__);
return QLA_FUNCTION_FAILED;
}
}
/*
* qla8044_read_reset_template - Read Reset Template from Flash, validate
* the template and store offsets of stop/start/init offsets in ha->reset_tmplt.
*
* @ha : Pointer to adapter structure
*/
void
qla8044_read_reset_template(struct scsi_qla_host *vha)
{
uint8_t *p_buff;
uint32_t addr, tmplt_hdr_def_size, tmplt_hdr_size;
vha->reset_tmplt.seq_error = 0;
vha->reset_tmplt.buff = vmalloc(QLA8044_RESTART_TEMPLATE_SIZE);
if (vha->reset_tmplt.buff == NULL) {
ql_log(ql_log_fatal, vha, 0xb0b8,
"%s: Failed to allocate reset template resources\n",
__func__);
goto exit_read_reset_template;
}
p_buff = vha->reset_tmplt.buff;
addr = QLA8044_RESET_TEMPLATE_ADDR;
tmplt_hdr_def_size =
sizeof(struct qla8044_reset_template_hdr) / sizeof(uint32_t);
ql_dbg(ql_dbg_p3p, vha, 0xb0b9,
"%s: Read template hdr size %d from Flash\n",
__func__, tmplt_hdr_def_size);
/* Copy template header from flash */
if (qla8044_read_flash_data(vha, p_buff, addr, tmplt_hdr_def_size)) {
ql_log(ql_log_fatal, vha, 0xb0ba,
"%s: Failed to read reset template\n", __func__);
goto exit_read_template_error;
}
vha->reset_tmplt.hdr =
(struct qla8044_reset_template_hdr *) vha->reset_tmplt.buff;
/* Validate the template header size and signature */
tmplt_hdr_size = vha->reset_tmplt.hdr->hdr_size/sizeof(uint32_t);
if ((tmplt_hdr_size != tmplt_hdr_def_size) ||
(vha->reset_tmplt.hdr->signature != RESET_TMPLT_HDR_SIGNATURE)) {
ql_log(ql_log_fatal, vha, 0xb0bb,
"%s: Template Header size invalid %d "
"tmplt_hdr_def_size %d!!!\n", __func__,
tmplt_hdr_size, tmplt_hdr_def_size);
goto exit_read_template_error;
}
addr = QLA8044_RESET_TEMPLATE_ADDR + vha->reset_tmplt.hdr->hdr_size;
p_buff = vha->reset_tmplt.buff + vha->reset_tmplt.hdr->hdr_size;
tmplt_hdr_def_size = (vha->reset_tmplt.hdr->size -
vha->reset_tmplt.hdr->hdr_size)/sizeof(uint32_t);
ql_dbg(ql_dbg_p3p, vha, 0xb0bc,
"%s: Read rest of the template size %d\n",
__func__, vha->reset_tmplt.hdr->size);
/* Copy rest of the template */
if (qla8044_read_flash_data(vha, p_buff, addr, tmplt_hdr_def_size)) {
ql_log(ql_log_fatal, vha, 0xb0bd,
"%s: Failed to read reset tempelate\n", __func__);
goto exit_read_template_error;
}
/* Integrity check */
if (qla8044_reset_seq_checksum_test(vha)) {
ql_log(ql_log_fatal, vha, 0xb0be,
"%s: Reset Seq checksum failed!\n", __func__);
goto exit_read_template_error;
}
ql_dbg(ql_dbg_p3p, vha, 0xb0bf,
"%s: Reset Seq checksum passed! Get stop, "
"start and init seq offsets\n", __func__);
/* Get STOP, START, INIT sequence offsets */
vha->reset_tmplt.init_offset = vha->reset_tmplt.buff +
vha->reset_tmplt.hdr->init_seq_offset;
vha->reset_tmplt.start_offset = vha->reset_tmplt.buff +
vha->reset_tmplt.hdr->start_seq_offset;
vha->reset_tmplt.stop_offset = vha->reset_tmplt.buff +
vha->reset_tmplt.hdr->hdr_size;
qla8044_dump_reset_seq_hdr(vha);
goto exit_read_reset_template;
exit_read_template_error:
vfree(vha->reset_tmplt.buff);
exit_read_reset_template:
return;
}
void
qla8044_set_idc_dontreset(struct scsi_qla_host *vha)
{
uint32_t idc_ctrl;
struct qla_hw_data *ha = vha->hw;
idc_ctrl = qla8044_rd_reg(ha, QLA8044_IDC_DRV_CTRL);
idc_ctrl |= DONTRESET_BIT0;
ql_dbg(ql_dbg_p3p, vha, 0xb0c0,
"%s: idc_ctrl = %d\n", __func__, idc_ctrl);
qla8044_wr_reg(ha, QLA8044_IDC_DRV_CTRL, idc_ctrl);
}
inline void
qla8044_set_rst_ready(struct scsi_qla_host *vha)
{
uint32_t drv_state;
struct qla_hw_data *ha = vha->hw;
drv_state = qla8044_rd_direct(vha, QLA8044_CRB_DRV_STATE_INDEX);
/* For ISP8044, drv_active register has 1 bit per function,
* shift 1 by func_num to set a bit for the function.*/
drv_state |= (1 << ha->portnum);
ql_log(ql_log_info, vha, 0xb0c1,
"%s(%ld): drv_state: 0x%08x\n",
__func__, vha->host_no, drv_state);
qla8044_wr_direct(vha, QLA8044_CRB_DRV_STATE_INDEX, drv_state);
}
/**
* qla8044_need_reset_handler - Code to start reset sequence
* @ha: pointer to adapter structure
*
* Note: IDC lock must be held upon entry
**/
static void
qla8044_need_reset_handler(struct scsi_qla_host *vha)
{
uint32_t dev_state = 0, drv_state, drv_active;
unsigned long reset_timeout;
struct qla_hw_data *ha = vha->hw;
ql_log(ql_log_fatal, vha, 0xb0c2,
"%s: Performing ISP error recovery\n", __func__);
if (vha->flags.online) {
qla8044_idc_unlock(ha);
qla2x00_abort_isp_cleanup(vha);
ha->isp_ops->get_flash_version(vha, vha->req->ring);
ha->isp_ops->nvram_config(vha);
qla8044_idc_lock(ha);
}
dev_state = qla8044_rd_direct(vha,
QLA8044_CRB_DEV_STATE_INDEX);
drv_state = qla8044_rd_direct(vha,
QLA8044_CRB_DRV_STATE_INDEX);
drv_active = qla8044_rd_direct(vha,
QLA8044_CRB_DRV_ACTIVE_INDEX);
ql_log(ql_log_info, vha, 0xb0c5,
"%s(%ld): drv_state = 0x%x, drv_active = 0x%x dev_state = 0x%x\n",
__func__, vha->host_no, drv_state, drv_active, dev_state);
qla8044_set_rst_ready(vha);
/* wait for 10 seconds for reset ack from all functions */
reset_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
do {
if (time_after_eq(jiffies, reset_timeout)) {
ql_log(ql_log_info, vha, 0xb0c4,
"%s: Function %d: Reset Ack Timeout!, drv_state: 0x%08x, drv_active: 0x%08x\n",
__func__, ha->portnum, drv_state, drv_active);
break;
}
qla8044_idc_unlock(ha);
msleep(1000);
qla8044_idc_lock(ha);
dev_state = qla8044_rd_direct(vha,
QLA8044_CRB_DEV_STATE_INDEX);
drv_state = qla8044_rd_direct(vha,
QLA8044_CRB_DRV_STATE_INDEX);
drv_active = qla8044_rd_direct(vha,
QLA8044_CRB_DRV_ACTIVE_INDEX);
} while (((drv_state & drv_active) != drv_active) &&
(dev_state == QLA8XXX_DEV_NEED_RESET));
/* Remove IDC participation of functions not acknowledging */
if (drv_state != drv_active) {
ql_log(ql_log_info, vha, 0xb0c7,
"%s(%ld): Function %d turning off drv_active of non-acking function 0x%x\n",
__func__, vha->host_no, ha->portnum,
(drv_active ^ drv_state));
drv_active = drv_active & drv_state;
qla8044_wr_direct(vha, QLA8044_CRB_DRV_ACTIVE_INDEX,
drv_active);
} else {
/*
* Reset owner should execute reset recovery,
* if all functions acknowledged
*/
if ((ha->flags.nic_core_reset_owner) &&
(dev_state == QLA8XXX_DEV_NEED_RESET)) {
ha->flags.nic_core_reset_owner = 0;
qla8044_device_bootstrap(vha);
return;
}
}
/* Exit if non active function */
if (!(drv_active & (1 << ha->portnum))) {
ha->flags.nic_core_reset_owner = 0;
return;
}
/*
* Execute Reset Recovery if Reset Owner or Function 7
* is the only active function
*/
if (ha->flags.nic_core_reset_owner ||
((drv_state & drv_active) == QLA8044_FUN7_ACTIVE_INDEX)) {
ha->flags.nic_core_reset_owner = 0;
qla8044_device_bootstrap(vha);
}
}
static void
qla8044_set_drv_active(struct scsi_qla_host *vha)
{
uint32_t drv_active;
struct qla_hw_data *ha = vha->hw;
drv_active = qla8044_rd_direct(vha, QLA8044_CRB_DRV_ACTIVE_INDEX);
/* For ISP8044, drv_active register has 1 bit per function,
* shift 1 by func_num to set a bit for the function.*/
drv_active |= (1 << ha->portnum);
ql_log(ql_log_info, vha, 0xb0c8,
"%s(%ld): drv_active: 0x%08x\n",
__func__, vha->host_no, drv_active);
qla8044_wr_direct(vha, QLA8044_CRB_DRV_ACTIVE_INDEX, drv_active);
}
static int
qla8044_check_drv_active(struct scsi_qla_host *vha)
{
uint32_t drv_active;
struct qla_hw_data *ha = vha->hw;
drv_active = qla8044_rd_direct(vha, QLA8044_CRB_DRV_ACTIVE_INDEX);
if (drv_active & (1 << ha->portnum))
return QLA_SUCCESS;
else
return QLA_TEST_FAILED;
}
static void
qla8044_clear_idc_dontreset(struct scsi_qla_host *vha)
{
uint32_t idc_ctrl;
struct qla_hw_data *ha = vha->hw;
idc_ctrl = qla8044_rd_reg(ha, QLA8044_IDC_DRV_CTRL);
idc_ctrl &= ~DONTRESET_BIT0;
ql_log(ql_log_info, vha, 0xb0c9,
"%s: idc_ctrl = %d\n", __func__,
idc_ctrl);
qla8044_wr_reg(ha, QLA8044_IDC_DRV_CTRL, idc_ctrl);
}
static int
qla8044_set_idc_ver(struct scsi_qla_host *vha)
{
int idc_ver;
uint32_t drv_active;
int rval = QLA_SUCCESS;
struct qla_hw_data *ha = vha->hw;
drv_active = qla8044_rd_direct(vha, QLA8044_CRB_DRV_ACTIVE_INDEX);
if (drv_active == (1 << ha->portnum)) {
idc_ver = qla8044_rd_direct(vha,
QLA8044_CRB_DRV_IDC_VERSION_INDEX);
idc_ver &= (~0xFF);
idc_ver |= QLA8044_IDC_VER_MAJ_VALUE;
qla8044_wr_direct(vha, QLA8044_CRB_DRV_IDC_VERSION_INDEX,
idc_ver);
ql_log(ql_log_info, vha, 0xb0ca,
"%s: IDC version updated to %d\n",
__func__, idc_ver);
} else {
idc_ver = qla8044_rd_direct(vha,
QLA8044_CRB_DRV_IDC_VERSION_INDEX);
idc_ver &= 0xFF;
if (QLA8044_IDC_VER_MAJ_VALUE != idc_ver) {
ql_log(ql_log_info, vha, 0xb0cb,
"%s: qla4xxx driver IDC version %d "
"is not compatible with IDC version %d "
"of other drivers!\n",
__func__, QLA8044_IDC_VER_MAJ_VALUE,
idc_ver);
rval = QLA_FUNCTION_FAILED;
goto exit_set_idc_ver;
}
}
/* Update IDC_MINOR_VERSION */
idc_ver = qla8044_rd_reg(ha, QLA8044_CRB_IDC_VER_MINOR);
idc_ver &= ~(0x03 << (ha->portnum * 2));
idc_ver |= (QLA8044_IDC_VER_MIN_VALUE << (ha->portnum * 2));
qla8044_wr_reg(ha, QLA8044_CRB_IDC_VER_MINOR, idc_ver);
exit_set_idc_ver:
return rval;
}
static int
qla8044_update_idc_reg(struct scsi_qla_host *vha)
{
uint32_t drv_active;
int rval = QLA_SUCCESS;
struct qla_hw_data *ha = vha->hw;
if (vha->flags.init_done)
goto exit_update_idc_reg;
qla8044_idc_lock(ha);
qla8044_set_drv_active(vha);
drv_active = qla8044_rd_direct(vha,
QLA8044_CRB_DRV_ACTIVE_INDEX);
/* If we are the first driver to load and
* ql2xdontresethba is not set, clear IDC_CTRL BIT0. */
if ((drv_active == (1 << ha->portnum)) && !ql2xdontresethba)
qla8044_clear_idc_dontreset(vha);
rval = qla8044_set_idc_ver(vha);
if (rval == QLA_FUNCTION_FAILED)
qla8044_clear_drv_active(ha);
qla8044_idc_unlock(ha);
exit_update_idc_reg:
return rval;
}
/**
* qla8044_need_qsnt_handler - Code to start qsnt
* @ha: pointer to adapter structure
**/
static void
qla8044_need_qsnt_handler(struct scsi_qla_host *vha)
{
unsigned long qsnt_timeout;
uint32_t drv_state, drv_active, dev_state;
struct qla_hw_data *ha = vha->hw;
if (vha->flags.online)
qla2x00_quiesce_io(vha);
else
return;
qla8044_set_qsnt_ready(vha);
/* Wait for 30 secs for all functions to ack qsnt mode */
qsnt_timeout = jiffies + (QSNT_ACK_TOV * HZ);
drv_state = qla8044_rd_direct(vha, QLA8044_CRB_DRV_STATE_INDEX);
drv_active = qla8044_rd_direct(vha, QLA8044_CRB_DRV_ACTIVE_INDEX);
/* Shift drv_active by 1 to match drv_state. As quiescent ready bit
position is at bit 1 and drv active is at bit 0 */
drv_active = drv_active << 1;
while (drv_state != drv_active) {
if (time_after_eq(jiffies, qsnt_timeout)) {
/* Other functions did not ack, changing state to
* DEV_READY
*/
clear_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags);
qla8044_wr_direct(vha, QLA8044_CRB_DEV_STATE_INDEX,
QLA8XXX_DEV_READY);
qla8044_clear_qsnt_ready(vha);
ql_log(ql_log_info, vha, 0xb0cc,
"Timeout waiting for quiescent ack!!!\n");
return;
}
qla8044_idc_unlock(ha);
msleep(1000);
qla8044_idc_lock(ha);
drv_state = qla8044_rd_direct(vha,
QLA8044_CRB_DRV_STATE_INDEX);
drv_active = qla8044_rd_direct(vha,
QLA8044_CRB_DRV_ACTIVE_INDEX);
drv_active = drv_active << 1;
}
/* All functions have Acked. Set quiescent state */
dev_state = qla8044_rd_direct(vha, QLA8044_CRB_DEV_STATE_INDEX);
if (dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
qla8044_wr_direct(vha, QLA8044_CRB_DEV_STATE_INDEX,
QLA8XXX_DEV_QUIESCENT);
ql_log(ql_log_info, vha, 0xb0cd,
"%s: HW State: QUIESCENT\n", __func__);
}
}
/*
* qla8044_device_state_handler - Adapter state machine
* @ha: pointer to host adapter structure.
*
* Note: IDC lock must be UNLOCKED upon entry
**/
int
qla8044_device_state_handler(struct scsi_qla_host *vha)
{
uint32_t dev_state;
int rval = QLA_SUCCESS;
unsigned long dev_init_timeout;
struct qla_hw_data *ha = vha->hw;
rval = qla8044_update_idc_reg(vha);
if (rval == QLA_FUNCTION_FAILED)
goto exit_error;
dev_state = qla8044_rd_direct(vha, QLA8044_CRB_DEV_STATE_INDEX);
ql_dbg(ql_dbg_p3p, vha, 0xb0ce,
"Device state is 0x%x = %s\n",
dev_state, dev_state < MAX_STATES ?
qdev_state(dev_state) : "Unknown");
/* wait for 30 seconds for device to go ready */
dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
qla8044_idc_lock(ha);
while (1) {
if (time_after_eq(jiffies, dev_init_timeout)) {
if (qla8044_check_drv_active(vha) == QLA_SUCCESS) {
ql_log(ql_log_warn, vha, 0xb0cf,
"%s: Device Init Failed 0x%x = %s\n",
QLA2XXX_DRIVER_NAME, dev_state,
dev_state < MAX_STATES ?
qdev_state(dev_state) : "Unknown");
qla8044_wr_direct(vha,
QLA8044_CRB_DEV_STATE_INDEX,
QLA8XXX_DEV_FAILED);
}
}
dev_state = qla8044_rd_direct(vha, QLA8044_CRB_DEV_STATE_INDEX);
ql_log(ql_log_info, vha, 0xb0d0,
"Device state is 0x%x = %s\n",
dev_state, dev_state < MAX_STATES ?
qdev_state(dev_state) : "Unknown");
/* NOTE: Make sure idc unlocked upon exit of switch statement */
switch (dev_state) {
case QLA8XXX_DEV_READY:
ha->flags.nic_core_reset_owner = 0;
goto exit;
case QLA8XXX_DEV_COLD:
rval = qla8044_device_bootstrap(vha);
break;
case QLA8XXX_DEV_INITIALIZING:
qla8044_idc_unlock(ha);
msleep(1000);
qla8044_idc_lock(ha);
break;
case QLA8XXX_DEV_NEED_RESET:
/* For ISP8044, if NEED_RESET is set by any driver,
* it should be honored, irrespective of IDC_CTRL
* DONTRESET_BIT0 */
qla8044_need_reset_handler(vha);
break;
case QLA8XXX_DEV_NEED_QUIESCENT:
/* idc locked/unlocked in handler */
qla8044_need_qsnt_handler(vha);
/* Reset the init timeout after qsnt handler */
dev_init_timeout = jiffies +
(ha->fcoe_reset_timeout * HZ);
break;
case QLA8XXX_DEV_QUIESCENT:
ql_log(ql_log_info, vha, 0xb0d1,
"HW State: QUIESCENT\n");
qla8044_idc_unlock(ha);
msleep(1000);
qla8044_idc_lock(ha);
/* Reset the init timeout after qsnt handler */
dev_init_timeout = jiffies +
(ha->fcoe_reset_timeout * HZ);
break;
case QLA8XXX_DEV_FAILED:
ha->flags.nic_core_reset_owner = 0;
qla8044_idc_unlock(ha);
qla8xxx_dev_failed_handler(vha);
rval = QLA_FUNCTION_FAILED;
qla8044_idc_lock(ha);
goto exit;
default:
qla8044_idc_unlock(ha);
qla8xxx_dev_failed_handler(vha);
rval = QLA_FUNCTION_FAILED;
qla8044_idc_lock(ha);
goto exit;
}
}
exit:
qla8044_idc_unlock(ha);
exit_error:
return rval;
}
/**
* qla4_8xxx_check_temp - Check the ISP82XX temperature.
* @ha: adapter block pointer.
*
* Note: The caller should not hold the idc lock.
**/
static int
qla8044_check_temp(struct scsi_qla_host *vha)
{
uint32_t temp, temp_state, temp_val;
int status = QLA_SUCCESS;
temp = qla8044_rd_direct(vha, QLA8044_CRB_TEMP_STATE_INDEX);
temp_state = qla82xx_get_temp_state(temp);
temp_val = qla82xx_get_temp_val(temp);
if (temp_state == QLA82XX_TEMP_PANIC) {
ql_log(ql_log_warn, vha, 0xb0d2,
"Device temperature %d degrees C"
" exceeds maximum allowed. Hardware has been shut"
" down\n", temp_val);
status = QLA_FUNCTION_FAILED;
return status;
} else if (temp_state == QLA82XX_TEMP_WARN) {
ql_log(ql_log_warn, vha, 0xb0d3,
"Device temperature %d"
" degrees C exceeds operating range."
" Immediate action needed.\n", temp_val);
}
return 0;
}
int qla8044_read_temperature(scsi_qla_host_t *vha)
{
uint32_t temp;
temp = qla8044_rd_direct(vha, QLA8044_CRB_TEMP_STATE_INDEX);
return qla82xx_get_temp_val(temp);
}
/**
* qla8044_check_fw_alive - Check firmware health
* @ha: Pointer to host adapter structure.
*
* Context: Interrupt
**/
int
qla8044_check_fw_alive(struct scsi_qla_host *vha)
{
uint32_t fw_heartbeat_counter;
uint32_t halt_status1, halt_status2;
int status = QLA_SUCCESS;
fw_heartbeat_counter = qla8044_rd_direct(vha,
QLA8044_PEG_ALIVE_COUNTER_INDEX);
/* If PEG_ALIVE_COUNTER is 0xffffffff, AER/EEH is in progress, ignore */
if (fw_heartbeat_counter == 0xffffffff) {
ql_dbg(ql_dbg_p3p, vha, 0xb0d4,
"scsi%ld: %s: Device in frozen "
"state, QLA82XX_PEG_ALIVE_COUNTER is 0xffffffff\n",
vha->host_no, __func__);
return status;
}
if (vha->fw_heartbeat_counter == fw_heartbeat_counter) {
vha->seconds_since_last_heartbeat++;
/* FW not alive after 2 seconds */
if (vha->seconds_since_last_heartbeat == 2) {
vha->seconds_since_last_heartbeat = 0;
halt_status1 = qla8044_rd_direct(vha,
QLA8044_PEG_HALT_STATUS1_INDEX);
halt_status2 = qla8044_rd_direct(vha,
QLA8044_PEG_HALT_STATUS2_INDEX);
ql_log(ql_log_info, vha, 0xb0d5,
"scsi(%ld): %s, ISP8044 "
"Dumping hw/fw registers:\n"
" PEG_HALT_STATUS1: 0x%x, "
"PEG_HALT_STATUS2: 0x%x,\n",
vha->host_no, __func__, halt_status1,
halt_status2);
status = QLA_FUNCTION_FAILED;
}
} else
vha->seconds_since_last_heartbeat = 0;
vha->fw_heartbeat_counter = fw_heartbeat_counter;
return status;
}
void
qla8044_watchdog(struct scsi_qla_host *vha)
{
uint32_t dev_state, halt_status;
int halt_status_unrecoverable = 0;
struct qla_hw_data *ha = vha->hw;
/* don't poll if reset is going on or FW hang in quiescent state */
if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) ||
test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))) {
dev_state = qla8044_rd_direct(vha, QLA8044_CRB_DEV_STATE_INDEX);
if (qla8044_check_fw_alive(vha)) {
ha->flags.isp82xx_fw_hung = 1;
ql_log(ql_log_warn, vha, 0xb10a,
"Firmware hung.\n");
qla82xx_clear_pending_mbx(vha);
}
if (qla8044_check_temp(vha)) {
set_bit(ISP_UNRECOVERABLE, &vha->dpc_flags);
ha->flags.isp82xx_fw_hung = 1;
qla2xxx_wake_dpc(vha);
} else if (dev_state == QLA8XXX_DEV_NEED_RESET &&
!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) {
ql_log(ql_log_info, vha, 0xb0d6,
"%s: HW State: NEED RESET!\n",
__func__);
set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
qla2xxx_wake_dpc(vha);
} else if (dev_state == QLA8XXX_DEV_NEED_QUIESCENT &&
!test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags)) {
ql_log(ql_log_info, vha, 0xb0d7,
"%s: HW State: NEED QUIES detected!\n",
__func__);
set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags);
qla2xxx_wake_dpc(vha);
} else {
/* Check firmware health */
if (ha->flags.isp82xx_fw_hung) {
halt_status = qla8044_rd_direct(vha,
QLA8044_PEG_HALT_STATUS1_INDEX);
if (halt_status &
QLA8044_HALT_STATUS_FW_RESET) {
ql_log(ql_log_fatal, vha,
0xb0d8, "%s: Firmware "
"error detected device "
"is being reset\n",
__func__);
} else if (halt_status &
QLA8044_HALT_STATUS_UNRECOVERABLE) {
halt_status_unrecoverable = 1;
}
/* Since we cannot change dev_state in interrupt
* context, set appropriate DPC flag then wakeup
* DPC */
if (halt_status_unrecoverable) {
set_bit(ISP_UNRECOVERABLE,
&vha->dpc_flags);
} else {
if (dev_state ==
QLA8XXX_DEV_QUIESCENT) {
set_bit(FCOE_CTX_RESET_NEEDED,
&vha->dpc_flags);
ql_log(ql_log_info, vha, 0xb0d9,
"%s: FW CONTEXT Reset "
"needed!\n", __func__);
} else {
ql_log(ql_log_info, vha,
0xb0da, "%s: "
"detect abort needed\n",
__func__);
set_bit(ISP_ABORT_NEEDED,
&vha->dpc_flags);
}
}
qla2xxx_wake_dpc(vha);
}
}
}
}
static int
qla8044_minidump_process_control(struct scsi_qla_host *vha,
struct qla8044_minidump_entry_hdr *entry_hdr)
{
struct qla8044_minidump_entry_crb *crb_entry;
uint32_t read_value, opcode, poll_time, addr, index;
uint32_t crb_addr, rval = QLA_SUCCESS;
unsigned long wtime;
struct qla8044_minidump_template_hdr *tmplt_hdr;
int i;
struct qla_hw_data *ha = vha->hw;
ql_dbg(ql_dbg_p3p, vha, 0xb0dd, "Entering fn: %s\n", __func__);
tmplt_hdr = (struct qla8044_minidump_template_hdr *)
ha->md_tmplt_hdr;
crb_entry = (struct qla8044_minidump_entry_crb *)entry_hdr;
crb_addr = crb_entry->addr;
for (i = 0; i < crb_entry->op_count; i++) {
opcode = crb_entry->crb_ctrl.opcode;
if (opcode & QLA82XX_DBG_OPCODE_WR) {
qla8044_wr_reg_indirect(vha, crb_addr,
crb_entry->value_1);
opcode &= ~QLA82XX_DBG_OPCODE_WR;
}
if (opcode & QLA82XX_DBG_OPCODE_RW) {
qla8044_rd_reg_indirect(vha, crb_addr, &read_value);
qla8044_wr_reg_indirect(vha, crb_addr, read_value);
opcode &= ~QLA82XX_DBG_OPCODE_RW;
}
if (opcode & QLA82XX_DBG_OPCODE_AND) {
qla8044_rd_reg_indirect(vha, crb_addr, &read_value);
read_value &= crb_entry->value_2;
opcode &= ~QLA82XX_DBG_OPCODE_AND;
if (opcode & QLA82XX_DBG_OPCODE_OR) {
read_value |= crb_entry->value_3;
opcode &= ~QLA82XX_DBG_OPCODE_OR;
}
qla8044_wr_reg_indirect(vha, crb_addr, read_value);
}
if (opcode & QLA82XX_DBG_OPCODE_OR) {
qla8044_rd_reg_indirect(vha, crb_addr, &read_value);
read_value |= crb_entry->value_3;
qla8044_wr_reg_indirect(vha, crb_addr, read_value);
opcode &= ~QLA82XX_DBG_OPCODE_OR;
}
if (opcode & QLA82XX_DBG_OPCODE_POLL) {
poll_time = crb_entry->crb_strd.poll_timeout;
wtime = jiffies + poll_time;
qla8044_rd_reg_indirect(vha, crb_addr, &read_value);
do {
if ((read_value & crb_entry->value_2) ==
crb_entry->value_1) {
break;
} else if (time_after_eq(jiffies, wtime)) {
/* capturing dump failed */
rval = QLA_FUNCTION_FAILED;
break;
} else {
qla8044_rd_reg_indirect(vha,
crb_addr, &read_value);
}
} while (1);
opcode &= ~QLA82XX_DBG_OPCODE_POLL;
}
if (opcode & QLA82XX_DBG_OPCODE_RDSTATE) {
if (crb_entry->crb_strd.state_index_a) {
index = crb_entry->crb_strd.state_index_a;
addr = tmplt_hdr->saved_state_array[index];
} else {
addr = crb_addr;
}
qla8044_rd_reg_indirect(vha, addr, &read_value);
index = crb_entry->crb_ctrl.state_index_v;
tmplt_hdr->saved_state_array[index] = read_value;
opcode &= ~QLA82XX_DBG_OPCODE_RDSTATE;
}
if (opcode & QLA82XX_DBG_OPCODE_WRSTATE) {
if (crb_entry->crb_strd.state_index_a) {
index = crb_entry->crb_strd.state_index_a;
addr = tmplt_hdr->saved_state_array[index];
} else {
addr = crb_addr;
}
if (crb_entry->crb_ctrl.state_index_v) {
index = crb_entry->crb_ctrl.state_index_v;
read_value =
tmplt_hdr->saved_state_array[index];
} else {
read_value = crb_entry->value_1;
}
qla8044_wr_reg_indirect(vha, addr, read_value);
opcode &= ~QLA82XX_DBG_OPCODE_WRSTATE;
}
if (opcode & QLA82XX_DBG_OPCODE_MDSTATE) {
index = crb_entry->crb_ctrl.state_index_v;
read_value = tmplt_hdr->saved_state_array[index];
read_value <<= crb_entry->crb_ctrl.shl;
read_value >>= crb_entry->crb_ctrl.shr;
if (crb_entry->value_2)
read_value &= crb_entry->value_2;
read_value |= crb_entry->value_3;
read_value += crb_entry->value_1;
tmplt_hdr->saved_state_array[index] = read_value;
opcode &= ~QLA82XX_DBG_OPCODE_MDSTATE;
}
crb_addr += crb_entry->crb_strd.addr_stride;
}
return rval;
}
static void
qla8044_minidump_process_rdcrb(struct scsi_qla_host *vha,
struct qla8044_minidump_entry_hdr *entry_hdr, uint32_t **d_ptr)
{
uint32_t r_addr, r_stride, loop_cnt, i, r_value;
struct qla8044_minidump_entry_crb *crb_hdr;
uint32_t *data_ptr = *d_ptr;
ql_dbg(ql_dbg_p3p, vha, 0xb0de, "Entering fn: %s\n", __func__);
crb_hdr = (struct qla8044_minidump_entry_crb *)entry_hdr;
r_addr = crb_hdr->addr;
r_stride = crb_hdr->crb_strd.addr_stride;
loop_cnt = crb_hdr->op_count;
for (i = 0; i < loop_cnt; i++) {
qla8044_rd_reg_indirect(vha, r_addr, &r_value);
*data_ptr++ = r_addr;
*data_ptr++ = r_value;
r_addr += r_stride;
}
*d_ptr = data_ptr;
}
static int
qla8044_minidump_process_rdmem(struct scsi_qla_host *vha,
struct qla8044_minidump_entry_hdr *entry_hdr, uint32_t **d_ptr)
{
uint32_t r_addr, r_value, r_data;
uint32_t i, j, loop_cnt;
struct qla8044_minidump_entry_rdmem *m_hdr;
unsigned long flags;
uint32_t *data_ptr = *d_ptr;
struct qla_hw_data *ha = vha->hw;
ql_dbg(ql_dbg_p3p, vha, 0xb0df, "Entering fn: %s\n", __func__);
m_hdr = (struct qla8044_minidump_entry_rdmem *)entry_hdr;
r_addr = m_hdr->read_addr;
loop_cnt = m_hdr->read_data_size/16;
ql_dbg(ql_dbg_p3p, vha, 0xb0f0,
"[%s]: Read addr: 0x%x, read_data_size: 0x%x\n",
__func__, r_addr, m_hdr->read_data_size);
if (r_addr & 0xf) {
ql_dbg(ql_dbg_p3p, vha, 0xb0f1,
"[%s]: Read addr 0x%x not 16 bytes aligned\n",
__func__, r_addr);
return QLA_FUNCTION_FAILED;
}
if (m_hdr->read_data_size % 16) {
ql_dbg(ql_dbg_p3p, vha, 0xb0f2,
"[%s]: Read data[0x%x] not multiple of 16 bytes\n",
__func__, m_hdr->read_data_size);
return QLA_FUNCTION_FAILED;
}
ql_dbg(ql_dbg_p3p, vha, 0xb0f3,
"[%s]: rdmem_addr: 0x%x, read_data_size: 0x%x, loop_cnt: 0x%x\n",
__func__, r_addr, m_hdr->read_data_size, loop_cnt);
write_lock_irqsave(&ha->hw_lock, flags);
for (i = 0; i < loop_cnt; i++) {
qla8044_wr_reg_indirect(vha, MD_MIU_TEST_AGT_ADDR_LO, r_addr);
r_value = 0;
qla8044_wr_reg_indirect(vha, MD_MIU_TEST_AGT_ADDR_HI, r_value);
r_value = MIU_TA_CTL_ENABLE;
qla8044_wr_reg_indirect(vha, MD_MIU_TEST_AGT_CTRL, r_value);
r_value = MIU_TA_CTL_START_ENABLE;
qla8044_wr_reg_indirect(vha, MD_MIU_TEST_AGT_CTRL, r_value);
for (j = 0; j < MAX_CTL_CHECK; j++) {
qla8044_rd_reg_indirect(vha, MD_MIU_TEST_AGT_CTRL,
&r_value);
if ((r_value & MIU_TA_CTL_BUSY) == 0)
break;
}
if (j >= MAX_CTL_CHECK) {
write_unlock_irqrestore(&ha->hw_lock, flags);
return QLA_SUCCESS;
}
for (j = 0; j < 4; j++) {
qla8044_rd_reg_indirect(vha, MD_MIU_TEST_AGT_RDDATA[j],
&r_data);
*data_ptr++ = r_data;
}
r_addr += 16;
}
write_unlock_irqrestore(&ha->hw_lock, flags);
ql_dbg(ql_dbg_p3p, vha, 0xb0f4,
"Leaving fn: %s datacount: 0x%x\n",
__func__, (loop_cnt * 16));
*d_ptr = data_ptr;
return QLA_SUCCESS;
}
/* ISP83xx flash read for _RDROM _BOARD */
static uint32_t
qla8044_minidump_process_rdrom(struct scsi_qla_host *vha,
struct qla8044_minidump_entry_hdr *entry_hdr, uint32_t **d_ptr)
{
uint32_t fl_addr, u32_count, rval;
struct qla8044_minidump_entry_rdrom *rom_hdr;
uint32_t *data_ptr = *d_ptr;
rom_hdr = (struct qla8044_minidump_entry_rdrom *)entry_hdr;
fl_addr = rom_hdr->read_addr;
u32_count = (rom_hdr->read_data_size)/sizeof(uint32_t);
ql_dbg(ql_dbg_p3p, vha, 0xb0f5, "[%s]: fl_addr: 0x%x, count: 0x%x\n",
__func__, fl_addr, u32_count);
rval = qla8044_lockless_flash_read_u32(vha, fl_addr,
(u8 *)(data_ptr), u32_count);
if (rval != QLA_SUCCESS) {
ql_log(ql_log_fatal, vha, 0xb0f6,
"%s: Flash Read Error,Count=%d\n", __func__, u32_count);
return QLA_FUNCTION_FAILED;
} else {
data_ptr += u32_count;
*d_ptr = data_ptr;
return QLA_SUCCESS;
}
}
static void
qla8044_mark_entry_skipped(struct scsi_qla_host *vha,
struct qla8044_minidump_entry_hdr *entry_hdr, int index)
{
entry_hdr->d_ctrl.driver_flags |= QLA82XX_DBG_SKIPPED_FLAG;
ql_log(ql_log_info, vha, 0xb0f7,
"scsi(%ld): Skipping entry[%d]: ETYPE[0x%x]-ELEVEL[0x%x]\n",
vha->host_no, index, entry_hdr->entry_type,
entry_hdr->d_ctrl.entry_capture_mask);
}
static int
qla8044_minidump_process_l2tag(struct scsi_qla_host *vha,
struct qla8044_minidump_entry_hdr *entry_hdr,
uint32_t **d_ptr)
{
uint32_t addr, r_addr, c_addr, t_r_addr;
uint32_t i, k, loop_count, t_value, r_cnt, r_value;
unsigned long p_wait, w_time, p_mask;
uint32_t c_value_w, c_value_r;
struct qla8044_minidump_entry_cache *cache_hdr;
int rval = QLA_FUNCTION_FAILED;
uint32_t *data_ptr = *d_ptr;
ql_dbg(ql_dbg_p3p, vha, 0xb0f8, "Entering fn: %s\n", __func__);
cache_hdr = (struct qla8044_minidump_entry_cache *)entry_hdr;
loop_count = cache_hdr->op_count;
r_addr = cache_hdr->read_addr;
c_addr = cache_hdr->control_addr;
c_value_w = cache_hdr->cache_ctrl.write_value;
t_r_addr = cache_hdr->tag_reg_addr;
t_value = cache_hdr->addr_ctrl.init_tag_value;
r_cnt = cache_hdr->read_ctrl.read_addr_cnt;
p_wait = cache_hdr->cache_ctrl.poll_wait;
p_mask = cache_hdr->cache_ctrl.poll_mask;
for (i = 0; i < loop_count; i++) {
qla8044_wr_reg_indirect(vha, t_r_addr, t_value);
if (c_value_w)
qla8044_wr_reg_indirect(vha, c_addr, c_value_w);
if (p_mask) {
w_time = jiffies + p_wait;
do {
qla8044_rd_reg_indirect(vha, c_addr,
&c_value_r);
if ((c_value_r & p_mask) == 0) {
break;
} else if (time_after_eq(jiffies, w_time)) {
/* capturing dump failed */
return rval;
}
} while (1);
}
addr = r_addr;
for (k = 0; k < r_cnt; k++) {
qla8044_rd_reg_indirect(vha, addr, &r_value);
*data_ptr++ = r_value;
addr += cache_hdr->read_ctrl.read_addr_stride;
}
t_value += cache_hdr->addr_ctrl.tag_value_stride;
}
*d_ptr = data_ptr;
return QLA_SUCCESS;
}
static void
qla8044_minidump_process_l1cache(struct scsi_qla_host *vha,
struct qla8044_minidump_entry_hdr *entry_hdr, uint32_t **d_ptr)
{
uint32_t addr, r_addr, c_addr, t_r_addr;
uint32_t i, k, loop_count, t_value, r_cnt, r_value;
uint32_t c_value_w;
struct qla8044_minidump_entry_cache *cache_hdr;
uint32_t *data_ptr = *d_ptr;
cache_hdr = (struct qla8044_minidump_entry_cache *)entry_hdr;
loop_count = cache_hdr->op_count;
r_addr = cache_hdr->read_addr;
c_addr = cache_hdr->control_addr;
c_value_w = cache_hdr->cache_ctrl.write_value;
t_r_addr = cache_hdr->tag_reg_addr;
t_value = cache_hdr->addr_ctrl.init_tag_value;
r_cnt = cache_hdr->read_ctrl.read_addr_cnt;
for (i = 0; i < loop_count; i++) {
qla8044_wr_reg_indirect(vha, t_r_addr, t_value);
qla8044_wr_reg_indirect(vha, c_addr, c_value_w);
addr = r_addr;
for (k = 0; k < r_cnt; k++) {
qla8044_rd_reg_indirect(vha, addr, &r_value);
*data_ptr++ = r_value;
addr += cache_hdr->read_ctrl.read_addr_stride;
}
t_value += cache_hdr->addr_ctrl.tag_value_stride;
}
*d_ptr = data_ptr;
}
static void
qla8044_minidump_process_rdocm(struct scsi_qla_host *vha,
struct qla8044_minidump_entry_hdr *entry_hdr, uint32_t **d_ptr)
{
uint32_t r_addr, r_stride, loop_cnt, i, r_value;
struct qla8044_minidump_entry_rdocm *ocm_hdr;
uint32_t *data_ptr = *d_ptr;
struct qla_hw_data *ha = vha->hw;
ql_dbg(ql_dbg_p3p, vha, 0xb0f9, "Entering fn: %s\n", __func__);
ocm_hdr = (struct qla8044_minidump_entry_rdocm *)entry_hdr;
r_addr = ocm_hdr->read_addr;
r_stride = ocm_hdr->read_addr_stride;
loop_cnt = ocm_hdr->op_count;
ql_dbg(ql_dbg_p3p, vha, 0xb0fa,
"[%s]: r_addr: 0x%x, r_stride: 0x%x, loop_cnt: 0x%x\n",
__func__, r_addr, r_stride, loop_cnt);
for (i = 0; i < loop_cnt; i++) {
r_value = readl((void __iomem *)(r_addr + ha->nx_pcibase));
*data_ptr++ = r_value;
r_addr += r_stride;
}
ql_dbg(ql_dbg_p3p, vha, 0xb0fb, "Leaving fn: %s datacount: 0x%lx\n",
__func__, (long unsigned int) (loop_cnt * sizeof(uint32_t)));
*d_ptr = data_ptr;
}
static void
qla8044_minidump_process_rdmux(struct scsi_qla_host *vha,
struct qla8044_minidump_entry_hdr *entry_hdr,
uint32_t **d_ptr)
{
uint32_t r_addr, s_stride, s_addr, s_value, loop_cnt, i, r_value;
struct qla8044_minidump_entry_mux *mux_hdr;
uint32_t *data_ptr = *d_ptr;
ql_dbg(ql_dbg_p3p, vha, 0xb0fc, "Entering fn: %s\n", __func__);
mux_hdr = (struct qla8044_minidump_entry_mux *)entry_hdr;
r_addr = mux_hdr->read_addr;
s_addr = mux_hdr->select_addr;
s_stride = mux_hdr->select_value_stride;
s_value = mux_hdr->select_value;
loop_cnt = mux_hdr->op_count;
for (i = 0; i < loop_cnt; i++) {
qla8044_wr_reg_indirect(vha, s_addr, s_value);
qla8044_rd_reg_indirect(vha, r_addr, &r_value);
*data_ptr++ = s_value;
*data_ptr++ = r_value;
s_value += s_stride;
}
*d_ptr = data_ptr;
}
static void
qla8044_minidump_process_queue(struct scsi_qla_host *vha,
struct qla8044_minidump_entry_hdr *entry_hdr,
uint32_t **d_ptr)
{
uint32_t s_addr, r_addr;
uint32_t r_stride, r_value, r_cnt, qid = 0;
uint32_t i, k, loop_cnt;
struct qla8044_minidump_entry_queue *q_hdr;
uint32_t *data_ptr = *d_ptr;
ql_dbg(ql_dbg_p3p, vha, 0xb0fd, "Entering fn: %s\n", __func__);
q_hdr = (struct qla8044_minidump_entry_queue *)entry_hdr;
s_addr = q_hdr->select_addr;
r_cnt = q_hdr->rd_strd.read_addr_cnt;
r_stride = q_hdr->rd_strd.read_addr_stride;
loop_cnt = q_hdr->op_count;
for (i = 0; i < loop_cnt; i++) {
qla8044_wr_reg_indirect(vha, s_addr, qid);
r_addr = q_hdr->read_addr;
for (k = 0; k < r_cnt; k++) {
qla8044_rd_reg_indirect(vha, r_addr, &r_value);
*data_ptr++ = r_value;
r_addr += r_stride;
}
qid += q_hdr->q_strd.queue_id_stride;
}
*d_ptr = data_ptr;
}
/* ISP83xx functions to process new minidump entries... */
static uint32_t
qla8044_minidump_process_pollrd(struct scsi_qla_host *vha,
struct qla8044_minidump_entry_hdr *entry_hdr,
uint32_t **d_ptr)
{
uint32_t r_addr, s_addr, s_value, r_value, poll_wait, poll_mask;
uint16_t s_stride, i;
struct qla8044_minidump_entry_pollrd *pollrd_hdr;
uint32_t *data_ptr = *d_ptr;
pollrd_hdr = (struct qla8044_minidump_entry_pollrd *) entry_hdr;
s_addr = pollrd_hdr->select_addr;
r_addr = pollrd_hdr->read_addr;
s_value = pollrd_hdr->select_value;
s_stride = pollrd_hdr->select_value_stride;
poll_wait = pollrd_hdr->poll_wait;
poll_mask = pollrd_hdr->poll_mask;
for (i = 0; i < pollrd_hdr->op_count; i++) {
qla8044_wr_reg_indirect(vha, s_addr, s_value);
poll_wait = pollrd_hdr->poll_wait;
while (1) {
qla8044_rd_reg_indirect(vha, s_addr, &r_value);
if ((r_value & poll_mask) != 0) {
break;
} else {
usleep_range(1000, 1100);
if (--poll_wait == 0) {
ql_log(ql_log_fatal, vha, 0xb0fe,
"%s: TIMEOUT\n", __func__);
goto error;
}
}
}
qla8044_rd_reg_indirect(vha, r_addr, &r_value);
*data_ptr++ = s_value;
*data_ptr++ = r_value;
s_value += s_stride;
}
*d_ptr = data_ptr;
return QLA_SUCCESS;
error:
return QLA_FUNCTION_FAILED;
}
static void
qla8044_minidump_process_rdmux2(struct scsi_qla_host *vha,
struct qla8044_minidump_entry_hdr *entry_hdr, uint32_t **d_ptr)
{
uint32_t sel_val1, sel_val2, t_sel_val, data, i;
uint32_t sel_addr1, sel_addr2, sel_val_mask, read_addr;
struct qla8044_minidump_entry_rdmux2 *rdmux2_hdr;
uint32_t *data_ptr = *d_ptr;
rdmux2_hdr = (struct qla8044_minidump_entry_rdmux2 *) entry_hdr;
sel_val1 = rdmux2_hdr->select_value_1;
sel_val2 = rdmux2_hdr->select_value_2;
sel_addr1 = rdmux2_hdr->select_addr_1;
sel_addr2 = rdmux2_hdr->select_addr_2;
sel_val_mask = rdmux2_hdr->select_value_mask;
read_addr = rdmux2_hdr->read_addr;
for (i = 0; i < rdmux2_hdr->op_count; i++) {
qla8044_wr_reg_indirect(vha, sel_addr1, sel_val1);
t_sel_val = sel_val1 & sel_val_mask;
*data_ptr++ = t_sel_val;
qla8044_wr_reg_indirect(vha, sel_addr2, t_sel_val);
qla8044_rd_reg_indirect(vha, read_addr, &data);
*data_ptr++ = data;
qla8044_wr_reg_indirect(vha, sel_addr1, sel_val2);
t_sel_val = sel_val2 & sel_val_mask;
*data_ptr++ = t_sel_val;
qla8044_wr_reg_indirect(vha, sel_addr2, t_sel_val);
qla8044_rd_reg_indirect(vha, read_addr, &data);
*data_ptr++ = data;
sel_val1 += rdmux2_hdr->select_value_stride;
sel_val2 += rdmux2_hdr->select_value_stride;
}
*d_ptr = data_ptr;
}
static uint32_t
qla8044_minidump_process_pollrdmwr(struct scsi_qla_host *vha,
struct qla8044_minidump_entry_hdr *entry_hdr,
uint32_t **d_ptr)
{
uint32_t poll_wait, poll_mask, r_value, data;
uint32_t addr_1, addr_2, value_1, value_2;
struct qla8044_minidump_entry_pollrdmwr *poll_hdr;
uint32_t *data_ptr = *d_ptr;
poll_hdr = (struct qla8044_minidump_entry_pollrdmwr *) entry_hdr;
addr_1 = poll_hdr->addr_1;
addr_2 = poll_hdr->addr_2;
value_1 = poll_hdr->value_1;
value_2 = poll_hdr->value_2;
poll_mask = poll_hdr->poll_mask;
qla8044_wr_reg_indirect(vha, addr_1, value_1);
poll_wait = poll_hdr->poll_wait;
while (1) {
qla8044_rd_reg_indirect(vha, addr_1, &r_value);
if ((r_value & poll_mask) != 0) {
break;
} else {
usleep_range(1000, 1100);
if (--poll_wait == 0) {
ql_log(ql_log_fatal, vha, 0xb0ff,
"%s: TIMEOUT\n", __func__);
goto error;
}
}
}
qla8044_rd_reg_indirect(vha, addr_2, &data);
data &= poll_hdr->modify_mask;
qla8044_wr_reg_indirect(vha, addr_2, data);
qla8044_wr_reg_indirect(vha, addr_1, value_2);
poll_wait = poll_hdr->poll_wait;
while (1) {
qla8044_rd_reg_indirect(vha, addr_1, &r_value);
if ((r_value & poll_mask) != 0) {
break;
} else {
usleep_range(1000, 1100);
if (--poll_wait == 0) {
ql_log(ql_log_fatal, vha, 0xb100,
"%s: TIMEOUT2\n", __func__);
goto error;
}
}
}
*data_ptr++ = addr_2;
*data_ptr++ = data;
*d_ptr = data_ptr;
return QLA_SUCCESS;
error:
return QLA_FUNCTION_FAILED;
}
#define ISP8044_PEX_DMA_ENGINE_INDEX 8
#define ISP8044_PEX_DMA_BASE_ADDRESS 0x77320000
#define ISP8044_PEX_DMA_NUM_OFFSET 0x10000
#define ISP8044_PEX_DMA_CMD_ADDR_LOW 0x0
#define ISP8044_PEX_DMA_CMD_ADDR_HIGH 0x04
#define ISP8044_PEX_DMA_CMD_STS_AND_CNTRL 0x08
#define ISP8044_PEX_DMA_READ_SIZE (16 * 1024)
#define ISP8044_PEX_DMA_MAX_WAIT (100 * 100) /* Max wait of 100 msecs */
static int
qla8044_check_dma_engine_state(struct scsi_qla_host *vha)
{
struct qla_hw_data *ha = vha->hw;
int rval = QLA_SUCCESS;
uint32_t dma_eng_num = 0, cmd_sts_and_cntrl = 0;
uint64_t dma_base_addr = 0;
struct qla8044_minidump_template_hdr *tmplt_hdr = NULL;
tmplt_hdr = ha->md_tmplt_hdr;
dma_eng_num =
tmplt_hdr->saved_state_array[ISP8044_PEX_DMA_ENGINE_INDEX];
dma_base_addr = ISP8044_PEX_DMA_BASE_ADDRESS +
(dma_eng_num * ISP8044_PEX_DMA_NUM_OFFSET);
/* Read the pex-dma's command-status-and-control register. */
rval = qla8044_rd_reg_indirect(vha,
(dma_base_addr + ISP8044_PEX_DMA_CMD_STS_AND_CNTRL),
&cmd_sts_and_cntrl);
if (rval)
return QLA_FUNCTION_FAILED;
/* Check if requested pex-dma engine is available. */
if (cmd_sts_and_cntrl & BIT_31)
return QLA_SUCCESS;
return QLA_FUNCTION_FAILED;
}
static int
qla8044_start_pex_dma(struct scsi_qla_host *vha,
struct qla8044_minidump_entry_rdmem_pex_dma *m_hdr)
{
struct qla_hw_data *ha = vha->hw;
int rval = QLA_SUCCESS, wait = 0;
uint32_t dma_eng_num = 0, cmd_sts_and_cntrl = 0;
uint64_t dma_base_addr = 0;
struct qla8044_minidump_template_hdr *tmplt_hdr = NULL;
tmplt_hdr = ha->md_tmplt_hdr;
dma_eng_num =
tmplt_hdr->saved_state_array[ISP8044_PEX_DMA_ENGINE_INDEX];
dma_base_addr = ISP8044_PEX_DMA_BASE_ADDRESS +
(dma_eng_num * ISP8044_PEX_DMA_NUM_OFFSET);
rval = qla8044_wr_reg_indirect(vha,
dma_base_addr + ISP8044_PEX_DMA_CMD_ADDR_LOW,
m_hdr->desc_card_addr);
if (rval)
goto error_exit;
rval = qla8044_wr_reg_indirect(vha,
dma_base_addr + ISP8044_PEX_DMA_CMD_ADDR_HIGH, 0);
if (rval)
goto error_exit;
rval = qla8044_wr_reg_indirect(vha,
dma_base_addr + ISP8044_PEX_DMA_CMD_STS_AND_CNTRL,
m_hdr->start_dma_cmd);
if (rval)
goto error_exit;
/* Wait for dma operation to complete. */
for (wait = 0; wait < ISP8044_PEX_DMA_MAX_WAIT; wait++) {
rval = qla8044_rd_reg_indirect(vha,
(dma_base_addr + ISP8044_PEX_DMA_CMD_STS_AND_CNTRL),
&cmd_sts_and_cntrl);
if (rval)
goto error_exit;
if ((cmd_sts_and_cntrl & BIT_1) == 0)
break;
udelay(10);
}
/* Wait a max of 100 ms, otherwise fallback to rdmem entry read */
if (wait >= ISP8044_PEX_DMA_MAX_WAIT) {
rval = QLA_FUNCTION_FAILED;
goto error_exit;
}
error_exit:
return rval;
}
static int
qla8044_minidump_pex_dma_read(struct scsi_qla_host *vha,
struct qla8044_minidump_entry_hdr *entry_hdr, uint32_t **d_ptr)
{
struct qla_hw_data *ha = vha->hw;
int rval = QLA_SUCCESS;
struct qla8044_minidump_entry_rdmem_pex_dma *m_hdr = NULL;
uint32_t chunk_size, read_size;
uint8_t *data_ptr = (uint8_t *)*d_ptr;
void *rdmem_buffer = NULL;
dma_addr_t rdmem_dma;
struct qla8044_pex_dma_descriptor dma_desc;
rval = qla8044_check_dma_engine_state(vha);
if (rval != QLA_SUCCESS) {
ql_dbg(ql_dbg_p3p, vha, 0xb147,
"DMA engine not available. Fallback to rdmem-read.\n");
return QLA_FUNCTION_FAILED;
}
m_hdr = (void *)entry_hdr;
rdmem_buffer = dma_alloc_coherent(&ha->pdev->dev,
ISP8044_PEX_DMA_READ_SIZE, &rdmem_dma, GFP_KERNEL);
if (!rdmem_buffer) {
ql_dbg(ql_dbg_p3p, vha, 0xb148,
"Unable to allocate rdmem dma buffer\n");
return QLA_FUNCTION_FAILED;
}
/* Prepare pex-dma descriptor to be written to MS memory. */
/* dma-desc-cmd layout:
* 0-3: dma-desc-cmd 0-3
* 4-7: pcid function number
* 8-15: dma-desc-cmd 8-15
* dma_bus_addr: dma buffer address
* cmd.read_data_size: amount of data-chunk to be read.
*/
dma_desc.cmd.dma_desc_cmd = (m_hdr->dma_desc_cmd & 0xff0f);
dma_desc.cmd.dma_desc_cmd |=
((PCI_FUNC(ha->pdev->devfn) & 0xf) << 0x4);
dma_desc.dma_bus_addr = rdmem_dma;
dma_desc.cmd.read_data_size = chunk_size = ISP8044_PEX_DMA_READ_SIZE;
read_size = 0;
/*
* Perform rdmem operation using pex-dma.
* Prepare dma in chunks of ISP8044_PEX_DMA_READ_SIZE.
*/
while (read_size < m_hdr->read_data_size) {
if (m_hdr->read_data_size - read_size <
ISP8044_PEX_DMA_READ_SIZE) {
chunk_size = (m_hdr->read_data_size - read_size);
dma_desc.cmd.read_data_size = chunk_size;
}
dma_desc.src_addr = m_hdr->read_addr + read_size;
/* Prepare: Write pex-dma descriptor to MS memory. */
rval = qla8044_ms_mem_write_128b(vha,
m_hdr->desc_card_addr, (void *)&dma_desc,
(sizeof(struct qla8044_pex_dma_descriptor)/16));
if (rval) {
ql_log(ql_log_warn, vha, 0xb14a,
"%s: Error writing rdmem-dma-init to MS !!!\n",
__func__);
goto error_exit;
}
ql_dbg(ql_dbg_p3p, vha, 0xb14b,
"%s: Dma-descriptor: Instruct for rdmem dma "
"(chunk_size 0x%x).\n", __func__, chunk_size);
/* Execute: Start pex-dma operation. */
rval = qla8044_start_pex_dma(vha, m_hdr);
if (rval)
goto error_exit;
memcpy(data_ptr, rdmem_buffer, chunk_size);
data_ptr += chunk_size;
read_size += chunk_size;
}
*d_ptr = (void *)data_ptr;
error_exit:
if (rdmem_buffer)
dma_free_coherent(&ha->pdev->dev, ISP8044_PEX_DMA_READ_SIZE,
rdmem_buffer, rdmem_dma);
return rval;
}
static uint32_t
qla8044_minidump_process_rddfe(struct scsi_qla_host *vha,
struct qla8044_minidump_entry_hdr *entry_hdr, uint32_t **d_ptr)
{
int loop_cnt;
uint32_t addr1, addr2, value, data, temp, wrVal;
uint8_t stride, stride2;
uint16_t count;
uint32_t poll, mask, data_size, modify_mask;
uint32_t wait_count = 0;
uint32_t *data_ptr = *d_ptr;
struct qla8044_minidump_entry_rddfe *rddfe;
rddfe = (struct qla8044_minidump_entry_rddfe *) entry_hdr;
addr1 = rddfe->addr_1;
value = rddfe->value;
stride = rddfe->stride;
stride2 = rddfe->stride2;
count = rddfe->count;
poll = rddfe->poll;
mask = rddfe->mask;
modify_mask = rddfe->modify_mask;
data_size = rddfe->data_size;
addr2 = addr1 + stride;
for (loop_cnt = 0x0; loop_cnt < count; loop_cnt++) {
qla8044_wr_reg_indirect(vha, addr1, (0x40000000 | value));
wait_count = 0;
while (wait_count < poll) {
qla8044_rd_reg_indirect(vha, addr1, &temp);
if ((temp & mask) != 0)
break;
wait_count++;
}
if (wait_count == poll) {
ql_log(ql_log_warn, vha, 0xb153,
"%s: TIMEOUT\n", __func__);
goto error;
} else {
qla8044_rd_reg_indirect(vha, addr2, &temp);
temp = temp & modify_mask;
temp = (temp | ((loop_cnt << 16) | loop_cnt));
wrVal = ((temp << 16) | temp);
qla8044_wr_reg_indirect(vha, addr2, wrVal);
qla8044_wr_reg_indirect(vha, addr1, value);
wait_count = 0;
while (wait_count < poll) {
qla8044_rd_reg_indirect(vha, addr1, &temp);
if ((temp & mask) != 0)
break;
wait_count++;
}
if (wait_count == poll) {
ql_log(ql_log_warn, vha, 0xb154,
"%s: TIMEOUT\n", __func__);
goto error;
}
qla8044_wr_reg_indirect(vha, addr1,
((0x40000000 | value) + stride2));
wait_count = 0;
while (wait_count < poll) {
qla8044_rd_reg_indirect(vha, addr1, &temp);
if ((temp & mask) != 0)
break;
wait_count++;
}
if (wait_count == poll) {
ql_log(ql_log_warn, vha, 0xb155,
"%s: TIMEOUT\n", __func__);
goto error;
}
qla8044_rd_reg_indirect(vha, addr2, &data);
*data_ptr++ = wrVal;
*data_ptr++ = data;
}
}
*d_ptr = data_ptr;
return QLA_SUCCESS;
error:
return -1;
}
static uint32_t
qla8044_minidump_process_rdmdio(struct scsi_qla_host *vha,
struct qla8044_minidump_entry_hdr *entry_hdr, uint32_t **d_ptr)
{
int ret = 0;
uint32_t addr1, addr2, value1, value2, data, selVal;
uint8_t stride1, stride2;
uint32_t addr3, addr4, addr5, addr6, addr7;
uint16_t count, loop_cnt;
uint32_t poll, mask;
uint32_t *data_ptr = *d_ptr;
struct qla8044_minidump_entry_rdmdio *rdmdio;
rdmdio = (struct qla8044_minidump_entry_rdmdio *) entry_hdr;
addr1 = rdmdio->addr_1;
addr2 = rdmdio->addr_2;
value1 = rdmdio->value_1;
stride1 = rdmdio->stride_1;
stride2 = rdmdio->stride_2;
count = rdmdio->count;
poll = rdmdio->poll;
mask = rdmdio->mask;
value2 = rdmdio->value_2;
addr3 = addr1 + stride1;
for (loop_cnt = 0; loop_cnt < count; loop_cnt++) {
ret = qla8044_poll_wait_ipmdio_bus_idle(vha, addr1, addr2,
addr3, mask);
if (ret == -1)
goto error;
addr4 = addr2 - stride1;
ret = qla8044_ipmdio_wr_reg(vha, addr1, addr3, mask, addr4,
value2);
if (ret == -1)
goto error;
addr5 = addr2 - (2 * stride1);
ret = qla8044_ipmdio_wr_reg(vha, addr1, addr3, mask, addr5,
value1);
if (ret == -1)
goto error;
addr6 = addr2 - (3 * stride1);
ret = qla8044_ipmdio_wr_reg(vha, addr1, addr3, mask,
addr6, 0x2);
if (ret == -1)
goto error;
ret = qla8044_poll_wait_ipmdio_bus_idle(vha, addr1, addr2,
addr3, mask);
if (ret == -1)
goto error;
addr7 = addr2 - (4 * stride1);
data = qla8044_ipmdio_rd_reg(vha, addr1, addr3,
mask, addr7);
if (data == -1)
goto error;
selVal = (value2 << 18) | (value1 << 2) | 2;
stride2 = rdmdio->stride_2;
*data_ptr++ = selVal;
*data_ptr++ = data;
value1 = value1 + stride2;
*d_ptr = data_ptr;
}
return 0;
error:
return -1;
}
static uint32_t qla8044_minidump_process_pollwr(struct scsi_qla_host *vha,
struct qla8044_minidump_entry_hdr *entry_hdr, uint32_t **d_ptr)
{
uint32_t addr1, addr2, value1, value2, poll, mask, r_value;
uint32_t wait_count = 0;
struct qla8044_minidump_entry_pollwr *pollwr_hdr;
pollwr_hdr = (struct qla8044_minidump_entry_pollwr *)entry_hdr;
addr1 = pollwr_hdr->addr_1;
addr2 = pollwr_hdr->addr_2;
value1 = pollwr_hdr->value_1;
value2 = pollwr_hdr->value_2;
poll = pollwr_hdr->poll;
mask = pollwr_hdr->mask;
while (wait_count < poll) {
qla8044_rd_reg_indirect(vha, addr1, &r_value);
if ((r_value & poll) != 0)
break;
wait_count++;
}
if (wait_count == poll) {
ql_log(ql_log_warn, vha, 0xb156, "%s: TIMEOUT\n", __func__);
goto error;
}
qla8044_wr_reg_indirect(vha, addr2, value2);
qla8044_wr_reg_indirect(vha, addr1, value1);
wait_count = 0;
while (wait_count < poll) {
qla8044_rd_reg_indirect(vha, addr1, &r_value);
if ((r_value & poll) != 0)
break;
wait_count++;
}
return QLA_SUCCESS;
error:
return -1;
}
/*
*
* qla8044_collect_md_data - Retrieve firmware minidump data.
* @ha: pointer to adapter structure
**/
int
qla8044_collect_md_data(struct scsi_qla_host *vha)
{
int num_entry_hdr = 0;
struct qla8044_minidump_entry_hdr *entry_hdr;
struct qla8044_minidump_template_hdr *tmplt_hdr;
uint32_t *data_ptr;
uint32_t data_collected = 0, f_capture_mask;
int i, rval = QLA_FUNCTION_FAILED;
uint64_t now;
uint32_t timestamp, idc_control;
struct qla_hw_data *ha = vha->hw;
if (!ha->md_dump) {
ql_log(ql_log_info, vha, 0xb101,
"%s(%ld) No buffer to dump\n",
__func__, vha->host_no);
return rval;
}
if (ha->fw_dumped) {
ql_log(ql_log_warn, vha, 0xb10d,
"Firmware has been previously dumped (%p) "
"-- ignoring request.\n", ha->fw_dump);
goto md_failed;
}
ha->fw_dumped = 0;
if (!ha->md_tmplt_hdr || !ha->md_dump) {
ql_log(ql_log_warn, vha, 0xb10e,
"Memory not allocated for minidump capture\n");
goto md_failed;
}
qla8044_idc_lock(ha);
idc_control = qla8044_rd_reg(ha, QLA8044_IDC_DRV_CTRL);
if (idc_control & GRACEFUL_RESET_BIT1) {
ql_log(ql_log_warn, vha, 0xb112,
"Forced reset from application, "
"ignore minidump capture\n");
qla8044_wr_reg(ha, QLA8044_IDC_DRV_CTRL,
(idc_control & ~GRACEFUL_RESET_BIT1));
qla8044_idc_unlock(ha);
goto md_failed;
}
qla8044_idc_unlock(ha);
if (qla82xx_validate_template_chksum(vha)) {
ql_log(ql_log_info, vha, 0xb109,
"Template checksum validation error\n");
goto md_failed;
}
tmplt_hdr = (struct qla8044_minidump_template_hdr *)
ha->md_tmplt_hdr;
data_ptr = (uint32_t *)((uint8_t *)ha->md_dump);
num_entry_hdr = tmplt_hdr->num_of_entries;
ql_dbg(ql_dbg_p3p, vha, 0xb11a,
"Capture Mask obtained: 0x%x\n", tmplt_hdr->capture_debug_level);
f_capture_mask = tmplt_hdr->capture_debug_level & 0xFF;
/* Validate whether required debug level is set */
if ((f_capture_mask & 0x3) != 0x3) {
ql_log(ql_log_warn, vha, 0xb10f,
"Minimum required capture mask[0x%x] level not set\n",
f_capture_mask);
}
tmplt_hdr->driver_capture_mask = ql2xmdcapmask;
ql_log(ql_log_info, vha, 0xb102,
"[%s]: starting data ptr: %p\n",
__func__, data_ptr);
ql_log(ql_log_info, vha, 0xb10b,
"[%s]: no of entry headers in Template: 0x%x\n",
__func__, num_entry_hdr);
ql_log(ql_log_info, vha, 0xb10c,
"[%s]: Total_data_size 0x%x, %d obtained\n",
__func__, ha->md_dump_size, ha->md_dump_size);
/* Update current timestamp before taking dump */
now = get_jiffies_64();
timestamp = (u32)(jiffies_to_msecs(now) / 1000);
tmplt_hdr->driver_timestamp = timestamp;
entry_hdr = (struct qla8044_minidump_entry_hdr *)
(((uint8_t *)ha->md_tmplt_hdr) + tmplt_hdr->first_entry_offset);
tmplt_hdr->saved_state_array[QLA8044_SS_OCM_WNDREG_INDEX] =
tmplt_hdr->ocm_window_reg[ha->portnum];
/* Walk through the entry headers - validate/perform required action */
for (i = 0; i < num_entry_hdr; i++) {
if (data_collected > ha->md_dump_size) {
ql_log(ql_log_info, vha, 0xb103,
"Data collected: [0x%x], "
"Total Dump size: [0x%x]\n",
data_collected, ha->md_dump_size);
return rval;
}
if (!(entry_hdr->d_ctrl.entry_capture_mask &
ql2xmdcapmask)) {
entry_hdr->d_ctrl.driver_flags |=
QLA82XX_DBG_SKIPPED_FLAG;
goto skip_nxt_entry;
}
ql_dbg(ql_dbg_p3p, vha, 0xb104,
"Data collected: [0x%x], Dump size left:[0x%x]\n",
data_collected,
(ha->md_dump_size - data_collected));
/* Decode the entry type and take required action to capture
* debug data
*/
switch (entry_hdr->entry_type) {
case QLA82XX_RDEND:
qla8044_mark_entry_skipped(vha, entry_hdr, i);
break;
case QLA82XX_CNTRL:
rval = qla8044_minidump_process_control(vha,
entry_hdr);
if (rval != QLA_SUCCESS) {
qla8044_mark_entry_skipped(vha, entry_hdr, i);
goto md_failed;
}
break;
case QLA82XX_RDCRB:
qla8044_minidump_process_rdcrb(vha,
entry_hdr, &data_ptr);
break;
case QLA82XX_RDMEM:
rval = qla8044_minidump_pex_dma_read(vha,
entry_hdr, &data_ptr);
if (rval != QLA_SUCCESS) {
rval = qla8044_minidump_process_rdmem(vha,
entry_hdr, &data_ptr);
if (rval != QLA_SUCCESS) {
qla8044_mark_entry_skipped(vha,
entry_hdr, i);
goto md_failed;
}
}
break;
case QLA82XX_BOARD:
case QLA82XX_RDROM:
rval = qla8044_minidump_process_rdrom(vha,
entry_hdr, &data_ptr);
if (rval != QLA_SUCCESS) {
qla8044_mark_entry_skipped(vha,
entry_hdr, i);
}
break;
case QLA82XX_L2DTG:
case QLA82XX_L2ITG:
case QLA82XX_L2DAT:
case QLA82XX_L2INS:
rval = qla8044_minidump_process_l2tag(vha,
entry_hdr, &data_ptr);
if (rval != QLA_SUCCESS) {
qla8044_mark_entry_skipped(vha, entry_hdr, i);
goto md_failed;
}
break;
case QLA8044_L1DTG:
case QLA8044_L1ITG:
case QLA82XX_L1DAT:
case QLA82XX_L1INS:
qla8044_minidump_process_l1cache(vha,
entry_hdr, &data_ptr);
break;
case QLA82XX_RDOCM:
qla8044_minidump_process_rdocm(vha,
entry_hdr, &data_ptr);
break;
case QLA82XX_RDMUX:
qla8044_minidump_process_rdmux(vha,
entry_hdr, &data_ptr);
break;
case QLA82XX_QUEUE:
qla8044_minidump_process_queue(vha,
entry_hdr, &data_ptr);
break;
case QLA8044_POLLRD:
rval = qla8044_minidump_process_pollrd(vha,
entry_hdr, &data_ptr);
if (rval != QLA_SUCCESS)
qla8044_mark_entry_skipped(vha, entry_hdr, i);
break;
case QLA8044_RDMUX2:
qla8044_minidump_process_rdmux2(vha,
entry_hdr, &data_ptr);
break;
case QLA8044_POLLRDMWR:
rval = qla8044_minidump_process_pollrdmwr(vha,
entry_hdr, &data_ptr);
if (rval != QLA_SUCCESS)
qla8044_mark_entry_skipped(vha, entry_hdr, i);
break;
case QLA8044_RDDFE:
rval = qla8044_minidump_process_rddfe(vha, entry_hdr,
&data_ptr);
if (rval != QLA_SUCCESS)
qla8044_mark_entry_skipped(vha, entry_hdr, i);
break;
case QLA8044_RDMDIO:
rval = qla8044_minidump_process_rdmdio(vha, entry_hdr,
&data_ptr);
if (rval != QLA_SUCCESS)
qla8044_mark_entry_skipped(vha, entry_hdr, i);
break;
case QLA8044_POLLWR:
rval = qla8044_minidump_process_pollwr(vha, entry_hdr,
&data_ptr);
if (rval != QLA_SUCCESS)
qla8044_mark_entry_skipped(vha, entry_hdr, i);
break;
case QLA82XX_RDNOP:
default:
qla8044_mark_entry_skipped(vha, entry_hdr, i);
break;
}
data_collected = (uint8_t *)data_ptr -
(uint8_t *)((uint8_t *)ha->md_dump);
skip_nxt_entry:
/*
* next entry in the template
*/
entry_hdr = (struct qla8044_minidump_entry_hdr *)
(((uint8_t *)entry_hdr) + entry_hdr->entry_size);
}
if (data_collected != ha->md_dump_size) {
ql_log(ql_log_info, vha, 0xb105,
"Dump data mismatch: Data collected: "
"[0x%x], total_data_size:[0x%x]\n",
data_collected, ha->md_dump_size);
rval = QLA_FUNCTION_FAILED;
goto md_failed;
}
ql_log(ql_log_info, vha, 0xb110,
"Firmware dump saved to temp buffer (%ld/%p %ld/%p).\n",
vha->host_no, ha->md_tmplt_hdr, vha->host_no, ha->md_dump);
ha->fw_dumped = 1;
qla2x00_post_uevent_work(vha, QLA_UEVENT_CODE_FW_DUMP);
ql_log(ql_log_info, vha, 0xb106,
"Leaving fn: %s Last entry: 0x%x\n",
__func__, i);
md_failed:
return rval;
}
void
qla8044_get_minidump(struct scsi_qla_host *vha)
{
struct qla_hw_data *ha = vha->hw;
if (!qla8044_collect_md_data(vha)) {
ha->fw_dumped = 1;
ha->prev_minidump_failed = 0;
} else {
ql_log(ql_log_fatal, vha, 0xb0db,
"%s: Unable to collect minidump\n",
__func__);
ha->prev_minidump_failed = 1;
}
}
static int
qla8044_poll_flash_status_reg(struct scsi_qla_host *vha)
{
uint32_t flash_status;
int retries = QLA8044_FLASH_READ_RETRY_COUNT;
int ret_val = QLA_SUCCESS;
while (retries--) {
ret_val = qla8044_rd_reg_indirect(vha, QLA8044_FLASH_STATUS,
&flash_status);
if (ret_val) {
ql_log(ql_log_warn, vha, 0xb13c,
"%s: Failed to read FLASH_STATUS reg.\n",
__func__);
break;
}
if ((flash_status & QLA8044_FLASH_STATUS_READY) ==
QLA8044_FLASH_STATUS_READY)
break;
msleep(QLA8044_FLASH_STATUS_REG_POLL_DELAY);
}
if (!retries)
ret_val = QLA_FUNCTION_FAILED;
return ret_val;
}
static int
qla8044_write_flash_status_reg(struct scsi_qla_host *vha,
uint32_t data)
{
int ret_val = QLA_SUCCESS;
uint32_t cmd;
cmd = vha->hw->fdt_wrt_sts_reg_cmd;
ret_val = qla8044_wr_reg_indirect(vha, QLA8044_FLASH_ADDR,
QLA8044_FLASH_STATUS_WRITE_DEF_SIG | cmd);
if (ret_val) {
ql_log(ql_log_warn, vha, 0xb125,
"%s: Failed to write to FLASH_ADDR.\n", __func__);
goto exit_func;
}
ret_val = qla8044_wr_reg_indirect(vha, QLA8044_FLASH_WRDATA, data);
if (ret_val) {
ql_log(ql_log_warn, vha, 0xb126,
"%s: Failed to write to FLASH_WRDATA.\n", __func__);
goto exit_func;
}
ret_val = qla8044_wr_reg_indirect(vha, QLA8044_FLASH_CONTROL,
QLA8044_FLASH_SECOND_ERASE_MS_VAL);
if (ret_val) {
ql_log(ql_log_warn, vha, 0xb127,
"%s: Failed to write to FLASH_CONTROL.\n", __func__);
goto exit_func;
}
ret_val = qla8044_poll_flash_status_reg(vha);
if (ret_val)
ql_log(ql_log_warn, vha, 0xb128,
"%s: Error polling flash status reg.\n", __func__);
exit_func:
return ret_val;
}
/*
* This function assumes that the flash lock is held.
*/
static int
qla8044_unprotect_flash(scsi_qla_host_t *vha)
{
int ret_val;
struct qla_hw_data *ha = vha->hw;
ret_val = qla8044_write_flash_status_reg(vha, ha->fdt_wrt_enable);
if (ret_val)
ql_log(ql_log_warn, vha, 0xb139,
"%s: Write flash status failed.\n", __func__);
return ret_val;
}
/*
* This function assumes that the flash lock is held.
*/
static int
qla8044_protect_flash(scsi_qla_host_t *vha)
{
int ret_val;
struct qla_hw_data *ha = vha->hw;
ret_val = qla8044_write_flash_status_reg(vha, ha->fdt_wrt_disable);
if (ret_val)
ql_log(ql_log_warn, vha, 0xb13b,
"%s: Write flash status failed.\n", __func__);
return ret_val;
}
static int
qla8044_erase_flash_sector(struct scsi_qla_host *vha,
uint32_t sector_start_addr)
{
uint32_t reversed_addr;
int ret_val = QLA_SUCCESS;
ret_val = qla8044_poll_flash_status_reg(vha);
if (ret_val) {
ql_log(ql_log_warn, vha, 0xb12e,
"%s: Poll flash status after erase failed..\n", __func__);
}
reversed_addr = (((sector_start_addr & 0xFF) << 16) |
(sector_start_addr & 0xFF00) |
((sector_start_addr & 0xFF0000) >> 16));
ret_val = qla8044_wr_reg_indirect(vha,
QLA8044_FLASH_WRDATA, reversed_addr);
if (ret_val) {
ql_log(ql_log_warn, vha, 0xb12f,
"%s: Failed to write to FLASH_WRDATA.\n", __func__);
}
ret_val = qla8044_wr_reg_indirect(vha, QLA8044_FLASH_ADDR,
QLA8044_FLASH_ERASE_SIG | vha->hw->fdt_erase_cmd);
if (ret_val) {
ql_log(ql_log_warn, vha, 0xb130,
"%s: Failed to write to FLASH_ADDR.\n", __func__);
}
ret_val = qla8044_wr_reg_indirect(vha, QLA8044_FLASH_CONTROL,
QLA8044_FLASH_LAST_ERASE_MS_VAL);
if (ret_val) {
ql_log(ql_log_warn, vha, 0xb131,
"%s: Failed write to FLASH_CONTROL.\n", __func__);
}
ret_val = qla8044_poll_flash_status_reg(vha);
if (ret_val) {
ql_log(ql_log_warn, vha, 0xb132,
"%s: Poll flash status failed.\n", __func__);
}
return ret_val;
}
/*
* qla8044_flash_write_u32 - Write data to flash
*
* @ha : Pointer to adapter structure
* addr : Flash address to write to
* p_data : Data to be written
*
* Return Value - QLA_SUCCESS/QLA_FUNCTION_FAILED
*
* NOTE: Lock should be held on entry
*/
static int
qla8044_flash_write_u32(struct scsi_qla_host *vha, uint32_t addr,
uint32_t *p_data)
{
int ret_val = QLA_SUCCESS;
ret_val = qla8044_wr_reg_indirect(vha, QLA8044_FLASH_ADDR,
0x00800000 | (addr >> 2));
if (ret_val) {
ql_log(ql_log_warn, vha, 0xb134,
"%s: Failed write to FLASH_ADDR.\n", __func__);
goto exit_func;
}
ret_val = qla8044_wr_reg_indirect(vha, QLA8044_FLASH_WRDATA, *p_data);
if (ret_val) {
ql_log(ql_log_warn, vha, 0xb135,
"%s: Failed write to FLASH_WRDATA.\n", __func__);
goto exit_func;
}
ret_val = qla8044_wr_reg_indirect(vha, QLA8044_FLASH_CONTROL, 0x3D);
if (ret_val) {
ql_log(ql_log_warn, vha, 0xb136,
"%s: Failed write to FLASH_CONTROL.\n", __func__);
goto exit_func;
}
ret_val = qla8044_poll_flash_status_reg(vha);
if (ret_val) {
ql_log(ql_log_warn, vha, 0xb137,
"%s: Poll flash status failed.\n", __func__);
}
exit_func:
return ret_val;
}
static int
qla8044_write_flash_buffer_mode(scsi_qla_host_t *vha, uint32_t *dwptr,
uint32_t faddr, uint32_t dwords)
{
int ret = QLA_FUNCTION_FAILED;
uint32_t spi_val;
if (dwords < QLA8044_MIN_OPTROM_BURST_DWORDS ||
dwords > QLA8044_MAX_OPTROM_BURST_DWORDS) {
ql_dbg(ql_dbg_user, vha, 0xb123,
"Got unsupported dwords = 0x%x.\n",
dwords);
return QLA_FUNCTION_FAILED;
}
qla8044_rd_reg_indirect(vha, QLA8044_FLASH_SPI_CONTROL, &spi_val);
qla8044_wr_reg_indirect(vha, QLA8044_FLASH_SPI_CONTROL,
spi_val | QLA8044_FLASH_SPI_CTL);
qla8044_wr_reg_indirect(vha, QLA8044_FLASH_ADDR,
QLA8044_FLASH_FIRST_TEMP_VAL);
/* First DWORD write to FLASH_WRDATA */
ret = qla8044_wr_reg_indirect(vha, QLA8044_FLASH_WRDATA,
*dwptr++);
qla8044_wr_reg_indirect(vha, QLA8044_FLASH_CONTROL,
QLA8044_FLASH_FIRST_MS_PATTERN);
ret = qla8044_poll_flash_status_reg(vha);
if (ret) {
ql_log(ql_log_warn, vha, 0xb124,
"%s: Failed.\n", __func__);
goto exit_func;
}
dwords--;
qla8044_wr_reg_indirect(vha, QLA8044_FLASH_ADDR,
QLA8044_FLASH_SECOND_TEMP_VAL);
/* Second to N-1 DWORDS writes */
while (dwords != 1) {
qla8044_wr_reg_indirect(vha, QLA8044_FLASH_WRDATA, *dwptr++);
qla8044_wr_reg_indirect(vha, QLA8044_FLASH_CONTROL,
QLA8044_FLASH_SECOND_MS_PATTERN);
ret = qla8044_poll_flash_status_reg(vha);
if (ret) {
ql_log(ql_log_warn, vha, 0xb129,
"%s: Failed.\n", __func__);
goto exit_func;
}
dwords--;
}
qla8044_wr_reg_indirect(vha, QLA8044_FLASH_ADDR,
QLA8044_FLASH_FIRST_TEMP_VAL | (faddr >> 2));
/* Last DWORD write */
qla8044_wr_reg_indirect(vha, QLA8044_FLASH_WRDATA, *dwptr++);
qla8044_wr_reg_indirect(vha, QLA8044_FLASH_CONTROL,
QLA8044_FLASH_LAST_MS_PATTERN);
ret = qla8044_poll_flash_status_reg(vha);
if (ret) {
ql_log(ql_log_warn, vha, 0xb12a,
"%s: Failed.\n", __func__);
goto exit_func;
}
qla8044_rd_reg_indirect(vha, QLA8044_FLASH_SPI_STATUS, &spi_val);
if ((spi_val & QLA8044_FLASH_SPI_CTL) == QLA8044_FLASH_SPI_CTL) {
ql_log(ql_log_warn, vha, 0xb12b,
"%s: Failed.\n", __func__);
spi_val = 0;
/* Operation failed, clear error bit. */
qla8044_rd_reg_indirect(vha, QLA8044_FLASH_SPI_CONTROL,
&spi_val);
qla8044_wr_reg_indirect(vha, QLA8044_FLASH_SPI_CONTROL,
spi_val | QLA8044_FLASH_SPI_CTL);
}
exit_func:
return ret;
}
static int
qla8044_write_flash_dword_mode(scsi_qla_host_t *vha, uint32_t *dwptr,
uint32_t faddr, uint32_t dwords)
{
int ret = QLA_FUNCTION_FAILED;
uint32_t liter;
for (liter = 0; liter < dwords; liter++, faddr += 4, dwptr++) {
ret = qla8044_flash_write_u32(vha, faddr, dwptr);
if (ret) {
ql_dbg(ql_dbg_p3p, vha, 0xb141,
"%s: flash address=%x data=%x.\n", __func__,
faddr, *dwptr);
break;
}
}
return ret;
}
int
qla8044_write_optrom_data(struct scsi_qla_host *vha, uint8_t *buf,
uint32_t offset, uint32_t length)
{
int rval = QLA_FUNCTION_FAILED, i, burst_iter_count;
int dword_count, erase_sec_count;
uint32_t erase_offset;
uint8_t *p_cache, *p_src;
erase_offset = offset;
p_cache = kcalloc(length, sizeof(uint8_t), GFP_KERNEL);
if (!p_cache)
return QLA_FUNCTION_FAILED;
memcpy(p_cache, buf, length);
p_src = p_cache;
dword_count = length / sizeof(uint32_t);
/* Since the offset and legth are sector aligned, it will be always
* multiple of burst_iter_count (64)
*/
burst_iter_count = dword_count / QLA8044_MAX_OPTROM_BURST_DWORDS;
erase_sec_count = length / QLA8044_SECTOR_SIZE;
/* Suspend HBA. */
scsi_block_requests(vha->host);
/* Lock and enable write for whole operation. */
qla8044_flash_lock(vha);
qla8044_unprotect_flash(vha);
/* Erasing the sectors */
for (i = 0; i < erase_sec_count; i++) {
rval = qla8044_erase_flash_sector(vha, erase_offset);
ql_dbg(ql_dbg_user, vha, 0xb138,
"Done erase of sector=0x%x.\n",
erase_offset);
if (rval) {
ql_log(ql_log_warn, vha, 0xb121,
"Failed to erase the sector having address: "
"0x%x.\n", erase_offset);
goto out;
}
erase_offset += QLA8044_SECTOR_SIZE;
}
ql_dbg(ql_dbg_user, vha, 0xb13f,
"Got write for addr = 0x%x length=0x%x.\n",
offset, length);
for (i = 0; i < burst_iter_count; i++) {
/* Go with write. */
rval = qla8044_write_flash_buffer_mode(vha, (uint32_t *)p_src,
offset, QLA8044_MAX_OPTROM_BURST_DWORDS);
if (rval) {
/* Buffer Mode failed skip to dword mode */
ql_log(ql_log_warn, vha, 0xb122,
"Failed to write flash in buffer mode, "
"Reverting to slow-write.\n");
rval = qla8044_write_flash_dword_mode(vha,
(uint32_t *)p_src, offset,
QLA8044_MAX_OPTROM_BURST_DWORDS);
}
p_src += sizeof(uint32_t) * QLA8044_MAX_OPTROM_BURST_DWORDS;
offset += sizeof(uint32_t) * QLA8044_MAX_OPTROM_BURST_DWORDS;
}
ql_dbg(ql_dbg_user, vha, 0xb133,
"Done writing.\n");
out:
qla8044_protect_flash(vha);
qla8044_flash_unlock(vha);
scsi_unblock_requests(vha->host);
kfree(p_cache);
return rval;
}
#define LEG_INT_PTR_B31 (1 << 31)
#define LEG_INT_PTR_B30 (1 << 30)
#define PF_BITS_MASK (0xF << 16)
/**
* qla8044_intr_handler() - Process interrupts for the ISP8044
* @irq:
* @dev_id: SCSI driver HA context
*
* Called by system whenever the host adapter generates an interrupt.
*
* Returns handled flag.
*/
irqreturn_t
qla8044_intr_handler(int irq, void *dev_id)
{
scsi_qla_host_t *vha;
struct qla_hw_data *ha;
struct rsp_que *rsp;
struct device_reg_82xx __iomem *reg;
int status = 0;
unsigned long flags;
unsigned long iter;
uint32_t stat;
uint16_t mb[4];
uint32_t leg_int_ptr = 0, pf_bit;
rsp = (struct rsp_que *) dev_id;
if (!rsp) {
ql_log(ql_log_info, NULL, 0xb143,
"%s(): NULL response queue pointer\n", __func__);
return IRQ_NONE;
}
ha = rsp->hw;
vha = pci_get_drvdata(ha->pdev);
if (unlikely(pci_channel_offline(ha->pdev)))
return IRQ_HANDLED;
leg_int_ptr = qla8044_rd_reg(ha, LEG_INTR_PTR_OFFSET);
/* Legacy interrupt is valid if bit31 of leg_int_ptr is set */
if (!(leg_int_ptr & (LEG_INT_PTR_B31))) {
ql_dbg(ql_dbg_p3p, vha, 0xb144,
"%s: Legacy Interrupt Bit 31 not set, "
"spurious interrupt!\n", __func__);
return IRQ_NONE;
}
pf_bit = ha->portnum << 16;
/* Validate the PCIE function ID set in leg_int_ptr bits [19..16] */
if ((leg_int_ptr & (PF_BITS_MASK)) != pf_bit) {
ql_dbg(ql_dbg_p3p, vha, 0xb145,
"%s: Incorrect function ID 0x%x in "
"legacy interrupt register, "
"ha->pf_bit = 0x%x\n", __func__,
(leg_int_ptr & (PF_BITS_MASK)), pf_bit);
return IRQ_NONE;
}
/* To de-assert legacy interrupt, write 0 to Legacy Interrupt Trigger
* Control register and poll till Legacy Interrupt Pointer register
* bit32 is 0.
*/
qla8044_wr_reg(ha, LEG_INTR_TRIG_OFFSET, 0);
do {
leg_int_ptr = qla8044_rd_reg(ha, LEG_INTR_PTR_OFFSET);
if ((leg_int_ptr & (PF_BITS_MASK)) != pf_bit)
break;
} while (leg_int_ptr & (LEG_INT_PTR_B30));
reg = &ha->iobase->isp82;
spin_lock_irqsave(&ha->hardware_lock, flags);
for (iter = 1; iter--; ) {
if (RD_REG_DWORD(®->host_int)) {
stat = RD_REG_DWORD(®->host_status);
if ((stat & HSRX_RISC_INT) == 0)
break;
switch (stat & 0xff) {
case 0x1:
case 0x2:
case 0x10:
case 0x11:
qla82xx_mbx_completion(vha, MSW(stat));
status |= MBX_INTERRUPT;
break;
case 0x12:
mb[0] = MSW(stat);
mb[1] = RD_REG_WORD(®->mailbox_out[1]);
mb[2] = RD_REG_WORD(®->mailbox_out[2]);
mb[3] = RD_REG_WORD(®->mailbox_out[3]);
qla2x00_async_event(vha, rsp, mb);
break;
case 0x13:
qla24xx_process_response_queue(vha, rsp);
break;
default:
ql_dbg(ql_dbg_p3p, vha, 0xb146,
"Unrecognized interrupt type "
"(%d).\n", stat & 0xff);
break;
}
}
WRT_REG_DWORD(®->host_int, 0);
}
qla2x00_handle_mbx_completion(ha, status);
spin_unlock_irqrestore(&ha->hardware_lock, flags);
return IRQ_HANDLED;
}
static int
qla8044_idc_dontreset(struct qla_hw_data *ha)
{
uint32_t idc_ctrl;
idc_ctrl = qla8044_rd_reg(ha, QLA8044_IDC_DRV_CTRL);
return idc_ctrl & DONTRESET_BIT0;
}
static void
qla8044_clear_rst_ready(scsi_qla_host_t *vha)
{
uint32_t drv_state;
drv_state = qla8044_rd_direct(vha, QLA8044_CRB_DRV_STATE_INDEX);
/*
* For ISP8044, drv_active register has 1 bit per function,
* shift 1 by func_num to set a bit for the function.
* For ISP82xx, drv_active has 4 bits per function
*/
drv_state &= ~(1 << vha->hw->portnum);
ql_dbg(ql_dbg_p3p, vha, 0xb13d,
"drv_state: 0x%08x\n", drv_state);
qla8044_wr_direct(vha, QLA8044_CRB_DRV_STATE_INDEX, drv_state);
}
int
qla8044_abort_isp(scsi_qla_host_t *vha)
{
int rval;
uint32_t dev_state;
struct qla_hw_data *ha = vha->hw;
qla8044_idc_lock(ha);
dev_state = qla8044_rd_direct(vha, QLA8044_CRB_DEV_STATE_INDEX);
if (ql2xdontresethba)
qla8044_set_idc_dontreset(vha);
/* If device_state is NEED_RESET, go ahead with
* Reset,irrespective of ql2xdontresethba. This is to allow a
* non-reset-owner to force a reset. Non-reset-owner sets
* the IDC_CTRL BIT0 to prevent Reset-owner from doing a Reset
* and then forces a Reset by setting device_state to
* NEED_RESET. */
if (dev_state == QLA8XXX_DEV_READY) {
/* If IDC_CTRL DONTRESETHBA_BIT0 is set don't do reset
* recovery */
if (qla8044_idc_dontreset(ha) == DONTRESET_BIT0) {
ql_dbg(ql_dbg_p3p, vha, 0xb13e,
"Reset recovery disabled\n");
rval = QLA_FUNCTION_FAILED;
goto exit_isp_reset;
}
ql_dbg(ql_dbg_p3p, vha, 0xb140,
"HW State: NEED RESET\n");
qla8044_wr_direct(vha, QLA8044_CRB_DEV_STATE_INDEX,
QLA8XXX_DEV_NEED_RESET);
}
/* For ISP8044, Reset owner is NIC, iSCSI or FCOE based on priority
* and which drivers are present. Unlike ISP82XX, the function setting
* NEED_RESET, may not be the Reset owner. */
qla83xx_reset_ownership(vha);
qla8044_idc_unlock(ha);
rval = qla8044_device_state_handler(vha);
qla8044_idc_lock(ha);
qla8044_clear_rst_ready(vha);
exit_isp_reset:
qla8044_idc_unlock(ha);
if (rval == QLA_SUCCESS) {
ha->flags.isp82xx_fw_hung = 0;
ha->flags.nic_core_reset_hdlr_active = 0;
rval = qla82xx_restart_isp(vha);
}
return rval;
}
void
qla8044_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
{
struct qla_hw_data *ha = vha->hw;
if (!ha->allow_cna_fw_dump)
return;
scsi_block_requests(vha->host);
ha->flags.isp82xx_no_md_cap = 1;
qla8044_idc_lock(ha);
qla82xx_set_reset_owner(vha);
qla8044_idc_unlock(ha);
qla2x00_wait_for_chip_reset(vha);
scsi_unblock_requests(vha->host);
}
| gpl-2.0 |
plxaye/chromium | src/content/browser/system_message_window_win.cc | 5414 | // Copyright (c) 2012 The Chromium Authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
#include "content/browser/system_message_window_win.h"
#include <dbt.h>
#include "base/logging.h"
#include "base/system_monitor/system_monitor.h"
#include "base/win/wrapped_window_proc.h"
#include "media/audio/win/core_audio_util_win.h"
namespace content {
namespace {
const wchar_t kWindowClassName[] = L"Chrome_SystemMessageWindow";
// A static map from a device category guid to base::SystemMonitor::DeviceType.
struct {
const GUID device_category;
const base::SystemMonitor::DeviceType device_type;
} const kDeviceCategoryMap[] = {
{ KSCATEGORY_AUDIO, base::SystemMonitor::DEVTYPE_AUDIO_CAPTURE },
{ KSCATEGORY_VIDEO, base::SystemMonitor::DEVTYPE_VIDEO_CAPTURE },
};
} // namespace
// Manages the device notification handles for SystemMessageWindowWin.
class SystemMessageWindowWin::DeviceNotifications {
public:
explicit DeviceNotifications(HWND hwnd) : notifications_() {
Register(hwnd);
}
~DeviceNotifications() {
Unregister();
}
void Register(HWND hwnd) {
// Request to receive device notifications. All applications receive basic
// notifications via WM_DEVICECHANGE but in order to receive detailed device
// arrival and removal messages, we need to register.
DEV_BROADCAST_DEVICEINTERFACE filter = {0};
filter.dbcc_size = sizeof(filter);
filter.dbcc_devicetype = DBT_DEVTYP_DEVICEINTERFACE;
bool core_audio_support = media::CoreAudioUtil::IsSupported();
for (int i = 0; i < arraysize(kDeviceCategoryMap); ++i) {
// If CoreAudio is supported, AudioDeviceListenerWin will
// take care of monitoring audio devices.
if (core_audio_support &&
KSCATEGORY_AUDIO == kDeviceCategoryMap[i].device_category) {
continue;
}
filter.dbcc_classguid = kDeviceCategoryMap[i].device_category;
DCHECK_EQ(notifications_[i], static_cast<HDEVNOTIFY>(NULL));
notifications_[i] = RegisterDeviceNotification(
hwnd, &filter, DEVICE_NOTIFY_WINDOW_HANDLE);
DPLOG_IF(ERROR, !notifications_[i])
<< "RegisterDeviceNotification failed";
}
}
void Unregister() {
for (int i = 0; i < arraysize(notifications_); ++i) {
if (notifications_[i]) {
UnregisterDeviceNotification(notifications_[i]);
notifications_[i] = NULL;
}
}
}
private:
HDEVNOTIFY notifications_[arraysize(kDeviceCategoryMap)];
DISALLOW_IMPLICIT_CONSTRUCTORS(DeviceNotifications);
};
SystemMessageWindowWin::SystemMessageWindowWin() {
WNDCLASSEX window_class;
base::win::InitializeWindowClass(
kWindowClassName,
&base::win::WrappedWindowProc<SystemMessageWindowWin::WndProcThunk>,
0, 0, 0, NULL, NULL, NULL, NULL, NULL,
&window_class);
instance_ = window_class.hInstance;
ATOM clazz = RegisterClassEx(&window_class);
DCHECK(clazz);
window_ = CreateWindow(kWindowClassName,
0, 0, 0, 0, 0, 0, 0, 0, instance_, 0);
SetWindowLongPtr(window_, GWLP_USERDATA, reinterpret_cast<LONG_PTR>(this));
device_notifications_.reset(new DeviceNotifications(window_));
}
SystemMessageWindowWin::~SystemMessageWindowWin() {
if (window_) {
DestroyWindow(window_);
UnregisterClass(kWindowClassName, instance_);
}
}
LRESULT SystemMessageWindowWin::OnDeviceChange(UINT event_type, LPARAM data) {
base::SystemMonitor* monitor = base::SystemMonitor::Get();
base::SystemMonitor::DeviceType device_type =
base::SystemMonitor::DEVTYPE_UNKNOWN;
switch (event_type) {
case DBT_DEVNODES_CHANGED:
// For this notification, we're happy with the default DEVTYPE_UNKNOWN.
break;
case DBT_DEVICEREMOVECOMPLETE:
case DBT_DEVICEARRIVAL: {
// This notification has more details about the specific device that
// was added or removed. See if this is a category we're interested
// in monitoring and if so report the specific device type. If we don't
// find the category in our map, ignore the notification and do not
// notify the system monitor.
DEV_BROADCAST_DEVICEINTERFACE* device_interface =
reinterpret_cast<DEV_BROADCAST_DEVICEINTERFACE*>(data);
if (device_interface->dbcc_devicetype != DBT_DEVTYP_DEVICEINTERFACE)
return TRUE;
for (int i = 0; i < arraysize(kDeviceCategoryMap); ++i) {
if (kDeviceCategoryMap[i].device_category ==
device_interface->dbcc_classguid) {
device_type = kDeviceCategoryMap[i].device_type;
break;
}
}
// Devices that we do not have a DEVTYPE_ for, get detected via
// DBT_DEVNODES_CHANGED, so we avoid sending additional notifications
// for those here.
if (device_type == base::SystemMonitor::DEVTYPE_UNKNOWN)
return TRUE;
break;
}
default:
return TRUE;
}
monitor->ProcessDevicesChanged(device_type);
return TRUE;
}
LRESULT CALLBACK SystemMessageWindowWin::WndProc(HWND hwnd, UINT message,
WPARAM wparam, LPARAM lparam) {
switch (message) {
case WM_DEVICECHANGE:
return OnDeviceChange(static_cast<UINT>(wparam), lparam);
default:
break;
}
return ::DefWindowProc(hwnd, message, wparam, lparam);
}
} // namespace content
| apache-2.0 |
thlorenz/debugium-take1 | src/content/public/browser/render_widget_host_view_mac_base.h | 812 | // Copyright (c) 2012 The Chromium Authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
#ifndef CONTENT_PUBLIC_BROWSER_RENDER_WIDGET_HOST_VIEW_MAC_BASE_H_
#define CONTENT_PUBLIC_BROWSER_RENDER_WIDGET_HOST_VIEW_MAC_BASE_H_
// The Mac RenderWidgetHostView implementation conforms to this protocol.
//
// While Chrome does not need any details of the actual
// implementation, there may be cases where it needs to alter behavior
// depending on whether an event receiver is the Mac implementation of
// RenderWidgetHostView. For this purpose,
// conformsToProtocol:@protocol(RenderWidgetHostViewMacBase) can be used.
@protocol RenderWidgetHostViewMacBase
@end
#endif // CONTENT_PUBLIC_BROWSER_RENDER_WIDGET_HOST_VIEW_MAC_BASE_H_
| mit |
MicroTrustRepos/microkernel | src/l4/pkg/dde/linux26/contrib/include/net/cfg80211.h | 18003 | #ifndef __NET_CFG80211_H
#define __NET_CFG80211_H
#include <linux/netlink.h>
#include <linux/skbuff.h>
#include <linux/nl80211.h>
#include <net/genetlink.h>
/* remove once we remove the wext stuff */
#include <net/iw_handler.h>
/*
* 802.11 configuration in-kernel interface
*
* Copyright 2006, 2007 Johannes Berg <[email protected]>
*/
/**
* struct vif_params - describes virtual interface parameters
* @mesh_id: mesh ID to use
* @mesh_id_len: length of the mesh ID
*/
struct vif_params {
u8 *mesh_id;
int mesh_id_len;
};
/* Radiotap header iteration
* implemented in net/wireless/radiotap.c
* docs in Documentation/networking/radiotap-headers.txt
*/
/**
* struct ieee80211_radiotap_iterator - tracks walk thru present radiotap args
* @rtheader: pointer to the radiotap header we are walking through
* @max_length: length of radiotap header in cpu byte ordering
* @this_arg_index: IEEE80211_RADIOTAP_... index of current arg
* @this_arg: pointer to current radiotap arg
* @arg_index: internal next argument index
* @arg: internal next argument pointer
* @next_bitmap: internal pointer to next present u32
* @bitmap_shifter: internal shifter for curr u32 bitmap, b0 set == arg present
*/
struct ieee80211_radiotap_iterator {
struct ieee80211_radiotap_header *rtheader;
int max_length;
int this_arg_index;
u8 *this_arg;
int arg_index;
u8 *arg;
__le32 *next_bitmap;
u32 bitmap_shifter;
};
extern int ieee80211_radiotap_iterator_init(
struct ieee80211_radiotap_iterator *iterator,
struct ieee80211_radiotap_header *radiotap_header,
int max_length);
extern int ieee80211_radiotap_iterator_next(
struct ieee80211_radiotap_iterator *iterator);
/**
* struct key_params - key information
*
* Information about a key
*
* @key: key material
* @key_len: length of key material
* @cipher: cipher suite selector
* @seq: sequence counter (IV/PN) for TKIP and CCMP keys, only used
* with the get_key() callback, must be in little endian,
* length given by @seq_len.
*/
struct key_params {
u8 *key;
u8 *seq;
int key_len;
int seq_len;
u32 cipher;
};
/**
* struct beacon_parameters - beacon parameters
*
* Used to configure the beacon for an interface.
*
* @head: head portion of beacon (before TIM IE)
* or %NULL if not changed
* @tail: tail portion of beacon (after TIM IE)
* or %NULL if not changed
* @interval: beacon interval or zero if not changed
* @dtim_period: DTIM period or zero if not changed
* @head_len: length of @head
* @tail_len: length of @tail
*/
struct beacon_parameters {
u8 *head, *tail;
int interval, dtim_period;
int head_len, tail_len;
};
/**
* enum station_flags - station flags
*
* Station capability flags. Note that these must be the bits
* according to the nl80211 flags.
*
* @STATION_FLAG_CHANGED: station flags were changed
* @STATION_FLAG_AUTHORIZED: station is authorized to send frames (802.1X)
* @STATION_FLAG_SHORT_PREAMBLE: station is capable of receiving frames
* with short preambles
* @STATION_FLAG_WME: station is WME/QoS capable
*/
enum station_flags {
STATION_FLAG_CHANGED = 1<<0,
STATION_FLAG_AUTHORIZED = 1<<NL80211_STA_FLAG_AUTHORIZED,
STATION_FLAG_SHORT_PREAMBLE = 1<<NL80211_STA_FLAG_SHORT_PREAMBLE,
STATION_FLAG_WME = 1<<NL80211_STA_FLAG_WME,
};
/**
* enum plink_action - actions to perform in mesh peers
*
* @PLINK_ACTION_INVALID: action 0 is reserved
* @PLINK_ACTION_OPEN: start mesh peer link establishment
* @PLINK_ACTION_BLOCL: block traffic from this mesh peer
*/
enum plink_actions {
PLINK_ACTION_INVALID,
PLINK_ACTION_OPEN,
PLINK_ACTION_BLOCK,
};
/**
* struct station_parameters - station parameters
*
* Used to change and create a new station.
*
* @vlan: vlan interface station should belong to
* @supported_rates: supported rates in IEEE 802.11 format
* (or NULL for no change)
* @supported_rates_len: number of supported rates
* @station_flags: station flags (see &enum station_flags)
* @listen_interval: listen interval or -1 for no change
* @aid: AID or zero for no change
*/
struct station_parameters {
u8 *supported_rates;
struct net_device *vlan;
u32 station_flags;
int listen_interval;
u16 aid;
u8 supported_rates_len;
u8 plink_action;
struct ieee80211_ht_cap *ht_capa;
};
/**
* enum station_info_flags - station information flags
*
* Used by the driver to indicate which info in &struct station_info
* it has filled in during get_station() or dump_station().
*
* @STATION_INFO_INACTIVE_TIME: @inactive_time filled
* @STATION_INFO_RX_BYTES: @rx_bytes filled
* @STATION_INFO_TX_BYTES: @tx_bytes filled
* @STATION_INFO_LLID: @llid filled
* @STATION_INFO_PLID: @plid filled
* @STATION_INFO_PLINK_STATE: @plink_state filled
* @STATION_INFO_SIGNAL: @signal filled
* @STATION_INFO_TX_BITRATE: @tx_bitrate fields are filled
* (tx_bitrate, tx_bitrate_flags and tx_bitrate_mcs)
*/
enum station_info_flags {
STATION_INFO_INACTIVE_TIME = 1<<0,
STATION_INFO_RX_BYTES = 1<<1,
STATION_INFO_TX_BYTES = 1<<2,
STATION_INFO_LLID = 1<<3,
STATION_INFO_PLID = 1<<4,
STATION_INFO_PLINK_STATE = 1<<5,
STATION_INFO_SIGNAL = 1<<6,
STATION_INFO_TX_BITRATE = 1<<7,
};
/**
* enum station_info_rate_flags - bitrate info flags
*
* Used by the driver to indicate the specific rate transmission
* type for 802.11n transmissions.
*
* @RATE_INFO_FLAGS_MCS: @tx_bitrate_mcs filled
* @RATE_INFO_FLAGS_40_MHZ_WIDTH: 40 Mhz width transmission
* @RATE_INFO_FLAGS_SHORT_GI: 400ns guard interval
*/
enum rate_info_flags {
RATE_INFO_FLAGS_MCS = 1<<0,
RATE_INFO_FLAGS_40_MHZ_WIDTH = 1<<1,
RATE_INFO_FLAGS_SHORT_GI = 1<<2,
};
/**
* struct rate_info - bitrate information
*
* Information about a receiving or transmitting bitrate
*
* @flags: bitflag of flags from &enum rate_info_flags
* @mcs: mcs index if struct describes a 802.11n bitrate
* @legacy: bitrate in 100kbit/s for 802.11abg
*/
struct rate_info {
u8 flags;
u8 mcs;
u16 legacy;
};
/**
* struct station_info - station information
*
* Station information filled by driver for get_station() and dump_station.
*
* @filled: bitflag of flags from &enum station_info_flags
* @inactive_time: time since last station activity (tx/rx) in milliseconds
* @rx_bytes: bytes received from this station
* @tx_bytes: bytes transmitted to this station
* @llid: mesh local link id
* @plid: mesh peer link id
* @plink_state: mesh peer link state
* @signal: signal strength of last received packet in dBm
* @txrate: current unicast bitrate to this station
*/
struct station_info {
u32 filled;
u32 inactive_time;
u32 rx_bytes;
u32 tx_bytes;
u16 llid;
u16 plid;
u8 plink_state;
s8 signal;
struct rate_info txrate;
};
/**
* enum monitor_flags - monitor flags
*
* Monitor interface configuration flags. Note that these must be the bits
* according to the nl80211 flags.
*
* @MONITOR_FLAG_FCSFAIL: pass frames with bad FCS
* @MONITOR_FLAG_PLCPFAIL: pass frames with bad PLCP
* @MONITOR_FLAG_CONTROL: pass control frames
* @MONITOR_FLAG_OTHER_BSS: disable BSSID filtering
* @MONITOR_FLAG_COOK_FRAMES: report frames after processing
*/
enum monitor_flags {
MONITOR_FLAG_FCSFAIL = 1<<NL80211_MNTR_FLAG_FCSFAIL,
MONITOR_FLAG_PLCPFAIL = 1<<NL80211_MNTR_FLAG_PLCPFAIL,
MONITOR_FLAG_CONTROL = 1<<NL80211_MNTR_FLAG_CONTROL,
MONITOR_FLAG_OTHER_BSS = 1<<NL80211_MNTR_FLAG_OTHER_BSS,
MONITOR_FLAG_COOK_FRAMES = 1<<NL80211_MNTR_FLAG_COOK_FRAMES,
};
/**
* enum mpath_info_flags - mesh path information flags
*
* Used by the driver to indicate which info in &struct mpath_info it has filled
* in during get_station() or dump_station().
*
* MPATH_INFO_FRAME_QLEN: @frame_qlen filled
* MPATH_INFO_DSN: @dsn filled
* MPATH_INFO_METRIC: @metric filled
* MPATH_INFO_EXPTIME: @exptime filled
* MPATH_INFO_DISCOVERY_TIMEOUT: @discovery_timeout filled
* MPATH_INFO_DISCOVERY_RETRIES: @discovery_retries filled
* MPATH_INFO_FLAGS: @flags filled
*/
enum mpath_info_flags {
MPATH_INFO_FRAME_QLEN = BIT(0),
MPATH_INFO_DSN = BIT(1),
MPATH_INFO_METRIC = BIT(2),
MPATH_INFO_EXPTIME = BIT(3),
MPATH_INFO_DISCOVERY_TIMEOUT = BIT(4),
MPATH_INFO_DISCOVERY_RETRIES = BIT(5),
MPATH_INFO_FLAGS = BIT(6),
};
/**
* struct mpath_info - mesh path information
*
* Mesh path information filled by driver for get_mpath() and dump_mpath().
*
* @filled: bitfield of flags from &enum mpath_info_flags
* @frame_qlen: number of queued frames for this destination
* @dsn: destination sequence number
* @metric: metric (cost) of this mesh path
* @exptime: expiration time for the mesh path from now, in msecs
* @flags: mesh path flags
* @discovery_timeout: total mesh path discovery timeout, in msecs
* @discovery_retries: mesh path discovery retries
*/
struct mpath_info {
u32 filled;
u32 frame_qlen;
u32 dsn;
u32 metric;
u32 exptime;
u32 discovery_timeout;
u8 discovery_retries;
u8 flags;
};
/**
* struct bss_parameters - BSS parameters
*
* Used to change BSS parameters (mainly for AP mode).
*
* @use_cts_prot: Whether to use CTS protection
* (0 = no, 1 = yes, -1 = do not change)
* @use_short_preamble: Whether the use of short preambles is allowed
* (0 = no, 1 = yes, -1 = do not change)
* @use_short_slot_time: Whether the use of short slot time is allowed
* (0 = no, 1 = yes, -1 = do not change)
* @basic_rates: basic rates in IEEE 802.11 format
* (or NULL for no change)
* @basic_rates_len: number of basic rates
*/
struct bss_parameters {
int use_cts_prot;
int use_short_preamble;
int use_short_slot_time;
u8 *basic_rates;
u8 basic_rates_len;
};
/**
* enum reg_set_by - Indicates who is trying to set the regulatory domain
* @REGDOM_SET_BY_INIT: regulatory domain was set by initialization. We will be
* using a static world regulatory domain by default.
* @REGDOM_SET_BY_CORE: Core queried CRDA for a dynamic world regulatory domain.
* @REGDOM_SET_BY_USER: User asked the wireless core to set the
* regulatory domain.
* @REGDOM_SET_BY_DRIVER: a wireless drivers has hinted to the wireless core
* it thinks its knows the regulatory domain we should be in.
* @REGDOM_SET_BY_COUNTRY_IE: the wireless core has received an 802.11 country
* information element with regulatory information it thinks we
* should consider.
*/
enum reg_set_by {
REGDOM_SET_BY_INIT,
REGDOM_SET_BY_CORE,
REGDOM_SET_BY_USER,
REGDOM_SET_BY_DRIVER,
REGDOM_SET_BY_COUNTRY_IE,
};
struct ieee80211_freq_range {
u32 start_freq_khz;
u32 end_freq_khz;
u32 max_bandwidth_khz;
};
struct ieee80211_power_rule {
u32 max_antenna_gain;
u32 max_eirp;
};
struct ieee80211_reg_rule {
struct ieee80211_freq_range freq_range;
struct ieee80211_power_rule power_rule;
u32 flags;
};
struct ieee80211_regdomain {
u32 n_reg_rules;
char alpha2[2];
struct ieee80211_reg_rule reg_rules[];
};
#define MHZ_TO_KHZ(freq) ((freq) * 1000)
#define KHZ_TO_MHZ(freq) ((freq) / 1000)
#define DBI_TO_MBI(gain) ((gain) * 100)
#define MBI_TO_DBI(gain) ((gain) / 100)
#define DBM_TO_MBM(gain) ((gain) * 100)
#define MBM_TO_DBM(gain) ((gain) / 100)
#define REG_RULE(start, end, bw, gain, eirp, reg_flags) { \
.freq_range.start_freq_khz = MHZ_TO_KHZ(start), \
.freq_range.end_freq_khz = MHZ_TO_KHZ(end), \
.freq_range.max_bandwidth_khz = MHZ_TO_KHZ(bw), \
.power_rule.max_antenna_gain = DBI_TO_MBI(gain), \
.power_rule.max_eirp = DBM_TO_MBM(eirp), \
.flags = reg_flags, \
}
struct mesh_config {
/* Timeouts in ms */
/* Mesh plink management parameters */
u16 dot11MeshRetryTimeout;
u16 dot11MeshConfirmTimeout;
u16 dot11MeshHoldingTimeout;
u16 dot11MeshMaxPeerLinks;
u8 dot11MeshMaxRetries;
u8 dot11MeshTTL;
bool auto_open_plinks;
/* HWMP parameters */
u8 dot11MeshHWMPmaxPREQretries;
u32 path_refresh_time;
u16 min_discovery_timeout;
u32 dot11MeshHWMPactivePathTimeout;
u16 dot11MeshHWMPpreqMinInterval;
u16 dot11MeshHWMPnetDiameterTraversalTime;
};
/**
* struct ieee80211_txq_params - TX queue parameters
* @queue: TX queue identifier (NL80211_TXQ_Q_*)
* @txop: Maximum burst time in units of 32 usecs, 0 meaning disabled
* @cwmin: Minimum contention window [a value of the form 2^n-1 in the range
* 1..32767]
* @cwmax: Maximum contention window [a value of the form 2^n-1 in the range
* 1..32767]
* @aifs: Arbitration interframe space [0..255]
*/
struct ieee80211_txq_params {
enum nl80211_txq_q queue;
u16 txop;
u16 cwmin;
u16 cwmax;
u8 aifs;
};
/* from net/wireless.h */
struct wiphy;
/* from net/ieee80211.h */
struct ieee80211_channel;
/**
* struct cfg80211_ops - backend description for wireless configuration
*
* This struct is registered by fullmac card drivers and/or wireless stacks
* in order to handle configuration requests on their interfaces.
*
* All callbacks except where otherwise noted should return 0
* on success or a negative error code.
*
* All operations are currently invoked under rtnl for consistency with the
* wireless extensions but this is subject to reevaluation as soon as this
* code is used more widely and we have a first user without wext.
*
* @add_virtual_intf: create a new virtual interface with the given name,
* must set the struct wireless_dev's iftype.
*
* @del_virtual_intf: remove the virtual interface determined by ifindex.
*
* @change_virtual_intf: change type/configuration of virtual interface,
* keep the struct wireless_dev's iftype updated.
*
* @add_key: add a key with the given parameters. @mac_addr will be %NULL
* when adding a group key.
*
* @get_key: get information about the key with the given parameters.
* @mac_addr will be %NULL when requesting information for a group
* key. All pointers given to the @callback function need not be valid
* after it returns.
*
* @del_key: remove a key given the @mac_addr (%NULL for a group key)
* and @key_index
*
* @set_default_key: set the default key on an interface
*
* @add_beacon: Add a beacon with given parameters, @head, @interval
* and @dtim_period will be valid, @tail is optional.
* @set_beacon: Change the beacon parameters for an access point mode
* interface. This should reject the call when no beacon has been
* configured.
* @del_beacon: Remove beacon configuration and stop sending the beacon.
*
* @add_station: Add a new station.
*
* @del_station: Remove a station; @mac may be NULL to remove all stations.
*
* @change_station: Modify a given station.
*
* @get_mesh_params: Put the current mesh parameters into *params
*
* @set_mesh_params: Set mesh parameters.
* The mask is a bitfield which tells us which parameters to
* set, and which to leave alone.
*
* @set_mesh_cfg: set mesh parameters (by now, just mesh id)
*
* @change_bss: Modify parameters for a given BSS.
*
* @set_txq_params: Set TX queue parameters
*
* @set_channel: Set channel
*/
struct cfg80211_ops {
int (*add_virtual_intf)(struct wiphy *wiphy, char *name,
enum nl80211_iftype type, u32 *flags,
struct vif_params *params);
int (*del_virtual_intf)(struct wiphy *wiphy, int ifindex);
int (*change_virtual_intf)(struct wiphy *wiphy, int ifindex,
enum nl80211_iftype type, u32 *flags,
struct vif_params *params);
int (*add_key)(struct wiphy *wiphy, struct net_device *netdev,
u8 key_index, u8 *mac_addr,
struct key_params *params);
int (*get_key)(struct wiphy *wiphy, struct net_device *netdev,
u8 key_index, u8 *mac_addr, void *cookie,
void (*callback)(void *cookie, struct key_params*));
int (*del_key)(struct wiphy *wiphy, struct net_device *netdev,
u8 key_index, u8 *mac_addr);
int (*set_default_key)(struct wiphy *wiphy,
struct net_device *netdev,
u8 key_index);
int (*add_beacon)(struct wiphy *wiphy, struct net_device *dev,
struct beacon_parameters *info);
int (*set_beacon)(struct wiphy *wiphy, struct net_device *dev,
struct beacon_parameters *info);
int (*del_beacon)(struct wiphy *wiphy, struct net_device *dev);
int (*add_station)(struct wiphy *wiphy, struct net_device *dev,
u8 *mac, struct station_parameters *params);
int (*del_station)(struct wiphy *wiphy, struct net_device *dev,
u8 *mac);
int (*change_station)(struct wiphy *wiphy, struct net_device *dev,
u8 *mac, struct station_parameters *params);
int (*get_station)(struct wiphy *wiphy, struct net_device *dev,
u8 *mac, struct station_info *sinfo);
int (*dump_station)(struct wiphy *wiphy, struct net_device *dev,
int idx, u8 *mac, struct station_info *sinfo);
int (*add_mpath)(struct wiphy *wiphy, struct net_device *dev,
u8 *dst, u8 *next_hop);
int (*del_mpath)(struct wiphy *wiphy, struct net_device *dev,
u8 *dst);
int (*change_mpath)(struct wiphy *wiphy, struct net_device *dev,
u8 *dst, u8 *next_hop);
int (*get_mpath)(struct wiphy *wiphy, struct net_device *dev,
u8 *dst, u8 *next_hop,
struct mpath_info *pinfo);
int (*dump_mpath)(struct wiphy *wiphy, struct net_device *dev,
int idx, u8 *dst, u8 *next_hop,
struct mpath_info *pinfo);
int (*get_mesh_params)(struct wiphy *wiphy,
struct net_device *dev,
struct mesh_config *conf);
int (*set_mesh_params)(struct wiphy *wiphy,
struct net_device *dev,
const struct mesh_config *nconf, u32 mask);
int (*change_bss)(struct wiphy *wiphy, struct net_device *dev,
struct bss_parameters *params);
int (*set_txq_params)(struct wiphy *wiphy,
struct ieee80211_txq_params *params);
int (*set_channel)(struct wiphy *wiphy,
struct ieee80211_channel *chan,
enum nl80211_channel_type channel_type);
};
/* temporary wext handlers */
int cfg80211_wext_giwname(struct net_device *dev,
struct iw_request_info *info,
char *name, char *extra);
int cfg80211_wext_siwmode(struct net_device *dev, struct iw_request_info *info,
u32 *mode, char *extra);
int cfg80211_wext_giwmode(struct net_device *dev, struct iw_request_info *info,
u32 *mode, char *extra);
#endif /* __NET_CFG80211_H */
| gpl-2.0 |
TeamBliss-Devices/android_kernel_nvidia_shieldtablet | net/mhi/mhi_raw.c | 6233 | /*
* File: mhi_raw.c
*
* Copyright (C) 2011 Renesas Mobile Corporation. All rights reserved.
*
* Author: Petri Mattila <[email protected]>
*
* RAW socket implementation for MHI protocol family.
*
* It uses the MHI socket framework in mhi_socket.c
*
* This implementation is the most basic frame passing interface.
* The user space can use the sendmsg() and recvmsg() system calls
* to access the frames. The socket is created with the socket()
* system call, e.g. socket(PF_MHI,SOCK_RAW,l2proto).
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/socket.h>
#include <linux/mhi.h>
#include <linux/l2mux.h>
#include <asm/ioctls.h>
#include <net/af_mhi.h>
#include <net/mhi/sock.h>
#include <net/mhi/raw.h>
#ifdef CONFIG_MHI_DEBUG
# define DPRINTK(...) printk(KERN_DEBUG "MHI/RAW: " __VA_ARGS__)
#else
# define DPRINTK(...)
#endif
/*** Prototypes ***/
static struct proto mhi_raw_proto;
static void mhi_raw_destruct(struct sock *sk);
/*** Functions ***/
int mhi_raw_sock_create(
struct net *net,
struct socket *sock,
int proto,
int kern)
{
struct sock *sk;
struct mhi_sock *msk;
DPRINTK("mhi_raw_sock_create: proto:%d type:%d\n",
proto, sock->type);
if (sock->type != SOCK_RAW)
return -EPROTONOSUPPORT;
sk = sk_alloc(net, PF_MHI, GFP_KERNEL, &mhi_raw_proto);
if (!sk)
return -ENOMEM;
sock_init_data(sock, sk);
sock->ops = &mhi_socket_ops;
sock->state = SS_UNCONNECTED;
if (proto != MHI_L3_ANY)
sk->sk_protocol = proto;
else
sk->sk_protocol = 0;
sk->sk_destruct = mhi_raw_destruct;
sk->sk_backlog_rcv = sk->sk_prot->backlog_rcv;
sk->sk_prot->init(sk);
msk = mhi_sk(sk);
msk->sk_l3proto = proto;
msk->sk_ifindex = -1;
return 0;
}
static int mhi_raw_init(struct sock *sk)
{
return 0;
}
static void mhi_raw_destruct(struct sock *sk)
{
skb_queue_purge(&sk->sk_receive_queue);
}
static void mhi_raw_close(struct sock *sk, long timeout)
{
sk_common_release(sk);
}
static int mhi_raw_ioctl(struct sock *sk, int cmd, unsigned long arg)
{
int err;
DPRINTK("mhi_raw_ioctl: cmd:%d arg:%lu\n", cmd, arg);
switch (cmd) {
case SIOCOUTQ:
{
int len;
len = sk_wmem_alloc_get(sk);
err = put_user(len, (int __user *)arg);
}
break;
case SIOCINQ:
{
struct sk_buff *skb;
int len;
lock_sock(sk);
{
skb = skb_peek(&sk->sk_receive_queue);
len = skb ? skb->len : 0;
}
release_sock(sk);
err = put_user(len, (int __user *)arg);
}
break;
default:
err = -ENOIOCTLCMD;
}
return err;
}
static int mhi_raw_sendmsg(
struct kiocb *iocb,
struct sock *sk,
struct msghdr *msg,
size_t len)
{
struct mhi_sock *msk = mhi_sk(sk);
struct net_device *dev = NULL;
struct sk_buff *skb;
int err = -EFAULT;
if (msg->msg_flags &
~(MSG_DONTWAIT|MSG_EOR|MSG_NOSIGNAL|MSG_CMSG_COMPAT)) {
printk(KERN_WARNING
"mhi_raw_sendmsg: incompatible socket msg_flags: 0x%08X\n",
msg->msg_flags);
err = -EOPNOTSUPP;
goto out;
}
skb = sock_alloc_send_skb(sk,
len,
(msg->msg_flags & MSG_DONTWAIT),
&err);
if (!skb) {
printk(KERN_ERR
"mhi_raw_sendmsg: sock_alloc_send_skb failed: %d\n",
err);
goto out;
}
err = memcpy_fromiovec((void *)skb_put(skb, len), msg->msg_iov, len);
if (err < 0) {
printk(KERN_ERR
"mhi_raw_sendmsg: memcpy_fromiovec failed: %d\n",
err);
goto drop;
}
if (msk->sk_ifindex)
dev = dev_get_by_index(sock_net(sk), msk->sk_ifindex);
if (!dev) {
printk(KERN_ERR
"mhi_raw_sendmsg: no device for ifindex:%d\n",
msk->sk_ifindex);
goto drop;
}
if (!(dev->flags & IFF_UP)) {
printk(KERN_ERR
"mhi_raw_sendmsg: device %d not IFF_UP\n",
msk->sk_ifindex);
err = -ENETDOWN;
goto drop;
}
if (len > dev->mtu) {
err = -EMSGSIZE;
goto drop;
}
skb_reset_network_header(skb);
skb_reset_mac_header(skb);
err = mhi_skb_send(skb, dev, sk->sk_protocol);
goto put;
drop:
kfree(skb);
put:
if (dev)
dev_put(dev);
out:
return err;
}
static int mhi_raw_recvmsg(
struct kiocb *iocb,
struct sock *sk,
struct msghdr *msg,
size_t len,
int noblock,
int flags,
int *addr_len)
{
struct sk_buff *skb = NULL;
int cnt, err;
err = -EOPNOTSUPP;
if (flags &
~(MSG_PEEK|MSG_TRUNC|MSG_DONTWAIT|
MSG_NOSIGNAL|MSG_CMSG_COMPAT)) {
printk(KERN_WARNING
"mhi_raw_recvmsg: incompatible socket flags: 0x%08X",
flags);
goto out2;
}
if (addr_len)
addr_len[0] = 0;
skb = skb_recv_datagram(sk, flags, noblock, &err);
if (!skb)
goto out2;
cnt = skb->len;
if (len < cnt) {
msg->msg_flags |= MSG_TRUNC;
cnt = len;
}
err = skb_copy_datagram_iovec(skb, 0, msg->msg_iov, cnt);
if (err)
goto out;
if (flags & MSG_TRUNC)
err = skb->len;
else
err = cnt;
out:
skb_free_datagram(sk, skb);
out2:
return err;
}
static int mhi_raw_backlog_rcv(struct sock *sk, struct sk_buff *skb)
{
if (sock_queue_rcv_skb(sk, skb) < 0) {
kfree_skb(skb);
return NET_RX_DROP;
}
return NET_RX_SUCCESS;
}
static struct proto mhi_raw_proto = {
.name = "MHI-RAW",
.owner = THIS_MODULE,
.close = mhi_raw_close,
.ioctl = mhi_raw_ioctl,
.init = mhi_raw_init,
.sendmsg = mhi_raw_sendmsg,
.recvmsg = mhi_raw_recvmsg,
.backlog_rcv = mhi_raw_backlog_rcv,
.hash = mhi_sock_hash,
.unhash = mhi_sock_unhash,
.obj_size = sizeof(struct mhi_sock),
};
int mhi_raw_proto_init(void)
{
DPRINTK("mhi_raw_proto_init\n");
return proto_register(&mhi_raw_proto, 1);
}
void mhi_raw_proto_exit(void)
{
DPRINTK("mhi_raw_proto_exit\n");
proto_unregister(&mhi_raw_proto);
}
| gpl-2.0 |
danialbehzadi/Nokia-RM-1013-2.0.0.11 | webkit/Source/WebKit2/UIProcess/API/C/WKMediaCacheManager.cpp | 2241 | /*
* Copyright (C) 2011 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY APPLE INC. AND ITS CONTRIBUTORS ``AS IS''
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL APPLE INC. OR ITS CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "config.h"
#include "WKMediaCacheManager.h"
#include "WKAPICast.h"
#include "WebMediaCacheManagerProxy.h"
using namespace WebKit;
WKTypeID WKMediaCacheManagerGetTypeID()
{
return toAPI(WebMediaCacheManagerProxy::APIType);
}
void WKMediaCacheManagerGetHostnamesWithMediaCache(WKMediaCacheManagerRef mediaCacheManagerRef, void* context, WKMediaCacheManagerGetHostnamesWithMediaCacheFunction callback)
{
toImpl(mediaCacheManagerRef)->getHostnamesWithMediaCache(ArrayCallback::create(context, callback));
}
void WKMediaCacheManagerClearCacheForHostname(WKMediaCacheManagerRef mediaCacheManagerRef, WKStringRef hostname)
{
toImpl(mediaCacheManagerRef)->clearCacheForHostname(toWTFString(hostname));
}
void WKMediaCacheManagerClearCacheForAllHostnames(WKMediaCacheManagerRef mediaCacheManagerRef)
{
toImpl(mediaCacheManagerRef)->clearCacheForAllHostnames();
}
| gpl-3.0 |
kgrygiel/autoscaler | vertical-pod-autoscaler/vendor/github.com/go-openapi/runtime/client_auth_info.go | 1188 | // Copyright 2015 go-swagger maintainers
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
package runtime
import "github.com/go-openapi/strfmt"
// A ClientAuthInfoWriterFunc converts a function to a request writer interface
type ClientAuthInfoWriterFunc func(ClientRequest, strfmt.Registry) error
// AuthenticateRequest adds authentication data to the request
func (fn ClientAuthInfoWriterFunc) AuthenticateRequest(req ClientRequest, reg strfmt.Registry) error {
return fn(req, reg)
}
// A ClientAuthInfoWriter implementor knows how to write authentication info to a request
type ClientAuthInfoWriter interface {
AuthenticateRequest(ClientRequest, strfmt.Registry) error
}
| apache-2.0 |
GarethNelson/Zoidberg | userland/newlib/newlib/libm/complex/ccosf.c | 1943 | /* $NetBSD: ccosf.c,v 1.1 2007/08/20 16:01:33 drochner Exp $ */
/*-
* Copyright (c) 2007 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software written by Stephen L. Moshier.
* It is redistributed by the NetBSD Foundation by permission of the author.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* imported and modified include for newlib 2010/10/03
* Marco Atzeri <[email protected]>
*/
#include <complex.h>
#include <math.h>
#include "cephes_subrf.h"
float complex
ccosf(float complex z)
{
float complex w;
float ch, sh;
_cchshf(cimagf(z), &ch, &sh);
w = cosf(crealf(z)) * ch - (sinf(crealf(z)) * sh) * I;
return w;
}
| gpl-2.0 |
ernestovi/ups | moodle/mod/quiz/yui/src/dragdrop/js/resource.js | 7887 | /**
* Resource drag and drop.
*
* @class M.course.dragdrop.resource
* @constructor
* @extends M.core.dragdrop
*/
var DRAGRESOURCE = function() {
DRAGRESOURCE.superclass.constructor.apply(this, arguments);
};
Y.extend(DRAGRESOURCE, M.core.dragdrop, {
initializer: function() {
// Set group for parent class
this.groups = ['resource'];
this.samenodeclass = CSS.ACTIVITY;
this.parentnodeclass = CSS.SECTION;
this.resourcedraghandle = this.get_drag_handle(M.util.get_string('move', 'moodle'), CSS.EDITINGMOVE, CSS.ICONCLASS, true);
this.samenodelabel = {
identifier: 'dragtoafter',
component: 'quiz'
};
this.parentnodelabel = {
identifier: 'dragtostart',
component: 'quiz'
};
// Go through all sections
this.setup_for_section();
// Initialise drag & drop for all resources/activities
var nodeselector = 'li.' + CSS.ACTIVITY;
var del = new Y.DD.Delegate({
container: '.' + CSS.COURSECONTENT,
nodes: nodeselector,
target: true,
handles: ['.' + CSS.EDITINGMOVE],
dragConfig: {groups: this.groups}
});
del.dd.plug(Y.Plugin.DDProxy, {
// Don't move the node at the end of the drag
moveOnEnd: false,
cloneNode: true
});
del.dd.plug(Y.Plugin.DDConstrained, {
// Keep it inside the .mod-quiz-edit-content
constrain: '#' + CSS.SLOTS
});
del.dd.plug(Y.Plugin.DDWinScroll);
M.mod_quiz.quizbase.register_module(this);
M.mod_quiz.dragres = this;
},
/**
* Apply dragdrop features to the specified selector or node that refers to section(s)
*
* @method setup_for_section
* @param {String} baseselector The CSS selector or node to limit scope to
*/
setup_for_section: function() {
Y.Node.all('.mod-quiz-edit-content ul.slots ul.section').each(function(resources) {
resources.setAttribute('data-draggroups', this.groups.join(' '));
// Define empty ul as droptarget, so that item could be moved to empty list
new Y.DD.Drop({
node: resources,
groups: this.groups,
padding: '20 0 20 0'
});
// Initialise each resource/activity in this section
this.setup_for_resource('li.activity');
}, this);
},
/**
* Apply dragdrop features to the specified selector or node that refers to resource(s)
*
* @method setup_for_resource
* @param {String} baseselector The CSS selector or node to limit scope to
*/
setup_for_resource: function(baseselector) {
Y.Node.all(baseselector).each(function(resourcesnode) {
// Replace move icons
var move = resourcesnode.one('a.' + CSS.EDITINGMOVE);
if (move) {
move.replace(this.resourcedraghandle.cloneNode(true));
}
}, this);
},
drag_start: function(e) {
// Get our drag object
var drag = e.target;
drag.get('dragNode').setContent(drag.get('node').get('innerHTML'));
drag.get('dragNode').all('img.iconsmall').setStyle('vertical-align', 'baseline');
},
drag_dropmiss: function(e) {
// Missed the target, but we assume the user intended to drop it
// on the last ghost node location, e.drag and e.drop should be
// prepared by global_drag_dropmiss parent so simulate drop_hit(e).
this.drop_hit(e);
},
drop_hit: function(e) {
var drag = e.drag;
// Get a reference to our drag node
var dragnode = drag.get('node');
var dropnode = e.drop.get('node');
// Add spinner if it not there
var actionarea = dragnode.one(CSS.ACTIONAREA);
var spinner = M.util.add_spinner(Y, actionarea);
var params = {};
// Handle any variables which we must pass back through to
var pageparams = this.get('config').pageparams;
var varname;
for (varname in pageparams) {
params[varname] = pageparams[varname];
}
// Prepare request parameters
params.sesskey = M.cfg.sesskey;
params.courseid = this.get('courseid');
params.quizid = this.get('quizid');
params['class'] = 'resource';
params.field = 'move';
params.id = Number(Y.Moodle.mod_quiz.util.slot.getId(dragnode));
params.sectionId = Y.Moodle.core_course.util.section.getId(dropnode.ancestor('li.section', true));
var previousslot = dragnode.previous(SELECTOR.SLOT);
if (previousslot) {
params.previousid = Number(Y.Moodle.mod_quiz.util.slot.getId(previousslot));
}
var previouspage = dragnode.previous(SELECTOR.PAGE);
if (previouspage) {
params.page = Number(Y.Moodle.mod_quiz.util.page.getId(previouspage));
}
// Do AJAX request
var uri = M.cfg.wwwroot + this.get('ajaxurl');
Y.io(uri, {
method: 'POST',
data: params,
on: {
start: function() {
this.lock_drag_handle(drag, CSS.EDITINGMOVE);
spinner.show();
},
success: function(tid, response) {
var responsetext = Y.JSON.parse(response.responseText);
var params = {element: dragnode, visible: responsetext.visible};
M.mod_quiz.quizbase.invoke_function('set_visibility_resource_ui', params);
this.unlock_drag_handle(drag, CSS.EDITINGMOVE);
window.setTimeout(function() {
spinner.hide();
}, 250);
M.mod_quiz.resource_toolbox.reorganise_edit_page();
},
failure: function(tid, response) {
this.ajax_failure(response);
this.unlock_drag_handle(drag, CSS.SECTIONHANDLE);
spinner.hide();
window.location.reload(true);
}
},
context:this
});
},
global_drop_over: function(e) {
//Overriding parent method so we can stop the slots being dragged before the first page node.
// Check that drop object belong to correct group.
if (!e.drop || !e.drop.inGroup(this.groups)) {
return;
}
// Get a reference to our drag and drop nodes.
var drag = e.drag.get('node'),
drop = e.drop.get('node');
// Save last drop target for the case of missed target processing.
this.lastdroptarget = e.drop;
// Are we dropping within the same parent node?
if (drop.hasClass(this.samenodeclass)) {
var where;
if (this.goingup) {
where = "before";
} else {
where = "after";
}
drop.insert(drag, where);
} else if ((drop.hasClass(this.parentnodeclass) || drop.test('[data-droptarget="1"]')) && !drop.contains(drag)) {
// We are dropping on parent node and it is empty
if (this.goingup) {
drop.append(drag);
} else {
drop.prepend(drag);
}
}
this.drop_over(e);
}
}, {
NAME: 'mod_quiz-dragdrop-resource',
ATTRS: {
courseid: {
value: null
},
quizid: {
value: null
},
ajaxurl: {
value: 0
},
config: {
value: 0
}
}
});
M.mod_quiz = M.mod_quiz || {};
M.mod_quiz.init_resource_dragdrop = function(params) {
new DRAGRESOURCE(params);
};
| gpl-3.0 |
SanDisk-Open-Source/SSD_Dashboard | uefi/gcc/gcc-4.6.3/libjava/gnu/xml/xpath/ParenthesizedExpr.h | 1231 |
// DO NOT EDIT THIS FILE - it is machine generated -*- c++ -*-
#ifndef __gnu_xml_xpath_ParenthesizedExpr__
#define __gnu_xml_xpath_ParenthesizedExpr__
#pragma interface
#include <gnu/xml/xpath/Expr.h>
extern "Java"
{
namespace gnu
{
namespace xml
{
namespace xpath
{
class Expr;
class ParenthesizedExpr;
}
}
}
namespace javax
{
namespace xml
{
namespace namespace$
{
class QName;
}
}
}
namespace org
{
namespace w3c
{
namespace dom
{
class Node;
}
}
}
}
class gnu::xml::xpath::ParenthesizedExpr : public ::gnu::xml::xpath::Expr
{
public: // actually package-private
ParenthesizedExpr(::gnu::xml::xpath::Expr *);
public:
::java::lang::Object * evaluate(::org::w3c::dom::Node *, jint, jint);
::gnu::xml::xpath::Expr * clone(::java::lang::Object *);
jboolean references(::javax::xml::namespace$::QName *);
::java::lang::String * toString();
public: // actually package-private
::gnu::xml::xpath::Expr * __attribute__((aligned(__alignof__( ::gnu::xml::xpath::Expr)))) expr;
public:
static ::java::lang::Class class$;
};
#endif // __gnu_xml_xpath_ParenthesizedExpr__
| gpl-2.0 |
chaoling/test123 | linux-2.6.39/arch/arm/plat-omap/include/plat/usb.h | 8719 | // include/asm-arm/mach-omap/usb.h
#ifndef __ASM_ARCH_OMAP_USB_H
#define __ASM_ARCH_OMAP_USB_H
#include <linux/usb/musb.h>
#include <plat/board.h>
#define OMAP3_HS_USB_PORTS 3
enum usbhs_omap_port_mode {
OMAP_USBHS_PORT_MODE_UNUSED,
OMAP_EHCI_PORT_MODE_PHY,
OMAP_EHCI_PORT_MODE_TLL,
OMAP_EHCI_PORT_MODE_HSIC,
OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0,
OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM,
OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0,
OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM,
OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0,
OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM,
OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0,
OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM,
OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0,
OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM
};
struct usbhs_omap_board_data {
enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
/* have to be valid if phy_reset is true and portx is in phy mode */
int reset_gpio_port[OMAP3_HS_USB_PORTS];
/* Set this to true for ES2.x silicon */
unsigned es2_compatibility:1;
unsigned phy_reset:1;
/*
* Regulators for USB PHYs.
* Each PHY can have a separate regulator.
*/
struct regulator *regulator[OMAP3_HS_USB_PORTS];
};
struct ehci_hcd_omap_platform_data {
enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
int reset_gpio_port[OMAP3_HS_USB_PORTS];
struct regulator *regulator[OMAP3_HS_USB_PORTS];
unsigned phy_reset:1;
};
struct ohci_hcd_omap_platform_data {
enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
unsigned es2_compatibility:1;
};
struct usbhs_omap_platform_data {
enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
struct ehci_hcd_omap_platform_data *ehci_data;
struct ohci_hcd_omap_platform_data *ohci_data;
};
/*-------------------------------------------------------------------------*/
#define OMAP1_OTG_BASE 0xfffb0400
#define OMAP1_UDC_BASE 0xfffb4000
#define OMAP1_OHCI_BASE 0xfffba000
#define OMAP2_OHCI_BASE 0x4805e000
#define OMAP2_UDC_BASE 0x4805e200
#define OMAP2_OTG_BASE 0x4805e300
#ifdef CONFIG_ARCH_OMAP1
#define OTG_BASE OMAP1_OTG_BASE
#define UDC_BASE OMAP1_UDC_BASE
#define OMAP_OHCI_BASE OMAP1_OHCI_BASE
#else
#define OTG_BASE OMAP2_OTG_BASE
#define UDC_BASE OMAP2_UDC_BASE
#define OMAP_OHCI_BASE OMAP2_OHCI_BASE
struct omap_musb_board_data {
u8 interface_type;
u8 mode;
u16 power;
unsigned extvbus:1;
void (*set_phy_power)(u8 on);
void (*clear_irq)(void);
void (*set_mode)(u8 mode);
void (*reset)(void);
};
enum musb_interface {MUSB_INTERFACE_ULPI, MUSB_INTERFACE_UTMI};
extern void usb_musb_init(struct omap_musb_board_data *board_data);
extern void usbhs_init(const struct usbhs_omap_board_data *pdata);
extern int omap_usbhs_enable(struct device *dev);
extern void omap_usbhs_disable(struct device *dev);
extern int omap4430_phy_power(struct device *dev, int ID, int on);
extern int omap4430_phy_set_clk(struct device *dev, int on);
extern int omap4430_phy_init(struct device *dev);
extern int omap4430_phy_exit(struct device *dev);
extern int omap4430_phy_suspend(struct device *dev, int suspend);
#endif
extern void am35x_musb_reset(void);
extern void am35x_musb_phy_power(u8 on);
extern void am35x_musb_clear_irq(void);
extern void am35x_musb_set_mode(u8 musb_mode);
/*
* FIXME correct answer depends on hmc_mode,
* as does (on omap1) any nonzero value for config->otg port number
*/
#ifdef CONFIG_USB_GADGET_OMAP
#define is_usb0_device(config) 1
#else
#define is_usb0_device(config) 0
#endif
void omap_otg_init(struct omap_usb_config *config);
#if defined(CONFIG_USB) || defined(CONFIG_USB_MODULE)
void omap1_usb_init(struct omap_usb_config *pdata);
#else
static inline void omap1_usb_init(struct omap_usb_config *pdata)
{
}
#endif
#if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP_OTG_MODULE)
void omap2_usbfs_init(struct omap_usb_config *pdata);
#else
static inline void omap2_usbfs_init(struct omap_usb_config *pdata)
{
}
#endif
/*-------------------------------------------------------------------------*/
/*
* OTG and transceiver registers, for OMAPs starting with ARM926
*/
#define OTG_REV (OTG_BASE + 0x00)
#define OTG_SYSCON_1 (OTG_BASE + 0x04)
# define USB2_TRX_MODE(w) (((w)>>24)&0x07)
# define USB1_TRX_MODE(w) (((w)>>20)&0x07)
# define USB0_TRX_MODE(w) (((w)>>16)&0x07)
# define OTG_IDLE_EN (1 << 15)
# define HST_IDLE_EN (1 << 14)
# define DEV_IDLE_EN (1 << 13)
# define OTG_RESET_DONE (1 << 2)
# define OTG_SOFT_RESET (1 << 1)
#define OTG_SYSCON_2 (OTG_BASE + 0x08)
# define OTG_EN (1 << 31)
# define USBX_SYNCHRO (1 << 30)
# define OTG_MST16 (1 << 29)
# define SRP_GPDATA (1 << 28)
# define SRP_GPDVBUS (1 << 27)
# define SRP_GPUVBUS(w) (((w)>>24)&0x07)
# define A_WAIT_VRISE(w) (((w)>>20)&0x07)
# define B_ASE_BRST(w) (((w)>>16)&0x07)
# define SRP_DPW (1 << 14)
# define SRP_DATA (1 << 13)
# define SRP_VBUS (1 << 12)
# define OTG_PADEN (1 << 10)
# define HMC_PADEN (1 << 9)
# define UHOST_EN (1 << 8)
# define HMC_TLLSPEED (1 << 7)
# define HMC_TLLATTACH (1 << 6)
# define OTG_HMC(w) (((w)>>0)&0x3f)
#define OTG_CTRL (OTG_BASE + 0x0c)
# define OTG_USB2_EN (1 << 29)
# define OTG_USB2_DP (1 << 28)
# define OTG_USB2_DM (1 << 27)
# define OTG_USB1_EN (1 << 26)
# define OTG_USB1_DP (1 << 25)
# define OTG_USB1_DM (1 << 24)
# define OTG_USB0_EN (1 << 23)
# define OTG_USB0_DP (1 << 22)
# define OTG_USB0_DM (1 << 21)
# define OTG_ASESSVLD (1 << 20)
# define OTG_BSESSEND (1 << 19)
# define OTG_BSESSVLD (1 << 18)
# define OTG_VBUSVLD (1 << 17)
# define OTG_ID (1 << 16)
# define OTG_DRIVER_SEL (1 << 15)
# define OTG_A_SETB_HNPEN (1 << 12)
# define OTG_A_BUSREQ (1 << 11)
# define OTG_B_HNPEN (1 << 9)
# define OTG_B_BUSREQ (1 << 8)
# define OTG_BUSDROP (1 << 7)
# define OTG_PULLDOWN (1 << 5)
# define OTG_PULLUP (1 << 4)
# define OTG_DRV_VBUS (1 << 3)
# define OTG_PD_VBUS (1 << 2)
# define OTG_PU_VBUS (1 << 1)
# define OTG_PU_ID (1 << 0)
#define OTG_IRQ_EN (OTG_BASE + 0x10) /* 16-bit */
# define DRIVER_SWITCH (1 << 15)
# define A_VBUS_ERR (1 << 13)
# define A_REQ_TMROUT (1 << 12)
# define A_SRP_DETECT (1 << 11)
# define B_HNP_FAIL (1 << 10)
# define B_SRP_TMROUT (1 << 9)
# define B_SRP_DONE (1 << 8)
# define B_SRP_STARTED (1 << 7)
# define OPRT_CHG (1 << 0)
#define OTG_IRQ_SRC (OTG_BASE + 0x14) /* 16-bit */
// same bits as in IRQ_EN
#define OTG_OUTCTRL (OTG_BASE + 0x18) /* 16-bit */
# define OTGVPD (1 << 14)
# define OTGVPU (1 << 13)
# define OTGPUID (1 << 12)
# define USB2VDR (1 << 10)
# define USB2PDEN (1 << 9)
# define USB2PUEN (1 << 8)
# define USB1VDR (1 << 6)
# define USB1PDEN (1 << 5)
# define USB1PUEN (1 << 4)
# define USB0VDR (1 << 2)
# define USB0PDEN (1 << 1)
# define USB0PUEN (1 << 0)
#define OTG_TEST (OTG_BASE + 0x20) /* 16-bit */
#define OTG_VENDOR_CODE (OTG_BASE + 0xfc) /* 16-bit */
/*-------------------------------------------------------------------------*/
/* OMAP1 */
#define USB_TRANSCEIVER_CTRL (0xfffe1000 + 0x0064)
# define CONF_USB2_UNI_R (1 << 8)
# define CONF_USB1_UNI_R (1 << 7)
# define CONF_USB_PORT0_R(x) (((x)>>4)&0x7)
# define CONF_USB0_ISOLATE_R (1 << 3)
# define CONF_USB_PWRDN_DM_R (1 << 2)
# define CONF_USB_PWRDN_DP_R (1 << 1)
/* OMAP2 */
# define USB_UNIDIR 0x0
# define USB_UNIDIR_TLL 0x1
# define USB_BIDIR 0x2
# define USB_BIDIR_TLL 0x3
# define USBTXWRMODEI(port, x) ((x) << (22 - (port * 2)))
# define USBT2TLL5PI (1 << 17)
# define USB0PUENACTLOI (1 << 16)
# define USBSTANDBYCTRL (1 << 15)
/* AM35x */
/* USB 2.0 PHY Control */
#define CONF2_PHY_GPIOMODE (1 << 23)
#define CONF2_OTGMODE (3 << 14)
#define CONF2_NO_OVERRIDE (0 << 14)
#define CONF2_FORCE_HOST (1 << 14)
#define CONF2_FORCE_DEVICE (2 << 14)
#define CONF2_FORCE_HOST_VBUS_LOW (3 << 14)
#define CONF2_SESENDEN (1 << 13)
#define CONF2_VBDTCTEN (1 << 12)
#define CONF2_REFFREQ_24MHZ (2 << 8)
#define CONF2_REFFREQ_26MHZ (7 << 8)
#define CONF2_REFFREQ_13MHZ (6 << 8)
#define CONF2_REFFREQ (0xf << 8)
#define CONF2_PHYCLKGD (1 << 7)
#define CONF2_VBUSSENSE (1 << 6)
#define CONF2_PHY_PLLON (1 << 5)
#define CONF2_RESET (1 << 4)
#define CONF2_PHYPWRDN (1 << 3)
#define CONF2_OTGPWRDN (1 << 2)
#define CONF2_DATPOL (1 << 1)
#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_USB)
u32 omap1_usb0_init(unsigned nwires, unsigned is_device);
u32 omap1_usb1_init(unsigned nwires);
u32 omap1_usb2_init(unsigned nwires, unsigned alt_pingroup);
#else
static inline u32 omap1_usb0_init(unsigned nwires, unsigned is_device)
{
return 0;
}
static inline u32 omap1_usb1_init(unsigned nwires)
{
return 0;
}
static inline u32 omap1_usb2_init(unsigned nwires, unsigned alt_pingroup)
{
return 0;
}
#endif
#endif /* __ASM_ARCH_OMAP_USB_H */
| gpl-2.0 |
luanlzsn/pos | pos/Carthage/Checkouts/MJRefresh/MJRefreshExample/Classes/Second/MJTestViewController.h | 659 | // 代码地址: https://github.com/CoderMJLee/MJRefresh
// 代码地址: http://code4app.com/ios/%E5%BF%AB%E9%80%9F%E9%9B%86%E6%88%90%E4%B8%8B%E6%8B%89%E4%B8%8A%E6%8B%89%E5%88%B7%E6%96%B0/52326ce26803fabc46000000
// MJTestViewController.h
// MJRefreshExample
//
// Created by MJ Lee on 14-5-28.
// Copyright (c) 2014年 小码哥. All rights reserved.
//
#import <UIKit/UIKit.h>
#define MJPerformSelectorLeakWarning(Stuff) \
do { \
_Pragma("clang diagnostic push") \
_Pragma("clang diagnostic ignored \"-Warc-performSelector-leaks\"") \
Stuff; \
_Pragma("clang diagnostic pop") \
} while (0)
@interface MJTestViewController : UIViewController
@end
| mit |
lawrenceAIO/meteor | packages/ddp-common/heartbeat.js | 3044 | // Heartbeat options:
// heartbeatInterval: interval to send pings, in milliseconds.
// heartbeatTimeout: timeout to close the connection if a reply isn't
// received, in milliseconds.
// sendPing: function to call to send a ping on the connection.
// onTimeout: function to call to close the connection.
DDPCommon.Heartbeat = function (options) {
var self = this;
self.heartbeatInterval = options.heartbeatInterval;
self.heartbeatTimeout = options.heartbeatTimeout;
self._sendPing = options.sendPing;
self._onTimeout = options.onTimeout;
self._seenPacket = false;
self._heartbeatIntervalHandle = null;
self._heartbeatTimeoutHandle = null;
};
_.extend(DDPCommon.Heartbeat.prototype, {
stop: function () {
var self = this;
self._clearHeartbeatIntervalTimer();
self._clearHeartbeatTimeoutTimer();
},
start: function () {
var self = this;
self.stop();
self._startHeartbeatIntervalTimer();
},
_startHeartbeatIntervalTimer: function () {
var self = this;
self._heartbeatIntervalHandle = Meteor.setInterval(
_.bind(self._heartbeatIntervalFired, self),
self.heartbeatInterval
);
},
_startHeartbeatTimeoutTimer: function () {
var self = this;
self._heartbeatTimeoutHandle = Meteor.setTimeout(
_.bind(self._heartbeatTimeoutFired, self),
self.heartbeatTimeout
);
},
_clearHeartbeatIntervalTimer: function () {
var self = this;
if (self._heartbeatIntervalHandle) {
Meteor.clearInterval(self._heartbeatIntervalHandle);
self._heartbeatIntervalHandle = null;
}
},
_clearHeartbeatTimeoutTimer: function () {
var self = this;
if (self._heartbeatTimeoutHandle) {
Meteor.clearTimeout(self._heartbeatTimeoutHandle);
self._heartbeatTimeoutHandle = null;
}
},
// The heartbeat interval timer is fired when we should send a ping.
_heartbeatIntervalFired: function () {
var self = this;
// don't send ping if we've seen a packet since we last checked,
// *or* if we have already sent a ping and are awaiting a timeout.
// That shouldn't happen, but it's possible if
// `self.heartbeatInterval` is smaller than
// `self.heartbeatTimeout`.
if (! self._seenPacket && ! self._heartbeatTimeoutHandle) {
self._sendPing();
// Set up timeout, in case a pong doesn't arrive in time.
self._startHeartbeatTimeoutTimer();
}
self._seenPacket = false;
},
// The heartbeat timeout timer is fired when we sent a ping, but we
// timed out waiting for the pong.
_heartbeatTimeoutFired: function () {
var self = this;
self._heartbeatTimeoutHandle = null;
self._onTimeout();
},
messageReceived: function () {
var self = this;
// Tell periodic checkin that we have seen a packet, and thus it
// does not need to send a ping this cycle.
self._seenPacket = true;
// If we were waiting for a pong, we got it.
if (self._heartbeatTimeoutHandle) {
self._clearHeartbeatTimeoutTimer();
}
}
});
| mit |
selmentdev/selment-toolchain | source/gcc-latest/libatomic/fxor_n.c | 64 | #define NAME xor
#define OP(X,Y) ((X) ^ (Y))
#include "fop_n.c"
| gpl-3.0 |
WangWenjun559/Weiss | summary/sumy/sklearn/src/cblas/atlas_reflvl2.h | 61630 | /* ---------------------------------------------------------------------
*
* -- Automatically Tuned Linear Algebra Software (ATLAS)
* (C) Copyright 2000 All Rights Reserved
*
* -- ATLAS routine -- Version 3.2 -- December 25, 2000
*
* -- Suggestions, comments, bugs reports should be sent to the follo-
* wing e-mail address: [email protected]
*
* Author : Antoine P. Petitet
* University of Tennessee - Innovative Computing Laboratory
* Knoxville TN, 37996-1301, USA.
*
* ---------------------------------------------------------------------
*
* -- Copyright notice and Licensing terms:
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions, and the following disclaimer in
* the documentation and/or other materials provided with the distri-
* bution.
* 3. The name of the University, the ATLAS group, or the names of its
* contributors may not be used to endorse or promote products deri-
* ved from this software without specific written permission.
*
* -- Disclaimer:
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY
* OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPE-
* CIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEO-
* RY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (IN-
* CLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* ---------------------------------------------------------------------
*/
#ifndef ATLAS_REFLVL2_H
#define ATLAS_REFLVL2_H
/*
* =====================================================================
* Prototypes for Level 2 Reference Internal ATLAS BLAS routines
* =====================================================================
*/
void ATL_srefgbmvN
(
const int, const int,
const int, const int,
const float,
const float *, const int,
const float *, const int,
const float,
float *, const int
);
void ATL_srefgbmvT
(
const int, const int,
const int, const int,
const float,
const float *, const int,
const float *, const int,
const float,
float *, const int
);
void ATL_srefgpmvUN
(
const int, const int,
const float,
const float *, const int,
const float *, const int,
const float,
float *, const int
);
void ATL_srefgpmvUT
(
const int, const int,
const float,
const float *, const int,
const float *, const int,
const float,
float *, const int
);
void ATL_srefgpmvLN
(
const int, const int,
const float,
const float *, const int,
const float *, const int,
const float,
float *, const int
);
void ATL_srefgpmvLT
(
const int, const int,
const float,
const float *, const int,
const float *, const int,
const float,
float *, const int
);
void ATL_srefgemvN
(
const int, const int,
const float,
const float *, const int,
const float *, const int,
const float,
float *, const int
);
void ATL_srefgemvT
(
const int, const int,
const float,
const float *, const int,
const float *, const int,
const float,
float *, const int
);
void ATL_srefgprL
(
const int, const int,
const float,
const float *, const int,
const float *, const int,
float *, const int
);
void ATL_srefgprU
(
const int, const int,
const float,
const float *, const int,
const float *, const int,
float *, const int
);
void ATL_srefsbmvL
(
const int, const int,
const float,
const float *, const int,
const float *, const int,
const float,
float *, const int
);
void ATL_srefsbmvU
(
const int, const int,
const float,
const float *, const int,
const float *, const int,
const float,
float *, const int
);
void ATL_srefspmvL
(
const int,
const float,
const float *, const int,
const float *, const int,
const float,
float *, const int
);
void ATL_srefspmvU
(
const int,
const float,
const float *, const int,
const float *, const int,
const float,
float *, const int
);
void ATL_srefsprL
(
const int,
const float,
const float *, const int,
float *, const int
);
void ATL_srefsprU
(
const int,
const float,
const float *, const int,
float *, const int
);
void ATL_srefspr2L
(
const int,
const float,
const float *, const int,
const float *, const int,
float *, const int
);
void ATL_srefspr2U
(
const int,
const float,
const float *, const int,
const float *, const int,
float *, const int
);
void ATL_srefsymvL
(
const int,
const float,
const float *, const int,
const float *, const int,
const float,
float *, const int
);
void ATL_srefsymvU
(
const int,
const float,
const float *, const int,
const float *, const int,
const float,
float *, const int
);
void ATL_srefsyrL
(
const int,
const float,
const float *, const int,
float *, const int
);
void ATL_srefsyrU
(
const int,
const float,
const float *, const int,
float *, const int
);
void ATL_srefsyr2L
(
const int,
const float,
const float *, const int,
const float *, const int,
float *, const int
);
void ATL_srefsyr2U
(
const int,
const float,
const float *, const int,
const float *, const int,
float *, const int
);
void ATL_sreftbmvLNN
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_sreftbmvLNU
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_sreftbmvLTN
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_sreftbmvLTU
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_sreftbmvUNN
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_sreftbmvUNU
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_sreftbmvUTN
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_sreftbmvUTU
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_sreftpmvLNN
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftpmvLNU
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftpmvLTN
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftpmvLTU
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftpmvUNN
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftpmvUNU
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftpmvUTN
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftpmvUTU
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftrmvLNN
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftrmvLNU
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftrmvLTN
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftrmvLTU
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftrmvUNN
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftrmvUNU
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftrmvUTN
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftrmvUTU
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftbsvLNN
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_sreftbsvLNU
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_sreftbsvLTN
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_sreftbsvLTU
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_sreftbsvUNN
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_sreftbsvUNU
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_sreftbsvUTN
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_sreftbsvUTU
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_sreftpsvLNN
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftpsvLNU
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftpsvLTN
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftpsvLTU
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftpsvUNN
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftpsvUNU
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftpsvUTN
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftpsvUTU
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftrsvLNN
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftrsvLNU
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftrsvLTN
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftrsvLTU
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftrsvUNN
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftrsvUNU
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftrsvUTN
(
const int,
const float *, const int,
float *, const int
);
void ATL_sreftrsvUTU
(
const int,
const float *, const int,
float *, const int
);
void ATL_drefgbmvN
(
const int, const int,
const int, const int,
const double,
const double *, const int,
const double *, const int,
const double,
double *, const int
);
void ATL_drefgbmvT
(
const int, const int,
const int, const int,
const double,
const double *, const int,
const double *, const int,
const double,
double *, const int
);
void ATL_drefgpmvUN
(
const int, const int,
const double,
const double *, const int,
const double *, const int,
const double,
double *, const int
);
void ATL_drefgpmvUT
(
const int, const int,
const double,
const double *, const int,
const double *, const int,
const double,
double *, const int
);
void ATL_drefgpmvLN
(
const int, const int,
const double,
const double *, const int,
const double *, const int,
const double,
double *, const int
);
void ATL_drefgpmvLT
(
const int, const int,
const double,
const double *, const int,
const double *, const int,
const double,
double *, const int
);
void ATL_drefgemvN
(
const int, const int,
const double,
const double *, const int,
const double *, const int,
const double,
double *, const int
);
void ATL_drefgemvT
(
const int, const int,
const double,
const double *, const int,
const double *, const int,
const double,
double *, const int
);
void ATL_drefgprL
(
const int, const int,
const double,
const double *, const int,
const double *, const int,
double *, const int
);
void ATL_drefgprU
(
const int, const int,
const double,
const double *, const int,
const double *, const int,
double *, const int
);
void ATL_drefsbmvL
(
const int, const int,
const double,
const double *, const int,
const double *, const int,
const double,
double *, const int
);
void ATL_drefsbmvU
(
const int, const int,
const double,
const double *, const int,
const double *, const int,
const double,
double *, const int
);
void ATL_drefspmvL
(
const int,
const double,
const double *, const int,
const double *, const int,
const double,
double *, const int
);
void ATL_drefspmvU
(
const int,
const double,
const double *, const int,
const double *, const int,
const double,
double *, const int
);
void ATL_drefsprL
(
const int,
const double,
const double *, const int,
double *, const int
);
void ATL_drefsprU
(
const int,
const double,
const double *, const int,
double *, const int
);
void ATL_drefspr2L
(
const int,
const double,
const double *, const int,
const double *, const int,
double *, const int
);
void ATL_drefspr2U
(
const int,
const double,
const double *, const int,
const double *, const int,
double *, const int
);
void ATL_drefsymvL
(
const int,
const double,
const double *, const int,
const double *, const int,
const double,
double *, const int
);
void ATL_drefsymvU
(
const int,
const double,
const double *, const int,
const double *, const int,
const double,
double *, const int
);
void ATL_drefsyrL
(
const int,
const double,
const double *, const int,
double *, const int
);
void ATL_drefsyrU
(
const int,
const double,
const double *, const int,
double *, const int
);
void ATL_drefsyr2L
(
const int,
const double,
const double *, const int,
const double *, const int,
double *, const int
);
void ATL_drefsyr2U
(
const int,
const double,
const double *, const int,
const double *, const int,
double *, const int
);
void ATL_dreftbmvLNN
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_dreftbmvLNU
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_dreftbmvLTN
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_dreftbmvLTU
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_dreftbmvUNN
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_dreftbmvUNU
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_dreftbmvUTN
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_dreftbmvUTU
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_dreftpmvLNN
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftpmvLNU
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftpmvLTN
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftpmvLTU
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftpmvUNN
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftpmvUNU
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftpmvUTN
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftpmvUTU
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftrmvLNN
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftrmvLNU
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftrmvLTN
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftrmvLTU
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftrmvUNN
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftrmvUNU
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftrmvUTN
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftrmvUTU
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftbsvLNN
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_dreftbsvLNU
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_dreftbsvLTN
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_dreftbsvLTU
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_dreftbsvUNN
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_dreftbsvUNU
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_dreftbsvUTN
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_dreftbsvUTU
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_dreftpsvLNN
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftpsvLNU
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftpsvLTN
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftpsvLTU
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftpsvUNN
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftpsvUNU
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftpsvUTN
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftpsvUTU
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftrsvLNN
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftrsvLNU
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftrsvLTN
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftrsvLTU
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftrsvUNN
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftrsvUNU
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftrsvUTN
(
const int,
const double *, const int,
double *, const int
);
void ATL_dreftrsvUTU
(
const int,
const double *, const int,
double *, const int
);
void ATL_crefgbmvN
(
const int, const int,
const int, const int,
const float *,
const float *, const int,
const float *, const int,
const float *,
float *, const int
);
void ATL_crefgbmvT
(
const int, const int,
const int, const int,
const float *,
const float *, const int,
const float *, const int,
const float *,
float *, const int
);
void ATL_crefgbmvC
(
const int, const int,
const int, const int,
const float *,
const float *, const int,
const float *, const int,
const float *,
float *, const int
);
void ATL_crefgbmvH
(
const int, const int,
const int, const int,
const float *,
const float *, const int,
const float *, const int,
const float *,
float *, const int
);
void ATL_crefgpmvUN
(
const int, const int,
const float *,
const float *, const int,
const float *, const int,
const float *,
float *, const int
);
void ATL_crefgpmvUT
(
const int, const int,
const float *,
const float *, const int,
const float *, const int,
const float *,
float *, const int
);
void ATL_crefgpmvUC
(
const int, const int,
const float *,
const float *, const int,
const float *, const int,
const float *,
float *, const int
);
void ATL_crefgpmvUH
(
const int, const int,
const float *,
const float *, const int,
const float *, const int,
const float *,
float *, const int
);
void ATL_crefgpmvLN
(
const int, const int,
const float *,
const float *, const int,
const float *, const int,
const float *,
float *, const int
);
void ATL_crefgpmvLT
(
const int, const int,
const float *,
const float *, const int,
const float *, const int,
const float *,
float *, const int
);
void ATL_crefgpmvLC
(
const int, const int,
const float *,
const float *, const int,
const float *, const int,
const float *,
float *, const int
);
void ATL_crefgpmvLH
(
const int, const int,
const float *,
const float *, const int,
const float *, const int,
const float *,
float *, const int
);
void ATL_crefgemvN
(
const int, const int,
const float *,
const float *, const int,
const float *, const int,
const float *,
float *, const int
);
void ATL_crefgemvT
(
const int, const int,
const float *,
const float *, const int,
const float *, const int,
const float *,
float *, const int
);
void ATL_crefgemvC
(
const int, const int,
const float *,
const float *, const int,
const float *, const int,
const float *,
float *, const int
);
void ATL_crefgemvH
(
const int, const int,
const float *,
const float *, const int,
const float *, const int,
const float *,
float *, const int
);
void ATL_crefgprcL
(
const int, const int,
const float *,
const float *, const int,
const float *, const int,
float *, const int
);
void ATL_crefgprcU
(
const int, const int,
const float *,
const float *, const int,
const float *, const int,
float *, const int
);
void ATL_crefgpruL
(
const int, const int,
const float *,
const float *, const int,
const float *, const int,
float *, const int
);
void ATL_crefgpruU
(
const int, const int,
const float *,
const float *, const int,
const float *, const int,
float *, const int
);
void ATL_crefhbmvL
(
const int, const int,
const float *,
const float *, const int,
const float *, const int,
const float *,
float *, const int
);
void ATL_crefhbmvU
(
const int, const int,
const float *,
const float *, const int,
const float *, const int,
const float *,
float *, const int
);
void ATL_crefhpmvL
(
const int,
const float *,
const float *, const int,
const float *, const int,
const float *,
float *, const int
);
void ATL_crefhpmvU
(
const int,
const float *,
const float *, const int,
const float *, const int,
const float *,
float *, const int
);
void ATL_crefhprL
(
const int,
const float,
const float *, const int,
float *, const int
);
void ATL_crefhprU
(
const int,
const float,
const float *, const int,
float *, const int
);
void ATL_crefhpr2L
(
const int,
const float *,
const float *, const int,
const float *, const int,
float *, const int
);
void ATL_crefhpr2U
(
const int,
const float *,
const float *, const int,
const float *, const int,
float *, const int
);
void ATL_crefhemvL
(
const int,
const float *,
const float *, const int,
const float *, const int,
const float *,
float *, const int
);
void ATL_crefhemvU
(
const int,
const float *,
const float *, const int,
const float *, const int,
const float *,
float *, const int
);
void ATL_crefherL
(
const int,
const float,
const float *, const int,
float *, const int
);
void ATL_crefherU
(
const int,
const float,
const float *, const int,
float *, const int
);
void ATL_crefher2L
(
const int,
const float *,
const float *, const int,
const float *, const int,
float *, const int
);
void ATL_crefher2U
(
const int,
const float *,
const float *, const int,
const float *, const int,
float *, const int
);
void ATL_creftbmvLNN
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbmvLNU
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbmvLTN
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbmvLTU
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbmvLCN
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbmvLCU
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbmvLHN
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbmvLHU
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbmvUNN
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbmvUNU
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbmvUTN
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbmvUTU
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbmvUCN
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbmvUCU
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbmvUHN
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbmvUHU
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftpmvLNN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpmvLNU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpmvLTN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpmvLTU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpmvLCN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpmvLCU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpmvLHN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpmvLHU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpmvUNN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpmvUNU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpmvUTN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpmvUTU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpmvUCN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpmvUCU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpmvUHN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpmvUHU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrmvLNN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrmvLNU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrmvLTN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrmvLTU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrmvLCN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrmvLCU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrmvLHN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrmvLHU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrmvUNN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrmvUNU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrmvUTN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrmvUTU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrmvUCN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrmvUCU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrmvUHN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrmvUHU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftbsvLNN
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbsvLNU
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbsvLTN
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbsvLTU
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbsvLCN
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbsvLCU
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbsvLHN
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbsvLHU
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbsvUNN
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbsvUNU
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbsvUTN
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbsvUTU
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbsvUCN
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbsvUCU
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbsvUHN
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftbsvUHU
(
const int, const int,
const float *, const int,
float *, const int
);
void ATL_creftpsvLNN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpsvLNU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpsvLTN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpsvLTU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpsvLCN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpsvLCU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpsvLHN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpsvLHU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpsvUNN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpsvUNU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpsvUTN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpsvUTU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpsvUCN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpsvUCU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpsvUHN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftpsvUHU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrsvLNN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrsvLNU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrsvLTN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrsvLTU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrsvLCN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrsvLCU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrsvLHN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrsvLHU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrsvUNN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrsvUNU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrsvUTN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrsvUTU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrsvUCN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrsvUCU
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrsvUHN
(
const int,
const float *, const int,
float *, const int
);
void ATL_creftrsvUHU
(
const int,
const float *, const int,
float *, const int
);
void ATL_zrefgbmvN
(
const int, const int,
const int, const int,
const double *,
const double *, const int,
const double *, const int,
const double *,
double *, const int
);
void ATL_zrefgbmvT
(
const int, const int,
const int, const int,
const double *,
const double *, const int,
const double *, const int,
const double *,
double *, const int
);
void ATL_zrefgbmvC
(
const int, const int,
const int, const int,
const double *,
const double *, const int,
const double *, const int,
const double *,
double *, const int
);
void ATL_zrefgbmvH
(
const int, const int,
const int, const int,
const double *,
const double *, const int,
const double *, const int,
const double *,
double *, const int
);
void ATL_zrefgpmvUN
(
const int, const int,
const double *,
const double *, const int,
const double *, const int,
const double *,
double *, const int
);
void ATL_zrefgpmvUT
(
const int, const int,
const double *,
const double *, const int,
const double *, const int,
const double *,
double *, const int
);
void ATL_zrefgpmvUC
(
const int, const int,
const double *,
const double *, const int,
const double *, const int,
const double *,
double *, const int
);
void ATL_zrefgpmvUH
(
const int, const int,
const double *,
const double *, const int,
const double *, const int,
const double *,
double *, const int
);
void ATL_zrefgpmvLN
(
const int, const int,
const double *,
const double *, const int,
const double *, const int,
const double *,
double *, const int
);
void ATL_zrefgpmvLT
(
const int, const int,
const double *,
const double *, const int,
const double *, const int,
const double *,
double *, const int
);
void ATL_zrefgpmvLC
(
const int, const int,
const double *,
const double *, const int,
const double *, const int,
const double *,
double *, const int
);
void ATL_zrefgpmvLH
(
const int, const int,
const double *,
const double *, const int,
const double *, const int,
const double *,
double *, const int
);
void ATL_zrefgemvN
(
const int, const int,
const double *,
const double *, const int,
const double *, const int,
const double *,
double *, const int
);
void ATL_zrefgemvT
(
const int, const int,
const double *,
const double *, const int,
const double *, const int,
const double *,
double *, const int
);
void ATL_zrefgemvC
(
const int, const int,
const double *,
const double *, const int,
const double *, const int,
const double *,
double *, const int
);
void ATL_zrefgemvH
(
const int, const int,
const double *,
const double *, const int,
const double *, const int,
const double *,
double *, const int
);
void ATL_zrefgprcL
(
const int, const int,
const double *,
const double *, const int,
const double *, const int,
double *, const int
);
void ATL_zrefgprcU
(
const int, const int,
const double *,
const double *, const int,
const double *, const int,
double *, const int
);
void ATL_zrefgpruL
(
const int, const int,
const double *,
const double *, const int,
const double *, const int,
double *, const int
);
void ATL_zrefgpruU
(
const int, const int,
const double *,
const double *, const int,
const double *, const int,
double *, const int
);
void ATL_zrefhbmvL
(
const int, const int,
const double *,
const double *, const int,
const double *, const int,
const double *,
double *, const int
);
void ATL_zrefhbmvU
(
const int, const int,
const double *,
const double *, const int,
const double *, const int,
const double *,
double *, const int
);
void ATL_zrefhpmvL
(
const int,
const double *,
const double *, const int,
const double *, const int,
const double *,
double *, const int
);
void ATL_zrefhpmvU
(
const int,
const double *,
const double *, const int,
const double *, const int,
const double *,
double *, const int
);
void ATL_zrefhprL
(
const int,
const double,
const double *, const int,
double *, const int
);
void ATL_zrefhprU
(
const int,
const double,
const double *, const int,
double *, const int
);
void ATL_zrefhpr2L
(
const int,
const double *,
const double *, const int,
const double *, const int,
double *, const int
);
void ATL_zrefhpr2U
(
const int,
const double *,
const double *, const int,
const double *, const int,
double *, const int
);
void ATL_zrefhemvL
(
const int,
const double *,
const double *, const int,
const double *, const int,
const double *,
double *, const int
);
void ATL_zrefhemvU
(
const int,
const double *,
const double *, const int,
const double *, const int,
const double *,
double *, const int
);
void ATL_zrefherL
(
const int,
const double,
const double *, const int,
double *, const int
);
void ATL_zrefherU
(
const int,
const double,
const double *, const int,
double *, const int
);
void ATL_zrefher2L
(
const int,
const double *,
const double *, const int,
const double *, const int,
double *, const int
);
void ATL_zrefher2U
(
const int,
const double *,
const double *, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbmvLNN
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbmvLNU
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbmvLTN
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbmvLTU
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbmvLCN
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbmvLCU
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbmvLHN
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbmvLHU
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbmvUNN
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbmvUNU
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbmvUTN
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbmvUTU
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbmvUCN
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbmvUCU
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbmvUHN
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbmvUHU
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftpmvLNN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpmvLNU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpmvLTN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpmvLTU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpmvLCN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpmvLCU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpmvLHN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpmvLHU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpmvUNN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpmvUNU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpmvUTN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpmvUTU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpmvUCN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpmvUCU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpmvUHN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpmvUHU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrmvLNN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrmvLNU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrmvLTN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrmvLTU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrmvLCN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrmvLCU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrmvLHN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrmvLHU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrmvUNN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrmvUNU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrmvUTN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrmvUTU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrmvUCN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrmvUCU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrmvUHN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrmvUHU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftbsvLNN
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbsvLNU
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbsvLTN
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbsvLTU
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbsvLCN
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbsvLCU
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbsvLHN
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbsvLHU
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbsvUNN
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbsvUNU
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbsvUTN
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbsvUTU
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbsvUCN
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbsvUCU
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbsvUHN
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftbsvUHU
(
const int, const int,
const double *, const int,
double *, const int
);
void ATL_zreftpsvLNN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpsvLNU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpsvLTN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpsvLTU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpsvLCN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpsvLCU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpsvLHN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpsvLHU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpsvUNN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpsvUNU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpsvUTN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpsvUTU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpsvUCN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpsvUCU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpsvUHN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftpsvUHU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrsvLNN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrsvLNU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrsvLTN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrsvLTU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrsvLCN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrsvLCU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrsvLHN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrsvLHU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrsvUNN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrsvUNU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrsvUTN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrsvUTU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrsvUCN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrsvUCU
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrsvUHN
(
const int,
const double *, const int,
double *, const int
);
void ATL_zreftrsvUHU
(
const int,
const double *, const int,
double *, const int
);
#endif
/*
* End of atlas_reflvl2.h
*/
| apache-2.0 |
DamascenoRafael/cos482-qualidade-de-software | www/src/main/webapp/bower_components/angular-i18n/nl-cw.js | 64 | require('./angular-locale_nl-cw');
module.exports = 'ngLocale';
| mit |
SanDisk-Open-Source/SSD_Dashboard | uefi/gcc/gcc-4.6.3/libjava/javax/swing/plaf/basic/BasicTabbedPaneUI$NavigatePageUpAction.h | 962 |
// DO NOT EDIT THIS FILE - it is machine generated -*- c++ -*-
#ifndef __javax_swing_plaf_basic_BasicTabbedPaneUI$NavigatePageUpAction__
#define __javax_swing_plaf_basic_BasicTabbedPaneUI$NavigatePageUpAction__
#pragma interface
#include <javax/swing/AbstractAction.h>
extern "Java"
{
namespace java
{
namespace awt
{
namespace event
{
class ActionEvent;
}
}
}
namespace javax
{
namespace swing
{
namespace plaf
{
namespace basic
{
class BasicTabbedPaneUI$NavigatePageUpAction;
}
}
}
}
}
class javax::swing::plaf::basic::BasicTabbedPaneUI$NavigatePageUpAction : public ::javax::swing::AbstractAction
{
public:
BasicTabbedPaneUI$NavigatePageUpAction();
virtual void actionPerformed(::java::awt::event::ActionEvent *);
static ::java::lang::Class class$;
};
#endif // __javax_swing_plaf_basic_BasicTabbedPaneUI$NavigatePageUpAction__
| gpl-2.0 |
SanDisk-Open-Source/SSD_Dashboard | uefi/gcc/gcc-4.6.3/libjava/javax/swing/plaf/metal/MetalBorders$Flush3DBorder.h | 1180 |
// DO NOT EDIT THIS FILE - it is machine generated -*- c++ -*-
#ifndef __javax_swing_plaf_metal_MetalBorders$Flush3DBorder__
#define __javax_swing_plaf_metal_MetalBorders$Flush3DBorder__
#pragma interface
#include <javax/swing/border/AbstractBorder.h>
extern "Java"
{
namespace java
{
namespace awt
{
class Component;
class Graphics;
class Insets;
}
}
namespace javax
{
namespace swing
{
namespace plaf
{
namespace metal
{
class MetalBorders$Flush3DBorder;
}
}
}
}
}
class javax::swing::plaf::metal::MetalBorders$Flush3DBorder : public ::javax::swing::border::AbstractBorder
{
public:
MetalBorders$Flush3DBorder();
virtual ::java::awt::Insets * getBorderInsets(::java::awt::Component *);
virtual ::java::awt::Insets * getBorderInsets(::java::awt::Component *, ::java::awt::Insets *);
virtual void paintBorder(::java::awt::Component *, ::java::awt::Graphics *, jint, jint, jint, jint);
private:
static ::java::awt::Insets * borderInsets;
public:
static ::java::lang::Class class$;
};
#endif // __javax_swing_plaf_metal_MetalBorders$Flush3DBorder__
| gpl-2.0 |
DamascenoRafael/cos482-qualidade-de-software | www/src/main/webapp/bower_components/angular-i18n/en-im.js | 64 | require('./angular-locale_en-im');
module.exports = 'ngLocale';
| mit |
kbridgers/VOLTE4GFAX | uboot/u-boot-2010.06/drivers/mtd/dataflash.c | 13869 | /* LowLevel function for ATMEL DataFlash support
* Author : Hamid Ikdoumi (Atmel)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#include <common.h>
#include <config.h>
#include <asm/hardware.h>
#include <dataflash.h>
static AT91S_DataFlash DataFlashInst;
extern void AT91F_SpiInit (void);
extern int AT91F_DataflashProbe (int i, AT91PS_DataflashDesc pDesc);
extern int AT91F_DataFlashRead (AT91PS_DataFlash pDataFlash,
unsigned long addr,
unsigned long size, char *buffer);
extern int AT91F_DataFlashWrite( AT91PS_DataFlash pDataFlash,
unsigned char *src,
int dest,
int size );
int AT91F_DataflashInit (void)
{
int i, j;
int dfcode;
int part;
int last_part;
int found[CONFIG_SYS_MAX_DATAFLASH_BANKS];
unsigned char protected;
AT91F_SpiInit ();
for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) {
found[i] = 0;
dataflash_info[i].Desc.state = IDLE;
dataflash_info[i].id = 0;
dataflash_info[i].Device.pages_number = 0;
dfcode = AT91F_DataflashProbe (cs[i].cs,
&dataflash_info[i].Desc);
switch (dfcode) {
case AT45DB021:
dataflash_info[i].Device.pages_number = 1024;
dataflash_info[i].Device.pages_size = 264;
dataflash_info[i].Device.page_offset = 9;
dataflash_info[i].Device.byte_mask = 0x300;
dataflash_info[i].Device.cs = cs[i].cs;
dataflash_info[i].Desc.DataFlash_state = IDLE;
dataflash_info[i].logical_address = cs[i].addr;
dataflash_info[i].id = dfcode;
found[i] += dfcode;;
break;
case AT45DB081:
dataflash_info[i].Device.pages_number = 4096;
dataflash_info[i].Device.pages_size = 264;
dataflash_info[i].Device.page_offset = 9;
dataflash_info[i].Device.byte_mask = 0x300;
dataflash_info[i].Device.cs = cs[i].cs;
dataflash_info[i].Desc.DataFlash_state = IDLE;
dataflash_info[i].logical_address = cs[i].addr;
dataflash_info[i].id = dfcode;
found[i] += dfcode;;
break;
case AT45DB161:
dataflash_info[i].Device.pages_number = 4096;
dataflash_info[i].Device.pages_size = 528;
dataflash_info[i].Device.page_offset = 10;
dataflash_info[i].Device.byte_mask = 0x300;
dataflash_info[i].Device.cs = cs[i].cs;
dataflash_info[i].Desc.DataFlash_state = IDLE;
dataflash_info[i].logical_address = cs[i].addr;
dataflash_info[i].id = dfcode;
found[i] += dfcode;;
break;
case AT45DB321:
dataflash_info[i].Device.pages_number = 8192;
dataflash_info[i].Device.pages_size = 528;
dataflash_info[i].Device.page_offset = 10;
dataflash_info[i].Device.byte_mask = 0x300;
dataflash_info[i].Device.cs = cs[i].cs;
dataflash_info[i].Desc.DataFlash_state = IDLE;
dataflash_info[i].logical_address = cs[i].addr;
dataflash_info[i].id = dfcode;
found[i] += dfcode;;
break;
case AT45DB642:
dataflash_info[i].Device.pages_number = 8192;
dataflash_info[i].Device.pages_size = 1056;
dataflash_info[i].Device.page_offset = 11;
dataflash_info[i].Device.byte_mask = 0x700;
dataflash_info[i].Device.cs = cs[i].cs;
dataflash_info[i].Desc.DataFlash_state = IDLE;
dataflash_info[i].logical_address = cs[i].addr;
dataflash_info[i].id = dfcode;
found[i] += dfcode;;
break;
case AT45DB128:
dataflash_info[i].Device.pages_number = 16384;
dataflash_info[i].Device.pages_size = 1056;
dataflash_info[i].Device.page_offset = 11;
dataflash_info[i].Device.byte_mask = 0x700;
dataflash_info[i].Device.cs = cs[i].cs;
dataflash_info[i].Desc.DataFlash_state = IDLE;
dataflash_info[i].logical_address = cs[i].addr;
dataflash_info[i].id = dfcode;
found[i] += dfcode;;
break;
default:
dfcode = 0;
break;
}
/* set the last area end to the dataflash size*/
dataflash_info[i].end_address =
(dataflash_info[i].Device.pages_number *
dataflash_info[i].Device.pages_size) - 1;
part = 0;
last_part = 0;
/* set the area addresses */
for(j = 0; j < NB_DATAFLASH_AREA; j++) {
if(found[i]!=0) {
dataflash_info[i].Device.area_list[j].start =
area_list[part].start +
dataflash_info[i].logical_address;
if(area_list[part].end == 0xffffffff) {
dataflash_info[i].Device.area_list[j].end =
dataflash_info[i].end_address +
dataflash_info[i].logical_address;
last_part = 1;
} else {
dataflash_info[i].Device.area_list[j].end =
area_list[part].end +
dataflash_info[i].logical_address;
}
protected = area_list[part].protected;
/* Set the environment according to the label...*/
if(protected == FLAG_PROTECT_INVALID) {
dataflash_info[i].Device.area_list[j].protected =
FLAG_PROTECT_INVALID;
} else {
dataflash_info[i].Device.area_list[j].protected =
protected;
}
strcpy((char*)(dataflash_info[i].Device.area_list[j].label),
(const char *)area_list[part].label);
}
part++;
}
}
return found[0];
}
void AT91F_DataflashSetEnv (void)
{
int i, j;
int part;
unsigned char env;
unsigned char s[32]; /* Will fit a long int in hex */
unsigned long start;
for (i = 0, part= 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) {
for(j = 0; j < NB_DATAFLASH_AREA; j++) {
env = area_list[part].setenv;
/* Set the environment according to the label...*/
if((env & FLAG_SETENV) == FLAG_SETENV) {
start = dataflash_info[i].Device.area_list[j].start;
sprintf((char*) s,"%lX",start);
setenv((char*) area_list[part].label,(char*) s);
}
part++;
}
}
}
void dataflash_print_info (void)
{
int i, j;
for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) {
if (dataflash_info[i].id != 0) {
printf("DataFlash:");
switch (dataflash_info[i].id) {
case AT45DB021:
printf("AT45DB021\n");
break;
case AT45DB161:
printf("AT45DB161\n");
break;
case AT45DB321:
printf("AT45DB321\n");
break;
case AT45DB642:
printf("AT45DB642\n");
break;
case AT45DB128:
printf("AT45DB128\n");
break;
}
printf("Nb pages: %6d\n"
"Page Size: %6d\n"
"Size=%8d bytes\n"
"Logical address: 0x%08X\n",
(unsigned int) dataflash_info[i].Device.pages_number,
(unsigned int) dataflash_info[i].Device.pages_size,
(unsigned int) dataflash_info[i].Device.pages_number *
dataflash_info[i].Device.pages_size,
(unsigned int) dataflash_info[i].logical_address);
for (j = 0; j < NB_DATAFLASH_AREA; j++) {
switch(dataflash_info[i].Device.area_list[j].protected) {
case FLAG_PROTECT_SET:
case FLAG_PROTECT_CLEAR:
printf("Area %i:\t%08lX to %08lX %s", j,
dataflash_info[i].Device.area_list[j].start,
dataflash_info[i].Device.area_list[j].end,
(dataflash_info[i].Device.area_list[j].protected==FLAG_PROTECT_SET) ? "(RO)" : " ");
printf(" %s\n", dataflash_info[i].Device.area_list[j].label);
break;
case FLAG_PROTECT_INVALID:
break;
}
}
}
}
}
/*---------------------------------------------------------------------------*/
/* Function Name : AT91F_DataflashSelect */
/* Object : Select the correct device */
/*---------------------------------------------------------------------------*/
AT91PS_DataFlash AT91F_DataflashSelect (AT91PS_DataFlash pFlash,
unsigned long *addr)
{
char addr_valid = 0;
int i;
for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++)
if ( dataflash_info[i].id
&& ((((int) *addr) & 0xFF000000) ==
dataflash_info[i].logical_address)) {
addr_valid = 1;
break;
}
if (!addr_valid) {
pFlash = (AT91PS_DataFlash) 0;
return pFlash;
}
pFlash->pDataFlashDesc = &(dataflash_info[i].Desc);
pFlash->pDevice = &(dataflash_info[i].Device);
*addr -= dataflash_info[i].logical_address;
return (pFlash);
}
/*---------------------------------------------------------------------------*/
/* Function Name : addr_dataflash */
/* Object : Test if address is valid */
/*---------------------------------------------------------------------------*/
int addr_dataflash (unsigned long addr)
{
int addr_valid = 0;
int i;
for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) {
if ((((int) addr) & 0xFF000000) ==
dataflash_info[i].logical_address) {
addr_valid = 1;
break;
}
}
return addr_valid;
}
/*---------------------------------------------------------------------------*/
/* Function Name : size_dataflash */
/* Object : Test if address is valid regarding the size */
/*---------------------------------------------------------------------------*/
int size_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr,
unsigned long size)
{
/* is outside the dataflash */
if (((int)addr & 0x0FFFFFFF) > (pdataFlash->pDevice->pages_size *
pdataFlash->pDevice->pages_number)) return 0;
/* is too large for the dataflash */
if (size > ((pdataFlash->pDevice->pages_size *
pdataFlash->pDevice->pages_number) -
((int)addr & 0x0FFFFFFF))) return 0;
return 1;
}
/*---------------------------------------------------------------------------*/
/* Function Name : prot_dataflash */
/* Object : Test if destination area is protected */
/*---------------------------------------------------------------------------*/
int prot_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr)
{
int area;
/* find area */
for (area = 0; area < NB_DATAFLASH_AREA; area++) {
if ((addr >= pdataFlash->pDevice->area_list[area].start) &&
(addr < pdataFlash->pDevice->area_list[area].end))
break;
}
if (area == NB_DATAFLASH_AREA)
return -1;
/*test protection value*/
if (pdataFlash->pDevice->area_list[area].protected == FLAG_PROTECT_SET)
return 0;
if (pdataFlash->pDevice->area_list[area].protected == FLAG_PROTECT_INVALID)
return 0;
return 1;
}
/*--------------------------------------------------------------------------*/
/* Function Name : dataflash_real_protect */
/* Object : protect/unprotect area */
/*--------------------------------------------------------------------------*/
int dataflash_real_protect (int flag, unsigned long start_addr,
unsigned long end_addr)
{
int i,j, area1, area2, addr_valid = 0;
/* find dataflash */
for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) {
if ((((int) start_addr) & 0xF0000000) ==
dataflash_info[i].logical_address) {
addr_valid = 1;
break;
}
}
if (!addr_valid) {
return -1;
}
/* find start area */
for (area1 = 0; area1 < NB_DATAFLASH_AREA; area1++) {
if (start_addr == dataflash_info[i].Device.area_list[area1].start)
break;
}
if (area1 == NB_DATAFLASH_AREA) return -1;
/* find end area */
for (area2 = 0; area2 < NB_DATAFLASH_AREA; area2++) {
if (end_addr == dataflash_info[i].Device.area_list[area2].end)
break;
}
if (area2 == NB_DATAFLASH_AREA)
return -1;
/*set protection value*/
for(j = area1; j < area2 + 1 ; j++)
if(dataflash_info[i].Device.area_list[j].protected
!= FLAG_PROTECT_INVALID) {
if (flag == 0) {
dataflash_info[i].Device.area_list[j].protected
= FLAG_PROTECT_CLEAR;
} else {
dataflash_info[i].Device.area_list[j].protected
= FLAG_PROTECT_SET;
}
}
return (area2 - area1 + 1);
}
/*---------------------------------------------------------------------------*/
/* Function Name : read_dataflash */
/* Object : dataflash memory read */
/*---------------------------------------------------------------------------*/
int read_dataflash (unsigned long addr, unsigned long size, char *result)
{
unsigned long AddrToRead = addr;
AT91PS_DataFlash pFlash = &DataFlashInst;
pFlash = AT91F_DataflashSelect (pFlash, &AddrToRead);
if (pFlash == 0)
return ERR_UNKNOWN_FLASH_TYPE;
if (size_dataflash(pFlash,addr,size) == 0)
return ERR_INVAL;
return (AT91F_DataFlashRead (pFlash, AddrToRead, size, result));
}
/*---------------------------------------------------------------------------*/
/* Function Name : write_dataflash */
/* Object : write a block in dataflash */
/*---------------------------------------------------------------------------*/
int write_dataflash (unsigned long addr_dest, unsigned long addr_src,
unsigned long size)
{
unsigned long AddrToWrite = addr_dest;
AT91PS_DataFlash pFlash = &DataFlashInst;
pFlash = AT91F_DataflashSelect (pFlash, &AddrToWrite);
if (pFlash == 0)
return ERR_UNKNOWN_FLASH_TYPE;
if (size_dataflash(pFlash,addr_dest,size) == 0)
return ERR_INVAL;
if (prot_dataflash(pFlash,addr_dest) == 0)
return ERR_PROTECTED;
if (AddrToWrite == -1)
return -1;
return AT91F_DataFlashWrite (pFlash, (uchar *)addr_src,
AddrToWrite, size);
}
void dataflash_perror (int err)
{
switch (err) {
case ERR_OK:
break;
case ERR_TIMOUT:
printf("Timeout writing to DataFlash\n");
break;
case ERR_PROTECTED:
printf("Can't write to protected/invalid DataFlash sectors\n");
break;
case ERR_INVAL:
printf("Outside available DataFlash\n");
break;
case ERR_UNKNOWN_FLASH_TYPE:
printf("Unknown Type of DataFlash\n");
break;
case ERR_PROG_ERROR:
printf("General DataFlash Programming Error\n");
break;
default:
printf("%s[%d] FIXME: rc=%d\n", __FILE__, __LINE__, err);
break;
}
}
| gpl-2.0 |
hansbonini/cloud9-magento | www/lib/Zend/Tool/Framework/Loader/Interface.php | 1265 | <?php
/**
* Zend Framework
*
* LICENSE
*
* This source file is subject to the new BSD license that is bundled
* with this package in the file LICENSE.txt.
* It is also available through the world-wide-web at this URL:
* http://framework.zend.com/license/new-bsd
* If you did not receive a copy of the license and are unable to
* obtain it through the world-wide-web, please send an email
* to [email protected] so we can send you a copy immediately.
*
* @category Zend
* @package Zend_Tool
* @subpackage Framework
* @copyright Copyright (c) 2005-2015 Zend Technologies USA Inc. (http://www.zend.com)
* @license http://framework.zend.com/license/new-bsd New BSD License
* @version $Id$
*/
/**
* Basic Interface for factilities that load Zend_Tool providers or manifests.
*
* @category Zend
* @package Zend_Tool
* @subpackage Framework
* @copyright Copyright (c) 2005-2015 Zend Technologies USA Inc. (http://www.zend.com)
* @license http://framework.zend.com/license/new-bsd New BSD License
*/
interface Zend_Tool_Framework_Loader_Interface
{
/**
* Load Providers and Manifests
*
* Returns an array of all loaded class names.
*
* @return array
*/
public function load();
}
| mit |
balazssimon/meta-cs | src/Main/MetaDslx.CodeAnalysis.Common/ReferenceManager/UnifiedAssembly.cs | 1310 | // Copyright (c) Microsoft. All Rights Reserved. Licensed under the Apache License, Version 2.0. See License.txt in the project root for license information.
using System.Diagnostics;
using Microsoft.CodeAnalysis.Text;
namespace Microsoft.CodeAnalysis
{
/// <summary>
/// Assembly symbol referenced by a AssemblyRef for which we couldn't find a matching
/// compilation reference but we found one that differs in version.
/// Created only for assemblies that require runtime binding redirection policy,
/// i.e. not for Framework assemblies.
/// </summary>
internal struct UnifiedAssembly<TAssemblySymbol>
where TAssemblySymbol : class, IAssemblySymbol
{
/// <summary>
/// Original reference that was unified to the identity of the <see cref="TargetAssembly"/>.
/// </summary>
internal readonly AssemblyIdentity OriginalReference;
internal readonly TAssemblySymbol TargetAssembly;
public UnifiedAssembly(TAssemblySymbol targetAssembly, AssemblyIdentity originalReference)
{
Debug.Assert(originalReference != null);
Debug.Assert(targetAssembly != null);
this.OriginalReference = originalReference;
this.TargetAssembly = targetAssembly;
}
}
}
| apache-2.0 |
zhao-ji/weibo | templates/layout.html | 1029 | <!doctype html>
<title>{% block title %}Welcome{% endblock %} | MiniTwit</title>
<link rel="stylesheet" type="text/css" href="{{ url_for('static', filename='style.css') }}">
<div class="page">
<h1>MiniTwit</h1>
<div class="navigation">
{% if g.user %}
<a href="{{ url_for('timeline') }}">my timeline</a> |
<a href="{{ url_for('public_timeline') }}">public timeline</a> |
<a href="{{ url_for('logout') }}">sign out [{{ g.user.username }}]</a>
{% else %}
<a href="{{ url_for('public_timeline') }}">public timeline</a> |
<a href="{{ url_for('register') }}">sign up</a> |
<a href="{{ url_for('login') }}">sign in</a>
{% endif %}
</div>
{% with flashes = get_flashed_messages() %}
{% if flashes %}
<ul class="flashes">
{% for message in flashes %}
<li>{{ message }}
{% endfor %}
</ul>
{% endif %}
{% endwith %}
<div class="body">
{% block body %}{% endblock %}
</div>
<div class="footer">
MiniTwit — A Flask Application
</div>
</div>
| gpl-2.0 |
ziqiaozhou/cachebar | source/drivers/acpi/acpica/tbfadt.c | 22265 | /******************************************************************************
*
* Module Name: tbfadt - FADT table utilities
*
*****************************************************************************/
/*
* Copyright (C) 2000 - 2013, Intel Corp.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions, and the following disclaimer,
* without modification.
* 2. Redistributions in binary form must reproduce at minimum a disclaimer
* substantially similar to the "NO WARRANTY" disclaimer below
* ("Disclaimer") and any redistribution must be conditioned upon
* including a substantially similar Disclaimer requirement for further
* binary redistribution.
* 3. Neither the names of the above-listed copyright holders nor the names
* of any contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* Alternatively, this software may be distributed under the terms of the
* GNU General Public License ("GPL") version 2 as published by the Free
* Software Foundation.
*
* NO WARRANTY
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES.
*/
#include <acpi/acpi.h>
#include "accommon.h"
#include "actables.h"
#define _COMPONENT ACPI_TABLES
ACPI_MODULE_NAME("tbfadt")
/* Local prototypes */
static void
acpi_tb_init_generic_address(struct acpi_generic_address *generic_address,
u8 space_id,
u8 byte_width, u64 address, char *register_name);
static void acpi_tb_convert_fadt(void);
static void acpi_tb_validate_fadt(void);
static void acpi_tb_setup_fadt_registers(void);
/* Table for conversion of FADT to common internal format and FADT validation */
typedef struct acpi_fadt_info {
char *name;
u16 address64;
u16 address32;
u16 length;
u8 default_length;
u8 type;
} acpi_fadt_info;
#define ACPI_FADT_OPTIONAL 0
#define ACPI_FADT_REQUIRED 1
#define ACPI_FADT_SEPARATE_LENGTH 2
static struct acpi_fadt_info fadt_info_table[] = {
{"Pm1aEventBlock",
ACPI_FADT_OFFSET(xpm1a_event_block),
ACPI_FADT_OFFSET(pm1a_event_block),
ACPI_FADT_OFFSET(pm1_event_length),
ACPI_PM1_REGISTER_WIDTH * 2, /* Enable + Status register */
ACPI_FADT_REQUIRED},
{"Pm1bEventBlock",
ACPI_FADT_OFFSET(xpm1b_event_block),
ACPI_FADT_OFFSET(pm1b_event_block),
ACPI_FADT_OFFSET(pm1_event_length),
ACPI_PM1_REGISTER_WIDTH * 2, /* Enable + Status register */
ACPI_FADT_OPTIONAL},
{"Pm1aControlBlock",
ACPI_FADT_OFFSET(xpm1a_control_block),
ACPI_FADT_OFFSET(pm1a_control_block),
ACPI_FADT_OFFSET(pm1_control_length),
ACPI_PM1_REGISTER_WIDTH,
ACPI_FADT_REQUIRED},
{"Pm1bControlBlock",
ACPI_FADT_OFFSET(xpm1b_control_block),
ACPI_FADT_OFFSET(pm1b_control_block),
ACPI_FADT_OFFSET(pm1_control_length),
ACPI_PM1_REGISTER_WIDTH,
ACPI_FADT_OPTIONAL},
{"Pm2ControlBlock",
ACPI_FADT_OFFSET(xpm2_control_block),
ACPI_FADT_OFFSET(pm2_control_block),
ACPI_FADT_OFFSET(pm2_control_length),
ACPI_PM2_REGISTER_WIDTH,
ACPI_FADT_SEPARATE_LENGTH},
{"PmTimerBlock",
ACPI_FADT_OFFSET(xpm_timer_block),
ACPI_FADT_OFFSET(pm_timer_block),
ACPI_FADT_OFFSET(pm_timer_length),
ACPI_PM_TIMER_WIDTH,
ACPI_FADT_SEPARATE_LENGTH}, /* ACPI 5.0A: Timer is optional */
{"Gpe0Block",
ACPI_FADT_OFFSET(xgpe0_block),
ACPI_FADT_OFFSET(gpe0_block),
ACPI_FADT_OFFSET(gpe0_block_length),
0,
ACPI_FADT_SEPARATE_LENGTH},
{"Gpe1Block",
ACPI_FADT_OFFSET(xgpe1_block),
ACPI_FADT_OFFSET(gpe1_block),
ACPI_FADT_OFFSET(gpe1_block_length),
0,
ACPI_FADT_SEPARATE_LENGTH}
};
#define ACPI_FADT_INFO_ENTRIES \
(sizeof (fadt_info_table) / sizeof (struct acpi_fadt_info))
/* Table used to split Event Blocks into separate status/enable registers */
typedef struct acpi_fadt_pm_info {
struct acpi_generic_address *target;
u16 source;
u8 register_num;
} acpi_fadt_pm_info;
static struct acpi_fadt_pm_info fadt_pm_info_table[] = {
{&acpi_gbl_xpm1a_status,
ACPI_FADT_OFFSET(xpm1a_event_block),
0},
{&acpi_gbl_xpm1a_enable,
ACPI_FADT_OFFSET(xpm1a_event_block),
1},
{&acpi_gbl_xpm1b_status,
ACPI_FADT_OFFSET(xpm1b_event_block),
0},
{&acpi_gbl_xpm1b_enable,
ACPI_FADT_OFFSET(xpm1b_event_block),
1}
};
#define ACPI_FADT_PM_INFO_ENTRIES \
(sizeof (fadt_pm_info_table) / sizeof (struct acpi_fadt_pm_info))
/*******************************************************************************
*
* FUNCTION: acpi_tb_init_generic_address
*
* PARAMETERS: generic_address - GAS struct to be initialized
* space_id - ACPI Space ID for this register
* byte_width - Width of this register
* address - Address of the register
*
* RETURN: None
*
* DESCRIPTION: Initialize a Generic Address Structure (GAS)
* See the ACPI specification for a full description and
* definition of this structure.
*
******************************************************************************/
static void
acpi_tb_init_generic_address(struct acpi_generic_address *generic_address,
u8 space_id,
u8 byte_width, u64 address, char *register_name)
{
u8 bit_width;
/* Bit width field in the GAS is only one byte long, 255 max */
bit_width = (u8)(byte_width * 8);
if (byte_width > 31) { /* (31*8)=248 */
ACPI_ERROR((AE_INFO,
"%s - 32-bit FADT register is too long (%u bytes, %u bits) "
"to convert to GAS struct - 255 bits max, truncating",
register_name, byte_width, (byte_width * 8)));
bit_width = 255;
}
/*
* The 64-bit Address field is non-aligned in the byte packed
* GAS struct.
*/
ACPI_MOVE_64_TO_64(&generic_address->address, &address);
/* All other fields are byte-wide */
generic_address->space_id = space_id;
generic_address->bit_width = bit_width;
generic_address->bit_offset = 0;
generic_address->access_width = 0; /* Access width ANY */
}
/*******************************************************************************
*
* FUNCTION: acpi_tb_parse_fadt
*
* PARAMETERS: table_index - Index for the FADT
*
* RETURN: None
*
* DESCRIPTION: Initialize the FADT, DSDT and FACS tables
* (FADT contains the addresses of the DSDT and FACS)
*
******************************************************************************/
void acpi_tb_parse_fadt(u32 table_index)
{
u32 length;
struct acpi_table_header *table;
/*
* The FADT has multiple versions with different lengths,
* and it contains pointers to both the DSDT and FACS tables.
*
* Get a local copy of the FADT and convert it to a common format
* Map entire FADT, assumed to be smaller than one page.
*/
length = acpi_gbl_root_table_list.tables[table_index].length;
table =
acpi_os_map_memory(acpi_gbl_root_table_list.tables[table_index].
address, length);
if (!table) {
return;
}
/*
* Validate the FADT checksum before we copy the table. Ignore
* checksum error as we want to try to get the DSDT and FACS.
*/
(void)acpi_tb_verify_checksum(table, length);
/* Create a local copy of the FADT in common ACPI 2.0+ format */
acpi_tb_create_local_fadt(table, length);
/* All done with the real FADT, unmap it */
acpi_os_unmap_memory(table, length);
/* Obtain the DSDT and FACS tables via their addresses within the FADT */
acpi_tb_install_table((acpi_physical_address) acpi_gbl_FADT.Xdsdt,
ACPI_SIG_DSDT, ACPI_TABLE_INDEX_DSDT);
/* If Hardware Reduced flag is set, there is no FACS */
if (!acpi_gbl_reduced_hardware) {
acpi_tb_install_table((acpi_physical_address) acpi_gbl_FADT.
Xfacs, ACPI_SIG_FACS,
ACPI_TABLE_INDEX_FACS);
}
}
/*******************************************************************************
*
* FUNCTION: acpi_tb_create_local_fadt
*
* PARAMETERS: table - Pointer to BIOS FADT
* length - Length of the table
*
* RETURN: None
*
* DESCRIPTION: Get a local copy of the FADT and convert it to a common format.
* Performs validation on some important FADT fields.
*
* NOTE: We create a local copy of the FADT regardless of the version.
*
******************************************************************************/
void acpi_tb_create_local_fadt(struct acpi_table_header *table, u32 length)
{
/*
* Check if the FADT is larger than the largest table that we expect
* (the ACPI 5.0 version). If so, truncate the table, and issue
* a warning.
*/
if (length > sizeof(struct acpi_table_fadt)) {
ACPI_BIOS_WARNING((AE_INFO,
"FADT (revision %u) is longer than ACPI 5.0 version, "
"truncating length %u to %u",
table->revision, length,
(u32)sizeof(struct acpi_table_fadt)));
}
/* Clear the entire local FADT */
ACPI_MEMSET(&acpi_gbl_FADT, 0, sizeof(struct acpi_table_fadt));
/* Copy the original FADT, up to sizeof (struct acpi_table_fadt) */
ACPI_MEMCPY(&acpi_gbl_FADT, table,
ACPI_MIN(length, sizeof(struct acpi_table_fadt)));
/* Take a copy of the Hardware Reduced flag */
acpi_gbl_reduced_hardware = FALSE;
if (acpi_gbl_FADT.flags & ACPI_FADT_HW_REDUCED) {
acpi_gbl_reduced_hardware = TRUE;
}
/* Convert the local copy of the FADT to the common internal format */
acpi_tb_convert_fadt();
/* Validate FADT values now, before we make any changes */
acpi_tb_validate_fadt();
/* Initialize the global ACPI register structures */
acpi_tb_setup_fadt_registers();
}
/*******************************************************************************
*
* FUNCTION: acpi_tb_convert_fadt
*
* PARAMETERS: None, uses acpi_gbl_FADT
*
* RETURN: None
*
* DESCRIPTION: Converts all versions of the FADT to a common internal format.
* Expand 32-bit addresses to 64-bit as necessary.
*
* NOTE: acpi_gbl_FADT must be of size (struct acpi_table_fadt),
* and must contain a copy of the actual FADT.
*
* Notes on 64-bit register addresses:
*
* After this FADT conversion, later ACPICA code will only use the 64-bit "X"
* fields of the FADT for all ACPI register addresses.
*
* The 64-bit "X" fields are optional extensions to the original 32-bit FADT
* V1.0 fields. Even if they are present in the FADT, they are optional and
* are unused if the BIOS sets them to zero. Therefore, we must copy/expand
* 32-bit V1.0 fields if the corresponding X field is zero.
*
* For ACPI 1.0 FADTs, all 32-bit address fields are expanded to the
* corresponding "X" fields in the internal FADT.
*
* For ACPI 2.0+ FADTs, all valid (non-zero) 32-bit address fields are expanded
* to the corresponding 64-bit X fields. For compatibility with other ACPI
* implementations, we ignore the 64-bit field if the 32-bit field is valid,
* regardless of whether the host OS is 32-bit or 64-bit.
*
******************************************************************************/
static void acpi_tb_convert_fadt(void)
{
struct acpi_generic_address *address64;
u32 address32;
u32 i;
/*
* Expand the 32-bit FACS and DSDT addresses to 64-bit as necessary.
* Later code will always use the X 64-bit field. Also, check for an
* address mismatch between the 32-bit and 64-bit address fields
* (FIRMWARE_CTRL/X_FIRMWARE_CTRL, DSDT/X_DSDT) which would indicate
* the presence of two FACS or two DSDT tables.
*/
if (!acpi_gbl_FADT.Xfacs) {
acpi_gbl_FADT.Xfacs = (u64) acpi_gbl_FADT.facs;
} else if (acpi_gbl_FADT.facs &&
(acpi_gbl_FADT.Xfacs != (u64) acpi_gbl_FADT.facs)) {
ACPI_WARNING((AE_INFO,
"32/64 FACS address mismatch in FADT - two FACS tables!"));
}
if (!acpi_gbl_FADT.Xdsdt) {
acpi_gbl_FADT.Xdsdt = (u64) acpi_gbl_FADT.dsdt;
} else if (acpi_gbl_FADT.dsdt &&
(acpi_gbl_FADT.Xdsdt != (u64) acpi_gbl_FADT.dsdt)) {
ACPI_WARNING((AE_INFO,
"32/64 DSDT address mismatch in FADT - two DSDT tables!"));
}
/*
* For ACPI 1.0 FADTs (revision 1 or 2), ensure that reserved fields which
* should be zero are indeed zero. This will workaround BIOSs that
* inadvertently place values in these fields.
*
* The ACPI 1.0 reserved fields that will be zeroed are the bytes located
* at offset 45, 55, 95, and the word located at offset 109, 110.
*
* Note: The FADT revision value is unreliable. Only the length can be
* trusted.
*/
if (acpi_gbl_FADT.header.length <= ACPI_FADT_V2_SIZE) {
acpi_gbl_FADT.preferred_profile = 0;
acpi_gbl_FADT.pstate_control = 0;
acpi_gbl_FADT.cst_control = 0;
acpi_gbl_FADT.boot_flags = 0;
}
/* Update the local FADT table header length */
acpi_gbl_FADT.header.length = sizeof(struct acpi_table_fadt);
/*
* Expand the ACPI 1.0 32-bit addresses to the ACPI 2.0 64-bit "X"
* generic address structures as necessary. Later code will always use
* the 64-bit address structures.
*
* March 2009:
* We now always use the 32-bit address if it is valid (non-null). This
* is not in accordance with the ACPI specification which states that
* the 64-bit address supersedes the 32-bit version, but we do this for
* compatibility with other ACPI implementations. Most notably, in the
* case where both the 32 and 64 versions are non-null, we use the 32-bit
* version. This is the only address that is guaranteed to have been
* tested by the BIOS manufacturer.
*/
for (i = 0; i < ACPI_FADT_INFO_ENTRIES; i++) {
address32 = *ACPI_ADD_PTR(u32,
&acpi_gbl_FADT,
fadt_info_table[i].address32);
address64 = ACPI_ADD_PTR(struct acpi_generic_address,
&acpi_gbl_FADT,
fadt_info_table[i].address64);
/*
* If both 32- and 64-bit addresses are valid (non-zero),
* they must match.
*/
if (address64->address && address32 &&
(address64->address != (u64)address32)) {
ACPI_BIOS_ERROR((AE_INFO,
"32/64X address mismatch in FADT/%s: "
"0x%8.8X/0x%8.8X%8.8X, using 32",
fadt_info_table[i].name, address32,
ACPI_FORMAT_UINT64(address64->
address)));
}
/* Always use 32-bit address if it is valid (non-null) */
if (address32) {
/*
* Copy the 32-bit address to the 64-bit GAS structure. The
* Space ID is always I/O for 32-bit legacy address fields
*/
acpi_tb_init_generic_address(address64,
ACPI_ADR_SPACE_SYSTEM_IO,
*ACPI_ADD_PTR(u8,
&acpi_gbl_FADT,
fadt_info_table
[i].length),
(u64) address32,
fadt_info_table[i].name);
}
}
}
/*******************************************************************************
*
* FUNCTION: acpi_tb_validate_fadt
*
* PARAMETERS: table - Pointer to the FADT to be validated
*
* RETURN: None
*
* DESCRIPTION: Validate various important fields within the FADT. If a problem
* is found, issue a message, but no status is returned.
* Used by both the table manager and the disassembler.
*
* Possible additional checks:
* (acpi_gbl_FADT.pm1_event_length >= 4)
* (acpi_gbl_FADT.pm1_control_length >= 2)
* (acpi_gbl_FADT.pm_timer_length >= 4)
* Gpe block lengths must be multiple of 2
*
******************************************************************************/
static void acpi_tb_validate_fadt(void)
{
char *name;
struct acpi_generic_address *address64;
u8 length;
u32 i;
/*
* Check for FACS and DSDT address mismatches. An address mismatch between
* the 32-bit and 64-bit address fields (FIRMWARE_CTRL/X_FIRMWARE_CTRL and
* DSDT/X_DSDT) would indicate the presence of two FACS or two DSDT tables.
*/
if (acpi_gbl_FADT.facs &&
(acpi_gbl_FADT.Xfacs != (u64)acpi_gbl_FADT.facs)) {
ACPI_BIOS_WARNING((AE_INFO,
"32/64X FACS address mismatch in FADT - "
"0x%8.8X/0x%8.8X%8.8X, using 32",
acpi_gbl_FADT.facs,
ACPI_FORMAT_UINT64(acpi_gbl_FADT.Xfacs)));
acpi_gbl_FADT.Xfacs = (u64)acpi_gbl_FADT.facs;
}
if (acpi_gbl_FADT.dsdt &&
(acpi_gbl_FADT.Xdsdt != (u64)acpi_gbl_FADT.dsdt)) {
ACPI_BIOS_WARNING((AE_INFO,
"32/64X DSDT address mismatch in FADT - "
"0x%8.8X/0x%8.8X%8.8X, using 32",
acpi_gbl_FADT.dsdt,
ACPI_FORMAT_UINT64(acpi_gbl_FADT.Xdsdt)));
acpi_gbl_FADT.Xdsdt = (u64)acpi_gbl_FADT.dsdt;
}
/* If Hardware Reduced flag is set, we are all done */
if (acpi_gbl_reduced_hardware) {
return;
}
/* Examine all of the 64-bit extended address fields (X fields) */
for (i = 0; i < ACPI_FADT_INFO_ENTRIES; i++) {
/*
* Generate pointer to the 64-bit address, get the register
* length (width) and the register name
*/
address64 = ACPI_ADD_PTR(struct acpi_generic_address,
&acpi_gbl_FADT,
fadt_info_table[i].address64);
length =
*ACPI_ADD_PTR(u8, &acpi_gbl_FADT,
fadt_info_table[i].length);
name = fadt_info_table[i].name;
/*
* For each extended field, check for length mismatch between the
* legacy length field and the corresponding 64-bit X length field.
* Note: If the legacy length field is > 0xFF bits, ignore this
* check. (GPE registers can be larger than the 64-bit GAS structure
* can accomodate, 0xFF bits).
*/
if (address64->address &&
(ACPI_MUL_8(length) <= ACPI_UINT8_MAX) &&
(address64->bit_width != ACPI_MUL_8(length))) {
ACPI_BIOS_WARNING((AE_INFO,
"32/64X length mismatch in FADT/%s: %u/%u",
name, ACPI_MUL_8(length),
address64->bit_width));
}
if (fadt_info_table[i].type & ACPI_FADT_REQUIRED) {
/*
* Field is required (Pm1a_event, Pm1a_control).
* Both the address and length must be non-zero.
*/
if (!address64->address || !length) {
ACPI_BIOS_ERROR((AE_INFO,
"Required FADT field %s has zero address and/or length: "
"0x%8.8X%8.8X/0x%X",
name,
ACPI_FORMAT_UINT64(address64->
address),
length));
}
} else if (fadt_info_table[i].type & ACPI_FADT_SEPARATE_LENGTH) {
/*
* Field is optional (Pm2_control, GPE0, GPE1) AND has its own
* length field. If present, both the address and length must
* be valid.
*/
if ((address64->address && !length) ||
(!address64->address && length)) {
ACPI_BIOS_WARNING((AE_INFO,
"Optional FADT field %s has zero address or length: "
"0x%8.8X%8.8X/0x%X",
name,
ACPI_FORMAT_UINT64
(address64->address),
length));
}
}
}
}
/*******************************************************************************
*
* FUNCTION: acpi_tb_setup_fadt_registers
*
* PARAMETERS: None, uses acpi_gbl_FADT.
*
* RETURN: None
*
* DESCRIPTION: Initialize global ACPI PM1 register definitions. Optionally,
* force FADT register definitions to their default lengths.
*
******************************************************************************/
static void acpi_tb_setup_fadt_registers(void)
{
struct acpi_generic_address *target64;
struct acpi_generic_address *source64;
u8 pm1_register_byte_width;
u32 i;
/*
* Optionally check all register lengths against the default values and
* update them if they are incorrect.
*/
if (acpi_gbl_use_default_register_widths) {
for (i = 0; i < ACPI_FADT_INFO_ENTRIES; i++) {
target64 =
ACPI_ADD_PTR(struct acpi_generic_address,
&acpi_gbl_FADT,
fadt_info_table[i].address64);
/*
* If a valid register (Address != 0) and the (default_length > 0)
* (Not a GPE register), then check the width against the default.
*/
if ((target64->address) &&
(fadt_info_table[i].default_length > 0) &&
(fadt_info_table[i].default_length !=
target64->bit_width)) {
ACPI_BIOS_WARNING((AE_INFO,
"Invalid length for FADT/%s: %u, using default %u",
fadt_info_table[i].name,
target64->bit_width,
fadt_info_table[i].
default_length));
/* Incorrect size, set width to the default */
target64->bit_width =
fadt_info_table[i].default_length;
}
}
}
/*
* Get the length of the individual PM1 registers (enable and status).
* Each register is defined to be (event block length / 2). Extra divide
* by 8 converts bits to bytes.
*/
pm1_register_byte_width = (u8)
ACPI_DIV_16(acpi_gbl_FADT.xpm1a_event_block.bit_width);
/*
* Calculate separate GAS structs for the PM1x (A/B) Status and Enable
* registers. These addresses do not appear (directly) in the FADT, so it
* is useful to pre-calculate them from the PM1 Event Block definitions.
*
* The PM event blocks are split into two register blocks, first is the
* PM Status Register block, followed immediately by the PM Enable
* Register block. Each is of length (pm1_event_length/2)
*
* Note: The PM1A event block is required by the ACPI specification.
* However, the PM1B event block is optional and is rarely, if ever,
* used.
*/
for (i = 0; i < ACPI_FADT_PM_INFO_ENTRIES; i++) {
source64 =
ACPI_ADD_PTR(struct acpi_generic_address, &acpi_gbl_FADT,
fadt_pm_info_table[i].source);
if (source64->address) {
acpi_tb_init_generic_address(fadt_pm_info_table[i].
target, source64->space_id,
pm1_register_byte_width,
source64->address +
(fadt_pm_info_table[i].
register_num *
pm1_register_byte_width),
"PmRegisters");
}
}
}
| gpl-2.0 |
jrudio/meteor | packages/test-helpers/async_multi.js | 5209 | // This depends on tinytest, so it's a little weird to put it in
// test-helpers, but it'll do for now.
// Provides the testAsyncMulti helper, which creates an async test
// (using Tinytest.addAsync) that tracks parallel and sequential
// asynchronous calls. Specifically, the two features it provides
// are:
// 1) Executing an array of functions sequentially when those functions
// contain async calls.
// 2) Keeping track of when callbacks are outstanding, via "expect".
//
// To use, pass an array of functions that take arguments (test, expect).
// (There is no onComplete callback; completion is determined automatically.)
// Expect takes a callback closure and wraps it, returning a new callback closure,
// and making a note that there is a callback oustanding. Pass this returned closure
// to async functions as the callback, and the machinery in the wrapper will
// record the fact that the callback has been called.
//
// A second form of expect takes data arguments to test for.
// Essentially, expect("foo", "bar") is equivalent to:
// expect(function(arg1, arg2) { test.equal([arg1, arg2], ["foo", "bar"]); }).
//
// You cannot "nest" expect or call it from a callback! Even if you have a chain
// of callbacks, you need to call expect at the "top level" (synchronously)
// but the callback you wrap has to be the last/innermost one. This sometimes
// leads to some code contortions and should probably be fixed.
// Example: (at top level of test file)
//
// testAsyncMulti("test name", [
// function(test, expect) {
// ... tests here
// Meteor.defer(expect(function() {
// ... tests here
// }));
//
// call_something_async('foo', 'bar', expect('baz')); // implicit callback
//
// },
// function(test, expect) {
// ... more tests
// }
// ]);
var ExpectationManager = function (test, onComplete) {
var self = this;
self.test = test;
self.onComplete = onComplete;
self.closed = false;
self.dead = false;
self.outstanding = 0;
};
_.extend(ExpectationManager.prototype, {
expect: function (/* arguments */) {
var self = this;
if (typeof arguments[0] === "function")
var expected = arguments[0];
else
var expected = _.toArray(arguments);
if (self.closed)
throw new Error("Too late to add more expectations to the test");
self.outstanding++;
return function (/* arguments */) {
if (self.dead)
return;
if (typeof expected === "function") {
try {
expected.apply({}, arguments);
} catch (e) {
if (self.cancel())
self.test.exception(e);
}
} else {
self.test.equal(_.toArray(arguments), expected);
}
self.outstanding--;
self._check_complete();
};
},
done: function () {
var self = this;
self.closed = true;
self._check_complete();
},
cancel: function () {
var self = this;
if (! self.dead) {
self.dead = true;
return true;
}
return false;
},
_check_complete: function () {
var self = this;
if (!self.outstanding && self.closed && !self.dead) {
self.dead = true;
self.onComplete();
}
}
});
testAsyncMulti = function (name, funcs) {
// XXX Tests on remote browsers are _slow_. We need a better solution.
var timeout = 180000;
Tinytest.addAsync(name, function (test, onComplete) {
var remaining = _.clone(funcs);
var context = {};
var i = 0;
var runNext = function () {
var func = remaining.shift();
if (!func) {
delete test.extraDetails.asyncBlock;
onComplete();
}
else {
var em = new ExpectationManager(test, function () {
Meteor.clearTimeout(timer);
runNext();
});
var timer = Meteor.setTimeout(function () {
if (em.cancel()) {
test.fail({type: "timeout", message: "Async batch timed out"});
onComplete();
}
return;
}, timeout);
test.extraDetails.asyncBlock = i++;
try {
func.apply(context, [test, _.bind(em.expect, em)]);
} catch (exception) {
if (em.cancel())
test.exception(exception);
Meteor.clearTimeout(timer);
// Because we called test.exception, we're not to call onComplete.
return;
}
em.done();
}
};
runNext();
});
};
// Call `fn` periodically until it returns true. If it does, call
// `success`. If it doesn't before the timeout, call `failed`.
simplePoll = function (fn, success, failed, timeout, step) {
timeout = timeout || 10000;
step = step || 100;
var start = (new Date()).valueOf();
var helper = function () {
if (fn()) {
success();
return;
}
if (start + timeout < (new Date()).valueOf()) {
failed();
return;
}
Meteor.setTimeout(helper, step);
};
helper();
};
pollUntil = function (expect, f, timeout, step, noFail) {
noFail = noFail || false;
step = step || 100;
var expectation = expect(true);
simplePoll(
f,
function () { expectation(true) },
function () { expectation(noFail) },
timeout,
step
);
};
| mit |
rekhajethani/d8.dev | web/modules/devel/tests/src/Kernel/DevelTwigExtensionTest.php | 7917 | <?php
namespace Drupal\Tests\devel\Kernel;
use Drupal\Core\DependencyInjection\ContainerBuilder;
use Drupal\KernelTests\KernelTestBase;
use Drupal\devel\Twig\Extension\Debug;
use Drupal\user\Entity\Role;
use Drupal\user\Entity\User;
/**
* Tests Twig extensions.
*
* @group devel
*/
class DevelTwigExtensionTest extends KernelTestBase {
use DevelDumperTestTrait;
/**
* The user used in test.
*
* @var \Drupal\user\UserInterface
*/
protected $develUser;
/**
* Modules to enable.
*
* @var array
*/
public static $modules = ['devel', 'user', 'system'];
/**
* {@inheritdoc}
*/
protected function setUp() {
parent::setUp();
$this->installEntitySchema('user');
$this->installSchema('system', 'sequences');
$devel_role = Role::create([
'id' => 'admin',
'permissions' => ['access devel information'],
]);
$devel_role->save();
$this->develUser = User::create([
'name' => $this->randomMachineName(),
'roles' => [$devel_role->id()],
]);
$this->develUser->save();
}
/**
* {@inheritdoc}
*/
public function register(ContainerBuilder $container) {
parent::register($container);
$parameters = $container->getParameter('twig.config');
$parameters['debug'] = TRUE;
$container->setParameter('twig.config', $parameters);
}
/**
* Tests that Twig extension loads appropriately.
*/
public function testTwigExtensionLoaded() {
$twig_service = \Drupal::service('twig');
$extension = $twig_service->getExtension('devel_debug');
$this->assertEquals(get_class($extension), Debug::class, 'Debug Extension loaded successfully.');
}
/**
* Tests that the Twig dump functions are registered properly.
*/
public function testDumpFunctionsRegistered() {
/** @var \Twig_SimpleFunction[] $functions */
$functions = \Drupal::service('twig')->getFunctions();
$dump_functions = ['devel_dump', 'kpr'];
$message_functions = ['devel_message', 'dpm', 'dsm'];
$registered_functions = $dump_functions + $message_functions;
foreach ($registered_functions as $name) {
$function = $functions[$name];
$this->assertTrue($function instanceof \Twig_SimpleFunction);
$this->assertEquals($function->getName(), $name);
$this->assertTrue($function->needsContext());
$this->assertTrue($function->needsEnvironment());
$this->assertTrue($function->isVariadic());
is_callable($function->getCallable(), TRUE, $callable);
if (in_array($name, $dump_functions)) {
$this->assertEquals($callable, 'Drupal\devel\Twig\Extension\Debug::dump');
}
else {
$this->assertEquals($callable, 'Drupal\devel\Twig\Extension\Debug::message');
}
}
}
/**
* Tests that the Twig function for XDebug integration is registered properly.
*/
public function testXDebugIntegrationFunctionsRegistered() {
/** @var \Twig_SimpleFunction $function */
$function = \Drupal::service('twig')->getFunction('devel_breakpoint');
$this->assertTrue($function instanceof \Twig_SimpleFunction);
$this->assertEquals($function->getName(), 'devel_breakpoint');
$this->assertTrue($function->needsContext());
$this->assertTrue($function->needsEnvironment());
$this->assertTrue($function->isVariadic());
is_callable($function->getCallable(), TRUE, $callable);
$this->assertEquals($callable, 'Drupal\devel\Twig\Extension\Debug::breakpoint');
}
/**
* Tests that the Twig extension's dump functions produce the expected output.
*/
public function testDumpFunctions() {
$template = 'test-with-context {{ twig_string }} {{ twig_array.first }} {{ twig_array.second }}{{ devel_dump() }}';
$expected_template_output = 'test-with-context context! first value second value';
$context = [
'twig_string' => 'context!',
'twig_array' => [
'first' => 'first value',
'second' => 'second value',
],
'twig_object' => new \stdClass(),
];
/** @var \Drupal\Core\Template\TwigEnvironment $environment */
$environment = \Drupal::service('twig');
// Ensures that the twig extension does nothing if the current
// user has not the adequate permission.
$this->assertTrue($environment->isDebug());
$this->assertEquals($environment->renderInline($template, $context), $expected_template_output);
\Drupal::currentUser()->setAccount($this->develUser);
// Ensures that if no argument is passed to the function the twig context is
// dumped.
$output = (string) $environment->renderInline($template, $context);
$this->assertContains($expected_template_output, $output);
$this->assertContainsDump($output, $context, 'Twig context');
// Ensures that if an argument is passed to the function it is dumped.
$template = 'test-with-context {{ twig_string }} {{ twig_array.first }} {{ twig_array.second }}{{ devel_dump(twig_array) }}';
$output = (string) $environment->renderInline($template, $context);
$this->assertContains($expected_template_output, $output);
$this->assertContainsDump($output, $context['twig_array']);
// Ensures that if more than one argument is passed the function works
// properly and every argument is dumped separately.
$template = 'test-with-context {{ twig_string }} {{ twig_array.first }} {{ twig_array.second }}{{ devel_dump(twig_string, twig_array.first, twig_array, twig_object) }}';
$output = (string) $environment->renderInline($template, $context);
$this->assertContains($expected_template_output, $output);
$this->assertContainsDump($output, $context['twig_string']);
$this->assertContainsDump($output, $context['twig_array']['first']);
$this->assertContainsDump($output, $context['twig_array']);
$this->assertContainsDump($output, $context['twig_object']);
// Clear messages.
drupal_get_messages();
$retrieve_message = function ($messages, $index) {
return isset($messages['status'][$index]) ? (string) $messages['status'][$index] : NULL;
};
// Ensures that if no argument is passed to the function the twig context is
// dumped.
$template = 'test-with-context {{ twig_string }} {{ twig_array.first }} {{ twig_array.second }}{{ devel_message() }}';
$output = (string) $environment->renderInline($template, $context);
$this->assertContains($expected_template_output, $output);
$messages = drupal_get_messages();
$this->assertDumpExportEquals($retrieve_message($messages, 0), $context, 'Twig context');
// Ensures that if an argument is passed to the function it is dumped.
$template = 'test-with-context {{ twig_string }} {{ twig_array.first }} {{ twig_array.second }}{{ devel_message(twig_array) }}';
$output = (string) $environment->renderInline($template, $context);
$this->assertContains($expected_template_output, $output);
$messages = drupal_get_messages();
$this->assertDumpExportEquals($retrieve_message($messages, 0), $context['twig_array']);
// Ensures that if more than one argument is passed to the function works
// properly and every argument is dumped separately.
$template = 'test-with-context {{ twig_string }} {{ twig_array.first }} {{ twig_array.second }}{{ devel_message(twig_string, twig_array.first, twig_array, twig_object) }}';
$output = (string) $environment->renderInline($template, $context);
$this->assertContains($expected_template_output, $output);
$messages = drupal_get_messages();
$this->assertDumpExportEquals($retrieve_message($messages, 0), $context['twig_string']);
$this->assertDumpExportEquals($retrieve_message($messages, 1), $context['twig_array']['first']);
$this->assertDumpExportEquals($retrieve_message($messages, 2), $context['twig_array']);
$this->assertDumpExportEquals($retrieve_message($messages, 3), $context['twig_object']);
}
}
| gpl-2.0 |
c0d3z3r0/linux-rockchip | samples/bpf/syscall_tp_user.c | 2461 | // SPDX-License-Identifier: GPL-2.0-only
/* Copyright (c) 2017 Facebook
*/
#include <stdio.h>
#include <unistd.h>
#include <fcntl.h>
#include <stdlib.h>
#include <signal.h>
#include <linux/bpf.h>
#include <string.h>
#include <linux/perf_event.h>
#include <errno.h>
#include <assert.h>
#include <stdbool.h>
#include <sys/resource.h>
#include <bpf/bpf.h>
#include "bpf_load.h"
/* This program verifies bpf attachment to tracepoint sys_enter_* and sys_exit_*.
* This requires kernel CONFIG_FTRACE_SYSCALLS to be set.
*/
static void usage(const char *cmd)
{
printf("USAGE: %s [-i num_progs] [-h]\n", cmd);
printf(" -i num_progs # number of progs of the test\n");
printf(" -h # help\n");
}
static void verify_map(int map_id)
{
__u32 key = 0;
__u32 val;
if (bpf_map_lookup_elem(map_id, &key, &val) != 0) {
fprintf(stderr, "map_lookup failed: %s\n", strerror(errno));
return;
}
if (val == 0) {
fprintf(stderr, "failed: map #%d returns value 0\n", map_id);
return;
}
val = 0;
if (bpf_map_update_elem(map_id, &key, &val, BPF_ANY) != 0) {
fprintf(stderr, "map_update failed: %s\n", strerror(errno));
return;
}
}
static int test(char *filename, int num_progs)
{
int i, fd, map0_fds[num_progs], map1_fds[num_progs];
for (i = 0; i < num_progs; i++) {
if (load_bpf_file(filename)) {
fprintf(stderr, "%s", bpf_log_buf);
return 1;
}
printf("prog #%d: map ids %d %d\n", i, map_fd[0], map_fd[1]);
map0_fds[i] = map_fd[0];
map1_fds[i] = map_fd[1];
}
/* current load_bpf_file has perf_event_open default pid = -1
* and cpu = 0, which permits attached bpf execution on
* all cpus for all pid's. bpf program execution ignores
* cpu affinity.
*/
/* trigger some "open" operations */
fd = open(filename, O_RDONLY);
if (fd < 0) {
fprintf(stderr, "open failed: %s\n", strerror(errno));
return 1;
}
close(fd);
/* verify the map */
for (i = 0; i < num_progs; i++) {
verify_map(map0_fds[i]);
verify_map(map1_fds[i]);
}
return 0;
}
int main(int argc, char **argv)
{
struct rlimit r = {RLIM_INFINITY, RLIM_INFINITY};
int opt, num_progs = 1;
char filename[256];
while ((opt = getopt(argc, argv, "i:h")) != -1) {
switch (opt) {
case 'i':
num_progs = atoi(optarg);
break;
case 'h':
default:
usage(argv[0]);
return 0;
}
}
setrlimit(RLIMIT_MEMLOCK, &r);
snprintf(filename, sizeof(filename), "%s_kern.o", argv[0]);
return test(filename, num_progs);
}
| gpl-2.0 |
SanDisk-Open-Source/SSD_Dashboard | uefi/gcc/gcc-4.6.3/gcc/testsuite/gcc.target/powerpc/ppc-spe.c | 19548 | /* { dg-do compile } */
/* { dg-options "-mcpu=8540 -mspe -mabi=spe -mfloat-gprs=single -O0" } */
/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */
/* (Test with -O0 so we don't optimize any of them away). */
#include <spe.h>
/* Test PowerPC SPE extensions. */
#define vector __attribute__((vector_size(8)))
vector int a, b, c, *ap;
vector float f, g, h;
unsigned int *uip;
unsigned short *usp;
int i, j, *ip;
uint64_t ull;
int64_t sll;
unsigned ui;
float fl;
uint16_t u16;
int16_t s16;
/* These are the only documented/supported accesor functions for the
SPE builtins. */
void
test_api ()
{
c = __ev_addw (a, b);
c = __ev_addiw (a, 8);
c = __ev_subfw (a, b);
c = __ev_subifw (8, a);
c = __ev_abs (a);
c = __ev_neg (a);
c = __ev_extsb (a);
c = __ev_extsh (a);
c = __ev_and (a, b);
c = __ev_or (a, b);
c = __ev_xor (a, b);
c = __ev_nand (a, b);
c = __ev_nor (a, b);
c = __ev_eqv (a, b);
c = __ev_andc (a, b);
c = __ev_orc (a, b);
c = __ev_rlw (a, b);
c = __ev_rlwi (a, 8);
c = __ev_slw (a, b);
c = __ev_slwi (a, 8);
c = __ev_srws (a, b);
c = __ev_srwu (a, b);
c = __ev_srwis (a, 8);
c = __ev_srwiu (a, 8);
c = __ev_cntlzw (a);
c = __ev_cntlsw (a);
c = __ev_rndw (a);
c = __ev_mergehi (a, b);
c = __ev_mergelo (a, b);
c = __ev_mergelohi (a, b);
c = __ev_mergehilo (a, b);
c = __ev_splati (5);
c = __ev_splatfi (6);
c = __ev_divws (a, b);
c = __ev_divwu (a, b);
c = __ev_mra (a);
i = __brinc (5, 6);
/* Loads. */
c = __ev_lddx (ap, i);
c = __ev_ldwx (ap, i);
c = __ev_ldhx (ap, i);
c = __ev_lwhex (uip, i);
c = __ev_lwhoux (uip, i);
c = __ev_lwhosx (uip, i);
c = __ev_lwwsplatx (uip, i);
c = __ev_lwhsplatx (uip, i);
c = __ev_lhhesplatx (usp, i);
c = __ev_lhhousplatx (usp, i);
c = __ev_lhhossplatx (usp, i);
c = __ev_ldd (ap, 5);
c = __ev_ldw (ap, 6);
c = __ev_ldh (ap, 7);
c = __ev_lwhe (uip, 6);
c = __ev_lwhou (uip, 6);
c = __ev_lwhos (uip, 7);
c = __ev_lwwsplat (uip, 7);
c = __ev_lwhsplat (uip, 7);
c = __ev_lhhesplat (usp, 7);
c = __ev_lhhousplat (usp, 7);
c = __ev_lhhossplat (usp, 7);
/* Stores. */
__ev_stddx (a, ap, 9);
__ev_stdwx (a, ap, 9);
__ev_stdhx (a, ap, 9);
__ev_stwwex (a, uip, 9);
__ev_stwwox (a, uip, 9);
__ev_stwhex (a, uip, 9);
__ev_stwhox (a, uip, 9);
__ev_stdd (a, ap, 9);
__ev_stdw (a, ap, 9);
__ev_stdh (a, ap, 9);
__ev_stwwe (a, uip, 9);
__ev_stwwo (a, uip, 9);
__ev_stwhe (a, uip, 9);
__ev_stwho (a, uip, 9);
/* Fixed point complex. */
c = __ev_mhossf (a, b);
c = __ev_mhosmf (a, b);
c = __ev_mhosmi (a, b);
c = __ev_mhoumi (a, b);
c = __ev_mhessf (a, b);
c = __ev_mhesmf (a, b);
c = __ev_mhesmi (a, b);
c = __ev_mheumi (a, b);
c = __ev_mhossfa (a, b);
c = __ev_mhosmfa (a, b);
c = __ev_mhosmia (a, b);
c = __ev_mhoumia (a, b);
c = __ev_mhessfa (a, b);
c = __ev_mhesmfa (a, b);
c = __ev_mhesmia (a, b);
c = __ev_mheumia (a, b);
c = __ev_mhoumf (a, b);
c = __ev_mheumf (a, b);
c = __ev_mhoumfa (a, b);
c = __ev_mheumfa (a, b);
c = __ev_mhossfaaw (a, b);
c = __ev_mhossiaaw (a, b);
c = __ev_mhosmfaaw (a, b);
c = __ev_mhosmiaaw (a, b);
c = __ev_mhousiaaw (a, b);
c = __ev_mhoumiaaw (a, b);
c = __ev_mhessfaaw (a, b);
c = __ev_mhessiaaw (a, b);
c = __ev_mhesmfaaw (a, b);
c = __ev_mhesmiaaw (a, b);
c = __ev_mheusiaaw (a, b);
c = __ev_mheumiaaw (a, b);
c = __ev_mhousfaaw (a, b);
c = __ev_mhoumfaaw (a, b);
c = __ev_mheusfaaw (a, b);
c = __ev_mheumfaaw (a, b);
c = __ev_mhossfanw (a, b);
c = __ev_mhossianw (a, b);
c = __ev_mhosmfanw (a, b);
c = __ev_mhosmianw (a, b);
c = __ev_mhousianw (a, b);
c = __ev_mhoumianw (a, b);
c = __ev_mhessfanw (a, b);
c = __ev_mhessianw (a, b);
c = __ev_mhesmfanw (a, b);
c = __ev_mhesmianw (a, b);
c = __ev_mheusianw (a, b);
c = __ev_mheumianw (a, b);
c = __ev_mhousfanw (a, b);
c = __ev_mhoumfanw (a, b);
c = __ev_mheusfanw (a, b);
c = __ev_mheumfanw (a, b);
c = __ev_mhogsmfaa (a, b);
c = __ev_mhogsmiaa (a, b);
c = __ev_mhogumiaa (a, b);
c = __ev_mhegsmfaa (a, b);
c = __ev_mhegsmiaa (a, b);
c = __ev_mhegumiaa (a, b);
c = __ev_mhogumfaa (a, b);
c = __ev_mhegumfaa (a, b);
c = __ev_mhogsmfan (a, b);
c = __ev_mhogsmian (a, b);
c = __ev_mhogumian (a, b);
c = __ev_mhegsmfan (a, b);
c = __ev_mhegsmian (a, b);
c = __ev_mhegumian (a, b);
c = __ev_mhogumfan (a, b);
c = __ev_mhegumfan (a, b);
c = __ev_mwhssf (a, b);
c = __ev_mwhsmf (a, b);
c = __ev_mwhsmi (a, b);
c = __ev_mwhumi (a, b);
c = __ev_mwhssfa (a, b);
c = __ev_mwhsmfa (a, b);
c = __ev_mwhsmia (a, b);
c = __ev_mwhumia (a, b);
c = __ev_mwhumf (a, b);
c = __ev_mwhumfa (a, b);
c = __ev_mwlumi (a, b);
c = __ev_mwlumia (a, b);
c = __ev_mwlumiaaw (a, b);
c = __ev_mwlssiaaw (a, b);
c = __ev_mwlsmiaaw (a, b);
c = __ev_mwlusiaaw (a, b);
c = __ev_mwlusiaaw (a, b);
c = __ev_mwlssianw (a, b);
c = __ev_mwlsmianw (a, b);
c = __ev_mwlusianw (a, b);
c = __ev_mwlumianw (a, b);
c = __ev_mwssf (a, b);
c = __ev_mwsmf (a, b);
c = __ev_mwsmi (a, b);
c = __ev_mwumi (a, b);
c = __ev_mwssfa (a, b);
c = __ev_mwsmfa (a, b);
c = __ev_mwsmia (a, b);
c = __ev_mwumia (a, b);
c = __ev_mwumf (a, b);
c = __ev_mwumfa (a, b);
c = __ev_mwssfaa (a, b);
c = __ev_mwsmfaa (a, b);
c = __ev_mwsmiaa (a, b);
c = __ev_mwumiaa (a, b);
c = __ev_mwumfaa (a, b);
c = __ev_mwssfan (a, b);
c = __ev_mwsmfan (a, b);
c = __ev_mwsmian (a, b);
c = __ev_mwumian (a, b);
c = __ev_mwumfan (a, b);
c = __ev_addssiaaw (a);
c = __ev_addsmiaaw (a);
c = __ev_addusiaaw (a);
c = __ev_addumiaaw (a);
c = __ev_addusfaaw (a);
c = __ev_addumfaaw (a);
c = __ev_addsmfaaw (a);
c = __ev_addssfaaw (a);
c = __ev_subfssiaaw (a);
c = __ev_subfsmiaaw (a);
c = __ev_subfusiaaw (a);
c = __ev_subfumiaaw (a);
c = __ev_subfusfaaw (a);
c = __ev_subfumfaaw (a);
c = __ev_subfsmfaaw (a);
c = __ev_subfssfaaw (a);
/* Floating point SIMD instructions. */
c = __ev_fsabs (a);
c = __ev_fsnabs (a);
c = __ev_fsneg (a);
c = __ev_fsadd (a, b);
c = __ev_fssub (a, b);
c = __ev_fsmul (a, b);
c = __ev_fsdiv (a, b);
c = __ev_fscfui (a);
c = __ev_fscfsi (a);
c = __ev_fscfuf (a);
c = __ev_fscfsf (a);
c = __ev_fsctui (a);
c = __ev_fsctsi (a);
c = __ev_fsctuf (a);
c = __ev_fsctsf (a);
c = __ev_fsctuiz (a);
c = __ev_fsctsiz (a);
/* Non supported sythetic instructions made from two instructions. */
c = __ev_mwhssfaaw (a, b);
c = __ev_mwhssiaaw (a, b);
c = __ev_mwhsmfaaw (a, b);
c = __ev_mwhsmiaaw (a, b);
c = __ev_mwhusiaaw (a, b);
c = __ev_mwhumiaaw (a, b);
c = __ev_mwhusfaaw (a, b);
c = __ev_mwhumfaaw (a, b);
c = __ev_mwhssfanw (a, b);
c = __ev_mwhssianw (a, b);
c = __ev_mwhsmfanw (a, b);
c = __ev_mwhsmianw (a, b);
c = __ev_mwhusianw (a, b);
c = __ev_mwhumianw (a, b);
c = __ev_mwhusfanw (a, b);
c = __ev_mwhumfanw (a, b);
c = __ev_mwhgssfaa (a, b);
c = __ev_mwhgsmfaa (a, b);
c = __ev_mwhgsmiaa (a, b);
c = __ev_mwhgumiaa (a, b);
c = __ev_mwhgssfan (a, b);
c = __ev_mwhgsmfan (a, b);
c = __ev_mwhgsmian (a, b);
c = __ev_mwhgumian (a, b);
/* Creating, insertion, and extraction. */
a = __ev_create_u64 ((uint64_t) 55);
a = __ev_create_s64 ((int64_t) 66);
a = __ev_create_fs (3.14F, 2.18F);
a = __ev_create_u32 ((uint32_t) 5, (uint32_t) i);
a = __ev_create_s32 ((int32_t) 5, (int32_t) 6);
a = __ev_create_u16 ((uint16_t) 6, (uint16_t) 6, (uint16_t) 7, (uint16_t) 1);
a = __ev_create_s16 ((int16_t) 6, (int16_t) 6, (int16_t) 7, (int16_t) 9);
a = __ev_create_sfix32_fs (3.0F, 2.0F);
a = __ev_create_ufix32_fs (3.0F, 2.0F);
a = __ev_create_ufix32_u32 (3U, 5U);
a = __ev_create_sfix32_s32 (6, 9);
ull = __ev_convert_u64 (a);
sll = __ev_convert_s64 (a);
i = __ev_get_upper_u32 (a);
ui = __ev_get_lower_u32 (a);
i = __ev_get_upper_s32 (a);
i = __ev_get_lower_s32 (a);
fl = __ev_get_upper_fs (a);
fl = __ev_get_lower_fs (a);
u16 = __ev_get_u16 (a, 5U);
s16 = __ev_get_s16 (a, 5U);
ui = __ev_get_upper_ufix32_u32 (a);
ui = __ev_get_lower_ufix32_u32 (a);
i = __ev_get_upper_sfix32_s32 (a);
i = __ev_get_lower_sfix32_s32 (a);
fl = __ev_get_upper_sfix32_fs (a);
fl = __ev_get_lower_sfix32_fs (a);
fl = __ev_get_upper_ufix32_fs (a);
fl = __ev_get_lower_ufix32_fs (a);
a = __ev_set_upper_u32 (a, 5U);
a = __ev_set_lower_u32 (a, 5U);
a = __ev_set_upper_s32 (a, 5U);
a = __ev_set_lower_s32 (a, 6U);
a = __ev_set_upper_fs (a, 6U);
a = __ev_set_lower_fs (a, fl);
a = __ev_set_upper_ufix32_u32 (a, 5U);
a = __ev_set_lower_ufix32_u32 (a, 5U);
a = __ev_set_upper_sfix32_s32 (a, 5);
a = __ev_set_lower_sfix32_s32 (a, 5);
a = __ev_set_upper_sfix32_fs (a, fl);
a = __ev_set_lower_sfix32_fs (a, fl);
a = __ev_set_upper_ufix32_fs (a, fl);
a = __ev_set_lower_ufix32_fs (a, fl);
a = __ev_set_acc_u64 ((uint64_t) 640);
a = __ev_set_acc_s64 ((int64_t) 460);
a = __ev_set_acc_vec64 (b);
a = __ev_set_u32 (a, 5, 6);
a = __ev_set_s32 (a, 5, 6);
a = __ev_set_fs (a, fl, 5);
a = __ev_set_u16 (a, 5U, 3);
a = __ev_set_s16 (a, 5, 6);
a = __ev_set_ufix32_u32 (a, 5U, 6U);
a = __ev_set_sfix32_s32 (a, 3, 6);
a = __ev_set_ufix32_fs (a, fl, 5);
a = __ev_set_sfix32_fs (a, fl, 5);
ui = __ev_get_u32 (a, 1);
i = __ev_get_s32 (a, 0);
fl = __ev_get_fs (a, 1);
u16 = __ev_get_u16 (a, 2);
s16 = __ev_get_s16 (a, 2);
ui = __ev_get_ufix32_u32 (a, 1);
i = __ev_get_sfix32_s32 (a, 0);
fl = __ev_get_ufix32_fs (a, 1);
fl = __ev_get_sfix32_fs (a, 0);
/* Predicates. */
i = __ev_any_gts (a, b);
i = __ev_all_gts (a, b);
i = __ev_upper_gts (a, b);
i = __ev_lower_gts (a, b);
a = __ev_select_gts (a, b, c, c);
i = __ev_any_gtu (a, b);
i = __ev_all_gtu (a, b);
i = __ev_upper_gtu (a, b);
i = __ev_lower_gtu (a, b);
a = __ev_select_gtu (a, b, c, c);
i = __ev_any_lts (a, b);
i = __ev_all_lts (a, b);
i = __ev_upper_lts (a, b);
i = __ev_lower_lts (a, b);
a = __ev_select_lts (a, b, c, c);
i = __ev_any_ltu (a, b);
i = __ev_all_ltu (a, b);
i = __ev_upper_ltu (a, b);
i = __ev_lower_ltu (a, b);
a = __ev_select_ltu (a, b, c, c);
i = __ev_any_eq (a, b);
i = __ev_all_eq (a, b);
i = __ev_upper_eq (a, b);
i = __ev_lower_eq (a, b);
a = __ev_select_eq (a, b, c, c);
i = __ev_any_fs_gt (a, b);
i = __ev_all_fs_gt (a, b);
i = __ev_upper_fs_gt (a, b);
i = __ev_lower_fs_gt (a, b);
a = __ev_select_fs_gt (a, b, c, c);
i = __ev_any_fs_lt (a, b);
i = __ev_all_fs_lt (a, b);
i = __ev_upper_fs_lt (a, b);
i = __ev_lower_fs_lt (a, b);
a = __ev_select_fs_lt (a, b, c, b);
i = __ev_any_fs_eq (a, b);
i = __ev_all_fs_eq (a, b);
i = __ev_upper_fs_eq (a, b);
i = __ev_lower_fs_eq (a, b);
a = __ev_select_fs_eq (a, b, c, c);
i = __ev_any_fs_tst_gt (a, b);
i = __ev_all_fs_tst_gt (a, b);
i = __ev_upper_fs_tst_gt (a, b);
i = __ev_lower_fs_tst_gt (a, b);
a = __ev_select_fs_tst_gt (a, b, c, c);
i = __ev_any_fs_tst_lt (a, b);
i = __ev_all_fs_tst_lt (a, b);
i = __ev_upper_fs_tst_lt (a, b);
i = __ev_lower_fs_tst_lt (a, b);
a = __ev_select_fs_tst_lt (a, b, c, c);
i = __ev_any_fs_tst_eq (a, b);
i = __ev_all_fs_tst_eq (a, b);
i = __ev_upper_fs_tst_eq (a, b);
i = __ev_lower_fs_tst_eq (a, b);
a = __ev_select_fs_tst_eq (a, b, c, c);
}
int
main (void)
{
/* Generic binary operations. */
c = __builtin_spe_evaddw (a, b);
c = __builtin_spe_evand (a, b);
c = __builtin_spe_evandc (a, b);
c = __builtin_spe_evdivws (a, b);
c = __builtin_spe_evdivwu (a, b);
c = __builtin_spe_eveqv (a, b);
h = __builtin_spe_evfsadd (f, g);
h = __builtin_spe_evfsdiv (f, g);
h = __builtin_spe_evfsmul (f, g);
h = __builtin_spe_evfssub (f, g);
c = __builtin_spe_evlddx (ap, j);
c = __builtin_spe_evldhx (ap, j);
c = __builtin_spe_evldwx (ap, j);
c = __builtin_spe_evlhhesplatx (usp, j);
c = __builtin_spe_evlhhossplatx (usp, j);
c = __builtin_spe_evlhhousplatx (usp, j);
c = __builtin_spe_evlwhex (uip, j);
c = __builtin_spe_evlwhosx (uip, j);
c = __builtin_spe_evlwhoux (uip, j);
c = __builtin_spe_evlwhsplatx (uip, j);
c = __builtin_spe_evlwwsplatx (uip, j);
c = __builtin_spe_evmergehi (a, b);
c = __builtin_spe_evmergehilo (a, b);
c = __builtin_spe_evmergelo (a, b);
c = __builtin_spe_evmergelohi (a, b);
c = __builtin_spe_evmhegsmfaa (a, b);
c = __builtin_spe_evmhegsmfan (a, b);
c = __builtin_spe_evmhegsmiaa (a, b);
c = __builtin_spe_evmhegsmian (a, b);
c = __builtin_spe_evmhegumiaa (a, b);
c = __builtin_spe_evmhegumian (a, b);
c = __builtin_spe_evmhesmf (a, b);
c = __builtin_spe_evmhesmfa (a, b);
c = __builtin_spe_evmhesmfaaw (a, b);
c = __builtin_spe_evmhesmfanw (a, b);
c = __builtin_spe_evmhesmi (a, b);
c = __builtin_spe_evmhesmia (a, b);
c = __builtin_spe_evmhesmiaaw (a, b);
c = __builtin_spe_evmhesmianw (a, b);
c = __builtin_spe_evmhessf (a, b);
c = __builtin_spe_evmhessfa (a, b);
c = __builtin_spe_evmhessfaaw (a, b);
c = __builtin_spe_evmhessfanw (a, b);
c = __builtin_spe_evmhessiaaw (a, b);
c = __builtin_spe_evmhessianw (a, b);
c = __builtin_spe_evmheumi (a, b);
c = __builtin_spe_evmheumia (a, b);
c = __builtin_spe_evmheumiaaw (a, b);
c = __builtin_spe_evmheumianw (a, b);
c = __builtin_spe_evmheusiaaw (a, b);
c = __builtin_spe_evmheusianw (a, b);
c = __builtin_spe_evmhogsmfaa (a, b);
c = __builtin_spe_evmhogsmfan (a, b);
c = __builtin_spe_evmhogsmiaa (a, b);
c = __builtin_spe_evmhogsmian (a, b);
c = __builtin_spe_evmhogumiaa (a, b);
c = __builtin_spe_evmhogumian (a, b);
c = __builtin_spe_evmhosmf (a, b);
c = __builtin_spe_evmhosmfa (a, b);
c = __builtin_spe_evmhosmfaaw (a, b);
c = __builtin_spe_evmhosmfanw (a, b);
c = __builtin_spe_evmhosmi (a, b);
c = __builtin_spe_evmhosmia (a, b);
c = __builtin_spe_evmhosmiaaw (a, b);
c = __builtin_spe_evmhosmianw (a, b);
c = __builtin_spe_evmhossf (a, b);
c = __builtin_spe_evmhossfa (a, b);
c = __builtin_spe_evmhossfaaw (a, b);
c = __builtin_spe_evmhossfanw (a, b);
c = __builtin_spe_evmhossiaaw (a, b);
c = __builtin_spe_evmhossianw (a, b);
c = __builtin_spe_evmhoumi (a, b);
c = __builtin_spe_evmhoumia (a, b);
c = __builtin_spe_evmhoumiaaw (a, b);
c = __builtin_spe_evmhoumianw (a, b);
c = __builtin_spe_evmhousiaaw (a, b);
c = __builtin_spe_evmhousianw (a, b);
c = __builtin_spe_evmwhsmf (a, b);
c = __builtin_spe_evmwhsmfa (a, b);
c = __builtin_spe_evmwhsmi (a, b);
c = __builtin_spe_evmwhsmia (a, b);
c = __builtin_spe_evmwhssf (a, b);
c = __builtin_spe_evmwhssfa (a, b);
c = __builtin_spe_evmwhumi (a, b);
c = __builtin_spe_evmwhumia (a, b);
c = __builtin_spe_evmwlsmiaaw (a, b);
c = __builtin_spe_evmwlsmianw (a, b);
c = __builtin_spe_evmwlssiaaw (a, b);
c = __builtin_spe_evmwlssianw (a, b);
c = __builtin_spe_evmwlumi (a, b);
c = __builtin_spe_evmwlumia (a, b);
c = __builtin_spe_evmwlumiaaw (a, b);
c = __builtin_spe_evmwlumianw (a, b);
c = __builtin_spe_evmwlusiaaw (a, b);
c = __builtin_spe_evmwlusianw (a, b);
c = __builtin_spe_evmwsmf (a, b);
c = __builtin_spe_evmwsmfa (a, b);
c = __builtin_spe_evmwsmfaa (a, b);
c = __builtin_spe_evmwsmfan (a, b);
c = __builtin_spe_evmwsmi (a, b);
c = __builtin_spe_evmwsmia (a, b);
c = __builtin_spe_evmwsmiaa (a, b);
c = __builtin_spe_evmwsmian (a, b);
c = __builtin_spe_evmwssf (a, b);
c = __builtin_spe_evmwssfa (a, b);
c = __builtin_spe_evmwssfaa (a, b);
c = __builtin_spe_evmwssfan (a, b);
c = __builtin_spe_evmwumi (a, b);
c = __builtin_spe_evmwumia (a, b);
c = __builtin_spe_evmwumiaa (a, b);
c = __builtin_spe_evmwumian (a, b);
c = __builtin_spe_evnand (a, b);
c = __builtin_spe_evnor (a, b);
c = __builtin_spe_evor (a, b);
c = __builtin_spe_evorc (a, b);
c = __builtin_spe_evrlw (a, b);
c = __builtin_spe_evslw (a, b);
c = __builtin_spe_evsrws (a, b);
c = __builtin_spe_evsrwu (a, b);
c = __builtin_spe_evsubfw (a, b);
c = __builtin_spe_evxor (a, b);
c = __builtin_spe_evmwhssfaa (a, b);
c = __builtin_spe_evmwhssmaa (a, b);
c = __builtin_spe_evmwhsmfaa (a, b);
c = __builtin_spe_evmwhsmiaa (a, b);
c = __builtin_spe_evmwhusiaa (a, b);
c = __builtin_spe_evmwhumiaa (a, b);
c = __builtin_spe_evmwhssfan (a, b);
c = __builtin_spe_evmwhssian (a, b);
c = __builtin_spe_evmwhsmfan (a, b);
c = __builtin_spe_evmwhsmian (a, b);
c = __builtin_spe_evmwhusian (a, b);
c = __builtin_spe_evmwhumian (a, b);
c = __builtin_spe_evmwhgssfaa (a, b);
c = __builtin_spe_evmwhgsmfaa (a, b);
c = __builtin_spe_evmwhgsmiaa (a, b);
c = __builtin_spe_evmwhgumiaa (a, b);
c = __builtin_spe_evmwhgssfan (a, b);
c = __builtin_spe_evmwhgsmfan (a, b);
c = __builtin_spe_evmwhgsmian (a, b);
c = __builtin_spe_evmwhgumian (a, b);
i = __builtin_spe_brinc (i, j);
/* Generic unary operations. */
a = __builtin_spe_evabs (b);
a = __builtin_spe_evaddsmiaaw (b);
a = __builtin_spe_evaddssiaaw (b);
a = __builtin_spe_evaddumiaaw (b);
a = __builtin_spe_evaddusiaaw (b);
a = __builtin_spe_evcntlsw (b);
a = __builtin_spe_evcntlzw (b);
a = __builtin_spe_evextsb (b);
a = __builtin_spe_evextsh (b);
f = __builtin_spe_evfsabs (g);
f = __builtin_spe_evfscfsf (g);
a = __builtin_spe_evfscfsi (g);
f = __builtin_spe_evfscfuf (g);
f = __builtin_spe_evfscfui (a);
f = __builtin_spe_evfsctsf (g);
a = __builtin_spe_evfsctsi (g);
a = __builtin_spe_evfsctsiz (g);
f = __builtin_spe_evfsctuf (g);
a = __builtin_spe_evfsctui (g);
a = __builtin_spe_evfsctuiz (g);
f = __builtin_spe_evfsnabs (g);
f = __builtin_spe_evfsneg (g);
a = __builtin_spe_evmra (b);
a = __builtin_spe_evneg (b);
a = __builtin_spe_evrndw (b);
a = __builtin_spe_evsubfsmiaaw (b);
a = __builtin_spe_evsubfssiaaw (b);
a = __builtin_spe_evsubfumiaaw (b);
a = __builtin_spe_evsubfusiaaw (b);
/* Unary operations of the form: X = foo (5_bit_signed_immediate). */
a = __builtin_spe_evsplatfi (5);
a = __builtin_spe_evsplati (5);
/* Binary operations of the form: X = foo(Y, 5_bit_immediate). */
a = __builtin_spe_evaddiw (b, 13);
a = __builtin_spe_evldd (ap, 13);
a = __builtin_spe_evldh (ap, 13);
a = __builtin_spe_evldw (ap, 13);
a = __builtin_spe_evlhhesplat (usp, 13);
a = __builtin_spe_evlhhossplat (usp, 13);
a = __builtin_spe_evlhhousplat (usp, 13);
a = __builtin_spe_evlwhe (uip, 13);
a = __builtin_spe_evlwhos (uip, 13);
a = __builtin_spe_evlwhou (uip, 13);
a = __builtin_spe_evlwhsplat (uip, 13);
a = __builtin_spe_evlwwsplat (uip, 13);
a = __builtin_spe_evrlwi (b, 13);
a = __builtin_spe_evslwi (b, 13);
a = __builtin_spe_evsrwis (b, 13);
a = __builtin_spe_evsrwiu (b, 13);
a = __builtin_spe_evsubifw (b, 13);
/* Store indexed builtins. */
__builtin_spe_evstddx (b, ap, j);
__builtin_spe_evstdhx (b, ap, j);
__builtin_spe_evstdwx (b, ap, j);
__builtin_spe_evstwhex (b, uip, j);
__builtin_spe_evstwhox (b, uip, j);
__builtin_spe_evstwwex (b, uip, j);
__builtin_spe_evstwwox (b, uip, j);
/* Store indexed immediate builtins. */
__builtin_spe_evstdd (b, ap, 5);
__builtin_spe_evstdh (b, ap, 5);
__builtin_spe_evstdw (b, ap, 5);
__builtin_spe_evstwhe (b, uip, 5);
__builtin_spe_evstwho (b, uip, 5);
__builtin_spe_evstwwe (b, uip, 5);
__builtin_spe_evstwwo (b, uip, 5);
/* SPEFSCR builtins. */
i = __builtin_spe_mfspefscr ();
__builtin_spe_mtspefscr (j);
test_api ();
return 0;
}
| gpl-2.0 |
shakalaca/ASUS_ZenFone_ZE550ML_ZE551ML | linux/modules/ipu/drivers/media/pci/css2600/lib2401/hive_isp_css_include/error_support.h | 2023 | /*
* Support for Intel Camera Imaging ISP subsystem.
*
* Copyright (c) 2010 - 2014 Intel Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License version
* 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
* 02110-1301, USA.
*
*/
#ifndef __ERROR_SUPPORT_H_INCLUDED__
#define __ERROR_SUPPORT_H_INCLUDED__
#if defined(_MSC_VER)
#include <errno.h>
/*
* Put here everything _MSC_VER specific not covered in
* "errno.h"
*/
#define EINVAL 22
#define EBADE 52
#define ENODATA 61
#define ENOTCONN 107
#define ENOTSUP 252
#define ENOBUFS 233
#elif defined(__HIVECC)
#include <errno.h>
/*
* Put here everything __HIVECC specific not covered in
* "errno.h"
*/
#elif defined(__KERNEL__)
#include <linux/errno.h>
/*
* Put here everything __KERNEL__ specific not covered in
* "errno.h"
*/
#define ENOTSUP 252
#elif defined(__GNUC__)
#include <errno.h>
/*
* Put here everything __GNUC__ specific not covered in
* "errno.h"
*/
#else /* default is for the FIST environment */
#include <errno.h>
/*
* Put here everything FIST specific not covered in
* "errno.h"
*/
#endif
#define verifexit(cond,error_tag) \
do { \
if (!(cond)){ \
goto EXIT; \
} \
} while(0)
#define verifjmpexit(cond) \
do { \
if (!(cond)){ \
goto EXIT; \
} \
} while(0)
#endif /* __ERROR_SUPPORT_H_INCLUDED__ */
| gpl-2.0 |
dsb9938/HTC_One_max | security/selinux/ss/mls.h | 2390 | /*
* Updated: Trusted Computer Solutions, Inc. <[email protected]>
*
* Support for enhanced MLS infrastructure.
*
* Copyright (C) 2004-2006 Trusted Computer Solutions, Inc.
*/
/*
* Updated: Hewlett-Packard <[email protected]>
*
* Added support to import/export the MLS label from NetLabel
*
* (c) Copyright Hewlett-Packard Development Company, L.P., 2006
*/
#ifndef _SS_MLS_H_
#define _SS_MLS_H_
#include "context.h"
#include "policydb.h"
int mls_compute_context_len(struct context *context);
void mls_sid_to_context(struct context *context, char **scontext);
int mls_context_isvalid(struct policydb *p, struct context *c);
int mls_range_isvalid(struct policydb *p, struct mls_range *r);
int mls_level_isvalid(struct policydb *p, struct mls_level *l);
int mls_context_to_sid(struct policydb *p,
char oldc,
char **scontext,
struct context *context,
struct sidtab *s,
u32 def_sid);
int mls_from_string(char *str, struct context *context, gfp_t gfp_mask);
int mls_range_set(struct context *context, struct mls_range *range);
int mls_convert_context(struct policydb *oldp,
struct policydb *newp,
struct context *context);
int mls_compute_sid(struct context *scontext,
struct context *tcontext,
u16 tclass,
u32 specified,
struct context *newcontext,
bool sock);
int mls_setup_user_range(struct context *fromcon, struct user_datum *user,
struct context *usercon);
#ifdef CONFIG_NETLABEL
void mls_export_netlbl_lvl(struct context *context,
struct netlbl_lsm_secattr *secattr);
void mls_import_netlbl_lvl(struct context *context,
struct netlbl_lsm_secattr *secattr);
int mls_export_netlbl_cat(struct context *context,
struct netlbl_lsm_secattr *secattr);
int mls_import_netlbl_cat(struct context *context,
struct netlbl_lsm_secattr *secattr);
#else
static inline void mls_export_netlbl_lvl(struct context *context,
struct netlbl_lsm_secattr *secattr)
{
return;
}
static inline void mls_import_netlbl_lvl(struct context *context,
struct netlbl_lsm_secattr *secattr)
{
return;
}
static inline int mls_export_netlbl_cat(struct context *context,
struct netlbl_lsm_secattr *secattr)
{
return -ENOMEM;
}
static inline int mls_import_netlbl_cat(struct context *context,
struct netlbl_lsm_secattr *secattr)
{
return -ENOMEM;
}
#endif
#endif
| gpl-2.0 |
nrackleff/capstone | web/core/lib/Drupal/Core/Field/Plugin/Field/FieldFormatter/NumericFormatterBase.php | 3132 | <?php
/**
* @file
* Contains \Drupal\Core\Field\Plugin\Field\FieldFormatter\NumericFormatterBase.
*/
namespace Drupal\Core\Field\Plugin\Field\FieldFormatter;
use Drupal\Core\Field\AllowedTagsXssTrait;
use Drupal\Core\Field\FormatterBase;
use Drupal\Core\Field\FieldItemListInterface;
use Drupal\Core\Form\FormStateInterface;
/**
* Parent plugin for decimal and integer formatters.
*/
abstract class NumericFormatterBase extends FormatterBase {
use AllowedTagsXssTrait;
/**
* {@inheritdoc}
*/
public function settingsForm(array $form, FormStateInterface $form_state) {
$options = array(
'' => t('- None -'),
'.' => t('Decimal point'),
',' => t('Comma'),
' ' => t('Space'),
chr(8201) => t('Thin space'),
"'" => t('Apostrophe'),
);
$elements['thousand_separator'] = array(
'#type' => 'select',
'#title' => t('Thousand marker'),
'#options' => $options,
'#default_value' => $this->getSetting('thousand_separator'),
'#weight' => 0,
);
$elements['prefix_suffix'] = array(
'#type' => 'checkbox',
'#title' => t('Display prefix and suffix'),
'#default_value' => $this->getSetting('prefix_suffix'),
'#weight' => 10,
);
return $elements;
}
/**
* {@inheritdoc}
*/
public function settingsSummary() {
$summary = array();
$summary[] = $this->numberFormat(1234.1234567890);
if ($this->getSetting('prefix_suffix')) {
$summary[] = t('Display with prefix and suffix.');
}
return $summary;
}
/**
* {@inheritdoc}
*/
public function viewElements(FieldItemListInterface $items, $langcode) {
$elements = array();
$settings = $this->getFieldSettings();
foreach ($items as $delta => $item) {
$output = $this->numberFormat($item->value);
// Account for prefix and suffix.
if ($this->getSetting('prefix_suffix')) {
$prefixes = isset($settings['prefix']) ? array_map(array('Drupal\Core\Field\FieldFilteredMarkup', 'create'), explode('|', $settings['prefix'])) : array('');
$suffixes = isset($settings['suffix']) ? array_map(array('Drupal\Core\Field\FieldFilteredMarkup', 'create'), explode('|', $settings['suffix'])) : array('');
$prefix = (count($prefixes) > 1) ? $this->formatPlural($item->value, $prefixes[0], $prefixes[1]) : $prefixes[0];
$suffix = (count($suffixes) > 1) ? $this->formatPlural($item->value, $suffixes[0], $suffixes[1]) : $suffixes[0];
$output = $prefix . $output . $suffix;
}
// Output the raw value in a content attribute if the text of the HTML
// element differs from the raw value (for example when a prefix is used).
if (isset($item->_attributes) && $item->value != $output) {
$item->_attributes += array('content' => $item->value);
}
$elements[$delta] = array('#markup' => $output);
}
return $elements;
}
/**
* Formats a number.
*
* @param mixed $number
* The numeric value.
*
* @return string
* The formatted number.
*/
abstract protected function numberFormat($number);
}
| gpl-2.0 |
prasidh09/cse506 | unionfs-3.10.y/sound/drivers/dummy.c | 32891 | /*
* Dummy soundcard
* Copyright (c) by Jaroslav Kysela <[email protected]>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#include <linux/init.h>
#include <linux/err.h>
#include <linux/platform_device.h>
#include <linux/jiffies.h>
#include <linux/slab.h>
#include <linux/time.h>
#include <linux/wait.h>
#include <linux/hrtimer.h>
#include <linux/math64.h>
#include <linux/module.h>
#include <sound/core.h>
#include <sound/control.h>
#include <sound/tlv.h>
#include <sound/pcm.h>
#include <sound/rawmidi.h>
#include <sound/info.h>
#include <sound/initval.h>
MODULE_AUTHOR("Jaroslav Kysela <[email protected]>");
MODULE_DESCRIPTION("Dummy soundcard (/dev/null)");
MODULE_LICENSE("GPL");
MODULE_SUPPORTED_DEVICE("{{ALSA,Dummy soundcard}}");
#define MAX_PCM_DEVICES 4
#define MAX_PCM_SUBSTREAMS 128
#define MAX_MIDI_DEVICES 2
/* defaults */
#define MAX_BUFFER_SIZE (64*1024)
#define MIN_PERIOD_SIZE 64
#define MAX_PERIOD_SIZE MAX_BUFFER_SIZE
#define USE_FORMATS (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE)
#define USE_RATE SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000
#define USE_RATE_MIN 5500
#define USE_RATE_MAX 48000
#define USE_CHANNELS_MIN 1
#define USE_CHANNELS_MAX 2
#define USE_PERIODS_MIN 1
#define USE_PERIODS_MAX 1024
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
static bool enable[SNDRV_CARDS] = {1, [1 ... (SNDRV_CARDS - 1)] = 0};
static char *model[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = NULL};
static int pcm_devs[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1};
static int pcm_substreams[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 8};
//static int midi_devs[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};
#ifdef CONFIG_HIGH_RES_TIMERS
static bool hrtimer = 1;
#endif
static bool fake_buffer = 1;
module_param_array(index, int, NULL, 0444);
MODULE_PARM_DESC(index, "Index value for dummy soundcard.");
module_param_array(id, charp, NULL, 0444);
MODULE_PARM_DESC(id, "ID string for dummy soundcard.");
module_param_array(enable, bool, NULL, 0444);
MODULE_PARM_DESC(enable, "Enable this dummy soundcard.");
module_param_array(model, charp, NULL, 0444);
MODULE_PARM_DESC(model, "Soundcard model.");
module_param_array(pcm_devs, int, NULL, 0444);
MODULE_PARM_DESC(pcm_devs, "PCM devices # (0-4) for dummy driver.");
module_param_array(pcm_substreams, int, NULL, 0444);
MODULE_PARM_DESC(pcm_substreams, "PCM substreams # (1-128) for dummy driver.");
//module_param_array(midi_devs, int, NULL, 0444);
//MODULE_PARM_DESC(midi_devs, "MIDI devices # (0-2) for dummy driver.");
module_param(fake_buffer, bool, 0444);
MODULE_PARM_DESC(fake_buffer, "Fake buffer allocations.");
#ifdef CONFIG_HIGH_RES_TIMERS
module_param(hrtimer, bool, 0644);
MODULE_PARM_DESC(hrtimer, "Use hrtimer as the timer source.");
#endif
static struct platform_device *devices[SNDRV_CARDS];
#define MIXER_ADDR_MASTER 0
#define MIXER_ADDR_LINE 1
#define MIXER_ADDR_MIC 2
#define MIXER_ADDR_SYNTH 3
#define MIXER_ADDR_CD 4
#define MIXER_ADDR_LAST 4
struct dummy_timer_ops {
int (*create)(struct snd_pcm_substream *);
void (*free)(struct snd_pcm_substream *);
int (*prepare)(struct snd_pcm_substream *);
int (*start)(struct snd_pcm_substream *);
int (*stop)(struct snd_pcm_substream *);
snd_pcm_uframes_t (*pointer)(struct snd_pcm_substream *);
};
struct dummy_model {
const char *name;
int (*playback_constraints)(struct snd_pcm_runtime *runtime);
int (*capture_constraints)(struct snd_pcm_runtime *runtime);
u64 formats;
size_t buffer_bytes_max;
size_t period_bytes_min;
size_t period_bytes_max;
unsigned int periods_min;
unsigned int periods_max;
unsigned int rates;
unsigned int rate_min;
unsigned int rate_max;
unsigned int channels_min;
unsigned int channels_max;
};
struct snd_dummy {
struct snd_card *card;
struct dummy_model *model;
struct snd_pcm *pcm;
struct snd_pcm_hardware pcm_hw;
spinlock_t mixer_lock;
int mixer_volume[MIXER_ADDR_LAST+1][2];
int capture_source[MIXER_ADDR_LAST+1][2];
int iobox;
struct snd_kcontrol *cd_volume_ctl;
struct snd_kcontrol *cd_switch_ctl;
const struct dummy_timer_ops *timer_ops;
};
/*
* card models
*/
static int emu10k1_playback_constraints(struct snd_pcm_runtime *runtime)
{
int err;
err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
if (err < 0)
return err;
err = snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 256, UINT_MAX);
if (err < 0)
return err;
return 0;
}
struct dummy_model model_emu10k1 = {
.name = "emu10k1",
.playback_constraints = emu10k1_playback_constraints,
.buffer_bytes_max = 128 * 1024,
};
struct dummy_model model_rme9652 = {
.name = "rme9652",
.buffer_bytes_max = 26 * 64 * 1024,
.formats = SNDRV_PCM_FMTBIT_S32_LE,
.channels_min = 26,
.channels_max = 26,
.periods_min = 2,
.periods_max = 2,
};
struct dummy_model model_ice1712 = {
.name = "ice1712",
.buffer_bytes_max = 256 * 1024,
.formats = SNDRV_PCM_FMTBIT_S32_LE,
.channels_min = 10,
.channels_max = 10,
.periods_min = 1,
.periods_max = 1024,
};
struct dummy_model model_uda1341 = {
.name = "uda1341",
.buffer_bytes_max = 16380,
.formats = SNDRV_PCM_FMTBIT_S16_LE,
.channels_min = 2,
.channels_max = 2,
.periods_min = 2,
.periods_max = 255,
};
struct dummy_model model_ac97 = {
.name = "ac97",
.formats = SNDRV_PCM_FMTBIT_S16_LE,
.channels_min = 2,
.channels_max = 2,
.rates = SNDRV_PCM_RATE_48000,
.rate_min = 48000,
.rate_max = 48000,
};
struct dummy_model model_ca0106 = {
.name = "ca0106",
.formats = SNDRV_PCM_FMTBIT_S16_LE,
.buffer_bytes_max = ((65536-64)*8),
.period_bytes_max = (65536-64),
.periods_min = 2,
.periods_max = 8,
.channels_min = 2,
.channels_max = 2,
.rates = SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_192000,
.rate_min = 48000,
.rate_max = 192000,
};
struct dummy_model *dummy_models[] = {
&model_emu10k1,
&model_rme9652,
&model_ice1712,
&model_uda1341,
&model_ac97,
&model_ca0106,
NULL
};
/*
* system timer interface
*/
struct dummy_systimer_pcm {
spinlock_t lock;
struct timer_list timer;
unsigned long base_time;
unsigned int frac_pos; /* fractional sample position (based HZ) */
unsigned int frac_period_rest;
unsigned int frac_buffer_size; /* buffer_size * HZ */
unsigned int frac_period_size; /* period_size * HZ */
unsigned int rate;
int elapsed;
struct snd_pcm_substream *substream;
};
static void dummy_systimer_rearm(struct dummy_systimer_pcm *dpcm)
{
dpcm->timer.expires = jiffies +
(dpcm->frac_period_rest + dpcm->rate - 1) / dpcm->rate;
add_timer(&dpcm->timer);
}
static void dummy_systimer_update(struct dummy_systimer_pcm *dpcm)
{
unsigned long delta;
delta = jiffies - dpcm->base_time;
if (!delta)
return;
dpcm->base_time += delta;
delta *= dpcm->rate;
dpcm->frac_pos += delta;
while (dpcm->frac_pos >= dpcm->frac_buffer_size)
dpcm->frac_pos -= dpcm->frac_buffer_size;
while (dpcm->frac_period_rest <= delta) {
dpcm->elapsed++;
dpcm->frac_period_rest += dpcm->frac_period_size;
}
dpcm->frac_period_rest -= delta;
}
static int dummy_systimer_start(struct snd_pcm_substream *substream)
{
struct dummy_systimer_pcm *dpcm = substream->runtime->private_data;
spin_lock(&dpcm->lock);
dpcm->base_time = jiffies;
dummy_systimer_rearm(dpcm);
spin_unlock(&dpcm->lock);
return 0;
}
static int dummy_systimer_stop(struct snd_pcm_substream *substream)
{
struct dummy_systimer_pcm *dpcm = substream->runtime->private_data;
spin_lock(&dpcm->lock);
del_timer(&dpcm->timer);
spin_unlock(&dpcm->lock);
return 0;
}
static int dummy_systimer_prepare(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct dummy_systimer_pcm *dpcm = runtime->private_data;
dpcm->frac_pos = 0;
dpcm->rate = runtime->rate;
dpcm->frac_buffer_size = runtime->buffer_size * HZ;
dpcm->frac_period_size = runtime->period_size * HZ;
dpcm->frac_period_rest = dpcm->frac_period_size;
dpcm->elapsed = 0;
return 0;
}
static void dummy_systimer_callback(unsigned long data)
{
struct dummy_systimer_pcm *dpcm = (struct dummy_systimer_pcm *)data;
unsigned long flags;
int elapsed = 0;
spin_lock_irqsave(&dpcm->lock, flags);
dummy_systimer_update(dpcm);
dummy_systimer_rearm(dpcm);
elapsed = dpcm->elapsed;
dpcm->elapsed = 0;
spin_unlock_irqrestore(&dpcm->lock, flags);
if (elapsed)
snd_pcm_period_elapsed(dpcm->substream);
}
static snd_pcm_uframes_t
dummy_systimer_pointer(struct snd_pcm_substream *substream)
{
struct dummy_systimer_pcm *dpcm = substream->runtime->private_data;
snd_pcm_uframes_t pos;
spin_lock(&dpcm->lock);
dummy_systimer_update(dpcm);
pos = dpcm->frac_pos / HZ;
spin_unlock(&dpcm->lock);
return pos;
}
static int dummy_systimer_create(struct snd_pcm_substream *substream)
{
struct dummy_systimer_pcm *dpcm;
dpcm = kzalloc(sizeof(*dpcm), GFP_KERNEL);
if (!dpcm)
return -ENOMEM;
substream->runtime->private_data = dpcm;
init_timer(&dpcm->timer);
dpcm->timer.data = (unsigned long) dpcm;
dpcm->timer.function = dummy_systimer_callback;
spin_lock_init(&dpcm->lock);
dpcm->substream = substream;
return 0;
}
static void dummy_systimer_free(struct snd_pcm_substream *substream)
{
kfree(substream->runtime->private_data);
}
static struct dummy_timer_ops dummy_systimer_ops = {
.create = dummy_systimer_create,
.free = dummy_systimer_free,
.prepare = dummy_systimer_prepare,
.start = dummy_systimer_start,
.stop = dummy_systimer_stop,
.pointer = dummy_systimer_pointer,
};
#ifdef CONFIG_HIGH_RES_TIMERS
/*
* hrtimer interface
*/
struct dummy_hrtimer_pcm {
ktime_t base_time;
ktime_t period_time;
atomic_t running;
struct hrtimer timer;
struct tasklet_struct tasklet;
struct snd_pcm_substream *substream;
};
static void dummy_hrtimer_pcm_elapsed(unsigned long priv)
{
struct dummy_hrtimer_pcm *dpcm = (struct dummy_hrtimer_pcm *)priv;
if (atomic_read(&dpcm->running))
snd_pcm_period_elapsed(dpcm->substream);
}
static enum hrtimer_restart dummy_hrtimer_callback(struct hrtimer *timer)
{
struct dummy_hrtimer_pcm *dpcm;
dpcm = container_of(timer, struct dummy_hrtimer_pcm, timer);
if (!atomic_read(&dpcm->running))
return HRTIMER_NORESTART;
tasklet_schedule(&dpcm->tasklet);
hrtimer_forward_now(timer, dpcm->period_time);
return HRTIMER_RESTART;
}
static int dummy_hrtimer_start(struct snd_pcm_substream *substream)
{
struct dummy_hrtimer_pcm *dpcm = substream->runtime->private_data;
dpcm->base_time = hrtimer_cb_get_time(&dpcm->timer);
hrtimer_start(&dpcm->timer, dpcm->period_time, HRTIMER_MODE_REL);
atomic_set(&dpcm->running, 1);
return 0;
}
static int dummy_hrtimer_stop(struct snd_pcm_substream *substream)
{
struct dummy_hrtimer_pcm *dpcm = substream->runtime->private_data;
atomic_set(&dpcm->running, 0);
hrtimer_cancel(&dpcm->timer);
return 0;
}
static inline void dummy_hrtimer_sync(struct dummy_hrtimer_pcm *dpcm)
{
tasklet_kill(&dpcm->tasklet);
}
static snd_pcm_uframes_t
dummy_hrtimer_pointer(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct dummy_hrtimer_pcm *dpcm = runtime->private_data;
u64 delta;
u32 pos;
delta = ktime_us_delta(hrtimer_cb_get_time(&dpcm->timer),
dpcm->base_time);
delta = div_u64(delta * runtime->rate + 999999, 1000000);
div_u64_rem(delta, runtime->buffer_size, &pos);
return pos;
}
static int dummy_hrtimer_prepare(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct dummy_hrtimer_pcm *dpcm = runtime->private_data;
unsigned int period, rate;
long sec;
unsigned long nsecs;
dummy_hrtimer_sync(dpcm);
period = runtime->period_size;
rate = runtime->rate;
sec = period / rate;
period %= rate;
nsecs = div_u64((u64)period * 1000000000UL + rate - 1, rate);
dpcm->period_time = ktime_set(sec, nsecs);
return 0;
}
static int dummy_hrtimer_create(struct snd_pcm_substream *substream)
{
struct dummy_hrtimer_pcm *dpcm;
dpcm = kzalloc(sizeof(*dpcm), GFP_KERNEL);
if (!dpcm)
return -ENOMEM;
substream->runtime->private_data = dpcm;
hrtimer_init(&dpcm->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
dpcm->timer.function = dummy_hrtimer_callback;
dpcm->substream = substream;
atomic_set(&dpcm->running, 0);
tasklet_init(&dpcm->tasklet, dummy_hrtimer_pcm_elapsed,
(unsigned long)dpcm);
return 0;
}
static void dummy_hrtimer_free(struct snd_pcm_substream *substream)
{
struct dummy_hrtimer_pcm *dpcm = substream->runtime->private_data;
dummy_hrtimer_sync(dpcm);
kfree(dpcm);
}
static struct dummy_timer_ops dummy_hrtimer_ops = {
.create = dummy_hrtimer_create,
.free = dummy_hrtimer_free,
.prepare = dummy_hrtimer_prepare,
.start = dummy_hrtimer_start,
.stop = dummy_hrtimer_stop,
.pointer = dummy_hrtimer_pointer,
};
#endif /* CONFIG_HIGH_RES_TIMERS */
/*
* PCM interface
*/
static int dummy_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
{
struct snd_dummy *dummy = snd_pcm_substream_chip(substream);
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_RESUME:
return dummy->timer_ops->start(substream);
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
return dummy->timer_ops->stop(substream);
}
return -EINVAL;
}
static int dummy_pcm_prepare(struct snd_pcm_substream *substream)
{
struct snd_dummy *dummy = snd_pcm_substream_chip(substream);
return dummy->timer_ops->prepare(substream);
}
static snd_pcm_uframes_t dummy_pcm_pointer(struct snd_pcm_substream *substream)
{
struct snd_dummy *dummy = snd_pcm_substream_chip(substream);
return dummy->timer_ops->pointer(substream);
}
static struct snd_pcm_hardware dummy_pcm_hardware = {
.info = (SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_RESUME |
SNDRV_PCM_INFO_MMAP_VALID),
.formats = USE_FORMATS,
.rates = USE_RATE,
.rate_min = USE_RATE_MIN,
.rate_max = USE_RATE_MAX,
.channels_min = USE_CHANNELS_MIN,
.channels_max = USE_CHANNELS_MAX,
.buffer_bytes_max = MAX_BUFFER_SIZE,
.period_bytes_min = MIN_PERIOD_SIZE,
.period_bytes_max = MAX_PERIOD_SIZE,
.periods_min = USE_PERIODS_MIN,
.periods_max = USE_PERIODS_MAX,
.fifo_size = 0,
};
static int dummy_pcm_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *hw_params)
{
if (fake_buffer) {
/* runtime->dma_bytes has to be set manually to allow mmap */
substream->runtime->dma_bytes = params_buffer_bytes(hw_params);
return 0;
}
return snd_pcm_lib_malloc_pages(substream,
params_buffer_bytes(hw_params));
}
static int dummy_pcm_hw_free(struct snd_pcm_substream *substream)
{
if (fake_buffer)
return 0;
return snd_pcm_lib_free_pages(substream);
}
static int dummy_pcm_open(struct snd_pcm_substream *substream)
{
struct snd_dummy *dummy = snd_pcm_substream_chip(substream);
struct dummy_model *model = dummy->model;
struct snd_pcm_runtime *runtime = substream->runtime;
int err;
dummy->timer_ops = &dummy_systimer_ops;
#ifdef CONFIG_HIGH_RES_TIMERS
if (hrtimer)
dummy->timer_ops = &dummy_hrtimer_ops;
#endif
err = dummy->timer_ops->create(substream);
if (err < 0)
return err;
runtime->hw = dummy->pcm_hw;
if (substream->pcm->device & 1) {
runtime->hw.info &= ~SNDRV_PCM_INFO_INTERLEAVED;
runtime->hw.info |= SNDRV_PCM_INFO_NONINTERLEAVED;
}
if (substream->pcm->device & 2)
runtime->hw.info &= ~(SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_MMAP_VALID);
if (model == NULL)
return 0;
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
if (model->playback_constraints)
err = model->playback_constraints(substream->runtime);
} else {
if (model->capture_constraints)
err = model->capture_constraints(substream->runtime);
}
if (err < 0) {
dummy->timer_ops->free(substream);
return err;
}
return 0;
}
static int dummy_pcm_close(struct snd_pcm_substream *substream)
{
struct snd_dummy *dummy = snd_pcm_substream_chip(substream);
dummy->timer_ops->free(substream);
return 0;
}
/*
* dummy buffer handling
*/
static void *dummy_page[2];
static void free_fake_buffer(void)
{
if (fake_buffer) {
int i;
for (i = 0; i < 2; i++)
if (dummy_page[i]) {
free_page((unsigned long)dummy_page[i]);
dummy_page[i] = NULL;
}
}
}
static int alloc_fake_buffer(void)
{
int i;
if (!fake_buffer)
return 0;
for (i = 0; i < 2; i++) {
dummy_page[i] = (void *)get_zeroed_page(GFP_KERNEL);
if (!dummy_page[i]) {
free_fake_buffer();
return -ENOMEM;
}
}
return 0;
}
static int dummy_pcm_copy(struct snd_pcm_substream *substream,
int channel, snd_pcm_uframes_t pos,
void __user *dst, snd_pcm_uframes_t count)
{
return 0; /* do nothing */
}
static int dummy_pcm_silence(struct snd_pcm_substream *substream,
int channel, snd_pcm_uframes_t pos,
snd_pcm_uframes_t count)
{
return 0; /* do nothing */
}
static struct page *dummy_pcm_page(struct snd_pcm_substream *substream,
unsigned long offset)
{
return virt_to_page(dummy_page[substream->stream]); /* the same page */
}
static struct snd_pcm_ops dummy_pcm_ops = {
.open = dummy_pcm_open,
.close = dummy_pcm_close,
.ioctl = snd_pcm_lib_ioctl,
.hw_params = dummy_pcm_hw_params,
.hw_free = dummy_pcm_hw_free,
.prepare = dummy_pcm_prepare,
.trigger = dummy_pcm_trigger,
.pointer = dummy_pcm_pointer,
};
static struct snd_pcm_ops dummy_pcm_ops_no_buf = {
.open = dummy_pcm_open,
.close = dummy_pcm_close,
.ioctl = snd_pcm_lib_ioctl,
.hw_params = dummy_pcm_hw_params,
.hw_free = dummy_pcm_hw_free,
.prepare = dummy_pcm_prepare,
.trigger = dummy_pcm_trigger,
.pointer = dummy_pcm_pointer,
.copy = dummy_pcm_copy,
.silence = dummy_pcm_silence,
.page = dummy_pcm_page,
};
static int snd_card_dummy_pcm(struct snd_dummy *dummy, int device,
int substreams)
{
struct snd_pcm *pcm;
struct snd_pcm_ops *ops;
int err;
err = snd_pcm_new(dummy->card, "Dummy PCM", device,
substreams, substreams, &pcm);
if (err < 0)
return err;
dummy->pcm = pcm;
if (fake_buffer)
ops = &dummy_pcm_ops_no_buf;
else
ops = &dummy_pcm_ops;
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, ops);
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, ops);
pcm->private_data = dummy;
pcm->info_flags = 0;
strcpy(pcm->name, "Dummy PCM");
if (!fake_buffer) {
snd_pcm_lib_preallocate_pages_for_all(pcm,
SNDRV_DMA_TYPE_CONTINUOUS,
snd_dma_continuous_data(GFP_KERNEL),
0, 64*1024);
}
return 0;
}
/*
* mixer interface
*/
#define DUMMY_VOLUME(xname, xindex, addr) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
.name = xname, .index = xindex, \
.info = snd_dummy_volume_info, \
.get = snd_dummy_volume_get, .put = snd_dummy_volume_put, \
.private_value = addr, \
.tlv = { .p = db_scale_dummy } }
static int snd_dummy_volume_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 2;
uinfo->value.integer.min = -50;
uinfo->value.integer.max = 100;
return 0;
}
static int snd_dummy_volume_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_dummy *dummy = snd_kcontrol_chip(kcontrol);
int addr = kcontrol->private_value;
spin_lock_irq(&dummy->mixer_lock);
ucontrol->value.integer.value[0] = dummy->mixer_volume[addr][0];
ucontrol->value.integer.value[1] = dummy->mixer_volume[addr][1];
spin_unlock_irq(&dummy->mixer_lock);
return 0;
}
static int snd_dummy_volume_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_dummy *dummy = snd_kcontrol_chip(kcontrol);
int change, addr = kcontrol->private_value;
int left, right;
left = ucontrol->value.integer.value[0];
if (left < -50)
left = -50;
if (left > 100)
left = 100;
right = ucontrol->value.integer.value[1];
if (right < -50)
right = -50;
if (right > 100)
right = 100;
spin_lock_irq(&dummy->mixer_lock);
change = dummy->mixer_volume[addr][0] != left ||
dummy->mixer_volume[addr][1] != right;
dummy->mixer_volume[addr][0] = left;
dummy->mixer_volume[addr][1] = right;
spin_unlock_irq(&dummy->mixer_lock);
return change;
}
static const DECLARE_TLV_DB_SCALE(db_scale_dummy, -4500, 30, 0);
#define DUMMY_CAPSRC(xname, xindex, addr) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
.info = snd_dummy_capsrc_info, \
.get = snd_dummy_capsrc_get, .put = snd_dummy_capsrc_put, \
.private_value = addr }
#define snd_dummy_capsrc_info snd_ctl_boolean_stereo_info
static int snd_dummy_capsrc_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_dummy *dummy = snd_kcontrol_chip(kcontrol);
int addr = kcontrol->private_value;
spin_lock_irq(&dummy->mixer_lock);
ucontrol->value.integer.value[0] = dummy->capture_source[addr][0];
ucontrol->value.integer.value[1] = dummy->capture_source[addr][1];
spin_unlock_irq(&dummy->mixer_lock);
return 0;
}
static int snd_dummy_capsrc_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct snd_dummy *dummy = snd_kcontrol_chip(kcontrol);
int change, addr = kcontrol->private_value;
int left, right;
left = ucontrol->value.integer.value[0] & 1;
right = ucontrol->value.integer.value[1] & 1;
spin_lock_irq(&dummy->mixer_lock);
change = dummy->capture_source[addr][0] != left &&
dummy->capture_source[addr][1] != right;
dummy->capture_source[addr][0] = left;
dummy->capture_source[addr][1] = right;
spin_unlock_irq(&dummy->mixer_lock);
return change;
}
static int snd_dummy_iobox_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *info)
{
const char *const names[] = { "None", "CD Player" };
return snd_ctl_enum_info(info, 1, 2, names);
}
static int snd_dummy_iobox_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *value)
{
struct snd_dummy *dummy = snd_kcontrol_chip(kcontrol);
value->value.enumerated.item[0] = dummy->iobox;
return 0;
}
static int snd_dummy_iobox_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *value)
{
struct snd_dummy *dummy = snd_kcontrol_chip(kcontrol);
int changed;
if (value->value.enumerated.item[0] > 1)
return -EINVAL;
changed = value->value.enumerated.item[0] != dummy->iobox;
if (changed) {
dummy->iobox = value->value.enumerated.item[0];
if (dummy->iobox) {
dummy->cd_volume_ctl->vd[0].access &=
~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
dummy->cd_switch_ctl->vd[0].access &=
~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
} else {
dummy->cd_volume_ctl->vd[0].access |=
SNDRV_CTL_ELEM_ACCESS_INACTIVE;
dummy->cd_switch_ctl->vd[0].access |=
SNDRV_CTL_ELEM_ACCESS_INACTIVE;
}
snd_ctl_notify(dummy->card, SNDRV_CTL_EVENT_MASK_INFO,
&dummy->cd_volume_ctl->id);
snd_ctl_notify(dummy->card, SNDRV_CTL_EVENT_MASK_INFO,
&dummy->cd_switch_ctl->id);
}
return changed;
}
static struct snd_kcontrol_new snd_dummy_controls[] = {
DUMMY_VOLUME("Master Volume", 0, MIXER_ADDR_MASTER),
DUMMY_CAPSRC("Master Capture Switch", 0, MIXER_ADDR_MASTER),
DUMMY_VOLUME("Synth Volume", 0, MIXER_ADDR_SYNTH),
DUMMY_CAPSRC("Synth Capture Switch", 0, MIXER_ADDR_SYNTH),
DUMMY_VOLUME("Line Volume", 0, MIXER_ADDR_LINE),
DUMMY_CAPSRC("Line Capture Switch", 0, MIXER_ADDR_LINE),
DUMMY_VOLUME("Mic Volume", 0, MIXER_ADDR_MIC),
DUMMY_CAPSRC("Mic Capture Switch", 0, MIXER_ADDR_MIC),
DUMMY_VOLUME("CD Volume", 0, MIXER_ADDR_CD),
DUMMY_CAPSRC("CD Capture Switch", 0, MIXER_ADDR_CD),
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "External I/O Box",
.info = snd_dummy_iobox_info,
.get = snd_dummy_iobox_get,
.put = snd_dummy_iobox_put,
},
};
static int snd_card_dummy_new_mixer(struct snd_dummy *dummy)
{
struct snd_card *card = dummy->card;
struct snd_kcontrol *kcontrol;
unsigned int idx;
int err;
spin_lock_init(&dummy->mixer_lock);
strcpy(card->mixername, "Dummy Mixer");
dummy->iobox = 1;
for (idx = 0; idx < ARRAY_SIZE(snd_dummy_controls); idx++) {
kcontrol = snd_ctl_new1(&snd_dummy_controls[idx], dummy);
err = snd_ctl_add(card, kcontrol);
if (err < 0)
return err;
if (!strcmp(kcontrol->id.name, "CD Volume"))
dummy->cd_volume_ctl = kcontrol;
else if (!strcmp(kcontrol->id.name, "CD Capture Switch"))
dummy->cd_switch_ctl = kcontrol;
}
return 0;
}
#if defined(CONFIG_SND_DEBUG) && defined(CONFIG_PROC_FS)
/*
* proc interface
*/
static void print_formats(struct snd_dummy *dummy,
struct snd_info_buffer *buffer)
{
int i;
for (i = 0; i < SNDRV_PCM_FORMAT_LAST; i++) {
if (dummy->pcm_hw.formats & (1ULL << i))
snd_iprintf(buffer, " %s", snd_pcm_format_name(i));
}
}
static void print_rates(struct snd_dummy *dummy,
struct snd_info_buffer *buffer)
{
static int rates[] = {
5512, 8000, 11025, 16000, 22050, 32000, 44100, 48000,
64000, 88200, 96000, 176400, 192000,
};
int i;
if (dummy->pcm_hw.rates & SNDRV_PCM_RATE_CONTINUOUS)
snd_iprintf(buffer, " continuous");
if (dummy->pcm_hw.rates & SNDRV_PCM_RATE_KNOT)
snd_iprintf(buffer, " knot");
for (i = 0; i < ARRAY_SIZE(rates); i++)
if (dummy->pcm_hw.rates & (1 << i))
snd_iprintf(buffer, " %d", rates[i]);
}
#define get_dummy_int_ptr(dummy, ofs) \
(unsigned int *)((char *)&((dummy)->pcm_hw) + (ofs))
#define get_dummy_ll_ptr(dummy, ofs) \
(unsigned long long *)((char *)&((dummy)->pcm_hw) + (ofs))
struct dummy_hw_field {
const char *name;
const char *format;
unsigned int offset;
unsigned int size;
};
#define FIELD_ENTRY(item, fmt) { \
.name = #item, \
.format = fmt, \
.offset = offsetof(struct snd_pcm_hardware, item), \
.size = sizeof(dummy_pcm_hardware.item) }
static struct dummy_hw_field fields[] = {
FIELD_ENTRY(formats, "%#llx"),
FIELD_ENTRY(rates, "%#x"),
FIELD_ENTRY(rate_min, "%d"),
FIELD_ENTRY(rate_max, "%d"),
FIELD_ENTRY(channels_min, "%d"),
FIELD_ENTRY(channels_max, "%d"),
FIELD_ENTRY(buffer_bytes_max, "%ld"),
FIELD_ENTRY(period_bytes_min, "%ld"),
FIELD_ENTRY(period_bytes_max, "%ld"),
FIELD_ENTRY(periods_min, "%d"),
FIELD_ENTRY(periods_max, "%d"),
};
static void dummy_proc_read(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
struct snd_dummy *dummy = entry->private_data;
int i;
for (i = 0; i < ARRAY_SIZE(fields); i++) {
snd_iprintf(buffer, "%s ", fields[i].name);
if (fields[i].size == sizeof(int))
snd_iprintf(buffer, fields[i].format,
*get_dummy_int_ptr(dummy, fields[i].offset));
else
snd_iprintf(buffer, fields[i].format,
*get_dummy_ll_ptr(dummy, fields[i].offset));
if (!strcmp(fields[i].name, "formats"))
print_formats(dummy, buffer);
else if (!strcmp(fields[i].name, "rates"))
print_rates(dummy, buffer);
snd_iprintf(buffer, "\n");
}
}
static void dummy_proc_write(struct snd_info_entry *entry,
struct snd_info_buffer *buffer)
{
struct snd_dummy *dummy = entry->private_data;
char line[64];
while (!snd_info_get_line(buffer, line, sizeof(line))) {
char item[20];
const char *ptr;
unsigned long long val;
int i;
ptr = snd_info_get_str(item, line, sizeof(item));
for (i = 0; i < ARRAY_SIZE(fields); i++) {
if (!strcmp(item, fields[i].name))
break;
}
if (i >= ARRAY_SIZE(fields))
continue;
snd_info_get_str(item, ptr, sizeof(item));
if (strict_strtoull(item, 0, &val))
continue;
if (fields[i].size == sizeof(int))
*get_dummy_int_ptr(dummy, fields[i].offset) = val;
else
*get_dummy_ll_ptr(dummy, fields[i].offset) = val;
}
}
static void dummy_proc_init(struct snd_dummy *chip)
{
struct snd_info_entry *entry;
if (!snd_card_proc_new(chip->card, "dummy_pcm", &entry)) {
snd_info_set_text_ops(entry, chip, dummy_proc_read);
entry->c.text.write = dummy_proc_write;
entry->mode |= S_IWUSR;
entry->private_data = chip;
}
}
#else
#define dummy_proc_init(x)
#endif /* CONFIG_SND_DEBUG && CONFIG_PROC_FS */
static int snd_dummy_probe(struct platform_device *devptr)
{
struct snd_card *card;
struct snd_dummy *dummy;
struct dummy_model *m = NULL, **mdl;
int idx, err;
int dev = devptr->id;
err = snd_card_create(index[dev], id[dev], THIS_MODULE,
sizeof(struct snd_dummy), &card);
if (err < 0)
return err;
dummy = card->private_data;
dummy->card = card;
for (mdl = dummy_models; *mdl && model[dev]; mdl++) {
if (strcmp(model[dev], (*mdl)->name) == 0) {
printk(KERN_INFO
"snd-dummy: Using model '%s' for card %i\n",
(*mdl)->name, card->number);
m = dummy->model = *mdl;
break;
}
}
for (idx = 0; idx < MAX_PCM_DEVICES && idx < pcm_devs[dev]; idx++) {
if (pcm_substreams[dev] < 1)
pcm_substreams[dev] = 1;
if (pcm_substreams[dev] > MAX_PCM_SUBSTREAMS)
pcm_substreams[dev] = MAX_PCM_SUBSTREAMS;
err = snd_card_dummy_pcm(dummy, idx, pcm_substreams[dev]);
if (err < 0)
goto __nodev;
}
dummy->pcm_hw = dummy_pcm_hardware;
if (m) {
if (m->formats)
dummy->pcm_hw.formats = m->formats;
if (m->buffer_bytes_max)
dummy->pcm_hw.buffer_bytes_max = m->buffer_bytes_max;
if (m->period_bytes_min)
dummy->pcm_hw.period_bytes_min = m->period_bytes_min;
if (m->period_bytes_max)
dummy->pcm_hw.period_bytes_max = m->period_bytes_max;
if (m->periods_min)
dummy->pcm_hw.periods_min = m->periods_min;
if (m->periods_max)
dummy->pcm_hw.periods_max = m->periods_max;
if (m->rates)
dummy->pcm_hw.rates = m->rates;
if (m->rate_min)
dummy->pcm_hw.rate_min = m->rate_min;
if (m->rate_max)
dummy->pcm_hw.rate_max = m->rate_max;
if (m->channels_min)
dummy->pcm_hw.channels_min = m->channels_min;
if (m->channels_max)
dummy->pcm_hw.channels_max = m->channels_max;
}
err = snd_card_dummy_new_mixer(dummy);
if (err < 0)
goto __nodev;
strcpy(card->driver, "Dummy");
strcpy(card->shortname, "Dummy");
sprintf(card->longname, "Dummy %i", dev + 1);
dummy_proc_init(dummy);
snd_card_set_dev(card, &devptr->dev);
err = snd_card_register(card);
if (err == 0) {
platform_set_drvdata(devptr, card);
return 0;
}
__nodev:
snd_card_free(card);
return err;
}
static int snd_dummy_remove(struct platform_device *devptr)
{
snd_card_free(platform_get_drvdata(devptr));
platform_set_drvdata(devptr, NULL);
return 0;
}
#ifdef CONFIG_PM_SLEEP
static int snd_dummy_suspend(struct device *pdev)
{
struct snd_card *card = dev_get_drvdata(pdev);
struct snd_dummy *dummy = card->private_data;
snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
snd_pcm_suspend_all(dummy->pcm);
return 0;
}
static int snd_dummy_resume(struct device *pdev)
{
struct snd_card *card = dev_get_drvdata(pdev);
snd_power_change_state(card, SNDRV_CTL_POWER_D0);
return 0;
}
static SIMPLE_DEV_PM_OPS(snd_dummy_pm, snd_dummy_suspend, snd_dummy_resume);
#define SND_DUMMY_PM_OPS &snd_dummy_pm
#else
#define SND_DUMMY_PM_OPS NULL
#endif
#define SND_DUMMY_DRIVER "snd_dummy"
static struct platform_driver snd_dummy_driver = {
.probe = snd_dummy_probe,
.remove = snd_dummy_remove,
.driver = {
.name = SND_DUMMY_DRIVER,
.owner = THIS_MODULE,
.pm = SND_DUMMY_PM_OPS,
},
};
static void snd_dummy_unregister_all(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(devices); ++i)
platform_device_unregister(devices[i]);
platform_driver_unregister(&snd_dummy_driver);
free_fake_buffer();
}
static int __init alsa_card_dummy_init(void)
{
int i, cards, err;
err = platform_driver_register(&snd_dummy_driver);
if (err < 0)
return err;
err = alloc_fake_buffer();
if (err < 0) {
platform_driver_unregister(&snd_dummy_driver);
return err;
}
cards = 0;
for (i = 0; i < SNDRV_CARDS; i++) {
struct platform_device *device;
if (! enable[i])
continue;
device = platform_device_register_simple(SND_DUMMY_DRIVER,
i, NULL, 0);
if (IS_ERR(device))
continue;
if (!platform_get_drvdata(device)) {
platform_device_unregister(device);
continue;
}
devices[i] = device;
cards++;
}
if (!cards) {
#ifdef MODULE
printk(KERN_ERR "Dummy soundcard not found or device busy\n");
#endif
snd_dummy_unregister_all();
return -ENODEV;
}
return 0;
}
static void __exit alsa_card_dummy_exit(void)
{
snd_dummy_unregister_all();
}
module_init(alsa_card_dummy_init)
module_exit(alsa_card_dummy_exit)
| gpl-2.0 |
SanDisk-Open-Source/SSD_Dashboard | uefi/linux-source-3.8.0/drivers/net/wireless/iwlegacy/3945.c | 76646 | /******************************************************************************
*
* Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* Intel Linux Wireless <[email protected]>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
*****************************************************************************/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/pci.h>
#include <linux/dma-mapping.h>
#include <linux/delay.h>
#include <linux/sched.h>
#include <linux/skbuff.h>
#include <linux/netdevice.h>
#include <linux/firmware.h>
#include <linux/etherdevice.h>
#include <asm/unaligned.h>
#include <net/mac80211.h>
#include "common.h"
#include "3945.h"
/* Send led command */
static int
il3945_send_led_cmd(struct il_priv *il, struct il_led_cmd *led_cmd)
{
struct il_host_cmd cmd = {
.id = C_LEDS,
.len = sizeof(struct il_led_cmd),
.data = led_cmd,
.flags = CMD_ASYNC,
.callback = NULL,
};
return il_send_cmd(il, &cmd);
}
#define IL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np) \
[RATE_##r##M_IDX] = { RATE_##r##M_PLCP, \
RATE_##r##M_IEEE, \
RATE_##ip##M_IDX, \
RATE_##in##M_IDX, \
RATE_##rp##M_IDX, \
RATE_##rn##M_IDX, \
RATE_##pp##M_IDX, \
RATE_##np##M_IDX, \
RATE_##r##M_IDX_TBL, \
RATE_##ip##M_IDX_TBL }
/*
* Parameter order:
* rate, prev rate, next rate, prev tgg rate, next tgg rate
*
* If there isn't a valid next or previous rate then INV is used which
* maps to RATE_INVALID
*
*/
const struct il3945_rate_info il3945_rates[RATE_COUNT_3945] = {
IL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2), /* 1mbps */
IL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5), /* 2mbps */
IL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11), /*5.5mbps */
IL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18), /* 11mbps */
IL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11), /* 6mbps */
IL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11), /* 9mbps */
IL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18), /* 12mbps */
IL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24), /* 18mbps */
IL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36), /* 24mbps */
IL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48), /* 36mbps */
IL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54), /* 48mbps */
IL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV), /* 54mbps */
};
static inline u8
il3945_get_prev_ieee_rate(u8 rate_idx)
{
u8 rate = il3945_rates[rate_idx].prev_ieee;
if (rate == RATE_INVALID)
rate = rate_idx;
return rate;
}
/* 1 = enable the il3945_disable_events() function */
#define IL_EVT_DISABLE (0)
#define IL_EVT_DISABLE_SIZE (1532/32)
/**
* il3945_disable_events - Disable selected events in uCode event log
*
* Disable an event by writing "1"s into "disable"
* bitmap in SRAM. Bit position corresponds to Event # (id/type).
* Default values of 0 enable uCode events to be logged.
* Use for only special debugging. This function is just a placeholder as-is,
* you'll need to provide the special bits! ...
* ... and set IL_EVT_DISABLE to 1. */
void
il3945_disable_events(struct il_priv *il)
{
int i;
u32 base; /* SRAM address of event log header */
u32 disable_ptr; /* SRAM address of event-disable bitmap array */
u32 array_size; /* # of u32 entries in array */
static const u32 evt_disable[IL_EVT_DISABLE_SIZE] = {
0x00000000, /* 31 - 0 Event id numbers */
0x00000000, /* 63 - 32 */
0x00000000, /* 95 - 64 */
0x00000000, /* 127 - 96 */
0x00000000, /* 159 - 128 */
0x00000000, /* 191 - 160 */
0x00000000, /* 223 - 192 */
0x00000000, /* 255 - 224 */
0x00000000, /* 287 - 256 */
0x00000000, /* 319 - 288 */
0x00000000, /* 351 - 320 */
0x00000000, /* 383 - 352 */
0x00000000, /* 415 - 384 */
0x00000000, /* 447 - 416 */
0x00000000, /* 479 - 448 */
0x00000000, /* 511 - 480 */
0x00000000, /* 543 - 512 */
0x00000000, /* 575 - 544 */
0x00000000, /* 607 - 576 */
0x00000000, /* 639 - 608 */
0x00000000, /* 671 - 640 */
0x00000000, /* 703 - 672 */
0x00000000, /* 735 - 704 */
0x00000000, /* 767 - 736 */
0x00000000, /* 799 - 768 */
0x00000000, /* 831 - 800 */
0x00000000, /* 863 - 832 */
0x00000000, /* 895 - 864 */
0x00000000, /* 927 - 896 */
0x00000000, /* 959 - 928 */
0x00000000, /* 991 - 960 */
0x00000000, /* 1023 - 992 */
0x00000000, /* 1055 - 1024 */
0x00000000, /* 1087 - 1056 */
0x00000000, /* 1119 - 1088 */
0x00000000, /* 1151 - 1120 */
0x00000000, /* 1183 - 1152 */
0x00000000, /* 1215 - 1184 */
0x00000000, /* 1247 - 1216 */
0x00000000, /* 1279 - 1248 */
0x00000000, /* 1311 - 1280 */
0x00000000, /* 1343 - 1312 */
0x00000000, /* 1375 - 1344 */
0x00000000, /* 1407 - 1376 */
0x00000000, /* 1439 - 1408 */
0x00000000, /* 1471 - 1440 */
0x00000000, /* 1503 - 1472 */
};
base = le32_to_cpu(il->card_alive.log_event_table_ptr);
if (!il3945_hw_valid_rtc_data_addr(base)) {
IL_ERR("Invalid event log pointer 0x%08X\n", base);
return;
}
disable_ptr = il_read_targ_mem(il, base + (4 * sizeof(u32)));
array_size = il_read_targ_mem(il, base + (5 * sizeof(u32)));
if (IL_EVT_DISABLE && array_size == IL_EVT_DISABLE_SIZE) {
D_INFO("Disabling selected uCode log events at 0x%x\n",
disable_ptr);
for (i = 0; i < IL_EVT_DISABLE_SIZE; i++)
il_write_targ_mem(il, disable_ptr + (i * sizeof(u32)),
evt_disable[i]);
} else {
D_INFO("Selected uCode log events may be disabled\n");
D_INFO(" by writing \"1\"s into disable bitmap\n");
D_INFO(" in SRAM at 0x%x, size %d u32s\n", disable_ptr,
array_size);
}
}
static int
il3945_hwrate_to_plcp_idx(u8 plcp)
{
int idx;
for (idx = 0; idx < RATE_COUNT_3945; idx++)
if (il3945_rates[idx].plcp == plcp)
return idx;
return -1;
}
#ifdef CONFIG_IWLEGACY_DEBUG
#define TX_STATUS_ENTRY(x) case TX_3945_STATUS_FAIL_ ## x: return #x
static const char *
il3945_get_tx_fail_reason(u32 status)
{
switch (status & TX_STATUS_MSK) {
case TX_3945_STATUS_SUCCESS:
return "SUCCESS";
TX_STATUS_ENTRY(SHORT_LIMIT);
TX_STATUS_ENTRY(LONG_LIMIT);
TX_STATUS_ENTRY(FIFO_UNDERRUN);
TX_STATUS_ENTRY(MGMNT_ABORT);
TX_STATUS_ENTRY(NEXT_FRAG);
TX_STATUS_ENTRY(LIFE_EXPIRE);
TX_STATUS_ENTRY(DEST_PS);
TX_STATUS_ENTRY(ABORTED);
TX_STATUS_ENTRY(BT_RETRY);
TX_STATUS_ENTRY(STA_INVALID);
TX_STATUS_ENTRY(FRAG_DROPPED);
TX_STATUS_ENTRY(TID_DISABLE);
TX_STATUS_ENTRY(FRAME_FLUSHED);
TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
TX_STATUS_ENTRY(TX_LOCKED);
TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
}
return "UNKNOWN";
}
#else
static inline const char *
il3945_get_tx_fail_reason(u32 status)
{
return "";
}
#endif
/*
* get ieee prev rate from rate scale table.
* for A and B mode we need to overright prev
* value
*/
int
il3945_rs_next_rate(struct il_priv *il, int rate)
{
int next_rate = il3945_get_prev_ieee_rate(rate);
switch (il->band) {
case IEEE80211_BAND_5GHZ:
if (rate == RATE_12M_IDX)
next_rate = RATE_9M_IDX;
else if (rate == RATE_6M_IDX)
next_rate = RATE_6M_IDX;
break;
case IEEE80211_BAND_2GHZ:
if (!(il->_3945.sta_supp_rates & IL_OFDM_RATES_MASK) &&
il_is_associated(il)) {
if (rate == RATE_11M_IDX)
next_rate = RATE_5M_IDX;
}
break;
default:
break;
}
return next_rate;
}
/**
* il3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
*
* When FW advances 'R' idx, all entries between old and new 'R' idx
* need to be reclaimed. As result, some free space forms. If there is
* enough free space (> low mark), wake the stack that feeds us.
*/
static void
il3945_tx_queue_reclaim(struct il_priv *il, int txq_id, int idx)
{
struct il_tx_queue *txq = &il->txq[txq_id];
struct il_queue *q = &txq->q;
struct sk_buff *skb;
BUG_ON(txq_id == IL39_CMD_QUEUE_NUM);
for (idx = il_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) {
skb = txq->skbs[txq->q.read_ptr];
ieee80211_tx_status_irqsafe(il->hw, skb);
txq->skbs[txq->q.read_ptr] = NULL;
il->ops->txq_free_tfd(il, txq);
}
if (il_queue_space(q) > q->low_mark && txq_id >= 0 &&
txq_id != IL39_CMD_QUEUE_NUM && il->mac80211_registered)
il_wake_queue(il, txq);
}
/**
* il3945_hdl_tx - Handle Tx response
*/
static void
il3945_hdl_tx(struct il_priv *il, struct il_rx_buf *rxb)
{
struct il_rx_pkt *pkt = rxb_addr(rxb);
u16 sequence = le16_to_cpu(pkt->hdr.sequence);
int txq_id = SEQ_TO_QUEUE(sequence);
int idx = SEQ_TO_IDX(sequence);
struct il_tx_queue *txq = &il->txq[txq_id];
struct ieee80211_tx_info *info;
struct il3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
u32 status = le32_to_cpu(tx_resp->status);
int rate_idx;
int fail;
if (idx >= txq->q.n_bd || il_queue_used(&txq->q, idx) == 0) {
IL_ERR("Read idx for DMA queue txq_id (%d) idx %d "
"is out of range [0-%d] %d %d\n", txq_id, idx,
txq->q.n_bd, txq->q.write_ptr, txq->q.read_ptr);
return;
}
txq->time_stamp = jiffies;
info = IEEE80211_SKB_CB(txq->skbs[txq->q.read_ptr]);
ieee80211_tx_info_clear_status(info);
/* Fill the MRR chain with some info about on-chip retransmissions */
rate_idx = il3945_hwrate_to_plcp_idx(tx_resp->rate);
if (info->band == IEEE80211_BAND_5GHZ)
rate_idx -= IL_FIRST_OFDM_RATE;
fail = tx_resp->failure_frame;
info->status.rates[0].idx = rate_idx;
info->status.rates[0].count = fail + 1; /* add final attempt */
/* tx_status->rts_retry_count = tx_resp->failure_rts; */
info->flags |=
((status & TX_STATUS_MSK) ==
TX_STATUS_SUCCESS) ? IEEE80211_TX_STAT_ACK : 0;
D_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n", txq_id,
il3945_get_tx_fail_reason(status), status, tx_resp->rate,
tx_resp->failure_frame);
D_TX_REPLY("Tx queue reclaim %d\n", idx);
il3945_tx_queue_reclaim(il, txq_id, idx);
if (status & TX_ABORT_REQUIRED_MSK)
IL_ERR("TODO: Implement Tx ABORT REQUIRED!!!\n");
}
/*****************************************************************************
*
* Intel PRO/Wireless 3945ABG/BG Network Connection
*
* RX handler implementations
*
*****************************************************************************/
#ifdef CONFIG_IWLEGACY_DEBUGFS
static void
il3945_accumulative_stats(struct il_priv *il, __le32 * stats)
{
int i;
__le32 *prev_stats;
u32 *accum_stats;
u32 *delta, *max_delta;
prev_stats = (__le32 *) &il->_3945.stats;
accum_stats = (u32 *) &il->_3945.accum_stats;
delta = (u32 *) &il->_3945.delta_stats;
max_delta = (u32 *) &il->_3945.max_delta;
for (i = sizeof(__le32); i < sizeof(struct il3945_notif_stats);
i +=
sizeof(__le32), stats++, prev_stats++, delta++, max_delta++,
accum_stats++) {
if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats)) {
*delta =
(le32_to_cpu(*stats) - le32_to_cpu(*prev_stats));
*accum_stats += *delta;
if (*delta > *max_delta)
*max_delta = *delta;
}
}
/* reset accumulative stats for "no-counter" type stats */
il->_3945.accum_stats.general.temperature =
il->_3945.stats.general.temperature;
il->_3945.accum_stats.general.ttl_timestamp =
il->_3945.stats.general.ttl_timestamp;
}
#endif
void
il3945_hdl_stats(struct il_priv *il, struct il_rx_buf *rxb)
{
struct il_rx_pkt *pkt = rxb_addr(rxb);
D_RX("Statistics notification received (%d vs %d).\n",
(int)sizeof(struct il3945_notif_stats),
le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK);
#ifdef CONFIG_IWLEGACY_DEBUGFS
il3945_accumulative_stats(il, (__le32 *) &pkt->u.raw);
#endif
memcpy(&il->_3945.stats, pkt->u.raw, sizeof(il->_3945.stats));
}
void
il3945_hdl_c_stats(struct il_priv *il, struct il_rx_buf *rxb)
{
struct il_rx_pkt *pkt = rxb_addr(rxb);
__le32 *flag = (__le32 *) &pkt->u.raw;
if (le32_to_cpu(*flag) & UCODE_STATS_CLEAR_MSK) {
#ifdef CONFIG_IWLEGACY_DEBUGFS
memset(&il->_3945.accum_stats, 0,
sizeof(struct il3945_notif_stats));
memset(&il->_3945.delta_stats, 0,
sizeof(struct il3945_notif_stats));
memset(&il->_3945.max_delta, 0,
sizeof(struct il3945_notif_stats));
#endif
D_RX("Statistics have been cleared\n");
}
il3945_hdl_stats(il, rxb);
}
/******************************************************************************
*
* Misc. internal state and helper functions
*
******************************************************************************/
/* This is necessary only for a number of stats, see the caller. */
static int
il3945_is_network_packet(struct il_priv *il, struct ieee80211_hdr *header)
{
/* Filter incoming packets to determine if they are targeted toward
* this network, discarding packets coming from ourselves */
switch (il->iw_mode) {
case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source | BSSID */
/* packets to our IBSS update information */
return ether_addr_equal(header->addr3, il->bssid);
case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
/* packets to our IBSS update information */
return ether_addr_equal(header->addr2, il->bssid);
default:
return 1;
}
}
static void
il3945_pass_packet_to_mac80211(struct il_priv *il, struct il_rx_buf *rxb,
struct ieee80211_rx_status *stats)
{
struct il_rx_pkt *pkt = rxb_addr(rxb);
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)IL_RX_DATA(pkt);
struct il3945_rx_frame_hdr *rx_hdr = IL_RX_HDR(pkt);
struct il3945_rx_frame_end *rx_end = IL_RX_END(pkt);
u16 len = le16_to_cpu(rx_hdr->len);
struct sk_buff *skb;
__le16 fc = hdr->frame_control;
/* We received data from the HW, so stop the watchdog */
if (unlikely
(len + IL39_RX_FRAME_SIZE >
PAGE_SIZE << il->hw_params.rx_page_order)) {
D_DROP("Corruption detected!\n");
return;
}
/* We only process data packets if the interface is open */
if (unlikely(!il->is_open)) {
D_DROP("Dropping packet while interface is not open.\n");
return;
}
skb = dev_alloc_skb(128);
if (!skb) {
IL_ERR("dev_alloc_skb failed\n");
return;
}
if (!il3945_mod_params.sw_crypto)
il_set_decrypted_flag(il, (struct ieee80211_hdr *)rxb_addr(rxb),
le32_to_cpu(rx_end->status), stats);
skb_add_rx_frag(skb, 0, rxb->page,
(void *)rx_hdr->payload - (void *)pkt, len,
len);
il_update_stats(il, false, fc, len);
memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
ieee80211_rx(il->hw, skb);
il->alloc_rxb_page--;
rxb->page = NULL;
}
#define IL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
static void
il3945_hdl_rx(struct il_priv *il, struct il_rx_buf *rxb)
{
struct ieee80211_hdr *header;
struct ieee80211_rx_status rx_status = {};
struct il_rx_pkt *pkt = rxb_addr(rxb);
struct il3945_rx_frame_stats *rx_stats = IL_RX_STATS(pkt);
struct il3945_rx_frame_hdr *rx_hdr = IL_RX_HDR(pkt);
struct il3945_rx_frame_end *rx_end = IL_RX_END(pkt);
u16 rx_stats_sig_avg __maybe_unused = le16_to_cpu(rx_stats->sig_avg);
u16 rx_stats_noise_diff __maybe_unused =
le16_to_cpu(rx_stats->noise_diff);
u8 network_packet;
rx_status.flag = 0;
rx_status.mactime = le64_to_cpu(rx_end->timestamp);
rx_status.band =
(rx_hdr->
phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ? IEEE80211_BAND_2GHZ :
IEEE80211_BAND_5GHZ;
rx_status.freq =
ieee80211_channel_to_frequency(le16_to_cpu(rx_hdr->channel),
rx_status.band);
rx_status.rate_idx = il3945_hwrate_to_plcp_idx(rx_hdr->rate);
if (rx_status.band == IEEE80211_BAND_5GHZ)
rx_status.rate_idx -= IL_FIRST_OFDM_RATE;
rx_status.antenna =
(le16_to_cpu(rx_hdr->phy_flags) & RX_RES_PHY_FLAGS_ANTENNA_MSK) >>
4;
/* set the preamble flag if appropriate */
if (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
rx_status.flag |= RX_FLAG_SHORTPRE;
if ((unlikely(rx_stats->phy_count > 20))) {
D_DROP("dsp size out of range [0,20]: %d/n",
rx_stats->phy_count);
return;
}
if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR) ||
!(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
D_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
return;
}
/* Convert 3945's rssi indicator to dBm */
rx_status.signal = rx_stats->rssi - IL39_RSSI_OFFSET;
D_STATS("Rssi %d sig_avg %d noise_diff %d\n", rx_status.signal,
rx_stats_sig_avg, rx_stats_noise_diff);
header = (struct ieee80211_hdr *)IL_RX_DATA(pkt);
network_packet = il3945_is_network_packet(il, header);
D_STATS("[%c] %d RSSI:%d Signal:%u, Rate:%u\n",
network_packet ? '*' : ' ', le16_to_cpu(rx_hdr->channel),
rx_status.signal, rx_status.signal, rx_status.rate_idx);
if (network_packet) {
il->_3945.last_beacon_time =
le32_to_cpu(rx_end->beacon_timestamp);
il->_3945.last_tsf = le64_to_cpu(rx_end->timestamp);
il->_3945.last_rx_rssi = rx_status.signal;
}
il3945_pass_packet_to_mac80211(il, rxb, &rx_status);
}
int
il3945_hw_txq_attach_buf_to_tfd(struct il_priv *il, struct il_tx_queue *txq,
dma_addr_t addr, u16 len, u8 reset, u8 pad)
{
int count;
struct il_queue *q;
struct il3945_tfd *tfd, *tfd_tmp;
q = &txq->q;
tfd_tmp = (struct il3945_tfd *)txq->tfds;
tfd = &tfd_tmp[q->write_ptr];
if (reset)
memset(tfd, 0, sizeof(*tfd));
count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
if (count >= NUM_TFD_CHUNKS || count < 0) {
IL_ERR("Error can not send more than %d chunks\n",
NUM_TFD_CHUNKS);
return -EINVAL;
}
tfd->tbs[count].addr = cpu_to_le32(addr);
tfd->tbs[count].len = cpu_to_le32(len);
count++;
tfd->control_flags =
cpu_to_le32(TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad));
return 0;
}
/**
* il3945_hw_txq_free_tfd - Free one TFD, those at idx [txq->q.read_ptr]
*
* Does NOT advance any idxes
*/
void
il3945_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq)
{
struct il3945_tfd *tfd_tmp = (struct il3945_tfd *)txq->tfds;
int idx = txq->q.read_ptr;
struct il3945_tfd *tfd = &tfd_tmp[idx];
struct pci_dev *dev = il->pci_dev;
int i;
int counter;
/* sanity check */
counter = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
if (counter > NUM_TFD_CHUNKS) {
IL_ERR("Too many chunks: %i\n", counter);
/* @todo issue fatal error, it is quite serious situation */
return;
}
/* Unmap tx_cmd */
if (counter)
pci_unmap_single(dev, dma_unmap_addr(&txq->meta[idx], mapping),
dma_unmap_len(&txq->meta[idx], len),
PCI_DMA_TODEVICE);
/* unmap chunks if any */
for (i = 1; i < counter; i++)
pci_unmap_single(dev, le32_to_cpu(tfd->tbs[i].addr),
le32_to_cpu(tfd->tbs[i].len),
PCI_DMA_TODEVICE);
/* free SKB */
if (txq->skbs) {
struct sk_buff *skb = txq->skbs[txq->q.read_ptr];
/* can be called from irqs-disabled context */
if (skb) {
dev_kfree_skb_any(skb);
txq->skbs[txq->q.read_ptr] = NULL;
}
}
}
/**
* il3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
*
*/
void
il3945_hw_build_tx_cmd_rate(struct il_priv *il, struct il_device_cmd *cmd,
struct ieee80211_tx_info *info,
struct ieee80211_hdr *hdr, int sta_id)
{
u16 hw_value = ieee80211_get_tx_rate(il->hw, info)->hw_value;
u16 rate_idx = min(hw_value & 0xffff, RATE_COUNT_3945 - 1);
u16 rate_mask;
int rate;
const u8 rts_retry_limit = 7;
u8 data_retry_limit;
__le32 tx_flags;
__le16 fc = hdr->frame_control;
struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
rate = il3945_rates[rate_idx].plcp;
tx_flags = tx_cmd->tx_flags;
/* We need to figure out how to get the sta->supp_rates while
* in this running context */
rate_mask = RATES_MASK_3945;
/* Set retry limit on DATA packets and Probe Responses */
if (ieee80211_is_probe_resp(fc))
data_retry_limit = 3;
else
data_retry_limit = IL_DEFAULT_TX_RETRY;
tx_cmd->data_retry_limit = data_retry_limit;
/* Set retry limit on RTS packets */
tx_cmd->rts_retry_limit = min(data_retry_limit, rts_retry_limit);
tx_cmd->rate = rate;
tx_cmd->tx_flags = tx_flags;
/* OFDM */
tx_cmd->supp_rates[0] =
((rate_mask & IL_OFDM_RATES_MASK) >> IL_FIRST_OFDM_RATE) & 0xFF;
/* CCK */
tx_cmd->supp_rates[1] = (rate_mask & 0xF);
D_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
"cck/ofdm mask: 0x%x/0x%x\n", sta_id, tx_cmd->rate,
le32_to_cpu(tx_cmd->tx_flags), tx_cmd->supp_rates[1],
tx_cmd->supp_rates[0]);
}
static u8
il3945_sync_sta(struct il_priv *il, int sta_id, u16 tx_rate)
{
unsigned long flags_spin;
struct il_station_entry *station;
if (sta_id == IL_INVALID_STATION)
return IL_INVALID_STATION;
spin_lock_irqsave(&il->sta_lock, flags_spin);
station = &il->stations[sta_id];
station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
station->sta.rate_n_flags = cpu_to_le16(tx_rate);
station->sta.mode = STA_CONTROL_MODIFY_MSK;
il_send_add_sta(il, &station->sta, CMD_ASYNC);
spin_unlock_irqrestore(&il->sta_lock, flags_spin);
D_RATE("SCALE sync station %d to rate %d\n", sta_id, tx_rate);
return sta_id;
}
static void
il3945_set_pwr_vmain(struct il_priv *il)
{
/*
* (for documentation purposes)
* to set power to V_AUX, do
if (pci_pme_capable(il->pci_dev, PCI_D3cold)) {
il_set_bits_mask_prph(il, APMG_PS_CTRL_REG,
APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
~APMG_PS_CTRL_MSK_PWR_SRC);
_il_poll_bit(il, CSR_GPIO_IN,
CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
CSR_GPIO_IN_BIT_AUX_POWER, 5000);
}
*/
il_set_bits_mask_prph(il, APMG_PS_CTRL_REG,
APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
~APMG_PS_CTRL_MSK_PWR_SRC);
_il_poll_bit(il, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
CSR_GPIO_IN_BIT_AUX_POWER, 5000);
}
static int
il3945_rx_init(struct il_priv *il, struct il_rx_queue *rxq)
{
il_wr(il, FH39_RCSR_RBD_BASE(0), rxq->bd_dma);
il_wr(il, FH39_RCSR_RPTR_ADDR(0), rxq->rb_stts_dma);
il_wr(il, FH39_RCSR_WPTR(0), 0);
il_wr(il, FH39_RCSR_CONFIG(0),
FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 | (RX_QUEUE_SIZE_LOG
<<
FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE)
| FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST | (1 <<
FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH)
| FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
/* fake read to flush all prev I/O */
il_rd(il, FH39_RSSR_CTRL);
return 0;
}
static int
il3945_tx_reset(struct il_priv *il)
{
/* bypass mode */
il_wr_prph(il, ALM_SCD_MODE_REG, 0x2);
/* RA 0 is active */
il_wr_prph(il, ALM_SCD_ARASTAT_REG, 0x01);
/* all 6 fifo are active */
il_wr_prph(il, ALM_SCD_TXFACT_REG, 0x3f);
il_wr_prph(il, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
il_wr_prph(il, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
il_wr_prph(il, ALM_SCD_TXF4MF_REG, 0x000004);
il_wr_prph(il, ALM_SCD_TXF5MF_REG, 0x000005);
il_wr(il, FH39_TSSR_CBB_BASE, il->_3945.shared_phys);
il_wr(il, FH39_TSSR_MSG_CONFIG,
FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
return 0;
}
/**
* il3945_txq_ctx_reset - Reset TX queue context
*
* Destroys all DMA structures and initialize them again
*/
static int
il3945_txq_ctx_reset(struct il_priv *il)
{
int rc, txq_id;
il3945_hw_txq_ctx_free(il);
/* allocate tx queue structure */
rc = il_alloc_txq_mem(il);
if (rc)
return rc;
/* Tx CMD queue */
rc = il3945_tx_reset(il);
if (rc)
goto error;
/* Tx queue(s) */
for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) {
rc = il_tx_queue_init(il, txq_id);
if (rc) {
IL_ERR("Tx %d queue init failed\n", txq_id);
goto error;
}
}
return rc;
error:
il3945_hw_txq_ctx_free(il);
return rc;
}
/*
* Start up 3945's basic functionality after it has been reset
* (e.g. after platform boot, or shutdown via il_apm_stop())
* NOTE: This does not load uCode nor start the embedded processor
*/
static int
il3945_apm_init(struct il_priv *il)
{
int ret = il_apm_init(il);
/* Clear APMG (NIC's internal power management) interrupts */
il_wr_prph(il, APMG_RTC_INT_MSK_REG, 0x0);
il_wr_prph(il, APMG_RTC_INT_STT_REG, 0xFFFFFFFF);
/* Reset radio chip */
il_set_bits_prph(il, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ);
udelay(5);
il_clear_bits_prph(il, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ);
return ret;
}
static void
il3945_nic_config(struct il_priv *il)
{
struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
unsigned long flags;
u8 rev_id = il->pci_dev->revision;
spin_lock_irqsave(&il->lock, flags);
/* Determine HW type */
D_INFO("HW Revision ID = 0x%X\n", rev_id);
if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
D_INFO("RTP type\n");
else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
D_INFO("3945 RADIO-MB type\n");
il_set_bit(il, CSR_HW_IF_CONFIG_REG,
CSR39_HW_IF_CONFIG_REG_BIT_3945_MB);
} else {
D_INFO("3945 RADIO-MM type\n");
il_set_bit(il, CSR_HW_IF_CONFIG_REG,
CSR39_HW_IF_CONFIG_REG_BIT_3945_MM);
}
if (EEPROM_SKU_CAP_OP_MODE_MRC == eeprom->sku_cap) {
D_INFO("SKU OP mode is mrc\n");
il_set_bit(il, CSR_HW_IF_CONFIG_REG,
CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC);
} else
D_INFO("SKU OP mode is basic\n");
if ((eeprom->board_revision & 0xF0) == 0xD0) {
D_INFO("3945ABG revision is 0x%X\n", eeprom->board_revision);
il_set_bit(il, CSR_HW_IF_CONFIG_REG,
CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
} else {
D_INFO("3945ABG revision is 0x%X\n", eeprom->board_revision);
il_clear_bit(il, CSR_HW_IF_CONFIG_REG,
CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
}
if (eeprom->almgor_m_version <= 1) {
il_set_bit(il, CSR_HW_IF_CONFIG_REG,
CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
D_INFO("Card M type A version is 0x%X\n",
eeprom->almgor_m_version);
} else {
D_INFO("Card M type B version is 0x%X\n",
eeprom->almgor_m_version);
il_set_bit(il, CSR_HW_IF_CONFIG_REG,
CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
}
spin_unlock_irqrestore(&il->lock, flags);
if (eeprom->sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
D_RF_KILL("SW RF KILL supported in EEPROM.\n");
if (eeprom->sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
D_RF_KILL("HW RF KILL supported in EEPROM.\n");
}
int
il3945_hw_nic_init(struct il_priv *il)
{
int rc;
unsigned long flags;
struct il_rx_queue *rxq = &il->rxq;
spin_lock_irqsave(&il->lock, flags);
il3945_apm_init(il);
spin_unlock_irqrestore(&il->lock, flags);
il3945_set_pwr_vmain(il);
il3945_nic_config(il);
/* Allocate the RX queue, or reset if it is already allocated */
if (!rxq->bd) {
rc = il_rx_queue_alloc(il);
if (rc) {
IL_ERR("Unable to initialize Rx queue\n");
return -ENOMEM;
}
} else
il3945_rx_queue_reset(il, rxq);
il3945_rx_replenish(il);
il3945_rx_init(il, rxq);
/* Look at using this instead:
rxq->need_update = 1;
il_rx_queue_update_write_ptr(il, rxq);
*/
il_wr(il, FH39_RCSR_WPTR(0), rxq->write & ~7);
rc = il3945_txq_ctx_reset(il);
if (rc)
return rc;
set_bit(S_INIT, &il->status);
return 0;
}
/**
* il3945_hw_txq_ctx_free - Free TXQ Context
*
* Destroy all TX DMA queues and structures
*/
void
il3945_hw_txq_ctx_free(struct il_priv *il)
{
int txq_id;
/* Tx queues */
if (il->txq)
for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++)
if (txq_id == IL39_CMD_QUEUE_NUM)
il_cmd_queue_free(il);
else
il_tx_queue_free(il, txq_id);
/* free tx queue structure */
il_free_txq_mem(il);
}
void
il3945_hw_txq_ctx_stop(struct il_priv *il)
{
int txq_id;
/* stop SCD */
_il_wr_prph(il, ALM_SCD_MODE_REG, 0);
_il_wr_prph(il, ALM_SCD_TXFACT_REG, 0);
/* reset TFD queues */
for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) {
_il_wr(il, FH39_TCSR_CONFIG(txq_id), 0x0);
_il_poll_bit(il, FH39_TSSR_TX_STATUS,
FH39_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(txq_id),
FH39_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(txq_id),
1000);
}
}
/**
* il3945_hw_reg_adjust_power_by_temp
* return idx delta into power gain settings table
*/
static int
il3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
{
return (new_reading - old_reading) * (-11) / 100;
}
/**
* il3945_hw_reg_temp_out_of_range - Keep temperature in sane range
*/
static inline int
il3945_hw_reg_temp_out_of_range(int temperature)
{
return (temperature < -260 || temperature > 25) ? 1 : 0;
}
int
il3945_hw_get_temperature(struct il_priv *il)
{
return _il_rd(il, CSR_UCODE_DRV_GP2);
}
/**
* il3945_hw_reg_txpower_get_temperature
* get the current temperature by reading from NIC
*/
static int
il3945_hw_reg_txpower_get_temperature(struct il_priv *il)
{
struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
int temperature;
temperature = il3945_hw_get_temperature(il);
/* driver's okay range is -260 to +25.
* human readable okay range is 0 to +285 */
D_INFO("Temperature: %d\n", temperature + IL_TEMP_CONVERT);
/* handle insane temp reading */
if (il3945_hw_reg_temp_out_of_range(temperature)) {
IL_ERR("Error bad temperature value %d\n", temperature);
/* if really really hot(?),
* substitute the 3rd band/group's temp measured at factory */
if (il->last_temperature > 100)
temperature = eeprom->groups[2].temperature;
else /* else use most recent "sane" value from driver */
temperature = il->last_temperature;
}
return temperature; /* raw, not "human readable" */
}
/* Adjust Txpower only if temperature variance is greater than threshold.
*
* Both are lower than older versions' 9 degrees */
#define IL_TEMPERATURE_LIMIT_TIMER 6
/**
* il3945_is_temp_calib_needed - determines if new calibration is needed
*
* records new temperature in tx_mgr->temperature.
* replaces tx_mgr->last_temperature *only* if calib needed
* (assumes caller will actually do the calibration!). */
static int
il3945_is_temp_calib_needed(struct il_priv *il)
{
int temp_diff;
il->temperature = il3945_hw_reg_txpower_get_temperature(il);
temp_diff = il->temperature - il->last_temperature;
/* get absolute value */
if (temp_diff < 0) {
D_POWER("Getting cooler, delta %d,\n", temp_diff);
temp_diff = -temp_diff;
} else if (temp_diff == 0)
D_POWER("Same temp,\n");
else
D_POWER("Getting warmer, delta %d,\n", temp_diff);
/* if we don't need calibration, *don't* update last_temperature */
if (temp_diff < IL_TEMPERATURE_LIMIT_TIMER) {
D_POWER("Timed thermal calib not needed\n");
return 0;
}
D_POWER("Timed thermal calib needed\n");
/* assume that caller will actually do calib ...
* update the "last temperature" value */
il->last_temperature = il->temperature;
return 1;
}
#define IL_MAX_GAIN_ENTRIES 78
#define IL_CCK_FROM_OFDM_POWER_DIFF -5
#define IL_CCK_FROM_OFDM_IDX_DIFF (10)
/* radio and DSP power table, each step is 1/2 dB.
* 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
static struct il3945_tx_power power_gain_table[2][IL_MAX_GAIN_ENTRIES] = {
{
{251, 127}, /* 2.4 GHz, highest power */
{251, 127},
{251, 127},
{251, 127},
{251, 125},
{251, 110},
{251, 105},
{251, 98},
{187, 125},
{187, 115},
{187, 108},
{187, 99},
{243, 119},
{243, 111},
{243, 105},
{243, 97},
{243, 92},
{211, 106},
{211, 100},
{179, 120},
{179, 113},
{179, 107},
{147, 125},
{147, 119},
{147, 112},
{147, 106},
{147, 101},
{147, 97},
{147, 91},
{115, 107},
{235, 121},
{235, 115},
{235, 109},
{203, 127},
{203, 121},
{203, 115},
{203, 108},
{203, 102},
{203, 96},
{203, 92},
{171, 110},
{171, 104},
{171, 98},
{139, 116},
{227, 125},
{227, 119},
{227, 113},
{227, 107},
{227, 101},
{227, 96},
{195, 113},
{195, 106},
{195, 102},
{195, 95},
{163, 113},
{163, 106},
{163, 102},
{163, 95},
{131, 113},
{131, 106},
{131, 102},
{131, 95},
{99, 113},
{99, 106},
{99, 102},
{99, 95},
{67, 113},
{67, 106},
{67, 102},
{67, 95},
{35, 113},
{35, 106},
{35, 102},
{35, 95},
{3, 113},
{3, 106},
{3, 102},
{3, 95} /* 2.4 GHz, lowest power */
},
{
{251, 127}, /* 5.x GHz, highest power */
{251, 120},
{251, 114},
{219, 119},
{219, 101},
{187, 113},
{187, 102},
{155, 114},
{155, 103},
{123, 117},
{123, 107},
{123, 99},
{123, 92},
{91, 108},
{59, 125},
{59, 118},
{59, 109},
{59, 102},
{59, 96},
{59, 90},
{27, 104},
{27, 98},
{27, 92},
{115, 118},
{115, 111},
{115, 104},
{83, 126},
{83, 121},
{83, 113},
{83, 105},
{83, 99},
{51, 118},
{51, 111},
{51, 104},
{51, 98},
{19, 116},
{19, 109},
{19, 102},
{19, 98},
{19, 93},
{171, 113},
{171, 107},
{171, 99},
{139, 120},
{139, 113},
{139, 107},
{139, 99},
{107, 120},
{107, 113},
{107, 107},
{107, 99},
{75, 120},
{75, 113},
{75, 107},
{75, 99},
{43, 120},
{43, 113},
{43, 107},
{43, 99},
{11, 120},
{11, 113},
{11, 107},
{11, 99},
{131, 107},
{131, 99},
{99, 120},
{99, 113},
{99, 107},
{99, 99},
{67, 120},
{67, 113},
{67, 107},
{67, 99},
{35, 120},
{35, 113},
{35, 107},
{35, 99},
{3, 120} /* 5.x GHz, lowest power */
}
};
static inline u8
il3945_hw_reg_fix_power_idx(int idx)
{
if (idx < 0)
return 0;
if (idx >= IL_MAX_GAIN_ENTRIES)
return IL_MAX_GAIN_ENTRIES - 1;
return (u8) idx;
}
/* Kick off thermal recalibration check every 60 seconds */
#define REG_RECALIB_PERIOD (60)
/**
* il3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
*
* Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
* or 6 Mbit (OFDM) rates.
*/
static void
il3945_hw_reg_set_scan_power(struct il_priv *il, u32 scan_tbl_idx, s32 rate_idx,
const s8 *clip_pwrs,
struct il_channel_info *ch_info, int band_idx)
{
struct il3945_scan_power_info *scan_power_info;
s8 power;
u8 power_idx;
scan_power_info = &ch_info->scan_pwr_info[scan_tbl_idx];
/* use this channel group's 6Mbit clipping/saturation pwr,
* but cap at regulatory scan power restriction (set during init
* based on eeprom channel data) for this channel. */
power = min(ch_info->scan_power, clip_pwrs[RATE_6M_IDX_TBL]);
power = min(power, il->tx_power_user_lmt);
scan_power_info->requested_power = power;
/* find difference between new scan *power* and current "normal"
* Tx *power* for 6Mb. Use this difference (x2) to adjust the
* current "normal" temperature-compensated Tx power *idx* for
* this rate (1Mb or 6Mb) to yield new temp-compensated scan power
* *idx*. */
power_idx =
ch_info->power_info[rate_idx].power_table_idx - (power -
ch_info->
power_info
[RATE_6M_IDX_TBL].
requested_power) *
2;
/* store reference idx that we use when adjusting *all* scan
* powers. So we can accommodate user (all channel) or spectrum
* management (single channel) power changes "between" temperature
* feedback compensation procedures.
* don't force fit this reference idx into gain table; it may be a
* negative number. This will help avoid errors when we're at
* the lower bounds (highest gains, for warmest temperatures)
* of the table. */
/* don't exceed table bounds for "real" setting */
power_idx = il3945_hw_reg_fix_power_idx(power_idx);
scan_power_info->power_table_idx = power_idx;
scan_power_info->tpc.tx_gain =
power_gain_table[band_idx][power_idx].tx_gain;
scan_power_info->tpc.dsp_atten =
power_gain_table[band_idx][power_idx].dsp_atten;
}
/**
* il3945_send_tx_power - fill in Tx Power command with gain settings
*
* Configures power settings for all rates for the current channel,
* using values from channel info struct, and send to NIC
*/
static int
il3945_send_tx_power(struct il_priv *il)
{
int rate_idx, i;
const struct il_channel_info *ch_info = NULL;
struct il3945_txpowertable_cmd txpower = {
.channel = il->active.channel,
};
u16 chan;
if (WARN_ONCE
(test_bit(S_SCAN_HW, &il->status),
"TX Power requested while scanning!\n"))
return -EAGAIN;
chan = le16_to_cpu(il->active.channel);
txpower.band = (il->band == IEEE80211_BAND_5GHZ) ? 0 : 1;
ch_info = il_get_channel_info(il, il->band, chan);
if (!ch_info) {
IL_ERR("Failed to get channel info for channel %d [%d]\n", chan,
il->band);
return -EINVAL;
}
if (!il_is_channel_valid(ch_info)) {
D_POWER("Not calling TX_PWR_TBL_CMD on " "non-Tx channel.\n");
return 0;
}
/* fill cmd with power settings for all rates for current channel */
/* Fill OFDM rate */
for (rate_idx = IL_FIRST_OFDM_RATE, i = 0;
rate_idx <= IL39_LAST_OFDM_RATE; rate_idx++, i++) {
txpower.power[i].tpc = ch_info->power_info[i].tpc;
txpower.power[i].rate = il3945_rates[rate_idx].plcp;
D_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
le16_to_cpu(txpower.channel), txpower.band,
txpower.power[i].tpc.tx_gain,
txpower.power[i].tpc.dsp_atten, txpower.power[i].rate);
}
/* Fill CCK rates */
for (rate_idx = IL_FIRST_CCK_RATE; rate_idx <= IL_LAST_CCK_RATE;
rate_idx++, i++) {
txpower.power[i].tpc = ch_info->power_info[i].tpc;
txpower.power[i].rate = il3945_rates[rate_idx].plcp;
D_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
le16_to_cpu(txpower.channel), txpower.band,
txpower.power[i].tpc.tx_gain,
txpower.power[i].tpc.dsp_atten, txpower.power[i].rate);
}
return il_send_cmd_pdu(il, C_TX_PWR_TBL,
sizeof(struct il3945_txpowertable_cmd),
&txpower);
}
/**
* il3945_hw_reg_set_new_power - Configures power tables at new levels
* @ch_info: Channel to update. Uses power_info.requested_power.
*
* Replace requested_power and base_power_idx ch_info fields for
* one channel.
*
* Called if user or spectrum management changes power preferences.
* Takes into account h/w and modulation limitations (clip power).
*
* This does *not* send anything to NIC, just sets up ch_info for one channel.
*
* NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
* properly fill out the scan powers, and actual h/w gain settings,
* and send changes to NIC
*/
static int
il3945_hw_reg_set_new_power(struct il_priv *il, struct il_channel_info *ch_info)
{
struct il3945_channel_power_info *power_info;
int power_changed = 0;
int i;
const s8 *clip_pwrs;
int power;
/* Get this chnlgrp's rate-to-max/clip-powers table */
clip_pwrs = il->_3945.clip_groups[ch_info->group_idx].clip_powers;
/* Get this channel's rate-to-current-power settings table */
power_info = ch_info->power_info;
/* update OFDM Txpower settings */
for (i = RATE_6M_IDX_TBL; i <= RATE_54M_IDX_TBL; i++, ++power_info) {
int delta_idx;
/* limit new power to be no more than h/w capability */
power = min(ch_info->curr_txpow, clip_pwrs[i]);
if (power == power_info->requested_power)
continue;
/* find difference between old and new requested powers,
* update base (non-temp-compensated) power idx */
delta_idx = (power - power_info->requested_power) * 2;
power_info->base_power_idx -= delta_idx;
/* save new requested power value */
power_info->requested_power = power;
power_changed = 1;
}
/* update CCK Txpower settings, based on OFDM 12M setting ...
* ... all CCK power settings for a given channel are the *same*. */
if (power_changed) {
power =
ch_info->power_info[RATE_12M_IDX_TBL].requested_power +
IL_CCK_FROM_OFDM_POWER_DIFF;
/* do all CCK rates' il3945_channel_power_info structures */
for (i = RATE_1M_IDX_TBL; i <= RATE_11M_IDX_TBL; i++) {
power_info->requested_power = power;
power_info->base_power_idx =
ch_info->power_info[RATE_12M_IDX_TBL].
base_power_idx + IL_CCK_FROM_OFDM_IDX_DIFF;
++power_info;
}
}
return 0;
}
/**
* il3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
*
* NOTE: Returned power limit may be less (but not more) than requested,
* based strictly on regulatory (eeprom and spectrum mgt) limitations
* (no consideration for h/w clipping limitations).
*/
static int
il3945_hw_reg_get_ch_txpower_limit(struct il_channel_info *ch_info)
{
s8 max_power;
#if 0
/* if we're using TGd limits, use lower of TGd or EEPROM */
if (ch_info->tgd_data.max_power != 0)
max_power =
min(ch_info->tgd_data.max_power,
ch_info->eeprom.max_power_avg);
/* else just use EEPROM limits */
else
#endif
max_power = ch_info->eeprom.max_power_avg;
return min(max_power, ch_info->max_power_avg);
}
/**
* il3945_hw_reg_comp_txpower_temp - Compensate for temperature
*
* Compensate txpower settings of *all* channels for temperature.
* This only accounts for the difference between current temperature
* and the factory calibration temperatures, and bases the new settings
* on the channel's base_power_idx.
*
* If RxOn is "associated", this sends the new Txpower to NIC!
*/
static int
il3945_hw_reg_comp_txpower_temp(struct il_priv *il)
{
struct il_channel_info *ch_info = NULL;
struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
int delta_idx;
const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
u8 a_band;
u8 rate_idx;
u8 scan_tbl_idx;
u8 i;
int ref_temp;
int temperature = il->temperature;
if (il->disable_tx_power_cal || test_bit(S_SCANNING, &il->status)) {
/* do not perform tx power calibration */
return 0;
}
/* set up new Tx power info for each and every channel, 2.4 and 5.x */
for (i = 0; i < il->channel_count; i++) {
ch_info = &il->channel_info[i];
a_band = il_is_channel_a_band(ch_info);
/* Get this chnlgrp's factory calibration temperature */
ref_temp = (s16) eeprom->groups[ch_info->group_idx].temperature;
/* get power idx adjustment based on current and factory
* temps */
delta_idx =
il3945_hw_reg_adjust_power_by_temp(temperature, ref_temp);
/* set tx power value for all rates, OFDM and CCK */
for (rate_idx = 0; rate_idx < RATE_COUNT_3945; rate_idx++) {
int power_idx =
ch_info->power_info[rate_idx].base_power_idx;
/* temperature compensate */
power_idx += delta_idx;
/* stay within table range */
power_idx = il3945_hw_reg_fix_power_idx(power_idx);
ch_info->power_info[rate_idx].power_table_idx =
(u8) power_idx;
ch_info->power_info[rate_idx].tpc =
power_gain_table[a_band][power_idx];
}
/* Get this chnlgrp's rate-to-max/clip-powers table */
clip_pwrs =
il->_3945.clip_groups[ch_info->group_idx].clip_powers;
/* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
for (scan_tbl_idx = 0; scan_tbl_idx < IL_NUM_SCAN_RATES;
scan_tbl_idx++) {
s32 actual_idx =
(scan_tbl_idx ==
0) ? RATE_1M_IDX_TBL : RATE_6M_IDX_TBL;
il3945_hw_reg_set_scan_power(il, scan_tbl_idx,
actual_idx, clip_pwrs,
ch_info, a_band);
}
}
/* send Txpower command for current channel to ucode */
return il->ops->send_tx_power(il);
}
int
il3945_hw_reg_set_txpower(struct il_priv *il, s8 power)
{
struct il_channel_info *ch_info;
s8 max_power;
u8 a_band;
u8 i;
if (il->tx_power_user_lmt == power) {
D_POWER("Requested Tx power same as current " "limit: %ddBm.\n",
power);
return 0;
}
D_POWER("Setting upper limit clamp to %ddBm.\n", power);
il->tx_power_user_lmt = power;
/* set up new Tx powers for each and every channel, 2.4 and 5.x */
for (i = 0; i < il->channel_count; i++) {
ch_info = &il->channel_info[i];
a_band = il_is_channel_a_band(ch_info);
/* find minimum power of all user and regulatory constraints
* (does not consider h/w clipping limitations) */
max_power = il3945_hw_reg_get_ch_txpower_limit(ch_info);
max_power = min(power, max_power);
if (max_power != ch_info->curr_txpow) {
ch_info->curr_txpow = max_power;
/* this considers the h/w clipping limitations */
il3945_hw_reg_set_new_power(il, ch_info);
}
}
/* update txpower settings for all channels,
* send to NIC if associated. */
il3945_is_temp_calib_needed(il);
il3945_hw_reg_comp_txpower_temp(il);
return 0;
}
static int
il3945_send_rxon_assoc(struct il_priv *il)
{
int rc = 0;
struct il_rx_pkt *pkt;
struct il3945_rxon_assoc_cmd rxon_assoc;
struct il_host_cmd cmd = {
.id = C_RXON_ASSOC,
.len = sizeof(rxon_assoc),
.flags = CMD_WANT_SKB,
.data = &rxon_assoc,
};
const struct il_rxon_cmd *rxon1 = &il->staging;
const struct il_rxon_cmd *rxon2 = &il->active;
if (rxon1->flags == rxon2->flags &&
rxon1->filter_flags == rxon2->filter_flags &&
rxon1->cck_basic_rates == rxon2->cck_basic_rates &&
rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates) {
D_INFO("Using current RXON_ASSOC. Not resending.\n");
return 0;
}
rxon_assoc.flags = il->staging.flags;
rxon_assoc.filter_flags = il->staging.filter_flags;
rxon_assoc.ofdm_basic_rates = il->staging.ofdm_basic_rates;
rxon_assoc.cck_basic_rates = il->staging.cck_basic_rates;
rxon_assoc.reserved = 0;
rc = il_send_cmd_sync(il, &cmd);
if (rc)
return rc;
pkt = (struct il_rx_pkt *)cmd.reply_page;
if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
IL_ERR("Bad return from C_RXON_ASSOC command\n");
rc = -EIO;
}
il_free_pages(il, cmd.reply_page);
return rc;
}
/**
* il3945_commit_rxon - commit staging_rxon to hardware
*
* The RXON command in staging_rxon is committed to the hardware and
* the active_rxon structure is updated with the new data. This
* function correctly transitions out of the RXON_ASSOC_MSK state if
* a HW tune is required based on the RXON structure changes.
*/
int
il3945_commit_rxon(struct il_priv *il)
{
/* cast away the const for active_rxon in this function */
struct il3945_rxon_cmd *active_rxon = (void *)&il->active;
struct il3945_rxon_cmd *staging_rxon = (void *)&il->staging;
int rc = 0;
bool new_assoc = !!(staging_rxon->filter_flags & RXON_FILTER_ASSOC_MSK);
if (test_bit(S_EXIT_PENDING, &il->status))
return -EINVAL;
if (!il_is_alive(il))
return -1;
/* always get timestamp with Rx frame */
staging_rxon->flags |= RXON_FLG_TSF2HOST_MSK;
/* select antenna */
staging_rxon->flags &= ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
staging_rxon->flags |= il3945_get_antenna_flags(il);
rc = il_check_rxon_cmd(il);
if (rc) {
IL_ERR("Invalid RXON configuration. Not committing.\n");
return -EINVAL;
}
/* If we don't need to send a full RXON, we can use
* il3945_rxon_assoc_cmd which is used to reconfigure filter
* and other flags for the current radio configuration. */
if (!il_full_rxon_required(il)) {
rc = il_send_rxon_assoc(il);
if (rc) {
IL_ERR("Error setting RXON_ASSOC "
"configuration (%d).\n", rc);
return rc;
}
memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
/*
* We do not commit tx power settings while channel changing,
* do it now if tx power changed.
*/
il_set_tx_power(il, il->tx_power_next, false);
return 0;
}
/* If we are currently associated and the new config requires
* an RXON_ASSOC and the new config wants the associated mask enabled,
* we must clear the associated from the active configuration
* before we apply the new config */
if (il_is_associated(il) && new_assoc) {
D_INFO("Toggling associated bit on current RXON\n");
active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
/*
* reserved4 and 5 could have been filled by the iwlcore code.
* Let's clear them before pushing to the 3945.
*/
active_rxon->reserved4 = 0;
active_rxon->reserved5 = 0;
rc = il_send_cmd_pdu(il, C_RXON, sizeof(struct il3945_rxon_cmd),
&il->active);
/* If the mask clearing failed then we set
* active_rxon back to what it was previously */
if (rc) {
active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
IL_ERR("Error clearing ASSOC_MSK on current "
"configuration (%d).\n", rc);
return rc;
}
il_clear_ucode_stations(il);
il_restore_stations(il);
}
D_INFO("Sending RXON\n" "* with%s RXON_FILTER_ASSOC_MSK\n"
"* channel = %d\n" "* bssid = %pM\n", (new_assoc ? "" : "out"),
le16_to_cpu(staging_rxon->channel), staging_rxon->bssid_addr);
/*
* reserved4 and 5 could have been filled by the iwlcore code.
* Let's clear them before pushing to the 3945.
*/
staging_rxon->reserved4 = 0;
staging_rxon->reserved5 = 0;
il_set_rxon_hwcrypto(il, !il3945_mod_params.sw_crypto);
/* Apply the new configuration */
rc = il_send_cmd_pdu(il, C_RXON, sizeof(struct il3945_rxon_cmd),
staging_rxon);
if (rc) {
IL_ERR("Error setting new configuration (%d).\n", rc);
return rc;
}
memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
if (!new_assoc) {
il_clear_ucode_stations(il);
il_restore_stations(il);
}
/* If we issue a new RXON command which required a tune then we must
* send a new TXPOWER command or we won't be able to Tx any frames */
rc = il_set_tx_power(il, il->tx_power_next, true);
if (rc) {
IL_ERR("Error setting Tx power (%d).\n", rc);
return rc;
}
/* Init the hardware's rate fallback order based on the band */
rc = il3945_init_hw_rate_table(il);
if (rc) {
IL_ERR("Error setting HW rate table: %02X\n", rc);
return -EIO;
}
return 0;
}
/**
* il3945_reg_txpower_periodic - called when time to check our temperature.
*
* -- reset periodic timer
* -- see if temp has changed enough to warrant re-calibration ... if so:
* -- correct coeffs for temp (can reset temp timer)
* -- save this temp as "last",
* -- send new set of gain settings to NIC
* NOTE: This should continue working, even when we're not associated,
* so we can keep our internal table of scan powers current. */
void
il3945_reg_txpower_periodic(struct il_priv *il)
{
/* This will kick in the "brute force"
* il3945_hw_reg_comp_txpower_temp() below */
if (!il3945_is_temp_calib_needed(il))
goto reschedule;
/* Set up a new set of temp-adjusted TxPowers, send to NIC.
* This is based *only* on current temperature,
* ignoring any previous power measurements */
il3945_hw_reg_comp_txpower_temp(il);
reschedule:
queue_delayed_work(il->workqueue, &il->_3945.thermal_periodic,
REG_RECALIB_PERIOD * HZ);
}
static void
il3945_bg_reg_txpower_periodic(struct work_struct *work)
{
struct il_priv *il = container_of(work, struct il_priv,
_3945.thermal_periodic.work);
mutex_lock(&il->mutex);
if (test_bit(S_EXIT_PENDING, &il->status) || il->txq == NULL)
goto out;
il3945_reg_txpower_periodic(il);
out:
mutex_unlock(&il->mutex);
}
/**
* il3945_hw_reg_get_ch_grp_idx - find the channel-group idx (0-4) for channel.
*
* This function is used when initializing channel-info structs.
*
* NOTE: These channel groups do *NOT* match the bands above!
* These channel groups are based on factory-tested channels;
* on A-band, EEPROM's "group frequency" entries represent the top
* channel in each group 1-4. Group 5 All B/G channels are in group 0.
*/
static u16
il3945_hw_reg_get_ch_grp_idx(struct il_priv *il,
const struct il_channel_info *ch_info)
{
struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
struct il3945_eeprom_txpower_group *ch_grp = &eeprom->groups[0];
u8 group;
u16 group_idx = 0; /* based on factory calib frequencies */
u8 grp_channel;
/* Find the group idx for the channel ... don't use idx 1(?) */
if (il_is_channel_a_band(ch_info)) {
for (group = 1; group < 5; group++) {
grp_channel = ch_grp[group].group_channel;
if (ch_info->channel <= grp_channel) {
group_idx = group;
break;
}
}
/* group 4 has a few channels *above* its factory cal freq */
if (group == 5)
group_idx = 4;
} else
group_idx = 0; /* 2.4 GHz, group 0 */
D_POWER("Chnl %d mapped to grp %d\n", ch_info->channel, group_idx);
return group_idx;
}
/**
* il3945_hw_reg_get_matched_power_idx - Interpolate to get nominal idx
*
* Interpolate to get nominal (i.e. at factory calibration temperature) idx
* into radio/DSP gain settings table for requested power.
*/
static int
il3945_hw_reg_get_matched_power_idx(struct il_priv *il, s8 requested_power,
s32 setting_idx, s32 *new_idx)
{
const struct il3945_eeprom_txpower_group *chnl_grp = NULL;
struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
s32 idx0, idx1;
s32 power = 2 * requested_power;
s32 i;
const struct il3945_eeprom_txpower_sample *samples;
s32 gains0, gains1;
s32 res;
s32 denominator;
chnl_grp = &eeprom->groups[setting_idx];
samples = chnl_grp->samples;
for (i = 0; i < 5; i++) {
if (power == samples[i].power) {
*new_idx = samples[i].gain_idx;
return 0;
}
}
if (power > samples[1].power) {
idx0 = 0;
idx1 = 1;
} else if (power > samples[2].power) {
idx0 = 1;
idx1 = 2;
} else if (power > samples[3].power) {
idx0 = 2;
idx1 = 3;
} else {
idx0 = 3;
idx1 = 4;
}
denominator = (s32) samples[idx1].power - (s32) samples[idx0].power;
if (denominator == 0)
return -EINVAL;
gains0 = (s32) samples[idx0].gain_idx * (1 << 19);
gains1 = (s32) samples[idx1].gain_idx * (1 << 19);
res =
gains0 + (gains1 - gains0) * ((s32) power -
(s32) samples[idx0].power) /
denominator + (1 << 18);
*new_idx = res >> 19;
return 0;
}
static void
il3945_hw_reg_init_channel_groups(struct il_priv *il)
{
u32 i;
s32 rate_idx;
struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
const struct il3945_eeprom_txpower_group *group;
D_POWER("Initializing factory calib info from EEPROM\n");
for (i = 0; i < IL_NUM_TX_CALIB_GROUPS; i++) {
s8 *clip_pwrs; /* table of power levels for each rate */
s8 satur_pwr; /* saturation power for each chnl group */
group = &eeprom->groups[i];
/* sanity check on factory saturation power value */
if (group->saturation_power < 40) {
IL_WARN("Error: saturation power is %d, "
"less than minimum expected 40\n",
group->saturation_power);
return;
}
/*
* Derive requested power levels for each rate, based on
* hardware capabilities (saturation power for band).
* Basic value is 3dB down from saturation, with further
* power reductions for highest 3 data rates. These
* backoffs provide headroom for high rate modulation
* power peaks, without too much distortion (clipping).
*/
/* we'll fill in this array with h/w max power levels */
clip_pwrs = (s8 *) il->_3945.clip_groups[i].clip_powers;
/* divide factory saturation power by 2 to find -3dB level */
satur_pwr = (s8) (group->saturation_power >> 1);
/* fill in channel group's nominal powers for each rate */
for (rate_idx = 0; rate_idx < RATE_COUNT_3945;
rate_idx++, clip_pwrs++) {
switch (rate_idx) {
case RATE_36M_IDX_TBL:
if (i == 0) /* B/G */
*clip_pwrs = satur_pwr;
else /* A */
*clip_pwrs = satur_pwr - 5;
break;
case RATE_48M_IDX_TBL:
if (i == 0)
*clip_pwrs = satur_pwr - 7;
else
*clip_pwrs = satur_pwr - 10;
break;
case RATE_54M_IDX_TBL:
if (i == 0)
*clip_pwrs = satur_pwr - 9;
else
*clip_pwrs = satur_pwr - 12;
break;
default:
*clip_pwrs = satur_pwr;
break;
}
}
}
}
/**
* il3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
*
* Second pass (during init) to set up il->channel_info
*
* Set up Tx-power settings in our channel info database for each VALID
* (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
* and current temperature.
*
* Since this is based on current temperature (at init time), these values may
* not be valid for very long, but it gives us a starting/default point,
* and allows us to active (i.e. using Tx) scan.
*
* This does *not* write values to NIC, just sets up our internal table.
*/
int
il3945_txpower_set_from_eeprom(struct il_priv *il)
{
struct il_channel_info *ch_info = NULL;
struct il3945_channel_power_info *pwr_info;
struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
int delta_idx;
u8 rate_idx;
u8 scan_tbl_idx;
const s8 *clip_pwrs; /* array of power levels for each rate */
u8 gain, dsp_atten;
s8 power;
u8 pwr_idx, base_pwr_idx, a_band;
u8 i;
int temperature;
/* save temperature reference,
* so we can determine next time to calibrate */
temperature = il3945_hw_reg_txpower_get_temperature(il);
il->last_temperature = temperature;
il3945_hw_reg_init_channel_groups(il);
/* initialize Tx power info for each and every channel, 2.4 and 5.x */
for (i = 0, ch_info = il->channel_info; i < il->channel_count;
i++, ch_info++) {
a_band = il_is_channel_a_band(ch_info);
if (!il_is_channel_valid(ch_info))
continue;
/* find this channel's channel group (*not* "band") idx */
ch_info->group_idx = il3945_hw_reg_get_ch_grp_idx(il, ch_info);
/* Get this chnlgrp's rate->max/clip-powers table */
clip_pwrs =
il->_3945.clip_groups[ch_info->group_idx].clip_powers;
/* calculate power idx *adjustment* value according to
* diff between current temperature and factory temperature */
delta_idx =
il3945_hw_reg_adjust_power_by_temp(temperature,
eeprom->groups[ch_info->
group_idx].
temperature);
D_POWER("Delta idx for channel %d: %d [%d]\n", ch_info->channel,
delta_idx, temperature + IL_TEMP_CONVERT);
/* set tx power value for all OFDM rates */
for (rate_idx = 0; rate_idx < IL_OFDM_RATES; rate_idx++) {
s32 uninitialized_var(power_idx);
int rc;
/* use channel group's clip-power table,
* but don't exceed channel's max power */
s8 pwr = min(ch_info->max_power_avg,
clip_pwrs[rate_idx]);
pwr_info = &ch_info->power_info[rate_idx];
/* get base (i.e. at factory-measured temperature)
* power table idx for this rate's power */
rc = il3945_hw_reg_get_matched_power_idx(il, pwr,
ch_info->
group_idx,
&power_idx);
if (rc) {
IL_ERR("Invalid power idx\n");
return rc;
}
pwr_info->base_power_idx = (u8) power_idx;
/* temperature compensate */
power_idx += delta_idx;
/* stay within range of gain table */
power_idx = il3945_hw_reg_fix_power_idx(power_idx);
/* fill 1 OFDM rate's il3945_channel_power_info struct */
pwr_info->requested_power = pwr;
pwr_info->power_table_idx = (u8) power_idx;
pwr_info->tpc.tx_gain =
power_gain_table[a_band][power_idx].tx_gain;
pwr_info->tpc.dsp_atten =
power_gain_table[a_band][power_idx].dsp_atten;
}
/* set tx power for CCK rates, based on OFDM 12 Mbit settings */
pwr_info = &ch_info->power_info[RATE_12M_IDX_TBL];
power = pwr_info->requested_power + IL_CCK_FROM_OFDM_POWER_DIFF;
pwr_idx = pwr_info->power_table_idx + IL_CCK_FROM_OFDM_IDX_DIFF;
base_pwr_idx =
pwr_info->base_power_idx + IL_CCK_FROM_OFDM_IDX_DIFF;
/* stay within table range */
pwr_idx = il3945_hw_reg_fix_power_idx(pwr_idx);
gain = power_gain_table[a_band][pwr_idx].tx_gain;
dsp_atten = power_gain_table[a_band][pwr_idx].dsp_atten;
/* fill each CCK rate's il3945_channel_power_info structure
* NOTE: All CCK-rate Txpwrs are the same for a given chnl!
* NOTE: CCK rates start at end of OFDM rates! */
for (rate_idx = 0; rate_idx < IL_CCK_RATES; rate_idx++) {
pwr_info =
&ch_info->power_info[rate_idx + IL_OFDM_RATES];
pwr_info->requested_power = power;
pwr_info->power_table_idx = pwr_idx;
pwr_info->base_power_idx = base_pwr_idx;
pwr_info->tpc.tx_gain = gain;
pwr_info->tpc.dsp_atten = dsp_atten;
}
/* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
for (scan_tbl_idx = 0; scan_tbl_idx < IL_NUM_SCAN_RATES;
scan_tbl_idx++) {
s32 actual_idx =
(scan_tbl_idx ==
0) ? RATE_1M_IDX_TBL : RATE_6M_IDX_TBL;
il3945_hw_reg_set_scan_power(il, scan_tbl_idx,
actual_idx, clip_pwrs,
ch_info, a_band);
}
}
return 0;
}
int
il3945_hw_rxq_stop(struct il_priv *il)
{
int ret;
_il_wr(il, FH39_RCSR_CONFIG(0), 0);
ret = _il_poll_bit(il, FH39_RSSR_STATUS,
FH39_RSSR_CHNL0_RX_STATUS_CHNL_IDLE,
FH39_RSSR_CHNL0_RX_STATUS_CHNL_IDLE,
1000);
if (ret < 0)
IL_ERR("Can't stop Rx DMA.\n");
return 0;
}
int
il3945_hw_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq)
{
int txq_id = txq->q.id;
struct il3945_shared *shared_data = il->_3945.shared_virt;
shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32) txq->q.dma_addr);
il_wr(il, FH39_CBCC_CTRL(txq_id), 0);
il_wr(il, FH39_CBCC_BASE(txq_id), 0);
il_wr(il, FH39_TCSR_CONFIG(txq_id),
FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
/* fake read to flush all prev. writes */
_il_rd(il, FH39_TSSR_CBB_BASE);
return 0;
}
/*
* HCMD utils
*/
static u16
il3945_get_hcmd_size(u8 cmd_id, u16 len)
{
switch (cmd_id) {
case C_RXON:
return sizeof(struct il3945_rxon_cmd);
case C_POWER_TBL:
return sizeof(struct il3945_powertable_cmd);
default:
return len;
}
}
static u16
il3945_build_addsta_hcmd(const struct il_addsta_cmd *cmd, u8 * data)
{
struct il3945_addsta_cmd *addsta = (struct il3945_addsta_cmd *)data;
addsta->mode = cmd->mode;
memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
memcpy(&addsta->key, &cmd->key, sizeof(struct il4965_keyinfo));
addsta->station_flags = cmd->station_flags;
addsta->station_flags_msk = cmd->station_flags_msk;
addsta->tid_disable_tx = cpu_to_le16(0);
addsta->rate_n_flags = cmd->rate_n_flags;
addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
return (u16) sizeof(struct il3945_addsta_cmd);
}
static int
il3945_add_bssid_station(struct il_priv *il, const u8 * addr, u8 * sta_id_r)
{
int ret;
u8 sta_id;
unsigned long flags;
if (sta_id_r)
*sta_id_r = IL_INVALID_STATION;
ret = il_add_station_common(il, addr, 0, NULL, &sta_id);
if (ret) {
IL_ERR("Unable to add station %pM\n", addr);
return ret;
}
if (sta_id_r)
*sta_id_r = sta_id;
spin_lock_irqsave(&il->sta_lock, flags);
il->stations[sta_id].used |= IL_STA_LOCAL;
spin_unlock_irqrestore(&il->sta_lock, flags);
return 0;
}
static int
il3945_manage_ibss_station(struct il_priv *il, struct ieee80211_vif *vif,
bool add)
{
struct il_vif_priv *vif_priv = (void *)vif->drv_priv;
int ret;
if (add) {
ret =
il3945_add_bssid_station(il, vif->bss_conf.bssid,
&vif_priv->ibss_bssid_sta_id);
if (ret)
return ret;
il3945_sync_sta(il, vif_priv->ibss_bssid_sta_id,
(il->band ==
IEEE80211_BAND_5GHZ) ? RATE_6M_PLCP :
RATE_1M_PLCP);
il3945_rate_scale_init(il->hw, vif_priv->ibss_bssid_sta_id);
return 0;
}
return il_remove_station(il, vif_priv->ibss_bssid_sta_id,
vif->bss_conf.bssid);
}
/**
* il3945_init_hw_rate_table - Initialize the hardware rate fallback table
*/
int
il3945_init_hw_rate_table(struct il_priv *il)
{
int rc, i, idx, prev_idx;
struct il3945_rate_scaling_cmd rate_cmd = {
.reserved = {0, 0, 0},
};
struct il3945_rate_scaling_info *table = rate_cmd.table;
for (i = 0; i < ARRAY_SIZE(il3945_rates); i++) {
idx = il3945_rates[i].table_rs_idx;
table[idx].rate_n_flags = cpu_to_le16(il3945_rates[i].plcp);
table[idx].try_cnt = il->retry_rate;
prev_idx = il3945_get_prev_ieee_rate(i);
table[idx].next_rate_idx = il3945_rates[prev_idx].table_rs_idx;
}
switch (il->band) {
case IEEE80211_BAND_5GHZ:
D_RATE("Select A mode rate scale\n");
/* If one of the following CCK rates is used,
* have it fall back to the 6M OFDM rate */
for (i = RATE_1M_IDX_TBL; i <= RATE_11M_IDX_TBL; i++)
table[i].next_rate_idx =
il3945_rates[IL_FIRST_OFDM_RATE].table_rs_idx;
/* Don't fall back to CCK rates */
table[RATE_12M_IDX_TBL].next_rate_idx = RATE_9M_IDX_TBL;
/* Don't drop out of OFDM rates */
table[RATE_6M_IDX_TBL].next_rate_idx =
il3945_rates[IL_FIRST_OFDM_RATE].table_rs_idx;
break;
case IEEE80211_BAND_2GHZ:
D_RATE("Select B/G mode rate scale\n");
/* If an OFDM rate is used, have it fall back to the
* 1M CCK rates */
if (!(il->_3945.sta_supp_rates & IL_OFDM_RATES_MASK) &&
il_is_associated(il)) {
idx = IL_FIRST_CCK_RATE;
for (i = RATE_6M_IDX_TBL; i <= RATE_54M_IDX_TBL; i++)
table[i].next_rate_idx =
il3945_rates[idx].table_rs_idx;
idx = RATE_11M_IDX_TBL;
/* CCK shouldn't fall back to OFDM... */
table[idx].next_rate_idx = RATE_5M_IDX_TBL;
}
break;
default:
WARN_ON(1);
break;
}
/* Update the rate scaling for control frame Tx */
rate_cmd.table_id = 0;
rc = il_send_cmd_pdu(il, C_RATE_SCALE, sizeof(rate_cmd), &rate_cmd);
if (rc)
return rc;
/* Update the rate scaling for data frame Tx */
rate_cmd.table_id = 1;
return il_send_cmd_pdu(il, C_RATE_SCALE, sizeof(rate_cmd), &rate_cmd);
}
/* Called when initializing driver */
int
il3945_hw_set_hw_params(struct il_priv *il)
{
memset((void *)&il->hw_params, 0, sizeof(struct il_hw_params));
il->_3945.shared_virt =
dma_alloc_coherent(&il->pci_dev->dev, sizeof(struct il3945_shared),
&il->_3945.shared_phys, GFP_KERNEL);
if (!il->_3945.shared_virt) {
IL_ERR("failed to allocate pci memory\n");
return -ENOMEM;
}
il->hw_params.bcast_id = IL3945_BROADCAST_ID;
/* Assign number of Usable TX queues */
il->hw_params.max_txq_num = il->cfg->num_of_queues;
il->hw_params.tfd_size = sizeof(struct il3945_tfd);
il->hw_params.rx_page_order = get_order(IL_RX_BUF_SIZE_3K);
il->hw_params.max_rxq_size = RX_QUEUE_SIZE;
il->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
il->hw_params.max_stations = IL3945_STATION_COUNT;
il->sta_key_max_num = STA_KEY_MAX_NUM;
il->hw_params.rx_wrt_ptr_reg = FH39_RSCSR_CHNL0_WPTR;
il->hw_params.max_beacon_itrvl = IL39_MAX_UCODE_BEACON_INTERVAL;
il->hw_params.beacon_time_tsf_bits = IL3945_EXT_BEACON_TIME_POS;
return 0;
}
unsigned int
il3945_hw_get_beacon_cmd(struct il_priv *il, struct il3945_frame *frame,
u8 rate)
{
struct il3945_tx_beacon_cmd *tx_beacon_cmd;
unsigned int frame_size;
tx_beacon_cmd = (struct il3945_tx_beacon_cmd *)&frame->u;
memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
tx_beacon_cmd->tx.sta_id = il->hw_params.bcast_id;
tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
frame_size =
il3945_fill_beacon_frame(il, tx_beacon_cmd->frame,
sizeof(frame->u) - sizeof(*tx_beacon_cmd));
BUG_ON(frame_size > MAX_MPDU_SIZE);
tx_beacon_cmd->tx.len = cpu_to_le16((u16) frame_size);
tx_beacon_cmd->tx.rate = rate;
tx_beacon_cmd->tx.tx_flags =
(TX_CMD_FLG_SEQ_CTL_MSK | TX_CMD_FLG_TSF_MSK);
/* supp_rates[0] == OFDM start at IL_FIRST_OFDM_RATE */
tx_beacon_cmd->tx.supp_rates[0] =
(IL_OFDM_BASIC_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
tx_beacon_cmd->tx.supp_rates[1] = (IL_CCK_BASIC_RATES_MASK & 0xF);
return sizeof(struct il3945_tx_beacon_cmd) + frame_size;
}
void
il3945_hw_handler_setup(struct il_priv *il)
{
il->handlers[C_TX] = il3945_hdl_tx;
il->handlers[N_3945_RX] = il3945_hdl_rx;
}
void
il3945_hw_setup_deferred_work(struct il_priv *il)
{
INIT_DELAYED_WORK(&il->_3945.thermal_periodic,
il3945_bg_reg_txpower_periodic);
}
void
il3945_hw_cancel_deferred_work(struct il_priv *il)
{
cancel_delayed_work(&il->_3945.thermal_periodic);
}
/* check contents of special bootstrap uCode SRAM */
static int
il3945_verify_bsm(struct il_priv *il)
{
__le32 *image = il->ucode_boot.v_addr;
u32 len = il->ucode_boot.len;
u32 reg;
u32 val;
D_INFO("Begin verify bsm\n");
/* verify BSM SRAM contents */
val = il_rd_prph(il, BSM_WR_DWCOUNT_REG);
for (reg = BSM_SRAM_LOWER_BOUND; reg < BSM_SRAM_LOWER_BOUND + len;
reg += sizeof(u32), image++) {
val = il_rd_prph(il, reg);
if (val != le32_to_cpu(*image)) {
IL_ERR("BSM uCode verification failed at "
"addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
BSM_SRAM_LOWER_BOUND, reg - BSM_SRAM_LOWER_BOUND,
len, val, le32_to_cpu(*image));
return -EIO;
}
}
D_INFO("BSM bootstrap uCode image OK\n");
return 0;
}
/******************************************************************************
*
* EEPROM related functions
*
******************************************************************************/
/*
* Clear the OWNER_MSK, to establish driver (instead of uCode running on
* embedded controller) as EEPROM reader; each read is a series of pulses
* to/from the EEPROM chip, not a single event, so even reads could conflict
* if they weren't arbitrated by some ownership mechanism. Here, the driver
* simply claims ownership, which should be safe when this function is called
* (i.e. before loading uCode!).
*/
static int
il3945_eeprom_acquire_semaphore(struct il_priv *il)
{
_il_clear_bit(il, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
return 0;
}
static void
il3945_eeprom_release_semaphore(struct il_priv *il)
{
return;
}
/**
* il3945_load_bsm - Load bootstrap instructions
*
* BSM operation:
*
* The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
* in special SRAM that does not power down during RFKILL. When powering back
* up after power-saving sleeps (or during initial uCode load), the BSM loads
* the bootstrap program into the on-board processor, and starts it.
*
* The bootstrap program loads (via DMA) instructions and data for a new
* program from host DRAM locations indicated by the host driver in the
* BSM_DRAM_* registers. Once the new program is loaded, it starts
* automatically.
*
* When initializing the NIC, the host driver points the BSM to the
* "initialize" uCode image. This uCode sets up some internal data, then
* notifies host via "initialize alive" that it is complete.
*
* The host then replaces the BSM_DRAM_* pointer values to point to the
* normal runtime uCode instructions and a backup uCode data cache buffer
* (filled initially with starting data values for the on-board processor),
* then triggers the "initialize" uCode to load and launch the runtime uCode,
* which begins normal operation.
*
* When doing a power-save shutdown, runtime uCode saves data SRAM into
* the backup data cache in DRAM before SRAM is powered down.
*
* When powering back up, the BSM loads the bootstrap program. This reloads
* the runtime uCode instructions and the backup data cache into SRAM,
* and re-launches the runtime uCode from where it left off.
*/
static int
il3945_load_bsm(struct il_priv *il)
{
__le32 *image = il->ucode_boot.v_addr;
u32 len = il->ucode_boot.len;
dma_addr_t pinst;
dma_addr_t pdata;
u32 inst_len;
u32 data_len;
int rc;
int i;
u32 done;
u32 reg_offset;
D_INFO("Begin load bsm\n");
/* make sure bootstrap program is no larger than BSM's SRAM size */
if (len > IL39_MAX_BSM_SIZE)
return -EINVAL;
/* Tell bootstrap uCode where to find the "Initialize" uCode
* in host DRAM ... host DRAM physical address bits 31:0 for 3945.
* NOTE: il3945_initialize_alive_start() will replace these values,
* after the "initialize" uCode has run, to point to
* runtime/protocol instructions and backup data cache. */
pinst = il->ucode_init.p_addr;
pdata = il->ucode_init_data.p_addr;
inst_len = il->ucode_init.len;
data_len = il->ucode_init_data.len;
il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
/* Fill BSM memory with bootstrap instructions */
for (reg_offset = BSM_SRAM_LOWER_BOUND;
reg_offset < BSM_SRAM_LOWER_BOUND + len;
reg_offset += sizeof(u32), image++)
_il_wr_prph(il, reg_offset, le32_to_cpu(*image));
rc = il3945_verify_bsm(il);
if (rc)
return rc;
/* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
il_wr_prph(il, BSM_WR_MEM_SRC_REG, 0x0);
il_wr_prph(il, BSM_WR_MEM_DST_REG, IL39_RTC_INST_LOWER_BOUND);
il_wr_prph(il, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
/* Load bootstrap code into instruction SRAM now,
* to prepare to load "initialize" uCode */
il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
/* Wait for load of bootstrap uCode to finish */
for (i = 0; i < 100; i++) {
done = il_rd_prph(il, BSM_WR_CTRL_REG);
if (!(done & BSM_WR_CTRL_REG_BIT_START))
break;
udelay(10);
}
if (i < 100)
D_INFO("BSM write complete, poll %d iterations\n", i);
else {
IL_ERR("BSM write did not complete!\n");
return -EIO;
}
/* Enable future boot loads whenever power management unit triggers it
* (e.g. when powering back up after power-save shutdown) */
il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
return 0;
}
const struct il_ops il3945_ops = {
.txq_attach_buf_to_tfd = il3945_hw_txq_attach_buf_to_tfd,
.txq_free_tfd = il3945_hw_txq_free_tfd,
.txq_init = il3945_hw_tx_queue_init,
.load_ucode = il3945_load_bsm,
.dump_nic_error_log = il3945_dump_nic_error_log,
.apm_init = il3945_apm_init,
.send_tx_power = il3945_send_tx_power,
.is_valid_rtc_data_addr = il3945_hw_valid_rtc_data_addr,
.eeprom_acquire_semaphore = il3945_eeprom_acquire_semaphore,
.eeprom_release_semaphore = il3945_eeprom_release_semaphore,
.rxon_assoc = il3945_send_rxon_assoc,
.commit_rxon = il3945_commit_rxon,
.get_hcmd_size = il3945_get_hcmd_size,
.build_addsta_hcmd = il3945_build_addsta_hcmd,
.request_scan = il3945_request_scan,
.post_scan = il3945_post_scan,
.post_associate = il3945_post_associate,
.config_ap = il3945_config_ap,
.manage_ibss_station = il3945_manage_ibss_station,
.send_led_cmd = il3945_send_led_cmd,
};
static struct il_cfg il3945_bg_cfg = {
.name = "3945BG",
.fw_name_pre = IL3945_FW_PRE,
.ucode_api_max = IL3945_UCODE_API_MAX,
.ucode_api_min = IL3945_UCODE_API_MIN,
.sku = IL_SKU_G,
.eeprom_ver = EEPROM_3945_EEPROM_VERSION,
.mod_params = &il3945_mod_params,
.led_mode = IL_LED_BLINK,
.eeprom_size = IL3945_EEPROM_IMG_SIZE,
.num_of_queues = IL39_NUM_QUEUES,
.pll_cfg_val = CSR39_ANA_PLL_CFG_VAL,
.set_l0s = false,
.use_bsm = true,
.led_compensation = 64,
.wd_timeout = IL_DEF_WD_TIMEOUT,
.regulatory_bands = {
EEPROM_REGULATORY_BAND_1_CHANNELS,
EEPROM_REGULATORY_BAND_2_CHANNELS,
EEPROM_REGULATORY_BAND_3_CHANNELS,
EEPROM_REGULATORY_BAND_4_CHANNELS,
EEPROM_REGULATORY_BAND_5_CHANNELS,
EEPROM_REGULATORY_BAND_NO_HT40,
EEPROM_REGULATORY_BAND_NO_HT40,
},
};
static struct il_cfg il3945_abg_cfg = {
.name = "3945ABG",
.fw_name_pre = IL3945_FW_PRE,
.ucode_api_max = IL3945_UCODE_API_MAX,
.ucode_api_min = IL3945_UCODE_API_MIN,
.sku = IL_SKU_A | IL_SKU_G,
.eeprom_ver = EEPROM_3945_EEPROM_VERSION,
.mod_params = &il3945_mod_params,
.led_mode = IL_LED_BLINK,
.eeprom_size = IL3945_EEPROM_IMG_SIZE,
.num_of_queues = IL39_NUM_QUEUES,
.pll_cfg_val = CSR39_ANA_PLL_CFG_VAL,
.set_l0s = false,
.use_bsm = true,
.led_compensation = 64,
.wd_timeout = IL_DEF_WD_TIMEOUT,
.regulatory_bands = {
EEPROM_REGULATORY_BAND_1_CHANNELS,
EEPROM_REGULATORY_BAND_2_CHANNELS,
EEPROM_REGULATORY_BAND_3_CHANNELS,
EEPROM_REGULATORY_BAND_4_CHANNELS,
EEPROM_REGULATORY_BAND_5_CHANNELS,
EEPROM_REGULATORY_BAND_NO_HT40,
EEPROM_REGULATORY_BAND_NO_HT40,
},
};
DEFINE_PCI_DEVICE_TABLE(il3945_hw_card_ids) = {
{IL_PCI_DEVICE(0x4222, 0x1005, il3945_bg_cfg)},
{IL_PCI_DEVICE(0x4222, 0x1034, il3945_bg_cfg)},
{IL_PCI_DEVICE(0x4222, 0x1044, il3945_bg_cfg)},
{IL_PCI_DEVICE(0x4227, 0x1014, il3945_bg_cfg)},
{IL_PCI_DEVICE(0x4222, PCI_ANY_ID, il3945_abg_cfg)},
{IL_PCI_DEVICE(0x4227, PCI_ANY_ID, il3945_abg_cfg)},
{0}
};
MODULE_DEVICE_TABLE(pci, il3945_hw_card_ids);
| gpl-2.0 |
WhiteBearSolutions/WBSAirback | packages/wbsairback-kernel-image/wbsairback-kernel-image-3.2.43/drivers/usb/class/usbtmc.c | 27563 | /**
* drivers/usb/class/usbtmc.c - USB Test & Measurement class driver
*
* Copyright (C) 2007 Stefan Kopp, Gechingen, Germany
* Copyright (C) 2008 Novell, Inc.
* Copyright (C) 2008 Greg Kroah-Hartman <[email protected]>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* The GNU General Public License is available at
* http://www.gnu.org/copyleft/gpl.html.
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/fs.h>
#include <linux/uaccess.h>
#include <linux/kref.h>
#include <linux/slab.h>
#include <linux/mutex.h>
#include <linux/usb.h>
#include <linux/usb/tmc.h>
#define USBTMC_MINOR_BASE 176
/*
* Size of driver internal IO buffer. Must be multiple of 4 and at least as
* large as wMaxPacketSize (which is usually 512 bytes).
*/
#define USBTMC_SIZE_IOBUFFER 2048
/* Default USB timeout (in milliseconds) */
#define USBTMC_TIMEOUT 5000
/*
* Maximum number of read cycles to empty bulk in endpoint during CLEAR and
* ABORT_BULK_IN requests. Ends the loop if (for whatever reason) a short
* packet is never read.
*/
#define USBTMC_MAX_READS_TO_CLEAR_BULK_IN 100
static const struct usb_device_id usbtmc_devices[] = {
{ USB_INTERFACE_INFO(USB_CLASS_APP_SPEC, 3, 0), },
{ USB_INTERFACE_INFO(USB_CLASS_APP_SPEC, 3, 1), },
{ 0, } /* terminating entry */
};
MODULE_DEVICE_TABLE(usb, usbtmc_devices);
/*
* This structure is the capabilities for the device
* See section 4.2.1.8 of the USBTMC specification,
* and section 4.2.2 of the USBTMC usb488 subclass
* specification for details.
*/
struct usbtmc_dev_capabilities {
__u8 interface_capabilities;
__u8 device_capabilities;
__u8 usb488_interface_capabilities;
__u8 usb488_device_capabilities;
};
/* This structure holds private data for each USBTMC device. One copy is
* allocated for each USBTMC device in the driver's probe function.
*/
struct usbtmc_device_data {
const struct usb_device_id *id;
struct usb_device *usb_dev;
struct usb_interface *intf;
unsigned int bulk_in;
unsigned int bulk_out;
u8 bTag;
u8 bTag_last_write; /* needed for abort */
u8 bTag_last_read; /* needed for abort */
/* attributes from the USB TMC spec for this device */
u8 TermChar;
bool TermCharEnabled;
bool auto_abort;
bool zombie; /* fd of disconnected device */
struct usbtmc_dev_capabilities capabilities;
struct kref kref;
struct mutex io_mutex; /* only one i/o function running at a time */
};
#define to_usbtmc_data(d) container_of(d, struct usbtmc_device_data, kref)
/* Forward declarations */
static struct usb_driver usbtmc_driver;
static void usbtmc_delete(struct kref *kref)
{
struct usbtmc_device_data *data = to_usbtmc_data(kref);
usb_put_dev(data->usb_dev);
kfree(data);
}
static int usbtmc_open(struct inode *inode, struct file *filp)
{
struct usb_interface *intf;
struct usbtmc_device_data *data;
int retval = 0;
intf = usb_find_interface(&usbtmc_driver, iminor(inode));
if (!intf) {
printk(KERN_ERR KBUILD_MODNAME
": can not find device for minor %d", iminor(inode));
retval = -ENODEV;
goto exit;
}
data = usb_get_intfdata(intf);
kref_get(&data->kref);
/* Store pointer in file structure's private data field */
filp->private_data = data;
exit:
return retval;
}
static int usbtmc_release(struct inode *inode, struct file *file)
{
struct usbtmc_device_data *data = file->private_data;
kref_put(&data->kref, usbtmc_delete);
return 0;
}
static int usbtmc_ioctl_abort_bulk_in(struct usbtmc_device_data *data)
{
u8 *buffer;
struct device *dev;
int rv;
int n;
int actual;
struct usb_host_interface *current_setting;
int max_size;
dev = &data->intf->dev;
buffer = kmalloc(USBTMC_SIZE_IOBUFFER, GFP_KERNEL);
if (!buffer)
return -ENOMEM;
rv = usb_control_msg(data->usb_dev,
usb_rcvctrlpipe(data->usb_dev, 0),
USBTMC_REQUEST_INITIATE_ABORT_BULK_IN,
USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_ENDPOINT,
data->bTag_last_read, data->bulk_in,
buffer, 2, USBTMC_TIMEOUT);
if (rv < 0) {
dev_err(dev, "usb_control_msg returned %d\n", rv);
goto exit;
}
dev_dbg(dev, "INITIATE_ABORT_BULK_IN returned %x\n", buffer[0]);
if (buffer[0] == USBTMC_STATUS_FAILED) {
rv = 0;
goto exit;
}
if (buffer[0] != USBTMC_STATUS_SUCCESS) {
dev_err(dev, "INITIATE_ABORT_BULK_IN returned %x\n",
buffer[0]);
rv = -EPERM;
goto exit;
}
max_size = 0;
current_setting = data->intf->cur_altsetting;
for (n = 0; n < current_setting->desc.bNumEndpoints; n++)
if (current_setting->endpoint[n].desc.bEndpointAddress ==
data->bulk_in)
max_size = usb_endpoint_maxp(¤t_setting->endpoint[n].desc);
if (max_size == 0) {
dev_err(dev, "Couldn't get wMaxPacketSize\n");
rv = -EPERM;
goto exit;
}
dev_dbg(&data->intf->dev, "wMaxPacketSize is %d\n", max_size);
n = 0;
do {
dev_dbg(dev, "Reading from bulk in EP\n");
rv = usb_bulk_msg(data->usb_dev,
usb_rcvbulkpipe(data->usb_dev,
data->bulk_in),
buffer, USBTMC_SIZE_IOBUFFER,
&actual, USBTMC_TIMEOUT);
n++;
if (rv < 0) {
dev_err(dev, "usb_bulk_msg returned %d\n", rv);
goto exit;
}
} while ((actual == max_size) &&
(n < USBTMC_MAX_READS_TO_CLEAR_BULK_IN));
if (actual == max_size) {
dev_err(dev, "Couldn't clear device buffer within %d cycles\n",
USBTMC_MAX_READS_TO_CLEAR_BULK_IN);
rv = -EPERM;
goto exit;
}
n = 0;
usbtmc_abort_bulk_in_status:
rv = usb_control_msg(data->usb_dev,
usb_rcvctrlpipe(data->usb_dev, 0),
USBTMC_REQUEST_CHECK_ABORT_BULK_IN_STATUS,
USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_ENDPOINT,
0, data->bulk_in, buffer, 0x08,
USBTMC_TIMEOUT);
if (rv < 0) {
dev_err(dev, "usb_control_msg returned %d\n", rv);
goto exit;
}
dev_dbg(dev, "INITIATE_ABORT_BULK_IN returned %x\n", buffer[0]);
if (buffer[0] == USBTMC_STATUS_SUCCESS) {
rv = 0;
goto exit;
}
if (buffer[0] != USBTMC_STATUS_PENDING) {
dev_err(dev, "INITIATE_ABORT_BULK_IN returned %x\n", buffer[0]);
rv = -EPERM;
goto exit;
}
if (buffer[1] == 1)
do {
dev_dbg(dev, "Reading from bulk in EP\n");
rv = usb_bulk_msg(data->usb_dev,
usb_rcvbulkpipe(data->usb_dev,
data->bulk_in),
buffer, USBTMC_SIZE_IOBUFFER,
&actual, USBTMC_TIMEOUT);
n++;
if (rv < 0) {
dev_err(dev, "usb_bulk_msg returned %d\n", rv);
goto exit;
}
} while ((actual == max_size) &&
(n < USBTMC_MAX_READS_TO_CLEAR_BULK_IN));
if (actual == max_size) {
dev_err(dev, "Couldn't clear device buffer within %d cycles\n",
USBTMC_MAX_READS_TO_CLEAR_BULK_IN);
rv = -EPERM;
goto exit;
}
goto usbtmc_abort_bulk_in_status;
exit:
kfree(buffer);
return rv;
}
static int usbtmc_ioctl_abort_bulk_out(struct usbtmc_device_data *data)
{
struct device *dev;
u8 *buffer;
int rv;
int n;
dev = &data->intf->dev;
buffer = kmalloc(8, GFP_KERNEL);
if (!buffer)
return -ENOMEM;
rv = usb_control_msg(data->usb_dev,
usb_rcvctrlpipe(data->usb_dev, 0),
USBTMC_REQUEST_INITIATE_ABORT_BULK_OUT,
USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_ENDPOINT,
data->bTag_last_write, data->bulk_out,
buffer, 2, USBTMC_TIMEOUT);
if (rv < 0) {
dev_err(dev, "usb_control_msg returned %d\n", rv);
goto exit;
}
dev_dbg(dev, "INITIATE_ABORT_BULK_OUT returned %x\n", buffer[0]);
if (buffer[0] != USBTMC_STATUS_SUCCESS) {
dev_err(dev, "INITIATE_ABORT_BULK_OUT returned %x\n",
buffer[0]);
rv = -EPERM;
goto exit;
}
n = 0;
usbtmc_abort_bulk_out_check_status:
rv = usb_control_msg(data->usb_dev,
usb_rcvctrlpipe(data->usb_dev, 0),
USBTMC_REQUEST_CHECK_ABORT_BULK_OUT_STATUS,
USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_ENDPOINT,
0, data->bulk_out, buffer, 0x08,
USBTMC_TIMEOUT);
n++;
if (rv < 0) {
dev_err(dev, "usb_control_msg returned %d\n", rv);
goto exit;
}
dev_dbg(dev, "CHECK_ABORT_BULK_OUT returned %x\n", buffer[0]);
if (buffer[0] == USBTMC_STATUS_SUCCESS)
goto usbtmc_abort_bulk_out_clear_halt;
if ((buffer[0] == USBTMC_STATUS_PENDING) &&
(n < USBTMC_MAX_READS_TO_CLEAR_BULK_IN))
goto usbtmc_abort_bulk_out_check_status;
rv = -EPERM;
goto exit;
usbtmc_abort_bulk_out_clear_halt:
rv = usb_clear_halt(data->usb_dev,
usb_sndbulkpipe(data->usb_dev, data->bulk_out));
if (rv < 0) {
dev_err(dev, "usb_control_msg returned %d\n", rv);
goto exit;
}
rv = 0;
exit:
kfree(buffer);
return rv;
}
static ssize_t usbtmc_read(struct file *filp, char __user *buf,
size_t count, loff_t *f_pos)
{
struct usbtmc_device_data *data;
struct device *dev;
u32 n_characters;
u8 *buffer;
int actual;
size_t done;
size_t remaining;
int retval;
size_t this_part;
/* Get pointer to private data structure */
data = filp->private_data;
dev = &data->intf->dev;
buffer = kmalloc(USBTMC_SIZE_IOBUFFER, GFP_KERNEL);
if (!buffer)
return -ENOMEM;
mutex_lock(&data->io_mutex);
if (data->zombie) {
retval = -ENODEV;
goto exit;
}
remaining = count;
done = 0;
while (remaining > 0) {
if (remaining > USBTMC_SIZE_IOBUFFER - 12 - 3)
this_part = USBTMC_SIZE_IOBUFFER - 12 - 3;
else
this_part = remaining;
/* Setup IO buffer for DEV_DEP_MSG_IN message
* Refer to class specs for details
*/
buffer[0] = 2;
buffer[1] = data->bTag;
buffer[2] = ~(data->bTag);
buffer[3] = 0; /* Reserved */
buffer[4] = (this_part) & 255;
buffer[5] = ((this_part) >> 8) & 255;
buffer[6] = ((this_part) >> 16) & 255;
buffer[7] = ((this_part) >> 24) & 255;
buffer[8] = data->TermCharEnabled * 2;
/* Use term character? */
buffer[9] = data->TermChar;
buffer[10] = 0; /* Reserved */
buffer[11] = 0; /* Reserved */
/* Send bulk URB */
retval = usb_bulk_msg(data->usb_dev,
usb_sndbulkpipe(data->usb_dev,
data->bulk_out),
buffer, 12, &actual, USBTMC_TIMEOUT);
/* Store bTag (in case we need to abort) */
data->bTag_last_write = data->bTag;
/* Increment bTag -- and increment again if zero */
data->bTag++;
if (!data->bTag)
(data->bTag)++;
if (retval < 0) {
dev_err(dev, "usb_bulk_msg returned %d\n", retval);
if (data->auto_abort)
usbtmc_ioctl_abort_bulk_out(data);
goto exit;
}
/* Send bulk URB */
retval = usb_bulk_msg(data->usb_dev,
usb_rcvbulkpipe(data->usb_dev,
data->bulk_in),
buffer, USBTMC_SIZE_IOBUFFER, &actual,
USBTMC_TIMEOUT);
/* Store bTag (in case we need to abort) */
data->bTag_last_read = data->bTag;
if (retval < 0) {
dev_err(dev, "Unable to read data, error %d\n", retval);
if (data->auto_abort)
usbtmc_ioctl_abort_bulk_in(data);
goto exit;
}
/* How many characters did the instrument send? */
n_characters = buffer[4] +
(buffer[5] << 8) +
(buffer[6] << 16) +
(buffer[7] << 24);
/* Ensure the instrument doesn't lie about it */
if(n_characters > actual - 12) {
dev_err(dev, "Device lies about message size: %u > %d\n", n_characters, actual - 12);
n_characters = actual - 12;
}
/* Ensure the instrument doesn't send more back than requested */
if(n_characters > this_part) {
dev_err(dev, "Device returns more than requested: %zu > %zu\n", done + n_characters, done + this_part);
n_characters = this_part;
}
/* Bound amount of data received by amount of data requested */
if (n_characters > this_part)
n_characters = this_part;
/* Copy buffer to user space */
if (copy_to_user(buf + done, &buffer[12], n_characters)) {
/* There must have been an addressing problem */
retval = -EFAULT;
goto exit;
}
done += n_characters;
/* Terminate if end-of-message bit received from device */
if ((buffer[8] & 0x01) && (actual >= n_characters + 12))
remaining = 0;
else
remaining -= n_characters;
}
/* Update file position value */
*f_pos = *f_pos + done;
retval = done;
exit:
mutex_unlock(&data->io_mutex);
kfree(buffer);
return retval;
}
static ssize_t usbtmc_write(struct file *filp, const char __user *buf,
size_t count, loff_t *f_pos)
{
struct usbtmc_device_data *data;
u8 *buffer;
int retval;
int actual;
unsigned long int n_bytes;
int remaining;
int done;
int this_part;
data = filp->private_data;
buffer = kmalloc(USBTMC_SIZE_IOBUFFER, GFP_KERNEL);
if (!buffer)
return -ENOMEM;
mutex_lock(&data->io_mutex);
if (data->zombie) {
retval = -ENODEV;
goto exit;
}
remaining = count;
done = 0;
while (remaining > 0) {
if (remaining > USBTMC_SIZE_IOBUFFER - 12) {
this_part = USBTMC_SIZE_IOBUFFER - 12;
buffer[8] = 0;
} else {
this_part = remaining;
buffer[8] = 1;
}
/* Setup IO buffer for DEV_DEP_MSG_OUT message */
buffer[0] = 1;
buffer[1] = data->bTag;
buffer[2] = ~(data->bTag);
buffer[3] = 0; /* Reserved */
buffer[4] = this_part & 255;
buffer[5] = (this_part >> 8) & 255;
buffer[6] = (this_part >> 16) & 255;
buffer[7] = (this_part >> 24) & 255;
/* buffer[8] is set above... */
buffer[9] = 0; /* Reserved */
buffer[10] = 0; /* Reserved */
buffer[11] = 0; /* Reserved */
if (copy_from_user(&buffer[12], buf + done, this_part)) {
retval = -EFAULT;
goto exit;
}
n_bytes = roundup(12 + this_part, 4);
memset(buffer + 12 + this_part, 0, n_bytes - (12 + this_part));
do {
retval = usb_bulk_msg(data->usb_dev,
usb_sndbulkpipe(data->usb_dev,
data->bulk_out),
buffer, n_bytes,
&actual, USBTMC_TIMEOUT);
if (retval != 0)
break;
n_bytes -= actual;
} while (n_bytes);
data->bTag_last_write = data->bTag;
data->bTag++;
if (!data->bTag)
data->bTag++;
if (retval < 0) {
dev_err(&data->intf->dev,
"Unable to send data, error %d\n", retval);
if (data->auto_abort)
usbtmc_ioctl_abort_bulk_out(data);
goto exit;
}
remaining -= this_part;
done += this_part;
}
retval = count;
exit:
mutex_unlock(&data->io_mutex);
kfree(buffer);
return retval;
}
static int usbtmc_ioctl_clear(struct usbtmc_device_data *data)
{
struct usb_host_interface *current_setting;
struct usb_endpoint_descriptor *desc;
struct device *dev;
u8 *buffer;
int rv;
int n;
int actual;
int max_size;
dev = &data->intf->dev;
dev_dbg(dev, "Sending INITIATE_CLEAR request\n");
buffer = kmalloc(USBTMC_SIZE_IOBUFFER, GFP_KERNEL);
if (!buffer)
return -ENOMEM;
rv = usb_control_msg(data->usb_dev,
usb_rcvctrlpipe(data->usb_dev, 0),
USBTMC_REQUEST_INITIATE_CLEAR,
USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_INTERFACE,
0, 0, buffer, 1, USBTMC_TIMEOUT);
if (rv < 0) {
dev_err(dev, "usb_control_msg returned %d\n", rv);
goto exit;
}
dev_dbg(dev, "INITIATE_CLEAR returned %x\n", buffer[0]);
if (buffer[0] != USBTMC_STATUS_SUCCESS) {
dev_err(dev, "INITIATE_CLEAR returned %x\n", buffer[0]);
rv = -EPERM;
goto exit;
}
max_size = 0;
current_setting = data->intf->cur_altsetting;
for (n = 0; n < current_setting->desc.bNumEndpoints; n++) {
desc = ¤t_setting->endpoint[n].desc;
if (desc->bEndpointAddress == data->bulk_in)
max_size = usb_endpoint_maxp(desc);
}
if (max_size == 0) {
dev_err(dev, "Couldn't get wMaxPacketSize\n");
rv = -EPERM;
goto exit;
}
dev_dbg(dev, "wMaxPacketSize is %d\n", max_size);
n = 0;
usbtmc_clear_check_status:
dev_dbg(dev, "Sending CHECK_CLEAR_STATUS request\n");
rv = usb_control_msg(data->usb_dev,
usb_rcvctrlpipe(data->usb_dev, 0),
USBTMC_REQUEST_CHECK_CLEAR_STATUS,
USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_INTERFACE,
0, 0, buffer, 2, USBTMC_TIMEOUT);
if (rv < 0) {
dev_err(dev, "usb_control_msg returned %d\n", rv);
goto exit;
}
dev_dbg(dev, "CHECK_CLEAR_STATUS returned %x\n", buffer[0]);
if (buffer[0] == USBTMC_STATUS_SUCCESS)
goto usbtmc_clear_bulk_out_halt;
if (buffer[0] != USBTMC_STATUS_PENDING) {
dev_err(dev, "CHECK_CLEAR_STATUS returned %x\n", buffer[0]);
rv = -EPERM;
goto exit;
}
if (buffer[1] == 1)
do {
dev_dbg(dev, "Reading from bulk in EP\n");
rv = usb_bulk_msg(data->usb_dev,
usb_rcvbulkpipe(data->usb_dev,
data->bulk_in),
buffer, USBTMC_SIZE_IOBUFFER,
&actual, USBTMC_TIMEOUT);
n++;
if (rv < 0) {
dev_err(dev, "usb_control_msg returned %d\n",
rv);
goto exit;
}
} while ((actual == max_size) &&
(n < USBTMC_MAX_READS_TO_CLEAR_BULK_IN));
if (actual == max_size) {
dev_err(dev, "Couldn't clear device buffer within %d cycles\n",
USBTMC_MAX_READS_TO_CLEAR_BULK_IN);
rv = -EPERM;
goto exit;
}
goto usbtmc_clear_check_status;
usbtmc_clear_bulk_out_halt:
rv = usb_clear_halt(data->usb_dev,
usb_sndbulkpipe(data->usb_dev, data->bulk_out));
if (rv < 0) {
dev_err(dev, "usb_control_msg returned %d\n", rv);
goto exit;
}
rv = 0;
exit:
kfree(buffer);
return rv;
}
static int usbtmc_ioctl_clear_out_halt(struct usbtmc_device_data *data)
{
u8 *buffer;
int rv;
buffer = kmalloc(2, GFP_KERNEL);
if (!buffer)
return -ENOMEM;
rv = usb_clear_halt(data->usb_dev,
usb_sndbulkpipe(data->usb_dev, data->bulk_out));
if (rv < 0) {
dev_err(&data->usb_dev->dev, "usb_control_msg returned %d\n",
rv);
goto exit;
}
rv = 0;
exit:
kfree(buffer);
return rv;
}
static int usbtmc_ioctl_clear_in_halt(struct usbtmc_device_data *data)
{
u8 *buffer;
int rv;
buffer = kmalloc(2, GFP_KERNEL);
if (!buffer)
return -ENOMEM;
rv = usb_clear_halt(data->usb_dev,
usb_rcvbulkpipe(data->usb_dev, data->bulk_in));
if (rv < 0) {
dev_err(&data->usb_dev->dev, "usb_control_msg returned %d\n",
rv);
goto exit;
}
rv = 0;
exit:
kfree(buffer);
return rv;
}
static int get_capabilities(struct usbtmc_device_data *data)
{
struct device *dev = &data->usb_dev->dev;
char *buffer;
int rv = 0;
buffer = kmalloc(0x18, GFP_KERNEL);
if (!buffer)
return -ENOMEM;
rv = usb_control_msg(data->usb_dev, usb_rcvctrlpipe(data->usb_dev, 0),
USBTMC_REQUEST_GET_CAPABILITIES,
USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_INTERFACE,
0, 0, buffer, 0x18, USBTMC_TIMEOUT);
if (rv < 0) {
dev_err(dev, "usb_control_msg returned %d\n", rv);
goto err_out;
}
dev_dbg(dev, "GET_CAPABILITIES returned %x\n", buffer[0]);
if (buffer[0] != USBTMC_STATUS_SUCCESS) {
dev_err(dev, "GET_CAPABILITIES returned %x\n", buffer[0]);
rv = -EPERM;
goto err_out;
}
dev_dbg(dev, "Interface capabilities are %x\n", buffer[4]);
dev_dbg(dev, "Device capabilities are %x\n", buffer[5]);
dev_dbg(dev, "USB488 interface capabilities are %x\n", buffer[14]);
dev_dbg(dev, "USB488 device capabilities are %x\n", buffer[15]);
data->capabilities.interface_capabilities = buffer[4];
data->capabilities.device_capabilities = buffer[5];
data->capabilities.usb488_interface_capabilities = buffer[14];
data->capabilities.usb488_device_capabilities = buffer[15];
rv = 0;
err_out:
kfree(buffer);
return rv;
}
#define capability_attribute(name) \
static ssize_t show_##name(struct device *dev, \
struct device_attribute *attr, char *buf) \
{ \
struct usb_interface *intf = to_usb_interface(dev); \
struct usbtmc_device_data *data = usb_get_intfdata(intf); \
\
return sprintf(buf, "%d\n", data->capabilities.name); \
} \
static DEVICE_ATTR(name, S_IRUGO, show_##name, NULL)
capability_attribute(interface_capabilities);
capability_attribute(device_capabilities);
capability_attribute(usb488_interface_capabilities);
capability_attribute(usb488_device_capabilities);
static struct attribute *capability_attrs[] = {
&dev_attr_interface_capabilities.attr,
&dev_attr_device_capabilities.attr,
&dev_attr_usb488_interface_capabilities.attr,
&dev_attr_usb488_device_capabilities.attr,
NULL,
};
static struct attribute_group capability_attr_grp = {
.attrs = capability_attrs,
};
static ssize_t show_TermChar(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct usb_interface *intf = to_usb_interface(dev);
struct usbtmc_device_data *data = usb_get_intfdata(intf);
return sprintf(buf, "%c\n", data->TermChar);
}
static ssize_t store_TermChar(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct usb_interface *intf = to_usb_interface(dev);
struct usbtmc_device_data *data = usb_get_intfdata(intf);
if (count < 1)
return -EINVAL;
data->TermChar = buf[0];
return count;
}
static DEVICE_ATTR(TermChar, S_IRUGO, show_TermChar, store_TermChar);
#define data_attribute(name) \
static ssize_t show_##name(struct device *dev, \
struct device_attribute *attr, char *buf) \
{ \
struct usb_interface *intf = to_usb_interface(dev); \
struct usbtmc_device_data *data = usb_get_intfdata(intf); \
\
return sprintf(buf, "%d\n", data->name); \
} \
static ssize_t store_##name(struct device *dev, \
struct device_attribute *attr, \
const char *buf, size_t count) \
{ \
struct usb_interface *intf = to_usb_interface(dev); \
struct usbtmc_device_data *data = usb_get_intfdata(intf); \
ssize_t result; \
unsigned val; \
\
result = sscanf(buf, "%u\n", &val); \
if (result != 1) \
result = -EINVAL; \
data->name = val; \
if (result < 0) \
return result; \
else \
return count; \
} \
static DEVICE_ATTR(name, S_IRUGO, show_##name, store_##name)
data_attribute(TermCharEnabled);
data_attribute(auto_abort);
static struct attribute *data_attrs[] = {
&dev_attr_TermChar.attr,
&dev_attr_TermCharEnabled.attr,
&dev_attr_auto_abort.attr,
NULL,
};
static struct attribute_group data_attr_grp = {
.attrs = data_attrs,
};
static int usbtmc_ioctl_indicator_pulse(struct usbtmc_device_data *data)
{
struct device *dev;
u8 *buffer;
int rv;
dev = &data->intf->dev;
buffer = kmalloc(2, GFP_KERNEL);
if (!buffer)
return -ENOMEM;
rv = usb_control_msg(data->usb_dev,
usb_rcvctrlpipe(data->usb_dev, 0),
USBTMC_REQUEST_INDICATOR_PULSE,
USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_INTERFACE,
0, 0, buffer, 0x01, USBTMC_TIMEOUT);
if (rv < 0) {
dev_err(dev, "usb_control_msg returned %d\n", rv);
goto exit;
}
dev_dbg(dev, "INDICATOR_PULSE returned %x\n", buffer[0]);
if (buffer[0] != USBTMC_STATUS_SUCCESS) {
dev_err(dev, "INDICATOR_PULSE returned %x\n", buffer[0]);
rv = -EPERM;
goto exit;
}
rv = 0;
exit:
kfree(buffer);
return rv;
}
static long usbtmc_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
{
struct usbtmc_device_data *data;
int retval = -EBADRQC;
data = file->private_data;
mutex_lock(&data->io_mutex);
if (data->zombie) {
retval = -ENODEV;
goto skip_io_on_zombie;
}
switch (cmd) {
case USBTMC_IOCTL_CLEAR_OUT_HALT:
retval = usbtmc_ioctl_clear_out_halt(data);
break;
case USBTMC_IOCTL_CLEAR_IN_HALT:
retval = usbtmc_ioctl_clear_in_halt(data);
break;
case USBTMC_IOCTL_INDICATOR_PULSE:
retval = usbtmc_ioctl_indicator_pulse(data);
break;
case USBTMC_IOCTL_CLEAR:
retval = usbtmc_ioctl_clear(data);
break;
case USBTMC_IOCTL_ABORT_BULK_OUT:
retval = usbtmc_ioctl_abort_bulk_out(data);
break;
case USBTMC_IOCTL_ABORT_BULK_IN:
retval = usbtmc_ioctl_abort_bulk_in(data);
break;
}
skip_io_on_zombie:
mutex_unlock(&data->io_mutex);
return retval;
}
static const struct file_operations fops = {
.owner = THIS_MODULE,
.read = usbtmc_read,
.write = usbtmc_write,
.open = usbtmc_open,
.release = usbtmc_release,
.unlocked_ioctl = usbtmc_ioctl,
.llseek = default_llseek,
};
static struct usb_class_driver usbtmc_class = {
.name = "usbtmc%d",
.fops = &fops,
.minor_base = USBTMC_MINOR_BASE,
};
static int usbtmc_probe(struct usb_interface *intf,
const struct usb_device_id *id)
{
struct usbtmc_device_data *data;
struct usb_host_interface *iface_desc;
struct usb_endpoint_descriptor *endpoint;
int n;
int retcode;
dev_dbg(&intf->dev, "%s called\n", __func__);
data = kmalloc(sizeof(struct usbtmc_device_data), GFP_KERNEL);
if (!data) {
dev_err(&intf->dev, "Unable to allocate kernel memory\n");
return -ENOMEM;
}
data->intf = intf;
data->id = id;
data->usb_dev = usb_get_dev(interface_to_usbdev(intf));
usb_set_intfdata(intf, data);
kref_init(&data->kref);
mutex_init(&data->io_mutex);
data->zombie = 0;
/* Initialize USBTMC bTag and other fields */
data->bTag = 1;
data->TermCharEnabled = 0;
data->TermChar = '\n';
/* USBTMC devices have only one setting, so use that */
iface_desc = data->intf->cur_altsetting;
/* Find bulk in endpoint */
for (n = 0; n < iface_desc->desc.bNumEndpoints; n++) {
endpoint = &iface_desc->endpoint[n].desc;
if (usb_endpoint_is_bulk_in(endpoint)) {
data->bulk_in = endpoint->bEndpointAddress;
dev_dbg(&intf->dev, "Found bulk in endpoint at %u\n",
data->bulk_in);
break;
}
}
/* Find bulk out endpoint */
for (n = 0; n < iface_desc->desc.bNumEndpoints; n++) {
endpoint = &iface_desc->endpoint[n].desc;
if (usb_endpoint_is_bulk_out(endpoint)) {
data->bulk_out = endpoint->bEndpointAddress;
dev_dbg(&intf->dev, "Found Bulk out endpoint at %u\n",
data->bulk_out);
break;
}
}
retcode = get_capabilities(data);
if (retcode)
dev_err(&intf->dev, "can't read capabilities\n");
else
retcode = sysfs_create_group(&intf->dev.kobj,
&capability_attr_grp);
retcode = sysfs_create_group(&intf->dev.kobj, &data_attr_grp);
retcode = usb_register_dev(intf, &usbtmc_class);
if (retcode) {
dev_err(&intf->dev, "Not able to get a minor"
" (base %u, slice default): %d\n", USBTMC_MINOR_BASE,
retcode);
goto error_register;
}
dev_dbg(&intf->dev, "Using minor number %d\n", intf->minor);
return 0;
error_register:
sysfs_remove_group(&intf->dev.kobj, &capability_attr_grp);
sysfs_remove_group(&intf->dev.kobj, &data_attr_grp);
kref_put(&data->kref, usbtmc_delete);
return retcode;
}
static void usbtmc_disconnect(struct usb_interface *intf)
{
struct usbtmc_device_data *data;
dev_dbg(&intf->dev, "usbtmc_disconnect called\n");
data = usb_get_intfdata(intf);
usb_deregister_dev(intf, &usbtmc_class);
sysfs_remove_group(&intf->dev.kobj, &capability_attr_grp);
sysfs_remove_group(&intf->dev.kobj, &data_attr_grp);
mutex_lock(&data->io_mutex);
data->zombie = 1;
mutex_unlock(&data->io_mutex);
kref_put(&data->kref, usbtmc_delete);
}
static int usbtmc_suspend(struct usb_interface *intf, pm_message_t message)
{
/* this driver does not have pending URBs */
return 0;
}
static int usbtmc_resume(struct usb_interface *intf)
{
return 0;
}
static struct usb_driver usbtmc_driver = {
.name = "usbtmc",
.id_table = usbtmc_devices,
.probe = usbtmc_probe,
.disconnect = usbtmc_disconnect,
.suspend = usbtmc_suspend,
.resume = usbtmc_resume,
};
static int __init usbtmc_init(void)
{
int retcode;
retcode = usb_register(&usbtmc_driver);
if (retcode)
printk(KERN_ERR KBUILD_MODNAME": Unable to register driver\n");
return retcode;
}
module_init(usbtmc_init);
static void __exit usbtmc_exit(void)
{
usb_deregister(&usbtmc_driver);
}
module_exit(usbtmc_exit);
MODULE_LICENSE("GPL");
| apache-2.0 |
geminy/aidear | oss/linux/linux-4.7/net/batman-adv/hash.h | 4785 | /* Copyright (C) 2006-2016 B.A.T.M.A.N. contributors:
*
* Simon Wunderlich, Marek Lindner
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of version 2 of the GNU General Public
* License as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _NET_BATMAN_ADV_HASH_H_
#define _NET_BATMAN_ADV_HASH_H_
#include "main.h"
#include <linux/compiler.h>
#include <linux/list.h>
#include <linux/rculist.h>
#include <linux/spinlock.h>
#include <linux/stddef.h>
#include <linux/types.h>
struct lock_class_key;
/* callback to a compare function. should compare 2 element datas for their
* keys
*
* Return: true if same and false if not same
*/
typedef bool (*batadv_hashdata_compare_cb)(const struct hlist_node *,
const void *);
/* the hashfunction
*
* Return: an index based on the key in the data of the first argument and the
* size the second
*/
typedef u32 (*batadv_hashdata_choose_cb)(const void *, u32);
typedef void (*batadv_hashdata_free_cb)(struct hlist_node *, void *);
struct batadv_hashtable {
struct hlist_head *table; /* the hashtable itself with the buckets */
spinlock_t *list_locks; /* spinlock for each hash list entry */
u32 size; /* size of hashtable */
};
/* allocates and clears the hash */
struct batadv_hashtable *batadv_hash_new(u32 size);
/* set class key for all locks */
void batadv_hash_set_lock_class(struct batadv_hashtable *hash,
struct lock_class_key *key);
/* free only the hashtable and the hash itself. */
void batadv_hash_destroy(struct batadv_hashtable *hash);
/* remove the hash structure. if hashdata_free_cb != NULL, this function will be
* called to remove the elements inside of the hash. if you don't remove the
* elements, memory might be leaked.
*/
static inline void batadv_hash_delete(struct batadv_hashtable *hash,
batadv_hashdata_free_cb free_cb,
void *arg)
{
struct hlist_head *head;
struct hlist_node *node, *node_tmp;
spinlock_t *list_lock; /* spinlock to protect write access */
u32 i;
for (i = 0; i < hash->size; i++) {
head = &hash->table[i];
list_lock = &hash->list_locks[i];
spin_lock_bh(list_lock);
hlist_for_each_safe(node, node_tmp, head) {
hlist_del_rcu(node);
if (free_cb)
free_cb(node, arg);
}
spin_unlock_bh(list_lock);
}
batadv_hash_destroy(hash);
}
/**
* batadv_hash_add - adds data to the hashtable
* @hash: storage hash table
* @compare: callback to determine if 2 hash elements are identical
* @choose: callback calculating the hash index
* @data: data passed to the aforementioned callbacks as argument
* @data_node: to be added element
*
* Return: 0 on success, 1 if the element already is in the hash
* and -1 on error.
*/
static inline int batadv_hash_add(struct batadv_hashtable *hash,
batadv_hashdata_compare_cb compare,
batadv_hashdata_choose_cb choose,
const void *data,
struct hlist_node *data_node)
{
u32 index;
int ret = -1;
struct hlist_head *head;
struct hlist_node *node;
spinlock_t *list_lock; /* spinlock to protect write access */
if (!hash)
goto out;
index = choose(data, hash->size);
head = &hash->table[index];
list_lock = &hash->list_locks[index];
spin_lock_bh(list_lock);
hlist_for_each(node, head) {
if (!compare(node, data))
continue;
ret = 1;
goto unlock;
}
/* no duplicate found in list, add new element */
hlist_add_head_rcu(data_node, head);
ret = 0;
unlock:
spin_unlock_bh(list_lock);
out:
return ret;
}
/* removes data from hash, if found. data could be the structure you use with
* just the key filled, we just need the key for comparing.
*
* Return: returns pointer do data on success, so you can remove the used
* structure yourself, or NULL on error
*/
static inline void *batadv_hash_remove(struct batadv_hashtable *hash,
batadv_hashdata_compare_cb compare,
batadv_hashdata_choose_cb choose,
void *data)
{
u32 index;
struct hlist_node *node;
struct hlist_head *head;
void *data_save = NULL;
index = choose(data, hash->size);
head = &hash->table[index];
spin_lock_bh(&hash->list_locks[index]);
hlist_for_each(node, head) {
if (!compare(node, data))
continue;
data_save = node;
hlist_del_rcu(node);
break;
}
spin_unlock_bh(&hash->list_locks[index]);
return data_save;
}
#endif /* _NET_BATMAN_ADV_HASH_H_ */
| gpl-3.0 |
ChrisChenSZ/code | 表单注册验证/node_modules/kareem/test/pre.test.js | 5771 | var assert = require('assert');
var Kareem = require('../');
describe('execPre', function() {
var hooks;
beforeEach(function() {
hooks = new Kareem();
});
it('handles errors with multiple pres', function(done) {
var execed = {};
hooks.pre('cook', function(done) {
execed.first = true;
done();
});
hooks.pre('cook', function(done) {
execed.second = true;
done('error!');
});
hooks.pre('cook', function(done) {
execed.third = true;
done();
});
hooks.execPre('cook', null, function(err) {
assert.equal('error!', err);
assert.equal(2, Object.keys(execed).length);
assert.ok(execed.first);
assert.ok(execed.second);
done();
});
});
it('handles async errors', function(done) {
var execed = {};
hooks.pre('cook', true, function(next, done) {
execed.first = true;
setTimeout(
function() {
done('error!');
},
5);
next();
});
hooks.pre('cook', true, function(next, done) {
execed.second = true;
setTimeout(
function() {
done('other error!');
},
10);
next();
});
hooks.execPre('cook', null, function(err) {
assert.equal('error!', err);
assert.equal(2, Object.keys(execed).length);
assert.ok(execed.first);
assert.ok(execed.second);
done();
});
});
it('handles async errors in next()', function(done) {
var execed = {};
hooks.pre('cook', true, function(next, done) {
execed.first = true;
setTimeout(
function() {
done('other error!');
},
15);
next();
});
hooks.pre('cook', true, function(next, done) {
execed.second = true;
setTimeout(
function() {
next('error!');
done('another error!');
},
5);
});
hooks.execPre('cook', null, function(err) {
assert.equal('error!', err);
assert.equal(2, Object.keys(execed).length);
assert.ok(execed.first);
assert.ok(execed.second);
done();
});
});
it('handles async errors in next() when already done', function(done) {
var execed = {};
hooks.pre('cook', true, function(next, done) {
execed.first = true;
setTimeout(
function() {
done('other error!');
},
5);
next();
});
hooks.pre('cook', true, function(next, done) {
execed.second = true;
setTimeout(
function() {
next('error!');
done('another error!');
},
25);
});
hooks.execPre('cook', null, function(err) {
assert.equal('other error!', err);
assert.equal(2, Object.keys(execed).length);
assert.ok(execed.first);
assert.ok(execed.second);
done();
});
});
it('async pres with clone()', function(done) {
var execed = false;
hooks.pre('cook', true, function(next, done) {
execed = true;
setTimeout(
function() {
done();
},
5);
next();
});
hooks.clone().execPre('cook', null, function(err) {
assert.ifError(err);
assert.ok(execed);
done();
});
});
it('returns correct error when async pre errors', function(done) {
var execed = {};
hooks.pre('cook', true, function(next, done) {
execed.first = true;
setTimeout(
function() {
done('other error!');
},
5);
next();
});
hooks.pre('cook', function(next) {
execed.second = true;
setTimeout(
function() {
next('error!');
},
15);
});
hooks.execPre('cook', null, function(err) {
assert.equal('other error!', err);
assert.equal(2, Object.keys(execed).length);
assert.ok(execed.first);
assert.ok(execed.second);
done();
});
});
it('lets async pres run when fully sync pres are done', function(done) {
var execed = {};
hooks.pre('cook', true, function(next, done) {
execed.first = true;
setTimeout(
function() {
done();
},
5);
next();
});
hooks.pre('cook', function() {
execed.second = true;
});
hooks.execPre('cook', null, function(err) {
assert.ifError(err);
assert.equal(2, Object.keys(execed).length);
assert.ok(execed.first);
assert.ok(execed.second);
done();
});
});
it('allows passing arguments to the next pre', function(done) {
var execed = {};
hooks.pre('cook', function(next) {
execed.first = true;
next(null, 'test');
});
hooks.pre('cook', function(next, p) {
execed.second = true;
assert.equal(p, 'test');
next();
});
hooks.pre('cook', function(next, p) {
execed.third = true;
assert.ok(!p);
next();
});
hooks.execPre('cook', null, function(err) {
assert.ifError(err);
assert.equal(3, Object.keys(execed).length);
assert.ok(execed.first);
assert.ok(execed.second);
assert.ok(execed.third);
done();
});
});
});
describe('execPreSync', function() {
var hooks;
beforeEach(function() {
hooks = new Kareem();
});
it('executes hooks synchronously', function() {
var execed = {};
hooks.pre('cook', function() {
execed.first = true;
});
hooks.pre('cook', function() {
execed.second = true;
});
hooks.execPreSync('cook', null);
assert.ok(execed.first);
assert.ok(execed.second);
});
it('works with no hooks specified', function() {
assert.doesNotThrow(function() {
hooks.execPreSync('cook', null);
});
});
});
| apache-2.0 |
sspeiche/origin | vendor/k8s.io/kubernetes/federation/cmd/federation-controller-manager/controller-manager.go | 1328 | /*
Copyright 2014 The Kubernetes Authors.
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
package main
import (
"fmt"
"os"
"github.com/spf13/pflag"
"k8s.io/apiserver/pkg/server/healthz"
"k8s.io/apiserver/pkg/util/flag"
"k8s.io/apiserver/pkg/util/logs"
"k8s.io/kubernetes/federation/cmd/federation-controller-manager/app"
"k8s.io/kubernetes/federation/cmd/federation-controller-manager/app/options"
_ "k8s.io/kubernetes/pkg/util/workqueue/prometheus" // for workqueue metric registration
"k8s.io/kubernetes/pkg/version/verflag"
)
func init() {
healthz.DefaultHealthz()
}
func main() {
s := options.NewCMServer()
s.AddFlags(pflag.CommandLine)
flag.InitFlags()
logs.InitLogs()
defer logs.FlushLogs()
verflag.PrintAndExitIfRequested()
if err := app.Run(s); err != nil {
fmt.Fprintf(os.Stderr, "%v\n", err)
os.Exit(1)
}
}
| apache-2.0 |
mericon/Xp_Kernel_LGH850 | virt/arch/mips/math-emu/ieee754int.h | 3668 | /*
* IEEE754 floating point
* common internal header file
*/
/*
* MIPS floating point support
* Copyright (C) 1994-2000 Algorithmics Ltd.
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
*/
#ifndef __IEEE754INT_H
#define __IEEE754INT_H
#include "ieee754.h"
#define CLPAIR(x, y) ((x)*6+(y))
static inline void ieee754_clearcx(void)
{
ieee754_csr.cx = 0;
}
static inline void ieee754_setcx(const unsigned int flags)
{
ieee754_csr.cx |= flags;
ieee754_csr.sx |= flags;
}
static inline int ieee754_setandtestcx(const unsigned int x)
{
ieee754_setcx(x);
return ieee754_csr.mx & x;
}
#define COMPXSP \
unsigned xm; int xe; int xs __maybe_unused; int xc
#define COMPYSP \
unsigned ym; int ye; int ys; int yc
#define EXPLODESP(v, vc, vs, ve, vm) \
{ \
vs = SPSIGN(v); \
ve = SPBEXP(v); \
vm = SPMANT(v); \
if (ve == SP_EMAX+1+SP_EBIAS) { \
if (vm == 0) \
vc = IEEE754_CLASS_INF; \
else if (vm & SP_MBIT(SP_FBITS-1)) \
vc = IEEE754_CLASS_SNAN; \
else \
vc = IEEE754_CLASS_QNAN; \
} else if (ve == SP_EMIN-1+SP_EBIAS) { \
if (vm) { \
ve = SP_EMIN; \
vc = IEEE754_CLASS_DNORM; \
} else \
vc = IEEE754_CLASS_ZERO; \
} else { \
ve -= SP_EBIAS; \
vm |= SP_HIDDEN_BIT; \
vc = IEEE754_CLASS_NORM; \
} \
}
#define EXPLODEXSP EXPLODESP(x, xc, xs, xe, xm)
#define EXPLODEYSP EXPLODESP(y, yc, ys, ye, ym)
#define COMPXDP \
u64 xm; int xe; int xs __maybe_unused; int xc
#define COMPYDP \
u64 ym; int ye; int ys; int yc
#define EXPLODEDP(v, vc, vs, ve, vm) \
{ \
vm = DPMANT(v); \
vs = DPSIGN(v); \
ve = DPBEXP(v); \
if (ve == DP_EMAX+1+DP_EBIAS) { \
if (vm == 0) \
vc = IEEE754_CLASS_INF; \
else if (vm & DP_MBIT(DP_FBITS-1)) \
vc = IEEE754_CLASS_SNAN; \
else \
vc = IEEE754_CLASS_QNAN; \
} else if (ve == DP_EMIN-1+DP_EBIAS) { \
if (vm) { \
ve = DP_EMIN; \
vc = IEEE754_CLASS_DNORM; \
} else \
vc = IEEE754_CLASS_ZERO; \
} else { \
ve -= DP_EBIAS; \
vm |= DP_HIDDEN_BIT; \
vc = IEEE754_CLASS_NORM; \
} \
}
#define EXPLODEXDP EXPLODEDP(x, xc, xs, xe, xm)
#define EXPLODEYDP EXPLODEDP(y, yc, ys, ye, ym)
#define FLUSHDP(v, vc, vs, ve, vm) \
if (vc==IEEE754_CLASS_DNORM) { \
if (ieee754_csr.nod) { \
ieee754_setcx(IEEE754_INEXACT); \
vc = IEEE754_CLASS_ZERO; \
ve = DP_EMIN-1+DP_EBIAS; \
vm = 0; \
v = ieee754dp_zero(vs); \
} \
}
#define FLUSHSP(v, vc, vs, ve, vm) \
if (vc==IEEE754_CLASS_DNORM) { \
if (ieee754_csr.nod) { \
ieee754_setcx(IEEE754_INEXACT); \
vc = IEEE754_CLASS_ZERO; \
ve = SP_EMIN-1+SP_EBIAS; \
vm = 0; \
v = ieee754sp_zero(vs); \
} \
}
#define FLUSHXDP FLUSHDP(x, xc, xs, xe, xm)
#define FLUSHYDP FLUSHDP(y, yc, ys, ye, ym)
#define FLUSHXSP FLUSHSP(x, xc, xs, xe, xm)
#define FLUSHYSP FLUSHSP(y, yc, ys, ye, ym)
#endif /* __IEEE754INT_H */
| gpl-2.0 |
chaojin/openwrt | package/kernel/spi-gpio-custom/src/spi-gpio-custom.c | 9295 | /*
* Custom GPIO-based SPI driver
*
* Copyright (C) 2013 Marco Burato <[email protected]>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Based on i2c-gpio-custom by:
* Copyright (C) 2007-2008 Gabor Juhos <[email protected]>
* ---------------------------------------------------------------------------
*
* The behaviour of this driver can be altered by setting some parameters
* from the insmod command line.
*
* The following parameters are adjustable:
*
* bus0 These four arguments can be arrays of
* bus1 1-8 unsigned integers as follows:
* bus2
* bus3 <id>,<sck>,<mosi>,<miso>,<mode1>,<maxfreq1>,<cs1>,...
*
* where:
*
* <id> ID to used as device_id for the corresponding bus (required)
* <sck> GPIO pin ID to be used for bus SCK (required)
* <mosi> GPIO pin ID to be used for bus MOSI (required*)
* <miso> GPIO pin ID to be used for bus MISO (required*)
* <modeX> Mode configuration for slave X in the bus (required)
* (see /include/linux/spi/spi.h)
* <maxfreqX> Maximum clock frequency in Hz for slave X in the bus (required)
* <csX> GPIO pin ID to be used for slave X CS (required**)
*
* Notes:
* * If a signal is not used (for example there is no MISO) you need
* to set the GPIO pin ID for that signal to an invalid value.
* ** If you only have 1 slave in the bus with no CS, you can omit the
* <cs1> param or set it to an invalid GPIO id to disable it. When
* you have 2 or more slaves, they must all have a valid CS.
*
* If this driver is built into the kernel, you can use the following kernel
* command line parameters, with the same values as the corresponding module
* parameters listed above:
*
* spi-gpio-custom.bus0
* spi-gpio-custom.bus1
* spi-gpio-custom.bus2
* spi-gpio-custom.bus3
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi_gpio.h>
#define DRV_NAME "spi-gpio-custom"
#define DRV_DESC "Custom GPIO-based SPI driver"
#define DRV_VERSION "0.1"
#define PFX DRV_NAME ": "
#define BUS_PARAM_ID 0
#define BUS_PARAM_SCK 1
#define BUS_PARAM_MOSI 2
#define BUS_PARAM_MISO 3
#define BUS_PARAM_MODE1 4
#define BUS_PARAM_MAXFREQ1 5
#define BUS_PARAM_CS1 6
#define BUS_SLAVE_COUNT_MAX 8
#define BUS_PARAM_REQUIRED 6
#define BUS_PARAM_PER_SLAVE 3
#define BUS_PARAM_COUNT (4+BUS_PARAM_PER_SLAVE*BUS_SLAVE_COUNT_MAX)
#define BUS_COUNT_MAX 4
static unsigned int bus0[BUS_PARAM_COUNT] __initdata;
static unsigned int bus1[BUS_PARAM_COUNT] __initdata;
static unsigned int bus2[BUS_PARAM_COUNT] __initdata;
static unsigned int bus3[BUS_PARAM_COUNT] __initdata;
static unsigned int bus_nump[BUS_COUNT_MAX] __initdata;
#define BUS_PARM_DESC \
" config -> id,sck,mosi,miso,mode1,maxfreq1[,cs1,mode2,maxfreq2,cs2,...]"
module_param_array(bus0, uint, &bus_nump[0], 0);
MODULE_PARM_DESC(bus0, "bus0" BUS_PARM_DESC);
module_param_array(bus1, uint, &bus_nump[1], 0);
MODULE_PARM_DESC(bus1, "bus1" BUS_PARM_DESC);
module_param_array(bus2, uint, &bus_nump[2], 0);
MODULE_PARM_DESC(bus2, "bus2" BUS_PARM_DESC);
module_param_array(bus3, uint, &bus_nump[3], 0);
MODULE_PARM_DESC(bus3, "bus3" BUS_PARM_DESC);
static struct platform_device *devices[BUS_COUNT_MAX];
static unsigned int nr_devices;
static void spi_gpio_custom_cleanup(void)
{
int i;
for (i = 0; i < nr_devices; i++)
if (devices[i])
platform_device_unregister(devices[i]);
}
static int __init spi_gpio_custom_get_slave_mode(unsigned int id,
unsigned int *params,
int slave_index)
{
int param_index;
param_index = BUS_PARAM_MODE1+slave_index*BUS_PARAM_PER_SLAVE;
if (param_index >= bus_nump[id])
return -1;
return params[param_index];
}
static int __init spi_gpio_custom_get_slave_maxfreq(unsigned int id,
unsigned int *params,
int slave_index)
{
int param_index;
param_index = BUS_PARAM_MAXFREQ1+slave_index*BUS_PARAM_PER_SLAVE;
if (param_index >= bus_nump[id])
return -1;
return params[param_index];
}
static int __init spi_gpio_custom_get_slave_cs(unsigned int id,
unsigned int *params,
int slave_index)
{
int param_index;
param_index = BUS_PARAM_CS1+slave_index*BUS_PARAM_PER_SLAVE;
if (param_index >= bus_nump[id])
return -1;
if (!gpio_is_valid(params[param_index]))
return -1;
return params[param_index];
}
static int __init spi_gpio_custom_check_params(unsigned int id, unsigned int *params)
{
int i;
struct spi_master *master;
if (bus_nump[id] < BUS_PARAM_REQUIRED) {
printk(KERN_ERR PFX "not enough values for parameter bus%d\n",
id);
return -EINVAL;
}
if (bus_nump[id] > (1+BUS_PARAM_CS1)) {
/* more than 1 device: check CS GPIOs */
for (i = 0; i < BUS_SLAVE_COUNT_MAX; i++) {
/* no more slaves? */
if (spi_gpio_custom_get_slave_mode(id, params, i) < 0)
break;
if (spi_gpio_custom_get_slave_cs(id, params, i) < 0) {
printk(KERN_ERR PFX "invalid/missing CS gpio for slave %d on bus %d\n",
i, params[BUS_PARAM_ID]);
return -EINVAL;
}
}
}
if (!gpio_is_valid(params[BUS_PARAM_SCK])) {
printk(KERN_ERR PFX "invalid SCK gpio for bus %d\n",
params[BUS_PARAM_ID]);
return -EINVAL;
}
master = spi_busnum_to_master(params[BUS_PARAM_ID]);
if (master) {
spi_master_put(master);
printk(KERN_ERR PFX "bus %d already exists\n",
params[BUS_PARAM_ID]);
return -EEXIST;
}
return 0;
}
static int __init spi_gpio_custom_add_one(unsigned int id, unsigned int *params)
{
struct platform_device *pdev;
struct spi_gpio_platform_data pdata;
int i;
int num_cs;
int err;
struct spi_master *master;
struct spi_device *slave;
struct spi_board_info slave_info;
int mode, maxfreq, cs;
if (!bus_nump[id])
return 0;
err = spi_gpio_custom_check_params(id, params);
if (err)
goto err;
/* Create BUS device node */
pdev = platform_device_alloc("spi_gpio", params[BUS_PARAM_ID]);
if (!pdev) {
err = -ENOMEM;
goto err;
}
num_cs = 0;
for (i = 0; i < BUS_SLAVE_COUNT_MAX; i++) {
/* no more slaves? */
if (spi_gpio_custom_get_slave_mode(id, params, i) < 0)
break;
if (spi_gpio_custom_get_slave_cs(id, params, i) >= 0)
num_cs++;
}
if (num_cs == 0) {
/*
* Even if no CS is used, spi modules expect
* at least 1 (unused)
*/
num_cs = 1;
}
pdata.sck = params[BUS_PARAM_SCK];
pdata.mosi = gpio_is_valid(params[BUS_PARAM_MOSI])
? params[BUS_PARAM_MOSI]
: SPI_GPIO_NO_MOSI;
pdata.miso = gpio_is_valid(params[BUS_PARAM_MISO])
? params[BUS_PARAM_MISO]
: SPI_GPIO_NO_MISO;
pdata.num_chipselect = num_cs;
err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
if (err) {
platform_device_put(pdev);
goto err;
}
err = platform_device_add(pdev);
if (err) {
printk(KERN_ERR PFX "platform_device_add failed with return code %d\n",
err);
platform_device_put(pdev);
goto err;
}
/* Register SLAVE devices */
for (i = 0; i < BUS_SLAVE_COUNT_MAX; i++) {
mode = spi_gpio_custom_get_slave_mode(id, params, i);
maxfreq = spi_gpio_custom_get_slave_maxfreq(id, params, i);
cs = spi_gpio_custom_get_slave_cs(id, params, i);
/* no more slaves? */
if (mode < 0)
break;
memset(&slave_info, 0, sizeof(slave_info));
strcpy(slave_info.modalias, "spidev");
slave_info.controller_data = (void *)((cs >= 0)
? cs
: SPI_GPIO_NO_CHIPSELECT);
slave_info.max_speed_hz = maxfreq;
slave_info.bus_num = params[BUS_PARAM_ID];
slave_info.chip_select = i;
slave_info.mode = mode;
master = spi_busnum_to_master(params[BUS_PARAM_ID]);
if (!master) {
printk(KERN_ERR PFX "unable to get master for bus %d\n",
params[BUS_PARAM_ID]);
err = -EINVAL;
goto err_unregister;
}
slave = spi_new_device(master, &slave_info);
spi_master_put(master);
if (!slave) {
printk(KERN_ERR PFX "unable to create slave %d for bus %d\n",
i, params[BUS_PARAM_ID]);
/* Will most likely fail due to unsupported mode bits */
err = -EINVAL;
goto err_unregister;
}
}
devices[nr_devices++] = pdev;
return 0;
err_unregister:
platform_device_unregister(pdev);
err:
return err;
}
static int __init spi_gpio_custom_probe(void)
{
int err;
printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n");
err = spi_gpio_custom_add_one(0, bus0);
if (err)
goto err;
err = spi_gpio_custom_add_one(1, bus1);
if (err)
goto err;
err = spi_gpio_custom_add_one(2, bus2);
if (err)
goto err;
err = spi_gpio_custom_add_one(3, bus3);
if (err)
goto err;
if (!nr_devices) {
printk(KERN_ERR PFX "no bus parameter(s) specified\n");
err = -ENODEV;
goto err;
}
return 0;
err:
spi_gpio_custom_cleanup();
return err;
}
#ifdef MODULE
static int __init spi_gpio_custom_init(void)
{
return spi_gpio_custom_probe();
}
module_init(spi_gpio_custom_init);
static void __exit spi_gpio_custom_exit(void)
{
spi_gpio_custom_cleanup();
}
module_exit(spi_gpio_custom_exit);
#else
subsys_initcall(spi_gpio_custom_probe);
#endif /* MODULE*/
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Marco Burato <[email protected]>");
MODULE_DESCRIPTION(DRV_DESC);
MODULE_VERSION(DRV_VERSION);
| gpl-2.0 |
KOala888/GB_kernel | linux_kernel_galaxyplayer-master/drivers/uwb/whc-rc.c | 13514 | /*
* Wireless Host Controller: Radio Control Interface (WHCI v0.95[2.3])
* Radio Control command/event transport to the UWB stack
*
* Copyright (C) 2005-2006 Intel Corporation
* Inaky Perez-Gonzalez <[email protected]>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License version
* 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
* 02110-1301, USA.
*
*
* Initialize and hook up the Radio Control interface.
*
* For each device probed, creates an 'struct whcrc' which contains
* just the representation of the UWB Radio Controller, and the logic
* for reading notifications and passing them to the UWB Core.
*
* So we initialize all of those, register the UWB Radio Controller
* and setup the notification/event handle to pipe the notifications
* to the UWB management Daemon.
*
* Once uwb_rc_add() is called, the UWB stack takes control, resets
* the radio and readies the device to take commands the UWB
* API/user-space.
*
* Note this driver is just a transport driver; the commands are
* formed at the UWB stack and given to this driver who will deliver
* them to the hw and transfer the replies/notifications back to the
* UWB stack through the UWB daemon (UWBD).
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/sched.h>
#include <linux/dma-mapping.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
#include <linux/workqueue.h>
#include <linux/uwb.h>
#include <linux/uwb/whci.h>
#include <linux/uwb/umc.h>
#include "uwb-internal.h"
/**
* Descriptor for an instance of the UWB Radio Control Driver that
* attaches to the URC interface of the WHCI PCI card.
*
* Unless there is a lock specific to the 'data members', all access
* is protected by uwb_rc->mutex.
*/
struct whcrc {
struct umc_dev *umc_dev;
struct uwb_rc *uwb_rc; /* UWB host controller */
unsigned long area;
void __iomem *rc_base;
size_t rc_len;
spinlock_t irq_lock;
void *evt_buf, *cmd_buf;
dma_addr_t evt_dma_buf, cmd_dma_buf;
wait_queue_head_t cmd_wq;
struct work_struct event_work;
};
/**
* Execute an UWB RC command on WHCI/RC
*
* @rc: Instance of a Radio Controller that is a whcrc
* @cmd: Buffer containing the RCCB and payload to execute
* @cmd_size: Size of the command buffer.
*
* We copy the command into whcrc->cmd_buf (as it is pretty and
* aligned`and physically contiguous) and then press the right keys in
* the controller's URCCMD register to get it to read it. We might
* have to wait for the cmd_sem to be open to us.
*
* NOTE: rc's mutex has to be locked
*/
static int whcrc_cmd(struct uwb_rc *uwb_rc,
const struct uwb_rccb *cmd, size_t cmd_size)
{
int result = 0;
struct whcrc *whcrc = uwb_rc->priv;
struct device *dev = &whcrc->umc_dev->dev;
u32 urccmd;
if (cmd_size >= 4096)
return -EINVAL;
/*
* If the URC is halted, then the hardware has reset itself.
* Attempt to recover by restarting the device and then return
* an error as it's likely that the current command isn't
* valid for a newly started RC.
*/
if (le_readl(whcrc->rc_base + URCSTS) & URCSTS_HALTED) {
dev_err(dev, "requesting reset of halted radio controller\n");
uwb_rc_reset_all(uwb_rc);
return -EIO;
}
result = wait_event_timeout(whcrc->cmd_wq,
!(le_readl(whcrc->rc_base + URCCMD) & URCCMD_ACTIVE), HZ/2);
if (result == 0) {
dev_err(dev, "device is not ready to execute commands\n");
return -ETIMEDOUT;
}
memmove(whcrc->cmd_buf, cmd, cmd_size);
le_writeq(whcrc->cmd_dma_buf, whcrc->rc_base + URCCMDADDR);
spin_lock(&whcrc->irq_lock);
urccmd = le_readl(whcrc->rc_base + URCCMD);
urccmd &= ~(URCCMD_EARV | URCCMD_SIZE_MASK);
le_writel(urccmd | URCCMD_ACTIVE | URCCMD_IWR | cmd_size,
whcrc->rc_base + URCCMD);
spin_unlock(&whcrc->irq_lock);
return 0;
}
static int whcrc_reset(struct uwb_rc *rc)
{
struct whcrc *whcrc = rc->priv;
return umc_controller_reset(whcrc->umc_dev);
}
/**
* Reset event reception mechanism and tell hw we are ready to get more
*
* We have read all the events in the event buffer, so we are ready to
* reset it to the beginning.
*
* This is only called during initialization or after an event buffer
* has been retired. This means we can be sure that event processing
* is disabled and it's safe to update the URCEVTADDR register.
*
* There's no need to wait for the event processing to start as the
* URC will not clear URCCMD_ACTIVE until (internal) event buffer
* space is available.
*/
static
void whcrc_enable_events(struct whcrc *whcrc)
{
u32 urccmd;
le_writeq(whcrc->evt_dma_buf, whcrc->rc_base + URCEVTADDR);
spin_lock(&whcrc->irq_lock);
urccmd = le_readl(whcrc->rc_base + URCCMD) & ~URCCMD_ACTIVE;
le_writel(urccmd | URCCMD_EARV, whcrc->rc_base + URCCMD);
spin_unlock(&whcrc->irq_lock);
}
static void whcrc_event_work(struct work_struct *work)
{
struct whcrc *whcrc = container_of(work, struct whcrc, event_work);
size_t size;
u64 urcevtaddr;
urcevtaddr = le_readq(whcrc->rc_base + URCEVTADDR);
size = urcevtaddr & URCEVTADDR_OFFSET_MASK;
uwb_rc_neh_grok(whcrc->uwb_rc, whcrc->evt_buf, size);
whcrc_enable_events(whcrc);
}
/**
* Catch interrupts?
*
* We ack inmediately (and expect the hw to do the right thing and
* raise another IRQ if things have changed :)
*/
static
irqreturn_t whcrc_irq_cb(int irq, void *_whcrc)
{
struct whcrc *whcrc = _whcrc;
struct device *dev = &whcrc->umc_dev->dev;
u32 urcsts;
urcsts = le_readl(whcrc->rc_base + URCSTS);
if (!(urcsts & URCSTS_INT_MASK))
return IRQ_NONE;
le_writel(urcsts & URCSTS_INT_MASK, whcrc->rc_base + URCSTS);
if (urcsts & URCSTS_HSE) {
dev_err(dev, "host system error -- hardware halted\n");
/* FIXME: do something sensible here */
goto out;
}
if (urcsts & URCSTS_ER)
schedule_work(&whcrc->event_work);
if (urcsts & URCSTS_RCI)
wake_up_all(&whcrc->cmd_wq);
out:
return IRQ_HANDLED;
}
/**
* Initialize a UMC RC interface: map regions, get (shared) IRQ
*/
static
int whcrc_setup_rc_umc(struct whcrc *whcrc)
{
int result = 0;
struct device *dev = &whcrc->umc_dev->dev;
struct umc_dev *umc_dev = whcrc->umc_dev;
whcrc->area = umc_dev->resource.start;
whcrc->rc_len = umc_dev->resource.end - umc_dev->resource.start + 1;
result = -EBUSY;
if (request_mem_region(whcrc->area, whcrc->rc_len, KBUILD_MODNAME) == NULL) {
dev_err(dev, "can't request URC region (%zu bytes @ 0x%lx): %d\n",
whcrc->rc_len, whcrc->area, result);
goto error_request_region;
}
whcrc->rc_base = ioremap_nocache(whcrc->area, whcrc->rc_len);
if (whcrc->rc_base == NULL) {
dev_err(dev, "can't ioremap registers (%zu bytes @ 0x%lx): %d\n",
whcrc->rc_len, whcrc->area, result);
goto error_ioremap_nocache;
}
result = request_irq(umc_dev->irq, whcrc_irq_cb, IRQF_SHARED,
KBUILD_MODNAME, whcrc);
if (result < 0) {
dev_err(dev, "can't allocate IRQ %d: %d\n",
umc_dev->irq, result);
goto error_request_irq;
}
result = -ENOMEM;
whcrc->cmd_buf = dma_alloc_coherent(&umc_dev->dev, PAGE_SIZE,
&whcrc->cmd_dma_buf, GFP_KERNEL);
if (whcrc->cmd_buf == NULL) {
dev_err(dev, "Can't allocate cmd transfer buffer\n");
goto error_cmd_buffer;
}
whcrc->evt_buf = dma_alloc_coherent(&umc_dev->dev, PAGE_SIZE,
&whcrc->evt_dma_buf, GFP_KERNEL);
if (whcrc->evt_buf == NULL) {
dev_err(dev, "Can't allocate evt transfer buffer\n");
goto error_evt_buffer;
}
return 0;
error_evt_buffer:
dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->cmd_buf,
whcrc->cmd_dma_buf);
error_cmd_buffer:
free_irq(umc_dev->irq, whcrc);
error_request_irq:
iounmap(whcrc->rc_base);
error_ioremap_nocache:
release_mem_region(whcrc->area, whcrc->rc_len);
error_request_region:
return result;
}
/**
* Release RC's UMC resources
*/
static
void whcrc_release_rc_umc(struct whcrc *whcrc)
{
struct umc_dev *umc_dev = whcrc->umc_dev;
dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->evt_buf,
whcrc->evt_dma_buf);
dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->cmd_buf,
whcrc->cmd_dma_buf);
free_irq(umc_dev->irq, whcrc);
iounmap(whcrc->rc_base);
release_mem_region(whcrc->area, whcrc->rc_len);
}
/**
* whcrc_start_rc - start a WHCI radio controller
* @whcrc: the radio controller to start
*
* Reset the UMC device, start the radio controller, enable events and
* finally enable interrupts.
*/
static int whcrc_start_rc(struct uwb_rc *rc)
{
struct whcrc *whcrc = rc->priv;
struct device *dev = &whcrc->umc_dev->dev;
/* Reset the thing */
le_writel(URCCMD_RESET, whcrc->rc_base + URCCMD);
if (whci_wait_for(dev, whcrc->rc_base + URCCMD, URCCMD_RESET, 0,
5000, "hardware reset") < 0)
return -EBUSY;
/* Set the event buffer, start the controller (enable IRQs later) */
le_writel(0, whcrc->rc_base + URCINTR);
le_writel(URCCMD_RS, whcrc->rc_base + URCCMD);
if (whci_wait_for(dev, whcrc->rc_base + URCSTS, URCSTS_HALTED, 0,
5000, "radio controller start") < 0)
return -ETIMEDOUT;
whcrc_enable_events(whcrc);
le_writel(URCINTR_EN_ALL, whcrc->rc_base + URCINTR);
return 0;
}
/**
* whcrc_stop_rc - stop a WHCI radio controller
* @whcrc: the radio controller to stop
*
* Disable interrupts and cancel any pending event processing work
* before clearing the Run/Stop bit.
*/
static
void whcrc_stop_rc(struct uwb_rc *rc)
{
struct whcrc *whcrc = rc->priv;
struct umc_dev *umc_dev = whcrc->umc_dev;
le_writel(0, whcrc->rc_base + URCINTR);
cancel_work_sync(&whcrc->event_work);
le_writel(0, whcrc->rc_base + URCCMD);
whci_wait_for(&umc_dev->dev, whcrc->rc_base + URCSTS,
URCSTS_HALTED, URCSTS_HALTED, 100, "radio controller stop");
}
static void whcrc_init(struct whcrc *whcrc)
{
spin_lock_init(&whcrc->irq_lock);
init_waitqueue_head(&whcrc->cmd_wq);
INIT_WORK(&whcrc->event_work, whcrc_event_work);
}
/**
* Initialize the radio controller.
*
* NOTE: we setup whcrc->uwb_rc before calling uwb_rc_add(); in the
* IRQ handler we use that to determine if the hw is ready to
* handle events. Looks like a race condition, but it really is
* not.
*/
static
int whcrc_probe(struct umc_dev *umc_dev)
{
int result;
struct uwb_rc *uwb_rc;
struct whcrc *whcrc;
struct device *dev = &umc_dev->dev;
result = -ENOMEM;
uwb_rc = uwb_rc_alloc();
if (uwb_rc == NULL) {
dev_err(dev, "unable to allocate RC instance\n");
goto error_rc_alloc;
}
whcrc = kzalloc(sizeof(*whcrc), GFP_KERNEL);
if (whcrc == NULL) {
dev_err(dev, "unable to allocate WHC-RC instance\n");
goto error_alloc;
}
whcrc_init(whcrc);
whcrc->umc_dev = umc_dev;
result = whcrc_setup_rc_umc(whcrc);
if (result < 0) {
dev_err(dev, "Can't setup RC UMC interface: %d\n", result);
goto error_setup_rc_umc;
}
whcrc->uwb_rc = uwb_rc;
uwb_rc->owner = THIS_MODULE;
uwb_rc->cmd = whcrc_cmd;
uwb_rc->reset = whcrc_reset;
uwb_rc->start = whcrc_start_rc;
uwb_rc->stop = whcrc_stop_rc;
result = uwb_rc_add(uwb_rc, dev, whcrc);
if (result < 0)
goto error_rc_add;
umc_set_drvdata(umc_dev, whcrc);
return 0;
error_rc_add:
whcrc_release_rc_umc(whcrc);
error_setup_rc_umc:
kfree(whcrc);
error_alloc:
uwb_rc_put(uwb_rc);
error_rc_alloc:
return result;
}
/**
* Clean up the radio control resources
*
* When we up the command semaphore, everybody possibly held trying to
* execute a command should be granted entry and then they'll see the
* host is quiescing and up it (so it will chain to the next waiter).
* This should not happen (in any case), as we can only remove when
* there are no handles open...
*/
static void whcrc_remove(struct umc_dev *umc_dev)
{
struct whcrc *whcrc = umc_get_drvdata(umc_dev);
struct uwb_rc *uwb_rc = whcrc->uwb_rc;
umc_set_drvdata(umc_dev, NULL);
uwb_rc_rm(uwb_rc);
whcrc_release_rc_umc(whcrc);
kfree(whcrc);
uwb_rc_put(uwb_rc);
}
static int whcrc_pre_reset(struct umc_dev *umc)
{
struct whcrc *whcrc = umc_get_drvdata(umc);
struct uwb_rc *uwb_rc = whcrc->uwb_rc;
uwb_rc_pre_reset(uwb_rc);
return 0;
}
static int whcrc_post_reset(struct umc_dev *umc)
{
struct whcrc *whcrc = umc_get_drvdata(umc);
struct uwb_rc *uwb_rc = whcrc->uwb_rc;
return uwb_rc_post_reset(uwb_rc);
}
/* PCI device ID's that we handle [so it gets loaded] */
static struct pci_device_id whcrc_id_table[] = {
{ PCI_DEVICE_CLASS(PCI_CLASS_WIRELESS_WHCI, ~0) },
{ /* empty last entry */ }
};
MODULE_DEVICE_TABLE(pci, whcrc_id_table);
static struct umc_driver whcrc_driver = {
.name = "whc-rc",
.cap_id = UMC_CAP_ID_WHCI_RC,
.probe = whcrc_probe,
.remove = whcrc_remove,
.pre_reset = whcrc_pre_reset,
.post_reset = whcrc_post_reset,
};
static int __init whcrc_driver_init(void)
{
return umc_driver_register(&whcrc_driver);
}
module_init(whcrc_driver_init);
static void __exit whcrc_driver_exit(void)
{
umc_driver_unregister(&whcrc_driver);
}
module_exit(whcrc_driver_exit);
MODULE_AUTHOR("Inaky Perez-Gonzalez <[email protected]>");
MODULE_DESCRIPTION("Wireless Host Controller Radio Control Driver");
MODULE_LICENSE("GPL");
| gpl-2.0 |
mericon/Xp_Kernel_LGH850 | virt/drivers/irqchip/irq-zevio.c | 3398 | /*
* linux/drivers/irqchip/irq-zevio.c
*
* Copyright (C) 2013 Daniel Tang <[email protected]>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2, as
* published by the Free Software Foundation.
*
*/
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <asm/mach/irq.h>
#include <asm/exception.h>
#include "irqchip.h"
#define IO_STATUS 0x000
#define IO_RAW_STATUS 0x004
#define IO_ENABLE 0x008
#define IO_DISABLE 0x00C
#define IO_CURRENT 0x020
#define IO_RESET 0x028
#define IO_MAX_PRIOTY 0x02C
#define IO_IRQ_BASE 0x000
#define IO_FIQ_BASE 0x100
#define IO_INVERT_SEL 0x200
#define IO_STICKY_SEL 0x204
#define IO_PRIORITY_SEL 0x300
#define MAX_INTRS 32
#define FIQ_START MAX_INTRS
static struct irq_domain *zevio_irq_domain;
static void __iomem *zevio_irq_io;
static void zevio_irq_ack(struct irq_data *irqd)
{
struct irq_chip_generic *gc = irq_data_get_irq_chip_data(irqd);
struct irq_chip_regs *regs =
&container_of(irqd->chip, struct irq_chip_type, chip)->regs;
readl(gc->reg_base + regs->ack);
}
static void __exception_irq_entry zevio_handle_irq(struct pt_regs *regs)
{
int irqnr;
while (readl(zevio_irq_io + IO_STATUS)) {
irqnr = readl(zevio_irq_io + IO_CURRENT);
handle_domain_irq(zevio_irq_domain, irqnr, regs);
};
}
static void __init zevio_init_irq_base(void __iomem *base)
{
/* Disable all interrupts */
writel(~0, base + IO_DISABLE);
/* Accept interrupts of all priorities */
writel(0xF, base + IO_MAX_PRIOTY);
/* Reset existing interrupts */
readl(base + IO_RESET);
}
static int __init zevio_of_init(struct device_node *node,
struct device_node *parent)
{
unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
struct irq_chip_generic *gc;
int ret;
if (WARN_ON(zevio_irq_io || zevio_irq_domain))
return -EBUSY;
zevio_irq_io = of_iomap(node, 0);
BUG_ON(!zevio_irq_io);
/* Do not invert interrupt status bits */
writel(~0, zevio_irq_io + IO_INVERT_SEL);
/* Disable sticky interrupts */
writel(0, zevio_irq_io + IO_STICKY_SEL);
/* We don't use IRQ priorities. Set each IRQ to highest priority. */
memset_io(zevio_irq_io + IO_PRIORITY_SEL, 0, MAX_INTRS * sizeof(u32));
/* Init IRQ and FIQ */
zevio_init_irq_base(zevio_irq_io + IO_IRQ_BASE);
zevio_init_irq_base(zevio_irq_io + IO_FIQ_BASE);
zevio_irq_domain = irq_domain_add_linear(node, MAX_INTRS,
&irq_generic_chip_ops, NULL);
BUG_ON(!zevio_irq_domain);
ret = irq_alloc_domain_generic_chips(zevio_irq_domain, MAX_INTRS, 1,
"zevio_intc", handle_level_irq,
clr, 0, IRQ_GC_INIT_MASK_CACHE);
BUG_ON(ret);
gc = irq_get_domain_generic_chip(zevio_irq_domain, 0);
gc->reg_base = zevio_irq_io;
gc->chip_types[0].chip.irq_ack = zevio_irq_ack;
gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg;
gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg;
gc->chip_types[0].regs.mask = IO_IRQ_BASE + IO_ENABLE;
gc->chip_types[0].regs.enable = IO_IRQ_BASE + IO_ENABLE;
gc->chip_types[0].regs.disable = IO_IRQ_BASE + IO_DISABLE;
gc->chip_types[0].regs.ack = IO_IRQ_BASE + IO_RESET;
set_handle_irq(zevio_handle_irq);
pr_info("TI-NSPIRE classic IRQ controller\n");
return 0;
}
IRQCHIP_DECLARE(zevio_irq, "lsi,zevio-intc", zevio_of_init);
| gpl-2.0 |
diszell2008/A830 | arch/arm/mach-msm1/spm_driver.h | 1678 | /* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __ARCH_ARM_MACH_MSM_SPM_DEVICES_H
#define __ARCH_ARM_MACH_MSM_SPM_DEVICES_H
#include "spm.h"
struct msm_spm_driver_data {
uint32_t major;
uint32_t minor;
uint32_t ver_reg;
uint32_t vctl_port;
uint32_t phase_port;
void __iomem *reg_base_addr;
uint32_t vctl_timeout_us;
uint32_t avs_timeout_us;
uint32_t reg_shadow[MSM_SPM_REG_NR];
uint32_t *reg_seq_entry_shadow;
uint32_t *reg_offsets;
};
int msm_spm_drv_init(struct msm_spm_driver_data *dev,
struct msm_spm_platform_data *data);
void msm_spm_drv_reinit(struct msm_spm_driver_data *dev);
int msm_spm_drv_set_low_power_mode(struct msm_spm_driver_data *dev,
uint32_t addr);
int msm_spm_drv_set_vdd(struct msm_spm_driver_data *dev,
unsigned int vlevel);
uint32_t msm_spm_drv_get_sts_curr_pmic_data(
struct msm_spm_driver_data *dev);
int msm_spm_drv_write_seq_data(struct msm_spm_driver_data *dev,
uint8_t *cmd, uint32_t *offset);
void msm_spm_drv_flush_seq_entry(struct msm_spm_driver_data *dev);
int msm_spm_drv_set_spm_enable(struct msm_spm_driver_data *dev,
bool enable);
int msm_spm_drv_set_phase(struct msm_spm_driver_data *dev,
unsigned int phase_cnt);
#endif
| gpl-2.0 |
gayathma/footballs | vendor/laravel/framework/src/Illuminate/Foundation/Console/IlluminateCaster.php | 2431 | <?php
namespace Illuminate\Foundation\Console;
use Exception;
use Illuminate\Support\Collection;
use Illuminate\Foundation\Application;
use Illuminate\Database\Eloquent\Model;
use Symfony\Component\VarDumper\Caster\Caster;
class IlluminateCaster
{
/**
* Illuminate application methods to include in the presenter.
*
* @var array
*/
private static $appProperties = [
'configurationIsCached',
'environment',
'environmentFile',
'isLocal',
'routesAreCached',
'runningUnitTests',
'version',
'path',
'basePath',
'configPath',
'databasePath',
'langPath',
'publicPath',
'storagePath',
'bootstrapPath',
];
/**
* Get an array representing the properties of an application.
*
* @param \Illuminate\Foundation\Application $app
* @return array
*/
public static function castApplication(Application $app)
{
$results = [];
foreach (self::$appProperties as $property) {
try {
$val = $app->$property();
if (! is_null($val)) {
$results[Caster::PREFIX_VIRTUAL.$property] = $val;
}
} catch (Exception $e) {
//
}
}
return $results;
}
/**
* Get an array representing the properties of a collection.
*
* @param \Illuminate\Support\Collection $collection
* @return array
*/
public static function castCollection(Collection $collection)
{
return [
Caster::PREFIX_VIRTUAL.'all' => $collection->all(),
];
}
/**
* Get an array representing the properties of a model.
*
* @param \Illuminate\Database\Eloquent\Model $model
* @return array
*/
public static function castModel(Model $model)
{
$attributes = array_merge(
$model->getAttributes(), $model->getRelations()
);
$visible = array_flip(
$model->getVisible() ?: array_diff(array_keys($attributes), $model->getHidden())
);
$results = [];
foreach (array_intersect_key($attributes, $visible) as $key => $value) {
$results[(isset($visible[$key]) ? Caster::PREFIX_VIRTUAL : Caster::PREFIX_PROTECTED).$key] = $value;
}
return $results;
}
}
| gpl-3.0 |
MaxiCM/android_kernel_lge_msm8226 | fs/f2fs/gc.c | 18452 | /*
* fs/f2fs/gc.c
*
* Copyright (c) 2012 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/fs.h>
#include <linux/module.h>
#include <linux/backing-dev.h>
#include <linux/init.h>
#include <linux/f2fs_fs.h>
#include <linux/kthread.h>
#include <linux/delay.h>
#include <linux/freezer.h>
#include <linux/blkdev.h>
#include "f2fs.h"
#include "node.h"
#include "segment.h"
#include "gc.h"
#include <trace/events/f2fs.h>
static int gc_thread_func(void *data)
{
struct f2fs_sb_info *sbi = data;
struct f2fs_gc_kthread *gc_th = sbi->gc_thread;
wait_queue_head_t *wq = &sbi->gc_thread->gc_wait_queue_head;
long wait_ms;
wait_ms = gc_th->min_sleep_time;
do {
if (try_to_freeze())
continue;
else
wait_event_interruptible_timeout(*wq,
kthread_should_stop(),
msecs_to_jiffies(wait_ms));
if (kthread_should_stop())
break;
if (sbi->sb->s_frozen >= SB_FREEZE_WRITE) {
increase_sleep_time(gc_th, &wait_ms);
continue;
}
/*
* [GC triggering condition]
* 0. GC is not conducted currently.
* 1. There are enough dirty segments.
* 2. IO subsystem is idle by checking the # of writeback pages.
* 3. IO subsystem is idle by checking the # of requests in
* bdev's request list.
*
* Note) We have to avoid triggering GCs frequently.
* Because it is possible that some segments can be
* invalidated soon after by user update or deletion.
* So, I'd like to wait some time to collect dirty segments.
*/
if (!mutex_trylock(&sbi->gc_mutex))
continue;
if (!is_idle(sbi)) {
increase_sleep_time(gc_th, &wait_ms);
mutex_unlock(&sbi->gc_mutex);
continue;
}
if (has_enough_invalid_blocks(sbi))
decrease_sleep_time(gc_th, &wait_ms);
else
increase_sleep_time(gc_th, &wait_ms);
stat_inc_bggc_count(sbi);
/* if return value is not zero, no victim was selected */
if (f2fs_gc(sbi))
wait_ms = gc_th->no_gc_sleep_time;
/* balancing f2fs's metadata periodically */
f2fs_balance_fs_bg(sbi);
} while (!kthread_should_stop());
return 0;
}
int start_gc_thread(struct f2fs_sb_info *sbi)
{
struct f2fs_gc_kthread *gc_th;
dev_t dev = sbi->sb->s_bdev->bd_dev;
int err = 0;
gc_th = kmalloc(sizeof(struct f2fs_gc_kthread), GFP_KERNEL);
if (!gc_th) {
err = -ENOMEM;
goto out;
}
gc_th->min_sleep_time = DEF_GC_THREAD_MIN_SLEEP_TIME;
gc_th->max_sleep_time = DEF_GC_THREAD_MAX_SLEEP_TIME;
gc_th->no_gc_sleep_time = DEF_GC_THREAD_NOGC_SLEEP_TIME;
gc_th->gc_idle = 0;
sbi->gc_thread = gc_th;
init_waitqueue_head(&sbi->gc_thread->gc_wait_queue_head);
sbi->gc_thread->f2fs_gc_task = kthread_run(gc_thread_func, sbi,
"f2fs_gc-%u:%u", MAJOR(dev), MINOR(dev));
if (IS_ERR(gc_th->f2fs_gc_task)) {
err = PTR_ERR(gc_th->f2fs_gc_task);
kfree(gc_th);
sbi->gc_thread = NULL;
}
out:
return err;
}
void stop_gc_thread(struct f2fs_sb_info *sbi)
{
struct f2fs_gc_kthread *gc_th = sbi->gc_thread;
if (!gc_th)
return;
kthread_stop(gc_th->f2fs_gc_task);
kfree(gc_th);
sbi->gc_thread = NULL;
}
static int select_gc_type(struct f2fs_gc_kthread *gc_th, int gc_type)
{
int gc_mode = (gc_type == BG_GC) ? GC_CB : GC_GREEDY;
if (gc_th && gc_th->gc_idle) {
if (gc_th->gc_idle == 1)
gc_mode = GC_CB;
else if (gc_th->gc_idle == 2)
gc_mode = GC_GREEDY;
}
return gc_mode;
}
static void select_policy(struct f2fs_sb_info *sbi, int gc_type,
int type, struct victim_sel_policy *p)
{
struct dirty_seglist_info *dirty_i = DIRTY_I(sbi);
if (p->alloc_mode == SSR) {
p->gc_mode = GC_GREEDY;
p->dirty_segmap = dirty_i->dirty_segmap[type];
p->max_search = dirty_i->nr_dirty[type];
p->ofs_unit = 1;
} else {
p->gc_mode = select_gc_type(sbi->gc_thread, gc_type);
p->dirty_segmap = dirty_i->dirty_segmap[DIRTY];
p->max_search = dirty_i->nr_dirty[DIRTY];
p->ofs_unit = sbi->segs_per_sec;
}
if (p->max_search > sbi->max_victim_search)
p->max_search = sbi->max_victim_search;
p->offset = sbi->last_victim[p->gc_mode];
}
static unsigned int get_max_cost(struct f2fs_sb_info *sbi,
struct victim_sel_policy *p)
{
/* SSR allocates in a segment unit */
if (p->alloc_mode == SSR)
return 1 << sbi->log_blocks_per_seg;
if (p->gc_mode == GC_GREEDY)
return (1 << sbi->log_blocks_per_seg) * p->ofs_unit;
else if (p->gc_mode == GC_CB)
return UINT_MAX;
else /* No other gc_mode */
return 0;
}
static unsigned int check_bg_victims(struct f2fs_sb_info *sbi)
{
struct dirty_seglist_info *dirty_i = DIRTY_I(sbi);
unsigned int secno;
/*
* If the gc_type is FG_GC, we can select victim segments
* selected by background GC before.
* Those segments guarantee they have small valid blocks.
*/
for_each_set_bit(secno, dirty_i->victim_secmap, MAIN_SECS(sbi)) {
if (sec_usage_check(sbi, secno))
continue;
clear_bit(secno, dirty_i->victim_secmap);
return secno * sbi->segs_per_sec;
}
return NULL_SEGNO;
}
static unsigned int get_cb_cost(struct f2fs_sb_info *sbi, unsigned int segno)
{
struct sit_info *sit_i = SIT_I(sbi);
unsigned int secno = GET_SECNO(sbi, segno);
unsigned int start = secno * sbi->segs_per_sec;
unsigned long long mtime = 0;
unsigned int vblocks;
unsigned char age = 0;
unsigned char u;
unsigned int i;
for (i = 0; i < sbi->segs_per_sec; i++)
mtime += get_seg_entry(sbi, start + i)->mtime;
vblocks = get_valid_blocks(sbi, segno, sbi->segs_per_sec);
mtime = div_u64(mtime, sbi->segs_per_sec);
vblocks = div_u64(vblocks, sbi->segs_per_sec);
u = (vblocks * 100) >> sbi->log_blocks_per_seg;
/* Handle if the system time has changed by the user */
if (mtime < sit_i->min_mtime)
sit_i->min_mtime = mtime;
if (mtime > sit_i->max_mtime)
sit_i->max_mtime = mtime;
if (sit_i->max_mtime != sit_i->min_mtime)
age = 100 - div64_u64(100 * (mtime - sit_i->min_mtime),
sit_i->max_mtime - sit_i->min_mtime);
return UINT_MAX - ((100 * (100 - u) * age) / (100 + u));
}
static inline unsigned int get_gc_cost(struct f2fs_sb_info *sbi,
unsigned int segno, struct victim_sel_policy *p)
{
if (p->alloc_mode == SSR)
return get_seg_entry(sbi, segno)->ckpt_valid_blocks;
/* alloc_mode == LFS */
if (p->gc_mode == GC_GREEDY)
return get_valid_blocks(sbi, segno, sbi->segs_per_sec);
else
return get_cb_cost(sbi, segno);
}
/*
* This function is called from two paths.
* One is garbage collection and the other is SSR segment selection.
* When it is called during GC, it just gets a victim segment
* and it does not remove it from dirty seglist.
* When it is called from SSR segment selection, it finds a segment
* which has minimum valid blocks and removes it from dirty seglist.
*/
static int get_victim_by_default(struct f2fs_sb_info *sbi,
unsigned int *result, int gc_type, int type, char alloc_mode)
{
struct dirty_seglist_info *dirty_i = DIRTY_I(sbi);
struct victim_sel_policy p;
unsigned int secno, max_cost;
int nsearched = 0;
mutex_lock(&dirty_i->seglist_lock);
p.alloc_mode = alloc_mode;
select_policy(sbi, gc_type, type, &p);
p.min_segno = NULL_SEGNO;
p.min_cost = max_cost = get_max_cost(sbi, &p);
if (p.alloc_mode == LFS && gc_type == FG_GC) {
p.min_segno = check_bg_victims(sbi);
if (p.min_segno != NULL_SEGNO)
goto got_it;
}
while (1) {
unsigned long cost;
unsigned int segno;
segno = find_next_bit(p.dirty_segmap, MAIN_SEGS(sbi), p.offset);
if (segno >= MAIN_SEGS(sbi)) {
if (sbi->last_victim[p.gc_mode]) {
sbi->last_victim[p.gc_mode] = 0;
p.offset = 0;
continue;
}
break;
}
p.offset = segno + p.ofs_unit;
if (p.ofs_unit > 1)
p.offset -= segno % p.ofs_unit;
secno = GET_SECNO(sbi, segno);
if (sec_usage_check(sbi, secno))
continue;
if (gc_type == BG_GC && test_bit(secno, dirty_i->victim_secmap))
continue;
cost = get_gc_cost(sbi, segno, &p);
if (p.min_cost > cost) {
p.min_segno = segno;
p.min_cost = cost;
} else if (unlikely(cost == max_cost)) {
continue;
}
if (nsearched++ >= p.max_search) {
sbi->last_victim[p.gc_mode] = segno;
break;
}
}
if (p.min_segno != NULL_SEGNO) {
got_it:
if (p.alloc_mode == LFS) {
secno = GET_SECNO(sbi, p.min_segno);
if (gc_type == FG_GC)
sbi->cur_victim_sec = secno;
else
set_bit(secno, dirty_i->victim_secmap);
}
*result = (p.min_segno / p.ofs_unit) * p.ofs_unit;
trace_f2fs_get_victim(sbi->sb, type, gc_type, &p,
sbi->cur_victim_sec,
prefree_segments(sbi), free_segments(sbi));
}
mutex_unlock(&dirty_i->seglist_lock);
return (p.min_segno == NULL_SEGNO) ? 0 : 1;
}
static const struct victim_selection default_v_ops = {
.get_victim = get_victim_by_default,
};
static struct inode *find_gc_inode(struct gc_inode_list *gc_list, nid_t ino)
{
struct inode_entry *ie;
ie = radix_tree_lookup(&gc_list->iroot, ino);
if (ie)
return ie->inode;
return NULL;
}
static void add_gc_inode(struct gc_inode_list *gc_list, struct inode *inode)
{
struct inode_entry *new_ie;
if (inode == find_gc_inode(gc_list, inode->i_ino)) {
iput(inode);
return;
}
new_ie = f2fs_kmem_cache_alloc(inode_entry_slab, GFP_NOFS);
new_ie->inode = inode;
f2fs_radix_tree_insert(&gc_list->iroot, inode->i_ino, new_ie);
list_add_tail(&new_ie->list, &gc_list->ilist);
}
static void put_gc_inode(struct gc_inode_list *gc_list)
{
struct inode_entry *ie, *next_ie;
list_for_each_entry_safe(ie, next_ie, &gc_list->ilist, list) {
radix_tree_delete(&gc_list->iroot, ie->inode->i_ino);
iput(ie->inode);
list_del(&ie->list);
kmem_cache_free(inode_entry_slab, ie);
}
}
static int check_valid_map(struct f2fs_sb_info *sbi,
unsigned int segno, int offset)
{
struct sit_info *sit_i = SIT_I(sbi);
struct seg_entry *sentry;
int ret;
mutex_lock(&sit_i->sentry_lock);
sentry = get_seg_entry(sbi, segno);
ret = f2fs_test_bit(offset, sentry->cur_valid_map);
mutex_unlock(&sit_i->sentry_lock);
return ret;
}
/*
* This function compares node address got in summary with that in NAT.
* On validity, copy that node with cold status, otherwise (invalid node)
* ignore that.
*/
static void gc_node_segment(struct f2fs_sb_info *sbi,
struct f2fs_summary *sum, unsigned int segno, int gc_type)
{
bool initial = true;
struct f2fs_summary *entry;
int off;
next_step:
entry = sum;
for (off = 0; off < sbi->blocks_per_seg; off++, entry++) {
nid_t nid = le32_to_cpu(entry->nid);
struct page *node_page;
/* stop BG_GC if there is not enough free sections. */
if (gc_type == BG_GC && has_not_enough_free_secs(sbi, 0))
return;
if (check_valid_map(sbi, segno, off) == 0)
continue;
if (initial) {
ra_node_page(sbi, nid);
continue;
}
node_page = get_node_page(sbi, nid);
if (IS_ERR(node_page))
continue;
/* block may become invalid during get_node_page */
if (check_valid_map(sbi, segno, off) == 0) {
f2fs_put_page(node_page, 1);
continue;
}
/* set page dirty and write it */
if (gc_type == FG_GC) {
f2fs_wait_on_page_writeback(node_page, NODE);
set_page_dirty(node_page);
} else {
if (!PageWriteback(node_page))
set_page_dirty(node_page);
}
f2fs_put_page(node_page, 1);
stat_inc_node_blk_count(sbi, 1, gc_type);
}
if (initial) {
initial = false;
goto next_step;
}
if (gc_type == FG_GC) {
struct writeback_control wbc = {
.sync_mode = WB_SYNC_ALL,
.nr_to_write = LONG_MAX,
.for_reclaim = 0,
};
sync_node_pages(sbi, 0, &wbc);
/*
* In the case of FG_GC, it'd be better to reclaim this victim
* completely.
*/
if (get_valid_blocks(sbi, segno, 1) != 0)
goto next_step;
}
}
/*
* Calculate start block index indicating the given node offset.
* Be careful, caller should give this node offset only indicating direct node
* blocks. If any node offsets, which point the other types of node blocks such
* as indirect or double indirect node blocks, are given, it must be a caller's
* bug.
*/
block_t start_bidx_of_node(unsigned int node_ofs, struct f2fs_inode_info *fi)
{
unsigned int indirect_blks = 2 * NIDS_PER_BLOCK + 4;
unsigned int bidx;
if (node_ofs == 0)
return 0;
if (node_ofs <= 2) {
bidx = node_ofs - 1;
} else if (node_ofs <= indirect_blks) {
int dec = (node_ofs - 4) / (NIDS_PER_BLOCK + 1);
bidx = node_ofs - 2 - dec;
} else {
int dec = (node_ofs - indirect_blks - 3) / (NIDS_PER_BLOCK + 1);
bidx = node_ofs - 5 - dec;
}
return bidx * ADDRS_PER_BLOCK + ADDRS_PER_INODE(fi);
}
static int check_dnode(struct f2fs_sb_info *sbi, struct f2fs_summary *sum,
struct node_info *dni, block_t blkaddr, unsigned int *nofs)
{
struct page *node_page;
nid_t nid;
unsigned int ofs_in_node;
block_t source_blkaddr;
nid = le32_to_cpu(sum->nid);
ofs_in_node = le16_to_cpu(sum->ofs_in_node);
node_page = get_node_page(sbi, nid);
if (IS_ERR(node_page))
return 0;
get_node_info(sbi, nid, dni);
if (sum->version != dni->version) {
f2fs_put_page(node_page, 1);
return 0;
}
*nofs = ofs_of_node(node_page);
source_blkaddr = datablock_addr(node_page, ofs_in_node);
f2fs_put_page(node_page, 1);
if (source_blkaddr != blkaddr)
return 0;
return 1;
}
static void move_data_page(struct inode *inode, struct page *page, int gc_type)
{
struct f2fs_io_info fio = {
.type = DATA,
.rw = WRITE_SYNC,
};
if (gc_type == BG_GC) {
if (PageWriteback(page))
goto out;
set_page_dirty(page);
set_cold_data(page);
} else {
f2fs_wait_on_page_writeback(page, DATA);
if (clear_page_dirty_for_io(page))
inode_dec_dirty_pages(inode);
set_cold_data(page);
do_write_data_page(page, &fio);
clear_cold_data(page);
}
out:
f2fs_put_page(page, 1);
}
/*
* This function tries to get parent node of victim data block, and identifies
* data block validity. If the block is valid, copy that with cold status and
* modify parent node.
* If the parent node is not valid or the data block address is different,
* the victim data block is ignored.
*/
static void gc_data_segment(struct f2fs_sb_info *sbi, struct f2fs_summary *sum,
struct gc_inode_list *gc_list, unsigned int segno, int gc_type)
{
struct super_block *sb = sbi->sb;
struct f2fs_summary *entry;
block_t start_addr;
int off;
int phase = 0;
start_addr = START_BLOCK(sbi, segno);
next_step:
entry = sum;
for (off = 0; off < sbi->blocks_per_seg; off++, entry++) {
struct page *data_page;
struct inode *inode;
struct node_info dni; /* dnode info for the data */
unsigned int ofs_in_node, nofs;
block_t start_bidx;
/* stop BG_GC if there is not enough free sections. */
if (gc_type == BG_GC && has_not_enough_free_secs(sbi, 0))
return;
if (check_valid_map(sbi, segno, off) == 0)
continue;
if (phase == 0) {
ra_node_page(sbi, le32_to_cpu(entry->nid));
continue;
}
/* Get an inode by ino with checking validity */
if (check_dnode(sbi, entry, &dni, start_addr + off, &nofs) == 0)
continue;
if (phase == 1) {
ra_node_page(sbi, dni.ino);
continue;
}
ofs_in_node = le16_to_cpu(entry->ofs_in_node);
if (phase == 2) {
inode = f2fs_iget(sb, dni.ino);
if (IS_ERR(inode) || is_bad_inode(inode))
continue;
start_bidx = start_bidx_of_node(nofs, F2FS_I(inode));
data_page = find_data_page(inode,
start_bidx + ofs_in_node, false);
if (IS_ERR(data_page)) {
iput(inode);
continue;
}
f2fs_put_page(data_page, 0);
add_gc_inode(gc_list, inode);
continue;
}
/* phase 3 */
inode = find_gc_inode(gc_list, dni.ino);
if (inode) {
start_bidx = start_bidx_of_node(nofs, F2FS_I(inode));
data_page = get_lock_data_page(inode,
start_bidx + ofs_in_node);
if (IS_ERR(data_page))
continue;
move_data_page(inode, data_page, gc_type);
stat_inc_data_blk_count(sbi, 1, gc_type);
}
}
if (++phase < 4)
goto next_step;
if (gc_type == FG_GC) {
f2fs_submit_merged_bio(sbi, DATA, WRITE);
/*
* In the case of FG_GC, it'd be better to reclaim this victim
* completely.
*/
if (get_valid_blocks(sbi, segno, 1) != 0) {
phase = 2;
goto next_step;
}
}
}
static int __get_victim(struct f2fs_sb_info *sbi, unsigned int *victim,
int gc_type)
{
struct sit_info *sit_i = SIT_I(sbi);
int ret;
mutex_lock(&sit_i->sentry_lock);
ret = DIRTY_I(sbi)->v_ops->get_victim(sbi, victim, gc_type,
NO_CHECK_TYPE, LFS);
mutex_unlock(&sit_i->sentry_lock);
return ret;
}
static void do_garbage_collect(struct f2fs_sb_info *sbi, unsigned int segno,
struct gc_inode_list *gc_list, int gc_type)
{
struct page *sum_page;
struct f2fs_summary_block *sum;
struct blk_plug plug;
/* read segment summary of victim */
sum_page = get_sum_page(sbi, segno);
blk_start_plug(&plug);
sum = page_address(sum_page);
switch (GET_SUM_TYPE((&sum->footer))) {
case SUM_TYPE_NODE:
gc_node_segment(sbi, sum->entries, segno, gc_type);
break;
case SUM_TYPE_DATA:
gc_data_segment(sbi, sum->entries, gc_list, segno, gc_type);
break;
}
blk_finish_plug(&plug);
stat_inc_seg_count(sbi, GET_SUM_TYPE((&sum->footer)), gc_type);
stat_inc_call_count(sbi->stat_info);
f2fs_put_page(sum_page, 1);
}
int f2fs_gc(struct f2fs_sb_info *sbi)
{
unsigned int segno, i;
int gc_type = BG_GC;
int nfree = 0;
int ret = -1;
struct cp_control cpc;
struct gc_inode_list gc_list = {
.ilist = LIST_HEAD_INIT(gc_list.ilist),
.iroot = RADIX_TREE_INIT(GFP_NOFS),
};
cpc.reason = __get_cp_reason(sbi);
gc_more:
if (unlikely(!(sbi->sb->s_flags & MS_ACTIVE)))
goto stop;
if (unlikely(f2fs_cp_error(sbi)))
goto stop;
if (gc_type == BG_GC && has_not_enough_free_secs(sbi, nfree)) {
gc_type = FG_GC;
write_checkpoint(sbi, &cpc);
}
if (!__get_victim(sbi, &segno, gc_type))
goto stop;
ret = 0;
/* readahead multi ssa blocks those have contiguous address */
if (sbi->segs_per_sec > 1)
ra_meta_pages(sbi, GET_SUM_BLOCK(sbi, segno), sbi->segs_per_sec,
META_SSA);
for (i = 0; i < sbi->segs_per_sec; i++)
do_garbage_collect(sbi, segno + i, &gc_list, gc_type);
if (gc_type == FG_GC) {
sbi->cur_victim_sec = NULL_SEGNO;
nfree++;
WARN_ON(get_valid_blocks(sbi, segno, sbi->segs_per_sec));
}
if (has_not_enough_free_secs(sbi, nfree))
goto gc_more;
if (gc_type == FG_GC)
write_checkpoint(sbi, &cpc);
stop:
mutex_unlock(&sbi->gc_mutex);
put_gc_inode(&gc_list);
return ret;
}
void build_gc_manager(struct f2fs_sb_info *sbi)
{
DIRTY_I(sbi)->v_ops = &default_v_ops;
}
| gpl-2.0 |
SanDisk-Open-Source/SSD_Dashboard | uefi/userspace/icu-4.8.1.1/source/tools/pkgdata/pkgtypes.c | 6802 | /**************************************************************************
*
* Copyright (C) 2000-2008, International Business Machines
* Corporation and others. All Rights Reserved.
*
***************************************************************************
* file name: pkgdata.c
* encoding: ANSI X3.4 (1968)
* tab size: 8 (not used)
* indentation:4
*
* created on: 2000may16
* created by: Steven \u24C7 Loomis
*
* common types for pkgdata
*/
#include <stdio.h>
#include <stdlib.h>
#include "unicode/utypes.h"
#include "unicode/putil.h"
#include "cmemory.h"
#include "cstring.h"
#include "pkgtypes.h"
const char *pkg_writeCharListWrap(FileStream *s, CharList *l, const char *delim, const char *brk, int32_t quote)
{
int32_t ln = 0;
char buffer[1024];
while(l != NULL)
{
if(l->str)
{
uprv_strncpy(buffer, l->str, 1020);
buffer[1019]=0;
if(quote < 0) { /* remove quotes */
if(buffer[uprv_strlen(buffer)-1] == '"') {
buffer[uprv_strlen(buffer)-1] = '\0';
}
if(buffer[0] == '"') {
uprv_strcpy(buffer, buffer+1);
}
} else if(quote > 0) { /* add quotes */
if(l->str[0] != '"') {
uprv_strcpy(buffer, "\"");
uprv_strncat(buffer, l->str,1020);
}
if(l->str[uprv_strlen(l->str)-1] != '"') {
uprv_strcat(buffer, "\"");
}
}
T_FileStream_write(s, buffer, (int32_t)uprv_strlen(buffer));
ln += (int32_t)uprv_strlen(l->str);
}
if(l->next && delim)
{
if(ln > 60 && brk) {
ln = 0;
T_FileStream_write(s, brk, (int32_t)uprv_strlen(brk));
}
T_FileStream_write(s, delim, (int32_t)uprv_strlen(delim));
}
l = l->next;
}
return NULL;
}
const char *pkg_writeCharList(FileStream *s, CharList *l, const char *delim, int32_t quote)
{
char buffer[1024];
while(l != NULL)
{
if(l->str)
{
uprv_strncpy(buffer, l->str, 1023);
buffer[1023]=0;
if(uprv_strlen(l->str) >= 1023)
{
fprintf(stderr, "%s:%d: Internal error, line too long (greater than 1023 chars)\n",
__FILE__, __LINE__);
exit(0);
}
if(quote < 0) { /* remove quotes */
if(buffer[uprv_strlen(buffer)-1] == '"') {
buffer[uprv_strlen(buffer)-1] = '\0';
}
if(buffer[0] == '"') {
uprv_strcpy(buffer, buffer+1);
}
} else if(quote > 0) { /* add quotes */
if(l->str[0] != '"') {
uprv_strcpy(buffer, "\"");
uprv_strcat(buffer, l->str);
}
if(l->str[uprv_strlen(l->str)-1] != '"') {
uprv_strcat(buffer, "\"");
}
}
T_FileStream_write(s, buffer, (int32_t)uprv_strlen(buffer));
}
if(l->next && delim)
{
T_FileStream_write(s, delim, (int32_t)uprv_strlen(delim));
}
l = l->next;
}
return NULL;
}
/*
* Count items . 0 if null
*/
uint32_t pkg_countCharList(CharList *l)
{
uint32_t c = 0;
while(l != NULL)
{
c++;
l = l->next;
}
return c;
}
/*
* Prepend string to CharList
*/
CharList *pkg_prependToList(CharList *l, const char *str)
{
CharList *newList;
newList = uprv_malloc(sizeof(CharList));
/* test for NULL */
if(newList == NULL) {
return NULL;
}
newList->str = str;
newList->next = l;
return newList;
}
/*
* append string to CharList. *end or even end can be null if you don't
* know it.[slow]
* Str is adopted!
*/
CharList *pkg_appendToList(CharList *l, CharList** end, const char *str)
{
CharList *endptr = NULL, *tmp;
if(end == NULL)
{
end = &endptr;
}
/* FIND the end */
if((*end == NULL) && (l != NULL))
{
tmp = l;
while(tmp->next)
{
tmp = tmp->next;
}
*end = tmp;
}
/* Create a new empty list and append it */
if(l == NULL)
{
l = pkg_prependToList(NULL, str);
}
else
{
(*end)->next = pkg_prependToList(NULL, str);
}
/* Move the end pointer. */
if(*end)
{
(*end) = (*end)->next;
}
else
{
*end = l;
}
return l;
}
char * convertToNativePathSeparators(char *path) {
#if defined(U_MAKE_IS_NMAKE)
char *itr;
while ((itr = uprv_strchr(path, U_FILE_ALT_SEP_CHAR))) {
*itr = U_FILE_SEP_CHAR;
}
#endif
return path;
}
CharList *pkg_appendUniqueDirToList(CharList *l, CharList** end, const char *strAlias) {
char aBuf[1024];
char *rPtr;
rPtr = uprv_strrchr(strAlias, U_FILE_SEP_CHAR);
#if (U_FILE_SEP_CHAR != U_FILE_ALT_SEP_CHAR)
{
char *aPtr = uprv_strrchr(strAlias, U_FILE_ALT_SEP_CHAR);
if(!rPtr || /* regular char wasn't found or.. */
(aPtr && (aPtr > rPtr)))
{ /* alt ptr exists and is to the right of r ptr */
rPtr = aPtr; /* may copy NULL which is OK */
}
}
#endif
if(!rPtr) {
return l; /* no dir path */
}
if((rPtr-strAlias) >= (sizeof(aBuf)/sizeof(aBuf[0]))) {
fprintf(stderr, "## ERR: Path too long [%d chars]: %s\n", (int)sizeof(aBuf), strAlias);
return l;
}
strncpy(aBuf, strAlias,(rPtr-strAlias));
aBuf[rPtr-strAlias]=0; /* no trailing slash */
convertToNativePathSeparators(aBuf);
if(!pkg_listContains(l, aBuf)) {
return pkg_appendToList(l, end, uprv_strdup(aBuf));
} else {
return l; /* already found */
}
}
#if 0
static CharList *
pkg_appendFromStrings(CharList *l, CharList** end, const char *s, int32_t len)
{
CharList *endptr = NULL;
const char *p;
char *t;
const char *targ;
if(end == NULL) {
end = &endptr;
}
if(len==-1) {
len = uprv_strlen(s);
}
targ = s+len;
while(*s && s<targ) {
while(s<targ&&isspace(*s)) s++;
for(p=s;s<targ&&!isspace(*p);p++);
if(p!=s) {
t = uprv_malloc(p-s+1);
uprv_strncpy(t,s,p-s);
t[p-s]=0;
l=pkg_appendToList(l,end,t);
fprintf(stderr, " P %s\n", t);
}
s=p;
}
return l;
}
#endif
/*
* Delete list
*/
void pkg_deleteList(CharList *l)
{
CharList *tmp;
while(l != NULL)
{
uprv_free((void*)l->str);
tmp = l;
l = l->next;
uprv_free(tmp);
}
}
UBool pkg_listContains(CharList *l, const char *str)
{
for(;l;l=l->next){
if(!uprv_strcmp(l->str, str)) {
return TRUE;
}
}
return FALSE;
}
| gpl-2.0 |
WhiteBearSolutions/WBSAirback | packages/wbsairback-kernel-image/wbsairback-kernel-image-3.2.43/drivers/net/wireless/iwlwifi/iwl-dev.h | 31024 | /******************************************************************************
*
* Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* Intel Linux Wireless <[email protected]>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
*****************************************************************************/
/*
* Please use this file (iwl-dev.h) for driver implementation definitions.
* Please use iwl-commands.h for uCode API definitions.
*/
#ifndef __iwl_dev_h__
#define __iwl_dev_h__
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/wait.h>
#include <linux/leds.h>
#include <linux/slab.h>
#include <net/ieee80211_radiotap.h>
#include "iwl-eeprom.h"
#include "iwl-csr.h"
#include "iwl-prph.h"
#include "iwl-debug.h"
#include "iwl-agn-hw.h"
#include "iwl-led.h"
#include "iwl-power.h"
#include "iwl-agn-rs.h"
#include "iwl-agn-tt.h"
#include "iwl-bus.h"
#include "iwl-trans.h"
#include "iwl-shared.h"
struct iwl_tx_queue;
/* CT-KILL constants */
#define CT_KILL_THRESHOLD_LEGACY 110 /* in Celsius */
#define CT_KILL_THRESHOLD 114 /* in Celsius */
#define CT_KILL_EXIT_THRESHOLD 95 /* in Celsius */
/* Default noise level to report when noise measurement is not available.
* This may be because we're:
* 1) Not associated (4965, no beacon statistics being sent to driver)
* 2) Scanning (noise measurement does not apply to associated channel)
* 3) Receiving CCK (3945 delivers noise info only for OFDM frames)
* Use default noise value of -127 ... this is below the range of measurable
* Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user.
* Also, -127 works better than 0 when averaging frames with/without
* noise info (e.g. averaging might be done in app); measured dBm values are
* always negative ... using a negative value as the default keeps all
* averages within an s8's (used in some apps) range of negative values. */
#define IWL_NOISE_MEAS_NOT_AVAILABLE (-127)
/*
* RTS threshold here is total size [2347] minus 4 FCS bytes
* Per spec:
* a value of 0 means RTS on all data/management packets
* a value > max MSDU size means no RTS
* else RTS for data/management frames where MPDU is larger
* than RTS value.
*/
#define DEFAULT_RTS_THRESHOLD 2347U
#define MIN_RTS_THRESHOLD 0U
#define MAX_RTS_THRESHOLD 2347U
#define MAX_MSDU_SIZE 2304U
#define MAX_MPDU_SIZE 2346U
#define DEFAULT_BEACON_INTERVAL 200U
#define DEFAULT_SHORT_RETRY_LIMIT 7U
#define DEFAULT_LONG_RETRY_LIMIT 4U
#define IWL_NUM_SCAN_RATES (2)
/*
* One for each channel, holds all channel setup data
* Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant
* with one another!
*/
struct iwl_channel_info {
struct iwl_eeprom_channel eeprom; /* EEPROM regulatory limit */
struct iwl_eeprom_channel ht40_eeprom; /* EEPROM regulatory limit for
* HT40 channel */
u8 channel; /* channel number */
u8 flags; /* flags copied from EEPROM */
s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */
s8 min_power; /* always 0 */
s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */
u8 group_index; /* 0-4, maps channel to group1/2/3/4/5 */
u8 band_index; /* 0-4, maps channel to band1/2/3/4/5 */
enum ieee80211_band band;
/* HT40 channel info */
s8 ht40_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
u8 ht40_flags; /* flags copied from EEPROM */
u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */
};
/*
* Minimum number of queues. MAX_NUM is defined in hw specific files.
* Set the minimum to accommodate
* - 4 standard TX queues
* - the command queue
* - 4 PAN TX queues
* - the PAN multicast queue, and
* - the AUX (TX during scan dwell) queue.
*/
#define IWL_MIN_NUM_QUEUES 11
/*
* Command queue depends on iPAN support.
*/
#define IWL_DEFAULT_CMD_QUEUE_NUM 4
#define IWL_IPAN_CMD_QUEUE_NUM 9
#define IEEE80211_DATA_LEN 2304
#define IEEE80211_4ADDR_LEN 30
#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
#define SUP_RATE_11A_MAX_NUM_CHANNELS 8
#define SUP_RATE_11B_MAX_NUM_CHANNELS 4
#define SUP_RATE_11G_MAX_NUM_CHANNELS 12
#define IWL_SUPPORTED_RATES_IE_LEN 8
#define IWL_INVALID_RATE 0xFF
#define IWL_INVALID_VALUE -1
union iwl_ht_rate_supp {
u16 rates;
struct {
u8 siso_rate;
u8 mimo_rate;
};
};
#define CFG_HT_RX_AMPDU_FACTOR_8K (0x0)
#define CFG_HT_RX_AMPDU_FACTOR_16K (0x1)
#define CFG_HT_RX_AMPDU_FACTOR_32K (0x2)
#define CFG_HT_RX_AMPDU_FACTOR_64K (0x3)
#define CFG_HT_RX_AMPDU_FACTOR_DEF CFG_HT_RX_AMPDU_FACTOR_64K
#define CFG_HT_RX_AMPDU_FACTOR_MAX CFG_HT_RX_AMPDU_FACTOR_64K
#define CFG_HT_RX_AMPDU_FACTOR_MIN CFG_HT_RX_AMPDU_FACTOR_8K
/*
* Maximal MPDU density for TX aggregation
* 4 - 2us density
* 5 - 4us density
* 6 - 8us density
* 7 - 16us density
*/
#define CFG_HT_MPDU_DENSITY_2USEC (0x4)
#define CFG_HT_MPDU_DENSITY_4USEC (0x5)
#define CFG_HT_MPDU_DENSITY_8USEC (0x6)
#define CFG_HT_MPDU_DENSITY_16USEC (0x7)
#define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_4USEC
#define CFG_HT_MPDU_DENSITY_MAX CFG_HT_MPDU_DENSITY_16USEC
#define CFG_HT_MPDU_DENSITY_MIN (0x1)
struct iwl_ht_config {
bool single_chain_sufficient;
enum ieee80211_smps_mode smps; /* current smps mode */
};
/* QoS structures */
struct iwl_qos_info {
int qos_active;
struct iwl_qosparam_cmd def_qos_parm;
};
/*
* Structure should be accessed with sta_lock held. When station addition
* is in progress (IWL_STA_UCODE_INPROGRESS) it is possible to access only
* the commands (iwl_addsta_cmd and iwl_link_quality_cmd) without sta_lock
* held.
*/
struct iwl_station_entry {
struct iwl_addsta_cmd sta;
u8 used, ctxid;
struct iwl_link_quality_cmd *lq;
};
/*
* iwl_station_priv: Driver's private station information
*
* When mac80211 creates a station it reserves some space (hw->sta_data_size)
* in the structure for use by driver. This structure is places in that
* space.
*/
struct iwl_station_priv {
struct iwl_rxon_context *ctx;
struct iwl_lq_sta lq_sta;
atomic_t pending_frames;
bool client;
bool asleep;
u8 max_agg_bufsize;
u8 sta_id;
};
/**
* struct iwl_vif_priv - driver's private per-interface information
*
* When mac80211 allocates a virtual interface, it can allocate
* space for us to put data into.
*/
struct iwl_vif_priv {
struct iwl_rxon_context *ctx;
u8 ibss_bssid_sta_id;
};
/* one for each uCode image (inst/data, boot/init/runtime) */
struct fw_desc {
void *v_addr; /* access by driver */
dma_addr_t p_addr; /* access by card's busmaster DMA */
u32 len; /* bytes */
};
struct fw_img {
struct fw_desc code, data;
};
/* v1/v2 uCode file layout */
struct iwl_ucode_header {
__le32 ver; /* major/minor/API/serial */
union {
struct {
__le32 inst_size; /* bytes of runtime code */
__le32 data_size; /* bytes of runtime data */
__le32 init_size; /* bytes of init code */
__le32 init_data_size; /* bytes of init data */
__le32 boot_size; /* bytes of bootstrap code */
u8 data[0]; /* in same order as sizes */
} v1;
struct {
__le32 build; /* build number */
__le32 inst_size; /* bytes of runtime code */
__le32 data_size; /* bytes of runtime data */
__le32 init_size; /* bytes of init code */
__le32 init_data_size; /* bytes of init data */
__le32 boot_size; /* bytes of bootstrap code */
u8 data[0]; /* in same order as sizes */
} v2;
} u;
};
/*
* new TLV uCode file layout
*
* The new TLV file format contains TLVs, that each specify
* some piece of data. To facilitate "groups", for example
* different instruction image with different capabilities,
* bundled with the same init image, an alternative mechanism
* is provided:
* When the alternative field is 0, that means that the item
* is always valid. When it is non-zero, then it is only
* valid in conjunction with items of the same alternative,
* in which case the driver (user) selects one alternative
* to use.
*/
enum iwl_ucode_tlv_type {
IWL_UCODE_TLV_INVALID = 0, /* unused */
IWL_UCODE_TLV_INST = 1,
IWL_UCODE_TLV_DATA = 2,
IWL_UCODE_TLV_INIT = 3,
IWL_UCODE_TLV_INIT_DATA = 4,
IWL_UCODE_TLV_BOOT = 5,
IWL_UCODE_TLV_PROBE_MAX_LEN = 6, /* a u32 value */
IWL_UCODE_TLV_PAN = 7,
IWL_UCODE_TLV_RUNT_EVTLOG_PTR = 8,
IWL_UCODE_TLV_RUNT_EVTLOG_SIZE = 9,
IWL_UCODE_TLV_RUNT_ERRLOG_PTR = 10,
IWL_UCODE_TLV_INIT_EVTLOG_PTR = 11,
IWL_UCODE_TLV_INIT_EVTLOG_SIZE = 12,
IWL_UCODE_TLV_INIT_ERRLOG_PTR = 13,
IWL_UCODE_TLV_ENHANCE_SENS_TBL = 14,
IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15,
IWL_UCODE_TLV_WOWLAN_INST = 16,
IWL_UCODE_TLV_WOWLAN_DATA = 17,
IWL_UCODE_TLV_FLAGS = 18,
};
/**
* enum iwl_ucode_tlv_flag - ucode API flags
* @IWL_UCODE_TLV_FLAGS_PAN: This is PAN capable microcode; this previously
* was a separate TLV but moved here to save space.
* @IWL_UCODE_TLV_FLAGS_NEWSCAN: new uCode scan behaviour on hidden SSID,
* treats good CRC threshold as a boolean
* @IWL_UCODE_TLV_FLAGS_MFP: This uCode image supports MFP (802.11w).
* @IWL_UCODE_TLV_FLAGS_P2P: This uCode image supports P2P.
*/
enum iwl_ucode_tlv_flag {
IWL_UCODE_TLV_FLAGS_PAN = BIT(0),
IWL_UCODE_TLV_FLAGS_NEWSCAN = BIT(1),
IWL_UCODE_TLV_FLAGS_MFP = BIT(2),
IWL_UCODE_TLV_FLAGS_P2P = BIT(3),
};
struct iwl_ucode_tlv {
__le16 type; /* see above */
__le16 alternative; /* see comment */
__le32 length; /* not including type/length fields */
u8 data[0];
} __packed;
#define IWL_TLV_UCODE_MAGIC 0x0a4c5749
struct iwl_tlv_ucode_header {
/*
* The TLV style ucode header is distinguished from
* the v1/v2 style header by first four bytes being
* zero, as such is an invalid combination of
* major/minor/API/serial versions.
*/
__le32 zero;
__le32 magic;
u8 human_readable[64];
__le32 ver; /* major/minor/API/serial */
__le32 build;
__le64 alternatives; /* bitmask of valid alternatives */
/*
* The data contained herein has a TLV layout,
* see above for the TLV header and types.
* Note that each TLV is padded to a length
* that is a multiple of 4 for alignment.
*/
u8 data[0];
};
struct iwl_sensitivity_ranges {
u16 min_nrg_cck;
u16 max_nrg_cck;
u16 nrg_th_cck;
u16 nrg_th_ofdm;
u16 auto_corr_min_ofdm;
u16 auto_corr_min_ofdm_mrc;
u16 auto_corr_min_ofdm_x1;
u16 auto_corr_min_ofdm_mrc_x1;
u16 auto_corr_max_ofdm;
u16 auto_corr_max_ofdm_mrc;
u16 auto_corr_max_ofdm_x1;
u16 auto_corr_max_ofdm_mrc_x1;
u16 auto_corr_max_cck;
u16 auto_corr_max_cck_mrc;
u16 auto_corr_min_cck;
u16 auto_corr_min_cck_mrc;
u16 barker_corr_th_min;
u16 barker_corr_th_min_mrc;
u16 nrg_th_cca;
};
#define KELVIN_TO_CELSIUS(x) ((x)-273)
#define CELSIUS_TO_KELVIN(x) ((x)+273)
/******************************************************************************
*
* Functions implemented in core module which are forward declared here
* for use by iwl-[4-5].c
*
* NOTE: The implementation of these functions are not hardware specific
* which is why they are in the core module files.
*
* Naming convention --
* iwl_ <-- Is part of iwlwifi
* iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX)
*
****************************************************************************/
extern void iwl_update_chain_flags(struct iwl_priv *priv);
extern const u8 iwl_bcast_addr[ETH_ALEN];
#define IWL_OPERATION_MODE_AUTO 0
#define IWL_OPERATION_MODE_HT_ONLY 1
#define IWL_OPERATION_MODE_MIXED 2
#define IWL_OPERATION_MODE_20MHZ 3
#define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000
/* Sensitivity and chain noise calibration */
#define INITIALIZATION_VALUE 0xFFFF
#define IWL_CAL_NUM_BEACONS 16
#define MAXIMUM_ALLOWED_PATHLOSS 15
#define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3
#define MAX_FA_OFDM 50
#define MIN_FA_OFDM 5
#define MAX_FA_CCK 50
#define MIN_FA_CCK 5
#define AUTO_CORR_STEP_OFDM 1
#define AUTO_CORR_STEP_CCK 3
#define AUTO_CORR_MAX_TH_CCK 160
#define NRG_DIFF 2
#define NRG_STEP_CCK 2
#define NRG_MARGIN 8
#define MAX_NUMBER_CCK_NO_FA 100
#define AUTO_CORR_CCK_MIN_VAL_DEF (125)
#define CHAIN_A 0
#define CHAIN_B 1
#define CHAIN_C 2
#define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4
#define ALL_BAND_FILTER 0xFF00
#define IN_BAND_FILTER 0xFF
#define MIN_AVERAGE_NOISE_MAX_VALUE 0xFFFFFFFF
#define NRG_NUM_PREV_STAT_L 20
#define NUM_RX_CHAINS 3
enum iwlagn_false_alarm_state {
IWL_FA_TOO_MANY = 0,
IWL_FA_TOO_FEW = 1,
IWL_FA_GOOD_RANGE = 2,
};
enum iwlagn_chain_noise_state {
IWL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */
IWL_CHAIN_NOISE_ACCUMULATE,
IWL_CHAIN_NOISE_CALIBRATED,
IWL_CHAIN_NOISE_DONE,
};
/*
* enum iwl_calib
* defines the order in which results of initial calibrations
* should be sent to the runtime uCode
*/
enum iwl_calib {
IWL_CALIB_XTAL,
IWL_CALIB_DC,
IWL_CALIB_LO,
IWL_CALIB_TX_IQ,
IWL_CALIB_TX_IQ_PERD,
IWL_CALIB_BASE_BAND,
IWL_CALIB_TEMP_OFFSET,
IWL_CALIB_MAX
};
/* Opaque calibration results */
struct iwl_calib_result {
void *buf;
size_t buf_len;
};
/* Sensitivity calib data */
struct iwl_sensitivity_data {
u32 auto_corr_ofdm;
u32 auto_corr_ofdm_mrc;
u32 auto_corr_ofdm_x1;
u32 auto_corr_ofdm_mrc_x1;
u32 auto_corr_cck;
u32 auto_corr_cck_mrc;
u32 last_bad_plcp_cnt_ofdm;
u32 last_fa_cnt_ofdm;
u32 last_bad_plcp_cnt_cck;
u32 last_fa_cnt_cck;
u32 nrg_curr_state;
u32 nrg_prev_state;
u32 nrg_value[10];
u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L];
u32 nrg_silence_ref;
u32 nrg_energy_idx;
u32 nrg_silence_idx;
u32 nrg_th_cck;
s32 nrg_auto_corr_silence_diff;
u32 num_in_cck_no_fa;
u32 nrg_th_ofdm;
u16 barker_corr_th_min;
u16 barker_corr_th_min_mrc;
u16 nrg_th_cca;
};
/* Chain noise (differential Rx gain) calib data */
struct iwl_chain_noise_data {
u32 active_chains;
u32 chain_noise_a;
u32 chain_noise_b;
u32 chain_noise_c;
u32 chain_signal_a;
u32 chain_signal_b;
u32 chain_signal_c;
u16 beacon_count;
u8 disconn_array[NUM_RX_CHAINS];
u8 delta_gain_code[NUM_RX_CHAINS];
u8 radio_write;
u8 state;
};
#define EEPROM_SEM_TIMEOUT 10 /* milliseconds */
#define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
enum {
MEASUREMENT_READY = (1 << 0),
MEASUREMENT_ACTIVE = (1 << 1),
};
enum iwl_nvm_type {
NVM_DEVICE_TYPE_EEPROM = 0,
NVM_DEVICE_TYPE_OTP,
};
/*
* Two types of OTP memory access modes
* IWL_OTP_ACCESS_ABSOLUTE - absolute address mode,
* based on physical memory addressing
* IWL_OTP_ACCESS_RELATIVE - relative address mode,
* based on logical memory addressing
*/
enum iwl_access_mode {
IWL_OTP_ACCESS_ABSOLUTE,
IWL_OTP_ACCESS_RELATIVE,
};
/**
* enum iwl_pa_type - Power Amplifier type
* @IWL_PA_SYSTEM: based on uCode configuration
* @IWL_PA_INTERNAL: use Internal only
*/
enum iwl_pa_type {
IWL_PA_SYSTEM = 0,
IWL_PA_INTERNAL = 1,
};
/* reply_tx_statistics (for _agn devices) */
struct reply_tx_error_statistics {
u32 pp_delay;
u32 pp_few_bytes;
u32 pp_bt_prio;
u32 pp_quiet_period;
u32 pp_calc_ttak;
u32 int_crossed_retry;
u32 short_limit;
u32 long_limit;
u32 fifo_underrun;
u32 drain_flow;
u32 rfkill_flush;
u32 life_expire;
u32 dest_ps;
u32 host_abort;
u32 bt_retry;
u32 sta_invalid;
u32 frag_drop;
u32 tid_disable;
u32 fifo_flush;
u32 insuff_cf_poll;
u32 fail_hw_drop;
u32 sta_color_mismatch;
u32 unknown;
};
/* reply_agg_tx_statistics (for _agn devices) */
struct reply_agg_tx_error_statistics {
u32 underrun;
u32 bt_prio;
u32 few_bytes;
u32 abort;
u32 last_sent_ttl;
u32 last_sent_try;
u32 last_sent_bt_kill;
u32 scd_query;
u32 bad_crc32;
u32 response;
u32 dump_tx;
u32 delay_tx;
u32 unknown;
};
/* management statistics */
enum iwl_mgmt_stats {
MANAGEMENT_ASSOC_REQ = 0,
MANAGEMENT_ASSOC_RESP,
MANAGEMENT_REASSOC_REQ,
MANAGEMENT_REASSOC_RESP,
MANAGEMENT_PROBE_REQ,
MANAGEMENT_PROBE_RESP,
MANAGEMENT_BEACON,
MANAGEMENT_ATIM,
MANAGEMENT_DISASSOC,
MANAGEMENT_AUTH,
MANAGEMENT_DEAUTH,
MANAGEMENT_ACTION,
MANAGEMENT_MAX,
};
/* control statistics */
enum iwl_ctrl_stats {
CONTROL_BACK_REQ = 0,
CONTROL_BACK,
CONTROL_PSPOLL,
CONTROL_RTS,
CONTROL_CTS,
CONTROL_ACK,
CONTROL_CFEND,
CONTROL_CFENDACK,
CONTROL_MAX,
};
struct traffic_stats {
#ifdef CONFIG_IWLWIFI_DEBUGFS
u32 mgmt[MANAGEMENT_MAX];
u32 ctrl[CONTROL_MAX];
u32 data_cnt;
u64 data_bytes;
#endif
};
/*
* schedule the timer to wake up every UCODE_TRACE_PERIOD milliseconds
* to perform continuous uCode event logging operation if enabled
*/
#define UCODE_TRACE_PERIOD (100)
/*
* iwl_event_log: current uCode event log position
*
* @ucode_trace: enable/disable ucode continuous trace timer
* @num_wraps: how many times the event buffer wraps
* @next_entry: the entry just before the next one that uCode would fill
* @non_wraps_count: counter for no wrap detected when dump ucode events
* @wraps_once_count: counter for wrap once detected when dump ucode events
* @wraps_more_count: counter for wrap more than once detected
* when dump ucode events
*/
struct iwl_event_log {
bool ucode_trace;
u32 num_wraps;
u32 next_entry;
int non_wraps_count;
int wraps_once_count;
int wraps_more_count;
};
/*
* This is the threshold value of plcp error rate per 100mSecs. It is
* used to set and check for the validity of plcp_delta.
*/
#define IWL_MAX_PLCP_ERR_THRESHOLD_MIN (1)
#define IWL_MAX_PLCP_ERR_THRESHOLD_DEF (50)
#define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF (100)
#define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF (200)
#define IWL_MAX_PLCP_ERR_THRESHOLD_MAX (255)
#define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE (0)
#define IWL_DELAY_NEXT_FORCE_RF_RESET (HZ*3)
#define IWL_DELAY_NEXT_FORCE_FW_RELOAD (HZ*5)
/* TX queue watchdog timeouts in mSecs */
#define IWL_DEF_WD_TIMEOUT (2000)
#define IWL_LONG_WD_TIMEOUT (10000)
#define IWL_MAX_WD_TIMEOUT (120000)
/* BT Antenna Coupling Threshold (dB) */
#define IWL_BT_ANTENNA_COUPLING_THRESHOLD (35)
/* Firmware reload counter and Timestamp */
#define IWL_MIN_RELOAD_DURATION 1000 /* 1000 ms */
#define IWL_MAX_CONTINUE_RELOAD_CNT 4
enum iwl_reset {
IWL_RF_RESET = 0,
IWL_FW_RESET,
IWL_MAX_FORCE_RESET,
};
struct iwl_force_reset {
int reset_request_count;
int reset_success_count;
int reset_reject_count;
unsigned long reset_duration;
unsigned long last_force_reset_jiffies;
};
/* extend beacon time format bit shifting */
/*
* for _agn devices
* bits 31:22 - extended
* bits 21:0 - interval
*/
#define IWLAGN_EXT_BEACON_TIME_POS 22
/**
* struct iwl_notification_wait - notification wait entry
* @list: list head for global list
* @fn: function called with the notification
* @cmd: command ID
*
* This structure is not used directly, to wait for a
* notification declare it on the stack, and call
* iwlagn_init_notification_wait() with appropriate
* parameters. Then do whatever will cause the ucode
* to notify the driver, and to wait for that then
* call iwlagn_wait_notification().
*
* Each notification is one-shot. If at some point we
* need to support multi-shot notifications (which
* can't be allocated on the stack) we need to modify
* the code for them.
*/
struct iwl_notification_wait {
struct list_head list;
void (*fn)(struct iwl_priv *priv, struct iwl_rx_packet *pkt,
void *data);
void *fn_data;
u8 cmd;
bool triggered, aborted;
};
struct iwl_rxon_context {
struct ieee80211_vif *vif;
/*
* We could use the vif to indicate active, but we
* also need it to be active during disabling when
* we already removed the vif for type setting.
*/
bool always_active, is_active;
bool ht_need_multiple_chains;
enum iwl_rxon_context_id ctxid;
u32 interface_modes, exclusive_interface_modes;
u8 unused_devtype, ap_devtype, ibss_devtype, station_devtype;
/*
* We declare this const so it can only be
* changed via explicit cast within the
* routines that actually update the physical
* hardware.
*/
const struct iwl_rxon_cmd active;
struct iwl_rxon_cmd staging;
struct iwl_rxon_time_cmd timing;
struct iwl_qos_info qos_data;
u8 bcast_sta_id, ap_sta_id;
u8 rxon_cmd, rxon_assoc_cmd, rxon_timing_cmd;
u8 qos_cmd;
u8 wep_key_cmd;
struct iwl_wep_key wep_keys[WEP_KEYS_MAX];
u8 key_mapping_keys;
__le32 station_flags;
int beacon_int;
struct {
bool non_gf_sta_present;
u8 protection;
bool enabled, is_40mhz;
u8 extension_chan_offset;
} ht;
u8 bssid[ETH_ALEN];
bool preauth_bssid;
bool last_tx_rejected;
};
enum iwl_scan_type {
IWL_SCAN_NORMAL,
IWL_SCAN_RADIO_RESET,
IWL_SCAN_ROC,
};
enum iwlagn_ucode_type {
IWL_UCODE_NONE,
IWL_UCODE_REGULAR,
IWL_UCODE_INIT,
IWL_UCODE_WOWLAN,
};
#ifdef CONFIG_IWLWIFI_DEVICE_SVTOOL
struct iwl_testmode_trace {
u32 buff_size;
u32 total_size;
u32 num_chunks;
u8 *cpu_addr;
u8 *trace_addr;
dma_addr_t dma_addr;
bool trace_enabled;
};
#endif
struct iwl_priv {
/*data shared among all the driver's layers */
struct iwl_shared _shrd;
struct iwl_shared *shrd;
/* ieee device used by generic ieee processing code */
struct ieee80211_hw *hw;
struct ieee80211_channel *ieee_channels;
struct ieee80211_rate *ieee_rates;
struct kmem_cache *tx_cmd_pool;
struct iwl_cfg *cfg;
enum ieee80211_band band;
void (*pre_rx_handler)(struct iwl_priv *priv,
struct iwl_rx_mem_buffer *rxb);
int (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv,
struct iwl_rx_mem_buffer *rxb,
struct iwl_device_cmd *cmd);
struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
/* spectrum measurement report caching */
struct iwl_spectrum_notification measure_report;
u8 measurement_status;
/* ucode beacon time */
u32 ucode_beacon_time;
int missed_beacon_threshold;
/* track IBSS manager (last beacon) status */
u32 ibss_manager;
/* jiffies when last recovery from statistics was performed */
unsigned long rx_statistics_jiffies;
/*counters */
u32 rx_handlers_stats[REPLY_MAX];
/* force reset */
struct iwl_force_reset force_reset[IWL_MAX_FORCE_RESET];
/* firmware reload counter and timestamp */
unsigned long reload_jiffies;
int reload_count;
/* we allocate array of iwl_channel_info for NIC's valid channels.
* Access via channel # using indirect index array */
struct iwl_channel_info *channel_info; /* channel info array */
u8 channel_count; /* # of channels */
/* thermal calibration */
s32 temperature; /* Celsius */
s32 last_temperature;
/* init calibration results */
struct iwl_calib_result calib_results[IWL_CALIB_MAX];
/* Scan related variables */
unsigned long scan_start;
unsigned long scan_start_tsf;
void *scan_cmd;
enum ieee80211_band scan_band;
struct cfg80211_scan_request *scan_request;
struct ieee80211_vif *scan_vif;
enum iwl_scan_type scan_type;
u8 scan_tx_ant[IEEE80211_NUM_BANDS];
u8 mgmt_tx_ant;
/* max number of station keys */
u8 sta_key_max_num;
bool new_scan_threshold_behaviour;
/* EEPROM MAC addresses */
struct mac_address addresses[2];
/* uCode images, save to reload in case of failure */
int fw_index; /* firmware we're trying to load */
u32 ucode_ver; /* version of ucode, copy of
iwl_ucode.ver */
struct fw_img ucode_rt;
struct fw_img ucode_init;
struct fw_img ucode_wowlan;
enum iwlagn_ucode_type ucode_type;
u8 ucode_write_complete; /* the image write is complete */
char firmware_name[25];
struct iwl_rxon_context contexts[NUM_IWL_RXON_CTX];
__le16 switch_channel;
struct {
u32 error_event_table;
u32 log_event_table;
} device_pointers;
u16 active_rate;
u8 start_calib;
struct iwl_sensitivity_data sensitivity_data;
struct iwl_chain_noise_data chain_noise_data;
bool enhance_sensitivity_table;
__le16 sensitivity_tbl[HD_TABLE_SIZE];
__le16 enhance_sensitivity_tbl[ENHANCE_HD_TABLE_ENTRIES];
struct iwl_ht_config current_ht_config;
/* Rate scaling data */
u8 retry_rate;
int activity_timer_active;
/* counts mgmt, ctl, and data packets */
struct traffic_stats tx_stats;
struct traffic_stats rx_stats;
struct iwl_power_mgr power_data;
struct iwl_tt_mgmt thermal_throttle;
/* station table variables */
int num_stations;
struct iwl_station_entry stations[IWLAGN_STATION_COUNT];
unsigned long ucode_key_table;
u8 mac80211_registered;
/* Indication if ieee80211_ops->open has been called */
u8 is_open;
/* eeprom -- this is in the card's little endian byte order */
u8 *eeprom;
int nvm_device_type;
struct iwl_eeprom_calib_info *calib_info;
enum nl80211_iftype iw_mode;
/* Last Rx'd beacon timestamp */
u64 timestamp;
struct {
__le32 flag;
struct statistics_general_common common;
struct statistics_rx_non_phy rx_non_phy;
struct statistics_rx_phy rx_ofdm;
struct statistics_rx_ht_phy rx_ofdm_ht;
struct statistics_rx_phy rx_cck;
struct statistics_tx tx;
#ifdef CONFIG_IWLWIFI_DEBUGFS
struct statistics_bt_activity bt_activity;
__le32 num_bt_kills, accum_num_bt_kills;
#endif
} statistics;
#ifdef CONFIG_IWLWIFI_DEBUGFS
struct {
struct statistics_general_common common;
struct statistics_rx_non_phy rx_non_phy;
struct statistics_rx_phy rx_ofdm;
struct statistics_rx_ht_phy rx_ofdm_ht;
struct statistics_rx_phy rx_cck;
struct statistics_tx tx;
struct statistics_bt_activity bt_activity;
} accum_stats, delta_stats, max_delta_stats;
#endif
/*
* reporting the number of tids has AGG on. 0 means
* no AGGREGATION
*/
u8 agg_tids_count;
struct iwl_rx_phy_res last_phy_res;
bool last_phy_res_valid;
struct completion firmware_loading_complete;
u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
/*
* chain noise reset and gain commands are the
* two extra calibration commands follows the standard
* phy calibration commands
*/
u8 phy_calib_chain_noise_reset_cmd;
u8 phy_calib_chain_noise_gain_cmd;
/* counts reply_tx error */
struct reply_tx_error_statistics reply_tx_stats;
struct reply_agg_tx_error_statistics reply_agg_tx_stats;
/* notification wait support */
struct list_head notif_waits;
spinlock_t notif_wait_lock;
wait_queue_head_t notif_waitq;
/* remain-on-channel offload support */
struct ieee80211_channel *hw_roc_channel;
struct delayed_work hw_roc_disable_work;
enum nl80211_channel_type hw_roc_chantype;
int hw_roc_duration;
bool hw_roc_setup, hw_roc_start_notified;
/* bt coex */
u8 bt_enable_flag;
u8 bt_status;
u8 bt_traffic_load, last_bt_traffic_load;
bool bt_ch_announce;
bool bt_full_concurrent;
bool bt_ant_couple_ok;
__le32 kill_ack_mask;
__le32 kill_cts_mask;
__le16 bt_valid;
u16 bt_on_thresh;
u16 bt_duration;
u16 dynamic_frag_thresh;
u8 bt_ci_compliance;
struct work_struct bt_traffic_change_work;
bool bt_enable_pspoll;
struct iwl_rxon_context *cur_rssi_ctx;
bool bt_is_sco;
struct work_struct restart;
struct work_struct scan_completed;
struct work_struct abort_scan;
struct work_struct beacon_update;
struct iwl_rxon_context *beacon_ctx;
struct sk_buff *beacon_skb;
void *beacon_cmd;
struct work_struct tt_work;
struct work_struct ct_enter;
struct work_struct ct_exit;
struct work_struct start_internal_scan;
struct work_struct tx_flush;
struct work_struct bt_full_concurrency;
struct work_struct bt_runtime_config;
struct delayed_work scan_check;
/* TX Power */
s8 tx_power_user_lmt;
s8 tx_power_device_lmt;
s8 tx_power_lmt_in_half_dbm; /* max tx power in half-dBm format */
s8 tx_power_next;
#ifdef CONFIG_IWLWIFI_DEBUGFS
/* debugfs */
u16 tx_traffic_idx;
u16 rx_traffic_idx;
u8 *tx_traffic;
u8 *rx_traffic;
struct dentry *debugfs_dir;
u32 dbgfs_sram_offset, dbgfs_sram_len;
bool disable_ht40;
void *wowlan_sram;
#endif /* CONFIG_IWLWIFI_DEBUGFS */
struct work_struct txpower_work;
u32 disable_sens_cal;
u32 disable_chain_noise_cal;
struct work_struct run_time_calib_work;
struct timer_list statistics_periodic;
struct timer_list ucode_trace;
struct timer_list watchdog;
struct iwl_event_log event_log;
struct led_classdev led;
unsigned long blink_on, blink_off;
bool led_registered;
#ifdef CONFIG_IWLWIFI_DEVICE_SVTOOL
struct iwl_testmode_trace testmode_trace;
u32 tm_fixed_rate;
#endif
/* WoWLAN GTK rekey data */
u8 kck[NL80211_KCK_LEN], kek[NL80211_KEK_LEN];
__le64 replay_ctr;
__le16 last_seq_ctl;
bool have_rekey_data;
}; /*iwl_priv */
extern struct iwl_mod_params iwlagn_mod_params;
static inline struct iwl_rxon_context *
iwl_rxon_ctx_from_vif(struct ieee80211_vif *vif)
{
struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
return vif_priv->ctx;
}
#define for_each_context(priv, ctx) \
for (ctx = &priv->contexts[IWL_RXON_CTX_BSS]; \
ctx < &priv->contexts[NUM_IWL_RXON_CTX]; ctx++) \
if (priv->shrd->valid_contexts & BIT(ctx->ctxid))
static inline int iwl_is_associated_ctx(struct iwl_rxon_context *ctx)
{
return (ctx->active.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
}
static inline int iwl_is_associated(struct iwl_priv *priv,
enum iwl_rxon_context_id ctxid)
{
return iwl_is_associated_ctx(&priv->contexts[ctxid]);
}
static inline int iwl_is_any_associated(struct iwl_priv *priv)
{
struct iwl_rxon_context *ctx;
for_each_context(priv, ctx)
if (iwl_is_associated_ctx(ctx))
return true;
return false;
}
static inline int is_channel_valid(const struct iwl_channel_info *ch_info)
{
if (ch_info == NULL)
return 0;
return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0;
}
static inline int is_channel_radar(const struct iwl_channel_info *ch_info)
{
return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0;
}
static inline u8 is_channel_a_band(const struct iwl_channel_info *ch_info)
{
return ch_info->band == IEEE80211_BAND_5GHZ;
}
static inline u8 is_channel_bg_band(const struct iwl_channel_info *ch_info)
{
return ch_info->band == IEEE80211_BAND_2GHZ;
}
static inline int is_channel_passive(const struct iwl_channel_info *ch)
{
return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0;
}
static inline int is_channel_ibss(const struct iwl_channel_info *ch)
{
return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0;
}
#endif /* __iwl_dev_h__ */
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