content
stringlengths 1
1.04M
⌀ |
|---|
-- Copyright (C) 2002 Morgan Kaufmann Publishers, Inc
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- code from book
entity control_unit is
generic ( Tpd_clk_out, Tpw_clk : delay_length;
debug : boolean := false );
port ( clk : in bit;
ready : in bit;
control1, control2 : out bit );
end entity control_unit;
-- end code from book
architecture test of control_unit is
begin
end architecture test;
|
-- Copyright (C) 2002 Morgan Kaufmann Publishers, Inc
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- code from book
entity control_unit is
generic ( Tpd_clk_out, Tpw_clk : delay_length;
debug : boolean := false );
port ( clk : in bit;
ready : in bit;
control1, control2 : out bit );
end entity control_unit;
-- end code from book
architecture test of control_unit is
begin
end architecture test;
|
-- -------------------------------------------------------------
--
-- Entity Declaration for inst_t_e
--
-- Generated
-- by: wig
-- on: Thu Jan 27 08:21:01 2005
-- cmd: h:/work/mix_new/mix/mix_0.pl -strip -nodelta ../open.xls
--
-- !!! Do not edit this file! Autogenerated by MIX !!!
-- $Author: wig $
-- $Id: inst_t_e-e.vhd,v 1.2 2005/01/27 07:29:29 wig Exp $
-- $Date: 2005/01/27 07:29:29 $
-- $Log: inst_t_e-e.vhd,v $
-- Revision 1.2 2005/01/27 07:29:29 wig
-- reworked %OPEN% setup and testcase
--
--
-- Based on Mix Entity Template built into RCSfile: MixWriter.pm,v
-- Id: MixWriter.pm,v 1.48 2005/01/26 14:01:45 wig Exp
--
-- Generator: mix_0.pl Version: Revision: 1.33 , [email protected]
-- (C) 2003 Micronas GmbH
--
-- --------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
-- No project specific VHDL libraries/enty
--
--
-- Start of Generated Entity inst_t_e
--
entity inst_t_e is
-- Generics:
-- No Generated Generics for Entity inst_t_e
-- Generated Port Declaration:
-- No Generated Port for Entity inst_t_e
end inst_t_e;
--
-- End of Generated Entity inst_t_e
--
--
--!End of Entity/ies
-- --------------------------------------------------------------
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2014"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
isqMkDcKu7KQMNJCXEgttzHNKSL8w0IKARgd/16QvkMubHeodhh/nQR+qr9D1ovjf7uovptCB29P
KGrNQ4ZLHw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
HKYdQ4rVtWDNOGysJxFhDUtmszeBRPv0A3eLV8U1biqK91tdFUFcdTnEO3YUdlK6DQO5RPKca96i
Kb0ZA5j4MRhEA/0xm5jbVH27boCymaEoMxHZy1BA4FkbxEp1zcQ4DDxgEE/zQvx3zWpjDsP04HiL
IMwJE7nTzz4zkfMyfsc=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2014_03", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
axZyK3Gg4qXW3rDYhJl/yDUkQ2emT4N/8WCP2Dm2LUtltDfz6+hb/6QA/mz5Y4l4brWvQmTW8kAV
x4EXH5+RaBCQrL9GBxfGU6mnTRKKY1mIXQAWhhMZrLXqMzG6j6wICIdSA54alNNBwB4nzHUjXMu3
Xebwl9BWIfSL/CpLDy8KxMQgJawARNnoi2Y71d6yPWdyYNF3Ek1WKHOMpK6V8B0VubiZZeTaMmDK
SjxHAk+wAF+E25ji4sJ5u/WSYgSLll2mnwmpDye+DTJfktISsyFCtxPrzMnH46TYRLyyX/SxBCCR
JaJZ4KcGONA3xB3TkdslzuUYZZsBDeVr17SKFg==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
S/NXN1VD8eYc6ixw35u1tx4exb6CUiqoXD0y/kmOPv3wC/4NM8lSl5xN8XF2pZfVUq4xE5TF8xX+
2EuJw8JNV+BJE3bq1+LrhH46fjrscHJR1fP5hbgWdU9gv4ImEfhIdtXZugacqG5ylp81KJe05z9F
I10B90lVkhM2TcBIZoM=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
hynfmsLZL85InmbL+S8ruPopVSOaQf6MGHdgUt9XN8r/pp+zReQUI/2SgQuTYiwQRrDsHS2tYK14
VMUHesyxhMxml1dq18sXhapfPeDg4umPor8KK9hp4aKk/zegqiC3jTT0Oqg+hdkNvYJaElccNPcm
gjVk5kyiKkcdpKIlEAt+b5sKE56BJhn7MzerODMDNfDn5lzB6NlyfueCSqP99zoLFuWrZSP1kIG6
Qn5jsAQEu0yEBqfFaBp77DfV5xqxmlkKLrX11m1VX7qNrjBXFWzM90uFEwhMYCzlXY/2e9hJ9nC4
sscDOnSprBPpmDFV8evNTPeiy4fKNl2IEUdE2Q==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 207360)
`protect data_block
2s075IExLDi0xy+BZJmapKjIeZeyIL0/y2NjhOMXlns19uPBQcCN41zMqqPMt4+64eKKyPXwkBy7
x8lUo4m3fzrgF6ajLe6EpWuqvN07RbNi59UEA5OiKGhMYBf6OnD1+Zt4U4wAEvviyH063Gs07JjI
a9pf1838qg0Yuh2A6OzVH+o28FoxZYPA+8Fs3VLowp7mviAjX96yKyBKsRBBdFwPzduf/LXAye9S
kcRLyA/vGJppjDMmAQhoW+2I+4YZ23efLdu7eGupBMfAmfwgZFzBTQeqs3pgsigx3GCAaHSDt+m6
cpeYSqC6Sf9L21ZlYk8oFazFWlV3rH/dl2ny97bTBDVxKxz22CI1PVUjc/oSuihNigpuU5sBgyk3
oPB5+t9sml8nTC312fAIhUrG/FNE88MHITOzd5g8nQI/bL/FgJslK/+6URwkLFs5PLxUmWv/WXMS
YlY99EW5LGC2fO7PVJJr1PrF+aF5yTf50pTjkQvpU2lNijXpXU9X+tg0Q3uzeuvJs04oOBTBH9eN
a04tFYcdM/ZaVaXj/M4IYPaoQrwVvsk9PxBJg7QWnoRfs+JClSv4V5Iq72HKgGEQwOqDbtxqLWq4
UDXW1bx/YP+LUwRsbUWpY8+18FXPMrm1VqsP2H8UHd0jltYsclq1cH8KiiMdWKQLUp2mxFCR6tnk
hj39Rd8jTGdcSizqd0xhgFnqXc4stLQqX4yXOaecHYh4Mzf8W8/HqJTqwnSnplxxzfkN4cf7u/63
BaTdVzairMFW4AS/iFnBoFpzJDcBT89gRBCh2QR3CuYrxDE9GSz0qR0flNKCUFYLVQvmo4iSbGTM
PlTfuqC500dcwxD6/PCNnrFLwhW1igwujK9/Zpxcn2XSyoH6bgT116qzodE8H3QhOwZCv7egH4v+
VrvTnVBzU9V4oiSLm349J7uqcZ8016aiX/6xl801CaACn+LqlYGfSSFfhM6lr/YJbIyDI71gUmY2
ecbYIGfJ5c8DRVW9HI7V7/RhGBOY8/MMw9ZlI9jAJcksjTTFDJbSRNFFobZ4EgSLtwsfKgpEHWxM
GjfDKSebrFkFfe66VDePydFVRVs561ugmRt8wyR6iFSJu1Slstcm3oHKd4S9Yy854nULQBQS+MPb
jvEjC0955x6GZIkOtqOC15OcbcEyoDubecNwVRTkuIod3KleTpM1IFkhDNweC8A3EtiCec0KjXJv
CIvOK3UcAxHFfZ2QQcuECLaMJ5PdHzjmV7NF3dJ6UA1An7ljFUTTM3pdbjUW+6pfz9AejTAm8lSs
T8302oD0T94jpYt9dMF+ttBc6X85/GF9dsiCFlHqDVRNKOHJIpAUo3TsKZDJkTAoFwMQyB6u4tUQ
SzI28WH6GVhF0+cVvvsoAEJ6f9hSR6OS66JlAL9i7bHkH1KvixP55h7iCtAdtkk+3NELRu7dbAwn
jVgxavBP2eT+23BL9wJ88L8q3QA1PafQWo4IXOSt7ZqmAISXl0TBbHX3+BSFw7Zt2zgLaUriYImL
GR7VBwctY7C6ZHnAwpWWO/DXN3r4+e1wHzLfmnpuBzk1awHmGsFbmuJwBHh8TqiKtykRo4b2+VGa
VrEh5ipSv+dmjovJ546i4Ls+o8RyvxFI8NUVtRCAGXt1QpVPb0JIdSyNfx2/O8ealcduulKSpDt2
hOilkaksWkMARuwLuj3pKusT+P3pb7e1S5TaozTp/xA6CUc7gWy0sKpZJzDJqQztnN5d+L9udfmg
WcJDBRJ1FXLb9fpxC8ThJ+tkNHXoepEln0OBC3PFAS71OQLnV++pk5Nz1lliGgbB3SFSNyh5uZcy
RPT10NpI8anwDajC+YzcWNIK3pUavb7NCVdSrB2FID14gmhAqUsuGLzaoJByTiEo85ADUAVq213Z
iSEAqobucNb9vNnLYCRDHTJ7FZaVmmBnQoPhxRzOlwW9kqHhon3LIYWTbJTXKdjiAWhj6S8gReDd
m2PctZ6CM0ttwTx+MS5GTF6sefYZmJsysx6CgDfajRHEVh+ss7mNUDPKQaKeUdn/oiUoQVn6RE2g
OdXVqMAlPqadUVaMWsRDMBbiyRXb2o6elsPC0vSgnRulbSCrK9t0xKd5eqIWgbZLeN+xkkUbtQHE
LZ6ivZ4vJDcuiPBiTMWftuwIgd7KuqYuFgkb0gWervfppZqDS2acYi2yChjLqcD1xotugXImRzFx
8ym6oF7wstUDltfSpK71Akk8j5j5ji+8aDzjmu9yDT9d7/kpU8djDJYSPogcl1THPfu5PRFB8t8o
TCrh0WGbBqn6xhmG1ridLOF69JUgMtAOysekyaWcbaZSPOELq0FudeI3LnFFePyeMQ5yuRfrE7Z8
DMeu03ksOKqOlJlRxstpN3xb09jmIAgwMqwtLbIibQP5bb5sh/gKKrkX8AxbMEI8j/Tbi4mPGz6Y
B5w+F/HEg9bNgjnkFjfiuQL2Eu4Tf+Ndhy0v1aTHe//VOCiFitKnZL2wtNeE2uhjE7CKN2Z3nKnW
Br+KZaGShv2R+wLli0RPHS2C5AbUEsJkmLfQbK/j171lvspe+elLWsqNMX5dh90GQMgk/PqB2fAE
fvH6W5hzm6ou5dpjyPlfuC3nq89chJDaEA95+5rax/x629IMpY/fuIhGstPIE1pOQj5ckcpzwki2
TXJLsmCTOlMFedI5IJti/Uo+k5dIMRerHiHUqR0OBL/52vHTQMyO0dg41BH90ayRFlf3CD1qOZAu
/7Fnx3wM+gMER0PppU+i/qnx4y6zC+qs6+EhqjzpZbFK7tDkVGdCDZI8VDvdCpgb73shbO9tJq2t
k3iTYR5YkbAK4pRlHSipKZE/HJqLMm7+/qugVN2PwYFRd6nHspMppSlen+YCxY7wzv+eQkTpmtGw
vJLgwzFdnEOPZr2dW7RLYU5C3RYvAmA7ST5G+rznQv6Ts+gmvgpRqvVV6/N9HseT38WETg2XoGmj
eVcGfm7jv/l7K6Pv3b7ye23K9e6Zj+DZZ8CznNsBcxlagREC/dH6O6JUvFiwg0Q4UnCl0Bd/bFMw
0jQmHqBmtn396MN0rpc4MsbhtRQ3XvG23xWA/JUsygatgHdsKYKuBpDuWDpHosWHZdVLrADonmJh
gl9/tvYiS5/HY69Pz5kAy9INqHVDcWgnHITI4DysEMhiDlPgeAmIqpS1R2papJEHI5m+VG3hNvSk
bL4dzlcGoa57ESnbnRNgJ8ac9o5LQzdd8yBq8y73+UV4lpdQxIPm7TKk5Ny3xz1Hy5ft9RiRv6EF
M9uk7NbfOMSVq2ld8OiSTaj16j/d/k6wCqOhbTjE4x4SH6rieQZ7TOkvWjnJrENtvA7evC9FgLVY
v5EowymHNi94od1kFCNzp3W8y0jklA0nKepGLBjiEo3MpFFzwKF3BRn/sZ14b3PKaOUqYaZT5xgk
FZ+ij94BGBZFnDPRnqppYCWGh9cBeQpwJQYm63fE6oRp8hXkEwiGTolU4uq1OdxNZMXM8IIGT93I
XNOvgXq5q7oabvQRa5sRfoQSs5nuC9gRCtUMaveleIry6ish0PMNZLIQJRSkQvTFeKaP51MxSE9T
/RoEXuDM/ElKyFQA4vsZ5JU6aA9x0qDo4mSn8FGmsH1H3HWvx65DWKkZ969OPGAb+yauWPgIJL0E
0e5XY0MEJ5JS5xQpn45G4NUO1vaKFxHoS82GwmOJL8AcAChekcWQy98rhqxQbOMP0xIQOHZprN51
PTGDgry+BpHkbt5fCP99997s55okncAM5eEvTUJb+xHEleWCM6Idktmj+jpzjmE2cGV8XZl6676I
99PQqdxX/CJMc5dlIho32X2vBg8sCgTtaRN0hAUlbRFeuOWcaRLwyyRbj81aa0iDBIPN9Kxhkg3A
6TNLUvTVRFoVaUTyoyCR5QimyP1ZECghiD41rNchpEfcKAJNDmd5PRy0jS1gzfqgyYrvHgh9j01d
IUEJAMqTEW1gfMF5EOQYe89nC1WjvOCzHyqLxyH1Bx77iIug9JMSaE0TGF7iKQvfMbEA4/NtmvNx
s3SbWAQ3g6rB+rpBtK/ZxLBIy+MwurMbIuI+uLyLdoEDApY7XM1LDnFuwlbmkMnRUI/u+a3C+Zkl
k23XkSW4aXTpgTZJ/udLH6JRsvQozWBskrUaSfrRgNbf5SsTOrxspJBTFuckLD0xfSwZ54W9kapA
h57MThu1NT6yJkpSMSmIa4jicxEfr4nyIb9bXX3y9jluLo7c1mMSbRE9QH6Fyf++19xeSH17hJX0
kj9kkYvHNil/z13TxgPmUzReBreKpqW5quPBS1wV3PkN7ywvdokk4euX37r7Q38Ctyh+oLS9McKF
1T/agqvIQHOT3IHfl3PAr2aTHjtiyLMTx7rkmq9AoyA2TlX6aKmLJmR3FPG+KqNGAa9SCuR/CAgF
5dFnPq0WjjXevBEoa34xedztyDiEVV+PN4FlDz+ZKesTNAdy61CnGQPQNrcUND9anFb9jCHbFXhq
F6Au/U2Uj04ngBGF7ayYZ4yAOanDcNiPP/aGC+sJr7p0JfODMstofXETS6e5EJWDW8BV5BCEKJHr
aqheYYYAsZM+JK6hKYurwzmuvYAh6D+qfqL73/qp31POz0P4krAV6x4tOPuKmhwVl067S+qZEjPJ
lClf3ITEe/t75o1EZi9PWfljzMqIRxo821WKCJEjMeDL55soMIRg/P4SuxbN9H5o5juWIKAI/tlT
HYYrbq8IwJfCsXuIY6AUEAo+MWzuqwe82wwQdBkwraERo/jGiqYYuWelLtjckvJdt+5ERheKaxYw
KUCd6BUCqvl0TNRHKPYZOfO909KLuX5MmkPjDWg8aI2I+/z6AfwNqVxf2pPZBI9tvLSJnK7DJBde
RX1a6Id1/QG+EXfEFdehZee5vYZ3R+DKTzyjf9kRX0wpQX8MrTUAmPXNGKaAMHSySgj9zjcFHtf1
2vmFepghnxrlb6MQPkIvpOgcVVp56SlQGQMvbqeYaWe8JdTr1h/rr7VlSHV7pXwRaU0iweI+Xnwc
gHW7pOOSffB2amwsWmR06XI9q8R/PL7IWMybp4+lIfxYhxcSVFJFqgkz3jzysOBfcAtTt+Gjn6t6
YUf4SKsvsJi/H7i2R7kwC+4hmp5ojcpBZagCZYtbEWx+nInW46b+vc3XhhuEbOhxxV6isg6vC5TL
Q7KO8+01GZs1Spiw9NxYDDLgaPBsYZ48zycH2d8f9Y5j200kq8hTlh+xOvtEMRqHO/rYCJHdmc2U
MlHnbbtGXI9HPHmLSIiJNrJkJncFx1eYgHpcBmnPlQqqolxQVNG6Ya8V/ZimDd4PiuMhnkDm7zQl
/8NgZdUX1eIhN6zxPHHOdSJIgBoYhCIs0LFBfLi75oDAt2Uiuog/V4mPYWeCR/vRp3KTZ2FtmMqL
jB/L8ZYqmaHiRyOqn5M8mPBxFNFOH/GJGWW6RlsWcAvW2EiiwxT4GmENEmBr1dlQ1qRWmZ2kDdxy
WTyVrXOQfv96Wjqa0t9PP60oDxBclozAJyrQ1VFldARmpD+t0+JxykKk5xOxBJzJGEF2TssPHUZm
/E3Tr5vgv1EsekKNlQ78gVFbFyQdei78PTj377j2zPEKn86F6euqBuCHlCnbJ8sIE+aOr7RHDxtn
y9LyzDCEh3QL2mqsprZ5XaOyfgqvmv6QgycOG+gCYhE4O2oRF9dsiP3672Y5lR3t4dyv0FJjhk8S
pCOqubXWjQtkaiK3dgc6aoxP0rQkPSvIDWEs1wQxOX36Tr+kloIAEQxmGhBVfcp6G4d08P5q7Fok
vQE9FaAPReKmH61hAsi35bX15W4oZGqLLRUSyRbLWrNAUKxPHKkiTys5e7h0SuAoyYNY5Lnz3fC0
+aXdv4jdHbocAR0D31t5zRjt++vqrl3KoerIPuSVc0Cxxa/VgNELKqlmgCaWbfUwtU5v71jhrfx5
Ho+xTiTsbPRBX+8q1ziBRxatj+nl1BvPC0z9RhUU1LI8dkfQBagi3nmFdxknXaXvJNax5wi7bzT5
yY9TRiXQJgB1uDs1IlJiRG1CYvfItLeGdix9DZN2Tj6MKNb/cvX5WsbMyFXpBMZo6xpsXBXx+uhd
FEZGCKOjyNW353luharM0qvZ5BdnNRel6mlOJsl9CT6VzjVfTGcYpHEA4VM0720SPn0mpK7kfi63
qlftFkbSB48e2/LKge+R82VG2hqGtSLbork+0if3LqeryzijsnsmGpIutTxSS7tCIYS81919yL2P
vOujxqeIV1RmcBb14bxj5m+zFbrtLZzlpmWnD2jnW5xkbU52fIiLwN7ENB3eU3PFq2z05Bf00wej
3pJccyAeTyFKkFSiOCnFCioMHPrB6AVU70T3+rvDdAk65BgUYcrFbgsWi9X2B4Y2TnZQg3QsjFzY
sgwl9BBUdiCJJ9Yek1Ajs5lctgbLpVh0Y1GjrzNuaAJOlHvIoIs9VmC/Fj817RoE6fqw8mLtgH0n
ngE21pi4BMhVj3j4y9HH12AebXlp7ommkx/eexeA1t05xI6qfxaioITDKKIjBlkaWdGEGIiGE31k
OqK5KLA4f7Gg1Xjt2wdXM35CNUmk1YHW/rcF2AMDP29HrCD9HIznLPmL/khSzMqvQMK3AP3wZNOI
RaeB2LHALqi1SoBSogvOS/Mtnu5KcCQMDUalR253I8hvrULLGPtpjA6T2u1pvwXH+SQehdDVvLJB
cqYeeq04ed04QITOd6AdqkV87he/mVODoM1InzWghknZVx/o50x3Ypj+MVFGkU6KhjZQD4kgWtcD
32yzWKXjSv9f7TD0jfjORCZ6Qfk84wJzXSTJ3TSh05VW2YdNFEhva9cIkw82oVljZb88Y899CAVN
TLK78bj2fD2+luncmAb5tr7ySsLa80FeAIBqOVNuVb8014OJy5LtedN5SJ+DnZs8SDs6141papjg
XDmrBMhbBGF59o9nxIeKNphu/OFD+YUeMgKICTxMU59uAYin9CvIr14mlzc3BCNmlM0vV8nTDBnP
P7vTBrf+zF/bSNWzYeD0LEEpN7rwI7+p0V3lIaUbc4psoRl0pC3xwuyQGVAp5LrIeTINSSyk7AEr
v17T3rDd0tbhGpAJSzG3VzdSQgOMxTPXlzuMil0HKvpcPvnLpKOFGpEe5CnjOzwn+coFF/WCnvlC
mgeMeW5c3kma8LKPK3ZWlK0ybm8F1y+oqKG+QGdETokIjDJViq+vWUl9tVw9jj7vyvJMPEF2ykY/
TO3ebLzL0F0oGLdDFQu+oso5lXzw9PlBdlR+vBN6oHG4c0S9GREjuaF/p1UJsQ1t2r7VO5uPpeOv
zySeTLBgDvFPWVKh2WxmxJe4q3Kp+KAHD/e0nx18b7dQ30ub1myUNOr+3i8cTpVhKhzArDJACIws
FkkVJV+tO0rWduAVwNMqsKILeOWBD4W3fre4vqBMwBSUv5Elxut2PctGrczrMjCqLKwF+tuxO/yD
gV3Dlk3yrC4MZQmD/bBKoEthAMHF//gL/2EYAsmI3VDRL60twkCm/otafNZmjX82jWLh1HQ/OJ1A
g9wVVqW9Y29sffKqH6sHPqT5XnKK8QWdp4w8oVoG6o/BwJnadKbFfdTM0Cg8kycMmi+Igo10Y/Uc
QCbzLClPU/wKiFscuipPCmx8UZYiYWz+Xipm9uRrP4IpVz2fzoXoekXaUR+zEbDnZ76CAq/yh/Z1
I9ahHs2CQJ3JX1D1DPBrv3/PlAV7bGKxcmLnU18n3v80VpeCrXweCMdXB3eMm5BkWFzRPNUTRpcR
emWCEzdGTxsRRO48qxXiHH87dwDslsCtoXb7K/yqr+MCORLjaj65lVqO3jwk4em6MbGYU1hMhv44
5YtHMpVh62ayAcJ55rZZMw6IYlF8KQT2CfV9VCj+Jyg19KO5cizJKhcvCuUnEOjpVsw560LVjW80
09VN8RiLHvNxOSazl6iAx9MTxIVl80RY4EhqCVRe/n7najgRjHLgRRyONsaMoXSJoglCkoeBgkwK
kZTRTTPCksK5JusijAGPTxrAAdqvn4ESZhwDZ2iVjolqjkwxhLci+J6kxIkycqEfcXa3WpUUOefP
NdPqctkzkOB61rHD5YjmCLhQ7wm36XcpvSsp9V+OP4QJahoy5ga4mDxrxDrKtIeyoq4UM36p3QX0
b6Aqsj+l5f8uO7uraXlQqYu5Y74Y7ev+H3ImQZKAKgp3dFHtGKD9FXeatY/UH6uI+fH53uq6xX5m
GPaCL29HejOlR6cvK9riXXa/1WvnDRw6Ns6ygzMCKEm4xJyMLgA876liKo4dI97wEIezi1NNmZvP
JzgAL/VVnONCiMDuM8cQGROydsGSl3sQBiW6EIgh851Wd22+Nd21TtDTi57Jil09QoV+RN77pi74
SSvx1ar+kR3BPoLNhACRp/hhNhhjlLJ+h4VDcOTDiimsBFkhFRIeRDM8Kh9sDHbma3rQFqNf27hl
A2KiUe0k6/D/ZtzK+q5H9vKSPfBpqbW57iS0jFrzdpaIgVO0kiyp03gNa08AOhlSB4j+0PyO3VTz
A6DA4cQFqCBSSaQJgg6wIh9Cc+dDtoVzpgGen/RV+OEEd3yA0dnyD9RwRNsWT36twwBv/nlWFibx
DATD+4Icn24Z82fmRs69TrjN6hovV8H/PjDSlxNAkoTf/MawzLNWZc8OSlq1PSPogCx/HWnhlCYL
fCnlwdSgO82xVPzk+U9RztouCbsCSKsTjkcGxokOUY8aFHQSqtO19WcUVrcZWLf5/bS3EiZ2fDa3
PY5DZDScYvJDlCBc9sZXF060DSKsewMDmj1Gq+ACsCZTaikOLs1VsAFKYRwhu3ilNnY0XraquCIp
aViI9WJmC2cOp+tMFpDHmWqf5l5zTF1r7AGWzETmKSsl9i18Nrl3/Yl0td25aZj4LVRqa+CpYnaA
SyLYqkG1hxK+LG1ZF/MNTBx0GZKXFCo/Dym0xSNoZywCH6/7qtmBmMEEyeNaJz0NRtvGYtrm83+v
G/CK+/FrpIn3YeyMZyfli8svdaKvCicK5G0Sz6Ki7SPza+GOX9yEdJAGCZ4ING5trE+aO0+Osm/+
Dm7rl0gdbfRJ5iJx981XTNBdLWEL+cvFkb5+Um4Xlr8/uN4yALSsWSLqAEn6qsLJ3EfQZEfPYJMY
nFQZTjuRxBvdj8/brRRtJ7IGdcIhHega37VyjAEkex1mTNkwJZUq50QTj6pqPo1vlrUskHuQ5Mv+
MMBZ6RCm0e6IbfPUgidtwYfcuVqX5WP5gA77bpVRiVlhk0sEZ0qTAlvJeIr0kmzh4IPQxCR83r2r
HYI9qC8TUphPz+urityRLxNyngQSF6cwl1SeMr9IB9+0nP2JioBY42d58pMdpyn12s7dnmXB8s9u
xBv+qeySI2qeGDBB0WFXkmF+lO4liQ2zAKzZUa+5vCQFi58JA/oRz74jDXumBLZUQH2P3i5edWd7
1slqVyvky96SQSrV2jRz5tXgPZvdAm+nAnaSrjMh2sdQrMQRmJ3nE4+kz1vndB5+/LrY3O5pJm3/
kMH/ak+urQ3EKfDohr0Tii4ML6MPR84G1opdUzq6xkffdocdD6JvGD26zDgH5Oc4xFHkl3PmJYRS
wsYu1eMhqNonBrvt06MYpqFCmDKuyU0PY9fnsXQDbiPG28mFN2vO988Kyc1SVf7dvxcTLoIrYg9y
wi73FEEHnUet3Mc1FmaSA3GtftBX92usZfQEs55LYPgfftEi4AwE04vK0JfjHgA4mocNWD66MMSu
KDuhe/d0Uugi0iT4zzY7uouHQDEeALRo9phtQP+fW23MT/7NracBuuhd1KOE4XbzXG4IdBg7i020
wvTYs3FWLPtVf5h6ljN0GiDORAn5BgPKBscdnicRecK496zZ3v4jv72AqaFpqntYn1EMhm+GuABR
k4WFpQmMB6v+XO/hEuwJFWkO/YoZZb7mGgU3l3fR+DsZCwVf6i0ha41PX3zOuQFPjlCGDk8MGuDD
XfQPIXTWTd2SU7Hq0RfbUq+eg3PvQG86hmzwuRzK+j2d1/CLU1Ks4c7Hz1LvfhQej3MC+1YRXWE0
4yxSpoqY8JTaPYoh5hxfLSXqgJzgF5VdyOxBvJlVYuCPUL9Mg1K1dFo9RCprDSvqaFnMwMTcbUM6
zuUx3l9wb/Q0OefUSaGdVUxXd/S15jNXvZ0ZY3qEHlkg3fKH+A0rnWCia0j1AJi7hYg4qEeDQu7c
PPmRwG0d+HE7qRHmqViAB8GGyAjyhyBsK218CUvZULKl6oaZPq2OB71xrzSU1jOWjSr+fnUFVgxZ
L3c5LFg2kzBMXkVrhQJTMt/irm9kRmm8Mol/xQ/Tv30BooeRZk4Jtpx4MlTuC/nyk0POLbIiYHrm
HSmma4UEMXga0xpx7WaxP1i/Oz1X9S7XJUKTCkSn3FWfPBDd6+fErOOeKUNZibyQpgMRby0OaMgR
Q6CpMNpaFDSt/2LpfMtQ4NDJLX8RDV4mRm4C2BKfLtdx5z8XRWm0Gw9LAnto4Ds5SpShc11Ws8yd
hgYOGZHgSCdLUqB63N/W/wJTfs9Umdfctk8z/Yd1TZ/qpKIDhs+yU/yzhUxTcz45bvCKIsycBBgI
/lJID+7XJQTy1/ZC8J1zpxFNV+q3INWEUW4yrKYkc2mL/ObNuM8P1eJtcIDjR5EZXNUkufFVWPLd
oETXTJTN8X0oLAO87R9+55Aguy76FHE1Ehet5afnc4rslcz7zJm83j4ku3+I4LMzrbb2/uIvyT0Y
KON/n+jpNk2MlhwfHM3zipu5RRaKKgXi9kw6V7idBaIEHkAwHvDB/lYnCu/CctoTLniHMT1NIJQm
N4WEOTJhxNxQDI2C/GFzhDT5O6kP0ZT917CwGgsV36i22pFAiiB2kn4y2IHRFS4/VKjlXcJS8roX
zeymhrGMF/R80O7Yh1Dr2Zv8alcvNzy374FZUHmcV5q4gTdbogj0swkBzdYFJMp4eScVbV//gcpH
rUBWya/qLZXoWhoM/KyAA238qkTY/UaJoxO2bdgDgEnK/ZhDTgT0POwcp63Z3fh/IRLHNOlUdyTC
bWwcWfUF2Lbzf5JOQIuUxd5NyVBhRnh+6JL+jSrDn4h+D0Rjj9OsKQggaWGuliR+NqCVASVklZaV
527GKuv2kYxoAhq/mbd5SjcOHzXHBs0famTg2O1FUneE41ijiDTVjxt/HEX2llS0EcO4ZYq76i9k
2dV2ubbEIc9iRPhxAeHTdW/eXxYF/bjPPQSBgmdKNf6oUdFhvs9XFSTOne08tgCixBkT+ToObjz2
vRCBKXxGqe0cZ7z9ROZN1hEkXRPGSw8B7D1aTh7B2dTtfJVn2LUvtQZf3iz8RXkcp2hPE3Uazzeu
QGLUYm+hseyDR3x9qitQISWBzvG9/8ryiHeUrm5CSNCGJP4TCzkDH32HR1RWP4TtHNtx2w0Bfboj
QD2wveZcytQKa1MgSdiN9/Ovw9rfpOK3wS4sue1mKDYaEzjFxtSq3tOR8JwsXS8abVN2pAZzFsjS
Rla66WW2aewA3BaVzUHRLJOyhwSCcsmcevUp9yhyGeF8RKuSvMmkMWUm0wWD8nJwxYI8J4WJtNw+
F7bqWD2g+qjx7lpKPU1jO4vVfCxC2nDtRTP57VWxDCAbWIcFCn7G8GnxV58uocrSYcM4WO3gM4jn
eq1faBZICVaYyuyVMahH3V2f4AlBfA6zAZdE0JM5hueMurPZu2RjMtXPcM87Q/rydeeD1qguNeq5
cImZlawvkCeNOOww8u253O6BfL05ZgTedZ5sB/u5+otbKcIXCGs2Lk4Na9PpU8Kvro5hGUP6piK/
pb6fTgZU5ZKbs0W9idiZ+bTmDjDaJ9lXXgz/iQCqh04NBi9zECKlxUXW8cbxEeSv3dCygJXYqb32
nl7rGvBmoaEZMlSibLV8ZFrSNDPRjnSh1bWxhn3y1WaWPfVx65NfBl+hWHytkNl+GyRXS+raOl89
xmVtY+Nz7E0Alxl5YjpoJ6kDWbOvMTXVRaeAHFhxs20yjsdLdVe8WM64ylvqvuA0qph9XArIaFd2
smtO8Y9fLB0Jj5SPkVpyD2ZzMrmSTldV+rcfgzx9B0A7sX+FKh5LFJhZE6ppYYHEC/kfI4ZBUC28
rdihtDXfgS51ekjU+rNK1mJNtbkafuRzZe5Bes4maB2cIDhaPmxvlByRL5k5jY5cQm/HarnZW1Xb
Dn1IvpYicwMlw+T29s+Hfw2AWQr77TXSNHwGhQYoYwmpFGQez6ILQ2Ei+jPDPlBb5H9pKvSipORp
2Wc4OEsMKTqnOQlQi5vF6WRzP347RMLA4ASpxxgYHCW/r53IbvNYpaGCI7ee7JFSSJfeJ/BVrUGq
4rUkbyYPM7HNeUwd1O2EgcjsWhFJT174tOwZzAaZ1W8CLbV3OOGgbK9wR7ZAzCxXk+B7DIDFQnxi
wLD4k7MZSDSnT2HwECMcX/No4Hskn34kSHB/RpHppyxE+wG2+P314Ed3inTW7BG92m8lKKe0nq15
RgP1y7GfEUStg0+FLAq1+yhgJAeaMGRUFLWkTCz2TctgsAaOt9/kcYuQrE4PBVwdDwyqMUI7ENI4
hqxPYgpJtyZYe/eGU74/x9AUMHSAcG3kY5tB9xYUsY9rmIaJR6TRzqztewkoVIlkW0jVgyTBZIsh
SzMNbs4kZwskaZgoZzs6Li4+pGE8p89e82Y33ZCkLBHfkY9VJNam9Oy2GqNcWcwQ7hXaopi90Vmf
n+bYGqVLinJg0YG2fjmDOMpxVSKi8FfJw6DZKxNW6RFai7CTQNQ+XJ9WajbVhoYYysrbfxoniZzA
XGe7S/sSdBEZtJ4ToeTz/NV+hPVbWLTFvdFFY5QgrUw1DYSxCcMj/z7Fuuk+WuU5evkmz8xvKn/X
ESMlcgTWvS/hqzcHf8F3OkCfojCYXG2YwM9CevKrpmZwaEXZ+2CB484ycSqHXVXBs2UbM2jiCTcD
9ZFQuymYCstPU4Zw+Ee4VIOvAOGLvqWO2EmwrZOOeALIvY7nOLxC1ZBbJ5DCW61Zf/cibNZtZ/c5
ZCjLGatvTkmZ0lqZdToulANMWdtTNZA6mr1eUiXqNPsIqGr6YDSWfT39rxi48tbtxxYI0uCJANbJ
1ffQlvCBVLRKDZPp8UIgaXHvgLXQokNLcOgNx88DDNrZHE4PGKTfP5bcAriVskpS8E9pM1ukhiPE
blKT7Um8N7Ss7/SPgN5GJxfT8yPN+5+96UYd7nYfFhr32Pvu8hMc4KRRJBve2cddmvf9SRqnM1o0
1suEB4NxccsG1hmR+W268SBUUtMnh4zA2zcXOCbHByrPPIWKWpYEKttlcE18paNuECorj/qVkJ3y
Ac7XXK+AlCjzyup8BrB02LAarHLBOY8JdpqlNU3ENqHabK9ZEESstrgHKyhEqLLMDFgBg+KHXQ6j
NGVKI9rnv8msdhI+PLRu7xNa3xecy3NqfxvGprdUhFA/HNTKoqb7Mej/HJNABdMbM3Z+/SWrwt/+
Zw2HEhcIC07gL67n4mAZ+P61ptJl8QDv28zalzzgzxJbrsFX+oqLwrIIyOgKRESZKXaRkF4KBshC
D8fQlWHETlLjGcR1RWDC1EppLpjMbAKxv+gcNafT4yJj/DGB+cFGB72clC8LTZMVH8EB14VUhaDy
H3CWvr46M0iAAFEYKda6txCc2mAFA+m91CgwOLTYspnHdK4vfeiS5N5C/kdNZvpoP9kkQ39ghLez
mjD0lQ3NFWGkO190YGQA9aXW7brFp8s3dA7lmRFicAACd7WO27ZuswRMlMdYXItTwS5gQd70y1em
QnBq8XGZnY7pvYCnVDXXkP2BrA/I2TvgpDPepZZB6Y/jtLygIqjqzAjIKLfuXdN59AiZoLXP87+h
SDLslnGy/EdAh/aehJXgh23sRl6bEryBHYFqvd2swByhGGtv8lzr22WaNxHYxAmn27XX8AQGZuYc
ycZqgM3/2st78xZnG+txanpUfMC5R66G6bx+9MtRA5pz8PAMqKTpsibDEz4PxwL2q+kG10rNHGfG
DRNvLVLSGBG39Ow07KRKYZ7cHA2cTrUjZpjZnCQuLeHZfDr7loPjnhjR6iTOjj/TYtHs9jGrOf8Q
RIxrDGOb8RWG/m+cQZ2VPJeURcTH/XTRKvCDKPkYSTiuQvfbSr7eLiZmwMnOHtLlshGbusNVjVzp
VKT91z2WlUKi2NnP8gPwDthsv+PV2L6WkcDshXud0IYhUaof9zZbHbhRiPiQfnbzs/X63q6ThQBh
EbaO9M+8YUURGErhJU8OdjcCV7jLk6hFly8Nu7aO2MipDqvAXt8E4q/9Y2Pl9U4mcEL6sNu0dt40
vmb/dCOH2xWkBl8InysGzfSEVRICEZXOk4nSPFwUVwgx4u7JDqdkruv+ZVuJuGTImeNqDFrIc/RQ
Vh3JhzEvq0v0/Ykeb0Cn8lU+h8YdOlQDnqqQ6R1xjT1IcVHniaG/SDKMknvyq5K+aPkRpn202PEz
mj4cEuNogLqRnHPb2MXAczrldEYk1PmPQb3eHgfpXVfIk0p6we+hmO4GkJaldhYCr0SqRAZ+lt+R
ev93FU0lMUilIhbYcuXfTDrnM/R7uClLLjfpBqUCYZlUQhJftPyTN3xjlXHZYKL6kIIFShAL/HKC
Rs1Vru3CEY45wEzO8F9c1ccGmQxwC6slprUkn0yNoZBn11vPx+o3zOppxA/ZCG00QHlJNIXy7RC/
JNtgux1TByo+JxbpJEu2TwdKH9cv5Vb4lHdQcQVN0lmW1vdDJr+0nXltMSj8zS1qT8LafNrIVzt0
3bmuAmDtGHJIAcd90ffdy6hRkoH2s8EyKSsXb5UkaAKdwtLy/BXg+mvZoS8UcBlkxyqcD2uJyYJP
n7g5fMv9j5vnvzAS8WvEZ0lH1/+rgEaEfA7ZAYJNLMFwlJwecpCSbcp1KNr9z+nsmEVo1uX0fCsZ
o62aHuKhGrZQjRWCBaqB6+sncGSTnvOx7CBDS9p5uD3NzwykQK6VygxSNL2NXnbUUqAPgGgiWHm2
u64ZFY0AREc3hWfHNmwyhqZWUe0RWUBlqXrPHnAG9ZDxy6fs8v/BhOb5QX8VJQdRNtgzIEbJdg/3
qUvUxybRpJ2Wm2ljcGSj3v+rptJcG0d3RAUGsGZ9Wb2WyCoyJIvPJ9Opy3rJdK8VRR/VNnVF64L/
XWFLt0KWzTiDeu9DYIGPlZn28M/6YOzrLWMLSUTCvN7LQDER8caDvVBnM8l1mlqIQF248I6Q6jHQ
BArMptaj8p3dN+hYe3j73kkZPTCqL5c86Etkjak4lUQjuh4aHpzi7kHShYoCxYT19t8caqW8gYHT
WQFYGtFnUgrgjbkXBQy9VTdgKiHlPXOMThdU7v3fJrtd1R+i0V7Y68jAjUE+WFoELn4cnHB497Oo
/xDFla8B5AUS6BOxioB0rh3g4Aq917T3SRGZjSPll0lNWgpJ3s8F84d8n8NJA5l1f+mTOGC7TpJo
NiuhJ2PizUxt76QlAKOwcXaebWo5t1yJNmYeDWMKpY3zDEsTFLWmik/xWB/OgU3xWWeYdrrpPUUN
ZI3AE5YE70zGUbT+nOEUBHRsaJJMpPyzoMfN8KPIvHb8x/WCO7PCAdplbZBD0MEJP2V6WffNOpCP
nhbxPNpyvODTAjDCzoETdu5e9KG9OU5/yX3AhyhfnV8OY5IM8rzjj65YHqjQe1w8IV+rWs6tWQZK
wWzeK+ljuJi4Ef/XPSz20uM1Ru9tmM7raP+4OupMSkdzViKZK4geDdmaSRezNhaDi/PlnX3wxhxR
5azFwKphybTs8crHxIMJS7xTOIfhh7TQCUkqaAj59ClG7t647+Y9CdJibfgD27EGm0F46eassGlj
9TmPnHbKu7BlbytZak/kQcp+X+eGNBFYRUQLXII4/Ixw+vu0I4Uz895kT99Z63yL8Ku74EMl1IyB
+PtTE1OuTek2VXAiknAfGfMBEYfmo+9FlWeKAiV+qHntFn3fxXul6Fl5IWkBfov2n/Iq3t60ATLk
KFOI7shAtpTbW6ze9buDzu+PZTfDr0Ciz88VP3MM4kyCFL2RxMXW1nxHlcPAvS+1Tir1lzfAjAib
a/vql7+YR118Wd2cv3IkVI/a342zMehPFUWtl0AVNvolYb3XN8S6SC8JsTWuudahVOVmEyGxmW5F
nQSFx2kuspGUA7SMNIX4WzrWSy2CEsyWuzjoXTK0atSGHIfXQRpSEKMkObXJ+jvGbhJozpVaY2Si
X6/5Th/OXqo34ulJDoMLfhNvUKjDesaL23DGLkVETVaEJtTEBpe2+kGCkYwBgJy42LIyh5ddNR8a
jrcpuix2/+BMDkP74oWv2ZgltfhyhdeM957W2yE9UKEucy/fA/mWNBy+NRy2og5wGZ2H3MT1xy2j
v9LEIKOy7JonyatiL4/gIQJO52AX2oCPUmyu9PCmspXUfB08LbwhB5ltmJ1gPjWmn5r11gieGhiJ
AloI4lyyooLUa5diVCJCVIOHgY05GyIqyJC/dy/GUTCdKHyBg4bovcJvlEMJ6tpcDVCTLQfI1DKS
kDWTgkhy5KsoGax8cellxYEjMPGsnmNmlS79yjPAk3ze7cI6r66wiNNzjxYCOvmXowZeWChvMpfr
/WryuK96KozvaeSdeqwrFbQfpyU/IxxVWGVK2V/oszqquc2GO8sD698I/ZykNZykARvZbM73tiw+
uBEwdCA50dfkFViF8HspKEd9swEi7QjjczPnoq7dTRbmx5NrROmk28yEPxScdYVUqQsA7KTsGnHR
3azVog8Pfl851DBvGr9e3N6SCF7jFD5SQSnSSGyQtUvhJiB6vhZINp/UDO2FmPrS1MXXGOOsoPis
gefNqtKVFrN6SkiDZZ33HV3p8TUG2w8p8C3wnJmwHUcO+CroZLAnPuxJWWZMdYbqCajP2P8Q/oqv
GSCiVloUAXVu0JMFtpID8wRIM+vZtOp+RMOGd9qZtAxfNtWwz4fioEZ+TlV56HHGDWYJEG6yV1sW
jRrSmZxxMijfVNPVEtW5BDWTBZxlCQNeShwYOozzlEMqG7CZMEfrhA9VBOr46T00GDjBXpdhGMhb
HIe/3sqPBhlhjiPfAwzKOi/AMVLdOvUGWq73I37OmP6uxogJ+cyf2PMhRs+WpAEkoqBPy8eBSM5t
vtuwraDiT8YXgFYSVhKdkyeS6e937G1JCoG/diQTJzL1RxJ8i1DH0Hb8PNtq/jLFW42rabKu50EX
SXOMcr3NjwO56IysKr/t6dl3CIHMntHLetJh9SXsOY4NKd0YYAC0AQbHBstizlaGNUsSnc7IaCli
3B42uQugHH+XQ/okRFXki6p2ejPZNMqI1XhWPdQlpAf9havYykcquQwxksYHrkJ2pH8E746a5eRq
cAkjbw4w80iTT4fv/aC7Et2SXGXMNUMSlIUnmxb8Upc4eOhSQs+rvN2z7UMIRVsbSJ6KCnnjfGuP
MmzKHeLlA+HJOYOjeCVioJpCm0Y9ouYuRat+AT9ngWpuHsqKK2UObu5/dHCYuALumnBJvooRS0V0
uFuNwOipr17h74Prb8t/6lUFcMU3pUanRwloGnXP7kt1TeuDMPZEFPsE09vqKAvjbcMWF/A8G/7R
RV8PF3R9T+8PxRG4qwbac4S2k8ImMSPOe/eTl+8dj/Q+RTP5mZYrGjWEMdtXHMhzHDybUhHF7/lk
VehnoPiCLP15oijXTxnmbzlilKaZpScr69BoCdcwYPA2uai36BDIPbpr0QntTkrGduvr+TcZPerS
gHhwO6EZZMRXvHe/c+K1DRUYHZayAzazDdb4rkfEEC38JeNIlzFmGYTENC/1nsgNT9txQwXkUlaM
Vmcdjd/efBPGRS+uh4P3EK9ZPTGTWp6VRTO0TySL1kws0C3Xp9ioPdSiflZQ010SPf+b0G2q9f+M
aHP++4VGEy0x9hHB8t5MIUndqBKCy3q7NUH3yZbHW0fQ49Kcgs6Lp0uUoQCn83r9jRoyFwxwgA84
9iITPpHJU4Hl8LZB8+taUdeRBr1RGNRzlmM6KgyRmjdLJJicyeA6Cp022d1OpN3ZDmSz6lvf/8m4
B5+eyd5UyIxfJcOhysc0otn4rLisOxThKic1m0b3DJobCgmfk8/A1bNF7j0/L6yzumJAhK1e0dj8
785B0gp2aWuv1ki3vAyzmOhX9NsFI/VsLEBqaNY6jox6hrddp3HmqKxZtxpX/W7SJOIeU2hNq7KK
8Mdaeqxlc8Dyz4uMNHCIQ7ltj2VFdaveSVh8hOi1u6HjIzrk8zaeVp07AMrN0EPrSDAxTXxo1Uvs
eUZNHH7gOryQVSD/UT9FLulj4r+P48zmCPQqUCHjky1hCY4dEPSUe8Yaex+SC71M/arJzL3pW5O1
9ed5edLlUk5oKDEpnQhpa+oU2usSIlIewtlLFzCOWR+mka0rU10HSjguf5yPcDxbC3SPI1lET3ET
AbP1mi2q3ygXa3zcS7cMwVdWL+oQicM9LMPomLjmDizWExcrOOAzFo8SwcotGjvhZUEB1MBbwn7G
iyUFizb54bmvEhmIHLIvHz1DMsETbHZEPqG5HxK/OpWzFYBd9LyZ4DgJkiak64xBcpbnl3X+EhAR
Kt42f1rv+KeL8iN+ORHX7BjewHxCKL9DfbylnlesrZTTz43jcGcXcPy8fsrQqZrDC27kMYdgfKyH
oY5DpXUPerFDM2K1OmL5f5TCt0DZ8+noON3gRU9fUAjjiTWiJNH8Kanuw8L0SOCpL/cua5xH77rW
OLu7S7aUP+ujsue3r1Pr6UNbK7kWyMuaH+9MdsodGxa/j2n2f7HU+vZumDTyksgb9EuLH/5f5NnU
9O1VGZCBv6KaShbDbHfGIP46hAWHNyJhKVSzZ+Xrc8PVXl/la+LV9OqlSoJWkK7oYNl5QGs1jo4Y
DWRIaTepEjpf2Z+y1a1cdRGxxfjlaXn8mKQVNsuJHhQChWTbSIa+i5VKFO7WJQ45lhCXNdCZJdt1
VaxcbHg5qWkEAeVdmY7ZybT0y9SARMIz7WiBi2IpSTZT0A6YgQTtVFM5gYFkZMroP6U0Kz4s0YuW
qcV93lyb8tOrRXCmVHiu3r5uNVoBVwYPuqnDn0kr1uPyIxijPzeBfqoBHCDUpiLBMystOdjchlie
2Rh6mW6K8Xl6QcPOMqfdaExCSjC4mIatmEQ24I/7KwhQzuFrxTv/xKrAFJpN1SIe+Doo1/nxD0MC
B5y1yyyCPtcZWEcwYKalMlwj/bU/ENZuOEjOZoHUhsSLM4YljQR/sRql/i1/I3vx5JbZh62Y3NgS
O/fvFJa6x9kybCHquXiFBER6MZMj1E6MmdT79iDZnatwlxlJIlWlRphHlqc8VdJt3Wz3IzqlfasD
oYgLgc12WwRaXYm5B+qqhq5Cg6/gw6ulr5c4/IRhUwX0cKbHT0WXu+w9BZ918twDXAMxBBvxs1Il
fJQNnv+gn8O3nwrNBsP/SWGC5R3EAV4uir+X5ichv3UaiWybnsesumC6ceWmEsUWksZjfLsuv0rh
aRRP3d9ZDiNhNRhPhIL6+kzdZFYaMzpYaMlV+xRNL77KVzykNHlAlpaAW87PNqA6l+Dh+RdGCIBQ
MrmYEhKSCARNVLgp9mKyYUSpNdlLdmRJPrTWhLkUEgS+8Tas1s1zav+ublIa3O9pm0OdnaeOdTr1
oF1OvTEhHaYZdmpnKga6e93bNCg0vRACk80I2NtLtu3p+vIyWRo4wgBpyB63d2lLJEhtfGhpptE0
h3dSL6TBsyKKqi+dOUXJOGdkbJL6TxXbZQ4EsVUJVY3KSqlF5+gWDlY3p/abV58EnciNxHXhJkGV
slCLmFfowGR9WSpYDb/UFPsHpqA7oafRisb1LL07vRpdCyLDo9tdkZ2NumcIYZijCjiVmVMsB59F
28XJHiiF5Ihu6wl+AGfMHD87HB+w3A/t67ZVCS5Vtvo40Jhz9EVHDWCjkK0vv48JJI3HUffkqKMr
rZFTQ7bQPHgJfS1h2E2rMxmdDcxmpXzFtWhP55mPuDcgsetTTbg/xklrmkh+1Y9PSqpTMClZ0zyO
mmHm4lsXSMkhNQ1QOmXic50sEiq8Uf6nMqjNNbupT9WBi9UDs2bEHJ6iiIWoh/mdvhQrSLBWgNGb
QLf/c2CirIf2fS606Za4rJflf1K4GU24KDIRGfBIjjOQq6NZyJC5t40K6rQiu7qfCMOdcu3wZCw5
C9O765A4zogMKdzC6pFTRn5q3Bb5PSQnIYMNAs+cs131rF2jJqcnY/uyuvUmHlXFrBRI5aTpsJZG
dugAsOlnfbP9xRuRP/bekioN682bfixUWXnh5Q5OxQJS64hKTIwksZjBf6OIz9p7gzAT6iRJcvwd
M/0iTrJdE3vSIcVN5qksuDDeExS3EpktSlS+J2kAozejiPX08QnmsOnHthrybyhNHR6kQCLAVsoF
XkcwBtC0TfoLQoe4Fx61flEyMdKMfq65xs11Uaz1GPhnWoy7eHuPvp9WehaMEyAX+zNDizxjAJ2H
cHTwfg9nq0myO25I5qSk/BjRYkw1J3P7t6LZKjePBq/K5qacqiH+fYePhofZr6SPD0tMVRPiFEFg
7NFR6Abg4eyrblY5N6yMijOEY5BHePziarTzDKbwl6dpodnqIhExgFZ1iOewe6E9OLAHpGehXxy3
dar/WkeaDoNc4H6DgjiJW3eISAvJp+2/UTHePJq0qBEghi+k2swEQsx5KpnDfZk1+WxMp6X6SlQe
F/lJZEUGPc7ko13/Pflw7vaTQzjBl2fCtdQjHGbgpPZ6mqAqBgPDnghcH7Uk9vviu7IOnLpRNVI6
9JbgkrbbXtvgiQqBIUGM49Y7/B2KT6dYwZ8Q+TiTcTLoXGQeDvQE3sECB+GUYw/2jwcgbSu/Ompx
dlqfu2Z6fhWLkuqmXWwMrejZm8elirlg5pQpX+nuSnozD42/qcb3r3lBW6151m94gANZzEcrfeqW
kOoTaZ3GQ0xdexdYY3vHBCVPSPWd7qwch/vWyJKF/dP1LwRWPn36wfflKXPNN1O/vLmZxbxBgowT
GWI8vxkKkJABOfqMlUq6QxQsscLqUPbs9tX0caoDot6ohwalj8ukQp1XDgsvmX4Vf0xf9SuOKyWf
dcaySmxCtVpSqOw2pRsaAQMSV6h+70jdLlZ9KcV2WIDTMXqtEd3soDWh3AKfBHI51ypaeRDTxMem
LDBkewETFH5jX/FfWL79Guv+N9YakxZFrVueOMicpOOS8CeoCoU2vT9SOC/fhhPxMCXG59+kw6Ki
VNcPnMa44LdX5pbJZGStUwpl3HSPK46K0SqCDk4PQbs3L59IzkFfG0gacdeZmzp+CYd7JIOoWTl0
J6mnoQBfLCjEKWsFDoyqN6qLe0MmmrSDlp8PV4/kGwZAqiuYxD+yNB9zsegdhopVwzckcY7q4JMp
nwpEh3Tv1lSpk74sOvQHkzInxLgc5ZY2QBUd+npZ51BAwb9Xm94LtwFbSQ+pZcEeEWBUio/A7XIW
ssWMmuiwazcEIwoEMaixJFqN1muZab1VYCXzJzu1aJ8oIGxlHSicdouaot5BnwLG/0JNnTkPXjaN
LbI5rmHef198bxo+uz1Y1v8yc94ZEvbsatkuj0BTSsEbAUTP7jKC85Qn2e2jo494z4sOXtZggqzh
qpSwufDmwr0ecNlTUL0y+v+sczkHbKu/u/ZybAHZwSpv1+Y6qlY9JowPm/ZhY//rcZzkp/Fl8GMH
TgVEbHxjwFPfWOgTfTUYXjGEXmQf22xODzTdpMM6c8MatODces16KeAsYPXk8q1niHt0ybOO8CGO
perGZocNRk3mQoPiLl9KQUQ6x3wtH40ydCQVc7FRuqEbz0jNGAo8gqpdbPnGQNUr2lHbZJkFoO19
8j5uKIskYmjzEPvvOCGzPlA9igvaZlfJ/tJUrI45tOYzNCkO4cmVxU3zQUb0JEBlWG9W00mUtXTB
O334RXcxxqMszMbzZwyEh8VrKCIj8zaM+Ai99LSXoGOHD5qsWrY/TEGlHgK/pwL0ZkC9Jit4JOdE
/upiiZtl5l8cqDv3RUoe2HCF71UtDIIa+KzjX6qp+2QgnI/SRfapWJcwoeI4zMw8HcqKvQgvFV4W
7Oww7wwHenyXyi13aztaam/F/tPO34C+I+uSe1n0R2wUCVqRHMU9TpmcGW/hLI3RafwLdcpJMqal
DHmOuNx867Z/X2u8ZRQnhgz5uj+6aE99bvGOy7w+nrqRsUGaxGV5g73yzhywhAAPCvb1XaIVrHBV
lkvHF75v4U+WaYUMsehpcTJHE3TFuWgQirjBKHrJ2kZWfQfIYBuwDtRwLXe070t+lcK+4PaS7S1a
FwQJJ/8ng3c6v4pNyACsWQCYJTSXUnQj/nuPzxEmaS1iocmxTMq4XTXIWgqhvNC99yWXFoH3xihY
mbKI4X6B3SXPR0nSu1+vX767nLaeIUUxeog0Q1asqvx6BH+UQnLetv5DeoqDZw2u1kZ4Wg8/xk26
l6BCIu1CfejXFSv/MybBWdcclyY0xW0y7mtEUOl1C17SlXXrXbOd0LtVdxxefeeFf4Y83o5jdlJg
/GYBhZgZ3GC18cD1lm+UPY0PY1mrTs93neBGYU5RmJDbSaTI2EOD8iHINp4xTyF3XVl9OIUcOHqw
vMQMYQngzft+69qy4a6zY2uX8RblNDWtPUy8FESBVmYS28w293/BUd8SchT9EtjcaYgdbZbB4ZkV
f6t9Ga3HDFc8FwKetQokBcBTnvf747Ivirp0/PHMo82P7h7b1n/lKAknewlw01ayW8Fpgze7uyUj
FxcZ6lEgrApNK9ioHqa48yS2r++sG8TJ5Vu1CDahXAPMOstH/2i/f/8aw6HJvRjlUMxCX4pNm8ep
bdyv2Uls7dECS3JhFchM2GR3qBEP/ax4hu4NdxDovWx+pCOn0xYwW6sbqyGFz1hXx5TzSQBeIe26
yNWObRpIhqbVCdWMaPG1B6me3e9xZC5mrWcUdUYO9B2xK1q+ZRTv5Tys+pNnsVWDnKBIbc7f6Kb4
MEDknzg8j3OcbUpZf1rPETWsk0itWZg6pVhWsT/8JSODqHni2XJsSWU6xv3Rf5mr+LJntTEJWnhg
jUhdZODCxsehuKBZEQ83QGveuyF/lNIQ95pqpVzC07nlRwkoZQTBYQ1/utvI/k3/cUStxfoROrwt
G+lqIOBY9QJQl8aUp7/gDxWQo8ZL4uUWlYly7kTtQu4lBEFg1dQjaWNQaoTuR/CtdZ3KmRn9Cm09
m3X7riY9rRhE+ABG3kN6ncUQZ8iuN0SqnYXjlMWH069rCPfoml6PfJF4GplQ1e1TJPmEFLdZB+8s
vLpHt4GCRmrdmgQhDCBVf0EKH5xeFxphkeXDgPDyDJQAKS6aHbDICrpEDklr4g0luhT7gtjn12DQ
Fe6grmyFeP7AyQLQIKlLa0ssElAwZ22iezcux3XCoOCBlOECUvm9iXGhnaMd1gf8l+3fgBjFzn91
27zZ49qhAjwqUK51GaFmGSVVQ5Nhc4IQTodrhOsUJN4Z4j9bkxulS9PzPmJVt9yyX9limABBng4G
0gIg/BhjsejLf9l/h7F4gIqvq0OW9+jiq/29kHr6bz9Lptnw593jzjSaHkBaMH8xLs24StzWLhl1
yZhBnvWwCga6IooBEkyKzEUmcTkbzlkLSYQTWXX4Yp95/w70DGcMSrx+p+mkfqxYAzrz59QN99OD
2Kg5EZ/vtQliKlQnYZkREfePnQxv0NTkEFIPPeYkrBLCKa9daSYiHDLK7/UpA0pt0pKSrBdLZald
fxg3eHfKTpJvZLZxSdkaYbkebv0A7GBpkM76v4Ac6ZUTzg6NOe1wfjNUPU7RLMoCp1JG3DFSv5r8
f97GdoLpNJF84aNJK3Usi6FDNv1Ck/0gcmOCwwZI8cObTYWNRM9QpMOKNHKnHF4bjjPrHMdSv4EA
mFyvSiFxvFIY45G76V+X89cN7dLneJ+ljVIJHwA9g7eMG51vjmEsRUYkZkO974ca2aPmnPwp0a5y
PaSksuh3S03EIQS881hd+bd44TDu1XYZcSF16u2023fmKyqYKjAs+EkNyZO3ooBOkGeyn9iWM3nT
c/SHa/8MKHftOhG0Rurs6B3SVTh3ipBC/N/mcrz5FzRzDCDQ165ube43MRfxCZ0H6KczejzBWJkr
iKDCh3he8176BGqhgxesWt4yUqOv8+AO1mmtsL1M5kflhNzBxQvJK8HRqEGKtfiXgNGpmkEzQJBm
0fhR8BgRBBHgmbLpHSHYHakScA32UJlnwOcgmNhgRI38v6dMAxWADXPh354ASLVY23KkdurmPwz7
NZpx7rzTTIndMDZl2euYnWLvnUtwxHoZ4H5aJZq2tKW9vvJUxRwMPrebxUzZfb3VcON2trq8fVpo
9rU3NLTlmQwjUKiVWp/joFx06EvbkDc9MoytyeG7XBQQogj6CvCfEXGubVuXAa7+LBCya567R7qW
tQjuvDMP2gR+h9a2UkSg/64gsO66JkSz3lpooT6FlTpW9IPkB2s2aRudbCS6GfuxIIUXfxU5II6D
a/mFUlkHZoPwnq2OiqCAsjeFiJ+rQQ17lO5M7EXvsktGSUABZfJ6tbFKg1EAKSffDLrTz0ELAofJ
DVX8/v1Tzzfrjq3azngMXv+jh4fEJAc+5tCaBtYhIkKz7HXO4z5XO7cp/B/xHVKEgulDI0V0DmVh
D547QM9qua+78ZDAO302HD69IIHH0n+tFIkCDxyednTOzu7hgTeCvcvtLtdu1obaE2Ud/NV+6dh9
IIMBfdL1Qv/C3j+H69qY3u6aktQayYPyJ/s4Phyjp+8Ni1b4Qai/Y3tbD/U8j1DRJCF5hfA0fTFN
BFi4BuI/1Q486eRH+iE9YAi83Suv1ab5yyKrzOw7++KuYqpk0y8WBnYhldjGjetuQEFkyV7+m7nO
UbaZNYw/hbygvFlGCGYcONaVrlai5C2hIa45pQDO2WtuZ83g+m2KPrCAMVPiAj1sIJPgZxbIbcjY
KjBUwePSwdLVfteSn6EpzBABLBjrirV8dwYz/06sUtF8BBCHv3Uva5Mziq/sHJBw5caDr8pRws2i
JaobyddKhBJpIrdMdRxFz7NNGS6WtBlGbaIDjdxneZGsZdtBQ2zY89c1BsnbD26xmR5gcztZws1z
WkfS0jkXb29tn+61BRL/aHTbFZnWtiPecCnF7YE9MGBnUKvu5oxsJjOq6Zo4ffFxqVqpntba1Oeu
glw2TPys5ukFkyGllCzm6fg/ReWxnCttYUvpUoupOwkTOTegywcmLm/zpocI7dI+4jm/nH8255DI
Osu2czFsLAzqo1CRGK5DWVkEb6Od7sF3fyLAuDvCNHGCweH4GWa4zHhuoldnqDMsXFMFvEY8Ow0u
rMvAE67HEJjOs78gfTvt6HG2oJc0/WPvKavgIAiDCqQcJYHGMF0NcEyIJc8hDnmtb5h0WmEvPGu6
gm51iT64ZuWWH0D2E8wreFiB6whz1fuxwey2AtOlewLy5Ax0DUsn0ycytM+jpB1eeq60bE1F2EqW
9gnQ8C+bEH2c/ANIQA6cmEgC6lEahtjrpM7dqZvo51LzmiHXu5YzBRO3774Fnxe3P02i35EoxXe3
CYIFvgUuFhsKArcQ1/uGNtbZ6RLlFeeQgYf9P7cOCzJ8GzT+k4xoYTKD2587CbgA6+m91WZu6obY
JsOBaxBFRoKv+pV5OnyHVvVq086slkM/r5k/UhEAQ0/G+bJmsrmq+DHhUveJ53ezDWmH068alVjm
D2b4MnrTIpoOm9nuCxy2xAzIsfmm5yN6cVzfiyXFndhlfNNuRh2f3NE/vdzupzEOuOmHnqT1WZz9
PHH+FMPOjbT7pwlnfCT/WHZLcSsZGPzUaMcSS+Nw0oboxBtTKrNjLYPbvlhcki0wqTKGsTJvtef4
Nyv6rttvMGO2jX+eLoMETQB2Xypf9EDAA+dLaE8PUJ0YEzqHBg9ppSoy6psOIkLF9TquQ1yS2Hzj
b+iq4/TeflSrtCOhJuq/hc9cY4xpgxpp+dd3i5niKVvXKg8x9AX/xp4dtOuXU74Rfn33AtIj0EHw
XGlhkpaKUQIIVKD36wbhyLY3QbxXl4BHvXuXDZFfGhiAmKYSkqmqpbkWLHo6rGk0Tt4AEty3lRd+
5lLmoCPOI2ldaJBvWEgO1D/ocjT3NiuKTxf8tsdI148XhSgeUxU8AK6G3bq1/IEVFLwvErg0mhqB
YQ7QUkRlqC+s8ih4wmdbbZrfsNiETk7Vn3dW/q9kNMInE3ptl8O76MCiSXmR6WqJYtwnJjH7KEFA
WaVl0O5ILz4nO2vd4R4uwblQCLRJZqfTBIW0udVWrdLGw3ojJytfO5dC0X/s2VUwH7kKgwlm54Rp
OuJmtcC0qt29Kbs009lMLtt3bAe7jaAqro4DByrON5NFGWuOzWBnXdPvtU1YdbCZaTRFhlHFbOdg
86SbgZX71P/b0H7tfBpGDig5uQSGF/6dPuaEXAQNJtyzTYyeKayvnve0jUD23uHOrI4f49zxhljy
Rzj3WwyOK95X00XxT2DHJ3KxccvAkiz/Q5aJQUmP5eSCjR79AjIaZYdOpP54WY9VN7lYVTEQRmiZ
OfN4Wmngq75cBEomRvc5NkKF4mrRLLU7RhUJP5FxMM7Vf9MVDiqnKE7XjlSYWsZC5TohshvtEcPE
eGsyniGEzV/sZj8d6Oo6pgvsfkNkg1hBi2F7PuO0Qk0ZBcIqIyMDzu4q1WKTwUDE1+lhbhKPeNyJ
Vyw/xb6/2j/uE1sUEct7j2iTW6meaxrOAl48JZWYVMSgWfNWbJbmTS0zfsVjPpPZ+3cNnss4lftd
dxlJSoZg0ZaIg4cWVPxaE6O5DjBqp8p0CvcVUEISc/a9U/1zwrlq/CvTRIxhG8HoWYzreyF9j9zr
rPcsxYzM5B65dB/VxfeI6oDtKs2FE5ipL23Bhwj+sNQxAPIQbLJqMK1KRCIS6BP9dFc4T4c2Wmgi
5ABCmDhHA7kyd9iwaa4rToXhNV12/wc3nTdjSPigwsHPWmwYjQVSN6CNMZpvSWIyJfiJiU6TCIlL
mAzmjYcw5bU+o/RrfSLANA+OE2Y8tthlEt81xLDgEcY1eCA6ytHtFMhMuuUmeapQqQM/Khz2yBNx
Q8a+c4Mn3kVYXIUOiGZXH2fNgABL71Nz48Beh0aCFpnY1h/xX2OtT8lI9+n0+6I4FwZq3JOYoRMz
iPYvve/cd+jOgnIAY+dL1VkA6M7QiQQHUoWMkts4AenTO/hDk/PIFsWtCl9TPd9Jrx7mwDkqQ7yW
Rs0MQfl+xUGWkvgjf6ElaVi4x2fW4+wWYguuBOVBVQYeDwwpsfdttBk3f38pOISAv6vCooF36Wdl
ApA7mUoVqt027AwXcUHzi0OpgU4eySPwcMY9pv0ROf7hptJXAzT8U0DhL8WzRnZAGcm94T+0A0T2
dZ7hiZILf7Yx/eu8JPn5CCAW6YjlHJLG9mEMvM0L5jYze+ZgyXX4wfF0j3ZbF3VNeuyVfMXn0Sf5
yzT3n6A2EHIZ0716xNTKPz9NMd/m2AUIkpnpIRGWyTfS41GSOlcyncJNjgu2KlMBW5Ockwginkum
uWsoMeF+ODiyMUL/NauwC3ldSLmHAZdO4NthOMDW5f13Hvp4OwFpoXFOojb6rYqKsurq4qRXOKFv
XMFMforyLb4p87WihrdjYiswDKODL9bcWGtZ2bLxD0P4rDYKA98AXGHzoKByNMzB/A/TfPOGvLGs
b7x2MXS51JGpqSMt8W8jfd8IVVldQ6/iZCABDz19NIvmA5x2kfBBDnM208qUT51YqgC2CUn+SEcd
/UnMWXXAl0wIjUqXAWgTJ5Pb+h2nzSbABnmb+bRBeDbEwrQDpUA84hvZd7vIp4rxXNi3UwpB5gbQ
CS6awEiMh2yWwhE/MB9vZUg/XVH3ppgsFrAUdjLmvUp562bont63kE4UamkQpRtP+gYWygm0U77p
J1qbdB2yQFKe2ZjTIfy1dWZKGy+kvIGiD01eJQB4OTMwPgHr4LuHtjfJjdd07/sSxYngwd77B1LN
LbP41N31ZhmA1fYisy+nPK+SfTTNwSeFW/td3KGBnKAcPVp+jAT71eirpZn6+8nhQiAqjZ+NY5h1
//lDqWTMcQmLy5TcO5M+TzNteTe56qUdv6mUkgxB1Q4xBCtfw2iJHEH9XmlAzl3xAU0TAocsSWup
meNCUZBkBeFW1qafrr7oGU/QpFPPTBnhJcj7TKI2J32IFgLf1g52la5GqrsahtXsh8hbgDiNsKVA
9Bc4MDuQ60aeU2VZR7r8dp0Y3xJ80mgheTa+pH0T3+1B/WgrOMwtz8+7tMX3ubtVc8j7v8wiC4SP
DGJktx63xHZelT47KobNFwiRxbz8B1zAaK6kOLhwYKhn5ebyF55CH4hNSzq7ZycmrDiYGviMYNej
8EdPI+ZVStXvqmJixBTl8zkjE69iIMGfPgjTbcCryI6KzcHeDqHhHcuurWPuHrW2kIaT71hAJqRd
/7qHlFjAA2lEMlVaaLjXtRFPavXwJxRvdZZavcLEFsOlim4FK/jXVQA7MIaSYjkXYjutmYRxQjNq
Z17ICKP8zg/pSS4AdIPo3lDvHUmwUNJE5bBP3GlhP/xYrCHgWjf2UbjtOaxDat1s7rS29cUgxylg
zQEmNInjdRqliS3sxq3JvtSxLBzKhCMDk13cJgDUjF9fBSaA+69D4ZBVg6oVHOlf2if/c/wd9Fyc
4FIMjN3E2LZk/1Ndm4QhrYgjfE6kCS08rGGYtu1Eu1NLyO50PzD4LSHt2PIEPT/prQM8MVU1NLN7
s3OSpt7mGM48rHCd8ow4n06iLcBmqhUaKQOk3RtfN7gk1GnfVYDZMe+kKElslqmLo1x27JqXuG8w
v3RyGOwAPtb8pvtZXHYvZlZIRcov4b5f9QER/dcdaVihKVj949yEYmBP84M3HfuLXVDW1rOcfdUs
jMKmm3Vl8Z3+KabTjbFG9GRST6FlDc4U9+pAgqCn1W1ZEGQxQqfMks3PDsl2yLnWIQcJH6b7HWIa
sRW/+VlNWIC3QvS1qAwGUCigyejlWG/jEqgSovcDOiwjMK9xu+oNsb4VSxtGjsC420DSHBm9o0Fz
dQzNa1paKgiJLyByhz6ON4wfTt4BV8OxNsWU/8PbEw/5SjzQLScu+w9ZQIk3+tnMiT8SKMk4Nj6H
hcHSfk7Mz99sjHyxhHl6Skx2oTVB1TjPozvASVkNHDB4kwWeajx+Wm3w2Fecc89xO5v0hBGW1v17
zxNeO+rX32xJs1ISfMA6pZQO3nv1f9owTvXiY/B0hkZnxnpixu/ndUweH/FMDBa59OaKG642XNCg
8feeJh+iMH/0Ffo05I15QHbdPHY0+0AXGUwUhNzrNmnRYPffDUbskb559ULe6B/bD9fQAXNdRNFb
hu5pgcL8r+JJ75cVH1cr4i6i3vN6nguJOVFUc5recPCLVrtC8y5eHdmIF8Suq8zCXeCoRuXTYLev
N6hws0n7TapFLcUxrZ2SYzWmB1HqBZkdf4RsGV1IGdl/qG/YCBLu/gBvAZH/4AAKYm2/kcUmIGHo
5WjO3PuE7/vveSaY0k4LfSmX1CfOHRQ314uuotkQe/grugiqLwPE0ixw36Av8kvgcT4EQwwjnH9T
skE1kYgAeoPN55u+4bpF2+Sfbyhd024dlaGAHVxH86ZOaNX+DRTK8G2qlbNE+r2D9L2g12KRPR7r
i2Zbo09bw5c6B+Tz60OC6ijEEoSEoIOn0v5wK4fae2Q1jyqJ7jicBaA5MHRqfyyKOF0ZAyVD/Km2
yh3HxlZoeUXB/R6ov10u9nQHWs3YNLR6p81WrXZ8FxOVpOYJl87EOUKyC+DaFVRnyBUNMjUdwYb5
vP+xGLGUhmbJ5lSHrnZn/H+8iWkJRkkxtIxhV2OTYuRcjMHwsLMNhl9D8yFJRXjCvw1DSpS4YHeO
uk5ccinxnmCU1ly72+gRHVvsQOFubHgkxh/Zq2utNF9RTxq1NTYLM962quYw7AxauslL6nZAh88N
Whauj9e5trzQOQmJZhJOAn/3vUjagHhhBKc43kXqLVryBCa90IOpzsH0CExwpmXqFgRSC8zVJdDW
RUOHXOZ7buPUEql2nPJ8dbwmsCGxRJEc4sISxIW1W1PuSzBPlWEiSedMOV8K4xAffW5T5FcoKPfL
pSRi16ZXnVI+pZqP/Wt1DJ6cjZQ9jrQkOtm7CsS65T/bDRcn0RCSQlcjEc1nUqDmvu8iGb6f3jto
nn1bwdLWYXEMVBL1z3yGIF+fkQF+WQba0BG60mRMNPBFv//7MXiKvqpFEnNJgmZCO+MhdZ0prQkg
v/4prVLxLisSh6tat5vqVkK/zURvatlgegKd/3uqMjELszW0sCXizb4qn2JNiQF9y89wMQvTBa8J
xLMNIa8xWF2xvFtP6ZPzIzIyGspOa9xLwxZzt+h/UFZbgO4qX84Utjx1EGP+qF3DJPV916wsA2WE
xYkJm+qdStd3+UWXJd0O/Z5BsMX6Jw8XzEinSMfS+P3dERdlXORe2Cqz6xIFvYJVnVSwZvWeks/d
YFwBZNxM2dPKv1QyKN3rrhwI8RY1pp+mbHJdJQB6Aml1xptI0JvujXgIcnTWX8Y4yT+LrAyo25P7
USrGp47bndgnq6qslT+cAdNA8qXqttjPm8wUBWr7H5+Fu6P+I80vHCYYzGNQzglMBUSMwk/c9P/E
B8RR7rCA3JjrtT0bnjK+BJjXEw0ThRJz+9mVmjSPuiytwwc/2F1au0/a8pMbnetUpoIXpO6YtWdA
jaVnMjG7EcNilVrQyGRPWKbLpUhA8tH9EBqpxOq6+CLl2ekLLAWiQMi6nKmklFpMVJ7dIOW0enTG
K63pgEhY6qVryViAMBPeHStJTGn8P8goxq0bNPH+Rq8Y3Qbk6nzUX5bQmDlBDLnbR33WK/YsI43m
gplUz90+EghzEuL590IESiv7quXrGbD2YRZQd4SLWLyyzzhyGQnZxywU8g5diw99e1c83g03+Ey0
XX9M2hqUN1WS0XQmeR1KUfHx3lS8RYa+5Igfk626/cwNQZCuYvrM80vnun/P0cYFuMW+J9Uzgh32
91LcQggEqU15fEJ8oSsHDazm3UBkJZJYaQpKk7eaZAaU0wg8de9DcF8goUP7Uuwr9LsPHC7UhQMR
btLOVe6yRYWwLMD0R/U3/GZdUUDTCUYOWZdi6daYRpH0estvbyeQrfCmxW0pq2ddPE8JeaGokkpn
Q3M7uclEpReTPCa8vgmQE+8PKUf9gJlIMBpr+5hzRaMYklqTtD9Aszjzk8h27tOY/lOodzCeOvpF
JAreCZX4FSY49G7IEbuT0JutOKCcfd+8f8og5u5GitWDic1F3DgQ943+4+Irf3+xjzr+bk60xi2s
C3d82Qq2ygSmMx+szJ7epuGV/xfIb0zNnhsZjEfmzK2vx3WwpAUVKI3rztnPiQBh4EZxzUolRU7B
LRxWCZy0cfAAEfG3tr7L//wiyWVKKZKa7NTIkQiZjUi6gH77KqmnoSR7vzXrKkayt1T6Xb9nmNuf
84WvwWJvh4OKKh2nUpMTqyRo1j7O3j58veEJp4lavpa6YBut9vCxM4K+5yvakQ03W12GyUmkeUIQ
A7ro05B00FGwMJSJWtlt4oNIlEQHeSILvP7mYTjE5nvXD1vvA1lnHHJo0thZeuRnn4WAmAIKiWN+
gzS25uiXZti7UCLXGIMIi4VJJ3neEK+3wT1j6nRIs4JH+J7cfauNpipaYv1awdqjwb9/jhsz3vHP
Q6Hh/BBwpEFTI2J7NMCPmbDsJ+1zJsrWtnjJWTy/VsgdBYXN+cktR1jSZ/5rPeyQTwH9IqtE95zs
YhsVNhI4EkZcp5pLihipZQk6heU8mjoFZlErS3phLhxXudRgjMnHGHZ8XooBb2qmhivPxVzIYY5r
QVWhPGlHPEG7PHg4lw4WmtqJBlDcUuGTNTU56EX42ScMEKvtTOd2l03bH6o+1P0nAh6OD0b5cOpO
opIeCoq7STYOTPyaCa20SYEjdkZUSujpa9dXeQsGxME/9UCRyV1RbiTegmCuAQRwzp8xPDgN34+B
rK3sM2f0On5dZsKnUjmyt/v21cySVbHHtpaKG2p9hE1+j7zbLO2lB+yM8PEE0QTl7vpRemC2kzM5
LYu1Z5IeFnXW8RSxtkt7JAulxRnY0AzqYhTci8RcP9WRgHuCe35Lwzmf39iNJc9A2RqRLvxneiUT
sQXPlO1ByWEE13mBWreRcOtzZTOPotbn77uU+4wVmyGWIvsqmBgdUD/CoJWNAjgeVAHOaO5wsGFt
XFtXx+zt/ck6f528jkaZTqflLkzkMoD97za5BTjgiSJQQGWzO7QwAmSACd6zxrkOSPEH2GyeM96A
RM0cK9k8VFT40pH9F766ecTxeTqAKrs8KiWRFy8C/m1aIavUZbLdSRuVona4XnsDQyjmh/1jwoC4
BKRUlbfs72rDnP8n3ec0Z1mdUnDEfks9JMG5avzUm5t8nYJX0+wfaih4tkAYFE17Feefv1z+K3JR
TbPF+TdR2pj8P/PHXlQuW67+l6yJRh8vKt1aV+QfNjBFCOWbI7swFywN/52AkP1v38K9xsd7mUwN
SykGSoViz0y9u/E+66PlE9PFya208LTGIhZUujVptCRlPg3R3eCDOvdFUZ4wY/yQpbkc/CJLtrZY
3WuR+U9x92OqoUYw03SWeWGGGS1lYBA3quXsqNaO2bprbLhYdvLjtwFgJoUpxJKgsFee5LG5faEL
eSp7fiF7/8/kOgYDBaYaQD3O6vW2NwaKvt75WLFtGY2hewsSlZoMaLGT1OpB7u+F/k3VhVFlwX6C
y1a38149fq3ZwyYOwJnkHrYKNWCITp8armwmHPWyKLTLgJVfC+CgKCtey7z9Ipjnrqf9AD+BnsoG
zb8B/4oy34+hUxxPGc87b9xbzS7HH7ijybTYRefJ6vdpnvr0evEil66ZiVUptVuWBMYOSCedxbGW
HLoZiGiNfP9/upxlQK5jyx5iWsSEDraYNZvgGgDV2UTeQvmETR5hcUtmjzm/KBIBDp2RKlegCKJE
PFKGeElci72cjh/vRtprcuCJFr/J9M6B3TJs/dWTRYdUvIevyneDlwvg9zbXwd+U8iiv7sVxZi8D
Z/msuONbH2qbVy6vHYEq5w3ij/thZynFYgwEr5yYPIdK+nKGgdVPy7Zd1zcXy2GfjaE9ffD13/XE
qbwZKSdycjck7m7/aiAfSGuZOljmGL0laarluoe+MVlOWQWgusb1YGmxHbAGa2i/ZPbtCs+GxeAH
EabB/sbt+vnJv8/cxldox6vpX0ifwHQzOvRajVWma1IOCos+XuaveuQnxkcYylnhE6ROguB6pReG
cYaqSY7vZdMZpKh4+ppliDNOt9wjQ/AHbnJGtHberXqQUqkpG6Q89haQ8PlcQ4UHkFzjA5kqTa6M
1a2ssufAomIyh4PfQpSjy7zOdeMa003qqysBHOr0RJjJXRNl8pOr7CfCsOc8RP2St9b527QWPJh5
R0wRz+4yAbTy/Md5W/RyBx5HM2guhc+hSxbhKl5x4LJVfOTAbEvwM13L9vlvWcdmWEONL24suRH+
pYF63hUSjiuclHZmlP6mbRApyl7MOTxWkS/Mv7eO9qwR00yZW8eJ9QqlcfBSyUmOgF2n4L6SvX7e
yivqdRp+562RNkaBmTQ8PgqmglQdDzMC8ZH/NvCkBqdOfVa8f1Trot+hCuXj2iVtmKjEugaT7cd/
ZfiHsoZzYrQsuUgSWhk5FmPxzwYN/BznwE2hLKkEneSzQjaRDYUvGOYpzoqlnOPExgmMbg3Er2tt
vZs2ZGCrkQK8DTRuZcoV3aN4Zku1u3UhUyW8yOsSry6zFDl62LzYdmB3oJvuiP0gVaouAVJve/zH
YgHVk8YVyRZ27Gm3PteQ31tXpH/ci5eQQg9J7NAaVbfpvH1HiQfP2+Xvseq7Lqtc80JZCN4hZpHf
cXz+Fv754ZTfxmvXo3VvTbl37S35Ms+PjFloiygXl3XwH8jgQh/WDYLasM6dKpsqnGr2z1H4yrP/
y44lQl5sBN5ipw2/a+OUxwrSAnA4UKi64NqKl+mM163qWiL4JFnmGharZKIwPbORMs1KIYg7jv8m
HQ0fU3VleuI/YtKpEd/bjuL3kKR9r926e8WNE5WJJbCq4kWThQuM/G7gtjycunrBilU7QJzHOeyt
UEB7SGtKxomzPwOBQPdtOpISKUfTxGmPTfGRgVeAJ8J5Om0LYRQZ1Idk8YbvdlVnjjjwzbQBWTFD
cwI1lKPzyLqr6SFfX9uXaYNsxAWDHgrLkDgLkdztyIcD5ma5O8wQOZKrcUuck5pNS3453qo+vH3w
wlFOHmyTOvN0rcRpJB7Oa+eaMs3Om9EPkJM/KrwUHrHkx4dec/Vsc8tGYh12JIz529kF/8w4Z6tw
31JcKIjPt37NM+dUXBlouYYMlkZbl0/qg6Soi4HRsAH+gjpK7r8TQbq3BzlakIxtRJYEMTEoF7TG
YwWdVVf4DvLAbIE7uKYGGtU/PfEBD2nyVLXO/uEtRG9jTSSnIWXicNKQ0ULFW9y7itej4oJ/zPb3
z1YVyVNxn8xSOI/cd22bcd+VWiYxYXSutkt0kEpwhQ6KJ8OEf0HueAzrvGWQSQU/n38mhUU/Mn0N
CgecOQP6BCK3I8J/dCSR/pg2j5aGKqyQdug5KhAp5fdn6Ns5TZdpDYxsVMKnTmOKTrG5IlJTPnwu
O3FCVsY5C60awGb9mRIYfqJ81vpEPu8mZFB7hVZt3vEW8j2R1zQiqC960zFAdhtBeE3k+/MFkch1
CMSrm18qE+EYStaJK2J0WBXg4aZantspwCwiOqxbo2LdtZoWSvzOc8MU2QHqu57foVoTutV2eNQI
bSaagt+L9+QjN8BIo2Z6HtDOCNP0EzvApURhDsMk/OsYJKHrCQOwcwYie82A8Am/7ko4nzr+HGCK
2tUM0UhePV0RXM+32kK3R41BUhEJIvJA8W6f0jwJF3Q6WymBJTraDQve5ZAgIgUuFwb6c7iiMhIR
qiBXZzMtQRYn/s58juB9kaZRBCo3YODTbdGO8ke09S1eyuRTX5YnyorwBXHqTZAP4FeAMO1tq/s5
NyMUlTOuR0LyTjMnxLAGeZXz/zucHHHgTDDe2dgjCNUHfPKpDi6tHyYQ44ElmhsZrm4/OmI+EblS
XthUJOnYseFGOiGR+JSOAq5L1PJVxcLNYg+jKqvhsepqsgI9W0u9ejzy+q6HksrJl+sImFeiHjmq
Yhn6y8grJfHA+lqvTIsJq+KTuPzNQf5PTlB/KLGkgfTcRTt8dDmU5OAHGDpnr9PmcEaV4a2C7by5
2llDx5ixrZkkQmeiV37Z5IY6qq6aZEWH14fW212tOY7h6WYlSzrHXASz9G8KD2tul5OnN4f26zmG
VQ+G21lOR5uRrLRVKQ2VyHaUhQVGs91MWhZ9fyotvvymZtZdLUHeoetCQEQ3dItf9MTFFnGBBfcW
noW6PEadsHf6k9qMO2vadBrMLtdUPPmmR9dtIP7hN9yLFS4/Oah0gJ/nUp6O2b9YISs+/LRZrGcY
GPTIxO26+y/VwAndECiDh3koFr9ldzzHy6QY6naYd2Ffomh1dAGPw4diljL5JaYHZsPdrq4LpvJn
VIeerrELaTCiod3w4zxN6gEFRAFviu4ICA263W1KRfhEUPa9OG2lYw/vMxEKT9sjmaMuSR01QVfx
NksHOsgvPAoBN0Zp+mJAyaeGpPqROIPaCD4ceM/7onYiOdI1+StHYar7Z8CEPXJxPI1pTQE7M80i
6o+Ne2bEN3/oXmDgeEMehP3R1Lkepmu0lB8/l3GKGCBD/YjjaGV6mZz3LvguQ8xu53EgiwrLZcG8
WDYDQhfB3wrDnqHCDlHHBhZsDLo6dfcWzlLkZ75KNcoQL4gXVtV4cFVaCPGgjnKoXC5UK4FhOH+Z
dMLQ6tSqkL7TxVaICkSFPtyA4u9HhbKLT2ZbEj5Sv+mDI1DjTR6EeJXVuXM7TFI8+bZZksJp36w3
y0Qw80xYHHEkHlw9bRoUZq+irh2EBT3YywLcR5IjAqj9pkWsjOJcgJoV74f8WhH4EX5VFCmlqB/e
tEwULQI6JfqA/j15vV/1dTBuOTenfjEOznAW+M8e0oTsdEfo9zPx5Ol0A5rLktzwGs0KCtyc+Lfg
+0bTPc1Z2ObaFRpLsxO7DI8gby+q5DjzlxpCOi276tyFyNwR+FOTw6UUBsQH/V3qQIQD2sJbcCb5
5k/iNozxOZkH24/N9vme+rDdgkjy4VvPWoFofaEipvw/zqojeu+cMPuwlnL8KNMgh6jNaoDWbuM3
zPLGtwRS88fUvhBG2A2QG8GOmFkdv5DdKkpjwu3BBtZ2ft2YhJHfInsuZuNryCvJKc3yxd4wL8fx
kPcx7CySnQGxMkbPuXAPOVE2axQGU8lEWI3oFFQ0aPxURrDE/NXTfLUtL9ohWkpx+9KK6TV3mipp
MQNL1Nm9l8SpWqSzlm4GcsbOM0koaxO4oCAamrP0Q0VSqtxqdIuo9Ovr8d2mgvgn8/7t2fpCqOg5
nRkLkYvsqlAgKTlwxk98Nh+ynD87a2KawW0ZF8OqxsLeZz4kv+95w/EPLMBF4NdzoW0sRsmLIL3b
SKHU0ARK48zCaCdSRwtj6ldN7K9OTOF7IhsDat2dJxWF+f5ZBvVvyaFbGoVADD05nbvx6d+theoR
urQGF/KsuGZkGgaJygP3nxdd8rXB1ojYriFdxicSJukNR64mYwx7M3rWsFVKXqBY7i6ACAFjTl5g
LBEkAxxe7Q+ur7ev0eiKyX3pgVNsJGOEt9/cxkKhznlHnmgp1W0gfQxo4sdYCtxH8x2TLFBCfBNn
GSfuvyYHAT4RW2008N/T0rV3ZRjykcdwJAY6Q4vzzvjqK8lUMIw9/0aLyRW176ExSZm5bUYLJnqJ
Qe4kpoLJN737VXI74xsNaOONen6mcfsxIsnGlZbupn9fscd84ofdif8ZRiMGvNZEQztHaUJkhABQ
rAhFp3sVt51R/1ioWLbO5yJ/9dAj2ioPuB6xgVA60zAMByf1bdE0QsYUwSykqWO6ocjA2896+MHM
RIaW5EwTFnqbxwFaGlBCiNDQIIyHa7KDIjM3IQji13+M5H6mmbXCWICUUQvz3jVoTbSwZx7zRywu
FcmpssbVkTZYR3eoP6FL/iHL3ePThOldVLcH0sqH3RdXoVuIu/8tGc6TII/o1mEkw0w5DzofqwZX
1aYoT23abLawCObG959NpFBfpA4HW12z5EE6cjrCGXwfc6N7VujXmq46+fMyllp2zZfJJVPshSM+
7//eCNgu6KOmlnl3llWadDf/JD0gSnEyVjgMAFyURsgbd80cZlVsQwLHEzpy9W3/xAw7N4JOpt6r
lV7gzGyeoHFgJBhDkCeG5OjQzSUSRCrtInn0DlXUCXonrWPqhHmRUxse49dddveo3wByfWlW5rDJ
3SU7Na6H6TBRemvAq5ATppZ3KREiYHMgMSRc6xr1+E0Ht+dz3YQSqD1RtpN9cNW97t7v1FhjSQO7
lXYf1YxWVJQeIQIi7BZKAQ6RhHwES3aboShd3M77l0JXDXrbw4TYkosiHua22vvcBdDlvoDIduBf
66HAFLLOAxWEGcjPibZDsY4RcQ91b2K21AALRcChmGqK0MAvH68tk9PrDEHQgz5h2MiUA60gBVad
ouKacvEWjl4FRfRWUng5Ua9aRg0f0wmju2Dv8Szd+tdQcT/HQpe/+lQ3hogRF5dnzZPWngFV8axx
wQVcYKbYku+MQaYzFZG4PNhzDVIbr46UUO2ocfyhbTBqlcuBtjPhsy8mnUx0ffzlcnL4aYClzcLp
Zs+44l2t5hf9oBpD6ZEPQkjrKRjw1lGSaeVH4FKdghLZpsCgHQlIGoPaUbEs205zWQB6je8vY9ZO
qxJp1Cj59uvqtFNv9Mufk8PlBB9lQE4IQzpUydwxfnZ0XrG0yzEW2jbpTW+jcVwOQBy4klJU6km3
nvNdsFQ6wuoyi7x7sq0CW9+AYaunz5cCbm02JxBSVqHezL+KpD8HrIDUgoKWQNhH7Rh1/rcr3YGm
6UOsT/98b3G/wCAM9J6UVmtEhXO4QcO42v9GAvQQkJLhESNX36dRqaLHZBeqLE6ga9ra38DejoPw
TSg6qjWTFNlbeEkobimvpZZGSkyiWhTOW3nWmiDbsinjphVunRZstjR7lOPKf04FL3mK3JJx5aAX
tSusvKht6Ktz5lYjb7jZiVUin5tTtlyDgX89sVv3whsNKdaCdgoIS6rvFkcBwJeK/W81JDkWBixy
d2wvQWAFx7fWQG2G5DQqiizwTAjpFw7iWQpBXi5ZjsitF4k4IdMeSjDP8i4SLUwXUk/HJzFpFRlZ
ChXmrzcckJ22gXqPXBzZzvC79uo2o1NX+V3YLjyrvbp1QcJ+RBMH8ICQh+xmX1lQb3ur0+SWikxx
lQ5YQ1RJUWJ2u5QjQ2ddlzfcUtnZfk4G4p1BwrjySdHkmo42sygrUkAPiMpNtz/0Lfy5cQTkcIzG
QTSLBV7vs59v5R+Sl9J7Bd6dolAXBgLyHkDa9HaYKlRWdF6A7r17qE0EYwIFdfVfWvHqgvGIJW4p
M04v1PdHlXdQi/A76wx+ZC6mquZNs+5B23HVIdxeCkoChXCUjRuv+X1ezp30NgTzTik9ihSHw182
tDjpMioZDIdwYl9aF+9cRc09jslI+/UGNyzx/yFOIotUI7v/rtOgWd/Je35zS6wCR1yHM2eNrs9r
vUj+XJQnYOF5DGBAGphXtzHCV+hG10tYqnLiSTEW9PzH8XyPMLuxafvU1HBTjWjIT/EV3URlAOZ3
LSHKZqRgekSC6GFQ0wqYrhYDZHnXryd1w+9GIf0cNXEb4NnxZALBXWONks23a8rUcbRbNdJqIxN4
tcWwn1VVhB0VsqqyfKWSJnFI27LUDqRavjWtV8RwdL6Kzfm9gKCYIkXKCN0XS5P9thE2qGSB2dAH
3Qigfcr15C1LtS/FPp6Ds0NzEiimaapIeDvIm2Civ8Tr9Fwv+I+q6E6Obxzz8MV6fY1Fy0pMhVza
A0W1KxBQz7UvBm0WCN7PtsyKulKVUz0sg2HjoJarsqa7b7ft/eIhFos/407PWYgo4fh+TnZX4fo0
7ovs+TYCaD+0e0kHXpYXb3v+wNZb86PUxXJ0mxj73n5LzsM05jni7RjIadnH7VezwOb0Wn6UUDqN
plbxhXvwN2Tfezt0x9Kt3ryHQnNqtGjSarxyCnDfXTf9tUr1WH4euJEI2bKMgJaCdfzqNZ3268mn
cFgObK2zmY4J9g2+yEeMmFdgDeFChgtiLvBjMzEZW6124RFrFsXMnR7t08lZ2u70nB3Aoq1J5DiF
azbPfM5EGHEY0aUztUGpqiSfkDT/Ong2a/ezwQ6TySvU5538o9OWZrXs+omLd4tFKKFt9BnVeuFJ
Zd91X1haLhfDlVxDX/9tTXE0PudXLF5Ztiiw+4ii1W+23H0eBi+VwKP82S4RFZFUewHG1wLHHgba
1UFjI2/q3Bar5Y/4MzlH/KvC6Ay9PTCBp1f/rVF5skCfrxPfBqO0ErwFr3CTzdwVrugy9yzEQMzX
/yF6s7LDAjwDOQBKQJtRxAghZoLaZEAVrkz6iGdSqc2Va1ARqL9kNYdKMxCauj5uqWzg/TuiCWcM
w+YTzK+wGzf+nj7nluvy8k4NW6BmVJohr4/45MFiba2o0TrScwlnYnDOwmJA0i9FK6usn82Q0rel
egxhnSzKyUojRc9Q2Z+Z0IddOLRB3nyYhKRSe+OexqG1e3ztiIg6vqKujkN0IVMtjijNBlmLxOFA
owE91RPj8TuNoqn3ZbpapVYwlqR8qT9YCvlCvgOnYFGOTpTbT9bsltrtwwctnw3k8dybreFrH7AY
oQtUMH+hJc0lPYN3EuQMbX0nMyiceDrErZc4DS8r1zWZscogx+7cE2kUMNDFF4GOxjQSrIBawu14
jSILM2WnvXtqN6L8DtRCEqUUD6M65OrNMVJU5eeoV5YAEqjnyhSMH5P4Ru/dByPAyv55t8+Y9iz8
J05YemDy6NreuzgP10cs1t6xayMAXDkTVVeevrkfW1DUnPfgGxH6qfbXcNHifA9eaQrUrQQwWSXn
1OO7Rp8En3DHKcgeZIkLRRs2cVGj+ki2BL9vEh/yVu/2GKytZY2GTcw+OYbiqy6emEaTcHsNxds4
Tupm4h6XZk9xTj2tQRAZeHdA20cSEfuPORcCtCwSjbiEjCL7B3yQIev3W/P6EXr79DU97AVBcvXZ
KjhdQn9ggRMucplAxhCO9NVnERi7W7y/KAVqlI7h2fwf0KCQk62Y/VIuaLnxhCTz3lweSPhUt+Uo
hyH/C7oAORQ0mUAuxWL7PqkDmE/Q/f8voxSDzj36y5RUQJKXGuh2hkP7jG/uhgSzoikc6TKPx3f5
dpjddvUKBYHxU3shqzRk1u/GueL9Wcg6zudwWrI77unrfpKhHh4YA4MqBGjoPuxhte/aVpN5XmQt
xD7xeSlQ17hlHF1PouWm/EZVwQRfM+XMNLHuPU4zdXFhvCcnLxt8Ok8rym5cNP2wD+asQy3dqfhw
x+j8JieuJTHs76h0cBGEbmO/7RS3IibrEpPyiFRLiZXFb+QpuVhKxKPJYwk8eCH63h1Kv53sCegg
n+SEA/wujDzkXrQMq3nlvOsY8csipvtLNT8C5GZcG631ULExSwF6olvfa4pUV/cHZYmtcQDh28/n
jy2YrCiOfKazWDn4g3F3M8ViNJdgwEboyL80NMWx94fQCQ9ZfzYgeRcChhDyKYSzpww53A7bPdhv
hHT4Xvd4gvSJ6T4ilYWdySSFtGBcJ8oANUR4bPEBBpxZJmVWCYLfIK7zsPNUXGwf8tcOvDq2C6M0
/F30FIE2hoyD8PigtFADjpFNSjo7xPvHS+ACYdoxAml2K42JpqhqJg0GB8wKqy4gf1hHy8fEDL0l
zlk7E3t9A1YWSkrujtyoApq3Wy5F6NjFkEcog1JbesHE0uvTkCJzbviweKAaXlj/InE+b0zo5p6c
4vYnpCA6IfGdVAAl8xzGoqG4zeysQ59cUH33DpmHLVBMCKL52ODYKCrASQeK8kV+n6i26834BQpc
VUeQM+mlqCMjOxdRG2ZQHaTgXveUaBdZI2wxdRjUkHnTFckaYW1xFPc0KmEJ0agqqE91h+U0D4F0
Jz2bWMuIBmPNyAAoq8s2Nz0dzOIjWiHjtjTMFJYVxc2KTHME6lPz/v9e+jq7cU307g4ijtQhXCx/
153Pfy2JAJhJniRNPtn/U86QkiPkSUuxa+Bwk8LaQhFhmE8k/oIprABHVASxE0vWWqliLnsULftn
jdMBF4IuzmAGkPYGrNykFZ+Gdi59uGilSfZP3QPRUobqHc+muSWd0bnSOvp82B87IsGvYPBZ1Kyk
gawhIyrYGS81wr/rRST/Pt/wP4d7M0T8ZLI1PyWCJrcW+2UCMcsrBWdi+8leL/dZ3Uf2y4Sq7dEM
mARmAhMvhO7CvVKbTWcAyLrnFg5sWDQeEcw9xCcS0EMfu/YDsCw7g/aCShwhxG1LbpWDLqMZkxXG
zyoS4aI3ZHMUG1SbItwnE0vY+sFJUfdBcuSsp3eysHu/GPTo7okJmzE8OqjEQ6aAmE3cZ1tD98x2
lQKez1ZzbsbdC0MOK1H2QD+L/hLhdki+HXCnOgjYDBcXnHN6gX8ERMVjFORiCNf6LwJKusbPPuEE
+crBe+9WjoLsKYMHVZD3benpPli8WL0Vqwj/9ln/2q6QCNwCWM6Ck1VKeFdNwDU3W31Ml6O2DUZC
SwI6Gr584FtXl/+lasgaK+B+TKFMJBRT+EzttQi18MFXU6IOJvDjDICl6XLH3+R+4GS4SjnXcYM7
H/UwTKMTp+7yg9TuBtDNlRlqO5afVGK/gjgLkJWFJH3c4c9T4YI9vX7TGcT2PzplZvhAT42Wmvaj
PVNPf5wsO78/67xDXiwiT3sbSDgbuAUTlJzVDXUAtvXjTI2VldfOUBhQ1sewHT2IpqmNkLM4nCge
zLd2u+u7U70vWQeVIxIFSd1WPHCmowOKKcspHFdnBIxvoYoqZOI53Xidi8eP3k4wzlUUiV0y88yZ
xESeOGjy/TVpHWSBtxfn0KcXHmcG5RSSeNKrwwrEx7rnSEwYYX/BtpJG+ddFjiaSguN52Fs7bTRI
AuIKG7JKWBlrSfTvvm6Xuf4V9ViVgm3HqmWU+I5eRCxH5rXpbHx4KCpBAC4EBoCFqnfhsa+duzRF
Dv4uwn7DUte0hjaixjJIWrVFlPYd1/4PsR7pTBiqwDF54ygBT8AucXhD7yj8coJMyrFZTLtgjWU3
IEZxK/7ysSreRH3LZ9LfbDPtc3OtY+3GcQZF7fOZu6MDtA8iZawKafcP1e39TnZEDKcjjiHvr65m
+DWMQ2j/IEIoRtQMpyGFEv7gNCdP/TnyyxtiiFvS9KBm1Y4riLcgwwXS3BzaSA0WLK746flkzUZR
HIUwCPQc+DipSQlmKDk75fQGmr2KR3HrjsVikss2jdhR5M/rZEQg+OlFqS+C9agVUKimrSibQqo4
JKNlJYK0Y8y5bvo8k8kpZBrBJL9QeqMrpyaRxSrnnFyMafA9a93SQQmosWn/k5y+No85aEMhjR6V
PkS5JkVKmpyr3w7a1hE3vOMscpgqZznq5tEYkQZ1EySPIJa2PD4QVNdXabnjh6lKreQTS8XNHg3T
4TUtZER69JLoqm+uUAVjgdoG3pCV6D7Dly3jKxaQoqF5q8fwZzIJ5Sm9ahH2yabcPTx/v8R9p4vE
jL3AfyP14lVOrp2Rs5BVmmkA6MRwfr/S8t4vZeH3OTWIW2SFopHZjMxzZFgG5cPL5peFmU0CC/F2
Nu9KG146W8sxBQVApeKf1ovDPQH+LyxnplGeWCS20cYESXo5c3l8ovZUtZkoPNGjouN8K3MbB39l
TdSai10FfaqPlsmRBMUW0D3qMvRH/u5QaGvj+I1H/u2Rmbrwce1pQmRO2mh+pafJfisrMuO4aSA8
XrwiYPImKVkISXaiRJZQSI7x9/zN9twb/VnQnLgGBk9qDMcPnsl/GtUuCpu0SjGhxLdiTQQ9bH7t
TW86Ueo3JghSoXZvMsGxp48NspQ6Rh6gkw42qo1nuwfsisxsQ1gtCssHnqt586IiIbKqOseMipVk
+SL9yYjRgcysfTOT5nctG1JX8oKJCv7sxdvNJNJILy/i0+cej7xctS/zENiGAoCyqa8cFZQvfmKN
aNxddgwXHQPU9c7IDbVUDN7FRflFm2Zn+Dc22YZi2zpfJmaP5CWg6L/DtLCTraQ6/O1mfZtLI7kL
af83h/BW4AvcI9c5rFcK3OEw1paVrvp8n5e24loLJVEdSY/GU4TFwqNVS7rdBlU3+PJVRYNiZ62D
p605N/HGCa9Iqqcnij0MxVzeMcA3xKa5+iHtBOt/i3aE0LC2EYWJNfAvr/ZmGe4XaK7TWQDtlPUl
5v9gpSSFGLK+aGP9wEi7pSBcS9c5csomO7HwgCaAlH/Fl63w7NskJ4YFcyG13wnpup/JW1lGTZu6
JwMKs6cP4/K73YBXjh5KQFA2ogMSV9qGV3Xyse5Ga8brcLtF84lsOP82b6iXSQPBM6WDKQ/WbZgr
5ORyRY2cvVxDl8bhoFGckOYDXdC1sx/cB+ZIBzerpDPQRdfTc6Jv55rcQkm0c8giUR0+BJVHxATE
FCxZrp5/lpaIH29JMMGUf79j6epqYb+3p+jaNNolDXM1RhpVMUjvYpeG5Jt4pohqWpaVxIvB88Gs
0PtchlHMTZ5gk7oCiBjEOmpxjWQjUgwuXJwq9EnDGHgjPXU629aVRrVY1p/dlNUMpH19LwcMj1Au
RUAAhVgGACzZGFIcav1pj4HdU2GkRilUGtuvNIh9eeZSkfvHQd7/GqoXvrS9eBDTZSA5ET1aJmvs
sC8noXW9EV5XOk3xyvquzDMhnbrZHMhP9f54uks2TTgVb8ibm6hNT9jGYS9A0FxiwuavTsP55ouf
/q97H9K2ZVWxqUwFQ2cQUiiZuqCV4Zpzyh9RzuOMSrl9yVX/rvce4N/+Lnf1faeM58wVHbm9sczE
a1JrorEkjjq5pOvpbw/3JurIGHLzBHO/3WF70gKExdvUY4Xp+kz51JuwfOtf1d9Zx/GQm1LiUHaI
QUPZwr2P5JouWQnBQn1XZazNVHeZBM66etyVGnEShSAW30rqr4r/QJXSKpHUAMNk+RGmoJwGDzxD
HgGT80WvR7nvg9v9GSuZDHcvpJ4K0ZqrUcQlF6Q42mq9CWv4AUy3R0Apso+Wii5eBP46+nSeWtKX
FR8Latd7+QzkJFdlgJQUwQHGKi7+SxmMJhGg8Zdg3JX3NVBTRHlnD68ETEg78SHJR4ImpNxe09HJ
uIsG5r1zCVJ/PPZrwY592E1zHk8H5oV4rhm9unHQnD8ySxny6NuJw/l+T0l3pcek+mrRrRcXbkLT
FXPU2y5gkQzEt/PLBMmxWJOCzhKQQQ+cGosp9IUPHPjvOoicOZP6p7z2wtQfBjOhOJ9OyIcVYuCY
mCJWACNhw9mITAF61vVZJ0kBFN1unXw3CBa8wMWEilWl9QJ5NvOP+Jj6KQdoBic3mRIli1x4WYsa
xBrg8sNh05r8SFEDGN5Udw2k+EK0Pr+vLl8yyKW9htYM6klby+eIPFA/ANH9S+7NMKYUKNZSBMd8
uNIVi7U4RuqPaa1GGRqJWcB5IdaBPNxFwsyPqAtm9CHuSdw8zO3eo1gYYrt4Nc83by13G5Yy7xMp
iERjjMzmI21PB9tJrzMNnIfD4QXhhik0g26xCrUHgNXIgeO+cg+2b/jsHyobieVxjB2KLc5IeStu
OYTmx7JMrCFQL+JU2KZZE7c0nDd+3F/kc6R3XuyoaWhzmDOJn2fJH5YE52paridstkTRafxd3lOM
DtGwlMHI5PoxuQGZa4INcvaXySAe2e4L/yvrnq90ev9KzvYL/hj8AsiSBeaZE5nBKD4nugXPQdlC
7UE3vCA+Pr+e+7afjvcNfjUg069D7/ozIhRnbBH10ZnRs25kk2t6CGYwQnmP1EhACZ3j3KAXKSVl
0IsbPHPZ6xL12Gr3ytwonD3QgNlk7D3NVzIHtd16q/6R1jRd/m2YALPakzKZWASA+BY0YiJYEgDU
I+I1UDocdKJpWW3cql8HJIW3SjZwp5BFXwMfEjTCDzPM2IhoCVlXTcncQ1MjpfXUvmMKJBTqgkwv
cfNQwk5e/iN52wpp4MLMwlxLQ0abl9o2swgOOdIvuQ2K+VFCI9MaoJ2+cNA0nE3xu0KNLQJksWcE
aniDKuf3aowHUrIrTO30nP3EalX4cf9VVjUl2S1RRr/v0wNfS6dz2BvaCFYOPcMgaa9+KEzi/TT7
vRHPXPIJ4VSt75v1B8tgPyGe2trIs+5xoHfUzLjb2FHx2y3hZVvb4DRb/kqTEhPiRHLqoREGXxOt
pvM+1sH7RAAhDhIwjG9yX2CwxpJeM+3ODS0lCmEYw/aGTN5Fh1fZm5Yy8vnMG8SXjOJPb9AfqdND
cphV64BYW9q074IHvwmpoWp47HnWgvRFJ/C+LaPNXEQFJh3rHpgA3PxNjAD4eJT3tiGjfECIC3nP
GizsUu2YZV98JoYFEBqF63VfnBVAMcsqd7fW3sG8Ll5PCjlNXtFvuKEYXsJWP7R5RLUn/VesBt/y
tT5ty/jXUM8c/f27+XS9b3aB5i5rnUKh8jbjvxI+0oSSlHZkxDg7R4IXa+VCo2ugSbzi4XQj+fVm
5FH7Ixtwjv4W2r5kjCdOsMurFGTvp43DJHVcMqkJST4qCP+bJ5TIuL92IvJn18LEMkXMADOxrfdC
VSRc3oxKlquuUB3qXFc3qXDAclnHlMqLlvi5PdlNKyf+PlQUhUMVBgJEjvpoXoiXBs4NgYI41ogD
cRNpIrbe9aRAx+ChTQLBqfYe3m//1pfMf9IIFZClGpEIfdXmrnDkMUI4KRUSSS6WRIiLaIHj0yK5
LgbuWAlW7koKYXb9MNU2OqczvG0mIOp0gFx9WLGWbSEfd83NDw1W/V/6eVabwSgZw5vj482JRPzE
5V3bieo2iTNy8wCHfmXrCS+wFHkKcfnCAlbcfllQvWethZW5vSuHf9j6zHU7pPMttBMzmDtiiz0t
Qx5EwAV6Xfnup+togUTgGnfQLsVdYqbxivKyNVAw2J6/Jc6yr1HkzbLkeQE+fAakrHgytqZCAjCd
hJ5CV3B2P5qqxwvmx/VshTmCwU391KpyIqUmekYkmv3WFaUCnX0OfgrdVLA8IwY+5fiesr5e/Xu6
KiSpGq/AVAXJU05PyaFUM3nQeY+UlaRoizrAHcQj93bWK2rU2rk2XP/JYlqLXC0rt0329c0xVLAH
ddrQhitZHqOamGprUUAIfqbWFFWyZZcJtDrjB3fLzUALm9fEjR54HzLZ8UfHXp+TJ2OGNsNvcNvS
ImJ7fnAvGn1KswxxGhEpjWkUfy+1/wPq4kvHZEQpwKkMCu5hRe5WmvgSwv4z/7eaCHqS4WvsK585
3FbttsC31vVNLAz5ldw+O5pe8E+rlWYBceeNakjvUfvrlaBFvJIHO1/wnwYhVmpRT+eoxtiFWh/n
tEDsbotlNYaI7TKPmS5gF7TtFdcx6TCSsM8do+T7c/rnMPC05yZhyw7vzQeQjH0BSsUz93ooixuc
Lpq+TEcgq/RmrfBlZt6hiQTOt9esrOotYi5plJK6f54lwEG7kCQoOJlrLMmKz5ty6CoeuQTENEpW
mhdjQfEkzk0xKm7/ca6eEyG9UPbkKnM+t8Svvedn7AE3f+V1EMfQTlKxy2yvR0cHlrMpOBOVHuNV
QPZewb+ngIeoJ9JC/qaGgjOVWK9KBt9HN6aeK+HPqk2TZxq4pWbFUAkJYw2TrXNQavnzolKp80Gn
h9D4s19TYMkl9+0ZRzEG5Hqbj56Du3Cnkgv4R7/WvK1hNybmbfXC0527MMVo8C8sCAOVz4vhPRDV
JObN8Iqj8xymBaXi3s1e3mxJvcpfnx9WOtEY/jBPDjz21ajx/oBl2HCHqvDof/5XRMifVhl72Q11
zCswzdkalhu83zJQ7vL8twQ7E6OiT5ttCWUT+N3tdD2pMV289KhHOLwc4q9fKzs34i5JhIq2Jse+
HM92ftcHV/OKwRsx+8G6bTdpS3ijSmFsCPXJ8G6A8I8f2FFqlKTcc+IJxzezsC5ZnTwoxTWBOode
+n4m5/mzH/3q6HJWAYfhHhE2nRszWc4yqFgHE5bne+c5yF6Y5Ej29Oxc5v+YCWOlNp4F1Bbiw4a5
AmSGfJ8A3N7DMJORv90tTwpcALNmJrzx6aLmDp3l9yjqE/IAi121FhP1/mTnIb9EfJGxVMUIgd4r
+GprgCSXaTK36gF4fjjKBdUSaIUXVNxNbTVF0PsJkw7+ZBht1rv08JKp4SY7z0Vyi4YnWhw4ipmd
4eOLGdBMlEKPTtt7qZOWUAyX0dYhZpzQmQ1sWl2RgTuF586aNpQhfbBbntiN1EFsLuQAwJepyDdE
zv9uMIStTwHCiWPPtJifajFWwmnpDSErSMThrbzA6gqnkTPU6z0LlpDh4aYtRTl6hArjCoq6ADIe
mr0IJ5u/K4IR6ie7N7SXXKLqbW9FzgY+7MQjFbECnAGyAZNCFpVl7Cq584ACiSJdPCRLnR/T5BMJ
Yo8OOVIj61F46Nz0MQXxSmso+TV8oh1FDbg3NyF+vIiLpWsvGH5ela4xlw/CtR3t1yJLUGHqLhwJ
infKfwsM8qdouXIVWqY+LIFhahY7A/R33Yl0su8jgXuwgMEs8JVTUwAq8kpXZonCuyIN5cOEVRmC
Xin+P8AbUa3eTcjRSZIijwU19zQhanKxhtGgcFA3GhHrGp49i2lGwz76epILSiWTm1u7k6krrpD8
qiaqb8GH9SLgY6vytcfy+1d/Vv651Wk+hI3ZsCYbY8v+bEpg9zVZvKWdDjAbI+dNDKjGN/xdOOm2
20Tk5GG7d6xYn9nYMx1rpieqn/sBfQNr+J7uNeU3fe1w8nWKms0Uqyy0I82jW7M9S2ZbnV/gJ+o6
LktBnaPeSqaRxGKSpVrcgUvcQDAmbwBw7IcrGMvQQjYW3w08SNSbeYsRTsCEOoXIzSShpPhzKmPr
Aq3ey2NSSvXmt6+LsfEjFsHwuKXBflmqF6YjzCIkKkzw43B2lxPEoYKaNdrRQ05Lvzqh1LeNtTti
xwUDBGPtMAZsfmTKwGDuK/sEUnwcgsBY4pUse4FVH1fVF25Y6nutucZwCBFbg4CcV+lgVIWmF/fK
aMXhoqLb0dXGefwgfvrja/QYL2Q/xPLkyQzRjOGF9PXfNuTUrwDjg0/bNjFaY4svseQU7WXLAGt9
JaARYnfl1ryMlqbrT0egahh02APSJk1Efy0SeWM9uksOhL7PVXS5sqkThS1+Wl9NM4Mb2Ye0oqmA
ia2LoNUXRHtoQmxUpTa4Ih4Xcgny1UhdtOFhiQoJtxz9JvixKC2bDxwWZJPK2qi2Dmvn3b+sv2oE
kd/Hmu7ksBBiOMkzNtfm8hhZdxkYKsnjYeQJRAJPoTlqJulMX344p60FKOZenzjde8Ss/hHvLIWK
F4MNG/KvBCtHSv2Ay40FKhosoZJ49POfNHT4eMjI9NwxdTg/b6aJKTkj69V6egTrKbCkni+EwH+V
wmCP3ecBBWlNRtB2qmPkOKhbEEQfFt5rHwJM4Di/RXrYzyp9oNJYXm1X6xfwKFoNTYPwyHSgsf5q
TqA6Ikw1LLKJkfJ9yknVsFQHEdlJyDprsauHVArDQsRwWwr2KiTa50oAp9GJhpsCrxTjcp58m2UA
PSuGJpK9/7Vy/GWHBF9Gu3OKHlpleIKtPfDBqXHwMWaNTtfr6RrAZRn03oIU6CGxCXoZb94lncA+
1oF0FUbBSsKhmRTx+dvjOQx6g6M4bP2h+8bW01+4yXzvNYcysDKb78gajAmB1+0rVt8uAoLHPkeS
G+a8aQIhvJQGbuKAGWG9rTzdNfaGRd00Tql/vSzMeJO/2cJHpMZwuNLjiy/NyK/9LaxDerPGZfjj
AJLdF3HkSO8P0hanYTI6BhbIvdAEj7PjCGFf6ciDkql2+nZbccogQs/pLlTXn7lOfFpiCm41FS3Y
0no4bEBBJ6GrZBcPEsebO7skKEm1vIcDUUEvKDPjLNMxfLnaCvHHAo/IJpjMZWRB5FOrQ30A/4UU
rZhQi3JiO2fXcqDztN9zjBwB0FRC2emFgCSLwaDf7Gs6GTXG+k7xiVu/BbB57GYvLuLTO44iVmY+
fpmPIDLJzu7qFTRZeQeXwybBubDpZaHblHTCCoQL2TwiNkV2B9Hr6slx3pLeEFFyFMpc5+3GqxAi
yb4mZnDUd6+oBeYYgopmmimyKgnXji5xlHPGkmTsAu32AoJapoG3JyifDx0oI9eZS8z/C7cC+8hz
aQUnyWxYB4wo0YP2r8zo43pIVriHl2oml/3ZC/AJguXtFy3zrNjXNK0hEV5YCy2qLCUYqNc7Wss+
JkYgO8YCe4mYcHgyRZirPGrq3Qr9LEHwUFenEW2DWTM9OApW5CeSYI5BYh8yEjybzIGC74+bRrgo
EuFmPWNLWDZZyiq9Epbl4P3X9LY+rfpiTlAgE0yrXRQwZKJHkqSxBs/iG2pthFOs3dbBnfhVvEX5
CYThCYdAdQ+Ig48TVh5Zr0HnNM8mtafq2l3RE47OGTohz1qiUZylzbXgcYvdfygZ12h5mv8ifwyh
KlF59TmneLVs4iEm5CseF/cTVAf2QvfjKPx7fEwVP5Ho/L7gbEkviMCjR9I0MEQPa9p8oJI12Dyi
kCEQbijA6SJ4BR2KRP9jfOLN90jfnj54LBz2QIxlSxGZOTQ0KL4uqdmLLA3trx3IDECozq2RmleO
z5NOpOECE/Qq4uh8Fqdk+8dWbDgyq+uXvC+k9MX4GYMgoNcCXFk1QToGNoc7FyPITL+Lzw9FQiir
+pv2gfIJzELaAm0fq6BAe32P4rtZtldROMiCV7Cs6kSx+0pNxiG2is7FwjTmfQ2xV1+++VwTEkbb
4OpFTSMeNR7cHOK1aF7OEUHfpha/2i9H/EMPTobGUu/kgz6bCLISTuZ/JyTvKHhuSe31U5GUE6RQ
r8j1+a7WYtRRsl3LLWRMKPb5/OVuXSiVs0GteZoUHOewADwb2QrNmn/Bzhq6c/TwxaO/qOmUP3mr
0eTDcqMRsYby+CPtU+o7+ihMxhQvr80uhfhaJc/oIui+S0NBQr3NNoylGwHA3jD7mUIN4HsbmEHL
iI2iTrCjlkcB6ZXnfj92klH1zHBuYQKFiyD/OZf2t/aQYAZT9b4Q2Qvz8QS52+oD1cIfLF+nGxDS
sqASLMHwMxo/yxGbAGgEQJtFzx0KsFjhcNmSpyHWO5fO3db4pmVT6OQhbrUN92YHZ6Bx3N5aTrtN
bfdBhFjWyORS0A+gZEPiQHwnrL0MJmMqYoVgmurKB93y/ePPI5+0nNpDP1TcUSCQES40c1vRt57S
gOfIw+vS0np/23bgZnwTKsxsKi9uCMa93D21BL0x37l0FBj2xD7nt8PNwGyCuBl3YB7tiT5Gfrdu
ENptbQMuTPyZFPJiR5nB9EKNnsN7Roks6T+WFd9qA19zujJYZb6lh8Bj8kJeeDN9116BtTtk2Oin
ws6ineqKfkDeRka0cYlSG5ppPZJgC1Akj6JAnHztbFgNkBNhZCFAaHLFaiwUk9OLmn7DGbXqxjj4
1vWCTlxqUEjZv0HbLPA9Sj4Z0LwPJ7NyuiYk8LizkMn8ByBrgchRUgpuxqP52YiKPeMjiL7IgCA7
O7CH159g9lMJaBSgmN/kVlb3Ss5cO/GlhsRhx0uELN/8E+myHE9ARnIeiOFO7T+mmBwrREhlmNki
pMnoSlSkxAoE9LyTUMogmafk6eXFh4f1PD9VUDnfIrK2fr8vCo6ExVRyOTdFAsoPz7tbE4qAuHgB
jJWJkkP0DZAZm62gJIWdMdyQMPEq4LXXmv+PTazEHRtbnlo/wIDwj3dW7U/YjMsVk+qP8qXaJm+9
RMLAPXRXri5Gc0AsHSCc/1VheuxjJ3S3KrAk2LfGl2hKCt52eOcFLDkscf8l8861N2y+r6BkJNEH
thf41VEAwr523AcSXed2gBTZEem64Y0nB1oWZAn5qxi7D6XIJqluST5v5pl/C5Z2GXqwrNZHXmNB
O+PxrfIcxY3ZoDFBrc6rAUZ6XqXdlVhC/zdBvJfePgbuWv0NJhOUZrX4P8qSrBo3jn/3h6BE2Db7
69UL4AlhwZeALWCHYSnPIsOqP5SCWwDr452M6GbjG0QGwTDprlaXZyR6ucaKVcKfFFccdNsYbIDd
oXDs/5Y1SQ4ZuTvnH0j9Byc7IrrdM3G+/jaiZLtQ1ClNMndkaItQ6Q+q9VcfIj/KOlxq1YW8DLpw
8m5ooASmf3onTdoJD2HgRrUvGIpc18Uv6H/EwIagYovJ2Otc+eWk/uXC+ReL/PCPk1U7vmP3Sl04
kpI4JWozzazDu817zowBM3BKwclZb1wSAvXfjsfUguUFHMOiT/CBP3BHnirJNv/CoGLkmY+1+7oU
Hc5zi6Rv96B6ElmCxPsQAkQUlpl51SaTDX8I4dzTpMMVlBMvJqoi2/BzlLlswEmuU/z3nZrn0HY7
mj0OzB00SAh6uzPE+SeLzS7ROeDLGI9Sf/pnhvzXJVsF7nSMxZ3AHV648FVX9tS/G16eOPS8V6vK
kgg1sOMNXLsNZtRUPWtBufU8rdskTEpOI1gS5jFNYu9srOMsPWThuG7xx4yBF9pASdcdf4uYlCCA
afgm3wY7+jFEvcEKjSDD2N/odrIHlROmwjsiuMkeZsuToi+dRGBcSo7Vf1upYW3zECg7O9wnJ6Cy
4w/zuqn+8nZTdBVaeLflNmm5z0ysgLWVwZCDfYu7fN4ugBAduue2H3SkZhfAnMj7B6FUavg3l/aP
IhEniFztDvMJdN9FA20O3E3/nwsMNAzm7ytRNtOwB4/+d1GLvFkk3i33A+CiKcJ/qL3kCQMUWZYc
dxJ09AiAp6HJ3BpcPDMURFy4UG4WwDkBrzsyKM+TLkWhGgO8viNEzC7iIy1AhRlSH3DvceSDH8gA
INqffTtJFwNoNteHXxlggcQgWkTkZPSO3NztUeq5TEs09XQfQ2YVs+tpr3rX2Ja4x2vGWHcp5ydx
K5ym5rEi9UQb7XiS8ySUIWZgLB1zJvGpWgtULXC+rDi4fGhXCjfkWYJphW4aAoKyPCW03X81UntM
5/oPYRSrqn3Df8Na2cDIAigRhT9E3RkMCdY4bEFr05fyJ7Izu089T9q/+q77QN/9XrTjZlv0nw5k
mCWOGMfoIAnJfpvRF5aC9Z2tbz5k6od24aaP4Or1QJzKt9bpzmtbrn6aKgduLBxSLyNkf2+J4E4J
nRQOzpt/orq/wDLBdtgl9QQyY7W7U7+deJsaAx9VRH0sQMyUx69zkEfRMk7WBWFpol0zf9mRIF2B
t3P21f2Iul7l8g2GR0R7JMswCawYdET+JmbvvdjWAS5gAnT4UYiiygHLADhK+iMy0JjDFVGXFobw
IMVYwireWIUHs7o9SQhljZwsSd3IWC/ecPg/1nHSm5RZCGXw1VL1Rldlqrh7kK7TP47iHshQOtwE
7YtwTJgtk1XSFF6/OW1JvbHcZ9ySFJ6N6KxhaUfppMgg0V3RY/uK3vzdwT2Yhr96Kx8IukmIR2nF
xNI1JvbOuvpHNlm4GOtqx2Z0AHiN/Qg3XIc7smi8k8helZMoGt6hD39KdL2m6U/EULcaK6CJc5+N
vR2lkapRCX49LXsPm/E8HRz+m+HNC11H4xcNckh3uXJmwGWIDGUNQDS0HsopX2E4ekVEtQWxwOKn
W6A1WicXiRZu457hnATjMzNXEhTQBPKCN6RNa/RC9BUmGGJH8CjBiD8RQn6Hl9MIbiPO/paaFuoU
xNJ93Te96MByzv6csDTo6Yip6twaLCnT0HRN0doV/V2W0FOg0p7OhGMQxqpdjeEyjLFuX3er8wbb
5Iah63iYsKd/bB12xNuOlTE2Q2/K55EBH5k3c8f6zRFwQC1Y/b4ow6sdNMDZWbOtPjtJmDR9irxN
wmkH+2cqAh1ZNUY1DXaWdqv5HEBbVOAkVzIO7BNn79O72cVmUDJ+kVkL4tjahEqaYMUYDqf6iui9
VWdOPuDuPPPCv6u18zKlUuxM1sTioH9bjbMDtdL8pTdNzxeDw767gR2XZoLlo1ht4HVKBfuvjpmR
q8K5q6RDF6jul2LfzdGR3ZionboEQMhsgvaHk8JPXweiPlcg5ZfWmYEpqu0EEuUJrWfSu6RuRls6
m9QHFmKCY/ftmRJdv4LnWCPr3WfAGIOOrhfnbLbD9uUd4iBgPL0btOJnCK0eelsBerDa8z5hBQ/W
fKVwDdDjd7NmG28CxP1iTjtO7mgRozfZhEa38Quyn1+FGDGcq3TnzZonM4xKVSjbNn/zg9muLBGC
xUSlFCWZWifeeSZzsR/+gg/0eCh/4uIIZ/Mx5zcfC3XT6Vg0FCcuQhZcjq3rHMXR6b7g4hiWMBz8
Kxs8kS4Gy+t8tD/xTSzD15HXUkyOplgZ4PF97ioHlGcFuhwm+v1lCQvS85uVOraP4iVuWj9fqHoK
HC2hAqWPS65RgprtfYWIu5Gnff8vR28PY7+ee6gD3sn99dpaTvfFv8UjMJbqz/dMc+XcrRIvtII3
ttcf1kLtQTucV0Gz4LbPiK6un4RXSREbqG2TOv/OS1v8IITsaDHlK2wyNPPD3MxCXx2oaaPqNfdO
Im+0W0nKUM4ulfBmlBhS9UHtTQWgSSpe1q/qkO/RGML6EEIWT4Akkp0rDZ+Ubr3RDn2ngU1zwTlE
mK5+Lihg5i/cXzd/1vRFFB2c/P1o3f1KOZVch+TzeRSIb+Z75ZxqpbViLOv0VTJC+ngv8yf5TtBR
5jv4pnO3s3YdHMeIcF8ZbXXtNM6NMcr4KJgdOLeaoib5RypXLnbWS5Ll9fbY2C+ndW+b39RTgLr5
5nONlbKszhIo5lzqGdlG+KjfAyQtLPL0R1Rrmouz8pxRuyNhj23b4prx4roYlEHC8LmhrNaohP3I
l7q6I5Aa3vupjRIo1kth3Eyw249BNEuOEA5OnByOglF5x16QDQL52tJ9nZW8Ka74Wtl8657EnzsT
5wLNMQ9zu5hzG2/XBnOiM3utXxaITDYvJFVE+xC+aJ/VOzLjO8wAERpuBSHqNtXtLNER6fE8gZQA
Z+qJdB+L+ymSu2pk575hq0JKsKtczRe537tZA1NINQKJrfvz47e1Eb5+9yrG27mxWEBjhey7HW45
fFKkf49Wib3KDQkkDhifoZ/+bjaLHjE2Mdls3pHLJiyO0C//jtQ18T684xStN+FE2Ys+x2CxKwU9
BddozNgY2DShMt5a/AkkB1voXmVCBbmcfrqtLwAc6AFyJRh9058EMUCP6iRYk14aDfHps7uC/taW
C575Y1zfA0CleZpDk9QOuY1bv53ZKL90jgosmWeI8uMo9hcWgyrqELtyTvq8Vdan/0Uwcxwf7lt0
sy5gsrXojqrckT2SqEohFxFrg1usr83STYCC1PCRX5zMQJZu203/Jlybx4kNB5tzLM0bjG3tWf1z
wPSfJetn9If0mTA4QxWHf+pCMrwl9sZYRSHidN17fcMqMWWEwrlX+5RN7D1t+2QwHOOArESDel/v
5XJ4KZt8MdXPi9noQDXvpxRk3k8mmWl+dtwLyxMy+nPcDFtiOv8kCHA8PtxmwS312GhGzVgirLVS
VY7wHYhbDE/M8ia+GhHwtWCl7embOhf2x8leMss4PyFSZwxCQbOteCW9KeJUjyQgMaW2BUHP699t
FaoS+OdBe+/rZHi5733ZgYPoI65JnXcheLtN+39EAMcG7H4Nt4o/PoTssJv9mXtThlGRsNSlwA9v
ftgfW3ybJXPahVy+A8OFrq7h+oir/40G8JtN4fKawN/fvwZrcvqQPh08qx7of0Jwwkztr56/fgSx
VKIAzY8EvdAnLDDkQq7NEPhTzqs779TwbceTf//ie6LAnrsoT9zmVDZjM3TPNlS/587oYL/FtAvY
II1PVt9IKf4+jO+dSv4ilJZ8aA+lEo9JKFZ9ccbXehxI1h+ZPJ4JN6+PoaD0nTtENULH5Cv9oKAN
vsjusTKizzJXowCLKk5p6yabLstwTPedCxLQYzhiBzuanetHQ8UsZDYtwZi3Cm6hDHkgmL3XpUb9
YdePeQmc+Pd16gGc/065zFxiULIuRZuL60m/94ev3aKfHX/Yf2RLx7yo87RdXDwgFjbMnfba7mjw
LsDfdOv/eHpKqS4ybZqHMVWF+HfrwQbUxL/wMMUJTrh1ixf9n3CdkYwC66Ufs3bRE8yfpucoC/Du
ubLOmteYN1RdGtrP7kCNPDvDOn+esG7oaJtscS5OVdUle9nLV419v79yDe6oD50upuS2XOT1B1/F
UWqxwyoN4AnRp77WQhuaX5q30pCsuFrAZar1w1N1WZp9xQXJQ4m6lXKB+x5k4z2cCN9idq44QWK1
C9YqMFkwG4MC3BSFIwtQiWs4rCxewPZAHKyYHQ7dg5POEZoOJSJGbQpg4Cq1AtunisC0Si5jWwHX
SfrVjkYiW44oPnM/w4w82MU9CgQuO3Gr6oUVdUe41PeGCLgNXTF/cpgPCL4KViZCLB+fL5/vXwcP
Av3DaKGiDfF0Y9WVC8vymzxKp42HWIgzYtvCJdXmY6S5wPe7VRTTKWnZSFtZgfTlZeK9eHJ0MI7f
0LnEuhyh0NNuQuGDnS8ymeCmTKXNaTTEhsW5ajQozO9HYMCDkAn3mDafu9UbNHmHHTaSp68X0Ril
Xkb1bTKA9NnJ/zU4zWOB+7sNKFlXdQz/Z64W7baYZygwDm/sTblV4gPPfSCdqfXCFUABJg4saqkE
gVs4xRMwuqlwEsG/pet0ckrBcvPbNYWYlBrDB/BWoDBF8DLhS1OmIN26I5F/5Deh/314q3s8Ym0M
KX3UPndwpDWn/VVsB1CpX1A5ceA/Jp1cKDxZ0Q+aKrwlKa6yHhyCQBGrpGGLp3EZzFsOxJkuPJah
zVUxYkB2cmlbDfeVcfh3AXEk48MSnRM2bT0PqSOp+YhVyUddPFsBFTMfEBhwIFXlqpF9PAyRhnz9
kmjo4300OnnqMGETPwwrfIz5XJxc+xvq+o1PJ0iW589v27BlHQCBCcK4kHwF75DxWWOPDvMpNXMj
uHfQSEb5fOmeqmTEN1WNQppfbRonBizvUQiAcG4QtM0eDbQs6B5qjzB0c2gKeFkOtGY8aVTihf+m
fhqKK9skou/gnWSRHu3FXr5xkpTdfiz3sY/kr52VGMELyRPLy+C8poS0nX3OoaFdiQkdTxd99tgE
1+8IvGfvriPv4hsnzjznAupMG9PvrKKRdH4ZQgjtPe62TI42HRKWxX1dfi++iIPvkakOPgD88SND
EX1iIlu69ORNurKn4Pc6pPIR/MCHOsWFQ/qR6M2ohvUJXKj4FLnfkOo1I9mVGRFvNJwhDEn+CVfe
4a7PquZNilGglABwO/IiH6J0GPtIuUZkigPXPgQ3ZwQiLt4z6YDKL/ZiLTSQQE/+cPGY8VLlbo+G
DuO+mdDCW/jwXm4CGEE7y/DbIdSLHHnxCnDTxY/aqOe45fOxe9N/WHviEnvR7APmsBHziM3AUzkv
hbeShTOjLW/tMf0ObCXEP8IysamoogWr0jlU3dbnWiPsoehelYM7TMsz2Xb/b/rJW+DCBRtcxOcv
SQN5dBEnf2Z+ZS57GKzl4v+4JFyfNtVsayyUDZk1vfeaoY5W8AoJCPlUwMNcOoJ2dM0d2bt7aLYK
KPl/rxIaXYPuw61KD6ITXjP+2MjGi1nuR3I3qmVD0VrFwk1CZ3fCNTxADH7lHOdOQtZEarZXlPh+
nnYxeAVRnEoVVPwIY0HndQ4lKJPw/p+x2gEFCWZ4kW2Emxsjm6eXSO0VEAA3ak2Aw+gfZwulyJQ+
5QbD75hKIA5lTCFROTj6Rv3uqFgrYjpI5Uq7iugPkGFwG5JXPvoMC6/e/yIMbLtQcKHonQqd7Mg8
23rTaYLln4IR1rauWhOEAHW6/fOIg8fikU0aZWYeKgr311/TinmcLoJdJ+qsZ7uulxOW9kaJNyqf
fkcmWoIGFHMA4pRnYt5EHRIDZvxCalnEk8LjwXrUtGM4AfSC8joIdi58APnaKHg6oXwnJ6VTTmNE
sJH8NM1LEnNwAxwDpYtRPUFHQd9Cc78YDS+7UKynoFpEAszR9ndNyxR8nKExXrVsAXqIah/3qWxc
uKkajQEftE5VPAbUOXflNOrjJY3rn/0qwX0tzSsBy3FDXMiQWK2vpGihobrCqttht8DO855j0hbh
4eyObgSV0Dr71n6zMb8Mu4nF5qVAYwU/kdiD9pH2k30OCuF1RUGjxwS4O0qktAq0Pkw4rlYviyNT
4Clb1NtxwcBJJTYgbitUbSC3O+hcTmdeqFcsMrf37XXTv4QgvfH6WLSPk2AXKJIoMGajtvypymv4
g5A+Dwi3iT0f1ohnacnYN8Drr1asQnpiTD+BhH7xmfEjKjvcB+QiFEQg66bq6iQUya6E5qt+2QXA
PDX3a1cP8oAKD8iCIcQPR8glZ0zb4jV5djazZHuBdvZWCeBKs7cRdwjwNPAIwCkxsAn9Wp1/Ufpr
T0TF3CGokauuSVRkTVP0ANl+Y3QdrpbnNaACS55jFiLyvQ1Z877rs4LI25bsFfSRbKBZ2Bfj13ur
C8cX4IHpJMvVCj7DHq+vtCrExpD5H1X+7D1oJwaWupFWHlMBwtPszpz2AKJyI+RT00ODMv/q9Fxp
GiOeqdi2/X0aYuCgKhWySUqm+GyFOH+CoKcg3fRU7nkI4CFK4eUi4g+jUJCnvHZv+sO9Qd3s5AG1
OxuAfb4Eb34iUuK3rskd8RZEjJ0KY09s4qXWZ8uTbVv0jUaRzjaH/b9+Hiqm0o7GgnbWp6+vJZI8
YiyANxa/+WbDX3X4qCFjEveRFlwDu3xk3hgKaED3auGbYxnjHN6uNtiYDy/imNwMsTqTkwdBu2nx
HjQoLlP/lVtfLwy92SZP98etNZuSxjgn5Gc1Sxf6PFfje/fck2P3mB2+fOl9P/hZHCmXawvQ4nAC
/t610vJWpNSApfVY1JH5F2ldc0qR/u8PpryMwcLXuDc4312GjpbgCL98YH+SbN6kuw7Cn8ZU2Uaw
XVhFLRN1Pvpcdv961NfGy34ltKVcW/P0LlYWk+EU0uo3CBDAPm3iBOcMJ0a5Ko7jsLVHX8eJOtjq
AIlt0oi+M4JtiX5WRii7jZLZ0LeJSFia1V36yfMqBDIeXK2eKhQwH8gQGsqM58pjxotDhP/SnvYM
ZrMH8nwCQPp3j5bOC/pJWFsLE67DNiRZxqIVe/zX7btt6i6vqFOwv6aHujZfvz55rDq5WzcqUaxl
eHq5CHxZcykQOiWWasdj2ahskNd5UT8rtC1vdYfYQVKU1HLic0NmtJEZ04RUTWkbrA72toxBqU/q
UhvblznecfrAnyyi4jaDaWOigsakjSWQYvbTmRIfaidEiaGryvxqrpXQv1vf7VQQ5tDaplc+WIVE
ZuTvfoJz3J++xiHICJeDjBGozzpf6aI5q1Z5TwtdDmNpWtqwZ8ruk7cDTMebLbkmbqWx03SJJKYi
SgHVgMpA9RdUiymkpGrSfuWG1h6G9RYzSnmeMlsmL4a6tm3zf/GyTLqqZo+Sabuq+vXnsZhr/QYK
NOLdUXcrghqm+7wJZxa5yNucZInmwC75pa0JRUIPDzwtYtV+tbpVOacqozV+fm/PL2stw72WIjtn
0wqAEbOxXYZsi7KknDtjmQh6uro6Efz9eXxITa5NAbyXJgOLFI0ycJPNwxHUSoKmbRCKeiktthz/
fv1n6qbKaBWiYxDrKyYmdhJ4/ZaFZRa5pKM1/ZwVtk/pjNShg/BFaGH882rPzrMeSXSnmMPTkVLU
RGbq+mkQkO6o7kTD5JUmwiKNeoM6EJH/Hnv6FZYC8dXfPFJdnPxZCAOL4Ug1k12I8eqgBWJw+JMc
HemrI354yWZJw6eKCVI5ipA/woNnTK70QxGH6RXDg2w4yt02ajA+EUXkbU/phMB5AVMEo1CicnBB
5SHG421OgjNgE93Z4HkSYo8uxK+BUbrZxQa1lEMXWXGFwE1mLZGl2C1kq3l9a3uqb6iK78kCPUpB
CIIuw9TS0opznH0UVw1szRgO/y5/x1pvAxDHH7KyaRccjMIhavCl+bbrv3LwHp22ojtuM1sbeCP2
QOoL9lKKPd+Y7AFhar22VL4gWNrmilo85/bk6Yieg5OtdHTmelv9MPByWXlDsgzaZptvVj3KZmWb
43bqXdXIFvhh/Jd9FrN52lEepux7qYN5+V2lmwQsF4tkyio/9MKx9/lOVF5rbjJNh4h5+3BV4Bhc
toQRg6aOeDfuxv1kE4g1pUMZAFQD/K/MH+UF7d90Q2OViKg+HTJA504S4znFgljKU62wo90sx1Mw
PIwL0fUOgfsJuNKuMkLvdgrn1DZ43R5w/zux4lL9K+hQxGxkXhA+yF1OBXRT8A0TfyfvYoUC94D3
ZcJEdU18b8iijIQVrRJQTBFEZC2ZNKlZL87caVbl8pcfmA5rr7SxkK68YSnfVuBHKYN9Flj1VGcu
ao2d3hqsVkT8LjiuKBf3Y/eEqi3Uec+HlXx/OmjV8KYc55yNTA1y4PhmUo14Hr0V0933cnUaEKtw
d26M1NyDLJJNXrZr0pGUHqoFhqAPJicSRN4DPOvIkOGouXC3W//AXg7dL4GvXqmiz/5+goxqnUrf
I8UIIzMwWe5s4gwRWhAoxZyMY43Os4c7g2jG+6Dg68JsBsK9BmOt+N12jgHim0Z2InyRw+ML78Tv
0p/3TsXMXGokcZvAr+LKbBFO3nGi960mNYmAOARVMiMTr6LqnoK+4wtdRZC4t1nKHGz47OBoh907
7W+50fzh3Gmo/2XKu7QuCddVLOfNsyJ9y/QvCTiBm8b0BHOljK/DuLChcjN42k2ZxcAca8I05ldj
qk8aJ40Pqm589UMd24P/eq5ZPvTwotUyoqTbmFhv+fjtfLf4sASz11sa6Qlcsr+Uun8W6KTQFVfE
wJ5DudD+pOrrNXitlim/HmZ111/UyqBpglB3eRdrRPTSx7xvVcI5emFGsTFKTkmEKlQOThh1HQoT
Dnv+84Y619JVaw0z4vCEd01iffZJneGbTLgYPXAoBVyp/7CVGzxNgEgV380JEI87hA0eAk98HeZj
F3i8HCLyckFq4UWURGLGu2gGBzDlyA9GfmVEwNGzfhUFgB8DznujfoTOfBh6TiKLrW4fkNPCWHTz
jG8JS/joMjstYbgWvUtKdUjIGkd3aUt9S3fEj4UiWI/zzSL02vCLR2RlYiGdHUL0zDJ2bzhdza8R
CbXZwLxA8idUGTu0f/833+eA3ciCfJrZ2qD+fkk07YJcPbfEDhjfqiuUqUSe7nTYOcu6sjLon9sO
/yIABo1xqJMwcIqDTM32RgTyFUZco7y+v9YgY3O9lYxIi5qBnt5Q3TFR0RRCFagLw97dvk2qgSk1
+npXtU6UEkkmFArESpbMdX87I5eIkwf0/GHr+FaUZcnyvVkoZHCPA4MnVFoJHUSmlyQtR5W+W7au
0F0Mf+IbmqlzI/u4VScJnSwtMiEr7qLtL48m0uljUgad8BYGseIWRPmxPI5VJO0ziTfQSqLv6s6y
nMFc89A1jYeTIiJ6JBmjkOtJZPpLsphA7dAcRnRsFtX9iBGNxVZj2H+AAylZ0xARljyi8QxFIauM
QIzp1UU4LWy66564EBaHzOogsWEcvsWvv5VETooiF9sNpY2U9UUtLSTXSgQWPYTQyYaXcxx8kx4n
m9jyxz9no5athBQuPrY7rvCzCFaI0DFVAS5cgu+kHQKP+MQceRlpWPRLKTNHT9Vn4n8JT9a2cSvR
beinjK9wUqviBzRrLdkJ3JN4v8QhsVxujXNvBCricguwCWmoyYnjYJWFaXkOgp+dtLU24r+m9wFI
OCmIfcPRUXz3ELPOUHBxoKwPTKZxvV8fa1UlCVVwqHu4R9kA/mjTKAdmCgPnCm5sYw0t2pxqq+DG
x8ffOMjtv35BKKAxd9tJKYdQ0upAstgVvTKQU6rzKK0ulisz4zhQHeizS/i2qYQiFrSg/WusnO9y
FYVZOJWOyZAf4827K1Nu2oSvnVD6sA0prhMzql31sRoarzQyQIAiszoqVEauJuI7tNqcMcNlLvYb
eK9cOKtbgDXoUQIMs7DsgYXN7niOeaKuGpWE1R9VxBS9gPUzdXI/O9rO74O5sGVrxHVep/bcPYr7
AJnlHpGthUznE356n4okiARHLT2V1A7GYGRpy/GnTVRIdC6i67sIO/Bg5x+MuxvIqQ76Q/qoAREl
Dk9DzIRlz5s9RSynR6DO5GlE49Hngl2JMXsxhO0Hj8O2kD8/jRGxRXPZgMakcg5l+2KqYw1mGUcG
ZThOQm32JCxcd37nTIjyh7Q3RT5C3jNGEDvQXVLgdokbSXJesTY9lEy5gMkA39DRDRgdqVekYIRO
6KgbISu8uhQAgLWT31AGpyOaDTw60yHMHQ/os4IQSMn4/OHiDiGTECofo7QwPFxKEUpE1mjUkVTs
EuXvXkvsHmL6M7cRUTqGhmblUZzjtqyWVwMLe8VsfaNEurjV8SOer3OVslkOgM0wwU2d4a1K+Amd
hHjs8BIdWcEYH+jMiY5Gs7WWp/8X281Eu/qYv6Gtag57D1BNQeqby+woWhaJExfJ0hrzKeHiENG6
p+P5Xf7jUZQ6swjRRzmd4PV96Cb3aLc8LRxiUng+ziKmhOBbfxy+vw6ZpPQIZ474NLSEloYfirNs
S1c9MK53bSMt42m7ynZ0qKj/hMWViiOTmd1ZDNl7eq/5EX5LPtbXQ+jWpWX39uo4S/L6qIP4Qzbw
qVKuO8G/UU51G5tTTESemGoQS+dkvJnadU0koNRzrhi017CmAilK26Cn6/2KsSPYc6zm9etzK/Bj
CDM1uqdGbJhj06v2QZyEXqOJUKlY5EqA/h1Ly8KPcIo6xiVx2BINh0jte5zutOl1TxLA4EjEXl8V
z3BSpqP/IGOXA8JM55HErCLdbPacB284PbyepXNqmYOuAv87mbH6Kj8tKEv8gxNdEx6ZsH6/Yy9o
2CHwMAevU2L84bZCE8Lco2RZ2DDoX8YDQ/tf7DCGzshS7InzrkPOpKF8Z8NqJTmwYI56wQ09FMz3
NrGPpJW7Ld0yGNDU2Irryb/8v2gLIj/Kzm8GU+UCWnxwBUZBzZk2xvUXjI74GH0C5H1f69y5GDAh
mC4s5I1KmW+6Mt3BZqna+PvHKM0PgRGZixPgZLM8dmT+IUXKq8kuS8hPZ3VZPhLkx2F3zTENQ+5o
pC8oyVBnI1jHokDcCidFYYBNcOdAo7iI7forC1hbposyR5b6Faa1HR1cK1/wvEmbfbOMEwP308C6
2XapmKZezSHZ1Ey9gaisQnW0iZL8fTl3QvNFzoVDBFpr16h2ySJeQWREJY9q9IsPkLcgGfDQ53eZ
LcZo/I1i9AfN0FTrsAg/WzafmI0HAKe5Q2x+ikZkA8EZmGPbxPb96RIykP4XbkDK/FM7U0Ee8x+w
r9UBzN3SPVpNgxaVINe1utAr93d0ylB8sI0UZqklwikGrV/6lPfAeB7GQfVGnTh/JlRK6OVSrcoD
Bt0dCt8EBCVTL2PY2x28n8adcKsiFzpfpKGIRNEAcg/wH2w7lXUcJt0F1MK6kDN/tZDKSi/Spg97
LrV4flvCXEAdLHus9aVubgD4qfJMb0kVOjgnGSowosuju/vqY4Pi52OPOXntIp+Ilo/cmhOHpyLH
BVBZBdawcO5QCNWkH9dJWUPtLshmnV7ieg+xS2k+IMojNz3yDVpDe5gnRgiH0OSfWL85WpxEM2Iw
rTWhCxHNxk2RY17CLusjWACcgSlzipTUNgISaPqJuZNb17J16iq/0ccSAtFEt0N7LirYP5PabnWj
/QFo5uY+75Qe9Vb/XthGqbJRM04MM/3tE1foEj5Fbyi/Qod5Oy9GMlNu6+jriIqmgysT93eCiL8Q
jRX9hfkG6L6ZCv17ZhF5URHMk9rfzaB8CReTNaI8ez0BRcA1K2tGnYou80m5/QxULLCB/lW6ehJj
GFbuITK0accGvX8JC32cMkx+/hVthtwHe41A/t1/hU9wYUu1/0RTmOzymDL/Az8BQO+lXXAD95ui
JNhgTfiHd7KAiy31bBe3Po4bXYJUmM6/rTvUDAngz77hSp5e+vx3nGfHJWs7p3fmEXl6DhBwVB8g
NWdnokDgvoswVwBQX9u5FG6n7n0lDIeRrmbkHMsPhegPXOTl9eo2Ik4x37V485A5pUtHELSgTKXU
Mcla/emQf/thul5JTzMDnvxlZhvNLlDdECzfbBaCABBw9/PfucwaeHfGj7WCspjz0ha/at5njRz7
53UUue1YYs/Kk2xTXNaC2dIkILmuoA2HAegz2OanSL8lzXpHIMnp3fhsdjpgwYuJPJ4NT55yCUsV
A09jw4zMMwEKBGII45yq8vRPKzHcw4MmEKm6AuHGtHxMTfSjo1JpMAUN0DfB7ce68FGhIZCoXmKK
23kqxD4RzOjA0B76TbVZBjEmRbpPQus0lal0Dy61CkRrre473mip4nn8TUX+1jjJbbYQww0xw5k5
gAuDvesry4tbZZjsq7z03LIcM0GL4/+NHLvFMQIWfQD1QxVYfv2rHsSCAKOPpPOILWmC09i1/1yh
aoQ8YgTfsi/VLnfKVokBdk7n+mj+CgbzNqzeSGR4J9diQ6JAOC4C0IQppF7E75xWipaiOFEwzc2p
Oe81733oJO6klEtfvi5roeO0IpwDAcy15wXlU+sbsODcOV3NWjq5iaNK/Ybx1b2v5OD8+kvV/OUa
Q0caZB1vnkBxylXZmsNJ0498UkhIVMosi1oGbFhtpW5M/xmdFHEbcPQGnoJh4CmOjCbo14zAOMw7
grNevmgbImRKuy+u82VihgCWs6Sf356hrkNUNcDo4nWupB2uK6Dp8OI4QrQlG8rcR0U9CV887qUa
0A8JFGscYsVinowo2ox8DGw9X9SIjsyLaKMK5wm2bw3SWmgrKS9M2HQ6xZSyM+fUsY+7eoEewcTx
WKZUHnsMgIGA20z1rZJcDvZcP1okIMpm34r5GToqso4esJh+TPsZPjLeYsVaW8dHvjH56vU7Wdll
QuxvTx9yYsBAPPnXtqY8mo6ID8CUCLHLkfC/Ie1KWcBFlyD0wgeDLRmFzrZ42b7BGO/K147cg2c3
Z0BF+mxvI7Xh/YLSoIKsGbzGAfTCdG9LFycqet1KBqc/NTQ6VsXMpDBLszHFKp7jzWKPC0k95Qzz
EI5fLeZV+TyuzZxCgdtRrJKpssCp854Ar5RjFD2vv4E0xYzvJwzLFeyYOnFPjGT4r0eNob1PM5KT
wcvJSpFJ3+9Z5PXI17vqeFBbPlUfl03d84r3a5J5RGneoZ3EbEDaV6gUjprfTZFxg0MhO5IUPpCg
xVcrvx6qSkx/7FKKA1xEhs88ar2OJhSq3ylAI51+1LeFwb2+pqBNSm1WCmEgLga/ibaCur2/+Th4
gHaRxfspAuAeKXwGwSSeD+VgpGafzvitTJt5UkhbtrSa1nd87rb3NU/xj/7CUltNdYSvI4M2TOD1
1aScmf85YTCC+sNWo1Tqst5mDajqAtb0rhAbgYfRURiu5Wz1HTIEnXaqL3yB1UzlnK/tscDERkFo
HvEy13SVVIEcH+KSWCQOtecoabXmG5qgpfkTR4beLEOotC4yojnJqv4hhWm0WP74fOoMoykwdRj8
iHdlRzwc27PmRNZPOTGRDV5U844ZzE3fwf+aCOMSaUfI57B4pro7/JVCw8t0CFlzzncHlxKICvMs
C/vUAjch+7Kcp8QdsiEa8ADt0FuvegNi4mfEvBeFsPHAyoam+3o3yJ75sOkkhM134BgAQyDk/7zF
TXewM++8QLnuPQS9uWEia7TWMC4kKKGKOl0+8DTA8WUENo1U5dh+XkLv3KvmX3gikWq1rf0dFq4Y
Yqz1Az6zLSiG8tq/So+h5/h3NNcwjA3bVQiHw63LppKcAMEOp+UmaxMTbE645WlvZSG+O2CtrORv
j1vd4KKKwxD8ZHvl3jpaGjukEML01xVPb599AE+egjVeCoaxw9ugK3KAJoOTPiNHwh+IG3xsraIG
ORZhYKmhRu9zSqXodQOGZTu+HmDRJ5cXKhspmUg6UgDnMOYYlfaHaHj4+kT1p5CPPKv/l35bY7gB
ntMlZPxavHlOW+BfV4z4QldhP4F9NTfIvNTsYdCwap8ZVsdeLX8i2bVxx4MrZFHrmOUn2y7P4wSZ
Z/h2tie9nhii/khj8l4N2WQBQ4OZliWkTfV0TI+Kv5j4jgrPtP9skEoBbbyIgkT/1ETs0kIB+Kla
+1eEG3+81bN/wzn4ei4z44UFoYiWfoMCrblOtJrsy/TrTerCwWHnpKFln1+BjEIbZEfU9ynZn4Lc
eCbGbwx53eqGJWEBk8Gv6IJeQq2Ev8TwTjgNJ/ijJx/GeT6PegIU9p6Tyys9Jqv0XBN6pZOVeeos
J8JPWYQQEoEhhZ6vy8h2D7Pd6CEdv7BRmoDdHoq0osh6a9A8L2d1NkUaOsaQlSWM8Y/Of3imtdT5
lS2ElvFp7ZNGj+oFLmQOONseNiufB3ygo4SceNkrTHL/hFjkbDb44SuSPj6BDhb4ho0RZtT620In
rWEHPki9yNiKVJx00bgVLs4DC25rp48YEP663or/wr5ZlzFys7H45ZhAcVjuvbxTrwR8GpkTrN3T
+R4AtEL20GJLdpNmsnoAogyveaQ7cM6dvpKs5PzbSMmC9BjOStu3kRQVlyKJbDIndXbd5sICB1/5
1a1qgwFxjgLFqV4xNJarb/dU4x5ELOgSs9umNbm8oyy8H2utKYGTubbkj+luwDARA7jNqgSKabGT
6SfzXhu99STDfvoSFU9K72OSLfyJOZrK4PIPlUUrUTyT5C27VMRuaSyu1d2+h5sVQdZX/mX4v0TZ
7qk0yGvQFG9blhXAXlnti5CK+7PZFwoWBZZdtDIvlvjWAkzq4FRrc0uSGn+fmdI3sAl9W/hKCaFs
tGHLkRjBlyuoIa+JY5OaB8FWWoxVyheAvcnTxvaTmKDumSJvpolD/NYrVPg3+tzKJ/5PNZgwfTgy
e+HUq4K+5oUTJ/XRXu+zjb/mkIpVrxpcGFNV9xGJesaol0087UyJ3z+/m0r8FCDzAX75DgXCMcBS
lQcqzsM+t72SSACEIdknPT6kLdCzuuY5or6avAfPMg2YeC2g2snlpVBe9SIyRuGSbY0/P5ok3pi3
f/8nPmFCX80IE2yEtlJNo7o+XgWbzBI9paZUsh2ynervjjyNtKo7BXD/KU82ubaplquVrln71Drk
rb/t0U5fk/YJlgC+YKBewVS5vLMkHkubXqdD/+Ey88XucOKe50AhV03+bydXWiEEoqUhfXhEZaK3
XlajO0PvxYz/FazuVRoyOFEiR26q6bFki8JDCy8f6mlE8sOQztWztLvC2ymLn6Bsd/NZMbzHuAK8
sbOESf4Bo97SlxAxKknD085F9tAPUN3SMTs8V9ghnly+06vHqDkisBd/VyLUHBv27YthJ5gK1Sh/
YDkGhCa2d7rUFUFQZoWwWFIeFfyzKa31bjND0nnRXzBe1f94vkA3bygnoxpN/TPe6gHrt88SYVA3
/5GoWXk/dunr1M5fV/EeT5AFBI4O+Qcxy3hVOSPPyU3gceiWs2Le1i0iCyd4B0GS5aTnvnLES+Aq
2IwyGIn1vSwIxBMvCQsO4OJ6ECdrrDmmzz9QJZ03HT741jB5zwyucyqSV8SLZ0rpeqox1P+LB7U4
KFQKUerSDFYNacuMlVtwYj4TPRsfONh6yNSEuEZfOLVjNfcjhx4LymEbIKvTgvliCP0d/EQFcfSe
tCjiVs8kTnHW3hA54V0w38T/Psj2hz79nKetR5p5K7cM6isi63H5iMHINuH6/8qkP4nx6aPMlCBI
8nMf2jr6PLaD1kxaTbK7I8hS2hQGQ7EShAjWCn44cRmqjtxZlglXAse5SrSDQ8CvvlJuEhi/dCHS
B//SD9O33VdK+Sj1sP/LNRL8iglVTWsIMxIGnuXiJA8Xy/8tl+C1yQYpp699N2uJ7CsooQ7ZY0YJ
aVP9ZwJ1WyFZQtarTvrbI5kCzIAbQCBGHWSziWtf9R3PDfi+0gUbGv6mmdLzDFQlIHpZ8+GCK3C2
zMczEMDT59uVDg5oRJdmAkUAVlZMp58/MgibHrFcnMthafAmHu2UJ6SG88gtFHai5n2QnTeiIPjO
X/tai4jlcAR/FcW2O4vGDqckV2CT+N/vuTBDMhaw8bHMZOzwzfNjcIsE/0JdX2MijFSW1Yq4T5v+
Butb4MEN91wGK8AzuZnkDc2MqmCvAKslDx57ACKRivQYO9Btn33kNC9vINydzy3fclnbGOS12wzB
0fRdHVUCGc6QqIyW6zdFjbXs2jtA+eyEjLisb2yh9nymyFGeQL7sd07YwelZMa9J6KtrVm4mJisi
J5Hc5zeBIlXAUKlThKpBXaWKY4EXzUT/P+oJs4ifh0DVcguT5YvhfjadoSG1WVrD/6ybNoqImvDX
o0AoZTyWgCTm5QwmMXSVfsMnjr14I3SCWuMEHSQ0cQ7SSe/ZpQOyIbanWp8o0nnFMUg8rHxxuSlo
8u0mcwOGspSoSpxYdOOQjPGpLXSgdFPKJ7jd9bTYESzPYfpbo7G8zxRjkyH4i18JkF8CsSrt7dF5
1tVHgF7gOuirrQPZpb1e3ORkV0Tb0ixZEDkDyCAp/FjgA/y2GtFRXoV7/1lDB1FpC+CJbDoNUTmP
HRKCFulsGyytfcVyy5I3lCFb6BIAKaJE6Lr5BAgnD0cdfasySlffHKUBDe8d2Kz6XtlvhLvk8pUa
NrIybTUmC02MDKAT+sOZc1vkQ5ARbc3rxSUEakNJIfAJw3XKPn1PGSjquMXHLPpHphEk574oduzH
FEQAK5SFXnvQL94KGdWs+0EoUVGgWkocKTYVgb8oKuq/Drk26ad4yQJ15xPHNN8itzRVPNAWRivq
PAOxPxD8yw+C+0+iXwjekq6FkOT4pX/5rjnfvguF8IcWppvIKZ6TRjsHBZV9k9WWZQZajAyzijac
eIynTV/R87SDph0OSLOeU1ZPZx4SSbBOBQZPB+9Q9JRKYbQf8RPsGpOfh+3Wae/rQ1DTtQdpqYZ3
JS+jWFQMc016WM0bta59quuXfWWIdDLhoc6wukrAArQG2e8VhtDJMCvYJO41g2g6Ek6f60RVM/8m
fdMWBrd+h1LWtBva3H0/Ys+Ee/kvV18Y5by5tCHzlKcaVd4tslhWzKP8hRJfQ/kn7lIuCMTN4UdE
LjXIf0Xb90RInZRtt11OnZQb7zFBfidW7bkdMrTJbXAWk0p8ePqUUx3Llbo/M46S7P7tMce7zV9s
E/PPTipgkw9zicrgL6jPJDPL5jYWeX0WbOnYmEt8ASO8XD+ngc8hG6OcJO31997yFBZadFwCDQkY
SaMEZvtNiutwp+g3YnxhaG84k6irpuDKaoYzqdpwAE7G6fzCP2B7x8JIg8NmDhOdmxl+7NZZBgE6
QHEO9bvn44HXsbWecfO0b9rSlrAeTuGfS6ReXfOZgBSEmBG+9CShOaGrLaDTq401nklW0JuaUPIz
0Ml4ZvAQChPrysAFqDZwUlrB+mZdMFIkFHU5uupDWXwKg0Ziss65R0A2PI7kdCpu/xPE8FoPxvUi
OdExuvTLx4Dz7y7FngTp1HG/UsVvCCCSiMVdbpSHEnvCSMjhYojxcSGbEtIqTF5+j4mjOGIuKoYh
iaHgwlZnQadgCtK8zOxOHFQBECtmDG/fQ7ktTnsLwXF99+3BQVHNM/4DEzqOdgvsXEyfvQX+dRDK
PKXeLkYTnbgeDQslnJNmtC6YHX/klzleHB/JWe20b5zET88QOmqGNwHRECi0v4HKXdfNK7kmtkuG
v6kPeL3M9xTyMDs1VmkrH0Tc7sgC/4OsvhygAPFt/P8mC2KYtkELnI6+6YZrplkwkHWbGXSavzNw
zPjtquC3YeO5Y7Ux+CtWliFdTw9RLBOodHFhgwnoSGT8jNw303ahGP8V8pwqL1P1HEGB6NJcwzKE
uwm8HPGbpdNSVNSZ0iInkR/3d48JB2dsdXZNnkgQLJi0uSt8xijmRVdQZdJMd16D9ofYH0q90bzd
WeM2IaPT9gXveXrh7pIhAykki3F5ykgoOGdDBmE+3DSAvYBQY4BXK/ST6Vkr8JRimbvnscHkCAlt
XkH+JQeBYVoZUpSEkP2YVcANY/ZZhLvE5N0bquk1ZC4zu/vIPdypQLSaYGAzkDvsXqQkFy+bFUkO
5UAl+V9tfVAXVf/m53fsZ6XUNmn2jteMOhftD9TyUN2svjxAEiNpVGEIZkcmWETM+PaH9TjRn08p
cX/ko1jwl3HZ3NCEoQd+6ux7ZvceSYvTjt2TapE7XWCPt6Godh1aE+Z0Lypsb4ttYLfyBt+3W7Fj
i1Zt3iwH6JI69RrmHLvHfX1Eb7IlNE3ebtXCP4gv2l4QLFjuWOrmvnVax1rElPwISGtcBiTJslib
WzDyQcti9eAkJXgzp5K4SOsEcleFjoMfPBpvE9uWk1JzQ6SRfFwZm18N2yRVBt/w/jYLRK+OZZgc
E5RLPKAjUl6mqGAbpE4WTksx7twQTOFrrE2KGtGJp5l6Bb5iVK9Kh0M62sFlscwEQymOWaRH83Rq
ewy92NYFdWti9AwLJXCmIEDW+ICfPyWxMNeQ+lWgWX3Q0NkKl8MfJgI2DwEZof3KzIZqMgh7jxZR
vBTAmfDwKIwMPfo1TW4ozqSvkA0Kr46ThwnGioQb8OsWMLf3xBbKGUjoBjOS7zMjJrBvZcznQG9z
0v3pWISJbd1lmtxtuXcMIxescZyZwgVochY+s4T0vfTyP8Fr9/kSL/Vkve2bwLuLSieWbWliNzGS
HnYo+O+Cx8+on1CCdrX7+Lm9Cs6CXbMY+fFExE1ZDFUVjgmpGVr/yhet+7tY0pRyHhzUaVZn7bmC
cVb0QqhSRvHyo72Y/gTgCLZ9ME7eT25R3l7oZAp2mNajsspoWzdzwzV6ez+eVnIw52mCysiBLdQs
ebCL5VlLW2fRgog5/Qm9mdN5nm+h2RJ686/q5t9R3hhCfyz2ThjruWCoumAp5oVfMsTMmYsB0J5c
TpTOEpMdgLW0tNHeuyrMx7NCXGRf8vsiLR4phx6jh6+FcZHzmOQTjQTuWkgJjFyGjQjGdqRMxJnL
9a88vWLGNWTI5e7IibfPQYEkv5R2TJBoChmOhUDGuQoPwQG0gMbnaVSXQukYPykxjWQSAgTaTYBJ
zexYpgnq5tadbAV66fs4wExAT9sQcIXzf5yXMH0uNIM+EIV3j/Js2WyIeNxw9sSM1OKqfX+seCjt
w4GTKJPWEkDK/XWzEmDsBmEttKF/1xPjiFjnpKI3p4i7IqLGdCKokUPyhOC1Ab63SrTvuDAstZ4f
9OxgFZJUgTvWtScEhVaAdB1d4NKOEtlpJ0EmFR/24CLzpkp/OqI8jLIf3oUIy70SNPvrxz6Hy8g/
aCPmt1KiO7CBFe2dwXFvV7oNKQ2MZPEyQOah2wapfMA4x4dX3LAwL4ew9zklSf6XP8g5BQDlSdKJ
XGxk0E4S/ofNGBS7euRmWzCsMAKaqohwO1Y+LVhqAn47pzAyobKI1Cnu9sdtaZZzl46xt2TMG1Sq
fYjl9dAIX0XOC3C5pCrDiKtAz8zSaLDSeUCS48mY4y4Qk15sGOzH2Z0DkBJx5h1+Ykdqx85AUdXp
Z7iI6VgZpnfx1SK607Ti6iwiina4Uy08xlYtrzdg+Cp51vlW3t8/gHFZ9u+FUJenpcHM7ueimlyg
UiUsUkIXXX9g3mxseLHQV2EP1O2pbKzGuq1/QGZ5Ze0mQbstRInffSaw9v+cTyM+hXyn7zij4x2j
pCl3+qJD1XNr5AG+y6b16wOMWWedUWhCO1jGMahrXHxSzh+Vy1ElQnMiBTmsXXA4rM4qXnATLL6F
ranbwurwpq0hYEflKruWGAl4Tvk+DgVJmPsqJto5/HFUCP0EgSfpFBskEz3tmfyb0UhF7RD19arR
RdmKUehHVTpEbXAeqYZKIrdqoPr+9vSWggIFb5rzE6xrA+if1zXPWxv64KXp5ymlxrLtZMJt22e4
rR4XEXCBeAhfUzfNBWZJF/COGn7ZfvE2wzG9SZMtmpbBhsmvbwOJBFi+2suU/aWpqpYB9X3XSuBL
rd1uqz6OY92ZAdbceIBpSlVg7MS+OyQdSLFZhTNnJ7BvYFLZhitFTDapsdbHjO5oLLyEEqJM6rDz
Lv/Sq+kzXJ5byEDUFFXzn3j0ADQCve6dWg/NW4/x0GxJcHrSTrMkHZIT03JM0+UUM2UB0apflUtq
AmjTFDRkkkN7NX9u3G4Z2NQLcX/crUCY2LBGeJk2/FXgw33TMckO7XXfIUicOufagmK64ErKPlrk
DRXn4aUh9AJIUiN51pcwXjMVv3VUXMWwmr1fdiS5gBEWFDQASgrvh5GB1N2SK7tDZBbW9Hr82S61
0OU9+kEOE4+anmSo8rV7EvDCz1OeESy5hQUpXkylSnHlA2chxhR4Q25Gx/PIomTU25lKCasX2Cb8
vNSeeTAi0y26ru25unhffLpy0HlNtdo/IfUraYEfQm8cuKf6n1z3Vntn9gFr9sYzhx5y8l9O9tu+
twpxxKWIdJZoEAmwte2D1DVx/blQZFBuIOvSW334fR2/qXy4i1bGNXEpPPZJCnF1vamYi7ITq4Jd
uWXz9v9T56nBG2weEq7PbVDxBaoYy/STgIiNN5LnMiBSSlpPDrcg0t8t6GUeEragZKVRQLtd4qni
6ywbfW34FJ9SF2tKC/VVyxbtmZGzVSuVnm010YqFp8O3d0MMLoSHCquyW37YeojgToARrfc6Iw2a
9oFGdLxGGFbbdoiSo7P5RQdTRDQRw6WCETOIkrYNG+RjOO+KMjbZ7uQk8Xp5Wlg12YLP3NCKD568
bNuAZcDY1fbvd0+9Lf4Mn0otYpt+QO0rjfUO8tHThRvZh5978c6hx3BQW7JhLOUQ6VMtq/SBix48
POyf1Lw8FLShrDkbV7qTfoMcPlwjj5n4UmbQKg5kBQLTvhcHKz2OZpQjZC3tF8d6c/ol9rMYD6sX
TBEfrxnQBu/ON7/a5X8EV0ExMzQE3Icx+5DKhP/ySTV3YPnguxgBCMXD+KcI5dlEED0YLSyGF6SS
KeG88TFuphEgljyogC6HXdjZGQcyPolyP82x70zKLjMvRexUeSe1zYqeAO4RXrX7PrV4BLyr10Qr
1gHl7480qk0Z89xYrFDr9Fp+xIuCKA6//quRqQhbTPN2bB3ZrZNbb0kJ21MX3c5MT8GdbGDjMbCh
lke7cY0M4R8sxua05+Blkvruz6ObPT6xs+lmBo9OnIOsF1uLIc4nBTnqubpPZD/k9m8LqDOVQrYt
yxdBTAd25zX/6uch7HobAyf5jbZ1/J0HpVq0FplgM1Lg4R6BE5pZpAHx90lpU1fE6YTgU9nKI+ui
tMLCMccsMtU+gcBTawfBj5i0fDfC0NFf20XY+/b4crwxjNmpOrOnYuyJtJTe1u26gYl2Vt0NmD3y
sJa6TB10rmXNmhCewU0SdBJ0iWJ8n9VtaE+1oN2wt8gpYUzNoWd897ujLzHVgxrVryTTH+vcY5tJ
P0iMtT7dKSeXqOhvBWPHyn0hA8+ZmFsdAidSeReR+vBQAH5rDYUwMj3C0otA4NhKF9GZQ7eRYRKF
a5FVdXwiIOrKiEMt2tpPg2YnW68QXAFuXjyZNDqnSI6BGD6x7+lO4zrOiu1OSRwlvgq1PNmqOwAe
NHYSzFoq/GTRB9WAxZnQRuTdAOSoRpbc+3OOXjpvEMVrp5YkyIqFrPSmQc8ME8zSYE/t5lQPFp7B
ZuA2rAU0Fj5wP0b4i4BzzMKcTUXAiR6Hccf7uu8AFilmpmFVCzjsAhqL+vYSXfHqMLYi8KkA23Hn
GHuA9f/ExRfX0MOGUjxybf/3IztJWauMPHLd/G/sFKHqj5QdBWmEmhLaiKIy19LUXOvueBRzDmQR
Rop04griSiCZF3QKXSYvQ8vSY6Bx6T905B+gx7Oc1nubXYWEm9J9W7G7Q1ia0laSRFydeLdFV0pW
mUHfetgCziW4DY0yiRVm7tVefpOxH9533AEN3A933ApyG0BUHK2eruGfCimbaFmsgr46YIf4wB9j
VFBaISg/7q57zUXSv4u0nkOnRGgbF9t+UtY0bSnj8lpTiDsOtRkH3Bivs7ActwnMvHkrSxylLaNW
M8cX6sifI/Ba3jwAl9l79dXx/qhYNvB4XekdFR+sko4GjPxwVdi+eKndbdgNWqwaTGjVi39FXlE6
lbjbL69+xyzIM4R9EBTtFsxhD7m1ffW5MScbX85TFbbasbvjISvHHRBTFbhIJqK+oefsBkS2sp6t
bj1YnhuN5NmQtGg9qg4ajTT6A3+JPxkP2MjYqawSzqqxivqkUuEDkqj6LtAgoWqpKl2y94bggs5m
cXFtjUH9cAIzoV98zvUlD3qGRqnLc0K6Tp4hUNkjqkDYZPzvvA+P7hHLQkzcpJpbcLnHWM6ero+/
igudOGJX9KAQ3BmWz+FYgZEXpWj+CLWLVdrpl/aNtOeChHxd1yPxSwB0xxF3vXH+aF8v4guc7tpy
0gi6BFxSr+P8ftzB3GpZVS9jVbQ3oOtRuqn+Pl+TgcLXEVfdjq8PFsBFqsnTbFK5l8l2MToYWfIB
uQF2k+F0A0KzM5/tAZLgfbcMlcytTqJI4yqnCRQ8c84xuK/zcVgX+w7CLzZGqCJ3DdqJTW3MccN+
Ice3IpdZSBR0zUnhUOLSAJYpsOpptHGbQ62QzGkKhfVJAfffJI4MbS+p4rEY6YJgc0d9DJ0c8P/O
9z94/Ti73kCLMn5DSs/NrNDiDTa01SrjGqpdJScwT7GS8wobn8Fcu0Fc6v5rDxGRBB05xpBmX+Yv
lVqsebN09in4yO7Elv5vfl3Z9P5GmRG8fLiXGmqbathDoyeSwp5CgPOb+If8ZL+OeedmPK9LS2fD
e7dUBpWHvwUmySRUGhOlaAgBUcUy7z+U93isdpH4wOLzlQdFpjd6e7EeB4pPzUs0SkYeUrMXuMeB
7FEx8ZzfuEUHnV05wrE6eJMWIFlhBWppk2U6JgZlxlVPAWQ7ERPHrXtdfZyzcyf7AlKMl2wDLU/y
33R3k7wtjYlh3gMFKr508j4prilz+ffqL667AnnbFvKXheauL4s5xZ7tOOcoB7uZ+t8D8QGZhciN
ng3Kf1f8X6s5AZ+s7oZv9FOQSNnVXDUQUWeYnt99qeNZN8Kd/epPZGwX/WJarLjlJc1Jzbz9RWM2
8sovEqDfI6PfCCtgLuKU+lPIBKYZV8ippeR0RxSJxFptvJhe7KHdP/tNaLH0dV80KzS/zmn8Mvvx
aAO3hrCopAXrxiZxMkcpCmLUlR+siBMvX/dkOVi6YYPin7OrZESfZvUSQNIzwRki9KMPm9te/+wD
H6CIM4TpF2BYMIMg3zF12F1K3UJ0tlVZlCQ3ke3A8SnFozD510s8BZDZz5bVXqsAbj23YksnO11v
OrJaqIKps6an1P48ToDubcD7Eatx2qBCjGZRo8E0R0QtyghgEXijylZ/DxBX1yR2hqdOFCdrI1Pt
JWl5W31RiMbpidXuuPUn+QawnsbQo/6y0ieNEQ7ci+ZSUsf3r1SvY4oLQvxrzNcPMl3HQK4/8btI
Zv5NLgu+FQ+67WX3J39Dfwniyacr2mAkMbU7HwZfnQm3t1a+hx982XcTLfj01OzGBNmR9WqmRfgE
4TyXx/f/jm7x1Yowz0OaBSLEM2AjAeAiHjygJ9XjNoFS+/eTD7PWYFVmz78RreyDn3JtbcEbJNgX
LQ3OnVlDZfSlVFCUY7KLWXrtKU6au4tfgTDHwTeriOFhmhZfm2vaOFjTTGxdrMP9syUaAL8oZKO5
zFaFzqP28Qbc2Aq0jGL5YEdNiJByZbAFIUKKmF48lU0IPchcKp0qHWdmFgX9OCGbn7/5y5oXIPK6
7FhrGWKJ8CYiKhqaZ1L61rtQxpjBvXXXF08Mci+m/g7qYXtmvlHS+lncTXvTata77el9QU4hMGHc
kg0uVwMLw0+im+/Kj8KdsebIrKtffEFT15sVydTsDXJstuwcCw1hQz07H2UGslKJklAU/AHhNyyr
0gsC87KMiAph6EmlV6kVsfRrt8cQxUdP2Yk2I07B0tR5DGUXFJIUDEFN/cCY16mDLDXy/UbTNsTB
flnL/gnyMaWlMd/WfWOPjtxEvAADCLh5xR/4aR7Szopa3Ksko/esubRUE5clGc5tMTxgUCA1tAFm
7R0Koo+XtojiFj04mAgu+FnuQQg70X7qpP5iQGFDeYa0OrK3pWIHZhA0AyoKb0S8P/61Vj9KAcBB
5PgLhJk0ktV5sgE/yJfegW9N2J+NwM0OdNF/YX5r2/rNst0XWxvv9AIWINUsi39F7OXGSQnqGOZ9
lkk7bBLnEk3SQTg8JndWTHhJ4Ile3uEl4z2cqRAf3CbLIk4gKi0W3aVPkidt364Am0WuTipfY+L/
/xQjVAe+cd3TqO4YH84/asGJRsl7LTIx7hINo6Lk6B1NT5HSxbqcWvzRHWnQeaUNlSFrWRRiLul9
XrebA37rj1RNgdd5Z6RiDcZ5uyqfkvUdLMUzhvt+b24Sanyq4X8sDwV+6mlm3Ba7qpcGN5oUOhX3
krJJx5sMLm9hpYX6SdhZvSZWgFasU+TkGeWS1GMJOW4b78o1fQMjaX7A0LqyOHEXKOA0ZqFzqLRz
Se0eg+Yb6W6OkGZWWC5Es/Ne0yidqbzJWRiLDpjPk55GwVnVuBp31Yqou988GjkoEiMT0lftpSEJ
MPPzc9VNl54taeQ2OCp58fB5qYyPH0tU7xeDs1y2+6eKCdKyxKsQU7ML6Ubl5Wpa6/nyb/6mTioT
jWseIa0UcxoYfbfpKV11OYh//YPOU89SOMsIwTLsfjnR1EySt+98EO7BILAvo0bMT0iKo+jn+d7P
GNTLqSip+yRIXIKhpcxwtIGaxtoADD+/9iisq6Qg0XmPOyL9Tk23RlbktswigWKfKwHGPDghgEhe
rXa+ruQWTi3qK/4eG6nZSdlb5NLConv6miWv4+7kySsFwq6CSR+kCPQ1XkJOn1EsedVN7qZ+ignz
S7PtTMkWFEj2qmSbOMeF3E0eFFOSwExw6ccHZhpbAzJ1OEs0extcV03UQAWKA6chv3WaJVno7CiT
A9MlmtamMg364WmDjaY1Q7ZMuPPxiKbocn0u6dtLWUCimISRE+rKlcAdOQEpX88UBByCmOXXeD0D
cDSfYpH5zCCGakgNnQ2e4apEmzE8Y7FowdJ25gLjg+KXrkknyxFybjMo5iPLMHVqp9J7+SSm0Qtk
D4ygeoonOJ5EOLawJOOrOkP6qord0NewR1e1q4y4ZKW404IF8wyVAMu1+9Ohszko5bsjDCfWQr87
wUiadrcoi1kqS6UKw/9RzCMxs/wfuffu+kN4jY6k7KYFCY5eWRu6ssyqaZz69sFycWyIp1BLOpaD
DrgGOjd0ROpfusfzHGRAFPrpeWktMdWI4MKPDrW6N9ZzAFFV31xfLJUBvkoSXNqDTjyAd1xUk9PQ
tIORcSP/TYeIFHDhKsfuXq5Phr4Bi3xI+2386K4rdZrhSpNMxDKE5Raev1Efi6pezv/c3hmITz0f
fdJ5AKgOIClwPqrGPqK5vYt6vO1Qy0oF6nAdGDfYMsoqIW4x8thqHEWk6LGEr+IKHXwXQb/N895K
xIOR3aep8xhrSZzRzrphPznlFdsQWiokt8vQro5udzRfw4A+DoOQu59lmr98SEjRGP24KHLMVyai
zLIkTyjJZw5G1a18Wcx/tJD9k0ernuGmiskG/yiEiTES+jc3T9kg+7ZD5iJtqIblDdacNa0CN/4o
IjAjY9fQr1xqpLQ5uPjVZHrcZRKXt/EkBWssF2d8cxChZS/o81QJwi5Hi4hV5uaP526E0xnoidBV
ikq+e8A+sKYqH1F9X5bpQfqDjgYB2JDv7jiJAzQ6g5fI02wyzrMcDqNvkxS7+RLlgkcTtfGiBRKh
iXRdUWbeIXi7rKM6FDnqceOKiqepzZAUvXNZTY7n6oCdPDcAccklkfMc9nlk8mSckcjjGLNGB2Ts
IEv6V7RhYj9nSgAOwRi3iGCI8B2C7Y7AzzUP3l2ymCHp6kAYRy8/6wQKTcts5YLNUt0nL5E/ZB2g
7DOBQjfvFicvP8COsFpGkSRlQSUU5npRi2b583lB2e0ujWLG6VIcanokg/K12aNEPjLIy7WWd1w0
NEpKyPK1Zrynq0N8844JCc52sLzXYsXXU6Qz0Eg+yMTx4dwUFlevl5i2lV1LAT24Y6DhYENPcQD+
1YWubtgGskFJx8tm6Xk6ZrEESI+tOqc98e4oLYBEv/Nncok5UVhPUpJvUfDTdP6w3vJ1WzOnvqf3
idHr6agv7GHKp5TRfFvDHmXfWzXUw0KEz2oZR9n8Is+TwiMJlmxSLMS2eSMxbVw+jeoz+FXWRitI
Rz++PtaXPj/vkWyVdm9nnxRdg0oZO/KIlp9cxAhQFoKUpqpq0qPkimYJVjvSttfVRSLFJb/FmT8A
AeyBvyjLFmKCyaLVDpkqKuJEE7Do+JPiOBsPaCtwKRz+HvH1ils68r5cw4X7UCRS++3jlACvTD95
xabcqemBM1xPXRJUTslVprh6cPlFgD+jIDnb7d3n+JE88xH9exSPYcSOpTEexEiUvBp4WEz+1cAG
6e9WXismIt7X6yfYG6it+frzGoF7joXVYOQGibE8eID/86u3j82rOnPFxGXoh/SKB3pyHKNciWDG
/I+W0HJ7UzdtuRKGa+JIedFq9ERzsE15TOrZ8sOm4Mho4qAHYq7LNrFlAXwn83V1VnyMmENIFKuD
Uq9djGkTCxc4maZK7A/7I4aGbOVT/4DtdpZzgrUJ7eEeUOcLr4mx30QS4EVxxfoY4yRw/sXKhrjC
/32cLCWVA0g0WksMaFpKcDzyKbiVjzaCBf5+cV2rJq9jJAOaJwHElWYLjwPH5Foz8lGM3kV08LC7
IclmGkBkKQV2u8IgDsYzyTb0Ia4Ozbf/WkH5QuIUJg6XXAvtRPNnvnnRytfRlQTTVSUHQXlRsMje
V3wgGahyenvFx828+3DfiUG2RyijaQCWMqXcNea9JDW6HLhwFov2+LkhTn/sco6OR58xrYgANGHM
X7uelvHr5495ZPvfjpagOQE1MQiJTPhvqWUw6E30T9syg/xLxZ6cCPvX49uRmGtY93aQ7VSMSwfE
J7y/tjpj0VVLTn7KoChUXv/CbQlB1CAsv8wpy28r4EgbWP4M1HKqxzCqpwiyx4//BrjmyS563dKG
5s5hIw1o6OJBfoyOxAyQkxDBflEPwiXZ0SSD+xMc/g1T7pppWqP56xYaD4nYwDs9aBQ9sKxPmtlW
tWhnCClyTl3GbTbLxUDRwKrpaLg2wCx8fzzqfViJGhpPDKkDal75WzBjHc9C72bsPLrEnAudd/H5
R7ESAjsEulqDaZNS163vozEF4Rl7zYSYv+DryfJ3n94LTwJ4LUYrbZ0RFGW1hZewS/8NN0I0gOeN
x1mViG/eaPEd1OWyx2u4YsGQ3GZDfhZNC/NtKmGv+Jh/sHuVF7XM9a/9+NeT+EB71YyalgOQB+qO
Jfwf5Bcw+qSFpsa8etvzCEwvDkWW6GVlWBSsb0BhQ1ssLwDQuxVbHLOcyskGNyDIxqYul2OupdqZ
jPDL9mJLzN3FoYGo08wbp2oytg62vNEytdw878UtdGhMexYjFinI+4faWqwroo0m4SPiqHGo12KL
X1zCEKBseryNdl69ONaSBVuuzefthzVH/moE9IcYJ06DgUqDPBihdYN4PBa49QuhQvxJ0n05etx6
QJ28q8lmStr7sUwqpYmVqC/dXIS4Bgn3bEdkxryR/eqAeBb6XtPjPXnzn+zq8+/Wm1IiFWX8guvZ
CK8MDr2GUAUhBEHtAcTzW9/5xRu5xj3fueTQRz7c83Xinphzw7jPBAaj4MrCD2UNU3H2pEE+qYtM
7pETLp8hn6g9AWe/ajMEtAtcqx1vncuE9V7XfGc056CUnYDljx1vpmPo4zux93n+FLiz30++N39U
LVJlhEFu7oEBCs0qbqz/hUJxncyekScpiN3YFlL0XACKMPtJJGdXc+dZzr5kBVwXRpyYKsVJixcU
VLDGS2yKyi5ci40BRhYAZHZpGEU4w0HG6+eD8imXXg1A/ki+tzh3TGvwuj2F90Uqt8pNd6jWD3wu
/RJ/4tPMe297daRti7eq0oJBxkRn5CyPySGopiVag0P+U8w7qN3zx5ozTWYK0Bk0W8T4wZrDNLmN
j/3YO24YFbkuGyYxjMwvAHbWbVkc7gPplaBnGXdqB0Qf+jYNK7JO+xNhi61zXgVeOdOgQGt+foqK
r+hr8eShR9YvUo1E+BgH0Yk5wc+BSdQbHYUm4/bVvwyA/GGEYDwuehYjNtpF9NtURg71dwbBUHo6
mCbpODKg8NXhFzd19nec9AHHwlyHu6tZUbRuPgGM1TVP4/ocO8v631b/HHlWX7D7OFdfw2IQwdpY
ADH1MswCUHPzpNR7tU3SaEF7fisCYn97IeiIyQD0WoqGCNgHW/ZSfbqOPOl+VuXO4ducfOe79UPI
h75kF8eyAPwCf7uIBX8QkZpfmk6tTOZp4QfzPEag68y3V8vujTIFjbKu9NUSwhJ8CpcIiDPI5o0q
8oNX/YBDTFbjyl915r5kqTL01aPHXW5uzWGJkeBzXmbyjNzsOFaL4XfjAvga2b8kbS1cT29C1P3m
2nFqRw/1Y7O29s6xrTCpxZC0tzGPAhbDYhby0biswB4lNwvZS563UKy/4NMle/64AQJP0IeDF1KJ
jLNIcCRD+zlwQxeQQQEujCTT/eX3cO7/yqwc2XAnYheKOtnJoS9EeOp1Z5DD7O9gU52BPZNKwcvd
FYB5IPZ1fYDQ2R4MeyRSqcQ7wkP/mQtKBnKP8wTHGOWuWppDa084MRZ5hrStyzwz/37NZ66XVd+C
Zhgv1eH80NGYGpodrj1KAnrH9Mwv+s9sYF1Vi4Xwn1pLE/+U6j2d05/kFrmwLOap+dzsZoGh38mI
bpjKfjPvcjLTKMv++FrAVHBz1qOLXNT+/f2ehI7J8TkxNmygYSA4jzLVKBrFfUAMGIzyJIeFv0hL
MokBcu+gy75kHkYNehAEh06FdBChfgABlYYM5CCvEek2zaQD8W5rJCgciqBxNJHlTdAOb2Eihpvr
jQFC6lkpzjcZh1jgHKkKjajPUvfeyHnHSKc1sPEBa03HIUwp1qK59VFpwbyBtroNJpUOoT3BpxLw
fN5IiOoZvXIJn4JNXG6SK6kikeaE6aPvHhAxo2Fzf3NiilBhiq6sGee2fTSDMXmzFHDsLbIiEOKz
/F6LFQ/4CCPzGCCVPpwqk3DfGKS5v6SpFVxNG6VlBcBbE84yV8BHgZNJeSr+y/3wsIQHD1H7hIZl
PgEijwVYhZIh+c7/Eg94wMoFTdF6HOJbqSoXcEqW0BpB/YTQaeL84GXJZksAKjVVlMVgBtYZeCcH
jOoKoJVcb/qVmsUYWdD2leoiebyyd4ZqFKfHkrbM6kP8B9otLX7U2hkdq4xdQAbf4QMke0x0iZIN
INRjIwc/UQD4QuuxjGXhlTRQ20HoS1CVBA63g3lmvbsA9YwEAEakp2h9i6Pv4X4W4XTRY1ENZSHw
d81nJCbRWT+sUg+zIEOwcS8fisu9uVArvubHxj8hj8YmOYcYnomCtMDc5Kw9exAM7Q0puN+I++9v
JsaEXVNHkgACuS73XV1Sp0aJirhsljre7PM6YXaA0QmFt/v+TZgFEaW2gyOp1iAFbWy+2+AtLX7Y
hCPmnE9esYIj85BhJMQkYn4pi+7qXCzmr8C8dD4IewRhRiLR5Q4NOOIu/ht2vnudJx/UA4oeaafl
gk+nbmVhBd0nFATuYQd9hqkr+geoLEBJdb7g3b2abfoaWEuDpWDGzriuNevb3/ZDq7UzqSWeipXW
wPjJtStfjnhC7jgxZk4m/EU1Tz5Dg1DILr29x0cIWeBa3+9Xeq8IKs+4gzPUwWGh0N7G5fF/YCIB
UDdSjuD2iJEpbm+Px93LEXAA0N6+QT2mbB4UCeC/RQCBXljv/aKOLV/wrS96QureOv229Sy07arS
62ssg4xNSjLa8cMr3pyO8EmIgc4O3NXMwb86DO79bX8aEEZjQsrbga1oHvbeo8jkBkX85i1TQ6mb
A7GOV9gW+v5Rvdo0j20Hl6ZD74gJD5K6yDZkXL8mg0EL3YIfmu9Ra3YDCa58oqDfrXNuWTiFtQmD
6Wpy73xIXHIleF5c+081dU5P0hdYigShtwGWSou6tfgIaxUkugAKVVAyNmSohSCOflidWxd8DCsT
qmGszFi8iut3DuWSNulT4vJrGj92OUQ5ZuMLDItj5l9Tj1J1JChuD5J/kwWQxtv4AaFyGiReJVU7
NY8A4XncFU3u63jBOqIjlntTZO8bpUEg+8FkeIS84KJ2K+kwjaHz64lTlEFg0US8XTi1CSWTDSec
WRePbykwgWsjwFY8CPYcBPx7EoSYjV1tYEddoUhtwgbmOV3E3A9Byr4P646QziHvFfEy7BWHqu0E
4lXasfwDAdx2r117B8cdTtRVpxI/e5OTakY5DomwaXLBudaiyo4bY+st5z+8cWjIGY/IDiJxb3Zc
HWShipNCBsg2baK8mYDMuxiaRShDn7lXxeLicFRmBn+kH3wGMdAAtN9+3LLwoOtQKuMkwXZUfTgB
2KYR9BMVDicAGqEByyzedvSY9YBugELI0Z4yihfVM228PVsTXctJLtv2r5CbbEUt3GnU8st48PHm
3HGJ27LNP1kofJ1+37iqO7aphf2ctlE2TmIqGiSBO+3ZeLBhj5macQr1Yp7KpJ81+sUUgmR2+SgF
joJdBgeqUIPvyz3RgQSmVO13ElrIRMvEX2S/8oa1dPlGBv7Hnt9jynC3BYYFCcOQ4IIdSgdfMUz9
dIsnpyZU0ZTCKRRU/Qom+QAiloqMOw/Abt2bxx3libAX1Yo63D8k42N9zWn0k5fHZ4uE3Q1ueX7f
8ggc8ycYLTnWOwktnYB8Lomto9Ddf9CUv//xG6uh6iy92h1bZfdrPpxpXRjUiblvA+9RIHsOT72Q
nz1ju/K2NpIXHhTQ/u7DWjcni7XXJqw2qdyuBPVgcOURcWqBGLNVWJlq3MRViuWZYrC+TBL+RHG4
OpKxEJ88NIkw3UZBZzuWZYbIjixoYNM1UVjyUB8sCbeiws4V6URbV8HmfBWLlvi253gES92WL2LP
V474UEuymS3dikLm5Z/zeEAr2sZE+Kt6/RCAx+NmMrSA2g1DVTQeR5dJX7z3Rlunxha2C7msBdO5
hYlZtwlW4HF6TT67RzWHk5NtKVoSODOahQ/N7DXFVnIqDtLf83o+OIC7NIWGwKTGHop2ysOnN3YA
c0ZlXcZr7Ae92iKxHFXDEYpZklzH3/UG7RSeThYbnwxapD6ttXcDiHTMgCC1NDBp/FlMkbL3tULg
+jWFm+hpJaiXVovFGAA/+HDsxqDgMeV0tWF6cK+ch6Px7JTx2yH4ovNOH4acOP+3ATwgmloJktCT
cj4VmsuoAU6bzlHKUZQQqUI0xV63vBbhkxuAMhj1GjExCFWiAen6S+hDyYSV/W7e+sas/FayGkWG
ElO59HEq9HvWvFjyT9QvRSfdLpq4o2kJLxtH4AqG8BbolX5hLo5DZ2tculKGerRjbPu110JEbu33
SjK7A7kTgDCchadY225gP2P/BJa8XwS769dlGfadczTGUGTuGahirQ4h73liAHLLOY8kC9+E5yK/
BFOn0uo3jzzm5OE2owxExm7uwFkedgH/zv/+6yQqxbxm9+/YsnyHXwvYCs9OuSLe7T18vhzH+Ywl
tNzmzp0kQm04nDhb0WwOKN3BmjcpuNHgVs1Wf5VoF9iycZE2akGFS5+cjsu7alopdF0CxSbNl9Wl
+LCWCg282PbBBjj3ICkptlx8MIXxOzPleE9iiV8rLfs2prVZX1ZrsevfJd5AJXgeLjCsFWRQNV/d
ixHVG9MN3HNrzOCCGQEBsuJ70xMll+EEqK4nZpy//abBG/ICiG6vRFKgu8lANF2xeaZZT5ItxWAa
TP7XReacCT5qfVjLnXtuEoAh+KjFMGtphoRg5o9uU67yXwwAya4rlnCb28VbQSmseUgTC35DWKdM
Y0VN/GCBjuhjsybB6qp/Vl2zCnGw4+qvPNU7uHuBnKkZWH7KA3QdiFWeMZH639VYn9QLWSNs2u9i
I5kuuWQUnkvMVZ83L5wEDjC2c6fiCvCcxU8YUICrlJrCym0GvGbHlNFkVVBbp5uXpaxPtMQxnn67
N2ZuNUeoA1GZ2YMXYVLw6lH1F4TxswacwyuIgGEtpEzUZG6w3/6r5Q5mMRgQ912DMwAkvPrlVKmL
rW7YHQqpWQL7oBpfwP0+OJx9syoLsygdh9Cb5dAwdQgd7LX/xydH3rE2f44M+LL2gQNdtevy5jxG
5jhtxYb/YR5LLbTrGUUY4uF7UCASGSZcsq/W0FVhLEdR7qlry2BnNWhmxoD/y9QX+IvcCedgSNuE
l3giaqCCs3Ukn2+UpRY+3r0GVpU/PuwusjdoSZl/tJQ+XEs43mqlWC+CDos3uOf3AJ2mWARWUD3r
TxQ2ifdtZatWOzCCPS/PFVl5snVquuXLPla7IwcSS7LWe72wgNbh5z2pkBdMYkFhlmBq4Hy8c0zC
apXzLf4QAn2U1W/kCwiIbYKqJF6pV/axf26s+SfHJVAIGu/q0Al2Iy5SnsmmCJjBHT7/QyZAKNOX
t1JUFYqVUUmcvD8y2PFtAFtNMpNYtza88ZJCO9crjKwGs0pvsnSz5UnmFDDD+aeFntwuDA3JTUjy
1K2f0yRlCpIEGFcKwVyNo3m964xZoh9kR0qfF47zmA9nhvu8i7ERDdbmFL4EHBasvXj1yX9CiOgV
JVfMtAN6FSa5qMuVWLyDJbg0plVUuri5gzl0KxUoGmP6ZYjnxJXFbeNZZGqwjadue8PB61t7mCzM
F4cEQxRkJAZOggYnA5j6kPgGpH4q0sNrTgzUaZ0OdvLL55XkrjCVsqOVHqoVTqdNFjNIMh7EtG3b
XAlOJMIXDuugNarTFvT2XNhbldkCZMAsjvSdPJdw1Dam4NJSVgNmOmq1Jcr3yVI3KJFc0IjCPgen
4G4pi7bKGb1z5iJeVzE1RS3OqXh8cur0mN1dI9pyFTrnGMMKNVsQfaSkfCqEOWBmf0b8k7Ty/NZD
mIvoZek0KHO9QPa7b08Bh/k6EW1N+5nj5jO6q9JterYApB68IUN2aatpHxhLQBPZxa3svxbw/zjT
yo7yTaOD6MWsk77yAUUR4AkxC0ic7J3Ma6NwsAdBNVODbd3EQr0N8j2tQBrOMvOW5n8t1gsqUj7S
H6eFm//Zps7OeJffum15aj+oO1gY6cWXSoq6KTONeRyuCt4ID4slrOIE7Qoi27XwOvbQ/zY8DDLo
ItLerTlEwCvOrUy0W5t52JzT62eRejk1kVdO2zmO/RcCxvp7yvZRRjBdgpezZ9ZXFxf2K4G50Nz/
6u2GKhX2jRceW29igkGuA8iOgPPHws8aPFzd22hHVAV9A/vAX3Jy8uIdTtKpFQKXw6HsFSnKzwLN
ox7Qb/sxda+zXHcvnnhHBgcKbnNguMiDnfbl2Dx9y1x25JNrZ1jSyin7uV+v2pRekkdntLVqYQxU
1keU5Gqw7+b1z16qPLCeVgGFzMPUTdRbCm5wBIPgrI6SmwmWoEulxGnUJJ+JZ+Dad44pBPAwGbTc
bm+sp7RFLLWj7zRhTwrclwiay1d9fr8j+R8svBiF7r6hxVisOPQ3Lu9ZfWc5i4xTxeCecXxCnikM
RKLJH9m8OelObCHAgExBUGFtaf3Lxyj9B7lrmbn/BOUATakZZtWjNcIS5/eEleKaEX8JvbmK+moQ
wko2yRpOuzQuwHedTGvDp10muCq6mr20tfQeSbThq5LkcAQ8YM8i/MbLqzIjlImiSuu7TA2SiCQ4
5dSSNcNeKtFDvG8qrkonBV6V8RM377esOnSno/pB3/Gqr0DEXW5dh26VPTX6JLvxH+2oQL4nLcY5
oT0Sz2HNM4EIfgDKXS08UbFJsLyWzIBGrVPBye/VkfG/dj60jOyiqlZUqnumR+bJa3hjWZ3m62Fo
lwQbur4TE22Vbbal0cQcmmbv2sZmoEBdQyfF0dSYJWQOP+K4kM9el9r7u19HqTPDC9iTQjOSY3C1
x/iIM03n5m9LPmeAF2EHGTt4T8uIkhbKhKTfx+MmZDjFtHi9nfDGBQsapf+yEQVHppxjf4mv/IQA
C5c30Fbb2ImfcFDTHmY4q+IixnrlPy9o1aablwlquGDllFme/JthsWjJa17uSLLz8CufvMRrcVBe
Vh+ve1SLu3P9KV/yCpRZmmJbKgoPPs6uw9XL+Z5vYuU8MZmAdTcsHv46EgS+D72XUAHBwe2brZlr
06ynhoK20qjEwS3N2FVMRpSn42vqMip29NFS/6zoRiY4/QX18c1EFAAcn1MLWckXa1F2W9BRkoxO
l3TKPveyC57nInFiIHqgdR3A+sfG14kfER1W4xhpOL79KF/ArW3D6sfz9OcvMhccbadNhpthZ9Sy
BKeFmQgx6qlWNEYQNuqyUjSR0UdjyGJLEScmOQvYphfVlwxjW6xAG3mNV0vHTr1wkjHBvlpZEJKM
v57+/ypxSbD0npZXnGCRGjVaD1vHKrv4M/h6Yasfgu+sLl3Hwx/EdmU6f858FBnW/m/GXp9lmaBX
Rf/QMvaVguDQait6A/zG23RrdTqJR0voK9SHV5IdUqYGEBFRlbfQ9NgqLI6hPlg8ZeJpW4thOOEY
yK3395OQ+rKbHo0SXuLmyBGF+xEayuvbfrq/OvHXD5nO9RnrgzxB+whhi2DdDuzB+hCoiksJwW73
9c4GH2i4NYINmvIcTL+K0pP1jYgMbcEPxnbArioJf8m49csAaUYuEarLRgRDxmLj977NgNpwd547
j003IyVZfRCCcZA8rRIOP+Tm5j2sgUVmUP22+d3yobQZjFM5XlBx85mIRP5Yitwaszk7Kc46sHkN
MRUdjx5w4/4fnhYlmICmDbbI7Dxw4pr7nYSKKsq1TnBh6bYxlSDBaDcp9yBxfAmi2OdHyS4S/mOX
HYhnbbUxY8EAex1ctrc22sMAOmv3LJA/E09GkqsaMZjWrwGFwxjlXX3hrudfKazOMy59BMGhnhF2
i0tgJpWj8lcZdPix8joAdBiENQzeQgXMJqA6a+on7m5XGOhyMfbMRYE68N4wAmPdDghM/vYSFA4Q
NpE7L6Q+QbsnoK6oUnhr3HZ3Q7S7jVXoWmeJ00lPuA5Ejv/D2+9x08/k+2z1uQWQ5Wq0BSBC1Hyr
xF8FUVQ6wXMbThwolJIgXuYVdsifdFs+ynwgRDOkGmkIZrymk+j+pNHkzUO3u1kCmh2Fkz+5kftq
/sktERVx+HdEnHTDSURkid+XZvmAdpt7DczdG0qRVgfPv7tUV62DvTXp5vBi4YtihHX8or1ywhVd
MekfS+N3VV6bVuolj0yBJjkBQs7w4mI8YnSPWMnR+Jczq+lOCNM7kda48surIWm2NohFFovSwRii
DEDzODhk1+YjFHwWb0sVEyQkAk1EHTUrajeWwDFe033syFY9eNtiuLyHgbmIRvvaV3XGQjjA/iso
lYL6McTGzr6vhXv85yoH9VHiivIDRSgpjITUd/EdHKey74Rz643lVKNVUWt8xYzuYU2G5DXBIYkk
JkQsf6Oze+iMiSS0W+pFVYCxYHdQ2pWxHPrS6Dx93z5+nMNCONDTrDfAoDIDSzhzk4Zw9kFg7kJF
qFUgmG/q1e/GBjqx7EswbuX+kpQrQD6nd9md6Y6TukA3oM4k2xgt/TKZ7tWMUTyDQIf7vWITQD+e
jO/q4MDw92jBPRQ59JdRaYig9zRN/3JpNTuJtvMeg54Jz/81FvjIC+GW8pOUlyWii96/l6vicGkR
g8Q+wC2gyKjAK5I7r07bSayhwI2Kak26llgnff7iQdC05VjvnVDveJmii+pSgpqYhTDsML9j+4bz
lxaaKNm9bCiCQFsZ45/4+fxFp1LweJLPf+8hLPC42T19z9LsnFjvMgnJgWPg3G4KYx9oYGMG9GX2
N2GLfoqczsecwMFQAkEtVHb6kZFCXQXrMBFWf2wqxX/wcGMB44CAz8RVZHiYwuh0o/LSXOz77SPM
I2Ud1sWl/nnNIzIepT5aqmLOoWBmydWFm07RGXBaSHQ8JEOhBUdJL9qNUJVoBvDCa5MgrlE80wLI
bU8DF9Ip04Jfgk4jwf8lQp/xCs3FUCubtrRRsTTfgUfJxPmkvgeoetTrLhUkhV5K/MbbL7k6m6Lb
SY6YN1fImBYQmWzrPETeklVCv0fRhzZDaJJ0U3v7C4hbdJ6puz1nup5PtdtofuMhgemWXaSOIk3J
j7ye3xVp+9dO85S3ios6th+uCLaZ7gGmmj/apPAYpDY9oFXjG4Bpsi3Sq5NE8wGAUx5Lq0mAjybf
oOl5f/DZ7mK+aBZLKxUXsHRd/2zQE36RgPazZw9xTFuOZY9pw6kCUjoTFA3nn2oNXXLiQEdfGRVe
ihXRWARq3KoDJuGgD4gzjpzepzsh+SR8NDBfUccLY425mhJyP0kD6ESfwsmSpGP6EGoA1PuaPB9B
EKWOmOWBSRDnaaNPFU1PiL5tLBFqOIJb/YCvSSsSquiS6EFstbEt1iVMwlvcBDRFlx/jvbg5i7z/
hFJUagVXDrY1Oi1jSyBJdF42b4h97dvMh9XR+pu/HI6p6F99hWxk9RFxoOHpF2DMuHM0ZRkx6S69
I/Nt3pDRkeyRCVYOsrGi+D/Rct+hqYELYozhx/p5L7zMhrrGYVHdGMdHBmba16la43LaRaTAFGrf
cvkby/HZjPQhiOJJ2UMBCJ3nsVbyGKxI75vP2KwRtNUsP75q41tZL0Qi7xOmJvxAPiYSRfAaVfHs
kU8l6kcZBkXzK/NVqxwicGUj9h84bu2YLIBTmyrp9KPlUBv8SFEgnsigK05umFyDk/vuIbx8IUC2
Z2C1qTaciGNqrcXVvYSLbdIcL2KI6/ub6yZQaLWMNlBT6F0SpXTMXAGU1KgcWcqhSPQazVTPp0Oa
ID9M6CbE3TqmETBnu1El6hscybPtYzn8kYy83pTiMZN91aR+mZ5gCXI9RWZs1QEnDrQmZN8qFQkW
nOr/KBHVHxT89lL7jsliwgp/606OryO0nqHTRe8zPxJFYJPTDCz32w9qJ5eFPJJihp14Nsj2qU94
F9woJKrvEMnSmyasIKRdLCegBduoiG2v+ITXRbovjqkSCrVqqgIbKdxTRm/3rF6h25Bp0FJ0ARJ9
XZwhpdUZn9pSa3AuC/y6bNcE2SrostGhWKIcY98vpDtwPjYh2qqXgCG2GWDhOI5Yfs9JYWLrj2A3
Wpe+yDwQGK3LSEe9nQLc8lT9Wv4d2wwFUOIllav2pUvVft+fkhv5fhaEjLIg3xMW8WKXwXBJ/o2F
mQ6ppx+Tykar3qkKmlPixNuXOVtS6k4QgAjlGlnGaDX3dnWsv3a/uKBW0GRhr7Zgpi+xrQxPlKj7
abazdV3Jx85Q6C2zte0De03Xgc/Q5tEeGUgKvbNb1dYehcuKue9uN3DmBYq//ENHjyMluuDoaBHj
3u/L2czfmBLq9hK25iaolHHTGC/hM8y6/RCrwC4Kin70XGiGh5z38tXjzlpwSLNvc/WNPsmASvmE
PQM8b7faUMjs1AstrysEWAANIAFI/D2XAgyVGEyYRATqvhRrFX05b0Abz3w59TdgkgAtMAf11kZS
S9rsez8swandmEl8Gr1lhvXVZPG2n+Upxc82cT/JuiGHLU9MifMu5DSpuuBwMG5PlreW4anfoce8
7iEmR9FuuwYA0qn83aFfL8eFccqwnR8q+XtGNxPCwtYYvDd14TEWKKVYVjOJjBGTDZjSechUL/nU
FaBvh7i8rMPTHBB0Y34H8X/Otv60jDLx6liKg5crgdpUlHS8HDk/KaaYNB1dSoBucaWPb9BULLei
6AA3Di/DNYWUeVGchR4RkNi5Yp+fczDr0L3T+oQDEIPxCXL8/rD1a486EZ4RPActFunPXTdPRk0A
uAZ5uilQGz4S2qGqwKknaq407hMGuI4TxalRAbaiWk0445N7HZGqvVHsO9cMyR2MdMcGaB8w43UC
VuAortGdWhyH1GKHeKl/yyzLEFVVVKNRgsiq9OGvT9TItShxVFzZSTdT6qb+m3DHTCVZatf3bhGi
MMEAOVD7gqr8d0FdhhsXhWmDDMhBl7oUq/pmHPowhWHi7L+WADWKGE18mo2iYJgEuxpobzzkRjb1
+oxKdiZTjN8goknyrUlCR80WYBW1k5h4nodvDsa6VMpb//ZnWzNYm/aAp0+CaKcHfIL2k50UWWOQ
tuKTqmMR2nA0asSf9WF57yCmnRKWW5S4WgQvkg0uShTey3XiQK7CpEJudgaUl3ifzzRTUzgIYxUx
Gd5gCQehMc+o1Ti6SmddqXdysfoXaAye5zYFEkxTMvZDdOyoal96QIB+FD0xmBJyNrAonacalu1f
xuBPl9gnOd8nfARPk1R3UZGK/sI1pFT1GI/xHIBd+suIzAP3Q/1HeQBneUapB/6IRE97XFb1P/U1
yKk9M9NeP69s6Jv82w8cRHRiKxl95lMLE89sCtM5Fcje3hRQ15caXOfHVGG4EHnXyylymzGa839K
sWh6RP9XfROZ1t4QmP0hThy9ZeSZkgWQg7eqRXg3Vhga5+gJTEY54JYCJVCnECRkKHWAAz/NtSnO
v9CH8nVpoq9cdArxTmG+goAiT5fziph8FeFbCjb1PzfTH3RJ/Z+JK4SmcFCL61GB9OwppUuIpcwU
X7GBKxVAH9aNF5vpL1pK12D4+2p0ExdXOj5Kz+Vqp3n1CpbxQRiCNzI13hCg36mz1u7RDffI78lB
637DSubZKQMNwr/QoZzBgZyQ2H7l+zrRdqjmGooLdlQ5M2xz9xBNqR7I4ZeFlG7VzO111ZV9wJlL
d84oYhEkhsNIDUpEDMdx7yOtf5rJnIX9fmSbvoalEFrOxZwYmqLTDFBggeq3XumRNe+XseaElol7
HIqh+bQBNxyKI5GvH0SJufj0lDntrW5RXNiOpyVDmnLbrgTSaqQbya/vD9z7SrPdAld0ezO8Xa0V
8XrjTjiJIspOfqggGa4UwgZa5yAZe7bzwq+oJAeoZyJzQrGwFEluc6rNPYKQce7AqhpZx9KjLUHP
7ebLw+q0WJ7luw74OKdWNdirdzEiqJrBN+xRZw+eYAUyKSMMNAlpAJpANhIVIWSnAeE+8VfUs7v9
yhpq2DuRbTvhgJ/mCybSdlnYIQwD85R7SdMaClbhLwl21WcuUU+bsZaNT6P14dfRSdpvAO3zx6md
QkyqPhqzVh5RWGEvm1+qB/52hN4tywkp/QQvk+HdqdvGE0tHE4LGcHwCetH4uhca4PMenampXOhN
I23j+CeMsVrMdAZ42Hz179Y9UDMbugUWJfoVf1Iu5DUSE/U9xaUBNf24hk7K714j+hIGgeEPyXKO
0nBB+gzR7f21XzSS5tDJSnRW0y2fPb51jD+KNDrJgf4i4z2rwkLjwdkX51myEbRuK15nqOrawW4U
M3RjNbUXL8FqNyT0+iNLyIcrV6n2lrYyeFMwrzFbz4coaVUgC71vjw0RTJ1XC0VWfURW3uC+eHCH
mu7gXAL1AOZGdjbv0ben52KFYeW10b7G0JC42xRbeLvQ3+tl91QmxUtsfeMXcL/MHMf5lBDaET+n
qx6ZOvJAT3J0183n7F/NLxkda3MKO4m7tYW56hnyAAJZ4J6MrHFUWxxX1k7yieezEBXBMhfNDUpJ
AiOI2xNM4H/q/cHXuMZBfg5p6Mffs422Hr4KBSvD+QhoE9i2r8QK14cMh195NH5RU/YtnUmGnJLI
MyCUjLam/StcoXow3UlAmsClG0AGIHwmuR4OEbaQK5DQY6s3hxYMPg0zH9ukgnXuGHN2b7sUFjL/
Cagven6Dbz2fjIQPXr15Jo9RVpxPZVaUV1Q02Y3cmdQpRxvgkD6JyOq09RUA10p+9i1Ti7PmYdsb
TF0xq3OUHZllOaSJUnyg4CACXe8iGlTbnvYiKntoCPYXMKgIDpBHasZ72sTqtYj72QQybJh/h2t0
7HdNv2fDvtYeD13k3kw/bJ2h1WjbUFB8d0HaT+V0bXlDkgrl5QBKwB2H0PwCxn4fSkJgaUZ50rrU
jf+z9Mx7D1jEXKubATlrgCxzvUxTcHv9MnwRnMHUp+EU1zc9zXfa+dhTtzO/DPRI9i1VBPwzP6ZB
3D1h+X8YXyJc9UCnKPuYNbp4MdaYaJhT9JgnXbqfsJwYoR2EAAqtRNtvcVoKojgiSLk1ivDrlvgH
TAv3bttjgQmyg4UjutVCK98d3684AiBHH5T4s4EvBiNIRzkOzPl9b27ONQfkZHPFHSQ5Uza8Fdrr
eVdtaSxu3U4MR2NTlY4K/fbUTfUfm7qGzN2Xy/nlqDm8vYsLN+fzCb7uqfLoblZquHQUfNazcory
yWDF1+WslBrkfNuqA8BeX5EjJRN3vIBMcS1qLbLNUJ2sKtwJJZTFFNIuJC61Uak6JwcTJ0uOckNc
Od6duLweBLlj1vcf7rCATmJU3Z/kvN1lcpJvZmIuTD/AZQgBX1ovH3V8WWrTpyoXAcMQ71KsnTCO
O52+pxHUY/rXck+A1L2fo8VDuB1gSjDATbK8BxeaXB/NfPtxkMvChB2FjHwlxa0sEt6+YT/003yc
Yz+FR9wqR3GPG30ygoLJ/HnqK2q0/DGvI9bWxTg4EedrqomDRcUO3/Om02JDehQV4Fq6X332mXI3
H+ySbexHOFHBJVGc6bfqPM9i9XyzCX21Fb1jiEk5P12XGzkmdR0s4D3BgPKXfdUPpZ4HYQ0eLWuS
ptCcyucsyf9VpGwkd/HrJh33Dwb6LoMQYDhLSSnJY9GY/zXkY4Eq7OuwAZzYNwFYayu+AurlkTEY
R5nfaXgGszCj4nfFzGFce0Z1Z8GIclIQP3vJAqAcJDsy3Otp7xdOzZs205h1q0O3MthGg6+TJ6qB
k+yWbqnRg/LNuPyOa9sSnSkgm9pEyaPHkcCfIe10B8GdAi5cRJByXSdsKnBYLG3pb6OUGkd39mnH
Ezj79xL+W0GTNO6575R2K+Sk+30C4iAOOwfFFThLfxUcMY4SaJQ2uJb3zj7ps6t5neIymFlDbehy
Hw5OhLQb1BMcw7EQFY5cBRqE7uVvTPoP1j2K1OnOVUFp/LigRgZ/gjnuocddchEbt83OJSlqgY9v
lPmTpsjI27sm1XCsaoPUpK91fkgkZE7O/GGlwkoYIx3Nm3is3pRy66imsjOg9EUoc8nFdS5fc58e
Oas9/MpROR2P8NHUNXdnrE6SJSf+Rz2yYvEBv2ZjoLJymkMb7SOmaZh/Er3reBYLKsChIcb7qAfE
mhMJJPswXJFzE7pvqafFJXyZdXVSXI/XNeXrpszd4jDgJYJArrXPvOgkEFmAE23wzfwCZCEN924J
GPx7+7dSTywj8D/0geCMQgwXz3qTW2pyGY7+ieX/E67iZcYn9YL7P9y39fLXRGYWZ86qsXN7JM/4
ws2JHlJq9oAO4F3QtGWlcJ0UV/+/tq7thKsK+tsRIoqWnJv6DJC1eipT8VkVRsIlVmZGVZNaqI+U
gW1kp1eqNKPnjfhuT8JnnV/zwDbST2GDu6hdZyZFeOAG5y5hHeg8GrctuWdL1qEXsAGkw/17ZBWq
3SsA7G8ttPEqqBnRzf3NfeBuEdSOTMg/4tTIy7uywgNSt34NasE0DVtg0UCUz1O8fAqBNU+glMmV
LcOWhZGE+zvFgj76I/7R6snUUpKgk9LCJ7L9XSgQT4ljFD91Nh+BwtWA1x5KDv07AV02imjqeYOI
9QfuLjHXqvFYSJvlx72IzN9pI9+wZ339Js2L/rM0LIyLmM1cXWsbMlEbyHp2fhw0cXRnEDN3kwR1
UqYqLmM6oFCiCLq+BPSq87+4Ny5GxrSbl4WGm4XA/QgNEamAWr9KTYy/6x7Mq5UXyDgWjj5rZmJK
2/yK74DP2RWSGTueEWB52GL/46WrK8plUiEfHvKFYJIRSuudySQljePbqfFeb2rdpK5M4ci/SukS
y9FIAUrgfgpfuxL5v6hDLmZYVp8F8KMXE4Tcw4Xyb5olh4zOu+DRTaSTVRNgc/xKmnY5Md/4fbke
VBPTi3475e29EjfgsHeKr1VXJQFYKM6D3DMMpRZATupyiroenv4PYjrKPZkPH+G3GJMyg9b8Qh29
HYgaQw/eHDYJ8SnHeduzMkf6JXDGPDzoLtAR/jsnn9seLYFe62fvVxJ9O3WMtahAlz6FNpDZSh2T
cSLu5EoPRqdCmngfeaEAfs/neDWnr086/V0lXnNyiz5AsMv87XAtIPxUGo4lN3fVxDbt1MO7GBy+
DGn3dsRQlpUaCZAWX9SXVubpPbd/CAJx9Yjd20EsfsnEucW1o5P0byM2lj3kIYlF1VRlzniIhos0
UX57Zk5EIJZiDtfwjjl41nfDTVdt2FRuhoExOT4y763JH3dIu5A74lAZlL1IAZUukKjnFenitZiQ
/eAa0dPvDgDL/Ed3oyK2MgEh1CULwxeuuEikTE/XwjDUwmn/3gN3oTD2celxadRyiYz5N2tsSoiQ
9Z18Qa/tthU69gRvtJSM3/sVa0JzP2xdg/ZifV0vAAKiXTKnNFPnEYlHv1VyPxdJ6t0z2cfuAABX
pzRistzldX8Rq2yKNLcv5nMfQ+hXzVdGb55P7qbGjI4g6mZBnC9NGBRgI4EqMWKOIrgLQdfZPnW/
gHBnLFJz820YxjouU51Xcb1TMNNoAADq92BlTaEqbRVO7cu+sw2kbdgPv2UFL06j4okCd9yCw7mB
MYV+2qydLT3dsJToL0lZNpp2jQSlGCYN+vGHVsETOoIlo4NPChBW3CrJre5pP/OObZrGj6MRPc1F
Pn6GXZE/on0Q0UvP8jZVXSvQJP7BBmnGRcPgsYQYTZygVtKYD5qGF57zJAjfZD3hfIAzoMZBxEwZ
KcCiUcFgwkLx0Fa3kF3g60M8ZJiK/DAhwfSAe+VPFiHSNocfEcqH+k6uCazJfGV950Ms8UpFX8Fq
NyV6jkcqIAD7tQ+XVYs6uRdGDpuwAt6GTQduIGSlsgAOp72gEpYGPIpVIShYyt2Z4DRNKgr+6DS7
XFdx0SxxI9AoQJMPZQlSpkNB7bBtOsnPwz9G6rbOH27aLAbOuizZllKTxBYFR0yV/66sRBIxvrgj
cxDfKwDiU5Y+yV5q42O1xm3fkUiCbxR5XihPtx/Ijzz5cGAcYTUHFxB4JjQyKBIHrh2uzIj2jbER
79RV2SF+53fkN5k4u/YM3faISCoyY95O4u0H5RbNMW4whZC6u+MRyuYWOU5d8QENnH7oXH8IZzeI
xhfMQnIaefytAc258NdiFPqS2gV9rYx0tVaZi6yHG6fa9vK1oUBQQaOk5loqVBEY1Bo63RrAcLLP
kW8GI26/92Fvbz7VRVP1Tb+LxX0+3hHtmBDEOFrYJwaAx9/YvvHvd2kZQWc1ys66TVGGAmnNh2hR
DW9IBM039lM2pTjVFl6MQDt8nA5DoXdX+Ejn9jHnUbqPPv+P04ApXQX/UqFuXB4gcLdw7Ua2Y2cB
+UMxv9rJZ0ifD2Mb042ybbYEQLnm0i/rxkdLEPueRtmmrwRI5TAUni1efqpO5rGRI/ucioUCcX5Z
qRBjIawDLcUIb30wkcNkchuQ/yeLi8beShlQruohu/LXkAJuuDJjb9iTXmxEbGPlWqQTB7nR1v4k
HZrvot0Tj27yYlDK77WAlGCDyWpQ7Et/yTJEhgi9L0Shw64+L/PICKZP8Eqh07bGxskLAa8O/9jA
agMWJG4Rz65DZFeYqJccykDwHp2Ncm52exWM5ZO5dg3rlZ6nlPykWOBydMMCOdo2vo/3Eoc6CrDg
JXCU0hUtrKi2Pcy2RvB3XnaMlVmWDgly9UDlYLXO83ACXIMz6uxNFCLO3Y+YnR5Yi2FmeM7dq4Hd
erTjz5GCLK/jeBV82ENRDfqPDHH/Tn8oMBC+yFVgqG9iINOwEA4p4ZEZbZTAFl7Uo7a3qpHns+BP
u5AD1XbxhHPoTfXEcB2fVcd6OUMoNacL50ildNvALt9qPJGmeQwkdfQEmuTUZJa5Quws61DymH1l
gz5MdFyeBStY5W8bOlAk+OLnSECVjWN5xLrma8snXXwbj2SBXdpwRmiztYWNz03aX8J9b4Vp1a2h
xoS+qEcSw0aj1YlVXIZk8Yd9XxraAhWSF/vhbjYGBpBVzgAPDVBLKGWaZQCwbDGb1Eb5WKV6QA3F
j1KKykGbNvBMcSClN/Q6pUmVu42vgDD+XcdhrUQNo6XDaw/W2Xf7NJZ0AZvvQdz3PJk7wdrrdJVO
ZIhxBrB8c3ODrC/m3z4+6ZNemv4hUxm8Hd8tcJ43cpqoAx8luzbNvOXMj/VHuwYJpadYo9crQsba
B8wFCtt45qlKGaR7gXVFqMvgOikaeIA+8g3XICZmGo8LFpOzViZRMklMIUZgQ7LL73ul+yikQR2X
cmYzPVBZO11bEncdkJnYJb6m+5NSDFgdTGj9Umy1MCRXzPqSX3NS+0AP5o/fnOn84Sraj0Eqj4Zj
MY8xHLr0djHoiaK0WB57J9UEQFL37o24os1iMOzk4mtGqYxfs5wu1dhUrrJxtTWKtDInQ0sgexhR
7qfP8rKEBBLaOzSlC/KLdwY1ObbQWYRPxf6SOfCYpYKvcaO89evLt5ANhkQEreTAYgg4T0Cx1xjX
Q983A9G6GibsfmRG5tSaM/v1U7G3hj1vrBFPMZCih9zB1iw+ohGG2Jlpg0MDjv+oKB7OnmHpcGGq
L/Mvhv2hSEKNc/UBKGRMq4rX0h1kEYx1+KHd++mT2S/RHVFLMnW4Sc0JRkL9rpMrYzhipIgqv+KC
QCrZkPkhC6tBAF/HsMtHu0NBeATCp1Z5N8XaPmk4VHdVz7/LhJSUftt/KJzYA0aor0I6//Swo+DP
ikncV/OHq0Jo7GQYRwflE13GXDJVfVQtl8wvifGUKlLFSCgILHk5ogq2iUuVdnKN3HoVZfkAYg++
Q83b3ishJ6Qp3tEZI+MSfEIiLlaKSNQQoHq8dIsXWIe4XqI/uPrwgjKLNZDvSGcmF1kpWSU1hFgt
ByEyIVO54+PiNyENnuqYIOJbvr9rPgA4LZCLXCl7SlqxvI7Z5YHUzcQQNUJJeJhSw/8o0hyki/Qu
UO3W2r4GlVnxgYKgYJOQhfwU3EgDyfZkzcAWGRp2f8B3sOEoP1aqYaijW/gJ4+sfDaKfZV9miiGT
fPlxhCbcKP/vL3VH+kCYl2CD5DQAZhW9OxAFQSCrZwprWMp0XK57F8XiTmcwlW7JMMzV9Ki+nDm/
FZPZZurUJgZRNmIkGdVJbzsxik37uPPdKZ6Ps9Q6wnuHCNaPtIZOOp0fxHvdPr6XECZQPLIMyzmm
gGC6i/Fu70X0s4cnE93ZnIZs66zsFGuYOQZPGIA62qDGQcYizKE0DwWTl0aadma1fXrKJnVBUoWY
QCHGmISBzRqvX4zihxIalcV1unUAwkAEckDpQAuTAq2zxp/4UQyD3BZh2mDcP5v4O8qKdEHbEPHn
tz+Y96X6sr1PypV+se74N0NUaEFHMtvx5ico6uT34ggTZSJ2I6TGWYHRtiTUH/9Bjw/U356Bw8Zv
kwrCz72ZPJVHuTlZqC29dLLQea/mvAGdcu32qXfTJ/YlgujCoKmiNARLKNkz4Fkw4fOx7XoDfcFu
uyHKt/HS2EfrVMd0o/SodvphDZyQBeFVtOcx10e2o7bAUeww6hJ8b0A0JSp8A6ofU7FKUPHEgTD+
6ohmXnCZ4Fxd1PkKBFL6vDUpT02GgGqFRo/tFQjwFZTesQsDfac9+3I/GqwNCUXiS8P3cPfBpBUY
ozK7rIq58gCNxwa6jAafUPnsGpD85buLFH8S2QMs0FrOhv9jOKz7cjZkcEoo0Cnw9IHNpSZK8MgT
7hve5o1yK7WcpFHCh2hJOGjiWVLNNXd+pTdj1qJYHyCLt0yicEA9qf275ySojr+DqoyPLq4h1CoE
1hslMPYQx6L/GET7ZXf1rnM4x8QASu0vQAOVLDACEb4j1Yt3JsMIVCacgvRClt9pz3Yt43sP+HD4
347d0iUkbKbGeuHq0ZJ7nTMcPNUHfgtp63Gtj6GlnVAVjM0jA5NgAIxukKBmirytOmOGyBZ1sH4A
TeFG89vSvZgesBKGKokJgpsZr+GJRU4DNXKPHEQzXamU/Hu+V0zCEibkWu7r+n1k3MgE8x1eovD2
Mx1TiT28f50X/qmvMdiNoW+MviWkb/CZV8QN8tqpGGqwDHab9RbVIb82cwx7s38JhLihUp5HXfKT
DRa0kMLBsRklS3oj8t8A7Sk9Z2wke/lFdsp1lfP1KMDduMcezhKlCfjux+OKdkZkpcQQuJPAhz2a
JWB6rMNqEIAcbldXBG4kIh47ACzX4Tr14wiEFPJYRCwEe4KcWMDs2EgGHyFGJ8kWh54iwxaYGcLb
qJ3szS4gwRhJuQMESerYuZyfDIUDRfUr0/0xpTwzqOqHRPq5XdpRVu+n6ph29EyUVtt5U6MDDXVC
8oXOkzzsvLscVt3nwPUp+cCpoS58+huQY4xt51LdfaRUDC2HtlfCvaipsVfMIlow//8N33TVUAjF
4kLDEXT4cV42V57CKsb5i0maHzSDJxwi+cjY4pzRSRnjGzzbvbpYYnX25i9pK0J8/LVDLtIc2Z0t
2FfN6RnEbzJGhwdc+wBgRGC0L7KAccQNu1jDPtAqTTywOg2oqQlZ4L4uTXlyXCOxDeZO7YKxbwAy
cqVijeQ9/dvTDeApKcvp/K1u+R7TfFHluaoOM9PE14cZw9+VTvtDR0hKmdi6j+tBG1Fu8N7Bc+Pa
VaKflqEdoqt/HK+YJ2/EKDsYT0nTfZj93sLsvArCAs95zSyZCSdJUz1IKtNrBLp6U+mFpxWCeQBT
Ghboba3fOxCsn6VNw2Ca8MVgBCJx6WOZteR1+LXSojOtvIw9W5XAtISzmBopDtSiAHqkQxJvWU46
1KQ83y9P2gHAYGPeA5lF8nthZw1IqO9UxlqEJ1/aK3X83FUJEnqkJez1EFdibFETz8j7LXmsgwd5
AhpGxvkxvD/1SgUEJJ9dZu4gwUsRwZseOlXbZRL7PWpz9fNpeqAjv+2Yeljxpk61z14L6k1HO5W1
BSqtRrS4VHoideYK0Q/6duUiqHAkm5JNc8otIsSOw94IqKRtXiCIRKsMSib4uF9ERJZbqtgIGh75
XecVbKNII+KUWkfyQgmtmZc3dpIXUtkwPXUVn/26LZsMYd1V3CZhcH2qn/j7FngvTiyhgyMLWTYB
BZ+0vRPiXbu/eajzf2Ru0BwXVkZnDp7k9Vxg0nFu22fJcbmyhBPLrpoiCC8GgWDyapeE4nwa08iG
UQDoA3oqbd7OZlnDb19RlGr1im8DLEABYqvF8WT73EGxT8Ty9XzoBV3ZsO1pEOz8MH8sFLjaBe/b
ylQo2Jf0G43wJmdvMmNT3g4TiO54SFc92UTHpV6Nb0Mt3Tal3Lyf2gp/lLgvgTaNDIt0idTWDJ16
pSmtbTV7kD/1ZVbNadiYPECNVytsHVKWSk/AgPpwAzmBp1SGvT/ePYwcQ/qesZ9yqs3zPirU7Ryt
QwDq2Mh0qDzrbzD5J/d2zJnimqaR2ST/m739F+REC6OsiYeLdF1erhwbVFBhGqhp/kJSRn0R5bJs
sQQIp56m1MfY0OnRRR4Amtu3hBMaShr1EahIlbfmJkUYN90jSKw/ReaBD7oQQymZekC74Gbh+WJx
l/+YHhQR+JpY2+a4gk+68ZVBmE6tb9RudCayaxIK3mTOyqqHR8aLqqvB1mZY/PU9YPzz++LopYz1
RBldcZXFrjx0cJAKfed74Jmbc/dl08XDZEjFUN6b2BFxVq42rJ9xw9Q+7c6yjCkd7N/wS1hQT/lh
z2pev5LvobSw9jjM36PjU0NtSGMIfE4SDeB/cLcsHkHe+D0GaU2V6NthLz/xJpiL4PkiU7fW09cV
VvLRNq5F4rep2ogL5yvvuMIunDJZyOpGRHUqBbsIVRSB/1aXSbOI1WHJAVi7JQzAXhhIW4Lct2vu
LrzPoH97BdaILFl5FeZ3pyC+KpOY6UqvHFxgz62xf4s9y++uaL0AEzTv4aFKQhPSlTMqUAOv55fd
Ve+x0J503UfzXYw+BaNNbPpfz1fjFegbkaeUSwbydHSUSoOGt4tDGCyJAypnnby4ZV5yGm2po1xC
N1HYtj72+ZhEl/crv9GGKe/15eT6khKmigTQ1o2Fk3vPdpL9H6bhBscWLziOlr0fYVwN3RuXazje
BziND77ZnHhV7Fg/uJxqmgOu/gfQxkflrldoNprd/FWnnAgE7cy+dfmRPgtzS2uNa5vm5F+lrzsN
w+MCq14Lr2JgsOy8090sQ6kk0pXwK9j5Uy9oVcALVSPAZgudIIP2Q0rWD0e+MRJCdYDJwAKQ7HfZ
WOKj2vM7pwupU5gJVXHqk0vTvEvlEKZM1Wg1zKauHp4dFqrh0CodZ3UocMz23Ug56gsE4TQxuiuM
FUeP6Yi2Wp5XxlKGLKpvBxwE++7r+1p3wQXKnPGI3QFhMZXz65bxpXBN65jiXYpJpPUVwzVzVr8Z
0hOljoQpraFwhq61f8sGLFGqzU9a8eeiWEv2taY+IzmY0hvHYOPT7HVTDXidReWRGDSCagncxV0s
JzxsniQTtwZKuJwbksOKSZMCiamqpL4KoAs/F2klszY3SM22iy1xaxeWlgFAkfoiNGN0zRoPJt2M
3J6SgPIJvkZDLYe7uacepGFB4izPWQfy/Mlg+xD7kHyK/ljVwU/3xiEtwVLW2WRIqEXZVAGeiJ6w
Cj30WZDgZFeVSd68rSCuoMkTZgHaC5HeQ9nFXFfNfbv1Q2+tNAtP4KRh3dnTfIjHxwfBEEOKfUs4
dRLfFTNywurzzS0t9n1r/rbHRrszwov0vEv/QCnoOYz7T7AmwCvj/DTRH9ohuN3QM0LbwrHq9HXn
nJ1w1AUc8GjK3jCJEoWcqFXfP7F/JMopTrfBOR+TDwur4lC4ybLWz/j87wEwkX7LqqDJ/twr2aBl
nHd13NhFl6SrtIuCNwZg03tNp9qyy/dvervvPxe1jwXspQeJrgufEQdQIWm/SMqti3nyCi5Qvvlt
YcxPjsqe0UdY9bi0iMbXZ0G7pdfYa46yNSofHLhJggU0ezru45lDfBFDOtQJNd643Cf+BkNmu8RO
IfurIjZHOqp7wnCQtPbpFxA7mXdwSxOVWMKq4RJx80rAQUIezmrdycCRiWY9Izi8cwgxR/eHgZbv
xr71mLR8WVPuWGoEqvLcsqqeWnY9ayhJKlCRa/PeikMdcijQwkH9cJJkF1x3dSlXUBGG9GxdeiAu
AIi3frN4nuIdSKGBJs3Ty+uCQjNQRJ6jKy90Xv8i1VdFQiJgkkfE2YPCB7NYHJvCRZnQ6yAfQf85
bLrCZLvzD1i0h0oL7QBdXlz8OhyMAeISioUh5+xzcH1XWWE3TOhPBVKefJIezmSUdx5PXCQ2q3o1
T6s9sg4pJPeR9hDA6K1JW/dCelXnvKlJOzYj5LuwLyKQSY/4idG5p7le/s9VtsqIVCZQirT/c1Ho
UmF0Ed2DNXgaV7USarvjKgaeVJ6TLk735c5lGsUJKhRFWQ2+IkP2Oci4NPMbx5RZO5cZE71gJQN6
CtcFyqUp8otPDcUp1Kft5X4Cq2dVDeUVA9g718uou3h6ehGRwEdsVnRzzsmDBjHPXeGSrGhLme55
UOPweID2JZwbMk1+dOjpy4gqHjGfBQh/AdTKoCHffqhySqz+vbbZgPA/fEWCslpKT5PzvIR+dKCt
NwOqAEolpZA+DFOCnNqwZ8ikqgi4SMZsE/D+cEutmS4S+0pjNNNN/BBiMAKRd7GafN45OkKEtIiq
Ox5JeY4dfWUlzVuj+HWyJr+sPZxDdObPYZau5txnK4XldGKLVpAuTVoyzsHI3Iqrqoz64Ov6+Ppw
ilZ4ZKcmujXReaf1tUIpeRY3UQTr7wMizeABYyKOeZEAd2J4SyEF2kDcf7v7txlPMlr1TzSSdBkv
OTvt7kp0vW0W+y5hpIBIlqqFQxhbeSKupc0sSNz3a3/HVcK9Ka36uepJy3KrEShPov9kSoPBTyAh
UfcW0iSQ+UbHnb5ULtktoOJdFRo2o2NGYdF7szXLCHZloeBc6Jaz/u08kvxUgfFnCMhurcA/Q7Bi
fWN/BafDF/bGzwFpFwKBsWTy3dgsZYRYrzAAUeznfE8TwHATmHun3GOUwWBvK7yPEpAGs0BL6eRN
YCKGPOPKffYgDJsdlo+8zzU3rju6z3Syp53wiz5+a5D3gcu/2pmVwF3ZlHaXTep2MIBLtklyDYk1
r3SdR1YefVBDjipeFFI7c9e3G/94AH9zcvJVzab7Sr1xSZ2sFmM5O98mtrardb+MK186EeQP75yy
o6Vr9wQAN8jfioCTdFim5f306mivuviJgXW5DjlUiHRUFth2wbJ9NzryuQ+em21F55GTldL5/P1X
qCdTkE2j91+Jcweip6Zt16e6WcZtyOEcC8wSw/C5byer06/I7ynjhwhNz5o+Cr4aLTnCg8U48oDd
e34UzVk9WMv26rmW3OfzwKQ35IInwSvfQbK1oWgUCzaPkZp3EOEomDHVrCOWj7YFRku6SR0cyQPP
laCbBfhhBhRI4uTaQgqb0e3KRWb1C3JJLmaDSXBR/gUE0aaIcnncUohxvu9UCrfdcQ/DgfhmnzAt
1YQhptkdd8ERJ19ogNuzR5KH/+rX9Tr35V1Sc+rZpzjYqgD4o1/ano7dHRZOkBHoylsWjnNUm3ws
C1dC/8W+gyP74ukaE529aIAubJIoHn+8hgCHb7U1jh8jf9iaGcFNjkwINP2lM/6G1kBVMo30Y361
TGqgrZAV4PqqSCsxt0VkP1Npi9la1EajKuFEretcfW+bS/34ZyGliPJXypXhzdEmqJkAjukoz2Nn
1Qm/NWHjVA2Si2eCT1NR/gveh2G4sPTWVR3rU/D/7FIfjRKr/BcKNnX95WJYgqJoruT2SFXQF3Xd
wL58TYZPjbU6jni1PnZDmfE2KiuJg71Fzl4zFoEwzCYv8PS1TXPf7nOibpkHVBfcwV/wpOhtXMBJ
yVD8SPfUgjQVbEVSbcBVeXcw6RAPrqr2je0HMea+/Fl4KQ54KNm8NfKG+UA+F6KtU1SE4qAtZTd0
4e5SnZCcQn4JQOEEEabkCAdtMboOaiOHf+G39cNQ3FzMsmRpqVLr3RCFWcaXQ3htTv9z+b18zH+C
mcLxR9yNrFDOwwJrvk9eYOi7NV98iAJyJzkPrgTkRdFEUTX2K/QlEVN02qJMqZVwWEDrTL7St1Vn
2mFuMweUDvOKMiFklgBdSOmzImOgfeZyVWBuRKrtvdR+l6zirfanG8ycv0z6uBHEo82NC89/C0ZC
y1tIjFvx9eCtjLIY1mKsgNvt/EXuDxscmqUvZWWztyKLQ3tYxf371JEgX/3j1M+sG3Ae1WaqSzWU
/hFCGPrzhEWIznCxXr3fiJ5vp0vC1u1CyZZg+kY5vkqOBVPkkd8bFft8PSP6gHV8Nwfu3/4KtRLP
5oIt4bNhHM3QEnfbJcJjMl+kggaGlsHMjimeWRtBcfypPrbQF4eDMPaDRsPhZYjBTrCNbD/+GhvT
3ZK9GBTBGbiHoWyYZPyq313BhCq+ARHCKrK/aQ1qwVtGWhQJAI1DrkRP0qmdTZH+Gv4hmOjbTGxp
mHLWSQhnE/IQxcNlqTAGqFA84Wd7h4UYaDB02xOeVh5PCdEWvGDcOoJoaLxmzXdizLj/6uhelZEk
ec9o54VBvdkNEjxgPPhl94K4HoaLlMCr9UAgz7f7lLI8+QwZtCqKjBE1Do9bDIGJUYn2MGRzA89H
1waVkz60NdezqMFHu/R3QxpOND56/CPcTzSO/MkRCAr3/ApYVuq6VN+it9n7+5YSsnGDnI96Wf+4
QFjrUZIcLFkdM/16/SMf4SUHulG4serRGn64Wo90LdgYrSGhI4/ZICvyKHsDBpRZ7ilp1EtuuiaI
58tjsTc5/Ifjb6WySuxSLDU9g5AKtbWQdSs+NTlLq6dCfyt1hAPzTfKjB0fyb/LDtvqriptHxLab
IZdtzg6qPDU5MKEHzVLUWOosLspG3Sfpp06wMMGzwyACdDnDy5Ko+fJQl8qHWAkMn9MrKxp+3rhr
3jEisKP/9hWgjX1s/c9jlj/HeyAxovd0zOhEtGJY1pxMFo39jbwkw5CfctDGaQk67Rv8Y1gwxrxh
bZseyXG7+p8eDyiEIVZjm7zhZyTOZVDXIeDSUgnzipfM6HJDr808xQO2ktdZ3Jgvtd0nwt90pwPG
HMRfhI16w3/OiEZu6kSmwsE4Hsw3u8exzUsnEqXkJ4Zp5M6Ji8y/ZFZJOsSsnp9p254A5jaAKwCD
s6KWM2nmgMr5bnXzMpidNtWbs7ASkg8s7fWjMAb6vv0V6EWwOOnc1v8JqOK8k26xzKVVo0nKFlxz
bJWMc7wj/6NiL9+F5nWS8dPCvKSW9gOF/SGsrJ+q1U7sfZCVFAHM4FDTyQtVJIta6tBIKCohReXk
AsBQZjOBl88vSwD13pAHBLRU8AVqLB/6c899YeF+34ZAexJszgKngILGM0eGb40gDnfq0qPDUDQg
nwqWXqN4aRvvK0LaMulPDfys46/Y38Iu/GZMmeMN9XPlmADmkpZDL9EaTa5FHdw+r9T+4y0W3pYO
tIWV1xgKsXrCeCSY30rap1cvXzXH/pgxqmloRQH+iJBf8L5ZNOMUNIeN7c7nezybNCsk3V6NcWq8
+TyULDLGTFiogYoykAPPGN73fG9SsP80J3nb4+qre76ocgmmqkm7lLFALl0qjfj6sRBo+Azyd/ef
oN3R9E9e/HG/bENdkZD2Pj+m3Fo/eO/mImWnuCkLtCCpHPWsocrdsXVdU17x8oFBxlyWERCRcYGO
vc3Lyz/TnB4vjV7GC9V5h8xV4R2vvJ5noa3OSbJnHz0XZJAAyzcpHmiMVzr/SJYGBerVuGgI/zuy
a2Xh9eJyf9KcKnALpXXd2GQ3drFBgGUzS0yK1HLsV9ZGKVvMP4Twi4031bOucfE2lm9+lwVPilst
kpiici54pD6DvlLR5WYAJBuba9i+y2HryOMBO4F+2Z9hdmoDwXA3eZ2v8lxxeBf4QI+WOqpjNwxH
mI1BrSoudrZqm9bizb8EowT9nFW0ckBJ0KZ5EVkbJGluw7UHcF93hr3QIVyPP7eqxEbwrTuWuSks
41umVeYsrioHIjp+u6Kg2iAk3MkiqehpZCc/o6x4ggYuJWXoRI0n9YbEEi6na34K+ZC/bHQ3dyA6
/T75b1CEuN13TMc6Tj73TpOwDZPtsK5NcLXN88ZrrBbwhyqx5Ehvw17WUbzEcZNTbQIrB+uh43Gw
Osot1gv62TUYdB88KSLSZn0q++/l777pZd9nAIi8YQagv9+gKMCM43MDki4xEa81a8XmHhPtX5na
MaDiRr5Vkd4mtUemivaBGpfFybYrYiVlkSUV/YVh2lFrRi/8qIWMrmB2gZkv1OXj/QocnkQjln0b
KNY5L3HCP7JzbkXo0UtHCk9Yr4Jw/OR5tvSmgPXPcMuf1zmbWwCb1bHU1WLIH5yZ329CSE2jGTzU
ki02TMnFv1mEAUi6AFNvTKNZc9YbxKZaFDs5+rb+7ARWvsa5Ib30McYOxQMF7cuKRoNW4KYA1D7p
wxw08ZD+shu5SrszZEK3lsARADPHBGleQWYbtAdYi1kK0nzEd8aI6/mDsj06Lm3u0QziKhD14fFo
GoNlhlKrIZJhdS9FwwPtBnH0ihkhjsynhy8c8DRZbmciHPyRdtMMjIqjEEdgY+JK9G4nE5JlKP60
csrnleL7DNtTaKIneUtENOatZrE6TPJ0H4mQjP2lagh3iIfmSWmIeVuZORukpBQpWm1uWQM0XjIM
L7+B26JULEBOku6ALSNzNylITU8lVQGp6ykei9DueaDXrJI6yFpYJOn5scV47IERvbKKl+jpMAfX
Yvz5ipOJDYXBy4lVZVboGW1eXXOUOTSjY+uo5cTD2OxV3BwErxdsIpHRsezrFiZdHqwxfmkPtSSl
GiACqdm46tt0TRGNcZ+pfBHI4WeyVorz5vi5z/wco01dGT/aE9tX5LiIxnIZghqgZSyn5fCvMyik
qM5O5Fvd1PFt8hC+e0hXWJYn9cOB/S1WH+obc4OjHO/tfIkU97B00n9nBvRMcnvzxut7/g+7umGX
dkRA8foUNWDPwwyL2YTFqIy0RepygmeFti/w++wU4OvnZ3xCC9+LKGEtyQ+n+R7oFIMCmUX8tw3+
dpvEBTt5gv8OQ2elbJ1X5GurUvE/d3HSu3P2JsBE6L1iKwu2EpNRFDho67YQqmijLBP53INnmtM6
zvj73XpCUNdHvbYWa3uQ8IV4r3dsMyLS4KHNF7hCrBhlpd/+KSgyhrhwE4yvC61+bKv8Ib332bmR
3tjs+lG3N5kPQW+qnXy+doDT2jliQvNOZe579YEwaOisNfV7XV8rGwBbaaug2NlNrGjG8yAzox+X
TJemPEqeW2T3Gw4pFsSKtbw9jX1qFNz3BYr6VkZrvjF1nuLRYfjlp61sdk+6rEwxZo3QjWxi3FhS
J2Bht+1Ai8OoA8vTbWn+Z+qDqAbteK56m8SR1azYz+OwBIbeMnJch/gI+u/e09H1H06VZz1a8ytp
cfr6RtgQ8EidOlt5+aVSo2JXYVh21L4CZOxI4Gaae6jOAagxgTL+ZC0fyxLiSLT7HFIDvEp2L2oB
XvX/j76cDIodYhquSM75KuPm5rN5DLfxlZ6MnQqKo9LZwC6LIa7Fy4YzcCaKi08BSYMGtpaJKoeG
yG/l4FrfreWS7VZtF/W2GSVxGOMNHVqj5QUr+MYNRRmgYrG4tEE5g2ZHCPhoTRiC7t4IlZ9X+btr
BJV9x2CrfNY7Z8zYuo2YWULfqEqjD/aae2/4PaW4qNnHAI0xA2NyNqyzNeXk2eBs4XaOcm58Vi9V
+9pFtvd1ZP42BEuBbLaJoozI3JUkAWiR2t9xpFyD+dMltstPXtq6HhEW+I3YLCNcdoavc2GvoUV2
hflahZU9maJ9jtp2DZ1zv0KA+c4/fdpPSpWnYxMmH/SMOlWl9ke/l0uN+EkJ+3KA7yZI4e7ujloG
AEqukck58gHJk+kA01u5T/YcH88NxbmE8y1LFYdyuNdG0eHSj3lIGJZN4ULvJnUB4WLAxyD1D7TQ
r/L9VCgtPpj1kGAaLtY+kbY3tYBlSi81Axmc0cCewwFtp0biBUWqWJ4yIzbug3OEPtaM7l7E2nxs
5thItMZOVNkF+PkKPdKGzGcp6AH40MLdGEVQmWWL3W0O2wK4Dm8AMqYR4Y8AZUyQCpuovHdiANl9
+0yB1R+uHNLhEV36Yeb+HBVY5CYqlyIqLLy36LYCV72DRqJ3MWFo7h8z8L4F+Q00z5qxOO5kevuY
b5QtkaYUwsz7wi9VeMwCf3QtQfDz7cJJq4ic7k/dimNsqAQfwzeStkLpGVfX6O16sJnDkl1gDOyh
yChDqiWWM0ojNKSAP2s2PUJE+gQ/8/KPCcroudxum1k+SQQnWgicaz+LXy7kNyvkPQ/USS/VVclF
duJvb4PA2AwEg8FoQusClSWLTlb87KtQdZvg5NAK0SrrVxBLWekN0d+14A/rXDDwjiZkJfaG7QTk
SrISHp1L+HLfC0teSUzH7S3Nnnkrg/k+DNiP4YSRYJecz9pFmRCJJXHbDuF6AIa/GMgaU7HPFn/B
Bz1QEbeWi5W5E6/rX2+O7p8jO3rDdBkNM4BV8H7PW0LnLokMYAL9xSZhFhGdcZDJFk/6l0wwotOw
I4WF1QOlDYXP1fj8ZZL9EtS/aGGv1ptf0Il1Qi7JKFD7I8xxU7BdbQvPVWVDx+yvp6Saf+/QRDvo
3p1gSPbLHr9dopenmQTK8YTdFwkAW26GaU68DU0a0PWJV1KWCgVaSWBcwVAHBiNfcE/XkeEx/vXy
cHgr03lkNhw7Kvt1Y6jFMSSYfsk3uvJfHpJGuUxKWU7nFjfcNj52qZErRVseJcLarQPdhZp4xsYx
HNd2nzNchdRHl7xxkAb4YOTxwowJn52oSfoj1+H0ypBceKUkima45ae495BOxYdDDRuIvzieC8oU
OmLKMS7tm6jRzrq3hK6SqNH6r/p2Cf7tGU+qubISML7oeCxjGMYenQzZYkFQZKoWhkTmkt+zp0wX
rHrUAmBd7I3bjtFBaNuEZs9dwoX/8XjT1j5IM1DDkkXK0khikhqkywxSKyIfkg8tyvhpDXdvdMhW
v5/NvenP7LlmjH39MIEHO4aXsvbKI9iiohL61FluXqQyJI956jhz5bYtEZG5yYXIyQ7Y+cGtnTYi
Tnx6XO5z1XrGTfJAaScgfJy4IIS3uOZDOJfROl2JZgJcAKIoGldWtAKPGjsvfbwnHU6ZpRS/ENHg
kBnsY8jQYSXhHT14sHyk/nwcavfXOf7QGeKzbOit/3rBgFfZLiUDpSW4Bwr9lCBy7x031MvJdBx6
1oZnlkryjhD19HdnTgZTO+v/NUk2/7QJmpmg75Iu3j9Xw7jpbhYu7YDmVpOXv4ahAZgB1mUZrWWS
1w+BqWAVQokRDtwQMy1iVb5iKS/YAdMAVScRgLxVg3CqA1g9zuO3f2fwCq/NpOjq3I2kATZ9C6G8
WJgFRnrUwoNsd69+phldE676QHERErc5QbLV1ux0kmzkhUF8CmYLqDLo9kiwSdmILKcDQw1qEMla
8r1YztbV5XMS4fYvzo5onILuoRGAMztUEefJAbn1DTBP53AqZD1ZvaIh3XZ8F122wphH9qDTnvBP
EmCyLx3fvCgQap1XKzjk7G387kDqsHdRhGL1j7jGa0LKyFLCeVG+IFW5vB6EtPoU6nTq+oni0gZs
E0DsWaMnnztaT5OSG8H82tHj0OlwFA9YgdamAWxFg3RmlV6HSta0IEJG5Cc5A3Uj7rGwqri7lAAM
qqRk9pQw5rsZFYNXQKV86GPV4zIShtnldr5jRb/YMMpkyQ9YcmGXxPDcQq4F189UuvInhFdyAs/7
4zkOFhXNzdIAsWA/Vx8+95k0TQbEpWTLUuHGUl7LwJ96sKXdPRtmY5M8zahFg5AuTNYeuSwn0wzI
9AE2ycQp6cvXWUtKkJmF65oFhwPPf0w6vgV4NLeoZPOJlrG5u4ErrR1TrMzMkB8rACbP55xW+bt1
1Yho4+fRjlOJWZYCM2/TzXR0eCaHSQBlhOHpx0xjegpC2m14YkgqJFygljAJ+cjn9+5kNMHFJoSn
cdMTL6gF1LvgBmOtcijdnem3riWPLlu4AjnaWJ81VHZREcMaeZ1kzME8i8ed9ocRCDnXt3DreL5R
fIaTVFIerW9s3L+/+1dXmNjwm5Dr1F129UapIWyD2c5g79e6PKYOq6wovFQpjWLD276oNx/oiTrC
JTYjixKO0jOHoHrxfFs1tTOih9xxQwp8eSN6cWGGThtJeiYxp436KB2BAzoIe7JvfXxhh12bEDjX
5C8Occish87RkbBrAkK7RtRAiPM5+oRrW0GUJqsF7GpiLv2BmrzLih5IVp0wUytRGdJLBcKfDv4k
Kn31UCVBACJKC/BANtgxLRcOjYzZUxkrJ3cv0HXP+kE+TrxAYC9UBf06QCKEZsH0cNNySPIc1xQL
noTNt+M2mcvct1aksL/pGrnmyeZ0eGTz2yrOhXXaoq88EpiBK4OTbQ/utgBRQztOF7QaXQGDtWX4
YoBIHnQQwdSIC+vUgWaIiYNKcwpZcF1ngDcl0oeVnoOKkhp5Y/4+ZG3L8OIWHvljNreFDv2y3l9i
+EynBVtSDBBg1RdT7aH/EwRZEKOyFpMtwBwPsnNr+SzmNSIuLrWgkRfKV39/IkCzkYmD9MVoQt58
3LwsXOiUDuxBVPRgg3zIF9H1gnbsViMcLGPZ43M0jP84ivlZi6b0m+DR9IAuMHEGrIm/mkXJg1zQ
Tv9wSUuv+ECAt9GBzyKeKt6Weg2n2Nsc2RUKalVAhH9cZBRcorv7LLmr/A92sJhFWQFpfJnafCZj
4P1juELRZjzSvuuQxnKnI3l0Myar76OaDibCMSysFxq1ZAM0jhQI4ix863cEsJL9Y0Tie6LC6BLj
noJmaXr4s+9LuK8R/s0gBZkJoWcgxrkSsqd5GjNCA5EV1IhbKLEMjaGCNqm33Aqd8AjqFweQQwzJ
s+DNixa8Ak6Wz14zxXb0TF2yzU1I4g38Mang4kafCEX+kNaHi3YKXSlIJH85mfBz/LWjnDVC5lDX
+EhIc8mfqHKTop1OKG1n+PcskRUR09tM6g0QvpCt9S75eVfDUhwW6jKYevAISXoGDaBWfwW65Dn1
5R92nUlP07Rg3I3Q6e2qq2iSF+skmS+OMkdCF0RYje7oeoiEZoH5gtJHrGn3iWEZgcSz3x3uPmeK
UeXNE+hMOkFT6zx9Czf++ZtOLY0WkgviSKEtQrS3yQTY5cDdTsAzr4uIVL6r5oMQMCokJ3XNHUVd
9kWNtbGemtVVRPiuvJPLWy+iks7Meft4O6mM4V9TARqyisuVQ7rCRYtDZs/8jJGtZ+y6v/wf9+RL
yRaKKHpkIxkPFIIGXEisYLbaFfELrrS6q7INRrY0G1H43w2xOZoxbpf5gHBUGyYZAe3PKYbS5cuQ
IE9NFBgzzzwsjMGG8KHcDOF+7Js07rDnX8fFFM2Xo3FL4s3E5B7rCdtRAnh2/dvKnk2vjY4bt61J
EncbUZpFAdfnhw3hd9DAlFcUNF0XfOCmpJgq2eySzBuEK3IVeFmnPqXN2loGW91YCDDgDzRZCavL
ek1i1eTasjCEkO5wN05uzIjknTBP13o8Ui6/WX6z9uYeIslmX9c7PmVA95lqnVYvUlDp7BJt8V6z
haTKQWMLJVnv/SyuZE3oF+9DRBI1sVLMPRwJQlpq0Ke3Tzj5EKkRdGOk9qrlSxV28dqOC3BVFsK6
xnC8g1I1bnFDBHejZbFGMKNTDA5y3QeSXsvEopM41Wo/+mW8TjBYbjp/HtD5bJktr3dnmOYKOnAs
qaFqLlxHLA50/nedKI+6uvifjfzpmwuUIZWRi8FCq0KiWD4mbXlZhHWEX1CJwh6igADwbPbiG9KH
NLYfJCbv/2W5ncHXEfiTEkUtoCaYjRpgbiETTIENBvBYzC7QGXQWE7Tl8m9S5z/IX5q45DvgyS/h
ypj8UnSNCZ5S8LeFWqUWAM7Q1ODBoYyfSX6huqBg9+Au/23pOajxrZDiRd1nRaPTIjla035Lxmug
WZgQ3I4N/WOyTMy2Bw/GfgHdpv5wIz6A2Fa0yd7zy6fgPnsJvut6p51zTS18+Ov+XKuanZ0ELaw7
ycnTimH/qdNv9Z31oB3Lm2uxYGi2d1HFS2Decw3gswIYZFSQ2OVnc6J1DTO0NugtxEtl8jJDC3bg
Wg/mTMITQ8e9V0dDFPwldphvFk2+GLDxKzE/QHQBTsYpu7M1TAb7ZCGtc2oDGFjJjdSNu9o36/Pt
Rey1TtW6e6dMT5qjidzmuUKD4OSOvWiIuXFvPo0T+GDkSJqzCg1OklCIZ+Li/W79KlnlO5H/30XI
7PgU/ja6/348J0dus8jCLIUh2xHgy3vSUtJeRTxeAPDW4XD5icafjtDY7Q/jHv3LsGB5fuceVQzf
aFo0lJQk5MVGNGIQYRVwFy+QmFx2EiJJoneoSuu33Xn7EZnO4zL180o8GlxJUEr3YpGXjpFGSHJX
Gmybs7P8LBw0lK8slK414kcnolLowogW3i6vAABNoVcKBz0IyvapLg1hc3SqKm4AusDKi4820Vnw
3ie4IadFVv6hRg3wIk9eCX1MKJB3l3eGAfn1lEb25xjVE+VwEX8HDigoAZn3YQ8tkn7HDnm45zEl
PqXUPfIFXOOgFj5KyHY8aY/28WUsdN5+sB/2a2UJgKcUXfhTz2rx7W5AiGlTujeZTvHLm9gExKH5
B4YOzv+p0LvhXft873HcdjBckdKfB71IuoM0h0Do2zt/7+GyFygHZbIRo3bjSIBm2gAAuqZot++X
uIUzSBvdb0HIn7VlBWfBgpoLcsn6NLLe5Y6T5sJCvrA/3XPddTJC5HQj807vKleaEQ3601QJrIwN
A3ysEmp88J17HfDQ6G/+eHhi2ib1SlZ93LTc2CUhuNzJn17OpbyHf9+Y+8ZHdakSCUOis6QGYPtU
n02kbpLxkLeMqXCQRuEZoWlBAqKU2sPY23NGk0YUyNQ6AC3BeNPl6SrI86Uv1JPtCUZRbE/wJCyV
7chCnukujdP7M/5AdJS23rzqwHiY5MTPz5zRNRZtPqEcfLOwNzVjbgJ0uuMEt/PDzQiFp/HwqFuW
cRL9YifxZjynbFREzvP5ruz/+VwsPiJdLJzQEbtUcxdzVZktdq26MSEUMoAJmSMEIYuVU5WLJn2t
jWnGxVKykNzPkWKnYyWNW0ryj+BnmXkOQxtCjTJEy2HXSIELJT+i+2zmv+eLYOSBAT3catLhzGAb
PFddK+Af2lGN4b4kgYO23aWrAL/8QNIafGLlUj86Bh+Sko3BTy560q94lFl+r3eX21cEQbIOaJ8x
IjrsYrPO0fnHuhqXJQnTYAoNvbdWzMx6IxflSnpOp80+D32kjpxT9JSe3YaO8wM5t/Wn29gqbaQK
8G3dsIhxlHo4/6q64eM9sDY0HCqSi+Pcs84JAu7BOAZeozndIXpb55Es1rbn4JkNX9rzH8FQFYvM
lbSE4xafOkVktvhczTTiWm8RVawJ262456XXoRcjSe2vWF90U/BM3Z3vh6XZmHzMzbpbthJ0HaIp
ojxVlzf2VVJBarhv6nZQhfshpWpKszxdLjxO9rTrhhokDx1twBUTExzgNk/IrQbzqGZ1bq9jRHVQ
kuyA+5taIrvksLcM8jUpsQCTj9X6WC6lgTJhJ4CnwSdR4KrPDMrb1QtxhPpgaM0hAghtDEVTFQLf
wfbFRHvwbvkBulkMvLSKW7koMEh61BJnd6gVTW7xjYXcqwPtGy4tMsGVLFlzFQsRZW7MQRL0BvNx
+Y9Epn2TsJFfCorJmMzKS3Rol4hr/Mpz/G2RGyHmJOvJ/6TZSk/IYKJpUa3SCVauX7lSZb2yGOyc
GQ/RniWopsmlMf2rqxXfMuFyuAvCOxLcLIJQwvmaIixDDWlNfzFcgWpaKwc19ZYy8z0M8RJHatT/
W/D4UW8IriAjqy3ozTlL6DrBrR3FycQQGk7l3YkQ4fYfhyf6J/EnajWDEzQ0n8Af9hZmVE9qq7ap
G4xNwdCOArlx2ghk7FYMrxeE4uQsYmJWD8CE+x/KdWdB9GNi+GtmXliUZjXKFIiZ4UM/m5iwbkMO
8gVZ2ZjrHTeGe4XyAKdIQeQnSe6IPOHXoj8yhTAPkKLLB/BeOTniElQMt2NqS906FNbNb3nVfi5A
ZiFLqVtUvKQ7ogA6QhAE0vfzbS4e0zsA8rQNZ7nN758+AY318FqXWxf3fSH2ZqugvELLF0GuWPrM
AOkaLx+D+MPGuiJQjautcoCPqHV+VTAvm8v3kKSuGz9FOOAszhT+O0IJSjT8CQDzpXFH6h7NqeGU
oMhcxEMvLczNzVnVtsdaThd0N4P+JTV+XqqT9SZ3DGQRQsmgJYVomYhUgZB+ovozBGFsfzfm+IiB
rAL63ITZ4AIeyCxyO8nEcJ8M2s0UpZlk91VvRXbrkewOoi57qk8sh0d9+5sL85WAR/o4nWMCxq+d
SWq/WGs6cCdpUqnZSGCiLviJhiymHKVHr0uAT64POJXTUrGPlORuC9QSv06q8Fxtz9esou0kJ//N
hrewq1nqV8yvFlGJ67h3yIMWt5mOCaOY9YcsqRBgmo4FlYVKznyw3NlTWfLfALI66pEV304DKP7e
Tu72dafkNKt9lJmyJlKFAVtKnBotGyb2COSP30DMjp3NXBIIeBCbRNHwPs1aKn1/5OdDgbBwtVKW
HxXTJJViXMwEBEbGMzl93owxi4Sn5nU3NYaE12giPpYSDWhC0shEwlhxASxnHj2kN80l4fhaVWPV
2AvE7VJAU7fcdJXs15FzHAyHU7tGPRPB30nq/2Chmo0mXlUdvA/D3imdbIBpbBekmPkF32XQUC+5
+dvSUSSWPp9uof+ZP3KDjc8zlqTz18sK4f4xJBSPFy1epO7QJ1yGorQgq7uEmFlbIF+xX9sc2ipm
jP9sgoPMUaV84X+eaWDIrMZR1fLPjavW8bPMypp0/CV5IEfADVvsX15jyXqSErlM8ju1gbSDINj5
6kCwuzApSpXizLugp3tVQE7HyB0cYvEoW4g0cFBv8Zic49yPVMafrCzNeqiUD5smyiAkZ4DtAQvL
XedLM69BFw0UdpnvNW4DCYuELlNJ7+/23Tz/VMphhTnATnxVSbxWxzV8d5lfePKnxbV+lXggVBsi
JOjOIbA0MOO2egAGBvk+kjqc0nMrfiuZY52+vtST/O2knGXOvMON7bLzf7IyH4Y8tszK23tyE6hW
JK9co1SoCDQ8B4WXUiEiYpz8goWk6eNNjtWPvxMYYQfhtuim4CLnehmw2mLxdam/cPznlp5oPtzj
CDDPpgUBIfAlpwvrCvTR103Lk4GT9T73bDKvWHseWNV0ty78V3yeQUzOWWymDlhxBiOJ3VNN3ib1
amjuGSy5y116tR8aOGZ3XH/3V08rBuEt10whkI2LvK+ii62sj5YYe5bF0ZHZ+YMl2BcMb+SNfkgp
8RO1dWUIYc5lpFLiVuaYDLQa1cqISMkxN0f3SV3XzMDVaRgc6ksPXniGD0H0QLGfMwkugpUuc12F
ILmDN9m1sowE3VUVTTw6puS5+6tm+ZhysyA5YlnhD/B+AcxowvKGHvNzy7v4/BtwDyMD/3iiH/wu
bbcs8VTLLAJ7mDgbrsme5umv8CPZUAEcJSB4jY7QqeF8Xqu6FVLFO0rF3PnlmfF+A/r7twt1WyfO
aQTAnuabL+tBtz81dSAiPzjD61QzsfbcZHY6UW5qXSFpwBSysxkUbGB72SVxXlSIBSJazrJx6C0f
r5IECQoPOfnDJJPYUY7BOendjNgAgcasAEPjc65mvse344WU5oGbaGIle/w/e2pD4tFQMoCCMVKv
3mXtRfRNpbboOV5HgkyfcdQV7I1PN/ys2Ff83zy/xGg7Lwda3a+EH/DQdr1vZ3XEXGeltmRBHFmx
4hA1eZ5ak31O4WF3zDqeEg/sfJMewFC3hV6NT1d3v36/B6PQxaecabmjezNCUBaQUKYPfYkzMHDi
9UrN/sXGqMuxfisWUZsgIPMpLyz/NKOATCNd75m7NNjK13W4rUyIb1OmoRREgt3i22adXGYgfmgn
0KrcS9vhJnDM+oy8jwBP7QPUxiSvJN7q28x89A+oNMYpzZggT1R6uXQQ3s4IK3UXNd57o2QevPvE
LTzA1+G8V7wkH8DgOC8uI573ukqKMChf0h3qftO38M6OU/KtyYM5CdC2A43dAoXjCwBjwxlKcQXF
pgoqvFIqlH2tUtmhFYus7kOkOktwfaHb7DxehNl03UawaWfB0btCejNgl3RA0DQIbmS0Lz1PuPFy
8/QtEy9HN8O1t11oy7Evk+Ht8PJp+c1qXoykX+42Dy/mbfYrmV6qbl17mfTHAGSZ+3lhzIGAtsKK
YcVoucpdjyPD6gRGQi60D37UoHup0sc2DP9YEssBjl4b5zEWjKJr/o4u4i6T/hik27dVE8u1+Jqk
LkXf3zB2donur5a273CbtD3HFO5DWxspNaA3nFHm+GqAqC+JmmDPRZ4ghQw9f3DEA/PxluPpNFlW
gjIWAkYUxctBpUVTudmQkrWuxvzVi/nqLbhGUaAYZntU7SJ8J07dtCzF6rTFYa1wuWdChdic1ohN
B73X41L6kIJEsYLbSKEE8zHZhDm7q0sEzjfEE3caYJ4OMdAq0EBMvUYauTK1AklGbEkQiBc/dcpz
PcYA2wdto3BRpIBoMdwMSZnxfHfof7FeYsRoGdUC/7TNIm61ISQthQYfZNaZvsIc54bj7sw16t1X
g+58VeFCPScUb8yQ195hIgn+oocQv+7SzRvQ8pq99Ujq5gkqgxqsrOiP2XHUScNgRgtl358lxEBs
VjCw9LaJ61/3dRODX9J8/+MlGQw6w9NZqQhOxxJdkZbhd1gGy8T+RYHMQObV3rfq2Ipf4X5Qbalr
bwmEIPmmjVWLPeYEm9Rw8+9OeNZys5DC4F4jJNNHat7yb1gimv7xJcrF78tM/3HqiWB5/p97YgHS
KwzHbcnTAXdIBZWzEPXErpuF7oJFApU2D6N33cuAPEQhS/lsltXPNTZKTkVTpLWHemVYjlpsc/zc
OsP1gCAVQDkfuQ42m4N42M4aIUWDMCZFIDwtDhthDDcciVMcd5LWOJk0hQ2yDiJHqxYTP1eNnaCI
v01gESGFyu5O952l69fVvUh+/E4L+v8dOgXImt908kfOaYvq74+aKufemTGXGy34au0ZIKPEGHTK
7qvYnRpHUaZbEeCRNx1sCjWg2uaxfsdxOjCDXAre+QJdCrNlHt6tMdhj+75cezmJXGNievmKSJtT
3VbebxGFI5kwu/7Ju6AWKu3uXOJffe3QXU5cbd7z1eGbUMGEcnmHdFQg+M4TG5xSQ1db5h1s/EI9
4rtG2j0soJZ0BSZ8/MnijFgE6v4H7dyaqUC6YaEP5+lhf+jA5fnLSy07g+F4F508GJ0V1Fji44Hn
OwqbyI1T3eBgxSGOM30L/HNH110N5rVpPmP2kG9C34pKznqLchnaTRFe65KLpbdxcsSSLd6vvAAj
dJc5rdqWKHLcAw7S/fq2K45TBlnqDD/lenXtVlVPhVDiNY7jB+4nr49Jx4p3wHtf2Co6HJ7vY7Ej
SQGJkkg0cOTvSHGf+wjKQYSVd4TmJEfAPS0pnBNqDEdZGnNX0Y9ZvjMdhijmToKYNGusnyFFOJLp
iJIX6bm5S85JpiUvLX9jHCOEfT5AkeCDcboE3YH8QrBP/JXM9p9g+DflO9jaTXzgs6EQaE7KO1b7
gUVNAYsGwEFhm+jQ90iFihgHaRX9oN7A2ehn4hWL4fR44eWFN+KgUh34b8vSeZ8WUYA4EOhGpw3C
dhKAOFLXMHrkveIHbnp09ZAchlbeEDhoKPXgqEHlJIDZ914KLiWT+V1EJqgdbt7fMX+ClkfI+0fM
rGq0e//hzitVAUOHv4UFp2y7nTm/vmfv91W9VQhJhvrNfZ0b79KaTB8m3F1mbWmpmM3o1V/Jsz3c
/A+y0kc1GJ1yORBJQriDjC2+qFFNELYFr72pbmQDkYZdid+2DLBg9ocz2Zb/rlUrzJ/o9Y9WTLYJ
e9KSBmD7g7eahL2qlddVrWGbdEivNG/j4nm94UxIdryzWkcFeiHZHtU4ldYsYFjb8AHWoQtdvBZJ
IJmWIhbAabIjuZ96VJgtCp9wQZL7dqtLxZaQJWmRTdURciTosMlCfn7d7Qbzuam0n+pAD1qeszqv
dtqHK5swRhH7y+lWZLK5ds2ScEnecZKNolAN1KMKiENVae0t3JzQZ+anJIVmU8nRtLO+0AQgT090
zLWsc8QHL/3jjYVrhxgI7m1ADKQ6QfJB/mVuvGF+3oh660BtIR9fRA3jZ9GISyr3X7P2y5su2Qyg
5rJ+RVMvR64a2VCRHxjAN1bJDMy234x9Al2kixgGQtk/8eNNQdrnt9E2vi08pA0b4NvJzgtfkoty
WYKHHoryqnFwL6dxL1PoXHhhNPtbd7aaJHjKRkceFNFlRXO9hGrlLrWqU/QsaASh5KXWlc8x+fUA
UNEPUXn/ZAFoOR6rUnXVGfY30gfuNIlzWiLNJ85/wfrxaawkobdtREHGOXB7SfDPRwr6w9RoQiks
YuEUEKjHxyulWZbAbuqkIO5ExB6KtKMIMVB7pk/PMGYGjvOAmCZe3ACTu0scruutQxxfYzmBts2r
pAGovDRVv7IPTj3vYrCMLC0I1xZKydU3wGEn2zudq0uSBHMk26bcnVYu9knXMWcWKUPsc8ykBgDd
wS04bJhventNjvLqIh0+QdxiteeuoThokaMT3RhWu4pocxte1yQeddMdEDDlqQw+5Pc82InADlQ9
1wwz6SepuDJMc9IClUQhPWNE7VILSHEcN8yDiUk2ky4Xi8Cy+bf+uAEmmRkHshTIcP51gGrC1atN
J/I4mwYzjCe1IG7D/BJRr053Zkk1VkwJ8hTiSd5g9UDgMZ0FdTOdsl5x1+w3WVaUerOf++AVr5ri
mQZA/NcgskGcd3gHGaYtvpxEMuViO+LCpJbcFUZT2A4iStfDPJoSRi/zxxgza2/hfWSbJlMwDz8k
G31u1CH+RKi7Dh+eF9OHdCDdVnmsdAuQqvZ8ZvhzPh+cYtpfE+rPSDSCdXHvcRGYvl+5Qevw54eg
DwEHhoVyB8f8aW9m2my+sAP/bAv3bPCL1NV8qB1gikdJZyQEbzBN3++nYH16vn8Z+l5+45gmxBCq
/hthf2EC4Pve5E6vIQ2NRV97qg60sLxKlBEBYHwwxUic5Ab/h0QU/ElK9LataJ5HV8Aad/J8gpqf
ckr+qlj8Aaz76U8dEeC/BM+l1/DgMeHyxMGKezm+drL7BEKuEYxsILgSU3vNPVjpAOdgFfG5zqPB
l7/eppySBRHqXpftLGMEKpJ6A2AfsgWYx1nyhstG211ZbiUCUpGULVM2KB54L/IxOQ4VjuBmRZY6
6NLkSXxx1CiDyl84MXX3xCIjxDbI6DnzuTVcMOENxMKdaV6O/ybb2sMcQ4bEfz7aM53PdJL6tr7L
t0twXkidWzMHO2nhW12TZg2dW5b9nGPN+HLDkcLPkfFDUZLppjncww1BhU1652KMVQtKyscM/1fX
+OWJ2+63CwSJZjRYb0j1JEM+SGdesINHwQSkBd5iIIanlqsdmCgeaa7Oks78beDQvI6ygwdgO7Zg
0ZCUH/vtqpUiMzn2sTg7MSANKZSsUZCj/7TXTwXzqPzZ24jhKQ/yau5Bgag9j7MOrwSe7ZcGyzBw
nHCPkeEBLLQz1JR08qc7NKDUKub08JBelTtluvNujBydsV9mjOLEwzgJQWUG77pADmKEkWSKU/iX
EeLRM3AyAvEH4kk+jWv0bD16/XeXZNpZUmkSaNTV6/qQRnCoXA/Qk2RdiwqjZx1vSFTjA7EcXZCn
nv8g2N8T1mSmxTpyKI8HWahXozK1DQ8bDEkKi8UsGGFI1UNO6JOIFIvdSQDicQ6w1zksEtTOLG+8
YFKpnIoL58S43w73Fv1QkqxkkutrTuLibdSPZcmdyeEdz2TkfxM/TNeB/bdpePNrgjezple7Vrf8
bTrRprLbl5xMsCNzE/4ruQ81zZMqAk+bysPJG3IJ4eK1EWoACCWvqe3XZl4cOHsVW0+9CqU/wlE3
rvsHUzRoyx5JJKxnlN5I0nJufpkD3kcv9JtxodEf1OSLg5OMGvWszB2se0wST7s5q3Zshfw0c6fE
Jux10tCRw3es7XGLrEm5k2HpufeghstjA7Ia0YIM5wiqilbLl41kKm/q+GWOuOnhK51km8rFsHmi
jDCFVrGH1hiJVjD3lKcz7N3bhYqbblD1ZbgSnigabHV46ZiBkPGV6G6ncfXnjZmv2EzPvr3I8n7R
L5+JkW2hduOF1URBP480fbXwalaVf4mqGN4snbfRQuN0V7eD6afet9WNVb7ucoEYXxAykSh8aYsT
Ty0WMIBSEBTe0dHiu59O5DiLk0EEV048CGCWQUuTTY5BSz19wzOazJvHxC2iiHOenn6LSC4JU4Bp
6ROZJXDCm+g7XMBdmz1aAVa44mOm0oIPbDe7oQAoDfM2FdGpvnM53T+KLGBreHbUbVmftXsTvEpN
jCyEwllLM4y1ywLjxt1t24srmpLgVxgRfDAo9gEIW8apxSzzymymnmt2zpNj4PmvNUggR+BPxKi3
QHBcQN3XMSvvMBQCf/XORukBVaRNzOn4fJYGKtohVoKS8WkJU7hUr/4TscK/8RBH+B2APtldeLF9
hQdKEXIYbMfzf2v4UqS0SBp74xpX7+MYjbC4iTC8aRnD02tXL3XRkEb/syDdXJ06fiQq3zmGT3e9
xJoCtu0OarYSZT8SUg1inGv7Zv7fV0k5BShL1Ov/wrI50M6PKSIV5F3i9Idxckun2s4m9E2F4xgV
6pYfMHLhEoqS0kh95RvbKi+L+zWI+LjanfiDNKxcJ+yv81UrmUv8g+eOkOrZE7MGK4fiVokSYeAX
eabfSatmlFm7gvAKhfD5obK8ZW7DUD4Y+Orv/p2K4Sl003Z28yS3l3qStya+mQjDsjukoZRUjoA0
laPs9TYEVMYYjmB7NZarc6x1/VnGMXqezDkki6+uZ3HLRuZjHa4LENqBkti2XUjDbO795EF0QMCP
fQwdZabFy3HUoCC2WzLV12eSXKleGPZfMxG9UToZHyiOICL7VLi+G5voMykk4W5dKw9c2s8rdGCt
mHgFMOFhMbmQiIT0UJIHBFUKWgv+xgoHdz2QZhoGWqmyZc+U2JBCF/vJD+MqIJDhWqzdENXcUZvp
1OnpyS53lIK2X/5chuznBClj4tMuASF67Wnz4Xf6gRyNqF4ozt/o5I9jVL8/OdCPkBM2m1wIqjYF
PpT4e3SCkzECUA30VFqELgtKz7iSwKcb+VQ11Ea+phjz2nHHfr5DffJyZ1o3vz81+43vQkvHIQKM
NT41+ek0yYXi8phoiV4IHC0zPKVJD0TSZ40CpjErubpAGInBRdIkSxmvFxwH/OffDISEu9pYhZtK
inbwaKbv85Ds0F2Ik0G3GZ/czUMLI8U0z5IQUWojcGkuJ/92V0szedkTQNgiknxlzK4beyarpr6Z
T+ULdLIFDyLX8ufzHYxEhAJ/t0CJ+xbuhmFDw0lgV0Jpt5+yhFt5O6d5jav2EOXfbWcUcH27r7uz
tya9tnhn6sdaMZNv+8hzkseoaRJ+fKwsPdSi4xuFf8JttnMAgyWzWyRE5Ua55wqCEQFiTEL3Vogn
kFzU08diUkQApj8MAeLbbYUyY3PtuASadoujVsrLKcvWuaI6o28rZCATI3UpCdFVpT8qb0bA5TFe
MYAK+4/TnzBjTjDY38C+rf4VsGh8pOR25V/Au/iOoT+yJlEKsksVQZWUvcgGYLidnVbgDfaZmMPj
KKiB498QTAcAUeh6AaModtLkUQzKIqPHd0g0jcmNd22RBBYnkDuOdKMgyp+AI1nLiaZaZhAbz7qH
WGV9ts+8/XQjj9wj0V3n/e4lwjlHOlfkg0QsSKujpVx7Vf7HCiXPHlYf+az8ZOrmbKDYybhO/BWJ
8Lu9hqeBzrC52q1a/UJH/OIUSKidjoVHPJZUqh/ReQBm1uLriKR9nnX5gqy8EI/Y2MkG2ItbdGqm
q3olS+ghgfQ03yCVgqY/1GuC1elst3hQDMlVDP3F7axH2FAWfeTn9PJURKWAhEp55TKmed31QZvW
kB74jMk8AVhMShR1arvK7zVcJtQtLJd/2qO9DIDkvGSVZtqal7Sa8xtSVKsBT4dFkWN1BwOGMRu5
G3LRbEzgBv5RJobEH4lCBaD6fsDSz1AuNhv5RwLmD+zEJjLILq7vOli96jFPX7qf3eypQIjzlict
1M6Tmrtext+EZinPvs1cgj10PFC/sU2GCexuw/LyFWHTesbVhS0TTeaMcST5aU9LW3GS+9smCm9o
xIveNhoF+2AYIrVvWbnnWbw5YJJUwd0WFNPaZBVSgmFNnPErABoXHQpjxvkKWoH+wOPRrOd6tv8J
Ob8u26p7c2/BivoPMhPSDJANHlNKqxTjTrZuFIOOCcjnCf5piTokswaDx3zvLET0/5WxFH+bIz3M
Ug33u6ZD3nxASfJUHlhkNIXUXv/M5oIV3s20NYhmtVed0Q1yzdZaRi9zF73FUyt6GlZleNrNpQ+V
jc32qFUqZsWyG9pOAP3gHO2vEDilAsEMrZ+yZBpgo9iX3EPAWEQJc80w5iy8WZs9vrfrFpYU2BBB
tNLkgaFvKeSVVhUhlTWKu7nS0ybO561oR8bGbWJ/c8v1ywpwPZheKLQLCwk0A6TzkM5Alnk1W/M1
bOx6T+2/wyCO7yS2rBpS6pWm7UucFtyZZVc3nFQsiA4Ldkfcr/HKBTbN3sSdSotpsMa/l46OS3nT
jT1Wu/WGk9/IkNFV3FU5PpjGPz2pjxc7f2chOnKHJTqOW/xX9UQ616cCc1ElhBEsVCAeWJIYdpu8
SFrr0+tjOxX51xx7kq56OjIX3YjXGHrOToZLwsc+cfjqT7e+99WxdG5GeHOS0nc8Dt0bbpTra8Oh
qFvDc5Gx1BBiQ1b7msYys4Pe4FHSMyy3hQtT6XK3VDmGyGGDD5yUZwmB1hA/zKyJMhfNb6//NCU9
KuN1VFOtH1rZRKVxLIshmfR8lCIQPW1Xkl903bCzQkq2MrEKnYaIsFKBL+2TrT5bAWpQAQEjsWVr
adSggsFeUZawCHWGPmT4uxbFt/qUUF8dg1h/+ebJor/jO2FFJm/qgjzRtLkO+cskBn8da+pToZVH
ziU2BfKJNsBCko6TpK2OurR/yRcS5eAuWxjWwvfgD+FD9nYToWEKzzPz1yWkiJRuahQgP/v17RYt
3xLsOfAzjvkJPL9KT3OKnjzLsGHFF0y3fHD+pMLEHqZ7Jfw4CzsjM44M2Y5dNAHxn7+VnmMJ3POd
bcuAdMK/jUZtENWVxDfuxdYVWyCyaX5sNgDsJy/1VIl52KIuI6b3uuB0hB0MBAJbj+iZLE8hzKVI
nrWDTgtdj/OdbZbmH/cpbEOwsrf4JCgINcZG1nC0wTKA3gxNh/mAfr/H2x+EfB6r/mY9UeneIZ3q
c2n0Wpb9nvjtezeT8Vp2/pBUJWtRPBt5/xYCwJJ532BO4G2f/2RZ0iZnLAbrwVXxy1AI+Nxnfvlh
zasyQ80w5P97WptYrwphMYmqhjxuJUkoivQi+tuNB5Vab8rhDPsPaHNfl6bKontXD5OgjwFvIObZ
fX80F37yBDENX2oh5Kby7C22j+MTC1A5m3Twz1ot9kIgigSQG23cvAUZApvuhcoviygHz+0klmZX
JgroYwkdXJFPZK2bIjPvzmi7pu9RnJRlXBau5wYAETlfQswLRLUdYhtpwz8/0+v3Lf/U9LI3xGyl
j3YNfcq5MiBsROwvSzy8P2wQQMxZkIRBligs6z0IGzSk3UaF0Nt9L8uBjfTqk7TaLDg7Cg0c1e9d
bYR3bNcpB6kq/hXPehjIKZrbDsjw47S7rFtLABEecIuctklQdpxdGVX3o02hA0cehzWh51sdbowD
s/7P9/u5OPSRGXU5Hu6oJBkxMVzE6P+ojOTej+LfJlJHTw9KRzzYaQgDIA8TsNBd9gpPEdRJ0XPX
XLQyMtwzZVzNLPh+MaH6rHpAG8Ik/3cCEa1Pyx4GKReNu3x+vR0h9fKPSiiHPYVmpOEGiDoEzUWK
IMkB5xC7rvg8XeAsIl8cF0Is/IqAGIA/SLSpnqsNWJDr3w49iTA3WdAsHNAKQoCjWnjANcgpzaI0
CtdODgm98HvhiUUWktS3jQ4y7ntdbXq+WBP2vcVVbK4jSQjK6u48nQPNd1xPb5AIM+580swUCSrv
HE9mYNPPePo/4nxI0wATJH9yVW5jsnkXkaOQ1bY2Xw1DdEtOsjtROQnLVpIjBe1JQ/KU9shIVv6j
Jv/ac+66gbYUksd/LHMNnkpPEhAMTQsZEd5JMgIm6wUgUuen/fcN0EgeeadsNjcq8CXWOZwtVOMM
3HpbjK8L9Vrio0kM+0eu8LYEpvTun3wYqXyxhBg5s9HVnubVKD9bkGkX3zrlURigt/haWBJoeGDs
+s19L+AT9MA1Au3AN4AwBLE+AsV7E7WxW0i7w9nsZR9s34BJZsX6OtrIlu5+GlaIxF4SZWx5y47o
RtLfAVelw0igv/cMduVunbQm7e9s0fL6NsV3dV5d381fwqthO073ZL/hhBCTtYcQRr7EWCkTHcNE
O9yPmliURT8ZthT4M24bQuXq4hqEBz3KBAUX1qDC03LROXKgaPxE/L8B76Rj+4Yj6QnW1bQ+3gN0
Hx8zoNjj4XGe11jA+zZrl9yfDEAbeXpishPMic4Lr1yjds84H602Ra/2i8jX1IwZEa8PpgE9wA7Y
O7SfEnyFkbEsFoQ5MLtW1FmjqMKAntqAsIXdKaXGA1lSI01AHcunEMMiWfIB2Rfl11qwAk7yphMS
RjbYq0A5PJiPJHa94tJ/fvcensxV9wIrv9vU35dWKsmUXnLeKzrdTz8MJYY8ngRL8IAl/MNJ3FEm
o8jZFuxwJmuTnaOg3t7XMxeASoJvGSwDn2cG3hn2QwNWGt77mzCJ/htBtxruISerhY231gGeBv9/
YCaD/TSIoAzmF2ckOgJWexB2fe0qHpdNwQ1ZB/a0UcDoYixQ9tCggIFiEoRs37wRoERPN7bOo23c
fxWkoT9mBraPTxj/x9QM4qAHltykRZ8qDurm9h8owAhk1cKOThZCyoSj84MSRDxzILZLjNlXf/NE
CXIfg61pBnuHQeyaqHhd9xXS3kDjFRY9etV6Uy7oj0gziWkgKpX7im3sujrL+Ec+ZQk8NmPX9u/Z
tDTEwIdWUScI6IBfT+kPgfNG67v4xb5PJgGmsYRoeFquJbNpcv22pmRPhKZ1hxJtu9PlfjrBa/jF
0fM626YkrS7DslxN4vXOHcV+iHHuoc0gTNpPx3K74wLyseCUdYcwbS/Nu6ksegNQgEOntDqG0fpX
ITvZB+5uVlYGKTI9pUrrKs+cnsYN7jicsz9sgAhajQqAW4Pa8sqRIMsSPxs9fQBCteU/ZL6sr2ki
cdAQAoHuF8TKH39zZXHSXFBn6FZcjzYWJPVstmljM7gzDjOhNFWAAe9U+dFZio4vlcWarA65/42n
fdGENDwMR8zudwQEXOvLEV7Gt7T+RXOlQrezfvZXJMYA0BmLZkq2QiB3llvP1zhvfTYEkJ17//5y
7w+P1YAMtf7auQXUD83LHWS08QQaenmKWpyrKmCdvmA+8viqidAvhSfEVfj1kEI/U7s7KfZ60uzR
U3DtkjD0hHkRINoWC1JcxeYck1fwEG2zC41px3Dl+mgon53XwuUQoZGTXUrP4RACCf7k4m5DmXhD
HNzq3TzZ2rFfGenzfOMy6iixvkG3rQLq40lKCXWiLWzhDBhL3vG5X8Kd5RMMA0uCKosGHLNAZSuP
j/Gg6qHptKZy/Db1UTI4CYWxGb+OUDjaPQyaqjADuyze23fk6QEvScRsT5jJTNixYxOYepBSG5gy
QETWrGg8EzGYeM91tteb9+NSgdTQX2ZmPPfB94uMp6j3ml07fGQ+j2S3eTwV+Umq8pD4nKkmOXGi
hORikWc6RokwYVeSqbPXj9QnJ83JNryTcJCspV5+E2YVX8+el2JuJ1SY/oXzTU3ZEgOZsVj4ykKh
80ToK2CLum8dkvSnnBwsHTNpLOTG5tDA9wnIV8AdtHuUP1IfBpPMgtdZgfIQxtG7OIOsTIMfsPmy
uiv1IoicneqFoi6wG0WeIXhtAXo3IV/mham3zTNnMkhpzEaDrUfQMTjcVVrsshsMXxQXEpXPfZu6
l+XcGsn7iTCa3xWBSej6rG+WtU0SooGY3/SQS/fsCUNqVjuZqVfQYHS+GuEf91dUYY+5752bX4Uu
afjgkpZlYlbQkNzi7GCmEQtI4E2Gp7HxD3nIHurcnjNF420tJuqxZPfbjXBbDRaf+UI8cgkrMfMh
2m3suzQX2kk8Yxf4Bx7ZQRkQV5o5hC1ctgcHt+mfr/f4jEhzLjbOZPFHKmWXG4a2xg7e/NdaM4zr
zloeAf+wI8R6zGPKVuuai7L7DGmI2Whd6WGF72X4iA0TDGXR3RtDiOotZTVY0rzIYUTe++Y97n0T
VYnjY+r+njt6KbR+C3ql3AuEyKahBF81aMfyhnLGcBlheQ1XwNiPbOh4Mp4WLUPGMhB5l3F1yrt8
w9wd/QbJ3+8qT3rYpAg3HXU9ahE85wIKwoL3jvUXSoNeXZhEBw0vpbX/QSwLWiDsnl2sh3Ngl7AY
jseWmEjBWWd5xdTKTy/1ZLnkyv4Z44Zj93tCYdxSVDDNhPMxlpvD9SmINCdcTYci5jj9FAdBQCoe
aPcjeqlVskvz8nTlA0KjPYZgkkeYAC/wg9GUzczOjJI0ql8gTSNW8VQrOXPaEKs3tiQQBeV0wQDb
X2P48swhxdMTc0bJ9iioUr7D8XxdMY52OTgO2UOFe5ohlKLWbZgI8vcItmlN2L7wJKENG8HHwfCk
TGfHgVFHe3f1Nn3C2ihKH09jtAqLaZ4TE7SCNo7it+0Mdq7tteswm4yk0RDIAaOGDn+J28xWRq1S
RlYZwv288kW7saz8lMgkDvdKjqzFuav1eiu9uH9QziVnSSu5V0r6yL5OgO3G+Hqh4GuU7ku6gG9w
E2Ta8H3AGDSqJ9R6Jky35rgO+UbEt7l7mKf6BHvYU6A1bLsqbocNtGFNxHTv1/5sAm3+grEPCVUb
KFCl9uI7fcGu4Yup5VJidDTE8O2HOTQNzadsuNUEKmH2HXRiw/7BTjC6S0G/oL8V13vSh31NM1Bk
p8bbFiiBxwmwHdA9VJ9R3CUG3NubpZZcxrqkfJFC9Q1JMSShLqImfiq7t8Ha8xNwT8nrURPUL9CG
nHqzQTOxAtAqXGwoG6+dXlKF27Xeu9a7A3nEbiE7URFk2F3F9aXcqPK0PTHNBWElQdGRQdhvp+/0
0sTbA+012yh+0yf6Gs5/rl8rgxiefjZNz913Gh0i1fCQWHZUJngI3eNByh9534sfb2zvJOQ63Vxe
Jpp/Uh7W7OWMpfGx6jI1pAoK9QeCWbW8FnkLnGb1KT+4oo1olYcdbKEJkyUQmhD06EBhEMgjj3X5
PmBHqdjjIKZ6vIM1MidNGCEeIyGIc72eohuxGZn4ch2dyDaz1qT8iar6QUzI3Ed+DjabXJG4fWoR
Wfh8Z6qpih/vazgSwl5j3zE4Gjd+JHSblIB2hQEVN0tC8fkuFn7ElKRIcfroTeeQNuOiwtuwBn/M
Cbud9wJ1E3+QSjrSsAoIUi6kgIVZgHvIWUNKF+ehmEj6OuF3vj7KHXitEqYZds4fqxEai3W6Kx9P
ylgfUPouMr6wbDdALuDhb5xm7iqcfYuDFgQ4xI2JuYcwlN4d+HfGoyzwYEGrsUF5GaGuDQwlbwM4
k2v6QM/K+z1TfDdvnAU1zXCxWoLCEs1t7DtIrnKon2B2PEbNaRi0NZWOV57Jv3ztfnUHcg+YJZ3Q
sjt/YUvCe1D/Vk7nkmAJEh5vTsiX56WFQRwrNWdRcJ4AA19Fv/pw/9wBq77ft0gIP8HmCscmmBA9
PHOB0gJ0j94bTt28t2KBRWH4vl9vBhFLh4+wugvkow9JP50+Ags0x9YbrbHvvghQcgWfqoN1zGPr
Z5Dtk0fPsZEyG4lDashMKukwtjXwQwdLZ1JLTSU1TEJh9b9/2rpEU5lwoIgv9mbdrMdOwkYDAYaD
/3o9lX/bF0ceufD4czWOtPC8dKT1XBy3CjL3aVqgokXE2OgQ4XAa4yeTN+l3zYGpsK6UAfTutgrP
b1Ug0St2L+/9FqqlJUxdbDPEht/YPG9OaTsuUf9GsU1Km4MXyYch7oEqDR7AFUnKFh2wrlcpwNxr
X3IbFde343Xs+1AE1gXSnvO0pWhTrduazaR7tB/FQQA0KoC5WkZbIPGJDyB9HZv43kMbByAjvOj0
IwaCYWBN5+G3N2TzyPIwYkJy8zqcxVqRpTZyu6CrXdOD8d393LLwSoMtGv0ZTk5es4/aG6poTPOY
4enGL+V866xoePLq2nvBQ86eESiy7Y4t0frmMu642Yv0bCvd8XgTYSw73nOsvwdGbflzh0xLy74/
d3A2P7d7udZarF19l66F5zjHOKhKrZD1Qg8vFuGUMLB0bIiE6txSY4v7iZGKN2upgVS31KPqYEj3
wSoQ6jHRuUrXzOykyhJQL1wNIojTgijcQ6aHE+DkaZwGJnrE477pqkmTGc4vvkO6dVTm+uConTa2
XQqKuZQmrS701NF0oXIWT2bnu4ElXVNXtXVLOm9t8rRheLamCRR94Wi9fyNsTKOUjzzYB0E0KBAE
cRrlzoseCf3QdoivSOzJMXraKqKkNmRAh/udXn3mmf7ssd5P8lydsYw+qotgd/+1YC6i6+nIJrHz
zae+Xa1+GY+RcvJG5j+/97rhitahmuG7VeKU+k6nnLb6jDTqX4EB1brLAEhtnGxOSdjBNMNdWZdS
pGPovK+ICRtYYkNoNXNHsbVXn1SRSVOArTxGejDAB7DBcxJs2pGMcVqW1sV7jD7byPF4YW23Sdal
eghlPz1LVyuctSfmn9VbMe9f4FzpACRj71aWlECHicp/bRlUMp1YVg/2+l06dEixD+hfdacM2yqj
todf9KrF7j6nVeNgUUQdUY0r2rT8z9+RGWojfpSFYcLafq39Mujw4kim5ERI2XweK5loK576X7DM
hTAK1WNqCT1xNkBv7J+5OuLqQnlMzYAey0Q3Oe0eMjImHElKtgpP45awMEDpLqbhiVM1UXbf/KKM
l1HFaPzawOWSCUCMavLUyWX7PTzyJXWV9PLkeoVEFKNK9mRCl05AqR21OWfHzVotSGPfM2VhBxZZ
LJBI29aHYNCzoVeeFEsQGt0KrDxozoRh2cqVIiwFYPYcaW36FVB9psvOkBq8qIf1tCO0AbHKqOzA
hOI4oJ4F0kXMCvqw/vix6bHa1CdjlRlv4FC5Ru/tVnW3zmuig+fHx4f+rgP8SxW8e1m6FA/eWY2S
v6Fu8LESnVYrqRoPau3JsDek2Drr4WZwSHLlpUzWjz4q3y/JrM3am0cA7zCMBjJPKl1+U2MnrK9R
c8Nm6+SDBQugO+vTFDLPpjbVJJBkkC08Ma5IVGhHKwt4AH9glZOqT3U9VivVOpQddHrLHLCJGtut
dwngtYVytICP2lKzZmiiQhn0u2PvgcICxmY5d6Wf1p39fdxK19nTxVGLVPym9+IDIcNtu3dBtmfW
FwP6XOFiVNOZQYrO0KfnELdqZhdV16IJsDHzlItYFl/eCzCnjXIRHAEUDZ23FzIo5nQosVAZUcA+
gzfvViJpDE3WI7T+5oRyxbmPyPA07GSr6Dme/Gq/0xM71tXQDAijmWvDnPwxCMqoo8RvnhuAX1+R
zfSK7wWT3QDt5yMKYqtoa5GA3ux+P8f1N3yiI7dcxlGcEaG6QMUfBWA2BrYJefIlzzFA84X3p/iY
BKzFuon+rhn5OxL8lxFuge00o2iB0b5MET84Snac/mCsNrffGVhaO/uMH7ytuYd+r/WZmfqOzzFA
vc0HMJsHLwMG6K0R9js6hV90l+K/O9j18YAE9VrEVa3zz0OtZpENo1gmHYDc5IgKHE1CDGD8OAhl
McUDAULcnecRESzE5LK1MD+GL0tgH8AMStOzVzKg2iPOmy/GZBdMC5L4igKW6wvUnwjC1ip9sv7G
p0URe7TZLoZUfQLUCeELnWZy6FyeXlax7VfZFH61NYotUGIivEW273QlsE/P4AAx1A4amrUlfHOa
GjqQkVmB00pii6U3wDWrpHttp9/IqJzxd9r5II1ECvS4fL/rji9Co86cruQjedktLHo+NSnilWOO
RNWe17oowW2U9A5W/K8VpvPN5LLwS8kBo2ggZbqDJaXLv74On6V0ucFYJmBAjI3Gi//+aYg/97uL
EfQ8CEAe/9RYcv7uZwtpfRUSX7Q8W4VRZ/eUOM1DMuqyV7if4PcK8cAbcf3Wg6Zg1uuBxdRJzW+U
fbS3u/KTkYFxRdInNJCZ/Fbo2578/T2OYz7Rd2HhxdR4QSDBtl7FAYg7HSNMT5vCivpsdVlBFDYC
68Bh7iL4VoBauiWa61Jnd5//Hz8gALIrbqql/wMdRviM+J5q2d6Pcvoj31ONSEFUwGr8Ze1tfKP4
VDrDo4+d4d2UL7FzNwG3N0GvqjgKKf2TJCDEWAPpfPiRTb/RHSPzerAuwdH79Eh1F8oWqyxYm6Zl
hpbeoN8W6RrX0AR8bf7xqqrqK1jBjHuWDVLoJV1wKRcHCRHYJeFxxgIQTVJ99NSya7DBH4artRtM
0CJaJQaYOB6CTAFd1aMe3yRnFX3JTa7ZwcgP+gUWAQJSUA1ziVjLiQ/RYPuGebBMd9Nx+RqNpsH1
QXn4Ii8QDVb/6xCuNBvghvQ19Fe5l284LZQaZajuwbGlsNK43+5yMsCvIcXzb7Aa3+0EkoY7hHII
MqFNeyvcvvL+tDAM4pAUdsYUzbSOumIn5rbV6CdLU2MjHvJjJzRvcJO2n3ruRIsHODN1ptlEDTgq
4eexeeIUdfXeh4dAMJnHf66FEd0ZjT8cHGx727vTk1RApV38l/bN+6L6uHMm6EAsjADz+oO0XcZM
AsE7AR0cBjdTNdt+kiE+iofwL1S8MoE95ebQ1/9u+ZlXNRElV3pLznLBmxXJz2SZlShpztfJzrgD
0QPihmjIxkNbTWq7JuoZ0HITmK+cxHkVBVrik/NmtI2zUNoKvVdb0pNaLklK9qbgZI+P/FQcXQzi
s4oWMIScScDsoQgSRCG9y7BCl6emyJhZb6MBrww6aoAIhXFwqZ1/X16bjCMWJ1P3+KVQ2ywTr9gU
Rj9AL0+1hUetpTfdPBqmtJ0510TzsrVWi2gWHL0+JjYlv1e1G+APaLOlh9GtMqLYSaNw8y+YRbF2
xLqGTPa8JCxzaEJ5oOeiEfqC3b3J0g7yI42HvlaX/C3RiJ0U+zUxAk8FWF1wEr6JQP0AguvgCasL
l/o0UMKnw5/wzDGFKAtzQAKMohAo6K2ER+U9xTD1g9dzn2FwKNpuyDZFt7X5t2zgqMdFPJIGA1AQ
ZCZLpb+hU6wRMNaSUPPPKVk9OwJIPAL/Wu7tcCOZxn+YVd8yADVhLvNj5G4BgcUob4ZFxeThkB/f
B3+aV0Y1zmbuRIdBCeuzm6Vs+1A8FZk0xg56ar1qb2vdSKIkTFnXQzD+c5Vy7fnJKTcwPm3YkvD+
nnNbRMwefp5mtIJHdFCT0ID2dF5YD9rcaFbfF2FbI5PhOEU56g97TfMHIMSnicBL7WPgSZUtGfn6
kReKucDbJ3xWKag3XjHx4XhUozc4B93gL3LsRxbN0cIEE0vG7P+h1V9MUex1iIGuwwrxos76yEwh
KpMvPaSxsiICJ8/Hsib4uW3s70r/qrpt6Rp+abVVOnc/UmAYX9pwA58MFNOwdLTCJAH2VsM+IGO+
aeMawlKGjroe2mGHTT8Nni/C6EKGQeLlWX2MSiLEXREQoE3ykhwjtIWKTFHubzb5QkgyzlkNn0M1
Y7d49dLl2ci8kzO0/c6BQtkauxL3oqUEfMeJTBX1JTboLt/YnevW9J08Zgsp2IMvp/Y0/X256ghc
yPzpGwfqGPeE68B/FQa7hKOONnu4CjPWqZNeSA3hBenD3khwLeVQe9A4oND49dDCSvBWoT+OU0Cf
pGTFmevXWp2lYB+MrTLM2Qc+4iJE+XTatC/DeKNSFPa+goppSbDKkepweMQSk0+csXDZkExx5y03
A1yY/zdpapB4Cbtam/2Dt/efwSP083BiYCJrS4Bjq6P1PYDmUEiRYoFvWysGaDecVZDR+LJ7iE/1
7/LcAMIIkEvebfE7qUNxr0oRPLyFFVuxT+bNDpMqby8h1NFXbd/zsyIlfDZCIaXhvnaXbfGRIV5E
RgGWOBnZjwRc+IsGTafAasHng8gOcs1XYmHM6qKW4z9ESR3byIaouDFL/eMKXzci4k3XkffBrwQ2
E3v+2qBPsc0oknX/4+KBKbq0pSH0J6gwnBSIN4FZYLMWvDtiXMYZvCsPuZ1Le7PSobZwgKqCKaH6
hrnXCgJpPVB63T2jBW2sOzeJnSbdMrG+fFp4+NpgVJVnwJOns5JZYXbtzCTh8rfuEhMeku4piG96
FNdwou72bc13Qp0l2b2mvPxehrKrgwdyzMK540LVydjCh0cJSXce520PResysnmDji2VdIglFd8m
73+h+6Iy1SXqiXmuO8vQ2EdJ/w8hthEAD0zzhByPcEdd81rOt3Lnf/qtEHf3/q7C2cbaWTOZewDb
IXE+ilqc9bezBp2GoTGpMWdlluxJJqnLnSlC54Jmg6oBh+flu4WJIq6CppYVabOgQKe2G6I/EN7r
F62Q3XoBqwPd+XBk8X/sIdIAwkfatVCFnuAMqltacXm02q5pTChli+byh16RWdZD/XY+ZKMomMK0
qq5de2iGGjthtWlZbw70rYsadbVKv4ipDa+sS61WX+RWiZbx9ICgD7k4wfFy5anynPmoQ0VkRI7b
p/VT33FYLUz2HeWTkMOy9/fnZufIUVweRb/h0bNIQUjmRlyYi2bnBfm8tuJ/VidGcZEwNE/KGqOG
0alUK591P+Lq6Z6zgvcwiL5XszRVrQg3VepGnUjMuegGOgRFBvbBcgonNnClFrY/AkD6YHKfbixA
sLmSVGAoEIn3+P19n7yeoOn9fx+q5Nn7Pwoa7ir9TcvXZmYf3F0a11plZLGP/1vHgu5CJRJwNzFn
aq5TTtkYn1ou3Deppm8c9InG7q7y8iS2Sf2+8GZuetbGklayrtn3+3ipP2vulYK9EuZy1dXd13DC
2F3X+lvfwFi7suRdNjZFBH0YExyDt2f8UNFiXxofjWxDCzrFJd05sknyshwmT2zLsB8aMZkJXIO6
8cOCBgwJBZAB/KLv74x9PZb0klfJ0pFAJGGasK8gTVwcHSpd4QR07nfyJsFvaJ0LD8M057ijR1VN
HxaGZjygHzdcY9To6eTDJLxBR37+UIQHSk7VGeTuYJCt2btr+45gD236VyTwC6hgUvsLFGARD/uc
aNK9RgVXbZIupOt3DP3kTXUwEoguMMiqQ1NPNtQAbefOc7y2XYb57nW7bkOda8MxDORXFwQ9/EMx
Mg1IWcQzx0SKCuGOqS4kjPGM76+N2FWQAOtfFGbvciRYkhDb2CQHWNc6NGUJlLg9FbEEMTyOI6Vr
VFaCKGJ97W3zdVbpQuUARqiPvEEUvmdqRCprPOChOibBQvcFQeq3RPR58xnOcCoTemWQzHdBn/pB
5UQ704oG69umjShWAhSg+Ui0M/lj7HNPx7pCepdjlYxjJln0iThGU1TS83LC+QQqGhVJkM0ScDGV
k/02vKk9DR467xuLwfdGtz9g4dSRg411p25v78FG8GcF8EvnFZ0fi4bhWyF/DW8AJEijqiZzjOga
dYWilqaGEvPteVZyJ+As16ePaaLNZPuagdjHWRJNGgWopGci7lyFlEpNFw4hh8oC4hZ3U/Jop+m2
6K2e7AHvcKvfwSg97KuPyg8BKG9yG/2pIngTPpdTw+qsojZZQt3v3zqM0LcGBkuVZKXm1jLC1qhG
QT+oDCo255rAkOrHHjpOIFDBd3eRhWrEWNtZAq5vyPgB+T8WaOPqAq30zw/eR3FtpBm4zWRStdBV
I5wgj95bX82LWz5EqFhlFcp2/3V+8hEKPX39Z5RvHIg5JLRZ3V4D04OaPHUNCfVE7CTIchSXG573
+gNO0RWiuDH27P9KT/Gi/wMDv5E9FKdtdcnwolBSH+G+lIFjpL4aYbshTzgsZxJEnlgr5aXe4WTQ
u2sRCxp4eu8h0DyJQ5ix6QcxQ58qbx4ptUz8C6qVbqSb3MkxklxZtj57JreU1WKNGHRWHpgZIPXO
0nUJ5VOILKksqMKcJGZlA2GSsEupQZiUy6ZwCg9RSpl5EN271OJO9rDfSfWV0OhZzcBU4tSKTd7Y
ZFognHYXGPCsP8eqjo5iDAvWS02hBdKfPdL0lk8GpXG8kZwPW09NcpIFzL3ZvXa4GBs0ejAq1c+2
BG8cM1fCoAd28jT97Fyn9Styr47Qaaz5/eA910IQx4pKvbXK5N89Nry0Qp+eoxaw09z3ZEOug82D
QFXsQo8xqkwGPz9ioBIPI/RxOori8T5p2NvQADYPGfp9yTEG6kS8pLstdMMjbPRyF4yE0Gl1KRPF
ZTDCpxewz987PtaTt9orfZV/YkXoqQin9g3DJHrLK6Va+HYgqDg5nO12vSrk63S5SVRZmZXU6WYZ
kQHDfJjuGIlYm/ka4jBXWYJDRxEi34wMAY+nGhLZGQ9UjE56CghqNJiAlAv8o4IvvbLyqn8/D1WI
QsFSkDIAhKFHifYu1PfgXhsLPhHonS3cdVSlE6yJq/lTfdGYzgI58xrr1xxb/jwXqCayibndvDXP
H3cjUVb/qGY/6sqOcJ96eV5s5o9S8GbKVUCNKZSkEl10DSIYskH5Np0NwvVE2wxMufh1BtY+ARD+
yK6aUPAu2X46LfqFcOJ3B1gvv/UPtyENMEkZS8lOY5Xbg1dGpRw8160VjMrpwhWVwIVHI//l+pVH
Dl6fPZSDrrEo3ZDBYzi8MfN1ray/TohVBEJyMwUrjf+KVD/9rHNblFuO+GF3EOHP/8NlTFnacfnH
1hBcF+bGliA5wL89Ocsi7OKCL3Z44/IwrXqvV4Gj/CYNbguWVmZv8+Zq2w/dlHF2MYOaORn4Eojg
D7A/PinDQq3Ge0WocfkZtMRhYzf0AMIL6k6Czfs4t8OqFK4yw2BYwCdpo8q7tUW9kB9T+Lfy5jpq
sMNJ08gjNuiVcf/W71nzGdkndaQrufUivdTCbSqv0AWsyZNIQRGTOWHO7gl+x5Z6xbUYW4EPnThQ
kXR/8o06uSOxS9coVlQxaEBqyoXwY0/Q7yyt1Nl9+iYVOhmIcUgsgRUAtCuWTQ64UaoRcj/ZSWkg
Z6R+V2brKIzxJfO2lD7m23gWIR5xbHfyLmE4FGOzyZSFjFPxYgjPfGeY8CJmYyGQzI59n1bvdxvv
ssh6IlnmkEFqLzY5bx8X28iF2PbXQVVWfnvZS6l4HsRjx4tibLoodpcqXY0BIH/7y43+ZOsVbIVq
lnonKCDN7PFGXcdzxVpkjmI/sYSYyjBhOKdWBgMPTBkFGaFa5gjXkw4N4iT1VekyoxMtX1tL1Nv8
YStvLmieauqZ19ZF8yZZqteBBidAW6q8IsPUv2vx1XTkuw0bo6a1gVQrzwFbfyWN/lljUCxEwNnC
nONqoA/zk2n0iyJT2WvZY4Jlc2YU4Cce02YJrHWFIZ6MCIgA7xCIJ506MZ/7XCjBAE6yTziapzwa
Vh1ynU7SDs7d6lWWRNaKYfiSzSfvFMxJlx66zGWqqai9dY8B7ykG/wPPMHkNMG5sEB0CLZYf1+0Z
PnCQg3XNN8J5Dmqo7gDR7WVYfkExZgvSrD02s6xQH4k2iqYch+QM11b42boaHyNc/HfFA+2U13nR
2yaK7AeznDQVmXHidJct+8tMSU9D6R/uAkoX2AxuMwNQMHLUXRmfpnQyeHNjboi4P9nDjFI70ju4
rPvCPQRxMVNI2fNQYabROhnW5oGIkqYjtl4D/sFQNf3JeZ3wjzmGNIgzCUqFgw4CEX1cu6J7jVGc
xGD9VFZw5RrWhWxhVDX0GT8OAhzUJPobrHSicWuLqyVrnovZoe68tCtw3zDmVESjrbB8n1dUYzq/
vps16qem0ux57HKYSkB6JPk2H1a7oQ/ZUI3royvfUieW6/46aYIzDXxaC+OuHKQ+MM3NqbL4NbPe
hB5pf3WfTMwE52aqe2Nk5Lu/YXpWxITLucDcQ4yueqZ/ASLbkkqOZt6YQb81V4wF9K+HooxRVvb8
hQ962TJv3mEIb1tPVvHkyfaWFgzbEgb1j+wI0/6CcG5JB1YMbSZv2EvMJKVNrdTQxxhKgFkACLE8
9+zZZiM4f6LH7hKaYw9+RSxmoXQL0XlBuiLJMZtLsnXuYvRoV+HpXuZW3SryPn1JJxsS57r7jxYt
2oyKw1jTTOSmf6pf5Sh3daCXIX4L345tbmBmvsz2l6Q1GBmSbA059PmVIMrhtXsjzGgY/H4HUeGN
chC6GY/aG24F6dF79rLZNbVT5iRoTASpbfWg6Iti9zAgyzMBbV3CDX2NTKfd0MyDdh5PPCcpBm3a
KKg8Wq6DT00dQjSLObhZaofhlSUCyquU/rOKGD0GIFm9xP5MNiV699o5ORctsqAmP3Kwoc3SgU95
2lE5u2rYHQ7pdYuPS4NEhQQ/moBkI20lgWIITtvrCznzjQkz6qpRUJHPru02157ygSMcCxm+l8v9
rt6X9c4yJ9+lG8fmk5iQ40K9SkyGlexq3xR3bLeCRM6GJg0Ae+dqKktf+4wsJxPXYYczv7smmE5M
5T0tJtWHDtDF53R7M64PcI4zmgqXSVZO7yLzok0BlpQ/9mUvHAYSLJUR0VhJtqsbuYz8AAhAxUuP
nVusutT3di8qksxLCdM6qkXZ0+4aTjfZBLQajSuq77gq1MZzZ5TPszscgeisY2CuPnxjPlQrHrHx
xLBn1RUYfT5p3mGxqNPtQLQxRxWn89XPXrcTle3i4qcb81lrEkNEA9iuJR1bvv1CxOkoLxKW3/3x
UNxxSKEf+wU8P+wRyCoVi52/1gO1ZXXAWFhZa3ibUWBROcmBRJVqSKRibt+2fQp24BgxjKLDpewc
aN6fH1yxga20S8dJjuZGGWatvIhoVRLZgT0rc2H/4nsbSu3hZc6f+8S8ABis8yFAYTvpMMJnBYEO
U0RB1N/xkxV2ARoUHuAee6kvAv30KIZ26mrgftJh6M/op4ZbHX4YUO60oX8FT32TYM7+Vs3803qE
l+pCNgakLIL+++sOJ315bfOAtKUOSHom6U4iQ3jnFbbnF/motc4Sr6TOk0Uo/UBbgS4chTkgb2cK
kRB7AGQ4PmOQWBWlDkElWNi8wK0FFiaxmaoJq5hEyK+zdg59fb8VGr8R6oO9hotTHBEAUHlYpHM8
xepetlmKSnW0afcHCY+TVKzPFU/dvCeuk4oqJdPfbEPN+jKIilcpFh2GZGS+ob5+fC0mnhIKa0KB
qwvvNDTNbqX7Kfhes2grwb7BmWYbkglQlj++MAnYwTYl0GjlF+YV2fDiPWa9yb5uQd+594Uubo8e
Ov4OaKGXcNllqq5iaElAgZJLODL+KoJpINQM4Qph+ZnqChVj/Rnn3ro8aB7TFbPV/IHg7uNZsncl
iOpb/chxba6j2LvuL+PD0xK1p9KX7OwKgxAtXjfJT18QFj0E8KIGoQMpdtrOGnKJD2OxlI6N1+Db
45x7NrjaPL6WmwPbLEQRCZKcmg2C6xQBfiNL8p3W/jYm52PLsTN3l91aoFSSM61Pg7RxX3GqN94F
evIe8+GgNewhWHk+dKJoBG17CrzKfq+1qfeulKrQ8Pl4d5Bl8lwX7ShP9ywxV6Zp5rdInHuY18hd
ctllQa9g/Vzh8ICPu46fHFGf+9PbFp6/gJE23JF9OktePOK447kljQsGuNqxEdh99HuCNiv4FmmK
uKzBQN9wtJ06zkEnk4JXSckILUgc52B60nqKcivxHd6i0gnpoKiM7B9wxJJtuKUxyMQco4d7jxTg
p2JVFAkIUJsz8j3HPRTnbsFElpbXfVn2fVMa7O8ntrgTzkeV2PI4wp5tH+Ab7I8Xz8Ohmini/Qg/
bvo45M1EjYDskliHedUokShyPauuQzeJLnHksMiOEDtuGoCYURaJWxK877i8vO04G/rNUThSB8cq
Gmc0Vwo6Fa7mHzkyCXkvV8tJtHW3RdpuAo3iPWRZEgxlDihUtPoZ4TH2a79PuEXmgs4KjftwLsS1
CT8XTEkz6TAvw6hjbPYI3FYBLe+uYKXDz/ado2Q8pT6lYjZaA/Kw2kqPq7IzebPrXcNJvIVMNFAd
GwsRBcRhixiX5UyLIyzRahiR5lmfZTJIn9k3iL31d0QmrbNfLd/IL7p5L7p0kKrXPDIbZvWAGTOW
UhZzyGdHvPfswKnR5aQdVGf1QAK75lWxeF4Ds/FgZk4e4cDGXsBtd7XGyJzUB1W+VxnrjHZDGpTp
cDAeVlyvroVoZdez5w7qYdATY9ZCGrqCDg1LwSIUGoGwpE2vG98WNOi9tq7PVztuO0/rCQ4T59iX
rfVOEhcCy/dPBq8dB7syhiXWevGbjylNUix3n1/0p8GZ+DVDh+LcaPgbrNB7mdOYVTevJ65OzUC0
mQtlPNXclcR7s5mdwJF90asJNFNGJ/Lrb3yO7A2K7NxjnIpsO1zkpUhgHKDaxHTNBrAIf8qNpcWm
uHMT/YQ1D7HxcKNZ3F2ZhFp3UJkM/iXsAWeX1wDng2Vov+AmZhQaT4SPOI5JkOg/IXJ/xj+zoK2F
3ozcNhveJh3zlelye0HegiBIdEx6Sr7wr86wOLZ3JfRD+4Wy3F7mEr0HcA1f2T4zxQV35lWvWSXx
V3mUiXKuIb+DXdqlwEB5pT6uxl5qIkGC01qwzRFh7hWhv4o5eF9zt/AyGUyFJPpYUb+9o8wurW5A
3cErjUuSg/td6qSYL0jcYDDCCK3l/qAf/HjNdFH8vz3N+gtKoDDfpiEu4a7eRTZgQLosjP0JFDSe
ZMICBnUNaxGW2Kd0fmzUVNeGQ7ZBB9NMI33vHPnvMTp70yNm32mkC0LUmVDap1ROurlDs3gr5GxG
2L/VpE834M6Vwe2ikEsKBhixm8ASVOJICppG0XQBr9lOhvjGc3ObmyCMu9n75g3YRKGDmC3J5MHe
ScF5XDvPuH3j7gCk6V7IdI5i3iIRT0S8Vrp/c5SqL1td+CccOI+KMTwwhrZhS+8XqdO9KS9ts51T
G6oMg3FEePOZdd6Nqpz3qgIkzZKvsATRStgYSCfZeIIvMw4buj1XwOVTBMVPKwgdOIQ1HEJ26ErM
t8pYLSKnzW0Hvc8OF/q/DkxNtFv1jdNPEx/tPTrdxga3kZ6hOtksAJBb5uARRN/+vNWwq75wrHKV
63HPSzwTimURzaOdgAFcJPsG/OVeUWoa0ve2K4pkNTo6gDO9tkSv1IsDpFcFWepMJoaM3wFN6Ois
IRtvdYftlMaKJHen+pil8STmGj2s0Z5SRSlNpWjFQJP1FBBIQpN9ZNGi3E+iLSH+8KSTcV6mlAnr
k0mWkXO/3dhX011mR0rmOKW0MGcEHg4nit9PwaYQ9lsCNdZXOyn16BManBBTFLd8DwcilmD+hEc4
/VwWJOVw1SBkekJdTxSQRLWoi/2fGnzPgnq6XcxSwcoVTr4p058r1vQpvxJQ5tgfIXIZXiU46TtZ
hwaILpMxEMu4Kcu3kLLD7RUiYFLDmrwrlIkZmoJY2tfEsk5Idkn1ckYBSLjZHVPzG/31OIYlwfkQ
ZzB0zQvP3Z/IZ+LkkOgkJhUoBJs9+2u3C9nhHvi3O3BJC7V6Jd+zSMGLb1r9nj/8bEYL53AFLGKp
y/u6Zyf5SQ4zyD2d7s/J0Vp2156SpNnfQlk4/vCrYXzI52SyyyxQGNHgYAhD2fzKOHL0Rt9x1S+X
3FxnIldFdcPF0Y9auSJU6Wy97j/dJyCuIQ9V9PC3507BuXPY67+jghIk9m5fhYZKA5ovRCRJf1cO
CcZ58TOBDFbOOu3yjjYKdswKzpXFbGMBBU71U19q0InKkNwQ0IDYLPIUnyZCjrv4MdwerVW6/33M
loLRhqAp9v5PuXE9G9N1Tj75R6qkxe9ih033T4N3cevDJiWLW+eMLubavCUOZ6kdTvAcj2hsK5GY
tOpZSiz2tQeOqL+8l73iWpOJfW9ku3oLVOQ4YQSsBRzjRc17mO82+nBSKH/b3QWP0iFqengdu5yC
m4n0bQ6k3tE10WaUAL+M6/pmkoRr7VN6bsEm1B45u5/ZVQlmRsJ4ee1G6fALyXlssxhsd70hiNa6
hFC++9FiGR2aFyiV9QE8M+YG1ugXJCvk8Mnd/cBPrI2b+uySbV8tDduakuGacAhTvfOpNhapPDEq
Av1sVez4Z5dWjm/sD+uK96RvkxvOG/ii0eXppOpBClUS2aU5BTU3bljAGxaYkkw1SL7D0urSxqd1
LtfAHAnTOx3tHAjaLfjJ8GqhKBfPbuHPbmFQChVMx24G6THD1ul+oeh8RLa+7UezT8hr3SUM3dwD
0y7gU80nalXojed9GLMAAqC13dSf2a4gbwOFwmN8Mp0OiDDnCnzx424/b0QLeZ9/amwTg0Wnh2ep
458dfwXaYxUK8qIUwvCKkR2/OY/e+euz909rbLqHk9YoeK2gnYtbxrQ3UwAkn3M7uFaY/K6ICOnl
zi9dSlgg5x4Hvk5ShC5QjkOHwxvkYsV3yfmUk+6Yv4PlRXw6NEYsZFRN3BgjyQhLf5rfXfHd0I+6
sfBmvNJDnUmxUcIHl7VJOaupuu4Bc/5HxS4TmsouuYv3Qqgj13WAPZTH8I/kmbjrcBsmTrWE2UI3
vOdgbnlQeITGGRzlszlm71xrqwSy4zO+CQVQhuwuS2SwF9RC9X3NWatbW99lyQrv3UHxAQl+wWqP
UyPvNaEOtif4HHSAo8mKrL/FmaiPZKBNEdGWCkMQ9PXiI6hLnWjbiruaWtMlrgsjS611G61yCTpf
6Swlhe8fDpYjAXYF4RKWGfOJ47eEy1DJGYBuL0VEpbUCHYZ4oPLCaeDt+SV4LoGVUO2ueKTWzPMN
igULgYXSQQHlNtDOYrWQ/WZA/O2Qx6wXPPz4WqGX8t2AGqGHdwFxBdPd1rLZV/jiVn0RqQf3J3vi
FOB8DBc+1yiKXiqUlrnUyy6+G98krrOY9TCYiedKiqCIduFQM9Ow3Rz0vi400ltUPQdqYRrye8/g
HHT59AVNiczE3tINmNHQN8LWogw2LdsrAU52IbmbHSYhaJYMg8WjyCx3We6MC6qF3Lz+pu031KX5
CtcTzYMy00hLzOHossOUVgfWvKiXRtQDXW4b97LUI8tTXl5JfixmQ52BVUrmlx/40cwPfovo3hnm
EPBUXbs2uGb4+QsyKoj9zP7vkpuzasT9l3qfGl5VzFfSerYOT/0Ka71GrAROvdIcGK+ekNFjXM/f
GhhFLGW6dO+EE+hXBa35X4P1j5tkiCLIC/JrDzablUjoxyv3W1r0PSsbxlj6BIx/Bsi+QSwsuMY4
qHwhW5tG2bGOdu6yJb5bcM7wZPPqR5iJNcuRT58Z3aD1uZAjf+8XIEE2uIGAhAcDsyfcIFVXK8Aj
YG1qONqpuB+EIwZBdTsARFlWLKwgoeNiuBonnbBtZC+IYJ/Kem9uNvmImnDDroIjj9r8dVPwMzzw
wNBOtAe1waz+k4C21V36y35TUxVkQRVPTMEz/hEg7t91SM5N5Am0h5rgV8M9TWCZceD9p4Y4Rak9
3OYk42YhmSP52YfS9lW2FTvjFEgOpnS0I5mBp7AIZAU3x7Ft7lE2OnMkkm7Y3w9moiGGEeMsMYKL
TichTZcWH4BmFg2udxQINSWxKSrgVmZ8uQrmAmHv/R2ABym2oxd6DMmL3RB4UPld9TAg+9gtmR0T
AtMl8nY5PsWqglLOTrr9Gbr+xvPM2lQmhnraDb6Ju9k8DzJMmvX7STQV1yH3Dy2AyrXqkvGscR+I
JRruRc3umEbJFMYuXJNGNYy8n2HWAckpWtxceDQNYCnjMZJ8h6eV5voUyqJnoJlPSK6ou5RXNiJH
AuG648npHjGAohpJ7d6mG8oqSHY8t4sR/m98sb+d0aLAb9oaBuVHhOEasGGpsTqaNfPkKGtn+mEJ
/aU/MZ5FcmKv2NP6CuY8uqWPZof1HS478bXU0l8zLlf0QQuU37bLnldQtjeh868cTBdfex5e3hks
yfNmE0HSUuQmPagOKGTEOIwGojJwu10jJCarWdyyDhbZMoSsrO0JcXSrMGZdZ6kbSbXY3Jzl0vNP
ooWTHD5ick41YV5HXJejImnB8xgqFEttyPp/KUx220Gt8Qqb7P00U7UZkV2XH2Qm7quAd2x5RQHN
8BAgAfJAwOI0IdDfz0SHQMaYk9tpRkJZGp9zh6JyKdcHZq6RTzG5mk+xC/r4mW3a0vCLlcdrIX1Z
cby7Z1GdVPAMN3tLpfmMy6I3jjNDHxw5/8ZeuatJYlai35a3OB08M3QBwAV3NABOz+/AEnBKik3t
ObLRHGvjyMiI4K3PbmSnaUqnamiMbgAaZXgkvJK2ppQ2tgiDGImsixA7mc0fMb5L6V/StOlmapyS
/LJ84fFdOos9RM5/GBZDmJctvb6Iwnyk+G/vQBsFXy+z9RQVaFikgVr6MRkXII1gkRA//HbTWzPL
uQK4BBbdkmG/kUc3FAwU7/q6kB8qk7DVJLB00GiNxufN95TJwTx+iYLXmpvgY0NJpjeipAlCBATn
44qj/cC41RUToUtO265bSMHCKJiXhgA0O4KepE6dMBYkqhb8OHWOYSgyhXJ2J6CKgHucu1J5OFHZ
LJ5tdsmB1Il1bg/wtAIl2OJvfdLsNOX+Zai/BiYKVgwLXLq6faZGktpFZEUShQNmJE+5XKx7U5QH
V//cdhM/7qBruyfXj0uyToLKmvsT3PBW0cF1wH661BpWfjqJKT+vV3ZjrywNEGfGhqrq1rp7hnf4
+hzQYJ5+2USiTdJVidMUMAkKeZKHVk/GJqBAGZXn/TeQbZF/3DZF9J85WszN7h17VqUEcD6qnPS2
GAruTP0gvqR22lmpDNuvsFkoUKuAY2V271v7bVPVQ65sZn1SHXlPie8bNDLRc0JUPeZXxC96c1a2
jOeqIrEU5R0D16Y8SLAmF5F9KSyXcxgzB43dHRlIkr5tjcMIMzFDtfsOGv+VGCEfGaOAbnZ9TCFb
E4QY2Kotyo5OlvJT+Zmsiowxs9Qg2Wm+qjpj1cHEMsSfiajNHlDIrrnain1fUxL7sjjZWd6h01a3
KyveYKwYGOK5k5JBNDV4noHhuDNQoIhpxb9AFPJB5xF3GdatYOwUtCaDO3NvQFbAeRNnDBg90c8z
O/yONUspvuh90PqLrHDY/JHIAuv5vaL+JfCy2jN5YQ0dFDGmItsCKJQEl3xTPbia/k2SCKIAqysm
LEZqiMdsagBNQDqH0YOYMdYM3bR1wvelyJcASiPC0q8hwBfhB5NzYrG4cNs5H4L6IetqogPVXUJN
eI+NiolIaPgUuxPXGEsWcpV1nyI04e2wD1TfMmmEsEKWRqfPeOKaq7X9bfh355SEx7mrMnSqbprR
ZnvIn5XxDOlGm+2Akmd26gja9mLqdOZSjz5ZtXsesZ+b4zMUcC62VvYv0BwRmTVW31xtlMui/hO/
AtMLqpZWZe537vLSwg24Wy2iaWIYoRgOCy/i8WCxarXkxNiAqhI1LN8oL8BehJVAiLo8Uik9ji+1
N6mdUbVFqwBAL6JJ5XdgsP/uIml/0Cjte6EeF/hp94cPTnXELpXTDaGg1lqNyAJ5+lBfbsSqpE0v
rR1N63RU9NA579hJaqgynaJpHnp/w+/T50bcjNY/ZWjKpGaDpI0CQ2HuEbe0cFxMvstJ4NxgJBzF
AIr1DaG+wkMVR4ejtM2MM3NWTcMcLLurclw4H7GL1QnyVu0/IFjMUAKIGQ65FAx1IY1Zaazwtqkh
Iw/3Qz/oo4Kh4pK5AIhMzLimEZLjWsBbgEVkIzZlVgPgISP60jOo4XoROo/MIrf/661EBJ2/N1lo
0zuCLM7BakmlPhlPAebNMCIG4LXrb6uf0ELSYFDeWmFshD9hG8EDOOwxa6Jr/OcmuOgzYlasaAEQ
nn+K8Mg6LGF9IYFFIdhd8iW6FwrcLvk5Rs4pkEKVxexTyfEtXCMuRhq/5aKkd6eBXy+JHW6RmP/Y
SQKZ9wB6+iTSjCUxEY9AEeexW5RGIRixMACgi4c+G/rNkDD8hRC+BrQ36peJjYIEqxkdmp0Xce8T
XrK+sqb35snN7LHI/+ZwzVT7f7oLoo5Psvg2h6xu5YAVOp2f8ifkD3M3AQMtkxx4U5l7Vn59CEIA
BAK6fp8tF+25mIcLs8TK6h9ICU3OGMZn9ESz3NH22BWthXblpNRwD6L1mJ0RB3sZuCsjeha0OH+p
Wvl7jZvpE1UlCZcl+tJBnS+y8fmQdpFFTXdUvQmZwFs2Cm9FUoidp9pxmEDxZ/b28Yi+fWDF+QaU
70mQUyJnJcizUDpb+mRFQupMmSkrcZ77G5ZThMd/r4syOyEVzSUePg7VgijW1Uq9ue7XR+KGDYB5
eXRpEDuCMHlGkOUTUh8CBUe/s013N4CQaofpkuTrRgmGwvWBoAaYsfgYyIc52E0OcT0BH7E/Vh8Q
NgXKXb8N8gXoeqTlAWyScTu6eXCo6wf01wN1TTgWHGus/mNsHCezcAy1I5CMoLtcPrKzgk8C27fA
UIJASeMnQPtHGD6GUeCKH4k7mmFPGfE1Xd5H4bYkOA2rqTuf21eP6AzOJvv+uUCi14GDBqtDN86H
LWGQogj0rucGbWSuKdV+/hvq9VjYyEHguE0H25kyfujXQ00ONuFEY5EYGcBpcnvaEutbhG/0eCOP
wU3XSABrP6T9bzft3v8+vy81Elxx1svWuMRMcOkSNVO7LnKE9n0+KyD+DMEvw3qcrbH+Lg+a4++P
U6KanXHv/yz/K3P0S1qT6jhCYrDYPjI2l3+UC+OvuutXAtMoRbai0e7CbCQKHuhHmmP82ld9/XaB
fwbKIkqqnExhX/FedPvKbUeyd9iPZDIWNBFLn6L2yZQOTMyi+TkR51753CFj4fnTw/fnzDYyiI1a
DtaOMqT+rZA3m4Wsk71dhMkCrBMqlGVdvnlTgh8YWPrYO9QHCf4/9kyQUCOJHO2GarmTIJAwfrYR
ybmvdTWEqaWT/kMxkkVd7PcsgATz8RzkltgWjwtkqv6pMA2xjjC524Wox3aEvHI0cpTHiYfYzzd5
qSelm5jfZE4FZhdqZjRYFx3/sIIzBWb5wxyDlb5+90N/hn6b3II56U1w+tY/btHpkn+cUyJsvCG6
NkqQwWtSwkwpMcAva1Bs1rzanKFiFNH5TVJGO94I/L8RI1x1qHEjkDyUWuRxl3oqzlOlefGHKs4o
Nnygpmsw+2MF/gNVGbPU/kOUdGYy6+YpFA8rfcl7N8xCYB+TjFF9zd5WsaicC1PhgCkm70KQXXka
Up505dXsTngag+qLghEyA6MwTYeTsWvIMsXD3JQafM4e+H8lCHJe26g+Bj+87kDXvfWf4FYtle7u
1SNzN/govvHNK1k5dE43Duu/ISeP5IUmKu37nj+etRS70XyTKTDnJTBJD3/+g2dRlgRdHxG8F4US
8S9UM7ctjUB6UIzWW0uqjSa2RKTvudAYebRqdNGtpc4AADfipPK+wxi8Ine0Ve9r94YDI8TkEkG3
D+1W/brDnzA7wiF7fmAMC4YMArRSKDakmjXBvKzesVmTKwDVgWwwQxP5dKhRLoML4yWhSMWfg0oV
/YXisniBS90DkJyzVnaSRoVtrC2a33jo+eboSw3g2QTns/6r7VLPFOKz/Jh4k9G34KFqXPWf3/Bj
4qIez3828aASarOkkh3Y2gXFmFth6YQr+Z5dQ7IESW0RToN1lO5J8ol516IELGD5LmfYd6PshHSn
k5JKiq3FPd4mKpPxwXU4yzhHgQD2rsm+MWgglrt3kP/FUhvm9PFR3rbkxqKiIQ15E6GLG5NzgVg2
HAc3WDUCVB1DNGGsqO0YV7JzT8d4V6i44QVh00XurW0ZMwlEEAw0s8+4QmHz/l4BHGPmOL79hj/4
achRTzmdVcX3/G0BWelxqHK6Wjb+0sBP6vwS7UnfdLLJ+OUUGgvZgBHNmUJpQsqtvzjYSxl+VywX
AYLFAaB3BmDj4FicAxicP0nZTZ7KfolqjXwJDuT/HDK6NIzYmHFL1AUGONPMj8pO5F8j0N2qlyFj
8AeAvI3pnESwG7vTIOPuj45eD4lNWmGi50vlf0HvwTCT9UlnyX58sgbxQexm55ZuONfdZjd7AmNh
0vr5BQX+XZkWt5kL9bHdcZVCyiGNCqqcIsXMXTx+4U9TJIwQsuXmp+Y+bXqDZNK+EY38yRWVtWnh
vyEgf337617mFxodo4rZ0SfN3lFs2kuGNecZn1wg9t+QjH6Q9UkD64hZ03k3FpaPaVRObTlzA0mF
huCcrK6v71IX9LirAlMQAATWP7wZnpEsxZ+htAbL2sfjMGjavMA/72ssGvY3CMsvrEzst4P4O9cc
uULrlF7jawGY90JLJENBOgryiG9nnDh3MFfM7RxaSvyFFavy1OQVkh2H+0qANo8EZTJeiKKY1AII
ssPgBbjml/CsEQMotwbqpFeaK9Wth4CAWW2cMagIYGn1bWYt4xflI+Euys73jnXRA+XZoCipHStH
uXrtYXOxZUt35hqvHC6MjeYe8tFhLsFH8d5l1lmVndRcvhxsiyDK0tKTNfposSKx1o6XKxylPxgi
EKAEhKn23a2gbIgIRcc0oBJH1x+hotE5TopTzN96qiojiY0tl/oOE6xcQoIZHOflHA+bb1oDX4kZ
c0+4OpjJsbxITqOzb2xrcSm+y1peqiCpiJw19KEtVdqE+yYFP9r6nzVhJOkLs1GU7CuY666ycLI+
fO/4n6rqaV51g5yMQ7uArdKRlV6YK6YNPq9DY7AjbI9bMIFCkIn7ik7E2Dd3WK1f47DiSGcZv91K
waIo7QIDkTRKNQx54Rnozj9izQam6unsTF9qxL1VrlPnCz8/2h0GKTBMwy+YQRlhuZBzLgiPGel2
WYM4TaPzVEROBW8GwE3Hc+VY0+GduMjqs8ysz4XFUrQvSeZRmOc2uOuhKe68M0vNPdIMUIpKceZJ
XsY7MbrcZZqIRVEHkQBYHpT7doiVNex/tKC9sRdAPKu0F09iPwCgCgzP67hHs7RvO3CGZHtPGW4o
ScrCJbgLwBGGIyqOPSuQRo9djrJYwIoFKz/WKu4n/zE74QYbvyFDwjJstUV+7t+eNlI2WHzlAO2E
YrmHoWQa/lu3EshUXt4SNwPdmcJy9V2k/QdEx0sW+8zgogi7lluFOaPNBtOjNDnJ1dgncMX3PSRj
7KUGf1WN0s2KrDlEAqQRTcVAuzagHjsG6A222YQ6qa0Mg4dL8sWtDfnZkxkYgu8GJUJhUZb/ua+v
97OoZ5QPKyukoFkndo03+JFxz8uMsKEXrLIskXlRZW7yoV2eZDtLJpne5Ng3WTtAVvlH0dHmGWCb
4L416ss728BLp5lN1pRijzET/X33wEdsnpJzCY/r9rmv7/HPgRFcnSozQS+a8uaOanNz1doWrVOt
ooediPujzGBl+nNBs6uMQIzZttQodUmVb1WElFrSkulzCSc/mrjfZfEmiPk30z1OuiVIYasuZth7
r8v3XkbFhEAI5PqgQ14gx0XeST8myCj8h6rjqn1n4Nw29eNQbuJWflSJ9SzxWbjEWcVfK1jeTuGe
qC6togyedMRjPYqx0tpY/99HdOCBNqHYi9L/fWdXRleM6htD4H/Cp7hsmdFJ7eTQotkhPavM1Sz6
KmE7QO+8WwRzKWfun3WGdcocSf60Qz6aEt42Up2ts14Kfv0P5Djbq57K0ilwgvzD63XzLq52fKX9
ev5X2xc0dNreS/MgT5QPWX8Invy002ABdh6wYRqUt32kzdxE5a7MgsyN+YbtDQscX8cw0hOewqwc
QF31jxdovNdz4WMTYZg+bRF9CkdOyyh4Zuh0ZrAa+spnZ29qFUsFCT2mhujioGB12ZiF2xWhI3j2
/M4QPCTDAOaig0LGY5XTzVENCmu2vONuBMU5krQWWHn8glHT1vNDVWGVg/NzrCRDsh0e+Anb09os
cw2EMSXK4OHSmqUcrI0fY5kPW+DJZcDYXxQcgHqk6jE+hrGNz7c8JyLdbnzzJhVTsU4mkabf1YIn
FWqXp/BveDrrodN7KWVwFhB/ZHn0aFUr9xUf3/MaJGd4SlFXi95A/lFIGqdhODD023pQWrVWZudA
UNRquqQI4xCAVK0bYa38neYG3WUZyrTX/Z1HP8oULmxxZS2ol2sgMulE4q40jZqfM0N6bRUyR6Mi
sqdy0yZ7zYLrfxdnJ1TWhamtf07P074TPRfQ3DLjEtpb23O1TEj/6ioq/blr7Bjorm1P4hAFbs/Q
kZ0vrRYKoEAcfSrRetdDLpv+oYr7DelfMuId2f+Z9WU9ljtRJACrK1waKCpS+FSCJyNfP1hMwYJL
utDoylhBIp6YlfOa85Ofk/SS5gL/FaSaDwrudUxnY52/bJ+uFw8nco60tPvDwpIA/YB4ntX0CeEA
MbtKAhelQZuBjKAdjcSMVraoC2R3UVzRaUl1N+WlrXCye+2ywlQ6PrOzhnd/m3ykzIkgFeF5Os52
gpznQVJuXsEuyWNkamOpbeBK+mwq9fzaw4YlOZK4mb1b0a6LKsX2oYkma5OllAim19FVbGGTs+xD
6+qfknrVLUFDPpg4NSCXtfrx27+Yd77EMC+lQ4jagwv7EiznQOShaxkzI9fFjbaGpiKSjkmj+Mho
sduS9hS0s0QikpCggLSs2MYWn+5egzN9NLyB4GLxbTL3Jf8mLCL+DhyaLfZlDlpiTDWogaVCgMJg
PSHjbjuH5t2WPGZ7rx4myGzduo8Qn96aY4hpKI/icRfBX5NFVaUjPEcRYIq7aKUBNwLuGXAvJcYa
96mAB2MxwfPxi8UWVuDLBlURmNDa48FGyW1Z5N+IW/j+gliLCAHi78Bwz4M2uYhdTg940OZZf37b
I1xMNPrG7Yd+EP97m474QyTt8r5yZrjoL+Br3L9LWrzWf7G72cmVmZ8oWSwJfQv8h2drzSHTCoNF
kPG5lesyMHhwlp7tNE/R5sob00FlJTaZK+zCgjbgvAnl47OjArsM6gF073n0MEvdgFIYfpyp5HoB
DWeRA+I0y7mIq/OY6tVjTG/ULBSqsqmHZXmaScKuJ+/zVxDHD7tT5lDXh++/Wbt4OA1ohnUaZm3k
WLyfcd3KWIw8iBIt3XAgV9f4C1s7YKfPuq5fzE9OGTXbpDW8ovtaFa/AcVGfuw98I1Z9zByDzKjK
GHZ4gRcHj3YAftpvJoezR4SHECRxJkuc251rE9oW4hbbiW6LDNswbeqIpky4FdQlE2Vonlqmib9V
3ug7T+7LHxO4iAUfXHxm+zW5gaQLlQeWW79crqMhV21uNKWrlEBwjMa9KfBVv8Nujhs7f1s0Gtqq
jg4TJeeA5RYE5CqTpkNItBa1umSjVx5eCqiTu4X1apVia31qNw+6HEKK0v46XFazfrXNDPwCUcpJ
Xa3Gci332iy5HxR98PGoY4lqd0D7QcN9WzWI9XaLinb77dFZA+3GmXuarjzfnxZdcnCC3DaXSyeo
YVZvGi94045SFdm+q7nhNlBTwrCmJPDnkMuNzeJwfAdyUWbSg7LpQKcY3+oVokcTDuaq3/H3465q
V30WpAw7ctziCUN00nPR8hCjHyH0KLnjDheMplIYs9/juUjZy+CveK2+kIwXhZaWcHp3rqQN4BHD
ShuHi1klL4D3UugcNDF6Q7jsFAjns8Gs70yZg8+LFTc78G5f0+RfjAIWMB27X1HCmInBVp5AI9Ji
wxSXi1tPNVq7cmO5/Vz9PA0seJ48xhyvKgjol4s0PJ+zv7xQJr19wzby0eALwQkP7jQ3bbMVBW/i
WS+HrJcaUycKM3M8cYp9Tl4NzZ06vPYZSMvAThL1FCDhJJXCQ5yV5/wnqq1763nCVbeezDoLFNb0
Mrmj0nY+jYAy5nTEjQjuzctl1857r8byJRG4u9Xgg8xWZ7M9Ox7hGNEiMfKURuIdhgTlqvujGhjt
uD/kPT5KqmGY6ejr4ZWZOTzOVNsbYlAzomPtcguStuYdzhyIaq+HKFldEg8qm3rAZA/OA8mk21oc
F/BLsVYdRuE9ne3mi4pSphLu5l1ohv3wCUP+uXoM5oMadv2yJcpdmR2j/qpI++2eCC0hQF1BTqbM
bo0/cVicAiFeGLP7YAvVsM24kup/pwya8MaD5/Dnk1zrBifTdUUpqZttCgOSzfC5NxTksnJB5N4h
vjWNQm02kfr1SvQXhWeTUoaOBCfMyThvu6xXCzW2CWwv43/K+Cecgr/NFOyRPJC5XvOV+aT8eEjo
/0iTWmNOBfXAq77j/Xn4JhBVI+rynPY00wsZFjRvMbpYp8OwJ61sOpp/JT+4g6Yh91Aj8/M8ZliB
0lkYdCXNFVmFZjVdaivIdvyjRjpet66IroZHEQBdEFctT0FYWEISaoFxPzS0tKF/KkxKr2oYoNjl
9KQ+Gzh4YnXduOCWmrhES8agyS8smwNr5l4vGmXF8/FyrA8MeauwgYcfQRwadjXVgGC7suSNb4hF
vjf7wXmnPlVcDnQI5XHb1ROYnrmEvpkWFUQ+LYLjtGtqFZEP2qcK1J8+ysBTQpHmktFOue+MWYl9
4achDxjoOt9vVlw/+Jls7Agq94mEwvAhG1Q8fsjBFmokQYRF1A41VEb5tPPrEk8SN+RpPG+hK0Gx
bTaBOMYmuklyxZEW05Q9fi4w8oIsPb9mrtvmvOjFrFihc83snprWQguLuTqqsO/t3CCJWB2cO4yI
NCO76AutfaIsJJ7Qj3vQDogGNdQJVV4AUXwEThUT+kO0A7MDsbSPrWABLT5Xk94AbDIibn0X/2ya
+RiWz4xlFLlpakJ8rvW1quEwTuOHAWvdbV2wB7ya1x3nDxtr3vZypzwjwcoHnFeQDEK9Di/k6RKP
ah756/rDkpXVPjmJmnC+nHAvqC8vrTCS2rT1sPJyPawLhvtYmKQXyqSKqSru413mUkxajnZq26cR
PDH8rPgED0Snb0nNVZU+A2tPOG8aMYs8IAXIWRw4f0mu/Y3k66PGDG+QUOKCClOAgbSec4Go6oPK
cjJk7wRHduRrJ0m+ue9p7pDzgFa9m2Wydn8pZ61roPu5lFbtGq6Zrn0JGTfQuwwwbGlG++d9T9yS
L48Lv8G4Lna3ZoaKTnvGiZZTUEZTs2KPkg14nwrdjED1+jpJqejf4r8ouYenthAY8OUXqAM8lA93
6WHzdZB1bnaS+AOteaB1dULzhmYYp9cbg75mux98w0pIBaH32+OCCQ/+K0VGl1wfBvO2sunXQdIn
86h6eWuc6YZEXe5aDS+jGmQwszRC3okY+J3cmF7moX0ahdoyd+Yrk10ClU3ZnTceCckLTqEbroa2
q7vB+baXVVBWfGScR0/YYNWQdK+w64c/s35QzCfu709gd6mbRdi6Hrg/RWj195/jQyuQgXrd9sjz
hX4ZJZb1MKxe3VqGkP/+hFVIqEVjUuU68FxyGslLUOkTMG9heOWefGiLRPR2s0GyPtkxyznoEGLF
iCbwLH0ntlhe4J8X7eV1atmSeY4a+/kgDoERF2uGwTjdVa+rD/fbtqjao14wuwoV/n1Vu4QHbkEX
ci4JMCmvHJBBN5wjp8t2KqV9wowS/SahhOCn7hSLuUU90sfDZOUQa1AdllCZDKL07kxiaCTwFHf/
2Sc7ocBW+z5r/y0XsJiIHPYwdyjXWdzsPibLsbMW3XFlyG430BHkBvWGJFG0a2TQIUJE7rUQB2U6
zwKu2hPJGTQhzNOpdUYST7ADMDzExztgdXMYRu8DUxRNwNKKCAg3nEDqYUc56d+PMiEtfy7QKcWc
MKhiQUbDooAMPKv84lehAZpvmlJeylGqrTz1xDULOPXWRGmRq9JWWoCzFPpa7gyvTjnGJA4Q6TsV
8jqwI6hUc7Qh0S/2Xy0W/CWBEpt8m/4SxnCSoIK7DCl+j/ZZH5GEO38B7rJgIrNAfVs35ARUCpGz
Mxe3UgGkzbu3SMlDQvy0lg5eH3+UUL3NHJGeEWqCBOLagnDMdxaaOKNfVUC3ZNLaHMrkeD67Hu1o
/nST/2E8gAcH2r8uHiyvgrEgBdzx+sY3UviCbCogXT0aSNgqfwPz2peJrDu0KHjdmFmn0ovnxkHF
J1/M8yZHh9Fy0j5ptz20n6wsfvgJR/2wk0GSfOpGfQQNzhJ+OYblvZGBUirVKiTZ2qw93+FXXCnz
htvSsBOcj8g7j5fe2fsPPGr6U8S4SOE18xe3Ikb68U1S8S3FnWLA2627JTehxIiDrsnYUdh0ei65
1tdRMMj7fqDlHC9+/V8dWykAWW5usKaO3mWCRV1ED74wNDwUWBVihUBWU1aQJrlXnqqJhY2fHsjK
hx1hxylW3za63eWCX3Op5HteBVirgcD55TO7/pur/uoxbdrulGJ0vcMcQXq/n3TgmmI6R7kJVhPC
sYSHYc/nr2g0NvEZIF/mzTBTG0OUpqGKzlRz6qpuUlr/8MVPPBM9IpKG74L3LhaqqHDYpQdh45zF
TIG9JtT/kkbcm9e9CsgbU42gxBd4gtErqawejAyJpQgiJLJqzm5K5mZYlOiGgpGWP8nE1BVXbLUu
SZiPYWQlwMiB/JwTk4Ch9O88ZTh+SvjWMQLDyevP2JOMyaZgs36dPdJx2iPbAX8rtjigW/FQFsSe
LnMmSCWUkbwNaZfMz+gw1wUvGX0e0CVzy8EpS7tWOlwTuVPSMT4iKgKqPGv3v85HcIoaHaSMzAeu
2Wrxiy4GHyLxWogy8bJv+j5ruyBdXNIrWQCqlPdnf/E1ZpcFpYkZAdLz+uVne4T+hTxn7On0WpOO
yDorerksvXCmheYKtxMrRpxSQd8KNAuw4C61b5KpcIVQhpoLm4mcGdKQu+dcBPJ8uv293jXEHW3U
mc4H5UtPrgZYuxktsoDAaF9eCdVothmwWOunw/9xpn9RcxTgNYVUrYqNhuekPlGJcr1HnwZ3vFuh
EhqI3l7nbvowoZ2Vhao41CEBRl3T7dobv/8AdmpYZysXVO0sDG1Hck5P7PwL+/C2ux8osPDA8sw5
5TPEDbVk0qWvvKern/4dmsHn4IFm7VGtC54sv00aW+S9bgNwI34KZckvIOERVTBaNQZtHgVoae+e
0uKwKeWfG0OzIyT3O2u4uuUY51qUWpDYJiZA4mUHrA/LnhBaG6KsSqALgk/oQNSUbr7nt+HcfH36
tyYGzPlkltTaiPranxzvEH5PF5T73uxw7r6xxT1rELE4R8aztCr0DVk/Ri9hSnPM/BMXej3e+3yJ
VoaLhcnfcvFy491BJtP06SWtPxPbrDjiALWU1owUbUySGXwlSxWInaSXTv3DOzyjzaFYrghYw2b1
bVZWLj9mJmHDefqxUHpDJJVdHG3o3SssHue7VY4tYjJtXUONlFxiWrqPhmvqjA/IBojCOBVgE2a7
pfuKnH+dElmgli0KHVnoLdpoZYKN8i6BY42o6UBwFSvjPyPlKf5Wtpsyg2FzoRIQ4JsIkO2MkKG1
BkxzJJpI1idDG9qFJhP5CkH+DmMyCT0Qv2ToOorsBKJ4sm/ofLvD90MZXqrdTH0Jt0+vQioNeQAc
IJdtYyF4A8szx7XS8zthsbOFdbWYIb5xm4ERLISdHI9qSdT2DFEq9QUQJ3+6lb7OCmQNeKq4uT6O
oipSeZVnhQLJPd9R7LhQh50ArHG/85MKvc+mCD8KAqUl7sZNdm6l+1A8QwrFLj512PfBMfuhEzF1
FH5SGr56+nNFpcb77HBqgIECy0UIE8YFEnktqukcVuoYKc3z2XxCUArtN7ulkZueq2a4r4vjnYAs
I/EeXOjwlRRNfL+6VHYqc+lr7k/H3iWB02SKI/cdw6+f046cHp4muDH05lIaaihxdfbcS2youKKp
nmoAhTb2rDjDdTYQhKlQj4RCNCAeSYMeV6o4fitM7JvKltnQOWWsgae+lqjtKjdpiggnMGV16JC5
UoxaPzVSB7aeNt1KE2HPYA/L3u8dQNcHAfHsef0wvAJOaSlH8o9PdDZrncdgxB87rk0AZiONB38A
67iYuLHIauAtuYgrny4KGm3VfgmXnpJUjDq9Sj1WRRl4WK+YMpJ95vOVGf6mFNeqpJDAX2m98aQ2
PUXzG1hwnF78jJV9sKHhEMlsf4aJwInaeaL30yY+SZyJkPr/c9BEAH2sXL3qB/nLLbEmgSbzW80+
GFWuAQu9ENLRL4Onfuchd+/HzSUfL5iFAg7PtPcdhPz3rQJ7cDPlDhuseKMU+O/KjdLXQqtEw/Lx
jURoryRZpG/Mwnj8B10efwd28phy8f9pk8pG3+CNWsYzmk8NgMFh/NNm/E3eXrhB0QDX2QYW1k2Z
2UrEfz+MdWccE3BHH4CosQDHgogPzPPyf6WDxWfdi0shkqgjsKbP/MVVm/dyqzi2QiWPUZinfny5
FhMD2EmgZlrE+l4bZxju5LAaLEA+9IlnP5IIMVM+ERXoLKA4N/FFqyQbJcVKN73P31OxxhwTJd1t
m9nkh4Z9Delojru2+FGttlee+KytMSjIWUy/6rRkMpb32uCX3dPgziA/RbfqgvE9EQjeNWWXFbNZ
OXIGom2Ma7qoXx4SNNJYJPM6sWe5CcppQpMWuuCLA0JbP83DcocyXFo1emfi6/4yuzWY1l+TxknV
Nt/UaNPTJDDCp7s6NoyzowVnI9vKVDaODdApt54tRYrX+KUkaMoinxu3DR9UFPQByh/Oi83D0uQK
vkDujGV/b4T7OGkwLAIa63pXnzOYPFNtIkZ+Eauty+UHyIZ+8R9krvvqMttvDQP8fmqQTxx2V6lU
zEl8AQjaGumHbNtWu+uxKcKGPaLdocGfrs5E2Hwkfuc5XH7MKf16asUf/VPsbkZEXH74fMk5BYYU
hOYx0np/DcsWIG5v0Da387+qqYWJD7bBTLhBczwt30lJWvwTOSQJDDivv5T2bRv430OEQW73bJ8d
nrd3i+wzosy7JHYhby50dAmkaBya40vDTEg2jzcatpCVdGjrApMytECQz3Xqy3Pa6KfW2pKICiRA
WK5qwQi32OJ6CEi9TfT/OpX/vLNCaAWhkPz2oCNjaFcKqjDYdoufBs9BKSNd1wEodAcGaWTOPwY1
FkBLteWj2cHwaHJ5N22SHzsSK4XsQpo2CDnI8tv11UI457S2PfnAoh4qYZ2k5fIfHG2WZuGIdomC
KxRh8zPGSauvN1qpJBZiHau8akfUXPkcN9Xhgp3J7oe5RvjSlwSEgz3djNHhf4Wvy5VoT5ZaH0co
L2BPNFhuCAdpglenC2OLOPwi4G8MTuUwxMGYG6oQ0mhlRAbNMOQl6nM6vCJDnbULZHpsMCAN5eIl
LMSuYYJDtaS8SPjKaGvB5khD/zfCIJCvH6lUWTZYZgGn415nmudMO8ouDjITM6NScw5nHZ9LHqsr
T3b8ZOHufBU6/gzk8ATNRQuKWWKujNlql9cxbMLMa94tRNAAYOvAicSRFJNDS0LAjvZBJcaOOFfs
W+Qez2cx9LrLk5WKkuHOZbxLLG097eRH+N76/IbYNzGYvoWR8SADyOLgmStcdtRl9BdRzNmd5NIt
coTC/kHu1wu6TO3p8Vp/TGLdsvH1Sp+tDgwgvuwOTmWnLdtPtwIg/lHt5+DRZdCoMo6GmAo4Z9aD
RKd1Co1Y9MvmTZoIsBW+76PJfHqEVP7gKq9/qusYIoLE/LJN7uYfjLlYbgPvVALpNfpy30a18UA4
JikjcivZ0oDXMqACL/dM4q907MBR0b7YdmQJZAa3YF03NwcBpXGK0jgZNHopThf6/eHRTlm0K+My
Yr9stuQ5Fs3QU6qozvNRKqK13TasY5owYKSBsjJVurH/9G721pVcVHxMbqEOJbWTPd1cRS7mIoUk
QnUVSGcA8tHsEgM2sw930scHbBxOiyTf3lUZ8mVCIp4sVwvSh2NKKWszGdVa57zq99P+d5dW2XyS
NlBiiX/iVd3gwypyimMQ3NVeLARF3rijJeiDaCBKeuy7bvhe7aSb+zm5FyNGkNQkLyhw15JgXg3x
Toa+cLisjoWi9drQL8kCB2S1MHtQ3FD98umqREeNgJx2YQIQPX621Av+fOTbhkHXoKDc6UCQCkCb
R1LrkHgIosnu6HP2c0cp822apwW71KMlWnzSLZEzCyAGrWNoB4q9UnY21yIoDmrGEaq2pODLdqSX
ywoWmYM7CzZeCCpxmhcmITagjLe1XdMhvgg+jDs3YoitmxYPrY7r/XE8aK921YBzitXK+UE2dGrh
92ePVAuTKr/1fzPRbd0uAXUIJeZyQHtzBd/xQ4dYi9mefVRhJ8+F3pQnVnbGkZFwK6RqyblMMV9F
1lmKZ57bERF2oZJs8s2lmQlsQ7Kc0fqeRcMlPY5gSgGcitz1KIakDQCdV5gjyjiKvJ2tVaNXWLkH
qrBN56UFE4sz2xKODx0cUZJSK2aVnQnqoK1Y4gqO/ezaTf1gCR2aaZXuo7o13/VcbDV7iW+EYJmd
h2HCWQhLAj1aGpMPaD8MD6+VjifT4zQlpctsFvQJXmOdGphZpZeTrQBwqI9KI/f+5jibjE1gzh1b
7yZvdMeoa75HcVdf+O2geQVspWEmckqz7TlG7KZ/WJXBuD9Upnlm1d3RupVBMV6/2RD1scWS5TJK
Bhv26pNHI4B8Rp+piXiqtjE88mJ5Xs2vEaMqfihS8c6odA3z2qQ0MtbjwBsJiuO3Zezu8YJM9/NE
yKehYOqkD6kEOuyqsT7iQ0H5hO0CYU49Kwj6BaefISBbMhtVCn02jGHsvPlcwCllCNALJS3uiTkQ
yihoOldHdL89bkydYnyd4Zvaw7V3evqAj0x9VwXKrymKodRMJNWhhnOlWCC7lzAMolzGrf87qa62
5JwiCcXlXuPve100+1ngPPlKLN/cVGZ7bTlRTc3mfoZJBcr4HNfhvyCxtUoKVDqTy6VRAfA6dlkv
lIEep2WWRLYh2uyJpO+JiTJbLlcZq2lqNhRmOvR3J5meo7W6pNUIJxzFjISDLtimXVaLXP4QiJ6S
1tEoZv3JOV1v+c90TspKDg3tUxnaiEIOjTb6IBl/2/zDKaK2c+nF2I3Ib5Rygg+U2fgvtuZNvds5
5mwROrprOs3nFcMLT2VTuThCKa/VY/wq6u7sh8cxOI1Yxg5szsuf7HmL47OUeSiEob6hJVUBDtaN
USvdn8ZfEyEOLgkZ8mOGIU6B/ZPsKmVMfViYpKwZaBD+epIOopCZpP60HpL/mUTirZuaauRmoOpV
+k0Jc7AZIiiOEHHHHdMWuU8TufTr2k9q/ucou+bjnVcuYZAs+JVUW+ZasaJNuD+B4kAp+1zzlO6e
eNFPFcGXelcbrGchNBs7dDE3Vt+42QLRuTX8nblpTEE7asZa41xOAAvGll/+25oBNsnWu3ai/kag
cEO1ogjA/qYcLEs3zDKrIewLOhTTtuqZJGoglQwVDONc1BRP/w4/TNBlqoyeyojRfq9BmOI6cV6u
cGyF+pFsnMYco3B/K/ZSDJmL/KUZdhZC9t0S4IrPf3TxEzkiSsiBF+ALSmTet7NfX5OKNxm3aK7W
pBB6EAh/s+MogIkFqmWEW/yrJIErhfCkHvPZRNJQkAS+wlMHSBILbvniqmRiNTmZP9e5iDVN1dxI
qRIwbR9WuY/fInC0gR+UBOYHEEq3qGfMNtMBk30RhrU27/JgurIfuj/gdesYmMeuRhulu+6DCcJI
GmqH7EA5YPPF3RvKBSSJ8vwrgo4Fiyyk6AkVddHyHUvbfM5mzFpjjVqKlN0befJClpvfpnH/dDW9
kTYyDz8M0UFzcEp26Q7sS6MLDU+S5gdKRko37BpWnhfh3Lu4R08RshCifCVlNnEQPqcTxiOw4SUM
hTxFyw6FdWG2aLK3oJRrUOmOyKUIk7Usx1gZjn9qKZaxvYdq46CNenHJ8Lqunx+rAkfOupaFTk9l
CARQXFoRrGtZ1OQhSV48e3NXwVhTwrQm+IuGu7dloPS/Yi0E5yZqGFtI+RpTe1TLUYXgChZcDk28
AJIq3tBSsyeqyNShBsKxLcSWGd018H9olxlcazmCf2vf6uzreUgknyOwT2FT10DGGHpP6bE66rsF
LsvVqzXQur54D8J9ERLE47U77c2KuvKpLvOCrm2lZJZx+WpxXAli5MAx1nwlsjXVl0XTxfhL8Zlt
Mehu0WmhQidP/2M5oEJ+kJiNqu72phwzw9zGKfo9jdjwwpXKxe2zvgxR9jmX17WxcQ/5Q13D8t5Y
c0a7WvbmrwjYDQBqBxTxhEo+4FH4r/G3MYBan91tRII/h9gp1uK51GDM5XzW21CoHqEciyJ+P/8y
5CJ+S/OL2LVvt06Qr0pQ23DnlZkarHD2p/11Ohh/QQ6H9MYhZvZdi4Ua77VojYZPRQO9g7IEe6h4
HBVsX/kp+B3u/vAv4KooExhBggPAhIZwUjCJyjKlnhm+IPqavLBoO8tT5nzJWuHfNg7zkYML0tD5
Ky1FCSuNlAnMJB5uR1b+vR64TGecg643wCfumrjYC9KCIKh2OWRdmZeq5AYcZflRVs2Vdt8tf4CP
MhFvfVyanbMPw3yZ7qp0Cn1EU7WmwNJtsSaW5GIGC/4zjeFjHt/9n9KdOXDeYg79KDscSq+ZdRK+
R4/Y02W5N+cewrTAC23oa0hPjHE6yl/kIshKXL18atrNt9LGy4KXkqalACCo3xB+gqTj1TFYCGth
MPkt+69XHTu9Gw/Oti7TFY4Jv/zkc6A2kGS+DXH3R9JLvQzfq8vKMbLPmFRZ+Apd0Ho9DDuzK9lA
lAgPJCmDLXGo0wgiLW3iO36YOEEd4lrdxtMBIZfi+lmXcMajq6HjMg0P6p2F7fnH+81OPtepW8DV
gsg1PC4J2smmZZHmxgxYUGSlLcYE3jYB2O0xjDMBpH4hd0UXMYIF4OE6+d9+05FB1Oydn+j0ozpg
qxKNlW6VhybCnxLxNHVot5Vuf3ZOMobDV2yifgcCuIU7l4CskMhCBzl2/C4HpJo813ePK/X96cZ9
5UwrYtk4aWGVQgZFrRh9Apc1Me9/4AtCWFUiO3Xf1lX+QodOcDhOzWLd19cLzrWHn6lDNNYYJumZ
0iquLBOKfU/vqAnpJwrF/I/TGvF/VGNMLZHox3ANluPMZBWSD34P2177ii0Nb8It7/odS+RoSfVB
wEFjrF3cj6Bf9bWTesMrqe7JSzSK9X4GCysmerp+FJpOWPVtdvlkdADIq/wxjt4t+xgA8U5R2Sn0
XKDbQgRjCJEtJc/5ce1qRTz6ZjrlHmChzpn+7vHXCT/uPGr31Hp0nrVrXbnjuFyyYt/KRbm02VoU
ptTGr2WleLTt0QVdYYeKWBGuvl3aI2R0GV+8R6TaMFxkSBeyMMhIlcc9mcnxroaobF2yfTgM9eCJ
tNVxPVUlJgOhAhWYzKPifWC8MleiXab25FyiQ3U5oCWilFBwsh66aot8XvjzPa8dqGx7M0eb+0i5
uhZWHXAC0yZTXYgJrCNaIhmED2iTnApSjfhH4xhzbSS98C+gmvjoF1z7JEnM+2WgMNsuXsYAHaNK
ueq+Q+36m5BcJTTSc3xjbxwz7E3qgmbfPlK5JKDWsQBs82tipa1eqhjhWub1ETA15VN+D+g7lF+F
+88ZA0rao2cIN+Cgf85UfRL4mahPLkaFy/d1Pty+d7YZj9L/i3YFTBTRGmOaHE7VXbfZNUQRIDDB
riJsu1detvXRRyIlA2hJYYw3P6bGdVxxBhqdhDvUM1y6SqCWwCY/zXeRiNWU37CycXJG6nn40P5q
66lGsXpwg/zBkj0a+Ijv6sn6M1zmabbEIlh+y6tG4OfffqrkLckkNEkuKXrBMaK8abt5WKwP+BhB
DiBQQcGT0WdT2umJAMFfd4OHbZdrMXgld8pfkO/w24sPWtcNAxUHFD3RLkpASoQM7xT/tbL/kJ25
6JGxNABI2gssN196rGkC0CpSZYw/+tlm+A1VneJqF9ilXF2xkuwrMSaejyH1bhQORbS7h2xhFo2O
CJqt9TqXjLc93iuCL9svvvqXlgGn7AyF/2puBFVtRw+diLaa4KPn3o/P3lo4fZ2TqN48mKJuZfvs
S+m4zjlAznzwoHIHaEFQSkVqQXuAIdNDja0FFjy2+Abg6HDDNrxCx1wpyNMALtORzJtxC36TT8Vw
Z1YBhKk2OJT5L31e1Mpvo3fcHgw8+thYuIizSlEmL5dVb2/Dx82WlWuVzhV3hFDni7Od/Qzph7bK
qgWBRejG0AnST7Nv6kST1owGm6uWN6DH6GHgy401ETw3ys1r9EawhBe1PuMCkmEffWROupc4Ekzf
7GcgO+nlb0wWrhelkN6ZQYXfua1BjHIkdC2lUIV9XFQDeC95OM0s/zQEWENmdY842G5+EMEcGbci
2sHQWQIlahp3rd/ayDOIopIjpi93hHY4f9U+IMT2MVqw25pZr3diI53jS9/6Px4MkIrQqHc5oj9y
wev6DZsDMYi4gY4KOyqZkciPtzmO1g6WSP1aNFGSVfQgjVhtJBumN7DgDYvLwkjnAre173RLmdrc
ItDO1f9SPgWHFWsukdaykBkXOVL+ML5lx90Ohpo0ISCAWWtwE8lA7Zccw4l1Y8rT7tCJNx52uBg+
e83fRLset+WZDDwLCNMaG6kWCtp6N/uHl9g6GPD3XqDISN+iL5o3yokLyYpgNsqoI95Y5eM+TXd1
o2/QvSvCE3qWTsDS4C2QqET4Yit7tlYUSWYJohHpJo1rx5u4b22UKIjamwhREEEQ+OwKu7GtiqBl
ADtWGeJ889t07g5D0z3uzqmWCaNDD0ssmEXqUFJIEeVJUcyrKm2ROgKdfyZWN02EpC4ESZU5yyn5
smdVwWb6rt+2chPDkn90/rWDW6TW3DxML6/NVHJQ8ix3+2uFi5eqvSkV7KgAzd8LOJVuswVOhMLN
BGid1KVOt8l/UkQy+NHJOSiBPir7cyKPiF7Hcd6xgKLEQucnjHKn9M2jxYqc2PhqZjfkHVocuxav
L2xvmx0I1DTIviWxEQj25e5lyfe1Aq+CNI15y9uzW6d2H8KJ1ieG6H4R2JKHVqgYVzGzl2jX/MAl
HWvo9KhJqzKGb22fRq5M2b2lRhzoB3A0JwkFJQFqT6DviYFNDUNB6JtKEjTcOhNy0WGB/1a+Ye0p
EgbaCLF+YaZcYFvI3GIcAzwbs4/tJO79D60Wt/gdDnHq9uKCIeG/+YR7arUWMffK+fKI4rZasSHb
ntVB4h3XI7WcEbBHrGPJrnUGBvNV2PfGlWXgsG+eBL00AUdy94NDnzhJHQB7HC7e+6lT5prFVXNq
LuNnWtbumqFKjLoezW7nWz6l5f+Q6KlDNeek9eliKuiFaVlbXILhe1eDxn+cz3EZvOFFx163KkVv
F1DLiPwqu9lyyFk/8hetLvkUbH04Cey3zgujjwmuGE01/XP66vUkx6daRO7C7u1FYyh3P0NKgXS2
osD8YAooIKYPY/0PIF7hBRsTBWIi01JoPHjQyUzw7TrRpDhf+/SnnBYHArng2pCHB8t7vxXH04So
9EEW4RvpZZ8NfPXAqwp/hiBEAt6pu+pZVztO1hGFYGowD1OcqMKJvDPxIcNGzKMRimGd2RDsLoLd
/5iak1P3/yr5Rb8ZefPnse1zOcSMiSf+9cSy19PlwX2IAxBUZHlvjJMWF+WIxtLewDgH6nh4XrVr
jOXAKYwyjOlP4IGVszvAjA/nej1hLEFbXMnJqcgUGYdTFh7BvKUKeek4PpJwtcjwk9l/oAwJTXda
VI4Co1h9yX2x58+0ACTk40A9cF01wtqKkREjQ0zyilanV5HuAbt1Ox7UY0oLWsKHiH6fXjnq4xm8
d4DlRg0Jx3dD9e2uqgqiYsagl/S5kUd9C7sIYqO2gUyHdv+g/ONS2UZ6akZY+dewpPaJiaisqWb3
zPplDKrLJCqSXEHrjqDmnVEItWco4SwplwNBqlBhCFWcgoWQ0aRXwA0xbBQcXSxeA/AHysfNO0zG
IZWzP/pXtrNgQK+eABjnFjXIM9drgKqNw0gKuHRNuPDU9eqmHDFHMxt0ViRTr70T/t/t2L2ioYww
cNdPALPsj/NEyKdP/YrkzvYAs5cCqbT4fZ6DH/Mn/Yv+xmvSOopYlBdhAlFOOayjrBOmjeK8+6Ao
zceCltzDxPE9YdQqbSYry83bQQyRLl/k1581c9QTV+ZnEwuZ1WRsI9KA3367QRPDSbhCy3bLImWQ
VZTu8knjry09SWljCzJSfW7WaxalCgeJD1sKtW1lYFzB73IkG8LVO2bDdV4CvimPotSgNF+wF1R4
C5JaVg9djGFvZnS5rioY5Loxlvav3wi5PWr9vEcRht04nBqdsUbqA79pfGnKCImdPdd+vtjQjXyJ
r2e1ykpGPMKsS5BX/ZMuWIn9Y8vbYsHlv7OwrRCdFWBY3FliLI/qWfqVU58vUFEYK0jVfH0xvmCS
dRiYYdiUeX2QXWkBI2/nruB5aXNjLE7t71+X0xtL3t9xIrgKIGUfYRenFIa5IPy0H3rz+Rsyp8bD
cFMoQH41kewDN3w5F557m0WXxvCMK9PJnWpl2rk81FhTqqRytSxKsag5ZVuAeQ3jfIB5tFE7QEui
8X/mpVvIbTMxejNYolc+Yr4DWMZi9C1eHwflgir9NIwQe9SVQA5JYmbaTCPJVHL/5OQ9BIUrqCcD
FB5qnTqLIjoWnaxCilPgIcvCtghXfUtWvrAiOCfHQO9n+YkchJhSDmomuTPs/D/b9aTBtVNQAcYl
9pt52j65g4+ZVWJTEzkGOTq+wCARSf7wCqKwzYOlbDpF3JZy+6zDEtWvvZ8g1Rus0WrvbgYbRRiJ
gIApOlxlTgEuTonHKSGA7ulUuVWDtqNIplhHe4z2rELXlaOd8avUp0EpkD7WAXtvQx3ik5/qX79o
KXuHsZdyTePX7JD4uJKPtSVJnCSEmN9B1JAv+XIZd6h8/Hi38raaV0aF29Tf8+ISaNC9P6Q1Kp2i
pqx5gJ4gunOVlbWO29AzA8zpzqoUFe7UciuIlNJIL6nM4+Q/5kDk/HPNV9DIC31gG7kfEf+RIyf6
clxFe5HElYv0HpEUKO9gWV3eQlYBUWsE7ftooOd05DNwgJzhdvfAtcLnZMh3eexar3q64G3c1iqd
lcRohxtwSvMh8XSnWCydiXE+0+7iAuWWuQxZP6BxBZl9CNWtlRobb23/8ok4SjvvE+O1gG+3MDmm
xwk6jxPMRc1ei2hJm7Cch+39VubokvzsY7F4A6qgFQAxBJX2rL24OKDho/TWM7youHQOd35ljTLX
mloo/t6Pd1nr7SrIVND3XdEAPqD5dqjTY5zTmVWj1RnZilUJwNTeby0dBnwPG7q1HZomagTeENGW
piBrwmjuacR7zP7V7Ko/Vc96X6nWe+tssVhWjDfViWWvlBaz3UsT9acH5fZq7+eK2yWOIb0w22ZQ
1bCZeTijNHhEuW/YQUUzA1aSliULPuqXiCwdljqst01LnBjVLA6IAYb0TmqWg+qI3dPhlMQsKBUD
WP/5nycg7Aq8yluHr4JbjHVOn3DZhFpYseCC0LW+UZHBdqPck0/Pb4u4K9HyFSc2uGZUKK/W52kq
sXvtw9OLYTKcSNpMigRNYn17YEWkTx6NJVrjDhzVZ1N1dFdHE1nhT4N0G3BHxAxuy/0M9sk2ABrQ
Z/5veVc+K7Ir9QfJ8uea9KRWuorLGGMs1AqJofBcBVZiaeq0BOTRNhnpyyt/9IgAblugotgv6PW3
91To3nC11mIQMkh31NBg9qonbCa9V/v6oE+bDzGEUIOaZVKdDvVWlJtzje95rwIZrAxADcwCTmMx
jf1dZaarARwx8Z+M1LAOC1uuqh/xgoT7SJ1bZ68acaw58CzPzKa4DB5bqIU9BqWqp26/ECkzjRLP
lCTWxEjUrdWbV0JJr9LzmjxMUcc0f/PqFaBQd/Y36P8n5ZpxRy2M0VEIUZM/uL3+nKMw5kv4eppx
mMMtQ8pcTUV7VW4e2deuoFsCpI74tFi+Yf2Jalx96VHIi+OdppadpxfpwzdHHMVrpU946uaBC1Xu
u8hS+u7665xgb6nhMT6HTRmjpxL5lF/cV0MXk760wGDyJAeo2/sFQaDUci4g0dDRQMhzHKhc2Vfq
nxit0Ok8D0+qhgWm6yHDIbJbPfLrDbb5rAhYPVhJ0Gr/fuc0F89+/vU/CNVre1LlvMZ+bPSqdYdT
HsEA/nYa+/j7Msw8lG31HrsG7s17sfuH8x2nqsWz3OxTtdwTaaWkhke+t80ouOW54lPwlLSgNzm0
zyslLInEiB36d3q55ELE8f+O7LZ0m/h4ygPfILe1zwmXqzlU46Rp1cHeTSacha6tvfN3+OcpymFM
R65kQMsjObz85hutmTSKndORo9zcS6iveb3UQo1xPFyWCYu0d/ZjdZGfokv8qnBWNX198hyfhJZh
fNww8TUWsjXfp3aQ5m2vMFB5STjVoWnt0wG4dQJjIPQt92iGp0qHpnfQXRX40GkQj6oamc30cuLu
0G/fjO6KGKfTbkUa6N5ZTqNxaThK0ypJJ2H+T1OAuHRnhGYMoKR5ynTDU5+xAqAkmy8X3/R5LUIR
cPJHrHfZRCD4d7a6zuzdRA4a6xqxtW3SyqFxP8N2HS94x619q3aCVF/Nu2WykNuaOyulncylUUPk
7svixRdeNKvZodjVhMQFuFZGu5SZmpBx3q56/mmGWh9Rxi+FuSYco+c54VGuc+v41A2cS3gbLvX0
nmdOpl8ky8WSoSRDnTCkzsyqPoYi0AcKuGyOe4lnwdb+3XzTUzIEgzAZaIL1SdSo4ay5xsfbJsjz
Gi+q7uwaavdSOKmXlAdcLFrxYnkHbbgQxEUe3fNS93Mi/RQ2p6SPr5mCp/V50sbI5iBWiVxEjFXe
2Rsfmntn4io9VELhSqB+5bPQiGzE/i5sEmlZ3iPXxw+2naMtILwZ6p91OI6NtI8sL0vuoU0/5kI1
3woBgBQF/dS6EGIP6Mcn/iN4VvYmMPBzzuRpQsQudazc7xZT2LgYT7oJKndPvVdpyiwGGPv3a/AQ
7L5UnVaAM7Hp496rprgd5G4M7z0GdqabZgAPJp+EcrtR/GMhK8SNg+OpJZ7EpiZbXmgNnUcVLLZS
2ZDvbc9ZCMT7BbaOHChoWEC/479ZmaQNVLFwFOijQFEQei8X+r0oArhd1yi5ON9p4pFqEYG8yNCZ
zQ7y/0RQmLQRitDY5uKg7SUqYaKbgXfJmvVQYjbEQlmW74lGu0RGP7eWYMysEfsg8G0ILCxZlkch
h1aqHLXFtf4DbB0LX7ixvrh9sHvif6NaixchoBtQOF2LuEANXIMKfRh9V9U/oBl/4Ll1OpRnt3Uw
qXZnXt43QJj2dndg0+z1dRQjSw6H0F83Sx3P6N/HS3d8eiKs49wNLmZNCBmUuprCVUPlRXwNdBDW
Cay+TNmzC7HFezE3YjdP3BDszXsQysvQrmvMJmLdXOcia5jV33PXU0eQ6uHfi+C3GgQgNtSxckbt
ot+mmFBJAvNtk2yFoJTsVUGxL3UBsioSKgq5ZeBPixUwNs7G9FgloIeawpe6zTlH6+Oleda/XIRN
FLKb5Gbv1JGirjHvN26PIoXzyEg2ovZOMs0nhn2W6JJfSJUW8d1ITIYOAyy+X71mUXTYduCxHIJJ
CQpiqisZFdK1vYWqoY5qNKlJeBSO5oCWFKG1rRbj9s1ri2MDRU8lNrQtalxSQZVF5a7f3EucGytp
qeiT3SnlYFcub8YlNQv5HHvxcnk+zhOjbnfQK+1dAZ6fZNumIs+S/D03RtV5HC71Oh5QyFxdnHA6
FQRrpwFfcRT8zAaOnHy9j+mloNP5tnFbYoNSF9dbO7+qvaHV/qz1SViy7FriQAZ6QzlxEHlLfbiA
WwzuIqtUNGk0iuJiBKattDMRnWT0iiOFBVyu8b2S9E34O4WvDnC4JctEVHSen6/Zd3n9xMH+OVeD
t/zzuX68yFWzqfzrYMlh/k+pbxRKKQzQ12IX9cVqsxY2SZr3QrTxckmzANRWuJujtq69RExIj/ty
Udma1weKQmnf94JIbpNT8OmEJVFuGpAG3CCwDEh06NtK7dUBECdIu91yrPYFUKdMmcSoIET6q5XO
waKIANpH3qc0SylJXmOT8S4EtAuELu+E9g0nrFka2QGLc+KRjMZ0JeQwbhFbxjrfAYJ3m6kB5B8v
nLVufzOt3wUAuGOZTO1saUFk1k9cNp0Dnqa+Gu/aw/bxajIU7PjVEHPk8eHaKXAlqPTxwuKhKVQF
+r9tuCh6newXgebJhViX7vGlfH9jYOSFmlt+4cnsVMommy/dsmP8rnnp5++3SGAg+ZedRFQR7JNL
PCiQRvuByEl+UgV7sn1YtawVXVcFC2RU3c9HFkgl/lNDYCJANkeMEZYv+FZAGACcEGpB5rZ2vk6m
eCtpjudcuprmtvI0DDC6ZhXFM1ldJixR5lyqYQeycGlxWPYsIQcy39uw83Y5itGNAlQXYiGIW/VW
veCSF0fl4XRp848NWrUWNV3pOXUfIoYnc/g2isO1NR5hDeOJ5376eQYGTmQAbM58rfffJU3UsEkJ
Wv7/fsiq01NT1pb6/ddQax+lalAeTQSfcxD6koEz8eAP13wPLGGqYWedIgHChQzHdLKGUSDEzvaU
SHhuFPX0RH978U4tK1pn21Uocj9yy4nXlTxz3Ya6Z3HA35GJaVgywZnVP65l8HFpSUUV+bNDxcx/
Joj1LiS8neAeJ1Lit25J1tvsiw7KaVGVWtV7lxOZf3Gkrhfr/XfBEmeNTv+H9Cg8WvmP3bnLV+aj
dBHciFoleezUnnrSNhcXiKHWbGYAeq+LHMW/YLQ+MV851PyUFQ44fbdlGvhXz+JOhN4SnNkWrGWe
3cKkK3x0RkT7wwfu0m9TH5ZqUhK3E8S11Xy10i38xa0hG8Jh6Us+MGeRwayGyvS6fDghhemSI3yc
0nZg0O7/Ovf6FIVlrMkQcphHXo0eSWRTs19b70IO/Xfuh52IqC2s4jMn9+2cgiEmgBXGTm72Ufwf
Lk6z78JXXgWup+p4URUL9XrgjTkmZzx4EXF0HpL0hwAODqWI7IA8rE4mM4bj5OZre8gVH7ZzMLcL
7lff7Pwr4PRok12zdtE9ACXpqDnPiQMmW044m8v+eijyQmsEjXygBGGsxFkTrYI2xKkLmV6uDjg8
7v7ALSykA1NwGnXxJuQJG0+J56NMuhLCgyULSdEkBnFiIk3y8nq3qofQsz8WNODSzxaJRI86RZYl
bCL9QWgoh0uSgTCUJT04/WJK3CRa6l50A0ydWPWsMDYT0au/H7614usdAUPM0hRqvi1WkUrunsBH
VkFmSHnHbl+2zmR0HxTJqZEu8Rl3cS2AWrUY3CwTC7o/utVsL+EN514cVICGsKc5A3R9mFfx5cKK
CXqyzVgEXQpIHXWpPndoQN0ljJAP9IR/dOnCRY7ssWCwTyKP8SzYmMKe6Rnv7N7R2C8/LxyAPbML
EN4iOeDuuZq6dT67HD3CF2DOsGcxNuCQE5Qn2zd3rDVAv3i0xds5d6DNezPlUSf3WHCUJfacH/3w
labJz8PTiYQR0bBD7DwuWnqH0wjgMCar+kNBA0JSwzl9+s4LlyAOnMEX8MCE+GVFwJfx/zQqwjTM
yTWIqO9SXGV2kfhbXr85D7qUXFcqURCeUTMdJ+5Tbck5IyURMcQQxtbSIJ3Y3VMLxGKKAfqzCJjc
ydqi4ghA1+2U5gzPBVQRDKhk2NL/dxovKryFy1DG5Ksl8CzLqCxrgHbBEzTklPEu2e3H9LHP+W53
17q/5KNXZ3UyzI91R78NAFB+1fR+KMMgkNivt3lFxj63dGNU0b436WS2iYNzm0lyYNfe3H71Ju1j
mEeyY1TNPL5TK7BuB69GC2tMD3jNpHQ2Kg19NkP137WD4a3fU01bMSeW2H6wEChX2u03nscs7Avy
szBxTBWX21LO483zAMh75FUeNx2iVYX4gHu6o4uvV4TWN1GsREgMTffBEAgGCio8fYi8Stb2YFX5
7xtlp28ChU3ZLWQHWBGomjwYXkGAepjO9zLvivgwHHK8zOTL8AE1yBaJIYqgQZMFTfojQ1zDEUAn
kaiDZr8s0dc6/3KagCv7+VkGtt5pvDl/cwtEpf/S4emoLszn+j1EYjyomzpH76prsY7/Z49Eg4lI
WFjS7Z1zAQ5//VrGLlCVm2QXhlMhg05eqHBfEXRk9o75xDRE+m+tdfR5G8BF91wsO1185eaEd+Ii
vDk/50MafijiG88GtsolI3cPu8xxMKpUV3rsCSjURgJYg6BHLtjDCjGnOOt33Uy75Eo5DLAYvEda
CJpqkvMGP3KNfB9g4Wy7+/I+KuAPwRG1LTZXOlg8Euy2A69/pCdRf1ApBEqmCpfFbFiN6YWYBKMQ
ehnChTOr0rVtM9/QGwRXujTMhxvMyMyPN+YIxOKZr8H/UGNMZxgCkQ4iM0N2zWECPMWThgDaov/l
tv9NzF8HRED0ixVYyXsDawApcKhA1E2/pqj1c8/ScbQGz3M3OLEm5Zo6+I6k7RY6WRbGXnfuJBXt
FQFoeFa6PlMR8aoi/ph8oiyKAUZ4cZXQuUuaK74DbI4/xqGsJOumpZvzUCVh3y4Ir1TIRq9VNN3f
jlmr2ZWyCDjrjF/MLUhfOEoOZK/7eJ8qeBcoqNgSjhk9x6I4ZrzUx3ourvPngDbhPJHnrOAUTGSd
NqKIur9cn7bNysMdqRp+8ic8uBK7jyAzOV7jCpD2SBeGJoLLr8vDtbz5WyNEv30yA67K1pLB20NU
u2XGxeq9wYpC6fvfq0OYCsEeHKIN0h2oEQqufAQWuRFx52B95vKNv2uEN8kH8QtrSEJfGWpf9KzJ
tQg2P3DooeaTgLeR0wAlFg/hvkokeFEl2UgVvw7lPQKGzfF27BExd0fGGtxaXvc9PSuSg0X5cRMj
d6u1aQUc4IQhHiJfZdBR0unAZ849bZooA2Wbtf3Jn1FXEPWyPs7cO2Axl+wpTFHogVUFiYj/9oBU
XahGCVHo3I+bAgdsYXdQOEACWLwQiz/eTAgexQbwhfaDnKeysN+BedgeVESoaWQ6z9rkaqlN5dRV
OVAOaimyc/WfJtuonvukP99rX7gksYyHBfNvAuT9LSin+D177JYAFGA0RqFyc8C3xxxR3hXQr8R/
+zSSFE+SZOW4oNJ1+wtuCPR4ci1OUbJAid2PSnEOtcMepxn+cQTaMN7zy51qr8gCeUET1HDuy0w0
FqDvlZZgC/rqph+T15OzJX+Tq15FxQtuVi6jO7DYF1N84iM9aCuafC2G9nuB9Hq/zWmbvZNoqw69
3678YLdYpBIjqTmHf2tAup1a0ZOEZbiMzGWoSRDzR6nY3SgaBY/bZoSBn1GeZdQ7/RdYceH+SuFW
Zubfzocnd2GUBX6kdNR8GEA29yQ1nGwdNoBVd81Fmx0+Sm/usB2hTQbluxfSlnDiVnSfmMRRYK8g
hM0FYX1fHaePvByrJaxr+FRJV310JhVDNeWJmc/9ia43Wafm3GFxIgRJEpLHzxCntHaiBrTEgkcB
gEyIT+h3N3cWCrSeNHjLU0J67xeooWOwdI7p/S1JfKNYhanPzRorvibRg15CqquYUXeNwY9UAuXp
wweEOB4gdhQLwEwO4DLIajWPCFDIIeh+OqXfs/ZPt0SY96Zr9HzRqcYftvwo00AiC4je3lXmU/qn
/Njq9XiQ5ByMkoGYliYzZUIZGKxxtPDKoqkhoE285UbGaOp/ksPhMFrCIzqTy/LXhyXDPBwmTGLi
Si3qMM0xfFRt6tIYPY6b5YvC3ER/fctnyJEJ+Yz/i5huhxCbaDsz3gEibneE8HLPs+D4recnxZKA
aeJ535ldgytx519DYhOrVWylEtXxbaOJUO4pxXEdd9QF1L6O6oiblFbIQDyST9xe2NQZ+zyAhLEF
o3Oh2Mxwgq/H4B7z0cZZu0kCToqBKbY6DWQoNLNFI/ujYPJMx8xOiRR8eLwpDkdrK5D6DZJsb9LT
cAqPaKM6xcm60II7UbAX56Eab6wHtfpnOiuQ9nxlUhsy/jpJ7COztGaBZ+qBCsZUGxeJgK/85k7+
yibbdoplaWpb9d6tcchNcakpc5spt3FPKfOhCFnMd9XRM6RxvT+Bh2YT7ZrAxgL5E1cB9fBWJjSj
5BRTl8kO12PdQbF5ulMQYWfnsdp9t8arZPZmlydPAx98BSoiqOpck4xvSmCs50enVUdWVzC8eGt1
ZtG46JAxgCbdnIp9lZkzgfwDpS7qV7q33q8sWuTPrLDJtOWUmRq1IXeK0Y88QyhLeQCD1UWRRMPI
jpDVXwqT6VAxJtnTFUDoEt+3cEi+y/8tDelz5pyl35SyXUXcrIni0qlE3Sumh2lLemqjfcaTO6dd
6G9SjxBjOnIDWqsooTHA4FAnMFBXAw39uMVTXa8FAL4Fvqijw63PZQ0UUYeM8lan5UtKKJL0VqzA
QDLqEIHf/ENogtaAk79DpgWOAPbujz0JqxhOhQ6d8QqGjk2dE/JKAeDOMjcmRY6QKLd4a6/1XPRZ
NGPd8l7KR6uKGLakA1nZdJsetE6nRnfmXshEnOiQvfEEvczpqWLYnJ4C2eW5G6BXiOqa2PcqqG49
cZwhT9jIkak6zxsi4RE7RteDdrPJ6OYmziwOwQriDxYryAuZJ6YJM5LQgAwM3hnf5nKmeuqt+NxQ
mVCs84mmsW/XRkRk+L+Q1H7VOR6L+Gw12RbnHEfPoXmvj1Qrp4CW9LhFrQ4zKFhuB6xhX0jCCajX
0W80yyAX2g7GEpn8jdVlvA+9D2WAaCLmk7VqiEo4T1r+QPTg0haJyZ7dJf6DBd0fXH7elV6y48hU
G2g3MC/DPo+8nhs0+oO+/w1LE+TlXNARnzmdhV+467UmU8156946sGpA+PlTlgFEcXeZEJOS0cWc
nGy2jBTsAH05HNWyWpVPfrc0qCBvAxlZxIoqe2QHsWu3gWbRvyoPuB6IbkLFacJke27eyUEja3ZD
8KyeJrjZcoxH1C/EliL8thAVI81K2nb9fzSJpsqAMja1sx3P0NlSyURCeW8UMVfwDujUwH3lgl+z
kLZ7i9iansx+V81BCjn0Pd9jXGstKyWSg1xJmXpy8lYNnDlg81h7XKgvFwT73PpZbY7aYAf9CAq2
MffEvwd5XpPbPGRFX7a6iRISKpGAGYguG7nQ7zAB6mfOXBHOA5AllbjvF8Cmi22uyCxJUxv7lUr8
Em9vhFYHjThVcTbeR3a0ox9llVI669OGAhVJnaHlT9WGvUOYrIJNMg7DQ/tDy3PuTwJ8yZy+zBGO
a5XhFfPizla+2OQYfOdsOCJO0AFzoo7fjn3mq6flYiXNPP89YkCsOPKOrI/FwSR9D5Cn+65d/mrh
vfjPXvItsv4QFU8sR30HmS4XaG3iqZ4zdlGFR61Rk7yC2sOqcPRPvEpkrLejn/t2NFgAXse3KQt8
6ZXPK+X7mpOOtbgXRd1YcuOVKcOt0B6PyaGgoEaT+Z6d0q4fFW4FVr8UQS/KqvEd4tPnEmgO8Ao6
7zP9ggZRovEDdh+YYyy58HOo/EprW1wuWmGQLh7LvgVY3RDBIfgjgNvady4aSf9qIG6vagqXGFDr
q9nqpU65uXxjucHvcBO4dn3t1uPTrPn3bKWztx2abMIaAIlMfslr05LWlTlN0ockwCzvshnwdf+R
OuxmDhMSE87SsC8ROPRa9jss2YM44+yR/ibKS8FRAGI5Qbe2wV+puc2/hL3qkAMhg9zbGGeZ6V7f
OQ1MXa+4kPZ26EIdsW9COZuSZXOs/3yAuT7Iw1/wWn4hHjjUbmNTTWuOtNwSJu8Ev/cT5wTzHwkC
RfdCDw//DLshc3Yywdt/TcACNKVwEWG/O38oDmG3Mf4zcz4QlZxPZphhi2JldURT7qjOukNkrQQw
BgZpwhka0cYT/L3gRX7Un9X8mxZjcDfRG+3ZmknW/yqbUz9vd/UT06SwOAQfWSjwAh1iGH1gfduY
h39fBnrKBQxS8tU2GhH12i06U0LnIWo+guVASpTb+a7clvoDnf/0d42QLrFCuhY06s8W1Nfqci4V
bcodqdRa7tdKZj47GIXs2imbwtdXrch7yKBJ2gkZgKv8tQt1qfTQQZlnwFUxgtQj/Vyq+TBELASU
i6Wg+nrAtywTCPFkZXNapZI77+RqmU4zQf6WsNUef0OYf/RNRO5JW9xumwM1xB2Fde+WJeod2jDw
QBsuAwdWnqq+wiIFEpLo0+qbzJhRV4PDDHEDsZKcZGEBlsQnLql87d3/CNF530nBCm/oq8gJy67u
s9GqvaKCLaXx/e3hDRpX7g3ocX8+om3tY0ZEuuf1pfI/RjMYwIEbCsOh8OeiGcNE4I0EPTRhcgy3
iKIVduP/vxnQ/t8CFVje6rAYMpHpinyUQyUHAYvUh9c/hZlY81k/P/LKssOKKY4f2ZEMg0os725C
Lov5zFuPO0t4IpCAiyh/WDFNTYfZpxfjLVVinuC0uUJCIagE7h4aAC8Gyuj1d+qzG0U/Wc89VIiy
a7UNR67s/SWvsZAxy3uXzMiFjxjZolMw3GSvpGXbMrR3Bv4AwA+ZyrVbbPumy08pZec16MoaayOg
wCTmZqSzWXuE7j7nui/5pAkOXYBQbK5qeXRyi/MVg3knGAqe0+UFlaCOx6xLjirLuWymD9w4ZKdH
tb6Fi2n7oZoV1qUmsSl7epxdDofeXfFhb28Q7eWdddRwA2Y2ojpm9VGcRXw/yrG2ITwcF+PfvQa1
o7v10ZQIPeSx7gT3yZ835z16eIWLuU2HAkppcqQkhyZxPEyUwZXqwOeUNns3uuDp0OkQ7kya3skV
zGX4OE6KWgySpNUW6kSy3AZ/OGdfig23G1RTShmlLJWztTGvwDCdJvfHV/wXJz24JN+rmAk++ah8
87ijv+ZKKWFWXLw6JAxvt2gA2afORHdSQKyWMkt7AuMCoQ3hz3sSr5VVX0jnCyOoEKJylBRWSpHM
k8znDJCWgVYVNfAZi5v1F3c2sgqWM633rfQ0+sW08sjK0/Tw+kHP8k/wtE5si/qThjhIO8eqxUco
rlw/qSRZa0jCWXtcGUpfDLc9hbGlHvEUdBQ2vUSCDwQdaUPiSreOMtVteTjO8QEW0brdMqPvQEf6
KXT4hCC4eGyhJcNliTyyJenZyx4wVcSRmRk8q3FmTF0geYLjsRJVOCDRUCR1wWJpBIn+nm9xxCot
1fsvAm4WDzh4usMUTofh5VeRk4C0c9PGQ8Lwhq/T6pYsm8cLPhl5MhO5Cv+8MC+AxMRhCYE1s+E+
huxbHMlMt0bq1KtU3n2X+i8i9q1IMblkibfKACpFQzsyDURf0XAWn39fRmGbci7bKjWK/FCevjwR
NpwSlM66FS8CaXyFOGDjifJ4H8MOhNneAUR1tcXzouY7LOO414ME2MB12gaxBtzFH9SxjN0LALZw
GLudPUJJcBq3GvFhwToaLi01Wg1GAziZSzYbUeGze9KeID+1Qov4oeLGmUkb4PH3R4uSbdy7hRiP
yMYlSlaJZi4vYqWo/NRjhVThQiXHVbkfBBtHJmrJElqC77P+il/r/kjKgNHK+NIdp7SnZzI5roVl
TsAE0hqu+LerU9z5oH14+b9Rzd/Jdv6GDyV6T3agDSevfYDA7FSYfRffCjrOQHLZOYkTcZvFH8tp
DyD8JsVe1/avnavLPg3Ve/gIgKXGQzGEDFpKw6I7yuEfPT/TNI0VMZWn1dfAPhMrb0EaHgGkcKhI
sALL60/8ZEFxGKYt5llW8MeyqP8hiwQq7ZzdQ2Tmbny0yFpupYR6DncJoV+/BYohkrzEp3zTM41N
FQSaMPSNAee9MTraGYPBgH9TzY425S3UmX443wR1i/xofJ7dMvJjvLm9tLyktTEllujv2ajf6LAP
KDKselttQ8gklK2UHEOp6MLBqhfdy4jTXekPMUtMU8JNGrdIRzFllojligOnt8rsMsFcq3Khv/+T
NthmFLbcfKpMnlgwKA/rhWnuTY1JDXRufPpuH6DHRKn3GlzShwIooiNqrcMh7h4db0mRYck/J0a5
3HcuzQVtiDmAkQznN2WFm/AJLNA7xbwz82KfVzrDFs77Z0HtSTvJQn91RetqrxLMgvz2c0jepq4I
X/T2QErsQXLiVhTCtAyF8d9HugOvVQkTk5Fh63DZwA7LCH/IQasdDAUAtNz3jyDE3zpuXLwUrlr7
iXZJBS1voQwTrjCVMXJqk6bT0SecHTSKtCY03G8v0hniLzMFpQBNLtIY+4OiLQ+JpVYyWEwWkb1I
dqV/1Kfzma+d4O4VLo+MUrlzYgHnec79kJIKukf19my5LwfHaCLGvsrzqyJfO31DyUqejMYwHyZY
feHWXLAMQrNDGPa44VizFajYJsEv5xpS7gzYEK7k2E9iCdGCmOqL9Oy0EdbyB3ZQSGaRn+7CYNcz
g9/zyFACP2RH+CJ2WjTDsY6fEqoJD3T75uMbJ/hy12MLjdMwLdsOFHyw5azU1bvQQKa6NqItNSEn
d+kNmvKm8CbOM8A4JsTwggGreTUzh3U8nCjtMt1tc70mStvc3X258+OEbncMhhlTuKciWGQegvIK
CnZiaxE1zMWUts4DdVT25a20BrsC6u8UsNkgzzVSJjauupAMntR6G+HBlhRnIZf0dmP2UgpKSLcR
YpZG/ian+ztyHdoORwG29DbdVRh0kY6Zn/chC6ySqQ0n41UzKWdK9QKROxIASn5/FKvcGYJMQJ2o
L4cBvlKEg81na2oz6Bsdh6AFJWHsIZnVs7F/BqVjYUN9L0qATT1AGCWY8pVTsvoRUD1nIKYPzLpY
XkW71axoHPasC0u4/c2qNNKOVk0QHNzaXvLxi9DfSko+hA0gWsxDliG/MTcCG9G8q2EjMCJ5W+2J
bDLLTHzTWaGAaUTmAJa9uwTweSvuipXvErKgwpuQwF/BtjlMsdsTYpPWkDe06KZIdJKhdAQm1AvG
Q119JMeFGcUWHgFhw15hbUZfHCSYhWhypaJ0yyVS7gxxXe+zDYhkWA5zs9eiA4Miz0fvOPPpUkKz
jmlPIUquOrJNM8ugRFs1R6Znxiiu5plYZQijJX84K3pEkI6l+Kbsq6GS5K6XzMZHAPGInutb6cq8
GeSBBbaQ21Ku4cMwvGNlNSe+6T15r0lt5FrRugdHg3ev3AcMEEketNZYhHOfvFUveDx+HOsovwLw
dH/S/8eilWIQDe5EulrihYdC+BW/9fsNvDRAfohoTORVT4Tg9HOxSryqt3GcgBQSYfIBA72LOFpa
fpg0PyykgOCzBba13yOXKpQCQ+LznxwB8ViQyEuz7taALZgllVl7SqVXof93Mp8QpzXD/t7j+3hj
nACfZBBA/aKJcIJG5hGQaI5q5LbZbR515lJ1vu+ODYOs5VWMsb1V8pn26sYo0Lr6wm8QUoHOLOPM
A4qqicp5sMHYi5d0s7Q7suWkzXxxDgB/vf91cadLsFGXDc0g0anRaeOo3tAhPsl/Fk6X1ZYEXdXk
+TleCodPOZWdEFy7t9v0ywpz/4Gy8ydEO2XbOwkhE4xa3G4WV1hcyLdegNOWikoWweaj54RNai0C
oZlY7ok7qJgGJely2eZyMX++V20OJ686QHpJZ/IWA5TyKmOLGKH2brFk2nGeDPIiEkfC6kauF1/l
psKEI53kilz6tQ7aWfvmjRaexZPwNXvXH8/rjtt4BOtLbH85+YH5mNYWYc7gcqVvwUM6WkXdtrFr
y0cI3Bl5IsXiRtV2cJhZCwl2cEKRGkiR51USq1RmJIRpKHJzhqs3DiNfKPdBdE37R7bcERpUvzab
1/jHUiit6nZ8uxlOMFL+pQfyrQh4UkV6l/9upFqpnKGEY9dsbD+kZZhKHwggHIc40y0AYqJHEu1G
QadfHg15sdcyiXBjtuDlJGZki96C9iFDqOYTSbt1aqJ97kMt0Dp7PwNkJF2pq45gE7ASwEoJD8Z2
g+j8RManSqmA93zltE0cp92OAWQJKWczJ0rkMa9PmyHdTJB78p7a026dJX0h5eix+tcE2x0hDTqq
sN3NrMXD5+pHe2Pbi/dHEqyY7jmdC0cqYLnY8XkzEBu4afQ/1GQSjtf0NZGIONcgB98MFdG3Howu
i0m6O0+JaIV1yRJXwh/ZbjpBQZ5mX/X8IjHu+OM29R3Kc4UN73gKbEsD4M7SN5mm/wuRV6Tg5ggO
pyxQwOjPDkziOHhhYGIc975Hij84rLmHq+cQIKkA7hh/yTC0K78x941iqxS8KuiR3KTsLm0RQxp1
4pn8XLCJZiohpw8w0kd5LukglRGQ8eAawrv3F2OAVjDC/zRgw8Wbr7UnscIdWXLKf4xoxvRP62YF
jBWVMyQbq/RqW3Jh10CUnWDO9ERt0uqemh7r7r6GfRnqt5tjJD06tV0/NKflHvwWG34Awu8bkhi2
j/TDXqLIK42QCpe2lc+j2SfdJyzrbI2Hc1C5/0bPwsHRobaBPzwINvGaEivQhnAzC0E1/I2PNNTX
MeCeIm34AP83OCD0SKUhyKFX+zykVIHPDRwbfNDVLBnSyHf1ptylcMB+lybuAzYqzuj/GWhW+m3F
yxAwDw7XSIELyV8gc+6crkPGu1vGPzmPbfcMvTc4VpSEDxR6rdYz1XKdoUH/3OgI676Px1uNIxUA
REo5/mXsYesvvHqyTwTu6rLKdG4bAWQwDnloWN3oV5TK12Y987uXxjk3tCrKd+6ZBvaE/ZYKH+Cc
N1PwSaAH44IIaZMWsQ55xVOFm8yf/LbN1lTnOKnehqXyU4Kp5pX80YhkWVroFyI05GoryVmRKXJX
FBcqB9exOfTqdt6eyMrsDNIq8QAU4bwBGJSH9+3GK/lcNUR6Hh1+SptCnfJwUfyEer0TVuwlxqHc
vL4b34uyTixhOmOWgZ9vFZa4Q/DWGTgm5kfsRyjU0N23igySWp6rNHTiBXAWPwtH2f1H3cU9Ybr9
wqiJ5PTozLUXZQfwUBvZcASUrkEjsvSgsZalaTSgo2UjZ9NI3SfIk/yV0M0AQmgR2rl0FGTSHn5N
1VK0XKaxEIsYQGbJJ2a2jmwXoCXHN1/miGl5jQ0HrYyCDnD+NVGhc2CDge0hFUo8Otja6l4UP7TW
R0gtXMPUOKU2HwnTSrUyX2jELlPNAoaAsg/f0qWCHFL4vgsNh9GyqEoUQ1zruf9VTmyLccLhgJaR
5gb3w7YduourkACUP5yZXOaXXZXL8y6+00IOoJb9lZz92Wn3k8b13B2vT/Enteie145Hao92LM0e
i6guWgkLJf4NbqAENIVaNIZORuAveC9Dxzapotdc98czebyau77VN64+CCDWGQwX1ZZdj1DPZc4R
KnYq5DZS3v3wiDMnaH0vP5D06hY0XPW/W8NynQl02ckfYJzOQ0zLWulH8o2vbZ9zHUNOaV5EKDGh
9EjUWK/PLInNhNLzW70PVEyfJK197mnouGCXHNXvaT5xoi/2nnZwkaBzQFtVF5zGPaBIG4tcW/y3
VIIceLdbR5ZdwTvEQV/8dBvfS+huNrZmrbZYAXaR45xmbmgYs50d2MGhtM1y0Wt16SJRTFN9pY0O
SY3QgmB827nol+78Hi9GrNrm5mmfQL/KmauSq7kR81oZge+WypltKfKbQlQDX8o04oGS+6+N4UPW
+VsiVe3GbtTbP/EnXQrv6oOU5CvYfEd+OiosuisoncfwUEgnyZ1baHrBeir9pgvuIvweH5x+UojG
TFemBgxNX+RgApP0efn3fCa/YgXn56Fm12+sA7PLow0ew7l+TrJfU0bP6+NTI1Kux+1p5vPOmJtd
1eAhG03F2dJ5ErTEjQwmyiI/Vqi/7pxkeHT9uIgtigwaXlGnvpLtauW1RVwX+OKGQ5ZdWEQ0Qjiw
n55RiQVkE1oOjI9NM1KJnyw1AItkPZfeZMa47ujJxhAoaG5tqOovTRg+VYVWX66ARrIotjNW4HBr
SLgh4UQeKMsh8v4LMVnfqztOLmZVU5p4h/K3hpwEi6g7WjoOJg73XYa2DC0ttdHuxlEqPU9x4mgu
o9/p9bRDBUPQzo1fqZ3JFJryD+mq6+7+0bpEmp/Ov7G9aNTmL2qqlUwAEEPEY8QhoHdLjti2WaoZ
SIBZ1R/sA2y4UeAjigXhN0SOlfiBh2eK54PgHFlSbolS5g+PT6ezYcs49m1MzaxuBlaRp63cxExa
+De/IMtXPQzYSgCiLxXBbsgwywsTb8Dpe+yb0Wgl6lczoIc3W6+F8jFKE/Pj/5XrmkPRJ6bFk9hY
ED+PfIFNPweCwa+KFtAPq2xkvFt8b+h03xS9ePveTUZPaGBZAyvRlkOFZWRjZRQmWM2rRqV/M1Kq
O1jzBjbB6++vMnIwX/I+K3deHeceunbLkTi8dsJOiNpqJL1hE0wa3s38FIpgNTE+x7tz5Ta/UARu
o25ZwNr56Blbyr8OCG1NgAJT+fXM+0jqh4zIAX+gBVWHm+r3bElykHs9xqK6q6kUtImrWpSfuGaX
IalFDDECPhDOyVYEG31dTsaenfwFG2E0qlRWu/UIHMQvxC/gQuFErUImhcmeCbTDObCteYeEoTtu
be4J0vrAFLhaWxgacgNTvcs3lbVp8FePihXiD5QAC8fmoRF5/dwPPvp9Y4Y3MHWMrnnvZrRUIVbi
onss7UUePasQWir6UWGR2QC63+KkN8McfX75DhDAgAAalkKcRJ8Ty68oKezpI1zvodLKaw9xYRH0
tBOvU3WE/4fMcgzGaL9mBTgXRDLoxnl0odvk4ia1F1GItJwzU1xd+Pqej0kh+W8f/8h05pLXBuqo
VFwz42RW5THDj4cn2NFDHQYQPm5LmVp/NhdNRqLmQkp+SM+7AIwTTxFOo8k+HYyobyOUeOiVd5pA
Q7RAtZOcDd4+g/wS9X7TY2fJd8vW178bJ9PXIPMcUUpJcjpYY5a4axwvUU4cAvzARrWKKRyrMEyx
wLRPYnVNqay1XBMDAXGCIwsC0nc1LgVX4zQD72k6WPElvCpbpTVzIt0Z3DE2ntN+4nP415d0XoV4
kZvoh+AmqgVjv0w2wkUNRGKq3bI8XPHjmwDZQj3UJLUFC9y75iqNsOpyoIxWKQAkr8uK1MzR3Iz6
E5hc8B8b6XxR2YyPa7zGxspUrGw5t8Qd5FH7IOw7ErnSwoXxlyiaNoAbOLSOcOfk64FzED1eHcsd
G0QumrbPUEXsdRkb7iVYLvnCqEgrQTFmn2BJnL+sn4PIhE2/ZVcZLa0N9a+wApM1lo12zL1vtb+9
6QpkjaNa6Wr1JgE50nRpv50TdJbCVALRZIPVPLmFiPbcpsnB40JpG+MFBkovZ2/Bly4nyZ6xHRN3
zCVFa4pzEQ6YyIA4dVTpC9hiBCToUUVU74xWgXQ3J8frlk37PqF6cLv37ihcqcJpx4PJ/5fv5fJk
uE7SWAlEqO898s+5tKE/pMkMeCkq5hR5/9d1rDKZNt+YJ+AWe+4LUEnRM8kr2KmOd+wZhL0yisLO
vcajxoZStzRLco5WPfqMrvSLq/zbREhjFsUM790P8J6JyGEMcMdcNak5zOmG8BBObi+OzCjYHrAX
j+Vx6TtlCqvvKOOZ/60b4HedchVxoKXhhy0DWFLBv014dHkc//Lg75bQSUYhhXF3WURVLdcMSvi1
ENFnRiB7UbKGI0h0nWUG+ymCGxNRfU4dbKBicOoUqv59U6PSFu34NQdRmeCmhpwfbauvvjvL84cZ
N6s9BRbSs3auYyoUQLMWlvMDItr+GzT+LN4X/NISC/hKO58x/8ESgP27Exri08DPxjj4Xiyx9BGC
nWMKK7DgyH66aI2+WUPvCJzh3Vc9+Oa4qZiuSyAY2UZYiHzhfy42+W1D4BKjXdAlbHR8Bd3gkAYl
LBiAvZhsFAdjMcp6rxh3BFwurXjpR/QaAC4zxewydN3h2oE1uwAEHTV6FKETL4788mMvd1zdBRsB
aO/qC2d2jY0I6ILIODYk387HdXy/MY1QZCj/bbzlct1JCgtIsyFpFh8N97K5FBmP2wsgdndeMca9
YyMmp3XIUwHWJM6yQvztByvTDXTy+KAiqP+p1WG8iUVh7owFAT71tAqt8w/prQ2IQociZWZAIMTW
Ku3gH+h92EG07JItLiQiETcRAPCySeXUZxdhROz5aljiEgH0APh+BX3YkKO76MKE8TTbd+k+kzOr
jPaJGfbhXOFBGKiLAPRalvZA5NlfdtIjgXoYix8MV3xBPAtRKdizfd08hPWyS+sGKW2McPVCbu4q
I3BqKmYl/QkNguSaMwfVKbUFbt2V4CtGga2EBwXIGljyr+FHUi7li7kAMbUGqG6yMjlhwSejDxFF
llMqwc9sRTWFOmeiZA0myTXbwqeHl5ieLgSs6MlESg2yyUT4rP+8deO9Ytj+fff2ZFExDvGePjZ8
6NrLbquX3hUtvaE5t3Q5ZYfPF9zWSotRGYt6MwWhudClhNU12bplVhPvBBy2Ct2urErCiNOgoX47
PSB7SjTwtsEZOdUEQ0/1Y0XuANksxiVMzPWiZ9XGf9qJQUvjJrE4ur4qLCx1GKZl3x1QXek4AYxz
Yi801rUlkVzF2iBdJyFkEJPSgvYpMiQxSCVaJSYxGFONnIQY1aYk0Z7gzhJhRuM70iWy9mAyC4bw
iZa6MoKD2LToZpZ4bmLNAi4OvfBBk/pAOJhYm+FNddR6bCkAL6YBoRi4TA+HtevwbSZGisAgaIhI
Ui+yjCrKF/8zWKn44NhUpODFZeLplxldPKHUql2LyLhBBfEfYfLJJS3GRnLiw4koy6f781oTiT+G
oqJqlX9Na8+/gnc1GDKga+ZiKXaQTPTzBHhEvkRqALyHPurTYaYJGgtyhXaaSVCI0V8LgTtYHmSY
aC1LIljTzKcOsaGkhtVyuy+6OF7entWQzsdXYiQdzZ1+GeeZKzHQcxhif+xCvycZILHq/c9Wzxmf
VST8Nx0GcvMPNxNMe35O1SlEnQcfWVjGf0/r7oElo0oBE9TNPvFJsRST1coR2r+slmwLT98OomK+
nSsoeKBqt5sYYJzgVAMKLJW1heNUEr0AeAh1spQ/RrahA/qEfmsd0jNmlI2flsJht2vSXsWdkfDj
JCIWUYSpYPCQhBVraz7nbZsBOkOGauIiSv2OakoOj5UGmynUtBep/atYmtcyV5nO1cFt2VYbfh+7
OD3GRd1AJRHyTssyXZTKNFLZUS18COwZseiABICTY/CCAfhnUhwVXiXlxjlpQV8iLGsJpnB9hJQF
qTUU//QAWShiNsI2o6BWxfFOzlCCCeHnmgMI3b+0dYk6KYrnh9DZAvBj9E6HxyEpgrAfNkMni0K8
02q0WoE87jPkrfvuLVHBtf2wyXlzeMq31KR6Xx/8JEuQlJ/sTycbU52GfN93zIH952i8/3TFYVdV
b32d58lQZZi1gIDu3Gdl5GwcxlnewDNOWsMrmDKTc9DegiUDnQrGTSXKmePsVfRZudb1jFvEuVkq
4unfRpvvoHFlQx4laOUmWhkmNym8siM6jY5S8PR91+TxTCpa7K5CXSYxBGaMDuf0NlP/siqb6aKC
LzZ851DDKA+qEI5Ahmqrwe8tlWzo+PhFM0DfR3/xM2LVINx3ScnU3SmBdnh0IJsM2+eGN3/v23NW
dfsDQKl8GgZMzyZwu50mWbPtXHiUoYN+djk0cQ46lQVCHC2IFun51PVB1wf6dDk72WaOzfXePyLT
uI33QhkrSu8i1BkRb3Ri2hr6VzYbB9yYPW/N+0jmbOG3eCD9BuZ8ePs3iM8YUz3WswUMQ5AkklUg
HVn1sG4C+xUEWjNoxBD74LVXXvFmMkMYKx9wWAHOMRZBoAhBjZtAqddXdp8nvaFpHd/yhxnP/hEC
ejw0SMeHU/UmMraUW+iJsjRvAIEYp/Mrb1JgE6p/uXwI/9WMJisk6FEiXJEUfF3Ri8sDGECjK4cv
3SQY4Y4pgsrTWTqlXwgtgVvQNNBcGds+80EaArbGNsjntbY0/Ag7VRSOzKcE22tG0QI2aQGxN4io
MeUPqu7LPeuXlIqO5w6a8+YGL1tMmkyhM9l37mzecNi/3lwpgADfNIv/zm0nbrQ977zBR/y63y3f
6rheijmyUH/EPpH1vRaCCTlS49hsqUPQxjN5sdN5RlaBn4QQeIzrcVPIPcXc/1sYHNPVNzYUDe0V
8QTTjMgShLQ6wHEhefPx4Hk4xCURGVtdrW7UNMLHaRdwB9XslGYW2AootTLoJCbfJCbJ+v3t2N+1
wibKvME2w7RndsjnVxkHqOfuCEYkkuFoacInZMYlkUlnAJicUuZJ6/KSSHiy0FotUmq8nMtXux5z
mIqVDssJ5T0iKahDptL8ImXeO9qooUIc7LcTIWJzaS9MOYP5wp7jkqwMBKuWJovvrOzhNcOdKzjT
o8LCZX5DNDJGFVXMNr2MtyINFYEXBRsojtycy2aekDCNixMbFX+aMapEPARXJ5DIRVqyIYsXs1PQ
DfJN9LOoDDMs5qGTk/q7zC477Pf2UQ/974smrEdZdWa4uMecXDF/4ynfPEZSmyTZtNcdglrXHaWQ
zZ99IUm+y5JjCdfzGmGLSh6spvUV+4dIitymKWojhtffBRk920dKT9QxYww/BPzXe9mrDVWA7W6y
RnPCMuXVcdfNpIlaDjpfN4U/xLqCPY4iBS4+rDBTLASFMEWns8GeSWPG1JSYsJPm0WiDH4ALI/E/
JJjl2yiStNNFhSx1GwMdo8PDoRdDZEspkFRLqPCr4Wi7s6ZJPXdTcRg5sGwoPLq4RD89L9DtSDTB
IgzoQVTDNn6dTXuIBnMoAPZzULz+vZTV0XuuDGAjwof2jNgG/QOOTqMP07vb/PKQXPNgyzTCj8xj
QswlqAeWxR8UKd9NId0ESX3VYYVb2ZHBdFRGOuqdSRaclPYlMQXtqlHrZZkCs3NjKuG+sLN0yUcH
ukYGeYB9XQkvSbtzJEjXgc0Y7Q3XNDiv+jEGRpj/SYoWaqk6UqDQnCY7bFsU6IgySp+/TsFSoPdF
Xu8X4duZpVM5/dtSuKg7KhVZVPQsNF3fhoL2YIWTEziToR+wL35pmOlXdFPqYiQ3BR7l38zgFID9
TOPJP5Z7AFct3QF6ctiTvdlJbp3CNXLOmUc8a7sgEYjxVNlpJ9/M112hKKl2gdiUvQbuLLWT7aNp
H7vNw+OVzlADXWTo2/DgQf/1qqjdD0RnNeiZ1ylcI14oUsAG371+EjqMVxj4O6Bm9Xnj9guXnOIL
lpqQ41CDPvdmwrBLgZxd5mPTtKZx5lc+L4uXz9FGdHA4TMbrwSKSpKuivybRY8wz2+T4Pfd7DR9G
ff+KqzLk1YunCOifXb21SCV8yalnUQoxb9een9ywSQhNHyt40AlinkZ3BfDyLawz3B0sykQXTIMr
L0h5tIaWdxMda6H3rH9P2jqZHXuvrjZqAs26R07xouc1mcVwFT7Aj6rnM6yeZ6nqGbq5M+YL889H
6ffgEYZRWbyTN1nfGL0M5IyyquWNcqCoc8ViYyoXJhuENZefSpsab/5Uv2BLGGWgvRAuBGX6LyJs
RJWtDRbkF8DLAZGnLZlvKFLHKJZfKasgWOqzcgPu/P7wQGthwt5S5LFezpfXq0tk7qRd1OlNEy7e
jDnv04zSpF8FpYBvxbXQxkZpejDqR96+Gw1XqsH0xZzCLVM0bXGoM/6qIDnWtTLkH/0w0zvXm8Er
vYSxwVWqJQr7mavDxvM5YzUuQXgA/0GtYLByOuJnid4PTk8JVXLEMoBwqFbxv6mgCfX0CBo+eDlu
UqZ+6dobJsRxovLt0vnOEQT4tgA7a80IkfqIXeitTWhgb712PtHSqZ3w2Gd3lieDM2cu1mHB0T8w
PB6tD+9VPdd5SF24qpbCJdiAqs8jWg1sd2E+uCgobGUeuxh3iErnzNQStb5sesLCB3Q+Ic/m2Jlr
h9TbtmGHxkQEls5chNKbwuwiW2Wa4zrM0VYUjNm4h9kXPUIeHH/wmOV9XUjE0PofEzoMDdvblmfR
bvmJy6CGjglLx9z+OE0AWnpyJf2aGHbGHKif+CKOOyqbSz1seJInnAu5lTaKaJkmLvIObV9t4xK6
YlYfffzP1wJalJn10SgpvE49rKLivr7yZcfyzJIGqZUD7V1mAj42bpuCx/upNBWq4IKDl4ZlZeUl
rLHU0LMO4Z0O12d/ejOGO91kakbXD1QlyB3HoSk20/5lUGiLFDzZjkcz6rgvJD/LDrHyKy9xz7xn
5Mo4Ao6rBk35r9QXwVqEa9K/gI084apF7csSSgg1VLXZt4Hd34GDUHN4OQdy903EMqoFT2Pl6JrC
6Xjmcb6twzrOxgCTkM64J6/ptH+Sxt/bn1UeeFCEykbgX+3UIxn0qcgoOBIDzoJbLCSOcYdPL/4D
W1ti7fv4P2ilpRDB1Jtd534IEyp2/kH/2/7LXGby0Lrk1xi5YWkHVv7+d2fx9kF7X6lZ7Z3RC+2/
0V2t++/t+/JyRd/N13auOXnPOcqbw6D+rWe9/RRnt+pRWAhr+KnN48uMdHNyELdZ/YIWJJ/ai81l
dNxNaJ8ah6gUDcpDG3ZuutnPzj2AnkI/OAigRzN/ltJXP7sNYgvsxPAxXZYGM/zd7KAtD3Xephpq
DLieTROMEQrMfF7wbW//d9HQRnKk2ZjaUf8RdFs2N2iX58ZOMi/BrOJq9E5XlUzdEUFqLuQ5lDYD
fOHl1NwuGXA2qnIsN5D6P1tq6Xj2t8W7vNwQz+FI8yyIN1JxvbqYfvjRU+0uYKAk+ZTR/pm5k33A
jmBj6zMjZ7WBsVXu2xHGhLfqzNZzf56uzKYPRiPT+Pql/AJz5g8t3+c9uWQbXi7tuONK8kBEohvV
Prj1c/qNfgq4CO7OEAKCkJPeS17Aq8U+JABbv4nV9ByRiNMAo451w2zmTInDxjZufqe7QkccDgok
Rvrd+KlpnSF4K+UlD0lKOn9IbvHt1YBehby23lo2hckkV+zYgCyarjmZSZOsVqo1abZB9P6pLmuR
0wxI179/s2w3+NUv4qYIy9rHIRglNjl0IEpqZFWA/REkIVRKPRhkKJUZPiB1plWZEK1gXiQiVjof
Ww8staGMwF4JF90h0csby55HQDzIp4mMJDAZFp8jgXNFovVINkQVZ/W4kjT6evLG66YLVRIpMrd6
Dt1G1OBdAwM4b1e8ZbUIlwa6RLIvN9qz+5sdcsPUtovbZi47mZARhJ2zw0HTInpxgw1sfVI9xGtE
qW1iNOK9Tavq/2l2iyyNxgHtKJJtSbWlbzqDR0UZhhDhLe9BU0giauGh0WycXWg86Xcexf4Dukvo
9TfAj1p8zoHorWu19rMe+ovk/swOd1Yom7//PYktnTB8WrdKPzbyDg2pYq+yVlQbh0UEpPL26DI7
bCuadO6wAawTt9G97Xuk9xneVskUPhZYAVqS5fKHtGnlaSyvlVTwupLkwmAsFVkEDNpfY5sDC2f/
Pz0+/n2UuH9uiI1chhhyCw5Jp39e+dGKf1BUUZeTUIYo6Tpv84Yf/8zS7td/Wfova+MvqFRNpqFp
TbDlTk84QQuSnCEstVyrJytwNTG9yI39gOriWZefxrEVYTtsBCth2rEjqoO2axsf+JHdfjsWXacN
AJvtVrZJlBQwTpe41kkeVf3fVtAz7VQP5TjU1bQNxBNQOPN7daMKGM+e0sGZq88ldlYwM3ruud/7
j7Zyz40bBCq7iD4OMyghUFmR86c+XEC8GnCFByJgGMeH7ahiYydVoEPeSguPHy3U1JOoK7wmmKrd
EVl07Ilhisv4T1UhuEZkULAW6FtI9bPOXUQUKGpSxAe3t9PhCFq+8kh8wd1PjAPzIaGlL1tB8pxr
8mGlYDV31pup00Tj51g4rmJsRqVWO7uwZF8FTlfJrsU+8ZqLCF/AOrhAdS2BBrS4EAszAYv+3D24
DodDtZd2FZdgTfMSk7mszpievxIjW8csZQcDWCBhnKFqkEPRwlFQUm31RdA1TI4EVkL/Z/hk/YhK
8aL6dZTM+i/WN4lEimWv+7iCQorSbpPQhaxM6YACvHWDpE1t24tFE+H8ajLso0XT15BkCrzNT8EP
UWqYqRmDBj8GFHRIQeTeTv1zBto6+Q6QKu/AiIUZefnC+oVf5NMvOQqy9c8W8nVaZnpQe6sJULk4
9O5VEmZLwoII9VJJ/EhBlaF/mFwcmALnI1E0WoGmbEs7ouDCGjxM5kszNt4/R+IwxIPEKyLZ4av3
RYnDsDdz+DsePYb28Zh05LqQ96l5abIXMJC8fTGo+jmEn3cB4kIuDfnncygk8Kt0Q4fTzjN36QBY
ZBwXYMfPEFYeNpAvqrgGz5v7I9KP1S+po0ELR5VWOhij2h/mD4f3UMBazJJpYY6nUZZQarx9jQ80
thwTsXZ5sDzjUVmbkBXgVreEplQea8IEgpFrzMniNlElcGZU6PG0V0Ge4LvB96egedrY7+rMQmBc
qlUdgsTyboDeJyz4LFrMT0I/J2WSeST5fzsTQbKgG3RwHuez9LaqXpww4etdAHY8nah58Jefyt8K
1oLvQdbYdDCCMVRMn10Up4NsqDA9tOvyCLgeNpIip34lgix5FjmhVuVRy/kHvYiK1fLH6y2OCvDG
ba0y9DlVxS74OTdB4oEcPbdZoj/l0eAtPURLMx0dhdXPL5PhtHLL8zEdRY8npOZuliux8g+TiWkZ
vGT+rKX/trmKjDSY1HbowEVDO1rg6wQyxUWGFwXJHfCb0K5WkWmNN9gIpUJgmLYUwm68MSC7odXr
91H7tBOyMI4RgJFhg36c1oyIucVoEgx9XmNZZPlpSzLP6VsZdqSeESQNuSeMhraWB1YnhHQfRVyi
fyZfuxcZad0bvpQRgBzqgD11VgEtM+gk57r4mlTf/r7LJIuMjRjTtiZ9GfA2Cs7/hlkpVixSqjLT
yt1duDNtolTJHL4qvccRCSpoXKgC6FWZcOUYnDqrzNav+ZrjGvDSdxpSEAUDPNnnQ8dJ+KLs9306
Bbrkffl+h9igoTcRBBPlehxJuWU84NjkYYD1eokwx/HtozHPiATlfdY3ae4tvpWw/Hz3awxfjrY7
+YO6AlTpHbSQZbZCm+AoenulcTQ3PMKnOEcHfKiSm0lJrmRQLfw3ERBnzSYwrTJNQ/lpvKmyJphA
k1/EsoddnrB6nS9lTeVT+K0n8S1TlxJiytfk1Us+fxYuSn+H/juLxDMvXJ6wNihvklLsobL5xMzu
CYcQnJohxWRpOCIO1XFLke7Hn1WkvdVnDSmVg6ZNxgSUMrMK2aNUo/sdbfH5jeVfAP9h6QMOuqD6
MP9DfITynjSXPXFzTAMGFiY4APqX9BXg7B+xfvde7IaSl4AiUt1PcQoVRijQNWCbDG2yUWnzyCG4
XhH1gI+kH9Pjc/OxxCRV3s0q1K5KMA0Q+mhmmcyhZA59VpTyOD5OyLJKPnP/cy0J4SK/F+nHNqE5
zppmIEFmAZitn/4h4TF/2isft7gLZWWEwkautwyVBQAuvrpdMeaeOGnVMOqyaQmenB++MTs79oAW
lONY8SSi9rpE60VM27kNq2ulhzvY9IUPmqzKsobs7Jq02kqwjVcMxqzDbz9MTRR4glo165VooGo0
OQwvVNQlo3miELUqnwiQPAVFFeXNyS1XY2Lov9TjnFpqwI+1Mr+zglqeErkqsB2zNK3KYu3Foz+P
uhAYcl69Xtu+ohOi0+AG0tjZGBqqzEv1PIL54OLbzzMnFG5fysMVKXOdz53rP+Os8d262dTgs8nl
7TRR2yDWyEiIyGUyLNFlueUQtiivemMVdnzs39BAi9vZpbRmj1XeCr19e+GYhbNrVNbzZzUm03as
QItABWjJCudJlUnGqofDkH+MLzG3M4m50b7LhjPQ9udnQEAXFWa2glMWxvbhSZCj5RK/xT+KAb+z
JMjw8hz9c+D3HRH8Tv7fHhMCYjrXJDd5E+Cz2oUEcI/CM+qs54/VGCiO0rm7w0Ho/QazDKNvX6xQ
CXuZmU186oHhzkf3Px3IThooQ6NmHCUnraF33kWbsX5ijg1c0TWTGwDTC5NfZC4PaALdViSl+8FE
dsv4E7A9wHIDh8kWxI+UgpIPPMbV5MWebECVKUU1STGvRVLZmcHTPfviuY8K613uwLkUrQtz/oNW
LfnYBmXGV6cGlQEK3CD0U9VXQXtnT9UwhZnz9jZajAcrsm6rQ2ilFnYc8HU3EOQNSPKnQkk4Az14
IQnzJBO2dp3EAPZOSvXrCAqdJ5yCoisUbBFktU0b39OU5VUb/Cgjl4R4chzQuwWoaJfu5pI5YmeS
b2lqaVQTvUTNxGXHJyrKOvWsj2Y/yU3KkO0h6BcKyRP8lp4onCmoLw9Iei/7C1v2ky9TWeX6MssS
261YUxien05XUuPWQyUoJnfWy78oRdbwPkKhSx4h1wV8FGw6vVuYtIxvsBg/1FuMbrhsmptFEj4/
0hIImY+6KtpdiaTPeQ3YMQS2+llozsaLWb96CQZoEkGAFeiY++vnrIUBTV8PrlKhYQUvemG+kBRR
X0cnVCsdlMA2l4a1IUFqm4/DsAn782svUognQCpXroeShd+RJkZ8LkHdsmcuhsyrZoEWiS8oAvx6
nnZLJ9oQRWcjdzi2AwVDEWu9ZLkt0Cc17Fx9v00ldzd0Rc7pWgCQiEBzz/78tp6vgtD9zFzNrem9
Bt0xWFeBwce4xWPhU+wcH9t0UYKgW8FVQ00ArYirA11RWFQma8FKEOIdUPaa8pOrEsp3TSM8aCbM
QKjKVAMbmoQF3ZWTKIWoKG0dsmJcqf6KIXe7bE13kSuW2PXCjqvrSWBzuhrp0dp96z1zGQ9+GJrC
N7z1Cj74wHO2jnJ4wiHhhx2Hz8feEcKybC6F0JcCK0xhtpjRBN5Hsph3J6IUN22qQ0U8b1bvc44c
VhGHUio+JtzOLo2xGrUB/kqzyaphQqjX0aK3kYvgYTLwDT+ZSRa0VFN2k90u11Vh8SeDSiwRaOC3
VdRBk5uvgKJ4kUCAWCDVRaMCt2pKwcg18LMlIehIQnHJ6XQWkgZIpSK+4R+Gqo+B+jbLVyrRWji/
0g3R1LXkPMSTkUHGS2SEhNBhvEtu6MWfPCVxkQKrUmeXyIiXKUUsc/bVLLl50G6L1BT9IxaMgiW4
ylD1HLAGjUUCJ9W+k7rfWd9RbpfsNlg+UTde5BxmuoD/qDv1EX75xM+xLppuHP/xXax+BoLFYLBx
u5Z04e8CX+nqUqcen9kFagkvgvyx1hhNmYIscOBdKKLyuOdxgTbti0nEtEKhF5HB1evdX8S5LHtD
jdvU8J3K3O6h+PUtwHTZOlnGLB9hftyhfBSjk5SJB9ETEuac0K9SIsHsLgn4kJsnoD3thodutayg
VL37N/XDYLU0emBc7FpPdsWDUhGuhA/qVSUG1lVYk9dHm6AJkhEcWFssRa2EG8JPchulcLicICmX
Etttvgu3ptm+bZsajQMWOu76ME5bqLqc+2bSuFwJVi6SVX9lnoy3VzCDNHznXOto9Zrr1D98HU6P
SYKXaM1sXoCUF2HTB2hIld205dwTLgIK4evsja+TLA8uWzZZoe1QWuYWW2qGhxVRcOWW7+q6qGHr
f4IRrPyh8rvGFuM+21j4xV5lEpCC+sjzIwquxZ2FsGrSI/84dux8ss7yXDBngmnO87xhqzwuYHOT
RJ63PD1ecPZmi6jT2xK4iA1lrfVKLg9JhN8rJXB0RmB6mhKjsoiS1VcBPwcZVOPgLbcftoGXPBjx
FVwl8/PylbDSvNt2lT2cIS+lqctfJSYotdxA7PA8W/ve/ca9s560VfTkB/x9RX+Z2+o/fFavkONc
CtRhDpTlAlOSpWkHg2mEL9g6mvAoUlUiz3PbqYeV6NC0xLZydaMkNUWgnWZfPSyW1z5s/zkY2TPP
+FNPN402pLMLrRWUW/e2Py1XkXeq43+XeI/6sjkk0ipox0+Ge3nMpXR1AA5FmFoEy+6yecjSFfbK
SrNBAj6oWqbFK+2adL6rrJ2MKYRuxX8s2BZb93odUe2jh+1fKi137/nO+0frBl5NvZPK+JNY0atm
6hHyOvKsV5iL6HyLGyB3xC2PLBXUaJhVQDnraFnvszADtHxTk+tX2ItCKC5dfyqf/xf0o4IhWEQa
aY1m/MjW9Yn0iObcs4V0zkQjadmw04pYrf8Xs5wCA2A9BpQfwlT2TEs33/kXT0RPpcmpLoFpKk42
3TksP5y/iCL9/38GwfyUDvHvQAB90UYlS4sSfKLrGpVPAW7aNuJH0nzIMm361+1LcoCEpkZF7UK8
EgmrgNoFjD2KoITxamEy/VKLT0lI1QfkL/qiyJWZ+Noal85EBYOIQ/mjgKiqCk3tuWNuefm73LkE
cbtwPXBr5I/yQofBblnnkOQYeSnhiExnRV6Kadw3UbKba5jKBYTLA3yhFWN5/FcGGJ82xM9AtRCr
RXM6ttG2vn/hK8OrHYyxR+9l+MITBe5+eSmKa7HTcCisDetmeTMvXsegwrkPrRURdFlLxwY4df+p
B8UamY5QH9CgreIVVKJxv7K0LpcSnLXc7sQKDllPnb93wkC3kGStk4ZM5shBOsSM7w/QxXKbnd3M
8p0IfUFA+umqseG3iR5W2CUQZEuvpgdEnMPGfD4DKuVfCFEc9psWsmdqA2Bo+fri+KWjdaievwRB
pnx5KHOk6OMxph0EXj6phBarUtEHevZQDQ3Oq4LEor2B1EEc8+beMOT7t+giq4rL1K96fa8Jjk56
50OTfh41+AO/qiNVUjks2A1tX2VU8hIOFFdL+so0xNpO/z+oqEy3xyO2L58HmTqCLrFsz1c4ho6B
safifV8HfKSLT3i1ANdQG5wHu79sJdqhzLPIE+dAByqtsKiYowgi/THfGeuzm8TiLUzJKgic1Tp7
Rz87Cal3KgETAhVsKmQTh9eqgWt4TERt9dIBj17cxywB1xeNvrJnN1BWw/MEXk6oBVu+ROm5aJ3W
BIDbAUSCzookYrPl7u6reqmaub6OhTSjuahwVsXxUg/469fpG4kv4SKfKeTDzWW7F6xfBd1S8ftN
QiMxqdEVudgLIUCLYxQdvTSxRCNR3fDJRIeRjiCa1+R2CuZ4P7N4amkc72aRVieToMxKbKms10I1
NE4ZusmkYdG+xp/gG+aDc6Fod0XsMpWrg0fQNiu/b9wC3sF1l6tdMhyZq8PdbXb2x2E+nkLI8XGF
BxmDcOskzcMUUPfJlxNo5UV3Ybtvn7NbcjWyvdZCSOBAr0D8AjaJ1Nu0sH0bEpy/hdmQ+Q5xHzpo
KrT17S0Gzp0YU2vyeNO5Z1+nU3Bw4XG/hmeLH59oQKmctwdgemSlgCxIMGnpGHl7t7ku6mBMqdgy
2MHopIUdRNKABUavBYcV3MEvZJSN0tr1nAsyKtrd82kD+GxV8bvThq255ZgkIPEpRQ04yDIhtTkd
i2Dfu3vb5EgmQDCVDSiIIG3ntdsAn+i6qZVvkJNvcc+0xuREzrdLD9Lucb3i8cnsMQ+Q086x8zUa
mj8YhfSYNdxdhq2/yK+azC8f0P3KitLKNsSRYuqxhO+AfSiELfZRQkyIO1RcdwntWL7lUa0azu4H
EBSeYDWWtK1C/zKYXXldAoQ/WVbsUfl1o6xrbo6O8u/0u4Wfo6U8k/lU6zJduti4HCzFQynjeQiT
U/t1N1Jya/iPxzhzNfr0UPM1BgdyVBa9gyV1drWv9D6t3gtMTJfa5XF9GX6cEfnttIL6G1A6gitd
QYHNJ7q5L6gzU8OOXVXKpaPZRe93F9FCS4qkDtgg9GPeQwENkbslOqScKzGT5pKZLUijlkspLz4i
/0a3ztVdX+17qibCnG4MAxZ2slJClFwrCBRvAoD12RA7X8UYDaFqXMKgoybZGbvuAWlclXljLOs5
169D+BOUiMZi7mToDrY1zRKwLhcY3sL6YNxjvJZf5HNBPaP3I0hxA2ZI4cBa7sZMhVojHhN0VNaU
hSRckHUEcUyg1/GRTuUMCMWDiE+cZevOg1pJt05zV/LPCW2mjsG4FkwpMy/YrtEq5U+fjQXvuuWC
8ibLiwvIJL1KdigKcQnvFCoEZR1wh+JVO9P5wsfqtuMsNe9YgAW4JjwLguDr7d7R7ZrlUVCuLROS
vbMy4msJO+fHgigMuZFsvp4Gct7iZLltC1eP46JLgOkRNZUQCa2+GXxDnN3Xun6RisGdo6GV5pr1
QRjkQ+SRsp1o9XBFF8HXH8lP94iC6xvAckRuhVmbeGad4Ez5j4c5mguFAJ6ZFM3kL2j/ZeW+SbKq
he42FVYtJalLusuqf7PzeF9+7GrKlAqNSI15ARhrRvb+oWEfYFNE8hX/DvHMQgpKM4Qhwq7hGDbY
6+IY/vJX5ScKrr7wSxv1ybYcwiocgrp29XsC17SNzKdhGvSxL27FMe20503ejhDyYu51/wsblbCV
tJP5IicykhO0bmeSynyTgPAx4xSy0HRnJ8tho56zCmEdSjCAtnNcc2M1wYkmkO/BfmV5ZP43Z5Vm
DN5Q8pQtv0ics6oMaoTUcgRQWBbo1yN7tIQ9gXUTtrmGuRFSSvvhBuwew8SPfHqh+oe77GCpoFUc
JeEtTNK7oeGVPZlBECgZtnftvoh0S5EzCM6teElnCuq9XTyPBdAZQw9kWoNKV5glNhG7NHFMYcRq
omGiMbh8VfwLjgRao5dmKsLEp7SmQQ7u6CrhL7PEhVjPHLWwoVBkfH6mAhHMaO79wlnszE3ZqC2C
eZbG8daofzmMASc7lYOUXOzwSw2Zkzkuhc1VeaTNUWSOciaFpNGaGZvs163OlKCh1Tlf/bPkVceY
vm/cTFx7ndkGi4hzJGrMtJq9PWd2c0zLtEZkPf5mPMpGXHc5Rqx2ypRvYbv8t41boE2REiL+o0wF
t+6z2zV/DOl/ijqC1KpR126bF2iD3eSIlX8FtYJC+oOIIDGqy8g21kx0V5NiVhzB4akWxF0dCQzp
R6VWwOS1QNtbgepYxB7mY7Y+xK2bqz20helJS/xxVLK+PqttUBVjqepHRx/Oosuy1UrYclM94dRB
srRxzT/DkZch8rUVInzbAQs8YZm6adp26HjYsU2QDSiBUwuQrN7ML5WZp/kbBXfr97dFUKuLbGsD
4d48yNda8wXJqjOr/a74vNjOgSdZ2F3BdQaF1aHdiYEB9KS0rvbkmJxScL8lXrX9tErCST8bdE12
+konpfTTMYh/bxElh0KX94uJCKuot5p2PyD60LmAhzwzwgql80i1c0lhTm16knBFYi8uQlDIC+JA
Z1+Ah9SZQy+YMhIF5nlPsDedbChTZq/yezyscosW6WP3USp7oA2yMVto+2FhPYit5e+bAhmymRDO
sqjB+bxf5xcGzLtfRLzTIPd6xlZ82mkJOY6jvqNnYXS7L2hSoaW7TRs5656hJ8kTVtatxjln37Z7
jbaeg3SC9GwRDuEHF5VfSP4Wk2Kse9HHpkbbXMpDMRWGKC7cMpRTTEUY0yFkmr4JXZht5kuL38ys
ueq3RmpPBrsc/TEIo545X2vq94RHbrVof9R9OMa9D7fpYtmSvMTxkpDDP1GNYBVKXjQSTatSDGU8
enATBeTuxPB3XWOzHFS+jEBrl4UeTjOeAUFnFiS1sHk6mUnL03hksj1ctr9PTnFHNYDr3RGiS5Bl
+x0R220Ths2UNfJ5gJZ7tZ/2bvUKjlRtG8ZufL+Qz/xYN8zV2Qb1l2M+tfClHl5ytntir6LCivff
JBjGhZphGwvErJHGm04gpLPnzvN9X1TV3jJrBXIud+jcoFeSaNT77C7IXm1jrVzSQf4nxx73I+6k
o0TINbCsEMo+2Os6vkENCwmp021vUdxGdqOSFaQLmYyVxSUj0RmmzR66mE1tCfn0ZlH4nQ2jd42h
2PpGoW9j9uMgj343OFRR0jdggIU6ySRS8GqibCF4nQ1B3MpHWANLCQFNbDRd5AgldSW5W27wPggt
0odPm0GNa7D2JidqvebBhNRwt84hzkeZwMHtOgIE0XJaTYOpYFGbVHF7HnDHciHHuc9n3V9K/xEv
5KtruJa+5sKjm85A1PIJrMTEL1rX05QMwCXXWp8a7W5n+1R0FAWnYt1UwmRgo7r4yQIkYS19nxkj
M54vtzrAwc/n5k/8GlxbXl/ZlUid9TRTv56NYpTKrexzaLrcuf5oNraFgoTqfWd8+agNslv4KZ4t
L4VnAM+fnarijkFMuhuwj4pj03Wf6Z2W3EO8SKMjT+QyV6O5ZrGXnHx4d3g4ITsNolAqM5Gw5HF0
ySnupOfVM9x7TOZA4vOtKrxLy/RwCxMyAO0QPKbcuDQxCwWHCk9uS5/+CAzvMww5lCopwqimLTsA
Cb/+Ry/Um6E/9YpB4Sy4BPPsxePL0HFPcYw6r9I3TzZTpVfIuiizNIwShtTV1lsD3qwD+RYLraFQ
+vzMDDrxp+JUnaxcsQq8Vng5SIlDIRZV/9wjQmzZCgsemYo50IMXACSTXGvyfEcm7pDtyoX5wopE
QfY/w1X4OdIMxJ/JG0/HQZuFD3p5Bo+Zp0huKHRg+/IQ2SsUGV5gKH1wCybzmu/CnZ6Qg0HP5GQ2
/bcfRa0DEPySNBD56t4dwLLL/KG+4UwNJ/YVtBTVbPQ2HtEXC0WpMtVdnmxs574uOvyG+TY9k1Ps
SjzTRqMwC0fk2K9MeI1gZssV75U/cOw8uSXnyi2PGxKZ12XpJJEGvYwjLGIEwY+sdKNwEyObVIjv
vzpgIRdOJjLWPtcmQUO83aPPPpbd1RqCbIdLXMATcfFV3268vsipj7DnyjPAhOoK6i/Aku2xFUi/
OGpt3pYlPwqxjW7paTlaDjjy49iKsKl8axp5TjSOK+QolYetCgMImKJs5gFdM/9dCYCTLnCmnS5l
1GAz0HbcTCU3ZkmcoCQ0TbzX8O735NnsAoV9EreoJsh707pQ/8rE8rSr95eu/dt4pIorEOJcFbMo
Ogd1/UZp2x9QT5uKaNas824w5lHgJbvVsP2kf4sg4Ny8zmgg1za4WbI1AuYebTWWA5Xsysa4eGx8
M96GBLdyElPpm49i5BweAIHGTnMSQGbiHleo2vW3g8kefxkcAMCyZ7Sfd/IC+w0KR8dnhYsTWrQB
wo+/fKACeVM0HEMkjgj7QJB1fc7dkT+NtpP000QgSd2WS8TPbmEgbAzAd8ZIJzDOjm7Rgfx2Xl1x
BKETNS6JpBgWVT1Ff0UtUedDVkl6gJYqrUkf5Fjer+y2eMxuobP+LOZCGNTRgQRjBIuKCQsy1/xD
uknPItl22aItMD7oRsQyjopx9HRTRxfqwDDevjmVct902/wjXCR1gHt4J7SAduZ7PLGgZV69yYfD
ly9cYuZPnt1mShxanEB/Akvs2eGzyXuxm9SFnO2BlIXDHnkXkdoxqWiD3tFv8yaVVIYMwbKzXqx5
gTP/v34Sxc0ei/W7XS4KiG2AxLw0ljfbeRNMYA8ocesXHwe728BUAAouc/U+Vf+jzCRh5fMP4xM3
Sc8/dmXzPHKuxaoe4/AsJAzEPy4YMN6zJnxyzOhBTHOv1sw2LkzqOKadv2EJ/dTT6y+5EDKvJ6Se
6H06Tq8wnBSOyxw707Z8kgmui94WYUi64Whi+/oRmjH8klU2TIuGNlTshUpuKQPBeTCoR1h4BFzN
gcdIPN3tQbw9niiHfBH8T18SHJsdVYIm1I/D9b0PxjhWE+g/bseZMWu6nI/kRmzyCLmwrLQWZSV9
fxd5BJR23Tu2FeJWth4upu5KsBdFhWZ1gfXUxz8eIv9nFKLD2EkC/ukOXnLnMEBhC+l125C6JNWr
6uWGVfzcXLEr0YYgae1N+UsLo82etjDEF5Y0WScScZPvIgcIk91RmABmoYCfiu/uILwrPEAiQj3h
NzFzTCOpmkCDr7l1R08Vn453P/FhepICQt3VN96s2d4GvSKxuiKfw3Jzb1ImqrnQsQ8GwKQm8YfM
lMRVOn/w46+Y8GiQmfxzLWMYWMTtvhTWiE/TNJIykTFvw3Z25o3LMFtFbmXE91YCUEySRibkdlk3
DbzGR+8bVKhqoYMcz+KpNAfeRjf4f2GEWD41HoxAyAiNb6YgFqxmkA/bkB5N6XqLjSH7AABuFAm3
swNgCr2it+M5dPSjgIUln467T1r3LZxGmr9ZDhsldj7qcbC/IKDvPN+tUk7k+cEY2ytjx7HcxVjR
h5SKRUpx21T52PAPBSbY9y8ptwLnGCCg5/6qx/LS0XUoBmeMmzRehoCWAkrKNnnt6trDNXpHaWcp
QGftBkRV2c1B8+hYBf+u6BKYRF9SOEyOu0VV4VRmCKpJiHcuzi2Of31T8bYjeErE98Zn+GGBllWb
M2aFL/+MAzh+YGUQUd8VN4llkMtPP9jeXTaUkzBs9naeI6585u4kHMN8JYuPijOo67qJBdIeeJTZ
KSCdaqVzCmOCi5AlKEsf6tkXQqISXxV8WgFeXt3HAsm790PoaXQI+90DSlofdJaYeJSH8hpJ+6ur
CMRlmovVvhwVh2q3X7ezFTP+FpoHbUBjP77MDHe9YjMqsROOSiAuLUCfhfO7+0iu0RRePyU4hD+i
QY95tZk5ghnXQcNOxZWpm81F66XN1hEjP47pFUivq2uCtcFphEjEIhUxZvM4zlJ6XOxMngJmbK+P
itFFcrrXXGLVaAeX/FVeGfp/MWh9/9Omyk/rDGjGLRliJ1gO8gdEoaiI/ihA/f/o81XcmnqyJ71b
2NjDhl1ayn4Lmnbte782F+DzlEYMItds/PiYccKG9gZ3YrwSdv1vwIyymUdhwXj3dhSv7eBZ+aKs
N1fvNR69SfoQcK/3KVAcCcD9SPApaOF9Ua/Vc3hxSdFhQhKYEqidst99kXlUExOdMtFjh01/BdOK
kUUOK0/yxJDTBRTvhb/QGyy8jE0znJtzfeketasaI59R7Ggpzb3tcMmI/2EqkCwNRvbHTUrnScmL
eolPlWoJ7pgua8FkYTXT29R6AxaDR9b4aoPd62B9TJ6Yi7IU9zwfdeM29fHlBX+oqUNpxtibofSJ
Ayf8mcwPBeAB5XbUmC1I4a1VVhkPtd24UXrd3R4zUPGRNYCFgGZwCzHMzAEn4eSwsodwEufjYHc9
YnxfnMfYo0DFiKv9YojmoeGLNkyAoBQO4MqpHufpy7qX9zdwdZs0poGImkgmCaBf+vKHS+Sj/DaC
5yj4MW7MEKVC0d2vcb+42m/hNxSds2vQNAPDfnRFt2Coyw0JIj+ZqZ6Xld7O8KTGdFHn9JZzisNm
XMWbPpLL+K54DTi1Ppq/GERKhmVsTCzGzj7KSfLzdhCSIAY5gHo7zVKR0cTaHd+ja6XY0Ow7uE1Y
AB6QnYIqQDZsJRLcVq9Hbpuzq+mEPuOAe7dgkl4in3gy1ZpxzrDQYVhfzufzynwvibn+glLGzFk2
RSGpCnq5kjX8LQt4BK70FnxV7hN3jJo3IQEaXvMk3WI3t5BYkSCxllDFc0B1FKPHvTR4bwX/PW7h
KCbA2pYViZA2AP3aoyEgWZWPHR8XlZ6kvLbTDiAmdzJkWd7dJy22ipCaYWDDim02GROtWUDf1uO9
m2TykF9bP7NGCf9xXZ6gWzQdYTcQRrrLzGMwnhlK9cCQC+c+fSHeqLLQPIEUi5VCl6vwKNMwdSP8
HA7GBHRAHkfftWgFK67isgv8kTjrDf3DTtR1fBOb3/5KhfRp+kwI+GL61ZNXxLpuyDwCbpU5K8hu
j2xWjXXzL2nz74bT+fmskdORJonTQsv8ptzHHPZqmo1zbC6NNEcKOuqrk2kJ1QmeZZyPwVHMyJQA
YjkSfo7UMlh16bc6dTzhTvh+u0DyV5TgAz3EVqSUrmNOuLw7+jTP7eBKADMsCTx2vPHOBs8zOLzc
hULpWcocCf2dSbCQgslWPVG87kbBDspqEkq2Kfqp/P4J/2C56IZQy0f8/gCHuDbLM+hjxO2DnHSS
9c2VhzbXngCViDtIDZvs20HmR7J47w4Ju8jGWyG6MS5TU+7pfNfGIhcsl0yRxuW3QKloxvFLhmXJ
wwq57nYioLLV9X2ZZ2/Y1X9Vq+ON2iJrJRiNTnOu7PAK+pXDaW4pKyqxk1ZXoyQQKXWi/5vnyX3x
GVI6ItFkU6haiFrMgTW6DBTdlAW/teQ2h47TQ7YVnfiO4lQuTWpor8KDHKZdLlZY18+gZKV+Biu1
4HjWiQilHC8R+1iWJTLgOZPYwiY7GXjVd6MeSEs672/RPnXAPzNSeJan4RXJ10510IcCI/yJUT5W
DZhrj3squm61sQxlMSNF1eLRWTKPwUDFWFO2Tgs8aUv4yponPnVUKnrX9P4Oc8OE00o57ZFHaZg8
BnZYj+gkhPiS3OmcFD4/+7b/SVo3jp7e7J+qDczr52bQy0CAeXSbG1NjgtenOs6S8d6wJprkx+ah
9Oj2BuCMTPL5lawfdprZMTZXLw/QHHC83eCQv/P1ueXgralb1DjOP8VjXtBV3OowOZdkeVxGMMjk
bU4sZYM7/4Hb0BUMHkKXifxaDmVq3IKLE3DAo5MGnCQPV63xqSAjt04VpmHT8Kcmm9cOBOAGd4Fb
Ty/CYly39ODU8URvcP/myW46tX9T8BhPeQc4y/lNwWzYykBTZAdT05PqF8ePviP3PD6P+cnv0YxZ
1lunASXCeIOBJqeLCyBTzwGMPfgtwXOJdUxkS/6hAZBqRjdze2ddAWzKfh3VSbRXo1mU1pL8i3Za
rlkHZ3VyGn0+FUMyraFjy4LzEMOHcpVr6TM2gi44xBw0/tEci0zxXz334W5HidITOolPe+c2rB4K
lg7Rul8eAbwKzI5s5wlLYGCmkM/KxxWP/8z2Q58zA7ZHWDeBuP1g/wNucPBLTjLbk+FDUwTLfoZa
vGvlM2BIRtyy9P8hvoUX5RVt43SJTRHzdQ2egnBOjSmArjhCZhv5OLDeQcUWypjTX//HSbwBL7R9
ORaa0/MVVL8aKqpu+8mDA7+XJpDIAsiaNQEwLTsVZoBSq5/X1obsi+enEMxmNDNtDPeB+j4U38Lq
j7iflNuj6DPBmAtxJ61esA7pv3rWbqG2+MABWDDXsiwQl1lJQ4VQySazN7QJVO2voJTjSjbnFS8g
Kw5WZpKKrVVBsNYkm09pgIS1RkIAxmruOqb6XIzrPvnxiOPojt8nulWukgbY+qF4ay5UyNk6/N95
DLFg22D1nN2v6/OUL+xgjolvAVHpKTbROil82kkKy4f2iGE8KuF9Ay0QvLR4/lcCS6YbH/bp8YFh
glSTX1k0PBAIn0PG9shu/jpnBcuP3isTa5yyRqlhj1n7cGaK01t6xBEvN7aTRhuNSINVQU7G/FME
EkutCPc5P56/Zvslu8xuhY6Le9hu688C39in5vXdGzGGHk0yS6zmWgWnevnD2gE+MjqMEDl/gOBg
cUXAaFx6WoOemStIXUNRRL0ZZ0DNbErzayF1P+Yg84kib9qsDwIOqy2f8LwhcaMBzuJoL293Y7jz
9T1qUaYGdnuwwFKD3wlI+2d6Dr/rB93xZwU+Kh773BkoEONn71inL3ILFbEVVtmgmWWrDAVX59vk
fgQa6rYShKXbHXVGg88hpDaeZWtPoi7+SDtb2B1fo/r4eztRRZQanNZhV2+mVslAednTNJv8OZP6
8f0mwydLTtooHoDmLsNyItldR0X0XARi1O+HeSxj2e4RT9TERE+Sdey71k9jE263EBJhWmFCN7FS
SrPPy67Id1dXXUvgHBOna+wLtqKL2kOJHY79gbH5z1J/ylKUYspqZCihYi1kMzxlilvLjUULaL0Z
yYIm8LmyZ7axpTjy0aw4o175asWsNn911nK8n/DkxylPeEoeuUHpVMAUpVwthM1eRDQPWRaW1GTU
qDkcPlOYpZoCAmTtxnHooTxkZSnkAcJmZ+9QPjbB54l02Wc16tT8jUfDowaFUXvWFwLdd/u7FIRQ
mDcCLAeliK5xg07GY8HPEqv4GrHzyv+pGNVWsjcijNHlSYnwpwZ5paWUJJ9ThGCP//TZUdSwHIjX
o+aG4Aqwz6JXBa9+rtMIR136j/drbVcf1kZ6nk+6M1q9buy3O7bumwAc5FX4fhuenwOcQy516rWU
L7UcUGj+VrEIB/rAzOJ5qc9xmAZw6w/V2U3oVYCVT0iWWHRGQoTvR8Ckb1pZ4G6y1PLfRoUSvIdF
orNfuUW0UjqEQkBtj/u2VP69SrfAqn1xqiPji9PvGmkz+lYgi/pVm9y03COtnaIuai/HcPoF6p3n
viTb10RPvAOeLXxSejc5XWXU3Bzkw5QMbaKetvgS7BlQjTAjd+iuoOanhcGw/SPYKgXoE6xnJH9E
9QBs3hj45mb4mZEZioYDfQTfDdUA7Rr2Hi3zJe1+gQX3cSiLfCYiCVA1ildVLuMurjE3cDna789i
uqsG+kY7bslNShsDnbYSckGbehU7zQHuflfXejLzA6kl2q3Gromhv6Ua8Ny4/kO50/5UIiffXG8I
ndya5/E+fi9ebQ9b0WAkulWkdnLSVV70YkLDX0MlXMLsEGvnVdMGON6Ho95wldeqXROulQOl6VTa
FnnfbeR/xAwFDcSOMmoU0fT62eOZhPkS/t4YvQiAvCACCX45YOUH0RWsrjC/VvhapslpxJxF3bRH
LH1dEE+ymqbIqu0/Jem959XBwQAOzAI0g+aYuGRXIT9A/7SS5DO1tHQBvHejLfasJ5FzrpAYtGxI
ziYg7twA/0fGiLC953dU+Cm9O/NW+5FOy2bm0Z37cPDAk1TX3VnMEWyLUKFvqSXymWxYQcYFEb4M
VSBBWcD1Az0Jf3NsNb3ZkQS/JpjqG6NNHhGA+4XO78VAnKUNkMdWUpwe65HFJ01FNywDyPjG8JvX
ffYMCvaAQDCyy8lhDbS5LrZRv91uc3lCKK/y/Tcpe6dSyRav5wyUATHLO4OWukGYzuu+P5fOl6cC
2adHnE9G3pMn54rC8mTagUYRolW3drQMUZln0hwMFNgh6jcYc4rLgkdZs3YA9lAUp1Et0LPH4g8w
ZqKPPX4kBi+i4ku7jiVDGwVusJNpbQTDGfI8mytUfiwmKWG1koXkl7S/gy95F7NL9ljgfYbGpw6Q
cRAKDMYSzRIJ2ydSN80/BHDdO3fRRgTlxFfSt9rxD4Q/YvQDEuBI6qGPDClgfwuYaqHGRQmhKXOj
TEbPcoUp5jINZm2kGaY5lpwLNU2PDUnUBpGB+bmTrqeawyYm67BT3bTe+2732qBg8BsuVpaRHka0
LdS8ewBxhF19QZpiyYmqnfLCn/xiP/TeZrfYRAfd2q3Uh7UV38ZvKn5QHnPQKyfRuO7Jx1LtMQhU
Wpo+gkXhI+CsB8ultH6IljzMNOFZYkMcLQyYusymBt2SZe0n+GU6flPm0ie8jJec3TTom/RzoxkF
kgsK6x6VswfDbu+Tx68cIwcEfLYr/9Sm+J+qLBoOJpDQqHB7aY+MxECtVmQhZN8ex6onYnB4t8+7
gvCpbeNtwcXuaUN4S3+2/2bzzb0taoMcFacTseqbQHwNpBUogaXOX0xH5Hqa0RY/nldeNDQLHy98
z23i330NTk2ag2zPwhP7T0RThYpQekrXKdsEqZbJjV/zA6zwEbMsWsWlx4H8BoIiWLU/o32djdGE
OaTZjyl1mXvY1rkdPIfWSRE/MdeLwyS6Fm5AW5jvtH9gthvztauZwV30D20CRhHNcCaUpuVUGDJo
QphEWzEo9vEJHW5HbNnMXhhKKDKerBQC1G9S3+s+7NVj3U81i4iGaW7B5tgwzNfhFhIihnoFRK6R
mPW8l2oF/p1FiXv8qAwIFZAqA3I7n1iKOhbV05yqULKaI/DStL3vKiLv47ZIkKlsPFVGutyumYh4
HYGpHzdbUYA0133YaWm9q58NNkzeNxYUIr0FHmN6R+6PeZBcbaDkP/n1V9/WXN6/ZYVCISRWRrAH
osCvDK2uCQaGTwumC7V3qbrM+NQYO/ktT8tg0JXe2dXsFyu9wTra10y2sNP1U5P8UggQZLQtPayU
rauuvU0el3L77tt/ZGhoZauZTRDzKH5kbuy7ricqbNBTwxlYWoNACsCL8vVMC1JGKtCcut31lRZo
f0czPd5PR4BRbE3VVHU7uMY+d2gItfdCMY5ZJXM8G6ocknDRqEjxwdrwtvOrO/JT2TCimope7uSI
gxd3ISUL1Fyla26GfpTu36ppBVs/kah3kR8nb/j+qQHvJ02jZBtOVR/FkJ1l88uQxSYMXvR1fdaV
N+rdnwCindT+myKaG92YcBGYguSYmvLZvqU1ji9WideMxbX2iiu+53imvbCagac9aFiNNfB0XGhM
1Vyeu7kGFkFPXBCmS4qpOBXoWBdLCpp//UXBSa4X/ERGolIxE7o922CNMlz7MDZqkeTcSDeodJXV
XZXVN5+ZzhZh0W1rCiQSaIiV/syo6/j1pKc471ApbFzWMnWElzxO0ev3ylBdWANQ8LCN63vJ2Zxz
wsTLTlaWBzfqt5LQzMAKz3kI6nANIFisOnvRL1za9h+srroDw6arG8Q9oFa9jLWJPGY9NMOtjFXx
LaRDCD3p/NSHnNenkhwjkcepPiZHXOBCJbtc8Yk8Utj0/pyFjmAMndJj+nYHunc2kKfO2rX/v82n
7fwWv8cXjl7dOJjdDC+WuRGBQAv3JQQcOgLmE6tSSzobB9yLSh/WeyJkNi5IbpZhuFAgTd01dKTG
FpPEQkM1psqyCCtynvNTQHzcZKnfgBYOPtqhimCKwZMH02QmdGy0G6VvXUMUBukabn2YNnqHQiWY
R9skj0r8GEA7rDREEgAyJfVBuq4iUwF5J85xTlnuV666UphAvtNHpBvEqRw0IeinKOUkBBWZ5IGV
gBj7Fs8KXJ+kzxs1wtaCuUwS4vWwR2Qgtdk9Pl/GOb/EcEAt3ViIEzuC3EgP8K/hvY6fc2axpVuM
BOduGFVVTWF2mRns5Iozcw/iqE47o5nWt+R5hBkmjU3m7PkYLyKOVGno79B0Z2kkrN6Y/ZAtwZtF
Q4iM5ibhJW5cSmFLudtxtpVc5i94bAuum1OcFaSmWwh8CiW7VHk+64vMqoL+sbvWpYQKM+3zoucc
Mf5GEgbACo89rwSThzv9IrIvup4oeohTPaClsLj5YmrroQAVNn1gNvRKuZjv5JHeGmOHj3WREgX6
Zy/4zryXdvFLonxYQF1yua5MHimKGxzkigVTMJuqfP3IMtE9/Jeh2YQHA3gN3waF1TPDF9b7xbm2
OWcRqakAAJ0ZpzphVdU0Y9K8KRI7O31+n70HhIx541LxRBKciDfyjAINVJPiUymg482p51xFixW1
nmdEswYnmZCwh6YXAwaU8msnV+TMkWWFmiQ7QZwUfkNYoDHhlNzWMxbbm1c5jo83mM1/YszQeUTj
g63+dsL/uMLHRL9JQB6z1h4APWkpNhSTA+XK8L14ktEVugnHwEBUrhj4ZrFuQPFPJDILBcpfmSHJ
fhV8IK4eti4So5777VZV/FRtl9eSFP31tHZq3b2ZGHSf2A/L9LXcUqXHHASm1soEkLyqv7+Anu4T
Uhanso8++ugLYNOg/rGl65N2ml1OqXK2agX1q+e7T/IpAP7akqJeVoiw13waC10aK6AyccxHDKVK
4Jw9vDaJthJySgOq/M/D3nCKjrmTMfZ9BrCB0BXyg3cD4xf7yOswxdQgs7vUiIITEMcYqQjT9y8Y
S4TE/SmEw9f2KJJ+Ev+uhhg3W7Dnspg28f98onNOUXwpj2ismKwzhswpwbt3+II+Kc0Y5yhaW6/U
mktvcbyN4rOGCE27HgwRzi7pTf+/ZOhY8ZuDrG0YwvW+8yqXtKmdrWRj8oXzpGHC6vl7Sf99R098
4AS6iZ/vxPtdr09bQPOn4Ni1/T0d9Axyi7I0oe+yuBKvFK2C1h7MXql3QL/LfFv0RmoQAtRyUmlI
wnc6ubIfabPzmXX00oQl3IoL7/+yRtknGkwcDPh8gdGIcw303v/Oo1E7JbVlp5q7uv/xjB5M9mQP
XWpjbkQ9q9aHTFrccU2BYy138yPzK1Ngu8fHpYadO06fMHEBQ+XQpuCgwgppvy8qT/71B1xvfqeL
hdbNeIr0UXJX1/6zbpPRjjbEFyXRcOhkto0Hzo9XYvJJld6BjS6JRvWcvqElnDnXIynxorINvT6T
Upr1e0+s2siyVlcnnNNHh8VeIO5ho+qJz4IRqfICfYPo24D4xthUEUgKYnuJKvzzr20HWdQY1BWU
8/zrZteQuwy44FPLDNddisn/xt+rl4FPqziZjtjDdEiagNagz3k2JgKknTnqyFEcdpT8ozHEzJZ5
E1Brro4a/h9Gz3elnE8Z2hh7SHbpSxvaI5zCrbyRS0UWvl6XmvjbOZgxnZ6nqnW9HcwZ82s6H8V4
tFQYuoLlc8tMArrPUXQ43+Aof8KWQ/9zye9Uhbfm7MXSqbNUDzbRWbLrYF+bQHEzdj2hKrcZLMNn
3hOB7bYu2CTh3uGN4irErKra+twELKtlCfADGo5HjjKsLvGA2O1KS72mBYO/NoOdMmpl1cvLriw0
wGTDFZVWU9lToQpz5MPHsgHjBLhDBc0fYB5tTgV19S4OTA5NO5BiuC78hB2TjMyFZpfKDPXtJQ8C
xVUcEBYY2QP4FQW+6spKOxCQOAE06Kj4ROjMvWkKQNhkeMme60QKwJmr8uOWf3yECwFl8k9Ojgrl
bcL4vPjSWzDvfscY0Zbw5Vp3+C/1/0W7zwIJdalUTzKMSKKQnfQ7oL0lPjO6dy6bLdmei479tbsE
BcMVGbd0LTSWfZxQ/dcz+BHXxFnWkCoqI7NkTyej0XpuKLTAey1dPQV+U5/vLkID4ngP7XhByfzh
gPq10AKBx/m3t90yNTkeYOET2iXAlaDPsn0nV+KCzUt5t0LxlVKeJ6iLrwmIDe3nH0kjJxKqMv1i
3DKs/aC+9bgBU2C4kboql0G2ZdBTVVToCOfRvMyVk1e/kpWVInJipSJSfMRZcQgAizeXRRxL87G+
D5td/u7Xav/Rc38v9oKCC7ABM/scOQRltHV3cRKYntjbk76vZ3aKk99pJ12YPCgtvvGwT+5Lo82Y
jnmIRb9ZmJYzIh21fJjXXY2X4rAOoHReLRKiPfgIwZHYC6e0KnQRcwUWBiwKSulFyJh7SSWrbAQ4
REkivRBWeJ8LuO03+s/beV09gpBlIorRqUEJKhMSIKFfgXZg48xN6jk1NtQs3TFNt2fdXWAuYLsv
A/X2l45IBd2e39lbomsS+U1Y4cJL5t8aSKfh8KXbtayu3FSakBsKJUzbLgI0hKmv1uo6g7N67KKn
2bFIXiAHMiUYUGYTra1aSnvOuUQLj0NCn9lg3bnLs7fXWo+cbDZhmDySF+yXAKbwe7dWpTERFLET
dSaUqVpatoHtwvwEOrETUAfUhMczzoIQm2Rv3ZZjVlFdPDW/7Mhnyzwu2sqlFYXWWGIxSYgmas4I
VyNFpxK7r5IxUTHm/XVby7i93puhG+5tLNTRR3nMiL7ArrdRDBTizqjauDEfGisHfWuBo9AZd3yJ
XEzaNiS8bxa2+Qp3iIVuxVv1H4U3IAN9mZFtfemmXvfnKjOrx2rW4DSB6W8l5bRj65xUbo13bxMu
f/4o1RDGuiiiWlrJbvbXEvTTuj2v13dWCeT5AeoFEb6da6FBCLKZOx4il0bJtMCu8uXI1TDOUUOa
YeBocdZCTMU6AD8gdEn2P9tAAZtzg6ajKYAd9JLi108oZhT+pHlHaAUQrmVeoeoUnKj76crd0Xn+
vuW1Gg5hr/ifICm5bm4Si4nsaJm/4fpsmXct0aItD/jeeqVtAeocZedGy7JzNAwhQuJkkL58bQgm
EiHkQi0YxLc/qhEQ2pH336PlcLXPtnVSBI8n/gQr3f24u6VwYgQMySJu/tlXpA+Ngh1FJtGUYNa0
m38CVQ5UL7VkbS/jvxdY4WovjPCcd9KDpshxQTsPSxh+gBksQG+OdTxpUttWe6bOsXqjYhTv5JeU
RzkHAulZs0MfH8nz/Mi5xJ8uZ55GsYIuBpWJHn6u+2Dt9z0WbXTSS73ehpHwOzuEqbvZECr2nJYb
YoqMQb41b6C8BDW9njnr3MINq0h2C1M7oGTvoIPeR4/uWST5BtZo/lygzZzUKXisgDhcrUFxlrKi
ax/87fNVAyATwnGv8t5B+vf3Bkr409+llqASH8KERdbBeRdCjiNCbVv2S9ZJWB32ltD2sydzpdr5
dETqHQid08ZiwdGDVeen5u/dGCakAFiG2ldQzVDyEoJFkHveuFk1lWr/BWDx8PctdjUrkRGCW+nJ
B7vOLbc3Q3vqXne5FMymb1FDImy0Ze9CLgymGIeHe2n9B8AKl9wViXbVTW3QbamfXOlR3YqrIkYu
S9Y6EIO6V7OiNDB5miCmsJUP3Z6EZ4AagK4s7Rx2f27v338XemH5EgCr9TZ8wLPI2iYbTuda6nvS
OBHCAHFJdsQnyF6IJBTMBWNxOOvLXrsbkTy2nH5GkxLxmEawMXBXF9Rz9G3yaFMNudzOTQIZYArs
9+teF8ee/woTTwdE1OzcPcGLP+Yh6Iu5BjG++5FIxzPZRXZc88FxWZU6KPVyqnpie0QwAV3giHT7
Tz1fikhHtOArvw3P80bPIC3QjwWyeXdrIO05cKiApa5hBpYy2UW/QdsaPf/4c7m7a3FA5srsnIEL
Vb4nuawa8QGjVHXhv7TtXzSZVKVGwIlKfXlPYzaMu/Zq3Xbtv6XEa3FHqELuCGXp0MWUXysDE6uc
5dBaDl1RlOFs/3OvO9Z0H5zcXUMq5ZiZnM3sLgkS/jrL+Gsm+n8mTi2ULmq+zsjlrY3EWyCcYwt4
WnLMmS6nRAkpXBWRgVEa40Wgc/9pwpFQl+eZL+l7y5bH6ysyaJtl9tOV90PaaJeTbiAtD8q2OiN8
36DCXfv5UULpGlhSw03VqbojdO7pkWKYdeHwSlBFqNjWAh4xOIsME0V/I9Vw3UxnJx1IRP1azUKT
tuEj/0mJLthsK8jYRK96bcJNFOlhGuLulFwUtzZrd5E68EYLnFzS2L1QNz0Bkia4oMpalGPm/eAl
4pwdliRfA/gbNXMlJsedKjDRXNNNFKGJ5SopiV/yi2GCQ4rwMK8ws/2ChVDqpM9u5V+gwPz5M08A
1wEIBeM3gAR2q9AmenB2DQ2P1543n3ebghz8IlGGPu/JpixEuJt5fkjL6i6A9szev3CJkY8FRkPa
vaWzNOzfdM5a7+6lrwNiSIcxQFIWnL1stamtvsxT3ezgwCD4oWNLgYP15oIKDoIDlqCC1VV1IMt+
JQK1ryQGinPzKs68MLimKEjm3ot7DUWmlv70dHrS+n0Byyl4Cpfyob4JbEn32pBDUXfN91hDvvv5
aEAF9e8tUyETLPlFiGvIx4JUna+45U7ESftzZLPPV0VmTpiSQ2IgtKnSjc+gi/rR88mhUpGg6Ljq
BjMaTxnkmc9No/9lHO/YmslDv+H08M/04p7SAOyPjE9fJyrMXg7jDROJikZEqn7BmmFiT8rGMklM
Vwmj1jRxUFd/ixUps3n/mYV+JJQojtDH4Nu6I3hTqJm3qFrOxUQNuN5BeUwQ71iwZusxdg8aSEoj
tLgzXXLeqtAhldWvbT1DhUqMl6exolUnVV0msgziqOp9xVXAgRQTxoBOMY20c1wttkFEJVjuNvdx
Z4BnoEp+oM2Q4NwwoXSrTysEz5B6yXcKSpoXpZ17rtTtbu54QQIiAHGcjnasEA5b1nXJWQLsnY4X
XUIpiVU3PA+nu7F+ATmxxacF/oyp3QgZa5gjiIBFICV3D3609FTNy14sQ+QXlnheyXs4vqtNMpk1
rdWDep+8HOE7ZZJdEGrkeJyw2NCCmWEUEe+pOfx0XPKxD3GmGw8o7uBLrHfST8632+FEB9X9AwfB
mVhq2sUy8+MrpC1iC7QQl4wcMQNyVULCIxa79fchgMq0HJktzaG5PqTuvVyfx2n6OJKKE0UmG1M5
t0UICJhHO+OL7qekWDUY0oidzTTxgXKcxsx9b22ZwldfdLFWMRfeCgYvkpNz9ufOASz3taEb1fj4
KXekmHG8RGLv7rO7HNcRPbpalfyQ+wFhuejdWjxiQBWIEeP5QQ4PgZBwLqEUjpq8VPqB3mOs7kyz
FY44+Hay4iiV4E0NftETGMw/T/qpmYqaKdD4D+YMfIdhemieLymMmVWEfmAGADK4MdNqZHMFFGgd
tm1FMWot+GFQIM86gw6xw9riuR7ljpyIdklR2N8/DaD+lMHo0lcC1HyCwzW4+iZLBmU+NlO1XysX
UIZDh6ADc67j4K3DX4rvGeig9Pgodx+QJnkLuCzuwEDe0/ZLeKR3381htpidYoFhSleA/O3EIhsh
TZSM0KD6d5Hdl/WNfHlytOinBfBlIjrmp5wXF1erEbH8x8XyhLRflfB415OCNw+8+n27L3dXbwPz
VTqTj3QNOH4TfgYj1hlJqVaQjbqQNdEF3imiA9tHFV4p46iI0XXwSh0QaM4TV520aLjgQv/wwZIp
1Uqu4kX9CkYX1VoQarh5CtgDbZkXCdMZSjmMcQAz0ReBgwYxbg8aFPQi/SVeYDcrdGIGb9PtX53H
y166rD26n85sJguea8H6/y+bzEUuJQkz4P0oMU/LXsSQ1hZZy7s65ljrYdC7c4JTFdzuZLEsvLGI
JDW0eeiKq+kSzXLvZXXxMByQQfdy0JnJDFGEZWlwBWviR7WtPb0FeqDSe4ewc4i71xkVuSqc2vDM
CMdoGaIrcg/3tf8ibTYrEusujY4U9s+gMgX/JqDjS1hZ4ruw0BDekzS8lVjbhaD2GBN0dlUiEL8m
pxDOPB4IySbh4li5HX44nwp4BqvZQaLpZqJRaP45O03tXL7Fl0g+CFaKmstRI+h7T1q+RrPGLAoQ
aN7WlG7IxvOb3qRzCqWU4dQQdGMI2kAh7Iw4PrkSITpgcWmKGOP5GcfL4W8ysxC88g1GTL7kxiqs
b/dY19/hlGQsiZ7/Prr+VUPdlmvloV+yKlwxM9OG3EQhrZuVLVPHxugbRBnuOJ7Nc0ldGDSLk7CY
UFixYtN8DmUR0DzxZyuURhSvW3400ej9UObo7OAra3Gfg4cwWLhVOopzDc74MEaUB1xNK3/D1XS1
B8vp5j07xdsebQWOqpl2u+1HTGHt9Jowt6B8MNxQnhhYixSa5yhtbmXYz9qVuzXnEFie+DnGFzpl
NGH+UAkBcvxmwy4l5mvFMQt9PI2gsdMHu7C+IDfvmSq0/pJZtMsczPaBM+uQufw7s+QfI7SAjbIV
K5BtwsE+dImYyj3LJFkLTg9+/vGF3HCU0+gbaTho+pv/o8+tOMwjCCwRGau4GhoDI7M7w7RJzKvO
wC4eOfiNqpzbx5NUuj0yzNbSCka0DzcHeGt4vu1S/cFAgXi9fnD5uUP/BST62qgClwUXyHfwAzc8
pzydgMh5QNwyrmgyUx43LUASEOEjnlmTLiCtCKL5tEPYOXE05OPF5RfKw2aKV4wkYKD6YAC7nuBu
JATYA+a2mkDwFZrc6Cv7yUYsDM75gmSUian+wJ8JoCgEWc7lr6KG57yP11hw9Wthwo2J5UzEMqLa
Dap1fK9vXm401fM8aLqT1tDPXQeZydruG6B0Gs3K7gwj3qvl9h2H6Cp1xdX0OkP02rt+U1E5IfQQ
X+lSUphsT1PdUTjSYXO9P4keDytWQqmn6VM7GZdCPhylU3s4rigwgf9HADrG5ZzRlOn9Q3ukRzM3
6qAYasWHOxgoiC+7Ho1MBCq4NIUX0z7eu7U4SM0IA/b09e2kZ6BLkgJyealBO6PFeE4WOleiamCP
fO8DrcK87UgnorFlwEBXq/3lBEKCgm+6RvNYPgPfsxtPpl8h+CabPdEz5m/xR0dg+y73F/y0GwtK
/gBhASHtq9EEveadozHbnOjlbLxDmwFcRHCsnGceLD3xeyBnuO/GIulD5xTR1e9QlwJ6fcfYe3Gh
SE036Ff8FuOuakot5cK6eNr39iocQhZSuiZm0Ast+33tzOZ96vKuN4n+Ax7ovl8SwQg218f5xOfi
NUzfLniRHsL4QnUkIMKtLl6KWRAbupoF91wBblcSLCXRNHPcft0H7laIVE5XJkvB6vXV0Esk5/gT
JUek4+U70OlNU28juRb1NapK2/2bXNHtQ9Rz8g0MxTnbKdSouVyxOCI25WxFnBGuUdY3bHYom2B/
BNGD6AdvHEhUg2j35aH1jY9RBceDmEAqszhIkcprycnEprT5QEQETEkW4vmMGuR03xVSaLaftP4n
ZJmVgJvdL+gvaCxsRwlwxGW2tno964VDbh5jUjpvOtvxtRm7VYqt9agNLF0sB1INibT1amVQjpCQ
WySVSz2nrshHx/b2Fo5nIDSq9UGCut5Jj1Amilkp3m8oIn0I3keA9r9ilu71G1vuk/GvsCa0AoKJ
U7l6Zb1Cvt3H/amtmFnlMjuhW68i+W+7p8ZRwI4a014/CtRJld+1L5wWTJzzRSddWQrJmQ+KcfHe
+ikjf0VqynA0a+6DwF/FODDpHcL0ocPH9okSevn49JvfuQS4MKT7csQVQyqlpzjnif8bzSmrcGfS
IG3dZAdfpx+JkkHNNjH6OWjILWCAikR9RWWbl2CGLEdg8Re6IAP7fMPOPuKnn8n+RmeTbxNBswY0
nj/vyzxuGFK343s+3uj1hYBs0dVX7wqx+iKrrknagG792mI8DcXfyH87iR12WRHUzu9d/LHsGTA6
Z1YC/btWMWeNh+KU8r9J9tq7X0p5cEAZaMSmyIkHDkG/kCv2py6vLx2Oy2nNHU+h4nJy0tw6hG1I
fybo0g6CylAdFzZHBGT9lsnp69sUdQMcZxqtTLZscaLtmaVszQnVAVQjmpniUuqkWkmwLczoAiuv
0t8pM49n+Kd09T5SYL1jBudm1ptcKSAtYkd8t+KYCkERZvaHSS7+mPqAS7JmYo/Y7atMVyZumTTM
BNL3cA+yWZL0Lb+KWESPuyFcpZLb0PBHXmY64NKzGNimiTeLqpwDtmVbLPjvnzYcb+J7ir4KG9Bs
Fesl6qRPHtEoi+acXGNL9eor2fhbR9AM+I4zbG6zImg6kyYA3tNo2KsmkyYZ+tVJeNmJ6LLGxXsR
qupq2G8Gyema75gABcktfL5mcWUXGar2nNUPImw9/zY4oxg5mSjM42hK22zdl+6at5YccuINVcpP
vj2nJNHW7d3+4bp29LlhpTkYGGlxmXuQcNw3srgFhPkBO/a4bm3c6/2htIhidLT1QVvGJd6bnylL
KNpBi+p7X+W24CWbqcmJ63eQhVQ3P3fYt77C5+K1E02Ukog53sBDBVQtJHUqafpkdkjdwb429BAr
BCEj/dTUTGJUVB8ukYCrfRY+ni6PiU2ZJY1jVdRRG4Bo3nidfhcZNu1HlWijBSzyQFfnPFIqj6rt
jKEWEQbm3brDK9ErodNjxIL6EgCkY6Uc1ow+AcCJLenrG50oXmR+6GMsCvAFijDEAHsTf2UX5DF3
UQ8PjxuQZfDVUxIVAS7d5V/aDOblZyVfg/3yf+FkC7sflx4Lm3ds7IPqxORyPN5CwyCP4pywNNKi
I79aBQJ4Q0rmwAstGXkCxEDGCAomA514+9L+spEuHYwmIcGJI7EQ1AsunWR9mJdV48seAlNlmmc7
WgGVmF3ZKhIJb8zeGkcF9tNpC1c4cxAC17B7vl/+o1oFTspHV905WMmUJIaqAsNVyedlTdol5XTJ
giGc/ru4efgXh3D/ZTOlM7tYA8MMsKZigCI+yp1q/St4rDxbrvr3Z48yeX7RnXTtpS1KbAKTNPhs
PQeBdRnN1lcNp7p8m47k4EYycGULUDawAM+hI2K09B4gIRflGI49QdONIqMPT25tRJHmxqS5J4OC
GtJHuBT3rny6NAK2iE96OXGWpp07veBuL5bEWzhCctNHffmEdN8BlxqVK5JMoVNqF+1R9k5y8efN
lHDC39fI/6O9Wj9NJyzGVOKdFUyLkM8GPymjKQgowTaIKBncxILqT7/LCWcioJBznaVMDE+nZIcH
GeH+1xbVRMhl6PEQHWbtiEt5LsahDI3g92cw4rkpWW0oavkCL2b66f0wZXyl7s5KuW0+khVMRYwZ
EftHeVN5koEwoqot56S6HHBcpveG8OIHmu7gELLMJuLR7bUCOIVWrVoo2vb3oTfsCOyecYn4PWCa
cHB2dGLkyszDQ4PmfYOo4fz7cWBxpm3LfGIX0j1hmajAjVsfBRNrbRyo4qwmzLu5weReVAkGh9xy
QCoKSeCXwDQI7D2wd1olRBYZ1m6gfopV8E8LHnSKE7KiUo4FxlaWGRr3xnDwd/XPJpfqLvT+IP7O
bGrulhmtAvXtX/fPp1xm4SJ43OIaRGWrkRQLRKYsPr1J7ALX4Q1nqfytrOqCELLw37entbtKD3ih
PhoPifww7m+3iiGo/w04cuRTPUXngXL6fnVef1UCy68liV7EK3bf/J/8D+7EdJcYVGzIwHMlv5OS
CRxLsJWkYFN7KgdVSW2NhT3+gZnOKyxC+G3iYRalCbBVY+yZPjbd8uJJPBScooBIcy56PoesZ+r4
k53GC0gjscZ6pl7Kz7T+MajddvujGsk95XZOJZVBJdYxW6WzGQnYDgjd+FNyYvqgKJVy43tMWCV3
FINCrbL87C72bFp7r91g51BB6D09mghPWsvec49mqO40Mcdg7k+pTySQJNWpKmp+AcPyPJlpA9U+
pzZ9HI2UvugKU/+viX+oJy0wsJLZnzK4RXUcpsn/U2x5uveBdS1o29Bzq3YauKSvlsG+A8QHJ64i
KrfVKmxhnbz7vBKc6K9wIWHVz0CyUOCt17A7g1Ujp8kawkfzgBSAS1nB3QUImszRNsAhnjmXMxSZ
lEyAivIkVwdkeOf7putPHtP5stpySYD8ofCONOqRJFOqxLTneigwvPFxcxbaSCEzGuAMkTKCsDrn
Q59zU6kgAkF1d+UOCbIId2dreN2NXnsNU84fdXMY/eaieaTYhz2RPBhh/h/wL4LgTnJax+sKF7zY
NyJx1117pvxLweIb/cpZhG2Z1gRKs7vrNJcSIAqQ+W7OzQ516I9EAX4CpmAjOa7cM8kXA/7NvH2H
gptZofyXs6SR10QDWyPehzn44KDOlCn+veTzcdw+qxNBjHVxbENJbdiIGmx/iqqf1ZurISwET++h
Kbg2L72DSf9FsHGHa8osmgbtJa0oKP8Gs3SbxnHA6CJiCmkFlG7F925gmblUgBAMKFD1jNT43hez
O2WwJy/NddkoLF1aGrpsdzfGFvD+/KHMhVW/OGEhvrmWLRN4+wl3qwWsxdeHovDFx3JmIYW/f0sK
wtzHQ3prFQ6Fw5etiJVs9sqSHmsG7X0yKhz/EPM7BMDWk6A44Jb7p8LzFbbt+fSDhVey8x1I1tp7
36q3x1tPgLFIYNFwUcYYc2G+848JU52FksXUsO+rVbrQSENcVk707pqgLOfBZiWIL1hZKd759qM/
SYVABYbAh4FAMaIgPenIcb5t7oHhEJuXi65mmH2qX1IYMWBq5/Ej3to9KlT9yEvazLs6coT0+oM7
ZrnJWsTvwfnpw1sbH17XzF/3+baJKLffIsc1UGrXuLXfIxzqj1Xx1PdjBEN1vnw9VgNxJmFoaKY4
hiiC91QOqahSOavAxF3Wi8bHjJ8qMYBwAJCZxbq+iHiUgqrIRzRZb48zm2LiVQeZjVsrg8CXhVBf
DqQr0qcjRbRLcl0/1kjzcmZAOz3xYGB45QWJaK8j/60SOnoiqT4o9STnX3U7VpnVYv/pv48UtUqt
nUK1aMHkYkD8ARfT9E50lGwKG0zTp9tZYuKBZjTTNKluX6GxmbubSlD0JMnwYnQIWUVIYI+DBTP3
a2mcPGyOW6TB13gBDpPZbDqnxV0oR2gR09Xdw5MVc7PpzMKaRds3/lFIlZ4ql5WmTFmJzCocr8ic
VNkQN7Tc1WTQAqhBRqueF2Abx2oPhqc7BMFlJi0h4nKYuk7R92SS+xp8n7zyYm9kOwg7CSY8Z/XU
FSa0eG4kavbtpQO8TqopTFKPLxWxoBOSxRIw7bTvWbV9RWJ8V1QWS4AXOi7Eifmn1gBfj8KQLjf5
eeDcaR8bxli3ISG7Q693c7JR4q308WJIJDffFKm9/n/V8W+eVtbiJcQi8cCZ8ZDMKlcl5BFlBe1o
cquwPvSlfpngNyNGH6ZGykvtut/8+t11ovCt3yd9+UtcCTCD5UR757DwUD7NhiQA0Rqc5HbtVyek
SMCg0/xKX7EoooZn19VFIUfUVmHcbcXm3FJgKzpjduZ/mrcuix6velwtPu1ddM4ZsRb3n8hdNMYn
lOaMs4Qy90UWws20o8N2UpU1GCs0jdxKE2YGBdxXYvDpsaF5vjhTM2df7tOIlDCpr7PCEXzJBi9s
X8M6UOOBA8Eoe8BjEm4HvTAiaG+5RqLpfxZIFTLIHucRJz1lz8+HA8IiXt3b+P5e0H2Rahen5SuJ
BlHC3fbAqLY1kpc8CEfSAFkUJv8AwNt8uJ6x5G2SEky2vccwHb6/LZgfVhn2mHjspc4NVDbFEa/u
zwWgGQIibPZ1BX0Aq08rZ98GmJ+4mc8QpBDoXoFXpLNaD1qSPcnFG5MOWL21HclB7aJ8yiu+AuLf
iXshTbK88B1IzgNizAFKj37ksGuOOJD4IrGjvHYEemw4GLxeHYCgO3ELFhMshcYPmWs++ZF/smkT
rz6Rl2HvC0RW6klw7iOmZlzcTmdUDSBpzp2DJPKco+QHKjXc8jXkFl2L42I5ub0ysitY1wAf505G
hO64uxqgTKqroMvG/yif4m6fyJya1D9S8KOjGOAF/Jo6nAWW/FFtD6O6s1tDnji7xCQKHK2V9nGw
7oakPvbs3T4jlXGU65QHp/V09XNL3lDXmxEx8qNpIoclF9PT4uvID5/QTF80HDFxj3F4z7oyvWWk
P+A4g7UeZY9sd7gPXkTjsRYhiJz5l7i/Y0Ck4g8SPUPPi1p1+41NLizrAtf3biE0VWykUByuAHu9
721xMBuTOXpyZvUQt5FxONZ3b0RWXcY8fxhTPmEZI5ooHvTLo6lZXIIuYkshSOvHGxzU2HsRjSTK
E8PLBxyiDRYZk0L087krESI2sjqZBhjBxghx7mkocF8dEAOfzGDrd86ApUmMiKRfDj1bnH+5iMNh
iyNoYl/VjxIyeMvOhV+nIehjyxjVWz6cNfDCyMl42vkdMlabo5QoxT8ob7+QdA6o0sH8Aj415Q1D
olxBkdwepm5voq8SjEBl3BoY1WLzSfiEtWVODgIKCl2v8iMZFQKHX85R1h/J+Lmh3YkOQ/9SNnCp
7ShoZNYmdsD42uZ/EWvd1rN/q+zpc3kM2K8qkfsmOjxQsC5uQanppKyZCtjQWOt2Sfm2cV3tCVcG
MFQ34CRF79ANa51RyYmcvT2JpSi8dxcQwKBfyI/Q2y88pNkqfyC7S0HGzQf0qiiSKk1O+BXUaTze
Tii0f4BZ5FwxlVSrSjUi2ZWsSGDnG3cgXf/EkXhXWy/ncybUgdyl3QTR/vhRMIJur3VZ2du9l3GK
cK6vXxtSKZFN4dBwnrMNfV07mTAa0DcgDmal1l1HDFvqNpyFwBq95m/yI3n+p/zCmXmtzbNBQEnI
bb+QFV2FGH0lmGVYkZlm3hzU1J3iWUvip1hlz668YHUKK/576vUeE8w2twhj+vwmIltA5wb0HrYc
LR+9zYlUlx6socikvl5qmLPlviwrlo3yfJLOab7GuT6vAdXx5SNPU42t9SXjYq4DwWXpU/mxSkQG
m1g3VR+bLbcPIjys0LzGcf1x+fQVoM4BklmGNsQsIri73mJP7T/LnJS9L0tOXb1LnOuzouigyU8o
tELF+OmGxfRVG9Y8IJoH4Mds5RIbOCTn/glxuhXwIs6YL+y2ztSj5lpvu1MXrZ4uYLQNy32uKhCM
3H0p+CfCLLe8xWDDFA/Ex3RMYvNa54xOBhcpHp4JbZyYnbbiQidK4f8FJMTBaYD0pPZV09PWr5ex
2s71wn6z9nVC8x8Hl1K7S2m/7nyPhh2mg6Sw0mW8i0g7UgzabMtgD5T8EZpcFYbNDWJcfgZZPR3I
WaKTF2fKC+soiyS3xNaZCBsjTIBkOHx0wVCxYBA0xUyztmHppqu8I9fqRtRtJviXA8nmhIUQeEPW
yF/zkqwSGiWjrxtFK4WPY+eKGulS0SOrCIm/E9f7ORDVtYBvm2THGCiWNh/6s/di4hSdqXglchQj
+1+POfT4O1HaIGQCBluXoS9lgFC6euOgaP4pr1NI7U9YAyFCuMCnbgXQGeIab7hQvkHU5lqui0gn
ZAYrlhBpMIdhmofb0ZoMP8xvMpqa5Qskw72dmeklKSDFxCC/Zi2eOiYpYxxOerMFmxTTGuv5+Fe7
17GqS35PJrdIVXZrC7yIx60jTu9vKZ/+8+yv60BZTegZXdm8ck/wJk9VQIQ9Es0bzS3e/Enam8wC
h0x1GEVduOEr+L6cHJvzSbsxctd/DlhrEHYZvmO+TH4N2i+LRB54s7UxkcuJMCm3AziqPZnQZrnJ
QehZTRkYyRn1KFEIs5fkiBNpsQhuu18YEo6V1CBJQ6ci9bibhLePsD1c8vqvMr7pqOSM/XwJfjl1
FU3ilKo9MXLZhp5s+K91L+Tm2ZL6eyD0fYVh8rKW20WO8srE5dl6YCmvT0+7ILXib0h26iPiBDjj
nINVWbD0phSGMqTCcTHPeWl89SKn3V0wk+iE9O7m320JnCxNXpV9PtK+uReOPWXPeXvKPC4RpFO1
e7WVCujyomlKYiJ6W9j3AdlYH4y7EH2hZYuIjrGoJozPaS2etcQBEC4KtNwbJUSVsoMch0Jxyo0M
mhhhK5hcNo0oMvhuEA6wv50sBT/I1FsCMy98angE4MKi058cRENYYhdavBFeGTVpZ6llqZCZJkpS
rmelDobuklPpFQaMJbQOH8qyE6w6/h5ZIC27ViuE3bDDoFgWg20fvHHhsFa/W1gillQ9u0YfMgul
cFLHI9ujf7wvX+Y4GFyTl98KBv2772IVAnrUusyeUYDt6/k226z3OPz1y+huI6wnBV6MVqOTXvUE
YbzsDU9nIlz6Fz9gmF2t67cbNI3ZyBAW1MkyzOYmnYB9xVYnojkLVhYk3BPIqxR+dwhs+EgXyM4i
sLsUAfUmSbZZDqFhYyPmSkZFUfWJVSl9kzB9gSCbFlQbWnZfFHKUFzvZEzX/giwztk5XjfpJ0EHx
0uE/uyrPmxAaQ4fxcFWv9iPyXCHBMq7w8FT8fEOJc94/X8kIImav2IaHFLg/l1EYpe1Oy8b6xZmE
6+yvqdeoudl43bU6DeJm2eOVkUpzB0efzeAE4G/HezJ+QX2F4tVR7kw0f4T1qt+3TQEOu7fBugun
tis2tlPsTUWooAaCvdvFiuSLwxo9kS7y+lSo//TfKFK9S21ygjHH8cbo7Xg1JJK/eUdJSPwFYbgS
Vp6jBiOMR0tVrQuB5Kasah34NQsw4QcqMdEVK7if40UudKuByG7iKl9eno3oG0gSwrOxjWJZTy0S
gTbNmuy6Q1yt9+pepz7/C9Q5G0qkdfydOaYkoeSpr+2tb6jq75yVSSmDkyNvT9XfgPGVmyUaHNIT
LouKlgY2HkE8CM6dEwyxcOnfwJyGBCLYxntWVqzbhBvQIsQ/2wiGgbuSK9DMd4xfScYOQF/JmQ0Y
BHLulvqRmBV6vvIH6NMvXEPPIu+kpazy4Zu7MQO+p0imWutmGfztQMg/WOZpHnOZrDftg9jAbQ1R
7vcQ7uHsG7Kopg9RHsNqPVDK2V5NpJMBPHUeL5utcUtHTwAK9Y81/812J7HUrE3mU3vhLkh3Ps5P
/05dggozeeY0NxXGBRqksOblXwpyWxuDLQR7uzCB5BkU1A4YAFO8Uw9JGuiXZ/GYfKayXfymJG7/
eN/eG4D0aZPUB+eYATaz+m0w8D56fGV55Kx5R53vXUW7edFl79ud4C2xuVg+7rrxousFAQ24tML+
y/j1PLyohPqdjX+AzmcolYn5x6a6hS7PaCg4ptV5E9/YmNruOE3DMbIET0Pz9S3NlfqGApw3WvvX
z+7ML7qWD4QgWPIpj29Z6zyg+ohAnhNIR55g9/YUM6+H6EGpPRK4B3niMlgaJNakteLl5nd+iQmF
Czd/0gt9CAdyQW9ET3JghcORLv+ssZ8KWJvfOSVBAde0UksE3RWIVjDBIArcZ8KnMiPDdfXhBmOy
+d+rtEoAh86j+hRa8O/ixm+n2sKW9WB3Wj//7puBFVBD6OG6s4orik+m9NrTPbH/roHIXJfwAqa4
E2aXpw1vV0wrGJhiWABjMd+ot+K+TVyyGaTjefM26WqCYvjJ2II2sVh3bSApiR1e7mbrsKj+eoBD
u3mN1nfImE35Rad+s/GZGHW4mT680ZS0qeZYrQdkQaNSlavHYeJblt3HKq/s5Qn89ILtzOz5T4NL
gaS6chXWNDr5YUzcBJxz7wj5d/TNg1ggLBsZ8C3+07NnjSrlo4su7W+vMRgYROtGz2M3tVX7zKAc
KvdWKf/GvL6qBhEGycwCIPmYcTolOStACAIeEGwBAc5LcuwPEj5IU4Y8KJN0qUJ4xYq99JDf2SJp
ZwOwjQ/CKJpUWLibT9vps/vWGTtZdx62PzoNrIdCrhV549Gut72lDSoX4Nq8xmr3G3mnSE2VVB0x
4+qGXwMctxJnBqiRBCpXJbAdwxajpPw8tSxVLe/MKoVXyArMqDP17vWqd0/ag6sW5aWmpRgrCD52
yimavAFnPgkydSf1611WD0WE4VOFZ0ffwmfTPZY5nbnn3x6Mm6F35bm7pxLlendnOgXv0mTLu2Jq
4P5cUqK0jnRU2YDou7eHlzgbpCPBGHga5kgvkmTe/Kl/fGqWbgPvEk4AeTTSCvCIKQIt6izd4QjL
DItBlCmJCvphO+1VUV5/tAHEx7eRZx6WyeWGg/ZSRPL9dJ9bTAWbFMsyOs3muvRQ1tsNW+GJu64N
Coe0vYOt/1Yjpf6Pq5H7GuSToLI+wyS5KVCTbf6ZwflqKH5/3dMprQAXSvgaMnAJ1/nwCLPTDvDR
NSgCzsW6cHJoQqYPCdykA6/nCPkfBi92oHposAjQxMOb39jw8rPcSdqUBz7HimWJ+w2k5C+TL61X
Hki3gLB5RMTWpVaeLka19gzACVM2jYbFa6CD9W0iEbF4TQHKs9DWVpMMSUT/p9GK2K782jppEtw1
Comwe9kRYkfv+Y6J6tGqyC8T3VS8mVsVGHHc+hxnpmMeHRywh3CDNTXRKyNTMjTCh6FSzMU0+zf8
m/7/JJ0vdkO4Q4tbc1q4VxXpHi89BSw7fr1ScOK/vmwumAo029eBwPPuP17QYuro9VPMSDhmAvnr
tcCCBhYRZe2nnzCyK8ZpPRDGfafDeIb+7nsLRhCJMJOefiDe/oIrxFdqU7g3qCK9u5dgC6jXPh3T
yvoE3SSBLlmItUNtv+82MCulJreMy4fei95unEqaz4Jzgsa3OdiFTl9nZo5YJAbQU0vbHmVggQpa
9SwRAIdXIjrPu2BMA8Dp9kNyncGMFSeS6Bc7Pjk3mCc9bzjqh4gUH6CRpjt/oBhJNKKnmTOgY1uA
6y+5CxSdiImSu8eUjatQYoxN93BRd4DIwVxpTAjBpS5FWm86Y4ZNH1GJvJffQZ8TmMPqs9JcaBFB
K6MJkqWyWdwZcV/MolNMdJCr/ggYbnrOL89iLeKtL/0p/uyjIaAJ0Sch1kCXCiemDkKRSCP6FQyY
QH0LxHBOGYpyZIjtC2at0B9Iqr2zZATg8PHUa+TWqroF+pYZxC7IBoPfnyjv+M+RTJd1ZuBN9H4c
52LApok31eFe7oMwlqgUfTkBDPhmwwyr+pWrM+SkKSEAICMtyU4dNZqf0ZUb0jUcWg155YwlKlq3
no+E7VV+gP5VJ2IWMm9uCeLPTC1c+eNBECZIkRRl9eNMdRVjU5Pk2CLP0A1pYodCe2O6vRXUkbmk
imi7BZHY9dSG26CCyt/+B4UXZ2FZd+pcE5ZkSN9bWjhCiJJtEuTq3spuUgV8QuLC9SN4zN4gbmKE
b2ALKa/Q2U+IVt6kW+ZklTUo3i6Yw53RMyaYCaCW5Esl9fA+aiMEpsSSgb/F5r8p4r43I0WTO3jT
gzIs+SUw4hE194kE9e5rXh5zmXKZyHBuv8CnLfIGD2NbD5KQjsmWWjjkAVeyoNET+gKbd3PuMQAP
42G8BT35mTg7F8eBepUaM14SG+8b+ZbhAJvOtTFZyHbsiD8gdGObxfF951ZzkgJkBHu51teZ/Fpg
T91EmsES7pbTXkAXtZaRFTL3ekOZwcg1V93LncfUZKoH1BHGvkLathaoKgyjhWhSBQl5Cwks6T7o
sZV93GK4ZLNdMLwWw6sD1RibIv7uzy2lJ0WSjjSafqq1lDn7WD8FP4B/nzV5WQdDfiQaPOvYzOXx
8LTRvQt1L03Ea5LW6lQ84bFU+nmaWaBaWZjileYSUibZFw/VdYwE8m01Zo5SE+uJtwxIJa990SWp
aCH4TVLO6ipb8FIIRGR85xs/IN7V7a4G/A5UufmZ7quRnXe2TZ1X2UiwETWrOYvOvViRJN0dPqlG
W6KAJgYUT2nq0FF5cXkxnq+D0/dXtS6OV1aCKlsAXbKR3+IKl5hau77IE6qnGkFt+w6z5SjbcqDW
6aPkwpFvXo4OSWbDlAaZKF2zTkx8soLt1Yi8PvVck9eJQuBdPj2D0V0gbAEwbS7RcIuJkU/tcKMN
hdypIrMLbjEn7HDlppzoNQa3hGATq9x7ov/BeydOTaESrE3ErsNcZeWyzn/wprqh4A9RvIzmDUu6
9hDqrl6UcPHEQGRx5rNLTIaUQ9/Z6NF9ArOX6884PkwldxdSaoZXhx8grsTmE+UZ074A8PzAoIXg
+UHv2+7onRR3TGpTL19D9aXibWs9KWqlJRwJ6hUSn1Vn1odm9R4XF8zkKY3RNDqRzIdPuBTsP6zG
xahVZjyJ+8IEWgNzMapuRl5kWKEntKV1hWYaCa4eZZ7iZPNCt7J3wOyY0mV+d+g95mfzb7+G0G9J
YTOQ9+Di2RE823VHxOJnVXCYWpuR86dS/KP37lXthKAS95L+YhnCdRS40rORHmgxCVHY7KLqvMo8
OfgUqbFOFQtVHZU/qZctmvTE4co3/yNqtDqzwZexVBSLkgYTV0s/KeG47bPPI4dcA2bB0TYnc0q8
WJdUa6si5xcAYmlxqcaS16uq7jqMZG7GktYtTYW2QMpAVOcmNxPUNOQ0RQwqY7gRqtEFno/V469O
/lvh9wocliEJqXVp3kSKojuH88qZS81E8uLxlvs8wgM5UKqPlT3at36nB/xYqN8C3iN+86F8vEPm
2d3TYidyYoZ2H5gprDQsCSIRvKfdEU0NJlR3LBuQTulXSQJbOCkJaxsTCHWl0J1K3bNzDnLczf2S
1baBTwusp1niQHzxDg/RCxQMF1x+3JhoYh3kX/s3Su1oqZgX7hR+YTCLbYLeZLBvourm12cn/7C+
IMAzRmmDIUZvNTgTZCFK+d+1Y7vy0cHysKsx+kwTd5sxiGCIAKEZ7Bd9LTaIlgDGjVd67myy5lP1
OIi1Il8dddQA+vMq/0H3U1JV5dX/L6TlMX7yIdEAE6GvYOQ3wPoAJk6TqnrVW71DWolm/Pm27XsI
1toFAuUx6N9HqWt8y88/8Gywzzh9UauoE7mKRNtGDwdormWmWwqVoXndqQTKEz3yJQus8ii+rd5B
8zEA0bc7j6uEruTRnV1IVX4ku1GuVA6pxYJH7DPBndvlLPAD6elwvddgPKK4RqcfI982tUZynZEH
2aB0jg40h8A94fuWKIsyPpweK8dB7URRGXwad7OFX66e864svJJi0WZtxSKofRExbHB1RiOA9Jxv
M6DkwBnzH2Gjj5mz5wwWF+z1n9585xCImDMXZT/qRFjY12cw7P9Jr7s+Q5MCY78lARJeBuPpTali
1Swp/DoT9AUVTIopFRYsxN1xMCaPaklwPUx9RnOaJollyWuwcNSFG1moLp0ZLIaXxRYzDA479+lK
/1o/oZRY642Avvl4Hc+sXPyYSs5+i+1IwFHvS17iQrP9dF4IGwuPbvFYgz1o8zmUDllbV/2y0bEF
3JiJLoPKUSUMXpTFS+SoFeyZMoA34GgRWtyaVltxop1BmyvE6dKY+OWKyLngzmpqKItOwc3KuGma
M8k8Yai9o3mVLbPulZ6sC6JnzZwSMQOA9xFUTQgudJXbyTP2r91lD4WMu3/QdzsBw69Q3TjH0KeZ
F7yqsnyVXW/E1/zOxI1XqhpHo/RgvYzM4GCZr8XTgKy2U8ArPXtKxqI/QPZWr6maJV8IINVS4n7p
6XbbV/FV17nT2BDXx9u3gW1pb1zgaM1v5HtANh9k4XHC011imz61B2Zw2TlXBTYbB74ikvvdZ6Yj
4m+OG02agi2dxXTHhvJo9EFwF+Q5OOe/0G0emQDQmXRgcTLdNwAe8RkS7Eop/XFU23h+SNWDJYC8
L/taSdHuLIzLCBOBQWWuBIBTbsW1wwP+DUVLOHZd5vvP335h5tTKPoKFYF7myDHrGmyKSkjN5EGt
4L+EpNTeEW3/rCxFFRfJFHcqPnAr/24RYZng2osmObuqm88Adx30XLOZR6NtIxNZjnLPLKqkgHBD
6wzaEY4kQr5yXToXYkbfd0wvJQ9Lj1IM5IJkZyAjOSyfPMalYLFZZJs18MnDeNtdIPOfTsrqohg3
+vQ6oFCMFb0gzpCHgnlbbUEwNmo8zBpX9SUIkjKxfRW9JL4nNJqtmgDwaSvsG2c59ggvdaN0u55h
6riCHbYux7tqtQmq/Qnnop00FRWqjl/wFVobuRWBnZDi1/BZIajjSbp8sLyLMWWb3s6JNfbk7QnB
7RohM59UL0h++DdmFwBWx0QGLJZRVcWXI9/gFh9Ccq101CKFBsjpu0T0RN7GnjnTmKR1F08RAvs/
w5/bk+yyoNWBRG2SygnwawBOJLzle1DmijOcwgURSfpTy21jkBBkkS4g1fn6CMccTzXvIO/tXEK5
vkB5We/NzV80KARTHwg3NQN25y8ybwntxTPq+bwNYJIrv5yJRB+Sn33+HW/RTMM5kq/BWgjl1RsH
Qq1GJx15pcKRMQf94w5lraflmh+AvV4hZkGFIfqyXhS/ngYhee/OcKXJUshweTDXKU3nDigX/uKI
w4LPVIriDY/GnMDDHf+GvhpjIwalhXZiNvehN0OZBlkLJlDBm7peLb0jWwOPQnLvOQLPzVQcNuA1
sW/PFV7/VkOM96vUX3M+2c1iR+EBBrPwCZxVhLo7gh7sLDM9EecMh3NpXsh+N9kDJ+rO2n/lBnGl
TEVLUj8v0Dr+SC7kVrIlNQc6xSNSg1ACCOVszmY4N0MoDJZa56DTQPC0j0Li+tUK3g3z6gCPrQ0n
5RWAbf5yj+RYFjoDBb35Yclbzpxcxpgw3mDV3VWzZXtvICZlfSHnJ0NRrzaziiNHagvYGLJVb9r6
yhtOAW76iQ5nbnjz4QuCbNaIJzsIvGfjRNA8vpXDT95+T8oyNtOcsqnQlpGUcmY6tISvAkOgV0+D
KBZQ/qPmui+2VXMFa3Rb6QB1QW5h2LlDQB7I36N6gZnhw4KCsaZ7welgMVzdfomC9MB1E8tn2jKi
WSUnfAsI8vbf+E+feqeY+bAFFCRuhP2jxwwM0XjIzNtg2exEprhGvrb7JTlU8CHevFny7WfTh8Cp
CQcIuBNMprNd2wMFq429/t4FXOjZSTSbjL7omJE/k59VIV4ENo935ZnYdSj3DjLfEe910z+2+E0Z
MU5SPHSVUQjnGI/Xi5xDpTzR/DC2Fq2uoLeJdEEH3+TrNdr6ZregQuZuI0OuccBWB4JOKbuc53a4
oDQzmBrmQ8z14ToXXdoYDoVb77y6GpRnRbkMvOCozuITSmk/9/4AlTOaHiyR+3DxHOUiq6h2ayGx
HtQlq5FDUmOumfG5a2opAChh8uoF57uc4RvModWLZ9aWqhICbWiwqyyqbBMmzW0yJZZ5NFkPdOnR
nouBPtXvLlg2tRxk85xrRZl7q3mxWTArWU538vPKNZfEvkdRctvijNe+8MgfmiCzuYXznN4IgUix
vUiaDxNWvwjMw+SQH8UT3QsO+PoWG1skTCrb3IolPQdXzqugvO5Elnwr9xe4pwlJF7slH4eQvpgg
z1Ocj9r5TMrZaZNMmpQwNGct89ExCe5eoeXbEpvFvuCf7HjJsMvho4/zj9zKLjYsm4KK/NZAX+Un
AslZQzB8i0OpnqKJebRYRjUFLTQURtxuq44hVJkqFVEDGzTFRbMSANfFUNxJqnyoL2cabfMi59vN
b1cVGpWZJpxN+ZTbMJeIRY3k8cDnmacVZir8x+zzoUYd7eaPbAYTLgmW78YEoQfK43lyt1pSGMuQ
N6HvJgzH6cxWuJ18J5Vzcl6a08wBrbkVfzAYrVPwjT2KCYpdEIH4Xp8BGr6d+GmvKjslkTmbbzew
brAMjFUPvzltlgo1IeC71/Nup9uRDXoOIqBhg9fTxpv8DxlMe4Bl2sU2ywn2I3DjE5iqMoslL7uf
rCp8LkJecHzU9QyouhYPCqoOqFQGOg8PGby8R0OR/7sjN5GbhFAd9LTvG+pMVwjXHyF9UhlpaJcj
fnxBe6uswTgZ2MbyQ5E0W0oP6VXasOVw3nz5ZSF4LriXEGBIbLU+FlAQtEJ9sZffcJ3/rzPzqsQJ
3M4hVXBGK2khSZJ2TawWrYdd9sUtHRBMh7jUU+ZR0lv9cB0mEZ9pRjVqZhq0AzpBpTN+mh7JEiHo
9MBE1L7jCakN1Hxle3C+4FjW09U2odFZgZlrHsRmYVJiiHIa/sXjpFiV4QphhNfcitoe4oPeIbP9
1kOtk2bD0qD1gQs6BM1l3W+bOKVp9OcKj8OaY94AG/sL+4eHh1kYghUHp8vvK8UItP0vJqS5W8GN
zB6Fq66zTGj6gt/vstPUDLTltvbUPcAYc4Rc2yH1ZJT2xT5KkUXU3gscJRV5bsLXlkn/Vi93MAWG
zXhH94rhtib1Y/MgnBG0w89MZvWJOJcSSJkkEdtnKpOn58LuwpgsT5PfbXJYdYeLWWSYytM8jg78
Y3j+lgLfGV6lV++/79ACMG0bynSsq4KvIPoW5nQuJKOc8LXw4Du/XW1uJ4OVMIk6qaSxDur/ntDD
nRokdPbIwiunUBJISV9OvTGXxzz39ZEFi+2twz42LRxskvN7ngHJ8K06E6PGLfHSG78xgZcDPACA
bmbO4rxw92QKrDI899hEnJJ/pE2KIqkgOwR9TT6EsvrkgxJkneyGAnf/+Cp1cauDTQJxIoeTvttE
e0RL7hxKhoqBk0xzkhFycsQsfxKKx8YZXbDpSXHFMGIDlqdeYKHJoTW24IsDExnnSrZpIpKBvyif
mYXKh263qFd7W4wLxS1nHA0sBK7yxKdjkMaWCpBQIa032lUr4ExYYGLqiz/kiDMMDCTHkZeZRMz5
zA8zV8DN4nLPi5V+/l9hOp6Fh46IB7veAa8qxjvqkG+rPkrlpG3tdxjb2CrLpfBIXXi6G6r88CJC
ZNj87BBlRD8qHLQG7TNvvqspqLGMxYxxNLAVvPKHZb6KsxGddgZ3yhnkKGHTk2/8VDaBtBVx9lb0
9F44Pnor/Ld52pKazxoNmOnQcMBRdZlNMt0VKmEV/geRTNF7np8RR56I61PC2xqYXopvprunhEjB
kuOkPuLfMWcujgOUtsFXJibiT0epfiztAWpUPIzVYNFGrmAp8NcJfr5h5XUiNFxDzX1++J0pwCcS
rQwrHcjTnBM9SnjTgrV14/eLBNWr1vwm4ca7LBzKJZpkf5d47kVMR+Y0Byn9rkslyovgbbkiRIrK
8P/SeF+zOhecnO6D7e8F4O4Bpb8VnwlEVH6GZJDKsWgnPN980N2GU3+Rw5T1wVcqSgccwW85z1z+
DUuaouCmaqMWXTCoUoIaHa3uySmDixifthtqFUUMr+X6SssaaR+TS5qtBlt9YSUHMtsIXVNFPdjW
R6rSjnOJV/xTfLK5D+1CS+rJLM+MWVVFTTAN+Y/za585AOLCGz6pqRHzUTIS/4040npawUJ1G5R8
5zNLv9MAZaSwXE9MwBk017SxfANr2948sjhcoRVKuu1EeKrxQzBUQy2kZxdIoop6nOog6Gd0bxbb
AzyCt19IIJn7f7w+5zCYgENBO4y5xz/p+y/QXWyTe3Qi8htPCaUMA7+TsO6Bol48wJlH1iyW7aK7
MeltvFB7y/TnbJdhYJJYzxzLF3m0GnDkJfiK5zzCdEQSdB6cx50C4ZRzIzUWD0Xa8STV82Ydvr+i
gDtq/8IGYizvtPRpYdNcV+I8T+RzEkGertOsaQ8aYttNB/wu1zhHZ5KKTStuk20d+RdUggQh0YuF
TgswXWnQD4VzX3W4UChP2uSpM8c7e7lIte8TlcsWjSraCXzyM4+ov9FRwocnOSz678AEvnf41h+W
dQG2rQ4HTai17nZPjR0Mce4XwS/f+eakf1NxWBgHPbr1Myrwa5jykgTqE+QuR7ix8qerQoLTVZ6o
6nRkRpAtLk1XjGDkYO2ItUMRFykjCBLpct0OCLkDk+tz02DZl/Qmh5yfdwEgdSY6R22icMxtl6sw
eF9STu9ZfQ0rqelocXRyadQDA2uMR3KAEk4sMoy/4YAbbHVb89COvJA0/7tFgnuy7Ky5+1nMqHBm
HeSxTi/MZ8uDcx555AFqjlBSe4YsABcWdtfTOwk+I3BAkQI4885/ufpHJceXONW5Pa2kYO3MGmN6
cMyVWpPj/AB+jkJ6+He7On70pNiAakkI2OJ5DbqU2u3mLwsmoFZWMC+tSoUK3vwLvOzlz14D+yli
v0mcT7A/DZgjYzPxvQTbNLaOiRnWQK+nh5WDIub1/vqlM6I9naU2Kq7KZr48DKEnXlwnipzveHU0
2t+eIT0VCuBScR9Uy0Pf+F91U6nVt+J242OGnNaOLw/Lt9lEIzWv4VS/zNlZzuJJHEcdCnZmzaHA
u+K1P0l11oYN0JLoam7F3Rd2dTYK/NjAQ1lFC7rF31bM6QLKSnot3/uabv30cSp/BpmxqUzjcMs3
OYehJUCGe3tqqlhzeQ8WgfeXgALDW8gSqm85+YhK340BXx7xb3FaInU9Hqqw74JWBRoHpdDl1cNZ
hfriEKng/t5q9el0sLGCfptfi1JDaIeSf9xE0UvfUTF0qp1piUVcJX5w+2F9yLPmz1iufg0t6Ggn
aCKg4q58KauHfd7q8iQI9iq5RtK44eLljkebOt07qls3HuLcb70V00zDhh5tcmJ3xgYPDmDn0Gl6
9T+yRLyZRYzlaWrN5Qtr8IUej7npnbsBg1msHao3wmHPtOQEAk5hRV6Pt5Ai8ZznbWj9lgvtXNun
pLLCQpdSgfQNiCsPTMwcm7mBGBkuNtnxsFdRF0IMt+SxaZ4F+8YZka5QVrXWvSCiuiPt5H4daTt+
P+XWAMwYIMIMTjP0fJZpJ4V9QDLrWg4jFfUbSu5yM67GVimQ1LOzeEdAECjAnOz7Rvfp/Pm9FGbT
oL6JERqT61VXFdOKSVyYvd3N8Kp+vUk960Yfd6HXsnKlEceNRUdD6K0N4j4K2ClF31cPa3rW8qhd
LXK+PBl4FOcbZh8MuDQgflsEBHYD5Y1Z+bu+7aXWdSfXyGfumDADHyvHi3GI+yRMP0GKP+ASHMPK
eDdTUDL34RT1WWuULNlH04jnwvT43dEE/pdNZr9Jc7KVX46X4osv/bOEMLk1JlN0Cn1WDuxyNOlK
tSPHLt75/IyQul92jyp+UfZw7R5WMcjquf57kBU+4a4rMCwEjM+qFem2mM5GoslHn3Hlnvesitv4
PcYt2of2173ETDHhycltkfzFd1swJ4bOLTmMdiR+CJunWytpJdLeE/6YcqQwyUcFv6wTijg109Wa
G60tfr6YhQyeq+S84LjCaCM2z3rnpEPX2nmlvZW9acnyG1VhMdKUikC2qlmn/2Au7+MA6p+z4SIT
0FPEdiUxB1q87qvoMZJ9xOGv9TACICoZr+QI7ZBE8AaJrPr/R9PGTcc2wXs2WZdeEW4fx6uNKlFU
7yVzjuok3yGyi+s34DxZYxaGYok1lQPAdR0Y06oU72y/KR3BSojYCqhn13RjYFtbGvrxL//g4c/U
PDHrDZijoYKmLFQlXuMH2wYTiMFLIBQuKB+C00C2fWIHkOnFrFopAPjXIYuVosc+M7nYVFURp4u5
5pQF/R9ZJneeU9mNeiwYu+n24pOWhSnfrXSquoezeFfWiEzGcxARjYYGMQjwIOGhgVCIEHVqG28P
6MOvsuj9sF3FB1vTaTSXFC3YYiKopCt1olv2kCgszVogx3OJsB5Hvn2qklJL1nma8ddVpBMwjNv9
LIVWZZ+FoGlXhRZSjml1pHAjYsQky8fkav6zqh2YO8XwETn/wG1z/cb0C54XMIFJw27kk1IvR+rt
oXTMQt4LcD0zyWOkHbOogfT2zRd+ab1P6LkUrASZMB7LM7I3iQ8sx1bp/Of8Ws4F+HqJyfYVSadQ
mt8OSPgMhlq+2rN9cQ6QTdSPRonoXWH40ezH9vD+57RvLrlcnNIWxNGXtgO+ficwVs24SvRYUhi9
UEp22mF8gV+eXDWggNwOn3Ya/GmHbOwBLh3EAS/dvGhiGVLM8aNKcSTqWiQGcMpY3AP86WUi2H3N
kXlFO9Fe+YN0a7Yo1JTpYv1GUNGAREqPCyTguXOv/fQ9LF+vXAD7xhzCJW0Oe52ah/8kHKAqiUZA
Kj12H3ZkVEV37Jn6nd9h3W8DaFp03jb5Y+CJTq9aeMIoNsAjgTL6l/1LDp/auz0VsqzBie6U2wyX
vUxLlY71ps4yTeZazMbtluY5J3kbPUMCp4HZ52MVIB4ZHUQOCH74WLgYR8aLESu6Jy0b4e6Vq+Av
l2vocIciyTZWR9d4Pl+P+Z9pWEVPAdvnitqM2KY+ZdBOAZFEEs6+VqPKE8e9qr3ChxL9bYeuVF6X
5kqCSqXTDrb6Jz+wCihUcHsiB7ht7gp9S+t7JY/XkqWkNh5ftedr0xd8ll2DyCT2U5YZaBv8rmmv
4cy6UUuoqmujGtrOA0IUj3d0qwQ2WYcvIys+ReFlOkVie7HptO7sQAv3EPsCqcnBVgnYEboTvE0c
OkysJBzItpIPr4eUaxtxf6xg8Ix+CwTPPFwD5xJChCjj9NOya6eoZufUswWDMb8LrqDQXfWJPGg8
PhwC3E8wN/PSBNusPfSE6p+I0pjmcM0FGYIxCIUyusbd4baOdkXYJimPFp/U2OehHS1pz9gTeUE4
tHV1my9Lp0oJ162qhYeFcxRsN1TXwnackgJBoV/dgsJMqLG+uB3DQ3roUFLiqnI1k1R7t1aAbOlC
HdTXgyBTGbUAwV2IlSz5P9NP9cQWpbdDXj1ed6TaCZE7xPFDfqadmMKcFPCDNN8j/KUd18miAiOq
msbxs4RgGE1lwZSfcHnll33Us2VzTpOF2X2Xpxj1O6Pe9Ngfv62vPsUt6Uj+Z5nLMhrdLgtCKEJl
eEvyiHmMWhVKO8u3rg69H4460gb7bWshJlM1EGxTuDOgUF3gNuVA/y7PvM5+CdlZYrlyD6kJfOAc
UC1Fcq/+2ZiG7mx35/1F3DVAnCLCv27E+vRFOmFugDngGkqTnqpNswd6QBME1CgfYoMbh81M8GJi
aBIPGiCthSyOKxCTz/fh/L4HN0pv9X0vWnnRQeN8lVnOrujl881Kj9avFimVSBm91Gf8qtPGPb/c
Uwa9m3ZR5Lp99SglZsEmu9PLk8rLn6bzrdhm/RXSVm8/MhQmtd+i0SNUSKWYr6xqhx4/Ke7jtw/a
nxtjV30V+np1a5aZaSU74aZWCoGWiu3UFHDNN9ndBhlMtso/hvCpJuKxdPVR/sRBb4eCfGw+eRv9
KiQccE5gdG4MX0McKn77mghtIGD+nDaJ0RORYg+ppnKj/1ugcfr/DPZZv0gMqH6mkvpKUBIlSwY9
yBZWJP/lIUd6th0fLgXljFTUqdJwI1fqqslcJGQYGNMZuR4RJG/a0VdUwU6I/t/CiaGPihKX9n7y
hFdtRKcRTFyO66OobnvE6KsG6mzrI2OTorMTaaX3aebO54D2oPgXgsQpPvsXPBNNwW+/qItpxCnA
OFweo05oP0lTkSLmNbgzOfp82v6+v3d9M4D3Uj85XOadg4CFpevTEvSfe/HMF4OQHyTArBVHV5NM
ab6/51V7iVzVsddA8KL6MrqtXQu0pHUZdunplUvhewN+htT1DHMy48KwUA8wrJ5y7/Y0HJGSipSU
uGQlI0TaqQlC0AhGQ3hWgqCxbviBCXpJF3gqG5PUPJDgCm/7zEIwwMn+f1mQKsyCI+/PluHJOa1D
CThqRRcFW6X1PA90xsIaPYW1QghGN6yOBcYb/imT1alc3gRePVTBA6frD85bI1YJ5OH/QCnt4TBB
PjUS4BoMyk32ajM6zaAvXKk/LpB8RK1otCTanSnR7Nsz1zIXsIB4EvcWGjijgzlkup0nlveGymU8
+MtW38joG/Aqj907HkjbOZJb/RL604PX5HUMnsNAy+xZDdB4229Xxb4n0riKBMRU02D1OjzU0PLU
hn0MAxW2yU4POGNIyIa9xn+etq0BkcBWLu9FU7Ps1VdD85x4Ub88bPCe4yoU1P4ErhaPV9Dksbgr
rWj4lwleiuGPfdJGXali1TsbRVphrNTaI3NbmbzmNkg+PnIyFDLcAH2q8fh4d6J6IvRSMBQlZH5R
M7UcuZh+nV0Gql/qULMGFeLG85GeBklyS8eMVimFIBxm5ZaUZD7qiUUqEiKtGsiVvw8jgPzJpf8w
AY4eSpjt3F+Bblq003nx3NEZgtOuwPv5I2mtB6no+9mqdfiUDqXXq2sMMp/AFxklMfy8cuvI8tpU
LXJwS0XXaIBLuNvDXYmc2tsQrkVAUxzteK2vGPeTpL9yWQiMjTuON7Ub4dZaGQWIX/0y69cKKknF
ot3p81bmIbZT4HrBttXKwqgTNpxGW7Ob1Z6cSQnbk/MT48OyceYglJ9nJun0LNjH812j82OU3hk0
vu22EP1KFfiDRbKhYlS92rz3H8af9viMjUnEbQ6UDATQxgoczQh3IT3J8PsgtMagGWqzTIaUPDNI
CmBf52rNeeFyYSsHLCUFq5rrXbWj2piRHIvI9wVHQw6GlYaDxFqwxhdvLoHguwXY44vWu91mu7E/
/97w0pTQIOVj/aBbnsem9mz4OaU5R5V7/Aaa1sXjlIdD5+F81EbOsciyLdCudCNdsSuuMc6mNJcm
jeqfF11Z3QIMJfUTPzGTVeYWje5poBsz48OyUCFvRm6umIvKiL/8ql5jqHatb+dKA1fr0gdpnSVK
SOKL3sFcb32dxuYZcXF9bTsb0gOLxOZK+2WDtGqxUW7+jDLb7vLTyuPLnzoDphRgkRjdKaaCUgIN
UwKmdQ8lCWLcYQ724r+lL86y9zTDTgQpLuyAfIoRAA5bQkst+pUYvWKdBi95Ot2aLjCt/sMVBJhK
zC5ZkfNI5bqJ/7XIFj0LC5+elZb5fdkcASym11jJnnwWs8BvaxbK7dOXWZO2f99HPWG1VxjTD/VH
xWGkbpTC5epHUjg9lcdRhF/NDnHNjvYHZU+AA0nvIlRBOyRGXbRC4sSUw5HqNEVzFbWWC+icfWLn
kq3d6NQyFCunrGRWWB9jm2fb8WQHgXCTA7oSOdR7j3h8DHzEGgtvytNnmn27ht3eoGDdjgew2pJI
pQiE65k3zWcjH/v1fnvQ+qAlDx8gEOPFWZqKycnnc2LAvB3FssMFN4hSlP0bUT3Qa/7uGZvoXIwm
1Oi/oydZyyuaWB+sm9g1wbaFkchvFu5yrX4PrwjTRKsE5cFNTfZBsOc7GNSnlT7WlbuqbzqQ8ADo
v4pma5hNMTpWgOgbl6CxD0SJXDUfYnN556f7Hc56IQEMT2G6+K+hDwLdyOxmZXoBN2uESQYNYlKB
N4DPQbwLSa+3sbK6XJdHspEAYGLqh/4R4FgFzNRmpz1v0lOTmyvEBVNsam7vCwbSroWWasOn0846
fYC7+yA0167D1/G/nP8WXON+qaOLiZyrhh0bqFIvx67wq9l0dEJ7hFe2p2eUsgN7pLEseQ4ZAs3q
EE4BluRNdbZVAywk2KhA6gcllZAvAflZiojcIaht8G9xnZbkz22Qw1z6L6jt60dCo4Sr5Bun3VLo
vtGEsDLlZsMfukLDTEJRjst2sIfLsAnS+xZzIlSSe1tgE9/iZVOJziNoW6oYedUnLs6W8bRXown7
NdwGpksJlgENeDXV6rtR4O4E1q0K8KnOj149VA3RY4b3U337GBEvcn+9xRK3d//Gx/HqFCW5yIIf
bHUG9h7mFNK/DeLcksRtBVlnbBzKwvr3CjBQho6O8fQ9UeckAuXklGQSC2TDAttGxZsDlLqVtj+4
tBMzOsFsCIQSK9YCOpLm4zuquae+47JUNvA8tF+kl0O1+K6VlXaI9EnRtdaxVhdCxwDxc9WmmVLq
rCRkX/2bD8WU0mMIDY8zo/qUNvML73VWk5rATavK4KBFQLpAMynryI08eBADDNAyw9MUXsgBjSH6
teTzVZEWQ9QyMdTvRBTnxVdC2PNDCYtn8XNl2xT47ElYub9csIffP2xcsRnVQroQ6ZMFY1cvNepx
uWZ3lgdj6n6IRn/YgsNv4W/noOmhig+/yImetvFbccagDSM49bg83LEnMa4jpPhLBofgp7FuIEl9
4LmOafIjN7Ngfq6TSgclYQQJGaj60CPQIT85azWVnOgfLD+OkDdibeqy0Jh6oTGd0eJX++3pB3dy
vNG6PZsZLZ3t+fkPj73Jiojdzw1JPLCgruIYmnpExtPazp4a1/V5DKkEAJD094tyiKe26b9Tw7vE
6bk9SYK6Tn4cpRUGKq5luhLMsDa31twZEk0z5KyyeO8gM0aQweJGEbfxH6ric+fZoNIvp+GVnRGF
tWJsdG/mTZzcLKUDwiDMWsO7166m9qeaZtOq446jqHxWIu9kfLL4XNGGFdrzmsizrtL0RuhMmyQX
p8Bhhfh74g6kAu5ZXnPu/SvJ4b/qxGYE+TtMyISzNk1Oankq3FUoYtG4LXIti1PJJY0k9cjE7Jba
qyqn4XGqunCyyRHuEiT217T0Ij3vpilVd9JR7rZemTtJVujGmAccxFL47EgkbryPpsXCSgFPEvC0
MlRMN0uoMrl4jceA4Goc0+4P6G2Cjize8iHinCaUU0W+oImhmT3nr/VZ+RnRH25f+38UyFc3xaNz
k//sKOoLnBLrZZa3V6X06tndjIx/Th7X+HJ8jDiZWSiaM8ctDkZpXJBoJ/JJD80WIiJx8KASUWuh
uXeQA2n3QPSjIG2n5ZcSJ/u5C1cMe8PMryEsOxjZ9TlzYIxxzKxVJzsxAbmdEuGawbdZHL+T9zN7
MkXx1MzuZZ74umykC24h9AXV7yfRMFhh54o7em+Mo7cL+mp5yzGL9ifY1c9Ja/vfknUJLnxIvCMD
Z/qf6vNBE7UCO5EbvomSpKYggNsuBOEshQnEkt36zTrxXxipAEmbN+gbBzyZaq8kuvCcUT6JTed4
sF+kEVo9JED5MoWIfp3c5ODdhaf4WdoSwdg2lbhtqR20IqdcL2M6tR7E1JxCPXuqsbZjbzGycWmt
/Znsxg6hmgCGI4lI+xkVRZjAHayrz3e+LeD3DGXk9Y5K2YDJQuOZ9Bq7dES8OUIMI52YdXqyJg3B
OejoBA3YsEWT7nH8uTFeYAGXVI0qgrrV1RZDCVa4YNwhR793X1O/veF8CeYS7QdA/GfX9hiZkvSs
NnRZPiADNFVVImjMjRxbCmSm4iXAmaYMXFLoAWWIkapyhvbVoqi/ahWvXsaCTjrL+PZH/8PLPZJX
hEl/EQDsgyTXCEHUOwa8akGOYnpZ6pqOcKR0YiLps+WL6TZKy8D016lD0Y8vz4/rYqZ6bsOGVQKG
c2LaNpP8oRS0lviNWiyfxhiCD3geuTw3S3BFv+fq5ku2srywTLT5Qpii7AdAuRIgntdzB+YkEVQt
eGSPMBA8zN0dy3FbgGeW2GBG58SHxFAn1ZTYB4GdnD+KsKFx+donAANEjU1y1LQfD//UZYytBJSd
kmICbqrjy3DtafcBs435EqQMiYfaQawUGq39MVd/zoN2VYc7tu1HVW8Mi0u/VSRjTwZKOZ7tsRvr
kpoQmomPGEEeAbauwd2xtgtPMN8yON+EYNycgV1mAcHH0GToyxe7VI1jdNkc5U5/Kt4QhxD5+p/u
5xIk3bTwXCfxNwaczRU+z43E1nFdsloZA1uSijh0H/Wo6NYEhc/ltYLkxqD/X3XOSZ8bxYqXm9A+
YDQoc4XeOmxBDjGRFu4LbVlyVTT98T0x4uNsuYMD5kI7PlWihOMnyYi7geyEHuEEsoxPmxswe7NN
v6cfU7dmb/wvRO8mi+oIpkl74564UkHxh+4U+1mMxIvpkkTnFpyzy/nXqHuo9hLImg5roDdatXfB
rbMt+ZLMguL87b9eOoPVNudWDXWAH4/kPrOr8YbUce/AZK8l9tXtieVJBGtabnM1tnYYcEkq/77L
cJmkjsiiedhrs0m+JOapLD1x8CkWNgA2gZ12pzMRV7+b3eaRh+B9Td2SMMr6CKS4eYE0k/VIcEK2
CZXT40qZtwYDE/70h1KxS0ycHJbKKrq7DpQVZtQz3GJkkDefNRLH/uP+p+GP/EwYaLQRwlR9WmA9
bDN4rtXXebByZx70sTrePX5Sv1ka6oc4jTPRcvpTwVbHrE986vNupoZrPMHbdnxA7HN04zXe96Ol
qEJPkNVtJep8t/AmkV+QvMSC3Attb2YglXrnltccOsczy3Iu/mvNfgWAeOwJ5yWA+9omE4IEuxth
u3UWDmxPJjg+OUcl2IzQB1Vk7UM4vU4dKtyi6coGvwCUmrl/kbVKRGRuBz4VTsybs5XLF9ycLrqs
KhcsLW68P3FvCZibDVLjLGGDKxGNTaHId8fveYPBR+K5AZn3GZ4sKgWrqq9Ld1KCK5wqJEaJ6qPV
VCjKeoliIQW3yHkqDw6XR/Dq4eJvevn8U/htCL1hSYvBLMxavIUA5t/YT0whzHh2S7z91QLP4p6z
Pvs8nk+x+F2Huohg+J0TezAwYNjDY3xZkr4w+mbWOLDZ2rwq9oKUV/7c4yT08wtlbcHPbEdfut/d
Y96LRY7bWR9KjKrasSzk/MuJzRzFK93wXnRhZ8NdKBinWHicGChiYsSlohSPLS4c8Wt1tRa9aNT3
bUY48D3NABLajV3LSW8g/C7jsblFpCbWrjeqOERttuGHC431XU1FtG7htASNVWN1dGJKECJifdhy
sb6hff8Av16FCLJdlCfLkMB4ikc3j+rl/n4vGV1LyLLqyMhs+iOOI/GYsIwUZHwNVEiLmhiwf4s4
/1v37vD5ZqZRCt4/rLitr7vndW4cvN0mO+y9bPwBkxWcGvvYUHt8YmFXMOWizF6bwRZMHTP7jTve
2MehebZsWbaaIezIA9hazpWqkQYgeUvOrjccoC1wInrFnieXzmjkpk7CINqFmtFOn04J8viSnCi6
2HcRnNPhS8yEgJm9ZOUug6f7JtCHPobEcXYw4eKhBku3ltn1LMIjo0yYNiMh/AYGNtdupi+1oo3e
rU2KoG3seR6rsE/mhNz4uULjBxCHoAJW+2HpY09peUNLn4nlHpId/oZMU4yuKTXLFn9m/eFz4xYc
7yuR+l/QOuDRm3mdsv7ZpXlFyolIN+w6mBSXSc/xyHIkxfZUYj/GFBdWu2eZbgE+hs9gj7p3Uwed
5LgL0SVMZui4O6YGa81+u4a2rfFpy4hdmxO6n46rgDrlmTvTQMXuwWZH+VXdHqjlbnxcI+vVtW9A
deluJzVilHcPZ+U6RYxREKQHQPMhxLIBhfNjWh2oPtKKlDnkSVh/hjJgv4v+ij7CY3nMy4OwDO/k
8RtjCh8XrQMgo6pLRYW+Y5GMJ7piS8ibgpJkq8p+6be5mbciPc1W4qohc0QGh7V2TYeMYavy1ppm
w4/ZSfPEKInervzGL2cKPBhnWLuA58pT9bMOKZbfGUjYHo3aHgZ5WTu7P6PhKlX/BgSHrS+itYs7
EtZt7TUHr643vWyaS4KbblNdR3nLpHKaejEaKUljMtW8CsuXgi2ZTIs3ceYTTqIpoCs1CXCco9TK
V9ni7cVyEB+gzDovY1zNQJ8pYwidj9Q8m39D2sdn+bgLdwE85HJLblwY0e0tRQTUmWJE1lNGH7xZ
DrLvpH315yWKXzghXW4Z5lCyhpQWbzCaL0VVrnQn16joeoRoH2ssdqR0AFejDjizArIUIp8g1/ZJ
EIP0i2IGV3lrwAbXTM0cLnDFSbm/5gBdStxv1VfEteM3oUSSwbjtLW6g7//uS3GkyxDIERgNwoAt
z8ei7mbGRoyh8URQqB7rXDPU6FNJ84bWGYtKNSt9roNMIwPX44fblydXPd3vAtjhKZEsPo+NW/hY
WORjJ2wIFAY94/Wcaq4HstCsFBhn0uRbcLaOiNsZuh4lbRN4+KcAupnv1qeelpSl6b0dLY9euDB5
uinrwGTv1mqvcIN5TILhdhdIohwLdJY3YvrO5a187jdJxxU0SvqsebJPz14fIA8Q0Qbb3A4h+Oo2
ZS2vDDRuPXCokA3YPMiq5kMpRyn6nH5o4HViElbkMfPwWc/Ov1Xx2HqfpdLp3QEnoMeA13W1daNT
eZV1eFePuQ4baP9zijWcfUx93PR7k6r/ubeGFQdMv18VvLl/GYeI8fgQZFduB5yGhKlQiYM5NbIP
mXuqTcTQZEb6JgiDPrwwBsFVxcdIovsPADA3qINgfinNEpZVRsIgLbH1T7A7zdj0W+QDZp85fp7X
Se2GrwJBmWJQDphKssWbkYZBHcE+ZybD8hAbTPf/VT4eaHn4RZ/Hcmer0wGOb7cL4WzuUk6OIpIN
WMf6lVVtbd/EDoo/9vqdDXSetCzNVRSuerWcf8YikSgHtaNTzvVQ0Rbb+aLZDWgSRaXE5iTXsefx
KYIO69A1jO1Al1ltMhwHjjCYmqRmx3AeDc+QojXsiiyt37eInYdd6lUsXmUCtM4etlrv/0ECIHte
YjFdt4j0ABLsvEUSMHqvRAkzDPycsLnSNFcy7V3nwui3rQaEZ4G+ZvvJ8tdw6ysnHzFB+eDgyLb/
fmHMb0no+DxEKXrur6/ZT/NpS8J/gwfDI0jTujItxjE2K8ydtHk+KRJ6IOirP+XSpNVGMvxXMKS6
fUc/kgjq2v7Y5mGMLHf9GfToRoHvApmvSFP083wy8zcfMMeGtjsMXwaFd8f6wB37aAkiOIOGgGD/
mCafXYoepSIGvjiQpR9DG0FmbhYcTlwsrfDB8HcSyooG/ounaXPJ9zIjAW6GFF92yE62YBW2EH/B
TOnPIvwQ1HxdtgLd5O4tn9Ykd8ogVuyHC8HrdEZXdiQ1DEzi+dRZEMoogXVqgGp4lgjcZyJu9Dis
zDsN7N+S3SLt+a2fVQxrPibsCXlvZ+P7DWayZuBLSMgANAkG9X5oWuWosKOhs0PlxUA6kIr4a+Jb
+cBxJXBdwuLQf0AuOsJShBrsClsgQQE0IfH3h57lHZbdFdIa5Kka0B6mtwYyGXBF6XkAb+WkWNAV
B4SrXCJ+4DhUWMoRpIrVoQ2F5QjrRKUCljASO7T3LE2JErd9vfhPpquPqquKsz2LMft8tW0pPLNY
216BjzWV01Avl8ekW+3d/n8v660iu1aCcrlDnWFSnr1PLWEazPxc2lUcUIt4OKDyWhEVI5jjnZvV
eOAr8BLQCpTOD4IYQOJsh/qTv57pQpGJf9tPvdpKbP+a1833zWpVrvTwXni5GqWpURWz6O44hh82
eVKL+KrbDEDZC+8I7IBXpiuQUEvhkKbkiNWooIqkOlbEZHGzn7TkeJ3geF5vDS9+oPu/bo7eKRF7
FFgIqB5BEDbKPbROgvZuoWLaST2ZpmQZz4fRf8vOc+rEE3IHmVSglywuk53EAg8osRqi7MnHGg59
JdnuoBB6D5oVJzsCu9h8DXmHWX6uCGBHl4tZTa0dE2h8pnec1kO/KRhCNtV0rs/b++6fY1YeH1c8
HnGh8B/uH2wGWpYrDSiz/3AAbVa/bdzYbGjPmtq7gVyTQdx5HROASNXjDR4F9/UaCNY0HFKohvMv
RcPXWxi344YetKOL6sAjJKAZqypX84lgoZrY3gy1/6hqPCnt/0rSiqtH1dvvtSV61ExwA/hSVI9J
y8Fra1lY4d10NyDRefexlPCxCB9nGZ9PPOZIctQHUq7bb/Il4xO106/BcavQAXYgqTZ8yHpkHcVo
DP7OZJjU13TfkTiCZ063J83rLD0RgcLtrxaMmVCt/+HV/pFkwdwqyeY9v9nk210dOYKbOuZuRGY+
fZHFO7xXGKqJv1z/NA68+C22vyKB5XCHw2XREISI1C56lzA4TOgFuwqhzNXS6Kz3ni4RmUT+Sl3j
pXEvpv9/ARoQYDJ8e/9C9zBHqz7zxheeLCXOnx6mvZZ9WMdFDCbxWuwf4Ak9FbNI7s//jt9pUe+P
ZfKj0zEafXGe9jFrT30qPfYsoSl3uv+DyU2qYGVHBUZFo5v3pKsYUrP8WggyNiKNQsOX65BbhmhL
pR8qj/OtQ0/zItUYZ5lYO9UZBeJNhjyWLtNU2cpWd8hFJmy7AnjHw1bG40kNA1ocPnPEQ6K+et8P
8MHfd8ukTYequAukkknP/cyoTp23Xar6UN3JRzU+S+CWwoD6hisvKTpvHroVFkt7nzal3/BKNXmF
ZFx7I84ns8EgA3KAqFwju5KZ0xmKaYqUpPL7PpR91Fu6H6ca3da3bdFASj1D6q+ZPnfksUGlKNt2
cnb9E2WpHEg1hHBJGNGMpxqfu3wBMLvouGjl9KSDgsSs5rPseoW3VQVgHWhwvSDHspEZkBz/gBZU
LTPL14jA0HDQcGo3sGtVD77NeuDAXphq/GihLfH1R0JeCzuUQSziMotNHiKZsa2CuvaPFsu0zSJt
3WFgGMImJiT6+ZX+PKamrUOQaIP1re4vF3xrCDeL/p9ZvrG64Kk2m0Q5BR4MAR7zOYjAJHdO02FP
ufxD2J1zIXPGjo/B0sTR995PD14tGxmhzg3YI5AjZkxd4EEaanTUUv/7d4hgDhCVJwvyBD6oQQBC
eFTj83PUR+dSNbUA49qsrLhOGfZAw6GJNuDL5bb6okdGoUQ6MLO0ftiXCxa3bJGI9PmiihNV35sa
tPZya9rqDSoOwaDBbZGwxF9Hs4h6nWc68uwUPJz82Q1CmYg+WDWmrTA/b66MkBJEnE/e8bT31hsP
6vJyeQGZplMQ9h5998uNofRX0HWJzIFcHJexFty6z7usy+8TMLUPbGWxjxP3e+za8sk1zzm2Fz9B
c+orUlShtASXjRlAz0tyJ4RQSpkudIVJlUynuZ7Myqm3ESReZvS846K5CydwoRtNljyJMIFbOxID
cv6yvNpqnvmtokXJd2fCoHQ+Or6fsJduMMbPfslkbXGWRPdkHaG0gPpETrNXyHjHRYa34vJ2MqFq
j5F/YtNpfrg08jouMlFnAaAfUwYjnohCREuxZJ2EX8zwvrRKGwYll+7QRTfNoIZG2qxqbd21VWmA
nkGYq/fvhiDckEJTfSEI5KKiHlGTUXIM1AlbawqUyB4riGa8cdOm0UcDlaXZUmXPNI18ScGehuT3
BtXiXxlF/GLQd/etPrCZ2lqvZ3KcWI3eik0UqzNwUk6Q4P06GLwaE1ZEW2f6uF0thWZnGjWj4a+x
3JHxDjo7vINjSsCYYIcpplqzEjQ/faJHVEjTSiDGLYbhabT6t+ZScdrFWEu6bCkPoO4RHCTNEt06
2A8TQGWjlvVh7KLcRvVE3nFAX3AmuFbjyiOy48F2XP0DKcUZbQT9o5azAgEz8YNjJHUBavMhn6O+
SW3+XL0XC1NZuutrQ3nDyBDoJwP9/5xSTA8OWviabNsqFaqJ5Vgn+2sSkTYilRxwQUyQN7gm4r3E
fHy0RPyEaxfKtiHtaxhJPfB+EFC8Z97SsbTnSjb0XByACyoqPvQ5gyxaER9MgFvuBgbZZGquON+R
GebF9+1lv2wyvTITJykqFc4uwrrcbcgcBQkIawT/Q0Lg5ZDFDX0YIDY62TjVqIbsXvO2xU2VpvKE
XcA0Y8R+YyfDHx/gCTiI5oQ0BB2hu7Aei2bLUXgyOkD18zmJZ3Iv3nx1kNKrbbxiOYlKeE3XhOLp
hbcATxbxqLR50Et+yJoHB4x0WR08fKRFMIR7HWHbznema49bRhaFr/V5Cs5HCbAtrqf2fK8A7NHW
DqchUrTZ4LyhaV6funMP7I5TBTU9wCgmsiapwdcPyEur1J99ggpZ6s9wzCMVpOnt/HHA5AQjQ5Yc
Aiq6UZWaZU3fuck3bKCCBgaP6bliRlqISnu347I5FQ5FHYdIDQM1D9qI0vfddNzpVJ2NVZJxR2ou
8Y161p/1VTtXcCNRNrqw0tjFl0YgU89LoXxM8Ax666lFABwB1SINxBSKAj+dVUZVjjwbatLWiZZc
hRMXcEFZ3yPt46cFX0mYM6+FT+6Y0MU/IYfWuPWRBa0p5REIedgaem/XyHlpccx/IxMkxCvKlzp6
R3YdnOlq2tsaINduUZM3d8F8TjhBYVlJ6edeY4MM5l76M9ovEzURENkx1PKrxTUPGENhZageAsiU
wKA5qlDnjVa9glz0NAVWWtVAPDQsNm7qAYFh+JrG4eLRhCgnHQeI2cB4QA+eCld2cge5rTuYqxqQ
x1RRFBcwb0VoghAz902wtoHZhYnuWxNLur+SN3SZHHwMFK1P+PMugMKIvvXsPq4GuMxMHW3cYLNa
1l/7CAGYHvL4XwVF9VfnXJ1SHknDalpwybTCUu+owAvrFDZpWB7OQVIvECinvMmkyvOnpXIu0G9y
Y7AIysjE0Uvtw6/UzFaqmQYWc3iSMP0R2g1ddRe8yDyZnNhMHta+XGb4j8YtL86hVtnnZS1jAcSx
bL8zvAxclY7/Snsqys7391Coobg/qRRWY9nha8Zl+m3uyZsTRWpG940OTJPaAghOj7qpNTJOxw5/
0lAFEUpXtIkn61VSmxXQoLFW5EBm3ev76ZninqTSGhSqhO6A/a3yPrA7cUQu4rMXuVMfmi4/R85C
j8vZHC3xlWkL/D24Otv3d31VOa4X+vrZJU+jFGpYP6mCQNTP9To+vn5ZiJcmkhxth2zCfUzFtWP1
yAsNmXuGdQweciG8y41Iaxz55pT/wmc9I00C0xi81lzbSR59g7EMGoqK2C2Se998n1T2TEcP+Qgp
OofKCm8KeeFHwy1/Ng8HuAeDBAIi3dETXWleTsdUQnY1SAY4CbicxqAmqI8bmQF1ZqQrX8m3jrcR
zkiYxVyYtaDPax4PA2fuP0x2NrNEeYNvy96tBFRXq5YTX9IulRsI3lBlnZjtziZOfDhHYi7DYDag
4U3Fhmmw8IUEwc7n5AzCiHerX7BXw7RPTRgqbQrQcMY0QiEGUxZI6zekdfHPqlpxtfZyRQWUgiM7
7RShZLz+uzK4Ofzc/WHW3IifWL2/ZMz5FU45G50h8vbM/9fWcUwUU24OpnlvX4n8atLmg8LpV8dJ
tzXqR7k0eoNiNwmQZ4zdXDHUOmYPl/q8C2taGQH+7BxISVz3X6Y1z8DvE8XCFf9Y7yLK56nuO1HP
WJSdwquNgXx/IDI7fsmsOj3TbNaXI3WGREWMrLVSgKc8L1RdiEOcboDGL2fWpyfzNJ33QxoDyhlY
3zgLOC/zKWm0yHv8wRBUteThWY37aL/LsuyvTK7V846JIgdst2fwqUlMvkcqt/7uTeENQvzcuANY
2Qa+bTbZkoXvZ1PPSkeVer/4ms8L3gQhmU/vwOS36nb8BG60Izqu+yfqdb6kYdg3o5lksdOIEprH
zOoW3BQiCWI236YaKrCH1rzAbukvvPvO9nmFQgetwOw0Q5t9vc2u0q29SSVqTre9GuMn7640IfbU
LM8Sa6VADujnFFzNjQRWl2HECoxJ13QLKknvT/ZcCzPFBhrhDG9TaHtkbWwIEy6lYtyap0aTCJn3
XPR9bZEJ6WOuFylxc6LZxHLmvOaG7Q/d7eC+853Nwwcvt3ZpU0iiOcugGqC86KuNsLbS47dQ7g8k
iSkv58wrqZch1M7uhvjY0vpviqfDaG/7OHnY/XIX4BQW9hnOTggh5W5jX9MPSUEd+fGccFdT7G6Y
hz2m+PkybFwQft9Q4s4yPGdzPYhWKtK5JkhcwdrMAJ6iZZBoXoEF0hv0u2g0T6N9Y7qotwlyaphf
wSz7do+Wkl4A8Vrzk7bQSEw6hOcsNKE0oq88p6wnSh4gFgJ1l9i/t1A9ry1wGRunLM2YZzn/Ba20
8fFR9de1RBGmUZdJXQ3d10mtmP1608pz7uIKTQ08LCcBPcqPg+/bq83jbgEO8ORdNNbhxZVYYJit
GX7YCL4gz+UJHAv5RR2YJvLwX1o9FEYPJrL4iAFT4YicGdjTsIrcOTlNFkgHxIVVXF8dzZomq93y
7ahHWBAjZYIKAmi85s7JXE4GUTVTa5pAjZsXg8MXZNSDHcCcZwdQ9d/PwW40pH0QtxJD1CBgOBHO
f89MwNkIRLVwjl4yhdfAOM4u+0qAKxV5xhGeIP6ez8HCVkDZHh28XiZF9u9RvYcvkxGje4kUsHdY
IWyqp6z4MjUatnZPYqOXrJgjT9rleXZEZLXh08C+6IFRuKJNsCvMIBv9dUV8ffKj+JvjcY+5uVaR
Ol3iE8lx4ZjTeceKaNSxM6Cz7z/C/0aL/T1BHDo8pZh6vKkmerb9d7tmZysPZNvMPXoI7ZYp9GKN
4n09kC4aWYXQLYbTvls7u093uqFq/EyeW6buphvxUW5k2+7/2WUQmYYVdhgSW52OKrQ4SCyJIM2P
KlMY81sVdn9hbLg6aGZ6luS84g2vlIk9tY16PJ63Z2JN0C8yH7DRt+9zSroRQ9UqtV5Qsr1JeVww
N3KdQ3M2cwQ1CCo9wfglbjA+t8PkUweIvE3Zo1bgVkQkdI/4V66JDxgWzec0v/kEAMUAm+cPYmNz
yuaM2YusKtZJmrTlu3HGZsGe4IBR8x1PNm0azJSxfbcl8l35+0KIZtn+qdBoj5AsISM0H/1UNhRQ
s1xS+ox1STXTvq57kR8KrcrqmL1XbtLqD5Zf59kfrxFPpbGbTtPYt4QmN8nQcVmu5VKezeJ0V0nZ
Bmf3TfxfSU+YvwSI0FghbX5J2mn5swRgO2DU0peSg01U4NUka0gfc5oPRT6Wf0WmuJZS5ngHoldb
RlalvMqCSHJqqZXP1tHCLYQ77gFg2mPDgiAzDDSY4qPUMhLM/tHucoqK/E3x44BsCdw1yErtF8jc
xtWoQeXSqB7McH0YEvqwkwpAWKrOg/IkJMJ3Um0uBYOOwedUF/BxloY/d7qhgIeTh/UC6ve3vbaw
wH6niBoWIxkETUEmAmej2Vl0PGRk/DPpscxmYxxqWKuaMb/3+mPGPTrRQzQEIoMBVWC5UuMODCU+
pnZWLVKDK8/V3EMC4SIAkz5u3aG1XvgXllX4cWa4dY7StLGalpft5SBW1O3YUa1vOpUXLNvCwNpj
L2V3QdNtnstHTRbDeDlG0gBOHCk6yh5nCyg7eTYpzMUvEDDJ44Ku7RN9cd3MxNXfXGkqpkBzTfNU
5iG2lJVpNx+m636a+VpIrJ1+P59wgzBz9RaR8v93a/8d7mK99TuxFzD0YSLKVqo5l0KquLKL+dNo
61Kb5lukCbHmxVqlb+XV3vBW8SS4elMMoTRQ6yDyhYtNfe3HbFkuUzbJZnPeZaP2DSa8JjZzPrKv
gt51kjoek9uZQj5RWdBPSIczGq+9iZ1TDEAXre8aoy161V76GWm3YgCh3Rh96yLzfMgn9tN12vGI
Ezy78Xqv75SurYnr+jPic5BkOzF7j8xjpaYAWkf5mYXnw2WdT8khaa1Rgv+7hamABqmZ2JEv//Na
7F+kNzteiO3fyIw6P7ZggvFIEBk0Hpk5BuSnkVe8WI6yQcB7vQc7KQjQjmT91/cNIDGwtgGzrl5X
/3zOAqM4oWdkR6tIcfNVQXVbkoIMnWAiUR4TdWS121aHcotMjmkRnqaXQjNI79iqlBRzTZfWJKob
dMqQHkPHSioHiXmqAClEvhEx3dZUWkOl2xEWTmKeJf9uehButfKsr1OR+XJs3wb7PmkwptrEe2dt
mpJovfRGhc1KVoqm4Ew4a/U6Bcul+ED7CfYaGHAd2feLS2hTxsL6oDAFCSnkBveDrDtKbtTmlE4I
Pt+gclAttDp4gnopMA1M2ti2NmG4dHOx2zyVZu894XVWOlHwp8ubm7qHUHCOs0CX68sWCM7fEm3f
29wUbCsJx76sulMZfw0L14YWyYwOvG+nkAswJ/VETksaRNCw8wU24x7Ib08Ig+XDQrfbLlMTiDYK
fkImKRbbinEiTsRWqg2Z1sxVSxJeoQu8Ft8dR6DfBrJW4cGaLi6OGagLBl7+XsVsY365C7JKrRJU
tH0c2LVedi4b3IzaDRSFWpZ3ujvjGT2zE8NutTX9AinL6nSOc1fggHhytcxEaSrIrcKetTVgG4xC
+alHr3X/tjigU9a4TsXUlIpxozYFoSXVVANgQThlE//xHCIppnaln0CqUdn8NVVsa+8t1mCra/Gc
TlIH4lULi7Tff62t2lsbP9qGnKr6sjnwcPCZBRhXhTJDzRDUifFn2RTDtgKW+TVHCS4t88C7PBH9
nKxUs1he+gnpsjya7aFvqKhkAKiBtQyJx+GGTSY+6QJNyuX+IuF1kokKOPSENJDAVezGSgTC7dl/
cuNLVAOLRmzYMd/GxhP5vIS04U0g/IBzCBjp0v0Uoms9W6iUPF+Y51Q4GKc32FqECpJ2c1Ssw1GO
uNL0PUo9DXP2UcshdqPeT280L2Ec6dVuu+/hGa66LX1FC1F6LYMMsNnS+YjM6ew11uffSMNXKzGi
vGVOOS+38A68qNmwTRp2SwGeZ4CxxuphAhRBT288AS79kWs9Z5j47EN/mzWXwHMEoIzSTErdXqix
jAczmimsFeq7fvp4mb2mrDlWMnIQMRXFu3ArwyPXefqDYzuGLUKPZWVNX7MfLJ97/o3zBfXc4yBn
jO8cUvocO48sxt3IuQss4syY9VypuxBCSga5RahG6hlzu4np8uObPkDBEuc7MyQ1BKtz1pmO531M
QlC//0GUvQ6Q1j0nplGuHZYtlJrR9pwdBpAZR0gq3G11o5DxUp+dWS89IAGgCGDxuPQ8datppUsP
f7Ycd/HxeLwQUU3ra/r/4U7V3fS0tSMxBr0WzRTxQJ8qBpztEMCW0qckLuz3GkFMvhClaygnNIr9
8AoNiN1Sd4o4oNywHNkJ5jv8CMcBsC/iIXxbPXpG3WI4ZSjkBbOnS97kPTBiGkzSdEbvQP1Fl4vz
NFMaB2iuscT+82ojNH6hA2n4QINqK/DgMr4COuDfU0yB3W1Mppp9ONFNALc097wFR/GIO0rKAHKR
GeAjHNOyzLK6Qp00e9PIug05kfS9talSEZealKKULqe8WYQp0kvGbFsPvSYok3H94CxSckvcuZmH
HUf0bWIwBSrpfX9KC4G7LNAp5XRAxQDpYjwZgfRlbzmVB/aj02tO+bgp5QlGnNz6gByKwTKvtxCZ
C4DYsG8yDApMOt1Sf9RfJlJ19UIvBQwfMeQbRfOMQbX5SvBBUFkaS2i9nyMjGEJvVyH5vgjhQkVp
32RQjr0pPJKPFrvHxT1x0aFl75sO+gpUodIzhEquaaxni5IN8jfZm2mlHE1Az92wYfwBVD22fCVw
SeK6Vc0Ze95ouJT35xTeuvB4MsHXOGhv1NWMj+ggWTMkjwYrTFBLOjFe2w1fCKdl99fVYHu14Whj
mvNY5tGEwhUzrBfNFTueGBLtAtuUZYCQGc4EHdZLCkrvM1pHXTIAjOnUevGcG/xl25CiRJEnwQPY
aTGufSLw9/qY2+v8wjTXlBgDsMAbchK1bFDNr5atJGbpZY9nLgOc15yTCvaBqcQ7N2vUqeI3YakV
IKF2jeA1/skU/6fydzrOL3O5T2t9notssbLwaF8094uIa37Vr3EZa333pyn0E0afzgG9gV6a+J6E
HmT/H3AT5yd0GNW8koA4phOb+0UaM8X49d2MlGKuazb3RFgBpnFAh/dnS5jcps62OkBHnTFFbsRl
wmq6+oq/Y59S6PuSoky5CTmBGL2d7hk/tw8mKMbARDoTFfmCck6Dfgxocw9bue4MQx/CvkY1cqDQ
1UOQrytYRXsM6/sWKyGOfRbU4IFgkpMEIt50ENGMlZHt4GKmxyqq1jQp+xKY0f9lItLCV4ms/xzN
xTBi2iXJIm9pUzax6uCLJCIsMs2KBGGnHrp04znwEIki5kfoVwctQsAdzzAiXOAunMMWnT7XJwa7
+CMV7vkoWgmsw17K1nrkjJejWa9hvGUGCRTGPBcTvvazGKf7cEuMDwKHb+eYGuaA39HJz++GeuI8
j4klrv9yZLTJx5kK8ftliCJx1m4Ej2Tb6fsMcKxbsoA+F62n74L9k0lQYt5empNu7dOH5QatWuDG
6P9CKiGLP67RdIH/nSvWFqv8HAoBJLTjYZu3ZMbm2xS8EphoryHbbBKa6yi3KGh0NWtjqQkbvKeY
bUa9NESFOd0iB12cWGW/6aDlYfzANHkX523/oii1HvjPowWUbKYpzkPDArw647jIpjXwtFUdH5Wl
scpm3I1yW6VUZsF9OhwUdnnKCsqBM4rxhScSechEs9m9T4UeALpwP4XI70Qzv5/04VEQ0Tj6WTQl
jS5/t60L0+7TvkgksEzuIC734BxQCwZNWUlBRAkUTR/o+1oy+xLh5bwH6iHOaI9NWUcd/Cc9mUlH
z4h5okBtRTWUDVwnAZ7IkPfuCfHiueqxw0VmUa/za0YznmymnMI2qhnCo/YV4XntCln99oJCH2JA
Hwk+VZx7uGWfgyKs5rIOjepiVEqIkK+NsVRx1AKkxjHS9o56X7lYn64jeOrfSywFAMcR13P4Yiql
j3an6NNQhcOnGG+Yn0wWVSIYGr5FAHDwdHIrIsdEA66K8NlfVZkSNEDjqfHrlmElJ+2UHnDTZSRF
1Y3Re5rH07JWXI2kcjlMfsxk0EAGMc4+/kzb1NyvYjgYw3/Q6j18gwOjbnIGyoQ78tLh6xpC1J4V
3De6UD6Xcc/znmcBaBfuFhTKHPsfiYf9IG4ekKJFh69nHeI97HcPI+q3QfJNqESj2uJFn632I3vD
Xk74BQ4UK1NpaFWfsuuoSKzHzATW2QPpXBxvqK0utZVjMMxNiMtuTtrApB9P6bKK6bUtTHuJvFWo
xdqA0LTgnAVoaumuhR/ivywqnU7rKVyrLcKxWzjzvRXX96dkzPehmKgJAHMwlufIbPS5gKxGrzk9
IqdwQV+FsCtkuA+BRwqDakBSbvtKQ0E+2vdFzFlMBoYjp/H0qEXEweab+Ej3HpTj6ss4jsqmlACk
OBRK7hRnY8IpF8+pCNi+pt/e7zn5yuC802vIj9IuVX4ru0nFMeIvCkxtFigVv8bh4VTdnuE5oBqb
cbjcRWUoZjlY7YvuDLTOU7oNDtnXnXE5YDoZud+FA/JOAAtZI72fz5a9UzGaapQ+i6NgqPsP1GNG
FCrqZXtcajeZPyArmEdr/4yuRtYumcnB7DmFoegbwrBkzGrqMg2dGy10ThNfYpxEF1mbAHdcVih6
amO8QdtR/DkROs+cdWTP9fkqJjtut2XPu+pDq9P8c88TH5ksED6ttQwVj0/fTVML3ZededDUpah7
WStSqsx9vlyr3SZmGXcaHNJW3JACIr9XCWYE29wgWKSgz4bo0yqla3B4bTRy6UkBRh2YncjQjoM7
KR5DV4WOUmitQ9vG3H0+bX0irQCUj7k+1i9Y1fn0kKoA/+pishoKE98Jnkrn3R3YeD1SYfFAN/2D
YgqnE6irxzyzhK3ELTOlolhyBwXb58k2L3zUVtw3qV6ux95lgIuEMfmtWnT0u6HUrANWUF2CfMwA
0knp4TcvhIlpBDdtLuxBRxvSzRKEOFU1aGiMVYEN0atL9Ms1CiyPybLbMVgFlv9WGwhlupgbDgIp
YJSVXIdRRxUlN4bkW4nAdsmn1hpslkib27RdXIZitXLMknCADdkhlcFdQWJxDdWR5uKcuNUMc17o
UdhDvpyU4b8JBhU2mJPVIX1rt/H6J+Hl18lbJzQ+AVgQlZdkdo6iDuiiIy5T1EH1cduuKVpHhCt8
DQS9hPVdEqT5tlM1ZOkqm4FdIEC/1DxQSE6vXEAvo4aTU6iUT2c8vDO+WGz2U+MJtE2ds9XYoc/N
kpCNSuc67s6aquQ4ZYuftfYfFm1HdlXGgbROlnf/SEBDydanqkDvHoVejQ0qKe+p1B6tTpJbzXA8
aYvcS9fZdLB88QVejaaoEpHOwgP/k+pZNTe3Oailoi97O7pzNV6kC1pz0BxRRp7vIWD1dLT1Sups
PCWg1MVNSTeMHMNXipPFKTOxDc4roUB5JELW2YgtsV8lfjzEm/wogaIm+Ga8QUF+PBEZ41nonOpm
WPnlZMXPGIk9EsZFZRd6FVc6zeQxiYPUMymW5A1osb3nBEIXeV7/51hxHXqL24CyfwxygZbceQ5a
JrSzoHlG3rfMoTeCEdJthBysuMNkDT9gFIxXgg63K376fw/JjMa0/azKd8nMvqFstMwg2B38+rFs
3IbZygjUSRy2ik8ZSYjvmzhmIzV+I5P7Ugqo1C+HX2ayGAY1kgkm381rrMjeOzQtY44PmNkrYMtq
RRIYewqQwkSftPlXxuADcCwjdiTHQoM+kfzur+rN68oDpYJvS9RjF9ldg0bIk29vxuyBLlzcL8W+
KS6smrCqRsRroEAZzV57pMwcEoFiseQjACNJlDsErSQwSFTrlgsX/6szMIAb/eQMWSKS3T7wksUd
dDXC2Ible+3P2o52XuTi7AX0RVZHT5WKdBuXvqH7AfmV//kzlJjCaSZi1LKZ6RNvDomI2KXC8NeP
T16ZkMQUDJT5H3uXxhZL5st6Dpg9NGBVE2cI8XB6eRFI9l1Dtulg0mbng472Ebk6K5m24QgMqYhX
0yo+OhoZGQazRaeaEQHoILCUaWQd7lpt/8BrDVuBJ+7K1WP76yM0R5Rbq8T3QneC60BhBsdzp0q1
lkZHHKP+5D0STXrM0aRPEy3UyvT0tNXJVazMCGhNYZJobGSsxV3gvxWq6ThFJptZAHXyCzwbLn5a
nA5YbXbfzWAGlNc5KMciAlpECp5DtIrqBdKeDO/QqUP+FX2eLFxAN1N2WcgJEWqs4CF4Ypi0/4ob
4baXgByyQaTxZw71ctDSdQX/11qRUyzcfDv92Gi9u5cUNJMgzFlrqi5E5Q0ReOpSFfDrfphnKv1j
AKJZoAyrhOdw82gkZ4mTVLLdfpmiN+ChEv/K2KSqtLRZZJb/0gj7ru8R2Skh4lsxSf9EoIQ6Jbml
ffuRUALQoCmelrJfRNrrsEmK/fts/Jheu6bHQc4FUfFuq8ufRRuslU7oSLdnXBf+garFSv9jJRbk
JYTDjWz41iZt01mExJGcH3QvljAukkBr3YEH7YaiT3JpX+k/TgMaX14QSBXQl9mMxt7lvy+MWXQC
7r1l5Ypz03u+mfzGZ11gB+FVi08Fcaf3kjytcJQ58kv6oOnwsgXE/54plX54r4RQckgdGFckCTX4
2ocOyvyR93wLdF0Y+3ftEoTKHpZRF/zX58dQj2cwxO0atNoQ0shWGFbQVL3GGyP27LXO9s41ZoHv
YytGp5++xFd//MtPjVcpH79nHZyxUydk8u7NIswRYnfTgs5dnIs5xRMVUw3DvubhyKqDzS2g/ySl
yRWtvv55eo3uqsU5uzVyp1V6/dG1WmHCVM5FKWNVwHouYsmibI5qnfl88Yi3SjDYK/s9NybRU36s
fDXQy5D8isfgt/nwdHDNQ2XDOYMIrsqH3OssV0+j3d6OlbA+I4VfPF6BbH/pK2Xb9rX041Sgfhy2
a+4djHQaJcym2LGdMy/t941q3opUuGrBdnL/1kmemqr5D1twNBTiqTdUBvExNLYcgLQm4gTGkOag
FeSEJh5St1m7A3I5dseHdxUlq5gzMwhDQuhzdz768PCdplvDQST5sbHyW2autljrEIet5wSGPIU3
otQB3ie1txRbaPsWrrFrkMJnaG7uzQKxlM4ORf4vHwwbx9pU/SSjS8Aq4WC/Ia1yOyUMLjSBLQfE
hWsrWH/C66UJT9NyW18eYVHaXnPUWesaB7wyPVjlwGCQpViLLcmHwNMCDRWPLtxwPz9m0jUfSI24
mJlxBz+kb31+uG4mhTj7FLrnYF2iUxrfF/GstOVoK8TLNqWyghEXeYxfKCBQEYb/K4x+++BRk6sD
zM1FSBomBe8XRNdrsHGbsbWtIbdgcBfuN2fFh9UC4Zt7RhFVjDj3378opXRt5kyrKxyV8QOZWPBG
UJdf79sfygD+TvPHVHBpusQKsH9i4UzI65fYoswrE4tWpo3AXO9snSQxd2IvmfomggdypqCpGuoA
VlMQlvfsJ1dkaFZ0nRa5mFykfJTOKiVEEUlVU2CMM0M15p7jtILqzjVBdJInhfij1kmAXQJY+9xF
oxMPyEJPWs4UM68tspxbHEk2mKdCbycq7V92R4iSjyw4IjwvzGl1prx/SgOFa3iyrqDAK0cJ7v+W
PdEwAGM6CZOECAc/9u4XLn2WMfG9iAmI0c8LPjwGRogzSfOCz1aj6Eo372549KzZNBACvyDhHIYx
xFZvNaoA70LPt5fVVnizUpwM8qmAO+kuLQad5Pr+uq+j2hM2xeZxjuWm9qqVE1qHJglZTl9t+tFg
MCClfCskC+JProdncqjIIO1F9pMIk1XWVa7ciibuzegIEMY28jPyqt5bF8qMyq/etHhUw0L0RRVs
ZMMNy4mZjkBA9cGKZByzbFY1ojJVvXuCWOovwL7WzzFM4XFMELXcfQYy5cgVbKPgSGbK+1jSx8TI
oRifY1/SpKkl4gWGOSpJsXfMNE+ulxjQU8aypXL/5d2Y4sHuo5gcoO21pHsg9cNz/cHDQFLHemyE
LclH0bF14tV+BnYtfz4m5/6pr+b+qfgzz5OGQPYJbBp7FSA0jvrRfTal9iRv7a0C342sNekvwbYd
BkJkCCS/EBwpeZtl4sn/pvNkP3hvXxsGBb4FqQFhQ8B44T+CPiL+KLv4CT1471NZwO6V4MR9nuxT
DZawj93fPPa3d2BGOngfi5eLdFsErleS9tdKE8J3E8xLxYwGFVLO6Di4dVeR5ffZ8mb1CWaUsQJu
mpROskIhCEbioUicy+zqzqZn/iLzKZH7c2vQIoI+BqYW3KbkpCd0DjLbzeod4Txg5uKCeOJnGmY3
xQ5LhYaeEmgMK7fbLyukb4+ZqqqbA93HHot4k74w4n4zM1TOAgu9LwhKUxPIYIO8puSQPLwbVt9V
yr96dk/sSgOrNQ6LGc+9raOfeDh+I7dNYDJ4OFlp/9n/hDGlWE+qX83RdsMmhHs5na3CyMWE6plz
d1b6z/6i7DGvzQMut+wT4qupCY9sbUpwiuzMajG9Br/VdJW8JpmTSKb+UML4vWVIFLv1tYXeWQU5
V4Bk+M1qivTLAgXvwy8Cz9h51u9n98J0kct7eM6ECDzv1801T2jZqd3flrS5K4Y5BVzSeNq+cKQ+
ARB3qTyGxokdF0lPt+TtPT0ufwj9i+eKCAx3kxNBRiAeBMRXkfqa0rUnXYN+6HkG8Q/HbazNiFZC
avuIM8kgUNP3TKvtA327qxzw6uadb9H8OTxt8w7CZpKQw6BmM3IkHtNNTXJSjhsoIejULzDSnuUD
eacAFVac18iuXHorNVJre5ZPKy1yiFeSJN9Jw3opimVpD9M0mlxN+1bSozuIaqrm7m4vkdBKY5fF
/BIbBiGNPN8zduwqJYJwokdeqSXPnKgZn5hGCZFgBYFoBR978In2VoU6HhmIB8kmk4DPWhsBYypS
Fn3W1yXo0npn8RS3xqsCj6mQAOAvJS9kJFDek3JZHSYeihUSQ4osHvNX8jQeklvZrbqZwb9CE5QY
eko88Y8nYZ/D1PJZiiwyICtGghzvXO2oDwni/JVZZBWiAehKGyAqK8Hf0m2T07+AEqBpjMulasvo
P0p+FYvW9AqBFk8VnDMh6eXZVq69FQ7EXHSz/2PgPIpN5ZOwpHUeRZizE1dRuq5NUpFPvm1DgoD7
YWvHFYuZ37Z0hgsnk37Obk4mDrq/+IVTgtrgHUMi1bFwKNHPcUw9F9GaU1GhO6wwbrOkHFVFSlbk
KDg0Pt9ts0GsqCL2UTsFQlb0RrDWq0dXxMIWAF60QCkKgXkWcC2Lrloznr2jHiqpdDTEK9nRLHJG
m2+1kqwYt5nR4OHG0zu3pcuzDpzNMcWND8sqS0zwK1cwKCeWVxWKSg5U7SJpOgFEVLdkIqe6FoqO
UJtGnKe14/oYX4eRJ+BYrS1qNGCps/TdQtGULA0EffOo3e+whSkw4XhCNyknzAb61CgRRvHpKBjz
DRlSyGP5QQmwy/WLwk7X1LCuVtDlz5Ti0+kd++qBysVdi1I72NsIMq1QjafFrdz48spZvGwn7Hn+
35iWuyr69PBeNfF5RuG1LKflj2triyYw4B1kgASKl9xgC6CEGqbcXeSUrbLFvw4PLylkZpaKXLRF
XqyHcqAzMdWQ1noTxOYUgu7j1u1bAyhxzkg5JYGGFtC/viT3FBXSW+3S/9SKs4vjTnUCpW46YkZQ
+RQB2QaZZsaZ7c7k6DEVbfKrtHt9jkWs86disjV/OZOG5zRd9/6hvFvu3rjOgzkb1uEdG3AgKO5u
92J4L/zn/7GUy5ayu5kE1azn2h00VeEGMuG4PCqmFITvuj5UOWaPA+n58tupvZ5vfMMw/qu9+6c6
/ibca3/BgpKNLz6DFgI3YMXqUscxlhf9PXGlhH7VelTf8Ww1e/Ip+5cwWbrzxDM/maP6Gd0H6epp
Z7TNbXcfWkWjzSkbq8YvIBOUwwt1YRZnxF6KAr0NqTJsS4Zlp/m89l0qBQTbIrt9XFxkn4Pf2VV5
q5K4FvsdwLsUFqza9OcZy1G8ItBGSJnHRT5v40nhXb4mizBnTNJwMMNXMzgxS3ZIo5Uy33SILNUM
csUSixk/M7ZrMhm1TY8Ef/8RkbUbF+I+O+2J1q2ZrWpyLPmECMIO5vIgPn9iMRdxwDB404Y+jris
1+9ihMwaixNr1q/Z3DAUJsRp0YDOubSCPDjOy2y/mnEMkAl0ytnU3fDSfv2LYK85j18CuM1PaRrT
YtvSbdRkrx2n5dOucejWtpaA/zVnYNbpQzSI6xI+N6/wehap2Sm+1NsiVUrF5m12Zy2Wsl3D8s7T
JpVfFXeC1WA23TBPRlOMmUuryDYSdp53OYCdg+C5hOVPDHhzfNHC1fmpt3APstQBnQ7eFnmrzND/
38arR+vtYXWhpFfVTZMEAhtZHIcf48AstY4F5jXfBoh0BhMpsNu8QumB/iere34WP66IzwoF+23i
6rGZLo5hu9/GfgYs16fYSKoipCIbAR7N1udlODcRVAFm7rDx2UXfuknG4NuJ1frbDcZKCUOl13xN
+Wi8LXXJHcuIrUgVBH/NQhl5gXKI9KwyGgXQNdQmpvjJxLn89gTrzrWKcGRh9Bk0nR9rtc3AT/HV
QZ196K4eLojtv9ECQYAuHVvMOxU8mEtiliHVpGKC0J/1sR/RJ1dZxB7iPciJ0+i0V3OYNPKDwt4V
I/ihb8U1/ZtsEsihA3rm200yncRPGOUECXJdtLUQ2e1Z4EwJzOYdkCtEGZps7id62xOa1V8NRFw2
td25jOZquIELDy38wqqANXOd6mkFeDbEUDJJ8s1y3aLh9nzEQYnD5TO0S+TfzPKt6nXXng60lTlU
+ngBZVFE3Y0SPdl3rTtkrsZuIVJUHzDuzVCn+9txmP8X6hLH3yHVHTgh1+jsBfZpgMc7s6ADQCvU
StAtB3ldx7azbEaXz9iBRg0fqK3Dgc/b/k6jBl8XcjzUQoL6eGUzWw8TQa/q6TBY7TqpVjpXuEwx
dZG76R/zz6wqB+vUqpnSb+VR2/o5mQWWhpPEHYN2BT95eUqq95WSQ4Cu8Z6rjUVRnZMNpjehR3dt
3zyt9BipQ8YOjRWxVCLquOFk9luN3OoStrpItMVQv69jmqC+egJNaOAngpTc3B98I2cCzHXL2guh
AOvM5UnhJYMzMzkKpZPVLlXiazLpjsLd2nG4ShiKwIT/6cYRm7sLNIwRBJEyTVP+BR1/kig+T9Ah
WY2QSUadhyITW11Q7eU6QsFjMn5BXaDc0IHSAo4dhNTxDhlxwlVQbPTTxfcXTk9RKL6S3RSB6IpQ
Rx7tclTer768XZ5NChTGjYxVjbPJCxww9lxEJ8wN3mmqNs1QLHybaxHvOlpe4139a3naTcVXKQwe
uBo1LAkJQ/6QxCNl5dkDF3fuZSLo6hdt/eyO8FR+AzNc98lrj8vULcUK9L552DW9U+3W4y6+zfHV
1Plup7Jai22fsxDEPNMZ8adB5hv1zb6p0XMhuKoPQ92nPeSIAJ8bULjp2MrXWMfaHKPwwPDWD1N3
fiWTBQbCE5lf/OFdiiPo3uL5GV6Ub45iWj3MRA3kTPQVVYNTmOgRBHvGKczDlRW5PLAYmlegqQw7
/GMr3FjM0gVUNOtmJUR9mx3rh1pPJdLXa2CnxuxqKgJSH7EU8J/8yrZEtnnAvCDI/PEquhQUDkoN
7N6Ub4V4ErC3F2JXjsyeP419Xt6bueBddoTBIKyhfDqsulftGEJFB/ybLmO2xgyiep5+ajttDJ68
2o38J+mZYZG1cAAImdi/jNLjPTRUCosZ/wOq45VBxW68eCqtlDJgjiLavnaAFz2K1AS68lo+7xyH
qpgIsp+dTNum8PUoJHQrReXwN+R7kl55X35R/BmVLfKcYa5G5a6qYyXsLH50aRHGKkVjbySbqZNG
tmzhbRFrqG/51jfaL5INdeDcEVNtqtLD0ezS3+3AqZGfMFV9CDb/7g+Voj/wFscZKb19bXH2SeYl
+pJnt8a6EH8IaV3/fi7mrDpPu9iqjwCJYTrosOnCbVWFf+U0gMyRbyvNTkfCGMFcNG0ob7lCXnfS
HmJMnOgCsS0fep5JBafqPlILFEP2Jd8IvWyC8sejK2Ay+XvnG70/QuugE/OhZaiael2TR2w1DsWy
knLbSG4hTHx9ZGHnDOXI3i/arkLuf9x8xxSikxeoJ8xq9MfGtqISeBqH9J8eZJ0cstliaFauojQa
cUmFtUHEfDK4jsxr7DJkeltk50XdrdZFY3fOJmj9mf3YWV7IOyA+CP8MqCyrq7MGmCHmv4rsgXeo
RV8Omrx45ZsLGzHf17snrKhz6/GIGxT8bjvK17v778bFwfhQe9mCpf7/wN/I3k9l2g/8jY7rm/6Q
AuGT8yU5bLVpgVcDpMH/RhZUeD753T/OF1P+iJg72/xk+xtLWcFPc+VveEzn64Q9zZWKkWqsft+k
+ag/psjUlWjB8skMoSCENlaCSgZz32sOf0ymSajWhfhm9gfHoK/aHURyJcsERCfbORzdNK6I0re4
JFJoDGex6yrwIzNemu8ehRXRPzgNf0VTVxE2NEGCbjmuPPLestI025mnju/deuc/5iSWadtJDf7X
WtatRcXGIc/kWdYvrDSC4JN5r5lccwQILnAH1lzC46q3Zpktdmo1wqFOEul26s6TDxOo4ATJFJoI
DgUwTNcWboxTuHfdSXLPa98cT5VXtfYUDHJnmR/CP+o+tShD7FYprxLJHJPiKQ4vnHbscvmvkqVp
TN9pNApkRiTntRhWlVPkZd7Jn2d7xSWBPQQhHjXZTRCcSaQ7Xq6zvjZZSvHHmKY0egdV9Fqdn+xi
O57HX6pLkdE7yLQX1TLTd9UJmIvnGc/PB9pjTI4iQaI+Nmfu8P4G8AAn1+prrLaMR8Zzi4ft6bNs
uPyE82KYHcunC1sUaub8kxAmbTjzHifUBmPw2w2UlqQGY9fqRgeyyCs4nNUYJIeAM0+MVv0aj+yB
vh/4c6kzEYBmIiCFrMnGTJjIMS+PjVpLWz4VSQmFO8i4plNIgkrVpyK1IEjOkrv4caz38gqLLIaC
jip3HYCZ5SCo5dgJdBslmpxzuy0Tcn58nL+SdorMiGkSEAMB0zGiYrVoGKQske9K/yy2Uvylyp3f
US8mUxcdOkBjD7IXJt9U7fEeSro6y2XkjQsEJxRTY5Z2EiKC+qA68rrGa0LZ6I8BVBQ392ahTv/8
qyve+ML7gZuGGaHDFvYhb1swHJwQOJFHbfpgEMSq9WPsL49X6GkHD6sTR9ydGQWn0WkycE74HLYB
xggnu75YaqORjD+B4TSPn001I451kVr4/Jw+WnFY97Rd8UOA9xkR27r5kwkLgHZywvyQLH7yum78
Nh/tOHpq884LrT01c+SwvZJKbWIJWFmqe85chekpnLraFkmtGdMc+v/AbGBSFAmjoi6/ab92t3eo
OncRq5Bwe21JdygLRjLm1VnHa/B6GQX2zZWOrg07vq/AegOzER9wAX+Ly17zaHeS2XWEOh8+FtLO
1TPET1PKqhsw/wXfapQF8XgMa52XIL6riFod4V847XuABeVtUQrGXW6YqlLSwfnZ80gwmHrsKDqw
IG4GatQ5pf96wF+U1Bmm0Uud0w1QFmW/fnOM86t4/iNiWpngyXaxGd38lADVuCYnpUUy9FAXTV1o
8S1MJRBcYAdWbBIzAG3Y3kxrNqnAChqIkljak89GFTrpohFivnCFnP6oWDXy4x2vHhGfb1RQqY7Y
ADAiZhgcAVYKakQMJa3SpkVDzqF+3kogdKOK8LPex2lBDaoz3ehhLj1WNIUURNfH8obM95X3anRT
Qtcm9kpx49Iku/K/oMTg4YibH2l/AZmEBa1/rCq/rxGbLut0Br/NOAfzYc96yA0Ihlvp27O0Ff+/
JfsWvR9VuMWJnmhhSflyXdXR168TN1ySz6Fa/Ams4DGktt7sTWs75h6ZjlxCnmfzNzUl2yvaAb0/
cEsifeEKy+9aFWl76DZkUW1ub/qOfEwbLiM0qxFVIBTdtLpu7y8gA4dM73uPoOg6bx8X5OE51lxh
AW5FiTS7gJy2OTDEwIrjoOidYvhpzCdfj2oIT7H7HvQUrs63INJcx8/sQgXsJgJ/7653rDSwIY5c
sKNRo2FCa2aRkpXkmRk5LwqirKzW7PS9y+4AEG0IzP2PzBx0gs66Q33aTI00d88CN1C4yKW5tKSb
TdYycfcxZMg0rWMkwGftHmjKmM9oizW4XgLgTmM15arEeMznVejDKcgTuPBvDAWDKu1MQ7NvZNSJ
eHwUhztDEDi2tho+LFPxoJ2/MxsrOYGHePYLD9I29eq4WXDEpfT+hdeangu+KJxAM7fyQhWvz+lV
yL1XnxqUkHuJoN32K/ixjvzmUQyxUBpMQ7+T6FW2rVH4LsAns5AVpvsPAhap5xqST4OA+d9XpZsO
VZaXv+eQqN1wnXULUusdVFNx1KUikA2QXG/5yjvl5Gg1XMemZ5zLuomg28eUhzHsmd4yauCbjqOA
eJIA3+3w5GW50crXK30KpsepFhlrrVTGCBNDjo/zAjlbuZPxaNl+FtJO+Uef4ClA2nNMmvt6D15O
9tKCdWEEn/v3qs1DU+Kxne0lR00wgHFEUkvkjK2afq98fbTQh8j4qkCcf9DqVAJj4ssj+aoC0lMu
x+zKRXt8zO1DB+aLHS01HVW/3uVG7Wu9aOzIrwlRIhc8CZwKd5BCyi9+yxyGG/vc/O9jW19sSyq1
/wninH0XNkSDC69Oyf5PC0nKNVYMUrh2H5CtjtFtRlc3ep3PqOOqvy6f3rY+jZqsVi6Z1rm1hXpJ
odsW4rrqy0YNAI0IRYfEZ8Q2AO9nXnOeF7rCi9caM/z2IemUnkgIMv6iFEM6qCOVdFdV38tfWdGE
snZ+rZzpLZ8BTzDTvdp2DZXwYlrzLOpjDL8BDLdb+PPxqcnV+J7M6SoNOrgCdrQK47loWQrq6w5H
qe/fhc4NYyfKdJ/gf+WntyVpgl7QaYBfOdK8iNgvHpZZou1hqG7l6KNHPtKGFTZEw7Jbue15tlqb
/x/N3yw7/Noepjx4D+xXkh2B7H1xtkXKFSCcvSmAf8yDU91rqqkc42FIUz7e9fwcjxZz/TddX50l
sojHHYWsSV1ck4QxBEnd1TBnAcQnjtY05mDCnB6BwFILs78NKBTv0QebntxpNE14E5vZFzd5vIqw
/+/qYaAKZjNhmKvZPqRoUMPxHxQoskrE1DsvD2RIPAPRIVpSw+mI2IziZdL0RvomS5ZBMa1CMDtK
tirERj0+e+robNW28hA00qowycknFfQzu/iW1+NidCIJLIdW68VV+046qRUqR1RBGRnCdAVLA3Xh
Uu/58IdWARO2g5lOYiyl58yhvjeB+1zCPOG5/LiVWEzN6YmNvm3YUC9PCXLBfK4FWmfoNUW2Fb7w
3z4TpBYkQFKH7gwC30CTVbp5CEi5nZS4FlRjr2f5bbnVqjtkKrpyAIO8On5HkO7xpq4nIZNhcB4Z
4OMxSBecB+oN9ko7PfcbxPyLMt8R9c62fXu4BwXz3HFxN9JLzg6FadnaYZYyKUJOGL8vGephlgOn
bd1J78mxSltoaTafle6AWTbw5mDZRKDTWuWN3QdLghnvwrl1gvwvGIyopF9y+1PTJrT4voIV2Ptb
sPPOvnPfqREmSMwHk7VRu5f03UzY2l5NWo4IXkq3dSSyjV/bPAoOUK63Kqer7OoLyk8D+rZCVDr0
o+Mf3In9khLzozu9n9I7CyW3/bZPxJFodSLQxovsPolwtDdbPkoY27jBzrZZdnXTDrqivVqPyQ5b
N+pKsCRvdlIr9iJvJCYzcKcfAe9CtN1d+1gS+dxDd4E8dCpWR9j9kAwM4WqrF6/tEhcyoT0t75Uf
vhi7Q3NBkeo6QiDu9q1nAnoQFVfu00ClCvapDfBgabJL5kgB6dRfwkjCyMgM5HFKkBowOWLYL7yO
3cIQg4JZBWDclb2fczkVqFYae+ojwZtO55bSNZm8Py/zlC9uLtzaa+GISjhZNVkOBtaTlJRL6qAN
axL1KYteucJm+baumcF/r0w7nigfZWvLxGzCGnuCJIEu2rgArwvs2sKNI/0riURwtbqGezWU2ACi
3f5M13pKnm0BFZqHFaiC3buclpCZPXzJok40xfdUGt3vgoA0wNVm0ed2hIaN4McvgEj2V+bhaflE
gKk2oROwRn7F6aInsWQsJQlQ2PxdeD/cAjemdfMFOhS0sRieXS7qrX2zHWdAaHqckkpHF3YZ8zYx
Y4jzsicqJIEUmpv0bF/clbQLl6IPjM+ATagzsjfDgGWBUzohnrHvD8mAKyZBMsUSk8+BYxfxwe4E
FgcGB8OIXMBsfqthVblaI8XyYXAoV3Lv8hO8OD0oBbDByEvehPa72nz1ebF5TTqmGMMCWxAUGYcr
sTNH5BEEN5sDlcA4VHpSsbDDjHh9JakZFTohRQItpkvUrFHmNy8ov81OojydC8x3dwc9fNI0MVVf
xuE01XjdZotUbwm89lUQe1Jhx4Zamr1AlU6Cz6xtpqIxydEtLfB/f2/iBILUJ9rVGrA+Ny5tT0wJ
a03r5EfpwDFd9FLjbQ2ohdWHNUYbTdUsPqQuacE4dMcK2ljNbZzcfkf57s92QlZwHNK4pDPsaWZF
kENohYVrHf8tTWx0ppWZtWHD7fwsYs7RPhxXXq4RaHrA4VRi9Q182NuST4jhCfW4D3dfFGgLlI9U
1XrfAcqZHiUBxbwFHTGDGukGrmwOhSNYXoyF9oWaWN13s25rpiewRDgZEgooWGxrd3B+eInPba34
bo57/VoD7cRqtT5DWG6HYwpk54k5q9e01NA/EIaz2LxCL227aLdFZ72DSNr0tZs2TKUocHx9sTR+
HnCdX97sU5i5vyYrF/J7bWtWw/lHYhf1IwSQidHoDXqYnUAlcAL5RAVHzM2eaqAADoHyge+Us5HG
T+BVEU+/fK+4UQXdvOjlHs9vJzphioLnUkAkVsfAX5aoE32/3fDQTVh9it6DPYSn08fdWksq4HrB
MmW+2AiKD6F4L0WfGWkA6txwBvirxbceVgagEe5IXTmKKGYDWLsXE4JK1c9jFxvxGRglhgZ/mKZh
z71+ZxFEnkuuc0TaNW5/1kj3Zqp4pGelOwjEbxwa0FIDASK3wxh1TtHHSTVgeE25LlPVHtXLgz8E
dYd/a4f2DF9L1sj0PTNZbtHupB0rboLvREchgfhVQvskJUoSf3zDXfcVP2NgTAgkR8T5u/aEsFLC
kZ1/4CPtE9InplgSyOiiFjNy/pX3bdesrqI8JB8mBanLJm+wj7EWgqp2T1GYtHb1EZPKk7SXnLat
6lD1XazcifcptBtzY55PjpY80Zq3ixB+0l0JAToVhEUwpRDaIb+G0ak0X5jS6Kv4TpmACKQlmgWT
pLaBbCG65GVLkVXMyFVqjDjsxM3CapH8HvCzu4kgE6IzzxHDd+rKYAIZYnYabnxhPmyO2hGI2u/f
wCFMRdACVT/QswkFHRgH14gQ6W0IeA2tjo+Jtol/8knularELNADvrVh40pvcpnamrTt/HcRs3Rv
9Mspzw4qaYZ9RV0Oz5kfgOdBm/3XRiRlz6CvBihfhJGzJ02RccOvXoONIPbbkRHNfFuoP8ogQgpq
DGN6iqxNFpMOIKoZT6ggIlFXdcPO09na5vsVY+NdbR4zO8XERhupGwt2hm3z4qI+8q1C8+coy4F7
ZheoYcRs4nQiOgG3lCh9wx4VJIn7QpDdrqG5e+fPM+GpaoQYEhJr2AILN19O7qWtCIPav3eH93O4
gLr+pS4dm1xbuYpbAVvI2ZVC9YR9eAJtjWWUwMvbJdY5oj8ycLqOOAewnYSatWZy1DzIc9Q8ctB2
lKzoFk6YDHToJSK+iOpSevBtR/SbpC+W8I8DRQJ5uDuPJvY3za53Fk3QnSc2A1N23q53hFuyxNuX
rIZMBhzlK04CiwzoS1KlT0FcaGCSFAfMaMQW01Sn3ED6R/wHcQ42h6N4PUn2RbVZxXK7q9zjWTA2
jJk81L+8JwMIuWI6kucYD1ERRhPlobha63K1OHvfVlUVAN/0NPzIRNX2E0CaDQHYU05b/UrUMcx4
BmXvNLxl+8THQSsBxKSfQ8lcPZ+3IQouTzAqPLKCToT5MZEoSq4mdMQoi7hzajWUdPcBku82CEgf
LibXLKvC8xqolzORXXwQMt6Qy0OEcMB4GIBaGJpzJJRo0tCx9vkEAVGL95Ffi3TopZ9TXvYweLfW
PAkWD2YOdkktLta+xflo3xow39bG2vB778FBQ2Sq1yyPRy0jw87d3cFLtYbcmjPZkZs+RSR1AdQ6
L47R+mvgVP+t8Yfsgwj+ffEUqvvdwPjaVw3n7e++hLj0kspy5LyMSAsiDoWyMf1kHK8kU3hEp8zG
D7ob5uiZQc3gNsTr0VTVWfpnIn7r6i/6GQXK0QQSPvJiHFGAxoJwnbwwcjX5DuRrdRq3/r8BnGb9
DnNSt1uY+FH9YSRF514GR9h0FPXFBXLYV4l07oAW4Tx4k5w2Y0Rf1INoatuLRLEziU4zgD8D2B1B
dpxgdSJcKy3xKlCUsmNgzYmwCDTLhLweQR7BNIDQOA+BqJWkBl5YAKA3m661f0OK47pKlBqSqBth
SgNJabdEMppprDtR9b9volgSKy6cDuNepgVAABdkLXonVeX1r8jsoWQptKLXXoQCBe85V3LxifgI
5Fhiw8R5ZF8NTshfjgQLHPjC2j7jgTXBQK8MOiD5i05CjdjVJ6lgFZS/98XDsnWCTQVICA0QH5LA
ooyLqrUcCABwp+ZV0mviNqa7PorQbhF3gdZYvESg0lR+tLWn5KmwEKZ0/kB6eLTTViLSe6/D60De
bMuZHSMNw3mKR00hMyYuMJXNwoq2ehXiAL/WeHDDoQcunGU2Uv+aoPFU5QZjAw8paoXkb3y7/cw1
sFXHmMoX6wFjueCsvIjYhjzLr25geNYs5bjNJzX73j3Nbq6UsG6imYRpGftEsEQ3ZgZpic6bA2kK
Hk+O26PAGFdRaLgGCJ67+Jnc92CxdXHLEh4WTiKMD0JsjEEkEPFkqyTwtbugxsKiMiZjqupreGEP
0u4wNpuqFsQfidYiWLNrw9Bp4yD4kK1qU2lcZEsmSsFGvSP/kabUs5wo9EeQpkeb5Zvp2T6jcbLo
DLH72mDgCPB0EXyBYS+ysOSM5PE9y4xfwSY/O3QW7IUknc0o4vcukPNgCYREOc/fCM7BLFPjJXRx
SM+JG/J3kfLPjxGNyavidq+pfxRne2Ydz1N6sHIVuUwsmlfEHkzj4pie5ezuaKnuHISE+eo9qYMK
elcTZvKcyshhOOqjvyMOIfTrPXn/RCBFDmZLewclziFvaXnBz7WMtKkPPXio6bsystBBwfLJak0E
cGJ07BUmj0uflj4MXjYNe03ho/friy7JYCJZLf6BmxkKTPCt/Jvc0uLObMu+OcFpY6BOWjv9QI5n
9bxo0KC0tKJpYlnAq9aFWDXCBntsFrOaYnrN1l7JL8sWIZ5jdttRsvqmmZ2i6sIIzXJuU1W3GE/K
Ljr8PE/7cZE751FTgkBP8RS/SGZxlQnck0VLgPYSaWP/YxcHQDYgWbVdj7qOKr9zimOUusIlFFlh
D5jX7/0Ax1J4cG8kPMmF7Um5DUWZ5Du/H5aoxdGO4jyaFE063eFWeE1aBXHb8T7HdCHKXyWw1/0T
Dqa6NOcJEQzkegKlVBYLrbZJWXc3sSwZJePeZTgaA0oWC6So1dS71jpyrAI8ljDrOYhYE+MJfjdp
esKqKowrYRy9dzWWBBSZvZd1Rnu+lMP03eiJqu6y7Ql1xGVHBnIPR69p9/z/VzdRMkVdImFdPwGh
qZZAaKXDfqctTgvGRES5eQMkL7LPE8UPszd1NJmT9RLi0A9WWcDqL7EpqnVh5LgdGs9y1Zb/MakW
rMPlbSj8pIGFFXEUf4BTBaO7YSg9CzskOhhuEgdPuqVT3CZ/r0tBdCFKjP5jPpEZ4meoOlpMnuu1
GkA/qSyKFff4AT9YMT2EamSrnfy6X3pPZhPqBxCV9HvhrT0+PRvn+8ycpLIeu7/TBsqqBDbjMU5d
mhlyROCoksRBElVVRVA8AUgGer0R2mXerndGmsd4LLqyjePGOK47ZJpV1Vp0BAQlo04KEVsCQSw9
UHYpBmmJvgS5E+A8sE2XtRnJ4gZYUYUxzJABMElMBuT6LB1vDtm6QsNTsrjkNY0ZyY2p53anT+WJ
l0CxGubYdEHDhWgx2oF3SghuWWnXZXFvmoyagSRGNqKXAHuoKxVagUb1epgUAyGKKX61yp5kvG2g
UEA1FJFNmzIA2cCFDkUm7F+JEkXucieSry8kfqetRegsk7HuoljuNS5JGegvS7NAM0L3bOJfwLNC
NViX8ZXrDip/Guet2eLak7W4XZgkh2nDh1/aOdhAy8SdYA6jHERvAmsPZbpE+JiKkwSzo+UPVbnE
jYfkdRLlrEwlUG/Q45UFTmIb5ZtgKJikSwHzqHllcJzN7Yn6HigB5lO7ohvOJRXc6J7u+PzJx4y3
25TSxAIAJkd1TlS+7bUCEmyYLjYCJOky2P1GJFiq569Z2wIMzhVe8gamY9rVARLpJRkl2yTXUfO3
S9wjccT0xrdFXk0pwwF8MtHBHAKKukifaBLGE0Ep+xm14sdck1ow0xfwdeAVQD1KcgQLUqfKJUEY
bCxtTaiugxK6HGC2KPje8pnCsyiVqFM3o/ZB5bYV2LJbvOVGGqE6+fF60B9baLCjmDx/fYGh7cke
0UtehQlo3MnXqKmiPMYHiuare6n1h1uuAc/d5hBcc7YdqHOeVkcHTiGEkiY0cUzpktC6KYC3SJn6
dYopMYoq8oeOYcMlBXL8VvB6vCHn1LqpgcPqUOvR2Srax+PkO1zch3FlldB5Gpb98CBZMdD3Gma4
qS3XBNXh1QfpFdE6s7KIJKcvC6B7x/sE+FKodJTTeOOuu2DJ7YF+XDokRguwo7y5moUkulsudkGo
ycIvkK1Z6ssOUBRpJoVfno65/jy4CraNlaVWxUD5GXQdB23LHFWE4GQvWqcihiJYJTEjL8h1gHvm
03PhBduCX3rZG/NzEDgV7x1yuYxJnIAhwustl3SIYu/MP9VVaJnhqpicZMBnFURnPn2E4msUb7Oe
e0FzX0Qqgo+hBe3crpydQe7c0B73wiIxKnUcOltRxLInV/aXs9vaVXLh9sMWcUljE5cSqujDkHb2
0mybVLk+c4XIOYnvNJ2G+NMXjkbTy5q08LPUlloQ25caSSvcxhSmq8DEnZJ5+Zw5CrY742sy01YY
qPH+2X/QmaMdIN+Rj2v2ygdhiRPbtPMAvq0VZWRaAIrUAuKOWR7d4hw9CVC8Ce9uBHT5VZX6SPlR
pBzz7pAiofitK9+ZMM5idc/fCx6kELRDaKBT3ZJ280EN+yUFbLKq9ynw0TzueF2zS0kIaA0dtMd/
1vNRTeRGip/Z7+k5Ik0F49OVmueZX714eqyjRlY8AQU36fGd6QwM5zYo0JBFjl4lYzBZWFaw2xMb
PsOaIwSWqY+8sn4WGTcuwzugrqPMLtp3Nm3QWJhJ+Er0WtjBUvt013k6WCPHzpbWsm0phlG6dbCG
NzI4lKQ5MixpAynHoZpOoycbvGMgQDJDFHNUI+/297ufP4sxf7YSfDtQpwQA3Mp7sagvFQXUN76+
R7hoY7o22h378lrBOUUrFp5/mJIqJTYLhvWF5vXiefuGvPWmhRJbQdndoEeHmi54bpO9A8hBbVH/
ytcYACjEfiB37jb6ykycSZlz4Qv+gw3CEqGvnR8L6wZhG4Y7f1jg0HWbHUAG63ttbNSS/+XKqma8
5v8S9by2NHDrON5rPUbaDc4FTzdZeORS3YFjBFxgwS2iKvjv+5IR77eD1j5WSv9rVfWC/BR+NNPL
Hh2GTWU7Wwm6sbDShjVjeKIA38TRZeVUN+THUipV9vc6IoNsAnU4fCX8c+C0wCcPxMIMXaCOvp9V
lctjhfCvpz+p3xTYaSYmmtfAo2/3rrrH1AmuzAqxbNoGOoFtB6ab5WhveIck4aSK2T3xDH3RB5CG
JCG7/dDgxGsaYMFpbouOx/1mDVOFxviaOQQmrWjdtB1OTHQ+rPOHb9ZYqK3Iv+mv9gRwUr42AUMZ
32pdDPT7UqpaFhP4s/1BTPrewb/sLbNg+0HAW83Tnh39fCmCDwXpbNTzixv0fyGwSpmBKhTqi/HZ
z/aj/DgnTuX9RSBTYX4RVkRd4dKVTohunc8L9YRxUkIltNk+KWWKCuWy/0e5huEz6iI78SvOlmL2
U7YdbAT39YfWHC6N07RlQcidJB9N+3wxc9Aie86QVsbR/FAKp5x24m329ny6x1PVUbOiASmSsvGT
eSGseGjpFsXMz/99VIe3hnDHn/HlyE6mhIMAAn1fkREUL3W6p6R+ufVd1CxpCRVC7iF2WkfqXGii
BT+BX+m5301HQoJNv5fCeQy/lnQTJE+uHugRtA8TFxpCwzPKWZwrzjUHa1ULQYHdB2n3+NNXtqqu
cC64t90SXDH69ll0GIwUWqeF4ecKkTTBikjE4FtmbJm02ZMWbZzkHv08TA1zG/jwR4fnORgJW/82
mcnNDt7p0KkMVlFlihMv/LiwKNRpB6zmLiAWPNJGwh5LbcDW5MRqry60v9keG9nQ+Q19B4Y7aisv
7HcCL53ZPvcYK7VlQneAEBYfBOrZNdRb2DvbeWvOLLCiwaqrVwwAJTaSfiqws1gUs/VQP3BbT6sN
69EOdbTwWqxoAj3D+inoTyOxO+/ynpxeM3nmHmzMabc27Hdm0sveiAFgkzVWjPjVdDBWVOtPReQx
Uo2Ju/+a5peCog4DPaNlP+elPUJEUvLzHKPE1ga2s3QzV2dHSZtx4+h5BAIoDZ3ynvR0s5VCErce
eDcrGEWQDveZIedj48iqNboqTvkiez8p9ADZJsu6//Oq7aR6Y4j3rHVP+mmg1Zmjl3WUMxkr2InQ
8pyGp3hegF2TYbuqz4Ml0vWRV7jwwbW5grlF7ZI2PtivZiTiNOFUq93/MbGVb2/wNsM9XPnKYWKd
T/4WaLuPqi/KOqbuftoY8e20gXd6Mrp+Z1srOinoF/S9QiTh8+ALBYmYlCk73e9/XJBSnNv+hWvn
KgM0f5XzX8O+VhRwmItq2cYoZeu9bfytAyK6FHe9h+BA5dTiblqO4cp+i8UXdcsJnAa15tRtcTwu
vQrp7CxhNhFP8D6NSwzH74mhFmSeJO6yULYRhay7irZIQEfUnIuT7yzf0O0R5z8npe2fD6DhFB5h
20UzTbq2OYwi4S7hLSde8meB8f5jnCuz/vIxO3J7Vj8NqjKPOjol3la8QX59Np9o2zUg4DCmnSGT
PAlwyXRUoo2+XKC4hpBfYdYH9LsP7nKgJpcs8HqRMEdczsxEHJUUHZuc7l35uSU5KQaW+z2MBVgi
EczD7n/9KFFEdRPJfk1vyAcEEp+du6SGKLEe9h2niAx9AYpGQUKkuo6HNB8NzqeQ2ssW8NRUkTbU
wWv4nnDluh/gOn02c3YzGjtvnfaIwRxlEXTI7OZODJqxdp47crzZM1mq55jq7+P6PfzJygqjvFmv
z24HiAR0vEEji8d103Oxs7eTUnSclEZXS08HV9IO21FjdAsdUd/YIS/Rv/xn1ZgsWWZpU0L2k3+k
+MnatLSx+sPa0UNXgPCUcQb4Uc7CA5x/drc9LENOmhttZn6L5HHLrYGGlJXtl6PraLZRV75DJksg
uXQN8rtJ+cKYSRSEokvc0Esf8OwLBSBKi5Zn6rnNrJRcKKidYC3ECAf4DoUEP9zXThifM1fJv+Ej
t5zIE8Vdry4ZKvh2i7SBY5EnDCrO3o4OXCGpbMoUk+zxRHPNIbm3SbXpr1UaO0mLZcZtci0YX7Od
ebD1LKEpL1TUCBo8mrLNfUq91ShU2dq9uHRk2RQ6cjQXk2ODhzHOwk2+wbrzJ/cxuRZcl+42/e2Q
EAYoFQQAKRS7ePpmBkFGn6i2Qkt0lOF5vT2plXFS3R5iIGbDXmCBGvhUDCTnah5GMFjiA8SvILHw
41SksfhoXcmNpjWMFzAObSBIDo2K6NZgqTIlM8HAQoRn3LBOk4vLqRvybK8UOxbr6KPvFYylpyFM
NUD4QiPKetEvEzAaKBi1iLaA+wO/nZ3C8xwL23JQ9FakvphbTPkZGURXj4zELVM89CnqFOxWJWcd
j93sYx2Agnk5oWpSQGweHu+22//jsQoQac7BS/x1uo3gnduOhIgFk6fEPtqJPGrqNV8chwpFZpNU
VPpti0XJK0vvBkBMNPNBco6oLaHOMwkrs9hhYLNULTQImIO2vKvpPBNai8ofQDB2xsjviKrW5Byw
QAKjNmsq9mLq8uBmTsorSF1vtK18PV0j5YaEjVQP+1NZljkA1512nJjwZrE1bRnwmk4y+kdEd7hz
wm8T0J5EXuauuseqvRHYBz5xwsV1KQ6bgjST42sIklQy3R94ofxJCJAht7kLdDqoShz+5QgwRhPo
TFqEWuhWOewnBfcs9Z8a+DTGzjnoRafkzKKiPp5Mw1K5CrtVtaciQePHolEWE4BVdBkqGslDAsO7
9C4+SMM8iUwbnmMFIdhYth0J4qu7uXZQzkrMxb/4cA25+/UVdvSjHdo0mibSVIdp9pnV/eweTZTC
9DnLxbQ6y5MsfzweNeiAB2JKLHL8y2IYoG3NddVO5JTg1AtqYonTCBgosKflqm6qxOMwMAiW+i/p
qLBPYdiBoOzJRZq8L1Y4we6n0bQMGsZm4iFiGLJ/N0MhlJAcEDPWxh2bYjfUPPw855Db3buzWszO
ZUi5msWkBj1mbz4EVbdP4KO7TIZVeaaS9SmvLbzOkPgb8rPv4X4kC+hzoQd47eGYtx3ZVqCpaGPI
ybYZB2WfdD0eYDmxdCKAUJg2WdGeDhYNjWYULYHXvJzlZ806K8NNg5hGNjPa3LAME1IEbuswlDBZ
XF1a6EFbvtmAP9ALcIV6cdey7f1bPRuA7Px+kxe4lwkY2nRtlzC8oDgBpu1/6eZ0xJ9uTaXUk+q1
U0KAI2UTNcheHdOMdlxxQek+CgH9EqcefJEGAeyMfsx0Hq1zCdGfMGQ1IOAm6ho94wQU2Jf8DFEy
s/wcnm1HW85C2eGRShNvJdI62yrNTyjrJI6CbkNrYoMzERYnqh55CNhwmjO34EL3vk3snRb3SGle
ok6KC4fNLmJcjuCnBrmOy5t9xaHrS3SQjMZfHttSQJyy5oUOKdmml7MnHHWfpcblgtzKX2BfPt4P
eRuXEYbCpnFvBH4AuGuhknkaO0FSMA3tCztDdrhOWHA6rhpXgisw71N4VZsPEDdFPoZ4ejLPJOY+
2kwb38iWtz82QdRxWdMxurINsWEa2D42IVLLhHq3yMbRZn7kcOu8ohb/INUrvAU5E6c6l3N3FJ0N
kfZwabu8iF1ehQKxd3s/Y/TxyQxHCeY79CEkTDU9xqDZImkBvlZ2+wq5Y8SkSEBjqD89sjOu1S1+
lLQA8pKb9fVqd/23a+w50Vvr1aTKEwvP6SS5Ol8JT2vibV8ljHXaDd1sll0pWQjEI27y8gbKYKzH
/6GYXRI3YJXQU5TEdme5h9GMKUmluScmkxTsjXEmkoc3/oChNSo/PCajrcFO547erQIDl6lB1FQs
Tb6YRSvHcH1diaCPVrNkoGdnAAB09PPij6YQ0BkdJaaYZXuGiYJLDRQPzQYZbt/4azOL5dr2vFCL
NxKsNbPaMz3kiAidH2hRCAHaUPi/B97T3rs4xJAJK8H4mvibTGPGbfdiftUy+htp36GmaKGEGda3
rPKmmO7bFyo7tGHgZxXRDKZx+L33Mm322WCTK23PnlKPslRODWsY0zkPntKqHiHHJVjkIalKyF4Q
BVN1E58fDH5ugSnQXClXPv+uzsib3EqENTgt4xIvk9xabrom76W1M+5rMo9+Me/eSimtdfUewQiV
zIjS96P5XIPjpUhUzAb4q81AkNo8/i+Izglv+3H7Vy+hfCTBLJjOIDMdpkMrIBgsx/j5mKYLq6aU
0b8GuNTu7CWvnlWVJ9WYsQgomUy3rLxeVgjB8dVMY6Dly7T3IFwc7pcTQurHwpOgJUUXPP0efwJF
rrJ56aurm1v2rvwzmcERrEniVk2EzkX/UuL7PRoByFiSV+L0txfbBd8m2ItnIPXIoku6S9C9vWIe
Bb2AcO0/qIc+c/wS5tdgH5xbpRPsU5fS405g6IauQKfgyQlNwB/Yx5brHBpxLH/mrU/2Ll+O6Dcv
Nj8mmpHPRJfYYLv6/Tgc+SnPjVEG6UsyRDmlP8FdFGO0w7oLgvMNR3e0msbG7B3mWlgsoDPkzH46
pqU0oRGlP61hpJBgDu64M3P9tHL64GcLYSH7wYrVMXago+d1Dqgo7YAaR0ZUYTiIQcG2zF0FouBs
wqIRw9ulg/bUcrbVpC6nFcJ/+nbqWBsMeqDyAkC5YDZRkh60D6wp4mRK/CXSPBIlv2sBZFVGebIt
k3nRwl1+BfpdCM9sJuCnVqyOnoIijRVyUJ0xslJ2XPWg3KkzWWIGkjnqJi41qYdLrxitwmZtPjaD
vHwp4VquH07ALHnTkEYtU6KCMF65XU1TWg5GCjgdfdKGF+Hhn+arY6YGrmFiHOQH16qs6lLNvlKO
2jOlMPIu3IQJVR6CCm6TWd2SNnloeeSvCxkW+Ku7UJRYZomh6Ch8lSeNt9ZacVpo7m59oDdDk9Y4
OKyi9w2O+LAJccZt7UNPtgCIL3l6cDldseUvhq7nIQs92X8Ht4ir1IV+Qja1Z5iqPMtMQJtoupFY
LoQMPORucq18XlOnD62cRJAarwmGsQIQTHLK8qiFxBjw1u1MmU1pdFqkAl7uJGpwh+6gSvRJO196
IPMNxaSHRpqHlvEwcVvAVVlpwNuTHYhZqB/zmwF9DCdi0IuVxPPKfTKR3ZmlK7+Oh1VvLTfUJdVJ
XdNlkexoT8BQvYFlblre44cDaA4kfghmT9mCG4GhHK0NiLK1vFG21WnuvEhUPaoG0wSVRmY2hsUb
Hh1B1fg4R4C0YqqoZYkj4+Ot3D6rs27W351gDRRPFRZctBnefjQrxVqWCcPV/yw2kDi5/hvW4gfx
L2Se4TVi7tg2KyDIY1O34k3SHFGQKmg/N6POgfaW8Z0y0M3rGORHbmA6m9oAgjrxTAkEpr2VA+PZ
yoz+1CQQEgjCXz+QG2lxUYvfMTEIVteAUIQdQFI5bgbgaD2xvGUAClI83z6xucH0v07FWwwnXpj2
wmT9BSv4zDVRvb7jRHv5pZ0GDudp465qtWt5Y22EdWiesoACiqwxwF84sKIqVOp9wNkltoYqqP2P
v7dVUJ/mwlsil2z3t8gfu+MW4Xhwx1afpUna3XsTzTr4Gw8cfapO5zw9wBF/x/vcxUPLho/bT4IS
lDM7gXFcuUIl6KfrH6I+pO8giUmUXv4THH6BnCDfo+DU5PKM2b5UYILxKGWpMmXGbSU+Exh+cgLV
bmvVuUOrkrVnsIn2nUOrd4T6I3hy4RI+CR6Amvp+BcAZbS1URCfMj/P/W1fsTZZYYqTciRVP9Skh
XNHcyfaXxGn0vIqNUUfG9eS998UbpHip8XdUwjPIjQT2wTFt0ix36aZBcSGqYVErX1c7fybBNFuT
9Qixh7WUrBS3uVxACBc5e5Wd9+/9JwEtGeEPPLZZjq7YET1BWClsqz9HGWjGbg5ZSfbbFrnxflmJ
jrhlkzACyFMbQ+q596vcVO4F8XmX+S8wI5EaS+lHUrjAPR9FN7Lyu3X50l+nKexdCLUpQOumSIpe
WVAizT8Vx9YC2Uv0Qf6jM+UCUrDew+03IvTD7Xr86Ydplgc5ab2jw/ac8DOwWMXdmvdW3dHx+CfH
caydMvZeC2OkULp+c6q7PkNzFj94uaknDZvRBZXiO4ise1yWs4MrrcxjKq6W4WyZIo/qkDHK8B3m
GhtavpJPXsjzJDuuYzHnzNVJTDoSXrf/SfQ2+nO4q86Ny39wpnRYaNtEmBPkREwHz0rN41AQo2Ec
5v6uGjTqNe3AcGgrZXPurflDgSAmTRD/I32PpEt3+cPNOt9CcZe7VHh85AvweOlGk3KEz581yaI7
a/Kk56y1YRpQzpJQANyJoLwuTufTux9JOAtSMQqQ9MdPXTPtS9lJZRnw5Eu9fJQ0ERVMI+SNLVWe
CDGVCXwECOr8HY3Wb80annjWVAsD5ho/CNSK6OxliLGk+PB2j+ASl1OuiPPd06DdFaDN7v4SQiRr
ZCLge0MxcF5ZLes8/k6GnFjFsf+bGY6KMCs5dvDIUxdO+EGUxHMg5StVo8OJiugPwmyMn2+VVqkN
e6XHIYbEg+AI9K/8ZC9cUxXDzu1e+xGuGO20G2Y1nDH1J0BcpNT3ifpUPQnx37Nv/GMae6CpCGau
LzHXSaJE3llxXefISmBem4cGRbUqZdGJZHxU6+TG8IB8Ohv8GLd6xxzI3Vh8y07HtqtV31fACYcP
xCWIhHz4xVMZ9PLHqz41Y4qrLL5cgaxJS/N/C0wEJI5RJavKiC0U6tDc1k/4ax52V0V94E+Fo0nU
32Xz4JGiIlEkC7GAtvGzBopJgL9oNnqgKajs/E176DsZoz3opm3NJy0b/r7702+I7I2dF7Oj9tNz
azFFA3YT0YbRlm+FcEhfs1D+VqRHWBIC9rAhWvZu/j+P+MAUeKWPVrUEiyaEAFxG28g0zuROcGwu
bmLAtcLN5VCTOjdN+jEllETHLbuYqx6ZW3sxydOaGqHhCglDV9zX2U4N8CbPZq6k1Tz0f7Sx7Q7J
N3gg3zw1zjIgdhy23dOTgB0GLTqIULz62H0vfv/QgvD5w7m2oZd+zMBfIf/TbYkv33fh9lM1Hn9+
igirxuBeDhDkIi47gQxRcnYFaBwWg3Q/fE6dHZDORNaqYODR7jmuk4e78f8hX8nYQqyjq3rkBeaw
MksNPmPN3pAa7xz7X8bGpr5j06uAfhi0MIJvdc7vvk6CiY/qPUrdN0cAnzU1facdmW18baDk80NR
IwaXFghCD37sLCvwFepb0sDgyuGT3f1nPYFcsrYdPxGN2QV6nO1hWrvGDzRB71qfLl9+9nQnZdGf
FJ48KuSidJ1mUqwGT/9fymf1A3gzdq9yCEhjNFFpXcDmyBATVhncEkhEOFMHm1qnX6bA5rX6OafU
NWKgaaEcdyJkzm3HYZakKnMXY9IUH0j5m7KBiF8V0hzi/pOXBLZCRfT3Cj4e3bGWPd+bP0FxkklR
cdrBV/mqoWMJzCFVrO6E1T6x8e9SW5w7gikCtf4TgwK6AUX+ZSQNF+a1IhAlZ2jkbyBd10mhakBp
+fnnsWWFzFfcqET9bE9jvyEVpCljh9jqWPNTOP6MfbPUUuRj5f24YJXV/4uHqML0x+4gSRLs2d9k
YDGC+YL8kq3iXId2uP5wWM49pioImhPR6goe33F0o2qpavLt+KnBv+Stw6zzxiWBm8Drqc4Xd9Nd
SzE9hII5ltE2ajMmBG/lKKUUXvcRg3Bl6zw90ZkMRAbsuV4EyOpq3Omjyg0Cqj0SQ/qevrv9yfHo
ujlr9vTcJB6h0yfD10sAE5cE6TSaQMyWxcchuPqjF5fj9PlUQc35yeTszNRi5YfOLEerAa9HgruC
mflDNlM843/KWJ76+dgjLT6ICJQa6SRQ6SXUxstGnDXH3XNybHaL8SDzFbGw7zvzoGdN4v+cYUJR
6S1L8T2e4A4gHq6eW0ay1Vw7BsNZAIx3mj6XkyzzGR6naT2N8gWFZ85KUaAFrVjh33cPlKMJjaL4
cE4qGNG+NNCQXOWYE1KLzjO7EXPvk5HrQEfCZKKgVsI0WfvPtowWrLrPz9cXo43Ts/e0lLOEcjFE
HeOxLVVhQW3inGwUvJ5KWS4mxMrgyGfWRLX7yl5zSpg/m9852mohAVaK64ln+O7b9CH+n+fgzEvz
K0Le7SHr0cAGuek4R3kVT3iNGcZ5E8xxC33OYSxD3WU/BslnUo2LHtYeIkyTcgsUXtpjLMFIWWFm
dkwyB3/WPKfm6c/fCjRt5w9lORA8BdIOSuPqUTwdP8dRQfdJC9z5G4RkGPVe6LY+S68hzGQFswfL
i16g8qECPKISn/NRkLg2FylZ7bvfGm7od2xn0H+0w2hurBpvNUvlcGtsbRlk64l1mMcGogxpr6rS
wC5hUlXUlZEmPtpG4Fp9ulzj4YlRdxOb6uO8+3XhSVVpIuWGtExzNV2pTWrTWd3QVbAEHAjEhwB9
gJcWc/hJSu4ZHQQULdnRaiwHSc2Bz0g+wxqVMdgzfFqGPdUmuFjBbTaCTYi0XqyQWT+QUnm5zxTj
IFHk5WAp1j/Vn/yD+EP+1KR4+om7ObTLQBEoshmy4C9TuWny9Ty99LoKFsnsjUipNwYguDkirS6r
ZBJtOQczHC1Fm5AdWXKQiIJOqT3tgyzUmx7cDzaOF+JRma4JJOmQAj7MxH0hPmXvwhp8Rf+S6j1B
CX06zYhx7c6T8mNTD7Al2l5VeftV9gqYZPlXvIFlE9hXm6SQhHxcJVKMSMuUk4Goj5gnR7sreYXg
fcaeUbn1Ccv0ju+nsO4IsaDktBUoK/u20hv38AedJOySKYWWz3Tts68FPwg5a3RG3JbuWEQA0lR3
Cj/72SUEKBGSZXtH6eVO9oFlN3eTd8WLhmdeARObw5zvA2MB9lF6YOiwLYGVH5p9xJrEoxHOJp3e
jPP85YvRMPHZHbyi06OaeMZIEALcFZ/FjYQV0KHCY1F/Zas9Ru0E91Gws1QZ1PdKu2emdHg5rzIi
pSgezn31pYiFpJCMKf5ohLQh6+2fOA5xv39ALUoOUFqDerSAkd9vtfPqDU6IwuTvT7xHwasw7eIK
NIPnuFdbIGvl9FO26hfbSDBmww9DUiQIufqATl2U2bT5nYT2WrEKsHGoJmdrCKGHyJl2m/HCgXsg
BHIqvZuJoHBOWZNbj5ndeDbjPeVyFvR7wEiKH3JUzpoI+pK/t9NtZHAvzPtfl5AGKD43DtLFg41a
KOu/f5zPtr76d0J9lLc6eZOBQMiWQAeLRbSl69bQgi1r1A4J16N12ss+Y6q82UMbNE+HvNsm/+UJ
fmNyWZexHbbBHLVOf2iji8cKC8XFNL8JYlXN8otbNcVYVHXgcZrSkJUpVfKLsDCwcvbxiiFebN9D
H/VkTAgLkBU9tL0flfLMCL8BuZOw85sMvoV2SMVHzZARfAtdUq+RpshDCxi0o1Y3ZpPWtr1fyhuo
axIGtbLFkovUptJwRekcAnDzkAZGnAs7Cl2+OkP1bv0kkLCIecog8MZ5dJVHJ11DKLu9kzhGCzVs
vxGnfCnHkFJmHsmR9xIX6CHiI21TdFC6wzMEZfPabxnkw1delQwVkmCoYt9JxOIq0KYheD/RZDyf
r8fBg6uaSZ2KyUzUOSpHLJlu3vrOSSGUOzp1hn0SlnD1dUUe+h8fTaP0+tEVSUtpDjcJ1P2hrcOr
yJ/MtVssLgoisgF0xfVOHDcuscbcRwWf/3rGq6GYGbxLLfwX+ks1HVbfw1h2ox4PjdxIUZBvqjlM
4lcILf5tZDj88eWu7GaRjcC8TKZKcPpJfNzchV92PrMSli0qLGRKmPittvAO6lkYv3vaggWaFIlv
O4GuUf+Xr0IQSRmkaA2X8rPrCt0o685+OeJRCnySIqApywbmpxDFXmIOAfTPn2BKSJpdCBYB6QhM
FpV+LxLtIs7iis3J1Y4IqbXNi0Cx/HBVt5s5TOa/xQXxIpjwWl/iaDPKwrLFiXPN4BTLWW5KEUj9
2cTu4Ob+TAKJHRX+dpT+r856amJ4TenSeF8l7ymgyIwNozI5ZNuDRnMs26PhUkgcxP7+k2T1DVlI
F/Jysi6163Aw6CHbvRduSY93EKEVjNO2MAjOkaP/NUh3cy/VxZqR+56YQrG0iGs1CfqlQdyUtLMx
7ifx0vfieODLcadNQqPhfKfUZx3DrbzYq9WbYrhIBwg+GxXi5ViQ1Bo3MHLkaT/kWhO4rV9HgrzO
7Z0UvJd6B0l5wTd55oJPC5AplxjNyEIk1reMe+sDBrKX/r0b/AOoustEkRlfsrCBq+CJgwVRErEM
FlQGgKTaMxUFd2Y+Oun/HowwP+tMCkfFDAAx3pHMoJ8sr1AsH5stp0N5SbKaq5gBpglh8EEtEKAp
exvkA0C0gS50mEoGQqnCFa9b4QajfBcL87P4SkyCZtTSz5FgcPmQPRMjfA1+1Ps+tO7nWUefhFNV
lvR+q9NUvMX10njk50C1OBq49B/YBQQuJTLPYg6+3xttUt+ZVk5h2ZYHFSSoiTSCYwlUCIXVTVRA
zUfvnQo/6qeTOiEJ5p1ubx2tPMG9kEvAD1ejtOOV7pvzZbMIJro/cOvKaFk39F/qm2ZLtoC1kmyh
T79Usm7ctXPG/HYOju3uqvVgzeBHuSGm2tBGz8atfOYLtzGmOa1CarmskaIvV0RYILPIn1A1OnEY
i5JPuEJTJBQTiQ/EQX9lqCABM12zV4qMbCtAX/kjAozKgmWcm27cDmU2ajWMpiEDtqHHkq23A9X/
LYDcBC0KOvZXyIPCgzvvLznCkAUMp7i/jJEPKvBvOCvlMW+62HzRTg1XTYqyubKg1NZ02oUyUDBN
M/gXwhSS58ltwGTWXFGbFkPGKiZDEj8K7Dr2igoUggS+MRvvc/TeRmRVxN/jkkBPGMTJnZVTLCtn
Erud7BcbbU7v92+FF8hZDCKEstLUs5sBHiLP2csYsAWk5H6pNIBRfGtL9kll0+RBD3HEmfPJK/wX
1nET/zNE7GABcKf7oY8tqE6Z9IDS8l+lf8xI1SsUMRRQx/yaNZ9xCQy2rHKPTsUbxWvDEt5e8hqP
s2EHsHF1X5qYD8pb0X2YPAN3jj4vx/wnQEurS6CHdVqhdEHvzYQSWV5vhSaXfUeljIBK3MMzK9H7
nD2MOebuJa4+9fHu95KPxmIktFiMiNOr9rYCTFO5LswYyT7QITIa7vmXbRtOz8j25ZcOXkoOo94O
igHfyqo4W4Jxey+APH4RuTuxnxH5tiiG9AGNeOrR7saVT/WiGyZDrkLHs2Hk8aBFlKx+znqwVKpM
nJ9SS2q3KVHmHZKeo6BG3ESV2DDRRjwVuf40V54rvlTYEA8fjy37wJMykcb+rmgX/JkxcL2H87LG
37rstVSL3LhweJd9Jl6gvQvQDLboX6kyUkET2rTgAMnYMwcfDFA+zACUnSUsDi6ossnzG/uEDhpQ
7VmS9kDMI4VPnsW3pGeRMnno6cm2ieM493Q4yv89z3m1Z4lHXWLKrHago33QMkJpNPVIuElE6vjS
MpbDm1eexC5vzbqyZKQHwzVwE+z5qWA+1pbu5xUfJ2SsTNf6ra2LR5ax1nA6BzD3jjw6b853Tdsg
DtYLKQ3AjyU6wun9tIVBChz+FnHaVgnNAhyln1A/t6rHky8WdHiW+zw3/x+TG2pk5LhcnI5bZKV/
yVt/UN2ary5/TVu2TqbIZ7bTaG4hsXmXJprbiYtsd7dpX4+4/iN5IHmGjQfQMRc1VaMHPXTWCC3y
ERbkgnA8AZBTycbQFcyRqBCUSqULp4RRcWZWzfsOM1LM9XMyXOhw7WYGmO9EBuvVlVaixdRstnG0
UcUMkw2zb5prujyS9TSvdw8WabjoJNSlJ8NAkPU/+BQ7hMYot12aD5HKpBx8PUaTG/DNnrOWPWYT
Il1xfkdINbLPU9RzvUWAOdYJ97ENA/YrMoDOgFunCPILo+TH3PQDIveWv8moQn9U5QRPtUj2+dhf
mTcuZ/b/fYBIRRnHfYvVQJ6wLUkfVwNeWMXS9FzrR6ZAvItO3Aa0s5xwpODgCSIYbCo3BDuhh1kw
Ur3u/Cea1gPmH9q92tbb2XY5vCHlwf4BHIJ9NnEstHqL4yxYJd64W908qZmW/PKb3rkyk5d3Bq56
JEUOHothyMGXfhacfhGCksleJ7YWpXr4f7b9VXAAbvzKdF3BbvdfLJKpAhp/Epo76h/IVNnU+X7v
mzy9Q2WmorpNwR2Kh1cv3tGvJu1tNAD8kRwtukgB9XZYp8O3TTJwXLD1LLDMSyfSTpz5AbCxM/9l
e0gPYVzAxS+fpJDZGuDYwWO7lHwVrmQzE7C+rL84+2pl26qrQC3vHmzRbJUhxwlGawQNJyFnRBD2
CTFAQlPbn9M8ML/0H/oHnimTJTS4OyX/0z9DvDNitgJuZPUYE4GJo+FrvBGs4pmkbzln5iPB1duP
ee9fhViyDiTdI+tC6DZBlfP6Sh1nDxMO41TCgDmMINoKGg54GAsWHvCYVKUILF5PgDYXniNKJ25d
pLOjso+3KETEcR8mvQzrV2z2qAshuo3kCbZdPSHzJMdPa2j+Y1hbVOUitMhjY4osmn5bvVto5Fac
fpLTDIsaXD/DVceS3iZW0b36OGfXVT7YPKc/4v1rsovoOPDisk150Rz+OOIDD5aqXDgPPXZVBMBK
iW7wk0QhSpQCLtbfXWQs/1FIF2sCMfQoJG/x0Lo+QZdukx78Dj3NwZwLof9Cb+O9EG/CRUT1+BYI
zfQbiPYtMwLFMQNpefbdLt3Oj75b6kU/7WB+RvgzZnG72/ujmVNP5CnQ4S3ecUi3kklTC6Cln27U
KROhPkwSboQYLUdfNy6PErKwqPZ36AGARbkbOUyOqbjC5SkDR9brmwRWS+0o8cluml/IdW43DtcH
r9ClarX9TvOsCahA9xq00IKVZLbLfcCF9hU2Smp/I43uu2QXKj4dWAfmGRuUvJ0TAxeLn3IhazGf
4LUb5MuKvmf+yiRM9eENA371VuvINKNBEo8FVm797JQNUgg/pIxwwl8uNeI/AnLHq0YAX/zGEL2F
12q67QC+IHEtcQoigx2SNt1aPiWmXvOtANszGJZ0YicWCdjA4woYNmH61k84YqruSoTqg5XEt626
JTYb5B9XWg3EZ67xaFNOwkwFm+ip8Xpyvb9m6h7bIQEYeqy8FdBv3pliJRPMddbxoaGChScmZF1d
F64sF+GGVP55fmbryo1x9MgWd80+rGoqtMAUUoCuse0r3jo4pmfLT2S+IZ1WNyLTpCBJIgFQfeOD
tdVXeJsjdsu/ZyZwzpVCO5oOeScsgjAeerP+WAQMnSmw2dQ8a3ZQW9NqkdUnEsk0P2uPyNlSyXLN
yu3nBMj4PAP8RWqvgUg4WznFuinf9R0HgCzivUzBUI4oDy+1S+ZrhgjqeVeZ0+7htPZZKr79Msje
E1dg0VCtcwDEzjUR451rxnfl4FLFtn28+ayp3JdVnrUb4dZJSXMNl0gXVuBQCyIL6rA96qIXvwMw
+gLABUFyvTuvqaTu+qTnEcSlT70v9SpjFryY6DpFmMWReArakC8AGwwK1Zl4n0uwqTxjk2lYjtJk
Q5txYw+sjRWzWF86xaLqn4ppyzbFEMUAI/Zl1VG3HUQtUxW3xlMsZKTIo5wktHrxq+lSho/+e52P
vW3qFcFIzZl+NUa7wGjDlS9gqnqKWOSnqFkBR8TV5ti0Ma5mV+RirmNbz+pPiIerL4+87fOA3yjK
vdyv3eN+ILuVC6IqqGvxQRF4WV+IhBnElff2hUe9UxYTnRhkemettbCTysJmBDppWeHK2fW88VVT
r1S9qwp9VqgkNaHpRIrllC67YLCfxzNYjgl4Xmsd6d0a99m3l+3Y9jVmVK1OOd9PFzMEDoPXqdRt
uB87hX1y+/HKKyA6ZUh8UyrPjPRz1f8IiPg8QCKr2e5G2tG8MF0e0bMR2rcG6hXz7XyuATXSl5ZA
StQagjwlnr5vPFQbVeNQi1hniiLCZDdr3nEzs7xyLqCiXw/MI53amqjJb3R4qrwfBN1u
`protect end_protected
|
----------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 09:43:24 02/17/2015
-- Design Name:
-- Module Name: papilio1_top - Behavioral
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;
USE ieee.STD_LOGIC_UNSIGNED.all;
-- Uncomment the following library declaration if instantiating
-- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
ENTITY papilio1_top IS
Port ( rx : in STD_LOGIC;
tx : out STD_LOGIC;
W1A : inout STD_LOGIC_VECTOR (15 downto 0);
W1B : inout STD_LOGIC_VECTOR (15 downto 0);
W2C : inout STD_LOGIC_VECTOR (15 downto 0);
clk : in STD_LOGIC);
END papilio1_top ;
ARCHITECTURE struct OF papilio1_top IS
signal CLOCK_40MHZ : std_logic;
signal CTS : std_logic := '1';
signal PIN3 : std_logic;
signal RXD : std_logic;
signal LED1 : std_logic;
signal LED2N : std_logic;
signal LED3N : std_logic;
signal PIN4 : std_logic;
signal RTS : std_logic;
signal TXD : std_logic;
COMPONENT drigmorn1_top
PORT(
CLOCK_40MHZ : IN std_logic;
CTS : IN std_logic := '1';
PIN3 : IN std_logic;
RXD : IN std_logic;
LED1 : OUT std_logic;
LED2N : OUT std_logic;
LED3N : OUT std_logic;
PIN4 : OUT std_logic;
RTS : OUT std_logic;
TXD : OUT std_logic
);
END component ;
BEGIN
w1a(0) <= TXD;
tx <= TXD;
RXD <= rx;
CTS <= '1';
w1b(1) <= 'Z';
PIN3 <= not w1b(1); -- por
Inst_dcm32to40: entity work.dcm32to40 PORT MAP(
CLKIN_IN => clk,
CLKFX_OUT => CLOCK_40MHZ,
CLKIN_IBUFG_OUT => open,
CLK0_OUT => open
);
drigmorn1_top0 : drigmorn1_top
PORT map(
CLOCK_40MHZ => CLOCK_40MHZ,
CTS => CTS,
PIN3 => PIN3,
RXD => RXD,
LED1 => LED1,
LED2N => LED2N,
LED3N => LED3N,
PIN4 => PIN4,
RTS => RTS,
TXD => TXD
);
END struct;
|
-- author: Antonio Gutierrez
-- description: adder and substracter
------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
------------------------------
entity signed_adder_sub is
generic (N: integer := 4); -- number of input bits
port (
a, b: in std_logic_vector(N-1 downto 0);
cin: in std_logic;
sum, sub: out std_logic_vector(N downto 0));
end entity;
------------------------------
architecture signed_adder_sub of signed_adder_sub is
signal a_sig, b_sig: signed(N-1 downto 0);
signal sum_sig, sub_sig: signed(N downto 0);
begin
---------convert to signed---------
a_sig <= signed(a);
b_sig <= signed(b);
---------add and substract---------
sum_sig <= (a_sig(N-1) & a_sig) + (b_sig(N-1) & b_sig) + ('0' & cin);
sub_sig <= (a_sig(N-1) & a_sig) - (b_sig(N-1) & b_sig) + ('0' & cin);
---------output option 1---------
sum <= std_logic_vector(sum_sig);
sub <= std_logic_vector(sub_sig);
end architecture;
------------------------------
|
------------------------------------------------------------------------------------------------------------------------
-- OpenFILTER
--
-- Copyright (C) 2009 B&R
--
-- Redistribution and use in source and binary forms, with or without
-- modification, are permitted provided that the following conditions
-- are met:
--
-- 1. Redistributions of source code must retain the above copyright
-- notice, this list of conditions and the following disclaimer.
--
-- 2. Redistributions in binary form must reproduce the above copyright
-- notice, this list of conditions and the following disclaimer in the
-- documentation and/or other materials provided with the distribution.
--
-- 3. Neither the name of B&R nor the names of its
-- contributors may be used to endorse or promote products derived
-- from this software without prior written permission. For written
-- permission, please contact [email protected]
--
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-- FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-- COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-- BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-- LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-- ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-- POSSIBILITY OF SUCH DAMAGE.
--
-- Note: RxDv and RxDat have to be synchron to Clk
-- The following Conditions are checked:
-- RxDV >163.64µsec HIGH -> invalid
-- RxDV <0.64µsec LOW -> invalid
-- RxDV 4x <5.12µsec HIGH -> invalid
-- RxDV >5.12µsec HIGH -> valid
-- RxErr HIGH -> invalid
-- if invalid deactivation of port, until RxDv and RxErr > 10.24µsec low
--
------------------------------------------------------------------------------------------------------------------------
-- Version History
------------------------------------------------------------------------------------------------------------------------
-- 2009-08-07 V0.01 Converted from V1.1 to first official version.
-- 2011-07-23 V0.10 zelenkaj Consideration of RX Error signal and jitter (converted from V2.3)
-- 2011-08-03 V0.11 zelenkaj translated comments
-- 2011-11-18 V0.12 zelenkaj bypass filter by generic
-- 2011-11-28 V0.13 zelenkaj Changed reset level to high-active
------------------------------------------------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
ENTITY openFILTER is
Generic (
bypassFilter : boolean := false
);
Port ( Rst : in std_logic;
Clk : in std_logic;
nCheckShortFrames : in std_logic := '0'; -- Rx Port von Hub;
RxDvIn : in std_logic;
RxDatIn : in std_logic_vector(1 downto 0);
RxDvOut : out std_logic;
RxDatOut : out std_logic_vector(1 downto 0);
TxEnIn : in std_logic;
TxDatIn : in std_logic_vector(1 downto 0);
TxEnOut : out std_logic;
TxDatOut : out std_logic_vector(1 downto 0);
RxErr : in std_logic := '0'
);
END ENTITY openFILTER;
ARCHITECTURE rtl OF openFILTER IS
type aRxSet is record
RxDv : std_logic;
RxDat: std_logic_vector(1 downto 0);
end record;
type aRxSetArr is array (3 downto 0) of aRxSet;
signal Cnt_Rx_high : std_logic_vector(13 downto 0);
signal Cnt_RxHigh_ToShort : std_logic_vector(1 downto 0);
signal RxHigh_ToShort : std_logic;
signal RxLow_ToShort : std_logic;
signal RxHigh_ToShort_temp : std_logic;
signal RxLow_ToShort_temp : std_logic;
signal RxLowGap_ToShort : std_logic;
signal RxLowGap_ToShort_temp : std_logic;
signal RxDataValidLatch : std_logic;
signal PortIsEnable : std_logic;
signal RxErrOccur : std_logic;
signal RxAnyError : std_logic;
signal RxTxNotActive : std_logic;
signal DisablePort : std_logic;
signal RxDel : aRxSetArr;
BEGIN
disFilter : if bypassFilter generate
begin
RxDvOut <= RxDvIn;
RxDatOut <= RxDatIn;
TxEnOut <= TxEnIn;
TxDatOut <= TxDatIn;
end generate;
enFilter : if not bypassFilter generate
begin
-- IN --
RxDel(0).RxDv <= RxDvIn;
RxDel(0).RxDat <= RxDatIn;
RxDvOut <= RxDel(3).RxDv and PortIsEnable when RxLowGap_ToShort = '1' else
RxDel(1).RxDv and PortIsEnable;
RxDatOut <= RxDel(3).RxDat and (PortIsEnable & PortIsEnable) when RxLowGap_ToShort = '1' else
RxDel(1).RxDat and (PortIsEnable & PortIsEnable);
TxEnOut <= TxEnIn and PortIsEnable;
TxDatOut <= TxDatIn and (PortIsEnable & PortIsEnable);
RxAnyError <= '1' when (Cnt_Rx_high(Cnt_Rx_high'high) = '1') or (RxHigh_ToShort = '1') or (RxLow_ToShort = '1') or (RxErr = '1') or (RxErrOccur = '1') else
'0';
RxTxNotActive <= '1' when (RxDvIn = '0') and (RxDel(1).RxDv = '0') and (RxDel(2).RxDv = '0') and (TxEnIn = '0') and (TxDatIn = "00") else
'0';
-- Port is allowed to be active if RX_DV is not active
PortIsEnable <= '1' when Rst = '1' else
'0' when (RxAnyError = '1') or (DisablePort = '1') else
'1';
do: PROCESS (Rst, Clk)
BEGIN
if Rst = '1' then
Cnt_RxHigh_ToShort <= (others => '0');
RxHigh_ToShort <= '0'; RxHigh_ToShort_temp <= '0';
RxLow_ToShort <= '0'; RxLow_ToShort_temp <= '0';
RxLowGap_ToShort <= '0'; RxLowGap_ToShort_temp <= '0';
RxDel(3 downto 1) <= (others => ('0',"00"));
RxDataValidLatch <= '0';
Cnt_Rx_high <= (others => '0');
RxErrOccur <= '0';
DisablePort <= '0';
elsif rising_edge(Clk) then
RxDel(1) <= RxDel(0);
RxDel(2) <= RxDel(1);
RxDel(3) <= RxDel(2);
RxDataValidLatch <= RxDel(1).RxDv or RxDel(2).RxDv;
if (DisablePort = '0') and (RxAnyError = '1') then DisablePort <= '1';
elsif (DisablePort = '1') and (RxAnyError = '0') and (RxTxNotActive = '1') then DisablePort <= '0';
else DisablePort <= DisablePort;
end if;
----------------------------------------------- Pending Error: Block Port for at least 10.24 usec -----------------------------------------------
if RxErrOccur = '1' then
if RxErr = '1' then -- phy error
Cnt_Rx_high <= (others => '0');
else -- other error
if Cnt_Rx_high(13) = '0' then Cnt_Rx_high <= Cnt_Rx_high + 1; -- wait for 163.84 usec
else RxErrOccur <= '0';
Cnt_Rx_high <= (others => '0');
end if;
end if;
----------------------------------------------- Phy Error -----------------------------------------------
elsif RxErr = '1' then
Cnt_Rx_high <= (others => '0'); -- -> block
RxErrOccur <= '1';
----------------------------------------------- RxDv = 1 -----------------------------------------------
elsif RxDel(1).RxDv = '1' or RxDel(2).RxDv = '1' then
if RxLow_ToShort_temp = '1' then -- if previous Low Phase too short
RxLow_ToShort_temp <= '0'; --> reset temp error
RxLow_ToShort <= '1'; --> set RxLow_ToShort Error !!!
end if;
if RxDataValidLatch = '0' then -- rising_edge of RxDv
Cnt_Rx_high <= (others => '0'); --> reset counter
RxHigh_ToShort_temp <= '1'; --> set temp error
else
if Cnt_Rx_high(13) = '0' then Cnt_Rx_high <= Cnt_Rx_high + 1; end if; -- 163.84 usec (maximum size of frames)
if Cnt_Rx_high(8) = '1' then RxHigh_ToShort_temp <= '0'; end if; -- 5.12 usec (minimum size of frames)
end if; --> reset temp error
----------------------------------------------- RxDv = 0 -----------------------------------------------
elsif RxDel(1).RxDv = '0' or RxDel(2).RxDv = '0' then
if RxDataValidLatch = '1' then -- falling_edge of RxDv
if RxHigh_ToShort_temp = '1' then -- if previous High Phase too short
if Cnt_RxHigh_ToShort /= "11" then Cnt_RxHigh_ToShort <= Cnt_RxHigh_ToShort + 1; --> count Occations
RxHigh_ToShort <= '0'; -- if less than 4 short Frames in a Row -> no error
else RxHigh_ToShort <= '1'; -- else -> RxHigh_ToShort Error !!
end if;
else -- if no error
Cnt_RxHigh_ToShort <= (others => '0'); --> reset Short Frame Counter
RxHigh_ToShort <= '0';
end if;
RxLow_ToShort_temp <= '1'; -- set temp error
RxHigh_ToShort_temp <= '0'; -- reset previous temp error
RxLowGap_ToShort <= '0';
RxLowGap_ToShort_temp <= '1';
Cnt_Rx_high <= "00000000000001"; -- reset Counter (=Low Counter)
else -- no edge
if Cnt_Rx_high(5) = '1' then RxLow_ToShort_temp <= '0'; end if; -- 0.64 usec (minimum size of inter frame gap) -> reset tmp error
if Cnt_Rx_high(9) = '0' then Cnt_Rx_high <= Cnt_Rx_high + 1; -- For 10.24 usec no Frame
else RxHigh_ToShort <= '0'; --> Reset All Errors
RxLow_ToShort <= '0';
end if;
if Cnt_Rx_high(5 downto 1) = "10111" then RxLowGap_ToShort_temp <= '0'; end if; -- 920 ns
if RxLowGap_ToShort_temp = '1' and RxDvIn = '1' then RxLowGap_ToShort <= '1'; end if; -- FrameGap > 940 ns -> Insert 2 Clks Delay to Rx
end if;
end if;
end if;
END PROCESS do;
end generate;
END rtl;
|
------------------------------------------------------------------------------------------------------------------------
-- OpenFILTER
--
-- Copyright (C) 2009 B&R
--
-- Redistribution and use in source and binary forms, with or without
-- modification, are permitted provided that the following conditions
-- are met:
--
-- 1. Redistributions of source code must retain the above copyright
-- notice, this list of conditions and the following disclaimer.
--
-- 2. Redistributions in binary form must reproduce the above copyright
-- notice, this list of conditions and the following disclaimer in the
-- documentation and/or other materials provided with the distribution.
--
-- 3. Neither the name of B&R nor the names of its
-- contributors may be used to endorse or promote products derived
-- from this software without prior written permission. For written
-- permission, please contact [email protected]
--
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-- FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-- COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-- BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-- LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-- ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-- POSSIBILITY OF SUCH DAMAGE.
--
-- Note: RxDv and RxDat have to be synchron to Clk
-- The following Conditions are checked:
-- RxDV >163.64µsec HIGH -> invalid
-- RxDV <0.64µsec LOW -> invalid
-- RxDV 4x <5.12µsec HIGH -> invalid
-- RxDV >5.12µsec HIGH -> valid
-- RxErr HIGH -> invalid
-- if invalid deactivation of port, until RxDv and RxErr > 10.24µsec low
--
------------------------------------------------------------------------------------------------------------------------
-- Version History
------------------------------------------------------------------------------------------------------------------------
-- 2009-08-07 V0.01 Converted from V1.1 to first official version.
-- 2011-07-23 V0.10 zelenkaj Consideration of RX Error signal and jitter (converted from V2.3)
-- 2011-08-03 V0.11 zelenkaj translated comments
-- 2011-11-18 V0.12 zelenkaj bypass filter by generic
-- 2011-11-28 V0.13 zelenkaj Changed reset level to high-active
------------------------------------------------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
ENTITY openFILTER is
Generic (
bypassFilter : boolean := false
);
Port ( Rst : in std_logic;
Clk : in std_logic;
nCheckShortFrames : in std_logic := '0'; -- Rx Port von Hub;
RxDvIn : in std_logic;
RxDatIn : in std_logic_vector(1 downto 0);
RxDvOut : out std_logic;
RxDatOut : out std_logic_vector(1 downto 0);
TxEnIn : in std_logic;
TxDatIn : in std_logic_vector(1 downto 0);
TxEnOut : out std_logic;
TxDatOut : out std_logic_vector(1 downto 0);
RxErr : in std_logic := '0'
);
END ENTITY openFILTER;
ARCHITECTURE rtl OF openFILTER IS
type aRxSet is record
RxDv : std_logic;
RxDat: std_logic_vector(1 downto 0);
end record;
type aRxSetArr is array (3 downto 0) of aRxSet;
signal Cnt_Rx_high : std_logic_vector(13 downto 0);
signal Cnt_RxHigh_ToShort : std_logic_vector(1 downto 0);
signal RxHigh_ToShort : std_logic;
signal RxLow_ToShort : std_logic;
signal RxHigh_ToShort_temp : std_logic;
signal RxLow_ToShort_temp : std_logic;
signal RxLowGap_ToShort : std_logic;
signal RxLowGap_ToShort_temp : std_logic;
signal RxDataValidLatch : std_logic;
signal PortIsEnable : std_logic;
signal RxErrOccur : std_logic;
signal RxAnyError : std_logic;
signal RxTxNotActive : std_logic;
signal DisablePort : std_logic;
signal RxDel : aRxSetArr;
BEGIN
disFilter : if bypassFilter generate
begin
RxDvOut <= RxDvIn;
RxDatOut <= RxDatIn;
TxEnOut <= TxEnIn;
TxDatOut <= TxDatIn;
end generate;
enFilter : if not bypassFilter generate
begin
-- IN --
RxDel(0).RxDv <= RxDvIn;
RxDel(0).RxDat <= RxDatIn;
RxDvOut <= RxDel(3).RxDv and PortIsEnable when RxLowGap_ToShort = '1' else
RxDel(1).RxDv and PortIsEnable;
RxDatOut <= RxDel(3).RxDat and (PortIsEnable & PortIsEnable) when RxLowGap_ToShort = '1' else
RxDel(1).RxDat and (PortIsEnable & PortIsEnable);
TxEnOut <= TxEnIn and PortIsEnable;
TxDatOut <= TxDatIn and (PortIsEnable & PortIsEnable);
RxAnyError <= '1' when (Cnt_Rx_high(Cnt_Rx_high'high) = '1') or (RxHigh_ToShort = '1') or (RxLow_ToShort = '1') or (RxErr = '1') or (RxErrOccur = '1') else
'0';
RxTxNotActive <= '1' when (RxDvIn = '0') and (RxDel(1).RxDv = '0') and (RxDel(2).RxDv = '0') and (TxEnIn = '0') and (TxDatIn = "00") else
'0';
-- Port is allowed to be active if RX_DV is not active
PortIsEnable <= '1' when Rst = '1' else
'0' when (RxAnyError = '1') or (DisablePort = '1') else
'1';
do: PROCESS (Rst, Clk)
BEGIN
if Rst = '1' then
Cnt_RxHigh_ToShort <= (others => '0');
RxHigh_ToShort <= '0'; RxHigh_ToShort_temp <= '0';
RxLow_ToShort <= '0'; RxLow_ToShort_temp <= '0';
RxLowGap_ToShort <= '0'; RxLowGap_ToShort_temp <= '0';
RxDel(3 downto 1) <= (others => ('0',"00"));
RxDataValidLatch <= '0';
Cnt_Rx_high <= (others => '0');
RxErrOccur <= '0';
DisablePort <= '0';
elsif rising_edge(Clk) then
RxDel(1) <= RxDel(0);
RxDel(2) <= RxDel(1);
RxDel(3) <= RxDel(2);
RxDataValidLatch <= RxDel(1).RxDv or RxDel(2).RxDv;
if (DisablePort = '0') and (RxAnyError = '1') then DisablePort <= '1';
elsif (DisablePort = '1') and (RxAnyError = '0') and (RxTxNotActive = '1') then DisablePort <= '0';
else DisablePort <= DisablePort;
end if;
----------------------------------------------- Pending Error: Block Port for at least 10.24 usec -----------------------------------------------
if RxErrOccur = '1' then
if RxErr = '1' then -- phy error
Cnt_Rx_high <= (others => '0');
else -- other error
if Cnt_Rx_high(13) = '0' then Cnt_Rx_high <= Cnt_Rx_high + 1; -- wait for 163.84 usec
else RxErrOccur <= '0';
Cnt_Rx_high <= (others => '0');
end if;
end if;
----------------------------------------------- Phy Error -----------------------------------------------
elsif RxErr = '1' then
Cnt_Rx_high <= (others => '0'); -- -> block
RxErrOccur <= '1';
----------------------------------------------- RxDv = 1 -----------------------------------------------
elsif RxDel(1).RxDv = '1' or RxDel(2).RxDv = '1' then
if RxLow_ToShort_temp = '1' then -- if previous Low Phase too short
RxLow_ToShort_temp <= '0'; --> reset temp error
RxLow_ToShort <= '1'; --> set RxLow_ToShort Error !!!
end if;
if RxDataValidLatch = '0' then -- rising_edge of RxDv
Cnt_Rx_high <= (others => '0'); --> reset counter
RxHigh_ToShort_temp <= '1'; --> set temp error
else
if Cnt_Rx_high(13) = '0' then Cnt_Rx_high <= Cnt_Rx_high + 1; end if; -- 163.84 usec (maximum size of frames)
if Cnt_Rx_high(8) = '1' then RxHigh_ToShort_temp <= '0'; end if; -- 5.12 usec (minimum size of frames)
end if; --> reset temp error
----------------------------------------------- RxDv = 0 -----------------------------------------------
elsif RxDel(1).RxDv = '0' or RxDel(2).RxDv = '0' then
if RxDataValidLatch = '1' then -- falling_edge of RxDv
if RxHigh_ToShort_temp = '1' then -- if previous High Phase too short
if Cnt_RxHigh_ToShort /= "11" then Cnt_RxHigh_ToShort <= Cnt_RxHigh_ToShort + 1; --> count Occations
RxHigh_ToShort <= '0'; -- if less than 4 short Frames in a Row -> no error
else RxHigh_ToShort <= '1'; -- else -> RxHigh_ToShort Error !!
end if;
else -- if no error
Cnt_RxHigh_ToShort <= (others => '0'); --> reset Short Frame Counter
RxHigh_ToShort <= '0';
end if;
RxLow_ToShort_temp <= '1'; -- set temp error
RxHigh_ToShort_temp <= '0'; -- reset previous temp error
RxLowGap_ToShort <= '0';
RxLowGap_ToShort_temp <= '1';
Cnt_Rx_high <= "00000000000001"; -- reset Counter (=Low Counter)
else -- no edge
if Cnt_Rx_high(5) = '1' then RxLow_ToShort_temp <= '0'; end if; -- 0.64 usec (minimum size of inter frame gap) -> reset tmp error
if Cnt_Rx_high(9) = '0' then Cnt_Rx_high <= Cnt_Rx_high + 1; -- For 10.24 usec no Frame
else RxHigh_ToShort <= '0'; --> Reset All Errors
RxLow_ToShort <= '0';
end if;
if Cnt_Rx_high(5 downto 1) = "10111" then RxLowGap_ToShort_temp <= '0'; end if; -- 920 ns
if RxLowGap_ToShort_temp = '1' and RxDvIn = '1' then RxLowGap_ToShort <= '1'; end if; -- FrameGap > 940 ns -> Insert 2 Clks Delay to Rx
end if;
end if;
end if;
END PROCESS do;
end generate;
END rtl;
|
------------------------------------------------------------------------------------------------------------------------
-- OpenFILTER
--
-- Copyright (C) 2009 B&R
--
-- Redistribution and use in source and binary forms, with or without
-- modification, are permitted provided that the following conditions
-- are met:
--
-- 1. Redistributions of source code must retain the above copyright
-- notice, this list of conditions and the following disclaimer.
--
-- 2. Redistributions in binary form must reproduce the above copyright
-- notice, this list of conditions and the following disclaimer in the
-- documentation and/or other materials provided with the distribution.
--
-- 3. Neither the name of B&R nor the names of its
-- contributors may be used to endorse or promote products derived
-- from this software without prior written permission. For written
-- permission, please contact [email protected]
--
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-- FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-- COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-- BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-- LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-- ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-- POSSIBILITY OF SUCH DAMAGE.
--
-- Note: RxDv and RxDat have to be synchron to Clk
-- The following Conditions are checked:
-- RxDV >163.64µsec HIGH -> invalid
-- RxDV <0.64µsec LOW -> invalid
-- RxDV 4x <5.12µsec HIGH -> invalid
-- RxDV >5.12µsec HIGH -> valid
-- RxErr HIGH -> invalid
-- if invalid deactivation of port, until RxDv and RxErr > 10.24µsec low
--
------------------------------------------------------------------------------------------------------------------------
-- Version History
------------------------------------------------------------------------------------------------------------------------
-- 2009-08-07 V0.01 Converted from V1.1 to first official version.
-- 2011-07-23 V0.10 zelenkaj Consideration of RX Error signal and jitter (converted from V2.3)
-- 2011-08-03 V0.11 zelenkaj translated comments
-- 2011-11-18 V0.12 zelenkaj bypass filter by generic
-- 2011-11-28 V0.13 zelenkaj Changed reset level to high-active
------------------------------------------------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
ENTITY openFILTER is
Generic (
bypassFilter : boolean := false
);
Port ( Rst : in std_logic;
Clk : in std_logic;
nCheckShortFrames : in std_logic := '0'; -- Rx Port von Hub;
RxDvIn : in std_logic;
RxDatIn : in std_logic_vector(1 downto 0);
RxDvOut : out std_logic;
RxDatOut : out std_logic_vector(1 downto 0);
TxEnIn : in std_logic;
TxDatIn : in std_logic_vector(1 downto 0);
TxEnOut : out std_logic;
TxDatOut : out std_logic_vector(1 downto 0);
RxErr : in std_logic := '0'
);
END ENTITY openFILTER;
ARCHITECTURE rtl OF openFILTER IS
type aRxSet is record
RxDv : std_logic;
RxDat: std_logic_vector(1 downto 0);
end record;
type aRxSetArr is array (3 downto 0) of aRxSet;
signal Cnt_Rx_high : std_logic_vector(13 downto 0);
signal Cnt_RxHigh_ToShort : std_logic_vector(1 downto 0);
signal RxHigh_ToShort : std_logic;
signal RxLow_ToShort : std_logic;
signal RxHigh_ToShort_temp : std_logic;
signal RxLow_ToShort_temp : std_logic;
signal RxLowGap_ToShort : std_logic;
signal RxLowGap_ToShort_temp : std_logic;
signal RxDataValidLatch : std_logic;
signal PortIsEnable : std_logic;
signal RxErrOccur : std_logic;
signal RxAnyError : std_logic;
signal RxTxNotActive : std_logic;
signal DisablePort : std_logic;
signal RxDel : aRxSetArr;
BEGIN
disFilter : if bypassFilter generate
begin
RxDvOut <= RxDvIn;
RxDatOut <= RxDatIn;
TxEnOut <= TxEnIn;
TxDatOut <= TxDatIn;
end generate;
enFilter : if not bypassFilter generate
begin
-- IN --
RxDel(0).RxDv <= RxDvIn;
RxDel(0).RxDat <= RxDatIn;
RxDvOut <= RxDel(3).RxDv and PortIsEnable when RxLowGap_ToShort = '1' else
RxDel(1).RxDv and PortIsEnable;
RxDatOut <= RxDel(3).RxDat and (PortIsEnable & PortIsEnable) when RxLowGap_ToShort = '1' else
RxDel(1).RxDat and (PortIsEnable & PortIsEnable);
TxEnOut <= TxEnIn and PortIsEnable;
TxDatOut <= TxDatIn and (PortIsEnable & PortIsEnable);
RxAnyError <= '1' when (Cnt_Rx_high(Cnt_Rx_high'high) = '1') or (RxHigh_ToShort = '1') or (RxLow_ToShort = '1') or (RxErr = '1') or (RxErrOccur = '1') else
'0';
RxTxNotActive <= '1' when (RxDvIn = '0') and (RxDel(1).RxDv = '0') and (RxDel(2).RxDv = '0') and (TxEnIn = '0') and (TxDatIn = "00") else
'0';
-- Port is allowed to be active if RX_DV is not active
PortIsEnable <= '1' when Rst = '1' else
'0' when (RxAnyError = '1') or (DisablePort = '1') else
'1';
do: PROCESS (Rst, Clk)
BEGIN
if Rst = '1' then
Cnt_RxHigh_ToShort <= (others => '0');
RxHigh_ToShort <= '0'; RxHigh_ToShort_temp <= '0';
RxLow_ToShort <= '0'; RxLow_ToShort_temp <= '0';
RxLowGap_ToShort <= '0'; RxLowGap_ToShort_temp <= '0';
RxDel(3 downto 1) <= (others => ('0',"00"));
RxDataValidLatch <= '0';
Cnt_Rx_high <= (others => '0');
RxErrOccur <= '0';
DisablePort <= '0';
elsif rising_edge(Clk) then
RxDel(1) <= RxDel(0);
RxDel(2) <= RxDel(1);
RxDel(3) <= RxDel(2);
RxDataValidLatch <= RxDel(1).RxDv or RxDel(2).RxDv;
if (DisablePort = '0') and (RxAnyError = '1') then DisablePort <= '1';
elsif (DisablePort = '1') and (RxAnyError = '0') and (RxTxNotActive = '1') then DisablePort <= '0';
else DisablePort <= DisablePort;
end if;
----------------------------------------------- Pending Error: Block Port for at least 10.24 usec -----------------------------------------------
if RxErrOccur = '1' then
if RxErr = '1' then -- phy error
Cnt_Rx_high <= (others => '0');
else -- other error
if Cnt_Rx_high(13) = '0' then Cnt_Rx_high <= Cnt_Rx_high + 1; -- wait for 163.84 usec
else RxErrOccur <= '0';
Cnt_Rx_high <= (others => '0');
end if;
end if;
----------------------------------------------- Phy Error -----------------------------------------------
elsif RxErr = '1' then
Cnt_Rx_high <= (others => '0'); -- -> block
RxErrOccur <= '1';
----------------------------------------------- RxDv = 1 -----------------------------------------------
elsif RxDel(1).RxDv = '1' or RxDel(2).RxDv = '1' then
if RxLow_ToShort_temp = '1' then -- if previous Low Phase too short
RxLow_ToShort_temp <= '0'; --> reset temp error
RxLow_ToShort <= '1'; --> set RxLow_ToShort Error !!!
end if;
if RxDataValidLatch = '0' then -- rising_edge of RxDv
Cnt_Rx_high <= (others => '0'); --> reset counter
RxHigh_ToShort_temp <= '1'; --> set temp error
else
if Cnt_Rx_high(13) = '0' then Cnt_Rx_high <= Cnt_Rx_high + 1; end if; -- 163.84 usec (maximum size of frames)
if Cnt_Rx_high(8) = '1' then RxHigh_ToShort_temp <= '0'; end if; -- 5.12 usec (minimum size of frames)
end if; --> reset temp error
----------------------------------------------- RxDv = 0 -----------------------------------------------
elsif RxDel(1).RxDv = '0' or RxDel(2).RxDv = '0' then
if RxDataValidLatch = '1' then -- falling_edge of RxDv
if RxHigh_ToShort_temp = '1' then -- if previous High Phase too short
if Cnt_RxHigh_ToShort /= "11" then Cnt_RxHigh_ToShort <= Cnt_RxHigh_ToShort + 1; --> count Occations
RxHigh_ToShort <= '0'; -- if less than 4 short Frames in a Row -> no error
else RxHigh_ToShort <= '1'; -- else -> RxHigh_ToShort Error !!
end if;
else -- if no error
Cnt_RxHigh_ToShort <= (others => '0'); --> reset Short Frame Counter
RxHigh_ToShort <= '0';
end if;
RxLow_ToShort_temp <= '1'; -- set temp error
RxHigh_ToShort_temp <= '0'; -- reset previous temp error
RxLowGap_ToShort <= '0';
RxLowGap_ToShort_temp <= '1';
Cnt_Rx_high <= "00000000000001"; -- reset Counter (=Low Counter)
else -- no edge
if Cnt_Rx_high(5) = '1' then RxLow_ToShort_temp <= '0'; end if; -- 0.64 usec (minimum size of inter frame gap) -> reset tmp error
if Cnt_Rx_high(9) = '0' then Cnt_Rx_high <= Cnt_Rx_high + 1; -- For 10.24 usec no Frame
else RxHigh_ToShort <= '0'; --> Reset All Errors
RxLow_ToShort <= '0';
end if;
if Cnt_Rx_high(5 downto 1) = "10111" then RxLowGap_ToShort_temp <= '0'; end if; -- 920 ns
if RxLowGap_ToShort_temp = '1' and RxDvIn = '1' then RxLowGap_ToShort <= '1'; end if; -- FrameGap > 940 ns -> Insert 2 Clks Delay to Rx
end if;
end if;
end if;
END PROCESS do;
end generate;
END rtl;
|
------------------------------------------------------------------------------------------------------------------------
-- OpenFILTER
--
-- Copyright (C) 2009 B&R
--
-- Redistribution and use in source and binary forms, with or without
-- modification, are permitted provided that the following conditions
-- are met:
--
-- 1. Redistributions of source code must retain the above copyright
-- notice, this list of conditions and the following disclaimer.
--
-- 2. Redistributions in binary form must reproduce the above copyright
-- notice, this list of conditions and the following disclaimer in the
-- documentation and/or other materials provided with the distribution.
--
-- 3. Neither the name of B&R nor the names of its
-- contributors may be used to endorse or promote products derived
-- from this software without prior written permission. For written
-- permission, please contact [email protected]
--
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-- FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-- COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-- BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-- LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-- ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-- POSSIBILITY OF SUCH DAMAGE.
--
-- Note: RxDv and RxDat have to be synchron to Clk
-- The following Conditions are checked:
-- RxDV >163.64µsec HIGH -> invalid
-- RxDV <0.64µsec LOW -> invalid
-- RxDV 4x <5.12µsec HIGH -> invalid
-- RxDV >5.12µsec HIGH -> valid
-- RxErr HIGH -> invalid
-- if invalid deactivation of port, until RxDv and RxErr > 10.24µsec low
--
------------------------------------------------------------------------------------------------------------------------
-- Version History
------------------------------------------------------------------------------------------------------------------------
-- 2009-08-07 V0.01 Converted from V1.1 to first official version.
-- 2011-07-23 V0.10 zelenkaj Consideration of RX Error signal and jitter (converted from V2.3)
-- 2011-08-03 V0.11 zelenkaj translated comments
-- 2011-11-18 V0.12 zelenkaj bypass filter by generic
-- 2011-11-28 V0.13 zelenkaj Changed reset level to high-active
------------------------------------------------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
ENTITY openFILTER is
Generic (
bypassFilter : boolean := false
);
Port ( Rst : in std_logic;
Clk : in std_logic;
nCheckShortFrames : in std_logic := '0'; -- Rx Port von Hub;
RxDvIn : in std_logic;
RxDatIn : in std_logic_vector(1 downto 0);
RxDvOut : out std_logic;
RxDatOut : out std_logic_vector(1 downto 0);
TxEnIn : in std_logic;
TxDatIn : in std_logic_vector(1 downto 0);
TxEnOut : out std_logic;
TxDatOut : out std_logic_vector(1 downto 0);
RxErr : in std_logic := '0'
);
END ENTITY openFILTER;
ARCHITECTURE rtl OF openFILTER IS
type aRxSet is record
RxDv : std_logic;
RxDat: std_logic_vector(1 downto 0);
end record;
type aRxSetArr is array (3 downto 0) of aRxSet;
signal Cnt_Rx_high : std_logic_vector(13 downto 0);
signal Cnt_RxHigh_ToShort : std_logic_vector(1 downto 0);
signal RxHigh_ToShort : std_logic;
signal RxLow_ToShort : std_logic;
signal RxHigh_ToShort_temp : std_logic;
signal RxLow_ToShort_temp : std_logic;
signal RxLowGap_ToShort : std_logic;
signal RxLowGap_ToShort_temp : std_logic;
signal RxDataValidLatch : std_logic;
signal PortIsEnable : std_logic;
signal RxErrOccur : std_logic;
signal RxAnyError : std_logic;
signal RxTxNotActive : std_logic;
signal DisablePort : std_logic;
signal RxDel : aRxSetArr;
BEGIN
disFilter : if bypassFilter generate
begin
RxDvOut <= RxDvIn;
RxDatOut <= RxDatIn;
TxEnOut <= TxEnIn;
TxDatOut <= TxDatIn;
end generate;
enFilter : if not bypassFilter generate
begin
-- IN --
RxDel(0).RxDv <= RxDvIn;
RxDel(0).RxDat <= RxDatIn;
RxDvOut <= RxDel(3).RxDv and PortIsEnable when RxLowGap_ToShort = '1' else
RxDel(1).RxDv and PortIsEnable;
RxDatOut <= RxDel(3).RxDat and (PortIsEnable & PortIsEnable) when RxLowGap_ToShort = '1' else
RxDel(1).RxDat and (PortIsEnable & PortIsEnable);
TxEnOut <= TxEnIn and PortIsEnable;
TxDatOut <= TxDatIn and (PortIsEnable & PortIsEnable);
RxAnyError <= '1' when (Cnt_Rx_high(Cnt_Rx_high'high) = '1') or (RxHigh_ToShort = '1') or (RxLow_ToShort = '1') or (RxErr = '1') or (RxErrOccur = '1') else
'0';
RxTxNotActive <= '1' when (RxDvIn = '0') and (RxDel(1).RxDv = '0') and (RxDel(2).RxDv = '0') and (TxEnIn = '0') and (TxDatIn = "00") else
'0';
-- Port is allowed to be active if RX_DV is not active
PortIsEnable <= '1' when Rst = '1' else
'0' when (RxAnyError = '1') or (DisablePort = '1') else
'1';
do: PROCESS (Rst, Clk)
BEGIN
if Rst = '1' then
Cnt_RxHigh_ToShort <= (others => '0');
RxHigh_ToShort <= '0'; RxHigh_ToShort_temp <= '0';
RxLow_ToShort <= '0'; RxLow_ToShort_temp <= '0';
RxLowGap_ToShort <= '0'; RxLowGap_ToShort_temp <= '0';
RxDel(3 downto 1) <= (others => ('0',"00"));
RxDataValidLatch <= '0';
Cnt_Rx_high <= (others => '0');
RxErrOccur <= '0';
DisablePort <= '0';
elsif rising_edge(Clk) then
RxDel(1) <= RxDel(0);
RxDel(2) <= RxDel(1);
RxDel(3) <= RxDel(2);
RxDataValidLatch <= RxDel(1).RxDv or RxDel(2).RxDv;
if (DisablePort = '0') and (RxAnyError = '1') then DisablePort <= '1';
elsif (DisablePort = '1') and (RxAnyError = '0') and (RxTxNotActive = '1') then DisablePort <= '0';
else DisablePort <= DisablePort;
end if;
----------------------------------------------- Pending Error: Block Port for at least 10.24 usec -----------------------------------------------
if RxErrOccur = '1' then
if RxErr = '1' then -- phy error
Cnt_Rx_high <= (others => '0');
else -- other error
if Cnt_Rx_high(13) = '0' then Cnt_Rx_high <= Cnt_Rx_high + 1; -- wait for 163.84 usec
else RxErrOccur <= '0';
Cnt_Rx_high <= (others => '0');
end if;
end if;
----------------------------------------------- Phy Error -----------------------------------------------
elsif RxErr = '1' then
Cnt_Rx_high <= (others => '0'); -- -> block
RxErrOccur <= '1';
----------------------------------------------- RxDv = 1 -----------------------------------------------
elsif RxDel(1).RxDv = '1' or RxDel(2).RxDv = '1' then
if RxLow_ToShort_temp = '1' then -- if previous Low Phase too short
RxLow_ToShort_temp <= '0'; --> reset temp error
RxLow_ToShort <= '1'; --> set RxLow_ToShort Error !!!
end if;
if RxDataValidLatch = '0' then -- rising_edge of RxDv
Cnt_Rx_high <= (others => '0'); --> reset counter
RxHigh_ToShort_temp <= '1'; --> set temp error
else
if Cnt_Rx_high(13) = '0' then Cnt_Rx_high <= Cnt_Rx_high + 1; end if; -- 163.84 usec (maximum size of frames)
if Cnt_Rx_high(8) = '1' then RxHigh_ToShort_temp <= '0'; end if; -- 5.12 usec (minimum size of frames)
end if; --> reset temp error
----------------------------------------------- RxDv = 0 -----------------------------------------------
elsif RxDel(1).RxDv = '0' or RxDel(2).RxDv = '0' then
if RxDataValidLatch = '1' then -- falling_edge of RxDv
if RxHigh_ToShort_temp = '1' then -- if previous High Phase too short
if Cnt_RxHigh_ToShort /= "11" then Cnt_RxHigh_ToShort <= Cnt_RxHigh_ToShort + 1; --> count Occations
RxHigh_ToShort <= '0'; -- if less than 4 short Frames in a Row -> no error
else RxHigh_ToShort <= '1'; -- else -> RxHigh_ToShort Error !!
end if;
else -- if no error
Cnt_RxHigh_ToShort <= (others => '0'); --> reset Short Frame Counter
RxHigh_ToShort <= '0';
end if;
RxLow_ToShort_temp <= '1'; -- set temp error
RxHigh_ToShort_temp <= '0'; -- reset previous temp error
RxLowGap_ToShort <= '0';
RxLowGap_ToShort_temp <= '1';
Cnt_Rx_high <= "00000000000001"; -- reset Counter (=Low Counter)
else -- no edge
if Cnt_Rx_high(5) = '1' then RxLow_ToShort_temp <= '0'; end if; -- 0.64 usec (minimum size of inter frame gap) -> reset tmp error
if Cnt_Rx_high(9) = '0' then Cnt_Rx_high <= Cnt_Rx_high + 1; -- For 10.24 usec no Frame
else RxHigh_ToShort <= '0'; --> Reset All Errors
RxLow_ToShort <= '0';
end if;
if Cnt_Rx_high(5 downto 1) = "10111" then RxLowGap_ToShort_temp <= '0'; end if; -- 920 ns
if RxLowGap_ToShort_temp = '1' and RxDvIn = '1' then RxLowGap_ToShort <= '1'; end if; -- FrameGap > 940 ns -> Insert 2 Clks Delay to Rx
end if;
end if;
end if;
END PROCESS do;
end generate;
END rtl;
|
------------------------------------------------------------------------------------------------------------------------
-- OpenFILTER
--
-- Copyright (C) 2009 B&R
--
-- Redistribution and use in source and binary forms, with or without
-- modification, are permitted provided that the following conditions
-- are met:
--
-- 1. Redistributions of source code must retain the above copyright
-- notice, this list of conditions and the following disclaimer.
--
-- 2. Redistributions in binary form must reproduce the above copyright
-- notice, this list of conditions and the following disclaimer in the
-- documentation and/or other materials provided with the distribution.
--
-- 3. Neither the name of B&R nor the names of its
-- contributors may be used to endorse or promote products derived
-- from this software without prior written permission. For written
-- permission, please contact [email protected]
--
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-- FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-- COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-- BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-- LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-- ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-- POSSIBILITY OF SUCH DAMAGE.
--
-- Note: RxDv and RxDat have to be synchron to Clk
-- The following Conditions are checked:
-- RxDV >163.64µsec HIGH -> invalid
-- RxDV <0.64µsec LOW -> invalid
-- RxDV 4x <5.12µsec HIGH -> invalid
-- RxDV >5.12µsec HIGH -> valid
-- RxErr HIGH -> invalid
-- if invalid deactivation of port, until RxDv and RxErr > 10.24µsec low
--
------------------------------------------------------------------------------------------------------------------------
-- Version History
------------------------------------------------------------------------------------------------------------------------
-- 2009-08-07 V0.01 Converted from V1.1 to first official version.
-- 2011-07-23 V0.10 zelenkaj Consideration of RX Error signal and jitter (converted from V2.3)
-- 2011-08-03 V0.11 zelenkaj translated comments
-- 2011-11-18 V0.12 zelenkaj bypass filter by generic
-- 2011-11-28 V0.13 zelenkaj Changed reset level to high-active
------------------------------------------------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
ENTITY openFILTER is
Generic (
bypassFilter : boolean := false
);
Port ( Rst : in std_logic;
Clk : in std_logic;
nCheckShortFrames : in std_logic := '0'; -- Rx Port von Hub;
RxDvIn : in std_logic;
RxDatIn : in std_logic_vector(1 downto 0);
RxDvOut : out std_logic;
RxDatOut : out std_logic_vector(1 downto 0);
TxEnIn : in std_logic;
TxDatIn : in std_logic_vector(1 downto 0);
TxEnOut : out std_logic;
TxDatOut : out std_logic_vector(1 downto 0);
RxErr : in std_logic := '0'
);
END ENTITY openFILTER;
ARCHITECTURE rtl OF openFILTER IS
type aRxSet is record
RxDv : std_logic;
RxDat: std_logic_vector(1 downto 0);
end record;
type aRxSetArr is array (3 downto 0) of aRxSet;
signal Cnt_Rx_high : std_logic_vector(13 downto 0);
signal Cnt_RxHigh_ToShort : std_logic_vector(1 downto 0);
signal RxHigh_ToShort : std_logic;
signal RxLow_ToShort : std_logic;
signal RxHigh_ToShort_temp : std_logic;
signal RxLow_ToShort_temp : std_logic;
signal RxLowGap_ToShort : std_logic;
signal RxLowGap_ToShort_temp : std_logic;
signal RxDataValidLatch : std_logic;
signal PortIsEnable : std_logic;
signal RxErrOccur : std_logic;
signal RxAnyError : std_logic;
signal RxTxNotActive : std_logic;
signal DisablePort : std_logic;
signal RxDel : aRxSetArr;
BEGIN
disFilter : if bypassFilter generate
begin
RxDvOut <= RxDvIn;
RxDatOut <= RxDatIn;
TxEnOut <= TxEnIn;
TxDatOut <= TxDatIn;
end generate;
enFilter : if not bypassFilter generate
begin
-- IN --
RxDel(0).RxDv <= RxDvIn;
RxDel(0).RxDat <= RxDatIn;
RxDvOut <= RxDel(3).RxDv and PortIsEnable when RxLowGap_ToShort = '1' else
RxDel(1).RxDv and PortIsEnable;
RxDatOut <= RxDel(3).RxDat and (PortIsEnable & PortIsEnable) when RxLowGap_ToShort = '1' else
RxDel(1).RxDat and (PortIsEnable & PortIsEnable);
TxEnOut <= TxEnIn and PortIsEnable;
TxDatOut <= TxDatIn and (PortIsEnable & PortIsEnable);
RxAnyError <= '1' when (Cnt_Rx_high(Cnt_Rx_high'high) = '1') or (RxHigh_ToShort = '1') or (RxLow_ToShort = '1') or (RxErr = '1') or (RxErrOccur = '1') else
'0';
RxTxNotActive <= '1' when (RxDvIn = '0') and (RxDel(1).RxDv = '0') and (RxDel(2).RxDv = '0') and (TxEnIn = '0') and (TxDatIn = "00") else
'0';
-- Port is allowed to be active if RX_DV is not active
PortIsEnable <= '1' when Rst = '1' else
'0' when (RxAnyError = '1') or (DisablePort = '1') else
'1';
do: PROCESS (Rst, Clk)
BEGIN
if Rst = '1' then
Cnt_RxHigh_ToShort <= (others => '0');
RxHigh_ToShort <= '0'; RxHigh_ToShort_temp <= '0';
RxLow_ToShort <= '0'; RxLow_ToShort_temp <= '0';
RxLowGap_ToShort <= '0'; RxLowGap_ToShort_temp <= '0';
RxDel(3 downto 1) <= (others => ('0',"00"));
RxDataValidLatch <= '0';
Cnt_Rx_high <= (others => '0');
RxErrOccur <= '0';
DisablePort <= '0';
elsif rising_edge(Clk) then
RxDel(1) <= RxDel(0);
RxDel(2) <= RxDel(1);
RxDel(3) <= RxDel(2);
RxDataValidLatch <= RxDel(1).RxDv or RxDel(2).RxDv;
if (DisablePort = '0') and (RxAnyError = '1') then DisablePort <= '1';
elsif (DisablePort = '1') and (RxAnyError = '0') and (RxTxNotActive = '1') then DisablePort <= '0';
else DisablePort <= DisablePort;
end if;
----------------------------------------------- Pending Error: Block Port for at least 10.24 usec -----------------------------------------------
if RxErrOccur = '1' then
if RxErr = '1' then -- phy error
Cnt_Rx_high <= (others => '0');
else -- other error
if Cnt_Rx_high(13) = '0' then Cnt_Rx_high <= Cnt_Rx_high + 1; -- wait for 163.84 usec
else RxErrOccur <= '0';
Cnt_Rx_high <= (others => '0');
end if;
end if;
----------------------------------------------- Phy Error -----------------------------------------------
elsif RxErr = '1' then
Cnt_Rx_high <= (others => '0'); -- -> block
RxErrOccur <= '1';
----------------------------------------------- RxDv = 1 -----------------------------------------------
elsif RxDel(1).RxDv = '1' or RxDel(2).RxDv = '1' then
if RxLow_ToShort_temp = '1' then -- if previous Low Phase too short
RxLow_ToShort_temp <= '0'; --> reset temp error
RxLow_ToShort <= '1'; --> set RxLow_ToShort Error !!!
end if;
if RxDataValidLatch = '0' then -- rising_edge of RxDv
Cnt_Rx_high <= (others => '0'); --> reset counter
RxHigh_ToShort_temp <= '1'; --> set temp error
else
if Cnt_Rx_high(13) = '0' then Cnt_Rx_high <= Cnt_Rx_high + 1; end if; -- 163.84 usec (maximum size of frames)
if Cnt_Rx_high(8) = '1' then RxHigh_ToShort_temp <= '0'; end if; -- 5.12 usec (minimum size of frames)
end if; --> reset temp error
----------------------------------------------- RxDv = 0 -----------------------------------------------
elsif RxDel(1).RxDv = '0' or RxDel(2).RxDv = '0' then
if RxDataValidLatch = '1' then -- falling_edge of RxDv
if RxHigh_ToShort_temp = '1' then -- if previous High Phase too short
if Cnt_RxHigh_ToShort /= "11" then Cnt_RxHigh_ToShort <= Cnt_RxHigh_ToShort + 1; --> count Occations
RxHigh_ToShort <= '0'; -- if less than 4 short Frames in a Row -> no error
else RxHigh_ToShort <= '1'; -- else -> RxHigh_ToShort Error !!
end if;
else -- if no error
Cnt_RxHigh_ToShort <= (others => '0'); --> reset Short Frame Counter
RxHigh_ToShort <= '0';
end if;
RxLow_ToShort_temp <= '1'; -- set temp error
RxHigh_ToShort_temp <= '0'; -- reset previous temp error
RxLowGap_ToShort <= '0';
RxLowGap_ToShort_temp <= '1';
Cnt_Rx_high <= "00000000000001"; -- reset Counter (=Low Counter)
else -- no edge
if Cnt_Rx_high(5) = '1' then RxLow_ToShort_temp <= '0'; end if; -- 0.64 usec (minimum size of inter frame gap) -> reset tmp error
if Cnt_Rx_high(9) = '0' then Cnt_Rx_high <= Cnt_Rx_high + 1; -- For 10.24 usec no Frame
else RxHigh_ToShort <= '0'; --> Reset All Errors
RxLow_ToShort <= '0';
end if;
if Cnt_Rx_high(5 downto 1) = "10111" then RxLowGap_ToShort_temp <= '0'; end if; -- 920 ns
if RxLowGap_ToShort_temp = '1' and RxDvIn = '1' then RxLowGap_ToShort <= '1'; end if; -- FrameGap > 940 ns -> Insert 2 Clks Delay to Rx
end if;
end if;
end if;
END PROCESS do;
end generate;
END rtl;
|
-------------------------------------------------------------------------------
--
-- (C) COPYRIGHT 2010, Gideon's Logic Architectures
--
-------------------------------------------------------------------------------
-- Title : Character Generator
-------------------------------------------------------------------------------
-- File : char_generator_rom.vhd
-- Author : Gideon Zweijtzer <[email protected]>
-------------------------------------------------------------------------------
-- Description: Character generator ROM
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library work;
use work.char_generator_rom_pkg.all;
entity char_generator_rom is
port (
clock : in std_logic;
enable : in std_logic := '1';
address : in unsigned(10 downto 0);
data : out std_logic_vector(7 downto 0) );
end entity;
architecture rom of char_generator_rom is
signal data_i : std_logic_vector(7 downto 0) := X"00";
begin
process(clock)
begin
if rising_edge(clock) then
if enable='1' then
data_i <= char_rom_array(to_integer(address));
end if;
end if;
end process;
data <= data_i;
end rom;
|
-------------------------------------------------------------------------------
--
-- (C) COPYRIGHT 2010, Gideon's Logic Architectures
--
-------------------------------------------------------------------------------
-- Title : Character Generator
-------------------------------------------------------------------------------
-- File : char_generator_rom.vhd
-- Author : Gideon Zweijtzer <[email protected]>
-------------------------------------------------------------------------------
-- Description: Character generator ROM
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library work;
use work.char_generator_rom_pkg.all;
entity char_generator_rom is
port (
clock : in std_logic;
enable : in std_logic := '1';
address : in unsigned(10 downto 0);
data : out std_logic_vector(7 downto 0) );
end entity;
architecture rom of char_generator_rom is
signal data_i : std_logic_vector(7 downto 0) := X"00";
begin
process(clock)
begin
if rising_edge(clock) then
if enable='1' then
data_i <= char_rom_array(to_integer(address));
end if;
end if;
end process;
data <= data_i;
end rom;
|
-------------------------------------------------------------------------------
--
-- (C) COPYRIGHT 2010, Gideon's Logic Architectures
--
-------------------------------------------------------------------------------
-- Title : Character Generator
-------------------------------------------------------------------------------
-- File : char_generator_rom.vhd
-- Author : Gideon Zweijtzer <[email protected]>
-------------------------------------------------------------------------------
-- Description: Character generator ROM
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library work;
use work.char_generator_rom_pkg.all;
entity char_generator_rom is
port (
clock : in std_logic;
enable : in std_logic := '1';
address : in unsigned(10 downto 0);
data : out std_logic_vector(7 downto 0) );
end entity;
architecture rom of char_generator_rom is
signal data_i : std_logic_vector(7 downto 0) := X"00";
begin
process(clock)
begin
if rising_edge(clock) then
if enable='1' then
data_i <= char_rom_array(to_integer(address));
end if;
end if;
end process;
data <= data_i;
end rom;
|
-------------------------------------------------------------------------------
--
-- (C) COPYRIGHT 2010, Gideon's Logic Architectures
--
-------------------------------------------------------------------------------
-- Title : Character Generator
-------------------------------------------------------------------------------
-- File : char_generator_rom.vhd
-- Author : Gideon Zweijtzer <[email protected]>
-------------------------------------------------------------------------------
-- Description: Character generator ROM
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library work;
use work.char_generator_rom_pkg.all;
entity char_generator_rom is
port (
clock : in std_logic;
enable : in std_logic := '1';
address : in unsigned(10 downto 0);
data : out std_logic_vector(7 downto 0) );
end entity;
architecture rom of char_generator_rom is
signal data_i : std_logic_vector(7 downto 0) := X"00";
begin
process(clock)
begin
if rising_edge(clock) then
if enable='1' then
data_i <= char_rom_array(to_integer(address));
end if;
end if;
end process;
data <= data_i;
end rom;
|
-------------------------------------------------------------------------------
--
-- (C) COPYRIGHT 2010, Gideon's Logic Architectures
--
-------------------------------------------------------------------------------
-- Title : Character Generator
-------------------------------------------------------------------------------
-- File : char_generator_rom.vhd
-- Author : Gideon Zweijtzer <[email protected]>
-------------------------------------------------------------------------------
-- Description: Character generator ROM
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library work;
use work.char_generator_rom_pkg.all;
entity char_generator_rom is
port (
clock : in std_logic;
enable : in std_logic := '1';
address : in unsigned(10 downto 0);
data : out std_logic_vector(7 downto 0) );
end entity;
architecture rom of char_generator_rom is
signal data_i : std_logic_vector(7 downto 0) := X"00";
begin
process(clock)
begin
if rising_edge(clock) then
if enable='1' then
data_i <= char_rom_array(to_integer(address));
end if;
end if;
end process;
data <= data_i;
end rom;
|
--!
--! @file: exercise6_3.vhd
--! @brief: registered multiplexer
--! @author: Antonio Gutierrez
--! @date: 2013-10-24
--!
--!
--------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_all;
use work.my_data_types.all;
--------------------------------------
entity reg_mux is
generic (M: integer := 5; -- number of inputs
N: integer := 8); -- number of bits per input
port (
x: in matrix(0 to M-1, N-1 downto 0);
sel: in std_logic_vector(M-1 downto 0); ;
y: out std_logic_vector(N-1 downto 0));
end entity reg_mux;
--------------------------------------
architecture circuit of reg_mux is
signal mux_out: std_logic_vector(N-1 downto 0);
signal sel_un: unsigned(M-1 downto 0);
begin
-- using sel as an index we need to use an unsigned
sel_un <= unsigned(sel);
-- assign depending on sel each one of bits in the selected input to the output
gen: for i in 0 to N-1 generate
mux_out(i) <= x(sel_un, i);
end generate gen;
proc: process (clk)
begin
if (clk'event and clk='1') then
y <= mux_out;
end if;
end process label;
-- maybe this can work as well
-- with sel_un select
-- mux_out <= x(0) when 0,
-- x(sel_un) when others;
end architecture circuit;
--------------------------------------
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
iisr0ydwFOm3eepmhOYSaxO3flYpViRsLN97vKyw+ai+x1TubmaH8qRRwK/QFeVsjlGTFdxookcr
olQwv0bmdw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
dJvTzz+PoD3n2Ot9SgKfpEhIshJxklhDhS1tYcrcmprfs5wN+lN+5Y+o9jEEql61IqDkJEIGu0xp
zaDWEeMqwkFuovmZnp/AnbrHb7R/19zPRtwSyZ8+VQRLsRMgscwutXu29fTUST6Ribitutae85tQ
1okc5mYK0mcSMIggcMg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
ZijKIWnBSOuwn6R4ZrzJp1qaSPGZMrP8GTp+SV+Sn9xEivGxLJtGM40xMLXxiYuxIopDD/A1usG6
HkSoNT6OzxHJWKkUEyyVzrZuJdNHJ5q3s3y5LSNY7eMxN9lY4/gygh7aVIBAO9YWzsWu3HLtrHA5
2vsUFQxQdkG5OTLVP1rH68P4j/dhqr/LVHw+9H76c/knGyalpHLRC7tnHQcfuezFJWlkzaNGHfUo
b5cE1YTvtdlZVmw2sVG/GbXIRi5fq3+Okdy+JgckZ4dVWbI20rfa9LkI09/kwD3anyrnovVQVx9h
F0AxolVKVVyWNAaSu1fvXllqzrdJiRLbdnsq0Q==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
LUajPw/jRTLlmEKb+9YylQ2jxw4jlSx/1GGaY1wFfWFdMwK2p0xvQMjui8K3EqJF0fnb3QNWuQDl
1vTtf04vcOAHkfRCeW7Mbp8qeUTtAsflGIPJDxHfVU8ZKprwANsENc8LVrpJ0WnjDFQIzJw7LDqc
Jj2TofWjKprdxXsMnu4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
KG6kiSPrd66zvVpG96eKD+783ebVLVFNF7pXgq+rCyBBRoa0N9Hp3DIWK5125mkICodI82zuSq6k
C8aCiPbDiv4tiuIn19WDNNPL4ncknL0KLZTLAkq0BIQIsnFNRaZegM9aXOdMYGKYLpnjSD9KRWRt
WPXPZfwprSu2D7PeDZMiij3MY+cixttgVmNfcx9Kkmvg+1B5sTSDTVs3fqpJBBO1YslTmxyJAIC6
uDuGqvQ1138z6f4f+f8vMXratK1Ypo3jPPb4FTNLYJio5Vd1Nbpl9kRRtj801Ie0GGhbggK6IXJx
785o6wX6g3tRyoHXGJ4DGUmWlIHATg0KIAflYw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 13424)
`protect data_block
rEtV4Bm3SmvVbKq1runp2SaaO1GImraXNQnz2t97NClVhlTBGZ14v+hHArmsTHZNME/QWduIEcCL
I8GdWPb/f0NXI5m0D8vUM2MFHCnzTFi82f0pjwFGBVpM7cHKBa5QRX5K/e5A/9KwgbwYV1tKqTXG
aWyx6JRfuzQINO3rQqM+n/1b6LSLygDM1QuiPthpMFKV8IfsVkaLDVqcLxH9/n7C64aisv1xK+OH
WhYRETSZok8+gbvdGdr2+VsE64ALl3DavNBK4S7IOGP5YtXviHmw+Qb/lvl6m+RggRYmTe1A6B5r
pghgGDxK2gS0ItU55quFmZMEuEH+bwLuaJA0/UWR19oWnbcTZnsCqEeN/xbKUzS6blm1K6RPZtYe
WSGhjFl0cKHEQe9DfEazTm6tS9mJ55lLbSuwE5o03LDGRapxUdSR0IiKy5C5UP4genzVw3zearva
qPWmPeGZcAEyFioI2o4OWQP+8mFdbza1kBOuw4BP76P2c+ij6wbxXAWVxtNmL8f6AgS1AV5SqIO0
ftTCve0JloVh9kpHsbXE1TS45+y0IuiC0N3a8PAEsXa/tnLsnAydpsXIQwMLXmgKfoXKzabAHHdI
XZJd/NxD7+xY3aINMVaO5eSSLIdjkYZIeqm6qf+x2eNd9v2nue3I9rjHkjMBIty9wqDCI5HznV19
h0aPmdRn9t7Ft5xXq0GXqSl2I9ZROoM4hg3RU6TCVY4IaDkErgP5cMhIwuHsntmeWvsvkZFygQtU
9TUaf90O9HINFkrdIHf0ZCgtCgUw6ffQNPAkw/6MaoKxm9wdczGi3ur+eyRvSLy7+LQX/dOqvXKM
9UFNjkQk392HWfkT8aaXacuJgFT4hmoEXDGY+tSqQrQRrPmelj+ksf3PcI2r64RSTjiR+9HNqWqJ
jPJio2xgGdQdGrH+UewLz0ySmNDYmqxIdyqKfv/B1BYMUpGd+l0eRCp0RwjP6nt7MKkBishuJTL2
2kpCGDQ4HELrlovnj0dMihRpFZAIpY55DfNVE2hnbkHthyDrEXapmovyPqDFel+HKDdimVyeM8CR
DKl0D2+OZK8XWAiVk9Ve6w0rONvwf/XvaAkgxa3rDJQo/8g8oiGRq4ku5l3OZUKrPVRcjVNCxHRq
81RLF34Ztt0FyGvWgFBPXPwl/QfIQcetnIv8BBHDyYvjjUEJZxJ0yVIBqSipzmyIn34Kt0GvhgJJ
oXsivJz4IQp2WiLYnKzv7NuBWYnOF+M/H8eFTLS7ynV/b0CRf7qayeeaKYL0uv9mUeXbILs7F9+8
XkemV9ihHFfHS04009LEbIzG2O13pEZ78n4YAi47TmCv22T8/Ve6sSAGowqE6FfeksCmQ1+Z98YQ
uXIyCDvF0dlGJwZxogjNRbjyCBj6OOagNPhSW71GcVdRv5XSPoZsF68V4hWQeNb+itDo7ZPtZJoJ
YzLjFDCWp+2G5a8+OtWGetlJNejx9rEDOQvPXNhCi9xzzzSvIevRpnt9XX8uVwzzSJnKhI91LgRg
ID2cjEMis7S70eKGvR2/KBOhU/KAbsgGALtSpbd8HPFqo4CWuxEHCYImqvt7m+vI7jIEpXbwjtx8
QWNgKL8RNSViXrcj5CsXvOI28Nk2V+GZ8jr1/8I4R/Yns4Xfj1TTWzVeNCNHbazn1nufigCGV4Vl
qtDHRGZpM2GzgWRsMj5tsZldV3pp52C/Dpr/92KUqWKMf/mZbYDJL1X0X2Tw7iboFgBgx1miq+ht
zrLMfkmBPAPakC7uTHv8wdz7HICGyvCct17zvGp/b+9c5KI7lCBCd9jn5PTW35q5ksO4eC9R2AqE
0xJmD9GKB17q8Jk7vlAMs/IJV9rgMDnRfyFkOl4hl2S45SaIY1ObTSNIHJYg+rp/nN6BMaWKrR+7
O6t2IjDTrKFkfrU0cMF3G7EiQSf6RI1d8iyqNJLJJ3fbFhF7XLnn/CwlkZ/03Hwn1nJocabXwbc2
9Q6RrzrxLCWMZVoXaUEBQvapxENHsyZOrmSevUQnuCknCx9Eh/GwdP2bYVHxXWg7ySdjQnVMtR4v
qT7n0yJuHI0ite3a92Oo/MBdlgCwEcxfvgz0ILRIK4wFe098lGOX0tVEsLdEUijEAeQR38bksd9a
fuwZzPBvMZQ+FON4CQYrDg971r8Qz89ArQjVxWF7TdD0Oaq9vaUrLocNzIw9AcIy8rWaQnwTR/K0
PsXLapKx1fOSZnuztuMHoRXGaqZVlZJGs22/GiJA9y/IBflmF5GNFnRUbXVT8r+FfMb7zIr8eP+b
OcPNp6F4kqt/b8gae/9JOIopCuWXpu5kDe0U5aC2qmvMuYbNI88aUx34i3WHd8NWKNbdtGDaQ8nM
iyuSX4j7EgwTOuBR/iFM7rZAATM59ZFv+9wRq8hbXVvfsBp13upya8YovLN1O9OWrzxUWym9ZPN1
mDhMT1YgOqVRaJ2ADyjP98UghsOXt6ybu9jGeEndP5T4mZjxZp82OMxqqS6VolaMbGRNPa271n87
65g6Q9l7RYtOL1PjdBOlgNpUdYZwxJ2EGgI1wPnrnuUiZ7sdhpuFkhJDdh2mHYlIUZHAsriLKEHR
XOdtU+Desuf1ojV6OryxMP052nRo3DfSj5+dKgSFWVXGLiS4Q5dQxDHIvUugnqZqf+FK5inrMME5
1eHWMPkrqY3H9syJMZ7RM9SwYc/zjL9fOqr9mE+npGx50NODLrgb0FydLIXRotOtI+YSbZHKzsKt
xoZNcJJ4GasWF69GNvRenQ3kp1eh71xjJw5a0KZmhsJJXThZLqSzb/sTisTU8jCaMh6S6ag0knK7
jonbXo+dctsmQfLpvLXHN4TNqJnY6alIH0HnsTz7EklgiqvaLbFn+25uUJSNDHESZG2BaAtNvG/4
WuvQCSLWeuJpsrPd+06Bzmmnlvn9InJZhGDVhnZlfj7Kh2PolkMjpLgzqH4f9hm/7zH7o7msjyvZ
Rj/JnTghr2ou7m5Ayp5K+yFEUt/y9WWmqXlKOpf12P8RITbx8ILm1kWRqB8L+xfF1r2HXt+av43O
pyKFj4Kq1FZckfpg2It+beWX2P825O6hDubEjA2RyF/zyyc3lMSS7vtAQMEOEJnWNslP5r0po6TK
F5+Ikch7kOxVShNh4LWWzwFtJb9SBv0iFIezeCGrgApE2blMwedVwOdpPdPvsQjNRYc8YG+dStcY
JUIrNMdc6m5qSEWO36XNGXLN/ZrjKkZcCr+z5oN8Oa4cO8jxqZo5bZDRVUh4VXM8a+hHCiVvWsEG
HkxV52NFazh7Duhb2Ix5qYigebEWfDnA3frHeY+lRAIE3+X/YoDjgbPuOqgwawkAvhSCeNbNxuTS
T9ZzmE8PWRbDowhElwhdboesSdX9tyyp7yCSM6fxKFXbUrPplwsSNsMYsJJ9grw0leD0bx4Cd0Vy
Y8dDayiLLROqmsdsKe7b4i2o6u8A0RQrPB31DrVO/yPiNygxChVesembc822gDnOAlf6FO502nEU
ItbE4EyM6ZuRk+69RSoT+2AZGRndh55WMQYb6i7ALzZeSttxOh6V+LV5SNYYdeQouPNdd+N45DZn
niJzd/11g0AFDHSZFxMK9p0VsOmXbAPFEjcTvMS7PiMwhUsav6ZfZjkVwz4X9s1v8DCZpNbKSq88
kGJQIcZYRdAPuD7V1zvdo0Zf6leEwpYg5lACMpJ8rGWyLPBrYD/CsWB0THjSjjkRntpZXUTF5Sq1
IPSYaQtCSAHZKO95giPeqw3zw2XQ5ci2o+t0eS1YvmSPlvMfZRnkdx98t2mA8ABd64gljY5f+0O0
px5Pec1R5VTiPNgghdEJlgrPqQxSP7vDXo0dtJmtqeP90QCRgaOqEt27wpqzv0KFUth0XwtaJeQ5
dejR/hEOliBmBscgJkx0gBF/nLybnTcQ6xwwOe25uqhvJIiepSDJE4ICrD/MSurrVfozreQGinSL
a/tMurSZF67eavaP5tFe2G44AmkmV4WBRnOeWOW2dJ2Q1sYHMUzfnWjdSw1sJJu6+Y0fUowVqq0Q
K2lcfV1v+sdb0adNWmXRoPrjCpXnMpWUyUXWCaY8r49ipi+4TCdxE4p/IUZfO1aumt4+xQcBT0dh
t1WR18HGPmHp719a+JPxfWkOQjw5JnEukkqxKV6fqJPDzGrHDJvrkNy1tkX0MN6Z+Olw//0xoyyG
9SEwAH72HyUlbfM2lhwM9N6f4cr+CLxPF2At8ppy84kKN/H+2RDt520oTXKCcGFU/txd8LdCs9qG
3diwadeKrfsinlzq/W+3PUAPHvjHcwRyRb4m4Wv6J0kW7ItY1ox7z91NbPGA481MOKLtCEwm6vuk
sfLsMi7+T/Hm+qsOXlQ9i8Pf9VAE9LWS2byZEwPIYDYtbLm2L09NRsMgfm6PotDA/9WaPtrx/CrM
IMllkwsRz86jBnsfx1s6w2v/gxQFWv0fY8mf1WywsWC+WArpCmvfHO0WMIJtyS/B+XcdiLdfrrJ3
qeRMJy8lhDn9mvRTVYzLXtu6Fv98eAxRiP4hPmT4+kxhTz4CT4cDPP9YKhdzODoL28xWfAYFbD04
Z7nP2BAp3o1FR08u/ctwg8oxDjcRwHkmDHquzKrPjnQBKXv9IMSCNsR7asFA/JqdhHcmuKZg6PRk
6XzKLzz1/Zs3XVZ/rpAcA4yoz12/yPHmsazO+a6cgbZy7JTSwRBhRd31L/KB4M7WXzNJ4paZAsOI
O5FWmQpp6eEyGGXpKkGy2qdqVRuRe0IjzwDJG6clerafsgCAj755Q2eTRVVvvRQw+G+hVjqaFu/+
m9KSJt+0hjHW1BHC4wyHN94ORPERUFukKcxOq8a3C4r5hTOZW3XWq1v7Ks4H7Zwi4AlNCGUKQ0ON
VSZKVFl61F+tBDQk+IqFz1WMfzhOfRJYfalfeqp5HOOIaK9cOhXG2oYdhceL4LDJlhJPAqpAc23Z
G9mCLMh7l3PvdGUWIx2s5Z4EpUsaxWTxxqD4a+cGuaZLzeV55zSCZ5qehwrwRTYvoBZE1+lOXnfi
Ryt8wko4y/GJZL/NuHI8l8tJKmVjS+XqWIN5sWUs9WMNit0HB/gZfmTuuvpwP7gjFuUjS2Q+jgYC
9ppF022c89tfs59OKVOjOQ9s2b2FlXyn4zn9AXI7AYGal0MNPRsQwnnaZJiTebyHcwtZucfEnh6z
9K9skBFs29qlMPNYsFP7y8mzdNhDng3TEgYpao3SPfXwDj/CSw/ObVggf8enRTUNlDfJ+17WwDyO
/ajc27MzTRLyBCCQhUYvMn80lvwSHxWDIL3xKvr2OLMoIAmgIZJG3sJMyhsOPqFxVb1Qk7NcojOn
D11t84xem8WyHJRbm0pbKV40U5U40scS0H5bcMWTEfGT4W0Mt47O181hbfymq/ykV0yIpouFyaDb
tUvUtKWqMknlkUxdllrfasNUWgJUfn8Cl8EV1Z3U5ABYiUNuRr5oKcdwlS7eB/n+UgV71hPGXiii
tFKvLiZLXS9l/eoEDDKLm6/8OksoHEEFzRFIR8skagCp4rd4fSGbOUietH2v8ecJdTlXFP0ex7TX
vh51q5DGduPDyv5nJCNInuPVn9Z9r55S/RGw+ySGAcaPEqaldHWakl5LrzE1/zI4K707/QMAGDAl
HQdn4RCGxESdD4HJn35p8o9hnYl7WqaHBddVyszwX//kjQ4qJolh4qp+txlSxnSJmCs83a+aCvMk
IbAnKPRH3SP74XCHOQ3bziFlRO0Q1JWSUp+e9CxVX0iTOPbgrB+wD9yT1o6m+o45pOEi4yqt1ZwB
6GRU83LP6o8j9UURxZDZ5WMgpNs4xuaPxAt+XstW7JOy51tYRnIykokiQYYg+aWP02kEZ7KL2cif
/t3AkMcRC0iKXbo3c1/h2uNlHbvkqXBOZnmGMzMriXwdE44Vt7izgW2oY3N5IFwqNHPtWi9SS6yA
hcD+oqiZ5YnDx8Be3R5HxKPygh4K5ePLmLR6um0pz3P8seQq1RKFP9ctf/u1v+7BlNqcdEez0X0N
I4X1lXx9dw1MpdfXfG2riDistMNSEH4Rrccb4Y/8cnRL9fh3mO987Fb0uI03HcxJiExzcwHZ9dco
s3vvxZTsaIGr2xmmD+LsMSI00fJFv0/mbMB3LLQfURbbNvuYtBK+fA8U8TOqSRvPYwXdCjv80svZ
ecFEkHhpXJBNTWSfUIzupFvHeVSIxo1FYZEy4sS3rdwokvKAiZK3rnzY+Ryed1c8On/UbN07w7X6
m6hS6lOKjYh+wxgHNswvu8N4sknoUX7Hwp9LBuU8+T0Ca/tOrCkICtK8kD5WkMmpO6IWAXUjK4Z8
/OmRAfzuhQeScqBIQTMuw2IkQruwSdfY/2ev76Y8v5xSi/gzcXVjJ6pNWe8NhZ5pL8vuon9u8D9v
ac2sfrz5UyHorqRAvNxS0nxaWXiYHYmk54FYhWXq/l06uTApLWRBji257/fX7WCJ6JtNeLLcAFYG
ui6Qlw2u4ilhoM33Ba9OQD+hKXM93Ab35owHIBR48oqnZlu/gRs9B7w/mQ9P7Aq6DwyYiEy7zN6P
zIrKF6PEXI2oo5vRRDZlhHjnxlG1qbQvhZImGO8R1X3muvsJ0Z9NyHew0PCSz7i9mW6rY2m1FJBl
jLOuJd9a+SClV8HYSGnNlxIsBxxS4kdb8pJAiZyO1GsyFurgT9epWWxp6MeSTru98ZQ2HxuKRPAh
LAyFLPqo+UCcwRFhd6SEMQhkLktq/u+ZRteg3JfitjOD93M8XsrOOZXAvc8OK94NqeYOeOIYfeiA
Bh8AZZCTK3Xt4QLtJ2oyW6gLSK/gyvC1P9wVOFLK0VxRCj7UL1ENqTGIylLsQV1EDrxvDeHgkr8n
+celZ0eo5oJZQc+yNrl6D8RLDaFfOndjQQuP1VMMLt/r+SCqzoIQpeaPzjqcZ5F2tDjq3vLL3JlK
L72Oet2zPrANXugoDIB6V4zLM77QJB3ICXMRSw3lLKHdoVR1fOZjH7lh6OFJTtre6FJuHv34LR+w
Sc62m9Wix3fNqnF2+9Qp1crzn4iR45vHd5J/GET/E8MKd44F0qOzeLFE7zgwf2+Iy6YZU0LJ7OWe
z0OlZFdrPEAemSaXyLI3Wg2c7W5Ef4UaJISjZfXU+aX/CFAP3KV58g4cgEfSs9fw8iuCFLuLh3Jh
GZg50idBZAseo6HiW0jDA4Nn9S03k0B9v1GqmSWPhP3YhzM/EK26PGYcgF0eivassZQFQSrc6Jil
NsS91pv/HNapigSr2eVnB1wDsPbMOeAWMefmfTJEy770FLL4nJvHH23BcLXTk4vQBAncc/ypOm8W
7K8vIx4OeBmtzlz+HHoN+Ki6SGNYfqwhxJ3Iclxi79j84bg6FlZ/sJmHW3B/BcC+MY8FKzU6WOYl
4ii86/wI6/Ymwxsc/fLpXuJgVnj1G6seQpKpHtSA/+fDWnvd7+23DNdK6HfBGZ+9h1HUSEREwoXj
99Lau/2+L3cctWkmre/U6dbCrUJx+9esOM4lxm0AgWGdwsmiTdhQhm1GO9efcz3nod2wuyLOoRFB
PRHCoU9xUQeiUOHk4A7KAbqWNnKmpYJRUFtQ3lyKzD1zt5ChuiYS+1trXUf0emVBc0RXJeOJM+oy
pdYUCtO7HboKltA1VXkzyJrTAnuRxZ1FiBt3NN7AswsisLqFyQAuddvPGzztWsE/T1mimJzTQK+f
f/Lv/B2HA5evVFXQh51vSrY2ub6y7UStyV1sLz4hRJqfnfYYtn4qKe+hiDORa9CUQSPNnR1nNwVS
OkQkOe7FGwVo2tF2pgxsVaObzuNgR5W00kvbG+HZrYc/VlQXu17CoYAXyKuimeuQUX6IOYQfOtOi
P/656J+ayneD3DdaM4CAxyapYpzyxTtzYw3d3BmLALR36ZccU/VhfYiHYcCtxg9XbjQuCmn0V9tm
VhQXJGWmHnrfgcSUohqw+023UH3zssHKe3HoXWtNxZuFWTm8uBN+FQJWwZg5o1SnFllNmOyhtpJN
XO8SRcSR9ghUC2PkIXtJSv9s4l9Gp1a1m77LFh4HZa3el3/C2W/EGR0B7R2Pzy8Y8kQnfhLd33aj
x06UIZTX/x5oFzGlrD7CuvF5JKo9vOIxzToHh5kdoOD6zjUKUGJYQquc/mE0DMReySwBHVcUIpLT
P0tPzMBnO/rCSMnc9ks+pckz6Kip2rnVsPX+HfAom3uAkz3m42JwY6b/bHCDef0RK/3WUac0dSKM
kEYtrhwBrDcHu2UrE9D4N3TPQpPhltMcgA3rCnJNzhStxgWfSGcSOX489GY3JX51jrPQ4KLwg3Te
uHo9coFgA7zxBD435Ek9ZfJZAcIO0Zt7s2uZwvFyTVmPWSIEW6daOf4f0gxbKYxTM8WdybNJXju9
AuBEu/AVDZ4+JGpSkGoI5khnH625YEMjmDdM7yC1jJKKFINwCI4JiWEAl64hmuHGoqBCRVIgMBYp
hCwZyPZsI1RVFT2dRHGrlaHOioCJ4s9qfl+jXm7NnHKSvxNcZuT+Ubv1PiLUCoGFG+sBAEE7OLIx
156yyQxHYKvnmGVKdSv1JDcqFOBTX70OTB59UidJY5m6HfaEtJa2TRtYd9dfiLW4T+bJCNByHVNJ
BP5PQ906S6hbtLHGTio7Jc/IK25r925Vil9Q71uHrIoeIOuJxTU2THyuDb8th3jMJAWZ28arIcD1
7zvWma3Osergrj5anOk44hmyfHWNmtZzWfjZ8g2mz5sCZf2xhx1wqFFUm2rP++JnqWZWqJpie9P/
FaUflE91AeT0nPFGzJobKS7vxP3YCIxqDXb4W+GNrbrMzqJv62IjXU/5VT55UrYBObNBKr5pNuPp
nl5/A4Sckp8yUP4cXgns9z450Dg8dC2rJeiALt5KoIAI0mqVyz6dmncs3964qm5zvqkhfspebtxv
+/5/HLRk1pKJC/0BEIG3U8PblJ4S3qWAR1ocDE72mQpK1S8J2OpVtmNPWqj+Q8XxAKeFhxNgDseh
3Ys+1h4JfwdhkuL1WuvUWRmr43qJQgrAU1dsla9XqNHMblQy5XDeZddFiARAWW3wQ5mQedn8mA5U
VcD6AFj0+myr/qmfSW0WZomoAlWRHZR8ww60cUN+wUjqZnXcQrMta/v0wrgmsv3Gm8XyHnb593L7
eG4J4D9wit4Xzo8ICB6DhsQ+QOfSpMQ+Uks7P55CB0dzcg3FIehDZWZfWj4jNvAY1gUscTVyYm20
ltt13qwaUWOMqO2BXOxzc3jQ7Wi51nA9iG29RjBhvOs8SIEWaroBNDKCGcQ3HvQk5wLRSMiGq6If
A/12iSm/sYD052pbIGYML2/C6RhJW3M52SyyIXliJtXn3B/si0AgHYfzqT0vXPlxQANLqtU76Uyl
JwP32T30MRjAm6qMdCDKPfadIidlWtpiNS/lxnet2Fgcu2RTx9pSlm5DVmFbm0VH38okdGyJDSIF
p+FEprQ9eDPqoUzNbjd4QlY9bph/Q/CVR7m8dBAbCFdT7pbH6Wdwk7LdzgRhdtDP9jIsKTNNte1q
GMvooCehfU4GiCw5Aa6s4ZZbQSVYuhRYgOHzovGzq1+5wOo7N2JA8vlRYSwwjVyUb2rqq7iWsbg+
JuJapgIlHZCoOngniStpVBvML3CdjisUnPZs7sdb7aLtZRCI8TsyQed5VNTTOv4NXqNYWssW/xWq
6f3VNQFk/gh7GyMyJ3d38QobBhLCLY4hmDK8JEZCWxIL9DN0kaLLviNG2wWKwZL2cD0vxQK+D5M6
PEIAaggXEQmwA138Km55S7ojd/DGbrMb9D+Sj/6WEvXGOXlRpGpFQu+ha0Zx9dB76EhCiH5bYq8w
bqILWA9l62keHeCH4BpTHJg8hCuBw91g8KmUfdeZqhZBGmg+jggKMotw4SoSSGVLhK21Ezgu6kSH
xJ58XYzSKRTRJwiPKrAW/4WoTYupBxtoBdz+SqQ84ip6iqZT0q/H92SSDYacziEwJ3uB05PxUTio
eQqXesLnKDT7FS0PXWpbQ6ZqpzZuwWNroQXXNu1J8npgWoFeQMl5AlAUYOaByxJ9IkIGyYOKvYWA
OgomT6uFDSlbXupq1moQTu5MMxn/ZMWnYIjBUqki5h/yxrMoUH85oCigWxdSG6HkE/Dlp5CORbr6
gSgkUnNa61GlwM8WyTdTAlnPRGGVdb1X4S8CEW5ZGHUyn/oCYY1HKlwtLQyyQeVplakXQCvrJ6kQ
Bg4uyIJgb9c+RoZytzND3ph+muOAgedD8oFvvTx3sNPkT//7bqD5QROXfB/CNgx/tsm0OEgPUtyx
ftKJXDzA7GJhHQNybc4wtemLWBnKgjvyPxxbdEyRdD4wobPkbKzOOTeAMstEFoqr0Y8H7QhkUQam
2jDhUkqJ284W1O4H/XuuB/Vl/qvyU9hoJQcPCgaBGFdq4QRDbpDlmpqlxXrXaHZlgWffJAnQn8Fv
sk4H4Ea0/WjIO8ifNl6SfybYK/5oIAIgUi2Nk8KE1m8gnJUPMXSYWsAeYkR6ybc3C9yJj6NzwSUW
CqJJugNELmiv6J9VPA9PaGQ64c+3pm+cpyDNDHQ1vY1qvj3nEgqx5n0Y39nCsQImiPV/Sg9yh2Bk
HQ4ZMwhLI+nFwK0OZ/zkh4odiDsOBE3M+kMnlZ5BJmXK2t+A59T7AvwpyVEVogCrqtbogq7EyP2R
/KoZIKfyE5vXtjndlUyZjAiNgpjTc1VakSJb07v4Jnou0T2uuBBVLBE8e5fRknL4orW7nwiNGR3A
FjSKy2+CMPD486jawdbxAbwfChXyeCLhOttQScZ5/UuJXKibAEIiWMO0zwi6h0787UrxLIJuioc4
nULkOdY/JKeviefRwjlnZY4q5i8h1F/oMT/HYeWGqrroYovXKcnUxbMWZD+jaopXwpKIKwV/u7gL
ICCVqIDSf8Gom4lbOw1ZcRZKLSyvneRHTfAaqVZivhe1m/wTbLuvizyo5v0fH7nNqAzAgtH7oirl
O09aUTNKpDm720Ay5sPItAEz0pFiZQIRDfWGCHCuuGaXZG0xuyl8ShQxJz/9BEeMVCPhZnOaNv8X
bNe0t7omyZMkSFNPR4U3evzcLjcuK7VEZZdMkX6tka5B3C4bRACtFyOeQCt79Xrriwjp3eDw8Yxl
i4ZnF2nnIzXhArnO3TFIuhZXD15yn9vVT16wMxV0rkzQ2P+1+g1u7aeDNwRT2xaUvdsFLGr61RsA
krrBB/uXlnDPWrMSIoSOLSTC16X9VfDFq7XtK2uA0BmKK5FJeWOI1ArralXwFlj8KdxJ0L25ro4p
IZhykME1I9BoKS3TjfbTDmfX1WVooDH5YBhsp3fnJjyZm0vZ9V7nsz7eC/en9E7r62uh+MrQsnxQ
HEOfnD5I5vsCo4FmTwA6lhGbUO5+59ZQ6busQ3Da/4/gKfWPi7Rx+7Y3AL2HiXlvnKxN32bezNjp
dYjFYXVPdjaFpz0GrP3APSdp3La8UFzXbVhLuwuv0mDPBPScpRdDo2G0X7gso054AFVY6n9p8tdd
5zYfJhmIvj/NqUn/wjbA1Ptn5IjIafceDKqCWE+o9brGUJBbmYQvsYtD4pa83lH8uoKqIULDiSXg
6yxJwmM59viy5qkaOJYrzsWg3wlO+PCkAvqg5HpLKFZUsQIYlmnRFiU2siCw5xh8Lv91KTWQE26H
JygYAC9Di3Fuj9L52dCNMgbtOCerVWI4RqUpIFnC+F3fY0d0urDChvfCB4v5ZfmHK7UQWuUl5DRA
Ncjw2/e3pwmVbyls0YUVrzdizPbhlKDJX7xzvC4K10nrAjnG++RxySdAOFZXubgPzTr62JQtSXmW
IIqO1vKeYP7Zb22j7YH/bXfT/F5cufY3ai23D7tEwC0XTRPsjTnkyjrFZDKy7H4jtCHGqFDihiKn
lzcjRj0nxDEydN0T3XZVLw1ckchidFI80LIRUz5/80zPxLB32RudBu90cckCuB1n8lnmLPij/zE+
aucm3Kwj0LLI/ESxyT4RR0eJrEyPbq9hWnKrwAbHzhPaF+fffQmkrsUci95u/+x5LJP6G4/zY5ZU
42fBuiz8uxbweZF5KyivG516l+EjFp1oi1B96wKupMTLWNO5UC4Axpffk4EKZEEns0gYRwpJIJRE
k8wuG63EMGWNSCTG/RO5z9NxoZktD7g60co/R42CBfts1WLyi+ow7jHsNlPv2xDWQd26f9hJIG0e
TVk9W8+8PqEnJMnsgKAfDu8qnlNGOsOHkqE+0aqrtum7PjdweTcx62yaHJffKPA9+xi5XkwSw90Q
gvLoWjJpXh3ptwi4hIt+bp5SLcz1MgCE3s+B9GMkZp6eji4CZRJ4Y8HsDzXziQLOBcJQbavNtaQc
TKFoacbgnSmdbaLo6XIalSOZIEQbh87hhxV6K+UWL1flpVWVAsJlAajEXmi7Y1H97PKK4PzSN+fr
yJifROBUNzCVFwmnra+Zipb4E5Lcxyic9aLP4yppTbb/i3T4qOrnXLKwuSrhJXSCcTyIRNfCOFlv
XN7teOJs72V0dh9L2Cz+VbtkRX0l6NYasCjX5gO0C9MmgYx+KYUX4dFrpHbbUVI/aeFPSRXeqpDp
Bj9ql3XKb0y+qM3C+ISe74cIUmyZPAsxtspP4l5ZqJ+0B83nubj14d/NJVghYmn7MX91fvjVASmN
lHcGwVvjoBHip3wjmlEjH6SoXc9kZSi06Y86jAP1G1cetsxKKdscQvvIUgoMDbTIh6hwcJVeWzdL
FeU4QV/2aGp2kibI09y/XFAZ2mNG6KrztPsjXWq3ds8FwxjebgVCba+YBkr11MEoN8SQGoQunHoR
wD0amqgzGzavEsdYCJ8t2cCLE6pF55bmrf4hm3BUaEi+H93IC5sJ2FrXcBTJB34BRd3BWFA4sQn8
EHoI6sWL/HNvZS+gmk9tJxOpZdOlBmBvL7QUxs9O7HcdiJgqyWSO2WiYWifPywrmOTezB/3RbwAO
kCUo352IbRcj3TrkIOubd3/438v4D7Ft3DhuapnoCgB3AiCh5BOxLotQ9OLv93+EDKzj/zShPRlD
D59DjxgDs4Iu+g15WT/OKtcR3zlU4vfTWVU8Pr0Rrd9q336s3AfGKPsXXriQ6NZ9n9r5uEGts4dA
CYsfvUEE6TTkT7HDGNd88HhGc9mYTrvIYqnxNJ2Dfxdy3D6py5NGKwO6Z/oHkj6jB0bWGX/iwhbN
OZ8Kc2Y/JJdWFNMlOGHs+2mgWXt6E5z02EvayLNFqqXbzAWxSJ4gVWUkRW1w4X6kYXnUfn/uK9T8
fyhoOAFAK7KnWzDARKpQjPRv4cyZKWEU8ND2VGBYHHhelKiwkDMuKr8qCOHoiTY9LsSSTJ0y3Om5
zPbN4R4hd7Ki1teS5VRo9DgtjemIkmKBmt9AVyH8O7supJ4F7fWQI9zIGnoUPi2/DYYul6u+5iWT
Nnlokkjfdc4WCCICsJu4zYJ/8oFwpYBTtAunbPpcyXF/jj8BGbtrurRFhOc9OHpTS5riE7CjTD41
SMNvyBkzXhdBL7s9fFTUr2SwP/m/pdiYt1Y8+cPm/1EIyP5d5UbuPMKsZl3LDwWXCMnKi/h3PD2z
CGJbKmdAx1uch5biRyNx6w3CCPCangeKeYwHKLHU3QjsWtCBfoAkwR+YArHSuJu8Xvtd34qhtsiL
s3yC9fez7iMXGfqasfXLzwl/T1pnQLZ2q5XYcSmbjHxP/9A27xwKycajveYOqzAvM3CRfiZE8eY6
nI0NQlJ53WwU2oTg26Z6QRQe3XHyzBwou5E1nBjHU2cxdKlVp9DtJEqKHiY19jXJ15FW+qthh9G3
7MbDqD0hJC4kwh8UFZkjzWYM6JzvLGwdsQBfme8bOryRIVZ67tt4bFVVLM9FXD4pW0GJ6ORp8Tdi
4nJ6S3aD+mYkO9ofUAzhp1lc820p3nSEDgqvhWKK+V8arvQArAOVqlMsfcrxjTAftF+gupUsk4Uu
x+TuA+NA2OPMbOvrKHF/9q/bRDZFWAK1pqkR/ayn+Hr9aqdjxKLKLgWR5GJILTb6RvYPQ7C4/P9u
ORGmHF3yzCa8y0jOFH93CrTEfxSjBF0EiTlKkF8k/2JU0TKPm5zvg6slp2L/EEy0ydkfd2uVivJM
qWFaC71OR8sCvnHywV9Rqc/3Z5M2hIVDYOyota7W0D+EpXlGCDVDQTpNeGWmOLMqNfWr9mWdkNpv
GYuGydcdMKsPCIlXc1LGOaspNv21aHliav8RjakyVwcswmUhf4ZBHyByl3pyxgpm9fvfdXUC4KzO
tu4VTi7sGKg3DdJhVLw6k/2u2icZUQJBG06UWsOYro6lLEAa68zHBoXCTBDX1LdBbB0EpvjZGyiV
uRE+GXFmHrA/q8FCObD20V/4gXKXk96VrBgMlOCPfO4TJLu2BNdhasrxouG2R9Tf4ha3DpYB5Wuc
u0SGgldtDs6NlsmbqCFk10eYfWxWmYr7FmwhHlxzl9F8T97rG2QylnqUtYMDx5M9tA9+oLYxWA8y
A61+YQeWWM79SjgKWslaAG554is4whtWWKHUsHr1n7NYjd26Xge/QVwVvSQh2RwbfymuNEN/70nO
f5l1YSAhk1y/G3FFQ3eccWGONkdgA9dS9HZQR7SD++bYaL7Y31aVlOxtswK1jcHpFCTFWeChLhpk
DhoqBem38sM9At8UHDlWF7FnNAdhktmFUDxRIqNrYrFlhR5Ay5crXOKjDrTyb8zQYmAalRw+P3dt
9fkWxL2T6HAMYBjUAvwxPOx3FXGcW7dkxacjYVhZ47bVwupVqkgXiYkIDfmm9tjzFNPCQnIDtgPR
22s3BLR4rzfdd1W6ClCfGZ33+Lcvtdd9Ki+ToBL4StuX9+m9nY0eq/rislQWncvUWRVJfHsBK+JW
b3dfPRlF4ThV5RejfaAqeMycTNOLFrA8X+xl3fZkznaeVNrgkR4kwoDX2c2Y4oUWRxg5an9f6XME
h5UtbZe1NWmkPyew4JFdfnNc+OItFmUqcl4XQxzLtu/yeQzsZyPgKfKbrZliJk7r5SqcKVjI+1/u
BssgQeOwTpFRPsa2skTlRCvfxpFwBXYQOkncuApZXm3H9ImD8i99TkdhAZ8NWgiMGx7rV2J3CCI5
HsIp3c31R1wqeIc8490LHA9lTaqll7qbFAsnlPCl3H4sik7s8zflMICkU+efqDw7eZ8f6rqVVVmh
MVUYBnN97fby00WKxxnfX/5ZjKDrN6aiFvfS8tCxuEgaYRk9kmkIXugVN6NzveA3HqSOhYMhKGKe
JFqOwIO7XaEuFPVFmRdwDreq6VIIsQvspti8FGzLp515iW3yBgfqUPz9yQyIEyzKSjfIuGcnc+Nl
53FjdgfO8sHjhl27ZrqtLlZXmHNt1QTIbla6eWi4A+ANmMq1Y82B1nJa/3DKWjO8O8ikeS55lE9/
rBW33a5rSwc91N8sK9MH9ltCWqCHzi9hh4nLPXYs0p63Ba1BX2BTEdHAMiV/ok7Gk3mE/xrbysXB
OsHxm/PTXLq1Oruj9e0Flq22LadcL1O/ORC4JSBOiiuM9gr4TqV/gDQtqKIIrYkM54hiOOsqqolt
2A0D6WDStP4Izq+kNwgo0WAOXA+JYOGHTHHRtkjSjMynoG6G7DtSNojNuPwXQEGyf2gtzfNWlyT2
XjOd44j92KD+xypnrDyiuuF5/HDY/EZqe/gEX7eB0n+d8POCNdlF0wY1m7sTcWRKbBWi+C4uj5nC
B0jFvqs+NEuIq0GN2tFo+Ec5OXuEP6EMYQGl1ODp7STVcqPqpma0n1YREle+zk8moNQW89cr0XwL
fAAaYcVNtR8pt2SOPnBu1ud25wfn1rf7gqp26RjKDz3HUT95C5RC584NThsfxQKdq5N1R+TRBfbA
LnMrcp9/gs2ZbcUq1Csl0IU5KbrWEzyG2Jkhrv1u0ZtToppSSSL0i8x5a5XjjkFQH6v5b2FdX7IJ
vboF3oVcuM4hjOKvru6TxveJKkRXAKn3T85gpZ6tqn9lWwIB3/VBbRBTulbAycK2aXgR41wbOmXg
QNMq39AVJRBU+wOnxXZr7+37NKgMNnKWvvc09ArGGJLv+Z8L4TP45esWft8psoczuZxBQjOBePHz
HnfM9/zkXAix763TqxsfjxCJJO/wC44vt7vQdUsZyVRYVoOgvnWad7bYV0tAORl3NjzUYDu/7Obu
WqBkovNas0ezzlTAzKuzlo5uxBonTn05kRcFsil3TfNLmAyO1pvn7UxNpbytHH9aAgi8kx5iyHjI
icVFxq6wt3jZ68/S36AKm2Naq1kZva+2TmU9hiSPQVVKpE2EnC2j51C+g2m9/apvF9lg1PQG/Omn
0IjWfrKAvR5i1MY4FRtksBpFRmm6vTYYcgXQohY4UYylbtw4v0ehzx2zWObmMXQkKwMRPi4tmoh+
q3pjDIws47VK8TWzDXuBY0GVQ0cty4xAUtzKd+NMYMqlzZxnAFEpu6jhaQq6w1LzfqWZnbl+1Ext
1NJJzOnKdPXbHlTD1DVoKPiK/9lF6jsvBmrphNXTr5s5JCLeqR0pENXQjtbZJZg8NpqEJzpiEEPC
MgiDFdPFY617TuVFl7NyyUehhnBo58hv4nU58I05y3YgWZ9eB7j2Pa2tlFhqo2b0bV3Wu38WzmBg
wJMu3+aKl2WkH9KRNkmt3gjDQSDG05gGaXl/6YKShvF8dfZ1sKiXXldXHqPH3Mk9TovBoyQdLGFK
HW4NxnjJDBIar/Qq9w8/gIlFAfiM1EG3D7XH7YhK+8OVXS0edGuuj2qsHaOAdp4HX4qWum5KqRvF
vYpmT1YLBHzUJ+tE/5oZUkk9cVP1/KO44APxW6dKTmbGj5HlMhR/DdeK+cRGlMAjFo9BcDdL2k+j
OaREG08x4yWQ/7Z94F/jlNUQeZiO+ccDNPVjmqNk+k3t5xtANrk8PesyWIs6/kziY/mEC9ozlx4a
J23X7ajw1HBSchZGBr0STwWoLZSz8yY3wfaqmO6j3ofzFeT778MV5efqiZKdOJqNjvQjOqEBpS1O
gRPjdQN14G+vee50c7cOmWF8rpUErCEJbtRotTUsZ1zewOs6b1ALGrpT8dZ7zi/2SWKsmn+AvAKN
4PzVI+0fJEqfYc9vuaTwPNb6o6rFvfbpGw5MOBCYUZ9XqywtiyzSlRNbECgj59v3X8GN2OOZmElV
V87n29XnqTND0Rb3EprztQeoMLMHFSKVPMkPzbdyOPMsDU2rr+tkD/sHPQpIDze3cIoQiT9PRrQF
35sD0nRiWngPOc4VxIJE9h2ITen07Rn1PQy31vcOVn0HCYBHpZa2fiJ4lU1YRVzyVZfuGDldE0tA
skEDnkOA3QtsbofmeNZIG8H5jD4vdXW+tk1Gb7facgTCLt2aL5K/zXEQ348EZTSFTgIxNeSi0JJS
6jGYW4/Ye3FLPeUuy+ZrFF8+ZAy8lp5WaiFO6xYQrRrR2K1Qu6faPBUD+RQSF9rtKHwSwLZyFOYW
A+VYQUUyNadoSx8tx9Ll4d9XBdOoDxHEgHd4nQ+N/GnZpOlxmoTK2U4z2TRFQdUJpFLAje2x7Zhy
/tyEc0VZ721GQ7VdIjevzlyYrZla2Mol3eELzY1wJrFGa/22gh5HN6pPvoMAUg/qLk46b5E6CrIE
VLetU/uLZZf1MMviF+iyKXWtJol1MUbHOVUGFrUb64eYirmuP5WylzxyRZs9lL7y1Uj9xeBJW13F
CnSMn9Z9szQVCtYNzdvgJN0h9C2zF60bGErQO9IVjG6ZajTfZttjNP3gB/dUunKBtjPwd6CSQDF5
9MRc9x2CAQkWj9oiFFZLLykegY2erht7tHrduDP6OUvsxynJNUOlhJb74k4Zha5aTl7appcs527a
IpIy+01oKZ7bpLDDvRDpT8aooRVVg/63KQWJpg/ZjfE+i2dpeaOlVHUcXr3WFkQuT62enDNFs6kr
m7TpDBlr4U3x0IRGnE2zburjcZJ5w/MLyt9d+Pc=
`protect end_protected
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
iisr0ydwFOm3eepmhOYSaxO3flYpViRsLN97vKyw+ai+x1TubmaH8qRRwK/QFeVsjlGTFdxookcr
olQwv0bmdw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
dJvTzz+PoD3n2Ot9SgKfpEhIshJxklhDhS1tYcrcmprfs5wN+lN+5Y+o9jEEql61IqDkJEIGu0xp
zaDWEeMqwkFuovmZnp/AnbrHb7R/19zPRtwSyZ8+VQRLsRMgscwutXu29fTUST6Ribitutae85tQ
1okc5mYK0mcSMIggcMg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
ZijKIWnBSOuwn6R4ZrzJp1qaSPGZMrP8GTp+SV+Sn9xEivGxLJtGM40xMLXxiYuxIopDD/A1usG6
HkSoNT6OzxHJWKkUEyyVzrZuJdNHJ5q3s3y5LSNY7eMxN9lY4/gygh7aVIBAO9YWzsWu3HLtrHA5
2vsUFQxQdkG5OTLVP1rH68P4j/dhqr/LVHw+9H76c/knGyalpHLRC7tnHQcfuezFJWlkzaNGHfUo
b5cE1YTvtdlZVmw2sVG/GbXIRi5fq3+Okdy+JgckZ4dVWbI20rfa9LkI09/kwD3anyrnovVQVx9h
F0AxolVKVVyWNAaSu1fvXllqzrdJiRLbdnsq0Q==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
LUajPw/jRTLlmEKb+9YylQ2jxw4jlSx/1GGaY1wFfWFdMwK2p0xvQMjui8K3EqJF0fnb3QNWuQDl
1vTtf04vcOAHkfRCeW7Mbp8qeUTtAsflGIPJDxHfVU8ZKprwANsENc8LVrpJ0WnjDFQIzJw7LDqc
Jj2TofWjKprdxXsMnu4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
KG6kiSPrd66zvVpG96eKD+783ebVLVFNF7pXgq+rCyBBRoa0N9Hp3DIWK5125mkICodI82zuSq6k
C8aCiPbDiv4tiuIn19WDNNPL4ncknL0KLZTLAkq0BIQIsnFNRaZegM9aXOdMYGKYLpnjSD9KRWRt
WPXPZfwprSu2D7PeDZMiij3MY+cixttgVmNfcx9Kkmvg+1B5sTSDTVs3fqpJBBO1YslTmxyJAIC6
uDuGqvQ1138z6f4f+f8vMXratK1Ypo3jPPb4FTNLYJio5Vd1Nbpl9kRRtj801Ie0GGhbggK6IXJx
785o6wX6g3tRyoHXGJ4DGUmWlIHATg0KIAflYw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 13424)
`protect data_block
rEtV4Bm3SmvVbKq1runp2SaaO1GImraXNQnz2t97NClVhlTBGZ14v+hHArmsTHZNME/QWduIEcCL
I8GdWPb/f0NXI5m0D8vUM2MFHCnzTFi82f0pjwFGBVpM7cHKBa5QRX5K/e5A/9KwgbwYV1tKqTXG
aWyx6JRfuzQINO3rQqM+n/1b6LSLygDM1QuiPthpMFKV8IfsVkaLDVqcLxH9/n7C64aisv1xK+OH
WhYRETSZok8+gbvdGdr2+VsE64ALl3DavNBK4S7IOGP5YtXviHmw+Qb/lvl6m+RggRYmTe1A6B5r
pghgGDxK2gS0ItU55quFmZMEuEH+bwLuaJA0/UWR19oWnbcTZnsCqEeN/xbKUzS6blm1K6RPZtYe
WSGhjFl0cKHEQe9DfEazTm6tS9mJ55lLbSuwE5o03LDGRapxUdSR0IiKy5C5UP4genzVw3zearva
qPWmPeGZcAEyFioI2o4OWQP+8mFdbza1kBOuw4BP76P2c+ij6wbxXAWVxtNmL8f6AgS1AV5SqIO0
ftTCve0JloVh9kpHsbXE1TS45+y0IuiC0N3a8PAEsXa/tnLsnAydpsXIQwMLXmgKfoXKzabAHHdI
XZJd/NxD7+xY3aINMVaO5eSSLIdjkYZIeqm6qf+x2eNd9v2nue3I9rjHkjMBIty9wqDCI5HznV19
h0aPmdRn9t7Ft5xXq0GXqSl2I9ZROoM4hg3RU6TCVY4IaDkErgP5cMhIwuHsntmeWvsvkZFygQtU
9TUaf90O9HINFkrdIHf0ZCgtCgUw6ffQNPAkw/6MaoKxm9wdczGi3ur+eyRvSLy7+LQX/dOqvXKM
9UFNjkQk392HWfkT8aaXacuJgFT4hmoEXDGY+tSqQrQRrPmelj+ksf3PcI2r64RSTjiR+9HNqWqJ
jPJio2xgGdQdGrH+UewLz0ySmNDYmqxIdyqKfv/B1BYMUpGd+l0eRCp0RwjP6nt7MKkBishuJTL2
2kpCGDQ4HELrlovnj0dMihRpFZAIpY55DfNVE2hnbkHthyDrEXapmovyPqDFel+HKDdimVyeM8CR
DKl0D2+OZK8XWAiVk9Ve6w0rONvwf/XvaAkgxa3rDJQo/8g8oiGRq4ku5l3OZUKrPVRcjVNCxHRq
81RLF34Ztt0FyGvWgFBPXPwl/QfIQcetnIv8BBHDyYvjjUEJZxJ0yVIBqSipzmyIn34Kt0GvhgJJ
oXsivJz4IQp2WiLYnKzv7NuBWYnOF+M/H8eFTLS7ynV/b0CRf7qayeeaKYL0uv9mUeXbILs7F9+8
XkemV9ihHFfHS04009LEbIzG2O13pEZ78n4YAi47TmCv22T8/Ve6sSAGowqE6FfeksCmQ1+Z98YQ
uXIyCDvF0dlGJwZxogjNRbjyCBj6OOagNPhSW71GcVdRv5XSPoZsF68V4hWQeNb+itDo7ZPtZJoJ
YzLjFDCWp+2G5a8+OtWGetlJNejx9rEDOQvPXNhCi9xzzzSvIevRpnt9XX8uVwzzSJnKhI91LgRg
ID2cjEMis7S70eKGvR2/KBOhU/KAbsgGALtSpbd8HPFqo4CWuxEHCYImqvt7m+vI7jIEpXbwjtx8
QWNgKL8RNSViXrcj5CsXvOI28Nk2V+GZ8jr1/8I4R/Yns4Xfj1TTWzVeNCNHbazn1nufigCGV4Vl
qtDHRGZpM2GzgWRsMj5tsZldV3pp52C/Dpr/92KUqWKMf/mZbYDJL1X0X2Tw7iboFgBgx1miq+ht
zrLMfkmBPAPakC7uTHv8wdz7HICGyvCct17zvGp/b+9c5KI7lCBCd9jn5PTW35q5ksO4eC9R2AqE
0xJmD9GKB17q8Jk7vlAMs/IJV9rgMDnRfyFkOl4hl2S45SaIY1ObTSNIHJYg+rp/nN6BMaWKrR+7
O6t2IjDTrKFkfrU0cMF3G7EiQSf6RI1d8iyqNJLJJ3fbFhF7XLnn/CwlkZ/03Hwn1nJocabXwbc2
9Q6RrzrxLCWMZVoXaUEBQvapxENHsyZOrmSevUQnuCknCx9Eh/GwdP2bYVHxXWg7ySdjQnVMtR4v
qT7n0yJuHI0ite3a92Oo/MBdlgCwEcxfvgz0ILRIK4wFe098lGOX0tVEsLdEUijEAeQR38bksd9a
fuwZzPBvMZQ+FON4CQYrDg971r8Qz89ArQjVxWF7TdD0Oaq9vaUrLocNzIw9AcIy8rWaQnwTR/K0
PsXLapKx1fOSZnuztuMHoRXGaqZVlZJGs22/GiJA9y/IBflmF5GNFnRUbXVT8r+FfMb7zIr8eP+b
OcPNp6F4kqt/b8gae/9JOIopCuWXpu5kDe0U5aC2qmvMuYbNI88aUx34i3WHd8NWKNbdtGDaQ8nM
iyuSX4j7EgwTOuBR/iFM7rZAATM59ZFv+9wRq8hbXVvfsBp13upya8YovLN1O9OWrzxUWym9ZPN1
mDhMT1YgOqVRaJ2ADyjP98UghsOXt6ybu9jGeEndP5T4mZjxZp82OMxqqS6VolaMbGRNPa271n87
65g6Q9l7RYtOL1PjdBOlgNpUdYZwxJ2EGgI1wPnrnuUiZ7sdhpuFkhJDdh2mHYlIUZHAsriLKEHR
XOdtU+Desuf1ojV6OryxMP052nRo3DfSj5+dKgSFWVXGLiS4Q5dQxDHIvUugnqZqf+FK5inrMME5
1eHWMPkrqY3H9syJMZ7RM9SwYc/zjL9fOqr9mE+npGx50NODLrgb0FydLIXRotOtI+YSbZHKzsKt
xoZNcJJ4GasWF69GNvRenQ3kp1eh71xjJw5a0KZmhsJJXThZLqSzb/sTisTU8jCaMh6S6ag0knK7
jonbXo+dctsmQfLpvLXHN4TNqJnY6alIH0HnsTz7EklgiqvaLbFn+25uUJSNDHESZG2BaAtNvG/4
WuvQCSLWeuJpsrPd+06Bzmmnlvn9InJZhGDVhnZlfj7Kh2PolkMjpLgzqH4f9hm/7zH7o7msjyvZ
Rj/JnTghr2ou7m5Ayp5K+yFEUt/y9WWmqXlKOpf12P8RITbx8ILm1kWRqB8L+xfF1r2HXt+av43O
pyKFj4Kq1FZckfpg2It+beWX2P825O6hDubEjA2RyF/zyyc3lMSS7vtAQMEOEJnWNslP5r0po6TK
F5+Ikch7kOxVShNh4LWWzwFtJb9SBv0iFIezeCGrgApE2blMwedVwOdpPdPvsQjNRYc8YG+dStcY
JUIrNMdc6m5qSEWO36XNGXLN/ZrjKkZcCr+z5oN8Oa4cO8jxqZo5bZDRVUh4VXM8a+hHCiVvWsEG
HkxV52NFazh7Duhb2Ix5qYigebEWfDnA3frHeY+lRAIE3+X/YoDjgbPuOqgwawkAvhSCeNbNxuTS
T9ZzmE8PWRbDowhElwhdboesSdX9tyyp7yCSM6fxKFXbUrPplwsSNsMYsJJ9grw0leD0bx4Cd0Vy
Y8dDayiLLROqmsdsKe7b4i2o6u8A0RQrPB31DrVO/yPiNygxChVesembc822gDnOAlf6FO502nEU
ItbE4EyM6ZuRk+69RSoT+2AZGRndh55WMQYb6i7ALzZeSttxOh6V+LV5SNYYdeQouPNdd+N45DZn
niJzd/11g0AFDHSZFxMK9p0VsOmXbAPFEjcTvMS7PiMwhUsav6ZfZjkVwz4X9s1v8DCZpNbKSq88
kGJQIcZYRdAPuD7V1zvdo0Zf6leEwpYg5lACMpJ8rGWyLPBrYD/CsWB0THjSjjkRntpZXUTF5Sq1
IPSYaQtCSAHZKO95giPeqw3zw2XQ5ci2o+t0eS1YvmSPlvMfZRnkdx98t2mA8ABd64gljY5f+0O0
px5Pec1R5VTiPNgghdEJlgrPqQxSP7vDXo0dtJmtqeP90QCRgaOqEt27wpqzv0KFUth0XwtaJeQ5
dejR/hEOliBmBscgJkx0gBF/nLybnTcQ6xwwOe25uqhvJIiepSDJE4ICrD/MSurrVfozreQGinSL
a/tMurSZF67eavaP5tFe2G44AmkmV4WBRnOeWOW2dJ2Q1sYHMUzfnWjdSw1sJJu6+Y0fUowVqq0Q
K2lcfV1v+sdb0adNWmXRoPrjCpXnMpWUyUXWCaY8r49ipi+4TCdxE4p/IUZfO1aumt4+xQcBT0dh
t1WR18HGPmHp719a+JPxfWkOQjw5JnEukkqxKV6fqJPDzGrHDJvrkNy1tkX0MN6Z+Olw//0xoyyG
9SEwAH72HyUlbfM2lhwM9N6f4cr+CLxPF2At8ppy84kKN/H+2RDt520oTXKCcGFU/txd8LdCs9qG
3diwadeKrfsinlzq/W+3PUAPHvjHcwRyRb4m4Wv6J0kW7ItY1ox7z91NbPGA481MOKLtCEwm6vuk
sfLsMi7+T/Hm+qsOXlQ9i8Pf9VAE9LWS2byZEwPIYDYtbLm2L09NRsMgfm6PotDA/9WaPtrx/CrM
IMllkwsRz86jBnsfx1s6w2v/gxQFWv0fY8mf1WywsWC+WArpCmvfHO0WMIJtyS/B+XcdiLdfrrJ3
qeRMJy8lhDn9mvRTVYzLXtu6Fv98eAxRiP4hPmT4+kxhTz4CT4cDPP9YKhdzODoL28xWfAYFbD04
Z7nP2BAp3o1FR08u/ctwg8oxDjcRwHkmDHquzKrPjnQBKXv9IMSCNsR7asFA/JqdhHcmuKZg6PRk
6XzKLzz1/Zs3XVZ/rpAcA4yoz12/yPHmsazO+a6cgbZy7JTSwRBhRd31L/KB4M7WXzNJ4paZAsOI
O5FWmQpp6eEyGGXpKkGy2qdqVRuRe0IjzwDJG6clerafsgCAj755Q2eTRVVvvRQw+G+hVjqaFu/+
m9KSJt+0hjHW1BHC4wyHN94ORPERUFukKcxOq8a3C4r5hTOZW3XWq1v7Ks4H7Zwi4AlNCGUKQ0ON
VSZKVFl61F+tBDQk+IqFz1WMfzhOfRJYfalfeqp5HOOIaK9cOhXG2oYdhceL4LDJlhJPAqpAc23Z
G9mCLMh7l3PvdGUWIx2s5Z4EpUsaxWTxxqD4a+cGuaZLzeV55zSCZ5qehwrwRTYvoBZE1+lOXnfi
Ryt8wko4y/GJZL/NuHI8l8tJKmVjS+XqWIN5sWUs9WMNit0HB/gZfmTuuvpwP7gjFuUjS2Q+jgYC
9ppF022c89tfs59OKVOjOQ9s2b2FlXyn4zn9AXI7AYGal0MNPRsQwnnaZJiTebyHcwtZucfEnh6z
9K9skBFs29qlMPNYsFP7y8mzdNhDng3TEgYpao3SPfXwDj/CSw/ObVggf8enRTUNlDfJ+17WwDyO
/ajc27MzTRLyBCCQhUYvMn80lvwSHxWDIL3xKvr2OLMoIAmgIZJG3sJMyhsOPqFxVb1Qk7NcojOn
D11t84xem8WyHJRbm0pbKV40U5U40scS0H5bcMWTEfGT4W0Mt47O181hbfymq/ykV0yIpouFyaDb
tUvUtKWqMknlkUxdllrfasNUWgJUfn8Cl8EV1Z3U5ABYiUNuRr5oKcdwlS7eB/n+UgV71hPGXiii
tFKvLiZLXS9l/eoEDDKLm6/8OksoHEEFzRFIR8skagCp4rd4fSGbOUietH2v8ecJdTlXFP0ex7TX
vh51q5DGduPDyv5nJCNInuPVn9Z9r55S/RGw+ySGAcaPEqaldHWakl5LrzE1/zI4K707/QMAGDAl
HQdn4RCGxESdD4HJn35p8o9hnYl7WqaHBddVyszwX//kjQ4qJolh4qp+txlSxnSJmCs83a+aCvMk
IbAnKPRH3SP74XCHOQ3bziFlRO0Q1JWSUp+e9CxVX0iTOPbgrB+wD9yT1o6m+o45pOEi4yqt1ZwB
6GRU83LP6o8j9UURxZDZ5WMgpNs4xuaPxAt+XstW7JOy51tYRnIykokiQYYg+aWP02kEZ7KL2cif
/t3AkMcRC0iKXbo3c1/h2uNlHbvkqXBOZnmGMzMriXwdE44Vt7izgW2oY3N5IFwqNHPtWi9SS6yA
hcD+oqiZ5YnDx8Be3R5HxKPygh4K5ePLmLR6um0pz3P8seQq1RKFP9ctf/u1v+7BlNqcdEez0X0N
I4X1lXx9dw1MpdfXfG2riDistMNSEH4Rrccb4Y/8cnRL9fh3mO987Fb0uI03HcxJiExzcwHZ9dco
s3vvxZTsaIGr2xmmD+LsMSI00fJFv0/mbMB3LLQfURbbNvuYtBK+fA8U8TOqSRvPYwXdCjv80svZ
ecFEkHhpXJBNTWSfUIzupFvHeVSIxo1FYZEy4sS3rdwokvKAiZK3rnzY+Ryed1c8On/UbN07w7X6
m6hS6lOKjYh+wxgHNswvu8N4sknoUX7Hwp9LBuU8+T0Ca/tOrCkICtK8kD5WkMmpO6IWAXUjK4Z8
/OmRAfzuhQeScqBIQTMuw2IkQruwSdfY/2ev76Y8v5xSi/gzcXVjJ6pNWe8NhZ5pL8vuon9u8D9v
ac2sfrz5UyHorqRAvNxS0nxaWXiYHYmk54FYhWXq/l06uTApLWRBji257/fX7WCJ6JtNeLLcAFYG
ui6Qlw2u4ilhoM33Ba9OQD+hKXM93Ab35owHIBR48oqnZlu/gRs9B7w/mQ9P7Aq6DwyYiEy7zN6P
zIrKF6PEXI2oo5vRRDZlhHjnxlG1qbQvhZImGO8R1X3muvsJ0Z9NyHew0PCSz7i9mW6rY2m1FJBl
jLOuJd9a+SClV8HYSGnNlxIsBxxS4kdb8pJAiZyO1GsyFurgT9epWWxp6MeSTru98ZQ2HxuKRPAh
LAyFLPqo+UCcwRFhd6SEMQhkLktq/u+ZRteg3JfitjOD93M8XsrOOZXAvc8OK94NqeYOeOIYfeiA
Bh8AZZCTK3Xt4QLtJ2oyW6gLSK/gyvC1P9wVOFLK0VxRCj7UL1ENqTGIylLsQV1EDrxvDeHgkr8n
+celZ0eo5oJZQc+yNrl6D8RLDaFfOndjQQuP1VMMLt/r+SCqzoIQpeaPzjqcZ5F2tDjq3vLL3JlK
L72Oet2zPrANXugoDIB6V4zLM77QJB3ICXMRSw3lLKHdoVR1fOZjH7lh6OFJTtre6FJuHv34LR+w
Sc62m9Wix3fNqnF2+9Qp1crzn4iR45vHd5J/GET/E8MKd44F0qOzeLFE7zgwf2+Iy6YZU0LJ7OWe
z0OlZFdrPEAemSaXyLI3Wg2c7W5Ef4UaJISjZfXU+aX/CFAP3KV58g4cgEfSs9fw8iuCFLuLh3Jh
GZg50idBZAseo6HiW0jDA4Nn9S03k0B9v1GqmSWPhP3YhzM/EK26PGYcgF0eivassZQFQSrc6Jil
NsS91pv/HNapigSr2eVnB1wDsPbMOeAWMefmfTJEy770FLL4nJvHH23BcLXTk4vQBAncc/ypOm8W
7K8vIx4OeBmtzlz+HHoN+Ki6SGNYfqwhxJ3Iclxi79j84bg6FlZ/sJmHW3B/BcC+MY8FKzU6WOYl
4ii86/wI6/Ymwxsc/fLpXuJgVnj1G6seQpKpHtSA/+fDWnvd7+23DNdK6HfBGZ+9h1HUSEREwoXj
99Lau/2+L3cctWkmre/U6dbCrUJx+9esOM4lxm0AgWGdwsmiTdhQhm1GO9efcz3nod2wuyLOoRFB
PRHCoU9xUQeiUOHk4A7KAbqWNnKmpYJRUFtQ3lyKzD1zt5ChuiYS+1trXUf0emVBc0RXJeOJM+oy
pdYUCtO7HboKltA1VXkzyJrTAnuRxZ1FiBt3NN7AswsisLqFyQAuddvPGzztWsE/T1mimJzTQK+f
f/Lv/B2HA5evVFXQh51vSrY2ub6y7UStyV1sLz4hRJqfnfYYtn4qKe+hiDORa9CUQSPNnR1nNwVS
OkQkOe7FGwVo2tF2pgxsVaObzuNgR5W00kvbG+HZrYc/VlQXu17CoYAXyKuimeuQUX6IOYQfOtOi
P/656J+ayneD3DdaM4CAxyapYpzyxTtzYw3d3BmLALR36ZccU/VhfYiHYcCtxg9XbjQuCmn0V9tm
VhQXJGWmHnrfgcSUohqw+023UH3zssHKe3HoXWtNxZuFWTm8uBN+FQJWwZg5o1SnFllNmOyhtpJN
XO8SRcSR9ghUC2PkIXtJSv9s4l9Gp1a1m77LFh4HZa3el3/C2W/EGR0B7R2Pzy8Y8kQnfhLd33aj
x06UIZTX/x5oFzGlrD7CuvF5JKo9vOIxzToHh5kdoOD6zjUKUGJYQquc/mE0DMReySwBHVcUIpLT
P0tPzMBnO/rCSMnc9ks+pckz6Kip2rnVsPX+HfAom3uAkz3m42JwY6b/bHCDef0RK/3WUac0dSKM
kEYtrhwBrDcHu2UrE9D4N3TPQpPhltMcgA3rCnJNzhStxgWfSGcSOX489GY3JX51jrPQ4KLwg3Te
uHo9coFgA7zxBD435Ek9ZfJZAcIO0Zt7s2uZwvFyTVmPWSIEW6daOf4f0gxbKYxTM8WdybNJXju9
AuBEu/AVDZ4+JGpSkGoI5khnH625YEMjmDdM7yC1jJKKFINwCI4JiWEAl64hmuHGoqBCRVIgMBYp
hCwZyPZsI1RVFT2dRHGrlaHOioCJ4s9qfl+jXm7NnHKSvxNcZuT+Ubv1PiLUCoGFG+sBAEE7OLIx
156yyQxHYKvnmGVKdSv1JDcqFOBTX70OTB59UidJY5m6HfaEtJa2TRtYd9dfiLW4T+bJCNByHVNJ
BP5PQ906S6hbtLHGTio7Jc/IK25r925Vil9Q71uHrIoeIOuJxTU2THyuDb8th3jMJAWZ28arIcD1
7zvWma3Osergrj5anOk44hmyfHWNmtZzWfjZ8g2mz5sCZf2xhx1wqFFUm2rP++JnqWZWqJpie9P/
FaUflE91AeT0nPFGzJobKS7vxP3YCIxqDXb4W+GNrbrMzqJv62IjXU/5VT55UrYBObNBKr5pNuPp
nl5/A4Sckp8yUP4cXgns9z450Dg8dC2rJeiALt5KoIAI0mqVyz6dmncs3964qm5zvqkhfspebtxv
+/5/HLRk1pKJC/0BEIG3U8PblJ4S3qWAR1ocDE72mQpK1S8J2OpVtmNPWqj+Q8XxAKeFhxNgDseh
3Ys+1h4JfwdhkuL1WuvUWRmr43qJQgrAU1dsla9XqNHMblQy5XDeZddFiARAWW3wQ5mQedn8mA5U
VcD6AFj0+myr/qmfSW0WZomoAlWRHZR8ww60cUN+wUjqZnXcQrMta/v0wrgmsv3Gm8XyHnb593L7
eG4J4D9wit4Xzo8ICB6DhsQ+QOfSpMQ+Uks7P55CB0dzcg3FIehDZWZfWj4jNvAY1gUscTVyYm20
ltt13qwaUWOMqO2BXOxzc3jQ7Wi51nA9iG29RjBhvOs8SIEWaroBNDKCGcQ3HvQk5wLRSMiGq6If
A/12iSm/sYD052pbIGYML2/C6RhJW3M52SyyIXliJtXn3B/si0AgHYfzqT0vXPlxQANLqtU76Uyl
JwP32T30MRjAm6qMdCDKPfadIidlWtpiNS/lxnet2Fgcu2RTx9pSlm5DVmFbm0VH38okdGyJDSIF
p+FEprQ9eDPqoUzNbjd4QlY9bph/Q/CVR7m8dBAbCFdT7pbH6Wdwk7LdzgRhdtDP9jIsKTNNte1q
GMvooCehfU4GiCw5Aa6s4ZZbQSVYuhRYgOHzovGzq1+5wOo7N2JA8vlRYSwwjVyUb2rqq7iWsbg+
JuJapgIlHZCoOngniStpVBvML3CdjisUnPZs7sdb7aLtZRCI8TsyQed5VNTTOv4NXqNYWssW/xWq
6f3VNQFk/gh7GyMyJ3d38QobBhLCLY4hmDK8JEZCWxIL9DN0kaLLviNG2wWKwZL2cD0vxQK+D5M6
PEIAaggXEQmwA138Km55S7ojd/DGbrMb9D+Sj/6WEvXGOXlRpGpFQu+ha0Zx9dB76EhCiH5bYq8w
bqILWA9l62keHeCH4BpTHJg8hCuBw91g8KmUfdeZqhZBGmg+jggKMotw4SoSSGVLhK21Ezgu6kSH
xJ58XYzSKRTRJwiPKrAW/4WoTYupBxtoBdz+SqQ84ip6iqZT0q/H92SSDYacziEwJ3uB05PxUTio
eQqXesLnKDT7FS0PXWpbQ6ZqpzZuwWNroQXXNu1J8npgWoFeQMl5AlAUYOaByxJ9IkIGyYOKvYWA
OgomT6uFDSlbXupq1moQTu5MMxn/ZMWnYIjBUqki5h/yxrMoUH85oCigWxdSG6HkE/Dlp5CORbr6
gSgkUnNa61GlwM8WyTdTAlnPRGGVdb1X4S8CEW5ZGHUyn/oCYY1HKlwtLQyyQeVplakXQCvrJ6kQ
Bg4uyIJgb9c+RoZytzND3ph+muOAgedD8oFvvTx3sNPkT//7bqD5QROXfB/CNgx/tsm0OEgPUtyx
ftKJXDzA7GJhHQNybc4wtemLWBnKgjvyPxxbdEyRdD4wobPkbKzOOTeAMstEFoqr0Y8H7QhkUQam
2jDhUkqJ284W1O4H/XuuB/Vl/qvyU9hoJQcPCgaBGFdq4QRDbpDlmpqlxXrXaHZlgWffJAnQn8Fv
sk4H4Ea0/WjIO8ifNl6SfybYK/5oIAIgUi2Nk8KE1m8gnJUPMXSYWsAeYkR6ybc3C9yJj6NzwSUW
CqJJugNELmiv6J9VPA9PaGQ64c+3pm+cpyDNDHQ1vY1qvj3nEgqx5n0Y39nCsQImiPV/Sg9yh2Bk
HQ4ZMwhLI+nFwK0OZ/zkh4odiDsOBE3M+kMnlZ5BJmXK2t+A59T7AvwpyVEVogCrqtbogq7EyP2R
/KoZIKfyE5vXtjndlUyZjAiNgpjTc1VakSJb07v4Jnou0T2uuBBVLBE8e5fRknL4orW7nwiNGR3A
FjSKy2+CMPD486jawdbxAbwfChXyeCLhOttQScZ5/UuJXKibAEIiWMO0zwi6h0787UrxLIJuioc4
nULkOdY/JKeviefRwjlnZY4q5i8h1F/oMT/HYeWGqrroYovXKcnUxbMWZD+jaopXwpKIKwV/u7gL
ICCVqIDSf8Gom4lbOw1ZcRZKLSyvneRHTfAaqVZivhe1m/wTbLuvizyo5v0fH7nNqAzAgtH7oirl
O09aUTNKpDm720Ay5sPItAEz0pFiZQIRDfWGCHCuuGaXZG0xuyl8ShQxJz/9BEeMVCPhZnOaNv8X
bNe0t7omyZMkSFNPR4U3evzcLjcuK7VEZZdMkX6tka5B3C4bRACtFyOeQCt79Xrriwjp3eDw8Yxl
i4ZnF2nnIzXhArnO3TFIuhZXD15yn9vVT16wMxV0rkzQ2P+1+g1u7aeDNwRT2xaUvdsFLGr61RsA
krrBB/uXlnDPWrMSIoSOLSTC16X9VfDFq7XtK2uA0BmKK5FJeWOI1ArralXwFlj8KdxJ0L25ro4p
IZhykME1I9BoKS3TjfbTDmfX1WVooDH5YBhsp3fnJjyZm0vZ9V7nsz7eC/en9E7r62uh+MrQsnxQ
HEOfnD5I5vsCo4FmTwA6lhGbUO5+59ZQ6busQ3Da/4/gKfWPi7Rx+7Y3AL2HiXlvnKxN32bezNjp
dYjFYXVPdjaFpz0GrP3APSdp3La8UFzXbVhLuwuv0mDPBPScpRdDo2G0X7gso054AFVY6n9p8tdd
5zYfJhmIvj/NqUn/wjbA1Ptn5IjIafceDKqCWE+o9brGUJBbmYQvsYtD4pa83lH8uoKqIULDiSXg
6yxJwmM59viy5qkaOJYrzsWg3wlO+PCkAvqg5HpLKFZUsQIYlmnRFiU2siCw5xh8Lv91KTWQE26H
JygYAC9Di3Fuj9L52dCNMgbtOCerVWI4RqUpIFnC+F3fY0d0urDChvfCB4v5ZfmHK7UQWuUl5DRA
Ncjw2/e3pwmVbyls0YUVrzdizPbhlKDJX7xzvC4K10nrAjnG++RxySdAOFZXubgPzTr62JQtSXmW
IIqO1vKeYP7Zb22j7YH/bXfT/F5cufY3ai23D7tEwC0XTRPsjTnkyjrFZDKy7H4jtCHGqFDihiKn
lzcjRj0nxDEydN0T3XZVLw1ckchidFI80LIRUz5/80zPxLB32RudBu90cckCuB1n8lnmLPij/zE+
aucm3Kwj0LLI/ESxyT4RR0eJrEyPbq9hWnKrwAbHzhPaF+fffQmkrsUci95u/+x5LJP6G4/zY5ZU
42fBuiz8uxbweZF5KyivG516l+EjFp1oi1B96wKupMTLWNO5UC4Axpffk4EKZEEns0gYRwpJIJRE
k8wuG63EMGWNSCTG/RO5z9NxoZktD7g60co/R42CBfts1WLyi+ow7jHsNlPv2xDWQd26f9hJIG0e
TVk9W8+8PqEnJMnsgKAfDu8qnlNGOsOHkqE+0aqrtum7PjdweTcx62yaHJffKPA9+xi5XkwSw90Q
gvLoWjJpXh3ptwi4hIt+bp5SLcz1MgCE3s+B9GMkZp6eji4CZRJ4Y8HsDzXziQLOBcJQbavNtaQc
TKFoacbgnSmdbaLo6XIalSOZIEQbh87hhxV6K+UWL1flpVWVAsJlAajEXmi7Y1H97PKK4PzSN+fr
yJifROBUNzCVFwmnra+Zipb4E5Lcxyic9aLP4yppTbb/i3T4qOrnXLKwuSrhJXSCcTyIRNfCOFlv
XN7teOJs72V0dh9L2Cz+VbtkRX0l6NYasCjX5gO0C9MmgYx+KYUX4dFrpHbbUVI/aeFPSRXeqpDp
Bj9ql3XKb0y+qM3C+ISe74cIUmyZPAsxtspP4l5ZqJ+0B83nubj14d/NJVghYmn7MX91fvjVASmN
lHcGwVvjoBHip3wjmlEjH6SoXc9kZSi06Y86jAP1G1cetsxKKdscQvvIUgoMDbTIh6hwcJVeWzdL
FeU4QV/2aGp2kibI09y/XFAZ2mNG6KrztPsjXWq3ds8FwxjebgVCba+YBkr11MEoN8SQGoQunHoR
wD0amqgzGzavEsdYCJ8t2cCLE6pF55bmrf4hm3BUaEi+H93IC5sJ2FrXcBTJB34BRd3BWFA4sQn8
EHoI6sWL/HNvZS+gmk9tJxOpZdOlBmBvL7QUxs9O7HcdiJgqyWSO2WiYWifPywrmOTezB/3RbwAO
kCUo352IbRcj3TrkIOubd3/438v4D7Ft3DhuapnoCgB3AiCh5BOxLotQ9OLv93+EDKzj/zShPRlD
D59DjxgDs4Iu+g15WT/OKtcR3zlU4vfTWVU8Pr0Rrd9q336s3AfGKPsXXriQ6NZ9n9r5uEGts4dA
CYsfvUEE6TTkT7HDGNd88HhGc9mYTrvIYqnxNJ2Dfxdy3D6py5NGKwO6Z/oHkj6jB0bWGX/iwhbN
OZ8Kc2Y/JJdWFNMlOGHs+2mgWXt6E5z02EvayLNFqqXbzAWxSJ4gVWUkRW1w4X6kYXnUfn/uK9T8
fyhoOAFAK7KnWzDARKpQjPRv4cyZKWEU8ND2VGBYHHhelKiwkDMuKr8qCOHoiTY9LsSSTJ0y3Om5
zPbN4R4hd7Ki1teS5VRo9DgtjemIkmKBmt9AVyH8O7supJ4F7fWQI9zIGnoUPi2/DYYul6u+5iWT
Nnlokkjfdc4WCCICsJu4zYJ/8oFwpYBTtAunbPpcyXF/jj8BGbtrurRFhOc9OHpTS5riE7CjTD41
SMNvyBkzXhdBL7s9fFTUr2SwP/m/pdiYt1Y8+cPm/1EIyP5d5UbuPMKsZl3LDwWXCMnKi/h3PD2z
CGJbKmdAx1uch5biRyNx6w3CCPCangeKeYwHKLHU3QjsWtCBfoAkwR+YArHSuJu8Xvtd34qhtsiL
s3yC9fez7iMXGfqasfXLzwl/T1pnQLZ2q5XYcSmbjHxP/9A27xwKycajveYOqzAvM3CRfiZE8eY6
nI0NQlJ53WwU2oTg26Z6QRQe3XHyzBwou5E1nBjHU2cxdKlVp9DtJEqKHiY19jXJ15FW+qthh9G3
7MbDqD0hJC4kwh8UFZkjzWYM6JzvLGwdsQBfme8bOryRIVZ67tt4bFVVLM9FXD4pW0GJ6ORp8Tdi
4nJ6S3aD+mYkO9ofUAzhp1lc820p3nSEDgqvhWKK+V8arvQArAOVqlMsfcrxjTAftF+gupUsk4Uu
x+TuA+NA2OPMbOvrKHF/9q/bRDZFWAK1pqkR/ayn+Hr9aqdjxKLKLgWR5GJILTb6RvYPQ7C4/P9u
ORGmHF3yzCa8y0jOFH93CrTEfxSjBF0EiTlKkF8k/2JU0TKPm5zvg6slp2L/EEy0ydkfd2uVivJM
qWFaC71OR8sCvnHywV9Rqc/3Z5M2hIVDYOyota7W0D+EpXlGCDVDQTpNeGWmOLMqNfWr9mWdkNpv
GYuGydcdMKsPCIlXc1LGOaspNv21aHliav8RjakyVwcswmUhf4ZBHyByl3pyxgpm9fvfdXUC4KzO
tu4VTi7sGKg3DdJhVLw6k/2u2icZUQJBG06UWsOYro6lLEAa68zHBoXCTBDX1LdBbB0EpvjZGyiV
uRE+GXFmHrA/q8FCObD20V/4gXKXk96VrBgMlOCPfO4TJLu2BNdhasrxouG2R9Tf4ha3DpYB5Wuc
u0SGgldtDs6NlsmbqCFk10eYfWxWmYr7FmwhHlxzl9F8T97rG2QylnqUtYMDx5M9tA9+oLYxWA8y
A61+YQeWWM79SjgKWslaAG554is4whtWWKHUsHr1n7NYjd26Xge/QVwVvSQh2RwbfymuNEN/70nO
f5l1YSAhk1y/G3FFQ3eccWGONkdgA9dS9HZQR7SD++bYaL7Y31aVlOxtswK1jcHpFCTFWeChLhpk
DhoqBem38sM9At8UHDlWF7FnNAdhktmFUDxRIqNrYrFlhR5Ay5crXOKjDrTyb8zQYmAalRw+P3dt
9fkWxL2T6HAMYBjUAvwxPOx3FXGcW7dkxacjYVhZ47bVwupVqkgXiYkIDfmm9tjzFNPCQnIDtgPR
22s3BLR4rzfdd1W6ClCfGZ33+Lcvtdd9Ki+ToBL4StuX9+m9nY0eq/rislQWncvUWRVJfHsBK+JW
b3dfPRlF4ThV5RejfaAqeMycTNOLFrA8X+xl3fZkznaeVNrgkR4kwoDX2c2Y4oUWRxg5an9f6XME
h5UtbZe1NWmkPyew4JFdfnNc+OItFmUqcl4XQxzLtu/yeQzsZyPgKfKbrZliJk7r5SqcKVjI+1/u
BssgQeOwTpFRPsa2skTlRCvfxpFwBXYQOkncuApZXm3H9ImD8i99TkdhAZ8NWgiMGx7rV2J3CCI5
HsIp3c31R1wqeIc8490LHA9lTaqll7qbFAsnlPCl3H4sik7s8zflMICkU+efqDw7eZ8f6rqVVVmh
MVUYBnN97fby00WKxxnfX/5ZjKDrN6aiFvfS8tCxuEgaYRk9kmkIXugVN6NzveA3HqSOhYMhKGKe
JFqOwIO7XaEuFPVFmRdwDreq6VIIsQvspti8FGzLp515iW3yBgfqUPz9yQyIEyzKSjfIuGcnc+Nl
53FjdgfO8sHjhl27ZrqtLlZXmHNt1QTIbla6eWi4A+ANmMq1Y82B1nJa/3DKWjO8O8ikeS55lE9/
rBW33a5rSwc91N8sK9MH9ltCWqCHzi9hh4nLPXYs0p63Ba1BX2BTEdHAMiV/ok7Gk3mE/xrbysXB
OsHxm/PTXLq1Oruj9e0Flq22LadcL1O/ORC4JSBOiiuM9gr4TqV/gDQtqKIIrYkM54hiOOsqqolt
2A0D6WDStP4Izq+kNwgo0WAOXA+JYOGHTHHRtkjSjMynoG6G7DtSNojNuPwXQEGyf2gtzfNWlyT2
XjOd44j92KD+xypnrDyiuuF5/HDY/EZqe/gEX7eB0n+d8POCNdlF0wY1m7sTcWRKbBWi+C4uj5nC
B0jFvqs+NEuIq0GN2tFo+Ec5OXuEP6EMYQGl1ODp7STVcqPqpma0n1YREle+zk8moNQW89cr0XwL
fAAaYcVNtR8pt2SOPnBu1ud25wfn1rf7gqp26RjKDz3HUT95C5RC584NThsfxQKdq5N1R+TRBfbA
LnMrcp9/gs2ZbcUq1Csl0IU5KbrWEzyG2Jkhrv1u0ZtToppSSSL0i8x5a5XjjkFQH6v5b2FdX7IJ
vboF3oVcuM4hjOKvru6TxveJKkRXAKn3T85gpZ6tqn9lWwIB3/VBbRBTulbAycK2aXgR41wbOmXg
QNMq39AVJRBU+wOnxXZr7+37NKgMNnKWvvc09ArGGJLv+Z8L4TP45esWft8psoczuZxBQjOBePHz
HnfM9/zkXAix763TqxsfjxCJJO/wC44vt7vQdUsZyVRYVoOgvnWad7bYV0tAORl3NjzUYDu/7Obu
WqBkovNas0ezzlTAzKuzlo5uxBonTn05kRcFsil3TfNLmAyO1pvn7UxNpbytHH9aAgi8kx5iyHjI
icVFxq6wt3jZ68/S36AKm2Naq1kZva+2TmU9hiSPQVVKpE2EnC2j51C+g2m9/apvF9lg1PQG/Omn
0IjWfrKAvR5i1MY4FRtksBpFRmm6vTYYcgXQohY4UYylbtw4v0ehzx2zWObmMXQkKwMRPi4tmoh+
q3pjDIws47VK8TWzDXuBY0GVQ0cty4xAUtzKd+NMYMqlzZxnAFEpu6jhaQq6w1LzfqWZnbl+1Ext
1NJJzOnKdPXbHlTD1DVoKPiK/9lF6jsvBmrphNXTr5s5JCLeqR0pENXQjtbZJZg8NpqEJzpiEEPC
MgiDFdPFY617TuVFl7NyyUehhnBo58hv4nU58I05y3YgWZ9eB7j2Pa2tlFhqo2b0bV3Wu38WzmBg
wJMu3+aKl2WkH9KRNkmt3gjDQSDG05gGaXl/6YKShvF8dfZ1sKiXXldXHqPH3Mk9TovBoyQdLGFK
HW4NxnjJDBIar/Qq9w8/gIlFAfiM1EG3D7XH7YhK+8OVXS0edGuuj2qsHaOAdp4HX4qWum5KqRvF
vYpmT1YLBHzUJ+tE/5oZUkk9cVP1/KO44APxW6dKTmbGj5HlMhR/DdeK+cRGlMAjFo9BcDdL2k+j
OaREG08x4yWQ/7Z94F/jlNUQeZiO+ccDNPVjmqNk+k3t5xtANrk8PesyWIs6/kziY/mEC9ozlx4a
J23X7ajw1HBSchZGBr0STwWoLZSz8yY3wfaqmO6j3ofzFeT778MV5efqiZKdOJqNjvQjOqEBpS1O
gRPjdQN14G+vee50c7cOmWF8rpUErCEJbtRotTUsZ1zewOs6b1ALGrpT8dZ7zi/2SWKsmn+AvAKN
4PzVI+0fJEqfYc9vuaTwPNb6o6rFvfbpGw5MOBCYUZ9XqywtiyzSlRNbECgj59v3X8GN2OOZmElV
V87n29XnqTND0Rb3EprztQeoMLMHFSKVPMkPzbdyOPMsDU2rr+tkD/sHPQpIDze3cIoQiT9PRrQF
35sD0nRiWngPOc4VxIJE9h2ITen07Rn1PQy31vcOVn0HCYBHpZa2fiJ4lU1YRVzyVZfuGDldE0tA
skEDnkOA3QtsbofmeNZIG8H5jD4vdXW+tk1Gb7facgTCLt2aL5K/zXEQ348EZTSFTgIxNeSi0JJS
6jGYW4/Ye3FLPeUuy+ZrFF8+ZAy8lp5WaiFO6xYQrRrR2K1Qu6faPBUD+RQSF9rtKHwSwLZyFOYW
A+VYQUUyNadoSx8tx9Ll4d9XBdOoDxHEgHd4nQ+N/GnZpOlxmoTK2U4z2TRFQdUJpFLAje2x7Zhy
/tyEc0VZ721GQ7VdIjevzlyYrZla2Mol3eELzY1wJrFGa/22gh5HN6pPvoMAUg/qLk46b5E6CrIE
VLetU/uLZZf1MMviF+iyKXWtJol1MUbHOVUGFrUb64eYirmuP5WylzxyRZs9lL7y1Uj9xeBJW13F
CnSMn9Z9szQVCtYNzdvgJN0h9C2zF60bGErQO9IVjG6ZajTfZttjNP3gB/dUunKBtjPwd6CSQDF5
9MRc9x2CAQkWj9oiFFZLLykegY2erht7tHrduDP6OUvsxynJNUOlhJb74k4Zha5aTl7appcs527a
IpIy+01oKZ7bpLDDvRDpT8aooRVVg/63KQWJpg/ZjfE+i2dpeaOlVHUcXr3WFkQuT62enDNFs6kr
m7TpDBlr4U3x0IRGnE2zburjcZJ5w/MLyt9d+Pc=
`protect end_protected
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
iisr0ydwFOm3eepmhOYSaxO3flYpViRsLN97vKyw+ai+x1TubmaH8qRRwK/QFeVsjlGTFdxookcr
olQwv0bmdw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
dJvTzz+PoD3n2Ot9SgKfpEhIshJxklhDhS1tYcrcmprfs5wN+lN+5Y+o9jEEql61IqDkJEIGu0xp
zaDWEeMqwkFuovmZnp/AnbrHb7R/19zPRtwSyZ8+VQRLsRMgscwutXu29fTUST6Ribitutae85tQ
1okc5mYK0mcSMIggcMg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
ZijKIWnBSOuwn6R4ZrzJp1qaSPGZMrP8GTp+SV+Sn9xEivGxLJtGM40xMLXxiYuxIopDD/A1usG6
HkSoNT6OzxHJWKkUEyyVzrZuJdNHJ5q3s3y5LSNY7eMxN9lY4/gygh7aVIBAO9YWzsWu3HLtrHA5
2vsUFQxQdkG5OTLVP1rH68P4j/dhqr/LVHw+9H76c/knGyalpHLRC7tnHQcfuezFJWlkzaNGHfUo
b5cE1YTvtdlZVmw2sVG/GbXIRi5fq3+Okdy+JgckZ4dVWbI20rfa9LkI09/kwD3anyrnovVQVx9h
F0AxolVKVVyWNAaSu1fvXllqzrdJiRLbdnsq0Q==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
LUajPw/jRTLlmEKb+9YylQ2jxw4jlSx/1GGaY1wFfWFdMwK2p0xvQMjui8K3EqJF0fnb3QNWuQDl
1vTtf04vcOAHkfRCeW7Mbp8qeUTtAsflGIPJDxHfVU8ZKprwANsENc8LVrpJ0WnjDFQIzJw7LDqc
Jj2TofWjKprdxXsMnu4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
KG6kiSPrd66zvVpG96eKD+783ebVLVFNF7pXgq+rCyBBRoa0N9Hp3DIWK5125mkICodI82zuSq6k
C8aCiPbDiv4tiuIn19WDNNPL4ncknL0KLZTLAkq0BIQIsnFNRaZegM9aXOdMYGKYLpnjSD9KRWRt
WPXPZfwprSu2D7PeDZMiij3MY+cixttgVmNfcx9Kkmvg+1B5sTSDTVs3fqpJBBO1YslTmxyJAIC6
uDuGqvQ1138z6f4f+f8vMXratK1Ypo3jPPb4FTNLYJio5Vd1Nbpl9kRRtj801Ie0GGhbggK6IXJx
785o6wX6g3tRyoHXGJ4DGUmWlIHATg0KIAflYw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 13424)
`protect data_block
rEtV4Bm3SmvVbKq1runp2SaaO1GImraXNQnz2t97NClVhlTBGZ14v+hHArmsTHZNME/QWduIEcCL
I8GdWPb/f0NXI5m0D8vUM2MFHCnzTFi82f0pjwFGBVpM7cHKBa5QRX5K/e5A/9KwgbwYV1tKqTXG
aWyx6JRfuzQINO3rQqM+n/1b6LSLygDM1QuiPthpMFKV8IfsVkaLDVqcLxH9/n7C64aisv1xK+OH
WhYRETSZok8+gbvdGdr2+VsE64ALl3DavNBK4S7IOGP5YtXviHmw+Qb/lvl6m+RggRYmTe1A6B5r
pghgGDxK2gS0ItU55quFmZMEuEH+bwLuaJA0/UWR19oWnbcTZnsCqEeN/xbKUzS6blm1K6RPZtYe
WSGhjFl0cKHEQe9DfEazTm6tS9mJ55lLbSuwE5o03LDGRapxUdSR0IiKy5C5UP4genzVw3zearva
qPWmPeGZcAEyFioI2o4OWQP+8mFdbza1kBOuw4BP76P2c+ij6wbxXAWVxtNmL8f6AgS1AV5SqIO0
ftTCve0JloVh9kpHsbXE1TS45+y0IuiC0N3a8PAEsXa/tnLsnAydpsXIQwMLXmgKfoXKzabAHHdI
XZJd/NxD7+xY3aINMVaO5eSSLIdjkYZIeqm6qf+x2eNd9v2nue3I9rjHkjMBIty9wqDCI5HznV19
h0aPmdRn9t7Ft5xXq0GXqSl2I9ZROoM4hg3RU6TCVY4IaDkErgP5cMhIwuHsntmeWvsvkZFygQtU
9TUaf90O9HINFkrdIHf0ZCgtCgUw6ffQNPAkw/6MaoKxm9wdczGi3ur+eyRvSLy7+LQX/dOqvXKM
9UFNjkQk392HWfkT8aaXacuJgFT4hmoEXDGY+tSqQrQRrPmelj+ksf3PcI2r64RSTjiR+9HNqWqJ
jPJio2xgGdQdGrH+UewLz0ySmNDYmqxIdyqKfv/B1BYMUpGd+l0eRCp0RwjP6nt7MKkBishuJTL2
2kpCGDQ4HELrlovnj0dMihRpFZAIpY55DfNVE2hnbkHthyDrEXapmovyPqDFel+HKDdimVyeM8CR
DKl0D2+OZK8XWAiVk9Ve6w0rONvwf/XvaAkgxa3rDJQo/8g8oiGRq4ku5l3OZUKrPVRcjVNCxHRq
81RLF34Ztt0FyGvWgFBPXPwl/QfIQcetnIv8BBHDyYvjjUEJZxJ0yVIBqSipzmyIn34Kt0GvhgJJ
oXsivJz4IQp2WiLYnKzv7NuBWYnOF+M/H8eFTLS7ynV/b0CRf7qayeeaKYL0uv9mUeXbILs7F9+8
XkemV9ihHFfHS04009LEbIzG2O13pEZ78n4YAi47TmCv22T8/Ve6sSAGowqE6FfeksCmQ1+Z98YQ
uXIyCDvF0dlGJwZxogjNRbjyCBj6OOagNPhSW71GcVdRv5XSPoZsF68V4hWQeNb+itDo7ZPtZJoJ
YzLjFDCWp+2G5a8+OtWGetlJNejx9rEDOQvPXNhCi9xzzzSvIevRpnt9XX8uVwzzSJnKhI91LgRg
ID2cjEMis7S70eKGvR2/KBOhU/KAbsgGALtSpbd8HPFqo4CWuxEHCYImqvt7m+vI7jIEpXbwjtx8
QWNgKL8RNSViXrcj5CsXvOI28Nk2V+GZ8jr1/8I4R/Yns4Xfj1TTWzVeNCNHbazn1nufigCGV4Vl
qtDHRGZpM2GzgWRsMj5tsZldV3pp52C/Dpr/92KUqWKMf/mZbYDJL1X0X2Tw7iboFgBgx1miq+ht
zrLMfkmBPAPakC7uTHv8wdz7HICGyvCct17zvGp/b+9c5KI7lCBCd9jn5PTW35q5ksO4eC9R2AqE
0xJmD9GKB17q8Jk7vlAMs/IJV9rgMDnRfyFkOl4hl2S45SaIY1ObTSNIHJYg+rp/nN6BMaWKrR+7
O6t2IjDTrKFkfrU0cMF3G7EiQSf6RI1d8iyqNJLJJ3fbFhF7XLnn/CwlkZ/03Hwn1nJocabXwbc2
9Q6RrzrxLCWMZVoXaUEBQvapxENHsyZOrmSevUQnuCknCx9Eh/GwdP2bYVHxXWg7ySdjQnVMtR4v
qT7n0yJuHI0ite3a92Oo/MBdlgCwEcxfvgz0ILRIK4wFe098lGOX0tVEsLdEUijEAeQR38bksd9a
fuwZzPBvMZQ+FON4CQYrDg971r8Qz89ArQjVxWF7TdD0Oaq9vaUrLocNzIw9AcIy8rWaQnwTR/K0
PsXLapKx1fOSZnuztuMHoRXGaqZVlZJGs22/GiJA9y/IBflmF5GNFnRUbXVT8r+FfMb7zIr8eP+b
OcPNp6F4kqt/b8gae/9JOIopCuWXpu5kDe0U5aC2qmvMuYbNI88aUx34i3WHd8NWKNbdtGDaQ8nM
iyuSX4j7EgwTOuBR/iFM7rZAATM59ZFv+9wRq8hbXVvfsBp13upya8YovLN1O9OWrzxUWym9ZPN1
mDhMT1YgOqVRaJ2ADyjP98UghsOXt6ybu9jGeEndP5T4mZjxZp82OMxqqS6VolaMbGRNPa271n87
65g6Q9l7RYtOL1PjdBOlgNpUdYZwxJ2EGgI1wPnrnuUiZ7sdhpuFkhJDdh2mHYlIUZHAsriLKEHR
XOdtU+Desuf1ojV6OryxMP052nRo3DfSj5+dKgSFWVXGLiS4Q5dQxDHIvUugnqZqf+FK5inrMME5
1eHWMPkrqY3H9syJMZ7RM9SwYc/zjL9fOqr9mE+npGx50NODLrgb0FydLIXRotOtI+YSbZHKzsKt
xoZNcJJ4GasWF69GNvRenQ3kp1eh71xjJw5a0KZmhsJJXThZLqSzb/sTisTU8jCaMh6S6ag0knK7
jonbXo+dctsmQfLpvLXHN4TNqJnY6alIH0HnsTz7EklgiqvaLbFn+25uUJSNDHESZG2BaAtNvG/4
WuvQCSLWeuJpsrPd+06Bzmmnlvn9InJZhGDVhnZlfj7Kh2PolkMjpLgzqH4f9hm/7zH7o7msjyvZ
Rj/JnTghr2ou7m5Ayp5K+yFEUt/y9WWmqXlKOpf12P8RITbx8ILm1kWRqB8L+xfF1r2HXt+av43O
pyKFj4Kq1FZckfpg2It+beWX2P825O6hDubEjA2RyF/zyyc3lMSS7vtAQMEOEJnWNslP5r0po6TK
F5+Ikch7kOxVShNh4LWWzwFtJb9SBv0iFIezeCGrgApE2blMwedVwOdpPdPvsQjNRYc8YG+dStcY
JUIrNMdc6m5qSEWO36XNGXLN/ZrjKkZcCr+z5oN8Oa4cO8jxqZo5bZDRVUh4VXM8a+hHCiVvWsEG
HkxV52NFazh7Duhb2Ix5qYigebEWfDnA3frHeY+lRAIE3+X/YoDjgbPuOqgwawkAvhSCeNbNxuTS
T9ZzmE8PWRbDowhElwhdboesSdX9tyyp7yCSM6fxKFXbUrPplwsSNsMYsJJ9grw0leD0bx4Cd0Vy
Y8dDayiLLROqmsdsKe7b4i2o6u8A0RQrPB31DrVO/yPiNygxChVesembc822gDnOAlf6FO502nEU
ItbE4EyM6ZuRk+69RSoT+2AZGRndh55WMQYb6i7ALzZeSttxOh6V+LV5SNYYdeQouPNdd+N45DZn
niJzd/11g0AFDHSZFxMK9p0VsOmXbAPFEjcTvMS7PiMwhUsav6ZfZjkVwz4X9s1v8DCZpNbKSq88
kGJQIcZYRdAPuD7V1zvdo0Zf6leEwpYg5lACMpJ8rGWyLPBrYD/CsWB0THjSjjkRntpZXUTF5Sq1
IPSYaQtCSAHZKO95giPeqw3zw2XQ5ci2o+t0eS1YvmSPlvMfZRnkdx98t2mA8ABd64gljY5f+0O0
px5Pec1R5VTiPNgghdEJlgrPqQxSP7vDXo0dtJmtqeP90QCRgaOqEt27wpqzv0KFUth0XwtaJeQ5
dejR/hEOliBmBscgJkx0gBF/nLybnTcQ6xwwOe25uqhvJIiepSDJE4ICrD/MSurrVfozreQGinSL
a/tMurSZF67eavaP5tFe2G44AmkmV4WBRnOeWOW2dJ2Q1sYHMUzfnWjdSw1sJJu6+Y0fUowVqq0Q
K2lcfV1v+sdb0adNWmXRoPrjCpXnMpWUyUXWCaY8r49ipi+4TCdxE4p/IUZfO1aumt4+xQcBT0dh
t1WR18HGPmHp719a+JPxfWkOQjw5JnEukkqxKV6fqJPDzGrHDJvrkNy1tkX0MN6Z+Olw//0xoyyG
9SEwAH72HyUlbfM2lhwM9N6f4cr+CLxPF2At8ppy84kKN/H+2RDt520oTXKCcGFU/txd8LdCs9qG
3diwadeKrfsinlzq/W+3PUAPHvjHcwRyRb4m4Wv6J0kW7ItY1ox7z91NbPGA481MOKLtCEwm6vuk
sfLsMi7+T/Hm+qsOXlQ9i8Pf9VAE9LWS2byZEwPIYDYtbLm2L09NRsMgfm6PotDA/9WaPtrx/CrM
IMllkwsRz86jBnsfx1s6w2v/gxQFWv0fY8mf1WywsWC+WArpCmvfHO0WMIJtyS/B+XcdiLdfrrJ3
qeRMJy8lhDn9mvRTVYzLXtu6Fv98eAxRiP4hPmT4+kxhTz4CT4cDPP9YKhdzODoL28xWfAYFbD04
Z7nP2BAp3o1FR08u/ctwg8oxDjcRwHkmDHquzKrPjnQBKXv9IMSCNsR7asFA/JqdhHcmuKZg6PRk
6XzKLzz1/Zs3XVZ/rpAcA4yoz12/yPHmsazO+a6cgbZy7JTSwRBhRd31L/KB4M7WXzNJ4paZAsOI
O5FWmQpp6eEyGGXpKkGy2qdqVRuRe0IjzwDJG6clerafsgCAj755Q2eTRVVvvRQw+G+hVjqaFu/+
m9KSJt+0hjHW1BHC4wyHN94ORPERUFukKcxOq8a3C4r5hTOZW3XWq1v7Ks4H7Zwi4AlNCGUKQ0ON
VSZKVFl61F+tBDQk+IqFz1WMfzhOfRJYfalfeqp5HOOIaK9cOhXG2oYdhceL4LDJlhJPAqpAc23Z
G9mCLMh7l3PvdGUWIx2s5Z4EpUsaxWTxxqD4a+cGuaZLzeV55zSCZ5qehwrwRTYvoBZE1+lOXnfi
Ryt8wko4y/GJZL/NuHI8l8tJKmVjS+XqWIN5sWUs9WMNit0HB/gZfmTuuvpwP7gjFuUjS2Q+jgYC
9ppF022c89tfs59OKVOjOQ9s2b2FlXyn4zn9AXI7AYGal0MNPRsQwnnaZJiTebyHcwtZucfEnh6z
9K9skBFs29qlMPNYsFP7y8mzdNhDng3TEgYpao3SPfXwDj/CSw/ObVggf8enRTUNlDfJ+17WwDyO
/ajc27MzTRLyBCCQhUYvMn80lvwSHxWDIL3xKvr2OLMoIAmgIZJG3sJMyhsOPqFxVb1Qk7NcojOn
D11t84xem8WyHJRbm0pbKV40U5U40scS0H5bcMWTEfGT4W0Mt47O181hbfymq/ykV0yIpouFyaDb
tUvUtKWqMknlkUxdllrfasNUWgJUfn8Cl8EV1Z3U5ABYiUNuRr5oKcdwlS7eB/n+UgV71hPGXiii
tFKvLiZLXS9l/eoEDDKLm6/8OksoHEEFzRFIR8skagCp4rd4fSGbOUietH2v8ecJdTlXFP0ex7TX
vh51q5DGduPDyv5nJCNInuPVn9Z9r55S/RGw+ySGAcaPEqaldHWakl5LrzE1/zI4K707/QMAGDAl
HQdn4RCGxESdD4HJn35p8o9hnYl7WqaHBddVyszwX//kjQ4qJolh4qp+txlSxnSJmCs83a+aCvMk
IbAnKPRH3SP74XCHOQ3bziFlRO0Q1JWSUp+e9CxVX0iTOPbgrB+wD9yT1o6m+o45pOEi4yqt1ZwB
6GRU83LP6o8j9UURxZDZ5WMgpNs4xuaPxAt+XstW7JOy51tYRnIykokiQYYg+aWP02kEZ7KL2cif
/t3AkMcRC0iKXbo3c1/h2uNlHbvkqXBOZnmGMzMriXwdE44Vt7izgW2oY3N5IFwqNHPtWi9SS6yA
hcD+oqiZ5YnDx8Be3R5HxKPygh4K5ePLmLR6um0pz3P8seQq1RKFP9ctf/u1v+7BlNqcdEez0X0N
I4X1lXx9dw1MpdfXfG2riDistMNSEH4Rrccb4Y/8cnRL9fh3mO987Fb0uI03HcxJiExzcwHZ9dco
s3vvxZTsaIGr2xmmD+LsMSI00fJFv0/mbMB3LLQfURbbNvuYtBK+fA8U8TOqSRvPYwXdCjv80svZ
ecFEkHhpXJBNTWSfUIzupFvHeVSIxo1FYZEy4sS3rdwokvKAiZK3rnzY+Ryed1c8On/UbN07w7X6
m6hS6lOKjYh+wxgHNswvu8N4sknoUX7Hwp9LBuU8+T0Ca/tOrCkICtK8kD5WkMmpO6IWAXUjK4Z8
/OmRAfzuhQeScqBIQTMuw2IkQruwSdfY/2ev76Y8v5xSi/gzcXVjJ6pNWe8NhZ5pL8vuon9u8D9v
ac2sfrz5UyHorqRAvNxS0nxaWXiYHYmk54FYhWXq/l06uTApLWRBji257/fX7WCJ6JtNeLLcAFYG
ui6Qlw2u4ilhoM33Ba9OQD+hKXM93Ab35owHIBR48oqnZlu/gRs9B7w/mQ9P7Aq6DwyYiEy7zN6P
zIrKF6PEXI2oo5vRRDZlhHjnxlG1qbQvhZImGO8R1X3muvsJ0Z9NyHew0PCSz7i9mW6rY2m1FJBl
jLOuJd9a+SClV8HYSGnNlxIsBxxS4kdb8pJAiZyO1GsyFurgT9epWWxp6MeSTru98ZQ2HxuKRPAh
LAyFLPqo+UCcwRFhd6SEMQhkLktq/u+ZRteg3JfitjOD93M8XsrOOZXAvc8OK94NqeYOeOIYfeiA
Bh8AZZCTK3Xt4QLtJ2oyW6gLSK/gyvC1P9wVOFLK0VxRCj7UL1ENqTGIylLsQV1EDrxvDeHgkr8n
+celZ0eo5oJZQc+yNrl6D8RLDaFfOndjQQuP1VMMLt/r+SCqzoIQpeaPzjqcZ5F2tDjq3vLL3JlK
L72Oet2zPrANXugoDIB6V4zLM77QJB3ICXMRSw3lLKHdoVR1fOZjH7lh6OFJTtre6FJuHv34LR+w
Sc62m9Wix3fNqnF2+9Qp1crzn4iR45vHd5J/GET/E8MKd44F0qOzeLFE7zgwf2+Iy6YZU0LJ7OWe
z0OlZFdrPEAemSaXyLI3Wg2c7W5Ef4UaJISjZfXU+aX/CFAP3KV58g4cgEfSs9fw8iuCFLuLh3Jh
GZg50idBZAseo6HiW0jDA4Nn9S03k0B9v1GqmSWPhP3YhzM/EK26PGYcgF0eivassZQFQSrc6Jil
NsS91pv/HNapigSr2eVnB1wDsPbMOeAWMefmfTJEy770FLL4nJvHH23BcLXTk4vQBAncc/ypOm8W
7K8vIx4OeBmtzlz+HHoN+Ki6SGNYfqwhxJ3Iclxi79j84bg6FlZ/sJmHW3B/BcC+MY8FKzU6WOYl
4ii86/wI6/Ymwxsc/fLpXuJgVnj1G6seQpKpHtSA/+fDWnvd7+23DNdK6HfBGZ+9h1HUSEREwoXj
99Lau/2+L3cctWkmre/U6dbCrUJx+9esOM4lxm0AgWGdwsmiTdhQhm1GO9efcz3nod2wuyLOoRFB
PRHCoU9xUQeiUOHk4A7KAbqWNnKmpYJRUFtQ3lyKzD1zt5ChuiYS+1trXUf0emVBc0RXJeOJM+oy
pdYUCtO7HboKltA1VXkzyJrTAnuRxZ1FiBt3NN7AswsisLqFyQAuddvPGzztWsE/T1mimJzTQK+f
f/Lv/B2HA5evVFXQh51vSrY2ub6y7UStyV1sLz4hRJqfnfYYtn4qKe+hiDORa9CUQSPNnR1nNwVS
OkQkOe7FGwVo2tF2pgxsVaObzuNgR5W00kvbG+HZrYc/VlQXu17CoYAXyKuimeuQUX6IOYQfOtOi
P/656J+ayneD3DdaM4CAxyapYpzyxTtzYw3d3BmLALR36ZccU/VhfYiHYcCtxg9XbjQuCmn0V9tm
VhQXJGWmHnrfgcSUohqw+023UH3zssHKe3HoXWtNxZuFWTm8uBN+FQJWwZg5o1SnFllNmOyhtpJN
XO8SRcSR9ghUC2PkIXtJSv9s4l9Gp1a1m77LFh4HZa3el3/C2W/EGR0B7R2Pzy8Y8kQnfhLd33aj
x06UIZTX/x5oFzGlrD7CuvF5JKo9vOIxzToHh5kdoOD6zjUKUGJYQquc/mE0DMReySwBHVcUIpLT
P0tPzMBnO/rCSMnc9ks+pckz6Kip2rnVsPX+HfAom3uAkz3m42JwY6b/bHCDef0RK/3WUac0dSKM
kEYtrhwBrDcHu2UrE9D4N3TPQpPhltMcgA3rCnJNzhStxgWfSGcSOX489GY3JX51jrPQ4KLwg3Te
uHo9coFgA7zxBD435Ek9ZfJZAcIO0Zt7s2uZwvFyTVmPWSIEW6daOf4f0gxbKYxTM8WdybNJXju9
AuBEu/AVDZ4+JGpSkGoI5khnH625YEMjmDdM7yC1jJKKFINwCI4JiWEAl64hmuHGoqBCRVIgMBYp
hCwZyPZsI1RVFT2dRHGrlaHOioCJ4s9qfl+jXm7NnHKSvxNcZuT+Ubv1PiLUCoGFG+sBAEE7OLIx
156yyQxHYKvnmGVKdSv1JDcqFOBTX70OTB59UidJY5m6HfaEtJa2TRtYd9dfiLW4T+bJCNByHVNJ
BP5PQ906S6hbtLHGTio7Jc/IK25r925Vil9Q71uHrIoeIOuJxTU2THyuDb8th3jMJAWZ28arIcD1
7zvWma3Osergrj5anOk44hmyfHWNmtZzWfjZ8g2mz5sCZf2xhx1wqFFUm2rP++JnqWZWqJpie9P/
FaUflE91AeT0nPFGzJobKS7vxP3YCIxqDXb4W+GNrbrMzqJv62IjXU/5VT55UrYBObNBKr5pNuPp
nl5/A4Sckp8yUP4cXgns9z450Dg8dC2rJeiALt5KoIAI0mqVyz6dmncs3964qm5zvqkhfspebtxv
+/5/HLRk1pKJC/0BEIG3U8PblJ4S3qWAR1ocDE72mQpK1S8J2OpVtmNPWqj+Q8XxAKeFhxNgDseh
3Ys+1h4JfwdhkuL1WuvUWRmr43qJQgrAU1dsla9XqNHMblQy5XDeZddFiARAWW3wQ5mQedn8mA5U
VcD6AFj0+myr/qmfSW0WZomoAlWRHZR8ww60cUN+wUjqZnXcQrMta/v0wrgmsv3Gm8XyHnb593L7
eG4J4D9wit4Xzo8ICB6DhsQ+QOfSpMQ+Uks7P55CB0dzcg3FIehDZWZfWj4jNvAY1gUscTVyYm20
ltt13qwaUWOMqO2BXOxzc3jQ7Wi51nA9iG29RjBhvOs8SIEWaroBNDKCGcQ3HvQk5wLRSMiGq6If
A/12iSm/sYD052pbIGYML2/C6RhJW3M52SyyIXliJtXn3B/si0AgHYfzqT0vXPlxQANLqtU76Uyl
JwP32T30MRjAm6qMdCDKPfadIidlWtpiNS/lxnet2Fgcu2RTx9pSlm5DVmFbm0VH38okdGyJDSIF
p+FEprQ9eDPqoUzNbjd4QlY9bph/Q/CVR7m8dBAbCFdT7pbH6Wdwk7LdzgRhdtDP9jIsKTNNte1q
GMvooCehfU4GiCw5Aa6s4ZZbQSVYuhRYgOHzovGzq1+5wOo7N2JA8vlRYSwwjVyUb2rqq7iWsbg+
JuJapgIlHZCoOngniStpVBvML3CdjisUnPZs7sdb7aLtZRCI8TsyQed5VNTTOv4NXqNYWssW/xWq
6f3VNQFk/gh7GyMyJ3d38QobBhLCLY4hmDK8JEZCWxIL9DN0kaLLviNG2wWKwZL2cD0vxQK+D5M6
PEIAaggXEQmwA138Km55S7ojd/DGbrMb9D+Sj/6WEvXGOXlRpGpFQu+ha0Zx9dB76EhCiH5bYq8w
bqILWA9l62keHeCH4BpTHJg8hCuBw91g8KmUfdeZqhZBGmg+jggKMotw4SoSSGVLhK21Ezgu6kSH
xJ58XYzSKRTRJwiPKrAW/4WoTYupBxtoBdz+SqQ84ip6iqZT0q/H92SSDYacziEwJ3uB05PxUTio
eQqXesLnKDT7FS0PXWpbQ6ZqpzZuwWNroQXXNu1J8npgWoFeQMl5AlAUYOaByxJ9IkIGyYOKvYWA
OgomT6uFDSlbXupq1moQTu5MMxn/ZMWnYIjBUqki5h/yxrMoUH85oCigWxdSG6HkE/Dlp5CORbr6
gSgkUnNa61GlwM8WyTdTAlnPRGGVdb1X4S8CEW5ZGHUyn/oCYY1HKlwtLQyyQeVplakXQCvrJ6kQ
Bg4uyIJgb9c+RoZytzND3ph+muOAgedD8oFvvTx3sNPkT//7bqD5QROXfB/CNgx/tsm0OEgPUtyx
ftKJXDzA7GJhHQNybc4wtemLWBnKgjvyPxxbdEyRdD4wobPkbKzOOTeAMstEFoqr0Y8H7QhkUQam
2jDhUkqJ284W1O4H/XuuB/Vl/qvyU9hoJQcPCgaBGFdq4QRDbpDlmpqlxXrXaHZlgWffJAnQn8Fv
sk4H4Ea0/WjIO8ifNl6SfybYK/5oIAIgUi2Nk8KE1m8gnJUPMXSYWsAeYkR6ybc3C9yJj6NzwSUW
CqJJugNELmiv6J9VPA9PaGQ64c+3pm+cpyDNDHQ1vY1qvj3nEgqx5n0Y39nCsQImiPV/Sg9yh2Bk
HQ4ZMwhLI+nFwK0OZ/zkh4odiDsOBE3M+kMnlZ5BJmXK2t+A59T7AvwpyVEVogCrqtbogq7EyP2R
/KoZIKfyE5vXtjndlUyZjAiNgpjTc1VakSJb07v4Jnou0T2uuBBVLBE8e5fRknL4orW7nwiNGR3A
FjSKy2+CMPD486jawdbxAbwfChXyeCLhOttQScZ5/UuJXKibAEIiWMO0zwi6h0787UrxLIJuioc4
nULkOdY/JKeviefRwjlnZY4q5i8h1F/oMT/HYeWGqrroYovXKcnUxbMWZD+jaopXwpKIKwV/u7gL
ICCVqIDSf8Gom4lbOw1ZcRZKLSyvneRHTfAaqVZivhe1m/wTbLuvizyo5v0fH7nNqAzAgtH7oirl
O09aUTNKpDm720Ay5sPItAEz0pFiZQIRDfWGCHCuuGaXZG0xuyl8ShQxJz/9BEeMVCPhZnOaNv8X
bNe0t7omyZMkSFNPR4U3evzcLjcuK7VEZZdMkX6tka5B3C4bRACtFyOeQCt79Xrriwjp3eDw8Yxl
i4ZnF2nnIzXhArnO3TFIuhZXD15yn9vVT16wMxV0rkzQ2P+1+g1u7aeDNwRT2xaUvdsFLGr61RsA
krrBB/uXlnDPWrMSIoSOLSTC16X9VfDFq7XtK2uA0BmKK5FJeWOI1ArralXwFlj8KdxJ0L25ro4p
IZhykME1I9BoKS3TjfbTDmfX1WVooDH5YBhsp3fnJjyZm0vZ9V7nsz7eC/en9E7r62uh+MrQsnxQ
HEOfnD5I5vsCo4FmTwA6lhGbUO5+59ZQ6busQ3Da/4/gKfWPi7Rx+7Y3AL2HiXlvnKxN32bezNjp
dYjFYXVPdjaFpz0GrP3APSdp3La8UFzXbVhLuwuv0mDPBPScpRdDo2G0X7gso054AFVY6n9p8tdd
5zYfJhmIvj/NqUn/wjbA1Ptn5IjIafceDKqCWE+o9brGUJBbmYQvsYtD4pa83lH8uoKqIULDiSXg
6yxJwmM59viy5qkaOJYrzsWg3wlO+PCkAvqg5HpLKFZUsQIYlmnRFiU2siCw5xh8Lv91KTWQE26H
JygYAC9Di3Fuj9L52dCNMgbtOCerVWI4RqUpIFnC+F3fY0d0urDChvfCB4v5ZfmHK7UQWuUl5DRA
Ncjw2/e3pwmVbyls0YUVrzdizPbhlKDJX7xzvC4K10nrAjnG++RxySdAOFZXubgPzTr62JQtSXmW
IIqO1vKeYP7Zb22j7YH/bXfT/F5cufY3ai23D7tEwC0XTRPsjTnkyjrFZDKy7H4jtCHGqFDihiKn
lzcjRj0nxDEydN0T3XZVLw1ckchidFI80LIRUz5/80zPxLB32RudBu90cckCuB1n8lnmLPij/zE+
aucm3Kwj0LLI/ESxyT4RR0eJrEyPbq9hWnKrwAbHzhPaF+fffQmkrsUci95u/+x5LJP6G4/zY5ZU
42fBuiz8uxbweZF5KyivG516l+EjFp1oi1B96wKupMTLWNO5UC4Axpffk4EKZEEns0gYRwpJIJRE
k8wuG63EMGWNSCTG/RO5z9NxoZktD7g60co/R42CBfts1WLyi+ow7jHsNlPv2xDWQd26f9hJIG0e
TVk9W8+8PqEnJMnsgKAfDu8qnlNGOsOHkqE+0aqrtum7PjdweTcx62yaHJffKPA9+xi5XkwSw90Q
gvLoWjJpXh3ptwi4hIt+bp5SLcz1MgCE3s+B9GMkZp6eji4CZRJ4Y8HsDzXziQLOBcJQbavNtaQc
TKFoacbgnSmdbaLo6XIalSOZIEQbh87hhxV6K+UWL1flpVWVAsJlAajEXmi7Y1H97PKK4PzSN+fr
yJifROBUNzCVFwmnra+Zipb4E5Lcxyic9aLP4yppTbb/i3T4qOrnXLKwuSrhJXSCcTyIRNfCOFlv
XN7teOJs72V0dh9L2Cz+VbtkRX0l6NYasCjX5gO0C9MmgYx+KYUX4dFrpHbbUVI/aeFPSRXeqpDp
Bj9ql3XKb0y+qM3C+ISe74cIUmyZPAsxtspP4l5ZqJ+0B83nubj14d/NJVghYmn7MX91fvjVASmN
lHcGwVvjoBHip3wjmlEjH6SoXc9kZSi06Y86jAP1G1cetsxKKdscQvvIUgoMDbTIh6hwcJVeWzdL
FeU4QV/2aGp2kibI09y/XFAZ2mNG6KrztPsjXWq3ds8FwxjebgVCba+YBkr11MEoN8SQGoQunHoR
wD0amqgzGzavEsdYCJ8t2cCLE6pF55bmrf4hm3BUaEi+H93IC5sJ2FrXcBTJB34BRd3BWFA4sQn8
EHoI6sWL/HNvZS+gmk9tJxOpZdOlBmBvL7QUxs9O7HcdiJgqyWSO2WiYWifPywrmOTezB/3RbwAO
kCUo352IbRcj3TrkIOubd3/438v4D7Ft3DhuapnoCgB3AiCh5BOxLotQ9OLv93+EDKzj/zShPRlD
D59DjxgDs4Iu+g15WT/OKtcR3zlU4vfTWVU8Pr0Rrd9q336s3AfGKPsXXriQ6NZ9n9r5uEGts4dA
CYsfvUEE6TTkT7HDGNd88HhGc9mYTrvIYqnxNJ2Dfxdy3D6py5NGKwO6Z/oHkj6jB0bWGX/iwhbN
OZ8Kc2Y/JJdWFNMlOGHs+2mgWXt6E5z02EvayLNFqqXbzAWxSJ4gVWUkRW1w4X6kYXnUfn/uK9T8
fyhoOAFAK7KnWzDARKpQjPRv4cyZKWEU8ND2VGBYHHhelKiwkDMuKr8qCOHoiTY9LsSSTJ0y3Om5
zPbN4R4hd7Ki1teS5VRo9DgtjemIkmKBmt9AVyH8O7supJ4F7fWQI9zIGnoUPi2/DYYul6u+5iWT
Nnlokkjfdc4WCCICsJu4zYJ/8oFwpYBTtAunbPpcyXF/jj8BGbtrurRFhOc9OHpTS5riE7CjTD41
SMNvyBkzXhdBL7s9fFTUr2SwP/m/pdiYt1Y8+cPm/1EIyP5d5UbuPMKsZl3LDwWXCMnKi/h3PD2z
CGJbKmdAx1uch5biRyNx6w3CCPCangeKeYwHKLHU3QjsWtCBfoAkwR+YArHSuJu8Xvtd34qhtsiL
s3yC9fez7iMXGfqasfXLzwl/T1pnQLZ2q5XYcSmbjHxP/9A27xwKycajveYOqzAvM3CRfiZE8eY6
nI0NQlJ53WwU2oTg26Z6QRQe3XHyzBwou5E1nBjHU2cxdKlVp9DtJEqKHiY19jXJ15FW+qthh9G3
7MbDqD0hJC4kwh8UFZkjzWYM6JzvLGwdsQBfme8bOryRIVZ67tt4bFVVLM9FXD4pW0GJ6ORp8Tdi
4nJ6S3aD+mYkO9ofUAzhp1lc820p3nSEDgqvhWKK+V8arvQArAOVqlMsfcrxjTAftF+gupUsk4Uu
x+TuA+NA2OPMbOvrKHF/9q/bRDZFWAK1pqkR/ayn+Hr9aqdjxKLKLgWR5GJILTb6RvYPQ7C4/P9u
ORGmHF3yzCa8y0jOFH93CrTEfxSjBF0EiTlKkF8k/2JU0TKPm5zvg6slp2L/EEy0ydkfd2uVivJM
qWFaC71OR8sCvnHywV9Rqc/3Z5M2hIVDYOyota7W0D+EpXlGCDVDQTpNeGWmOLMqNfWr9mWdkNpv
GYuGydcdMKsPCIlXc1LGOaspNv21aHliav8RjakyVwcswmUhf4ZBHyByl3pyxgpm9fvfdXUC4KzO
tu4VTi7sGKg3DdJhVLw6k/2u2icZUQJBG06UWsOYro6lLEAa68zHBoXCTBDX1LdBbB0EpvjZGyiV
uRE+GXFmHrA/q8FCObD20V/4gXKXk96VrBgMlOCPfO4TJLu2BNdhasrxouG2R9Tf4ha3DpYB5Wuc
u0SGgldtDs6NlsmbqCFk10eYfWxWmYr7FmwhHlxzl9F8T97rG2QylnqUtYMDx5M9tA9+oLYxWA8y
A61+YQeWWM79SjgKWslaAG554is4whtWWKHUsHr1n7NYjd26Xge/QVwVvSQh2RwbfymuNEN/70nO
f5l1YSAhk1y/G3FFQ3eccWGONkdgA9dS9HZQR7SD++bYaL7Y31aVlOxtswK1jcHpFCTFWeChLhpk
DhoqBem38sM9At8UHDlWF7FnNAdhktmFUDxRIqNrYrFlhR5Ay5crXOKjDrTyb8zQYmAalRw+P3dt
9fkWxL2T6HAMYBjUAvwxPOx3FXGcW7dkxacjYVhZ47bVwupVqkgXiYkIDfmm9tjzFNPCQnIDtgPR
22s3BLR4rzfdd1W6ClCfGZ33+Lcvtdd9Ki+ToBL4StuX9+m9nY0eq/rislQWncvUWRVJfHsBK+JW
b3dfPRlF4ThV5RejfaAqeMycTNOLFrA8X+xl3fZkznaeVNrgkR4kwoDX2c2Y4oUWRxg5an9f6XME
h5UtbZe1NWmkPyew4JFdfnNc+OItFmUqcl4XQxzLtu/yeQzsZyPgKfKbrZliJk7r5SqcKVjI+1/u
BssgQeOwTpFRPsa2skTlRCvfxpFwBXYQOkncuApZXm3H9ImD8i99TkdhAZ8NWgiMGx7rV2J3CCI5
HsIp3c31R1wqeIc8490LHA9lTaqll7qbFAsnlPCl3H4sik7s8zflMICkU+efqDw7eZ8f6rqVVVmh
MVUYBnN97fby00WKxxnfX/5ZjKDrN6aiFvfS8tCxuEgaYRk9kmkIXugVN6NzveA3HqSOhYMhKGKe
JFqOwIO7XaEuFPVFmRdwDreq6VIIsQvspti8FGzLp515iW3yBgfqUPz9yQyIEyzKSjfIuGcnc+Nl
53FjdgfO8sHjhl27ZrqtLlZXmHNt1QTIbla6eWi4A+ANmMq1Y82B1nJa/3DKWjO8O8ikeS55lE9/
rBW33a5rSwc91N8sK9MH9ltCWqCHzi9hh4nLPXYs0p63Ba1BX2BTEdHAMiV/ok7Gk3mE/xrbysXB
OsHxm/PTXLq1Oruj9e0Flq22LadcL1O/ORC4JSBOiiuM9gr4TqV/gDQtqKIIrYkM54hiOOsqqolt
2A0D6WDStP4Izq+kNwgo0WAOXA+JYOGHTHHRtkjSjMynoG6G7DtSNojNuPwXQEGyf2gtzfNWlyT2
XjOd44j92KD+xypnrDyiuuF5/HDY/EZqe/gEX7eB0n+d8POCNdlF0wY1m7sTcWRKbBWi+C4uj5nC
B0jFvqs+NEuIq0GN2tFo+Ec5OXuEP6EMYQGl1ODp7STVcqPqpma0n1YREle+zk8moNQW89cr0XwL
fAAaYcVNtR8pt2SOPnBu1ud25wfn1rf7gqp26RjKDz3HUT95C5RC584NThsfxQKdq5N1R+TRBfbA
LnMrcp9/gs2ZbcUq1Csl0IU5KbrWEzyG2Jkhrv1u0ZtToppSSSL0i8x5a5XjjkFQH6v5b2FdX7IJ
vboF3oVcuM4hjOKvru6TxveJKkRXAKn3T85gpZ6tqn9lWwIB3/VBbRBTulbAycK2aXgR41wbOmXg
QNMq39AVJRBU+wOnxXZr7+37NKgMNnKWvvc09ArGGJLv+Z8L4TP45esWft8psoczuZxBQjOBePHz
HnfM9/zkXAix763TqxsfjxCJJO/wC44vt7vQdUsZyVRYVoOgvnWad7bYV0tAORl3NjzUYDu/7Obu
WqBkovNas0ezzlTAzKuzlo5uxBonTn05kRcFsil3TfNLmAyO1pvn7UxNpbytHH9aAgi8kx5iyHjI
icVFxq6wt3jZ68/S36AKm2Naq1kZva+2TmU9hiSPQVVKpE2EnC2j51C+g2m9/apvF9lg1PQG/Omn
0IjWfrKAvR5i1MY4FRtksBpFRmm6vTYYcgXQohY4UYylbtw4v0ehzx2zWObmMXQkKwMRPi4tmoh+
q3pjDIws47VK8TWzDXuBY0GVQ0cty4xAUtzKd+NMYMqlzZxnAFEpu6jhaQq6w1LzfqWZnbl+1Ext
1NJJzOnKdPXbHlTD1DVoKPiK/9lF6jsvBmrphNXTr5s5JCLeqR0pENXQjtbZJZg8NpqEJzpiEEPC
MgiDFdPFY617TuVFl7NyyUehhnBo58hv4nU58I05y3YgWZ9eB7j2Pa2tlFhqo2b0bV3Wu38WzmBg
wJMu3+aKl2WkH9KRNkmt3gjDQSDG05gGaXl/6YKShvF8dfZ1sKiXXldXHqPH3Mk9TovBoyQdLGFK
HW4NxnjJDBIar/Qq9w8/gIlFAfiM1EG3D7XH7YhK+8OVXS0edGuuj2qsHaOAdp4HX4qWum5KqRvF
vYpmT1YLBHzUJ+tE/5oZUkk9cVP1/KO44APxW6dKTmbGj5HlMhR/DdeK+cRGlMAjFo9BcDdL2k+j
OaREG08x4yWQ/7Z94F/jlNUQeZiO+ccDNPVjmqNk+k3t5xtANrk8PesyWIs6/kziY/mEC9ozlx4a
J23X7ajw1HBSchZGBr0STwWoLZSz8yY3wfaqmO6j3ofzFeT778MV5efqiZKdOJqNjvQjOqEBpS1O
gRPjdQN14G+vee50c7cOmWF8rpUErCEJbtRotTUsZ1zewOs6b1ALGrpT8dZ7zi/2SWKsmn+AvAKN
4PzVI+0fJEqfYc9vuaTwPNb6o6rFvfbpGw5MOBCYUZ9XqywtiyzSlRNbECgj59v3X8GN2OOZmElV
V87n29XnqTND0Rb3EprztQeoMLMHFSKVPMkPzbdyOPMsDU2rr+tkD/sHPQpIDze3cIoQiT9PRrQF
35sD0nRiWngPOc4VxIJE9h2ITen07Rn1PQy31vcOVn0HCYBHpZa2fiJ4lU1YRVzyVZfuGDldE0tA
skEDnkOA3QtsbofmeNZIG8H5jD4vdXW+tk1Gb7facgTCLt2aL5K/zXEQ348EZTSFTgIxNeSi0JJS
6jGYW4/Ye3FLPeUuy+ZrFF8+ZAy8lp5WaiFO6xYQrRrR2K1Qu6faPBUD+RQSF9rtKHwSwLZyFOYW
A+VYQUUyNadoSx8tx9Ll4d9XBdOoDxHEgHd4nQ+N/GnZpOlxmoTK2U4z2TRFQdUJpFLAje2x7Zhy
/tyEc0VZ721GQ7VdIjevzlyYrZla2Mol3eELzY1wJrFGa/22gh5HN6pPvoMAUg/qLk46b5E6CrIE
VLetU/uLZZf1MMviF+iyKXWtJol1MUbHOVUGFrUb64eYirmuP5WylzxyRZs9lL7y1Uj9xeBJW13F
CnSMn9Z9szQVCtYNzdvgJN0h9C2zF60bGErQO9IVjG6ZajTfZttjNP3gB/dUunKBtjPwd6CSQDF5
9MRc9x2CAQkWj9oiFFZLLykegY2erht7tHrduDP6OUvsxynJNUOlhJb74k4Zha5aTl7appcs527a
IpIy+01oKZ7bpLDDvRDpT8aooRVVg/63KQWJpg/ZjfE+i2dpeaOlVHUcXr3WFkQuT62enDNFs6kr
m7TpDBlr4U3x0IRGnE2zburjcZJ5w/MLyt9d+Pc=
`protect end_protected
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
iisr0ydwFOm3eepmhOYSaxO3flYpViRsLN97vKyw+ai+x1TubmaH8qRRwK/QFeVsjlGTFdxookcr
olQwv0bmdw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
dJvTzz+PoD3n2Ot9SgKfpEhIshJxklhDhS1tYcrcmprfs5wN+lN+5Y+o9jEEql61IqDkJEIGu0xp
zaDWEeMqwkFuovmZnp/AnbrHb7R/19zPRtwSyZ8+VQRLsRMgscwutXu29fTUST6Ribitutae85tQ
1okc5mYK0mcSMIggcMg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
ZijKIWnBSOuwn6R4ZrzJp1qaSPGZMrP8GTp+SV+Sn9xEivGxLJtGM40xMLXxiYuxIopDD/A1usG6
HkSoNT6OzxHJWKkUEyyVzrZuJdNHJ5q3s3y5LSNY7eMxN9lY4/gygh7aVIBAO9YWzsWu3HLtrHA5
2vsUFQxQdkG5OTLVP1rH68P4j/dhqr/LVHw+9H76c/knGyalpHLRC7tnHQcfuezFJWlkzaNGHfUo
b5cE1YTvtdlZVmw2sVG/GbXIRi5fq3+Okdy+JgckZ4dVWbI20rfa9LkI09/kwD3anyrnovVQVx9h
F0AxolVKVVyWNAaSu1fvXllqzrdJiRLbdnsq0Q==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
LUajPw/jRTLlmEKb+9YylQ2jxw4jlSx/1GGaY1wFfWFdMwK2p0xvQMjui8K3EqJF0fnb3QNWuQDl
1vTtf04vcOAHkfRCeW7Mbp8qeUTtAsflGIPJDxHfVU8ZKprwANsENc8LVrpJ0WnjDFQIzJw7LDqc
Jj2TofWjKprdxXsMnu4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
KG6kiSPrd66zvVpG96eKD+783ebVLVFNF7pXgq+rCyBBRoa0N9Hp3DIWK5125mkICodI82zuSq6k
C8aCiPbDiv4tiuIn19WDNNPL4ncknL0KLZTLAkq0BIQIsnFNRaZegM9aXOdMYGKYLpnjSD9KRWRt
WPXPZfwprSu2D7PeDZMiij3MY+cixttgVmNfcx9Kkmvg+1B5sTSDTVs3fqpJBBO1YslTmxyJAIC6
uDuGqvQ1138z6f4f+f8vMXratK1Ypo3jPPb4FTNLYJio5Vd1Nbpl9kRRtj801Ie0GGhbggK6IXJx
785o6wX6g3tRyoHXGJ4DGUmWlIHATg0KIAflYw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 13424)
`protect data_block
rEtV4Bm3SmvVbKq1runp2SaaO1GImraXNQnz2t97NClVhlTBGZ14v+hHArmsTHZNME/QWduIEcCL
I8GdWPb/f0NXI5m0D8vUM2MFHCnzTFi82f0pjwFGBVpM7cHKBa5QRX5K/e5A/9KwgbwYV1tKqTXG
aWyx6JRfuzQINO3rQqM+n/1b6LSLygDM1QuiPthpMFKV8IfsVkaLDVqcLxH9/n7C64aisv1xK+OH
WhYRETSZok8+gbvdGdr2+VsE64ALl3DavNBK4S7IOGP5YtXviHmw+Qb/lvl6m+RggRYmTe1A6B5r
pghgGDxK2gS0ItU55quFmZMEuEH+bwLuaJA0/UWR19oWnbcTZnsCqEeN/xbKUzS6blm1K6RPZtYe
WSGhjFl0cKHEQe9DfEazTm6tS9mJ55lLbSuwE5o03LDGRapxUdSR0IiKy5C5UP4genzVw3zearva
qPWmPeGZcAEyFioI2o4OWQP+8mFdbza1kBOuw4BP76P2c+ij6wbxXAWVxtNmL8f6AgS1AV5SqIO0
ftTCve0JloVh9kpHsbXE1TS45+y0IuiC0N3a8PAEsXa/tnLsnAydpsXIQwMLXmgKfoXKzabAHHdI
XZJd/NxD7+xY3aINMVaO5eSSLIdjkYZIeqm6qf+x2eNd9v2nue3I9rjHkjMBIty9wqDCI5HznV19
h0aPmdRn9t7Ft5xXq0GXqSl2I9ZROoM4hg3RU6TCVY4IaDkErgP5cMhIwuHsntmeWvsvkZFygQtU
9TUaf90O9HINFkrdIHf0ZCgtCgUw6ffQNPAkw/6MaoKxm9wdczGi3ur+eyRvSLy7+LQX/dOqvXKM
9UFNjkQk392HWfkT8aaXacuJgFT4hmoEXDGY+tSqQrQRrPmelj+ksf3PcI2r64RSTjiR+9HNqWqJ
jPJio2xgGdQdGrH+UewLz0ySmNDYmqxIdyqKfv/B1BYMUpGd+l0eRCp0RwjP6nt7MKkBishuJTL2
2kpCGDQ4HELrlovnj0dMihRpFZAIpY55DfNVE2hnbkHthyDrEXapmovyPqDFel+HKDdimVyeM8CR
DKl0D2+OZK8XWAiVk9Ve6w0rONvwf/XvaAkgxa3rDJQo/8g8oiGRq4ku5l3OZUKrPVRcjVNCxHRq
81RLF34Ztt0FyGvWgFBPXPwl/QfIQcetnIv8BBHDyYvjjUEJZxJ0yVIBqSipzmyIn34Kt0GvhgJJ
oXsivJz4IQp2WiLYnKzv7NuBWYnOF+M/H8eFTLS7ynV/b0CRf7qayeeaKYL0uv9mUeXbILs7F9+8
XkemV9ihHFfHS04009LEbIzG2O13pEZ78n4YAi47TmCv22T8/Ve6sSAGowqE6FfeksCmQ1+Z98YQ
uXIyCDvF0dlGJwZxogjNRbjyCBj6OOagNPhSW71GcVdRv5XSPoZsF68V4hWQeNb+itDo7ZPtZJoJ
YzLjFDCWp+2G5a8+OtWGetlJNejx9rEDOQvPXNhCi9xzzzSvIevRpnt9XX8uVwzzSJnKhI91LgRg
ID2cjEMis7S70eKGvR2/KBOhU/KAbsgGALtSpbd8HPFqo4CWuxEHCYImqvt7m+vI7jIEpXbwjtx8
QWNgKL8RNSViXrcj5CsXvOI28Nk2V+GZ8jr1/8I4R/Yns4Xfj1TTWzVeNCNHbazn1nufigCGV4Vl
qtDHRGZpM2GzgWRsMj5tsZldV3pp52C/Dpr/92KUqWKMf/mZbYDJL1X0X2Tw7iboFgBgx1miq+ht
zrLMfkmBPAPakC7uTHv8wdz7HICGyvCct17zvGp/b+9c5KI7lCBCd9jn5PTW35q5ksO4eC9R2AqE
0xJmD9GKB17q8Jk7vlAMs/IJV9rgMDnRfyFkOl4hl2S45SaIY1ObTSNIHJYg+rp/nN6BMaWKrR+7
O6t2IjDTrKFkfrU0cMF3G7EiQSf6RI1d8iyqNJLJJ3fbFhF7XLnn/CwlkZ/03Hwn1nJocabXwbc2
9Q6RrzrxLCWMZVoXaUEBQvapxENHsyZOrmSevUQnuCknCx9Eh/GwdP2bYVHxXWg7ySdjQnVMtR4v
qT7n0yJuHI0ite3a92Oo/MBdlgCwEcxfvgz0ILRIK4wFe098lGOX0tVEsLdEUijEAeQR38bksd9a
fuwZzPBvMZQ+FON4CQYrDg971r8Qz89ArQjVxWF7TdD0Oaq9vaUrLocNzIw9AcIy8rWaQnwTR/K0
PsXLapKx1fOSZnuztuMHoRXGaqZVlZJGs22/GiJA9y/IBflmF5GNFnRUbXVT8r+FfMb7zIr8eP+b
OcPNp6F4kqt/b8gae/9JOIopCuWXpu5kDe0U5aC2qmvMuYbNI88aUx34i3WHd8NWKNbdtGDaQ8nM
iyuSX4j7EgwTOuBR/iFM7rZAATM59ZFv+9wRq8hbXVvfsBp13upya8YovLN1O9OWrzxUWym9ZPN1
mDhMT1YgOqVRaJ2ADyjP98UghsOXt6ybu9jGeEndP5T4mZjxZp82OMxqqS6VolaMbGRNPa271n87
65g6Q9l7RYtOL1PjdBOlgNpUdYZwxJ2EGgI1wPnrnuUiZ7sdhpuFkhJDdh2mHYlIUZHAsriLKEHR
XOdtU+Desuf1ojV6OryxMP052nRo3DfSj5+dKgSFWVXGLiS4Q5dQxDHIvUugnqZqf+FK5inrMME5
1eHWMPkrqY3H9syJMZ7RM9SwYc/zjL9fOqr9mE+npGx50NODLrgb0FydLIXRotOtI+YSbZHKzsKt
xoZNcJJ4GasWF69GNvRenQ3kp1eh71xjJw5a0KZmhsJJXThZLqSzb/sTisTU8jCaMh6S6ag0knK7
jonbXo+dctsmQfLpvLXHN4TNqJnY6alIH0HnsTz7EklgiqvaLbFn+25uUJSNDHESZG2BaAtNvG/4
WuvQCSLWeuJpsrPd+06Bzmmnlvn9InJZhGDVhnZlfj7Kh2PolkMjpLgzqH4f9hm/7zH7o7msjyvZ
Rj/JnTghr2ou7m5Ayp5K+yFEUt/y9WWmqXlKOpf12P8RITbx8ILm1kWRqB8L+xfF1r2HXt+av43O
pyKFj4Kq1FZckfpg2It+beWX2P825O6hDubEjA2RyF/zyyc3lMSS7vtAQMEOEJnWNslP5r0po6TK
F5+Ikch7kOxVShNh4LWWzwFtJb9SBv0iFIezeCGrgApE2blMwedVwOdpPdPvsQjNRYc8YG+dStcY
JUIrNMdc6m5qSEWO36XNGXLN/ZrjKkZcCr+z5oN8Oa4cO8jxqZo5bZDRVUh4VXM8a+hHCiVvWsEG
HkxV52NFazh7Duhb2Ix5qYigebEWfDnA3frHeY+lRAIE3+X/YoDjgbPuOqgwawkAvhSCeNbNxuTS
T9ZzmE8PWRbDowhElwhdboesSdX9tyyp7yCSM6fxKFXbUrPplwsSNsMYsJJ9grw0leD0bx4Cd0Vy
Y8dDayiLLROqmsdsKe7b4i2o6u8A0RQrPB31DrVO/yPiNygxChVesembc822gDnOAlf6FO502nEU
ItbE4EyM6ZuRk+69RSoT+2AZGRndh55WMQYb6i7ALzZeSttxOh6V+LV5SNYYdeQouPNdd+N45DZn
niJzd/11g0AFDHSZFxMK9p0VsOmXbAPFEjcTvMS7PiMwhUsav6ZfZjkVwz4X9s1v8DCZpNbKSq88
kGJQIcZYRdAPuD7V1zvdo0Zf6leEwpYg5lACMpJ8rGWyLPBrYD/CsWB0THjSjjkRntpZXUTF5Sq1
IPSYaQtCSAHZKO95giPeqw3zw2XQ5ci2o+t0eS1YvmSPlvMfZRnkdx98t2mA8ABd64gljY5f+0O0
px5Pec1R5VTiPNgghdEJlgrPqQxSP7vDXo0dtJmtqeP90QCRgaOqEt27wpqzv0KFUth0XwtaJeQ5
dejR/hEOliBmBscgJkx0gBF/nLybnTcQ6xwwOe25uqhvJIiepSDJE4ICrD/MSurrVfozreQGinSL
a/tMurSZF67eavaP5tFe2G44AmkmV4WBRnOeWOW2dJ2Q1sYHMUzfnWjdSw1sJJu6+Y0fUowVqq0Q
K2lcfV1v+sdb0adNWmXRoPrjCpXnMpWUyUXWCaY8r49ipi+4TCdxE4p/IUZfO1aumt4+xQcBT0dh
t1WR18HGPmHp719a+JPxfWkOQjw5JnEukkqxKV6fqJPDzGrHDJvrkNy1tkX0MN6Z+Olw//0xoyyG
9SEwAH72HyUlbfM2lhwM9N6f4cr+CLxPF2At8ppy84kKN/H+2RDt520oTXKCcGFU/txd8LdCs9qG
3diwadeKrfsinlzq/W+3PUAPHvjHcwRyRb4m4Wv6J0kW7ItY1ox7z91NbPGA481MOKLtCEwm6vuk
sfLsMi7+T/Hm+qsOXlQ9i8Pf9VAE9LWS2byZEwPIYDYtbLm2L09NRsMgfm6PotDA/9WaPtrx/CrM
IMllkwsRz86jBnsfx1s6w2v/gxQFWv0fY8mf1WywsWC+WArpCmvfHO0WMIJtyS/B+XcdiLdfrrJ3
qeRMJy8lhDn9mvRTVYzLXtu6Fv98eAxRiP4hPmT4+kxhTz4CT4cDPP9YKhdzODoL28xWfAYFbD04
Z7nP2BAp3o1FR08u/ctwg8oxDjcRwHkmDHquzKrPjnQBKXv9IMSCNsR7asFA/JqdhHcmuKZg6PRk
6XzKLzz1/Zs3XVZ/rpAcA4yoz12/yPHmsazO+a6cgbZy7JTSwRBhRd31L/KB4M7WXzNJ4paZAsOI
O5FWmQpp6eEyGGXpKkGy2qdqVRuRe0IjzwDJG6clerafsgCAj755Q2eTRVVvvRQw+G+hVjqaFu/+
m9KSJt+0hjHW1BHC4wyHN94ORPERUFukKcxOq8a3C4r5hTOZW3XWq1v7Ks4H7Zwi4AlNCGUKQ0ON
VSZKVFl61F+tBDQk+IqFz1WMfzhOfRJYfalfeqp5HOOIaK9cOhXG2oYdhceL4LDJlhJPAqpAc23Z
G9mCLMh7l3PvdGUWIx2s5Z4EpUsaxWTxxqD4a+cGuaZLzeV55zSCZ5qehwrwRTYvoBZE1+lOXnfi
Ryt8wko4y/GJZL/NuHI8l8tJKmVjS+XqWIN5sWUs9WMNit0HB/gZfmTuuvpwP7gjFuUjS2Q+jgYC
9ppF022c89tfs59OKVOjOQ9s2b2FlXyn4zn9AXI7AYGal0MNPRsQwnnaZJiTebyHcwtZucfEnh6z
9K9skBFs29qlMPNYsFP7y8mzdNhDng3TEgYpao3SPfXwDj/CSw/ObVggf8enRTUNlDfJ+17WwDyO
/ajc27MzTRLyBCCQhUYvMn80lvwSHxWDIL3xKvr2OLMoIAmgIZJG3sJMyhsOPqFxVb1Qk7NcojOn
D11t84xem8WyHJRbm0pbKV40U5U40scS0H5bcMWTEfGT4W0Mt47O181hbfymq/ykV0yIpouFyaDb
tUvUtKWqMknlkUxdllrfasNUWgJUfn8Cl8EV1Z3U5ABYiUNuRr5oKcdwlS7eB/n+UgV71hPGXiii
tFKvLiZLXS9l/eoEDDKLm6/8OksoHEEFzRFIR8skagCp4rd4fSGbOUietH2v8ecJdTlXFP0ex7TX
vh51q5DGduPDyv5nJCNInuPVn9Z9r55S/RGw+ySGAcaPEqaldHWakl5LrzE1/zI4K707/QMAGDAl
HQdn4RCGxESdD4HJn35p8o9hnYl7WqaHBddVyszwX//kjQ4qJolh4qp+txlSxnSJmCs83a+aCvMk
IbAnKPRH3SP74XCHOQ3bziFlRO0Q1JWSUp+e9CxVX0iTOPbgrB+wD9yT1o6m+o45pOEi4yqt1ZwB
6GRU83LP6o8j9UURxZDZ5WMgpNs4xuaPxAt+XstW7JOy51tYRnIykokiQYYg+aWP02kEZ7KL2cif
/t3AkMcRC0iKXbo3c1/h2uNlHbvkqXBOZnmGMzMriXwdE44Vt7izgW2oY3N5IFwqNHPtWi9SS6yA
hcD+oqiZ5YnDx8Be3R5HxKPygh4K5ePLmLR6um0pz3P8seQq1RKFP9ctf/u1v+7BlNqcdEez0X0N
I4X1lXx9dw1MpdfXfG2riDistMNSEH4Rrccb4Y/8cnRL9fh3mO987Fb0uI03HcxJiExzcwHZ9dco
s3vvxZTsaIGr2xmmD+LsMSI00fJFv0/mbMB3LLQfURbbNvuYtBK+fA8U8TOqSRvPYwXdCjv80svZ
ecFEkHhpXJBNTWSfUIzupFvHeVSIxo1FYZEy4sS3rdwokvKAiZK3rnzY+Ryed1c8On/UbN07w7X6
m6hS6lOKjYh+wxgHNswvu8N4sknoUX7Hwp9LBuU8+T0Ca/tOrCkICtK8kD5WkMmpO6IWAXUjK4Z8
/OmRAfzuhQeScqBIQTMuw2IkQruwSdfY/2ev76Y8v5xSi/gzcXVjJ6pNWe8NhZ5pL8vuon9u8D9v
ac2sfrz5UyHorqRAvNxS0nxaWXiYHYmk54FYhWXq/l06uTApLWRBji257/fX7WCJ6JtNeLLcAFYG
ui6Qlw2u4ilhoM33Ba9OQD+hKXM93Ab35owHIBR48oqnZlu/gRs9B7w/mQ9P7Aq6DwyYiEy7zN6P
zIrKF6PEXI2oo5vRRDZlhHjnxlG1qbQvhZImGO8R1X3muvsJ0Z9NyHew0PCSz7i9mW6rY2m1FJBl
jLOuJd9a+SClV8HYSGnNlxIsBxxS4kdb8pJAiZyO1GsyFurgT9epWWxp6MeSTru98ZQ2HxuKRPAh
LAyFLPqo+UCcwRFhd6SEMQhkLktq/u+ZRteg3JfitjOD93M8XsrOOZXAvc8OK94NqeYOeOIYfeiA
Bh8AZZCTK3Xt4QLtJ2oyW6gLSK/gyvC1P9wVOFLK0VxRCj7UL1ENqTGIylLsQV1EDrxvDeHgkr8n
+celZ0eo5oJZQc+yNrl6D8RLDaFfOndjQQuP1VMMLt/r+SCqzoIQpeaPzjqcZ5F2tDjq3vLL3JlK
L72Oet2zPrANXugoDIB6V4zLM77QJB3ICXMRSw3lLKHdoVR1fOZjH7lh6OFJTtre6FJuHv34LR+w
Sc62m9Wix3fNqnF2+9Qp1crzn4iR45vHd5J/GET/E8MKd44F0qOzeLFE7zgwf2+Iy6YZU0LJ7OWe
z0OlZFdrPEAemSaXyLI3Wg2c7W5Ef4UaJISjZfXU+aX/CFAP3KV58g4cgEfSs9fw8iuCFLuLh3Jh
GZg50idBZAseo6HiW0jDA4Nn9S03k0B9v1GqmSWPhP3YhzM/EK26PGYcgF0eivassZQFQSrc6Jil
NsS91pv/HNapigSr2eVnB1wDsPbMOeAWMefmfTJEy770FLL4nJvHH23BcLXTk4vQBAncc/ypOm8W
7K8vIx4OeBmtzlz+HHoN+Ki6SGNYfqwhxJ3Iclxi79j84bg6FlZ/sJmHW3B/BcC+MY8FKzU6WOYl
4ii86/wI6/Ymwxsc/fLpXuJgVnj1G6seQpKpHtSA/+fDWnvd7+23DNdK6HfBGZ+9h1HUSEREwoXj
99Lau/2+L3cctWkmre/U6dbCrUJx+9esOM4lxm0AgWGdwsmiTdhQhm1GO9efcz3nod2wuyLOoRFB
PRHCoU9xUQeiUOHk4A7KAbqWNnKmpYJRUFtQ3lyKzD1zt5ChuiYS+1trXUf0emVBc0RXJeOJM+oy
pdYUCtO7HboKltA1VXkzyJrTAnuRxZ1FiBt3NN7AswsisLqFyQAuddvPGzztWsE/T1mimJzTQK+f
f/Lv/B2HA5evVFXQh51vSrY2ub6y7UStyV1sLz4hRJqfnfYYtn4qKe+hiDORa9CUQSPNnR1nNwVS
OkQkOe7FGwVo2tF2pgxsVaObzuNgR5W00kvbG+HZrYc/VlQXu17CoYAXyKuimeuQUX6IOYQfOtOi
P/656J+ayneD3DdaM4CAxyapYpzyxTtzYw3d3BmLALR36ZccU/VhfYiHYcCtxg9XbjQuCmn0V9tm
VhQXJGWmHnrfgcSUohqw+023UH3zssHKe3HoXWtNxZuFWTm8uBN+FQJWwZg5o1SnFllNmOyhtpJN
XO8SRcSR9ghUC2PkIXtJSv9s4l9Gp1a1m77LFh4HZa3el3/C2W/EGR0B7R2Pzy8Y8kQnfhLd33aj
x06UIZTX/x5oFzGlrD7CuvF5JKo9vOIxzToHh5kdoOD6zjUKUGJYQquc/mE0DMReySwBHVcUIpLT
P0tPzMBnO/rCSMnc9ks+pckz6Kip2rnVsPX+HfAom3uAkz3m42JwY6b/bHCDef0RK/3WUac0dSKM
kEYtrhwBrDcHu2UrE9D4N3TPQpPhltMcgA3rCnJNzhStxgWfSGcSOX489GY3JX51jrPQ4KLwg3Te
uHo9coFgA7zxBD435Ek9ZfJZAcIO0Zt7s2uZwvFyTVmPWSIEW6daOf4f0gxbKYxTM8WdybNJXju9
AuBEu/AVDZ4+JGpSkGoI5khnH625YEMjmDdM7yC1jJKKFINwCI4JiWEAl64hmuHGoqBCRVIgMBYp
hCwZyPZsI1RVFT2dRHGrlaHOioCJ4s9qfl+jXm7NnHKSvxNcZuT+Ubv1PiLUCoGFG+sBAEE7OLIx
156yyQxHYKvnmGVKdSv1JDcqFOBTX70OTB59UidJY5m6HfaEtJa2TRtYd9dfiLW4T+bJCNByHVNJ
BP5PQ906S6hbtLHGTio7Jc/IK25r925Vil9Q71uHrIoeIOuJxTU2THyuDb8th3jMJAWZ28arIcD1
7zvWma3Osergrj5anOk44hmyfHWNmtZzWfjZ8g2mz5sCZf2xhx1wqFFUm2rP++JnqWZWqJpie9P/
FaUflE91AeT0nPFGzJobKS7vxP3YCIxqDXb4W+GNrbrMzqJv62IjXU/5VT55UrYBObNBKr5pNuPp
nl5/A4Sckp8yUP4cXgns9z450Dg8dC2rJeiALt5KoIAI0mqVyz6dmncs3964qm5zvqkhfspebtxv
+/5/HLRk1pKJC/0BEIG3U8PblJ4S3qWAR1ocDE72mQpK1S8J2OpVtmNPWqj+Q8XxAKeFhxNgDseh
3Ys+1h4JfwdhkuL1WuvUWRmr43qJQgrAU1dsla9XqNHMblQy5XDeZddFiARAWW3wQ5mQedn8mA5U
VcD6AFj0+myr/qmfSW0WZomoAlWRHZR8ww60cUN+wUjqZnXcQrMta/v0wrgmsv3Gm8XyHnb593L7
eG4J4D9wit4Xzo8ICB6DhsQ+QOfSpMQ+Uks7P55CB0dzcg3FIehDZWZfWj4jNvAY1gUscTVyYm20
ltt13qwaUWOMqO2BXOxzc3jQ7Wi51nA9iG29RjBhvOs8SIEWaroBNDKCGcQ3HvQk5wLRSMiGq6If
A/12iSm/sYD052pbIGYML2/C6RhJW3M52SyyIXliJtXn3B/si0AgHYfzqT0vXPlxQANLqtU76Uyl
JwP32T30MRjAm6qMdCDKPfadIidlWtpiNS/lxnet2Fgcu2RTx9pSlm5DVmFbm0VH38okdGyJDSIF
p+FEprQ9eDPqoUzNbjd4QlY9bph/Q/CVR7m8dBAbCFdT7pbH6Wdwk7LdzgRhdtDP9jIsKTNNte1q
GMvooCehfU4GiCw5Aa6s4ZZbQSVYuhRYgOHzovGzq1+5wOo7N2JA8vlRYSwwjVyUb2rqq7iWsbg+
JuJapgIlHZCoOngniStpVBvML3CdjisUnPZs7sdb7aLtZRCI8TsyQed5VNTTOv4NXqNYWssW/xWq
6f3VNQFk/gh7GyMyJ3d38QobBhLCLY4hmDK8JEZCWxIL9DN0kaLLviNG2wWKwZL2cD0vxQK+D5M6
PEIAaggXEQmwA138Km55S7ojd/DGbrMb9D+Sj/6WEvXGOXlRpGpFQu+ha0Zx9dB76EhCiH5bYq8w
bqILWA9l62keHeCH4BpTHJg8hCuBw91g8KmUfdeZqhZBGmg+jggKMotw4SoSSGVLhK21Ezgu6kSH
xJ58XYzSKRTRJwiPKrAW/4WoTYupBxtoBdz+SqQ84ip6iqZT0q/H92SSDYacziEwJ3uB05PxUTio
eQqXesLnKDT7FS0PXWpbQ6ZqpzZuwWNroQXXNu1J8npgWoFeQMl5AlAUYOaByxJ9IkIGyYOKvYWA
OgomT6uFDSlbXupq1moQTu5MMxn/ZMWnYIjBUqki5h/yxrMoUH85oCigWxdSG6HkE/Dlp5CORbr6
gSgkUnNa61GlwM8WyTdTAlnPRGGVdb1X4S8CEW5ZGHUyn/oCYY1HKlwtLQyyQeVplakXQCvrJ6kQ
Bg4uyIJgb9c+RoZytzND3ph+muOAgedD8oFvvTx3sNPkT//7bqD5QROXfB/CNgx/tsm0OEgPUtyx
ftKJXDzA7GJhHQNybc4wtemLWBnKgjvyPxxbdEyRdD4wobPkbKzOOTeAMstEFoqr0Y8H7QhkUQam
2jDhUkqJ284W1O4H/XuuB/Vl/qvyU9hoJQcPCgaBGFdq4QRDbpDlmpqlxXrXaHZlgWffJAnQn8Fv
sk4H4Ea0/WjIO8ifNl6SfybYK/5oIAIgUi2Nk8KE1m8gnJUPMXSYWsAeYkR6ybc3C9yJj6NzwSUW
CqJJugNELmiv6J9VPA9PaGQ64c+3pm+cpyDNDHQ1vY1qvj3nEgqx5n0Y39nCsQImiPV/Sg9yh2Bk
HQ4ZMwhLI+nFwK0OZ/zkh4odiDsOBE3M+kMnlZ5BJmXK2t+A59T7AvwpyVEVogCrqtbogq7EyP2R
/KoZIKfyE5vXtjndlUyZjAiNgpjTc1VakSJb07v4Jnou0T2uuBBVLBE8e5fRknL4orW7nwiNGR3A
FjSKy2+CMPD486jawdbxAbwfChXyeCLhOttQScZ5/UuJXKibAEIiWMO0zwi6h0787UrxLIJuioc4
nULkOdY/JKeviefRwjlnZY4q5i8h1F/oMT/HYeWGqrroYovXKcnUxbMWZD+jaopXwpKIKwV/u7gL
ICCVqIDSf8Gom4lbOw1ZcRZKLSyvneRHTfAaqVZivhe1m/wTbLuvizyo5v0fH7nNqAzAgtH7oirl
O09aUTNKpDm720Ay5sPItAEz0pFiZQIRDfWGCHCuuGaXZG0xuyl8ShQxJz/9BEeMVCPhZnOaNv8X
bNe0t7omyZMkSFNPR4U3evzcLjcuK7VEZZdMkX6tka5B3C4bRACtFyOeQCt79Xrriwjp3eDw8Yxl
i4ZnF2nnIzXhArnO3TFIuhZXD15yn9vVT16wMxV0rkzQ2P+1+g1u7aeDNwRT2xaUvdsFLGr61RsA
krrBB/uXlnDPWrMSIoSOLSTC16X9VfDFq7XtK2uA0BmKK5FJeWOI1ArralXwFlj8KdxJ0L25ro4p
IZhykME1I9BoKS3TjfbTDmfX1WVooDH5YBhsp3fnJjyZm0vZ9V7nsz7eC/en9E7r62uh+MrQsnxQ
HEOfnD5I5vsCo4FmTwA6lhGbUO5+59ZQ6busQ3Da/4/gKfWPi7Rx+7Y3AL2HiXlvnKxN32bezNjp
dYjFYXVPdjaFpz0GrP3APSdp3La8UFzXbVhLuwuv0mDPBPScpRdDo2G0X7gso054AFVY6n9p8tdd
5zYfJhmIvj/NqUn/wjbA1Ptn5IjIafceDKqCWE+o9brGUJBbmYQvsYtD4pa83lH8uoKqIULDiSXg
6yxJwmM59viy5qkaOJYrzsWg3wlO+PCkAvqg5HpLKFZUsQIYlmnRFiU2siCw5xh8Lv91KTWQE26H
JygYAC9Di3Fuj9L52dCNMgbtOCerVWI4RqUpIFnC+F3fY0d0urDChvfCB4v5ZfmHK7UQWuUl5DRA
Ncjw2/e3pwmVbyls0YUVrzdizPbhlKDJX7xzvC4K10nrAjnG++RxySdAOFZXubgPzTr62JQtSXmW
IIqO1vKeYP7Zb22j7YH/bXfT/F5cufY3ai23D7tEwC0XTRPsjTnkyjrFZDKy7H4jtCHGqFDihiKn
lzcjRj0nxDEydN0T3XZVLw1ckchidFI80LIRUz5/80zPxLB32RudBu90cckCuB1n8lnmLPij/zE+
aucm3Kwj0LLI/ESxyT4RR0eJrEyPbq9hWnKrwAbHzhPaF+fffQmkrsUci95u/+x5LJP6G4/zY5ZU
42fBuiz8uxbweZF5KyivG516l+EjFp1oi1B96wKupMTLWNO5UC4Axpffk4EKZEEns0gYRwpJIJRE
k8wuG63EMGWNSCTG/RO5z9NxoZktD7g60co/R42CBfts1WLyi+ow7jHsNlPv2xDWQd26f9hJIG0e
TVk9W8+8PqEnJMnsgKAfDu8qnlNGOsOHkqE+0aqrtum7PjdweTcx62yaHJffKPA9+xi5XkwSw90Q
gvLoWjJpXh3ptwi4hIt+bp5SLcz1MgCE3s+B9GMkZp6eji4CZRJ4Y8HsDzXziQLOBcJQbavNtaQc
TKFoacbgnSmdbaLo6XIalSOZIEQbh87hhxV6K+UWL1flpVWVAsJlAajEXmi7Y1H97PKK4PzSN+fr
yJifROBUNzCVFwmnra+Zipb4E5Lcxyic9aLP4yppTbb/i3T4qOrnXLKwuSrhJXSCcTyIRNfCOFlv
XN7teOJs72V0dh9L2Cz+VbtkRX0l6NYasCjX5gO0C9MmgYx+KYUX4dFrpHbbUVI/aeFPSRXeqpDp
Bj9ql3XKb0y+qM3C+ISe74cIUmyZPAsxtspP4l5ZqJ+0B83nubj14d/NJVghYmn7MX91fvjVASmN
lHcGwVvjoBHip3wjmlEjH6SoXc9kZSi06Y86jAP1G1cetsxKKdscQvvIUgoMDbTIh6hwcJVeWzdL
FeU4QV/2aGp2kibI09y/XFAZ2mNG6KrztPsjXWq3ds8FwxjebgVCba+YBkr11MEoN8SQGoQunHoR
wD0amqgzGzavEsdYCJ8t2cCLE6pF55bmrf4hm3BUaEi+H93IC5sJ2FrXcBTJB34BRd3BWFA4sQn8
EHoI6sWL/HNvZS+gmk9tJxOpZdOlBmBvL7QUxs9O7HcdiJgqyWSO2WiYWifPywrmOTezB/3RbwAO
kCUo352IbRcj3TrkIOubd3/438v4D7Ft3DhuapnoCgB3AiCh5BOxLotQ9OLv93+EDKzj/zShPRlD
D59DjxgDs4Iu+g15WT/OKtcR3zlU4vfTWVU8Pr0Rrd9q336s3AfGKPsXXriQ6NZ9n9r5uEGts4dA
CYsfvUEE6TTkT7HDGNd88HhGc9mYTrvIYqnxNJ2Dfxdy3D6py5NGKwO6Z/oHkj6jB0bWGX/iwhbN
OZ8Kc2Y/JJdWFNMlOGHs+2mgWXt6E5z02EvayLNFqqXbzAWxSJ4gVWUkRW1w4X6kYXnUfn/uK9T8
fyhoOAFAK7KnWzDARKpQjPRv4cyZKWEU8ND2VGBYHHhelKiwkDMuKr8qCOHoiTY9LsSSTJ0y3Om5
zPbN4R4hd7Ki1teS5VRo9DgtjemIkmKBmt9AVyH8O7supJ4F7fWQI9zIGnoUPi2/DYYul6u+5iWT
Nnlokkjfdc4WCCICsJu4zYJ/8oFwpYBTtAunbPpcyXF/jj8BGbtrurRFhOc9OHpTS5riE7CjTD41
SMNvyBkzXhdBL7s9fFTUr2SwP/m/pdiYt1Y8+cPm/1EIyP5d5UbuPMKsZl3LDwWXCMnKi/h3PD2z
CGJbKmdAx1uch5biRyNx6w3CCPCangeKeYwHKLHU3QjsWtCBfoAkwR+YArHSuJu8Xvtd34qhtsiL
s3yC9fez7iMXGfqasfXLzwl/T1pnQLZ2q5XYcSmbjHxP/9A27xwKycajveYOqzAvM3CRfiZE8eY6
nI0NQlJ53WwU2oTg26Z6QRQe3XHyzBwou5E1nBjHU2cxdKlVp9DtJEqKHiY19jXJ15FW+qthh9G3
7MbDqD0hJC4kwh8UFZkjzWYM6JzvLGwdsQBfme8bOryRIVZ67tt4bFVVLM9FXD4pW0GJ6ORp8Tdi
4nJ6S3aD+mYkO9ofUAzhp1lc820p3nSEDgqvhWKK+V8arvQArAOVqlMsfcrxjTAftF+gupUsk4Uu
x+TuA+NA2OPMbOvrKHF/9q/bRDZFWAK1pqkR/ayn+Hr9aqdjxKLKLgWR5GJILTb6RvYPQ7C4/P9u
ORGmHF3yzCa8y0jOFH93CrTEfxSjBF0EiTlKkF8k/2JU0TKPm5zvg6slp2L/EEy0ydkfd2uVivJM
qWFaC71OR8sCvnHywV9Rqc/3Z5M2hIVDYOyota7W0D+EpXlGCDVDQTpNeGWmOLMqNfWr9mWdkNpv
GYuGydcdMKsPCIlXc1LGOaspNv21aHliav8RjakyVwcswmUhf4ZBHyByl3pyxgpm9fvfdXUC4KzO
tu4VTi7sGKg3DdJhVLw6k/2u2icZUQJBG06UWsOYro6lLEAa68zHBoXCTBDX1LdBbB0EpvjZGyiV
uRE+GXFmHrA/q8FCObD20V/4gXKXk96VrBgMlOCPfO4TJLu2BNdhasrxouG2R9Tf4ha3DpYB5Wuc
u0SGgldtDs6NlsmbqCFk10eYfWxWmYr7FmwhHlxzl9F8T97rG2QylnqUtYMDx5M9tA9+oLYxWA8y
A61+YQeWWM79SjgKWslaAG554is4whtWWKHUsHr1n7NYjd26Xge/QVwVvSQh2RwbfymuNEN/70nO
f5l1YSAhk1y/G3FFQ3eccWGONkdgA9dS9HZQR7SD++bYaL7Y31aVlOxtswK1jcHpFCTFWeChLhpk
DhoqBem38sM9At8UHDlWF7FnNAdhktmFUDxRIqNrYrFlhR5Ay5crXOKjDrTyb8zQYmAalRw+P3dt
9fkWxL2T6HAMYBjUAvwxPOx3FXGcW7dkxacjYVhZ47bVwupVqkgXiYkIDfmm9tjzFNPCQnIDtgPR
22s3BLR4rzfdd1W6ClCfGZ33+Lcvtdd9Ki+ToBL4StuX9+m9nY0eq/rislQWncvUWRVJfHsBK+JW
b3dfPRlF4ThV5RejfaAqeMycTNOLFrA8X+xl3fZkznaeVNrgkR4kwoDX2c2Y4oUWRxg5an9f6XME
h5UtbZe1NWmkPyew4JFdfnNc+OItFmUqcl4XQxzLtu/yeQzsZyPgKfKbrZliJk7r5SqcKVjI+1/u
BssgQeOwTpFRPsa2skTlRCvfxpFwBXYQOkncuApZXm3H9ImD8i99TkdhAZ8NWgiMGx7rV2J3CCI5
HsIp3c31R1wqeIc8490LHA9lTaqll7qbFAsnlPCl3H4sik7s8zflMICkU+efqDw7eZ8f6rqVVVmh
MVUYBnN97fby00WKxxnfX/5ZjKDrN6aiFvfS8tCxuEgaYRk9kmkIXugVN6NzveA3HqSOhYMhKGKe
JFqOwIO7XaEuFPVFmRdwDreq6VIIsQvspti8FGzLp515iW3yBgfqUPz9yQyIEyzKSjfIuGcnc+Nl
53FjdgfO8sHjhl27ZrqtLlZXmHNt1QTIbla6eWi4A+ANmMq1Y82B1nJa/3DKWjO8O8ikeS55lE9/
rBW33a5rSwc91N8sK9MH9ltCWqCHzi9hh4nLPXYs0p63Ba1BX2BTEdHAMiV/ok7Gk3mE/xrbysXB
OsHxm/PTXLq1Oruj9e0Flq22LadcL1O/ORC4JSBOiiuM9gr4TqV/gDQtqKIIrYkM54hiOOsqqolt
2A0D6WDStP4Izq+kNwgo0WAOXA+JYOGHTHHRtkjSjMynoG6G7DtSNojNuPwXQEGyf2gtzfNWlyT2
XjOd44j92KD+xypnrDyiuuF5/HDY/EZqe/gEX7eB0n+d8POCNdlF0wY1m7sTcWRKbBWi+C4uj5nC
B0jFvqs+NEuIq0GN2tFo+Ec5OXuEP6EMYQGl1ODp7STVcqPqpma0n1YREle+zk8moNQW89cr0XwL
fAAaYcVNtR8pt2SOPnBu1ud25wfn1rf7gqp26RjKDz3HUT95C5RC584NThsfxQKdq5N1R+TRBfbA
LnMrcp9/gs2ZbcUq1Csl0IU5KbrWEzyG2Jkhrv1u0ZtToppSSSL0i8x5a5XjjkFQH6v5b2FdX7IJ
vboF3oVcuM4hjOKvru6TxveJKkRXAKn3T85gpZ6tqn9lWwIB3/VBbRBTulbAycK2aXgR41wbOmXg
QNMq39AVJRBU+wOnxXZr7+37NKgMNnKWvvc09ArGGJLv+Z8L4TP45esWft8psoczuZxBQjOBePHz
HnfM9/zkXAix763TqxsfjxCJJO/wC44vt7vQdUsZyVRYVoOgvnWad7bYV0tAORl3NjzUYDu/7Obu
WqBkovNas0ezzlTAzKuzlo5uxBonTn05kRcFsil3TfNLmAyO1pvn7UxNpbytHH9aAgi8kx5iyHjI
icVFxq6wt3jZ68/S36AKm2Naq1kZva+2TmU9hiSPQVVKpE2EnC2j51C+g2m9/apvF9lg1PQG/Omn
0IjWfrKAvR5i1MY4FRtksBpFRmm6vTYYcgXQohY4UYylbtw4v0ehzx2zWObmMXQkKwMRPi4tmoh+
q3pjDIws47VK8TWzDXuBY0GVQ0cty4xAUtzKd+NMYMqlzZxnAFEpu6jhaQq6w1LzfqWZnbl+1Ext
1NJJzOnKdPXbHlTD1DVoKPiK/9lF6jsvBmrphNXTr5s5JCLeqR0pENXQjtbZJZg8NpqEJzpiEEPC
MgiDFdPFY617TuVFl7NyyUehhnBo58hv4nU58I05y3YgWZ9eB7j2Pa2tlFhqo2b0bV3Wu38WzmBg
wJMu3+aKl2WkH9KRNkmt3gjDQSDG05gGaXl/6YKShvF8dfZ1sKiXXldXHqPH3Mk9TovBoyQdLGFK
HW4NxnjJDBIar/Qq9w8/gIlFAfiM1EG3D7XH7YhK+8OVXS0edGuuj2qsHaOAdp4HX4qWum5KqRvF
vYpmT1YLBHzUJ+tE/5oZUkk9cVP1/KO44APxW6dKTmbGj5HlMhR/DdeK+cRGlMAjFo9BcDdL2k+j
OaREG08x4yWQ/7Z94F/jlNUQeZiO+ccDNPVjmqNk+k3t5xtANrk8PesyWIs6/kziY/mEC9ozlx4a
J23X7ajw1HBSchZGBr0STwWoLZSz8yY3wfaqmO6j3ofzFeT778MV5efqiZKdOJqNjvQjOqEBpS1O
gRPjdQN14G+vee50c7cOmWF8rpUErCEJbtRotTUsZ1zewOs6b1ALGrpT8dZ7zi/2SWKsmn+AvAKN
4PzVI+0fJEqfYc9vuaTwPNb6o6rFvfbpGw5MOBCYUZ9XqywtiyzSlRNbECgj59v3X8GN2OOZmElV
V87n29XnqTND0Rb3EprztQeoMLMHFSKVPMkPzbdyOPMsDU2rr+tkD/sHPQpIDze3cIoQiT9PRrQF
35sD0nRiWngPOc4VxIJE9h2ITen07Rn1PQy31vcOVn0HCYBHpZa2fiJ4lU1YRVzyVZfuGDldE0tA
skEDnkOA3QtsbofmeNZIG8H5jD4vdXW+tk1Gb7facgTCLt2aL5K/zXEQ348EZTSFTgIxNeSi0JJS
6jGYW4/Ye3FLPeUuy+ZrFF8+ZAy8lp5WaiFO6xYQrRrR2K1Qu6faPBUD+RQSF9rtKHwSwLZyFOYW
A+VYQUUyNadoSx8tx9Ll4d9XBdOoDxHEgHd4nQ+N/GnZpOlxmoTK2U4z2TRFQdUJpFLAje2x7Zhy
/tyEc0VZ721GQ7VdIjevzlyYrZla2Mol3eELzY1wJrFGa/22gh5HN6pPvoMAUg/qLk46b5E6CrIE
VLetU/uLZZf1MMviF+iyKXWtJol1MUbHOVUGFrUb64eYirmuP5WylzxyRZs9lL7y1Uj9xeBJW13F
CnSMn9Z9szQVCtYNzdvgJN0h9C2zF60bGErQO9IVjG6ZajTfZttjNP3gB/dUunKBtjPwd6CSQDF5
9MRc9x2CAQkWj9oiFFZLLykegY2erht7tHrduDP6OUvsxynJNUOlhJb74k4Zha5aTl7appcs527a
IpIy+01oKZ7bpLDDvRDpT8aooRVVg/63KQWJpg/ZjfE+i2dpeaOlVHUcXr3WFkQuT62enDNFs6kr
m7TpDBlr4U3x0IRGnE2zburjcZJ5w/MLyt9d+Pc=
`protect end_protected
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
iisr0ydwFOm3eepmhOYSaxO3flYpViRsLN97vKyw+ai+x1TubmaH8qRRwK/QFeVsjlGTFdxookcr
olQwv0bmdw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
dJvTzz+PoD3n2Ot9SgKfpEhIshJxklhDhS1tYcrcmprfs5wN+lN+5Y+o9jEEql61IqDkJEIGu0xp
zaDWEeMqwkFuovmZnp/AnbrHb7R/19zPRtwSyZ8+VQRLsRMgscwutXu29fTUST6Ribitutae85tQ
1okc5mYK0mcSMIggcMg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
ZijKIWnBSOuwn6R4ZrzJp1qaSPGZMrP8GTp+SV+Sn9xEivGxLJtGM40xMLXxiYuxIopDD/A1usG6
HkSoNT6OzxHJWKkUEyyVzrZuJdNHJ5q3s3y5LSNY7eMxN9lY4/gygh7aVIBAO9YWzsWu3HLtrHA5
2vsUFQxQdkG5OTLVP1rH68P4j/dhqr/LVHw+9H76c/knGyalpHLRC7tnHQcfuezFJWlkzaNGHfUo
b5cE1YTvtdlZVmw2sVG/GbXIRi5fq3+Okdy+JgckZ4dVWbI20rfa9LkI09/kwD3anyrnovVQVx9h
F0AxolVKVVyWNAaSu1fvXllqzrdJiRLbdnsq0Q==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
LUajPw/jRTLlmEKb+9YylQ2jxw4jlSx/1GGaY1wFfWFdMwK2p0xvQMjui8K3EqJF0fnb3QNWuQDl
1vTtf04vcOAHkfRCeW7Mbp8qeUTtAsflGIPJDxHfVU8ZKprwANsENc8LVrpJ0WnjDFQIzJw7LDqc
Jj2TofWjKprdxXsMnu4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
KG6kiSPrd66zvVpG96eKD+783ebVLVFNF7pXgq+rCyBBRoa0N9Hp3DIWK5125mkICodI82zuSq6k
C8aCiPbDiv4tiuIn19WDNNPL4ncknL0KLZTLAkq0BIQIsnFNRaZegM9aXOdMYGKYLpnjSD9KRWRt
WPXPZfwprSu2D7PeDZMiij3MY+cixttgVmNfcx9Kkmvg+1B5sTSDTVs3fqpJBBO1YslTmxyJAIC6
uDuGqvQ1138z6f4f+f8vMXratK1Ypo3jPPb4FTNLYJio5Vd1Nbpl9kRRtj801Ie0GGhbggK6IXJx
785o6wX6g3tRyoHXGJ4DGUmWlIHATg0KIAflYw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 13424)
`protect data_block
rEtV4Bm3SmvVbKq1runp2SaaO1GImraXNQnz2t97NClVhlTBGZ14v+hHArmsTHZNME/QWduIEcCL
I8GdWPb/f0NXI5m0D8vUM2MFHCnzTFi82f0pjwFGBVpM7cHKBa5QRX5K/e5A/9KwgbwYV1tKqTXG
aWyx6JRfuzQINO3rQqM+n/1b6LSLygDM1QuiPthpMFKV8IfsVkaLDVqcLxH9/n7C64aisv1xK+OH
WhYRETSZok8+gbvdGdr2+VsE64ALl3DavNBK4S7IOGP5YtXviHmw+Qb/lvl6m+RggRYmTe1A6B5r
pghgGDxK2gS0ItU55quFmZMEuEH+bwLuaJA0/UWR19oWnbcTZnsCqEeN/xbKUzS6blm1K6RPZtYe
WSGhjFl0cKHEQe9DfEazTm6tS9mJ55lLbSuwE5o03LDGRapxUdSR0IiKy5C5UP4genzVw3zearva
qPWmPeGZcAEyFioI2o4OWQP+8mFdbza1kBOuw4BP76P2c+ij6wbxXAWVxtNmL8f6AgS1AV5SqIO0
ftTCve0JloVh9kpHsbXE1TS45+y0IuiC0N3a8PAEsXa/tnLsnAydpsXIQwMLXmgKfoXKzabAHHdI
XZJd/NxD7+xY3aINMVaO5eSSLIdjkYZIeqm6qf+x2eNd9v2nue3I9rjHkjMBIty9wqDCI5HznV19
h0aPmdRn9t7Ft5xXq0GXqSl2I9ZROoM4hg3RU6TCVY4IaDkErgP5cMhIwuHsntmeWvsvkZFygQtU
9TUaf90O9HINFkrdIHf0ZCgtCgUw6ffQNPAkw/6MaoKxm9wdczGi3ur+eyRvSLy7+LQX/dOqvXKM
9UFNjkQk392HWfkT8aaXacuJgFT4hmoEXDGY+tSqQrQRrPmelj+ksf3PcI2r64RSTjiR+9HNqWqJ
jPJio2xgGdQdGrH+UewLz0ySmNDYmqxIdyqKfv/B1BYMUpGd+l0eRCp0RwjP6nt7MKkBishuJTL2
2kpCGDQ4HELrlovnj0dMihRpFZAIpY55DfNVE2hnbkHthyDrEXapmovyPqDFel+HKDdimVyeM8CR
DKl0D2+OZK8XWAiVk9Ve6w0rONvwf/XvaAkgxa3rDJQo/8g8oiGRq4ku5l3OZUKrPVRcjVNCxHRq
81RLF34Ztt0FyGvWgFBPXPwl/QfIQcetnIv8BBHDyYvjjUEJZxJ0yVIBqSipzmyIn34Kt0GvhgJJ
oXsivJz4IQp2WiLYnKzv7NuBWYnOF+M/H8eFTLS7ynV/b0CRf7qayeeaKYL0uv9mUeXbILs7F9+8
XkemV9ihHFfHS04009LEbIzG2O13pEZ78n4YAi47TmCv22T8/Ve6sSAGowqE6FfeksCmQ1+Z98YQ
uXIyCDvF0dlGJwZxogjNRbjyCBj6OOagNPhSW71GcVdRv5XSPoZsF68V4hWQeNb+itDo7ZPtZJoJ
YzLjFDCWp+2G5a8+OtWGetlJNejx9rEDOQvPXNhCi9xzzzSvIevRpnt9XX8uVwzzSJnKhI91LgRg
ID2cjEMis7S70eKGvR2/KBOhU/KAbsgGALtSpbd8HPFqo4CWuxEHCYImqvt7m+vI7jIEpXbwjtx8
QWNgKL8RNSViXrcj5CsXvOI28Nk2V+GZ8jr1/8I4R/Yns4Xfj1TTWzVeNCNHbazn1nufigCGV4Vl
qtDHRGZpM2GzgWRsMj5tsZldV3pp52C/Dpr/92KUqWKMf/mZbYDJL1X0X2Tw7iboFgBgx1miq+ht
zrLMfkmBPAPakC7uTHv8wdz7HICGyvCct17zvGp/b+9c5KI7lCBCd9jn5PTW35q5ksO4eC9R2AqE
0xJmD9GKB17q8Jk7vlAMs/IJV9rgMDnRfyFkOl4hl2S45SaIY1ObTSNIHJYg+rp/nN6BMaWKrR+7
O6t2IjDTrKFkfrU0cMF3G7EiQSf6RI1d8iyqNJLJJ3fbFhF7XLnn/CwlkZ/03Hwn1nJocabXwbc2
9Q6RrzrxLCWMZVoXaUEBQvapxENHsyZOrmSevUQnuCknCx9Eh/GwdP2bYVHxXWg7ySdjQnVMtR4v
qT7n0yJuHI0ite3a92Oo/MBdlgCwEcxfvgz0ILRIK4wFe098lGOX0tVEsLdEUijEAeQR38bksd9a
fuwZzPBvMZQ+FON4CQYrDg971r8Qz89ArQjVxWF7TdD0Oaq9vaUrLocNzIw9AcIy8rWaQnwTR/K0
PsXLapKx1fOSZnuztuMHoRXGaqZVlZJGs22/GiJA9y/IBflmF5GNFnRUbXVT8r+FfMb7zIr8eP+b
OcPNp6F4kqt/b8gae/9JOIopCuWXpu5kDe0U5aC2qmvMuYbNI88aUx34i3WHd8NWKNbdtGDaQ8nM
iyuSX4j7EgwTOuBR/iFM7rZAATM59ZFv+9wRq8hbXVvfsBp13upya8YovLN1O9OWrzxUWym9ZPN1
mDhMT1YgOqVRaJ2ADyjP98UghsOXt6ybu9jGeEndP5T4mZjxZp82OMxqqS6VolaMbGRNPa271n87
65g6Q9l7RYtOL1PjdBOlgNpUdYZwxJ2EGgI1wPnrnuUiZ7sdhpuFkhJDdh2mHYlIUZHAsriLKEHR
XOdtU+Desuf1ojV6OryxMP052nRo3DfSj5+dKgSFWVXGLiS4Q5dQxDHIvUugnqZqf+FK5inrMME5
1eHWMPkrqY3H9syJMZ7RM9SwYc/zjL9fOqr9mE+npGx50NODLrgb0FydLIXRotOtI+YSbZHKzsKt
xoZNcJJ4GasWF69GNvRenQ3kp1eh71xjJw5a0KZmhsJJXThZLqSzb/sTisTU8jCaMh6S6ag0knK7
jonbXo+dctsmQfLpvLXHN4TNqJnY6alIH0HnsTz7EklgiqvaLbFn+25uUJSNDHESZG2BaAtNvG/4
WuvQCSLWeuJpsrPd+06Bzmmnlvn9InJZhGDVhnZlfj7Kh2PolkMjpLgzqH4f9hm/7zH7o7msjyvZ
Rj/JnTghr2ou7m5Ayp5K+yFEUt/y9WWmqXlKOpf12P8RITbx8ILm1kWRqB8L+xfF1r2HXt+av43O
pyKFj4Kq1FZckfpg2It+beWX2P825O6hDubEjA2RyF/zyyc3lMSS7vtAQMEOEJnWNslP5r0po6TK
F5+Ikch7kOxVShNh4LWWzwFtJb9SBv0iFIezeCGrgApE2blMwedVwOdpPdPvsQjNRYc8YG+dStcY
JUIrNMdc6m5qSEWO36XNGXLN/ZrjKkZcCr+z5oN8Oa4cO8jxqZo5bZDRVUh4VXM8a+hHCiVvWsEG
HkxV52NFazh7Duhb2Ix5qYigebEWfDnA3frHeY+lRAIE3+X/YoDjgbPuOqgwawkAvhSCeNbNxuTS
T9ZzmE8PWRbDowhElwhdboesSdX9tyyp7yCSM6fxKFXbUrPplwsSNsMYsJJ9grw0leD0bx4Cd0Vy
Y8dDayiLLROqmsdsKe7b4i2o6u8A0RQrPB31DrVO/yPiNygxChVesembc822gDnOAlf6FO502nEU
ItbE4EyM6ZuRk+69RSoT+2AZGRndh55WMQYb6i7ALzZeSttxOh6V+LV5SNYYdeQouPNdd+N45DZn
niJzd/11g0AFDHSZFxMK9p0VsOmXbAPFEjcTvMS7PiMwhUsav6ZfZjkVwz4X9s1v8DCZpNbKSq88
kGJQIcZYRdAPuD7V1zvdo0Zf6leEwpYg5lACMpJ8rGWyLPBrYD/CsWB0THjSjjkRntpZXUTF5Sq1
IPSYaQtCSAHZKO95giPeqw3zw2XQ5ci2o+t0eS1YvmSPlvMfZRnkdx98t2mA8ABd64gljY5f+0O0
px5Pec1R5VTiPNgghdEJlgrPqQxSP7vDXo0dtJmtqeP90QCRgaOqEt27wpqzv0KFUth0XwtaJeQ5
dejR/hEOliBmBscgJkx0gBF/nLybnTcQ6xwwOe25uqhvJIiepSDJE4ICrD/MSurrVfozreQGinSL
a/tMurSZF67eavaP5tFe2G44AmkmV4WBRnOeWOW2dJ2Q1sYHMUzfnWjdSw1sJJu6+Y0fUowVqq0Q
K2lcfV1v+sdb0adNWmXRoPrjCpXnMpWUyUXWCaY8r49ipi+4TCdxE4p/IUZfO1aumt4+xQcBT0dh
t1WR18HGPmHp719a+JPxfWkOQjw5JnEukkqxKV6fqJPDzGrHDJvrkNy1tkX0MN6Z+Olw//0xoyyG
9SEwAH72HyUlbfM2lhwM9N6f4cr+CLxPF2At8ppy84kKN/H+2RDt520oTXKCcGFU/txd8LdCs9qG
3diwadeKrfsinlzq/W+3PUAPHvjHcwRyRb4m4Wv6J0kW7ItY1ox7z91NbPGA481MOKLtCEwm6vuk
sfLsMi7+T/Hm+qsOXlQ9i8Pf9VAE9LWS2byZEwPIYDYtbLm2L09NRsMgfm6PotDA/9WaPtrx/CrM
IMllkwsRz86jBnsfx1s6w2v/gxQFWv0fY8mf1WywsWC+WArpCmvfHO0WMIJtyS/B+XcdiLdfrrJ3
qeRMJy8lhDn9mvRTVYzLXtu6Fv98eAxRiP4hPmT4+kxhTz4CT4cDPP9YKhdzODoL28xWfAYFbD04
Z7nP2BAp3o1FR08u/ctwg8oxDjcRwHkmDHquzKrPjnQBKXv9IMSCNsR7asFA/JqdhHcmuKZg6PRk
6XzKLzz1/Zs3XVZ/rpAcA4yoz12/yPHmsazO+a6cgbZy7JTSwRBhRd31L/KB4M7WXzNJ4paZAsOI
O5FWmQpp6eEyGGXpKkGy2qdqVRuRe0IjzwDJG6clerafsgCAj755Q2eTRVVvvRQw+G+hVjqaFu/+
m9KSJt+0hjHW1BHC4wyHN94ORPERUFukKcxOq8a3C4r5hTOZW3XWq1v7Ks4H7Zwi4AlNCGUKQ0ON
VSZKVFl61F+tBDQk+IqFz1WMfzhOfRJYfalfeqp5HOOIaK9cOhXG2oYdhceL4LDJlhJPAqpAc23Z
G9mCLMh7l3PvdGUWIx2s5Z4EpUsaxWTxxqD4a+cGuaZLzeV55zSCZ5qehwrwRTYvoBZE1+lOXnfi
Ryt8wko4y/GJZL/NuHI8l8tJKmVjS+XqWIN5sWUs9WMNit0HB/gZfmTuuvpwP7gjFuUjS2Q+jgYC
9ppF022c89tfs59OKVOjOQ9s2b2FlXyn4zn9AXI7AYGal0MNPRsQwnnaZJiTebyHcwtZucfEnh6z
9K9skBFs29qlMPNYsFP7y8mzdNhDng3TEgYpao3SPfXwDj/CSw/ObVggf8enRTUNlDfJ+17WwDyO
/ajc27MzTRLyBCCQhUYvMn80lvwSHxWDIL3xKvr2OLMoIAmgIZJG3sJMyhsOPqFxVb1Qk7NcojOn
D11t84xem8WyHJRbm0pbKV40U5U40scS0H5bcMWTEfGT4W0Mt47O181hbfymq/ykV0yIpouFyaDb
tUvUtKWqMknlkUxdllrfasNUWgJUfn8Cl8EV1Z3U5ABYiUNuRr5oKcdwlS7eB/n+UgV71hPGXiii
tFKvLiZLXS9l/eoEDDKLm6/8OksoHEEFzRFIR8skagCp4rd4fSGbOUietH2v8ecJdTlXFP0ex7TX
vh51q5DGduPDyv5nJCNInuPVn9Z9r55S/RGw+ySGAcaPEqaldHWakl5LrzE1/zI4K707/QMAGDAl
HQdn4RCGxESdD4HJn35p8o9hnYl7WqaHBddVyszwX//kjQ4qJolh4qp+txlSxnSJmCs83a+aCvMk
IbAnKPRH3SP74XCHOQ3bziFlRO0Q1JWSUp+e9CxVX0iTOPbgrB+wD9yT1o6m+o45pOEi4yqt1ZwB
6GRU83LP6o8j9UURxZDZ5WMgpNs4xuaPxAt+XstW7JOy51tYRnIykokiQYYg+aWP02kEZ7KL2cif
/t3AkMcRC0iKXbo3c1/h2uNlHbvkqXBOZnmGMzMriXwdE44Vt7izgW2oY3N5IFwqNHPtWi9SS6yA
hcD+oqiZ5YnDx8Be3R5HxKPygh4K5ePLmLR6um0pz3P8seQq1RKFP9ctf/u1v+7BlNqcdEez0X0N
I4X1lXx9dw1MpdfXfG2riDistMNSEH4Rrccb4Y/8cnRL9fh3mO987Fb0uI03HcxJiExzcwHZ9dco
s3vvxZTsaIGr2xmmD+LsMSI00fJFv0/mbMB3LLQfURbbNvuYtBK+fA8U8TOqSRvPYwXdCjv80svZ
ecFEkHhpXJBNTWSfUIzupFvHeVSIxo1FYZEy4sS3rdwokvKAiZK3rnzY+Ryed1c8On/UbN07w7X6
m6hS6lOKjYh+wxgHNswvu8N4sknoUX7Hwp9LBuU8+T0Ca/tOrCkICtK8kD5WkMmpO6IWAXUjK4Z8
/OmRAfzuhQeScqBIQTMuw2IkQruwSdfY/2ev76Y8v5xSi/gzcXVjJ6pNWe8NhZ5pL8vuon9u8D9v
ac2sfrz5UyHorqRAvNxS0nxaWXiYHYmk54FYhWXq/l06uTApLWRBji257/fX7WCJ6JtNeLLcAFYG
ui6Qlw2u4ilhoM33Ba9OQD+hKXM93Ab35owHIBR48oqnZlu/gRs9B7w/mQ9P7Aq6DwyYiEy7zN6P
zIrKF6PEXI2oo5vRRDZlhHjnxlG1qbQvhZImGO8R1X3muvsJ0Z9NyHew0PCSz7i9mW6rY2m1FJBl
jLOuJd9a+SClV8HYSGnNlxIsBxxS4kdb8pJAiZyO1GsyFurgT9epWWxp6MeSTru98ZQ2HxuKRPAh
LAyFLPqo+UCcwRFhd6SEMQhkLktq/u+ZRteg3JfitjOD93M8XsrOOZXAvc8OK94NqeYOeOIYfeiA
Bh8AZZCTK3Xt4QLtJ2oyW6gLSK/gyvC1P9wVOFLK0VxRCj7UL1ENqTGIylLsQV1EDrxvDeHgkr8n
+celZ0eo5oJZQc+yNrl6D8RLDaFfOndjQQuP1VMMLt/r+SCqzoIQpeaPzjqcZ5F2tDjq3vLL3JlK
L72Oet2zPrANXugoDIB6V4zLM77QJB3ICXMRSw3lLKHdoVR1fOZjH7lh6OFJTtre6FJuHv34LR+w
Sc62m9Wix3fNqnF2+9Qp1crzn4iR45vHd5J/GET/E8MKd44F0qOzeLFE7zgwf2+Iy6YZU0LJ7OWe
z0OlZFdrPEAemSaXyLI3Wg2c7W5Ef4UaJISjZfXU+aX/CFAP3KV58g4cgEfSs9fw8iuCFLuLh3Jh
GZg50idBZAseo6HiW0jDA4Nn9S03k0B9v1GqmSWPhP3YhzM/EK26PGYcgF0eivassZQFQSrc6Jil
NsS91pv/HNapigSr2eVnB1wDsPbMOeAWMefmfTJEy770FLL4nJvHH23BcLXTk4vQBAncc/ypOm8W
7K8vIx4OeBmtzlz+HHoN+Ki6SGNYfqwhxJ3Iclxi79j84bg6FlZ/sJmHW3B/BcC+MY8FKzU6WOYl
4ii86/wI6/Ymwxsc/fLpXuJgVnj1G6seQpKpHtSA/+fDWnvd7+23DNdK6HfBGZ+9h1HUSEREwoXj
99Lau/2+L3cctWkmre/U6dbCrUJx+9esOM4lxm0AgWGdwsmiTdhQhm1GO9efcz3nod2wuyLOoRFB
PRHCoU9xUQeiUOHk4A7KAbqWNnKmpYJRUFtQ3lyKzD1zt5ChuiYS+1trXUf0emVBc0RXJeOJM+oy
pdYUCtO7HboKltA1VXkzyJrTAnuRxZ1FiBt3NN7AswsisLqFyQAuddvPGzztWsE/T1mimJzTQK+f
f/Lv/B2HA5evVFXQh51vSrY2ub6y7UStyV1sLz4hRJqfnfYYtn4qKe+hiDORa9CUQSPNnR1nNwVS
OkQkOe7FGwVo2tF2pgxsVaObzuNgR5W00kvbG+HZrYc/VlQXu17CoYAXyKuimeuQUX6IOYQfOtOi
P/656J+ayneD3DdaM4CAxyapYpzyxTtzYw3d3BmLALR36ZccU/VhfYiHYcCtxg9XbjQuCmn0V9tm
VhQXJGWmHnrfgcSUohqw+023UH3zssHKe3HoXWtNxZuFWTm8uBN+FQJWwZg5o1SnFllNmOyhtpJN
XO8SRcSR9ghUC2PkIXtJSv9s4l9Gp1a1m77LFh4HZa3el3/C2W/EGR0B7R2Pzy8Y8kQnfhLd33aj
x06UIZTX/x5oFzGlrD7CuvF5JKo9vOIxzToHh5kdoOD6zjUKUGJYQquc/mE0DMReySwBHVcUIpLT
P0tPzMBnO/rCSMnc9ks+pckz6Kip2rnVsPX+HfAom3uAkz3m42JwY6b/bHCDef0RK/3WUac0dSKM
kEYtrhwBrDcHu2UrE9D4N3TPQpPhltMcgA3rCnJNzhStxgWfSGcSOX489GY3JX51jrPQ4KLwg3Te
uHo9coFgA7zxBD435Ek9ZfJZAcIO0Zt7s2uZwvFyTVmPWSIEW6daOf4f0gxbKYxTM8WdybNJXju9
AuBEu/AVDZ4+JGpSkGoI5khnH625YEMjmDdM7yC1jJKKFINwCI4JiWEAl64hmuHGoqBCRVIgMBYp
hCwZyPZsI1RVFT2dRHGrlaHOioCJ4s9qfl+jXm7NnHKSvxNcZuT+Ubv1PiLUCoGFG+sBAEE7OLIx
156yyQxHYKvnmGVKdSv1JDcqFOBTX70OTB59UidJY5m6HfaEtJa2TRtYd9dfiLW4T+bJCNByHVNJ
BP5PQ906S6hbtLHGTio7Jc/IK25r925Vil9Q71uHrIoeIOuJxTU2THyuDb8th3jMJAWZ28arIcD1
7zvWma3Osergrj5anOk44hmyfHWNmtZzWfjZ8g2mz5sCZf2xhx1wqFFUm2rP++JnqWZWqJpie9P/
FaUflE91AeT0nPFGzJobKS7vxP3YCIxqDXb4W+GNrbrMzqJv62IjXU/5VT55UrYBObNBKr5pNuPp
nl5/A4Sckp8yUP4cXgns9z450Dg8dC2rJeiALt5KoIAI0mqVyz6dmncs3964qm5zvqkhfspebtxv
+/5/HLRk1pKJC/0BEIG3U8PblJ4S3qWAR1ocDE72mQpK1S8J2OpVtmNPWqj+Q8XxAKeFhxNgDseh
3Ys+1h4JfwdhkuL1WuvUWRmr43qJQgrAU1dsla9XqNHMblQy5XDeZddFiARAWW3wQ5mQedn8mA5U
VcD6AFj0+myr/qmfSW0WZomoAlWRHZR8ww60cUN+wUjqZnXcQrMta/v0wrgmsv3Gm8XyHnb593L7
eG4J4D9wit4Xzo8ICB6DhsQ+QOfSpMQ+Uks7P55CB0dzcg3FIehDZWZfWj4jNvAY1gUscTVyYm20
ltt13qwaUWOMqO2BXOxzc3jQ7Wi51nA9iG29RjBhvOs8SIEWaroBNDKCGcQ3HvQk5wLRSMiGq6If
A/12iSm/sYD052pbIGYML2/C6RhJW3M52SyyIXliJtXn3B/si0AgHYfzqT0vXPlxQANLqtU76Uyl
JwP32T30MRjAm6qMdCDKPfadIidlWtpiNS/lxnet2Fgcu2RTx9pSlm5DVmFbm0VH38okdGyJDSIF
p+FEprQ9eDPqoUzNbjd4QlY9bph/Q/CVR7m8dBAbCFdT7pbH6Wdwk7LdzgRhdtDP9jIsKTNNte1q
GMvooCehfU4GiCw5Aa6s4ZZbQSVYuhRYgOHzovGzq1+5wOo7N2JA8vlRYSwwjVyUb2rqq7iWsbg+
JuJapgIlHZCoOngniStpVBvML3CdjisUnPZs7sdb7aLtZRCI8TsyQed5VNTTOv4NXqNYWssW/xWq
6f3VNQFk/gh7GyMyJ3d38QobBhLCLY4hmDK8JEZCWxIL9DN0kaLLviNG2wWKwZL2cD0vxQK+D5M6
PEIAaggXEQmwA138Km55S7ojd/DGbrMb9D+Sj/6WEvXGOXlRpGpFQu+ha0Zx9dB76EhCiH5bYq8w
bqILWA9l62keHeCH4BpTHJg8hCuBw91g8KmUfdeZqhZBGmg+jggKMotw4SoSSGVLhK21Ezgu6kSH
xJ58XYzSKRTRJwiPKrAW/4WoTYupBxtoBdz+SqQ84ip6iqZT0q/H92SSDYacziEwJ3uB05PxUTio
eQqXesLnKDT7FS0PXWpbQ6ZqpzZuwWNroQXXNu1J8npgWoFeQMl5AlAUYOaByxJ9IkIGyYOKvYWA
OgomT6uFDSlbXupq1moQTu5MMxn/ZMWnYIjBUqki5h/yxrMoUH85oCigWxdSG6HkE/Dlp5CORbr6
gSgkUnNa61GlwM8WyTdTAlnPRGGVdb1X4S8CEW5ZGHUyn/oCYY1HKlwtLQyyQeVplakXQCvrJ6kQ
Bg4uyIJgb9c+RoZytzND3ph+muOAgedD8oFvvTx3sNPkT//7bqD5QROXfB/CNgx/tsm0OEgPUtyx
ftKJXDzA7GJhHQNybc4wtemLWBnKgjvyPxxbdEyRdD4wobPkbKzOOTeAMstEFoqr0Y8H7QhkUQam
2jDhUkqJ284W1O4H/XuuB/Vl/qvyU9hoJQcPCgaBGFdq4QRDbpDlmpqlxXrXaHZlgWffJAnQn8Fv
sk4H4Ea0/WjIO8ifNl6SfybYK/5oIAIgUi2Nk8KE1m8gnJUPMXSYWsAeYkR6ybc3C9yJj6NzwSUW
CqJJugNELmiv6J9VPA9PaGQ64c+3pm+cpyDNDHQ1vY1qvj3nEgqx5n0Y39nCsQImiPV/Sg9yh2Bk
HQ4ZMwhLI+nFwK0OZ/zkh4odiDsOBE3M+kMnlZ5BJmXK2t+A59T7AvwpyVEVogCrqtbogq7EyP2R
/KoZIKfyE5vXtjndlUyZjAiNgpjTc1VakSJb07v4Jnou0T2uuBBVLBE8e5fRknL4orW7nwiNGR3A
FjSKy2+CMPD486jawdbxAbwfChXyeCLhOttQScZ5/UuJXKibAEIiWMO0zwi6h0787UrxLIJuioc4
nULkOdY/JKeviefRwjlnZY4q5i8h1F/oMT/HYeWGqrroYovXKcnUxbMWZD+jaopXwpKIKwV/u7gL
ICCVqIDSf8Gom4lbOw1ZcRZKLSyvneRHTfAaqVZivhe1m/wTbLuvizyo5v0fH7nNqAzAgtH7oirl
O09aUTNKpDm720Ay5sPItAEz0pFiZQIRDfWGCHCuuGaXZG0xuyl8ShQxJz/9BEeMVCPhZnOaNv8X
bNe0t7omyZMkSFNPR4U3evzcLjcuK7VEZZdMkX6tka5B3C4bRACtFyOeQCt79Xrriwjp3eDw8Yxl
i4ZnF2nnIzXhArnO3TFIuhZXD15yn9vVT16wMxV0rkzQ2P+1+g1u7aeDNwRT2xaUvdsFLGr61RsA
krrBB/uXlnDPWrMSIoSOLSTC16X9VfDFq7XtK2uA0BmKK5FJeWOI1ArralXwFlj8KdxJ0L25ro4p
IZhykME1I9BoKS3TjfbTDmfX1WVooDH5YBhsp3fnJjyZm0vZ9V7nsz7eC/en9E7r62uh+MrQsnxQ
HEOfnD5I5vsCo4FmTwA6lhGbUO5+59ZQ6busQ3Da/4/gKfWPi7Rx+7Y3AL2HiXlvnKxN32bezNjp
dYjFYXVPdjaFpz0GrP3APSdp3La8UFzXbVhLuwuv0mDPBPScpRdDo2G0X7gso054AFVY6n9p8tdd
5zYfJhmIvj/NqUn/wjbA1Ptn5IjIafceDKqCWE+o9brGUJBbmYQvsYtD4pa83lH8uoKqIULDiSXg
6yxJwmM59viy5qkaOJYrzsWg3wlO+PCkAvqg5HpLKFZUsQIYlmnRFiU2siCw5xh8Lv91KTWQE26H
JygYAC9Di3Fuj9L52dCNMgbtOCerVWI4RqUpIFnC+F3fY0d0urDChvfCB4v5ZfmHK7UQWuUl5DRA
Ncjw2/e3pwmVbyls0YUVrzdizPbhlKDJX7xzvC4K10nrAjnG++RxySdAOFZXubgPzTr62JQtSXmW
IIqO1vKeYP7Zb22j7YH/bXfT/F5cufY3ai23D7tEwC0XTRPsjTnkyjrFZDKy7H4jtCHGqFDihiKn
lzcjRj0nxDEydN0T3XZVLw1ckchidFI80LIRUz5/80zPxLB32RudBu90cckCuB1n8lnmLPij/zE+
aucm3Kwj0LLI/ESxyT4RR0eJrEyPbq9hWnKrwAbHzhPaF+fffQmkrsUci95u/+x5LJP6G4/zY5ZU
42fBuiz8uxbweZF5KyivG516l+EjFp1oi1B96wKupMTLWNO5UC4Axpffk4EKZEEns0gYRwpJIJRE
k8wuG63EMGWNSCTG/RO5z9NxoZktD7g60co/R42CBfts1WLyi+ow7jHsNlPv2xDWQd26f9hJIG0e
TVk9W8+8PqEnJMnsgKAfDu8qnlNGOsOHkqE+0aqrtum7PjdweTcx62yaHJffKPA9+xi5XkwSw90Q
gvLoWjJpXh3ptwi4hIt+bp5SLcz1MgCE3s+B9GMkZp6eji4CZRJ4Y8HsDzXziQLOBcJQbavNtaQc
TKFoacbgnSmdbaLo6XIalSOZIEQbh87hhxV6K+UWL1flpVWVAsJlAajEXmi7Y1H97PKK4PzSN+fr
yJifROBUNzCVFwmnra+Zipb4E5Lcxyic9aLP4yppTbb/i3T4qOrnXLKwuSrhJXSCcTyIRNfCOFlv
XN7teOJs72V0dh9L2Cz+VbtkRX0l6NYasCjX5gO0C9MmgYx+KYUX4dFrpHbbUVI/aeFPSRXeqpDp
Bj9ql3XKb0y+qM3C+ISe74cIUmyZPAsxtspP4l5ZqJ+0B83nubj14d/NJVghYmn7MX91fvjVASmN
lHcGwVvjoBHip3wjmlEjH6SoXc9kZSi06Y86jAP1G1cetsxKKdscQvvIUgoMDbTIh6hwcJVeWzdL
FeU4QV/2aGp2kibI09y/XFAZ2mNG6KrztPsjXWq3ds8FwxjebgVCba+YBkr11MEoN8SQGoQunHoR
wD0amqgzGzavEsdYCJ8t2cCLE6pF55bmrf4hm3BUaEi+H93IC5sJ2FrXcBTJB34BRd3BWFA4sQn8
EHoI6sWL/HNvZS+gmk9tJxOpZdOlBmBvL7QUxs9O7HcdiJgqyWSO2WiYWifPywrmOTezB/3RbwAO
kCUo352IbRcj3TrkIOubd3/438v4D7Ft3DhuapnoCgB3AiCh5BOxLotQ9OLv93+EDKzj/zShPRlD
D59DjxgDs4Iu+g15WT/OKtcR3zlU4vfTWVU8Pr0Rrd9q336s3AfGKPsXXriQ6NZ9n9r5uEGts4dA
CYsfvUEE6TTkT7HDGNd88HhGc9mYTrvIYqnxNJ2Dfxdy3D6py5NGKwO6Z/oHkj6jB0bWGX/iwhbN
OZ8Kc2Y/JJdWFNMlOGHs+2mgWXt6E5z02EvayLNFqqXbzAWxSJ4gVWUkRW1w4X6kYXnUfn/uK9T8
fyhoOAFAK7KnWzDARKpQjPRv4cyZKWEU8ND2VGBYHHhelKiwkDMuKr8qCOHoiTY9LsSSTJ0y3Om5
zPbN4R4hd7Ki1teS5VRo9DgtjemIkmKBmt9AVyH8O7supJ4F7fWQI9zIGnoUPi2/DYYul6u+5iWT
Nnlokkjfdc4WCCICsJu4zYJ/8oFwpYBTtAunbPpcyXF/jj8BGbtrurRFhOc9OHpTS5riE7CjTD41
SMNvyBkzXhdBL7s9fFTUr2SwP/m/pdiYt1Y8+cPm/1EIyP5d5UbuPMKsZl3LDwWXCMnKi/h3PD2z
CGJbKmdAx1uch5biRyNx6w3CCPCangeKeYwHKLHU3QjsWtCBfoAkwR+YArHSuJu8Xvtd34qhtsiL
s3yC9fez7iMXGfqasfXLzwl/T1pnQLZ2q5XYcSmbjHxP/9A27xwKycajveYOqzAvM3CRfiZE8eY6
nI0NQlJ53WwU2oTg26Z6QRQe3XHyzBwou5E1nBjHU2cxdKlVp9DtJEqKHiY19jXJ15FW+qthh9G3
7MbDqD0hJC4kwh8UFZkjzWYM6JzvLGwdsQBfme8bOryRIVZ67tt4bFVVLM9FXD4pW0GJ6ORp8Tdi
4nJ6S3aD+mYkO9ofUAzhp1lc820p3nSEDgqvhWKK+V8arvQArAOVqlMsfcrxjTAftF+gupUsk4Uu
x+TuA+NA2OPMbOvrKHF/9q/bRDZFWAK1pqkR/ayn+Hr9aqdjxKLKLgWR5GJILTb6RvYPQ7C4/P9u
ORGmHF3yzCa8y0jOFH93CrTEfxSjBF0EiTlKkF8k/2JU0TKPm5zvg6slp2L/EEy0ydkfd2uVivJM
qWFaC71OR8sCvnHywV9Rqc/3Z5M2hIVDYOyota7W0D+EpXlGCDVDQTpNeGWmOLMqNfWr9mWdkNpv
GYuGydcdMKsPCIlXc1LGOaspNv21aHliav8RjakyVwcswmUhf4ZBHyByl3pyxgpm9fvfdXUC4KzO
tu4VTi7sGKg3DdJhVLw6k/2u2icZUQJBG06UWsOYro6lLEAa68zHBoXCTBDX1LdBbB0EpvjZGyiV
uRE+GXFmHrA/q8FCObD20V/4gXKXk96VrBgMlOCPfO4TJLu2BNdhasrxouG2R9Tf4ha3DpYB5Wuc
u0SGgldtDs6NlsmbqCFk10eYfWxWmYr7FmwhHlxzl9F8T97rG2QylnqUtYMDx5M9tA9+oLYxWA8y
A61+YQeWWM79SjgKWslaAG554is4whtWWKHUsHr1n7NYjd26Xge/QVwVvSQh2RwbfymuNEN/70nO
f5l1YSAhk1y/G3FFQ3eccWGONkdgA9dS9HZQR7SD++bYaL7Y31aVlOxtswK1jcHpFCTFWeChLhpk
DhoqBem38sM9At8UHDlWF7FnNAdhktmFUDxRIqNrYrFlhR5Ay5crXOKjDrTyb8zQYmAalRw+P3dt
9fkWxL2T6HAMYBjUAvwxPOx3FXGcW7dkxacjYVhZ47bVwupVqkgXiYkIDfmm9tjzFNPCQnIDtgPR
22s3BLR4rzfdd1W6ClCfGZ33+Lcvtdd9Ki+ToBL4StuX9+m9nY0eq/rislQWncvUWRVJfHsBK+JW
b3dfPRlF4ThV5RejfaAqeMycTNOLFrA8X+xl3fZkznaeVNrgkR4kwoDX2c2Y4oUWRxg5an9f6XME
h5UtbZe1NWmkPyew4JFdfnNc+OItFmUqcl4XQxzLtu/yeQzsZyPgKfKbrZliJk7r5SqcKVjI+1/u
BssgQeOwTpFRPsa2skTlRCvfxpFwBXYQOkncuApZXm3H9ImD8i99TkdhAZ8NWgiMGx7rV2J3CCI5
HsIp3c31R1wqeIc8490LHA9lTaqll7qbFAsnlPCl3H4sik7s8zflMICkU+efqDw7eZ8f6rqVVVmh
MVUYBnN97fby00WKxxnfX/5ZjKDrN6aiFvfS8tCxuEgaYRk9kmkIXugVN6NzveA3HqSOhYMhKGKe
JFqOwIO7XaEuFPVFmRdwDreq6VIIsQvspti8FGzLp515iW3yBgfqUPz9yQyIEyzKSjfIuGcnc+Nl
53FjdgfO8sHjhl27ZrqtLlZXmHNt1QTIbla6eWi4A+ANmMq1Y82B1nJa/3DKWjO8O8ikeS55lE9/
rBW33a5rSwc91N8sK9MH9ltCWqCHzi9hh4nLPXYs0p63Ba1BX2BTEdHAMiV/ok7Gk3mE/xrbysXB
OsHxm/PTXLq1Oruj9e0Flq22LadcL1O/ORC4JSBOiiuM9gr4TqV/gDQtqKIIrYkM54hiOOsqqolt
2A0D6WDStP4Izq+kNwgo0WAOXA+JYOGHTHHRtkjSjMynoG6G7DtSNojNuPwXQEGyf2gtzfNWlyT2
XjOd44j92KD+xypnrDyiuuF5/HDY/EZqe/gEX7eB0n+d8POCNdlF0wY1m7sTcWRKbBWi+C4uj5nC
B0jFvqs+NEuIq0GN2tFo+Ec5OXuEP6EMYQGl1ODp7STVcqPqpma0n1YREle+zk8moNQW89cr0XwL
fAAaYcVNtR8pt2SOPnBu1ud25wfn1rf7gqp26RjKDz3HUT95C5RC584NThsfxQKdq5N1R+TRBfbA
LnMrcp9/gs2ZbcUq1Csl0IU5KbrWEzyG2Jkhrv1u0ZtToppSSSL0i8x5a5XjjkFQH6v5b2FdX7IJ
vboF3oVcuM4hjOKvru6TxveJKkRXAKn3T85gpZ6tqn9lWwIB3/VBbRBTulbAycK2aXgR41wbOmXg
QNMq39AVJRBU+wOnxXZr7+37NKgMNnKWvvc09ArGGJLv+Z8L4TP45esWft8psoczuZxBQjOBePHz
HnfM9/zkXAix763TqxsfjxCJJO/wC44vt7vQdUsZyVRYVoOgvnWad7bYV0tAORl3NjzUYDu/7Obu
WqBkovNas0ezzlTAzKuzlo5uxBonTn05kRcFsil3TfNLmAyO1pvn7UxNpbytHH9aAgi8kx5iyHjI
icVFxq6wt3jZ68/S36AKm2Naq1kZva+2TmU9hiSPQVVKpE2EnC2j51C+g2m9/apvF9lg1PQG/Omn
0IjWfrKAvR5i1MY4FRtksBpFRmm6vTYYcgXQohY4UYylbtw4v0ehzx2zWObmMXQkKwMRPi4tmoh+
q3pjDIws47VK8TWzDXuBY0GVQ0cty4xAUtzKd+NMYMqlzZxnAFEpu6jhaQq6w1LzfqWZnbl+1Ext
1NJJzOnKdPXbHlTD1DVoKPiK/9lF6jsvBmrphNXTr5s5JCLeqR0pENXQjtbZJZg8NpqEJzpiEEPC
MgiDFdPFY617TuVFl7NyyUehhnBo58hv4nU58I05y3YgWZ9eB7j2Pa2tlFhqo2b0bV3Wu38WzmBg
wJMu3+aKl2WkH9KRNkmt3gjDQSDG05gGaXl/6YKShvF8dfZ1sKiXXldXHqPH3Mk9TovBoyQdLGFK
HW4NxnjJDBIar/Qq9w8/gIlFAfiM1EG3D7XH7YhK+8OVXS0edGuuj2qsHaOAdp4HX4qWum5KqRvF
vYpmT1YLBHzUJ+tE/5oZUkk9cVP1/KO44APxW6dKTmbGj5HlMhR/DdeK+cRGlMAjFo9BcDdL2k+j
OaREG08x4yWQ/7Z94F/jlNUQeZiO+ccDNPVjmqNk+k3t5xtANrk8PesyWIs6/kziY/mEC9ozlx4a
J23X7ajw1HBSchZGBr0STwWoLZSz8yY3wfaqmO6j3ofzFeT778MV5efqiZKdOJqNjvQjOqEBpS1O
gRPjdQN14G+vee50c7cOmWF8rpUErCEJbtRotTUsZ1zewOs6b1ALGrpT8dZ7zi/2SWKsmn+AvAKN
4PzVI+0fJEqfYc9vuaTwPNb6o6rFvfbpGw5MOBCYUZ9XqywtiyzSlRNbECgj59v3X8GN2OOZmElV
V87n29XnqTND0Rb3EprztQeoMLMHFSKVPMkPzbdyOPMsDU2rr+tkD/sHPQpIDze3cIoQiT9PRrQF
35sD0nRiWngPOc4VxIJE9h2ITen07Rn1PQy31vcOVn0HCYBHpZa2fiJ4lU1YRVzyVZfuGDldE0tA
skEDnkOA3QtsbofmeNZIG8H5jD4vdXW+tk1Gb7facgTCLt2aL5K/zXEQ348EZTSFTgIxNeSi0JJS
6jGYW4/Ye3FLPeUuy+ZrFF8+ZAy8lp5WaiFO6xYQrRrR2K1Qu6faPBUD+RQSF9rtKHwSwLZyFOYW
A+VYQUUyNadoSx8tx9Ll4d9XBdOoDxHEgHd4nQ+N/GnZpOlxmoTK2U4z2TRFQdUJpFLAje2x7Zhy
/tyEc0VZ721GQ7VdIjevzlyYrZla2Mol3eELzY1wJrFGa/22gh5HN6pPvoMAUg/qLk46b5E6CrIE
VLetU/uLZZf1MMviF+iyKXWtJol1MUbHOVUGFrUb64eYirmuP5WylzxyRZs9lL7y1Uj9xeBJW13F
CnSMn9Z9szQVCtYNzdvgJN0h9C2zF60bGErQO9IVjG6ZajTfZttjNP3gB/dUunKBtjPwd6CSQDF5
9MRc9x2CAQkWj9oiFFZLLykegY2erht7tHrduDP6OUvsxynJNUOlhJb74k4Zha5aTl7appcs527a
IpIy+01oKZ7bpLDDvRDpT8aooRVVg/63KQWJpg/ZjfE+i2dpeaOlVHUcXr3WFkQuT62enDNFs6kr
m7TpDBlr4U3x0IRGnE2zburjcZJ5w/MLyt9d+Pc=
`protect end_protected
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
iisr0ydwFOm3eepmhOYSaxO3flYpViRsLN97vKyw+ai+x1TubmaH8qRRwK/QFeVsjlGTFdxookcr
olQwv0bmdw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
dJvTzz+PoD3n2Ot9SgKfpEhIshJxklhDhS1tYcrcmprfs5wN+lN+5Y+o9jEEql61IqDkJEIGu0xp
zaDWEeMqwkFuovmZnp/AnbrHb7R/19zPRtwSyZ8+VQRLsRMgscwutXu29fTUST6Ribitutae85tQ
1okc5mYK0mcSMIggcMg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
ZijKIWnBSOuwn6R4ZrzJp1qaSPGZMrP8GTp+SV+Sn9xEivGxLJtGM40xMLXxiYuxIopDD/A1usG6
HkSoNT6OzxHJWKkUEyyVzrZuJdNHJ5q3s3y5LSNY7eMxN9lY4/gygh7aVIBAO9YWzsWu3HLtrHA5
2vsUFQxQdkG5OTLVP1rH68P4j/dhqr/LVHw+9H76c/knGyalpHLRC7tnHQcfuezFJWlkzaNGHfUo
b5cE1YTvtdlZVmw2sVG/GbXIRi5fq3+Okdy+JgckZ4dVWbI20rfa9LkI09/kwD3anyrnovVQVx9h
F0AxolVKVVyWNAaSu1fvXllqzrdJiRLbdnsq0Q==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
LUajPw/jRTLlmEKb+9YylQ2jxw4jlSx/1GGaY1wFfWFdMwK2p0xvQMjui8K3EqJF0fnb3QNWuQDl
1vTtf04vcOAHkfRCeW7Mbp8qeUTtAsflGIPJDxHfVU8ZKprwANsENc8LVrpJ0WnjDFQIzJw7LDqc
Jj2TofWjKprdxXsMnu4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
KG6kiSPrd66zvVpG96eKD+783ebVLVFNF7pXgq+rCyBBRoa0N9Hp3DIWK5125mkICodI82zuSq6k
C8aCiPbDiv4tiuIn19WDNNPL4ncknL0KLZTLAkq0BIQIsnFNRaZegM9aXOdMYGKYLpnjSD9KRWRt
WPXPZfwprSu2D7PeDZMiij3MY+cixttgVmNfcx9Kkmvg+1B5sTSDTVs3fqpJBBO1YslTmxyJAIC6
uDuGqvQ1138z6f4f+f8vMXratK1Ypo3jPPb4FTNLYJio5Vd1Nbpl9kRRtj801Ie0GGhbggK6IXJx
785o6wX6g3tRyoHXGJ4DGUmWlIHATg0KIAflYw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 13424)
`protect data_block
rEtV4Bm3SmvVbKq1runp2SaaO1GImraXNQnz2t97NClVhlTBGZ14v+hHArmsTHZNME/QWduIEcCL
I8GdWPb/f0NXI5m0D8vUM2MFHCnzTFi82f0pjwFGBVpM7cHKBa5QRX5K/e5A/9KwgbwYV1tKqTXG
aWyx6JRfuzQINO3rQqM+n/1b6LSLygDM1QuiPthpMFKV8IfsVkaLDVqcLxH9/n7C64aisv1xK+OH
WhYRETSZok8+gbvdGdr2+VsE64ALl3DavNBK4S7IOGP5YtXviHmw+Qb/lvl6m+RggRYmTe1A6B5r
pghgGDxK2gS0ItU55quFmZMEuEH+bwLuaJA0/UWR19oWnbcTZnsCqEeN/xbKUzS6blm1K6RPZtYe
WSGhjFl0cKHEQe9DfEazTm6tS9mJ55lLbSuwE5o03LDGRapxUdSR0IiKy5C5UP4genzVw3zearva
qPWmPeGZcAEyFioI2o4OWQP+8mFdbza1kBOuw4BP76P2c+ij6wbxXAWVxtNmL8f6AgS1AV5SqIO0
ftTCve0JloVh9kpHsbXE1TS45+y0IuiC0N3a8PAEsXa/tnLsnAydpsXIQwMLXmgKfoXKzabAHHdI
XZJd/NxD7+xY3aINMVaO5eSSLIdjkYZIeqm6qf+x2eNd9v2nue3I9rjHkjMBIty9wqDCI5HznV19
h0aPmdRn9t7Ft5xXq0GXqSl2I9ZROoM4hg3RU6TCVY4IaDkErgP5cMhIwuHsntmeWvsvkZFygQtU
9TUaf90O9HINFkrdIHf0ZCgtCgUw6ffQNPAkw/6MaoKxm9wdczGi3ur+eyRvSLy7+LQX/dOqvXKM
9UFNjkQk392HWfkT8aaXacuJgFT4hmoEXDGY+tSqQrQRrPmelj+ksf3PcI2r64RSTjiR+9HNqWqJ
jPJio2xgGdQdGrH+UewLz0ySmNDYmqxIdyqKfv/B1BYMUpGd+l0eRCp0RwjP6nt7MKkBishuJTL2
2kpCGDQ4HELrlovnj0dMihRpFZAIpY55DfNVE2hnbkHthyDrEXapmovyPqDFel+HKDdimVyeM8CR
DKl0D2+OZK8XWAiVk9Ve6w0rONvwf/XvaAkgxa3rDJQo/8g8oiGRq4ku5l3OZUKrPVRcjVNCxHRq
81RLF34Ztt0FyGvWgFBPXPwl/QfIQcetnIv8BBHDyYvjjUEJZxJ0yVIBqSipzmyIn34Kt0GvhgJJ
oXsivJz4IQp2WiLYnKzv7NuBWYnOF+M/H8eFTLS7ynV/b0CRf7qayeeaKYL0uv9mUeXbILs7F9+8
XkemV9ihHFfHS04009LEbIzG2O13pEZ78n4YAi47TmCv22T8/Ve6sSAGowqE6FfeksCmQ1+Z98YQ
uXIyCDvF0dlGJwZxogjNRbjyCBj6OOagNPhSW71GcVdRv5XSPoZsF68V4hWQeNb+itDo7ZPtZJoJ
YzLjFDCWp+2G5a8+OtWGetlJNejx9rEDOQvPXNhCi9xzzzSvIevRpnt9XX8uVwzzSJnKhI91LgRg
ID2cjEMis7S70eKGvR2/KBOhU/KAbsgGALtSpbd8HPFqo4CWuxEHCYImqvt7m+vI7jIEpXbwjtx8
QWNgKL8RNSViXrcj5CsXvOI28Nk2V+GZ8jr1/8I4R/Yns4Xfj1TTWzVeNCNHbazn1nufigCGV4Vl
qtDHRGZpM2GzgWRsMj5tsZldV3pp52C/Dpr/92KUqWKMf/mZbYDJL1X0X2Tw7iboFgBgx1miq+ht
zrLMfkmBPAPakC7uTHv8wdz7HICGyvCct17zvGp/b+9c5KI7lCBCd9jn5PTW35q5ksO4eC9R2AqE
0xJmD9GKB17q8Jk7vlAMs/IJV9rgMDnRfyFkOl4hl2S45SaIY1ObTSNIHJYg+rp/nN6BMaWKrR+7
O6t2IjDTrKFkfrU0cMF3G7EiQSf6RI1d8iyqNJLJJ3fbFhF7XLnn/CwlkZ/03Hwn1nJocabXwbc2
9Q6RrzrxLCWMZVoXaUEBQvapxENHsyZOrmSevUQnuCknCx9Eh/GwdP2bYVHxXWg7ySdjQnVMtR4v
qT7n0yJuHI0ite3a92Oo/MBdlgCwEcxfvgz0ILRIK4wFe098lGOX0tVEsLdEUijEAeQR38bksd9a
fuwZzPBvMZQ+FON4CQYrDg971r8Qz89ArQjVxWF7TdD0Oaq9vaUrLocNzIw9AcIy8rWaQnwTR/K0
PsXLapKx1fOSZnuztuMHoRXGaqZVlZJGs22/GiJA9y/IBflmF5GNFnRUbXVT8r+FfMb7zIr8eP+b
OcPNp6F4kqt/b8gae/9JOIopCuWXpu5kDe0U5aC2qmvMuYbNI88aUx34i3WHd8NWKNbdtGDaQ8nM
iyuSX4j7EgwTOuBR/iFM7rZAATM59ZFv+9wRq8hbXVvfsBp13upya8YovLN1O9OWrzxUWym9ZPN1
mDhMT1YgOqVRaJ2ADyjP98UghsOXt6ybu9jGeEndP5T4mZjxZp82OMxqqS6VolaMbGRNPa271n87
65g6Q9l7RYtOL1PjdBOlgNpUdYZwxJ2EGgI1wPnrnuUiZ7sdhpuFkhJDdh2mHYlIUZHAsriLKEHR
XOdtU+Desuf1ojV6OryxMP052nRo3DfSj5+dKgSFWVXGLiS4Q5dQxDHIvUugnqZqf+FK5inrMME5
1eHWMPkrqY3H9syJMZ7RM9SwYc/zjL9fOqr9mE+npGx50NODLrgb0FydLIXRotOtI+YSbZHKzsKt
xoZNcJJ4GasWF69GNvRenQ3kp1eh71xjJw5a0KZmhsJJXThZLqSzb/sTisTU8jCaMh6S6ag0knK7
jonbXo+dctsmQfLpvLXHN4TNqJnY6alIH0HnsTz7EklgiqvaLbFn+25uUJSNDHESZG2BaAtNvG/4
WuvQCSLWeuJpsrPd+06Bzmmnlvn9InJZhGDVhnZlfj7Kh2PolkMjpLgzqH4f9hm/7zH7o7msjyvZ
Rj/JnTghr2ou7m5Ayp5K+yFEUt/y9WWmqXlKOpf12P8RITbx8ILm1kWRqB8L+xfF1r2HXt+av43O
pyKFj4Kq1FZckfpg2It+beWX2P825O6hDubEjA2RyF/zyyc3lMSS7vtAQMEOEJnWNslP5r0po6TK
F5+Ikch7kOxVShNh4LWWzwFtJb9SBv0iFIezeCGrgApE2blMwedVwOdpPdPvsQjNRYc8YG+dStcY
JUIrNMdc6m5qSEWO36XNGXLN/ZrjKkZcCr+z5oN8Oa4cO8jxqZo5bZDRVUh4VXM8a+hHCiVvWsEG
HkxV52NFazh7Duhb2Ix5qYigebEWfDnA3frHeY+lRAIE3+X/YoDjgbPuOqgwawkAvhSCeNbNxuTS
T9ZzmE8PWRbDowhElwhdboesSdX9tyyp7yCSM6fxKFXbUrPplwsSNsMYsJJ9grw0leD0bx4Cd0Vy
Y8dDayiLLROqmsdsKe7b4i2o6u8A0RQrPB31DrVO/yPiNygxChVesembc822gDnOAlf6FO502nEU
ItbE4EyM6ZuRk+69RSoT+2AZGRndh55WMQYb6i7ALzZeSttxOh6V+LV5SNYYdeQouPNdd+N45DZn
niJzd/11g0AFDHSZFxMK9p0VsOmXbAPFEjcTvMS7PiMwhUsav6ZfZjkVwz4X9s1v8DCZpNbKSq88
kGJQIcZYRdAPuD7V1zvdo0Zf6leEwpYg5lACMpJ8rGWyLPBrYD/CsWB0THjSjjkRntpZXUTF5Sq1
IPSYaQtCSAHZKO95giPeqw3zw2XQ5ci2o+t0eS1YvmSPlvMfZRnkdx98t2mA8ABd64gljY5f+0O0
px5Pec1R5VTiPNgghdEJlgrPqQxSP7vDXo0dtJmtqeP90QCRgaOqEt27wpqzv0KFUth0XwtaJeQ5
dejR/hEOliBmBscgJkx0gBF/nLybnTcQ6xwwOe25uqhvJIiepSDJE4ICrD/MSurrVfozreQGinSL
a/tMurSZF67eavaP5tFe2G44AmkmV4WBRnOeWOW2dJ2Q1sYHMUzfnWjdSw1sJJu6+Y0fUowVqq0Q
K2lcfV1v+sdb0adNWmXRoPrjCpXnMpWUyUXWCaY8r49ipi+4TCdxE4p/IUZfO1aumt4+xQcBT0dh
t1WR18HGPmHp719a+JPxfWkOQjw5JnEukkqxKV6fqJPDzGrHDJvrkNy1tkX0MN6Z+Olw//0xoyyG
9SEwAH72HyUlbfM2lhwM9N6f4cr+CLxPF2At8ppy84kKN/H+2RDt520oTXKCcGFU/txd8LdCs9qG
3diwadeKrfsinlzq/W+3PUAPHvjHcwRyRb4m4Wv6J0kW7ItY1ox7z91NbPGA481MOKLtCEwm6vuk
sfLsMi7+T/Hm+qsOXlQ9i8Pf9VAE9LWS2byZEwPIYDYtbLm2L09NRsMgfm6PotDA/9WaPtrx/CrM
IMllkwsRz86jBnsfx1s6w2v/gxQFWv0fY8mf1WywsWC+WArpCmvfHO0WMIJtyS/B+XcdiLdfrrJ3
qeRMJy8lhDn9mvRTVYzLXtu6Fv98eAxRiP4hPmT4+kxhTz4CT4cDPP9YKhdzODoL28xWfAYFbD04
Z7nP2BAp3o1FR08u/ctwg8oxDjcRwHkmDHquzKrPjnQBKXv9IMSCNsR7asFA/JqdhHcmuKZg6PRk
6XzKLzz1/Zs3XVZ/rpAcA4yoz12/yPHmsazO+a6cgbZy7JTSwRBhRd31L/KB4M7WXzNJ4paZAsOI
O5FWmQpp6eEyGGXpKkGy2qdqVRuRe0IjzwDJG6clerafsgCAj755Q2eTRVVvvRQw+G+hVjqaFu/+
m9KSJt+0hjHW1BHC4wyHN94ORPERUFukKcxOq8a3C4r5hTOZW3XWq1v7Ks4H7Zwi4AlNCGUKQ0ON
VSZKVFl61F+tBDQk+IqFz1WMfzhOfRJYfalfeqp5HOOIaK9cOhXG2oYdhceL4LDJlhJPAqpAc23Z
G9mCLMh7l3PvdGUWIx2s5Z4EpUsaxWTxxqD4a+cGuaZLzeV55zSCZ5qehwrwRTYvoBZE1+lOXnfi
Ryt8wko4y/GJZL/NuHI8l8tJKmVjS+XqWIN5sWUs9WMNit0HB/gZfmTuuvpwP7gjFuUjS2Q+jgYC
9ppF022c89tfs59OKVOjOQ9s2b2FlXyn4zn9AXI7AYGal0MNPRsQwnnaZJiTebyHcwtZucfEnh6z
9K9skBFs29qlMPNYsFP7y8mzdNhDng3TEgYpao3SPfXwDj/CSw/ObVggf8enRTUNlDfJ+17WwDyO
/ajc27MzTRLyBCCQhUYvMn80lvwSHxWDIL3xKvr2OLMoIAmgIZJG3sJMyhsOPqFxVb1Qk7NcojOn
D11t84xem8WyHJRbm0pbKV40U5U40scS0H5bcMWTEfGT4W0Mt47O181hbfymq/ykV0yIpouFyaDb
tUvUtKWqMknlkUxdllrfasNUWgJUfn8Cl8EV1Z3U5ABYiUNuRr5oKcdwlS7eB/n+UgV71hPGXiii
tFKvLiZLXS9l/eoEDDKLm6/8OksoHEEFzRFIR8skagCp4rd4fSGbOUietH2v8ecJdTlXFP0ex7TX
vh51q5DGduPDyv5nJCNInuPVn9Z9r55S/RGw+ySGAcaPEqaldHWakl5LrzE1/zI4K707/QMAGDAl
HQdn4RCGxESdD4HJn35p8o9hnYl7WqaHBddVyszwX//kjQ4qJolh4qp+txlSxnSJmCs83a+aCvMk
IbAnKPRH3SP74XCHOQ3bziFlRO0Q1JWSUp+e9CxVX0iTOPbgrB+wD9yT1o6m+o45pOEi4yqt1ZwB
6GRU83LP6o8j9UURxZDZ5WMgpNs4xuaPxAt+XstW7JOy51tYRnIykokiQYYg+aWP02kEZ7KL2cif
/t3AkMcRC0iKXbo3c1/h2uNlHbvkqXBOZnmGMzMriXwdE44Vt7izgW2oY3N5IFwqNHPtWi9SS6yA
hcD+oqiZ5YnDx8Be3R5HxKPygh4K5ePLmLR6um0pz3P8seQq1RKFP9ctf/u1v+7BlNqcdEez0X0N
I4X1lXx9dw1MpdfXfG2riDistMNSEH4Rrccb4Y/8cnRL9fh3mO987Fb0uI03HcxJiExzcwHZ9dco
s3vvxZTsaIGr2xmmD+LsMSI00fJFv0/mbMB3LLQfURbbNvuYtBK+fA8U8TOqSRvPYwXdCjv80svZ
ecFEkHhpXJBNTWSfUIzupFvHeVSIxo1FYZEy4sS3rdwokvKAiZK3rnzY+Ryed1c8On/UbN07w7X6
m6hS6lOKjYh+wxgHNswvu8N4sknoUX7Hwp9LBuU8+T0Ca/tOrCkICtK8kD5WkMmpO6IWAXUjK4Z8
/OmRAfzuhQeScqBIQTMuw2IkQruwSdfY/2ev76Y8v5xSi/gzcXVjJ6pNWe8NhZ5pL8vuon9u8D9v
ac2sfrz5UyHorqRAvNxS0nxaWXiYHYmk54FYhWXq/l06uTApLWRBji257/fX7WCJ6JtNeLLcAFYG
ui6Qlw2u4ilhoM33Ba9OQD+hKXM93Ab35owHIBR48oqnZlu/gRs9B7w/mQ9P7Aq6DwyYiEy7zN6P
zIrKF6PEXI2oo5vRRDZlhHjnxlG1qbQvhZImGO8R1X3muvsJ0Z9NyHew0PCSz7i9mW6rY2m1FJBl
jLOuJd9a+SClV8HYSGnNlxIsBxxS4kdb8pJAiZyO1GsyFurgT9epWWxp6MeSTru98ZQ2HxuKRPAh
LAyFLPqo+UCcwRFhd6SEMQhkLktq/u+ZRteg3JfitjOD93M8XsrOOZXAvc8OK94NqeYOeOIYfeiA
Bh8AZZCTK3Xt4QLtJ2oyW6gLSK/gyvC1P9wVOFLK0VxRCj7UL1ENqTGIylLsQV1EDrxvDeHgkr8n
+celZ0eo5oJZQc+yNrl6D8RLDaFfOndjQQuP1VMMLt/r+SCqzoIQpeaPzjqcZ5F2tDjq3vLL3JlK
L72Oet2zPrANXugoDIB6V4zLM77QJB3ICXMRSw3lLKHdoVR1fOZjH7lh6OFJTtre6FJuHv34LR+w
Sc62m9Wix3fNqnF2+9Qp1crzn4iR45vHd5J/GET/E8MKd44F0qOzeLFE7zgwf2+Iy6YZU0LJ7OWe
z0OlZFdrPEAemSaXyLI3Wg2c7W5Ef4UaJISjZfXU+aX/CFAP3KV58g4cgEfSs9fw8iuCFLuLh3Jh
GZg50idBZAseo6HiW0jDA4Nn9S03k0B9v1GqmSWPhP3YhzM/EK26PGYcgF0eivassZQFQSrc6Jil
NsS91pv/HNapigSr2eVnB1wDsPbMOeAWMefmfTJEy770FLL4nJvHH23BcLXTk4vQBAncc/ypOm8W
7K8vIx4OeBmtzlz+HHoN+Ki6SGNYfqwhxJ3Iclxi79j84bg6FlZ/sJmHW3B/BcC+MY8FKzU6WOYl
4ii86/wI6/Ymwxsc/fLpXuJgVnj1G6seQpKpHtSA/+fDWnvd7+23DNdK6HfBGZ+9h1HUSEREwoXj
99Lau/2+L3cctWkmre/U6dbCrUJx+9esOM4lxm0AgWGdwsmiTdhQhm1GO9efcz3nod2wuyLOoRFB
PRHCoU9xUQeiUOHk4A7KAbqWNnKmpYJRUFtQ3lyKzD1zt5ChuiYS+1trXUf0emVBc0RXJeOJM+oy
pdYUCtO7HboKltA1VXkzyJrTAnuRxZ1FiBt3NN7AswsisLqFyQAuddvPGzztWsE/T1mimJzTQK+f
f/Lv/B2HA5evVFXQh51vSrY2ub6y7UStyV1sLz4hRJqfnfYYtn4qKe+hiDORa9CUQSPNnR1nNwVS
OkQkOe7FGwVo2tF2pgxsVaObzuNgR5W00kvbG+HZrYc/VlQXu17CoYAXyKuimeuQUX6IOYQfOtOi
P/656J+ayneD3DdaM4CAxyapYpzyxTtzYw3d3BmLALR36ZccU/VhfYiHYcCtxg9XbjQuCmn0V9tm
VhQXJGWmHnrfgcSUohqw+023UH3zssHKe3HoXWtNxZuFWTm8uBN+FQJWwZg5o1SnFllNmOyhtpJN
XO8SRcSR9ghUC2PkIXtJSv9s4l9Gp1a1m77LFh4HZa3el3/C2W/EGR0B7R2Pzy8Y8kQnfhLd33aj
x06UIZTX/x5oFzGlrD7CuvF5JKo9vOIxzToHh5kdoOD6zjUKUGJYQquc/mE0DMReySwBHVcUIpLT
P0tPzMBnO/rCSMnc9ks+pckz6Kip2rnVsPX+HfAom3uAkz3m42JwY6b/bHCDef0RK/3WUac0dSKM
kEYtrhwBrDcHu2UrE9D4N3TPQpPhltMcgA3rCnJNzhStxgWfSGcSOX489GY3JX51jrPQ4KLwg3Te
uHo9coFgA7zxBD435Ek9ZfJZAcIO0Zt7s2uZwvFyTVmPWSIEW6daOf4f0gxbKYxTM8WdybNJXju9
AuBEu/AVDZ4+JGpSkGoI5khnH625YEMjmDdM7yC1jJKKFINwCI4JiWEAl64hmuHGoqBCRVIgMBYp
hCwZyPZsI1RVFT2dRHGrlaHOioCJ4s9qfl+jXm7NnHKSvxNcZuT+Ubv1PiLUCoGFG+sBAEE7OLIx
156yyQxHYKvnmGVKdSv1JDcqFOBTX70OTB59UidJY5m6HfaEtJa2TRtYd9dfiLW4T+bJCNByHVNJ
BP5PQ906S6hbtLHGTio7Jc/IK25r925Vil9Q71uHrIoeIOuJxTU2THyuDb8th3jMJAWZ28arIcD1
7zvWma3Osergrj5anOk44hmyfHWNmtZzWfjZ8g2mz5sCZf2xhx1wqFFUm2rP++JnqWZWqJpie9P/
FaUflE91AeT0nPFGzJobKS7vxP3YCIxqDXb4W+GNrbrMzqJv62IjXU/5VT55UrYBObNBKr5pNuPp
nl5/A4Sckp8yUP4cXgns9z450Dg8dC2rJeiALt5KoIAI0mqVyz6dmncs3964qm5zvqkhfspebtxv
+/5/HLRk1pKJC/0BEIG3U8PblJ4S3qWAR1ocDE72mQpK1S8J2OpVtmNPWqj+Q8XxAKeFhxNgDseh
3Ys+1h4JfwdhkuL1WuvUWRmr43qJQgrAU1dsla9XqNHMblQy5XDeZddFiARAWW3wQ5mQedn8mA5U
VcD6AFj0+myr/qmfSW0WZomoAlWRHZR8ww60cUN+wUjqZnXcQrMta/v0wrgmsv3Gm8XyHnb593L7
eG4J4D9wit4Xzo8ICB6DhsQ+QOfSpMQ+Uks7P55CB0dzcg3FIehDZWZfWj4jNvAY1gUscTVyYm20
ltt13qwaUWOMqO2BXOxzc3jQ7Wi51nA9iG29RjBhvOs8SIEWaroBNDKCGcQ3HvQk5wLRSMiGq6If
A/12iSm/sYD052pbIGYML2/C6RhJW3M52SyyIXliJtXn3B/si0AgHYfzqT0vXPlxQANLqtU76Uyl
JwP32T30MRjAm6qMdCDKPfadIidlWtpiNS/lxnet2Fgcu2RTx9pSlm5DVmFbm0VH38okdGyJDSIF
p+FEprQ9eDPqoUzNbjd4QlY9bph/Q/CVR7m8dBAbCFdT7pbH6Wdwk7LdzgRhdtDP9jIsKTNNte1q
GMvooCehfU4GiCw5Aa6s4ZZbQSVYuhRYgOHzovGzq1+5wOo7N2JA8vlRYSwwjVyUb2rqq7iWsbg+
JuJapgIlHZCoOngniStpVBvML3CdjisUnPZs7sdb7aLtZRCI8TsyQed5VNTTOv4NXqNYWssW/xWq
6f3VNQFk/gh7GyMyJ3d38QobBhLCLY4hmDK8JEZCWxIL9DN0kaLLviNG2wWKwZL2cD0vxQK+D5M6
PEIAaggXEQmwA138Km55S7ojd/DGbrMb9D+Sj/6WEvXGOXlRpGpFQu+ha0Zx9dB76EhCiH5bYq8w
bqILWA9l62keHeCH4BpTHJg8hCuBw91g8KmUfdeZqhZBGmg+jggKMotw4SoSSGVLhK21Ezgu6kSH
xJ58XYzSKRTRJwiPKrAW/4WoTYupBxtoBdz+SqQ84ip6iqZT0q/H92SSDYacziEwJ3uB05PxUTio
eQqXesLnKDT7FS0PXWpbQ6ZqpzZuwWNroQXXNu1J8npgWoFeQMl5AlAUYOaByxJ9IkIGyYOKvYWA
OgomT6uFDSlbXupq1moQTu5MMxn/ZMWnYIjBUqki5h/yxrMoUH85oCigWxdSG6HkE/Dlp5CORbr6
gSgkUnNa61GlwM8WyTdTAlnPRGGVdb1X4S8CEW5ZGHUyn/oCYY1HKlwtLQyyQeVplakXQCvrJ6kQ
Bg4uyIJgb9c+RoZytzND3ph+muOAgedD8oFvvTx3sNPkT//7bqD5QROXfB/CNgx/tsm0OEgPUtyx
ftKJXDzA7GJhHQNybc4wtemLWBnKgjvyPxxbdEyRdD4wobPkbKzOOTeAMstEFoqr0Y8H7QhkUQam
2jDhUkqJ284W1O4H/XuuB/Vl/qvyU9hoJQcPCgaBGFdq4QRDbpDlmpqlxXrXaHZlgWffJAnQn8Fv
sk4H4Ea0/WjIO8ifNl6SfybYK/5oIAIgUi2Nk8KE1m8gnJUPMXSYWsAeYkR6ybc3C9yJj6NzwSUW
CqJJugNELmiv6J9VPA9PaGQ64c+3pm+cpyDNDHQ1vY1qvj3nEgqx5n0Y39nCsQImiPV/Sg9yh2Bk
HQ4ZMwhLI+nFwK0OZ/zkh4odiDsOBE3M+kMnlZ5BJmXK2t+A59T7AvwpyVEVogCrqtbogq7EyP2R
/KoZIKfyE5vXtjndlUyZjAiNgpjTc1VakSJb07v4Jnou0T2uuBBVLBE8e5fRknL4orW7nwiNGR3A
FjSKy2+CMPD486jawdbxAbwfChXyeCLhOttQScZ5/UuJXKibAEIiWMO0zwi6h0787UrxLIJuioc4
nULkOdY/JKeviefRwjlnZY4q5i8h1F/oMT/HYeWGqrroYovXKcnUxbMWZD+jaopXwpKIKwV/u7gL
ICCVqIDSf8Gom4lbOw1ZcRZKLSyvneRHTfAaqVZivhe1m/wTbLuvizyo5v0fH7nNqAzAgtH7oirl
O09aUTNKpDm720Ay5sPItAEz0pFiZQIRDfWGCHCuuGaXZG0xuyl8ShQxJz/9BEeMVCPhZnOaNv8X
bNe0t7omyZMkSFNPR4U3evzcLjcuK7VEZZdMkX6tka5B3C4bRACtFyOeQCt79Xrriwjp3eDw8Yxl
i4ZnF2nnIzXhArnO3TFIuhZXD15yn9vVT16wMxV0rkzQ2P+1+g1u7aeDNwRT2xaUvdsFLGr61RsA
krrBB/uXlnDPWrMSIoSOLSTC16X9VfDFq7XtK2uA0BmKK5FJeWOI1ArralXwFlj8KdxJ0L25ro4p
IZhykME1I9BoKS3TjfbTDmfX1WVooDH5YBhsp3fnJjyZm0vZ9V7nsz7eC/en9E7r62uh+MrQsnxQ
HEOfnD5I5vsCo4FmTwA6lhGbUO5+59ZQ6busQ3Da/4/gKfWPi7Rx+7Y3AL2HiXlvnKxN32bezNjp
dYjFYXVPdjaFpz0GrP3APSdp3La8UFzXbVhLuwuv0mDPBPScpRdDo2G0X7gso054AFVY6n9p8tdd
5zYfJhmIvj/NqUn/wjbA1Ptn5IjIafceDKqCWE+o9brGUJBbmYQvsYtD4pa83lH8uoKqIULDiSXg
6yxJwmM59viy5qkaOJYrzsWg3wlO+PCkAvqg5HpLKFZUsQIYlmnRFiU2siCw5xh8Lv91KTWQE26H
JygYAC9Di3Fuj9L52dCNMgbtOCerVWI4RqUpIFnC+F3fY0d0urDChvfCB4v5ZfmHK7UQWuUl5DRA
Ncjw2/e3pwmVbyls0YUVrzdizPbhlKDJX7xzvC4K10nrAjnG++RxySdAOFZXubgPzTr62JQtSXmW
IIqO1vKeYP7Zb22j7YH/bXfT/F5cufY3ai23D7tEwC0XTRPsjTnkyjrFZDKy7H4jtCHGqFDihiKn
lzcjRj0nxDEydN0T3XZVLw1ckchidFI80LIRUz5/80zPxLB32RudBu90cckCuB1n8lnmLPij/zE+
aucm3Kwj0LLI/ESxyT4RR0eJrEyPbq9hWnKrwAbHzhPaF+fffQmkrsUci95u/+x5LJP6G4/zY5ZU
42fBuiz8uxbweZF5KyivG516l+EjFp1oi1B96wKupMTLWNO5UC4Axpffk4EKZEEns0gYRwpJIJRE
k8wuG63EMGWNSCTG/RO5z9NxoZktD7g60co/R42CBfts1WLyi+ow7jHsNlPv2xDWQd26f9hJIG0e
TVk9W8+8PqEnJMnsgKAfDu8qnlNGOsOHkqE+0aqrtum7PjdweTcx62yaHJffKPA9+xi5XkwSw90Q
gvLoWjJpXh3ptwi4hIt+bp5SLcz1MgCE3s+B9GMkZp6eji4CZRJ4Y8HsDzXziQLOBcJQbavNtaQc
TKFoacbgnSmdbaLo6XIalSOZIEQbh87hhxV6K+UWL1flpVWVAsJlAajEXmi7Y1H97PKK4PzSN+fr
yJifROBUNzCVFwmnra+Zipb4E5Lcxyic9aLP4yppTbb/i3T4qOrnXLKwuSrhJXSCcTyIRNfCOFlv
XN7teOJs72V0dh9L2Cz+VbtkRX0l6NYasCjX5gO0C9MmgYx+KYUX4dFrpHbbUVI/aeFPSRXeqpDp
Bj9ql3XKb0y+qM3C+ISe74cIUmyZPAsxtspP4l5ZqJ+0B83nubj14d/NJVghYmn7MX91fvjVASmN
lHcGwVvjoBHip3wjmlEjH6SoXc9kZSi06Y86jAP1G1cetsxKKdscQvvIUgoMDbTIh6hwcJVeWzdL
FeU4QV/2aGp2kibI09y/XFAZ2mNG6KrztPsjXWq3ds8FwxjebgVCba+YBkr11MEoN8SQGoQunHoR
wD0amqgzGzavEsdYCJ8t2cCLE6pF55bmrf4hm3BUaEi+H93IC5sJ2FrXcBTJB34BRd3BWFA4sQn8
EHoI6sWL/HNvZS+gmk9tJxOpZdOlBmBvL7QUxs9O7HcdiJgqyWSO2WiYWifPywrmOTezB/3RbwAO
kCUo352IbRcj3TrkIOubd3/438v4D7Ft3DhuapnoCgB3AiCh5BOxLotQ9OLv93+EDKzj/zShPRlD
D59DjxgDs4Iu+g15WT/OKtcR3zlU4vfTWVU8Pr0Rrd9q336s3AfGKPsXXriQ6NZ9n9r5uEGts4dA
CYsfvUEE6TTkT7HDGNd88HhGc9mYTrvIYqnxNJ2Dfxdy3D6py5NGKwO6Z/oHkj6jB0bWGX/iwhbN
OZ8Kc2Y/JJdWFNMlOGHs+2mgWXt6E5z02EvayLNFqqXbzAWxSJ4gVWUkRW1w4X6kYXnUfn/uK9T8
fyhoOAFAK7KnWzDARKpQjPRv4cyZKWEU8ND2VGBYHHhelKiwkDMuKr8qCOHoiTY9LsSSTJ0y3Om5
zPbN4R4hd7Ki1teS5VRo9DgtjemIkmKBmt9AVyH8O7supJ4F7fWQI9zIGnoUPi2/DYYul6u+5iWT
Nnlokkjfdc4WCCICsJu4zYJ/8oFwpYBTtAunbPpcyXF/jj8BGbtrurRFhOc9OHpTS5riE7CjTD41
SMNvyBkzXhdBL7s9fFTUr2SwP/m/pdiYt1Y8+cPm/1EIyP5d5UbuPMKsZl3LDwWXCMnKi/h3PD2z
CGJbKmdAx1uch5biRyNx6w3CCPCangeKeYwHKLHU3QjsWtCBfoAkwR+YArHSuJu8Xvtd34qhtsiL
s3yC9fez7iMXGfqasfXLzwl/T1pnQLZ2q5XYcSmbjHxP/9A27xwKycajveYOqzAvM3CRfiZE8eY6
nI0NQlJ53WwU2oTg26Z6QRQe3XHyzBwou5E1nBjHU2cxdKlVp9DtJEqKHiY19jXJ15FW+qthh9G3
7MbDqD0hJC4kwh8UFZkjzWYM6JzvLGwdsQBfme8bOryRIVZ67tt4bFVVLM9FXD4pW0GJ6ORp8Tdi
4nJ6S3aD+mYkO9ofUAzhp1lc820p3nSEDgqvhWKK+V8arvQArAOVqlMsfcrxjTAftF+gupUsk4Uu
x+TuA+NA2OPMbOvrKHF/9q/bRDZFWAK1pqkR/ayn+Hr9aqdjxKLKLgWR5GJILTb6RvYPQ7C4/P9u
ORGmHF3yzCa8y0jOFH93CrTEfxSjBF0EiTlKkF8k/2JU0TKPm5zvg6slp2L/EEy0ydkfd2uVivJM
qWFaC71OR8sCvnHywV9Rqc/3Z5M2hIVDYOyota7W0D+EpXlGCDVDQTpNeGWmOLMqNfWr9mWdkNpv
GYuGydcdMKsPCIlXc1LGOaspNv21aHliav8RjakyVwcswmUhf4ZBHyByl3pyxgpm9fvfdXUC4KzO
tu4VTi7sGKg3DdJhVLw6k/2u2icZUQJBG06UWsOYro6lLEAa68zHBoXCTBDX1LdBbB0EpvjZGyiV
uRE+GXFmHrA/q8FCObD20V/4gXKXk96VrBgMlOCPfO4TJLu2BNdhasrxouG2R9Tf4ha3DpYB5Wuc
u0SGgldtDs6NlsmbqCFk10eYfWxWmYr7FmwhHlxzl9F8T97rG2QylnqUtYMDx5M9tA9+oLYxWA8y
A61+YQeWWM79SjgKWslaAG554is4whtWWKHUsHr1n7NYjd26Xge/QVwVvSQh2RwbfymuNEN/70nO
f5l1YSAhk1y/G3FFQ3eccWGONkdgA9dS9HZQR7SD++bYaL7Y31aVlOxtswK1jcHpFCTFWeChLhpk
DhoqBem38sM9At8UHDlWF7FnNAdhktmFUDxRIqNrYrFlhR5Ay5crXOKjDrTyb8zQYmAalRw+P3dt
9fkWxL2T6HAMYBjUAvwxPOx3FXGcW7dkxacjYVhZ47bVwupVqkgXiYkIDfmm9tjzFNPCQnIDtgPR
22s3BLR4rzfdd1W6ClCfGZ33+Lcvtdd9Ki+ToBL4StuX9+m9nY0eq/rislQWncvUWRVJfHsBK+JW
b3dfPRlF4ThV5RejfaAqeMycTNOLFrA8X+xl3fZkznaeVNrgkR4kwoDX2c2Y4oUWRxg5an9f6XME
h5UtbZe1NWmkPyew4JFdfnNc+OItFmUqcl4XQxzLtu/yeQzsZyPgKfKbrZliJk7r5SqcKVjI+1/u
BssgQeOwTpFRPsa2skTlRCvfxpFwBXYQOkncuApZXm3H9ImD8i99TkdhAZ8NWgiMGx7rV2J3CCI5
HsIp3c31R1wqeIc8490LHA9lTaqll7qbFAsnlPCl3H4sik7s8zflMICkU+efqDw7eZ8f6rqVVVmh
MVUYBnN97fby00WKxxnfX/5ZjKDrN6aiFvfS8tCxuEgaYRk9kmkIXugVN6NzveA3HqSOhYMhKGKe
JFqOwIO7XaEuFPVFmRdwDreq6VIIsQvspti8FGzLp515iW3yBgfqUPz9yQyIEyzKSjfIuGcnc+Nl
53FjdgfO8sHjhl27ZrqtLlZXmHNt1QTIbla6eWi4A+ANmMq1Y82B1nJa/3DKWjO8O8ikeS55lE9/
rBW33a5rSwc91N8sK9MH9ltCWqCHzi9hh4nLPXYs0p63Ba1BX2BTEdHAMiV/ok7Gk3mE/xrbysXB
OsHxm/PTXLq1Oruj9e0Flq22LadcL1O/ORC4JSBOiiuM9gr4TqV/gDQtqKIIrYkM54hiOOsqqolt
2A0D6WDStP4Izq+kNwgo0WAOXA+JYOGHTHHRtkjSjMynoG6G7DtSNojNuPwXQEGyf2gtzfNWlyT2
XjOd44j92KD+xypnrDyiuuF5/HDY/EZqe/gEX7eB0n+d8POCNdlF0wY1m7sTcWRKbBWi+C4uj5nC
B0jFvqs+NEuIq0GN2tFo+Ec5OXuEP6EMYQGl1ODp7STVcqPqpma0n1YREle+zk8moNQW89cr0XwL
fAAaYcVNtR8pt2SOPnBu1ud25wfn1rf7gqp26RjKDz3HUT95C5RC584NThsfxQKdq5N1R+TRBfbA
LnMrcp9/gs2ZbcUq1Csl0IU5KbrWEzyG2Jkhrv1u0ZtToppSSSL0i8x5a5XjjkFQH6v5b2FdX7IJ
vboF3oVcuM4hjOKvru6TxveJKkRXAKn3T85gpZ6tqn9lWwIB3/VBbRBTulbAycK2aXgR41wbOmXg
QNMq39AVJRBU+wOnxXZr7+37NKgMNnKWvvc09ArGGJLv+Z8L4TP45esWft8psoczuZxBQjOBePHz
HnfM9/zkXAix763TqxsfjxCJJO/wC44vt7vQdUsZyVRYVoOgvnWad7bYV0tAORl3NjzUYDu/7Obu
WqBkovNas0ezzlTAzKuzlo5uxBonTn05kRcFsil3TfNLmAyO1pvn7UxNpbytHH9aAgi8kx5iyHjI
icVFxq6wt3jZ68/S36AKm2Naq1kZva+2TmU9hiSPQVVKpE2EnC2j51C+g2m9/apvF9lg1PQG/Omn
0IjWfrKAvR5i1MY4FRtksBpFRmm6vTYYcgXQohY4UYylbtw4v0ehzx2zWObmMXQkKwMRPi4tmoh+
q3pjDIws47VK8TWzDXuBY0GVQ0cty4xAUtzKd+NMYMqlzZxnAFEpu6jhaQq6w1LzfqWZnbl+1Ext
1NJJzOnKdPXbHlTD1DVoKPiK/9lF6jsvBmrphNXTr5s5JCLeqR0pENXQjtbZJZg8NpqEJzpiEEPC
MgiDFdPFY617TuVFl7NyyUehhnBo58hv4nU58I05y3YgWZ9eB7j2Pa2tlFhqo2b0bV3Wu38WzmBg
wJMu3+aKl2WkH9KRNkmt3gjDQSDG05gGaXl/6YKShvF8dfZ1sKiXXldXHqPH3Mk9TovBoyQdLGFK
HW4NxnjJDBIar/Qq9w8/gIlFAfiM1EG3D7XH7YhK+8OVXS0edGuuj2qsHaOAdp4HX4qWum5KqRvF
vYpmT1YLBHzUJ+tE/5oZUkk9cVP1/KO44APxW6dKTmbGj5HlMhR/DdeK+cRGlMAjFo9BcDdL2k+j
OaREG08x4yWQ/7Z94F/jlNUQeZiO+ccDNPVjmqNk+k3t5xtANrk8PesyWIs6/kziY/mEC9ozlx4a
J23X7ajw1HBSchZGBr0STwWoLZSz8yY3wfaqmO6j3ofzFeT778MV5efqiZKdOJqNjvQjOqEBpS1O
gRPjdQN14G+vee50c7cOmWF8rpUErCEJbtRotTUsZ1zewOs6b1ALGrpT8dZ7zi/2SWKsmn+AvAKN
4PzVI+0fJEqfYc9vuaTwPNb6o6rFvfbpGw5MOBCYUZ9XqywtiyzSlRNbECgj59v3X8GN2OOZmElV
V87n29XnqTND0Rb3EprztQeoMLMHFSKVPMkPzbdyOPMsDU2rr+tkD/sHPQpIDze3cIoQiT9PRrQF
35sD0nRiWngPOc4VxIJE9h2ITen07Rn1PQy31vcOVn0HCYBHpZa2fiJ4lU1YRVzyVZfuGDldE0tA
skEDnkOA3QtsbofmeNZIG8H5jD4vdXW+tk1Gb7facgTCLt2aL5K/zXEQ348EZTSFTgIxNeSi0JJS
6jGYW4/Ye3FLPeUuy+ZrFF8+ZAy8lp5WaiFO6xYQrRrR2K1Qu6faPBUD+RQSF9rtKHwSwLZyFOYW
A+VYQUUyNadoSx8tx9Ll4d9XBdOoDxHEgHd4nQ+N/GnZpOlxmoTK2U4z2TRFQdUJpFLAje2x7Zhy
/tyEc0VZ721GQ7VdIjevzlyYrZla2Mol3eELzY1wJrFGa/22gh5HN6pPvoMAUg/qLk46b5E6CrIE
VLetU/uLZZf1MMviF+iyKXWtJol1MUbHOVUGFrUb64eYirmuP5WylzxyRZs9lL7y1Uj9xeBJW13F
CnSMn9Z9szQVCtYNzdvgJN0h9C2zF60bGErQO9IVjG6ZajTfZttjNP3gB/dUunKBtjPwd6CSQDF5
9MRc9x2CAQkWj9oiFFZLLykegY2erht7tHrduDP6OUvsxynJNUOlhJb74k4Zha5aTl7appcs527a
IpIy+01oKZ7bpLDDvRDpT8aooRVVg/63KQWJpg/ZjfE+i2dpeaOlVHUcXr3WFkQuT62enDNFs6kr
m7TpDBlr4U3x0IRGnE2zburjcZJ5w/MLyt9d+Pc=
`protect end_protected
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
iisr0ydwFOm3eepmhOYSaxO3flYpViRsLN97vKyw+ai+x1TubmaH8qRRwK/QFeVsjlGTFdxookcr
olQwv0bmdw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
dJvTzz+PoD3n2Ot9SgKfpEhIshJxklhDhS1tYcrcmprfs5wN+lN+5Y+o9jEEql61IqDkJEIGu0xp
zaDWEeMqwkFuovmZnp/AnbrHb7R/19zPRtwSyZ8+VQRLsRMgscwutXu29fTUST6Ribitutae85tQ
1okc5mYK0mcSMIggcMg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
ZijKIWnBSOuwn6R4ZrzJp1qaSPGZMrP8GTp+SV+Sn9xEivGxLJtGM40xMLXxiYuxIopDD/A1usG6
HkSoNT6OzxHJWKkUEyyVzrZuJdNHJ5q3s3y5LSNY7eMxN9lY4/gygh7aVIBAO9YWzsWu3HLtrHA5
2vsUFQxQdkG5OTLVP1rH68P4j/dhqr/LVHw+9H76c/knGyalpHLRC7tnHQcfuezFJWlkzaNGHfUo
b5cE1YTvtdlZVmw2sVG/GbXIRi5fq3+Okdy+JgckZ4dVWbI20rfa9LkI09/kwD3anyrnovVQVx9h
F0AxolVKVVyWNAaSu1fvXllqzrdJiRLbdnsq0Q==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
LUajPw/jRTLlmEKb+9YylQ2jxw4jlSx/1GGaY1wFfWFdMwK2p0xvQMjui8K3EqJF0fnb3QNWuQDl
1vTtf04vcOAHkfRCeW7Mbp8qeUTtAsflGIPJDxHfVU8ZKprwANsENc8LVrpJ0WnjDFQIzJw7LDqc
Jj2TofWjKprdxXsMnu4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
KG6kiSPrd66zvVpG96eKD+783ebVLVFNF7pXgq+rCyBBRoa0N9Hp3DIWK5125mkICodI82zuSq6k
C8aCiPbDiv4tiuIn19WDNNPL4ncknL0KLZTLAkq0BIQIsnFNRaZegM9aXOdMYGKYLpnjSD9KRWRt
WPXPZfwprSu2D7PeDZMiij3MY+cixttgVmNfcx9Kkmvg+1B5sTSDTVs3fqpJBBO1YslTmxyJAIC6
uDuGqvQ1138z6f4f+f8vMXratK1Ypo3jPPb4FTNLYJio5Vd1Nbpl9kRRtj801Ie0GGhbggK6IXJx
785o6wX6g3tRyoHXGJ4DGUmWlIHATg0KIAflYw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 13424)
`protect data_block
rEtV4Bm3SmvVbKq1runp2SaaO1GImraXNQnz2t97NClVhlTBGZ14v+hHArmsTHZNME/QWduIEcCL
I8GdWPb/f0NXI5m0D8vUM2MFHCnzTFi82f0pjwFGBVpM7cHKBa5QRX5K/e5A/9KwgbwYV1tKqTXG
aWyx6JRfuzQINO3rQqM+n/1b6LSLygDM1QuiPthpMFKV8IfsVkaLDVqcLxH9/n7C64aisv1xK+OH
WhYRETSZok8+gbvdGdr2+VsE64ALl3DavNBK4S7IOGP5YtXviHmw+Qb/lvl6m+RggRYmTe1A6B5r
pghgGDxK2gS0ItU55quFmZMEuEH+bwLuaJA0/UWR19oWnbcTZnsCqEeN/xbKUzS6blm1K6RPZtYe
WSGhjFl0cKHEQe9DfEazTm6tS9mJ55lLbSuwE5o03LDGRapxUdSR0IiKy5C5UP4genzVw3zearva
qPWmPeGZcAEyFioI2o4OWQP+8mFdbza1kBOuw4BP76P2c+ij6wbxXAWVxtNmL8f6AgS1AV5SqIO0
ftTCve0JloVh9kpHsbXE1TS45+y0IuiC0N3a8PAEsXa/tnLsnAydpsXIQwMLXmgKfoXKzabAHHdI
XZJd/NxD7+xY3aINMVaO5eSSLIdjkYZIeqm6qf+x2eNd9v2nue3I9rjHkjMBIty9wqDCI5HznV19
h0aPmdRn9t7Ft5xXq0GXqSl2I9ZROoM4hg3RU6TCVY4IaDkErgP5cMhIwuHsntmeWvsvkZFygQtU
9TUaf90O9HINFkrdIHf0ZCgtCgUw6ffQNPAkw/6MaoKxm9wdczGi3ur+eyRvSLy7+LQX/dOqvXKM
9UFNjkQk392HWfkT8aaXacuJgFT4hmoEXDGY+tSqQrQRrPmelj+ksf3PcI2r64RSTjiR+9HNqWqJ
jPJio2xgGdQdGrH+UewLz0ySmNDYmqxIdyqKfv/B1BYMUpGd+l0eRCp0RwjP6nt7MKkBishuJTL2
2kpCGDQ4HELrlovnj0dMihRpFZAIpY55DfNVE2hnbkHthyDrEXapmovyPqDFel+HKDdimVyeM8CR
DKl0D2+OZK8XWAiVk9Ve6w0rONvwf/XvaAkgxa3rDJQo/8g8oiGRq4ku5l3OZUKrPVRcjVNCxHRq
81RLF34Ztt0FyGvWgFBPXPwl/QfIQcetnIv8BBHDyYvjjUEJZxJ0yVIBqSipzmyIn34Kt0GvhgJJ
oXsivJz4IQp2WiLYnKzv7NuBWYnOF+M/H8eFTLS7ynV/b0CRf7qayeeaKYL0uv9mUeXbILs7F9+8
XkemV9ihHFfHS04009LEbIzG2O13pEZ78n4YAi47TmCv22T8/Ve6sSAGowqE6FfeksCmQ1+Z98YQ
uXIyCDvF0dlGJwZxogjNRbjyCBj6OOagNPhSW71GcVdRv5XSPoZsF68V4hWQeNb+itDo7ZPtZJoJ
YzLjFDCWp+2G5a8+OtWGetlJNejx9rEDOQvPXNhCi9xzzzSvIevRpnt9XX8uVwzzSJnKhI91LgRg
ID2cjEMis7S70eKGvR2/KBOhU/KAbsgGALtSpbd8HPFqo4CWuxEHCYImqvt7m+vI7jIEpXbwjtx8
QWNgKL8RNSViXrcj5CsXvOI28Nk2V+GZ8jr1/8I4R/Yns4Xfj1TTWzVeNCNHbazn1nufigCGV4Vl
qtDHRGZpM2GzgWRsMj5tsZldV3pp52C/Dpr/92KUqWKMf/mZbYDJL1X0X2Tw7iboFgBgx1miq+ht
zrLMfkmBPAPakC7uTHv8wdz7HICGyvCct17zvGp/b+9c5KI7lCBCd9jn5PTW35q5ksO4eC9R2AqE
0xJmD9GKB17q8Jk7vlAMs/IJV9rgMDnRfyFkOl4hl2S45SaIY1ObTSNIHJYg+rp/nN6BMaWKrR+7
O6t2IjDTrKFkfrU0cMF3G7EiQSf6RI1d8iyqNJLJJ3fbFhF7XLnn/CwlkZ/03Hwn1nJocabXwbc2
9Q6RrzrxLCWMZVoXaUEBQvapxENHsyZOrmSevUQnuCknCx9Eh/GwdP2bYVHxXWg7ySdjQnVMtR4v
qT7n0yJuHI0ite3a92Oo/MBdlgCwEcxfvgz0ILRIK4wFe098lGOX0tVEsLdEUijEAeQR38bksd9a
fuwZzPBvMZQ+FON4CQYrDg971r8Qz89ArQjVxWF7TdD0Oaq9vaUrLocNzIw9AcIy8rWaQnwTR/K0
PsXLapKx1fOSZnuztuMHoRXGaqZVlZJGs22/GiJA9y/IBflmF5GNFnRUbXVT8r+FfMb7zIr8eP+b
OcPNp6F4kqt/b8gae/9JOIopCuWXpu5kDe0U5aC2qmvMuYbNI88aUx34i3WHd8NWKNbdtGDaQ8nM
iyuSX4j7EgwTOuBR/iFM7rZAATM59ZFv+9wRq8hbXVvfsBp13upya8YovLN1O9OWrzxUWym9ZPN1
mDhMT1YgOqVRaJ2ADyjP98UghsOXt6ybu9jGeEndP5T4mZjxZp82OMxqqS6VolaMbGRNPa271n87
65g6Q9l7RYtOL1PjdBOlgNpUdYZwxJ2EGgI1wPnrnuUiZ7sdhpuFkhJDdh2mHYlIUZHAsriLKEHR
XOdtU+Desuf1ojV6OryxMP052nRo3DfSj5+dKgSFWVXGLiS4Q5dQxDHIvUugnqZqf+FK5inrMME5
1eHWMPkrqY3H9syJMZ7RM9SwYc/zjL9fOqr9mE+npGx50NODLrgb0FydLIXRotOtI+YSbZHKzsKt
xoZNcJJ4GasWF69GNvRenQ3kp1eh71xjJw5a0KZmhsJJXThZLqSzb/sTisTU8jCaMh6S6ag0knK7
jonbXo+dctsmQfLpvLXHN4TNqJnY6alIH0HnsTz7EklgiqvaLbFn+25uUJSNDHESZG2BaAtNvG/4
WuvQCSLWeuJpsrPd+06Bzmmnlvn9InJZhGDVhnZlfj7Kh2PolkMjpLgzqH4f9hm/7zH7o7msjyvZ
Rj/JnTghr2ou7m5Ayp5K+yFEUt/y9WWmqXlKOpf12P8RITbx8ILm1kWRqB8L+xfF1r2HXt+av43O
pyKFj4Kq1FZckfpg2It+beWX2P825O6hDubEjA2RyF/zyyc3lMSS7vtAQMEOEJnWNslP5r0po6TK
F5+Ikch7kOxVShNh4LWWzwFtJb9SBv0iFIezeCGrgApE2blMwedVwOdpPdPvsQjNRYc8YG+dStcY
JUIrNMdc6m5qSEWO36XNGXLN/ZrjKkZcCr+z5oN8Oa4cO8jxqZo5bZDRVUh4VXM8a+hHCiVvWsEG
HkxV52NFazh7Duhb2Ix5qYigebEWfDnA3frHeY+lRAIE3+X/YoDjgbPuOqgwawkAvhSCeNbNxuTS
T9ZzmE8PWRbDowhElwhdboesSdX9tyyp7yCSM6fxKFXbUrPplwsSNsMYsJJ9grw0leD0bx4Cd0Vy
Y8dDayiLLROqmsdsKe7b4i2o6u8A0RQrPB31DrVO/yPiNygxChVesembc822gDnOAlf6FO502nEU
ItbE4EyM6ZuRk+69RSoT+2AZGRndh55WMQYb6i7ALzZeSttxOh6V+LV5SNYYdeQouPNdd+N45DZn
niJzd/11g0AFDHSZFxMK9p0VsOmXbAPFEjcTvMS7PiMwhUsav6ZfZjkVwz4X9s1v8DCZpNbKSq88
kGJQIcZYRdAPuD7V1zvdo0Zf6leEwpYg5lACMpJ8rGWyLPBrYD/CsWB0THjSjjkRntpZXUTF5Sq1
IPSYaQtCSAHZKO95giPeqw3zw2XQ5ci2o+t0eS1YvmSPlvMfZRnkdx98t2mA8ABd64gljY5f+0O0
px5Pec1R5VTiPNgghdEJlgrPqQxSP7vDXo0dtJmtqeP90QCRgaOqEt27wpqzv0KFUth0XwtaJeQ5
dejR/hEOliBmBscgJkx0gBF/nLybnTcQ6xwwOe25uqhvJIiepSDJE4ICrD/MSurrVfozreQGinSL
a/tMurSZF67eavaP5tFe2G44AmkmV4WBRnOeWOW2dJ2Q1sYHMUzfnWjdSw1sJJu6+Y0fUowVqq0Q
K2lcfV1v+sdb0adNWmXRoPrjCpXnMpWUyUXWCaY8r49ipi+4TCdxE4p/IUZfO1aumt4+xQcBT0dh
t1WR18HGPmHp719a+JPxfWkOQjw5JnEukkqxKV6fqJPDzGrHDJvrkNy1tkX0MN6Z+Olw//0xoyyG
9SEwAH72HyUlbfM2lhwM9N6f4cr+CLxPF2At8ppy84kKN/H+2RDt520oTXKCcGFU/txd8LdCs9qG
3diwadeKrfsinlzq/W+3PUAPHvjHcwRyRb4m4Wv6J0kW7ItY1ox7z91NbPGA481MOKLtCEwm6vuk
sfLsMi7+T/Hm+qsOXlQ9i8Pf9VAE9LWS2byZEwPIYDYtbLm2L09NRsMgfm6PotDA/9WaPtrx/CrM
IMllkwsRz86jBnsfx1s6w2v/gxQFWv0fY8mf1WywsWC+WArpCmvfHO0WMIJtyS/B+XcdiLdfrrJ3
qeRMJy8lhDn9mvRTVYzLXtu6Fv98eAxRiP4hPmT4+kxhTz4CT4cDPP9YKhdzODoL28xWfAYFbD04
Z7nP2BAp3o1FR08u/ctwg8oxDjcRwHkmDHquzKrPjnQBKXv9IMSCNsR7asFA/JqdhHcmuKZg6PRk
6XzKLzz1/Zs3XVZ/rpAcA4yoz12/yPHmsazO+a6cgbZy7JTSwRBhRd31L/KB4M7WXzNJ4paZAsOI
O5FWmQpp6eEyGGXpKkGy2qdqVRuRe0IjzwDJG6clerafsgCAj755Q2eTRVVvvRQw+G+hVjqaFu/+
m9KSJt+0hjHW1BHC4wyHN94ORPERUFukKcxOq8a3C4r5hTOZW3XWq1v7Ks4H7Zwi4AlNCGUKQ0ON
VSZKVFl61F+tBDQk+IqFz1WMfzhOfRJYfalfeqp5HOOIaK9cOhXG2oYdhceL4LDJlhJPAqpAc23Z
G9mCLMh7l3PvdGUWIx2s5Z4EpUsaxWTxxqD4a+cGuaZLzeV55zSCZ5qehwrwRTYvoBZE1+lOXnfi
Ryt8wko4y/GJZL/NuHI8l8tJKmVjS+XqWIN5sWUs9WMNit0HB/gZfmTuuvpwP7gjFuUjS2Q+jgYC
9ppF022c89tfs59OKVOjOQ9s2b2FlXyn4zn9AXI7AYGal0MNPRsQwnnaZJiTebyHcwtZucfEnh6z
9K9skBFs29qlMPNYsFP7y8mzdNhDng3TEgYpao3SPfXwDj/CSw/ObVggf8enRTUNlDfJ+17WwDyO
/ajc27MzTRLyBCCQhUYvMn80lvwSHxWDIL3xKvr2OLMoIAmgIZJG3sJMyhsOPqFxVb1Qk7NcojOn
D11t84xem8WyHJRbm0pbKV40U5U40scS0H5bcMWTEfGT4W0Mt47O181hbfymq/ykV0yIpouFyaDb
tUvUtKWqMknlkUxdllrfasNUWgJUfn8Cl8EV1Z3U5ABYiUNuRr5oKcdwlS7eB/n+UgV71hPGXiii
tFKvLiZLXS9l/eoEDDKLm6/8OksoHEEFzRFIR8skagCp4rd4fSGbOUietH2v8ecJdTlXFP0ex7TX
vh51q5DGduPDyv5nJCNInuPVn9Z9r55S/RGw+ySGAcaPEqaldHWakl5LrzE1/zI4K707/QMAGDAl
HQdn4RCGxESdD4HJn35p8o9hnYl7WqaHBddVyszwX//kjQ4qJolh4qp+txlSxnSJmCs83a+aCvMk
IbAnKPRH3SP74XCHOQ3bziFlRO0Q1JWSUp+e9CxVX0iTOPbgrB+wD9yT1o6m+o45pOEi4yqt1ZwB
6GRU83LP6o8j9UURxZDZ5WMgpNs4xuaPxAt+XstW7JOy51tYRnIykokiQYYg+aWP02kEZ7KL2cif
/t3AkMcRC0iKXbo3c1/h2uNlHbvkqXBOZnmGMzMriXwdE44Vt7izgW2oY3N5IFwqNHPtWi9SS6yA
hcD+oqiZ5YnDx8Be3R5HxKPygh4K5ePLmLR6um0pz3P8seQq1RKFP9ctf/u1v+7BlNqcdEez0X0N
I4X1lXx9dw1MpdfXfG2riDistMNSEH4Rrccb4Y/8cnRL9fh3mO987Fb0uI03HcxJiExzcwHZ9dco
s3vvxZTsaIGr2xmmD+LsMSI00fJFv0/mbMB3LLQfURbbNvuYtBK+fA8U8TOqSRvPYwXdCjv80svZ
ecFEkHhpXJBNTWSfUIzupFvHeVSIxo1FYZEy4sS3rdwokvKAiZK3rnzY+Ryed1c8On/UbN07w7X6
m6hS6lOKjYh+wxgHNswvu8N4sknoUX7Hwp9LBuU8+T0Ca/tOrCkICtK8kD5WkMmpO6IWAXUjK4Z8
/OmRAfzuhQeScqBIQTMuw2IkQruwSdfY/2ev76Y8v5xSi/gzcXVjJ6pNWe8NhZ5pL8vuon9u8D9v
ac2sfrz5UyHorqRAvNxS0nxaWXiYHYmk54FYhWXq/l06uTApLWRBji257/fX7WCJ6JtNeLLcAFYG
ui6Qlw2u4ilhoM33Ba9OQD+hKXM93Ab35owHIBR48oqnZlu/gRs9B7w/mQ9P7Aq6DwyYiEy7zN6P
zIrKF6PEXI2oo5vRRDZlhHjnxlG1qbQvhZImGO8R1X3muvsJ0Z9NyHew0PCSz7i9mW6rY2m1FJBl
jLOuJd9a+SClV8HYSGnNlxIsBxxS4kdb8pJAiZyO1GsyFurgT9epWWxp6MeSTru98ZQ2HxuKRPAh
LAyFLPqo+UCcwRFhd6SEMQhkLktq/u+ZRteg3JfitjOD93M8XsrOOZXAvc8OK94NqeYOeOIYfeiA
Bh8AZZCTK3Xt4QLtJ2oyW6gLSK/gyvC1P9wVOFLK0VxRCj7UL1ENqTGIylLsQV1EDrxvDeHgkr8n
+celZ0eo5oJZQc+yNrl6D8RLDaFfOndjQQuP1VMMLt/r+SCqzoIQpeaPzjqcZ5F2tDjq3vLL3JlK
L72Oet2zPrANXugoDIB6V4zLM77QJB3ICXMRSw3lLKHdoVR1fOZjH7lh6OFJTtre6FJuHv34LR+w
Sc62m9Wix3fNqnF2+9Qp1crzn4iR45vHd5J/GET/E8MKd44F0qOzeLFE7zgwf2+Iy6YZU0LJ7OWe
z0OlZFdrPEAemSaXyLI3Wg2c7W5Ef4UaJISjZfXU+aX/CFAP3KV58g4cgEfSs9fw8iuCFLuLh3Jh
GZg50idBZAseo6HiW0jDA4Nn9S03k0B9v1GqmSWPhP3YhzM/EK26PGYcgF0eivassZQFQSrc6Jil
NsS91pv/HNapigSr2eVnB1wDsPbMOeAWMefmfTJEy770FLL4nJvHH23BcLXTk4vQBAncc/ypOm8W
7K8vIx4OeBmtzlz+HHoN+Ki6SGNYfqwhxJ3Iclxi79j84bg6FlZ/sJmHW3B/BcC+MY8FKzU6WOYl
4ii86/wI6/Ymwxsc/fLpXuJgVnj1G6seQpKpHtSA/+fDWnvd7+23DNdK6HfBGZ+9h1HUSEREwoXj
99Lau/2+L3cctWkmre/U6dbCrUJx+9esOM4lxm0AgWGdwsmiTdhQhm1GO9efcz3nod2wuyLOoRFB
PRHCoU9xUQeiUOHk4A7KAbqWNnKmpYJRUFtQ3lyKzD1zt5ChuiYS+1trXUf0emVBc0RXJeOJM+oy
pdYUCtO7HboKltA1VXkzyJrTAnuRxZ1FiBt3NN7AswsisLqFyQAuddvPGzztWsE/T1mimJzTQK+f
f/Lv/B2HA5evVFXQh51vSrY2ub6y7UStyV1sLz4hRJqfnfYYtn4qKe+hiDORa9CUQSPNnR1nNwVS
OkQkOe7FGwVo2tF2pgxsVaObzuNgR5W00kvbG+HZrYc/VlQXu17CoYAXyKuimeuQUX6IOYQfOtOi
P/656J+ayneD3DdaM4CAxyapYpzyxTtzYw3d3BmLALR36ZccU/VhfYiHYcCtxg9XbjQuCmn0V9tm
VhQXJGWmHnrfgcSUohqw+023UH3zssHKe3HoXWtNxZuFWTm8uBN+FQJWwZg5o1SnFllNmOyhtpJN
XO8SRcSR9ghUC2PkIXtJSv9s4l9Gp1a1m77LFh4HZa3el3/C2W/EGR0B7R2Pzy8Y8kQnfhLd33aj
x06UIZTX/x5oFzGlrD7CuvF5JKo9vOIxzToHh5kdoOD6zjUKUGJYQquc/mE0DMReySwBHVcUIpLT
P0tPzMBnO/rCSMnc9ks+pckz6Kip2rnVsPX+HfAom3uAkz3m42JwY6b/bHCDef0RK/3WUac0dSKM
kEYtrhwBrDcHu2UrE9D4N3TPQpPhltMcgA3rCnJNzhStxgWfSGcSOX489GY3JX51jrPQ4KLwg3Te
uHo9coFgA7zxBD435Ek9ZfJZAcIO0Zt7s2uZwvFyTVmPWSIEW6daOf4f0gxbKYxTM8WdybNJXju9
AuBEu/AVDZ4+JGpSkGoI5khnH625YEMjmDdM7yC1jJKKFINwCI4JiWEAl64hmuHGoqBCRVIgMBYp
hCwZyPZsI1RVFT2dRHGrlaHOioCJ4s9qfl+jXm7NnHKSvxNcZuT+Ubv1PiLUCoGFG+sBAEE7OLIx
156yyQxHYKvnmGVKdSv1JDcqFOBTX70OTB59UidJY5m6HfaEtJa2TRtYd9dfiLW4T+bJCNByHVNJ
BP5PQ906S6hbtLHGTio7Jc/IK25r925Vil9Q71uHrIoeIOuJxTU2THyuDb8th3jMJAWZ28arIcD1
7zvWma3Osergrj5anOk44hmyfHWNmtZzWfjZ8g2mz5sCZf2xhx1wqFFUm2rP++JnqWZWqJpie9P/
FaUflE91AeT0nPFGzJobKS7vxP3YCIxqDXb4W+GNrbrMzqJv62IjXU/5VT55UrYBObNBKr5pNuPp
nl5/A4Sckp8yUP4cXgns9z450Dg8dC2rJeiALt5KoIAI0mqVyz6dmncs3964qm5zvqkhfspebtxv
+/5/HLRk1pKJC/0BEIG3U8PblJ4S3qWAR1ocDE72mQpK1S8J2OpVtmNPWqj+Q8XxAKeFhxNgDseh
3Ys+1h4JfwdhkuL1WuvUWRmr43qJQgrAU1dsla9XqNHMblQy5XDeZddFiARAWW3wQ5mQedn8mA5U
VcD6AFj0+myr/qmfSW0WZomoAlWRHZR8ww60cUN+wUjqZnXcQrMta/v0wrgmsv3Gm8XyHnb593L7
eG4J4D9wit4Xzo8ICB6DhsQ+QOfSpMQ+Uks7P55CB0dzcg3FIehDZWZfWj4jNvAY1gUscTVyYm20
ltt13qwaUWOMqO2BXOxzc3jQ7Wi51nA9iG29RjBhvOs8SIEWaroBNDKCGcQ3HvQk5wLRSMiGq6If
A/12iSm/sYD052pbIGYML2/C6RhJW3M52SyyIXliJtXn3B/si0AgHYfzqT0vXPlxQANLqtU76Uyl
JwP32T30MRjAm6qMdCDKPfadIidlWtpiNS/lxnet2Fgcu2RTx9pSlm5DVmFbm0VH38okdGyJDSIF
p+FEprQ9eDPqoUzNbjd4QlY9bph/Q/CVR7m8dBAbCFdT7pbH6Wdwk7LdzgRhdtDP9jIsKTNNte1q
GMvooCehfU4GiCw5Aa6s4ZZbQSVYuhRYgOHzovGzq1+5wOo7N2JA8vlRYSwwjVyUb2rqq7iWsbg+
JuJapgIlHZCoOngniStpVBvML3CdjisUnPZs7sdb7aLtZRCI8TsyQed5VNTTOv4NXqNYWssW/xWq
6f3VNQFk/gh7GyMyJ3d38QobBhLCLY4hmDK8JEZCWxIL9DN0kaLLviNG2wWKwZL2cD0vxQK+D5M6
PEIAaggXEQmwA138Km55S7ojd/DGbrMb9D+Sj/6WEvXGOXlRpGpFQu+ha0Zx9dB76EhCiH5bYq8w
bqILWA9l62keHeCH4BpTHJg8hCuBw91g8KmUfdeZqhZBGmg+jggKMotw4SoSSGVLhK21Ezgu6kSH
xJ58XYzSKRTRJwiPKrAW/4WoTYupBxtoBdz+SqQ84ip6iqZT0q/H92SSDYacziEwJ3uB05PxUTio
eQqXesLnKDT7FS0PXWpbQ6ZqpzZuwWNroQXXNu1J8npgWoFeQMl5AlAUYOaByxJ9IkIGyYOKvYWA
OgomT6uFDSlbXupq1moQTu5MMxn/ZMWnYIjBUqki5h/yxrMoUH85oCigWxdSG6HkE/Dlp5CORbr6
gSgkUnNa61GlwM8WyTdTAlnPRGGVdb1X4S8CEW5ZGHUyn/oCYY1HKlwtLQyyQeVplakXQCvrJ6kQ
Bg4uyIJgb9c+RoZytzND3ph+muOAgedD8oFvvTx3sNPkT//7bqD5QROXfB/CNgx/tsm0OEgPUtyx
ftKJXDzA7GJhHQNybc4wtemLWBnKgjvyPxxbdEyRdD4wobPkbKzOOTeAMstEFoqr0Y8H7QhkUQam
2jDhUkqJ284W1O4H/XuuB/Vl/qvyU9hoJQcPCgaBGFdq4QRDbpDlmpqlxXrXaHZlgWffJAnQn8Fv
sk4H4Ea0/WjIO8ifNl6SfybYK/5oIAIgUi2Nk8KE1m8gnJUPMXSYWsAeYkR6ybc3C9yJj6NzwSUW
CqJJugNELmiv6J9VPA9PaGQ64c+3pm+cpyDNDHQ1vY1qvj3nEgqx5n0Y39nCsQImiPV/Sg9yh2Bk
HQ4ZMwhLI+nFwK0OZ/zkh4odiDsOBE3M+kMnlZ5BJmXK2t+A59T7AvwpyVEVogCrqtbogq7EyP2R
/KoZIKfyE5vXtjndlUyZjAiNgpjTc1VakSJb07v4Jnou0T2uuBBVLBE8e5fRknL4orW7nwiNGR3A
FjSKy2+CMPD486jawdbxAbwfChXyeCLhOttQScZ5/UuJXKibAEIiWMO0zwi6h0787UrxLIJuioc4
nULkOdY/JKeviefRwjlnZY4q5i8h1F/oMT/HYeWGqrroYovXKcnUxbMWZD+jaopXwpKIKwV/u7gL
ICCVqIDSf8Gom4lbOw1ZcRZKLSyvneRHTfAaqVZivhe1m/wTbLuvizyo5v0fH7nNqAzAgtH7oirl
O09aUTNKpDm720Ay5sPItAEz0pFiZQIRDfWGCHCuuGaXZG0xuyl8ShQxJz/9BEeMVCPhZnOaNv8X
bNe0t7omyZMkSFNPR4U3evzcLjcuK7VEZZdMkX6tka5B3C4bRACtFyOeQCt79Xrriwjp3eDw8Yxl
i4ZnF2nnIzXhArnO3TFIuhZXD15yn9vVT16wMxV0rkzQ2P+1+g1u7aeDNwRT2xaUvdsFLGr61RsA
krrBB/uXlnDPWrMSIoSOLSTC16X9VfDFq7XtK2uA0BmKK5FJeWOI1ArralXwFlj8KdxJ0L25ro4p
IZhykME1I9BoKS3TjfbTDmfX1WVooDH5YBhsp3fnJjyZm0vZ9V7nsz7eC/en9E7r62uh+MrQsnxQ
HEOfnD5I5vsCo4FmTwA6lhGbUO5+59ZQ6busQ3Da/4/gKfWPi7Rx+7Y3AL2HiXlvnKxN32bezNjp
dYjFYXVPdjaFpz0GrP3APSdp3La8UFzXbVhLuwuv0mDPBPScpRdDo2G0X7gso054AFVY6n9p8tdd
5zYfJhmIvj/NqUn/wjbA1Ptn5IjIafceDKqCWE+o9brGUJBbmYQvsYtD4pa83lH8uoKqIULDiSXg
6yxJwmM59viy5qkaOJYrzsWg3wlO+PCkAvqg5HpLKFZUsQIYlmnRFiU2siCw5xh8Lv91KTWQE26H
JygYAC9Di3Fuj9L52dCNMgbtOCerVWI4RqUpIFnC+F3fY0d0urDChvfCB4v5ZfmHK7UQWuUl5DRA
Ncjw2/e3pwmVbyls0YUVrzdizPbhlKDJX7xzvC4K10nrAjnG++RxySdAOFZXubgPzTr62JQtSXmW
IIqO1vKeYP7Zb22j7YH/bXfT/F5cufY3ai23D7tEwC0XTRPsjTnkyjrFZDKy7H4jtCHGqFDihiKn
lzcjRj0nxDEydN0T3XZVLw1ckchidFI80LIRUz5/80zPxLB32RudBu90cckCuB1n8lnmLPij/zE+
aucm3Kwj0LLI/ESxyT4RR0eJrEyPbq9hWnKrwAbHzhPaF+fffQmkrsUci95u/+x5LJP6G4/zY5ZU
42fBuiz8uxbweZF5KyivG516l+EjFp1oi1B96wKupMTLWNO5UC4Axpffk4EKZEEns0gYRwpJIJRE
k8wuG63EMGWNSCTG/RO5z9NxoZktD7g60co/R42CBfts1WLyi+ow7jHsNlPv2xDWQd26f9hJIG0e
TVk9W8+8PqEnJMnsgKAfDu8qnlNGOsOHkqE+0aqrtum7PjdweTcx62yaHJffKPA9+xi5XkwSw90Q
gvLoWjJpXh3ptwi4hIt+bp5SLcz1MgCE3s+B9GMkZp6eji4CZRJ4Y8HsDzXziQLOBcJQbavNtaQc
TKFoacbgnSmdbaLo6XIalSOZIEQbh87hhxV6K+UWL1flpVWVAsJlAajEXmi7Y1H97PKK4PzSN+fr
yJifROBUNzCVFwmnra+Zipb4E5Lcxyic9aLP4yppTbb/i3T4qOrnXLKwuSrhJXSCcTyIRNfCOFlv
XN7teOJs72V0dh9L2Cz+VbtkRX0l6NYasCjX5gO0C9MmgYx+KYUX4dFrpHbbUVI/aeFPSRXeqpDp
Bj9ql3XKb0y+qM3C+ISe74cIUmyZPAsxtspP4l5ZqJ+0B83nubj14d/NJVghYmn7MX91fvjVASmN
lHcGwVvjoBHip3wjmlEjH6SoXc9kZSi06Y86jAP1G1cetsxKKdscQvvIUgoMDbTIh6hwcJVeWzdL
FeU4QV/2aGp2kibI09y/XFAZ2mNG6KrztPsjXWq3ds8FwxjebgVCba+YBkr11MEoN8SQGoQunHoR
wD0amqgzGzavEsdYCJ8t2cCLE6pF55bmrf4hm3BUaEi+H93IC5sJ2FrXcBTJB34BRd3BWFA4sQn8
EHoI6sWL/HNvZS+gmk9tJxOpZdOlBmBvL7QUxs9O7HcdiJgqyWSO2WiYWifPywrmOTezB/3RbwAO
kCUo352IbRcj3TrkIOubd3/438v4D7Ft3DhuapnoCgB3AiCh5BOxLotQ9OLv93+EDKzj/zShPRlD
D59DjxgDs4Iu+g15WT/OKtcR3zlU4vfTWVU8Pr0Rrd9q336s3AfGKPsXXriQ6NZ9n9r5uEGts4dA
CYsfvUEE6TTkT7HDGNd88HhGc9mYTrvIYqnxNJ2Dfxdy3D6py5NGKwO6Z/oHkj6jB0bWGX/iwhbN
OZ8Kc2Y/JJdWFNMlOGHs+2mgWXt6E5z02EvayLNFqqXbzAWxSJ4gVWUkRW1w4X6kYXnUfn/uK9T8
fyhoOAFAK7KnWzDARKpQjPRv4cyZKWEU8ND2VGBYHHhelKiwkDMuKr8qCOHoiTY9LsSSTJ0y3Om5
zPbN4R4hd7Ki1teS5VRo9DgtjemIkmKBmt9AVyH8O7supJ4F7fWQI9zIGnoUPi2/DYYul6u+5iWT
Nnlokkjfdc4WCCICsJu4zYJ/8oFwpYBTtAunbPpcyXF/jj8BGbtrurRFhOc9OHpTS5riE7CjTD41
SMNvyBkzXhdBL7s9fFTUr2SwP/m/pdiYt1Y8+cPm/1EIyP5d5UbuPMKsZl3LDwWXCMnKi/h3PD2z
CGJbKmdAx1uch5biRyNx6w3CCPCangeKeYwHKLHU3QjsWtCBfoAkwR+YArHSuJu8Xvtd34qhtsiL
s3yC9fez7iMXGfqasfXLzwl/T1pnQLZ2q5XYcSmbjHxP/9A27xwKycajveYOqzAvM3CRfiZE8eY6
nI0NQlJ53WwU2oTg26Z6QRQe3XHyzBwou5E1nBjHU2cxdKlVp9DtJEqKHiY19jXJ15FW+qthh9G3
7MbDqD0hJC4kwh8UFZkjzWYM6JzvLGwdsQBfme8bOryRIVZ67tt4bFVVLM9FXD4pW0GJ6ORp8Tdi
4nJ6S3aD+mYkO9ofUAzhp1lc820p3nSEDgqvhWKK+V8arvQArAOVqlMsfcrxjTAftF+gupUsk4Uu
x+TuA+NA2OPMbOvrKHF/9q/bRDZFWAK1pqkR/ayn+Hr9aqdjxKLKLgWR5GJILTb6RvYPQ7C4/P9u
ORGmHF3yzCa8y0jOFH93CrTEfxSjBF0EiTlKkF8k/2JU0TKPm5zvg6slp2L/EEy0ydkfd2uVivJM
qWFaC71OR8sCvnHywV9Rqc/3Z5M2hIVDYOyota7W0D+EpXlGCDVDQTpNeGWmOLMqNfWr9mWdkNpv
GYuGydcdMKsPCIlXc1LGOaspNv21aHliav8RjakyVwcswmUhf4ZBHyByl3pyxgpm9fvfdXUC4KzO
tu4VTi7sGKg3DdJhVLw6k/2u2icZUQJBG06UWsOYro6lLEAa68zHBoXCTBDX1LdBbB0EpvjZGyiV
uRE+GXFmHrA/q8FCObD20V/4gXKXk96VrBgMlOCPfO4TJLu2BNdhasrxouG2R9Tf4ha3DpYB5Wuc
u0SGgldtDs6NlsmbqCFk10eYfWxWmYr7FmwhHlxzl9F8T97rG2QylnqUtYMDx5M9tA9+oLYxWA8y
A61+YQeWWM79SjgKWslaAG554is4whtWWKHUsHr1n7NYjd26Xge/QVwVvSQh2RwbfymuNEN/70nO
f5l1YSAhk1y/G3FFQ3eccWGONkdgA9dS9HZQR7SD++bYaL7Y31aVlOxtswK1jcHpFCTFWeChLhpk
DhoqBem38sM9At8UHDlWF7FnNAdhktmFUDxRIqNrYrFlhR5Ay5crXOKjDrTyb8zQYmAalRw+P3dt
9fkWxL2T6HAMYBjUAvwxPOx3FXGcW7dkxacjYVhZ47bVwupVqkgXiYkIDfmm9tjzFNPCQnIDtgPR
22s3BLR4rzfdd1W6ClCfGZ33+Lcvtdd9Ki+ToBL4StuX9+m9nY0eq/rislQWncvUWRVJfHsBK+JW
b3dfPRlF4ThV5RejfaAqeMycTNOLFrA8X+xl3fZkznaeVNrgkR4kwoDX2c2Y4oUWRxg5an9f6XME
h5UtbZe1NWmkPyew4JFdfnNc+OItFmUqcl4XQxzLtu/yeQzsZyPgKfKbrZliJk7r5SqcKVjI+1/u
BssgQeOwTpFRPsa2skTlRCvfxpFwBXYQOkncuApZXm3H9ImD8i99TkdhAZ8NWgiMGx7rV2J3CCI5
HsIp3c31R1wqeIc8490LHA9lTaqll7qbFAsnlPCl3H4sik7s8zflMICkU+efqDw7eZ8f6rqVVVmh
MVUYBnN97fby00WKxxnfX/5ZjKDrN6aiFvfS8tCxuEgaYRk9kmkIXugVN6NzveA3HqSOhYMhKGKe
JFqOwIO7XaEuFPVFmRdwDreq6VIIsQvspti8FGzLp515iW3yBgfqUPz9yQyIEyzKSjfIuGcnc+Nl
53FjdgfO8sHjhl27ZrqtLlZXmHNt1QTIbla6eWi4A+ANmMq1Y82B1nJa/3DKWjO8O8ikeS55lE9/
rBW33a5rSwc91N8sK9MH9ltCWqCHzi9hh4nLPXYs0p63Ba1BX2BTEdHAMiV/ok7Gk3mE/xrbysXB
OsHxm/PTXLq1Oruj9e0Flq22LadcL1O/ORC4JSBOiiuM9gr4TqV/gDQtqKIIrYkM54hiOOsqqolt
2A0D6WDStP4Izq+kNwgo0WAOXA+JYOGHTHHRtkjSjMynoG6G7DtSNojNuPwXQEGyf2gtzfNWlyT2
XjOd44j92KD+xypnrDyiuuF5/HDY/EZqe/gEX7eB0n+d8POCNdlF0wY1m7sTcWRKbBWi+C4uj5nC
B0jFvqs+NEuIq0GN2tFo+Ec5OXuEP6EMYQGl1ODp7STVcqPqpma0n1YREle+zk8moNQW89cr0XwL
fAAaYcVNtR8pt2SOPnBu1ud25wfn1rf7gqp26RjKDz3HUT95C5RC584NThsfxQKdq5N1R+TRBfbA
LnMrcp9/gs2ZbcUq1Csl0IU5KbrWEzyG2Jkhrv1u0ZtToppSSSL0i8x5a5XjjkFQH6v5b2FdX7IJ
vboF3oVcuM4hjOKvru6TxveJKkRXAKn3T85gpZ6tqn9lWwIB3/VBbRBTulbAycK2aXgR41wbOmXg
QNMq39AVJRBU+wOnxXZr7+37NKgMNnKWvvc09ArGGJLv+Z8L4TP45esWft8psoczuZxBQjOBePHz
HnfM9/zkXAix763TqxsfjxCJJO/wC44vt7vQdUsZyVRYVoOgvnWad7bYV0tAORl3NjzUYDu/7Obu
WqBkovNas0ezzlTAzKuzlo5uxBonTn05kRcFsil3TfNLmAyO1pvn7UxNpbytHH9aAgi8kx5iyHjI
icVFxq6wt3jZ68/S36AKm2Naq1kZva+2TmU9hiSPQVVKpE2EnC2j51C+g2m9/apvF9lg1PQG/Omn
0IjWfrKAvR5i1MY4FRtksBpFRmm6vTYYcgXQohY4UYylbtw4v0ehzx2zWObmMXQkKwMRPi4tmoh+
q3pjDIws47VK8TWzDXuBY0GVQ0cty4xAUtzKd+NMYMqlzZxnAFEpu6jhaQq6w1LzfqWZnbl+1Ext
1NJJzOnKdPXbHlTD1DVoKPiK/9lF6jsvBmrphNXTr5s5JCLeqR0pENXQjtbZJZg8NpqEJzpiEEPC
MgiDFdPFY617TuVFl7NyyUehhnBo58hv4nU58I05y3YgWZ9eB7j2Pa2tlFhqo2b0bV3Wu38WzmBg
wJMu3+aKl2WkH9KRNkmt3gjDQSDG05gGaXl/6YKShvF8dfZ1sKiXXldXHqPH3Mk9TovBoyQdLGFK
HW4NxnjJDBIar/Qq9w8/gIlFAfiM1EG3D7XH7YhK+8OVXS0edGuuj2qsHaOAdp4HX4qWum5KqRvF
vYpmT1YLBHzUJ+tE/5oZUkk9cVP1/KO44APxW6dKTmbGj5HlMhR/DdeK+cRGlMAjFo9BcDdL2k+j
OaREG08x4yWQ/7Z94F/jlNUQeZiO+ccDNPVjmqNk+k3t5xtANrk8PesyWIs6/kziY/mEC9ozlx4a
J23X7ajw1HBSchZGBr0STwWoLZSz8yY3wfaqmO6j3ofzFeT778MV5efqiZKdOJqNjvQjOqEBpS1O
gRPjdQN14G+vee50c7cOmWF8rpUErCEJbtRotTUsZ1zewOs6b1ALGrpT8dZ7zi/2SWKsmn+AvAKN
4PzVI+0fJEqfYc9vuaTwPNb6o6rFvfbpGw5MOBCYUZ9XqywtiyzSlRNbECgj59v3X8GN2OOZmElV
V87n29XnqTND0Rb3EprztQeoMLMHFSKVPMkPzbdyOPMsDU2rr+tkD/sHPQpIDze3cIoQiT9PRrQF
35sD0nRiWngPOc4VxIJE9h2ITen07Rn1PQy31vcOVn0HCYBHpZa2fiJ4lU1YRVzyVZfuGDldE0tA
skEDnkOA3QtsbofmeNZIG8H5jD4vdXW+tk1Gb7facgTCLt2aL5K/zXEQ348EZTSFTgIxNeSi0JJS
6jGYW4/Ye3FLPeUuy+ZrFF8+ZAy8lp5WaiFO6xYQrRrR2K1Qu6faPBUD+RQSF9rtKHwSwLZyFOYW
A+VYQUUyNadoSx8tx9Ll4d9XBdOoDxHEgHd4nQ+N/GnZpOlxmoTK2U4z2TRFQdUJpFLAje2x7Zhy
/tyEc0VZ721GQ7VdIjevzlyYrZla2Mol3eELzY1wJrFGa/22gh5HN6pPvoMAUg/qLk46b5E6CrIE
VLetU/uLZZf1MMviF+iyKXWtJol1MUbHOVUGFrUb64eYirmuP5WylzxyRZs9lL7y1Uj9xeBJW13F
CnSMn9Z9szQVCtYNzdvgJN0h9C2zF60bGErQO9IVjG6ZajTfZttjNP3gB/dUunKBtjPwd6CSQDF5
9MRc9x2CAQkWj9oiFFZLLykegY2erht7tHrduDP6OUvsxynJNUOlhJb74k4Zha5aTl7appcs527a
IpIy+01oKZ7bpLDDvRDpT8aooRVVg/63KQWJpg/ZjfE+i2dpeaOlVHUcXr3WFkQuT62enDNFs6kr
m7TpDBlr4U3x0IRGnE2zburjcZJ5w/MLyt9d+Pc=
`protect end_protected
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
iisr0ydwFOm3eepmhOYSaxO3flYpViRsLN97vKyw+ai+x1TubmaH8qRRwK/QFeVsjlGTFdxookcr
olQwv0bmdw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
dJvTzz+PoD3n2Ot9SgKfpEhIshJxklhDhS1tYcrcmprfs5wN+lN+5Y+o9jEEql61IqDkJEIGu0xp
zaDWEeMqwkFuovmZnp/AnbrHb7R/19zPRtwSyZ8+VQRLsRMgscwutXu29fTUST6Ribitutae85tQ
1okc5mYK0mcSMIggcMg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
ZijKIWnBSOuwn6R4ZrzJp1qaSPGZMrP8GTp+SV+Sn9xEivGxLJtGM40xMLXxiYuxIopDD/A1usG6
HkSoNT6OzxHJWKkUEyyVzrZuJdNHJ5q3s3y5LSNY7eMxN9lY4/gygh7aVIBAO9YWzsWu3HLtrHA5
2vsUFQxQdkG5OTLVP1rH68P4j/dhqr/LVHw+9H76c/knGyalpHLRC7tnHQcfuezFJWlkzaNGHfUo
b5cE1YTvtdlZVmw2sVG/GbXIRi5fq3+Okdy+JgckZ4dVWbI20rfa9LkI09/kwD3anyrnovVQVx9h
F0AxolVKVVyWNAaSu1fvXllqzrdJiRLbdnsq0Q==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
LUajPw/jRTLlmEKb+9YylQ2jxw4jlSx/1GGaY1wFfWFdMwK2p0xvQMjui8K3EqJF0fnb3QNWuQDl
1vTtf04vcOAHkfRCeW7Mbp8qeUTtAsflGIPJDxHfVU8ZKprwANsENc8LVrpJ0WnjDFQIzJw7LDqc
Jj2TofWjKprdxXsMnu4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
KG6kiSPrd66zvVpG96eKD+783ebVLVFNF7pXgq+rCyBBRoa0N9Hp3DIWK5125mkICodI82zuSq6k
C8aCiPbDiv4tiuIn19WDNNPL4ncknL0KLZTLAkq0BIQIsnFNRaZegM9aXOdMYGKYLpnjSD9KRWRt
WPXPZfwprSu2D7PeDZMiij3MY+cixttgVmNfcx9Kkmvg+1B5sTSDTVs3fqpJBBO1YslTmxyJAIC6
uDuGqvQ1138z6f4f+f8vMXratK1Ypo3jPPb4FTNLYJio5Vd1Nbpl9kRRtj801Ie0GGhbggK6IXJx
785o6wX6g3tRyoHXGJ4DGUmWlIHATg0KIAflYw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 13424)
`protect data_block
rEtV4Bm3SmvVbKq1runp2SaaO1GImraXNQnz2t97NClVhlTBGZ14v+hHArmsTHZNME/QWduIEcCL
I8GdWPb/f0NXI5m0D8vUM2MFHCnzTFi82f0pjwFGBVpM7cHKBa5QRX5K/e5A/9KwgbwYV1tKqTXG
aWyx6JRfuzQINO3rQqM+n/1b6LSLygDM1QuiPthpMFKV8IfsVkaLDVqcLxH9/n7C64aisv1xK+OH
WhYRETSZok8+gbvdGdr2+VsE64ALl3DavNBK4S7IOGP5YtXviHmw+Qb/lvl6m+RggRYmTe1A6B5r
pghgGDxK2gS0ItU55quFmZMEuEH+bwLuaJA0/UWR19oWnbcTZnsCqEeN/xbKUzS6blm1K6RPZtYe
WSGhjFl0cKHEQe9DfEazTm6tS9mJ55lLbSuwE5o03LDGRapxUdSR0IiKy5C5UP4genzVw3zearva
qPWmPeGZcAEyFioI2o4OWQP+8mFdbza1kBOuw4BP76P2c+ij6wbxXAWVxtNmL8f6AgS1AV5SqIO0
ftTCve0JloVh9kpHsbXE1TS45+y0IuiC0N3a8PAEsXa/tnLsnAydpsXIQwMLXmgKfoXKzabAHHdI
XZJd/NxD7+xY3aINMVaO5eSSLIdjkYZIeqm6qf+x2eNd9v2nue3I9rjHkjMBIty9wqDCI5HznV19
h0aPmdRn9t7Ft5xXq0GXqSl2I9ZROoM4hg3RU6TCVY4IaDkErgP5cMhIwuHsntmeWvsvkZFygQtU
9TUaf90O9HINFkrdIHf0ZCgtCgUw6ffQNPAkw/6MaoKxm9wdczGi3ur+eyRvSLy7+LQX/dOqvXKM
9UFNjkQk392HWfkT8aaXacuJgFT4hmoEXDGY+tSqQrQRrPmelj+ksf3PcI2r64RSTjiR+9HNqWqJ
jPJio2xgGdQdGrH+UewLz0ySmNDYmqxIdyqKfv/B1BYMUpGd+l0eRCp0RwjP6nt7MKkBishuJTL2
2kpCGDQ4HELrlovnj0dMihRpFZAIpY55DfNVE2hnbkHthyDrEXapmovyPqDFel+HKDdimVyeM8CR
DKl0D2+OZK8XWAiVk9Ve6w0rONvwf/XvaAkgxa3rDJQo/8g8oiGRq4ku5l3OZUKrPVRcjVNCxHRq
81RLF34Ztt0FyGvWgFBPXPwl/QfIQcetnIv8BBHDyYvjjUEJZxJ0yVIBqSipzmyIn34Kt0GvhgJJ
oXsivJz4IQp2WiLYnKzv7NuBWYnOF+M/H8eFTLS7ynV/b0CRf7qayeeaKYL0uv9mUeXbILs7F9+8
XkemV9ihHFfHS04009LEbIzG2O13pEZ78n4YAi47TmCv22T8/Ve6sSAGowqE6FfeksCmQ1+Z98YQ
uXIyCDvF0dlGJwZxogjNRbjyCBj6OOagNPhSW71GcVdRv5XSPoZsF68V4hWQeNb+itDo7ZPtZJoJ
YzLjFDCWp+2G5a8+OtWGetlJNejx9rEDOQvPXNhCi9xzzzSvIevRpnt9XX8uVwzzSJnKhI91LgRg
ID2cjEMis7S70eKGvR2/KBOhU/KAbsgGALtSpbd8HPFqo4CWuxEHCYImqvt7m+vI7jIEpXbwjtx8
QWNgKL8RNSViXrcj5CsXvOI28Nk2V+GZ8jr1/8I4R/Yns4Xfj1TTWzVeNCNHbazn1nufigCGV4Vl
qtDHRGZpM2GzgWRsMj5tsZldV3pp52C/Dpr/92KUqWKMf/mZbYDJL1X0X2Tw7iboFgBgx1miq+ht
zrLMfkmBPAPakC7uTHv8wdz7HICGyvCct17zvGp/b+9c5KI7lCBCd9jn5PTW35q5ksO4eC9R2AqE
0xJmD9GKB17q8Jk7vlAMs/IJV9rgMDnRfyFkOl4hl2S45SaIY1ObTSNIHJYg+rp/nN6BMaWKrR+7
O6t2IjDTrKFkfrU0cMF3G7EiQSf6RI1d8iyqNJLJJ3fbFhF7XLnn/CwlkZ/03Hwn1nJocabXwbc2
9Q6RrzrxLCWMZVoXaUEBQvapxENHsyZOrmSevUQnuCknCx9Eh/GwdP2bYVHxXWg7ySdjQnVMtR4v
qT7n0yJuHI0ite3a92Oo/MBdlgCwEcxfvgz0ILRIK4wFe098lGOX0tVEsLdEUijEAeQR38bksd9a
fuwZzPBvMZQ+FON4CQYrDg971r8Qz89ArQjVxWF7TdD0Oaq9vaUrLocNzIw9AcIy8rWaQnwTR/K0
PsXLapKx1fOSZnuztuMHoRXGaqZVlZJGs22/GiJA9y/IBflmF5GNFnRUbXVT8r+FfMb7zIr8eP+b
OcPNp6F4kqt/b8gae/9JOIopCuWXpu5kDe0U5aC2qmvMuYbNI88aUx34i3WHd8NWKNbdtGDaQ8nM
iyuSX4j7EgwTOuBR/iFM7rZAATM59ZFv+9wRq8hbXVvfsBp13upya8YovLN1O9OWrzxUWym9ZPN1
mDhMT1YgOqVRaJ2ADyjP98UghsOXt6ybu9jGeEndP5T4mZjxZp82OMxqqS6VolaMbGRNPa271n87
65g6Q9l7RYtOL1PjdBOlgNpUdYZwxJ2EGgI1wPnrnuUiZ7sdhpuFkhJDdh2mHYlIUZHAsriLKEHR
XOdtU+Desuf1ojV6OryxMP052nRo3DfSj5+dKgSFWVXGLiS4Q5dQxDHIvUugnqZqf+FK5inrMME5
1eHWMPkrqY3H9syJMZ7RM9SwYc/zjL9fOqr9mE+npGx50NODLrgb0FydLIXRotOtI+YSbZHKzsKt
xoZNcJJ4GasWF69GNvRenQ3kp1eh71xjJw5a0KZmhsJJXThZLqSzb/sTisTU8jCaMh6S6ag0knK7
jonbXo+dctsmQfLpvLXHN4TNqJnY6alIH0HnsTz7EklgiqvaLbFn+25uUJSNDHESZG2BaAtNvG/4
WuvQCSLWeuJpsrPd+06Bzmmnlvn9InJZhGDVhnZlfj7Kh2PolkMjpLgzqH4f9hm/7zH7o7msjyvZ
Rj/JnTghr2ou7m5Ayp5K+yFEUt/y9WWmqXlKOpf12P8RITbx8ILm1kWRqB8L+xfF1r2HXt+av43O
pyKFj4Kq1FZckfpg2It+beWX2P825O6hDubEjA2RyF/zyyc3lMSS7vtAQMEOEJnWNslP5r0po6TK
F5+Ikch7kOxVShNh4LWWzwFtJb9SBv0iFIezeCGrgApE2blMwedVwOdpPdPvsQjNRYc8YG+dStcY
JUIrNMdc6m5qSEWO36XNGXLN/ZrjKkZcCr+z5oN8Oa4cO8jxqZo5bZDRVUh4VXM8a+hHCiVvWsEG
HkxV52NFazh7Duhb2Ix5qYigebEWfDnA3frHeY+lRAIE3+X/YoDjgbPuOqgwawkAvhSCeNbNxuTS
T9ZzmE8PWRbDowhElwhdboesSdX9tyyp7yCSM6fxKFXbUrPplwsSNsMYsJJ9grw0leD0bx4Cd0Vy
Y8dDayiLLROqmsdsKe7b4i2o6u8A0RQrPB31DrVO/yPiNygxChVesembc822gDnOAlf6FO502nEU
ItbE4EyM6ZuRk+69RSoT+2AZGRndh55WMQYb6i7ALzZeSttxOh6V+LV5SNYYdeQouPNdd+N45DZn
niJzd/11g0AFDHSZFxMK9p0VsOmXbAPFEjcTvMS7PiMwhUsav6ZfZjkVwz4X9s1v8DCZpNbKSq88
kGJQIcZYRdAPuD7V1zvdo0Zf6leEwpYg5lACMpJ8rGWyLPBrYD/CsWB0THjSjjkRntpZXUTF5Sq1
IPSYaQtCSAHZKO95giPeqw3zw2XQ5ci2o+t0eS1YvmSPlvMfZRnkdx98t2mA8ABd64gljY5f+0O0
px5Pec1R5VTiPNgghdEJlgrPqQxSP7vDXo0dtJmtqeP90QCRgaOqEt27wpqzv0KFUth0XwtaJeQ5
dejR/hEOliBmBscgJkx0gBF/nLybnTcQ6xwwOe25uqhvJIiepSDJE4ICrD/MSurrVfozreQGinSL
a/tMurSZF67eavaP5tFe2G44AmkmV4WBRnOeWOW2dJ2Q1sYHMUzfnWjdSw1sJJu6+Y0fUowVqq0Q
K2lcfV1v+sdb0adNWmXRoPrjCpXnMpWUyUXWCaY8r49ipi+4TCdxE4p/IUZfO1aumt4+xQcBT0dh
t1WR18HGPmHp719a+JPxfWkOQjw5JnEukkqxKV6fqJPDzGrHDJvrkNy1tkX0MN6Z+Olw//0xoyyG
9SEwAH72HyUlbfM2lhwM9N6f4cr+CLxPF2At8ppy84kKN/H+2RDt520oTXKCcGFU/txd8LdCs9qG
3diwadeKrfsinlzq/W+3PUAPHvjHcwRyRb4m4Wv6J0kW7ItY1ox7z91NbPGA481MOKLtCEwm6vuk
sfLsMi7+T/Hm+qsOXlQ9i8Pf9VAE9LWS2byZEwPIYDYtbLm2L09NRsMgfm6PotDA/9WaPtrx/CrM
IMllkwsRz86jBnsfx1s6w2v/gxQFWv0fY8mf1WywsWC+WArpCmvfHO0WMIJtyS/B+XcdiLdfrrJ3
qeRMJy8lhDn9mvRTVYzLXtu6Fv98eAxRiP4hPmT4+kxhTz4CT4cDPP9YKhdzODoL28xWfAYFbD04
Z7nP2BAp3o1FR08u/ctwg8oxDjcRwHkmDHquzKrPjnQBKXv9IMSCNsR7asFA/JqdhHcmuKZg6PRk
6XzKLzz1/Zs3XVZ/rpAcA4yoz12/yPHmsazO+a6cgbZy7JTSwRBhRd31L/KB4M7WXzNJ4paZAsOI
O5FWmQpp6eEyGGXpKkGy2qdqVRuRe0IjzwDJG6clerafsgCAj755Q2eTRVVvvRQw+G+hVjqaFu/+
m9KSJt+0hjHW1BHC4wyHN94ORPERUFukKcxOq8a3C4r5hTOZW3XWq1v7Ks4H7Zwi4AlNCGUKQ0ON
VSZKVFl61F+tBDQk+IqFz1WMfzhOfRJYfalfeqp5HOOIaK9cOhXG2oYdhceL4LDJlhJPAqpAc23Z
G9mCLMh7l3PvdGUWIx2s5Z4EpUsaxWTxxqD4a+cGuaZLzeV55zSCZ5qehwrwRTYvoBZE1+lOXnfi
Ryt8wko4y/GJZL/NuHI8l8tJKmVjS+XqWIN5sWUs9WMNit0HB/gZfmTuuvpwP7gjFuUjS2Q+jgYC
9ppF022c89tfs59OKVOjOQ9s2b2FlXyn4zn9AXI7AYGal0MNPRsQwnnaZJiTebyHcwtZucfEnh6z
9K9skBFs29qlMPNYsFP7y8mzdNhDng3TEgYpao3SPfXwDj/CSw/ObVggf8enRTUNlDfJ+17WwDyO
/ajc27MzTRLyBCCQhUYvMn80lvwSHxWDIL3xKvr2OLMoIAmgIZJG3sJMyhsOPqFxVb1Qk7NcojOn
D11t84xem8WyHJRbm0pbKV40U5U40scS0H5bcMWTEfGT4W0Mt47O181hbfymq/ykV0yIpouFyaDb
tUvUtKWqMknlkUxdllrfasNUWgJUfn8Cl8EV1Z3U5ABYiUNuRr5oKcdwlS7eB/n+UgV71hPGXiii
tFKvLiZLXS9l/eoEDDKLm6/8OksoHEEFzRFIR8skagCp4rd4fSGbOUietH2v8ecJdTlXFP0ex7TX
vh51q5DGduPDyv5nJCNInuPVn9Z9r55S/RGw+ySGAcaPEqaldHWakl5LrzE1/zI4K707/QMAGDAl
HQdn4RCGxESdD4HJn35p8o9hnYl7WqaHBddVyszwX//kjQ4qJolh4qp+txlSxnSJmCs83a+aCvMk
IbAnKPRH3SP74XCHOQ3bziFlRO0Q1JWSUp+e9CxVX0iTOPbgrB+wD9yT1o6m+o45pOEi4yqt1ZwB
6GRU83LP6o8j9UURxZDZ5WMgpNs4xuaPxAt+XstW7JOy51tYRnIykokiQYYg+aWP02kEZ7KL2cif
/t3AkMcRC0iKXbo3c1/h2uNlHbvkqXBOZnmGMzMriXwdE44Vt7izgW2oY3N5IFwqNHPtWi9SS6yA
hcD+oqiZ5YnDx8Be3R5HxKPygh4K5ePLmLR6um0pz3P8seQq1RKFP9ctf/u1v+7BlNqcdEez0X0N
I4X1lXx9dw1MpdfXfG2riDistMNSEH4Rrccb4Y/8cnRL9fh3mO987Fb0uI03HcxJiExzcwHZ9dco
s3vvxZTsaIGr2xmmD+LsMSI00fJFv0/mbMB3LLQfURbbNvuYtBK+fA8U8TOqSRvPYwXdCjv80svZ
ecFEkHhpXJBNTWSfUIzupFvHeVSIxo1FYZEy4sS3rdwokvKAiZK3rnzY+Ryed1c8On/UbN07w7X6
m6hS6lOKjYh+wxgHNswvu8N4sknoUX7Hwp9LBuU8+T0Ca/tOrCkICtK8kD5WkMmpO6IWAXUjK4Z8
/OmRAfzuhQeScqBIQTMuw2IkQruwSdfY/2ev76Y8v5xSi/gzcXVjJ6pNWe8NhZ5pL8vuon9u8D9v
ac2sfrz5UyHorqRAvNxS0nxaWXiYHYmk54FYhWXq/l06uTApLWRBji257/fX7WCJ6JtNeLLcAFYG
ui6Qlw2u4ilhoM33Ba9OQD+hKXM93Ab35owHIBR48oqnZlu/gRs9B7w/mQ9P7Aq6DwyYiEy7zN6P
zIrKF6PEXI2oo5vRRDZlhHjnxlG1qbQvhZImGO8R1X3muvsJ0Z9NyHew0PCSz7i9mW6rY2m1FJBl
jLOuJd9a+SClV8HYSGnNlxIsBxxS4kdb8pJAiZyO1GsyFurgT9epWWxp6MeSTru98ZQ2HxuKRPAh
LAyFLPqo+UCcwRFhd6SEMQhkLktq/u+ZRteg3JfitjOD93M8XsrOOZXAvc8OK94NqeYOeOIYfeiA
Bh8AZZCTK3Xt4QLtJ2oyW6gLSK/gyvC1P9wVOFLK0VxRCj7UL1ENqTGIylLsQV1EDrxvDeHgkr8n
+celZ0eo5oJZQc+yNrl6D8RLDaFfOndjQQuP1VMMLt/r+SCqzoIQpeaPzjqcZ5F2tDjq3vLL3JlK
L72Oet2zPrANXugoDIB6V4zLM77QJB3ICXMRSw3lLKHdoVR1fOZjH7lh6OFJTtre6FJuHv34LR+w
Sc62m9Wix3fNqnF2+9Qp1crzn4iR45vHd5J/GET/E8MKd44F0qOzeLFE7zgwf2+Iy6YZU0LJ7OWe
z0OlZFdrPEAemSaXyLI3Wg2c7W5Ef4UaJISjZfXU+aX/CFAP3KV58g4cgEfSs9fw8iuCFLuLh3Jh
GZg50idBZAseo6HiW0jDA4Nn9S03k0B9v1GqmSWPhP3YhzM/EK26PGYcgF0eivassZQFQSrc6Jil
NsS91pv/HNapigSr2eVnB1wDsPbMOeAWMefmfTJEy770FLL4nJvHH23BcLXTk4vQBAncc/ypOm8W
7K8vIx4OeBmtzlz+HHoN+Ki6SGNYfqwhxJ3Iclxi79j84bg6FlZ/sJmHW3B/BcC+MY8FKzU6WOYl
4ii86/wI6/Ymwxsc/fLpXuJgVnj1G6seQpKpHtSA/+fDWnvd7+23DNdK6HfBGZ+9h1HUSEREwoXj
99Lau/2+L3cctWkmre/U6dbCrUJx+9esOM4lxm0AgWGdwsmiTdhQhm1GO9efcz3nod2wuyLOoRFB
PRHCoU9xUQeiUOHk4A7KAbqWNnKmpYJRUFtQ3lyKzD1zt5ChuiYS+1trXUf0emVBc0RXJeOJM+oy
pdYUCtO7HboKltA1VXkzyJrTAnuRxZ1FiBt3NN7AswsisLqFyQAuddvPGzztWsE/T1mimJzTQK+f
f/Lv/B2HA5evVFXQh51vSrY2ub6y7UStyV1sLz4hRJqfnfYYtn4qKe+hiDORa9CUQSPNnR1nNwVS
OkQkOe7FGwVo2tF2pgxsVaObzuNgR5W00kvbG+HZrYc/VlQXu17CoYAXyKuimeuQUX6IOYQfOtOi
P/656J+ayneD3DdaM4CAxyapYpzyxTtzYw3d3BmLALR36ZccU/VhfYiHYcCtxg9XbjQuCmn0V9tm
VhQXJGWmHnrfgcSUohqw+023UH3zssHKe3HoXWtNxZuFWTm8uBN+FQJWwZg5o1SnFllNmOyhtpJN
XO8SRcSR9ghUC2PkIXtJSv9s4l9Gp1a1m77LFh4HZa3el3/C2W/EGR0B7R2Pzy8Y8kQnfhLd33aj
x06UIZTX/x5oFzGlrD7CuvF5JKo9vOIxzToHh5kdoOD6zjUKUGJYQquc/mE0DMReySwBHVcUIpLT
P0tPzMBnO/rCSMnc9ks+pckz6Kip2rnVsPX+HfAom3uAkz3m42JwY6b/bHCDef0RK/3WUac0dSKM
kEYtrhwBrDcHu2UrE9D4N3TPQpPhltMcgA3rCnJNzhStxgWfSGcSOX489GY3JX51jrPQ4KLwg3Te
uHo9coFgA7zxBD435Ek9ZfJZAcIO0Zt7s2uZwvFyTVmPWSIEW6daOf4f0gxbKYxTM8WdybNJXju9
AuBEu/AVDZ4+JGpSkGoI5khnH625YEMjmDdM7yC1jJKKFINwCI4JiWEAl64hmuHGoqBCRVIgMBYp
hCwZyPZsI1RVFT2dRHGrlaHOioCJ4s9qfl+jXm7NnHKSvxNcZuT+Ubv1PiLUCoGFG+sBAEE7OLIx
156yyQxHYKvnmGVKdSv1JDcqFOBTX70OTB59UidJY5m6HfaEtJa2TRtYd9dfiLW4T+bJCNByHVNJ
BP5PQ906S6hbtLHGTio7Jc/IK25r925Vil9Q71uHrIoeIOuJxTU2THyuDb8th3jMJAWZ28arIcD1
7zvWma3Osergrj5anOk44hmyfHWNmtZzWfjZ8g2mz5sCZf2xhx1wqFFUm2rP++JnqWZWqJpie9P/
FaUflE91AeT0nPFGzJobKS7vxP3YCIxqDXb4W+GNrbrMzqJv62IjXU/5VT55UrYBObNBKr5pNuPp
nl5/A4Sckp8yUP4cXgns9z450Dg8dC2rJeiALt5KoIAI0mqVyz6dmncs3964qm5zvqkhfspebtxv
+/5/HLRk1pKJC/0BEIG3U8PblJ4S3qWAR1ocDE72mQpK1S8J2OpVtmNPWqj+Q8XxAKeFhxNgDseh
3Ys+1h4JfwdhkuL1WuvUWRmr43qJQgrAU1dsla9XqNHMblQy5XDeZddFiARAWW3wQ5mQedn8mA5U
VcD6AFj0+myr/qmfSW0WZomoAlWRHZR8ww60cUN+wUjqZnXcQrMta/v0wrgmsv3Gm8XyHnb593L7
eG4J4D9wit4Xzo8ICB6DhsQ+QOfSpMQ+Uks7P55CB0dzcg3FIehDZWZfWj4jNvAY1gUscTVyYm20
ltt13qwaUWOMqO2BXOxzc3jQ7Wi51nA9iG29RjBhvOs8SIEWaroBNDKCGcQ3HvQk5wLRSMiGq6If
A/12iSm/sYD052pbIGYML2/C6RhJW3M52SyyIXliJtXn3B/si0AgHYfzqT0vXPlxQANLqtU76Uyl
JwP32T30MRjAm6qMdCDKPfadIidlWtpiNS/lxnet2Fgcu2RTx9pSlm5DVmFbm0VH38okdGyJDSIF
p+FEprQ9eDPqoUzNbjd4QlY9bph/Q/CVR7m8dBAbCFdT7pbH6Wdwk7LdzgRhdtDP9jIsKTNNte1q
GMvooCehfU4GiCw5Aa6s4ZZbQSVYuhRYgOHzovGzq1+5wOo7N2JA8vlRYSwwjVyUb2rqq7iWsbg+
JuJapgIlHZCoOngniStpVBvML3CdjisUnPZs7sdb7aLtZRCI8TsyQed5VNTTOv4NXqNYWssW/xWq
6f3VNQFk/gh7GyMyJ3d38QobBhLCLY4hmDK8JEZCWxIL9DN0kaLLviNG2wWKwZL2cD0vxQK+D5M6
PEIAaggXEQmwA138Km55S7ojd/DGbrMb9D+Sj/6WEvXGOXlRpGpFQu+ha0Zx9dB76EhCiH5bYq8w
bqILWA9l62keHeCH4BpTHJg8hCuBw91g8KmUfdeZqhZBGmg+jggKMotw4SoSSGVLhK21Ezgu6kSH
xJ58XYzSKRTRJwiPKrAW/4WoTYupBxtoBdz+SqQ84ip6iqZT0q/H92SSDYacziEwJ3uB05PxUTio
eQqXesLnKDT7FS0PXWpbQ6ZqpzZuwWNroQXXNu1J8npgWoFeQMl5AlAUYOaByxJ9IkIGyYOKvYWA
OgomT6uFDSlbXupq1moQTu5MMxn/ZMWnYIjBUqki5h/yxrMoUH85oCigWxdSG6HkE/Dlp5CORbr6
gSgkUnNa61GlwM8WyTdTAlnPRGGVdb1X4S8CEW5ZGHUyn/oCYY1HKlwtLQyyQeVplakXQCvrJ6kQ
Bg4uyIJgb9c+RoZytzND3ph+muOAgedD8oFvvTx3sNPkT//7bqD5QROXfB/CNgx/tsm0OEgPUtyx
ftKJXDzA7GJhHQNybc4wtemLWBnKgjvyPxxbdEyRdD4wobPkbKzOOTeAMstEFoqr0Y8H7QhkUQam
2jDhUkqJ284W1O4H/XuuB/Vl/qvyU9hoJQcPCgaBGFdq4QRDbpDlmpqlxXrXaHZlgWffJAnQn8Fv
sk4H4Ea0/WjIO8ifNl6SfybYK/5oIAIgUi2Nk8KE1m8gnJUPMXSYWsAeYkR6ybc3C9yJj6NzwSUW
CqJJugNELmiv6J9VPA9PaGQ64c+3pm+cpyDNDHQ1vY1qvj3nEgqx5n0Y39nCsQImiPV/Sg9yh2Bk
HQ4ZMwhLI+nFwK0OZ/zkh4odiDsOBE3M+kMnlZ5BJmXK2t+A59T7AvwpyVEVogCrqtbogq7EyP2R
/KoZIKfyE5vXtjndlUyZjAiNgpjTc1VakSJb07v4Jnou0T2uuBBVLBE8e5fRknL4orW7nwiNGR3A
FjSKy2+CMPD486jawdbxAbwfChXyeCLhOttQScZ5/UuJXKibAEIiWMO0zwi6h0787UrxLIJuioc4
nULkOdY/JKeviefRwjlnZY4q5i8h1F/oMT/HYeWGqrroYovXKcnUxbMWZD+jaopXwpKIKwV/u7gL
ICCVqIDSf8Gom4lbOw1ZcRZKLSyvneRHTfAaqVZivhe1m/wTbLuvizyo5v0fH7nNqAzAgtH7oirl
O09aUTNKpDm720Ay5sPItAEz0pFiZQIRDfWGCHCuuGaXZG0xuyl8ShQxJz/9BEeMVCPhZnOaNv8X
bNe0t7omyZMkSFNPR4U3evzcLjcuK7VEZZdMkX6tka5B3C4bRACtFyOeQCt79Xrriwjp3eDw8Yxl
i4ZnF2nnIzXhArnO3TFIuhZXD15yn9vVT16wMxV0rkzQ2P+1+g1u7aeDNwRT2xaUvdsFLGr61RsA
krrBB/uXlnDPWrMSIoSOLSTC16X9VfDFq7XtK2uA0BmKK5FJeWOI1ArralXwFlj8KdxJ0L25ro4p
IZhykME1I9BoKS3TjfbTDmfX1WVooDH5YBhsp3fnJjyZm0vZ9V7nsz7eC/en9E7r62uh+MrQsnxQ
HEOfnD5I5vsCo4FmTwA6lhGbUO5+59ZQ6busQ3Da/4/gKfWPi7Rx+7Y3AL2HiXlvnKxN32bezNjp
dYjFYXVPdjaFpz0GrP3APSdp3La8UFzXbVhLuwuv0mDPBPScpRdDo2G0X7gso054AFVY6n9p8tdd
5zYfJhmIvj/NqUn/wjbA1Ptn5IjIafceDKqCWE+o9brGUJBbmYQvsYtD4pa83lH8uoKqIULDiSXg
6yxJwmM59viy5qkaOJYrzsWg3wlO+PCkAvqg5HpLKFZUsQIYlmnRFiU2siCw5xh8Lv91KTWQE26H
JygYAC9Di3Fuj9L52dCNMgbtOCerVWI4RqUpIFnC+F3fY0d0urDChvfCB4v5ZfmHK7UQWuUl5DRA
Ncjw2/e3pwmVbyls0YUVrzdizPbhlKDJX7xzvC4K10nrAjnG++RxySdAOFZXubgPzTr62JQtSXmW
IIqO1vKeYP7Zb22j7YH/bXfT/F5cufY3ai23D7tEwC0XTRPsjTnkyjrFZDKy7H4jtCHGqFDihiKn
lzcjRj0nxDEydN0T3XZVLw1ckchidFI80LIRUz5/80zPxLB32RudBu90cckCuB1n8lnmLPij/zE+
aucm3Kwj0LLI/ESxyT4RR0eJrEyPbq9hWnKrwAbHzhPaF+fffQmkrsUci95u/+x5LJP6G4/zY5ZU
42fBuiz8uxbweZF5KyivG516l+EjFp1oi1B96wKupMTLWNO5UC4Axpffk4EKZEEns0gYRwpJIJRE
k8wuG63EMGWNSCTG/RO5z9NxoZktD7g60co/R42CBfts1WLyi+ow7jHsNlPv2xDWQd26f9hJIG0e
TVk9W8+8PqEnJMnsgKAfDu8qnlNGOsOHkqE+0aqrtum7PjdweTcx62yaHJffKPA9+xi5XkwSw90Q
gvLoWjJpXh3ptwi4hIt+bp5SLcz1MgCE3s+B9GMkZp6eji4CZRJ4Y8HsDzXziQLOBcJQbavNtaQc
TKFoacbgnSmdbaLo6XIalSOZIEQbh87hhxV6K+UWL1flpVWVAsJlAajEXmi7Y1H97PKK4PzSN+fr
yJifROBUNzCVFwmnra+Zipb4E5Lcxyic9aLP4yppTbb/i3T4qOrnXLKwuSrhJXSCcTyIRNfCOFlv
XN7teOJs72V0dh9L2Cz+VbtkRX0l6NYasCjX5gO0C9MmgYx+KYUX4dFrpHbbUVI/aeFPSRXeqpDp
Bj9ql3XKb0y+qM3C+ISe74cIUmyZPAsxtspP4l5ZqJ+0B83nubj14d/NJVghYmn7MX91fvjVASmN
lHcGwVvjoBHip3wjmlEjH6SoXc9kZSi06Y86jAP1G1cetsxKKdscQvvIUgoMDbTIh6hwcJVeWzdL
FeU4QV/2aGp2kibI09y/XFAZ2mNG6KrztPsjXWq3ds8FwxjebgVCba+YBkr11MEoN8SQGoQunHoR
wD0amqgzGzavEsdYCJ8t2cCLE6pF55bmrf4hm3BUaEi+H93IC5sJ2FrXcBTJB34BRd3BWFA4sQn8
EHoI6sWL/HNvZS+gmk9tJxOpZdOlBmBvL7QUxs9O7HcdiJgqyWSO2WiYWifPywrmOTezB/3RbwAO
kCUo352IbRcj3TrkIOubd3/438v4D7Ft3DhuapnoCgB3AiCh5BOxLotQ9OLv93+EDKzj/zShPRlD
D59DjxgDs4Iu+g15WT/OKtcR3zlU4vfTWVU8Pr0Rrd9q336s3AfGKPsXXriQ6NZ9n9r5uEGts4dA
CYsfvUEE6TTkT7HDGNd88HhGc9mYTrvIYqnxNJ2Dfxdy3D6py5NGKwO6Z/oHkj6jB0bWGX/iwhbN
OZ8Kc2Y/JJdWFNMlOGHs+2mgWXt6E5z02EvayLNFqqXbzAWxSJ4gVWUkRW1w4X6kYXnUfn/uK9T8
fyhoOAFAK7KnWzDARKpQjPRv4cyZKWEU8ND2VGBYHHhelKiwkDMuKr8qCOHoiTY9LsSSTJ0y3Om5
zPbN4R4hd7Ki1teS5VRo9DgtjemIkmKBmt9AVyH8O7supJ4F7fWQI9zIGnoUPi2/DYYul6u+5iWT
Nnlokkjfdc4WCCICsJu4zYJ/8oFwpYBTtAunbPpcyXF/jj8BGbtrurRFhOc9OHpTS5riE7CjTD41
SMNvyBkzXhdBL7s9fFTUr2SwP/m/pdiYt1Y8+cPm/1EIyP5d5UbuPMKsZl3LDwWXCMnKi/h3PD2z
CGJbKmdAx1uch5biRyNx6w3CCPCangeKeYwHKLHU3QjsWtCBfoAkwR+YArHSuJu8Xvtd34qhtsiL
s3yC9fez7iMXGfqasfXLzwl/T1pnQLZ2q5XYcSmbjHxP/9A27xwKycajveYOqzAvM3CRfiZE8eY6
nI0NQlJ53WwU2oTg26Z6QRQe3XHyzBwou5E1nBjHU2cxdKlVp9DtJEqKHiY19jXJ15FW+qthh9G3
7MbDqD0hJC4kwh8UFZkjzWYM6JzvLGwdsQBfme8bOryRIVZ67tt4bFVVLM9FXD4pW0GJ6ORp8Tdi
4nJ6S3aD+mYkO9ofUAzhp1lc820p3nSEDgqvhWKK+V8arvQArAOVqlMsfcrxjTAftF+gupUsk4Uu
x+TuA+NA2OPMbOvrKHF/9q/bRDZFWAK1pqkR/ayn+Hr9aqdjxKLKLgWR5GJILTb6RvYPQ7C4/P9u
ORGmHF3yzCa8y0jOFH93CrTEfxSjBF0EiTlKkF8k/2JU0TKPm5zvg6slp2L/EEy0ydkfd2uVivJM
qWFaC71OR8sCvnHywV9Rqc/3Z5M2hIVDYOyota7W0D+EpXlGCDVDQTpNeGWmOLMqNfWr9mWdkNpv
GYuGydcdMKsPCIlXc1LGOaspNv21aHliav8RjakyVwcswmUhf4ZBHyByl3pyxgpm9fvfdXUC4KzO
tu4VTi7sGKg3DdJhVLw6k/2u2icZUQJBG06UWsOYro6lLEAa68zHBoXCTBDX1LdBbB0EpvjZGyiV
uRE+GXFmHrA/q8FCObD20V/4gXKXk96VrBgMlOCPfO4TJLu2BNdhasrxouG2R9Tf4ha3DpYB5Wuc
u0SGgldtDs6NlsmbqCFk10eYfWxWmYr7FmwhHlxzl9F8T97rG2QylnqUtYMDx5M9tA9+oLYxWA8y
A61+YQeWWM79SjgKWslaAG554is4whtWWKHUsHr1n7NYjd26Xge/QVwVvSQh2RwbfymuNEN/70nO
f5l1YSAhk1y/G3FFQ3eccWGONkdgA9dS9HZQR7SD++bYaL7Y31aVlOxtswK1jcHpFCTFWeChLhpk
DhoqBem38sM9At8UHDlWF7FnNAdhktmFUDxRIqNrYrFlhR5Ay5crXOKjDrTyb8zQYmAalRw+P3dt
9fkWxL2T6HAMYBjUAvwxPOx3FXGcW7dkxacjYVhZ47bVwupVqkgXiYkIDfmm9tjzFNPCQnIDtgPR
22s3BLR4rzfdd1W6ClCfGZ33+Lcvtdd9Ki+ToBL4StuX9+m9nY0eq/rislQWncvUWRVJfHsBK+JW
b3dfPRlF4ThV5RejfaAqeMycTNOLFrA8X+xl3fZkznaeVNrgkR4kwoDX2c2Y4oUWRxg5an9f6XME
h5UtbZe1NWmkPyew4JFdfnNc+OItFmUqcl4XQxzLtu/yeQzsZyPgKfKbrZliJk7r5SqcKVjI+1/u
BssgQeOwTpFRPsa2skTlRCvfxpFwBXYQOkncuApZXm3H9ImD8i99TkdhAZ8NWgiMGx7rV2J3CCI5
HsIp3c31R1wqeIc8490LHA9lTaqll7qbFAsnlPCl3H4sik7s8zflMICkU+efqDw7eZ8f6rqVVVmh
MVUYBnN97fby00WKxxnfX/5ZjKDrN6aiFvfS8tCxuEgaYRk9kmkIXugVN6NzveA3HqSOhYMhKGKe
JFqOwIO7XaEuFPVFmRdwDreq6VIIsQvspti8FGzLp515iW3yBgfqUPz9yQyIEyzKSjfIuGcnc+Nl
53FjdgfO8sHjhl27ZrqtLlZXmHNt1QTIbla6eWi4A+ANmMq1Y82B1nJa/3DKWjO8O8ikeS55lE9/
rBW33a5rSwc91N8sK9MH9ltCWqCHzi9hh4nLPXYs0p63Ba1BX2BTEdHAMiV/ok7Gk3mE/xrbysXB
OsHxm/PTXLq1Oruj9e0Flq22LadcL1O/ORC4JSBOiiuM9gr4TqV/gDQtqKIIrYkM54hiOOsqqolt
2A0D6WDStP4Izq+kNwgo0WAOXA+JYOGHTHHRtkjSjMynoG6G7DtSNojNuPwXQEGyf2gtzfNWlyT2
XjOd44j92KD+xypnrDyiuuF5/HDY/EZqe/gEX7eB0n+d8POCNdlF0wY1m7sTcWRKbBWi+C4uj5nC
B0jFvqs+NEuIq0GN2tFo+Ec5OXuEP6EMYQGl1ODp7STVcqPqpma0n1YREle+zk8moNQW89cr0XwL
fAAaYcVNtR8pt2SOPnBu1ud25wfn1rf7gqp26RjKDz3HUT95C5RC584NThsfxQKdq5N1R+TRBfbA
LnMrcp9/gs2ZbcUq1Csl0IU5KbrWEzyG2Jkhrv1u0ZtToppSSSL0i8x5a5XjjkFQH6v5b2FdX7IJ
vboF3oVcuM4hjOKvru6TxveJKkRXAKn3T85gpZ6tqn9lWwIB3/VBbRBTulbAycK2aXgR41wbOmXg
QNMq39AVJRBU+wOnxXZr7+37NKgMNnKWvvc09ArGGJLv+Z8L4TP45esWft8psoczuZxBQjOBePHz
HnfM9/zkXAix763TqxsfjxCJJO/wC44vt7vQdUsZyVRYVoOgvnWad7bYV0tAORl3NjzUYDu/7Obu
WqBkovNas0ezzlTAzKuzlo5uxBonTn05kRcFsil3TfNLmAyO1pvn7UxNpbytHH9aAgi8kx5iyHjI
icVFxq6wt3jZ68/S36AKm2Naq1kZva+2TmU9hiSPQVVKpE2EnC2j51C+g2m9/apvF9lg1PQG/Omn
0IjWfrKAvR5i1MY4FRtksBpFRmm6vTYYcgXQohY4UYylbtw4v0ehzx2zWObmMXQkKwMRPi4tmoh+
q3pjDIws47VK8TWzDXuBY0GVQ0cty4xAUtzKd+NMYMqlzZxnAFEpu6jhaQq6w1LzfqWZnbl+1Ext
1NJJzOnKdPXbHlTD1DVoKPiK/9lF6jsvBmrphNXTr5s5JCLeqR0pENXQjtbZJZg8NpqEJzpiEEPC
MgiDFdPFY617TuVFl7NyyUehhnBo58hv4nU58I05y3YgWZ9eB7j2Pa2tlFhqo2b0bV3Wu38WzmBg
wJMu3+aKl2WkH9KRNkmt3gjDQSDG05gGaXl/6YKShvF8dfZ1sKiXXldXHqPH3Mk9TovBoyQdLGFK
HW4NxnjJDBIar/Qq9w8/gIlFAfiM1EG3D7XH7YhK+8OVXS0edGuuj2qsHaOAdp4HX4qWum5KqRvF
vYpmT1YLBHzUJ+tE/5oZUkk9cVP1/KO44APxW6dKTmbGj5HlMhR/DdeK+cRGlMAjFo9BcDdL2k+j
OaREG08x4yWQ/7Z94F/jlNUQeZiO+ccDNPVjmqNk+k3t5xtANrk8PesyWIs6/kziY/mEC9ozlx4a
J23X7ajw1HBSchZGBr0STwWoLZSz8yY3wfaqmO6j3ofzFeT778MV5efqiZKdOJqNjvQjOqEBpS1O
gRPjdQN14G+vee50c7cOmWF8rpUErCEJbtRotTUsZ1zewOs6b1ALGrpT8dZ7zi/2SWKsmn+AvAKN
4PzVI+0fJEqfYc9vuaTwPNb6o6rFvfbpGw5MOBCYUZ9XqywtiyzSlRNbECgj59v3X8GN2OOZmElV
V87n29XnqTND0Rb3EprztQeoMLMHFSKVPMkPzbdyOPMsDU2rr+tkD/sHPQpIDze3cIoQiT9PRrQF
35sD0nRiWngPOc4VxIJE9h2ITen07Rn1PQy31vcOVn0HCYBHpZa2fiJ4lU1YRVzyVZfuGDldE0tA
skEDnkOA3QtsbofmeNZIG8H5jD4vdXW+tk1Gb7facgTCLt2aL5K/zXEQ348EZTSFTgIxNeSi0JJS
6jGYW4/Ye3FLPeUuy+ZrFF8+ZAy8lp5WaiFO6xYQrRrR2K1Qu6faPBUD+RQSF9rtKHwSwLZyFOYW
A+VYQUUyNadoSx8tx9Ll4d9XBdOoDxHEgHd4nQ+N/GnZpOlxmoTK2U4z2TRFQdUJpFLAje2x7Zhy
/tyEc0VZ721GQ7VdIjevzlyYrZla2Mol3eELzY1wJrFGa/22gh5HN6pPvoMAUg/qLk46b5E6CrIE
VLetU/uLZZf1MMviF+iyKXWtJol1MUbHOVUGFrUb64eYirmuP5WylzxyRZs9lL7y1Uj9xeBJW13F
CnSMn9Z9szQVCtYNzdvgJN0h9C2zF60bGErQO9IVjG6ZajTfZttjNP3gB/dUunKBtjPwd6CSQDF5
9MRc9x2CAQkWj9oiFFZLLykegY2erht7tHrduDP6OUvsxynJNUOlhJb74k4Zha5aTl7appcs527a
IpIy+01oKZ7bpLDDvRDpT8aooRVVg/63KQWJpg/ZjfE+i2dpeaOlVHUcXr3WFkQuT62enDNFs6kr
m7TpDBlr4U3x0IRGnE2zburjcZJ5w/MLyt9d+Pc=
`protect end_protected
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
iisr0ydwFOm3eepmhOYSaxO3flYpViRsLN97vKyw+ai+x1TubmaH8qRRwK/QFeVsjlGTFdxookcr
olQwv0bmdw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
dJvTzz+PoD3n2Ot9SgKfpEhIshJxklhDhS1tYcrcmprfs5wN+lN+5Y+o9jEEql61IqDkJEIGu0xp
zaDWEeMqwkFuovmZnp/AnbrHb7R/19zPRtwSyZ8+VQRLsRMgscwutXu29fTUST6Ribitutae85tQ
1okc5mYK0mcSMIggcMg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
ZijKIWnBSOuwn6R4ZrzJp1qaSPGZMrP8GTp+SV+Sn9xEivGxLJtGM40xMLXxiYuxIopDD/A1usG6
HkSoNT6OzxHJWKkUEyyVzrZuJdNHJ5q3s3y5LSNY7eMxN9lY4/gygh7aVIBAO9YWzsWu3HLtrHA5
2vsUFQxQdkG5OTLVP1rH68P4j/dhqr/LVHw+9H76c/knGyalpHLRC7tnHQcfuezFJWlkzaNGHfUo
b5cE1YTvtdlZVmw2sVG/GbXIRi5fq3+Okdy+JgckZ4dVWbI20rfa9LkI09/kwD3anyrnovVQVx9h
F0AxolVKVVyWNAaSu1fvXllqzrdJiRLbdnsq0Q==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
LUajPw/jRTLlmEKb+9YylQ2jxw4jlSx/1GGaY1wFfWFdMwK2p0xvQMjui8K3EqJF0fnb3QNWuQDl
1vTtf04vcOAHkfRCeW7Mbp8qeUTtAsflGIPJDxHfVU8ZKprwANsENc8LVrpJ0WnjDFQIzJw7LDqc
Jj2TofWjKprdxXsMnu4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
KG6kiSPrd66zvVpG96eKD+783ebVLVFNF7pXgq+rCyBBRoa0N9Hp3DIWK5125mkICodI82zuSq6k
C8aCiPbDiv4tiuIn19WDNNPL4ncknL0KLZTLAkq0BIQIsnFNRaZegM9aXOdMYGKYLpnjSD9KRWRt
WPXPZfwprSu2D7PeDZMiij3MY+cixttgVmNfcx9Kkmvg+1B5sTSDTVs3fqpJBBO1YslTmxyJAIC6
uDuGqvQ1138z6f4f+f8vMXratK1Ypo3jPPb4FTNLYJio5Vd1Nbpl9kRRtj801Ie0GGhbggK6IXJx
785o6wX6g3tRyoHXGJ4DGUmWlIHATg0KIAflYw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 13424)
`protect data_block
rEtV4Bm3SmvVbKq1runp2SaaO1GImraXNQnz2t97NClVhlTBGZ14v+hHArmsTHZNME/QWduIEcCL
I8GdWPb/f0NXI5m0D8vUM2MFHCnzTFi82f0pjwFGBVpM7cHKBa5QRX5K/e5A/9KwgbwYV1tKqTXG
aWyx6JRfuzQINO3rQqM+n/1b6LSLygDM1QuiPthpMFKV8IfsVkaLDVqcLxH9/n7C64aisv1xK+OH
WhYRETSZok8+gbvdGdr2+VsE64ALl3DavNBK4S7IOGP5YtXviHmw+Qb/lvl6m+RggRYmTe1A6B5r
pghgGDxK2gS0ItU55quFmZMEuEH+bwLuaJA0/UWR19oWnbcTZnsCqEeN/xbKUzS6blm1K6RPZtYe
WSGhjFl0cKHEQe9DfEazTm6tS9mJ55lLbSuwE5o03LDGRapxUdSR0IiKy5C5UP4genzVw3zearva
qPWmPeGZcAEyFioI2o4OWQP+8mFdbza1kBOuw4BP76P2c+ij6wbxXAWVxtNmL8f6AgS1AV5SqIO0
ftTCve0JloVh9kpHsbXE1TS45+y0IuiC0N3a8PAEsXa/tnLsnAydpsXIQwMLXmgKfoXKzabAHHdI
XZJd/NxD7+xY3aINMVaO5eSSLIdjkYZIeqm6qf+x2eNd9v2nue3I9rjHkjMBIty9wqDCI5HznV19
h0aPmdRn9t7Ft5xXq0GXqSl2I9ZROoM4hg3RU6TCVY4IaDkErgP5cMhIwuHsntmeWvsvkZFygQtU
9TUaf90O9HINFkrdIHf0ZCgtCgUw6ffQNPAkw/6MaoKxm9wdczGi3ur+eyRvSLy7+LQX/dOqvXKM
9UFNjkQk392HWfkT8aaXacuJgFT4hmoEXDGY+tSqQrQRrPmelj+ksf3PcI2r64RSTjiR+9HNqWqJ
jPJio2xgGdQdGrH+UewLz0ySmNDYmqxIdyqKfv/B1BYMUpGd+l0eRCp0RwjP6nt7MKkBishuJTL2
2kpCGDQ4HELrlovnj0dMihRpFZAIpY55DfNVE2hnbkHthyDrEXapmovyPqDFel+HKDdimVyeM8CR
DKl0D2+OZK8XWAiVk9Ve6w0rONvwf/XvaAkgxa3rDJQo/8g8oiGRq4ku5l3OZUKrPVRcjVNCxHRq
81RLF34Ztt0FyGvWgFBPXPwl/QfIQcetnIv8BBHDyYvjjUEJZxJ0yVIBqSipzmyIn34Kt0GvhgJJ
oXsivJz4IQp2WiLYnKzv7NuBWYnOF+M/H8eFTLS7ynV/b0CRf7qayeeaKYL0uv9mUeXbILs7F9+8
XkemV9ihHFfHS04009LEbIzG2O13pEZ78n4YAi47TmCv22T8/Ve6sSAGowqE6FfeksCmQ1+Z98YQ
uXIyCDvF0dlGJwZxogjNRbjyCBj6OOagNPhSW71GcVdRv5XSPoZsF68V4hWQeNb+itDo7ZPtZJoJ
YzLjFDCWp+2G5a8+OtWGetlJNejx9rEDOQvPXNhCi9xzzzSvIevRpnt9XX8uVwzzSJnKhI91LgRg
ID2cjEMis7S70eKGvR2/KBOhU/KAbsgGALtSpbd8HPFqo4CWuxEHCYImqvt7m+vI7jIEpXbwjtx8
QWNgKL8RNSViXrcj5CsXvOI28Nk2V+GZ8jr1/8I4R/Yns4Xfj1TTWzVeNCNHbazn1nufigCGV4Vl
qtDHRGZpM2GzgWRsMj5tsZldV3pp52C/Dpr/92KUqWKMf/mZbYDJL1X0X2Tw7iboFgBgx1miq+ht
zrLMfkmBPAPakC7uTHv8wdz7HICGyvCct17zvGp/b+9c5KI7lCBCd9jn5PTW35q5ksO4eC9R2AqE
0xJmD9GKB17q8Jk7vlAMs/IJV9rgMDnRfyFkOl4hl2S45SaIY1ObTSNIHJYg+rp/nN6BMaWKrR+7
O6t2IjDTrKFkfrU0cMF3G7EiQSf6RI1d8iyqNJLJJ3fbFhF7XLnn/CwlkZ/03Hwn1nJocabXwbc2
9Q6RrzrxLCWMZVoXaUEBQvapxENHsyZOrmSevUQnuCknCx9Eh/GwdP2bYVHxXWg7ySdjQnVMtR4v
qT7n0yJuHI0ite3a92Oo/MBdlgCwEcxfvgz0ILRIK4wFe098lGOX0tVEsLdEUijEAeQR38bksd9a
fuwZzPBvMZQ+FON4CQYrDg971r8Qz89ArQjVxWF7TdD0Oaq9vaUrLocNzIw9AcIy8rWaQnwTR/K0
PsXLapKx1fOSZnuztuMHoRXGaqZVlZJGs22/GiJA9y/IBflmF5GNFnRUbXVT8r+FfMb7zIr8eP+b
OcPNp6F4kqt/b8gae/9JOIopCuWXpu5kDe0U5aC2qmvMuYbNI88aUx34i3WHd8NWKNbdtGDaQ8nM
iyuSX4j7EgwTOuBR/iFM7rZAATM59ZFv+9wRq8hbXVvfsBp13upya8YovLN1O9OWrzxUWym9ZPN1
mDhMT1YgOqVRaJ2ADyjP98UghsOXt6ybu9jGeEndP5T4mZjxZp82OMxqqS6VolaMbGRNPa271n87
65g6Q9l7RYtOL1PjdBOlgNpUdYZwxJ2EGgI1wPnrnuUiZ7sdhpuFkhJDdh2mHYlIUZHAsriLKEHR
XOdtU+Desuf1ojV6OryxMP052nRo3DfSj5+dKgSFWVXGLiS4Q5dQxDHIvUugnqZqf+FK5inrMME5
1eHWMPkrqY3H9syJMZ7RM9SwYc/zjL9fOqr9mE+npGx50NODLrgb0FydLIXRotOtI+YSbZHKzsKt
xoZNcJJ4GasWF69GNvRenQ3kp1eh71xjJw5a0KZmhsJJXThZLqSzb/sTisTU8jCaMh6S6ag0knK7
jonbXo+dctsmQfLpvLXHN4TNqJnY6alIH0HnsTz7EklgiqvaLbFn+25uUJSNDHESZG2BaAtNvG/4
WuvQCSLWeuJpsrPd+06Bzmmnlvn9InJZhGDVhnZlfj7Kh2PolkMjpLgzqH4f9hm/7zH7o7msjyvZ
Rj/JnTghr2ou7m5Ayp5K+yFEUt/y9WWmqXlKOpf12P8RITbx8ILm1kWRqB8L+xfF1r2HXt+av43O
pyKFj4Kq1FZckfpg2It+beWX2P825O6hDubEjA2RyF/zyyc3lMSS7vtAQMEOEJnWNslP5r0po6TK
F5+Ikch7kOxVShNh4LWWzwFtJb9SBv0iFIezeCGrgApE2blMwedVwOdpPdPvsQjNRYc8YG+dStcY
JUIrNMdc6m5qSEWO36XNGXLN/ZrjKkZcCr+z5oN8Oa4cO8jxqZo5bZDRVUh4VXM8a+hHCiVvWsEG
HkxV52NFazh7Duhb2Ix5qYigebEWfDnA3frHeY+lRAIE3+X/YoDjgbPuOqgwawkAvhSCeNbNxuTS
T9ZzmE8PWRbDowhElwhdboesSdX9tyyp7yCSM6fxKFXbUrPplwsSNsMYsJJ9grw0leD0bx4Cd0Vy
Y8dDayiLLROqmsdsKe7b4i2o6u8A0RQrPB31DrVO/yPiNygxChVesembc822gDnOAlf6FO502nEU
ItbE4EyM6ZuRk+69RSoT+2AZGRndh55WMQYb6i7ALzZeSttxOh6V+LV5SNYYdeQouPNdd+N45DZn
niJzd/11g0AFDHSZFxMK9p0VsOmXbAPFEjcTvMS7PiMwhUsav6ZfZjkVwz4X9s1v8DCZpNbKSq88
kGJQIcZYRdAPuD7V1zvdo0Zf6leEwpYg5lACMpJ8rGWyLPBrYD/CsWB0THjSjjkRntpZXUTF5Sq1
IPSYaQtCSAHZKO95giPeqw3zw2XQ5ci2o+t0eS1YvmSPlvMfZRnkdx98t2mA8ABd64gljY5f+0O0
px5Pec1R5VTiPNgghdEJlgrPqQxSP7vDXo0dtJmtqeP90QCRgaOqEt27wpqzv0KFUth0XwtaJeQ5
dejR/hEOliBmBscgJkx0gBF/nLybnTcQ6xwwOe25uqhvJIiepSDJE4ICrD/MSurrVfozreQGinSL
a/tMurSZF67eavaP5tFe2G44AmkmV4WBRnOeWOW2dJ2Q1sYHMUzfnWjdSw1sJJu6+Y0fUowVqq0Q
K2lcfV1v+sdb0adNWmXRoPrjCpXnMpWUyUXWCaY8r49ipi+4TCdxE4p/IUZfO1aumt4+xQcBT0dh
t1WR18HGPmHp719a+JPxfWkOQjw5JnEukkqxKV6fqJPDzGrHDJvrkNy1tkX0MN6Z+Olw//0xoyyG
9SEwAH72HyUlbfM2lhwM9N6f4cr+CLxPF2At8ppy84kKN/H+2RDt520oTXKCcGFU/txd8LdCs9qG
3diwadeKrfsinlzq/W+3PUAPHvjHcwRyRb4m4Wv6J0kW7ItY1ox7z91NbPGA481MOKLtCEwm6vuk
sfLsMi7+T/Hm+qsOXlQ9i8Pf9VAE9LWS2byZEwPIYDYtbLm2L09NRsMgfm6PotDA/9WaPtrx/CrM
IMllkwsRz86jBnsfx1s6w2v/gxQFWv0fY8mf1WywsWC+WArpCmvfHO0WMIJtyS/B+XcdiLdfrrJ3
qeRMJy8lhDn9mvRTVYzLXtu6Fv98eAxRiP4hPmT4+kxhTz4CT4cDPP9YKhdzODoL28xWfAYFbD04
Z7nP2BAp3o1FR08u/ctwg8oxDjcRwHkmDHquzKrPjnQBKXv9IMSCNsR7asFA/JqdhHcmuKZg6PRk
6XzKLzz1/Zs3XVZ/rpAcA4yoz12/yPHmsazO+a6cgbZy7JTSwRBhRd31L/KB4M7WXzNJ4paZAsOI
O5FWmQpp6eEyGGXpKkGy2qdqVRuRe0IjzwDJG6clerafsgCAj755Q2eTRVVvvRQw+G+hVjqaFu/+
m9KSJt+0hjHW1BHC4wyHN94ORPERUFukKcxOq8a3C4r5hTOZW3XWq1v7Ks4H7Zwi4AlNCGUKQ0ON
VSZKVFl61F+tBDQk+IqFz1WMfzhOfRJYfalfeqp5HOOIaK9cOhXG2oYdhceL4LDJlhJPAqpAc23Z
G9mCLMh7l3PvdGUWIx2s5Z4EpUsaxWTxxqD4a+cGuaZLzeV55zSCZ5qehwrwRTYvoBZE1+lOXnfi
Ryt8wko4y/GJZL/NuHI8l8tJKmVjS+XqWIN5sWUs9WMNit0HB/gZfmTuuvpwP7gjFuUjS2Q+jgYC
9ppF022c89tfs59OKVOjOQ9s2b2FlXyn4zn9AXI7AYGal0MNPRsQwnnaZJiTebyHcwtZucfEnh6z
9K9skBFs29qlMPNYsFP7y8mzdNhDng3TEgYpao3SPfXwDj/CSw/ObVggf8enRTUNlDfJ+17WwDyO
/ajc27MzTRLyBCCQhUYvMn80lvwSHxWDIL3xKvr2OLMoIAmgIZJG3sJMyhsOPqFxVb1Qk7NcojOn
D11t84xem8WyHJRbm0pbKV40U5U40scS0H5bcMWTEfGT4W0Mt47O181hbfymq/ykV0yIpouFyaDb
tUvUtKWqMknlkUxdllrfasNUWgJUfn8Cl8EV1Z3U5ABYiUNuRr5oKcdwlS7eB/n+UgV71hPGXiii
tFKvLiZLXS9l/eoEDDKLm6/8OksoHEEFzRFIR8skagCp4rd4fSGbOUietH2v8ecJdTlXFP0ex7TX
vh51q5DGduPDyv5nJCNInuPVn9Z9r55S/RGw+ySGAcaPEqaldHWakl5LrzE1/zI4K707/QMAGDAl
HQdn4RCGxESdD4HJn35p8o9hnYl7WqaHBddVyszwX//kjQ4qJolh4qp+txlSxnSJmCs83a+aCvMk
IbAnKPRH3SP74XCHOQ3bziFlRO0Q1JWSUp+e9CxVX0iTOPbgrB+wD9yT1o6m+o45pOEi4yqt1ZwB
6GRU83LP6o8j9UURxZDZ5WMgpNs4xuaPxAt+XstW7JOy51tYRnIykokiQYYg+aWP02kEZ7KL2cif
/t3AkMcRC0iKXbo3c1/h2uNlHbvkqXBOZnmGMzMriXwdE44Vt7izgW2oY3N5IFwqNHPtWi9SS6yA
hcD+oqiZ5YnDx8Be3R5HxKPygh4K5ePLmLR6um0pz3P8seQq1RKFP9ctf/u1v+7BlNqcdEez0X0N
I4X1lXx9dw1MpdfXfG2riDistMNSEH4Rrccb4Y/8cnRL9fh3mO987Fb0uI03HcxJiExzcwHZ9dco
s3vvxZTsaIGr2xmmD+LsMSI00fJFv0/mbMB3LLQfURbbNvuYtBK+fA8U8TOqSRvPYwXdCjv80svZ
ecFEkHhpXJBNTWSfUIzupFvHeVSIxo1FYZEy4sS3rdwokvKAiZK3rnzY+Ryed1c8On/UbN07w7X6
m6hS6lOKjYh+wxgHNswvu8N4sknoUX7Hwp9LBuU8+T0Ca/tOrCkICtK8kD5WkMmpO6IWAXUjK4Z8
/OmRAfzuhQeScqBIQTMuw2IkQruwSdfY/2ev76Y8v5xSi/gzcXVjJ6pNWe8NhZ5pL8vuon9u8D9v
ac2sfrz5UyHorqRAvNxS0nxaWXiYHYmk54FYhWXq/l06uTApLWRBji257/fX7WCJ6JtNeLLcAFYG
ui6Qlw2u4ilhoM33Ba9OQD+hKXM93Ab35owHIBR48oqnZlu/gRs9B7w/mQ9P7Aq6DwyYiEy7zN6P
zIrKF6PEXI2oo5vRRDZlhHjnxlG1qbQvhZImGO8R1X3muvsJ0Z9NyHew0PCSz7i9mW6rY2m1FJBl
jLOuJd9a+SClV8HYSGnNlxIsBxxS4kdb8pJAiZyO1GsyFurgT9epWWxp6MeSTru98ZQ2HxuKRPAh
LAyFLPqo+UCcwRFhd6SEMQhkLktq/u+ZRteg3JfitjOD93M8XsrOOZXAvc8OK94NqeYOeOIYfeiA
Bh8AZZCTK3Xt4QLtJ2oyW6gLSK/gyvC1P9wVOFLK0VxRCj7UL1ENqTGIylLsQV1EDrxvDeHgkr8n
+celZ0eo5oJZQc+yNrl6D8RLDaFfOndjQQuP1VMMLt/r+SCqzoIQpeaPzjqcZ5F2tDjq3vLL3JlK
L72Oet2zPrANXugoDIB6V4zLM77QJB3ICXMRSw3lLKHdoVR1fOZjH7lh6OFJTtre6FJuHv34LR+w
Sc62m9Wix3fNqnF2+9Qp1crzn4iR45vHd5J/GET/E8MKd44F0qOzeLFE7zgwf2+Iy6YZU0LJ7OWe
z0OlZFdrPEAemSaXyLI3Wg2c7W5Ef4UaJISjZfXU+aX/CFAP3KV58g4cgEfSs9fw8iuCFLuLh3Jh
GZg50idBZAseo6HiW0jDA4Nn9S03k0B9v1GqmSWPhP3YhzM/EK26PGYcgF0eivassZQFQSrc6Jil
NsS91pv/HNapigSr2eVnB1wDsPbMOeAWMefmfTJEy770FLL4nJvHH23BcLXTk4vQBAncc/ypOm8W
7K8vIx4OeBmtzlz+HHoN+Ki6SGNYfqwhxJ3Iclxi79j84bg6FlZ/sJmHW3B/BcC+MY8FKzU6WOYl
4ii86/wI6/Ymwxsc/fLpXuJgVnj1G6seQpKpHtSA/+fDWnvd7+23DNdK6HfBGZ+9h1HUSEREwoXj
99Lau/2+L3cctWkmre/U6dbCrUJx+9esOM4lxm0AgWGdwsmiTdhQhm1GO9efcz3nod2wuyLOoRFB
PRHCoU9xUQeiUOHk4A7KAbqWNnKmpYJRUFtQ3lyKzD1zt5ChuiYS+1trXUf0emVBc0RXJeOJM+oy
pdYUCtO7HboKltA1VXkzyJrTAnuRxZ1FiBt3NN7AswsisLqFyQAuddvPGzztWsE/T1mimJzTQK+f
f/Lv/B2HA5evVFXQh51vSrY2ub6y7UStyV1sLz4hRJqfnfYYtn4qKe+hiDORa9CUQSPNnR1nNwVS
OkQkOe7FGwVo2tF2pgxsVaObzuNgR5W00kvbG+HZrYc/VlQXu17CoYAXyKuimeuQUX6IOYQfOtOi
P/656J+ayneD3DdaM4CAxyapYpzyxTtzYw3d3BmLALR36ZccU/VhfYiHYcCtxg9XbjQuCmn0V9tm
VhQXJGWmHnrfgcSUohqw+023UH3zssHKe3HoXWtNxZuFWTm8uBN+FQJWwZg5o1SnFllNmOyhtpJN
XO8SRcSR9ghUC2PkIXtJSv9s4l9Gp1a1m77LFh4HZa3el3/C2W/EGR0B7R2Pzy8Y8kQnfhLd33aj
x06UIZTX/x5oFzGlrD7CuvF5JKo9vOIxzToHh5kdoOD6zjUKUGJYQquc/mE0DMReySwBHVcUIpLT
P0tPzMBnO/rCSMnc9ks+pckz6Kip2rnVsPX+HfAom3uAkz3m42JwY6b/bHCDef0RK/3WUac0dSKM
kEYtrhwBrDcHu2UrE9D4N3TPQpPhltMcgA3rCnJNzhStxgWfSGcSOX489GY3JX51jrPQ4KLwg3Te
uHo9coFgA7zxBD435Ek9ZfJZAcIO0Zt7s2uZwvFyTVmPWSIEW6daOf4f0gxbKYxTM8WdybNJXju9
AuBEu/AVDZ4+JGpSkGoI5khnH625YEMjmDdM7yC1jJKKFINwCI4JiWEAl64hmuHGoqBCRVIgMBYp
hCwZyPZsI1RVFT2dRHGrlaHOioCJ4s9qfl+jXm7NnHKSvxNcZuT+Ubv1PiLUCoGFG+sBAEE7OLIx
156yyQxHYKvnmGVKdSv1JDcqFOBTX70OTB59UidJY5m6HfaEtJa2TRtYd9dfiLW4T+bJCNByHVNJ
BP5PQ906S6hbtLHGTio7Jc/IK25r925Vil9Q71uHrIoeIOuJxTU2THyuDb8th3jMJAWZ28arIcD1
7zvWma3Osergrj5anOk44hmyfHWNmtZzWfjZ8g2mz5sCZf2xhx1wqFFUm2rP++JnqWZWqJpie9P/
FaUflE91AeT0nPFGzJobKS7vxP3YCIxqDXb4W+GNrbrMzqJv62IjXU/5VT55UrYBObNBKr5pNuPp
nl5/A4Sckp8yUP4cXgns9z450Dg8dC2rJeiALt5KoIAI0mqVyz6dmncs3964qm5zvqkhfspebtxv
+/5/HLRk1pKJC/0BEIG3U8PblJ4S3qWAR1ocDE72mQpK1S8J2OpVtmNPWqj+Q8XxAKeFhxNgDseh
3Ys+1h4JfwdhkuL1WuvUWRmr43qJQgrAU1dsla9XqNHMblQy5XDeZddFiARAWW3wQ5mQedn8mA5U
VcD6AFj0+myr/qmfSW0WZomoAlWRHZR8ww60cUN+wUjqZnXcQrMta/v0wrgmsv3Gm8XyHnb593L7
eG4J4D9wit4Xzo8ICB6DhsQ+QOfSpMQ+Uks7P55CB0dzcg3FIehDZWZfWj4jNvAY1gUscTVyYm20
ltt13qwaUWOMqO2BXOxzc3jQ7Wi51nA9iG29RjBhvOs8SIEWaroBNDKCGcQ3HvQk5wLRSMiGq6If
A/12iSm/sYD052pbIGYML2/C6RhJW3M52SyyIXliJtXn3B/si0AgHYfzqT0vXPlxQANLqtU76Uyl
JwP32T30MRjAm6qMdCDKPfadIidlWtpiNS/lxnet2Fgcu2RTx9pSlm5DVmFbm0VH38okdGyJDSIF
p+FEprQ9eDPqoUzNbjd4QlY9bph/Q/CVR7m8dBAbCFdT7pbH6Wdwk7LdzgRhdtDP9jIsKTNNte1q
GMvooCehfU4GiCw5Aa6s4ZZbQSVYuhRYgOHzovGzq1+5wOo7N2JA8vlRYSwwjVyUb2rqq7iWsbg+
JuJapgIlHZCoOngniStpVBvML3CdjisUnPZs7sdb7aLtZRCI8TsyQed5VNTTOv4NXqNYWssW/xWq
6f3VNQFk/gh7GyMyJ3d38QobBhLCLY4hmDK8JEZCWxIL9DN0kaLLviNG2wWKwZL2cD0vxQK+D5M6
PEIAaggXEQmwA138Km55S7ojd/DGbrMb9D+Sj/6WEvXGOXlRpGpFQu+ha0Zx9dB76EhCiH5bYq8w
bqILWA9l62keHeCH4BpTHJg8hCuBw91g8KmUfdeZqhZBGmg+jggKMotw4SoSSGVLhK21Ezgu6kSH
xJ58XYzSKRTRJwiPKrAW/4WoTYupBxtoBdz+SqQ84ip6iqZT0q/H92SSDYacziEwJ3uB05PxUTio
eQqXesLnKDT7FS0PXWpbQ6ZqpzZuwWNroQXXNu1J8npgWoFeQMl5AlAUYOaByxJ9IkIGyYOKvYWA
OgomT6uFDSlbXupq1moQTu5MMxn/ZMWnYIjBUqki5h/yxrMoUH85oCigWxdSG6HkE/Dlp5CORbr6
gSgkUnNa61GlwM8WyTdTAlnPRGGVdb1X4S8CEW5ZGHUyn/oCYY1HKlwtLQyyQeVplakXQCvrJ6kQ
Bg4uyIJgb9c+RoZytzND3ph+muOAgedD8oFvvTx3sNPkT//7bqD5QROXfB/CNgx/tsm0OEgPUtyx
ftKJXDzA7GJhHQNybc4wtemLWBnKgjvyPxxbdEyRdD4wobPkbKzOOTeAMstEFoqr0Y8H7QhkUQam
2jDhUkqJ284W1O4H/XuuB/Vl/qvyU9hoJQcPCgaBGFdq4QRDbpDlmpqlxXrXaHZlgWffJAnQn8Fv
sk4H4Ea0/WjIO8ifNl6SfybYK/5oIAIgUi2Nk8KE1m8gnJUPMXSYWsAeYkR6ybc3C9yJj6NzwSUW
CqJJugNELmiv6J9VPA9PaGQ64c+3pm+cpyDNDHQ1vY1qvj3nEgqx5n0Y39nCsQImiPV/Sg9yh2Bk
HQ4ZMwhLI+nFwK0OZ/zkh4odiDsOBE3M+kMnlZ5BJmXK2t+A59T7AvwpyVEVogCrqtbogq7EyP2R
/KoZIKfyE5vXtjndlUyZjAiNgpjTc1VakSJb07v4Jnou0T2uuBBVLBE8e5fRknL4orW7nwiNGR3A
FjSKy2+CMPD486jawdbxAbwfChXyeCLhOttQScZ5/UuJXKibAEIiWMO0zwi6h0787UrxLIJuioc4
nULkOdY/JKeviefRwjlnZY4q5i8h1F/oMT/HYeWGqrroYovXKcnUxbMWZD+jaopXwpKIKwV/u7gL
ICCVqIDSf8Gom4lbOw1ZcRZKLSyvneRHTfAaqVZivhe1m/wTbLuvizyo5v0fH7nNqAzAgtH7oirl
O09aUTNKpDm720Ay5sPItAEz0pFiZQIRDfWGCHCuuGaXZG0xuyl8ShQxJz/9BEeMVCPhZnOaNv8X
bNe0t7omyZMkSFNPR4U3evzcLjcuK7VEZZdMkX6tka5B3C4bRACtFyOeQCt79Xrriwjp3eDw8Yxl
i4ZnF2nnIzXhArnO3TFIuhZXD15yn9vVT16wMxV0rkzQ2P+1+g1u7aeDNwRT2xaUvdsFLGr61RsA
krrBB/uXlnDPWrMSIoSOLSTC16X9VfDFq7XtK2uA0BmKK5FJeWOI1ArralXwFlj8KdxJ0L25ro4p
IZhykME1I9BoKS3TjfbTDmfX1WVooDH5YBhsp3fnJjyZm0vZ9V7nsz7eC/en9E7r62uh+MrQsnxQ
HEOfnD5I5vsCo4FmTwA6lhGbUO5+59ZQ6busQ3Da/4/gKfWPi7Rx+7Y3AL2HiXlvnKxN32bezNjp
dYjFYXVPdjaFpz0GrP3APSdp3La8UFzXbVhLuwuv0mDPBPScpRdDo2G0X7gso054AFVY6n9p8tdd
5zYfJhmIvj/NqUn/wjbA1Ptn5IjIafceDKqCWE+o9brGUJBbmYQvsYtD4pa83lH8uoKqIULDiSXg
6yxJwmM59viy5qkaOJYrzsWg3wlO+PCkAvqg5HpLKFZUsQIYlmnRFiU2siCw5xh8Lv91KTWQE26H
JygYAC9Di3Fuj9L52dCNMgbtOCerVWI4RqUpIFnC+F3fY0d0urDChvfCB4v5ZfmHK7UQWuUl5DRA
Ncjw2/e3pwmVbyls0YUVrzdizPbhlKDJX7xzvC4K10nrAjnG++RxySdAOFZXubgPzTr62JQtSXmW
IIqO1vKeYP7Zb22j7YH/bXfT/F5cufY3ai23D7tEwC0XTRPsjTnkyjrFZDKy7H4jtCHGqFDihiKn
lzcjRj0nxDEydN0T3XZVLw1ckchidFI80LIRUz5/80zPxLB32RudBu90cckCuB1n8lnmLPij/zE+
aucm3Kwj0LLI/ESxyT4RR0eJrEyPbq9hWnKrwAbHzhPaF+fffQmkrsUci95u/+x5LJP6G4/zY5ZU
42fBuiz8uxbweZF5KyivG516l+EjFp1oi1B96wKupMTLWNO5UC4Axpffk4EKZEEns0gYRwpJIJRE
k8wuG63EMGWNSCTG/RO5z9NxoZktD7g60co/R42CBfts1WLyi+ow7jHsNlPv2xDWQd26f9hJIG0e
TVk9W8+8PqEnJMnsgKAfDu8qnlNGOsOHkqE+0aqrtum7PjdweTcx62yaHJffKPA9+xi5XkwSw90Q
gvLoWjJpXh3ptwi4hIt+bp5SLcz1MgCE3s+B9GMkZp6eji4CZRJ4Y8HsDzXziQLOBcJQbavNtaQc
TKFoacbgnSmdbaLo6XIalSOZIEQbh87hhxV6K+UWL1flpVWVAsJlAajEXmi7Y1H97PKK4PzSN+fr
yJifROBUNzCVFwmnra+Zipb4E5Lcxyic9aLP4yppTbb/i3T4qOrnXLKwuSrhJXSCcTyIRNfCOFlv
XN7teOJs72V0dh9L2Cz+VbtkRX0l6NYasCjX5gO0C9MmgYx+KYUX4dFrpHbbUVI/aeFPSRXeqpDp
Bj9ql3XKb0y+qM3C+ISe74cIUmyZPAsxtspP4l5ZqJ+0B83nubj14d/NJVghYmn7MX91fvjVASmN
lHcGwVvjoBHip3wjmlEjH6SoXc9kZSi06Y86jAP1G1cetsxKKdscQvvIUgoMDbTIh6hwcJVeWzdL
FeU4QV/2aGp2kibI09y/XFAZ2mNG6KrztPsjXWq3ds8FwxjebgVCba+YBkr11MEoN8SQGoQunHoR
wD0amqgzGzavEsdYCJ8t2cCLE6pF55bmrf4hm3BUaEi+H93IC5sJ2FrXcBTJB34BRd3BWFA4sQn8
EHoI6sWL/HNvZS+gmk9tJxOpZdOlBmBvL7QUxs9O7HcdiJgqyWSO2WiYWifPywrmOTezB/3RbwAO
kCUo352IbRcj3TrkIOubd3/438v4D7Ft3DhuapnoCgB3AiCh5BOxLotQ9OLv93+EDKzj/zShPRlD
D59DjxgDs4Iu+g15WT/OKtcR3zlU4vfTWVU8Pr0Rrd9q336s3AfGKPsXXriQ6NZ9n9r5uEGts4dA
CYsfvUEE6TTkT7HDGNd88HhGc9mYTrvIYqnxNJ2Dfxdy3D6py5NGKwO6Z/oHkj6jB0bWGX/iwhbN
OZ8Kc2Y/JJdWFNMlOGHs+2mgWXt6E5z02EvayLNFqqXbzAWxSJ4gVWUkRW1w4X6kYXnUfn/uK9T8
fyhoOAFAK7KnWzDARKpQjPRv4cyZKWEU8ND2VGBYHHhelKiwkDMuKr8qCOHoiTY9LsSSTJ0y3Om5
zPbN4R4hd7Ki1teS5VRo9DgtjemIkmKBmt9AVyH8O7supJ4F7fWQI9zIGnoUPi2/DYYul6u+5iWT
Nnlokkjfdc4WCCICsJu4zYJ/8oFwpYBTtAunbPpcyXF/jj8BGbtrurRFhOc9OHpTS5riE7CjTD41
SMNvyBkzXhdBL7s9fFTUr2SwP/m/pdiYt1Y8+cPm/1EIyP5d5UbuPMKsZl3LDwWXCMnKi/h3PD2z
CGJbKmdAx1uch5biRyNx6w3CCPCangeKeYwHKLHU3QjsWtCBfoAkwR+YArHSuJu8Xvtd34qhtsiL
s3yC9fez7iMXGfqasfXLzwl/T1pnQLZ2q5XYcSmbjHxP/9A27xwKycajveYOqzAvM3CRfiZE8eY6
nI0NQlJ53WwU2oTg26Z6QRQe3XHyzBwou5E1nBjHU2cxdKlVp9DtJEqKHiY19jXJ15FW+qthh9G3
7MbDqD0hJC4kwh8UFZkjzWYM6JzvLGwdsQBfme8bOryRIVZ67tt4bFVVLM9FXD4pW0GJ6ORp8Tdi
4nJ6S3aD+mYkO9ofUAzhp1lc820p3nSEDgqvhWKK+V8arvQArAOVqlMsfcrxjTAftF+gupUsk4Uu
x+TuA+NA2OPMbOvrKHF/9q/bRDZFWAK1pqkR/ayn+Hr9aqdjxKLKLgWR5GJILTb6RvYPQ7C4/P9u
ORGmHF3yzCa8y0jOFH93CrTEfxSjBF0EiTlKkF8k/2JU0TKPm5zvg6slp2L/EEy0ydkfd2uVivJM
qWFaC71OR8sCvnHywV9Rqc/3Z5M2hIVDYOyota7W0D+EpXlGCDVDQTpNeGWmOLMqNfWr9mWdkNpv
GYuGydcdMKsPCIlXc1LGOaspNv21aHliav8RjakyVwcswmUhf4ZBHyByl3pyxgpm9fvfdXUC4KzO
tu4VTi7sGKg3DdJhVLw6k/2u2icZUQJBG06UWsOYro6lLEAa68zHBoXCTBDX1LdBbB0EpvjZGyiV
uRE+GXFmHrA/q8FCObD20V/4gXKXk96VrBgMlOCPfO4TJLu2BNdhasrxouG2R9Tf4ha3DpYB5Wuc
u0SGgldtDs6NlsmbqCFk10eYfWxWmYr7FmwhHlxzl9F8T97rG2QylnqUtYMDx5M9tA9+oLYxWA8y
A61+YQeWWM79SjgKWslaAG554is4whtWWKHUsHr1n7NYjd26Xge/QVwVvSQh2RwbfymuNEN/70nO
f5l1YSAhk1y/G3FFQ3eccWGONkdgA9dS9HZQR7SD++bYaL7Y31aVlOxtswK1jcHpFCTFWeChLhpk
DhoqBem38sM9At8UHDlWF7FnNAdhktmFUDxRIqNrYrFlhR5Ay5crXOKjDrTyb8zQYmAalRw+P3dt
9fkWxL2T6HAMYBjUAvwxPOx3FXGcW7dkxacjYVhZ47bVwupVqkgXiYkIDfmm9tjzFNPCQnIDtgPR
22s3BLR4rzfdd1W6ClCfGZ33+Lcvtdd9Ki+ToBL4StuX9+m9nY0eq/rislQWncvUWRVJfHsBK+JW
b3dfPRlF4ThV5RejfaAqeMycTNOLFrA8X+xl3fZkznaeVNrgkR4kwoDX2c2Y4oUWRxg5an9f6XME
h5UtbZe1NWmkPyew4JFdfnNc+OItFmUqcl4XQxzLtu/yeQzsZyPgKfKbrZliJk7r5SqcKVjI+1/u
BssgQeOwTpFRPsa2skTlRCvfxpFwBXYQOkncuApZXm3H9ImD8i99TkdhAZ8NWgiMGx7rV2J3CCI5
HsIp3c31R1wqeIc8490LHA9lTaqll7qbFAsnlPCl3H4sik7s8zflMICkU+efqDw7eZ8f6rqVVVmh
MVUYBnN97fby00WKxxnfX/5ZjKDrN6aiFvfS8tCxuEgaYRk9kmkIXugVN6NzveA3HqSOhYMhKGKe
JFqOwIO7XaEuFPVFmRdwDreq6VIIsQvspti8FGzLp515iW3yBgfqUPz9yQyIEyzKSjfIuGcnc+Nl
53FjdgfO8sHjhl27ZrqtLlZXmHNt1QTIbla6eWi4A+ANmMq1Y82B1nJa/3DKWjO8O8ikeS55lE9/
rBW33a5rSwc91N8sK9MH9ltCWqCHzi9hh4nLPXYs0p63Ba1BX2BTEdHAMiV/ok7Gk3mE/xrbysXB
OsHxm/PTXLq1Oruj9e0Flq22LadcL1O/ORC4JSBOiiuM9gr4TqV/gDQtqKIIrYkM54hiOOsqqolt
2A0D6WDStP4Izq+kNwgo0WAOXA+JYOGHTHHRtkjSjMynoG6G7DtSNojNuPwXQEGyf2gtzfNWlyT2
XjOd44j92KD+xypnrDyiuuF5/HDY/EZqe/gEX7eB0n+d8POCNdlF0wY1m7sTcWRKbBWi+C4uj5nC
B0jFvqs+NEuIq0GN2tFo+Ec5OXuEP6EMYQGl1ODp7STVcqPqpma0n1YREle+zk8moNQW89cr0XwL
fAAaYcVNtR8pt2SOPnBu1ud25wfn1rf7gqp26RjKDz3HUT95C5RC584NThsfxQKdq5N1R+TRBfbA
LnMrcp9/gs2ZbcUq1Csl0IU5KbrWEzyG2Jkhrv1u0ZtToppSSSL0i8x5a5XjjkFQH6v5b2FdX7IJ
vboF3oVcuM4hjOKvru6TxveJKkRXAKn3T85gpZ6tqn9lWwIB3/VBbRBTulbAycK2aXgR41wbOmXg
QNMq39AVJRBU+wOnxXZr7+37NKgMNnKWvvc09ArGGJLv+Z8L4TP45esWft8psoczuZxBQjOBePHz
HnfM9/zkXAix763TqxsfjxCJJO/wC44vt7vQdUsZyVRYVoOgvnWad7bYV0tAORl3NjzUYDu/7Obu
WqBkovNas0ezzlTAzKuzlo5uxBonTn05kRcFsil3TfNLmAyO1pvn7UxNpbytHH9aAgi8kx5iyHjI
icVFxq6wt3jZ68/S36AKm2Naq1kZva+2TmU9hiSPQVVKpE2EnC2j51C+g2m9/apvF9lg1PQG/Omn
0IjWfrKAvR5i1MY4FRtksBpFRmm6vTYYcgXQohY4UYylbtw4v0ehzx2zWObmMXQkKwMRPi4tmoh+
q3pjDIws47VK8TWzDXuBY0GVQ0cty4xAUtzKd+NMYMqlzZxnAFEpu6jhaQq6w1LzfqWZnbl+1Ext
1NJJzOnKdPXbHlTD1DVoKPiK/9lF6jsvBmrphNXTr5s5JCLeqR0pENXQjtbZJZg8NpqEJzpiEEPC
MgiDFdPFY617TuVFl7NyyUehhnBo58hv4nU58I05y3YgWZ9eB7j2Pa2tlFhqo2b0bV3Wu38WzmBg
wJMu3+aKl2WkH9KRNkmt3gjDQSDG05gGaXl/6YKShvF8dfZ1sKiXXldXHqPH3Mk9TovBoyQdLGFK
HW4NxnjJDBIar/Qq9w8/gIlFAfiM1EG3D7XH7YhK+8OVXS0edGuuj2qsHaOAdp4HX4qWum5KqRvF
vYpmT1YLBHzUJ+tE/5oZUkk9cVP1/KO44APxW6dKTmbGj5HlMhR/DdeK+cRGlMAjFo9BcDdL2k+j
OaREG08x4yWQ/7Z94F/jlNUQeZiO+ccDNPVjmqNk+k3t5xtANrk8PesyWIs6/kziY/mEC9ozlx4a
J23X7ajw1HBSchZGBr0STwWoLZSz8yY3wfaqmO6j3ofzFeT778MV5efqiZKdOJqNjvQjOqEBpS1O
gRPjdQN14G+vee50c7cOmWF8rpUErCEJbtRotTUsZ1zewOs6b1ALGrpT8dZ7zi/2SWKsmn+AvAKN
4PzVI+0fJEqfYc9vuaTwPNb6o6rFvfbpGw5MOBCYUZ9XqywtiyzSlRNbECgj59v3X8GN2OOZmElV
V87n29XnqTND0Rb3EprztQeoMLMHFSKVPMkPzbdyOPMsDU2rr+tkD/sHPQpIDze3cIoQiT9PRrQF
35sD0nRiWngPOc4VxIJE9h2ITen07Rn1PQy31vcOVn0HCYBHpZa2fiJ4lU1YRVzyVZfuGDldE0tA
skEDnkOA3QtsbofmeNZIG8H5jD4vdXW+tk1Gb7facgTCLt2aL5K/zXEQ348EZTSFTgIxNeSi0JJS
6jGYW4/Ye3FLPeUuy+ZrFF8+ZAy8lp5WaiFO6xYQrRrR2K1Qu6faPBUD+RQSF9rtKHwSwLZyFOYW
A+VYQUUyNadoSx8tx9Ll4d9XBdOoDxHEgHd4nQ+N/GnZpOlxmoTK2U4z2TRFQdUJpFLAje2x7Zhy
/tyEc0VZ721GQ7VdIjevzlyYrZla2Mol3eELzY1wJrFGa/22gh5HN6pPvoMAUg/qLk46b5E6CrIE
VLetU/uLZZf1MMviF+iyKXWtJol1MUbHOVUGFrUb64eYirmuP5WylzxyRZs9lL7y1Uj9xeBJW13F
CnSMn9Z9szQVCtYNzdvgJN0h9C2zF60bGErQO9IVjG6ZajTfZttjNP3gB/dUunKBtjPwd6CSQDF5
9MRc9x2CAQkWj9oiFFZLLykegY2erht7tHrduDP6OUvsxynJNUOlhJb74k4Zha5aTl7appcs527a
IpIy+01oKZ7bpLDDvRDpT8aooRVVg/63KQWJpg/ZjfE+i2dpeaOlVHUcXr3WFkQuT62enDNFs6kr
m7TpDBlr4U3x0IRGnE2zburjcZJ5w/MLyt9d+Pc=
`protect end_protected
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
iisr0ydwFOm3eepmhOYSaxO3flYpViRsLN97vKyw+ai+x1TubmaH8qRRwK/QFeVsjlGTFdxookcr
olQwv0bmdw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
dJvTzz+PoD3n2Ot9SgKfpEhIshJxklhDhS1tYcrcmprfs5wN+lN+5Y+o9jEEql61IqDkJEIGu0xp
zaDWEeMqwkFuovmZnp/AnbrHb7R/19zPRtwSyZ8+VQRLsRMgscwutXu29fTUST6Ribitutae85tQ
1okc5mYK0mcSMIggcMg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
ZijKIWnBSOuwn6R4ZrzJp1qaSPGZMrP8GTp+SV+Sn9xEivGxLJtGM40xMLXxiYuxIopDD/A1usG6
HkSoNT6OzxHJWKkUEyyVzrZuJdNHJ5q3s3y5LSNY7eMxN9lY4/gygh7aVIBAO9YWzsWu3HLtrHA5
2vsUFQxQdkG5OTLVP1rH68P4j/dhqr/LVHw+9H76c/knGyalpHLRC7tnHQcfuezFJWlkzaNGHfUo
b5cE1YTvtdlZVmw2sVG/GbXIRi5fq3+Okdy+JgckZ4dVWbI20rfa9LkI09/kwD3anyrnovVQVx9h
F0AxolVKVVyWNAaSu1fvXllqzrdJiRLbdnsq0Q==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
LUajPw/jRTLlmEKb+9YylQ2jxw4jlSx/1GGaY1wFfWFdMwK2p0xvQMjui8K3EqJF0fnb3QNWuQDl
1vTtf04vcOAHkfRCeW7Mbp8qeUTtAsflGIPJDxHfVU8ZKprwANsENc8LVrpJ0WnjDFQIzJw7LDqc
Jj2TofWjKprdxXsMnu4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
KG6kiSPrd66zvVpG96eKD+783ebVLVFNF7pXgq+rCyBBRoa0N9Hp3DIWK5125mkICodI82zuSq6k
C8aCiPbDiv4tiuIn19WDNNPL4ncknL0KLZTLAkq0BIQIsnFNRaZegM9aXOdMYGKYLpnjSD9KRWRt
WPXPZfwprSu2D7PeDZMiij3MY+cixttgVmNfcx9Kkmvg+1B5sTSDTVs3fqpJBBO1YslTmxyJAIC6
uDuGqvQ1138z6f4f+f8vMXratK1Ypo3jPPb4FTNLYJio5Vd1Nbpl9kRRtj801Ie0GGhbggK6IXJx
785o6wX6g3tRyoHXGJ4DGUmWlIHATg0KIAflYw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 13424)
`protect data_block
rEtV4Bm3SmvVbKq1runp2SaaO1GImraXNQnz2t97NClVhlTBGZ14v+hHArmsTHZNME/QWduIEcCL
I8GdWPb/f0NXI5m0D8vUM2MFHCnzTFi82f0pjwFGBVpM7cHKBa5QRX5K/e5A/9KwgbwYV1tKqTXG
aWyx6JRfuzQINO3rQqM+n/1b6LSLygDM1QuiPthpMFKV8IfsVkaLDVqcLxH9/n7C64aisv1xK+OH
WhYRETSZok8+gbvdGdr2+VsE64ALl3DavNBK4S7IOGP5YtXviHmw+Qb/lvl6m+RggRYmTe1A6B5r
pghgGDxK2gS0ItU55quFmZMEuEH+bwLuaJA0/UWR19oWnbcTZnsCqEeN/xbKUzS6blm1K6RPZtYe
WSGhjFl0cKHEQe9DfEazTm6tS9mJ55lLbSuwE5o03LDGRapxUdSR0IiKy5C5UP4genzVw3zearva
qPWmPeGZcAEyFioI2o4OWQP+8mFdbza1kBOuw4BP76P2c+ij6wbxXAWVxtNmL8f6AgS1AV5SqIO0
ftTCve0JloVh9kpHsbXE1TS45+y0IuiC0N3a8PAEsXa/tnLsnAydpsXIQwMLXmgKfoXKzabAHHdI
XZJd/NxD7+xY3aINMVaO5eSSLIdjkYZIeqm6qf+x2eNd9v2nue3I9rjHkjMBIty9wqDCI5HznV19
h0aPmdRn9t7Ft5xXq0GXqSl2I9ZROoM4hg3RU6TCVY4IaDkErgP5cMhIwuHsntmeWvsvkZFygQtU
9TUaf90O9HINFkrdIHf0ZCgtCgUw6ffQNPAkw/6MaoKxm9wdczGi3ur+eyRvSLy7+LQX/dOqvXKM
9UFNjkQk392HWfkT8aaXacuJgFT4hmoEXDGY+tSqQrQRrPmelj+ksf3PcI2r64RSTjiR+9HNqWqJ
jPJio2xgGdQdGrH+UewLz0ySmNDYmqxIdyqKfv/B1BYMUpGd+l0eRCp0RwjP6nt7MKkBishuJTL2
2kpCGDQ4HELrlovnj0dMihRpFZAIpY55DfNVE2hnbkHthyDrEXapmovyPqDFel+HKDdimVyeM8CR
DKl0D2+OZK8XWAiVk9Ve6w0rONvwf/XvaAkgxa3rDJQo/8g8oiGRq4ku5l3OZUKrPVRcjVNCxHRq
81RLF34Ztt0FyGvWgFBPXPwl/QfIQcetnIv8BBHDyYvjjUEJZxJ0yVIBqSipzmyIn34Kt0GvhgJJ
oXsivJz4IQp2WiLYnKzv7NuBWYnOF+M/H8eFTLS7ynV/b0CRf7qayeeaKYL0uv9mUeXbILs7F9+8
XkemV9ihHFfHS04009LEbIzG2O13pEZ78n4YAi47TmCv22T8/Ve6sSAGowqE6FfeksCmQ1+Z98YQ
uXIyCDvF0dlGJwZxogjNRbjyCBj6OOagNPhSW71GcVdRv5XSPoZsF68V4hWQeNb+itDo7ZPtZJoJ
YzLjFDCWp+2G5a8+OtWGetlJNejx9rEDOQvPXNhCi9xzzzSvIevRpnt9XX8uVwzzSJnKhI91LgRg
ID2cjEMis7S70eKGvR2/KBOhU/KAbsgGALtSpbd8HPFqo4CWuxEHCYImqvt7m+vI7jIEpXbwjtx8
QWNgKL8RNSViXrcj5CsXvOI28Nk2V+GZ8jr1/8I4R/Yns4Xfj1TTWzVeNCNHbazn1nufigCGV4Vl
qtDHRGZpM2GzgWRsMj5tsZldV3pp52C/Dpr/92KUqWKMf/mZbYDJL1X0X2Tw7iboFgBgx1miq+ht
zrLMfkmBPAPakC7uTHv8wdz7HICGyvCct17zvGp/b+9c5KI7lCBCd9jn5PTW35q5ksO4eC9R2AqE
0xJmD9GKB17q8Jk7vlAMs/IJV9rgMDnRfyFkOl4hl2S45SaIY1ObTSNIHJYg+rp/nN6BMaWKrR+7
O6t2IjDTrKFkfrU0cMF3G7EiQSf6RI1d8iyqNJLJJ3fbFhF7XLnn/CwlkZ/03Hwn1nJocabXwbc2
9Q6RrzrxLCWMZVoXaUEBQvapxENHsyZOrmSevUQnuCknCx9Eh/GwdP2bYVHxXWg7ySdjQnVMtR4v
qT7n0yJuHI0ite3a92Oo/MBdlgCwEcxfvgz0ILRIK4wFe098lGOX0tVEsLdEUijEAeQR38bksd9a
fuwZzPBvMZQ+FON4CQYrDg971r8Qz89ArQjVxWF7TdD0Oaq9vaUrLocNzIw9AcIy8rWaQnwTR/K0
PsXLapKx1fOSZnuztuMHoRXGaqZVlZJGs22/GiJA9y/IBflmF5GNFnRUbXVT8r+FfMb7zIr8eP+b
OcPNp6F4kqt/b8gae/9JOIopCuWXpu5kDe0U5aC2qmvMuYbNI88aUx34i3WHd8NWKNbdtGDaQ8nM
iyuSX4j7EgwTOuBR/iFM7rZAATM59ZFv+9wRq8hbXVvfsBp13upya8YovLN1O9OWrzxUWym9ZPN1
mDhMT1YgOqVRaJ2ADyjP98UghsOXt6ybu9jGeEndP5T4mZjxZp82OMxqqS6VolaMbGRNPa271n87
65g6Q9l7RYtOL1PjdBOlgNpUdYZwxJ2EGgI1wPnrnuUiZ7sdhpuFkhJDdh2mHYlIUZHAsriLKEHR
XOdtU+Desuf1ojV6OryxMP052nRo3DfSj5+dKgSFWVXGLiS4Q5dQxDHIvUugnqZqf+FK5inrMME5
1eHWMPkrqY3H9syJMZ7RM9SwYc/zjL9fOqr9mE+npGx50NODLrgb0FydLIXRotOtI+YSbZHKzsKt
xoZNcJJ4GasWF69GNvRenQ3kp1eh71xjJw5a0KZmhsJJXThZLqSzb/sTisTU8jCaMh6S6ag0knK7
jonbXo+dctsmQfLpvLXHN4TNqJnY6alIH0HnsTz7EklgiqvaLbFn+25uUJSNDHESZG2BaAtNvG/4
WuvQCSLWeuJpsrPd+06Bzmmnlvn9InJZhGDVhnZlfj7Kh2PolkMjpLgzqH4f9hm/7zH7o7msjyvZ
Rj/JnTghr2ou7m5Ayp5K+yFEUt/y9WWmqXlKOpf12P8RITbx8ILm1kWRqB8L+xfF1r2HXt+av43O
pyKFj4Kq1FZckfpg2It+beWX2P825O6hDubEjA2RyF/zyyc3lMSS7vtAQMEOEJnWNslP5r0po6TK
F5+Ikch7kOxVShNh4LWWzwFtJb9SBv0iFIezeCGrgApE2blMwedVwOdpPdPvsQjNRYc8YG+dStcY
JUIrNMdc6m5qSEWO36XNGXLN/ZrjKkZcCr+z5oN8Oa4cO8jxqZo5bZDRVUh4VXM8a+hHCiVvWsEG
HkxV52NFazh7Duhb2Ix5qYigebEWfDnA3frHeY+lRAIE3+X/YoDjgbPuOqgwawkAvhSCeNbNxuTS
T9ZzmE8PWRbDowhElwhdboesSdX9tyyp7yCSM6fxKFXbUrPplwsSNsMYsJJ9grw0leD0bx4Cd0Vy
Y8dDayiLLROqmsdsKe7b4i2o6u8A0RQrPB31DrVO/yPiNygxChVesembc822gDnOAlf6FO502nEU
ItbE4EyM6ZuRk+69RSoT+2AZGRndh55WMQYb6i7ALzZeSttxOh6V+LV5SNYYdeQouPNdd+N45DZn
niJzd/11g0AFDHSZFxMK9p0VsOmXbAPFEjcTvMS7PiMwhUsav6ZfZjkVwz4X9s1v8DCZpNbKSq88
kGJQIcZYRdAPuD7V1zvdo0Zf6leEwpYg5lACMpJ8rGWyLPBrYD/CsWB0THjSjjkRntpZXUTF5Sq1
IPSYaQtCSAHZKO95giPeqw3zw2XQ5ci2o+t0eS1YvmSPlvMfZRnkdx98t2mA8ABd64gljY5f+0O0
px5Pec1R5VTiPNgghdEJlgrPqQxSP7vDXo0dtJmtqeP90QCRgaOqEt27wpqzv0KFUth0XwtaJeQ5
dejR/hEOliBmBscgJkx0gBF/nLybnTcQ6xwwOe25uqhvJIiepSDJE4ICrD/MSurrVfozreQGinSL
a/tMurSZF67eavaP5tFe2G44AmkmV4WBRnOeWOW2dJ2Q1sYHMUzfnWjdSw1sJJu6+Y0fUowVqq0Q
K2lcfV1v+sdb0adNWmXRoPrjCpXnMpWUyUXWCaY8r49ipi+4TCdxE4p/IUZfO1aumt4+xQcBT0dh
t1WR18HGPmHp719a+JPxfWkOQjw5JnEukkqxKV6fqJPDzGrHDJvrkNy1tkX0MN6Z+Olw//0xoyyG
9SEwAH72HyUlbfM2lhwM9N6f4cr+CLxPF2At8ppy84kKN/H+2RDt520oTXKCcGFU/txd8LdCs9qG
3diwadeKrfsinlzq/W+3PUAPHvjHcwRyRb4m4Wv6J0kW7ItY1ox7z91NbPGA481MOKLtCEwm6vuk
sfLsMi7+T/Hm+qsOXlQ9i8Pf9VAE9LWS2byZEwPIYDYtbLm2L09NRsMgfm6PotDA/9WaPtrx/CrM
IMllkwsRz86jBnsfx1s6w2v/gxQFWv0fY8mf1WywsWC+WArpCmvfHO0WMIJtyS/B+XcdiLdfrrJ3
qeRMJy8lhDn9mvRTVYzLXtu6Fv98eAxRiP4hPmT4+kxhTz4CT4cDPP9YKhdzODoL28xWfAYFbD04
Z7nP2BAp3o1FR08u/ctwg8oxDjcRwHkmDHquzKrPjnQBKXv9IMSCNsR7asFA/JqdhHcmuKZg6PRk
6XzKLzz1/Zs3XVZ/rpAcA4yoz12/yPHmsazO+a6cgbZy7JTSwRBhRd31L/KB4M7WXzNJ4paZAsOI
O5FWmQpp6eEyGGXpKkGy2qdqVRuRe0IjzwDJG6clerafsgCAj755Q2eTRVVvvRQw+G+hVjqaFu/+
m9KSJt+0hjHW1BHC4wyHN94ORPERUFukKcxOq8a3C4r5hTOZW3XWq1v7Ks4H7Zwi4AlNCGUKQ0ON
VSZKVFl61F+tBDQk+IqFz1WMfzhOfRJYfalfeqp5HOOIaK9cOhXG2oYdhceL4LDJlhJPAqpAc23Z
G9mCLMh7l3PvdGUWIx2s5Z4EpUsaxWTxxqD4a+cGuaZLzeV55zSCZ5qehwrwRTYvoBZE1+lOXnfi
Ryt8wko4y/GJZL/NuHI8l8tJKmVjS+XqWIN5sWUs9WMNit0HB/gZfmTuuvpwP7gjFuUjS2Q+jgYC
9ppF022c89tfs59OKVOjOQ9s2b2FlXyn4zn9AXI7AYGal0MNPRsQwnnaZJiTebyHcwtZucfEnh6z
9K9skBFs29qlMPNYsFP7y8mzdNhDng3TEgYpao3SPfXwDj/CSw/ObVggf8enRTUNlDfJ+17WwDyO
/ajc27MzTRLyBCCQhUYvMn80lvwSHxWDIL3xKvr2OLMoIAmgIZJG3sJMyhsOPqFxVb1Qk7NcojOn
D11t84xem8WyHJRbm0pbKV40U5U40scS0H5bcMWTEfGT4W0Mt47O181hbfymq/ykV0yIpouFyaDb
tUvUtKWqMknlkUxdllrfasNUWgJUfn8Cl8EV1Z3U5ABYiUNuRr5oKcdwlS7eB/n+UgV71hPGXiii
tFKvLiZLXS9l/eoEDDKLm6/8OksoHEEFzRFIR8skagCp4rd4fSGbOUietH2v8ecJdTlXFP0ex7TX
vh51q5DGduPDyv5nJCNInuPVn9Z9r55S/RGw+ySGAcaPEqaldHWakl5LrzE1/zI4K707/QMAGDAl
HQdn4RCGxESdD4HJn35p8o9hnYl7WqaHBddVyszwX//kjQ4qJolh4qp+txlSxnSJmCs83a+aCvMk
IbAnKPRH3SP74XCHOQ3bziFlRO0Q1JWSUp+e9CxVX0iTOPbgrB+wD9yT1o6m+o45pOEi4yqt1ZwB
6GRU83LP6o8j9UURxZDZ5WMgpNs4xuaPxAt+XstW7JOy51tYRnIykokiQYYg+aWP02kEZ7KL2cif
/t3AkMcRC0iKXbo3c1/h2uNlHbvkqXBOZnmGMzMriXwdE44Vt7izgW2oY3N5IFwqNHPtWi9SS6yA
hcD+oqiZ5YnDx8Be3R5HxKPygh4K5ePLmLR6um0pz3P8seQq1RKFP9ctf/u1v+7BlNqcdEez0X0N
I4X1lXx9dw1MpdfXfG2riDistMNSEH4Rrccb4Y/8cnRL9fh3mO987Fb0uI03HcxJiExzcwHZ9dco
s3vvxZTsaIGr2xmmD+LsMSI00fJFv0/mbMB3LLQfURbbNvuYtBK+fA8U8TOqSRvPYwXdCjv80svZ
ecFEkHhpXJBNTWSfUIzupFvHeVSIxo1FYZEy4sS3rdwokvKAiZK3rnzY+Ryed1c8On/UbN07w7X6
m6hS6lOKjYh+wxgHNswvu8N4sknoUX7Hwp9LBuU8+T0Ca/tOrCkICtK8kD5WkMmpO6IWAXUjK4Z8
/OmRAfzuhQeScqBIQTMuw2IkQruwSdfY/2ev76Y8v5xSi/gzcXVjJ6pNWe8NhZ5pL8vuon9u8D9v
ac2sfrz5UyHorqRAvNxS0nxaWXiYHYmk54FYhWXq/l06uTApLWRBji257/fX7WCJ6JtNeLLcAFYG
ui6Qlw2u4ilhoM33Ba9OQD+hKXM93Ab35owHIBR48oqnZlu/gRs9B7w/mQ9P7Aq6DwyYiEy7zN6P
zIrKF6PEXI2oo5vRRDZlhHjnxlG1qbQvhZImGO8R1X3muvsJ0Z9NyHew0PCSz7i9mW6rY2m1FJBl
jLOuJd9a+SClV8HYSGnNlxIsBxxS4kdb8pJAiZyO1GsyFurgT9epWWxp6MeSTru98ZQ2HxuKRPAh
LAyFLPqo+UCcwRFhd6SEMQhkLktq/u+ZRteg3JfitjOD93M8XsrOOZXAvc8OK94NqeYOeOIYfeiA
Bh8AZZCTK3Xt4QLtJ2oyW6gLSK/gyvC1P9wVOFLK0VxRCj7UL1ENqTGIylLsQV1EDrxvDeHgkr8n
+celZ0eo5oJZQc+yNrl6D8RLDaFfOndjQQuP1VMMLt/r+SCqzoIQpeaPzjqcZ5F2tDjq3vLL3JlK
L72Oet2zPrANXugoDIB6V4zLM77QJB3ICXMRSw3lLKHdoVR1fOZjH7lh6OFJTtre6FJuHv34LR+w
Sc62m9Wix3fNqnF2+9Qp1crzn4iR45vHd5J/GET/E8MKd44F0qOzeLFE7zgwf2+Iy6YZU0LJ7OWe
z0OlZFdrPEAemSaXyLI3Wg2c7W5Ef4UaJISjZfXU+aX/CFAP3KV58g4cgEfSs9fw8iuCFLuLh3Jh
GZg50idBZAseo6HiW0jDA4Nn9S03k0B9v1GqmSWPhP3YhzM/EK26PGYcgF0eivassZQFQSrc6Jil
NsS91pv/HNapigSr2eVnB1wDsPbMOeAWMefmfTJEy770FLL4nJvHH23BcLXTk4vQBAncc/ypOm8W
7K8vIx4OeBmtzlz+HHoN+Ki6SGNYfqwhxJ3Iclxi79j84bg6FlZ/sJmHW3B/BcC+MY8FKzU6WOYl
4ii86/wI6/Ymwxsc/fLpXuJgVnj1G6seQpKpHtSA/+fDWnvd7+23DNdK6HfBGZ+9h1HUSEREwoXj
99Lau/2+L3cctWkmre/U6dbCrUJx+9esOM4lxm0AgWGdwsmiTdhQhm1GO9efcz3nod2wuyLOoRFB
PRHCoU9xUQeiUOHk4A7KAbqWNnKmpYJRUFtQ3lyKzD1zt5ChuiYS+1trXUf0emVBc0RXJeOJM+oy
pdYUCtO7HboKltA1VXkzyJrTAnuRxZ1FiBt3NN7AswsisLqFyQAuddvPGzztWsE/T1mimJzTQK+f
f/Lv/B2HA5evVFXQh51vSrY2ub6y7UStyV1sLz4hRJqfnfYYtn4qKe+hiDORa9CUQSPNnR1nNwVS
OkQkOe7FGwVo2tF2pgxsVaObzuNgR5W00kvbG+HZrYc/VlQXu17CoYAXyKuimeuQUX6IOYQfOtOi
P/656J+ayneD3DdaM4CAxyapYpzyxTtzYw3d3BmLALR36ZccU/VhfYiHYcCtxg9XbjQuCmn0V9tm
VhQXJGWmHnrfgcSUohqw+023UH3zssHKe3HoXWtNxZuFWTm8uBN+FQJWwZg5o1SnFllNmOyhtpJN
XO8SRcSR9ghUC2PkIXtJSv9s4l9Gp1a1m77LFh4HZa3el3/C2W/EGR0B7R2Pzy8Y8kQnfhLd33aj
x06UIZTX/x5oFzGlrD7CuvF5JKo9vOIxzToHh5kdoOD6zjUKUGJYQquc/mE0DMReySwBHVcUIpLT
P0tPzMBnO/rCSMnc9ks+pckz6Kip2rnVsPX+HfAom3uAkz3m42JwY6b/bHCDef0RK/3WUac0dSKM
kEYtrhwBrDcHu2UrE9D4N3TPQpPhltMcgA3rCnJNzhStxgWfSGcSOX489GY3JX51jrPQ4KLwg3Te
uHo9coFgA7zxBD435Ek9ZfJZAcIO0Zt7s2uZwvFyTVmPWSIEW6daOf4f0gxbKYxTM8WdybNJXju9
AuBEu/AVDZ4+JGpSkGoI5khnH625YEMjmDdM7yC1jJKKFINwCI4JiWEAl64hmuHGoqBCRVIgMBYp
hCwZyPZsI1RVFT2dRHGrlaHOioCJ4s9qfl+jXm7NnHKSvxNcZuT+Ubv1PiLUCoGFG+sBAEE7OLIx
156yyQxHYKvnmGVKdSv1JDcqFOBTX70OTB59UidJY5m6HfaEtJa2TRtYd9dfiLW4T+bJCNByHVNJ
BP5PQ906S6hbtLHGTio7Jc/IK25r925Vil9Q71uHrIoeIOuJxTU2THyuDb8th3jMJAWZ28arIcD1
7zvWma3Osergrj5anOk44hmyfHWNmtZzWfjZ8g2mz5sCZf2xhx1wqFFUm2rP++JnqWZWqJpie9P/
FaUflE91AeT0nPFGzJobKS7vxP3YCIxqDXb4W+GNrbrMzqJv62IjXU/5VT55UrYBObNBKr5pNuPp
nl5/A4Sckp8yUP4cXgns9z450Dg8dC2rJeiALt5KoIAI0mqVyz6dmncs3964qm5zvqkhfspebtxv
+/5/HLRk1pKJC/0BEIG3U8PblJ4S3qWAR1ocDE72mQpK1S8J2OpVtmNPWqj+Q8XxAKeFhxNgDseh
3Ys+1h4JfwdhkuL1WuvUWRmr43qJQgrAU1dsla9XqNHMblQy5XDeZddFiARAWW3wQ5mQedn8mA5U
VcD6AFj0+myr/qmfSW0WZomoAlWRHZR8ww60cUN+wUjqZnXcQrMta/v0wrgmsv3Gm8XyHnb593L7
eG4J4D9wit4Xzo8ICB6DhsQ+QOfSpMQ+Uks7P55CB0dzcg3FIehDZWZfWj4jNvAY1gUscTVyYm20
ltt13qwaUWOMqO2BXOxzc3jQ7Wi51nA9iG29RjBhvOs8SIEWaroBNDKCGcQ3HvQk5wLRSMiGq6If
A/12iSm/sYD052pbIGYML2/C6RhJW3M52SyyIXliJtXn3B/si0AgHYfzqT0vXPlxQANLqtU76Uyl
JwP32T30MRjAm6qMdCDKPfadIidlWtpiNS/lxnet2Fgcu2RTx9pSlm5DVmFbm0VH38okdGyJDSIF
p+FEprQ9eDPqoUzNbjd4QlY9bph/Q/CVR7m8dBAbCFdT7pbH6Wdwk7LdzgRhdtDP9jIsKTNNte1q
GMvooCehfU4GiCw5Aa6s4ZZbQSVYuhRYgOHzovGzq1+5wOo7N2JA8vlRYSwwjVyUb2rqq7iWsbg+
JuJapgIlHZCoOngniStpVBvML3CdjisUnPZs7sdb7aLtZRCI8TsyQed5VNTTOv4NXqNYWssW/xWq
6f3VNQFk/gh7GyMyJ3d38QobBhLCLY4hmDK8JEZCWxIL9DN0kaLLviNG2wWKwZL2cD0vxQK+D5M6
PEIAaggXEQmwA138Km55S7ojd/DGbrMb9D+Sj/6WEvXGOXlRpGpFQu+ha0Zx9dB76EhCiH5bYq8w
bqILWA9l62keHeCH4BpTHJg8hCuBw91g8KmUfdeZqhZBGmg+jggKMotw4SoSSGVLhK21Ezgu6kSH
xJ58XYzSKRTRJwiPKrAW/4WoTYupBxtoBdz+SqQ84ip6iqZT0q/H92SSDYacziEwJ3uB05PxUTio
eQqXesLnKDT7FS0PXWpbQ6ZqpzZuwWNroQXXNu1J8npgWoFeQMl5AlAUYOaByxJ9IkIGyYOKvYWA
OgomT6uFDSlbXupq1moQTu5MMxn/ZMWnYIjBUqki5h/yxrMoUH85oCigWxdSG6HkE/Dlp5CORbr6
gSgkUnNa61GlwM8WyTdTAlnPRGGVdb1X4S8CEW5ZGHUyn/oCYY1HKlwtLQyyQeVplakXQCvrJ6kQ
Bg4uyIJgb9c+RoZytzND3ph+muOAgedD8oFvvTx3sNPkT//7bqD5QROXfB/CNgx/tsm0OEgPUtyx
ftKJXDzA7GJhHQNybc4wtemLWBnKgjvyPxxbdEyRdD4wobPkbKzOOTeAMstEFoqr0Y8H7QhkUQam
2jDhUkqJ284W1O4H/XuuB/Vl/qvyU9hoJQcPCgaBGFdq4QRDbpDlmpqlxXrXaHZlgWffJAnQn8Fv
sk4H4Ea0/WjIO8ifNl6SfybYK/5oIAIgUi2Nk8KE1m8gnJUPMXSYWsAeYkR6ybc3C9yJj6NzwSUW
CqJJugNELmiv6J9VPA9PaGQ64c+3pm+cpyDNDHQ1vY1qvj3nEgqx5n0Y39nCsQImiPV/Sg9yh2Bk
HQ4ZMwhLI+nFwK0OZ/zkh4odiDsOBE3M+kMnlZ5BJmXK2t+A59T7AvwpyVEVogCrqtbogq7EyP2R
/KoZIKfyE5vXtjndlUyZjAiNgpjTc1VakSJb07v4Jnou0T2uuBBVLBE8e5fRknL4orW7nwiNGR3A
FjSKy2+CMPD486jawdbxAbwfChXyeCLhOttQScZ5/UuJXKibAEIiWMO0zwi6h0787UrxLIJuioc4
nULkOdY/JKeviefRwjlnZY4q5i8h1F/oMT/HYeWGqrroYovXKcnUxbMWZD+jaopXwpKIKwV/u7gL
ICCVqIDSf8Gom4lbOw1ZcRZKLSyvneRHTfAaqVZivhe1m/wTbLuvizyo5v0fH7nNqAzAgtH7oirl
O09aUTNKpDm720Ay5sPItAEz0pFiZQIRDfWGCHCuuGaXZG0xuyl8ShQxJz/9BEeMVCPhZnOaNv8X
bNe0t7omyZMkSFNPR4U3evzcLjcuK7VEZZdMkX6tka5B3C4bRACtFyOeQCt79Xrriwjp3eDw8Yxl
i4ZnF2nnIzXhArnO3TFIuhZXD15yn9vVT16wMxV0rkzQ2P+1+g1u7aeDNwRT2xaUvdsFLGr61RsA
krrBB/uXlnDPWrMSIoSOLSTC16X9VfDFq7XtK2uA0BmKK5FJeWOI1ArralXwFlj8KdxJ0L25ro4p
IZhykME1I9BoKS3TjfbTDmfX1WVooDH5YBhsp3fnJjyZm0vZ9V7nsz7eC/en9E7r62uh+MrQsnxQ
HEOfnD5I5vsCo4FmTwA6lhGbUO5+59ZQ6busQ3Da/4/gKfWPi7Rx+7Y3AL2HiXlvnKxN32bezNjp
dYjFYXVPdjaFpz0GrP3APSdp3La8UFzXbVhLuwuv0mDPBPScpRdDo2G0X7gso054AFVY6n9p8tdd
5zYfJhmIvj/NqUn/wjbA1Ptn5IjIafceDKqCWE+o9brGUJBbmYQvsYtD4pa83lH8uoKqIULDiSXg
6yxJwmM59viy5qkaOJYrzsWg3wlO+PCkAvqg5HpLKFZUsQIYlmnRFiU2siCw5xh8Lv91KTWQE26H
JygYAC9Di3Fuj9L52dCNMgbtOCerVWI4RqUpIFnC+F3fY0d0urDChvfCB4v5ZfmHK7UQWuUl5DRA
Ncjw2/e3pwmVbyls0YUVrzdizPbhlKDJX7xzvC4K10nrAjnG++RxySdAOFZXubgPzTr62JQtSXmW
IIqO1vKeYP7Zb22j7YH/bXfT/F5cufY3ai23D7tEwC0XTRPsjTnkyjrFZDKy7H4jtCHGqFDihiKn
lzcjRj0nxDEydN0T3XZVLw1ckchidFI80LIRUz5/80zPxLB32RudBu90cckCuB1n8lnmLPij/zE+
aucm3Kwj0LLI/ESxyT4RR0eJrEyPbq9hWnKrwAbHzhPaF+fffQmkrsUci95u/+x5LJP6G4/zY5ZU
42fBuiz8uxbweZF5KyivG516l+EjFp1oi1B96wKupMTLWNO5UC4Axpffk4EKZEEns0gYRwpJIJRE
k8wuG63EMGWNSCTG/RO5z9NxoZktD7g60co/R42CBfts1WLyi+ow7jHsNlPv2xDWQd26f9hJIG0e
TVk9W8+8PqEnJMnsgKAfDu8qnlNGOsOHkqE+0aqrtum7PjdweTcx62yaHJffKPA9+xi5XkwSw90Q
gvLoWjJpXh3ptwi4hIt+bp5SLcz1MgCE3s+B9GMkZp6eji4CZRJ4Y8HsDzXziQLOBcJQbavNtaQc
TKFoacbgnSmdbaLo6XIalSOZIEQbh87hhxV6K+UWL1flpVWVAsJlAajEXmi7Y1H97PKK4PzSN+fr
yJifROBUNzCVFwmnra+Zipb4E5Lcxyic9aLP4yppTbb/i3T4qOrnXLKwuSrhJXSCcTyIRNfCOFlv
XN7teOJs72V0dh9L2Cz+VbtkRX0l6NYasCjX5gO0C9MmgYx+KYUX4dFrpHbbUVI/aeFPSRXeqpDp
Bj9ql3XKb0y+qM3C+ISe74cIUmyZPAsxtspP4l5ZqJ+0B83nubj14d/NJVghYmn7MX91fvjVASmN
lHcGwVvjoBHip3wjmlEjH6SoXc9kZSi06Y86jAP1G1cetsxKKdscQvvIUgoMDbTIh6hwcJVeWzdL
FeU4QV/2aGp2kibI09y/XFAZ2mNG6KrztPsjXWq3ds8FwxjebgVCba+YBkr11MEoN8SQGoQunHoR
wD0amqgzGzavEsdYCJ8t2cCLE6pF55bmrf4hm3BUaEi+H93IC5sJ2FrXcBTJB34BRd3BWFA4sQn8
EHoI6sWL/HNvZS+gmk9tJxOpZdOlBmBvL7QUxs9O7HcdiJgqyWSO2WiYWifPywrmOTezB/3RbwAO
kCUo352IbRcj3TrkIOubd3/438v4D7Ft3DhuapnoCgB3AiCh5BOxLotQ9OLv93+EDKzj/zShPRlD
D59DjxgDs4Iu+g15WT/OKtcR3zlU4vfTWVU8Pr0Rrd9q336s3AfGKPsXXriQ6NZ9n9r5uEGts4dA
CYsfvUEE6TTkT7HDGNd88HhGc9mYTrvIYqnxNJ2Dfxdy3D6py5NGKwO6Z/oHkj6jB0bWGX/iwhbN
OZ8Kc2Y/JJdWFNMlOGHs+2mgWXt6E5z02EvayLNFqqXbzAWxSJ4gVWUkRW1w4X6kYXnUfn/uK9T8
fyhoOAFAK7KnWzDARKpQjPRv4cyZKWEU8ND2VGBYHHhelKiwkDMuKr8qCOHoiTY9LsSSTJ0y3Om5
zPbN4R4hd7Ki1teS5VRo9DgtjemIkmKBmt9AVyH8O7supJ4F7fWQI9zIGnoUPi2/DYYul6u+5iWT
Nnlokkjfdc4WCCICsJu4zYJ/8oFwpYBTtAunbPpcyXF/jj8BGbtrurRFhOc9OHpTS5riE7CjTD41
SMNvyBkzXhdBL7s9fFTUr2SwP/m/pdiYt1Y8+cPm/1EIyP5d5UbuPMKsZl3LDwWXCMnKi/h3PD2z
CGJbKmdAx1uch5biRyNx6w3CCPCangeKeYwHKLHU3QjsWtCBfoAkwR+YArHSuJu8Xvtd34qhtsiL
s3yC9fez7iMXGfqasfXLzwl/T1pnQLZ2q5XYcSmbjHxP/9A27xwKycajveYOqzAvM3CRfiZE8eY6
nI0NQlJ53WwU2oTg26Z6QRQe3XHyzBwou5E1nBjHU2cxdKlVp9DtJEqKHiY19jXJ15FW+qthh9G3
7MbDqD0hJC4kwh8UFZkjzWYM6JzvLGwdsQBfme8bOryRIVZ67tt4bFVVLM9FXD4pW0GJ6ORp8Tdi
4nJ6S3aD+mYkO9ofUAzhp1lc820p3nSEDgqvhWKK+V8arvQArAOVqlMsfcrxjTAftF+gupUsk4Uu
x+TuA+NA2OPMbOvrKHF/9q/bRDZFWAK1pqkR/ayn+Hr9aqdjxKLKLgWR5GJILTb6RvYPQ7C4/P9u
ORGmHF3yzCa8y0jOFH93CrTEfxSjBF0EiTlKkF8k/2JU0TKPm5zvg6slp2L/EEy0ydkfd2uVivJM
qWFaC71OR8sCvnHywV9Rqc/3Z5M2hIVDYOyota7W0D+EpXlGCDVDQTpNeGWmOLMqNfWr9mWdkNpv
GYuGydcdMKsPCIlXc1LGOaspNv21aHliav8RjakyVwcswmUhf4ZBHyByl3pyxgpm9fvfdXUC4KzO
tu4VTi7sGKg3DdJhVLw6k/2u2icZUQJBG06UWsOYro6lLEAa68zHBoXCTBDX1LdBbB0EpvjZGyiV
uRE+GXFmHrA/q8FCObD20V/4gXKXk96VrBgMlOCPfO4TJLu2BNdhasrxouG2R9Tf4ha3DpYB5Wuc
u0SGgldtDs6NlsmbqCFk10eYfWxWmYr7FmwhHlxzl9F8T97rG2QylnqUtYMDx5M9tA9+oLYxWA8y
A61+YQeWWM79SjgKWslaAG554is4whtWWKHUsHr1n7NYjd26Xge/QVwVvSQh2RwbfymuNEN/70nO
f5l1YSAhk1y/G3FFQ3eccWGONkdgA9dS9HZQR7SD++bYaL7Y31aVlOxtswK1jcHpFCTFWeChLhpk
DhoqBem38sM9At8UHDlWF7FnNAdhktmFUDxRIqNrYrFlhR5Ay5crXOKjDrTyb8zQYmAalRw+P3dt
9fkWxL2T6HAMYBjUAvwxPOx3FXGcW7dkxacjYVhZ47bVwupVqkgXiYkIDfmm9tjzFNPCQnIDtgPR
22s3BLR4rzfdd1W6ClCfGZ33+Lcvtdd9Ki+ToBL4StuX9+m9nY0eq/rislQWncvUWRVJfHsBK+JW
b3dfPRlF4ThV5RejfaAqeMycTNOLFrA8X+xl3fZkznaeVNrgkR4kwoDX2c2Y4oUWRxg5an9f6XME
h5UtbZe1NWmkPyew4JFdfnNc+OItFmUqcl4XQxzLtu/yeQzsZyPgKfKbrZliJk7r5SqcKVjI+1/u
BssgQeOwTpFRPsa2skTlRCvfxpFwBXYQOkncuApZXm3H9ImD8i99TkdhAZ8NWgiMGx7rV2J3CCI5
HsIp3c31R1wqeIc8490LHA9lTaqll7qbFAsnlPCl3H4sik7s8zflMICkU+efqDw7eZ8f6rqVVVmh
MVUYBnN97fby00WKxxnfX/5ZjKDrN6aiFvfS8tCxuEgaYRk9kmkIXugVN6NzveA3HqSOhYMhKGKe
JFqOwIO7XaEuFPVFmRdwDreq6VIIsQvspti8FGzLp515iW3yBgfqUPz9yQyIEyzKSjfIuGcnc+Nl
53FjdgfO8sHjhl27ZrqtLlZXmHNt1QTIbla6eWi4A+ANmMq1Y82B1nJa/3DKWjO8O8ikeS55lE9/
rBW33a5rSwc91N8sK9MH9ltCWqCHzi9hh4nLPXYs0p63Ba1BX2BTEdHAMiV/ok7Gk3mE/xrbysXB
OsHxm/PTXLq1Oruj9e0Flq22LadcL1O/ORC4JSBOiiuM9gr4TqV/gDQtqKIIrYkM54hiOOsqqolt
2A0D6WDStP4Izq+kNwgo0WAOXA+JYOGHTHHRtkjSjMynoG6G7DtSNojNuPwXQEGyf2gtzfNWlyT2
XjOd44j92KD+xypnrDyiuuF5/HDY/EZqe/gEX7eB0n+d8POCNdlF0wY1m7sTcWRKbBWi+C4uj5nC
B0jFvqs+NEuIq0GN2tFo+Ec5OXuEP6EMYQGl1ODp7STVcqPqpma0n1YREle+zk8moNQW89cr0XwL
fAAaYcVNtR8pt2SOPnBu1ud25wfn1rf7gqp26RjKDz3HUT95C5RC584NThsfxQKdq5N1R+TRBfbA
LnMrcp9/gs2ZbcUq1Csl0IU5KbrWEzyG2Jkhrv1u0ZtToppSSSL0i8x5a5XjjkFQH6v5b2FdX7IJ
vboF3oVcuM4hjOKvru6TxveJKkRXAKn3T85gpZ6tqn9lWwIB3/VBbRBTulbAycK2aXgR41wbOmXg
QNMq39AVJRBU+wOnxXZr7+37NKgMNnKWvvc09ArGGJLv+Z8L4TP45esWft8psoczuZxBQjOBePHz
HnfM9/zkXAix763TqxsfjxCJJO/wC44vt7vQdUsZyVRYVoOgvnWad7bYV0tAORl3NjzUYDu/7Obu
WqBkovNas0ezzlTAzKuzlo5uxBonTn05kRcFsil3TfNLmAyO1pvn7UxNpbytHH9aAgi8kx5iyHjI
icVFxq6wt3jZ68/S36AKm2Naq1kZva+2TmU9hiSPQVVKpE2EnC2j51C+g2m9/apvF9lg1PQG/Omn
0IjWfrKAvR5i1MY4FRtksBpFRmm6vTYYcgXQohY4UYylbtw4v0ehzx2zWObmMXQkKwMRPi4tmoh+
q3pjDIws47VK8TWzDXuBY0GVQ0cty4xAUtzKd+NMYMqlzZxnAFEpu6jhaQq6w1LzfqWZnbl+1Ext
1NJJzOnKdPXbHlTD1DVoKPiK/9lF6jsvBmrphNXTr5s5JCLeqR0pENXQjtbZJZg8NpqEJzpiEEPC
MgiDFdPFY617TuVFl7NyyUehhnBo58hv4nU58I05y3YgWZ9eB7j2Pa2tlFhqo2b0bV3Wu38WzmBg
wJMu3+aKl2WkH9KRNkmt3gjDQSDG05gGaXl/6YKShvF8dfZ1sKiXXldXHqPH3Mk9TovBoyQdLGFK
HW4NxnjJDBIar/Qq9w8/gIlFAfiM1EG3D7XH7YhK+8OVXS0edGuuj2qsHaOAdp4HX4qWum5KqRvF
vYpmT1YLBHzUJ+tE/5oZUkk9cVP1/KO44APxW6dKTmbGj5HlMhR/DdeK+cRGlMAjFo9BcDdL2k+j
OaREG08x4yWQ/7Z94F/jlNUQeZiO+ccDNPVjmqNk+k3t5xtANrk8PesyWIs6/kziY/mEC9ozlx4a
J23X7ajw1HBSchZGBr0STwWoLZSz8yY3wfaqmO6j3ofzFeT778MV5efqiZKdOJqNjvQjOqEBpS1O
gRPjdQN14G+vee50c7cOmWF8rpUErCEJbtRotTUsZ1zewOs6b1ALGrpT8dZ7zi/2SWKsmn+AvAKN
4PzVI+0fJEqfYc9vuaTwPNb6o6rFvfbpGw5MOBCYUZ9XqywtiyzSlRNbECgj59v3X8GN2OOZmElV
V87n29XnqTND0Rb3EprztQeoMLMHFSKVPMkPzbdyOPMsDU2rr+tkD/sHPQpIDze3cIoQiT9PRrQF
35sD0nRiWngPOc4VxIJE9h2ITen07Rn1PQy31vcOVn0HCYBHpZa2fiJ4lU1YRVzyVZfuGDldE0tA
skEDnkOA3QtsbofmeNZIG8H5jD4vdXW+tk1Gb7facgTCLt2aL5K/zXEQ348EZTSFTgIxNeSi0JJS
6jGYW4/Ye3FLPeUuy+ZrFF8+ZAy8lp5WaiFO6xYQrRrR2K1Qu6faPBUD+RQSF9rtKHwSwLZyFOYW
A+VYQUUyNadoSx8tx9Ll4d9XBdOoDxHEgHd4nQ+N/GnZpOlxmoTK2U4z2TRFQdUJpFLAje2x7Zhy
/tyEc0VZ721GQ7VdIjevzlyYrZla2Mol3eELzY1wJrFGa/22gh5HN6pPvoMAUg/qLk46b5E6CrIE
VLetU/uLZZf1MMviF+iyKXWtJol1MUbHOVUGFrUb64eYirmuP5WylzxyRZs9lL7y1Uj9xeBJW13F
CnSMn9Z9szQVCtYNzdvgJN0h9C2zF60bGErQO9IVjG6ZajTfZttjNP3gB/dUunKBtjPwd6CSQDF5
9MRc9x2CAQkWj9oiFFZLLykegY2erht7tHrduDP6OUvsxynJNUOlhJb74k4Zha5aTl7appcs527a
IpIy+01oKZ7bpLDDvRDpT8aooRVVg/63KQWJpg/ZjfE+i2dpeaOlVHUcXr3WFkQuT62enDNFs6kr
m7TpDBlr4U3x0IRGnE2zburjcZJ5w/MLyt9d+Pc=
`protect end_protected
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
iisr0ydwFOm3eepmhOYSaxO3flYpViRsLN97vKyw+ai+x1TubmaH8qRRwK/QFeVsjlGTFdxookcr
olQwv0bmdw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
dJvTzz+PoD3n2Ot9SgKfpEhIshJxklhDhS1tYcrcmprfs5wN+lN+5Y+o9jEEql61IqDkJEIGu0xp
zaDWEeMqwkFuovmZnp/AnbrHb7R/19zPRtwSyZ8+VQRLsRMgscwutXu29fTUST6Ribitutae85tQ
1okc5mYK0mcSMIggcMg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
ZijKIWnBSOuwn6R4ZrzJp1qaSPGZMrP8GTp+SV+Sn9xEivGxLJtGM40xMLXxiYuxIopDD/A1usG6
HkSoNT6OzxHJWKkUEyyVzrZuJdNHJ5q3s3y5LSNY7eMxN9lY4/gygh7aVIBAO9YWzsWu3HLtrHA5
2vsUFQxQdkG5OTLVP1rH68P4j/dhqr/LVHw+9H76c/knGyalpHLRC7tnHQcfuezFJWlkzaNGHfUo
b5cE1YTvtdlZVmw2sVG/GbXIRi5fq3+Okdy+JgckZ4dVWbI20rfa9LkI09/kwD3anyrnovVQVx9h
F0AxolVKVVyWNAaSu1fvXllqzrdJiRLbdnsq0Q==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
LUajPw/jRTLlmEKb+9YylQ2jxw4jlSx/1GGaY1wFfWFdMwK2p0xvQMjui8K3EqJF0fnb3QNWuQDl
1vTtf04vcOAHkfRCeW7Mbp8qeUTtAsflGIPJDxHfVU8ZKprwANsENc8LVrpJ0WnjDFQIzJw7LDqc
Jj2TofWjKprdxXsMnu4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
KG6kiSPrd66zvVpG96eKD+783ebVLVFNF7pXgq+rCyBBRoa0N9Hp3DIWK5125mkICodI82zuSq6k
C8aCiPbDiv4tiuIn19WDNNPL4ncknL0KLZTLAkq0BIQIsnFNRaZegM9aXOdMYGKYLpnjSD9KRWRt
WPXPZfwprSu2D7PeDZMiij3MY+cixttgVmNfcx9Kkmvg+1B5sTSDTVs3fqpJBBO1YslTmxyJAIC6
uDuGqvQ1138z6f4f+f8vMXratK1Ypo3jPPb4FTNLYJio5Vd1Nbpl9kRRtj801Ie0GGhbggK6IXJx
785o6wX6g3tRyoHXGJ4DGUmWlIHATg0KIAflYw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 13424)
`protect data_block
rEtV4Bm3SmvVbKq1runp2SaaO1GImraXNQnz2t97NClVhlTBGZ14v+hHArmsTHZNME/QWduIEcCL
I8GdWPb/f0NXI5m0D8vUM2MFHCnzTFi82f0pjwFGBVpM7cHKBa5QRX5K/e5A/9KwgbwYV1tKqTXG
aWyx6JRfuzQINO3rQqM+n/1b6LSLygDM1QuiPthpMFKV8IfsVkaLDVqcLxH9/n7C64aisv1xK+OH
WhYRETSZok8+gbvdGdr2+VsE64ALl3DavNBK4S7IOGP5YtXviHmw+Qb/lvl6m+RggRYmTe1A6B5r
pghgGDxK2gS0ItU55quFmZMEuEH+bwLuaJA0/UWR19oWnbcTZnsCqEeN/xbKUzS6blm1K6RPZtYe
WSGhjFl0cKHEQe9DfEazTm6tS9mJ55lLbSuwE5o03LDGRapxUdSR0IiKy5C5UP4genzVw3zearva
qPWmPeGZcAEyFioI2o4OWQP+8mFdbza1kBOuw4BP76P2c+ij6wbxXAWVxtNmL8f6AgS1AV5SqIO0
ftTCve0JloVh9kpHsbXE1TS45+y0IuiC0N3a8PAEsXa/tnLsnAydpsXIQwMLXmgKfoXKzabAHHdI
XZJd/NxD7+xY3aINMVaO5eSSLIdjkYZIeqm6qf+x2eNd9v2nue3I9rjHkjMBIty9wqDCI5HznV19
h0aPmdRn9t7Ft5xXq0GXqSl2I9ZROoM4hg3RU6TCVY4IaDkErgP5cMhIwuHsntmeWvsvkZFygQtU
9TUaf90O9HINFkrdIHf0ZCgtCgUw6ffQNPAkw/6MaoKxm9wdczGi3ur+eyRvSLy7+LQX/dOqvXKM
9UFNjkQk392HWfkT8aaXacuJgFT4hmoEXDGY+tSqQrQRrPmelj+ksf3PcI2r64RSTjiR+9HNqWqJ
jPJio2xgGdQdGrH+UewLz0ySmNDYmqxIdyqKfv/B1BYMUpGd+l0eRCp0RwjP6nt7MKkBishuJTL2
2kpCGDQ4HELrlovnj0dMihRpFZAIpY55DfNVE2hnbkHthyDrEXapmovyPqDFel+HKDdimVyeM8CR
DKl0D2+OZK8XWAiVk9Ve6w0rONvwf/XvaAkgxa3rDJQo/8g8oiGRq4ku5l3OZUKrPVRcjVNCxHRq
81RLF34Ztt0FyGvWgFBPXPwl/QfIQcetnIv8BBHDyYvjjUEJZxJ0yVIBqSipzmyIn34Kt0GvhgJJ
oXsivJz4IQp2WiLYnKzv7NuBWYnOF+M/H8eFTLS7ynV/b0CRf7qayeeaKYL0uv9mUeXbILs7F9+8
XkemV9ihHFfHS04009LEbIzG2O13pEZ78n4YAi47TmCv22T8/Ve6sSAGowqE6FfeksCmQ1+Z98YQ
uXIyCDvF0dlGJwZxogjNRbjyCBj6OOagNPhSW71GcVdRv5XSPoZsF68V4hWQeNb+itDo7ZPtZJoJ
YzLjFDCWp+2G5a8+OtWGetlJNejx9rEDOQvPXNhCi9xzzzSvIevRpnt9XX8uVwzzSJnKhI91LgRg
ID2cjEMis7S70eKGvR2/KBOhU/KAbsgGALtSpbd8HPFqo4CWuxEHCYImqvt7m+vI7jIEpXbwjtx8
QWNgKL8RNSViXrcj5CsXvOI28Nk2V+GZ8jr1/8I4R/Yns4Xfj1TTWzVeNCNHbazn1nufigCGV4Vl
qtDHRGZpM2GzgWRsMj5tsZldV3pp52C/Dpr/92KUqWKMf/mZbYDJL1X0X2Tw7iboFgBgx1miq+ht
zrLMfkmBPAPakC7uTHv8wdz7HICGyvCct17zvGp/b+9c5KI7lCBCd9jn5PTW35q5ksO4eC9R2AqE
0xJmD9GKB17q8Jk7vlAMs/IJV9rgMDnRfyFkOl4hl2S45SaIY1ObTSNIHJYg+rp/nN6BMaWKrR+7
O6t2IjDTrKFkfrU0cMF3G7EiQSf6RI1d8iyqNJLJJ3fbFhF7XLnn/CwlkZ/03Hwn1nJocabXwbc2
9Q6RrzrxLCWMZVoXaUEBQvapxENHsyZOrmSevUQnuCknCx9Eh/GwdP2bYVHxXWg7ySdjQnVMtR4v
qT7n0yJuHI0ite3a92Oo/MBdlgCwEcxfvgz0ILRIK4wFe098lGOX0tVEsLdEUijEAeQR38bksd9a
fuwZzPBvMZQ+FON4CQYrDg971r8Qz89ArQjVxWF7TdD0Oaq9vaUrLocNzIw9AcIy8rWaQnwTR/K0
PsXLapKx1fOSZnuztuMHoRXGaqZVlZJGs22/GiJA9y/IBflmF5GNFnRUbXVT8r+FfMb7zIr8eP+b
OcPNp6F4kqt/b8gae/9JOIopCuWXpu5kDe0U5aC2qmvMuYbNI88aUx34i3WHd8NWKNbdtGDaQ8nM
iyuSX4j7EgwTOuBR/iFM7rZAATM59ZFv+9wRq8hbXVvfsBp13upya8YovLN1O9OWrzxUWym9ZPN1
mDhMT1YgOqVRaJ2ADyjP98UghsOXt6ybu9jGeEndP5T4mZjxZp82OMxqqS6VolaMbGRNPa271n87
65g6Q9l7RYtOL1PjdBOlgNpUdYZwxJ2EGgI1wPnrnuUiZ7sdhpuFkhJDdh2mHYlIUZHAsriLKEHR
XOdtU+Desuf1ojV6OryxMP052nRo3DfSj5+dKgSFWVXGLiS4Q5dQxDHIvUugnqZqf+FK5inrMME5
1eHWMPkrqY3H9syJMZ7RM9SwYc/zjL9fOqr9mE+npGx50NODLrgb0FydLIXRotOtI+YSbZHKzsKt
xoZNcJJ4GasWF69GNvRenQ3kp1eh71xjJw5a0KZmhsJJXThZLqSzb/sTisTU8jCaMh6S6ag0knK7
jonbXo+dctsmQfLpvLXHN4TNqJnY6alIH0HnsTz7EklgiqvaLbFn+25uUJSNDHESZG2BaAtNvG/4
WuvQCSLWeuJpsrPd+06Bzmmnlvn9InJZhGDVhnZlfj7Kh2PolkMjpLgzqH4f9hm/7zH7o7msjyvZ
Rj/JnTghr2ou7m5Ayp5K+yFEUt/y9WWmqXlKOpf12P8RITbx8ILm1kWRqB8L+xfF1r2HXt+av43O
pyKFj4Kq1FZckfpg2It+beWX2P825O6hDubEjA2RyF/zyyc3lMSS7vtAQMEOEJnWNslP5r0po6TK
F5+Ikch7kOxVShNh4LWWzwFtJb9SBv0iFIezeCGrgApE2blMwedVwOdpPdPvsQjNRYc8YG+dStcY
JUIrNMdc6m5qSEWO36XNGXLN/ZrjKkZcCr+z5oN8Oa4cO8jxqZo5bZDRVUh4VXM8a+hHCiVvWsEG
HkxV52NFazh7Duhb2Ix5qYigebEWfDnA3frHeY+lRAIE3+X/YoDjgbPuOqgwawkAvhSCeNbNxuTS
T9ZzmE8PWRbDowhElwhdboesSdX9tyyp7yCSM6fxKFXbUrPplwsSNsMYsJJ9grw0leD0bx4Cd0Vy
Y8dDayiLLROqmsdsKe7b4i2o6u8A0RQrPB31DrVO/yPiNygxChVesembc822gDnOAlf6FO502nEU
ItbE4EyM6ZuRk+69RSoT+2AZGRndh55WMQYb6i7ALzZeSttxOh6V+LV5SNYYdeQouPNdd+N45DZn
niJzd/11g0AFDHSZFxMK9p0VsOmXbAPFEjcTvMS7PiMwhUsav6ZfZjkVwz4X9s1v8DCZpNbKSq88
kGJQIcZYRdAPuD7V1zvdo0Zf6leEwpYg5lACMpJ8rGWyLPBrYD/CsWB0THjSjjkRntpZXUTF5Sq1
IPSYaQtCSAHZKO95giPeqw3zw2XQ5ci2o+t0eS1YvmSPlvMfZRnkdx98t2mA8ABd64gljY5f+0O0
px5Pec1R5VTiPNgghdEJlgrPqQxSP7vDXo0dtJmtqeP90QCRgaOqEt27wpqzv0KFUth0XwtaJeQ5
dejR/hEOliBmBscgJkx0gBF/nLybnTcQ6xwwOe25uqhvJIiepSDJE4ICrD/MSurrVfozreQGinSL
a/tMurSZF67eavaP5tFe2G44AmkmV4WBRnOeWOW2dJ2Q1sYHMUzfnWjdSw1sJJu6+Y0fUowVqq0Q
K2lcfV1v+sdb0adNWmXRoPrjCpXnMpWUyUXWCaY8r49ipi+4TCdxE4p/IUZfO1aumt4+xQcBT0dh
t1WR18HGPmHp719a+JPxfWkOQjw5JnEukkqxKV6fqJPDzGrHDJvrkNy1tkX0MN6Z+Olw//0xoyyG
9SEwAH72HyUlbfM2lhwM9N6f4cr+CLxPF2At8ppy84kKN/H+2RDt520oTXKCcGFU/txd8LdCs9qG
3diwadeKrfsinlzq/W+3PUAPHvjHcwRyRb4m4Wv6J0kW7ItY1ox7z91NbPGA481MOKLtCEwm6vuk
sfLsMi7+T/Hm+qsOXlQ9i8Pf9VAE9LWS2byZEwPIYDYtbLm2L09NRsMgfm6PotDA/9WaPtrx/CrM
IMllkwsRz86jBnsfx1s6w2v/gxQFWv0fY8mf1WywsWC+WArpCmvfHO0WMIJtyS/B+XcdiLdfrrJ3
qeRMJy8lhDn9mvRTVYzLXtu6Fv98eAxRiP4hPmT4+kxhTz4CT4cDPP9YKhdzODoL28xWfAYFbD04
Z7nP2BAp3o1FR08u/ctwg8oxDjcRwHkmDHquzKrPjnQBKXv9IMSCNsR7asFA/JqdhHcmuKZg6PRk
6XzKLzz1/Zs3XVZ/rpAcA4yoz12/yPHmsazO+a6cgbZy7JTSwRBhRd31L/KB4M7WXzNJ4paZAsOI
O5FWmQpp6eEyGGXpKkGy2qdqVRuRe0IjzwDJG6clerafsgCAj755Q2eTRVVvvRQw+G+hVjqaFu/+
m9KSJt+0hjHW1BHC4wyHN94ORPERUFukKcxOq8a3C4r5hTOZW3XWq1v7Ks4H7Zwi4AlNCGUKQ0ON
VSZKVFl61F+tBDQk+IqFz1WMfzhOfRJYfalfeqp5HOOIaK9cOhXG2oYdhceL4LDJlhJPAqpAc23Z
G9mCLMh7l3PvdGUWIx2s5Z4EpUsaxWTxxqD4a+cGuaZLzeV55zSCZ5qehwrwRTYvoBZE1+lOXnfi
Ryt8wko4y/GJZL/NuHI8l8tJKmVjS+XqWIN5sWUs9WMNit0HB/gZfmTuuvpwP7gjFuUjS2Q+jgYC
9ppF022c89tfs59OKVOjOQ9s2b2FlXyn4zn9AXI7AYGal0MNPRsQwnnaZJiTebyHcwtZucfEnh6z
9K9skBFs29qlMPNYsFP7y8mzdNhDng3TEgYpao3SPfXwDj/CSw/ObVggf8enRTUNlDfJ+17WwDyO
/ajc27MzTRLyBCCQhUYvMn80lvwSHxWDIL3xKvr2OLMoIAmgIZJG3sJMyhsOPqFxVb1Qk7NcojOn
D11t84xem8WyHJRbm0pbKV40U5U40scS0H5bcMWTEfGT4W0Mt47O181hbfymq/ykV0yIpouFyaDb
tUvUtKWqMknlkUxdllrfasNUWgJUfn8Cl8EV1Z3U5ABYiUNuRr5oKcdwlS7eB/n+UgV71hPGXiii
tFKvLiZLXS9l/eoEDDKLm6/8OksoHEEFzRFIR8skagCp4rd4fSGbOUietH2v8ecJdTlXFP0ex7TX
vh51q5DGduPDyv5nJCNInuPVn9Z9r55S/RGw+ySGAcaPEqaldHWakl5LrzE1/zI4K707/QMAGDAl
HQdn4RCGxESdD4HJn35p8o9hnYl7WqaHBddVyszwX//kjQ4qJolh4qp+txlSxnSJmCs83a+aCvMk
IbAnKPRH3SP74XCHOQ3bziFlRO0Q1JWSUp+e9CxVX0iTOPbgrB+wD9yT1o6m+o45pOEi4yqt1ZwB
6GRU83LP6o8j9UURxZDZ5WMgpNs4xuaPxAt+XstW7JOy51tYRnIykokiQYYg+aWP02kEZ7KL2cif
/t3AkMcRC0iKXbo3c1/h2uNlHbvkqXBOZnmGMzMriXwdE44Vt7izgW2oY3N5IFwqNHPtWi9SS6yA
hcD+oqiZ5YnDx8Be3R5HxKPygh4K5ePLmLR6um0pz3P8seQq1RKFP9ctf/u1v+7BlNqcdEez0X0N
I4X1lXx9dw1MpdfXfG2riDistMNSEH4Rrccb4Y/8cnRL9fh3mO987Fb0uI03HcxJiExzcwHZ9dco
s3vvxZTsaIGr2xmmD+LsMSI00fJFv0/mbMB3LLQfURbbNvuYtBK+fA8U8TOqSRvPYwXdCjv80svZ
ecFEkHhpXJBNTWSfUIzupFvHeVSIxo1FYZEy4sS3rdwokvKAiZK3rnzY+Ryed1c8On/UbN07w7X6
m6hS6lOKjYh+wxgHNswvu8N4sknoUX7Hwp9LBuU8+T0Ca/tOrCkICtK8kD5WkMmpO6IWAXUjK4Z8
/OmRAfzuhQeScqBIQTMuw2IkQruwSdfY/2ev76Y8v5xSi/gzcXVjJ6pNWe8NhZ5pL8vuon9u8D9v
ac2sfrz5UyHorqRAvNxS0nxaWXiYHYmk54FYhWXq/l06uTApLWRBji257/fX7WCJ6JtNeLLcAFYG
ui6Qlw2u4ilhoM33Ba9OQD+hKXM93Ab35owHIBR48oqnZlu/gRs9B7w/mQ9P7Aq6DwyYiEy7zN6P
zIrKF6PEXI2oo5vRRDZlhHjnxlG1qbQvhZImGO8R1X3muvsJ0Z9NyHew0PCSz7i9mW6rY2m1FJBl
jLOuJd9a+SClV8HYSGnNlxIsBxxS4kdb8pJAiZyO1GsyFurgT9epWWxp6MeSTru98ZQ2HxuKRPAh
LAyFLPqo+UCcwRFhd6SEMQhkLktq/u+ZRteg3JfitjOD93M8XsrOOZXAvc8OK94NqeYOeOIYfeiA
Bh8AZZCTK3Xt4QLtJ2oyW6gLSK/gyvC1P9wVOFLK0VxRCj7UL1ENqTGIylLsQV1EDrxvDeHgkr8n
+celZ0eo5oJZQc+yNrl6D8RLDaFfOndjQQuP1VMMLt/r+SCqzoIQpeaPzjqcZ5F2tDjq3vLL3JlK
L72Oet2zPrANXugoDIB6V4zLM77QJB3ICXMRSw3lLKHdoVR1fOZjH7lh6OFJTtre6FJuHv34LR+w
Sc62m9Wix3fNqnF2+9Qp1crzn4iR45vHd5J/GET/E8MKd44F0qOzeLFE7zgwf2+Iy6YZU0LJ7OWe
z0OlZFdrPEAemSaXyLI3Wg2c7W5Ef4UaJISjZfXU+aX/CFAP3KV58g4cgEfSs9fw8iuCFLuLh3Jh
GZg50idBZAseo6HiW0jDA4Nn9S03k0B9v1GqmSWPhP3YhzM/EK26PGYcgF0eivassZQFQSrc6Jil
NsS91pv/HNapigSr2eVnB1wDsPbMOeAWMefmfTJEy770FLL4nJvHH23BcLXTk4vQBAncc/ypOm8W
7K8vIx4OeBmtzlz+HHoN+Ki6SGNYfqwhxJ3Iclxi79j84bg6FlZ/sJmHW3B/BcC+MY8FKzU6WOYl
4ii86/wI6/Ymwxsc/fLpXuJgVnj1G6seQpKpHtSA/+fDWnvd7+23DNdK6HfBGZ+9h1HUSEREwoXj
99Lau/2+L3cctWkmre/U6dbCrUJx+9esOM4lxm0AgWGdwsmiTdhQhm1GO9efcz3nod2wuyLOoRFB
PRHCoU9xUQeiUOHk4A7KAbqWNnKmpYJRUFtQ3lyKzD1zt5ChuiYS+1trXUf0emVBc0RXJeOJM+oy
pdYUCtO7HboKltA1VXkzyJrTAnuRxZ1FiBt3NN7AswsisLqFyQAuddvPGzztWsE/T1mimJzTQK+f
f/Lv/B2HA5evVFXQh51vSrY2ub6y7UStyV1sLz4hRJqfnfYYtn4qKe+hiDORa9CUQSPNnR1nNwVS
OkQkOe7FGwVo2tF2pgxsVaObzuNgR5W00kvbG+HZrYc/VlQXu17CoYAXyKuimeuQUX6IOYQfOtOi
P/656J+ayneD3DdaM4CAxyapYpzyxTtzYw3d3BmLALR36ZccU/VhfYiHYcCtxg9XbjQuCmn0V9tm
VhQXJGWmHnrfgcSUohqw+023UH3zssHKe3HoXWtNxZuFWTm8uBN+FQJWwZg5o1SnFllNmOyhtpJN
XO8SRcSR9ghUC2PkIXtJSv9s4l9Gp1a1m77LFh4HZa3el3/C2W/EGR0B7R2Pzy8Y8kQnfhLd33aj
x06UIZTX/x5oFzGlrD7CuvF5JKo9vOIxzToHh5kdoOD6zjUKUGJYQquc/mE0DMReySwBHVcUIpLT
P0tPzMBnO/rCSMnc9ks+pckz6Kip2rnVsPX+HfAom3uAkz3m42JwY6b/bHCDef0RK/3WUac0dSKM
kEYtrhwBrDcHu2UrE9D4N3TPQpPhltMcgA3rCnJNzhStxgWfSGcSOX489GY3JX51jrPQ4KLwg3Te
uHo9coFgA7zxBD435Ek9ZfJZAcIO0Zt7s2uZwvFyTVmPWSIEW6daOf4f0gxbKYxTM8WdybNJXju9
AuBEu/AVDZ4+JGpSkGoI5khnH625YEMjmDdM7yC1jJKKFINwCI4JiWEAl64hmuHGoqBCRVIgMBYp
hCwZyPZsI1RVFT2dRHGrlaHOioCJ4s9qfl+jXm7NnHKSvxNcZuT+Ubv1PiLUCoGFG+sBAEE7OLIx
156yyQxHYKvnmGVKdSv1JDcqFOBTX70OTB59UidJY5m6HfaEtJa2TRtYd9dfiLW4T+bJCNByHVNJ
BP5PQ906S6hbtLHGTio7Jc/IK25r925Vil9Q71uHrIoeIOuJxTU2THyuDb8th3jMJAWZ28arIcD1
7zvWma3Osergrj5anOk44hmyfHWNmtZzWfjZ8g2mz5sCZf2xhx1wqFFUm2rP++JnqWZWqJpie9P/
FaUflE91AeT0nPFGzJobKS7vxP3YCIxqDXb4W+GNrbrMzqJv62IjXU/5VT55UrYBObNBKr5pNuPp
nl5/A4Sckp8yUP4cXgns9z450Dg8dC2rJeiALt5KoIAI0mqVyz6dmncs3964qm5zvqkhfspebtxv
+/5/HLRk1pKJC/0BEIG3U8PblJ4S3qWAR1ocDE72mQpK1S8J2OpVtmNPWqj+Q8XxAKeFhxNgDseh
3Ys+1h4JfwdhkuL1WuvUWRmr43qJQgrAU1dsla9XqNHMblQy5XDeZddFiARAWW3wQ5mQedn8mA5U
VcD6AFj0+myr/qmfSW0WZomoAlWRHZR8ww60cUN+wUjqZnXcQrMta/v0wrgmsv3Gm8XyHnb593L7
eG4J4D9wit4Xzo8ICB6DhsQ+QOfSpMQ+Uks7P55CB0dzcg3FIehDZWZfWj4jNvAY1gUscTVyYm20
ltt13qwaUWOMqO2BXOxzc3jQ7Wi51nA9iG29RjBhvOs8SIEWaroBNDKCGcQ3HvQk5wLRSMiGq6If
A/12iSm/sYD052pbIGYML2/C6RhJW3M52SyyIXliJtXn3B/si0AgHYfzqT0vXPlxQANLqtU76Uyl
JwP32T30MRjAm6qMdCDKPfadIidlWtpiNS/lxnet2Fgcu2RTx9pSlm5DVmFbm0VH38okdGyJDSIF
p+FEprQ9eDPqoUzNbjd4QlY9bph/Q/CVR7m8dBAbCFdT7pbH6Wdwk7LdzgRhdtDP9jIsKTNNte1q
GMvooCehfU4GiCw5Aa6s4ZZbQSVYuhRYgOHzovGzq1+5wOo7N2JA8vlRYSwwjVyUb2rqq7iWsbg+
JuJapgIlHZCoOngniStpVBvML3CdjisUnPZs7sdb7aLtZRCI8TsyQed5VNTTOv4NXqNYWssW/xWq
6f3VNQFk/gh7GyMyJ3d38QobBhLCLY4hmDK8JEZCWxIL9DN0kaLLviNG2wWKwZL2cD0vxQK+D5M6
PEIAaggXEQmwA138Km55S7ojd/DGbrMb9D+Sj/6WEvXGOXlRpGpFQu+ha0Zx9dB76EhCiH5bYq8w
bqILWA9l62keHeCH4BpTHJg8hCuBw91g8KmUfdeZqhZBGmg+jggKMotw4SoSSGVLhK21Ezgu6kSH
xJ58XYzSKRTRJwiPKrAW/4WoTYupBxtoBdz+SqQ84ip6iqZT0q/H92SSDYacziEwJ3uB05PxUTio
eQqXesLnKDT7FS0PXWpbQ6ZqpzZuwWNroQXXNu1J8npgWoFeQMl5AlAUYOaByxJ9IkIGyYOKvYWA
OgomT6uFDSlbXupq1moQTu5MMxn/ZMWnYIjBUqki5h/yxrMoUH85oCigWxdSG6HkE/Dlp5CORbr6
gSgkUnNa61GlwM8WyTdTAlnPRGGVdb1X4S8CEW5ZGHUyn/oCYY1HKlwtLQyyQeVplakXQCvrJ6kQ
Bg4uyIJgb9c+RoZytzND3ph+muOAgedD8oFvvTx3sNPkT//7bqD5QROXfB/CNgx/tsm0OEgPUtyx
ftKJXDzA7GJhHQNybc4wtemLWBnKgjvyPxxbdEyRdD4wobPkbKzOOTeAMstEFoqr0Y8H7QhkUQam
2jDhUkqJ284W1O4H/XuuB/Vl/qvyU9hoJQcPCgaBGFdq4QRDbpDlmpqlxXrXaHZlgWffJAnQn8Fv
sk4H4Ea0/WjIO8ifNl6SfybYK/5oIAIgUi2Nk8KE1m8gnJUPMXSYWsAeYkR6ybc3C9yJj6NzwSUW
CqJJugNELmiv6J9VPA9PaGQ64c+3pm+cpyDNDHQ1vY1qvj3nEgqx5n0Y39nCsQImiPV/Sg9yh2Bk
HQ4ZMwhLI+nFwK0OZ/zkh4odiDsOBE3M+kMnlZ5BJmXK2t+A59T7AvwpyVEVogCrqtbogq7EyP2R
/KoZIKfyE5vXtjndlUyZjAiNgpjTc1VakSJb07v4Jnou0T2uuBBVLBE8e5fRknL4orW7nwiNGR3A
FjSKy2+CMPD486jawdbxAbwfChXyeCLhOttQScZ5/UuJXKibAEIiWMO0zwi6h0787UrxLIJuioc4
nULkOdY/JKeviefRwjlnZY4q5i8h1F/oMT/HYeWGqrroYovXKcnUxbMWZD+jaopXwpKIKwV/u7gL
ICCVqIDSf8Gom4lbOw1ZcRZKLSyvneRHTfAaqVZivhe1m/wTbLuvizyo5v0fH7nNqAzAgtH7oirl
O09aUTNKpDm720Ay5sPItAEz0pFiZQIRDfWGCHCuuGaXZG0xuyl8ShQxJz/9BEeMVCPhZnOaNv8X
bNe0t7omyZMkSFNPR4U3evzcLjcuK7VEZZdMkX6tka5B3C4bRACtFyOeQCt79Xrriwjp3eDw8Yxl
i4ZnF2nnIzXhArnO3TFIuhZXD15yn9vVT16wMxV0rkzQ2P+1+g1u7aeDNwRT2xaUvdsFLGr61RsA
krrBB/uXlnDPWrMSIoSOLSTC16X9VfDFq7XtK2uA0BmKK5FJeWOI1ArralXwFlj8KdxJ0L25ro4p
IZhykME1I9BoKS3TjfbTDmfX1WVooDH5YBhsp3fnJjyZm0vZ9V7nsz7eC/en9E7r62uh+MrQsnxQ
HEOfnD5I5vsCo4FmTwA6lhGbUO5+59ZQ6busQ3Da/4/gKfWPi7Rx+7Y3AL2HiXlvnKxN32bezNjp
dYjFYXVPdjaFpz0GrP3APSdp3La8UFzXbVhLuwuv0mDPBPScpRdDo2G0X7gso054AFVY6n9p8tdd
5zYfJhmIvj/NqUn/wjbA1Ptn5IjIafceDKqCWE+o9brGUJBbmYQvsYtD4pa83lH8uoKqIULDiSXg
6yxJwmM59viy5qkaOJYrzsWg3wlO+PCkAvqg5HpLKFZUsQIYlmnRFiU2siCw5xh8Lv91KTWQE26H
JygYAC9Di3Fuj9L52dCNMgbtOCerVWI4RqUpIFnC+F3fY0d0urDChvfCB4v5ZfmHK7UQWuUl5DRA
Ncjw2/e3pwmVbyls0YUVrzdizPbhlKDJX7xzvC4K10nrAjnG++RxySdAOFZXubgPzTr62JQtSXmW
IIqO1vKeYP7Zb22j7YH/bXfT/F5cufY3ai23D7tEwC0XTRPsjTnkyjrFZDKy7H4jtCHGqFDihiKn
lzcjRj0nxDEydN0T3XZVLw1ckchidFI80LIRUz5/80zPxLB32RudBu90cckCuB1n8lnmLPij/zE+
aucm3Kwj0LLI/ESxyT4RR0eJrEyPbq9hWnKrwAbHzhPaF+fffQmkrsUci95u/+x5LJP6G4/zY5ZU
42fBuiz8uxbweZF5KyivG516l+EjFp1oi1B96wKupMTLWNO5UC4Axpffk4EKZEEns0gYRwpJIJRE
k8wuG63EMGWNSCTG/RO5z9NxoZktD7g60co/R42CBfts1WLyi+ow7jHsNlPv2xDWQd26f9hJIG0e
TVk9W8+8PqEnJMnsgKAfDu8qnlNGOsOHkqE+0aqrtum7PjdweTcx62yaHJffKPA9+xi5XkwSw90Q
gvLoWjJpXh3ptwi4hIt+bp5SLcz1MgCE3s+B9GMkZp6eji4CZRJ4Y8HsDzXziQLOBcJQbavNtaQc
TKFoacbgnSmdbaLo6XIalSOZIEQbh87hhxV6K+UWL1flpVWVAsJlAajEXmi7Y1H97PKK4PzSN+fr
yJifROBUNzCVFwmnra+Zipb4E5Lcxyic9aLP4yppTbb/i3T4qOrnXLKwuSrhJXSCcTyIRNfCOFlv
XN7teOJs72V0dh9L2Cz+VbtkRX0l6NYasCjX5gO0C9MmgYx+KYUX4dFrpHbbUVI/aeFPSRXeqpDp
Bj9ql3XKb0y+qM3C+ISe74cIUmyZPAsxtspP4l5ZqJ+0B83nubj14d/NJVghYmn7MX91fvjVASmN
lHcGwVvjoBHip3wjmlEjH6SoXc9kZSi06Y86jAP1G1cetsxKKdscQvvIUgoMDbTIh6hwcJVeWzdL
FeU4QV/2aGp2kibI09y/XFAZ2mNG6KrztPsjXWq3ds8FwxjebgVCba+YBkr11MEoN8SQGoQunHoR
wD0amqgzGzavEsdYCJ8t2cCLE6pF55bmrf4hm3BUaEi+H93IC5sJ2FrXcBTJB34BRd3BWFA4sQn8
EHoI6sWL/HNvZS+gmk9tJxOpZdOlBmBvL7QUxs9O7HcdiJgqyWSO2WiYWifPywrmOTezB/3RbwAO
kCUo352IbRcj3TrkIOubd3/438v4D7Ft3DhuapnoCgB3AiCh5BOxLotQ9OLv93+EDKzj/zShPRlD
D59DjxgDs4Iu+g15WT/OKtcR3zlU4vfTWVU8Pr0Rrd9q336s3AfGKPsXXriQ6NZ9n9r5uEGts4dA
CYsfvUEE6TTkT7HDGNd88HhGc9mYTrvIYqnxNJ2Dfxdy3D6py5NGKwO6Z/oHkj6jB0bWGX/iwhbN
OZ8Kc2Y/JJdWFNMlOGHs+2mgWXt6E5z02EvayLNFqqXbzAWxSJ4gVWUkRW1w4X6kYXnUfn/uK9T8
fyhoOAFAK7KnWzDARKpQjPRv4cyZKWEU8ND2VGBYHHhelKiwkDMuKr8qCOHoiTY9LsSSTJ0y3Om5
zPbN4R4hd7Ki1teS5VRo9DgtjemIkmKBmt9AVyH8O7supJ4F7fWQI9zIGnoUPi2/DYYul6u+5iWT
Nnlokkjfdc4WCCICsJu4zYJ/8oFwpYBTtAunbPpcyXF/jj8BGbtrurRFhOc9OHpTS5riE7CjTD41
SMNvyBkzXhdBL7s9fFTUr2SwP/m/pdiYt1Y8+cPm/1EIyP5d5UbuPMKsZl3LDwWXCMnKi/h3PD2z
CGJbKmdAx1uch5biRyNx6w3CCPCangeKeYwHKLHU3QjsWtCBfoAkwR+YArHSuJu8Xvtd34qhtsiL
s3yC9fez7iMXGfqasfXLzwl/T1pnQLZ2q5XYcSmbjHxP/9A27xwKycajveYOqzAvM3CRfiZE8eY6
nI0NQlJ53WwU2oTg26Z6QRQe3XHyzBwou5E1nBjHU2cxdKlVp9DtJEqKHiY19jXJ15FW+qthh9G3
7MbDqD0hJC4kwh8UFZkjzWYM6JzvLGwdsQBfme8bOryRIVZ67tt4bFVVLM9FXD4pW0GJ6ORp8Tdi
4nJ6S3aD+mYkO9ofUAzhp1lc820p3nSEDgqvhWKK+V8arvQArAOVqlMsfcrxjTAftF+gupUsk4Uu
x+TuA+NA2OPMbOvrKHF/9q/bRDZFWAK1pqkR/ayn+Hr9aqdjxKLKLgWR5GJILTb6RvYPQ7C4/P9u
ORGmHF3yzCa8y0jOFH93CrTEfxSjBF0EiTlKkF8k/2JU0TKPm5zvg6slp2L/EEy0ydkfd2uVivJM
qWFaC71OR8sCvnHywV9Rqc/3Z5M2hIVDYOyota7W0D+EpXlGCDVDQTpNeGWmOLMqNfWr9mWdkNpv
GYuGydcdMKsPCIlXc1LGOaspNv21aHliav8RjakyVwcswmUhf4ZBHyByl3pyxgpm9fvfdXUC4KzO
tu4VTi7sGKg3DdJhVLw6k/2u2icZUQJBG06UWsOYro6lLEAa68zHBoXCTBDX1LdBbB0EpvjZGyiV
uRE+GXFmHrA/q8FCObD20V/4gXKXk96VrBgMlOCPfO4TJLu2BNdhasrxouG2R9Tf4ha3DpYB5Wuc
u0SGgldtDs6NlsmbqCFk10eYfWxWmYr7FmwhHlxzl9F8T97rG2QylnqUtYMDx5M9tA9+oLYxWA8y
A61+YQeWWM79SjgKWslaAG554is4whtWWKHUsHr1n7NYjd26Xge/QVwVvSQh2RwbfymuNEN/70nO
f5l1YSAhk1y/G3FFQ3eccWGONkdgA9dS9HZQR7SD++bYaL7Y31aVlOxtswK1jcHpFCTFWeChLhpk
DhoqBem38sM9At8UHDlWF7FnNAdhktmFUDxRIqNrYrFlhR5Ay5crXOKjDrTyb8zQYmAalRw+P3dt
9fkWxL2T6HAMYBjUAvwxPOx3FXGcW7dkxacjYVhZ47bVwupVqkgXiYkIDfmm9tjzFNPCQnIDtgPR
22s3BLR4rzfdd1W6ClCfGZ33+Lcvtdd9Ki+ToBL4StuX9+m9nY0eq/rislQWncvUWRVJfHsBK+JW
b3dfPRlF4ThV5RejfaAqeMycTNOLFrA8X+xl3fZkznaeVNrgkR4kwoDX2c2Y4oUWRxg5an9f6XME
h5UtbZe1NWmkPyew4JFdfnNc+OItFmUqcl4XQxzLtu/yeQzsZyPgKfKbrZliJk7r5SqcKVjI+1/u
BssgQeOwTpFRPsa2skTlRCvfxpFwBXYQOkncuApZXm3H9ImD8i99TkdhAZ8NWgiMGx7rV2J3CCI5
HsIp3c31R1wqeIc8490LHA9lTaqll7qbFAsnlPCl3H4sik7s8zflMICkU+efqDw7eZ8f6rqVVVmh
MVUYBnN97fby00WKxxnfX/5ZjKDrN6aiFvfS8tCxuEgaYRk9kmkIXugVN6NzveA3HqSOhYMhKGKe
JFqOwIO7XaEuFPVFmRdwDreq6VIIsQvspti8FGzLp515iW3yBgfqUPz9yQyIEyzKSjfIuGcnc+Nl
53FjdgfO8sHjhl27ZrqtLlZXmHNt1QTIbla6eWi4A+ANmMq1Y82B1nJa/3DKWjO8O8ikeS55lE9/
rBW33a5rSwc91N8sK9MH9ltCWqCHzi9hh4nLPXYs0p63Ba1BX2BTEdHAMiV/ok7Gk3mE/xrbysXB
OsHxm/PTXLq1Oruj9e0Flq22LadcL1O/ORC4JSBOiiuM9gr4TqV/gDQtqKIIrYkM54hiOOsqqolt
2A0D6WDStP4Izq+kNwgo0WAOXA+JYOGHTHHRtkjSjMynoG6G7DtSNojNuPwXQEGyf2gtzfNWlyT2
XjOd44j92KD+xypnrDyiuuF5/HDY/EZqe/gEX7eB0n+d8POCNdlF0wY1m7sTcWRKbBWi+C4uj5nC
B0jFvqs+NEuIq0GN2tFo+Ec5OXuEP6EMYQGl1ODp7STVcqPqpma0n1YREle+zk8moNQW89cr0XwL
fAAaYcVNtR8pt2SOPnBu1ud25wfn1rf7gqp26RjKDz3HUT95C5RC584NThsfxQKdq5N1R+TRBfbA
LnMrcp9/gs2ZbcUq1Csl0IU5KbrWEzyG2Jkhrv1u0ZtToppSSSL0i8x5a5XjjkFQH6v5b2FdX7IJ
vboF3oVcuM4hjOKvru6TxveJKkRXAKn3T85gpZ6tqn9lWwIB3/VBbRBTulbAycK2aXgR41wbOmXg
QNMq39AVJRBU+wOnxXZr7+37NKgMNnKWvvc09ArGGJLv+Z8L4TP45esWft8psoczuZxBQjOBePHz
HnfM9/zkXAix763TqxsfjxCJJO/wC44vt7vQdUsZyVRYVoOgvnWad7bYV0tAORl3NjzUYDu/7Obu
WqBkovNas0ezzlTAzKuzlo5uxBonTn05kRcFsil3TfNLmAyO1pvn7UxNpbytHH9aAgi8kx5iyHjI
icVFxq6wt3jZ68/S36AKm2Naq1kZva+2TmU9hiSPQVVKpE2EnC2j51C+g2m9/apvF9lg1PQG/Omn
0IjWfrKAvR5i1MY4FRtksBpFRmm6vTYYcgXQohY4UYylbtw4v0ehzx2zWObmMXQkKwMRPi4tmoh+
q3pjDIws47VK8TWzDXuBY0GVQ0cty4xAUtzKd+NMYMqlzZxnAFEpu6jhaQq6w1LzfqWZnbl+1Ext
1NJJzOnKdPXbHlTD1DVoKPiK/9lF6jsvBmrphNXTr5s5JCLeqR0pENXQjtbZJZg8NpqEJzpiEEPC
MgiDFdPFY617TuVFl7NyyUehhnBo58hv4nU58I05y3YgWZ9eB7j2Pa2tlFhqo2b0bV3Wu38WzmBg
wJMu3+aKl2WkH9KRNkmt3gjDQSDG05gGaXl/6YKShvF8dfZ1sKiXXldXHqPH3Mk9TovBoyQdLGFK
HW4NxnjJDBIar/Qq9w8/gIlFAfiM1EG3D7XH7YhK+8OVXS0edGuuj2qsHaOAdp4HX4qWum5KqRvF
vYpmT1YLBHzUJ+tE/5oZUkk9cVP1/KO44APxW6dKTmbGj5HlMhR/DdeK+cRGlMAjFo9BcDdL2k+j
OaREG08x4yWQ/7Z94F/jlNUQeZiO+ccDNPVjmqNk+k3t5xtANrk8PesyWIs6/kziY/mEC9ozlx4a
J23X7ajw1HBSchZGBr0STwWoLZSz8yY3wfaqmO6j3ofzFeT778MV5efqiZKdOJqNjvQjOqEBpS1O
gRPjdQN14G+vee50c7cOmWF8rpUErCEJbtRotTUsZ1zewOs6b1ALGrpT8dZ7zi/2SWKsmn+AvAKN
4PzVI+0fJEqfYc9vuaTwPNb6o6rFvfbpGw5MOBCYUZ9XqywtiyzSlRNbECgj59v3X8GN2OOZmElV
V87n29XnqTND0Rb3EprztQeoMLMHFSKVPMkPzbdyOPMsDU2rr+tkD/sHPQpIDze3cIoQiT9PRrQF
35sD0nRiWngPOc4VxIJE9h2ITen07Rn1PQy31vcOVn0HCYBHpZa2fiJ4lU1YRVzyVZfuGDldE0tA
skEDnkOA3QtsbofmeNZIG8H5jD4vdXW+tk1Gb7facgTCLt2aL5K/zXEQ348EZTSFTgIxNeSi0JJS
6jGYW4/Ye3FLPeUuy+ZrFF8+ZAy8lp5WaiFO6xYQrRrR2K1Qu6faPBUD+RQSF9rtKHwSwLZyFOYW
A+VYQUUyNadoSx8tx9Ll4d9XBdOoDxHEgHd4nQ+N/GnZpOlxmoTK2U4z2TRFQdUJpFLAje2x7Zhy
/tyEc0VZ721GQ7VdIjevzlyYrZla2Mol3eELzY1wJrFGa/22gh5HN6pPvoMAUg/qLk46b5E6CrIE
VLetU/uLZZf1MMviF+iyKXWtJol1MUbHOVUGFrUb64eYirmuP5WylzxyRZs9lL7y1Uj9xeBJW13F
CnSMn9Z9szQVCtYNzdvgJN0h9C2zF60bGErQO9IVjG6ZajTfZttjNP3gB/dUunKBtjPwd6CSQDF5
9MRc9x2CAQkWj9oiFFZLLykegY2erht7tHrduDP6OUvsxynJNUOlhJb74k4Zha5aTl7appcs527a
IpIy+01oKZ7bpLDDvRDpT8aooRVVg/63KQWJpg/ZjfE+i2dpeaOlVHUcXr3WFkQuT62enDNFs6kr
m7TpDBlr4U3x0IRGnE2zburjcZJ5w/MLyt9d+Pc=
`protect end_protected
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
iisr0ydwFOm3eepmhOYSaxO3flYpViRsLN97vKyw+ai+x1TubmaH8qRRwK/QFeVsjlGTFdxookcr
olQwv0bmdw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
dJvTzz+PoD3n2Ot9SgKfpEhIshJxklhDhS1tYcrcmprfs5wN+lN+5Y+o9jEEql61IqDkJEIGu0xp
zaDWEeMqwkFuovmZnp/AnbrHb7R/19zPRtwSyZ8+VQRLsRMgscwutXu29fTUST6Ribitutae85tQ
1okc5mYK0mcSMIggcMg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
ZijKIWnBSOuwn6R4ZrzJp1qaSPGZMrP8GTp+SV+Sn9xEivGxLJtGM40xMLXxiYuxIopDD/A1usG6
HkSoNT6OzxHJWKkUEyyVzrZuJdNHJ5q3s3y5LSNY7eMxN9lY4/gygh7aVIBAO9YWzsWu3HLtrHA5
2vsUFQxQdkG5OTLVP1rH68P4j/dhqr/LVHw+9H76c/knGyalpHLRC7tnHQcfuezFJWlkzaNGHfUo
b5cE1YTvtdlZVmw2sVG/GbXIRi5fq3+Okdy+JgckZ4dVWbI20rfa9LkI09/kwD3anyrnovVQVx9h
F0AxolVKVVyWNAaSu1fvXllqzrdJiRLbdnsq0Q==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
LUajPw/jRTLlmEKb+9YylQ2jxw4jlSx/1GGaY1wFfWFdMwK2p0xvQMjui8K3EqJF0fnb3QNWuQDl
1vTtf04vcOAHkfRCeW7Mbp8qeUTtAsflGIPJDxHfVU8ZKprwANsENc8LVrpJ0WnjDFQIzJw7LDqc
Jj2TofWjKprdxXsMnu4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
KG6kiSPrd66zvVpG96eKD+783ebVLVFNF7pXgq+rCyBBRoa0N9Hp3DIWK5125mkICodI82zuSq6k
C8aCiPbDiv4tiuIn19WDNNPL4ncknL0KLZTLAkq0BIQIsnFNRaZegM9aXOdMYGKYLpnjSD9KRWRt
WPXPZfwprSu2D7PeDZMiij3MY+cixttgVmNfcx9Kkmvg+1B5sTSDTVs3fqpJBBO1YslTmxyJAIC6
uDuGqvQ1138z6f4f+f8vMXratK1Ypo3jPPb4FTNLYJio5Vd1Nbpl9kRRtj801Ie0GGhbggK6IXJx
785o6wX6g3tRyoHXGJ4DGUmWlIHATg0KIAflYw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 13424)
`protect data_block
rEtV4Bm3SmvVbKq1runp2SaaO1GImraXNQnz2t97NClVhlTBGZ14v+hHArmsTHZNME/QWduIEcCL
I8GdWPb/f0NXI5m0D8vUM2MFHCnzTFi82f0pjwFGBVpM7cHKBa5QRX5K/e5A/9KwgbwYV1tKqTXG
aWyx6JRfuzQINO3rQqM+n/1b6LSLygDM1QuiPthpMFKV8IfsVkaLDVqcLxH9/n7C64aisv1xK+OH
WhYRETSZok8+gbvdGdr2+VsE64ALl3DavNBK4S7IOGP5YtXviHmw+Qb/lvl6m+RggRYmTe1A6B5r
pghgGDxK2gS0ItU55quFmZMEuEH+bwLuaJA0/UWR19oWnbcTZnsCqEeN/xbKUzS6blm1K6RPZtYe
WSGhjFl0cKHEQe9DfEazTm6tS9mJ55lLbSuwE5o03LDGRapxUdSR0IiKy5C5UP4genzVw3zearva
qPWmPeGZcAEyFioI2o4OWQP+8mFdbza1kBOuw4BP76P2c+ij6wbxXAWVxtNmL8f6AgS1AV5SqIO0
ftTCve0JloVh9kpHsbXE1TS45+y0IuiC0N3a8PAEsXa/tnLsnAydpsXIQwMLXmgKfoXKzabAHHdI
XZJd/NxD7+xY3aINMVaO5eSSLIdjkYZIeqm6qf+x2eNd9v2nue3I9rjHkjMBIty9wqDCI5HznV19
h0aPmdRn9t7Ft5xXq0GXqSl2I9ZROoM4hg3RU6TCVY4IaDkErgP5cMhIwuHsntmeWvsvkZFygQtU
9TUaf90O9HINFkrdIHf0ZCgtCgUw6ffQNPAkw/6MaoKxm9wdczGi3ur+eyRvSLy7+LQX/dOqvXKM
9UFNjkQk392HWfkT8aaXacuJgFT4hmoEXDGY+tSqQrQRrPmelj+ksf3PcI2r64RSTjiR+9HNqWqJ
jPJio2xgGdQdGrH+UewLz0ySmNDYmqxIdyqKfv/B1BYMUpGd+l0eRCp0RwjP6nt7MKkBishuJTL2
2kpCGDQ4HELrlovnj0dMihRpFZAIpY55DfNVE2hnbkHthyDrEXapmovyPqDFel+HKDdimVyeM8CR
DKl0D2+OZK8XWAiVk9Ve6w0rONvwf/XvaAkgxa3rDJQo/8g8oiGRq4ku5l3OZUKrPVRcjVNCxHRq
81RLF34Ztt0FyGvWgFBPXPwl/QfIQcetnIv8BBHDyYvjjUEJZxJ0yVIBqSipzmyIn34Kt0GvhgJJ
oXsivJz4IQp2WiLYnKzv7NuBWYnOF+M/H8eFTLS7ynV/b0CRf7qayeeaKYL0uv9mUeXbILs7F9+8
XkemV9ihHFfHS04009LEbIzG2O13pEZ78n4YAi47TmCv22T8/Ve6sSAGowqE6FfeksCmQ1+Z98YQ
uXIyCDvF0dlGJwZxogjNRbjyCBj6OOagNPhSW71GcVdRv5XSPoZsF68V4hWQeNb+itDo7ZPtZJoJ
YzLjFDCWp+2G5a8+OtWGetlJNejx9rEDOQvPXNhCi9xzzzSvIevRpnt9XX8uVwzzSJnKhI91LgRg
ID2cjEMis7S70eKGvR2/KBOhU/KAbsgGALtSpbd8HPFqo4CWuxEHCYImqvt7m+vI7jIEpXbwjtx8
QWNgKL8RNSViXrcj5CsXvOI28Nk2V+GZ8jr1/8I4R/Yns4Xfj1TTWzVeNCNHbazn1nufigCGV4Vl
qtDHRGZpM2GzgWRsMj5tsZldV3pp52C/Dpr/92KUqWKMf/mZbYDJL1X0X2Tw7iboFgBgx1miq+ht
zrLMfkmBPAPakC7uTHv8wdz7HICGyvCct17zvGp/b+9c5KI7lCBCd9jn5PTW35q5ksO4eC9R2AqE
0xJmD9GKB17q8Jk7vlAMs/IJV9rgMDnRfyFkOl4hl2S45SaIY1ObTSNIHJYg+rp/nN6BMaWKrR+7
O6t2IjDTrKFkfrU0cMF3G7EiQSf6RI1d8iyqNJLJJ3fbFhF7XLnn/CwlkZ/03Hwn1nJocabXwbc2
9Q6RrzrxLCWMZVoXaUEBQvapxENHsyZOrmSevUQnuCknCx9Eh/GwdP2bYVHxXWg7ySdjQnVMtR4v
qT7n0yJuHI0ite3a92Oo/MBdlgCwEcxfvgz0ILRIK4wFe098lGOX0tVEsLdEUijEAeQR38bksd9a
fuwZzPBvMZQ+FON4CQYrDg971r8Qz89ArQjVxWF7TdD0Oaq9vaUrLocNzIw9AcIy8rWaQnwTR/K0
PsXLapKx1fOSZnuztuMHoRXGaqZVlZJGs22/GiJA9y/IBflmF5GNFnRUbXVT8r+FfMb7zIr8eP+b
OcPNp6F4kqt/b8gae/9JOIopCuWXpu5kDe0U5aC2qmvMuYbNI88aUx34i3WHd8NWKNbdtGDaQ8nM
iyuSX4j7EgwTOuBR/iFM7rZAATM59ZFv+9wRq8hbXVvfsBp13upya8YovLN1O9OWrzxUWym9ZPN1
mDhMT1YgOqVRaJ2ADyjP98UghsOXt6ybu9jGeEndP5T4mZjxZp82OMxqqS6VolaMbGRNPa271n87
65g6Q9l7RYtOL1PjdBOlgNpUdYZwxJ2EGgI1wPnrnuUiZ7sdhpuFkhJDdh2mHYlIUZHAsriLKEHR
XOdtU+Desuf1ojV6OryxMP052nRo3DfSj5+dKgSFWVXGLiS4Q5dQxDHIvUugnqZqf+FK5inrMME5
1eHWMPkrqY3H9syJMZ7RM9SwYc/zjL9fOqr9mE+npGx50NODLrgb0FydLIXRotOtI+YSbZHKzsKt
xoZNcJJ4GasWF69GNvRenQ3kp1eh71xjJw5a0KZmhsJJXThZLqSzb/sTisTU8jCaMh6S6ag0knK7
jonbXo+dctsmQfLpvLXHN4TNqJnY6alIH0HnsTz7EklgiqvaLbFn+25uUJSNDHESZG2BaAtNvG/4
WuvQCSLWeuJpsrPd+06Bzmmnlvn9InJZhGDVhnZlfj7Kh2PolkMjpLgzqH4f9hm/7zH7o7msjyvZ
Rj/JnTghr2ou7m5Ayp5K+yFEUt/y9WWmqXlKOpf12P8RITbx8ILm1kWRqB8L+xfF1r2HXt+av43O
pyKFj4Kq1FZckfpg2It+beWX2P825O6hDubEjA2RyF/zyyc3lMSS7vtAQMEOEJnWNslP5r0po6TK
F5+Ikch7kOxVShNh4LWWzwFtJb9SBv0iFIezeCGrgApE2blMwedVwOdpPdPvsQjNRYc8YG+dStcY
JUIrNMdc6m5qSEWO36XNGXLN/ZrjKkZcCr+z5oN8Oa4cO8jxqZo5bZDRVUh4VXM8a+hHCiVvWsEG
HkxV52NFazh7Duhb2Ix5qYigebEWfDnA3frHeY+lRAIE3+X/YoDjgbPuOqgwawkAvhSCeNbNxuTS
T9ZzmE8PWRbDowhElwhdboesSdX9tyyp7yCSM6fxKFXbUrPplwsSNsMYsJJ9grw0leD0bx4Cd0Vy
Y8dDayiLLROqmsdsKe7b4i2o6u8A0RQrPB31DrVO/yPiNygxChVesembc822gDnOAlf6FO502nEU
ItbE4EyM6ZuRk+69RSoT+2AZGRndh55WMQYb6i7ALzZeSttxOh6V+LV5SNYYdeQouPNdd+N45DZn
niJzd/11g0AFDHSZFxMK9p0VsOmXbAPFEjcTvMS7PiMwhUsav6ZfZjkVwz4X9s1v8DCZpNbKSq88
kGJQIcZYRdAPuD7V1zvdo0Zf6leEwpYg5lACMpJ8rGWyLPBrYD/CsWB0THjSjjkRntpZXUTF5Sq1
IPSYaQtCSAHZKO95giPeqw3zw2XQ5ci2o+t0eS1YvmSPlvMfZRnkdx98t2mA8ABd64gljY5f+0O0
px5Pec1R5VTiPNgghdEJlgrPqQxSP7vDXo0dtJmtqeP90QCRgaOqEt27wpqzv0KFUth0XwtaJeQ5
dejR/hEOliBmBscgJkx0gBF/nLybnTcQ6xwwOe25uqhvJIiepSDJE4ICrD/MSurrVfozreQGinSL
a/tMurSZF67eavaP5tFe2G44AmkmV4WBRnOeWOW2dJ2Q1sYHMUzfnWjdSw1sJJu6+Y0fUowVqq0Q
K2lcfV1v+sdb0adNWmXRoPrjCpXnMpWUyUXWCaY8r49ipi+4TCdxE4p/IUZfO1aumt4+xQcBT0dh
t1WR18HGPmHp719a+JPxfWkOQjw5JnEukkqxKV6fqJPDzGrHDJvrkNy1tkX0MN6Z+Olw//0xoyyG
9SEwAH72HyUlbfM2lhwM9N6f4cr+CLxPF2At8ppy84kKN/H+2RDt520oTXKCcGFU/txd8LdCs9qG
3diwadeKrfsinlzq/W+3PUAPHvjHcwRyRb4m4Wv6J0kW7ItY1ox7z91NbPGA481MOKLtCEwm6vuk
sfLsMi7+T/Hm+qsOXlQ9i8Pf9VAE9LWS2byZEwPIYDYtbLm2L09NRsMgfm6PotDA/9WaPtrx/CrM
IMllkwsRz86jBnsfx1s6w2v/gxQFWv0fY8mf1WywsWC+WArpCmvfHO0WMIJtyS/B+XcdiLdfrrJ3
qeRMJy8lhDn9mvRTVYzLXtu6Fv98eAxRiP4hPmT4+kxhTz4CT4cDPP9YKhdzODoL28xWfAYFbD04
Z7nP2BAp3o1FR08u/ctwg8oxDjcRwHkmDHquzKrPjnQBKXv9IMSCNsR7asFA/JqdhHcmuKZg6PRk
6XzKLzz1/Zs3XVZ/rpAcA4yoz12/yPHmsazO+a6cgbZy7JTSwRBhRd31L/KB4M7WXzNJ4paZAsOI
O5FWmQpp6eEyGGXpKkGy2qdqVRuRe0IjzwDJG6clerafsgCAj755Q2eTRVVvvRQw+G+hVjqaFu/+
m9KSJt+0hjHW1BHC4wyHN94ORPERUFukKcxOq8a3C4r5hTOZW3XWq1v7Ks4H7Zwi4AlNCGUKQ0ON
VSZKVFl61F+tBDQk+IqFz1WMfzhOfRJYfalfeqp5HOOIaK9cOhXG2oYdhceL4LDJlhJPAqpAc23Z
G9mCLMh7l3PvdGUWIx2s5Z4EpUsaxWTxxqD4a+cGuaZLzeV55zSCZ5qehwrwRTYvoBZE1+lOXnfi
Ryt8wko4y/GJZL/NuHI8l8tJKmVjS+XqWIN5sWUs9WMNit0HB/gZfmTuuvpwP7gjFuUjS2Q+jgYC
9ppF022c89tfs59OKVOjOQ9s2b2FlXyn4zn9AXI7AYGal0MNPRsQwnnaZJiTebyHcwtZucfEnh6z
9K9skBFs29qlMPNYsFP7y8mzdNhDng3TEgYpao3SPfXwDj/CSw/ObVggf8enRTUNlDfJ+17WwDyO
/ajc27MzTRLyBCCQhUYvMn80lvwSHxWDIL3xKvr2OLMoIAmgIZJG3sJMyhsOPqFxVb1Qk7NcojOn
D11t84xem8WyHJRbm0pbKV40U5U40scS0H5bcMWTEfGT4W0Mt47O181hbfymq/ykV0yIpouFyaDb
tUvUtKWqMknlkUxdllrfasNUWgJUfn8Cl8EV1Z3U5ABYiUNuRr5oKcdwlS7eB/n+UgV71hPGXiii
tFKvLiZLXS9l/eoEDDKLm6/8OksoHEEFzRFIR8skagCp4rd4fSGbOUietH2v8ecJdTlXFP0ex7TX
vh51q5DGduPDyv5nJCNInuPVn9Z9r55S/RGw+ySGAcaPEqaldHWakl5LrzE1/zI4K707/QMAGDAl
HQdn4RCGxESdD4HJn35p8o9hnYl7WqaHBddVyszwX//kjQ4qJolh4qp+txlSxnSJmCs83a+aCvMk
IbAnKPRH3SP74XCHOQ3bziFlRO0Q1JWSUp+e9CxVX0iTOPbgrB+wD9yT1o6m+o45pOEi4yqt1ZwB
6GRU83LP6o8j9UURxZDZ5WMgpNs4xuaPxAt+XstW7JOy51tYRnIykokiQYYg+aWP02kEZ7KL2cif
/t3AkMcRC0iKXbo3c1/h2uNlHbvkqXBOZnmGMzMriXwdE44Vt7izgW2oY3N5IFwqNHPtWi9SS6yA
hcD+oqiZ5YnDx8Be3R5HxKPygh4K5ePLmLR6um0pz3P8seQq1RKFP9ctf/u1v+7BlNqcdEez0X0N
I4X1lXx9dw1MpdfXfG2riDistMNSEH4Rrccb4Y/8cnRL9fh3mO987Fb0uI03HcxJiExzcwHZ9dco
s3vvxZTsaIGr2xmmD+LsMSI00fJFv0/mbMB3LLQfURbbNvuYtBK+fA8U8TOqSRvPYwXdCjv80svZ
ecFEkHhpXJBNTWSfUIzupFvHeVSIxo1FYZEy4sS3rdwokvKAiZK3rnzY+Ryed1c8On/UbN07w7X6
m6hS6lOKjYh+wxgHNswvu8N4sknoUX7Hwp9LBuU8+T0Ca/tOrCkICtK8kD5WkMmpO6IWAXUjK4Z8
/OmRAfzuhQeScqBIQTMuw2IkQruwSdfY/2ev76Y8v5xSi/gzcXVjJ6pNWe8NhZ5pL8vuon9u8D9v
ac2sfrz5UyHorqRAvNxS0nxaWXiYHYmk54FYhWXq/l06uTApLWRBji257/fX7WCJ6JtNeLLcAFYG
ui6Qlw2u4ilhoM33Ba9OQD+hKXM93Ab35owHIBR48oqnZlu/gRs9B7w/mQ9P7Aq6DwyYiEy7zN6P
zIrKF6PEXI2oo5vRRDZlhHjnxlG1qbQvhZImGO8R1X3muvsJ0Z9NyHew0PCSz7i9mW6rY2m1FJBl
jLOuJd9a+SClV8HYSGnNlxIsBxxS4kdb8pJAiZyO1GsyFurgT9epWWxp6MeSTru98ZQ2HxuKRPAh
LAyFLPqo+UCcwRFhd6SEMQhkLktq/u+ZRteg3JfitjOD93M8XsrOOZXAvc8OK94NqeYOeOIYfeiA
Bh8AZZCTK3Xt4QLtJ2oyW6gLSK/gyvC1P9wVOFLK0VxRCj7UL1ENqTGIylLsQV1EDrxvDeHgkr8n
+celZ0eo5oJZQc+yNrl6D8RLDaFfOndjQQuP1VMMLt/r+SCqzoIQpeaPzjqcZ5F2tDjq3vLL3JlK
L72Oet2zPrANXugoDIB6V4zLM77QJB3ICXMRSw3lLKHdoVR1fOZjH7lh6OFJTtre6FJuHv34LR+w
Sc62m9Wix3fNqnF2+9Qp1crzn4iR45vHd5J/GET/E8MKd44F0qOzeLFE7zgwf2+Iy6YZU0LJ7OWe
z0OlZFdrPEAemSaXyLI3Wg2c7W5Ef4UaJISjZfXU+aX/CFAP3KV58g4cgEfSs9fw8iuCFLuLh3Jh
GZg50idBZAseo6HiW0jDA4Nn9S03k0B9v1GqmSWPhP3YhzM/EK26PGYcgF0eivassZQFQSrc6Jil
NsS91pv/HNapigSr2eVnB1wDsPbMOeAWMefmfTJEy770FLL4nJvHH23BcLXTk4vQBAncc/ypOm8W
7K8vIx4OeBmtzlz+HHoN+Ki6SGNYfqwhxJ3Iclxi79j84bg6FlZ/sJmHW3B/BcC+MY8FKzU6WOYl
4ii86/wI6/Ymwxsc/fLpXuJgVnj1G6seQpKpHtSA/+fDWnvd7+23DNdK6HfBGZ+9h1HUSEREwoXj
99Lau/2+L3cctWkmre/U6dbCrUJx+9esOM4lxm0AgWGdwsmiTdhQhm1GO9efcz3nod2wuyLOoRFB
PRHCoU9xUQeiUOHk4A7KAbqWNnKmpYJRUFtQ3lyKzD1zt5ChuiYS+1trXUf0emVBc0RXJeOJM+oy
pdYUCtO7HboKltA1VXkzyJrTAnuRxZ1FiBt3NN7AswsisLqFyQAuddvPGzztWsE/T1mimJzTQK+f
f/Lv/B2HA5evVFXQh51vSrY2ub6y7UStyV1sLz4hRJqfnfYYtn4qKe+hiDORa9CUQSPNnR1nNwVS
OkQkOe7FGwVo2tF2pgxsVaObzuNgR5W00kvbG+HZrYc/VlQXu17CoYAXyKuimeuQUX6IOYQfOtOi
P/656J+ayneD3DdaM4CAxyapYpzyxTtzYw3d3BmLALR36ZccU/VhfYiHYcCtxg9XbjQuCmn0V9tm
VhQXJGWmHnrfgcSUohqw+023UH3zssHKe3HoXWtNxZuFWTm8uBN+FQJWwZg5o1SnFllNmOyhtpJN
XO8SRcSR9ghUC2PkIXtJSv9s4l9Gp1a1m77LFh4HZa3el3/C2W/EGR0B7R2Pzy8Y8kQnfhLd33aj
x06UIZTX/x5oFzGlrD7CuvF5JKo9vOIxzToHh5kdoOD6zjUKUGJYQquc/mE0DMReySwBHVcUIpLT
P0tPzMBnO/rCSMnc9ks+pckz6Kip2rnVsPX+HfAom3uAkz3m42JwY6b/bHCDef0RK/3WUac0dSKM
kEYtrhwBrDcHu2UrE9D4N3TPQpPhltMcgA3rCnJNzhStxgWfSGcSOX489GY3JX51jrPQ4KLwg3Te
uHo9coFgA7zxBD435Ek9ZfJZAcIO0Zt7s2uZwvFyTVmPWSIEW6daOf4f0gxbKYxTM8WdybNJXju9
AuBEu/AVDZ4+JGpSkGoI5khnH625YEMjmDdM7yC1jJKKFINwCI4JiWEAl64hmuHGoqBCRVIgMBYp
hCwZyPZsI1RVFT2dRHGrlaHOioCJ4s9qfl+jXm7NnHKSvxNcZuT+Ubv1PiLUCoGFG+sBAEE7OLIx
156yyQxHYKvnmGVKdSv1JDcqFOBTX70OTB59UidJY5m6HfaEtJa2TRtYd9dfiLW4T+bJCNByHVNJ
BP5PQ906S6hbtLHGTio7Jc/IK25r925Vil9Q71uHrIoeIOuJxTU2THyuDb8th3jMJAWZ28arIcD1
7zvWma3Osergrj5anOk44hmyfHWNmtZzWfjZ8g2mz5sCZf2xhx1wqFFUm2rP++JnqWZWqJpie9P/
FaUflE91AeT0nPFGzJobKS7vxP3YCIxqDXb4W+GNrbrMzqJv62IjXU/5VT55UrYBObNBKr5pNuPp
nl5/A4Sckp8yUP4cXgns9z450Dg8dC2rJeiALt5KoIAI0mqVyz6dmncs3964qm5zvqkhfspebtxv
+/5/HLRk1pKJC/0BEIG3U8PblJ4S3qWAR1ocDE72mQpK1S8J2OpVtmNPWqj+Q8XxAKeFhxNgDseh
3Ys+1h4JfwdhkuL1WuvUWRmr43qJQgrAU1dsla9XqNHMblQy5XDeZddFiARAWW3wQ5mQedn8mA5U
VcD6AFj0+myr/qmfSW0WZomoAlWRHZR8ww60cUN+wUjqZnXcQrMta/v0wrgmsv3Gm8XyHnb593L7
eG4J4D9wit4Xzo8ICB6DhsQ+QOfSpMQ+Uks7P55CB0dzcg3FIehDZWZfWj4jNvAY1gUscTVyYm20
ltt13qwaUWOMqO2BXOxzc3jQ7Wi51nA9iG29RjBhvOs8SIEWaroBNDKCGcQ3HvQk5wLRSMiGq6If
A/12iSm/sYD052pbIGYML2/C6RhJW3M52SyyIXliJtXn3B/si0AgHYfzqT0vXPlxQANLqtU76Uyl
JwP32T30MRjAm6qMdCDKPfadIidlWtpiNS/lxnet2Fgcu2RTx9pSlm5DVmFbm0VH38okdGyJDSIF
p+FEprQ9eDPqoUzNbjd4QlY9bph/Q/CVR7m8dBAbCFdT7pbH6Wdwk7LdzgRhdtDP9jIsKTNNte1q
GMvooCehfU4GiCw5Aa6s4ZZbQSVYuhRYgOHzovGzq1+5wOo7N2JA8vlRYSwwjVyUb2rqq7iWsbg+
JuJapgIlHZCoOngniStpVBvML3CdjisUnPZs7sdb7aLtZRCI8TsyQed5VNTTOv4NXqNYWssW/xWq
6f3VNQFk/gh7GyMyJ3d38QobBhLCLY4hmDK8JEZCWxIL9DN0kaLLviNG2wWKwZL2cD0vxQK+D5M6
PEIAaggXEQmwA138Km55S7ojd/DGbrMb9D+Sj/6WEvXGOXlRpGpFQu+ha0Zx9dB76EhCiH5bYq8w
bqILWA9l62keHeCH4BpTHJg8hCuBw91g8KmUfdeZqhZBGmg+jggKMotw4SoSSGVLhK21Ezgu6kSH
xJ58XYzSKRTRJwiPKrAW/4WoTYupBxtoBdz+SqQ84ip6iqZT0q/H92SSDYacziEwJ3uB05PxUTio
eQqXesLnKDT7FS0PXWpbQ6ZqpzZuwWNroQXXNu1J8npgWoFeQMl5AlAUYOaByxJ9IkIGyYOKvYWA
OgomT6uFDSlbXupq1moQTu5MMxn/ZMWnYIjBUqki5h/yxrMoUH85oCigWxdSG6HkE/Dlp5CORbr6
gSgkUnNa61GlwM8WyTdTAlnPRGGVdb1X4S8CEW5ZGHUyn/oCYY1HKlwtLQyyQeVplakXQCvrJ6kQ
Bg4uyIJgb9c+RoZytzND3ph+muOAgedD8oFvvTx3sNPkT//7bqD5QROXfB/CNgx/tsm0OEgPUtyx
ftKJXDzA7GJhHQNybc4wtemLWBnKgjvyPxxbdEyRdD4wobPkbKzOOTeAMstEFoqr0Y8H7QhkUQam
2jDhUkqJ284W1O4H/XuuB/Vl/qvyU9hoJQcPCgaBGFdq4QRDbpDlmpqlxXrXaHZlgWffJAnQn8Fv
sk4H4Ea0/WjIO8ifNl6SfybYK/5oIAIgUi2Nk8KE1m8gnJUPMXSYWsAeYkR6ybc3C9yJj6NzwSUW
CqJJugNELmiv6J9VPA9PaGQ64c+3pm+cpyDNDHQ1vY1qvj3nEgqx5n0Y39nCsQImiPV/Sg9yh2Bk
HQ4ZMwhLI+nFwK0OZ/zkh4odiDsOBE3M+kMnlZ5BJmXK2t+A59T7AvwpyVEVogCrqtbogq7EyP2R
/KoZIKfyE5vXtjndlUyZjAiNgpjTc1VakSJb07v4Jnou0T2uuBBVLBE8e5fRknL4orW7nwiNGR3A
FjSKy2+CMPD486jawdbxAbwfChXyeCLhOttQScZ5/UuJXKibAEIiWMO0zwi6h0787UrxLIJuioc4
nULkOdY/JKeviefRwjlnZY4q5i8h1F/oMT/HYeWGqrroYovXKcnUxbMWZD+jaopXwpKIKwV/u7gL
ICCVqIDSf8Gom4lbOw1ZcRZKLSyvneRHTfAaqVZivhe1m/wTbLuvizyo5v0fH7nNqAzAgtH7oirl
O09aUTNKpDm720Ay5sPItAEz0pFiZQIRDfWGCHCuuGaXZG0xuyl8ShQxJz/9BEeMVCPhZnOaNv8X
bNe0t7omyZMkSFNPR4U3evzcLjcuK7VEZZdMkX6tka5B3C4bRACtFyOeQCt79Xrriwjp3eDw8Yxl
i4ZnF2nnIzXhArnO3TFIuhZXD15yn9vVT16wMxV0rkzQ2P+1+g1u7aeDNwRT2xaUvdsFLGr61RsA
krrBB/uXlnDPWrMSIoSOLSTC16X9VfDFq7XtK2uA0BmKK5FJeWOI1ArralXwFlj8KdxJ0L25ro4p
IZhykME1I9BoKS3TjfbTDmfX1WVooDH5YBhsp3fnJjyZm0vZ9V7nsz7eC/en9E7r62uh+MrQsnxQ
HEOfnD5I5vsCo4FmTwA6lhGbUO5+59ZQ6busQ3Da/4/gKfWPi7Rx+7Y3AL2HiXlvnKxN32bezNjp
dYjFYXVPdjaFpz0GrP3APSdp3La8UFzXbVhLuwuv0mDPBPScpRdDo2G0X7gso054AFVY6n9p8tdd
5zYfJhmIvj/NqUn/wjbA1Ptn5IjIafceDKqCWE+o9brGUJBbmYQvsYtD4pa83lH8uoKqIULDiSXg
6yxJwmM59viy5qkaOJYrzsWg3wlO+PCkAvqg5HpLKFZUsQIYlmnRFiU2siCw5xh8Lv91KTWQE26H
JygYAC9Di3Fuj9L52dCNMgbtOCerVWI4RqUpIFnC+F3fY0d0urDChvfCB4v5ZfmHK7UQWuUl5DRA
Ncjw2/e3pwmVbyls0YUVrzdizPbhlKDJX7xzvC4K10nrAjnG++RxySdAOFZXubgPzTr62JQtSXmW
IIqO1vKeYP7Zb22j7YH/bXfT/F5cufY3ai23D7tEwC0XTRPsjTnkyjrFZDKy7H4jtCHGqFDihiKn
lzcjRj0nxDEydN0T3XZVLw1ckchidFI80LIRUz5/80zPxLB32RudBu90cckCuB1n8lnmLPij/zE+
aucm3Kwj0LLI/ESxyT4RR0eJrEyPbq9hWnKrwAbHzhPaF+fffQmkrsUci95u/+x5LJP6G4/zY5ZU
42fBuiz8uxbweZF5KyivG516l+EjFp1oi1B96wKupMTLWNO5UC4Axpffk4EKZEEns0gYRwpJIJRE
k8wuG63EMGWNSCTG/RO5z9NxoZktD7g60co/R42CBfts1WLyi+ow7jHsNlPv2xDWQd26f9hJIG0e
TVk9W8+8PqEnJMnsgKAfDu8qnlNGOsOHkqE+0aqrtum7PjdweTcx62yaHJffKPA9+xi5XkwSw90Q
gvLoWjJpXh3ptwi4hIt+bp5SLcz1MgCE3s+B9GMkZp6eji4CZRJ4Y8HsDzXziQLOBcJQbavNtaQc
TKFoacbgnSmdbaLo6XIalSOZIEQbh87hhxV6K+UWL1flpVWVAsJlAajEXmi7Y1H97PKK4PzSN+fr
yJifROBUNzCVFwmnra+Zipb4E5Lcxyic9aLP4yppTbb/i3T4qOrnXLKwuSrhJXSCcTyIRNfCOFlv
XN7teOJs72V0dh9L2Cz+VbtkRX0l6NYasCjX5gO0C9MmgYx+KYUX4dFrpHbbUVI/aeFPSRXeqpDp
Bj9ql3XKb0y+qM3C+ISe74cIUmyZPAsxtspP4l5ZqJ+0B83nubj14d/NJVghYmn7MX91fvjVASmN
lHcGwVvjoBHip3wjmlEjH6SoXc9kZSi06Y86jAP1G1cetsxKKdscQvvIUgoMDbTIh6hwcJVeWzdL
FeU4QV/2aGp2kibI09y/XFAZ2mNG6KrztPsjXWq3ds8FwxjebgVCba+YBkr11MEoN8SQGoQunHoR
wD0amqgzGzavEsdYCJ8t2cCLE6pF55bmrf4hm3BUaEi+H93IC5sJ2FrXcBTJB34BRd3BWFA4sQn8
EHoI6sWL/HNvZS+gmk9tJxOpZdOlBmBvL7QUxs9O7HcdiJgqyWSO2WiYWifPywrmOTezB/3RbwAO
kCUo352IbRcj3TrkIOubd3/438v4D7Ft3DhuapnoCgB3AiCh5BOxLotQ9OLv93+EDKzj/zShPRlD
D59DjxgDs4Iu+g15WT/OKtcR3zlU4vfTWVU8Pr0Rrd9q336s3AfGKPsXXriQ6NZ9n9r5uEGts4dA
CYsfvUEE6TTkT7HDGNd88HhGc9mYTrvIYqnxNJ2Dfxdy3D6py5NGKwO6Z/oHkj6jB0bWGX/iwhbN
OZ8Kc2Y/JJdWFNMlOGHs+2mgWXt6E5z02EvayLNFqqXbzAWxSJ4gVWUkRW1w4X6kYXnUfn/uK9T8
fyhoOAFAK7KnWzDARKpQjPRv4cyZKWEU8ND2VGBYHHhelKiwkDMuKr8qCOHoiTY9LsSSTJ0y3Om5
zPbN4R4hd7Ki1teS5VRo9DgtjemIkmKBmt9AVyH8O7supJ4F7fWQI9zIGnoUPi2/DYYul6u+5iWT
Nnlokkjfdc4WCCICsJu4zYJ/8oFwpYBTtAunbPpcyXF/jj8BGbtrurRFhOc9OHpTS5riE7CjTD41
SMNvyBkzXhdBL7s9fFTUr2SwP/m/pdiYt1Y8+cPm/1EIyP5d5UbuPMKsZl3LDwWXCMnKi/h3PD2z
CGJbKmdAx1uch5biRyNx6w3CCPCangeKeYwHKLHU3QjsWtCBfoAkwR+YArHSuJu8Xvtd34qhtsiL
s3yC9fez7iMXGfqasfXLzwl/T1pnQLZ2q5XYcSmbjHxP/9A27xwKycajveYOqzAvM3CRfiZE8eY6
nI0NQlJ53WwU2oTg26Z6QRQe3XHyzBwou5E1nBjHU2cxdKlVp9DtJEqKHiY19jXJ15FW+qthh9G3
7MbDqD0hJC4kwh8UFZkjzWYM6JzvLGwdsQBfme8bOryRIVZ67tt4bFVVLM9FXD4pW0GJ6ORp8Tdi
4nJ6S3aD+mYkO9ofUAzhp1lc820p3nSEDgqvhWKK+V8arvQArAOVqlMsfcrxjTAftF+gupUsk4Uu
x+TuA+NA2OPMbOvrKHF/9q/bRDZFWAK1pqkR/ayn+Hr9aqdjxKLKLgWR5GJILTb6RvYPQ7C4/P9u
ORGmHF3yzCa8y0jOFH93CrTEfxSjBF0EiTlKkF8k/2JU0TKPm5zvg6slp2L/EEy0ydkfd2uVivJM
qWFaC71OR8sCvnHywV9Rqc/3Z5M2hIVDYOyota7W0D+EpXlGCDVDQTpNeGWmOLMqNfWr9mWdkNpv
GYuGydcdMKsPCIlXc1LGOaspNv21aHliav8RjakyVwcswmUhf4ZBHyByl3pyxgpm9fvfdXUC4KzO
tu4VTi7sGKg3DdJhVLw6k/2u2icZUQJBG06UWsOYro6lLEAa68zHBoXCTBDX1LdBbB0EpvjZGyiV
uRE+GXFmHrA/q8FCObD20V/4gXKXk96VrBgMlOCPfO4TJLu2BNdhasrxouG2R9Tf4ha3DpYB5Wuc
u0SGgldtDs6NlsmbqCFk10eYfWxWmYr7FmwhHlxzl9F8T97rG2QylnqUtYMDx5M9tA9+oLYxWA8y
A61+YQeWWM79SjgKWslaAG554is4whtWWKHUsHr1n7NYjd26Xge/QVwVvSQh2RwbfymuNEN/70nO
f5l1YSAhk1y/G3FFQ3eccWGONkdgA9dS9HZQR7SD++bYaL7Y31aVlOxtswK1jcHpFCTFWeChLhpk
DhoqBem38sM9At8UHDlWF7FnNAdhktmFUDxRIqNrYrFlhR5Ay5crXOKjDrTyb8zQYmAalRw+P3dt
9fkWxL2T6HAMYBjUAvwxPOx3FXGcW7dkxacjYVhZ47bVwupVqkgXiYkIDfmm9tjzFNPCQnIDtgPR
22s3BLR4rzfdd1W6ClCfGZ33+Lcvtdd9Ki+ToBL4StuX9+m9nY0eq/rislQWncvUWRVJfHsBK+JW
b3dfPRlF4ThV5RejfaAqeMycTNOLFrA8X+xl3fZkznaeVNrgkR4kwoDX2c2Y4oUWRxg5an9f6XME
h5UtbZe1NWmkPyew4JFdfnNc+OItFmUqcl4XQxzLtu/yeQzsZyPgKfKbrZliJk7r5SqcKVjI+1/u
BssgQeOwTpFRPsa2skTlRCvfxpFwBXYQOkncuApZXm3H9ImD8i99TkdhAZ8NWgiMGx7rV2J3CCI5
HsIp3c31R1wqeIc8490LHA9lTaqll7qbFAsnlPCl3H4sik7s8zflMICkU+efqDw7eZ8f6rqVVVmh
MVUYBnN97fby00WKxxnfX/5ZjKDrN6aiFvfS8tCxuEgaYRk9kmkIXugVN6NzveA3HqSOhYMhKGKe
JFqOwIO7XaEuFPVFmRdwDreq6VIIsQvspti8FGzLp515iW3yBgfqUPz9yQyIEyzKSjfIuGcnc+Nl
53FjdgfO8sHjhl27ZrqtLlZXmHNt1QTIbla6eWi4A+ANmMq1Y82B1nJa/3DKWjO8O8ikeS55lE9/
rBW33a5rSwc91N8sK9MH9ltCWqCHzi9hh4nLPXYs0p63Ba1BX2BTEdHAMiV/ok7Gk3mE/xrbysXB
OsHxm/PTXLq1Oruj9e0Flq22LadcL1O/ORC4JSBOiiuM9gr4TqV/gDQtqKIIrYkM54hiOOsqqolt
2A0D6WDStP4Izq+kNwgo0WAOXA+JYOGHTHHRtkjSjMynoG6G7DtSNojNuPwXQEGyf2gtzfNWlyT2
XjOd44j92KD+xypnrDyiuuF5/HDY/EZqe/gEX7eB0n+d8POCNdlF0wY1m7sTcWRKbBWi+C4uj5nC
B0jFvqs+NEuIq0GN2tFo+Ec5OXuEP6EMYQGl1ODp7STVcqPqpma0n1YREle+zk8moNQW89cr0XwL
fAAaYcVNtR8pt2SOPnBu1ud25wfn1rf7gqp26RjKDz3HUT95C5RC584NThsfxQKdq5N1R+TRBfbA
LnMrcp9/gs2ZbcUq1Csl0IU5KbrWEzyG2Jkhrv1u0ZtToppSSSL0i8x5a5XjjkFQH6v5b2FdX7IJ
vboF3oVcuM4hjOKvru6TxveJKkRXAKn3T85gpZ6tqn9lWwIB3/VBbRBTulbAycK2aXgR41wbOmXg
QNMq39AVJRBU+wOnxXZr7+37NKgMNnKWvvc09ArGGJLv+Z8L4TP45esWft8psoczuZxBQjOBePHz
HnfM9/zkXAix763TqxsfjxCJJO/wC44vt7vQdUsZyVRYVoOgvnWad7bYV0tAORl3NjzUYDu/7Obu
WqBkovNas0ezzlTAzKuzlo5uxBonTn05kRcFsil3TfNLmAyO1pvn7UxNpbytHH9aAgi8kx5iyHjI
icVFxq6wt3jZ68/S36AKm2Naq1kZva+2TmU9hiSPQVVKpE2EnC2j51C+g2m9/apvF9lg1PQG/Omn
0IjWfrKAvR5i1MY4FRtksBpFRmm6vTYYcgXQohY4UYylbtw4v0ehzx2zWObmMXQkKwMRPi4tmoh+
q3pjDIws47VK8TWzDXuBY0GVQ0cty4xAUtzKd+NMYMqlzZxnAFEpu6jhaQq6w1LzfqWZnbl+1Ext
1NJJzOnKdPXbHlTD1DVoKPiK/9lF6jsvBmrphNXTr5s5JCLeqR0pENXQjtbZJZg8NpqEJzpiEEPC
MgiDFdPFY617TuVFl7NyyUehhnBo58hv4nU58I05y3YgWZ9eB7j2Pa2tlFhqo2b0bV3Wu38WzmBg
wJMu3+aKl2WkH9KRNkmt3gjDQSDG05gGaXl/6YKShvF8dfZ1sKiXXldXHqPH3Mk9TovBoyQdLGFK
HW4NxnjJDBIar/Qq9w8/gIlFAfiM1EG3D7XH7YhK+8OVXS0edGuuj2qsHaOAdp4HX4qWum5KqRvF
vYpmT1YLBHzUJ+tE/5oZUkk9cVP1/KO44APxW6dKTmbGj5HlMhR/DdeK+cRGlMAjFo9BcDdL2k+j
OaREG08x4yWQ/7Z94F/jlNUQeZiO+ccDNPVjmqNk+k3t5xtANrk8PesyWIs6/kziY/mEC9ozlx4a
J23X7ajw1HBSchZGBr0STwWoLZSz8yY3wfaqmO6j3ofzFeT778MV5efqiZKdOJqNjvQjOqEBpS1O
gRPjdQN14G+vee50c7cOmWF8rpUErCEJbtRotTUsZ1zewOs6b1ALGrpT8dZ7zi/2SWKsmn+AvAKN
4PzVI+0fJEqfYc9vuaTwPNb6o6rFvfbpGw5MOBCYUZ9XqywtiyzSlRNbECgj59v3X8GN2OOZmElV
V87n29XnqTND0Rb3EprztQeoMLMHFSKVPMkPzbdyOPMsDU2rr+tkD/sHPQpIDze3cIoQiT9PRrQF
35sD0nRiWngPOc4VxIJE9h2ITen07Rn1PQy31vcOVn0HCYBHpZa2fiJ4lU1YRVzyVZfuGDldE0tA
skEDnkOA3QtsbofmeNZIG8H5jD4vdXW+tk1Gb7facgTCLt2aL5K/zXEQ348EZTSFTgIxNeSi0JJS
6jGYW4/Ye3FLPeUuy+ZrFF8+ZAy8lp5WaiFO6xYQrRrR2K1Qu6faPBUD+RQSF9rtKHwSwLZyFOYW
A+VYQUUyNadoSx8tx9Ll4d9XBdOoDxHEgHd4nQ+N/GnZpOlxmoTK2U4z2TRFQdUJpFLAje2x7Zhy
/tyEc0VZ721GQ7VdIjevzlyYrZla2Mol3eELzY1wJrFGa/22gh5HN6pPvoMAUg/qLk46b5E6CrIE
VLetU/uLZZf1MMviF+iyKXWtJol1MUbHOVUGFrUb64eYirmuP5WylzxyRZs9lL7y1Uj9xeBJW13F
CnSMn9Z9szQVCtYNzdvgJN0h9C2zF60bGErQO9IVjG6ZajTfZttjNP3gB/dUunKBtjPwd6CSQDF5
9MRc9x2CAQkWj9oiFFZLLykegY2erht7tHrduDP6OUvsxynJNUOlhJb74k4Zha5aTl7appcs527a
IpIy+01oKZ7bpLDDvRDpT8aooRVVg/63KQWJpg/ZjfE+i2dpeaOlVHUcXr3WFkQuT62enDNFs6kr
m7TpDBlr4U3x0IRGnE2zburjcZJ5w/MLyt9d+Pc=
`protect end_protected
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
iisr0ydwFOm3eepmhOYSaxO3flYpViRsLN97vKyw+ai+x1TubmaH8qRRwK/QFeVsjlGTFdxookcr
olQwv0bmdw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
dJvTzz+PoD3n2Ot9SgKfpEhIshJxklhDhS1tYcrcmprfs5wN+lN+5Y+o9jEEql61IqDkJEIGu0xp
zaDWEeMqwkFuovmZnp/AnbrHb7R/19zPRtwSyZ8+VQRLsRMgscwutXu29fTUST6Ribitutae85tQ
1okc5mYK0mcSMIggcMg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
ZijKIWnBSOuwn6R4ZrzJp1qaSPGZMrP8GTp+SV+Sn9xEivGxLJtGM40xMLXxiYuxIopDD/A1usG6
HkSoNT6OzxHJWKkUEyyVzrZuJdNHJ5q3s3y5LSNY7eMxN9lY4/gygh7aVIBAO9YWzsWu3HLtrHA5
2vsUFQxQdkG5OTLVP1rH68P4j/dhqr/LVHw+9H76c/knGyalpHLRC7tnHQcfuezFJWlkzaNGHfUo
b5cE1YTvtdlZVmw2sVG/GbXIRi5fq3+Okdy+JgckZ4dVWbI20rfa9LkI09/kwD3anyrnovVQVx9h
F0AxolVKVVyWNAaSu1fvXllqzrdJiRLbdnsq0Q==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
LUajPw/jRTLlmEKb+9YylQ2jxw4jlSx/1GGaY1wFfWFdMwK2p0xvQMjui8K3EqJF0fnb3QNWuQDl
1vTtf04vcOAHkfRCeW7Mbp8qeUTtAsflGIPJDxHfVU8ZKprwANsENc8LVrpJ0WnjDFQIzJw7LDqc
Jj2TofWjKprdxXsMnu4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
KG6kiSPrd66zvVpG96eKD+783ebVLVFNF7pXgq+rCyBBRoa0N9Hp3DIWK5125mkICodI82zuSq6k
C8aCiPbDiv4tiuIn19WDNNPL4ncknL0KLZTLAkq0BIQIsnFNRaZegM9aXOdMYGKYLpnjSD9KRWRt
WPXPZfwprSu2D7PeDZMiij3MY+cixttgVmNfcx9Kkmvg+1B5sTSDTVs3fqpJBBO1YslTmxyJAIC6
uDuGqvQ1138z6f4f+f8vMXratK1Ypo3jPPb4FTNLYJio5Vd1Nbpl9kRRtj801Ie0GGhbggK6IXJx
785o6wX6g3tRyoHXGJ4DGUmWlIHATg0KIAflYw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 13424)
`protect data_block
rEtV4Bm3SmvVbKq1runp2SaaO1GImraXNQnz2t97NClVhlTBGZ14v+hHArmsTHZNME/QWduIEcCL
I8GdWPb/f0NXI5m0D8vUM2MFHCnzTFi82f0pjwFGBVpM7cHKBa5QRX5K/e5A/9KwgbwYV1tKqTXG
aWyx6JRfuzQINO3rQqM+n/1b6LSLygDM1QuiPthpMFKV8IfsVkaLDVqcLxH9/n7C64aisv1xK+OH
WhYRETSZok8+gbvdGdr2+VsE64ALl3DavNBK4S7IOGP5YtXviHmw+Qb/lvl6m+RggRYmTe1A6B5r
pghgGDxK2gS0ItU55quFmZMEuEH+bwLuaJA0/UWR19oWnbcTZnsCqEeN/xbKUzS6blm1K6RPZtYe
WSGhjFl0cKHEQe9DfEazTm6tS9mJ55lLbSuwE5o03LDGRapxUdSR0IiKy5C5UP4genzVw3zearva
qPWmPeGZcAEyFioI2o4OWQP+8mFdbza1kBOuw4BP76P2c+ij6wbxXAWVxtNmL8f6AgS1AV5SqIO0
ftTCve0JloVh9kpHsbXE1TS45+y0IuiC0N3a8PAEsXa/tnLsnAydpsXIQwMLXmgKfoXKzabAHHdI
XZJd/NxD7+xY3aINMVaO5eSSLIdjkYZIeqm6qf+x2eNd9v2nue3I9rjHkjMBIty9wqDCI5HznV19
h0aPmdRn9t7Ft5xXq0GXqSl2I9ZROoM4hg3RU6TCVY4IaDkErgP5cMhIwuHsntmeWvsvkZFygQtU
9TUaf90O9HINFkrdIHf0ZCgtCgUw6ffQNPAkw/6MaoKxm9wdczGi3ur+eyRvSLy7+LQX/dOqvXKM
9UFNjkQk392HWfkT8aaXacuJgFT4hmoEXDGY+tSqQrQRrPmelj+ksf3PcI2r64RSTjiR+9HNqWqJ
jPJio2xgGdQdGrH+UewLz0ySmNDYmqxIdyqKfv/B1BYMUpGd+l0eRCp0RwjP6nt7MKkBishuJTL2
2kpCGDQ4HELrlovnj0dMihRpFZAIpY55DfNVE2hnbkHthyDrEXapmovyPqDFel+HKDdimVyeM8CR
DKl0D2+OZK8XWAiVk9Ve6w0rONvwf/XvaAkgxa3rDJQo/8g8oiGRq4ku5l3OZUKrPVRcjVNCxHRq
81RLF34Ztt0FyGvWgFBPXPwl/QfIQcetnIv8BBHDyYvjjUEJZxJ0yVIBqSipzmyIn34Kt0GvhgJJ
oXsivJz4IQp2WiLYnKzv7NuBWYnOF+M/H8eFTLS7ynV/b0CRf7qayeeaKYL0uv9mUeXbILs7F9+8
XkemV9ihHFfHS04009LEbIzG2O13pEZ78n4YAi47TmCv22T8/Ve6sSAGowqE6FfeksCmQ1+Z98YQ
uXIyCDvF0dlGJwZxogjNRbjyCBj6OOagNPhSW71GcVdRv5XSPoZsF68V4hWQeNb+itDo7ZPtZJoJ
YzLjFDCWp+2G5a8+OtWGetlJNejx9rEDOQvPXNhCi9xzzzSvIevRpnt9XX8uVwzzSJnKhI91LgRg
ID2cjEMis7S70eKGvR2/KBOhU/KAbsgGALtSpbd8HPFqo4CWuxEHCYImqvt7m+vI7jIEpXbwjtx8
QWNgKL8RNSViXrcj5CsXvOI28Nk2V+GZ8jr1/8I4R/Yns4Xfj1TTWzVeNCNHbazn1nufigCGV4Vl
qtDHRGZpM2GzgWRsMj5tsZldV3pp52C/Dpr/92KUqWKMf/mZbYDJL1X0X2Tw7iboFgBgx1miq+ht
zrLMfkmBPAPakC7uTHv8wdz7HICGyvCct17zvGp/b+9c5KI7lCBCd9jn5PTW35q5ksO4eC9R2AqE
0xJmD9GKB17q8Jk7vlAMs/IJV9rgMDnRfyFkOl4hl2S45SaIY1ObTSNIHJYg+rp/nN6BMaWKrR+7
O6t2IjDTrKFkfrU0cMF3G7EiQSf6RI1d8iyqNJLJJ3fbFhF7XLnn/CwlkZ/03Hwn1nJocabXwbc2
9Q6RrzrxLCWMZVoXaUEBQvapxENHsyZOrmSevUQnuCknCx9Eh/GwdP2bYVHxXWg7ySdjQnVMtR4v
qT7n0yJuHI0ite3a92Oo/MBdlgCwEcxfvgz0ILRIK4wFe098lGOX0tVEsLdEUijEAeQR38bksd9a
fuwZzPBvMZQ+FON4CQYrDg971r8Qz89ArQjVxWF7TdD0Oaq9vaUrLocNzIw9AcIy8rWaQnwTR/K0
PsXLapKx1fOSZnuztuMHoRXGaqZVlZJGs22/GiJA9y/IBflmF5GNFnRUbXVT8r+FfMb7zIr8eP+b
OcPNp6F4kqt/b8gae/9JOIopCuWXpu5kDe0U5aC2qmvMuYbNI88aUx34i3WHd8NWKNbdtGDaQ8nM
iyuSX4j7EgwTOuBR/iFM7rZAATM59ZFv+9wRq8hbXVvfsBp13upya8YovLN1O9OWrzxUWym9ZPN1
mDhMT1YgOqVRaJ2ADyjP98UghsOXt6ybu9jGeEndP5T4mZjxZp82OMxqqS6VolaMbGRNPa271n87
65g6Q9l7RYtOL1PjdBOlgNpUdYZwxJ2EGgI1wPnrnuUiZ7sdhpuFkhJDdh2mHYlIUZHAsriLKEHR
XOdtU+Desuf1ojV6OryxMP052nRo3DfSj5+dKgSFWVXGLiS4Q5dQxDHIvUugnqZqf+FK5inrMME5
1eHWMPkrqY3H9syJMZ7RM9SwYc/zjL9fOqr9mE+npGx50NODLrgb0FydLIXRotOtI+YSbZHKzsKt
xoZNcJJ4GasWF69GNvRenQ3kp1eh71xjJw5a0KZmhsJJXThZLqSzb/sTisTU8jCaMh6S6ag0knK7
jonbXo+dctsmQfLpvLXHN4TNqJnY6alIH0HnsTz7EklgiqvaLbFn+25uUJSNDHESZG2BaAtNvG/4
WuvQCSLWeuJpsrPd+06Bzmmnlvn9InJZhGDVhnZlfj7Kh2PolkMjpLgzqH4f9hm/7zH7o7msjyvZ
Rj/JnTghr2ou7m5Ayp5K+yFEUt/y9WWmqXlKOpf12P8RITbx8ILm1kWRqB8L+xfF1r2HXt+av43O
pyKFj4Kq1FZckfpg2It+beWX2P825O6hDubEjA2RyF/zyyc3lMSS7vtAQMEOEJnWNslP5r0po6TK
F5+Ikch7kOxVShNh4LWWzwFtJb9SBv0iFIezeCGrgApE2blMwedVwOdpPdPvsQjNRYc8YG+dStcY
JUIrNMdc6m5qSEWO36XNGXLN/ZrjKkZcCr+z5oN8Oa4cO8jxqZo5bZDRVUh4VXM8a+hHCiVvWsEG
HkxV52NFazh7Duhb2Ix5qYigebEWfDnA3frHeY+lRAIE3+X/YoDjgbPuOqgwawkAvhSCeNbNxuTS
T9ZzmE8PWRbDowhElwhdboesSdX9tyyp7yCSM6fxKFXbUrPplwsSNsMYsJJ9grw0leD0bx4Cd0Vy
Y8dDayiLLROqmsdsKe7b4i2o6u8A0RQrPB31DrVO/yPiNygxChVesembc822gDnOAlf6FO502nEU
ItbE4EyM6ZuRk+69RSoT+2AZGRndh55WMQYb6i7ALzZeSttxOh6V+LV5SNYYdeQouPNdd+N45DZn
niJzd/11g0AFDHSZFxMK9p0VsOmXbAPFEjcTvMS7PiMwhUsav6ZfZjkVwz4X9s1v8DCZpNbKSq88
kGJQIcZYRdAPuD7V1zvdo0Zf6leEwpYg5lACMpJ8rGWyLPBrYD/CsWB0THjSjjkRntpZXUTF5Sq1
IPSYaQtCSAHZKO95giPeqw3zw2XQ5ci2o+t0eS1YvmSPlvMfZRnkdx98t2mA8ABd64gljY5f+0O0
px5Pec1R5VTiPNgghdEJlgrPqQxSP7vDXo0dtJmtqeP90QCRgaOqEt27wpqzv0KFUth0XwtaJeQ5
dejR/hEOliBmBscgJkx0gBF/nLybnTcQ6xwwOe25uqhvJIiepSDJE4ICrD/MSurrVfozreQGinSL
a/tMurSZF67eavaP5tFe2G44AmkmV4WBRnOeWOW2dJ2Q1sYHMUzfnWjdSw1sJJu6+Y0fUowVqq0Q
K2lcfV1v+sdb0adNWmXRoPrjCpXnMpWUyUXWCaY8r49ipi+4TCdxE4p/IUZfO1aumt4+xQcBT0dh
t1WR18HGPmHp719a+JPxfWkOQjw5JnEukkqxKV6fqJPDzGrHDJvrkNy1tkX0MN6Z+Olw//0xoyyG
9SEwAH72HyUlbfM2lhwM9N6f4cr+CLxPF2At8ppy84kKN/H+2RDt520oTXKCcGFU/txd8LdCs9qG
3diwadeKrfsinlzq/W+3PUAPHvjHcwRyRb4m4Wv6J0kW7ItY1ox7z91NbPGA481MOKLtCEwm6vuk
sfLsMi7+T/Hm+qsOXlQ9i8Pf9VAE9LWS2byZEwPIYDYtbLm2L09NRsMgfm6PotDA/9WaPtrx/CrM
IMllkwsRz86jBnsfx1s6w2v/gxQFWv0fY8mf1WywsWC+WArpCmvfHO0WMIJtyS/B+XcdiLdfrrJ3
qeRMJy8lhDn9mvRTVYzLXtu6Fv98eAxRiP4hPmT4+kxhTz4CT4cDPP9YKhdzODoL28xWfAYFbD04
Z7nP2BAp3o1FR08u/ctwg8oxDjcRwHkmDHquzKrPjnQBKXv9IMSCNsR7asFA/JqdhHcmuKZg6PRk
6XzKLzz1/Zs3XVZ/rpAcA4yoz12/yPHmsazO+a6cgbZy7JTSwRBhRd31L/KB4M7WXzNJ4paZAsOI
O5FWmQpp6eEyGGXpKkGy2qdqVRuRe0IjzwDJG6clerafsgCAj755Q2eTRVVvvRQw+G+hVjqaFu/+
m9KSJt+0hjHW1BHC4wyHN94ORPERUFukKcxOq8a3C4r5hTOZW3XWq1v7Ks4H7Zwi4AlNCGUKQ0ON
VSZKVFl61F+tBDQk+IqFz1WMfzhOfRJYfalfeqp5HOOIaK9cOhXG2oYdhceL4LDJlhJPAqpAc23Z
G9mCLMh7l3PvdGUWIx2s5Z4EpUsaxWTxxqD4a+cGuaZLzeV55zSCZ5qehwrwRTYvoBZE1+lOXnfi
Ryt8wko4y/GJZL/NuHI8l8tJKmVjS+XqWIN5sWUs9WMNit0HB/gZfmTuuvpwP7gjFuUjS2Q+jgYC
9ppF022c89tfs59OKVOjOQ9s2b2FlXyn4zn9AXI7AYGal0MNPRsQwnnaZJiTebyHcwtZucfEnh6z
9K9skBFs29qlMPNYsFP7y8mzdNhDng3TEgYpao3SPfXwDj/CSw/ObVggf8enRTUNlDfJ+17WwDyO
/ajc27MzTRLyBCCQhUYvMn80lvwSHxWDIL3xKvr2OLMoIAmgIZJG3sJMyhsOPqFxVb1Qk7NcojOn
D11t84xem8WyHJRbm0pbKV40U5U40scS0H5bcMWTEfGT4W0Mt47O181hbfymq/ykV0yIpouFyaDb
tUvUtKWqMknlkUxdllrfasNUWgJUfn8Cl8EV1Z3U5ABYiUNuRr5oKcdwlS7eB/n+UgV71hPGXiii
tFKvLiZLXS9l/eoEDDKLm6/8OksoHEEFzRFIR8skagCp4rd4fSGbOUietH2v8ecJdTlXFP0ex7TX
vh51q5DGduPDyv5nJCNInuPVn9Z9r55S/RGw+ySGAcaPEqaldHWakl5LrzE1/zI4K707/QMAGDAl
HQdn4RCGxESdD4HJn35p8o9hnYl7WqaHBddVyszwX//kjQ4qJolh4qp+txlSxnSJmCs83a+aCvMk
IbAnKPRH3SP74XCHOQ3bziFlRO0Q1JWSUp+e9CxVX0iTOPbgrB+wD9yT1o6m+o45pOEi4yqt1ZwB
6GRU83LP6o8j9UURxZDZ5WMgpNs4xuaPxAt+XstW7JOy51tYRnIykokiQYYg+aWP02kEZ7KL2cif
/t3AkMcRC0iKXbo3c1/h2uNlHbvkqXBOZnmGMzMriXwdE44Vt7izgW2oY3N5IFwqNHPtWi9SS6yA
hcD+oqiZ5YnDx8Be3R5HxKPygh4K5ePLmLR6um0pz3P8seQq1RKFP9ctf/u1v+7BlNqcdEez0X0N
I4X1lXx9dw1MpdfXfG2riDistMNSEH4Rrccb4Y/8cnRL9fh3mO987Fb0uI03HcxJiExzcwHZ9dco
s3vvxZTsaIGr2xmmD+LsMSI00fJFv0/mbMB3LLQfURbbNvuYtBK+fA8U8TOqSRvPYwXdCjv80svZ
ecFEkHhpXJBNTWSfUIzupFvHeVSIxo1FYZEy4sS3rdwokvKAiZK3rnzY+Ryed1c8On/UbN07w7X6
m6hS6lOKjYh+wxgHNswvu8N4sknoUX7Hwp9LBuU8+T0Ca/tOrCkICtK8kD5WkMmpO6IWAXUjK4Z8
/OmRAfzuhQeScqBIQTMuw2IkQruwSdfY/2ev76Y8v5xSi/gzcXVjJ6pNWe8NhZ5pL8vuon9u8D9v
ac2sfrz5UyHorqRAvNxS0nxaWXiYHYmk54FYhWXq/l06uTApLWRBji257/fX7WCJ6JtNeLLcAFYG
ui6Qlw2u4ilhoM33Ba9OQD+hKXM93Ab35owHIBR48oqnZlu/gRs9B7w/mQ9P7Aq6DwyYiEy7zN6P
zIrKF6PEXI2oo5vRRDZlhHjnxlG1qbQvhZImGO8R1X3muvsJ0Z9NyHew0PCSz7i9mW6rY2m1FJBl
jLOuJd9a+SClV8HYSGnNlxIsBxxS4kdb8pJAiZyO1GsyFurgT9epWWxp6MeSTru98ZQ2HxuKRPAh
LAyFLPqo+UCcwRFhd6SEMQhkLktq/u+ZRteg3JfitjOD93M8XsrOOZXAvc8OK94NqeYOeOIYfeiA
Bh8AZZCTK3Xt4QLtJ2oyW6gLSK/gyvC1P9wVOFLK0VxRCj7UL1ENqTGIylLsQV1EDrxvDeHgkr8n
+celZ0eo5oJZQc+yNrl6D8RLDaFfOndjQQuP1VMMLt/r+SCqzoIQpeaPzjqcZ5F2tDjq3vLL3JlK
L72Oet2zPrANXugoDIB6V4zLM77QJB3ICXMRSw3lLKHdoVR1fOZjH7lh6OFJTtre6FJuHv34LR+w
Sc62m9Wix3fNqnF2+9Qp1crzn4iR45vHd5J/GET/E8MKd44F0qOzeLFE7zgwf2+Iy6YZU0LJ7OWe
z0OlZFdrPEAemSaXyLI3Wg2c7W5Ef4UaJISjZfXU+aX/CFAP3KV58g4cgEfSs9fw8iuCFLuLh3Jh
GZg50idBZAseo6HiW0jDA4Nn9S03k0B9v1GqmSWPhP3YhzM/EK26PGYcgF0eivassZQFQSrc6Jil
NsS91pv/HNapigSr2eVnB1wDsPbMOeAWMefmfTJEy770FLL4nJvHH23BcLXTk4vQBAncc/ypOm8W
7K8vIx4OeBmtzlz+HHoN+Ki6SGNYfqwhxJ3Iclxi79j84bg6FlZ/sJmHW3B/BcC+MY8FKzU6WOYl
4ii86/wI6/Ymwxsc/fLpXuJgVnj1G6seQpKpHtSA/+fDWnvd7+23DNdK6HfBGZ+9h1HUSEREwoXj
99Lau/2+L3cctWkmre/U6dbCrUJx+9esOM4lxm0AgWGdwsmiTdhQhm1GO9efcz3nod2wuyLOoRFB
PRHCoU9xUQeiUOHk4A7KAbqWNnKmpYJRUFtQ3lyKzD1zt5ChuiYS+1trXUf0emVBc0RXJeOJM+oy
pdYUCtO7HboKltA1VXkzyJrTAnuRxZ1FiBt3NN7AswsisLqFyQAuddvPGzztWsE/T1mimJzTQK+f
f/Lv/B2HA5evVFXQh51vSrY2ub6y7UStyV1sLz4hRJqfnfYYtn4qKe+hiDORa9CUQSPNnR1nNwVS
OkQkOe7FGwVo2tF2pgxsVaObzuNgR5W00kvbG+HZrYc/VlQXu17CoYAXyKuimeuQUX6IOYQfOtOi
P/656J+ayneD3DdaM4CAxyapYpzyxTtzYw3d3BmLALR36ZccU/VhfYiHYcCtxg9XbjQuCmn0V9tm
VhQXJGWmHnrfgcSUohqw+023UH3zssHKe3HoXWtNxZuFWTm8uBN+FQJWwZg5o1SnFllNmOyhtpJN
XO8SRcSR9ghUC2PkIXtJSv9s4l9Gp1a1m77LFh4HZa3el3/C2W/EGR0B7R2Pzy8Y8kQnfhLd33aj
x06UIZTX/x5oFzGlrD7CuvF5JKo9vOIxzToHh5kdoOD6zjUKUGJYQquc/mE0DMReySwBHVcUIpLT
P0tPzMBnO/rCSMnc9ks+pckz6Kip2rnVsPX+HfAom3uAkz3m42JwY6b/bHCDef0RK/3WUac0dSKM
kEYtrhwBrDcHu2UrE9D4N3TPQpPhltMcgA3rCnJNzhStxgWfSGcSOX489GY3JX51jrPQ4KLwg3Te
uHo9coFgA7zxBD435Ek9ZfJZAcIO0Zt7s2uZwvFyTVmPWSIEW6daOf4f0gxbKYxTM8WdybNJXju9
AuBEu/AVDZ4+JGpSkGoI5khnH625YEMjmDdM7yC1jJKKFINwCI4JiWEAl64hmuHGoqBCRVIgMBYp
hCwZyPZsI1RVFT2dRHGrlaHOioCJ4s9qfl+jXm7NnHKSvxNcZuT+Ubv1PiLUCoGFG+sBAEE7OLIx
156yyQxHYKvnmGVKdSv1JDcqFOBTX70OTB59UidJY5m6HfaEtJa2TRtYd9dfiLW4T+bJCNByHVNJ
BP5PQ906S6hbtLHGTio7Jc/IK25r925Vil9Q71uHrIoeIOuJxTU2THyuDb8th3jMJAWZ28arIcD1
7zvWma3Osergrj5anOk44hmyfHWNmtZzWfjZ8g2mz5sCZf2xhx1wqFFUm2rP++JnqWZWqJpie9P/
FaUflE91AeT0nPFGzJobKS7vxP3YCIxqDXb4W+GNrbrMzqJv62IjXU/5VT55UrYBObNBKr5pNuPp
nl5/A4Sckp8yUP4cXgns9z450Dg8dC2rJeiALt5KoIAI0mqVyz6dmncs3964qm5zvqkhfspebtxv
+/5/HLRk1pKJC/0BEIG3U8PblJ4S3qWAR1ocDE72mQpK1S8J2OpVtmNPWqj+Q8XxAKeFhxNgDseh
3Ys+1h4JfwdhkuL1WuvUWRmr43qJQgrAU1dsla9XqNHMblQy5XDeZddFiARAWW3wQ5mQedn8mA5U
VcD6AFj0+myr/qmfSW0WZomoAlWRHZR8ww60cUN+wUjqZnXcQrMta/v0wrgmsv3Gm8XyHnb593L7
eG4J4D9wit4Xzo8ICB6DhsQ+QOfSpMQ+Uks7P55CB0dzcg3FIehDZWZfWj4jNvAY1gUscTVyYm20
ltt13qwaUWOMqO2BXOxzc3jQ7Wi51nA9iG29RjBhvOs8SIEWaroBNDKCGcQ3HvQk5wLRSMiGq6If
A/12iSm/sYD052pbIGYML2/C6RhJW3M52SyyIXliJtXn3B/si0AgHYfzqT0vXPlxQANLqtU76Uyl
JwP32T30MRjAm6qMdCDKPfadIidlWtpiNS/lxnet2Fgcu2RTx9pSlm5DVmFbm0VH38okdGyJDSIF
p+FEprQ9eDPqoUzNbjd4QlY9bph/Q/CVR7m8dBAbCFdT7pbH6Wdwk7LdzgRhdtDP9jIsKTNNte1q
GMvooCehfU4GiCw5Aa6s4ZZbQSVYuhRYgOHzovGzq1+5wOo7N2JA8vlRYSwwjVyUb2rqq7iWsbg+
JuJapgIlHZCoOngniStpVBvML3CdjisUnPZs7sdb7aLtZRCI8TsyQed5VNTTOv4NXqNYWssW/xWq
6f3VNQFk/gh7GyMyJ3d38QobBhLCLY4hmDK8JEZCWxIL9DN0kaLLviNG2wWKwZL2cD0vxQK+D5M6
PEIAaggXEQmwA138Km55S7ojd/DGbrMb9D+Sj/6WEvXGOXlRpGpFQu+ha0Zx9dB76EhCiH5bYq8w
bqILWA9l62keHeCH4BpTHJg8hCuBw91g8KmUfdeZqhZBGmg+jggKMotw4SoSSGVLhK21Ezgu6kSH
xJ58XYzSKRTRJwiPKrAW/4WoTYupBxtoBdz+SqQ84ip6iqZT0q/H92SSDYacziEwJ3uB05PxUTio
eQqXesLnKDT7FS0PXWpbQ6ZqpzZuwWNroQXXNu1J8npgWoFeQMl5AlAUYOaByxJ9IkIGyYOKvYWA
OgomT6uFDSlbXupq1moQTu5MMxn/ZMWnYIjBUqki5h/yxrMoUH85oCigWxdSG6HkE/Dlp5CORbr6
gSgkUnNa61GlwM8WyTdTAlnPRGGVdb1X4S8CEW5ZGHUyn/oCYY1HKlwtLQyyQeVplakXQCvrJ6kQ
Bg4uyIJgb9c+RoZytzND3ph+muOAgedD8oFvvTx3sNPkT//7bqD5QROXfB/CNgx/tsm0OEgPUtyx
ftKJXDzA7GJhHQNybc4wtemLWBnKgjvyPxxbdEyRdD4wobPkbKzOOTeAMstEFoqr0Y8H7QhkUQam
2jDhUkqJ284W1O4H/XuuB/Vl/qvyU9hoJQcPCgaBGFdq4QRDbpDlmpqlxXrXaHZlgWffJAnQn8Fv
sk4H4Ea0/WjIO8ifNl6SfybYK/5oIAIgUi2Nk8KE1m8gnJUPMXSYWsAeYkR6ybc3C9yJj6NzwSUW
CqJJugNELmiv6J9VPA9PaGQ64c+3pm+cpyDNDHQ1vY1qvj3nEgqx5n0Y39nCsQImiPV/Sg9yh2Bk
HQ4ZMwhLI+nFwK0OZ/zkh4odiDsOBE3M+kMnlZ5BJmXK2t+A59T7AvwpyVEVogCrqtbogq7EyP2R
/KoZIKfyE5vXtjndlUyZjAiNgpjTc1VakSJb07v4Jnou0T2uuBBVLBE8e5fRknL4orW7nwiNGR3A
FjSKy2+CMPD486jawdbxAbwfChXyeCLhOttQScZ5/UuJXKibAEIiWMO0zwi6h0787UrxLIJuioc4
nULkOdY/JKeviefRwjlnZY4q5i8h1F/oMT/HYeWGqrroYovXKcnUxbMWZD+jaopXwpKIKwV/u7gL
ICCVqIDSf8Gom4lbOw1ZcRZKLSyvneRHTfAaqVZivhe1m/wTbLuvizyo5v0fH7nNqAzAgtH7oirl
O09aUTNKpDm720Ay5sPItAEz0pFiZQIRDfWGCHCuuGaXZG0xuyl8ShQxJz/9BEeMVCPhZnOaNv8X
bNe0t7omyZMkSFNPR4U3evzcLjcuK7VEZZdMkX6tka5B3C4bRACtFyOeQCt79Xrriwjp3eDw8Yxl
i4ZnF2nnIzXhArnO3TFIuhZXD15yn9vVT16wMxV0rkzQ2P+1+g1u7aeDNwRT2xaUvdsFLGr61RsA
krrBB/uXlnDPWrMSIoSOLSTC16X9VfDFq7XtK2uA0BmKK5FJeWOI1ArralXwFlj8KdxJ0L25ro4p
IZhykME1I9BoKS3TjfbTDmfX1WVooDH5YBhsp3fnJjyZm0vZ9V7nsz7eC/en9E7r62uh+MrQsnxQ
HEOfnD5I5vsCo4FmTwA6lhGbUO5+59ZQ6busQ3Da/4/gKfWPi7Rx+7Y3AL2HiXlvnKxN32bezNjp
dYjFYXVPdjaFpz0GrP3APSdp3La8UFzXbVhLuwuv0mDPBPScpRdDo2G0X7gso054AFVY6n9p8tdd
5zYfJhmIvj/NqUn/wjbA1Ptn5IjIafceDKqCWE+o9brGUJBbmYQvsYtD4pa83lH8uoKqIULDiSXg
6yxJwmM59viy5qkaOJYrzsWg3wlO+PCkAvqg5HpLKFZUsQIYlmnRFiU2siCw5xh8Lv91KTWQE26H
JygYAC9Di3Fuj9L52dCNMgbtOCerVWI4RqUpIFnC+F3fY0d0urDChvfCB4v5ZfmHK7UQWuUl5DRA
Ncjw2/e3pwmVbyls0YUVrzdizPbhlKDJX7xzvC4K10nrAjnG++RxySdAOFZXubgPzTr62JQtSXmW
IIqO1vKeYP7Zb22j7YH/bXfT/F5cufY3ai23D7tEwC0XTRPsjTnkyjrFZDKy7H4jtCHGqFDihiKn
lzcjRj0nxDEydN0T3XZVLw1ckchidFI80LIRUz5/80zPxLB32RudBu90cckCuB1n8lnmLPij/zE+
aucm3Kwj0LLI/ESxyT4RR0eJrEyPbq9hWnKrwAbHzhPaF+fffQmkrsUci95u/+x5LJP6G4/zY5ZU
42fBuiz8uxbweZF5KyivG516l+EjFp1oi1B96wKupMTLWNO5UC4Axpffk4EKZEEns0gYRwpJIJRE
k8wuG63EMGWNSCTG/RO5z9NxoZktD7g60co/R42CBfts1WLyi+ow7jHsNlPv2xDWQd26f9hJIG0e
TVk9W8+8PqEnJMnsgKAfDu8qnlNGOsOHkqE+0aqrtum7PjdweTcx62yaHJffKPA9+xi5XkwSw90Q
gvLoWjJpXh3ptwi4hIt+bp5SLcz1MgCE3s+B9GMkZp6eji4CZRJ4Y8HsDzXziQLOBcJQbavNtaQc
TKFoacbgnSmdbaLo6XIalSOZIEQbh87hhxV6K+UWL1flpVWVAsJlAajEXmi7Y1H97PKK4PzSN+fr
yJifROBUNzCVFwmnra+Zipb4E5Lcxyic9aLP4yppTbb/i3T4qOrnXLKwuSrhJXSCcTyIRNfCOFlv
XN7teOJs72V0dh9L2Cz+VbtkRX0l6NYasCjX5gO0C9MmgYx+KYUX4dFrpHbbUVI/aeFPSRXeqpDp
Bj9ql3XKb0y+qM3C+ISe74cIUmyZPAsxtspP4l5ZqJ+0B83nubj14d/NJVghYmn7MX91fvjVASmN
lHcGwVvjoBHip3wjmlEjH6SoXc9kZSi06Y86jAP1G1cetsxKKdscQvvIUgoMDbTIh6hwcJVeWzdL
FeU4QV/2aGp2kibI09y/XFAZ2mNG6KrztPsjXWq3ds8FwxjebgVCba+YBkr11MEoN8SQGoQunHoR
wD0amqgzGzavEsdYCJ8t2cCLE6pF55bmrf4hm3BUaEi+H93IC5sJ2FrXcBTJB34BRd3BWFA4sQn8
EHoI6sWL/HNvZS+gmk9tJxOpZdOlBmBvL7QUxs9O7HcdiJgqyWSO2WiYWifPywrmOTezB/3RbwAO
kCUo352IbRcj3TrkIOubd3/438v4D7Ft3DhuapnoCgB3AiCh5BOxLotQ9OLv93+EDKzj/zShPRlD
D59DjxgDs4Iu+g15WT/OKtcR3zlU4vfTWVU8Pr0Rrd9q336s3AfGKPsXXriQ6NZ9n9r5uEGts4dA
CYsfvUEE6TTkT7HDGNd88HhGc9mYTrvIYqnxNJ2Dfxdy3D6py5NGKwO6Z/oHkj6jB0bWGX/iwhbN
OZ8Kc2Y/JJdWFNMlOGHs+2mgWXt6E5z02EvayLNFqqXbzAWxSJ4gVWUkRW1w4X6kYXnUfn/uK9T8
fyhoOAFAK7KnWzDARKpQjPRv4cyZKWEU8ND2VGBYHHhelKiwkDMuKr8qCOHoiTY9LsSSTJ0y3Om5
zPbN4R4hd7Ki1teS5VRo9DgtjemIkmKBmt9AVyH8O7supJ4F7fWQI9zIGnoUPi2/DYYul6u+5iWT
Nnlokkjfdc4WCCICsJu4zYJ/8oFwpYBTtAunbPpcyXF/jj8BGbtrurRFhOc9OHpTS5riE7CjTD41
SMNvyBkzXhdBL7s9fFTUr2SwP/m/pdiYt1Y8+cPm/1EIyP5d5UbuPMKsZl3LDwWXCMnKi/h3PD2z
CGJbKmdAx1uch5biRyNx6w3CCPCangeKeYwHKLHU3QjsWtCBfoAkwR+YArHSuJu8Xvtd34qhtsiL
s3yC9fez7iMXGfqasfXLzwl/T1pnQLZ2q5XYcSmbjHxP/9A27xwKycajveYOqzAvM3CRfiZE8eY6
nI0NQlJ53WwU2oTg26Z6QRQe3XHyzBwou5E1nBjHU2cxdKlVp9DtJEqKHiY19jXJ15FW+qthh9G3
7MbDqD0hJC4kwh8UFZkjzWYM6JzvLGwdsQBfme8bOryRIVZ67tt4bFVVLM9FXD4pW0GJ6ORp8Tdi
4nJ6S3aD+mYkO9ofUAzhp1lc820p3nSEDgqvhWKK+V8arvQArAOVqlMsfcrxjTAftF+gupUsk4Uu
x+TuA+NA2OPMbOvrKHF/9q/bRDZFWAK1pqkR/ayn+Hr9aqdjxKLKLgWR5GJILTb6RvYPQ7C4/P9u
ORGmHF3yzCa8y0jOFH93CrTEfxSjBF0EiTlKkF8k/2JU0TKPm5zvg6slp2L/EEy0ydkfd2uVivJM
qWFaC71OR8sCvnHywV9Rqc/3Z5M2hIVDYOyota7W0D+EpXlGCDVDQTpNeGWmOLMqNfWr9mWdkNpv
GYuGydcdMKsPCIlXc1LGOaspNv21aHliav8RjakyVwcswmUhf4ZBHyByl3pyxgpm9fvfdXUC4KzO
tu4VTi7sGKg3DdJhVLw6k/2u2icZUQJBG06UWsOYro6lLEAa68zHBoXCTBDX1LdBbB0EpvjZGyiV
uRE+GXFmHrA/q8FCObD20V/4gXKXk96VrBgMlOCPfO4TJLu2BNdhasrxouG2R9Tf4ha3DpYB5Wuc
u0SGgldtDs6NlsmbqCFk10eYfWxWmYr7FmwhHlxzl9F8T97rG2QylnqUtYMDx5M9tA9+oLYxWA8y
A61+YQeWWM79SjgKWslaAG554is4whtWWKHUsHr1n7NYjd26Xge/QVwVvSQh2RwbfymuNEN/70nO
f5l1YSAhk1y/G3FFQ3eccWGONkdgA9dS9HZQR7SD++bYaL7Y31aVlOxtswK1jcHpFCTFWeChLhpk
DhoqBem38sM9At8UHDlWF7FnNAdhktmFUDxRIqNrYrFlhR5Ay5crXOKjDrTyb8zQYmAalRw+P3dt
9fkWxL2T6HAMYBjUAvwxPOx3FXGcW7dkxacjYVhZ47bVwupVqkgXiYkIDfmm9tjzFNPCQnIDtgPR
22s3BLR4rzfdd1W6ClCfGZ33+Lcvtdd9Ki+ToBL4StuX9+m9nY0eq/rislQWncvUWRVJfHsBK+JW
b3dfPRlF4ThV5RejfaAqeMycTNOLFrA8X+xl3fZkznaeVNrgkR4kwoDX2c2Y4oUWRxg5an9f6XME
h5UtbZe1NWmkPyew4JFdfnNc+OItFmUqcl4XQxzLtu/yeQzsZyPgKfKbrZliJk7r5SqcKVjI+1/u
BssgQeOwTpFRPsa2skTlRCvfxpFwBXYQOkncuApZXm3H9ImD8i99TkdhAZ8NWgiMGx7rV2J3CCI5
HsIp3c31R1wqeIc8490LHA9lTaqll7qbFAsnlPCl3H4sik7s8zflMICkU+efqDw7eZ8f6rqVVVmh
MVUYBnN97fby00WKxxnfX/5ZjKDrN6aiFvfS8tCxuEgaYRk9kmkIXugVN6NzveA3HqSOhYMhKGKe
JFqOwIO7XaEuFPVFmRdwDreq6VIIsQvspti8FGzLp515iW3yBgfqUPz9yQyIEyzKSjfIuGcnc+Nl
53FjdgfO8sHjhl27ZrqtLlZXmHNt1QTIbla6eWi4A+ANmMq1Y82B1nJa/3DKWjO8O8ikeS55lE9/
rBW33a5rSwc91N8sK9MH9ltCWqCHzi9hh4nLPXYs0p63Ba1BX2BTEdHAMiV/ok7Gk3mE/xrbysXB
OsHxm/PTXLq1Oruj9e0Flq22LadcL1O/ORC4JSBOiiuM9gr4TqV/gDQtqKIIrYkM54hiOOsqqolt
2A0D6WDStP4Izq+kNwgo0WAOXA+JYOGHTHHRtkjSjMynoG6G7DtSNojNuPwXQEGyf2gtzfNWlyT2
XjOd44j92KD+xypnrDyiuuF5/HDY/EZqe/gEX7eB0n+d8POCNdlF0wY1m7sTcWRKbBWi+C4uj5nC
B0jFvqs+NEuIq0GN2tFo+Ec5OXuEP6EMYQGl1ODp7STVcqPqpma0n1YREle+zk8moNQW89cr0XwL
fAAaYcVNtR8pt2SOPnBu1ud25wfn1rf7gqp26RjKDz3HUT95C5RC584NThsfxQKdq5N1R+TRBfbA
LnMrcp9/gs2ZbcUq1Csl0IU5KbrWEzyG2Jkhrv1u0ZtToppSSSL0i8x5a5XjjkFQH6v5b2FdX7IJ
vboF3oVcuM4hjOKvru6TxveJKkRXAKn3T85gpZ6tqn9lWwIB3/VBbRBTulbAycK2aXgR41wbOmXg
QNMq39AVJRBU+wOnxXZr7+37NKgMNnKWvvc09ArGGJLv+Z8L4TP45esWft8psoczuZxBQjOBePHz
HnfM9/zkXAix763TqxsfjxCJJO/wC44vt7vQdUsZyVRYVoOgvnWad7bYV0tAORl3NjzUYDu/7Obu
WqBkovNas0ezzlTAzKuzlo5uxBonTn05kRcFsil3TfNLmAyO1pvn7UxNpbytHH9aAgi8kx5iyHjI
icVFxq6wt3jZ68/S36AKm2Naq1kZva+2TmU9hiSPQVVKpE2EnC2j51C+g2m9/apvF9lg1PQG/Omn
0IjWfrKAvR5i1MY4FRtksBpFRmm6vTYYcgXQohY4UYylbtw4v0ehzx2zWObmMXQkKwMRPi4tmoh+
q3pjDIws47VK8TWzDXuBY0GVQ0cty4xAUtzKd+NMYMqlzZxnAFEpu6jhaQq6w1LzfqWZnbl+1Ext
1NJJzOnKdPXbHlTD1DVoKPiK/9lF6jsvBmrphNXTr5s5JCLeqR0pENXQjtbZJZg8NpqEJzpiEEPC
MgiDFdPFY617TuVFl7NyyUehhnBo58hv4nU58I05y3YgWZ9eB7j2Pa2tlFhqo2b0bV3Wu38WzmBg
wJMu3+aKl2WkH9KRNkmt3gjDQSDG05gGaXl/6YKShvF8dfZ1sKiXXldXHqPH3Mk9TovBoyQdLGFK
HW4NxnjJDBIar/Qq9w8/gIlFAfiM1EG3D7XH7YhK+8OVXS0edGuuj2qsHaOAdp4HX4qWum5KqRvF
vYpmT1YLBHzUJ+tE/5oZUkk9cVP1/KO44APxW6dKTmbGj5HlMhR/DdeK+cRGlMAjFo9BcDdL2k+j
OaREG08x4yWQ/7Z94F/jlNUQeZiO+ccDNPVjmqNk+k3t5xtANrk8PesyWIs6/kziY/mEC9ozlx4a
J23X7ajw1HBSchZGBr0STwWoLZSz8yY3wfaqmO6j3ofzFeT778MV5efqiZKdOJqNjvQjOqEBpS1O
gRPjdQN14G+vee50c7cOmWF8rpUErCEJbtRotTUsZ1zewOs6b1ALGrpT8dZ7zi/2SWKsmn+AvAKN
4PzVI+0fJEqfYc9vuaTwPNb6o6rFvfbpGw5MOBCYUZ9XqywtiyzSlRNbECgj59v3X8GN2OOZmElV
V87n29XnqTND0Rb3EprztQeoMLMHFSKVPMkPzbdyOPMsDU2rr+tkD/sHPQpIDze3cIoQiT9PRrQF
35sD0nRiWngPOc4VxIJE9h2ITen07Rn1PQy31vcOVn0HCYBHpZa2fiJ4lU1YRVzyVZfuGDldE0tA
skEDnkOA3QtsbofmeNZIG8H5jD4vdXW+tk1Gb7facgTCLt2aL5K/zXEQ348EZTSFTgIxNeSi0JJS
6jGYW4/Ye3FLPeUuy+ZrFF8+ZAy8lp5WaiFO6xYQrRrR2K1Qu6faPBUD+RQSF9rtKHwSwLZyFOYW
A+VYQUUyNadoSx8tx9Ll4d9XBdOoDxHEgHd4nQ+N/GnZpOlxmoTK2U4z2TRFQdUJpFLAje2x7Zhy
/tyEc0VZ721GQ7VdIjevzlyYrZla2Mol3eELzY1wJrFGa/22gh5HN6pPvoMAUg/qLk46b5E6CrIE
VLetU/uLZZf1MMviF+iyKXWtJol1MUbHOVUGFrUb64eYirmuP5WylzxyRZs9lL7y1Uj9xeBJW13F
CnSMn9Z9szQVCtYNzdvgJN0h9C2zF60bGErQO9IVjG6ZajTfZttjNP3gB/dUunKBtjPwd6CSQDF5
9MRc9x2CAQkWj9oiFFZLLykegY2erht7tHrduDP6OUvsxynJNUOlhJb74k4Zha5aTl7appcs527a
IpIy+01oKZ7bpLDDvRDpT8aooRVVg/63KQWJpg/ZjfE+i2dpeaOlVHUcXr3WFkQuT62enDNFs6kr
m7TpDBlr4U3x0IRGnE2zburjcZJ5w/MLyt9d+Pc=
`protect end_protected
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
iisr0ydwFOm3eepmhOYSaxO3flYpViRsLN97vKyw+ai+x1TubmaH8qRRwK/QFeVsjlGTFdxookcr
olQwv0bmdw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
dJvTzz+PoD3n2Ot9SgKfpEhIshJxklhDhS1tYcrcmprfs5wN+lN+5Y+o9jEEql61IqDkJEIGu0xp
zaDWEeMqwkFuovmZnp/AnbrHb7R/19zPRtwSyZ8+VQRLsRMgscwutXu29fTUST6Ribitutae85tQ
1okc5mYK0mcSMIggcMg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
ZijKIWnBSOuwn6R4ZrzJp1qaSPGZMrP8GTp+SV+Sn9xEivGxLJtGM40xMLXxiYuxIopDD/A1usG6
HkSoNT6OzxHJWKkUEyyVzrZuJdNHJ5q3s3y5LSNY7eMxN9lY4/gygh7aVIBAO9YWzsWu3HLtrHA5
2vsUFQxQdkG5OTLVP1rH68P4j/dhqr/LVHw+9H76c/knGyalpHLRC7tnHQcfuezFJWlkzaNGHfUo
b5cE1YTvtdlZVmw2sVG/GbXIRi5fq3+Okdy+JgckZ4dVWbI20rfa9LkI09/kwD3anyrnovVQVx9h
F0AxolVKVVyWNAaSu1fvXllqzrdJiRLbdnsq0Q==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
LUajPw/jRTLlmEKb+9YylQ2jxw4jlSx/1GGaY1wFfWFdMwK2p0xvQMjui8K3EqJF0fnb3QNWuQDl
1vTtf04vcOAHkfRCeW7Mbp8qeUTtAsflGIPJDxHfVU8ZKprwANsENc8LVrpJ0WnjDFQIzJw7LDqc
Jj2TofWjKprdxXsMnu4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
KG6kiSPrd66zvVpG96eKD+783ebVLVFNF7pXgq+rCyBBRoa0N9Hp3DIWK5125mkICodI82zuSq6k
C8aCiPbDiv4tiuIn19WDNNPL4ncknL0KLZTLAkq0BIQIsnFNRaZegM9aXOdMYGKYLpnjSD9KRWRt
WPXPZfwprSu2D7PeDZMiij3MY+cixttgVmNfcx9Kkmvg+1B5sTSDTVs3fqpJBBO1YslTmxyJAIC6
uDuGqvQ1138z6f4f+f8vMXratK1Ypo3jPPb4FTNLYJio5Vd1Nbpl9kRRtj801Ie0GGhbggK6IXJx
785o6wX6g3tRyoHXGJ4DGUmWlIHATg0KIAflYw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 13424)
`protect data_block
rEtV4Bm3SmvVbKq1runp2SaaO1GImraXNQnz2t97NClVhlTBGZ14v+hHArmsTHZNME/QWduIEcCL
I8GdWPb/f0NXI5m0D8vUM2MFHCnzTFi82f0pjwFGBVpM7cHKBa5QRX5K/e5A/9KwgbwYV1tKqTXG
aWyx6JRfuzQINO3rQqM+n/1b6LSLygDM1QuiPthpMFKV8IfsVkaLDVqcLxH9/n7C64aisv1xK+OH
WhYRETSZok8+gbvdGdr2+VsE64ALl3DavNBK4S7IOGP5YtXviHmw+Qb/lvl6m+RggRYmTe1A6B5r
pghgGDxK2gS0ItU55quFmZMEuEH+bwLuaJA0/UWR19oWnbcTZnsCqEeN/xbKUzS6blm1K6RPZtYe
WSGhjFl0cKHEQe9DfEazTm6tS9mJ55lLbSuwE5o03LDGRapxUdSR0IiKy5C5UP4genzVw3zearva
qPWmPeGZcAEyFioI2o4OWQP+8mFdbza1kBOuw4BP76P2c+ij6wbxXAWVxtNmL8f6AgS1AV5SqIO0
ftTCve0JloVh9kpHsbXE1TS45+y0IuiC0N3a8PAEsXa/tnLsnAydpsXIQwMLXmgKfoXKzabAHHdI
XZJd/NxD7+xY3aINMVaO5eSSLIdjkYZIeqm6qf+x2eNd9v2nue3I9rjHkjMBIty9wqDCI5HznV19
h0aPmdRn9t7Ft5xXq0GXqSl2I9ZROoM4hg3RU6TCVY4IaDkErgP5cMhIwuHsntmeWvsvkZFygQtU
9TUaf90O9HINFkrdIHf0ZCgtCgUw6ffQNPAkw/6MaoKxm9wdczGi3ur+eyRvSLy7+LQX/dOqvXKM
9UFNjkQk392HWfkT8aaXacuJgFT4hmoEXDGY+tSqQrQRrPmelj+ksf3PcI2r64RSTjiR+9HNqWqJ
jPJio2xgGdQdGrH+UewLz0ySmNDYmqxIdyqKfv/B1BYMUpGd+l0eRCp0RwjP6nt7MKkBishuJTL2
2kpCGDQ4HELrlovnj0dMihRpFZAIpY55DfNVE2hnbkHthyDrEXapmovyPqDFel+HKDdimVyeM8CR
DKl0D2+OZK8XWAiVk9Ve6w0rONvwf/XvaAkgxa3rDJQo/8g8oiGRq4ku5l3OZUKrPVRcjVNCxHRq
81RLF34Ztt0FyGvWgFBPXPwl/QfIQcetnIv8BBHDyYvjjUEJZxJ0yVIBqSipzmyIn34Kt0GvhgJJ
oXsivJz4IQp2WiLYnKzv7NuBWYnOF+M/H8eFTLS7ynV/b0CRf7qayeeaKYL0uv9mUeXbILs7F9+8
XkemV9ihHFfHS04009LEbIzG2O13pEZ78n4YAi47TmCv22T8/Ve6sSAGowqE6FfeksCmQ1+Z98YQ
uXIyCDvF0dlGJwZxogjNRbjyCBj6OOagNPhSW71GcVdRv5XSPoZsF68V4hWQeNb+itDo7ZPtZJoJ
YzLjFDCWp+2G5a8+OtWGetlJNejx9rEDOQvPXNhCi9xzzzSvIevRpnt9XX8uVwzzSJnKhI91LgRg
ID2cjEMis7S70eKGvR2/KBOhU/KAbsgGALtSpbd8HPFqo4CWuxEHCYImqvt7m+vI7jIEpXbwjtx8
QWNgKL8RNSViXrcj5CsXvOI28Nk2V+GZ8jr1/8I4R/Yns4Xfj1TTWzVeNCNHbazn1nufigCGV4Vl
qtDHRGZpM2GzgWRsMj5tsZldV3pp52C/Dpr/92KUqWKMf/mZbYDJL1X0X2Tw7iboFgBgx1miq+ht
zrLMfkmBPAPakC7uTHv8wdz7HICGyvCct17zvGp/b+9c5KI7lCBCd9jn5PTW35q5ksO4eC9R2AqE
0xJmD9GKB17q8Jk7vlAMs/IJV9rgMDnRfyFkOl4hl2S45SaIY1ObTSNIHJYg+rp/nN6BMaWKrR+7
O6t2IjDTrKFkfrU0cMF3G7EiQSf6RI1d8iyqNJLJJ3fbFhF7XLnn/CwlkZ/03Hwn1nJocabXwbc2
9Q6RrzrxLCWMZVoXaUEBQvapxENHsyZOrmSevUQnuCknCx9Eh/GwdP2bYVHxXWg7ySdjQnVMtR4v
qT7n0yJuHI0ite3a92Oo/MBdlgCwEcxfvgz0ILRIK4wFe098lGOX0tVEsLdEUijEAeQR38bksd9a
fuwZzPBvMZQ+FON4CQYrDg971r8Qz89ArQjVxWF7TdD0Oaq9vaUrLocNzIw9AcIy8rWaQnwTR/K0
PsXLapKx1fOSZnuztuMHoRXGaqZVlZJGs22/GiJA9y/IBflmF5GNFnRUbXVT8r+FfMb7zIr8eP+b
OcPNp6F4kqt/b8gae/9JOIopCuWXpu5kDe0U5aC2qmvMuYbNI88aUx34i3WHd8NWKNbdtGDaQ8nM
iyuSX4j7EgwTOuBR/iFM7rZAATM59ZFv+9wRq8hbXVvfsBp13upya8YovLN1O9OWrzxUWym9ZPN1
mDhMT1YgOqVRaJ2ADyjP98UghsOXt6ybu9jGeEndP5T4mZjxZp82OMxqqS6VolaMbGRNPa271n87
65g6Q9l7RYtOL1PjdBOlgNpUdYZwxJ2EGgI1wPnrnuUiZ7sdhpuFkhJDdh2mHYlIUZHAsriLKEHR
XOdtU+Desuf1ojV6OryxMP052nRo3DfSj5+dKgSFWVXGLiS4Q5dQxDHIvUugnqZqf+FK5inrMME5
1eHWMPkrqY3H9syJMZ7RM9SwYc/zjL9fOqr9mE+npGx50NODLrgb0FydLIXRotOtI+YSbZHKzsKt
xoZNcJJ4GasWF69GNvRenQ3kp1eh71xjJw5a0KZmhsJJXThZLqSzb/sTisTU8jCaMh6S6ag0knK7
jonbXo+dctsmQfLpvLXHN4TNqJnY6alIH0HnsTz7EklgiqvaLbFn+25uUJSNDHESZG2BaAtNvG/4
WuvQCSLWeuJpsrPd+06Bzmmnlvn9InJZhGDVhnZlfj7Kh2PolkMjpLgzqH4f9hm/7zH7o7msjyvZ
Rj/JnTghr2ou7m5Ayp5K+yFEUt/y9WWmqXlKOpf12P8RITbx8ILm1kWRqB8L+xfF1r2HXt+av43O
pyKFj4Kq1FZckfpg2It+beWX2P825O6hDubEjA2RyF/zyyc3lMSS7vtAQMEOEJnWNslP5r0po6TK
F5+Ikch7kOxVShNh4LWWzwFtJb9SBv0iFIezeCGrgApE2blMwedVwOdpPdPvsQjNRYc8YG+dStcY
JUIrNMdc6m5qSEWO36XNGXLN/ZrjKkZcCr+z5oN8Oa4cO8jxqZo5bZDRVUh4VXM8a+hHCiVvWsEG
HkxV52NFazh7Duhb2Ix5qYigebEWfDnA3frHeY+lRAIE3+X/YoDjgbPuOqgwawkAvhSCeNbNxuTS
T9ZzmE8PWRbDowhElwhdboesSdX9tyyp7yCSM6fxKFXbUrPplwsSNsMYsJJ9grw0leD0bx4Cd0Vy
Y8dDayiLLROqmsdsKe7b4i2o6u8A0RQrPB31DrVO/yPiNygxChVesembc822gDnOAlf6FO502nEU
ItbE4EyM6ZuRk+69RSoT+2AZGRndh55WMQYb6i7ALzZeSttxOh6V+LV5SNYYdeQouPNdd+N45DZn
niJzd/11g0AFDHSZFxMK9p0VsOmXbAPFEjcTvMS7PiMwhUsav6ZfZjkVwz4X9s1v8DCZpNbKSq88
kGJQIcZYRdAPuD7V1zvdo0Zf6leEwpYg5lACMpJ8rGWyLPBrYD/CsWB0THjSjjkRntpZXUTF5Sq1
IPSYaQtCSAHZKO95giPeqw3zw2XQ5ci2o+t0eS1YvmSPlvMfZRnkdx98t2mA8ABd64gljY5f+0O0
px5Pec1R5VTiPNgghdEJlgrPqQxSP7vDXo0dtJmtqeP90QCRgaOqEt27wpqzv0KFUth0XwtaJeQ5
dejR/hEOliBmBscgJkx0gBF/nLybnTcQ6xwwOe25uqhvJIiepSDJE4ICrD/MSurrVfozreQGinSL
a/tMurSZF67eavaP5tFe2G44AmkmV4WBRnOeWOW2dJ2Q1sYHMUzfnWjdSw1sJJu6+Y0fUowVqq0Q
K2lcfV1v+sdb0adNWmXRoPrjCpXnMpWUyUXWCaY8r49ipi+4TCdxE4p/IUZfO1aumt4+xQcBT0dh
t1WR18HGPmHp719a+JPxfWkOQjw5JnEukkqxKV6fqJPDzGrHDJvrkNy1tkX0MN6Z+Olw//0xoyyG
9SEwAH72HyUlbfM2lhwM9N6f4cr+CLxPF2At8ppy84kKN/H+2RDt520oTXKCcGFU/txd8LdCs9qG
3diwadeKrfsinlzq/W+3PUAPHvjHcwRyRb4m4Wv6J0kW7ItY1ox7z91NbPGA481MOKLtCEwm6vuk
sfLsMi7+T/Hm+qsOXlQ9i8Pf9VAE9LWS2byZEwPIYDYtbLm2L09NRsMgfm6PotDA/9WaPtrx/CrM
IMllkwsRz86jBnsfx1s6w2v/gxQFWv0fY8mf1WywsWC+WArpCmvfHO0WMIJtyS/B+XcdiLdfrrJ3
qeRMJy8lhDn9mvRTVYzLXtu6Fv98eAxRiP4hPmT4+kxhTz4CT4cDPP9YKhdzODoL28xWfAYFbD04
Z7nP2BAp3o1FR08u/ctwg8oxDjcRwHkmDHquzKrPjnQBKXv9IMSCNsR7asFA/JqdhHcmuKZg6PRk
6XzKLzz1/Zs3XVZ/rpAcA4yoz12/yPHmsazO+a6cgbZy7JTSwRBhRd31L/KB4M7WXzNJ4paZAsOI
O5FWmQpp6eEyGGXpKkGy2qdqVRuRe0IjzwDJG6clerafsgCAj755Q2eTRVVvvRQw+G+hVjqaFu/+
m9KSJt+0hjHW1BHC4wyHN94ORPERUFukKcxOq8a3C4r5hTOZW3XWq1v7Ks4H7Zwi4AlNCGUKQ0ON
VSZKVFl61F+tBDQk+IqFz1WMfzhOfRJYfalfeqp5HOOIaK9cOhXG2oYdhceL4LDJlhJPAqpAc23Z
G9mCLMh7l3PvdGUWIx2s5Z4EpUsaxWTxxqD4a+cGuaZLzeV55zSCZ5qehwrwRTYvoBZE1+lOXnfi
Ryt8wko4y/GJZL/NuHI8l8tJKmVjS+XqWIN5sWUs9WMNit0HB/gZfmTuuvpwP7gjFuUjS2Q+jgYC
9ppF022c89tfs59OKVOjOQ9s2b2FlXyn4zn9AXI7AYGal0MNPRsQwnnaZJiTebyHcwtZucfEnh6z
9K9skBFs29qlMPNYsFP7y8mzdNhDng3TEgYpao3SPfXwDj/CSw/ObVggf8enRTUNlDfJ+17WwDyO
/ajc27MzTRLyBCCQhUYvMn80lvwSHxWDIL3xKvr2OLMoIAmgIZJG3sJMyhsOPqFxVb1Qk7NcojOn
D11t84xem8WyHJRbm0pbKV40U5U40scS0H5bcMWTEfGT4W0Mt47O181hbfymq/ykV0yIpouFyaDb
tUvUtKWqMknlkUxdllrfasNUWgJUfn8Cl8EV1Z3U5ABYiUNuRr5oKcdwlS7eB/n+UgV71hPGXiii
tFKvLiZLXS9l/eoEDDKLm6/8OksoHEEFzRFIR8skagCp4rd4fSGbOUietH2v8ecJdTlXFP0ex7TX
vh51q5DGduPDyv5nJCNInuPVn9Z9r55S/RGw+ySGAcaPEqaldHWakl5LrzE1/zI4K707/QMAGDAl
HQdn4RCGxESdD4HJn35p8o9hnYl7WqaHBddVyszwX//kjQ4qJolh4qp+txlSxnSJmCs83a+aCvMk
IbAnKPRH3SP74XCHOQ3bziFlRO0Q1JWSUp+e9CxVX0iTOPbgrB+wD9yT1o6m+o45pOEi4yqt1ZwB
6GRU83LP6o8j9UURxZDZ5WMgpNs4xuaPxAt+XstW7JOy51tYRnIykokiQYYg+aWP02kEZ7KL2cif
/t3AkMcRC0iKXbo3c1/h2uNlHbvkqXBOZnmGMzMriXwdE44Vt7izgW2oY3N5IFwqNHPtWi9SS6yA
hcD+oqiZ5YnDx8Be3R5HxKPygh4K5ePLmLR6um0pz3P8seQq1RKFP9ctf/u1v+7BlNqcdEez0X0N
I4X1lXx9dw1MpdfXfG2riDistMNSEH4Rrccb4Y/8cnRL9fh3mO987Fb0uI03HcxJiExzcwHZ9dco
s3vvxZTsaIGr2xmmD+LsMSI00fJFv0/mbMB3LLQfURbbNvuYtBK+fA8U8TOqSRvPYwXdCjv80svZ
ecFEkHhpXJBNTWSfUIzupFvHeVSIxo1FYZEy4sS3rdwokvKAiZK3rnzY+Ryed1c8On/UbN07w7X6
m6hS6lOKjYh+wxgHNswvu8N4sknoUX7Hwp9LBuU8+T0Ca/tOrCkICtK8kD5WkMmpO6IWAXUjK4Z8
/OmRAfzuhQeScqBIQTMuw2IkQruwSdfY/2ev76Y8v5xSi/gzcXVjJ6pNWe8NhZ5pL8vuon9u8D9v
ac2sfrz5UyHorqRAvNxS0nxaWXiYHYmk54FYhWXq/l06uTApLWRBji257/fX7WCJ6JtNeLLcAFYG
ui6Qlw2u4ilhoM33Ba9OQD+hKXM93Ab35owHIBR48oqnZlu/gRs9B7w/mQ9P7Aq6DwyYiEy7zN6P
zIrKF6PEXI2oo5vRRDZlhHjnxlG1qbQvhZImGO8R1X3muvsJ0Z9NyHew0PCSz7i9mW6rY2m1FJBl
jLOuJd9a+SClV8HYSGnNlxIsBxxS4kdb8pJAiZyO1GsyFurgT9epWWxp6MeSTru98ZQ2HxuKRPAh
LAyFLPqo+UCcwRFhd6SEMQhkLktq/u+ZRteg3JfitjOD93M8XsrOOZXAvc8OK94NqeYOeOIYfeiA
Bh8AZZCTK3Xt4QLtJ2oyW6gLSK/gyvC1P9wVOFLK0VxRCj7UL1ENqTGIylLsQV1EDrxvDeHgkr8n
+celZ0eo5oJZQc+yNrl6D8RLDaFfOndjQQuP1VMMLt/r+SCqzoIQpeaPzjqcZ5F2tDjq3vLL3JlK
L72Oet2zPrANXugoDIB6V4zLM77QJB3ICXMRSw3lLKHdoVR1fOZjH7lh6OFJTtre6FJuHv34LR+w
Sc62m9Wix3fNqnF2+9Qp1crzn4iR45vHd5J/GET/E8MKd44F0qOzeLFE7zgwf2+Iy6YZU0LJ7OWe
z0OlZFdrPEAemSaXyLI3Wg2c7W5Ef4UaJISjZfXU+aX/CFAP3KV58g4cgEfSs9fw8iuCFLuLh3Jh
GZg50idBZAseo6HiW0jDA4Nn9S03k0B9v1GqmSWPhP3YhzM/EK26PGYcgF0eivassZQFQSrc6Jil
NsS91pv/HNapigSr2eVnB1wDsPbMOeAWMefmfTJEy770FLL4nJvHH23BcLXTk4vQBAncc/ypOm8W
7K8vIx4OeBmtzlz+HHoN+Ki6SGNYfqwhxJ3Iclxi79j84bg6FlZ/sJmHW3B/BcC+MY8FKzU6WOYl
4ii86/wI6/Ymwxsc/fLpXuJgVnj1G6seQpKpHtSA/+fDWnvd7+23DNdK6HfBGZ+9h1HUSEREwoXj
99Lau/2+L3cctWkmre/U6dbCrUJx+9esOM4lxm0AgWGdwsmiTdhQhm1GO9efcz3nod2wuyLOoRFB
PRHCoU9xUQeiUOHk4A7KAbqWNnKmpYJRUFtQ3lyKzD1zt5ChuiYS+1trXUf0emVBc0RXJeOJM+oy
pdYUCtO7HboKltA1VXkzyJrTAnuRxZ1FiBt3NN7AswsisLqFyQAuddvPGzztWsE/T1mimJzTQK+f
f/Lv/B2HA5evVFXQh51vSrY2ub6y7UStyV1sLz4hRJqfnfYYtn4qKe+hiDORa9CUQSPNnR1nNwVS
OkQkOe7FGwVo2tF2pgxsVaObzuNgR5W00kvbG+HZrYc/VlQXu17CoYAXyKuimeuQUX6IOYQfOtOi
P/656J+ayneD3DdaM4CAxyapYpzyxTtzYw3d3BmLALR36ZccU/VhfYiHYcCtxg9XbjQuCmn0V9tm
VhQXJGWmHnrfgcSUohqw+023UH3zssHKe3HoXWtNxZuFWTm8uBN+FQJWwZg5o1SnFllNmOyhtpJN
XO8SRcSR9ghUC2PkIXtJSv9s4l9Gp1a1m77LFh4HZa3el3/C2W/EGR0B7R2Pzy8Y8kQnfhLd33aj
x06UIZTX/x5oFzGlrD7CuvF5JKo9vOIxzToHh5kdoOD6zjUKUGJYQquc/mE0DMReySwBHVcUIpLT
P0tPzMBnO/rCSMnc9ks+pckz6Kip2rnVsPX+HfAom3uAkz3m42JwY6b/bHCDef0RK/3WUac0dSKM
kEYtrhwBrDcHu2UrE9D4N3TPQpPhltMcgA3rCnJNzhStxgWfSGcSOX489GY3JX51jrPQ4KLwg3Te
uHo9coFgA7zxBD435Ek9ZfJZAcIO0Zt7s2uZwvFyTVmPWSIEW6daOf4f0gxbKYxTM8WdybNJXju9
AuBEu/AVDZ4+JGpSkGoI5khnH625YEMjmDdM7yC1jJKKFINwCI4JiWEAl64hmuHGoqBCRVIgMBYp
hCwZyPZsI1RVFT2dRHGrlaHOioCJ4s9qfl+jXm7NnHKSvxNcZuT+Ubv1PiLUCoGFG+sBAEE7OLIx
156yyQxHYKvnmGVKdSv1JDcqFOBTX70OTB59UidJY5m6HfaEtJa2TRtYd9dfiLW4T+bJCNByHVNJ
BP5PQ906S6hbtLHGTio7Jc/IK25r925Vil9Q71uHrIoeIOuJxTU2THyuDb8th3jMJAWZ28arIcD1
7zvWma3Osergrj5anOk44hmyfHWNmtZzWfjZ8g2mz5sCZf2xhx1wqFFUm2rP++JnqWZWqJpie9P/
FaUflE91AeT0nPFGzJobKS7vxP3YCIxqDXb4W+GNrbrMzqJv62IjXU/5VT55UrYBObNBKr5pNuPp
nl5/A4Sckp8yUP4cXgns9z450Dg8dC2rJeiALt5KoIAI0mqVyz6dmncs3964qm5zvqkhfspebtxv
+/5/HLRk1pKJC/0BEIG3U8PblJ4S3qWAR1ocDE72mQpK1S8J2OpVtmNPWqj+Q8XxAKeFhxNgDseh
3Ys+1h4JfwdhkuL1WuvUWRmr43qJQgrAU1dsla9XqNHMblQy5XDeZddFiARAWW3wQ5mQedn8mA5U
VcD6AFj0+myr/qmfSW0WZomoAlWRHZR8ww60cUN+wUjqZnXcQrMta/v0wrgmsv3Gm8XyHnb593L7
eG4J4D9wit4Xzo8ICB6DhsQ+QOfSpMQ+Uks7P55CB0dzcg3FIehDZWZfWj4jNvAY1gUscTVyYm20
ltt13qwaUWOMqO2BXOxzc3jQ7Wi51nA9iG29RjBhvOs8SIEWaroBNDKCGcQ3HvQk5wLRSMiGq6If
A/12iSm/sYD052pbIGYML2/C6RhJW3M52SyyIXliJtXn3B/si0AgHYfzqT0vXPlxQANLqtU76Uyl
JwP32T30MRjAm6qMdCDKPfadIidlWtpiNS/lxnet2Fgcu2RTx9pSlm5DVmFbm0VH38okdGyJDSIF
p+FEprQ9eDPqoUzNbjd4QlY9bph/Q/CVR7m8dBAbCFdT7pbH6Wdwk7LdzgRhdtDP9jIsKTNNte1q
GMvooCehfU4GiCw5Aa6s4ZZbQSVYuhRYgOHzovGzq1+5wOo7N2JA8vlRYSwwjVyUb2rqq7iWsbg+
JuJapgIlHZCoOngniStpVBvML3CdjisUnPZs7sdb7aLtZRCI8TsyQed5VNTTOv4NXqNYWssW/xWq
6f3VNQFk/gh7GyMyJ3d38QobBhLCLY4hmDK8JEZCWxIL9DN0kaLLviNG2wWKwZL2cD0vxQK+D5M6
PEIAaggXEQmwA138Km55S7ojd/DGbrMb9D+Sj/6WEvXGOXlRpGpFQu+ha0Zx9dB76EhCiH5bYq8w
bqILWA9l62keHeCH4BpTHJg8hCuBw91g8KmUfdeZqhZBGmg+jggKMotw4SoSSGVLhK21Ezgu6kSH
xJ58XYzSKRTRJwiPKrAW/4WoTYupBxtoBdz+SqQ84ip6iqZT0q/H92SSDYacziEwJ3uB05PxUTio
eQqXesLnKDT7FS0PXWpbQ6ZqpzZuwWNroQXXNu1J8npgWoFeQMl5AlAUYOaByxJ9IkIGyYOKvYWA
OgomT6uFDSlbXupq1moQTu5MMxn/ZMWnYIjBUqki5h/yxrMoUH85oCigWxdSG6HkE/Dlp5CORbr6
gSgkUnNa61GlwM8WyTdTAlnPRGGVdb1X4S8CEW5ZGHUyn/oCYY1HKlwtLQyyQeVplakXQCvrJ6kQ
Bg4uyIJgb9c+RoZytzND3ph+muOAgedD8oFvvTx3sNPkT//7bqD5QROXfB/CNgx/tsm0OEgPUtyx
ftKJXDzA7GJhHQNybc4wtemLWBnKgjvyPxxbdEyRdD4wobPkbKzOOTeAMstEFoqr0Y8H7QhkUQam
2jDhUkqJ284W1O4H/XuuB/Vl/qvyU9hoJQcPCgaBGFdq4QRDbpDlmpqlxXrXaHZlgWffJAnQn8Fv
sk4H4Ea0/WjIO8ifNl6SfybYK/5oIAIgUi2Nk8KE1m8gnJUPMXSYWsAeYkR6ybc3C9yJj6NzwSUW
CqJJugNELmiv6J9VPA9PaGQ64c+3pm+cpyDNDHQ1vY1qvj3nEgqx5n0Y39nCsQImiPV/Sg9yh2Bk
HQ4ZMwhLI+nFwK0OZ/zkh4odiDsOBE3M+kMnlZ5BJmXK2t+A59T7AvwpyVEVogCrqtbogq7EyP2R
/KoZIKfyE5vXtjndlUyZjAiNgpjTc1VakSJb07v4Jnou0T2uuBBVLBE8e5fRknL4orW7nwiNGR3A
FjSKy2+CMPD486jawdbxAbwfChXyeCLhOttQScZ5/UuJXKibAEIiWMO0zwi6h0787UrxLIJuioc4
nULkOdY/JKeviefRwjlnZY4q5i8h1F/oMT/HYeWGqrroYovXKcnUxbMWZD+jaopXwpKIKwV/u7gL
ICCVqIDSf8Gom4lbOw1ZcRZKLSyvneRHTfAaqVZivhe1m/wTbLuvizyo5v0fH7nNqAzAgtH7oirl
O09aUTNKpDm720Ay5sPItAEz0pFiZQIRDfWGCHCuuGaXZG0xuyl8ShQxJz/9BEeMVCPhZnOaNv8X
bNe0t7omyZMkSFNPR4U3evzcLjcuK7VEZZdMkX6tka5B3C4bRACtFyOeQCt79Xrriwjp3eDw8Yxl
i4ZnF2nnIzXhArnO3TFIuhZXD15yn9vVT16wMxV0rkzQ2P+1+g1u7aeDNwRT2xaUvdsFLGr61RsA
krrBB/uXlnDPWrMSIoSOLSTC16X9VfDFq7XtK2uA0BmKK5FJeWOI1ArralXwFlj8KdxJ0L25ro4p
IZhykME1I9BoKS3TjfbTDmfX1WVooDH5YBhsp3fnJjyZm0vZ9V7nsz7eC/en9E7r62uh+MrQsnxQ
HEOfnD5I5vsCo4FmTwA6lhGbUO5+59ZQ6busQ3Da/4/gKfWPi7Rx+7Y3AL2HiXlvnKxN32bezNjp
dYjFYXVPdjaFpz0GrP3APSdp3La8UFzXbVhLuwuv0mDPBPScpRdDo2G0X7gso054AFVY6n9p8tdd
5zYfJhmIvj/NqUn/wjbA1Ptn5IjIafceDKqCWE+o9brGUJBbmYQvsYtD4pa83lH8uoKqIULDiSXg
6yxJwmM59viy5qkaOJYrzsWg3wlO+PCkAvqg5HpLKFZUsQIYlmnRFiU2siCw5xh8Lv91KTWQE26H
JygYAC9Di3Fuj9L52dCNMgbtOCerVWI4RqUpIFnC+F3fY0d0urDChvfCB4v5ZfmHK7UQWuUl5DRA
Ncjw2/e3pwmVbyls0YUVrzdizPbhlKDJX7xzvC4K10nrAjnG++RxySdAOFZXubgPzTr62JQtSXmW
IIqO1vKeYP7Zb22j7YH/bXfT/F5cufY3ai23D7tEwC0XTRPsjTnkyjrFZDKy7H4jtCHGqFDihiKn
lzcjRj0nxDEydN0T3XZVLw1ckchidFI80LIRUz5/80zPxLB32RudBu90cckCuB1n8lnmLPij/zE+
aucm3Kwj0LLI/ESxyT4RR0eJrEyPbq9hWnKrwAbHzhPaF+fffQmkrsUci95u/+x5LJP6G4/zY5ZU
42fBuiz8uxbweZF5KyivG516l+EjFp1oi1B96wKupMTLWNO5UC4Axpffk4EKZEEns0gYRwpJIJRE
k8wuG63EMGWNSCTG/RO5z9NxoZktD7g60co/R42CBfts1WLyi+ow7jHsNlPv2xDWQd26f9hJIG0e
TVk9W8+8PqEnJMnsgKAfDu8qnlNGOsOHkqE+0aqrtum7PjdweTcx62yaHJffKPA9+xi5XkwSw90Q
gvLoWjJpXh3ptwi4hIt+bp5SLcz1MgCE3s+B9GMkZp6eji4CZRJ4Y8HsDzXziQLOBcJQbavNtaQc
TKFoacbgnSmdbaLo6XIalSOZIEQbh87hhxV6K+UWL1flpVWVAsJlAajEXmi7Y1H97PKK4PzSN+fr
yJifROBUNzCVFwmnra+Zipb4E5Lcxyic9aLP4yppTbb/i3T4qOrnXLKwuSrhJXSCcTyIRNfCOFlv
XN7teOJs72V0dh9L2Cz+VbtkRX0l6NYasCjX5gO0C9MmgYx+KYUX4dFrpHbbUVI/aeFPSRXeqpDp
Bj9ql3XKb0y+qM3C+ISe74cIUmyZPAsxtspP4l5ZqJ+0B83nubj14d/NJVghYmn7MX91fvjVASmN
lHcGwVvjoBHip3wjmlEjH6SoXc9kZSi06Y86jAP1G1cetsxKKdscQvvIUgoMDbTIh6hwcJVeWzdL
FeU4QV/2aGp2kibI09y/XFAZ2mNG6KrztPsjXWq3ds8FwxjebgVCba+YBkr11MEoN8SQGoQunHoR
wD0amqgzGzavEsdYCJ8t2cCLE6pF55bmrf4hm3BUaEi+H93IC5sJ2FrXcBTJB34BRd3BWFA4sQn8
EHoI6sWL/HNvZS+gmk9tJxOpZdOlBmBvL7QUxs9O7HcdiJgqyWSO2WiYWifPywrmOTezB/3RbwAO
kCUo352IbRcj3TrkIOubd3/438v4D7Ft3DhuapnoCgB3AiCh5BOxLotQ9OLv93+EDKzj/zShPRlD
D59DjxgDs4Iu+g15WT/OKtcR3zlU4vfTWVU8Pr0Rrd9q336s3AfGKPsXXriQ6NZ9n9r5uEGts4dA
CYsfvUEE6TTkT7HDGNd88HhGc9mYTrvIYqnxNJ2Dfxdy3D6py5NGKwO6Z/oHkj6jB0bWGX/iwhbN
OZ8Kc2Y/JJdWFNMlOGHs+2mgWXt6E5z02EvayLNFqqXbzAWxSJ4gVWUkRW1w4X6kYXnUfn/uK9T8
fyhoOAFAK7KnWzDARKpQjPRv4cyZKWEU8ND2VGBYHHhelKiwkDMuKr8qCOHoiTY9LsSSTJ0y3Om5
zPbN4R4hd7Ki1teS5VRo9DgtjemIkmKBmt9AVyH8O7supJ4F7fWQI9zIGnoUPi2/DYYul6u+5iWT
Nnlokkjfdc4WCCICsJu4zYJ/8oFwpYBTtAunbPpcyXF/jj8BGbtrurRFhOc9OHpTS5riE7CjTD41
SMNvyBkzXhdBL7s9fFTUr2SwP/m/pdiYt1Y8+cPm/1EIyP5d5UbuPMKsZl3LDwWXCMnKi/h3PD2z
CGJbKmdAx1uch5biRyNx6w3CCPCangeKeYwHKLHU3QjsWtCBfoAkwR+YArHSuJu8Xvtd34qhtsiL
s3yC9fez7iMXGfqasfXLzwl/T1pnQLZ2q5XYcSmbjHxP/9A27xwKycajveYOqzAvM3CRfiZE8eY6
nI0NQlJ53WwU2oTg26Z6QRQe3XHyzBwou5E1nBjHU2cxdKlVp9DtJEqKHiY19jXJ15FW+qthh9G3
7MbDqD0hJC4kwh8UFZkjzWYM6JzvLGwdsQBfme8bOryRIVZ67tt4bFVVLM9FXD4pW0GJ6ORp8Tdi
4nJ6S3aD+mYkO9ofUAzhp1lc820p3nSEDgqvhWKK+V8arvQArAOVqlMsfcrxjTAftF+gupUsk4Uu
x+TuA+NA2OPMbOvrKHF/9q/bRDZFWAK1pqkR/ayn+Hr9aqdjxKLKLgWR5GJILTb6RvYPQ7C4/P9u
ORGmHF3yzCa8y0jOFH93CrTEfxSjBF0EiTlKkF8k/2JU0TKPm5zvg6slp2L/EEy0ydkfd2uVivJM
qWFaC71OR8sCvnHywV9Rqc/3Z5M2hIVDYOyota7W0D+EpXlGCDVDQTpNeGWmOLMqNfWr9mWdkNpv
GYuGydcdMKsPCIlXc1LGOaspNv21aHliav8RjakyVwcswmUhf4ZBHyByl3pyxgpm9fvfdXUC4KzO
tu4VTi7sGKg3DdJhVLw6k/2u2icZUQJBG06UWsOYro6lLEAa68zHBoXCTBDX1LdBbB0EpvjZGyiV
uRE+GXFmHrA/q8FCObD20V/4gXKXk96VrBgMlOCPfO4TJLu2BNdhasrxouG2R9Tf4ha3DpYB5Wuc
u0SGgldtDs6NlsmbqCFk10eYfWxWmYr7FmwhHlxzl9F8T97rG2QylnqUtYMDx5M9tA9+oLYxWA8y
A61+YQeWWM79SjgKWslaAG554is4whtWWKHUsHr1n7NYjd26Xge/QVwVvSQh2RwbfymuNEN/70nO
f5l1YSAhk1y/G3FFQ3eccWGONkdgA9dS9HZQR7SD++bYaL7Y31aVlOxtswK1jcHpFCTFWeChLhpk
DhoqBem38sM9At8UHDlWF7FnNAdhktmFUDxRIqNrYrFlhR5Ay5crXOKjDrTyb8zQYmAalRw+P3dt
9fkWxL2T6HAMYBjUAvwxPOx3FXGcW7dkxacjYVhZ47bVwupVqkgXiYkIDfmm9tjzFNPCQnIDtgPR
22s3BLR4rzfdd1W6ClCfGZ33+Lcvtdd9Ki+ToBL4StuX9+m9nY0eq/rislQWncvUWRVJfHsBK+JW
b3dfPRlF4ThV5RejfaAqeMycTNOLFrA8X+xl3fZkznaeVNrgkR4kwoDX2c2Y4oUWRxg5an9f6XME
h5UtbZe1NWmkPyew4JFdfnNc+OItFmUqcl4XQxzLtu/yeQzsZyPgKfKbrZliJk7r5SqcKVjI+1/u
BssgQeOwTpFRPsa2skTlRCvfxpFwBXYQOkncuApZXm3H9ImD8i99TkdhAZ8NWgiMGx7rV2J3CCI5
HsIp3c31R1wqeIc8490LHA9lTaqll7qbFAsnlPCl3H4sik7s8zflMICkU+efqDw7eZ8f6rqVVVmh
MVUYBnN97fby00WKxxnfX/5ZjKDrN6aiFvfS8tCxuEgaYRk9kmkIXugVN6NzveA3HqSOhYMhKGKe
JFqOwIO7XaEuFPVFmRdwDreq6VIIsQvspti8FGzLp515iW3yBgfqUPz9yQyIEyzKSjfIuGcnc+Nl
53FjdgfO8sHjhl27ZrqtLlZXmHNt1QTIbla6eWi4A+ANmMq1Y82B1nJa/3DKWjO8O8ikeS55lE9/
rBW33a5rSwc91N8sK9MH9ltCWqCHzi9hh4nLPXYs0p63Ba1BX2BTEdHAMiV/ok7Gk3mE/xrbysXB
OsHxm/PTXLq1Oruj9e0Flq22LadcL1O/ORC4JSBOiiuM9gr4TqV/gDQtqKIIrYkM54hiOOsqqolt
2A0D6WDStP4Izq+kNwgo0WAOXA+JYOGHTHHRtkjSjMynoG6G7DtSNojNuPwXQEGyf2gtzfNWlyT2
XjOd44j92KD+xypnrDyiuuF5/HDY/EZqe/gEX7eB0n+d8POCNdlF0wY1m7sTcWRKbBWi+C4uj5nC
B0jFvqs+NEuIq0GN2tFo+Ec5OXuEP6EMYQGl1ODp7STVcqPqpma0n1YREle+zk8moNQW89cr0XwL
fAAaYcVNtR8pt2SOPnBu1ud25wfn1rf7gqp26RjKDz3HUT95C5RC584NThsfxQKdq5N1R+TRBfbA
LnMrcp9/gs2ZbcUq1Csl0IU5KbrWEzyG2Jkhrv1u0ZtToppSSSL0i8x5a5XjjkFQH6v5b2FdX7IJ
vboF3oVcuM4hjOKvru6TxveJKkRXAKn3T85gpZ6tqn9lWwIB3/VBbRBTulbAycK2aXgR41wbOmXg
QNMq39AVJRBU+wOnxXZr7+37NKgMNnKWvvc09ArGGJLv+Z8L4TP45esWft8psoczuZxBQjOBePHz
HnfM9/zkXAix763TqxsfjxCJJO/wC44vt7vQdUsZyVRYVoOgvnWad7bYV0tAORl3NjzUYDu/7Obu
WqBkovNas0ezzlTAzKuzlo5uxBonTn05kRcFsil3TfNLmAyO1pvn7UxNpbytHH9aAgi8kx5iyHjI
icVFxq6wt3jZ68/S36AKm2Naq1kZva+2TmU9hiSPQVVKpE2EnC2j51C+g2m9/apvF9lg1PQG/Omn
0IjWfrKAvR5i1MY4FRtksBpFRmm6vTYYcgXQohY4UYylbtw4v0ehzx2zWObmMXQkKwMRPi4tmoh+
q3pjDIws47VK8TWzDXuBY0GVQ0cty4xAUtzKd+NMYMqlzZxnAFEpu6jhaQq6w1LzfqWZnbl+1Ext
1NJJzOnKdPXbHlTD1DVoKPiK/9lF6jsvBmrphNXTr5s5JCLeqR0pENXQjtbZJZg8NpqEJzpiEEPC
MgiDFdPFY617TuVFl7NyyUehhnBo58hv4nU58I05y3YgWZ9eB7j2Pa2tlFhqo2b0bV3Wu38WzmBg
wJMu3+aKl2WkH9KRNkmt3gjDQSDG05gGaXl/6YKShvF8dfZ1sKiXXldXHqPH3Mk9TovBoyQdLGFK
HW4NxnjJDBIar/Qq9w8/gIlFAfiM1EG3D7XH7YhK+8OVXS0edGuuj2qsHaOAdp4HX4qWum5KqRvF
vYpmT1YLBHzUJ+tE/5oZUkk9cVP1/KO44APxW6dKTmbGj5HlMhR/DdeK+cRGlMAjFo9BcDdL2k+j
OaREG08x4yWQ/7Z94F/jlNUQeZiO+ccDNPVjmqNk+k3t5xtANrk8PesyWIs6/kziY/mEC9ozlx4a
J23X7ajw1HBSchZGBr0STwWoLZSz8yY3wfaqmO6j3ofzFeT778MV5efqiZKdOJqNjvQjOqEBpS1O
gRPjdQN14G+vee50c7cOmWF8rpUErCEJbtRotTUsZ1zewOs6b1ALGrpT8dZ7zi/2SWKsmn+AvAKN
4PzVI+0fJEqfYc9vuaTwPNb6o6rFvfbpGw5MOBCYUZ9XqywtiyzSlRNbECgj59v3X8GN2OOZmElV
V87n29XnqTND0Rb3EprztQeoMLMHFSKVPMkPzbdyOPMsDU2rr+tkD/sHPQpIDze3cIoQiT9PRrQF
35sD0nRiWngPOc4VxIJE9h2ITen07Rn1PQy31vcOVn0HCYBHpZa2fiJ4lU1YRVzyVZfuGDldE0tA
skEDnkOA3QtsbofmeNZIG8H5jD4vdXW+tk1Gb7facgTCLt2aL5K/zXEQ348EZTSFTgIxNeSi0JJS
6jGYW4/Ye3FLPeUuy+ZrFF8+ZAy8lp5WaiFO6xYQrRrR2K1Qu6faPBUD+RQSF9rtKHwSwLZyFOYW
A+VYQUUyNadoSx8tx9Ll4d9XBdOoDxHEgHd4nQ+N/GnZpOlxmoTK2U4z2TRFQdUJpFLAje2x7Zhy
/tyEc0VZ721GQ7VdIjevzlyYrZla2Mol3eELzY1wJrFGa/22gh5HN6pPvoMAUg/qLk46b5E6CrIE
VLetU/uLZZf1MMviF+iyKXWtJol1MUbHOVUGFrUb64eYirmuP5WylzxyRZs9lL7y1Uj9xeBJW13F
CnSMn9Z9szQVCtYNzdvgJN0h9C2zF60bGErQO9IVjG6ZajTfZttjNP3gB/dUunKBtjPwd6CSQDF5
9MRc9x2CAQkWj9oiFFZLLykegY2erht7tHrduDP6OUvsxynJNUOlhJb74k4Zha5aTl7appcs527a
IpIy+01oKZ7bpLDDvRDpT8aooRVVg/63KQWJpg/ZjfE+i2dpeaOlVHUcXr3WFkQuT62enDNFs6kr
m7TpDBlr4U3x0IRGnE2zburjcZJ5w/MLyt9d+Pc=
`protect end_protected
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
iisr0ydwFOm3eepmhOYSaxO3flYpViRsLN97vKyw+ai+x1TubmaH8qRRwK/QFeVsjlGTFdxookcr
olQwv0bmdw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
dJvTzz+PoD3n2Ot9SgKfpEhIshJxklhDhS1tYcrcmprfs5wN+lN+5Y+o9jEEql61IqDkJEIGu0xp
zaDWEeMqwkFuovmZnp/AnbrHb7R/19zPRtwSyZ8+VQRLsRMgscwutXu29fTUST6Ribitutae85tQ
1okc5mYK0mcSMIggcMg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
ZijKIWnBSOuwn6R4ZrzJp1qaSPGZMrP8GTp+SV+Sn9xEivGxLJtGM40xMLXxiYuxIopDD/A1usG6
HkSoNT6OzxHJWKkUEyyVzrZuJdNHJ5q3s3y5LSNY7eMxN9lY4/gygh7aVIBAO9YWzsWu3HLtrHA5
2vsUFQxQdkG5OTLVP1rH68P4j/dhqr/LVHw+9H76c/knGyalpHLRC7tnHQcfuezFJWlkzaNGHfUo
b5cE1YTvtdlZVmw2sVG/GbXIRi5fq3+Okdy+JgckZ4dVWbI20rfa9LkI09/kwD3anyrnovVQVx9h
F0AxolVKVVyWNAaSu1fvXllqzrdJiRLbdnsq0Q==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
LUajPw/jRTLlmEKb+9YylQ2jxw4jlSx/1GGaY1wFfWFdMwK2p0xvQMjui8K3EqJF0fnb3QNWuQDl
1vTtf04vcOAHkfRCeW7Mbp8qeUTtAsflGIPJDxHfVU8ZKprwANsENc8LVrpJ0WnjDFQIzJw7LDqc
Jj2TofWjKprdxXsMnu4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
KG6kiSPrd66zvVpG96eKD+783ebVLVFNF7pXgq+rCyBBRoa0N9Hp3DIWK5125mkICodI82zuSq6k
C8aCiPbDiv4tiuIn19WDNNPL4ncknL0KLZTLAkq0BIQIsnFNRaZegM9aXOdMYGKYLpnjSD9KRWRt
WPXPZfwprSu2D7PeDZMiij3MY+cixttgVmNfcx9Kkmvg+1B5sTSDTVs3fqpJBBO1YslTmxyJAIC6
uDuGqvQ1138z6f4f+f8vMXratK1Ypo3jPPb4FTNLYJio5Vd1Nbpl9kRRtj801Ie0GGhbggK6IXJx
785o6wX6g3tRyoHXGJ4DGUmWlIHATg0KIAflYw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 13424)
`protect data_block
rEtV4Bm3SmvVbKq1runp2SaaO1GImraXNQnz2t97NClVhlTBGZ14v+hHArmsTHZNME/QWduIEcCL
I8GdWPb/f0NXI5m0D8vUM2MFHCnzTFi82f0pjwFGBVpM7cHKBa5QRX5K/e5A/9KwgbwYV1tKqTXG
aWyx6JRfuzQINO3rQqM+n/1b6LSLygDM1QuiPthpMFKV8IfsVkaLDVqcLxH9/n7C64aisv1xK+OH
WhYRETSZok8+gbvdGdr2+VsE64ALl3DavNBK4S7IOGP5YtXviHmw+Qb/lvl6m+RggRYmTe1A6B5r
pghgGDxK2gS0ItU55quFmZMEuEH+bwLuaJA0/UWR19oWnbcTZnsCqEeN/xbKUzS6blm1K6RPZtYe
WSGhjFl0cKHEQe9DfEazTm6tS9mJ55lLbSuwE5o03LDGRapxUdSR0IiKy5C5UP4genzVw3zearva
qPWmPeGZcAEyFioI2o4OWQP+8mFdbza1kBOuw4BP76P2c+ij6wbxXAWVxtNmL8f6AgS1AV5SqIO0
ftTCve0JloVh9kpHsbXE1TS45+y0IuiC0N3a8PAEsXa/tnLsnAydpsXIQwMLXmgKfoXKzabAHHdI
XZJd/NxD7+xY3aINMVaO5eSSLIdjkYZIeqm6qf+x2eNd9v2nue3I9rjHkjMBIty9wqDCI5HznV19
h0aPmdRn9t7Ft5xXq0GXqSl2I9ZROoM4hg3RU6TCVY4IaDkErgP5cMhIwuHsntmeWvsvkZFygQtU
9TUaf90O9HINFkrdIHf0ZCgtCgUw6ffQNPAkw/6MaoKxm9wdczGi3ur+eyRvSLy7+LQX/dOqvXKM
9UFNjkQk392HWfkT8aaXacuJgFT4hmoEXDGY+tSqQrQRrPmelj+ksf3PcI2r64RSTjiR+9HNqWqJ
jPJio2xgGdQdGrH+UewLz0ySmNDYmqxIdyqKfv/B1BYMUpGd+l0eRCp0RwjP6nt7MKkBishuJTL2
2kpCGDQ4HELrlovnj0dMihRpFZAIpY55DfNVE2hnbkHthyDrEXapmovyPqDFel+HKDdimVyeM8CR
DKl0D2+OZK8XWAiVk9Ve6w0rONvwf/XvaAkgxa3rDJQo/8g8oiGRq4ku5l3OZUKrPVRcjVNCxHRq
81RLF34Ztt0FyGvWgFBPXPwl/QfIQcetnIv8BBHDyYvjjUEJZxJ0yVIBqSipzmyIn34Kt0GvhgJJ
oXsivJz4IQp2WiLYnKzv7NuBWYnOF+M/H8eFTLS7ynV/b0CRf7qayeeaKYL0uv9mUeXbILs7F9+8
XkemV9ihHFfHS04009LEbIzG2O13pEZ78n4YAi47TmCv22T8/Ve6sSAGowqE6FfeksCmQ1+Z98YQ
uXIyCDvF0dlGJwZxogjNRbjyCBj6OOagNPhSW71GcVdRv5XSPoZsF68V4hWQeNb+itDo7ZPtZJoJ
YzLjFDCWp+2G5a8+OtWGetlJNejx9rEDOQvPXNhCi9xzzzSvIevRpnt9XX8uVwzzSJnKhI91LgRg
ID2cjEMis7S70eKGvR2/KBOhU/KAbsgGALtSpbd8HPFqo4CWuxEHCYImqvt7m+vI7jIEpXbwjtx8
QWNgKL8RNSViXrcj5CsXvOI28Nk2V+GZ8jr1/8I4R/Yns4Xfj1TTWzVeNCNHbazn1nufigCGV4Vl
qtDHRGZpM2GzgWRsMj5tsZldV3pp52C/Dpr/92KUqWKMf/mZbYDJL1X0X2Tw7iboFgBgx1miq+ht
zrLMfkmBPAPakC7uTHv8wdz7HICGyvCct17zvGp/b+9c5KI7lCBCd9jn5PTW35q5ksO4eC9R2AqE
0xJmD9GKB17q8Jk7vlAMs/IJV9rgMDnRfyFkOl4hl2S45SaIY1ObTSNIHJYg+rp/nN6BMaWKrR+7
O6t2IjDTrKFkfrU0cMF3G7EiQSf6RI1d8iyqNJLJJ3fbFhF7XLnn/CwlkZ/03Hwn1nJocabXwbc2
9Q6RrzrxLCWMZVoXaUEBQvapxENHsyZOrmSevUQnuCknCx9Eh/GwdP2bYVHxXWg7ySdjQnVMtR4v
qT7n0yJuHI0ite3a92Oo/MBdlgCwEcxfvgz0ILRIK4wFe098lGOX0tVEsLdEUijEAeQR38bksd9a
fuwZzPBvMZQ+FON4CQYrDg971r8Qz89ArQjVxWF7TdD0Oaq9vaUrLocNzIw9AcIy8rWaQnwTR/K0
PsXLapKx1fOSZnuztuMHoRXGaqZVlZJGs22/GiJA9y/IBflmF5GNFnRUbXVT8r+FfMb7zIr8eP+b
OcPNp6F4kqt/b8gae/9JOIopCuWXpu5kDe0U5aC2qmvMuYbNI88aUx34i3WHd8NWKNbdtGDaQ8nM
iyuSX4j7EgwTOuBR/iFM7rZAATM59ZFv+9wRq8hbXVvfsBp13upya8YovLN1O9OWrzxUWym9ZPN1
mDhMT1YgOqVRaJ2ADyjP98UghsOXt6ybu9jGeEndP5T4mZjxZp82OMxqqS6VolaMbGRNPa271n87
65g6Q9l7RYtOL1PjdBOlgNpUdYZwxJ2EGgI1wPnrnuUiZ7sdhpuFkhJDdh2mHYlIUZHAsriLKEHR
XOdtU+Desuf1ojV6OryxMP052nRo3DfSj5+dKgSFWVXGLiS4Q5dQxDHIvUugnqZqf+FK5inrMME5
1eHWMPkrqY3H9syJMZ7RM9SwYc/zjL9fOqr9mE+npGx50NODLrgb0FydLIXRotOtI+YSbZHKzsKt
xoZNcJJ4GasWF69GNvRenQ3kp1eh71xjJw5a0KZmhsJJXThZLqSzb/sTisTU8jCaMh6S6ag0knK7
jonbXo+dctsmQfLpvLXHN4TNqJnY6alIH0HnsTz7EklgiqvaLbFn+25uUJSNDHESZG2BaAtNvG/4
WuvQCSLWeuJpsrPd+06Bzmmnlvn9InJZhGDVhnZlfj7Kh2PolkMjpLgzqH4f9hm/7zH7o7msjyvZ
Rj/JnTghr2ou7m5Ayp5K+yFEUt/y9WWmqXlKOpf12P8RITbx8ILm1kWRqB8L+xfF1r2HXt+av43O
pyKFj4Kq1FZckfpg2It+beWX2P825O6hDubEjA2RyF/zyyc3lMSS7vtAQMEOEJnWNslP5r0po6TK
F5+Ikch7kOxVShNh4LWWzwFtJb9SBv0iFIezeCGrgApE2blMwedVwOdpPdPvsQjNRYc8YG+dStcY
JUIrNMdc6m5qSEWO36XNGXLN/ZrjKkZcCr+z5oN8Oa4cO8jxqZo5bZDRVUh4VXM8a+hHCiVvWsEG
HkxV52NFazh7Duhb2Ix5qYigebEWfDnA3frHeY+lRAIE3+X/YoDjgbPuOqgwawkAvhSCeNbNxuTS
T9ZzmE8PWRbDowhElwhdboesSdX9tyyp7yCSM6fxKFXbUrPplwsSNsMYsJJ9grw0leD0bx4Cd0Vy
Y8dDayiLLROqmsdsKe7b4i2o6u8A0RQrPB31DrVO/yPiNygxChVesembc822gDnOAlf6FO502nEU
ItbE4EyM6ZuRk+69RSoT+2AZGRndh55WMQYb6i7ALzZeSttxOh6V+LV5SNYYdeQouPNdd+N45DZn
niJzd/11g0AFDHSZFxMK9p0VsOmXbAPFEjcTvMS7PiMwhUsav6ZfZjkVwz4X9s1v8DCZpNbKSq88
kGJQIcZYRdAPuD7V1zvdo0Zf6leEwpYg5lACMpJ8rGWyLPBrYD/CsWB0THjSjjkRntpZXUTF5Sq1
IPSYaQtCSAHZKO95giPeqw3zw2XQ5ci2o+t0eS1YvmSPlvMfZRnkdx98t2mA8ABd64gljY5f+0O0
px5Pec1R5VTiPNgghdEJlgrPqQxSP7vDXo0dtJmtqeP90QCRgaOqEt27wpqzv0KFUth0XwtaJeQ5
dejR/hEOliBmBscgJkx0gBF/nLybnTcQ6xwwOe25uqhvJIiepSDJE4ICrD/MSurrVfozreQGinSL
a/tMurSZF67eavaP5tFe2G44AmkmV4WBRnOeWOW2dJ2Q1sYHMUzfnWjdSw1sJJu6+Y0fUowVqq0Q
K2lcfV1v+sdb0adNWmXRoPrjCpXnMpWUyUXWCaY8r49ipi+4TCdxE4p/IUZfO1aumt4+xQcBT0dh
t1WR18HGPmHp719a+JPxfWkOQjw5JnEukkqxKV6fqJPDzGrHDJvrkNy1tkX0MN6Z+Olw//0xoyyG
9SEwAH72HyUlbfM2lhwM9N6f4cr+CLxPF2At8ppy84kKN/H+2RDt520oTXKCcGFU/txd8LdCs9qG
3diwadeKrfsinlzq/W+3PUAPHvjHcwRyRb4m4Wv6J0kW7ItY1ox7z91NbPGA481MOKLtCEwm6vuk
sfLsMi7+T/Hm+qsOXlQ9i8Pf9VAE9LWS2byZEwPIYDYtbLm2L09NRsMgfm6PotDA/9WaPtrx/CrM
IMllkwsRz86jBnsfx1s6w2v/gxQFWv0fY8mf1WywsWC+WArpCmvfHO0WMIJtyS/B+XcdiLdfrrJ3
qeRMJy8lhDn9mvRTVYzLXtu6Fv98eAxRiP4hPmT4+kxhTz4CT4cDPP9YKhdzODoL28xWfAYFbD04
Z7nP2BAp3o1FR08u/ctwg8oxDjcRwHkmDHquzKrPjnQBKXv9IMSCNsR7asFA/JqdhHcmuKZg6PRk
6XzKLzz1/Zs3XVZ/rpAcA4yoz12/yPHmsazO+a6cgbZy7JTSwRBhRd31L/KB4M7WXzNJ4paZAsOI
O5FWmQpp6eEyGGXpKkGy2qdqVRuRe0IjzwDJG6clerafsgCAj755Q2eTRVVvvRQw+G+hVjqaFu/+
m9KSJt+0hjHW1BHC4wyHN94ORPERUFukKcxOq8a3C4r5hTOZW3XWq1v7Ks4H7Zwi4AlNCGUKQ0ON
VSZKVFl61F+tBDQk+IqFz1WMfzhOfRJYfalfeqp5HOOIaK9cOhXG2oYdhceL4LDJlhJPAqpAc23Z
G9mCLMh7l3PvdGUWIx2s5Z4EpUsaxWTxxqD4a+cGuaZLzeV55zSCZ5qehwrwRTYvoBZE1+lOXnfi
Ryt8wko4y/GJZL/NuHI8l8tJKmVjS+XqWIN5sWUs9WMNit0HB/gZfmTuuvpwP7gjFuUjS2Q+jgYC
9ppF022c89tfs59OKVOjOQ9s2b2FlXyn4zn9AXI7AYGal0MNPRsQwnnaZJiTebyHcwtZucfEnh6z
9K9skBFs29qlMPNYsFP7y8mzdNhDng3TEgYpao3SPfXwDj/CSw/ObVggf8enRTUNlDfJ+17WwDyO
/ajc27MzTRLyBCCQhUYvMn80lvwSHxWDIL3xKvr2OLMoIAmgIZJG3sJMyhsOPqFxVb1Qk7NcojOn
D11t84xem8WyHJRbm0pbKV40U5U40scS0H5bcMWTEfGT4W0Mt47O181hbfymq/ykV0yIpouFyaDb
tUvUtKWqMknlkUxdllrfasNUWgJUfn8Cl8EV1Z3U5ABYiUNuRr5oKcdwlS7eB/n+UgV71hPGXiii
tFKvLiZLXS9l/eoEDDKLm6/8OksoHEEFzRFIR8skagCp4rd4fSGbOUietH2v8ecJdTlXFP0ex7TX
vh51q5DGduPDyv5nJCNInuPVn9Z9r55S/RGw+ySGAcaPEqaldHWakl5LrzE1/zI4K707/QMAGDAl
HQdn4RCGxESdD4HJn35p8o9hnYl7WqaHBddVyszwX//kjQ4qJolh4qp+txlSxnSJmCs83a+aCvMk
IbAnKPRH3SP74XCHOQ3bziFlRO0Q1JWSUp+e9CxVX0iTOPbgrB+wD9yT1o6m+o45pOEi4yqt1ZwB
6GRU83LP6o8j9UURxZDZ5WMgpNs4xuaPxAt+XstW7JOy51tYRnIykokiQYYg+aWP02kEZ7KL2cif
/t3AkMcRC0iKXbo3c1/h2uNlHbvkqXBOZnmGMzMriXwdE44Vt7izgW2oY3N5IFwqNHPtWi9SS6yA
hcD+oqiZ5YnDx8Be3R5HxKPygh4K5ePLmLR6um0pz3P8seQq1RKFP9ctf/u1v+7BlNqcdEez0X0N
I4X1lXx9dw1MpdfXfG2riDistMNSEH4Rrccb4Y/8cnRL9fh3mO987Fb0uI03HcxJiExzcwHZ9dco
s3vvxZTsaIGr2xmmD+LsMSI00fJFv0/mbMB3LLQfURbbNvuYtBK+fA8U8TOqSRvPYwXdCjv80svZ
ecFEkHhpXJBNTWSfUIzupFvHeVSIxo1FYZEy4sS3rdwokvKAiZK3rnzY+Ryed1c8On/UbN07w7X6
m6hS6lOKjYh+wxgHNswvu8N4sknoUX7Hwp9LBuU8+T0Ca/tOrCkICtK8kD5WkMmpO6IWAXUjK4Z8
/OmRAfzuhQeScqBIQTMuw2IkQruwSdfY/2ev76Y8v5xSi/gzcXVjJ6pNWe8NhZ5pL8vuon9u8D9v
ac2sfrz5UyHorqRAvNxS0nxaWXiYHYmk54FYhWXq/l06uTApLWRBji257/fX7WCJ6JtNeLLcAFYG
ui6Qlw2u4ilhoM33Ba9OQD+hKXM93Ab35owHIBR48oqnZlu/gRs9B7w/mQ9P7Aq6DwyYiEy7zN6P
zIrKF6PEXI2oo5vRRDZlhHjnxlG1qbQvhZImGO8R1X3muvsJ0Z9NyHew0PCSz7i9mW6rY2m1FJBl
jLOuJd9a+SClV8HYSGnNlxIsBxxS4kdb8pJAiZyO1GsyFurgT9epWWxp6MeSTru98ZQ2HxuKRPAh
LAyFLPqo+UCcwRFhd6SEMQhkLktq/u+ZRteg3JfitjOD93M8XsrOOZXAvc8OK94NqeYOeOIYfeiA
Bh8AZZCTK3Xt4QLtJ2oyW6gLSK/gyvC1P9wVOFLK0VxRCj7UL1ENqTGIylLsQV1EDrxvDeHgkr8n
+celZ0eo5oJZQc+yNrl6D8RLDaFfOndjQQuP1VMMLt/r+SCqzoIQpeaPzjqcZ5F2tDjq3vLL3JlK
L72Oet2zPrANXugoDIB6V4zLM77QJB3ICXMRSw3lLKHdoVR1fOZjH7lh6OFJTtre6FJuHv34LR+w
Sc62m9Wix3fNqnF2+9Qp1crzn4iR45vHd5J/GET/E8MKd44F0qOzeLFE7zgwf2+Iy6YZU0LJ7OWe
z0OlZFdrPEAemSaXyLI3Wg2c7W5Ef4UaJISjZfXU+aX/CFAP3KV58g4cgEfSs9fw8iuCFLuLh3Jh
GZg50idBZAseo6HiW0jDA4Nn9S03k0B9v1GqmSWPhP3YhzM/EK26PGYcgF0eivassZQFQSrc6Jil
NsS91pv/HNapigSr2eVnB1wDsPbMOeAWMefmfTJEy770FLL4nJvHH23BcLXTk4vQBAncc/ypOm8W
7K8vIx4OeBmtzlz+HHoN+Ki6SGNYfqwhxJ3Iclxi79j84bg6FlZ/sJmHW3B/BcC+MY8FKzU6WOYl
4ii86/wI6/Ymwxsc/fLpXuJgVnj1G6seQpKpHtSA/+fDWnvd7+23DNdK6HfBGZ+9h1HUSEREwoXj
99Lau/2+L3cctWkmre/U6dbCrUJx+9esOM4lxm0AgWGdwsmiTdhQhm1GO9efcz3nod2wuyLOoRFB
PRHCoU9xUQeiUOHk4A7KAbqWNnKmpYJRUFtQ3lyKzD1zt5ChuiYS+1trXUf0emVBc0RXJeOJM+oy
pdYUCtO7HboKltA1VXkzyJrTAnuRxZ1FiBt3NN7AswsisLqFyQAuddvPGzztWsE/T1mimJzTQK+f
f/Lv/B2HA5evVFXQh51vSrY2ub6y7UStyV1sLz4hRJqfnfYYtn4qKe+hiDORa9CUQSPNnR1nNwVS
OkQkOe7FGwVo2tF2pgxsVaObzuNgR5W00kvbG+HZrYc/VlQXu17CoYAXyKuimeuQUX6IOYQfOtOi
P/656J+ayneD3DdaM4CAxyapYpzyxTtzYw3d3BmLALR36ZccU/VhfYiHYcCtxg9XbjQuCmn0V9tm
VhQXJGWmHnrfgcSUohqw+023UH3zssHKe3HoXWtNxZuFWTm8uBN+FQJWwZg5o1SnFllNmOyhtpJN
XO8SRcSR9ghUC2PkIXtJSv9s4l9Gp1a1m77LFh4HZa3el3/C2W/EGR0B7R2Pzy8Y8kQnfhLd33aj
x06UIZTX/x5oFzGlrD7CuvF5JKo9vOIxzToHh5kdoOD6zjUKUGJYQquc/mE0DMReySwBHVcUIpLT
P0tPzMBnO/rCSMnc9ks+pckz6Kip2rnVsPX+HfAom3uAkz3m42JwY6b/bHCDef0RK/3WUac0dSKM
kEYtrhwBrDcHu2UrE9D4N3TPQpPhltMcgA3rCnJNzhStxgWfSGcSOX489GY3JX51jrPQ4KLwg3Te
uHo9coFgA7zxBD435Ek9ZfJZAcIO0Zt7s2uZwvFyTVmPWSIEW6daOf4f0gxbKYxTM8WdybNJXju9
AuBEu/AVDZ4+JGpSkGoI5khnH625YEMjmDdM7yC1jJKKFINwCI4JiWEAl64hmuHGoqBCRVIgMBYp
hCwZyPZsI1RVFT2dRHGrlaHOioCJ4s9qfl+jXm7NnHKSvxNcZuT+Ubv1PiLUCoGFG+sBAEE7OLIx
156yyQxHYKvnmGVKdSv1JDcqFOBTX70OTB59UidJY5m6HfaEtJa2TRtYd9dfiLW4T+bJCNByHVNJ
BP5PQ906S6hbtLHGTio7Jc/IK25r925Vil9Q71uHrIoeIOuJxTU2THyuDb8th3jMJAWZ28arIcD1
7zvWma3Osergrj5anOk44hmyfHWNmtZzWfjZ8g2mz5sCZf2xhx1wqFFUm2rP++JnqWZWqJpie9P/
FaUflE91AeT0nPFGzJobKS7vxP3YCIxqDXb4W+GNrbrMzqJv62IjXU/5VT55UrYBObNBKr5pNuPp
nl5/A4Sckp8yUP4cXgns9z450Dg8dC2rJeiALt5KoIAI0mqVyz6dmncs3964qm5zvqkhfspebtxv
+/5/HLRk1pKJC/0BEIG3U8PblJ4S3qWAR1ocDE72mQpK1S8J2OpVtmNPWqj+Q8XxAKeFhxNgDseh
3Ys+1h4JfwdhkuL1WuvUWRmr43qJQgrAU1dsla9XqNHMblQy5XDeZddFiARAWW3wQ5mQedn8mA5U
VcD6AFj0+myr/qmfSW0WZomoAlWRHZR8ww60cUN+wUjqZnXcQrMta/v0wrgmsv3Gm8XyHnb593L7
eG4J4D9wit4Xzo8ICB6DhsQ+QOfSpMQ+Uks7P55CB0dzcg3FIehDZWZfWj4jNvAY1gUscTVyYm20
ltt13qwaUWOMqO2BXOxzc3jQ7Wi51nA9iG29RjBhvOs8SIEWaroBNDKCGcQ3HvQk5wLRSMiGq6If
A/12iSm/sYD052pbIGYML2/C6RhJW3M52SyyIXliJtXn3B/si0AgHYfzqT0vXPlxQANLqtU76Uyl
JwP32T30MRjAm6qMdCDKPfadIidlWtpiNS/lxnet2Fgcu2RTx9pSlm5DVmFbm0VH38okdGyJDSIF
p+FEprQ9eDPqoUzNbjd4QlY9bph/Q/CVR7m8dBAbCFdT7pbH6Wdwk7LdzgRhdtDP9jIsKTNNte1q
GMvooCehfU4GiCw5Aa6s4ZZbQSVYuhRYgOHzovGzq1+5wOo7N2JA8vlRYSwwjVyUb2rqq7iWsbg+
JuJapgIlHZCoOngniStpVBvML3CdjisUnPZs7sdb7aLtZRCI8TsyQed5VNTTOv4NXqNYWssW/xWq
6f3VNQFk/gh7GyMyJ3d38QobBhLCLY4hmDK8JEZCWxIL9DN0kaLLviNG2wWKwZL2cD0vxQK+D5M6
PEIAaggXEQmwA138Km55S7ojd/DGbrMb9D+Sj/6WEvXGOXlRpGpFQu+ha0Zx9dB76EhCiH5bYq8w
bqILWA9l62keHeCH4BpTHJg8hCuBw91g8KmUfdeZqhZBGmg+jggKMotw4SoSSGVLhK21Ezgu6kSH
xJ58XYzSKRTRJwiPKrAW/4WoTYupBxtoBdz+SqQ84ip6iqZT0q/H92SSDYacziEwJ3uB05PxUTio
eQqXesLnKDT7FS0PXWpbQ6ZqpzZuwWNroQXXNu1J8npgWoFeQMl5AlAUYOaByxJ9IkIGyYOKvYWA
OgomT6uFDSlbXupq1moQTu5MMxn/ZMWnYIjBUqki5h/yxrMoUH85oCigWxdSG6HkE/Dlp5CORbr6
gSgkUnNa61GlwM8WyTdTAlnPRGGVdb1X4S8CEW5ZGHUyn/oCYY1HKlwtLQyyQeVplakXQCvrJ6kQ
Bg4uyIJgb9c+RoZytzND3ph+muOAgedD8oFvvTx3sNPkT//7bqD5QROXfB/CNgx/tsm0OEgPUtyx
ftKJXDzA7GJhHQNybc4wtemLWBnKgjvyPxxbdEyRdD4wobPkbKzOOTeAMstEFoqr0Y8H7QhkUQam
2jDhUkqJ284W1O4H/XuuB/Vl/qvyU9hoJQcPCgaBGFdq4QRDbpDlmpqlxXrXaHZlgWffJAnQn8Fv
sk4H4Ea0/WjIO8ifNl6SfybYK/5oIAIgUi2Nk8KE1m8gnJUPMXSYWsAeYkR6ybc3C9yJj6NzwSUW
CqJJugNELmiv6J9VPA9PaGQ64c+3pm+cpyDNDHQ1vY1qvj3nEgqx5n0Y39nCsQImiPV/Sg9yh2Bk
HQ4ZMwhLI+nFwK0OZ/zkh4odiDsOBE3M+kMnlZ5BJmXK2t+A59T7AvwpyVEVogCrqtbogq7EyP2R
/KoZIKfyE5vXtjndlUyZjAiNgpjTc1VakSJb07v4Jnou0T2uuBBVLBE8e5fRknL4orW7nwiNGR3A
FjSKy2+CMPD486jawdbxAbwfChXyeCLhOttQScZ5/UuJXKibAEIiWMO0zwi6h0787UrxLIJuioc4
nULkOdY/JKeviefRwjlnZY4q5i8h1F/oMT/HYeWGqrroYovXKcnUxbMWZD+jaopXwpKIKwV/u7gL
ICCVqIDSf8Gom4lbOw1ZcRZKLSyvneRHTfAaqVZivhe1m/wTbLuvizyo5v0fH7nNqAzAgtH7oirl
O09aUTNKpDm720Ay5sPItAEz0pFiZQIRDfWGCHCuuGaXZG0xuyl8ShQxJz/9BEeMVCPhZnOaNv8X
bNe0t7omyZMkSFNPR4U3evzcLjcuK7VEZZdMkX6tka5B3C4bRACtFyOeQCt79Xrriwjp3eDw8Yxl
i4ZnF2nnIzXhArnO3TFIuhZXD15yn9vVT16wMxV0rkzQ2P+1+g1u7aeDNwRT2xaUvdsFLGr61RsA
krrBB/uXlnDPWrMSIoSOLSTC16X9VfDFq7XtK2uA0BmKK5FJeWOI1ArralXwFlj8KdxJ0L25ro4p
IZhykME1I9BoKS3TjfbTDmfX1WVooDH5YBhsp3fnJjyZm0vZ9V7nsz7eC/en9E7r62uh+MrQsnxQ
HEOfnD5I5vsCo4FmTwA6lhGbUO5+59ZQ6busQ3Da/4/gKfWPi7Rx+7Y3AL2HiXlvnKxN32bezNjp
dYjFYXVPdjaFpz0GrP3APSdp3La8UFzXbVhLuwuv0mDPBPScpRdDo2G0X7gso054AFVY6n9p8tdd
5zYfJhmIvj/NqUn/wjbA1Ptn5IjIafceDKqCWE+o9brGUJBbmYQvsYtD4pa83lH8uoKqIULDiSXg
6yxJwmM59viy5qkaOJYrzsWg3wlO+PCkAvqg5HpLKFZUsQIYlmnRFiU2siCw5xh8Lv91KTWQE26H
JygYAC9Di3Fuj9L52dCNMgbtOCerVWI4RqUpIFnC+F3fY0d0urDChvfCB4v5ZfmHK7UQWuUl5DRA
Ncjw2/e3pwmVbyls0YUVrzdizPbhlKDJX7xzvC4K10nrAjnG++RxySdAOFZXubgPzTr62JQtSXmW
IIqO1vKeYP7Zb22j7YH/bXfT/F5cufY3ai23D7tEwC0XTRPsjTnkyjrFZDKy7H4jtCHGqFDihiKn
lzcjRj0nxDEydN0T3XZVLw1ckchidFI80LIRUz5/80zPxLB32RudBu90cckCuB1n8lnmLPij/zE+
aucm3Kwj0LLI/ESxyT4RR0eJrEyPbq9hWnKrwAbHzhPaF+fffQmkrsUci95u/+x5LJP6G4/zY5ZU
42fBuiz8uxbweZF5KyivG516l+EjFp1oi1B96wKupMTLWNO5UC4Axpffk4EKZEEns0gYRwpJIJRE
k8wuG63EMGWNSCTG/RO5z9NxoZktD7g60co/R42CBfts1WLyi+ow7jHsNlPv2xDWQd26f9hJIG0e
TVk9W8+8PqEnJMnsgKAfDu8qnlNGOsOHkqE+0aqrtum7PjdweTcx62yaHJffKPA9+xi5XkwSw90Q
gvLoWjJpXh3ptwi4hIt+bp5SLcz1MgCE3s+B9GMkZp6eji4CZRJ4Y8HsDzXziQLOBcJQbavNtaQc
TKFoacbgnSmdbaLo6XIalSOZIEQbh87hhxV6K+UWL1flpVWVAsJlAajEXmi7Y1H97PKK4PzSN+fr
yJifROBUNzCVFwmnra+Zipb4E5Lcxyic9aLP4yppTbb/i3T4qOrnXLKwuSrhJXSCcTyIRNfCOFlv
XN7teOJs72V0dh9L2Cz+VbtkRX0l6NYasCjX5gO0C9MmgYx+KYUX4dFrpHbbUVI/aeFPSRXeqpDp
Bj9ql3XKb0y+qM3C+ISe74cIUmyZPAsxtspP4l5ZqJ+0B83nubj14d/NJVghYmn7MX91fvjVASmN
lHcGwVvjoBHip3wjmlEjH6SoXc9kZSi06Y86jAP1G1cetsxKKdscQvvIUgoMDbTIh6hwcJVeWzdL
FeU4QV/2aGp2kibI09y/XFAZ2mNG6KrztPsjXWq3ds8FwxjebgVCba+YBkr11MEoN8SQGoQunHoR
wD0amqgzGzavEsdYCJ8t2cCLE6pF55bmrf4hm3BUaEi+H93IC5sJ2FrXcBTJB34BRd3BWFA4sQn8
EHoI6sWL/HNvZS+gmk9tJxOpZdOlBmBvL7QUxs9O7HcdiJgqyWSO2WiYWifPywrmOTezB/3RbwAO
kCUo352IbRcj3TrkIOubd3/438v4D7Ft3DhuapnoCgB3AiCh5BOxLotQ9OLv93+EDKzj/zShPRlD
D59DjxgDs4Iu+g15WT/OKtcR3zlU4vfTWVU8Pr0Rrd9q336s3AfGKPsXXriQ6NZ9n9r5uEGts4dA
CYsfvUEE6TTkT7HDGNd88HhGc9mYTrvIYqnxNJ2Dfxdy3D6py5NGKwO6Z/oHkj6jB0bWGX/iwhbN
OZ8Kc2Y/JJdWFNMlOGHs+2mgWXt6E5z02EvayLNFqqXbzAWxSJ4gVWUkRW1w4X6kYXnUfn/uK9T8
fyhoOAFAK7KnWzDARKpQjPRv4cyZKWEU8ND2VGBYHHhelKiwkDMuKr8qCOHoiTY9LsSSTJ0y3Om5
zPbN4R4hd7Ki1teS5VRo9DgtjemIkmKBmt9AVyH8O7supJ4F7fWQI9zIGnoUPi2/DYYul6u+5iWT
Nnlokkjfdc4WCCICsJu4zYJ/8oFwpYBTtAunbPpcyXF/jj8BGbtrurRFhOc9OHpTS5riE7CjTD41
SMNvyBkzXhdBL7s9fFTUr2SwP/m/pdiYt1Y8+cPm/1EIyP5d5UbuPMKsZl3LDwWXCMnKi/h3PD2z
CGJbKmdAx1uch5biRyNx6w3CCPCangeKeYwHKLHU3QjsWtCBfoAkwR+YArHSuJu8Xvtd34qhtsiL
s3yC9fez7iMXGfqasfXLzwl/T1pnQLZ2q5XYcSmbjHxP/9A27xwKycajveYOqzAvM3CRfiZE8eY6
nI0NQlJ53WwU2oTg26Z6QRQe3XHyzBwou5E1nBjHU2cxdKlVp9DtJEqKHiY19jXJ15FW+qthh9G3
7MbDqD0hJC4kwh8UFZkjzWYM6JzvLGwdsQBfme8bOryRIVZ67tt4bFVVLM9FXD4pW0GJ6ORp8Tdi
4nJ6S3aD+mYkO9ofUAzhp1lc820p3nSEDgqvhWKK+V8arvQArAOVqlMsfcrxjTAftF+gupUsk4Uu
x+TuA+NA2OPMbOvrKHF/9q/bRDZFWAK1pqkR/ayn+Hr9aqdjxKLKLgWR5GJILTb6RvYPQ7C4/P9u
ORGmHF3yzCa8y0jOFH93CrTEfxSjBF0EiTlKkF8k/2JU0TKPm5zvg6slp2L/EEy0ydkfd2uVivJM
qWFaC71OR8sCvnHywV9Rqc/3Z5M2hIVDYOyota7W0D+EpXlGCDVDQTpNeGWmOLMqNfWr9mWdkNpv
GYuGydcdMKsPCIlXc1LGOaspNv21aHliav8RjakyVwcswmUhf4ZBHyByl3pyxgpm9fvfdXUC4KzO
tu4VTi7sGKg3DdJhVLw6k/2u2icZUQJBG06UWsOYro6lLEAa68zHBoXCTBDX1LdBbB0EpvjZGyiV
uRE+GXFmHrA/q8FCObD20V/4gXKXk96VrBgMlOCPfO4TJLu2BNdhasrxouG2R9Tf4ha3DpYB5Wuc
u0SGgldtDs6NlsmbqCFk10eYfWxWmYr7FmwhHlxzl9F8T97rG2QylnqUtYMDx5M9tA9+oLYxWA8y
A61+YQeWWM79SjgKWslaAG554is4whtWWKHUsHr1n7NYjd26Xge/QVwVvSQh2RwbfymuNEN/70nO
f5l1YSAhk1y/G3FFQ3eccWGONkdgA9dS9HZQR7SD++bYaL7Y31aVlOxtswK1jcHpFCTFWeChLhpk
DhoqBem38sM9At8UHDlWF7FnNAdhktmFUDxRIqNrYrFlhR5Ay5crXOKjDrTyb8zQYmAalRw+P3dt
9fkWxL2T6HAMYBjUAvwxPOx3FXGcW7dkxacjYVhZ47bVwupVqkgXiYkIDfmm9tjzFNPCQnIDtgPR
22s3BLR4rzfdd1W6ClCfGZ33+Lcvtdd9Ki+ToBL4StuX9+m9nY0eq/rislQWncvUWRVJfHsBK+JW
b3dfPRlF4ThV5RejfaAqeMycTNOLFrA8X+xl3fZkznaeVNrgkR4kwoDX2c2Y4oUWRxg5an9f6XME
h5UtbZe1NWmkPyew4JFdfnNc+OItFmUqcl4XQxzLtu/yeQzsZyPgKfKbrZliJk7r5SqcKVjI+1/u
BssgQeOwTpFRPsa2skTlRCvfxpFwBXYQOkncuApZXm3H9ImD8i99TkdhAZ8NWgiMGx7rV2J3CCI5
HsIp3c31R1wqeIc8490LHA9lTaqll7qbFAsnlPCl3H4sik7s8zflMICkU+efqDw7eZ8f6rqVVVmh
MVUYBnN97fby00WKxxnfX/5ZjKDrN6aiFvfS8tCxuEgaYRk9kmkIXugVN6NzveA3HqSOhYMhKGKe
JFqOwIO7XaEuFPVFmRdwDreq6VIIsQvspti8FGzLp515iW3yBgfqUPz9yQyIEyzKSjfIuGcnc+Nl
53FjdgfO8sHjhl27ZrqtLlZXmHNt1QTIbla6eWi4A+ANmMq1Y82B1nJa/3DKWjO8O8ikeS55lE9/
rBW33a5rSwc91N8sK9MH9ltCWqCHzi9hh4nLPXYs0p63Ba1BX2BTEdHAMiV/ok7Gk3mE/xrbysXB
OsHxm/PTXLq1Oruj9e0Flq22LadcL1O/ORC4JSBOiiuM9gr4TqV/gDQtqKIIrYkM54hiOOsqqolt
2A0D6WDStP4Izq+kNwgo0WAOXA+JYOGHTHHRtkjSjMynoG6G7DtSNojNuPwXQEGyf2gtzfNWlyT2
XjOd44j92KD+xypnrDyiuuF5/HDY/EZqe/gEX7eB0n+d8POCNdlF0wY1m7sTcWRKbBWi+C4uj5nC
B0jFvqs+NEuIq0GN2tFo+Ec5OXuEP6EMYQGl1ODp7STVcqPqpma0n1YREle+zk8moNQW89cr0XwL
fAAaYcVNtR8pt2SOPnBu1ud25wfn1rf7gqp26RjKDz3HUT95C5RC584NThsfxQKdq5N1R+TRBfbA
LnMrcp9/gs2ZbcUq1Csl0IU5KbrWEzyG2Jkhrv1u0ZtToppSSSL0i8x5a5XjjkFQH6v5b2FdX7IJ
vboF3oVcuM4hjOKvru6TxveJKkRXAKn3T85gpZ6tqn9lWwIB3/VBbRBTulbAycK2aXgR41wbOmXg
QNMq39AVJRBU+wOnxXZr7+37NKgMNnKWvvc09ArGGJLv+Z8L4TP45esWft8psoczuZxBQjOBePHz
HnfM9/zkXAix763TqxsfjxCJJO/wC44vt7vQdUsZyVRYVoOgvnWad7bYV0tAORl3NjzUYDu/7Obu
WqBkovNas0ezzlTAzKuzlo5uxBonTn05kRcFsil3TfNLmAyO1pvn7UxNpbytHH9aAgi8kx5iyHjI
icVFxq6wt3jZ68/S36AKm2Naq1kZva+2TmU9hiSPQVVKpE2EnC2j51C+g2m9/apvF9lg1PQG/Omn
0IjWfrKAvR5i1MY4FRtksBpFRmm6vTYYcgXQohY4UYylbtw4v0ehzx2zWObmMXQkKwMRPi4tmoh+
q3pjDIws47VK8TWzDXuBY0GVQ0cty4xAUtzKd+NMYMqlzZxnAFEpu6jhaQq6w1LzfqWZnbl+1Ext
1NJJzOnKdPXbHlTD1DVoKPiK/9lF6jsvBmrphNXTr5s5JCLeqR0pENXQjtbZJZg8NpqEJzpiEEPC
MgiDFdPFY617TuVFl7NyyUehhnBo58hv4nU58I05y3YgWZ9eB7j2Pa2tlFhqo2b0bV3Wu38WzmBg
wJMu3+aKl2WkH9KRNkmt3gjDQSDG05gGaXl/6YKShvF8dfZ1sKiXXldXHqPH3Mk9TovBoyQdLGFK
HW4NxnjJDBIar/Qq9w8/gIlFAfiM1EG3D7XH7YhK+8OVXS0edGuuj2qsHaOAdp4HX4qWum5KqRvF
vYpmT1YLBHzUJ+tE/5oZUkk9cVP1/KO44APxW6dKTmbGj5HlMhR/DdeK+cRGlMAjFo9BcDdL2k+j
OaREG08x4yWQ/7Z94F/jlNUQeZiO+ccDNPVjmqNk+k3t5xtANrk8PesyWIs6/kziY/mEC9ozlx4a
J23X7ajw1HBSchZGBr0STwWoLZSz8yY3wfaqmO6j3ofzFeT778MV5efqiZKdOJqNjvQjOqEBpS1O
gRPjdQN14G+vee50c7cOmWF8rpUErCEJbtRotTUsZ1zewOs6b1ALGrpT8dZ7zi/2SWKsmn+AvAKN
4PzVI+0fJEqfYc9vuaTwPNb6o6rFvfbpGw5MOBCYUZ9XqywtiyzSlRNbECgj59v3X8GN2OOZmElV
V87n29XnqTND0Rb3EprztQeoMLMHFSKVPMkPzbdyOPMsDU2rr+tkD/sHPQpIDze3cIoQiT9PRrQF
35sD0nRiWngPOc4VxIJE9h2ITen07Rn1PQy31vcOVn0HCYBHpZa2fiJ4lU1YRVzyVZfuGDldE0tA
skEDnkOA3QtsbofmeNZIG8H5jD4vdXW+tk1Gb7facgTCLt2aL5K/zXEQ348EZTSFTgIxNeSi0JJS
6jGYW4/Ye3FLPeUuy+ZrFF8+ZAy8lp5WaiFO6xYQrRrR2K1Qu6faPBUD+RQSF9rtKHwSwLZyFOYW
A+VYQUUyNadoSx8tx9Ll4d9XBdOoDxHEgHd4nQ+N/GnZpOlxmoTK2U4z2TRFQdUJpFLAje2x7Zhy
/tyEc0VZ721GQ7VdIjevzlyYrZla2Mol3eELzY1wJrFGa/22gh5HN6pPvoMAUg/qLk46b5E6CrIE
VLetU/uLZZf1MMviF+iyKXWtJol1MUbHOVUGFrUb64eYirmuP5WylzxyRZs9lL7y1Uj9xeBJW13F
CnSMn9Z9szQVCtYNzdvgJN0h9C2zF60bGErQO9IVjG6ZajTfZttjNP3gB/dUunKBtjPwd6CSQDF5
9MRc9x2CAQkWj9oiFFZLLykegY2erht7tHrduDP6OUvsxynJNUOlhJb74k4Zha5aTl7appcs527a
IpIy+01oKZ7bpLDDvRDpT8aooRVVg/63KQWJpg/ZjfE+i2dpeaOlVHUcXr3WFkQuT62enDNFs6kr
m7TpDBlr4U3x0IRGnE2zburjcZJ5w/MLyt9d+Pc=
`protect end_protected
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
iisr0ydwFOm3eepmhOYSaxO3flYpViRsLN97vKyw+ai+x1TubmaH8qRRwK/QFeVsjlGTFdxookcr
olQwv0bmdw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
dJvTzz+PoD3n2Ot9SgKfpEhIshJxklhDhS1tYcrcmprfs5wN+lN+5Y+o9jEEql61IqDkJEIGu0xp
zaDWEeMqwkFuovmZnp/AnbrHb7R/19zPRtwSyZ8+VQRLsRMgscwutXu29fTUST6Ribitutae85tQ
1okc5mYK0mcSMIggcMg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
ZijKIWnBSOuwn6R4ZrzJp1qaSPGZMrP8GTp+SV+Sn9xEivGxLJtGM40xMLXxiYuxIopDD/A1usG6
HkSoNT6OzxHJWKkUEyyVzrZuJdNHJ5q3s3y5LSNY7eMxN9lY4/gygh7aVIBAO9YWzsWu3HLtrHA5
2vsUFQxQdkG5OTLVP1rH68P4j/dhqr/LVHw+9H76c/knGyalpHLRC7tnHQcfuezFJWlkzaNGHfUo
b5cE1YTvtdlZVmw2sVG/GbXIRi5fq3+Okdy+JgckZ4dVWbI20rfa9LkI09/kwD3anyrnovVQVx9h
F0AxolVKVVyWNAaSu1fvXllqzrdJiRLbdnsq0Q==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
LUajPw/jRTLlmEKb+9YylQ2jxw4jlSx/1GGaY1wFfWFdMwK2p0xvQMjui8K3EqJF0fnb3QNWuQDl
1vTtf04vcOAHkfRCeW7Mbp8qeUTtAsflGIPJDxHfVU8ZKprwANsENc8LVrpJ0WnjDFQIzJw7LDqc
Jj2TofWjKprdxXsMnu4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
KG6kiSPrd66zvVpG96eKD+783ebVLVFNF7pXgq+rCyBBRoa0N9Hp3DIWK5125mkICodI82zuSq6k
C8aCiPbDiv4tiuIn19WDNNPL4ncknL0KLZTLAkq0BIQIsnFNRaZegM9aXOdMYGKYLpnjSD9KRWRt
WPXPZfwprSu2D7PeDZMiij3MY+cixttgVmNfcx9Kkmvg+1B5sTSDTVs3fqpJBBO1YslTmxyJAIC6
uDuGqvQ1138z6f4f+f8vMXratK1Ypo3jPPb4FTNLYJio5Vd1Nbpl9kRRtj801Ie0GGhbggK6IXJx
785o6wX6g3tRyoHXGJ4DGUmWlIHATg0KIAflYw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 13424)
`protect data_block
rEtV4Bm3SmvVbKq1runp2SaaO1GImraXNQnz2t97NClVhlTBGZ14v+hHArmsTHZNME/QWduIEcCL
I8GdWPb/f0NXI5m0D8vUM2MFHCnzTFi82f0pjwFGBVpM7cHKBa5QRX5K/e5A/9KwgbwYV1tKqTXG
aWyx6JRfuzQINO3rQqM+n/1b6LSLygDM1QuiPthpMFKV8IfsVkaLDVqcLxH9/n7C64aisv1xK+OH
WhYRETSZok8+gbvdGdr2+VsE64ALl3DavNBK4S7IOGP5YtXviHmw+Qb/lvl6m+RggRYmTe1A6B5r
pghgGDxK2gS0ItU55quFmZMEuEH+bwLuaJA0/UWR19oWnbcTZnsCqEeN/xbKUzS6blm1K6RPZtYe
WSGhjFl0cKHEQe9DfEazTm6tS9mJ55lLbSuwE5o03LDGRapxUdSR0IiKy5C5UP4genzVw3zearva
qPWmPeGZcAEyFioI2o4OWQP+8mFdbza1kBOuw4BP76P2c+ij6wbxXAWVxtNmL8f6AgS1AV5SqIO0
ftTCve0JloVh9kpHsbXE1TS45+y0IuiC0N3a8PAEsXa/tnLsnAydpsXIQwMLXmgKfoXKzabAHHdI
XZJd/NxD7+xY3aINMVaO5eSSLIdjkYZIeqm6qf+x2eNd9v2nue3I9rjHkjMBIty9wqDCI5HznV19
h0aPmdRn9t7Ft5xXq0GXqSl2I9ZROoM4hg3RU6TCVY4IaDkErgP5cMhIwuHsntmeWvsvkZFygQtU
9TUaf90O9HINFkrdIHf0ZCgtCgUw6ffQNPAkw/6MaoKxm9wdczGi3ur+eyRvSLy7+LQX/dOqvXKM
9UFNjkQk392HWfkT8aaXacuJgFT4hmoEXDGY+tSqQrQRrPmelj+ksf3PcI2r64RSTjiR+9HNqWqJ
jPJio2xgGdQdGrH+UewLz0ySmNDYmqxIdyqKfv/B1BYMUpGd+l0eRCp0RwjP6nt7MKkBishuJTL2
2kpCGDQ4HELrlovnj0dMihRpFZAIpY55DfNVE2hnbkHthyDrEXapmovyPqDFel+HKDdimVyeM8CR
DKl0D2+OZK8XWAiVk9Ve6w0rONvwf/XvaAkgxa3rDJQo/8g8oiGRq4ku5l3OZUKrPVRcjVNCxHRq
81RLF34Ztt0FyGvWgFBPXPwl/QfIQcetnIv8BBHDyYvjjUEJZxJ0yVIBqSipzmyIn34Kt0GvhgJJ
oXsivJz4IQp2WiLYnKzv7NuBWYnOF+M/H8eFTLS7ynV/b0CRf7qayeeaKYL0uv9mUeXbILs7F9+8
XkemV9ihHFfHS04009LEbIzG2O13pEZ78n4YAi47TmCv22T8/Ve6sSAGowqE6FfeksCmQ1+Z98YQ
uXIyCDvF0dlGJwZxogjNRbjyCBj6OOagNPhSW71GcVdRv5XSPoZsF68V4hWQeNb+itDo7ZPtZJoJ
YzLjFDCWp+2G5a8+OtWGetlJNejx9rEDOQvPXNhCi9xzzzSvIevRpnt9XX8uVwzzSJnKhI91LgRg
ID2cjEMis7S70eKGvR2/KBOhU/KAbsgGALtSpbd8HPFqo4CWuxEHCYImqvt7m+vI7jIEpXbwjtx8
QWNgKL8RNSViXrcj5CsXvOI28Nk2V+GZ8jr1/8I4R/Yns4Xfj1TTWzVeNCNHbazn1nufigCGV4Vl
qtDHRGZpM2GzgWRsMj5tsZldV3pp52C/Dpr/92KUqWKMf/mZbYDJL1X0X2Tw7iboFgBgx1miq+ht
zrLMfkmBPAPakC7uTHv8wdz7HICGyvCct17zvGp/b+9c5KI7lCBCd9jn5PTW35q5ksO4eC9R2AqE
0xJmD9GKB17q8Jk7vlAMs/IJV9rgMDnRfyFkOl4hl2S45SaIY1ObTSNIHJYg+rp/nN6BMaWKrR+7
O6t2IjDTrKFkfrU0cMF3G7EiQSf6RI1d8iyqNJLJJ3fbFhF7XLnn/CwlkZ/03Hwn1nJocabXwbc2
9Q6RrzrxLCWMZVoXaUEBQvapxENHsyZOrmSevUQnuCknCx9Eh/GwdP2bYVHxXWg7ySdjQnVMtR4v
qT7n0yJuHI0ite3a92Oo/MBdlgCwEcxfvgz0ILRIK4wFe098lGOX0tVEsLdEUijEAeQR38bksd9a
fuwZzPBvMZQ+FON4CQYrDg971r8Qz89ArQjVxWF7TdD0Oaq9vaUrLocNzIw9AcIy8rWaQnwTR/K0
PsXLapKx1fOSZnuztuMHoRXGaqZVlZJGs22/GiJA9y/IBflmF5GNFnRUbXVT8r+FfMb7zIr8eP+b
OcPNp6F4kqt/b8gae/9JOIopCuWXpu5kDe0U5aC2qmvMuYbNI88aUx34i3WHd8NWKNbdtGDaQ8nM
iyuSX4j7EgwTOuBR/iFM7rZAATM59ZFv+9wRq8hbXVvfsBp13upya8YovLN1O9OWrzxUWym9ZPN1
mDhMT1YgOqVRaJ2ADyjP98UghsOXt6ybu9jGeEndP5T4mZjxZp82OMxqqS6VolaMbGRNPa271n87
65g6Q9l7RYtOL1PjdBOlgNpUdYZwxJ2EGgI1wPnrnuUiZ7sdhpuFkhJDdh2mHYlIUZHAsriLKEHR
XOdtU+Desuf1ojV6OryxMP052nRo3DfSj5+dKgSFWVXGLiS4Q5dQxDHIvUugnqZqf+FK5inrMME5
1eHWMPkrqY3H9syJMZ7RM9SwYc/zjL9fOqr9mE+npGx50NODLrgb0FydLIXRotOtI+YSbZHKzsKt
xoZNcJJ4GasWF69GNvRenQ3kp1eh71xjJw5a0KZmhsJJXThZLqSzb/sTisTU8jCaMh6S6ag0knK7
jonbXo+dctsmQfLpvLXHN4TNqJnY6alIH0HnsTz7EklgiqvaLbFn+25uUJSNDHESZG2BaAtNvG/4
WuvQCSLWeuJpsrPd+06Bzmmnlvn9InJZhGDVhnZlfj7Kh2PolkMjpLgzqH4f9hm/7zH7o7msjyvZ
Rj/JnTghr2ou7m5Ayp5K+yFEUt/y9WWmqXlKOpf12P8RITbx8ILm1kWRqB8L+xfF1r2HXt+av43O
pyKFj4Kq1FZckfpg2It+beWX2P825O6hDubEjA2RyF/zyyc3lMSS7vtAQMEOEJnWNslP5r0po6TK
F5+Ikch7kOxVShNh4LWWzwFtJb9SBv0iFIezeCGrgApE2blMwedVwOdpPdPvsQjNRYc8YG+dStcY
JUIrNMdc6m5qSEWO36XNGXLN/ZrjKkZcCr+z5oN8Oa4cO8jxqZo5bZDRVUh4VXM8a+hHCiVvWsEG
HkxV52NFazh7Duhb2Ix5qYigebEWfDnA3frHeY+lRAIE3+X/YoDjgbPuOqgwawkAvhSCeNbNxuTS
T9ZzmE8PWRbDowhElwhdboesSdX9tyyp7yCSM6fxKFXbUrPplwsSNsMYsJJ9grw0leD0bx4Cd0Vy
Y8dDayiLLROqmsdsKe7b4i2o6u8A0RQrPB31DrVO/yPiNygxChVesembc822gDnOAlf6FO502nEU
ItbE4EyM6ZuRk+69RSoT+2AZGRndh55WMQYb6i7ALzZeSttxOh6V+LV5SNYYdeQouPNdd+N45DZn
niJzd/11g0AFDHSZFxMK9p0VsOmXbAPFEjcTvMS7PiMwhUsav6ZfZjkVwz4X9s1v8DCZpNbKSq88
kGJQIcZYRdAPuD7V1zvdo0Zf6leEwpYg5lACMpJ8rGWyLPBrYD/CsWB0THjSjjkRntpZXUTF5Sq1
IPSYaQtCSAHZKO95giPeqw3zw2XQ5ci2o+t0eS1YvmSPlvMfZRnkdx98t2mA8ABd64gljY5f+0O0
px5Pec1R5VTiPNgghdEJlgrPqQxSP7vDXo0dtJmtqeP90QCRgaOqEt27wpqzv0KFUth0XwtaJeQ5
dejR/hEOliBmBscgJkx0gBF/nLybnTcQ6xwwOe25uqhvJIiepSDJE4ICrD/MSurrVfozreQGinSL
a/tMurSZF67eavaP5tFe2G44AmkmV4WBRnOeWOW2dJ2Q1sYHMUzfnWjdSw1sJJu6+Y0fUowVqq0Q
K2lcfV1v+sdb0adNWmXRoPrjCpXnMpWUyUXWCaY8r49ipi+4TCdxE4p/IUZfO1aumt4+xQcBT0dh
t1WR18HGPmHp719a+JPxfWkOQjw5JnEukkqxKV6fqJPDzGrHDJvrkNy1tkX0MN6Z+Olw//0xoyyG
9SEwAH72HyUlbfM2lhwM9N6f4cr+CLxPF2At8ppy84kKN/H+2RDt520oTXKCcGFU/txd8LdCs9qG
3diwadeKrfsinlzq/W+3PUAPHvjHcwRyRb4m4Wv6J0kW7ItY1ox7z91NbPGA481MOKLtCEwm6vuk
sfLsMi7+T/Hm+qsOXlQ9i8Pf9VAE9LWS2byZEwPIYDYtbLm2L09NRsMgfm6PotDA/9WaPtrx/CrM
IMllkwsRz86jBnsfx1s6w2v/gxQFWv0fY8mf1WywsWC+WArpCmvfHO0WMIJtyS/B+XcdiLdfrrJ3
qeRMJy8lhDn9mvRTVYzLXtu6Fv98eAxRiP4hPmT4+kxhTz4CT4cDPP9YKhdzODoL28xWfAYFbD04
Z7nP2BAp3o1FR08u/ctwg8oxDjcRwHkmDHquzKrPjnQBKXv9IMSCNsR7asFA/JqdhHcmuKZg6PRk
6XzKLzz1/Zs3XVZ/rpAcA4yoz12/yPHmsazO+a6cgbZy7JTSwRBhRd31L/KB4M7WXzNJ4paZAsOI
O5FWmQpp6eEyGGXpKkGy2qdqVRuRe0IjzwDJG6clerafsgCAj755Q2eTRVVvvRQw+G+hVjqaFu/+
m9KSJt+0hjHW1BHC4wyHN94ORPERUFukKcxOq8a3C4r5hTOZW3XWq1v7Ks4H7Zwi4AlNCGUKQ0ON
VSZKVFl61F+tBDQk+IqFz1WMfzhOfRJYfalfeqp5HOOIaK9cOhXG2oYdhceL4LDJlhJPAqpAc23Z
G9mCLMh7l3PvdGUWIx2s5Z4EpUsaxWTxxqD4a+cGuaZLzeV55zSCZ5qehwrwRTYvoBZE1+lOXnfi
Ryt8wko4y/GJZL/NuHI8l8tJKmVjS+XqWIN5sWUs9WMNit0HB/gZfmTuuvpwP7gjFuUjS2Q+jgYC
9ppF022c89tfs59OKVOjOQ9s2b2FlXyn4zn9AXI7AYGal0MNPRsQwnnaZJiTebyHcwtZucfEnh6z
9K9skBFs29qlMPNYsFP7y8mzdNhDng3TEgYpao3SPfXwDj/CSw/ObVggf8enRTUNlDfJ+17WwDyO
/ajc27MzTRLyBCCQhUYvMn80lvwSHxWDIL3xKvr2OLMoIAmgIZJG3sJMyhsOPqFxVb1Qk7NcojOn
D11t84xem8WyHJRbm0pbKV40U5U40scS0H5bcMWTEfGT4W0Mt47O181hbfymq/ykV0yIpouFyaDb
tUvUtKWqMknlkUxdllrfasNUWgJUfn8Cl8EV1Z3U5ABYiUNuRr5oKcdwlS7eB/n+UgV71hPGXiii
tFKvLiZLXS9l/eoEDDKLm6/8OksoHEEFzRFIR8skagCp4rd4fSGbOUietH2v8ecJdTlXFP0ex7TX
vh51q5DGduPDyv5nJCNInuPVn9Z9r55S/RGw+ySGAcaPEqaldHWakl5LrzE1/zI4K707/QMAGDAl
HQdn4RCGxESdD4HJn35p8o9hnYl7WqaHBddVyszwX//kjQ4qJolh4qp+txlSxnSJmCs83a+aCvMk
IbAnKPRH3SP74XCHOQ3bziFlRO0Q1JWSUp+e9CxVX0iTOPbgrB+wD9yT1o6m+o45pOEi4yqt1ZwB
6GRU83LP6o8j9UURxZDZ5WMgpNs4xuaPxAt+XstW7JOy51tYRnIykokiQYYg+aWP02kEZ7KL2cif
/t3AkMcRC0iKXbo3c1/h2uNlHbvkqXBOZnmGMzMriXwdE44Vt7izgW2oY3N5IFwqNHPtWi9SS6yA
hcD+oqiZ5YnDx8Be3R5HxKPygh4K5ePLmLR6um0pz3P8seQq1RKFP9ctf/u1v+7BlNqcdEez0X0N
I4X1lXx9dw1MpdfXfG2riDistMNSEH4Rrccb4Y/8cnRL9fh3mO987Fb0uI03HcxJiExzcwHZ9dco
s3vvxZTsaIGr2xmmD+LsMSI00fJFv0/mbMB3LLQfURbbNvuYtBK+fA8U8TOqSRvPYwXdCjv80svZ
ecFEkHhpXJBNTWSfUIzupFvHeVSIxo1FYZEy4sS3rdwokvKAiZK3rnzY+Ryed1c8On/UbN07w7X6
m6hS6lOKjYh+wxgHNswvu8N4sknoUX7Hwp9LBuU8+T0Ca/tOrCkICtK8kD5WkMmpO6IWAXUjK4Z8
/OmRAfzuhQeScqBIQTMuw2IkQruwSdfY/2ev76Y8v5xSi/gzcXVjJ6pNWe8NhZ5pL8vuon9u8D9v
ac2sfrz5UyHorqRAvNxS0nxaWXiYHYmk54FYhWXq/l06uTApLWRBji257/fX7WCJ6JtNeLLcAFYG
ui6Qlw2u4ilhoM33Ba9OQD+hKXM93Ab35owHIBR48oqnZlu/gRs9B7w/mQ9P7Aq6DwyYiEy7zN6P
zIrKF6PEXI2oo5vRRDZlhHjnxlG1qbQvhZImGO8R1X3muvsJ0Z9NyHew0PCSz7i9mW6rY2m1FJBl
jLOuJd9a+SClV8HYSGnNlxIsBxxS4kdb8pJAiZyO1GsyFurgT9epWWxp6MeSTru98ZQ2HxuKRPAh
LAyFLPqo+UCcwRFhd6SEMQhkLktq/u+ZRteg3JfitjOD93M8XsrOOZXAvc8OK94NqeYOeOIYfeiA
Bh8AZZCTK3Xt4QLtJ2oyW6gLSK/gyvC1P9wVOFLK0VxRCj7UL1ENqTGIylLsQV1EDrxvDeHgkr8n
+celZ0eo5oJZQc+yNrl6D8RLDaFfOndjQQuP1VMMLt/r+SCqzoIQpeaPzjqcZ5F2tDjq3vLL3JlK
L72Oet2zPrANXugoDIB6V4zLM77QJB3ICXMRSw3lLKHdoVR1fOZjH7lh6OFJTtre6FJuHv34LR+w
Sc62m9Wix3fNqnF2+9Qp1crzn4iR45vHd5J/GET/E8MKd44F0qOzeLFE7zgwf2+Iy6YZU0LJ7OWe
z0OlZFdrPEAemSaXyLI3Wg2c7W5Ef4UaJISjZfXU+aX/CFAP3KV58g4cgEfSs9fw8iuCFLuLh3Jh
GZg50idBZAseo6HiW0jDA4Nn9S03k0B9v1GqmSWPhP3YhzM/EK26PGYcgF0eivassZQFQSrc6Jil
NsS91pv/HNapigSr2eVnB1wDsPbMOeAWMefmfTJEy770FLL4nJvHH23BcLXTk4vQBAncc/ypOm8W
7K8vIx4OeBmtzlz+HHoN+Ki6SGNYfqwhxJ3Iclxi79j84bg6FlZ/sJmHW3B/BcC+MY8FKzU6WOYl
4ii86/wI6/Ymwxsc/fLpXuJgVnj1G6seQpKpHtSA/+fDWnvd7+23DNdK6HfBGZ+9h1HUSEREwoXj
99Lau/2+L3cctWkmre/U6dbCrUJx+9esOM4lxm0AgWGdwsmiTdhQhm1GO9efcz3nod2wuyLOoRFB
PRHCoU9xUQeiUOHk4A7KAbqWNnKmpYJRUFtQ3lyKzD1zt5ChuiYS+1trXUf0emVBc0RXJeOJM+oy
pdYUCtO7HboKltA1VXkzyJrTAnuRxZ1FiBt3NN7AswsisLqFyQAuddvPGzztWsE/T1mimJzTQK+f
f/Lv/B2HA5evVFXQh51vSrY2ub6y7UStyV1sLz4hRJqfnfYYtn4qKe+hiDORa9CUQSPNnR1nNwVS
OkQkOe7FGwVo2tF2pgxsVaObzuNgR5W00kvbG+HZrYc/VlQXu17CoYAXyKuimeuQUX6IOYQfOtOi
P/656J+ayneD3DdaM4CAxyapYpzyxTtzYw3d3BmLALR36ZccU/VhfYiHYcCtxg9XbjQuCmn0V9tm
VhQXJGWmHnrfgcSUohqw+023UH3zssHKe3HoXWtNxZuFWTm8uBN+FQJWwZg5o1SnFllNmOyhtpJN
XO8SRcSR9ghUC2PkIXtJSv9s4l9Gp1a1m77LFh4HZa3el3/C2W/EGR0B7R2Pzy8Y8kQnfhLd33aj
x06UIZTX/x5oFzGlrD7CuvF5JKo9vOIxzToHh5kdoOD6zjUKUGJYQquc/mE0DMReySwBHVcUIpLT
P0tPzMBnO/rCSMnc9ks+pckz6Kip2rnVsPX+HfAom3uAkz3m42JwY6b/bHCDef0RK/3WUac0dSKM
kEYtrhwBrDcHu2UrE9D4N3TPQpPhltMcgA3rCnJNzhStxgWfSGcSOX489GY3JX51jrPQ4KLwg3Te
uHo9coFgA7zxBD435Ek9ZfJZAcIO0Zt7s2uZwvFyTVmPWSIEW6daOf4f0gxbKYxTM8WdybNJXju9
AuBEu/AVDZ4+JGpSkGoI5khnH625YEMjmDdM7yC1jJKKFINwCI4JiWEAl64hmuHGoqBCRVIgMBYp
hCwZyPZsI1RVFT2dRHGrlaHOioCJ4s9qfl+jXm7NnHKSvxNcZuT+Ubv1PiLUCoGFG+sBAEE7OLIx
156yyQxHYKvnmGVKdSv1JDcqFOBTX70OTB59UidJY5m6HfaEtJa2TRtYd9dfiLW4T+bJCNByHVNJ
BP5PQ906S6hbtLHGTio7Jc/IK25r925Vil9Q71uHrIoeIOuJxTU2THyuDb8th3jMJAWZ28arIcD1
7zvWma3Osergrj5anOk44hmyfHWNmtZzWfjZ8g2mz5sCZf2xhx1wqFFUm2rP++JnqWZWqJpie9P/
FaUflE91AeT0nPFGzJobKS7vxP3YCIxqDXb4W+GNrbrMzqJv62IjXU/5VT55UrYBObNBKr5pNuPp
nl5/A4Sckp8yUP4cXgns9z450Dg8dC2rJeiALt5KoIAI0mqVyz6dmncs3964qm5zvqkhfspebtxv
+/5/HLRk1pKJC/0BEIG3U8PblJ4S3qWAR1ocDE72mQpK1S8J2OpVtmNPWqj+Q8XxAKeFhxNgDseh
3Ys+1h4JfwdhkuL1WuvUWRmr43qJQgrAU1dsla9XqNHMblQy5XDeZddFiARAWW3wQ5mQedn8mA5U
VcD6AFj0+myr/qmfSW0WZomoAlWRHZR8ww60cUN+wUjqZnXcQrMta/v0wrgmsv3Gm8XyHnb593L7
eG4J4D9wit4Xzo8ICB6DhsQ+QOfSpMQ+Uks7P55CB0dzcg3FIehDZWZfWj4jNvAY1gUscTVyYm20
ltt13qwaUWOMqO2BXOxzc3jQ7Wi51nA9iG29RjBhvOs8SIEWaroBNDKCGcQ3HvQk5wLRSMiGq6If
A/12iSm/sYD052pbIGYML2/C6RhJW3M52SyyIXliJtXn3B/si0AgHYfzqT0vXPlxQANLqtU76Uyl
JwP32T30MRjAm6qMdCDKPfadIidlWtpiNS/lxnet2Fgcu2RTx9pSlm5DVmFbm0VH38okdGyJDSIF
p+FEprQ9eDPqoUzNbjd4QlY9bph/Q/CVR7m8dBAbCFdT7pbH6Wdwk7LdzgRhdtDP9jIsKTNNte1q
GMvooCehfU4GiCw5Aa6s4ZZbQSVYuhRYgOHzovGzq1+5wOo7N2JA8vlRYSwwjVyUb2rqq7iWsbg+
JuJapgIlHZCoOngniStpVBvML3CdjisUnPZs7sdb7aLtZRCI8TsyQed5VNTTOv4NXqNYWssW/xWq
6f3VNQFk/gh7GyMyJ3d38QobBhLCLY4hmDK8JEZCWxIL9DN0kaLLviNG2wWKwZL2cD0vxQK+D5M6
PEIAaggXEQmwA138Km55S7ojd/DGbrMb9D+Sj/6WEvXGOXlRpGpFQu+ha0Zx9dB76EhCiH5bYq8w
bqILWA9l62keHeCH4BpTHJg8hCuBw91g8KmUfdeZqhZBGmg+jggKMotw4SoSSGVLhK21Ezgu6kSH
xJ58XYzSKRTRJwiPKrAW/4WoTYupBxtoBdz+SqQ84ip6iqZT0q/H92SSDYacziEwJ3uB05PxUTio
eQqXesLnKDT7FS0PXWpbQ6ZqpzZuwWNroQXXNu1J8npgWoFeQMl5AlAUYOaByxJ9IkIGyYOKvYWA
OgomT6uFDSlbXupq1moQTu5MMxn/ZMWnYIjBUqki5h/yxrMoUH85oCigWxdSG6HkE/Dlp5CORbr6
gSgkUnNa61GlwM8WyTdTAlnPRGGVdb1X4S8CEW5ZGHUyn/oCYY1HKlwtLQyyQeVplakXQCvrJ6kQ
Bg4uyIJgb9c+RoZytzND3ph+muOAgedD8oFvvTx3sNPkT//7bqD5QROXfB/CNgx/tsm0OEgPUtyx
ftKJXDzA7GJhHQNybc4wtemLWBnKgjvyPxxbdEyRdD4wobPkbKzOOTeAMstEFoqr0Y8H7QhkUQam
2jDhUkqJ284W1O4H/XuuB/Vl/qvyU9hoJQcPCgaBGFdq4QRDbpDlmpqlxXrXaHZlgWffJAnQn8Fv
sk4H4Ea0/WjIO8ifNl6SfybYK/5oIAIgUi2Nk8KE1m8gnJUPMXSYWsAeYkR6ybc3C9yJj6NzwSUW
CqJJugNELmiv6J9VPA9PaGQ64c+3pm+cpyDNDHQ1vY1qvj3nEgqx5n0Y39nCsQImiPV/Sg9yh2Bk
HQ4ZMwhLI+nFwK0OZ/zkh4odiDsOBE3M+kMnlZ5BJmXK2t+A59T7AvwpyVEVogCrqtbogq7EyP2R
/KoZIKfyE5vXtjndlUyZjAiNgpjTc1VakSJb07v4Jnou0T2uuBBVLBE8e5fRknL4orW7nwiNGR3A
FjSKy2+CMPD486jawdbxAbwfChXyeCLhOttQScZ5/UuJXKibAEIiWMO0zwi6h0787UrxLIJuioc4
nULkOdY/JKeviefRwjlnZY4q5i8h1F/oMT/HYeWGqrroYovXKcnUxbMWZD+jaopXwpKIKwV/u7gL
ICCVqIDSf8Gom4lbOw1ZcRZKLSyvneRHTfAaqVZivhe1m/wTbLuvizyo5v0fH7nNqAzAgtH7oirl
O09aUTNKpDm720Ay5sPItAEz0pFiZQIRDfWGCHCuuGaXZG0xuyl8ShQxJz/9BEeMVCPhZnOaNv8X
bNe0t7omyZMkSFNPR4U3evzcLjcuK7VEZZdMkX6tka5B3C4bRACtFyOeQCt79Xrriwjp3eDw8Yxl
i4ZnF2nnIzXhArnO3TFIuhZXD15yn9vVT16wMxV0rkzQ2P+1+g1u7aeDNwRT2xaUvdsFLGr61RsA
krrBB/uXlnDPWrMSIoSOLSTC16X9VfDFq7XtK2uA0BmKK5FJeWOI1ArralXwFlj8KdxJ0L25ro4p
IZhykME1I9BoKS3TjfbTDmfX1WVooDH5YBhsp3fnJjyZm0vZ9V7nsz7eC/en9E7r62uh+MrQsnxQ
HEOfnD5I5vsCo4FmTwA6lhGbUO5+59ZQ6busQ3Da/4/gKfWPi7Rx+7Y3AL2HiXlvnKxN32bezNjp
dYjFYXVPdjaFpz0GrP3APSdp3La8UFzXbVhLuwuv0mDPBPScpRdDo2G0X7gso054AFVY6n9p8tdd
5zYfJhmIvj/NqUn/wjbA1Ptn5IjIafceDKqCWE+o9brGUJBbmYQvsYtD4pa83lH8uoKqIULDiSXg
6yxJwmM59viy5qkaOJYrzsWg3wlO+PCkAvqg5HpLKFZUsQIYlmnRFiU2siCw5xh8Lv91KTWQE26H
JygYAC9Di3Fuj9L52dCNMgbtOCerVWI4RqUpIFnC+F3fY0d0urDChvfCB4v5ZfmHK7UQWuUl5DRA
Ncjw2/e3pwmVbyls0YUVrzdizPbhlKDJX7xzvC4K10nrAjnG++RxySdAOFZXubgPzTr62JQtSXmW
IIqO1vKeYP7Zb22j7YH/bXfT/F5cufY3ai23D7tEwC0XTRPsjTnkyjrFZDKy7H4jtCHGqFDihiKn
lzcjRj0nxDEydN0T3XZVLw1ckchidFI80LIRUz5/80zPxLB32RudBu90cckCuB1n8lnmLPij/zE+
aucm3Kwj0LLI/ESxyT4RR0eJrEyPbq9hWnKrwAbHzhPaF+fffQmkrsUci95u/+x5LJP6G4/zY5ZU
42fBuiz8uxbweZF5KyivG516l+EjFp1oi1B96wKupMTLWNO5UC4Axpffk4EKZEEns0gYRwpJIJRE
k8wuG63EMGWNSCTG/RO5z9NxoZktD7g60co/R42CBfts1WLyi+ow7jHsNlPv2xDWQd26f9hJIG0e
TVk9W8+8PqEnJMnsgKAfDu8qnlNGOsOHkqE+0aqrtum7PjdweTcx62yaHJffKPA9+xi5XkwSw90Q
gvLoWjJpXh3ptwi4hIt+bp5SLcz1MgCE3s+B9GMkZp6eji4CZRJ4Y8HsDzXziQLOBcJQbavNtaQc
TKFoacbgnSmdbaLo6XIalSOZIEQbh87hhxV6K+UWL1flpVWVAsJlAajEXmi7Y1H97PKK4PzSN+fr
yJifROBUNzCVFwmnra+Zipb4E5Lcxyic9aLP4yppTbb/i3T4qOrnXLKwuSrhJXSCcTyIRNfCOFlv
XN7teOJs72V0dh9L2Cz+VbtkRX0l6NYasCjX5gO0C9MmgYx+KYUX4dFrpHbbUVI/aeFPSRXeqpDp
Bj9ql3XKb0y+qM3C+ISe74cIUmyZPAsxtspP4l5ZqJ+0B83nubj14d/NJVghYmn7MX91fvjVASmN
lHcGwVvjoBHip3wjmlEjH6SoXc9kZSi06Y86jAP1G1cetsxKKdscQvvIUgoMDbTIh6hwcJVeWzdL
FeU4QV/2aGp2kibI09y/XFAZ2mNG6KrztPsjXWq3ds8FwxjebgVCba+YBkr11MEoN8SQGoQunHoR
wD0amqgzGzavEsdYCJ8t2cCLE6pF55bmrf4hm3BUaEi+H93IC5sJ2FrXcBTJB34BRd3BWFA4sQn8
EHoI6sWL/HNvZS+gmk9tJxOpZdOlBmBvL7QUxs9O7HcdiJgqyWSO2WiYWifPywrmOTezB/3RbwAO
kCUo352IbRcj3TrkIOubd3/438v4D7Ft3DhuapnoCgB3AiCh5BOxLotQ9OLv93+EDKzj/zShPRlD
D59DjxgDs4Iu+g15WT/OKtcR3zlU4vfTWVU8Pr0Rrd9q336s3AfGKPsXXriQ6NZ9n9r5uEGts4dA
CYsfvUEE6TTkT7HDGNd88HhGc9mYTrvIYqnxNJ2Dfxdy3D6py5NGKwO6Z/oHkj6jB0bWGX/iwhbN
OZ8Kc2Y/JJdWFNMlOGHs+2mgWXt6E5z02EvayLNFqqXbzAWxSJ4gVWUkRW1w4X6kYXnUfn/uK9T8
fyhoOAFAK7KnWzDARKpQjPRv4cyZKWEU8ND2VGBYHHhelKiwkDMuKr8qCOHoiTY9LsSSTJ0y3Om5
zPbN4R4hd7Ki1teS5VRo9DgtjemIkmKBmt9AVyH8O7supJ4F7fWQI9zIGnoUPi2/DYYul6u+5iWT
Nnlokkjfdc4WCCICsJu4zYJ/8oFwpYBTtAunbPpcyXF/jj8BGbtrurRFhOc9OHpTS5riE7CjTD41
SMNvyBkzXhdBL7s9fFTUr2SwP/m/pdiYt1Y8+cPm/1EIyP5d5UbuPMKsZl3LDwWXCMnKi/h3PD2z
CGJbKmdAx1uch5biRyNx6w3CCPCangeKeYwHKLHU3QjsWtCBfoAkwR+YArHSuJu8Xvtd34qhtsiL
s3yC9fez7iMXGfqasfXLzwl/T1pnQLZ2q5XYcSmbjHxP/9A27xwKycajveYOqzAvM3CRfiZE8eY6
nI0NQlJ53WwU2oTg26Z6QRQe3XHyzBwou5E1nBjHU2cxdKlVp9DtJEqKHiY19jXJ15FW+qthh9G3
7MbDqD0hJC4kwh8UFZkjzWYM6JzvLGwdsQBfme8bOryRIVZ67tt4bFVVLM9FXD4pW0GJ6ORp8Tdi
4nJ6S3aD+mYkO9ofUAzhp1lc820p3nSEDgqvhWKK+V8arvQArAOVqlMsfcrxjTAftF+gupUsk4Uu
x+TuA+NA2OPMbOvrKHF/9q/bRDZFWAK1pqkR/ayn+Hr9aqdjxKLKLgWR5GJILTb6RvYPQ7C4/P9u
ORGmHF3yzCa8y0jOFH93CrTEfxSjBF0EiTlKkF8k/2JU0TKPm5zvg6slp2L/EEy0ydkfd2uVivJM
qWFaC71OR8sCvnHywV9Rqc/3Z5M2hIVDYOyota7W0D+EpXlGCDVDQTpNeGWmOLMqNfWr9mWdkNpv
GYuGydcdMKsPCIlXc1LGOaspNv21aHliav8RjakyVwcswmUhf4ZBHyByl3pyxgpm9fvfdXUC4KzO
tu4VTi7sGKg3DdJhVLw6k/2u2icZUQJBG06UWsOYro6lLEAa68zHBoXCTBDX1LdBbB0EpvjZGyiV
uRE+GXFmHrA/q8FCObD20V/4gXKXk96VrBgMlOCPfO4TJLu2BNdhasrxouG2R9Tf4ha3DpYB5Wuc
u0SGgldtDs6NlsmbqCFk10eYfWxWmYr7FmwhHlxzl9F8T97rG2QylnqUtYMDx5M9tA9+oLYxWA8y
A61+YQeWWM79SjgKWslaAG554is4whtWWKHUsHr1n7NYjd26Xge/QVwVvSQh2RwbfymuNEN/70nO
f5l1YSAhk1y/G3FFQ3eccWGONkdgA9dS9HZQR7SD++bYaL7Y31aVlOxtswK1jcHpFCTFWeChLhpk
DhoqBem38sM9At8UHDlWF7FnNAdhktmFUDxRIqNrYrFlhR5Ay5crXOKjDrTyb8zQYmAalRw+P3dt
9fkWxL2T6HAMYBjUAvwxPOx3FXGcW7dkxacjYVhZ47bVwupVqkgXiYkIDfmm9tjzFNPCQnIDtgPR
22s3BLR4rzfdd1W6ClCfGZ33+Lcvtdd9Ki+ToBL4StuX9+m9nY0eq/rislQWncvUWRVJfHsBK+JW
b3dfPRlF4ThV5RejfaAqeMycTNOLFrA8X+xl3fZkznaeVNrgkR4kwoDX2c2Y4oUWRxg5an9f6XME
h5UtbZe1NWmkPyew4JFdfnNc+OItFmUqcl4XQxzLtu/yeQzsZyPgKfKbrZliJk7r5SqcKVjI+1/u
BssgQeOwTpFRPsa2skTlRCvfxpFwBXYQOkncuApZXm3H9ImD8i99TkdhAZ8NWgiMGx7rV2J3CCI5
HsIp3c31R1wqeIc8490LHA9lTaqll7qbFAsnlPCl3H4sik7s8zflMICkU+efqDw7eZ8f6rqVVVmh
MVUYBnN97fby00WKxxnfX/5ZjKDrN6aiFvfS8tCxuEgaYRk9kmkIXugVN6NzveA3HqSOhYMhKGKe
JFqOwIO7XaEuFPVFmRdwDreq6VIIsQvspti8FGzLp515iW3yBgfqUPz9yQyIEyzKSjfIuGcnc+Nl
53FjdgfO8sHjhl27ZrqtLlZXmHNt1QTIbla6eWi4A+ANmMq1Y82B1nJa/3DKWjO8O8ikeS55lE9/
rBW33a5rSwc91N8sK9MH9ltCWqCHzi9hh4nLPXYs0p63Ba1BX2BTEdHAMiV/ok7Gk3mE/xrbysXB
OsHxm/PTXLq1Oruj9e0Flq22LadcL1O/ORC4JSBOiiuM9gr4TqV/gDQtqKIIrYkM54hiOOsqqolt
2A0D6WDStP4Izq+kNwgo0WAOXA+JYOGHTHHRtkjSjMynoG6G7DtSNojNuPwXQEGyf2gtzfNWlyT2
XjOd44j92KD+xypnrDyiuuF5/HDY/EZqe/gEX7eB0n+d8POCNdlF0wY1m7sTcWRKbBWi+C4uj5nC
B0jFvqs+NEuIq0GN2tFo+Ec5OXuEP6EMYQGl1ODp7STVcqPqpma0n1YREle+zk8moNQW89cr0XwL
fAAaYcVNtR8pt2SOPnBu1ud25wfn1rf7gqp26RjKDz3HUT95C5RC584NThsfxQKdq5N1R+TRBfbA
LnMrcp9/gs2ZbcUq1Csl0IU5KbrWEzyG2Jkhrv1u0ZtToppSSSL0i8x5a5XjjkFQH6v5b2FdX7IJ
vboF3oVcuM4hjOKvru6TxveJKkRXAKn3T85gpZ6tqn9lWwIB3/VBbRBTulbAycK2aXgR41wbOmXg
QNMq39AVJRBU+wOnxXZr7+37NKgMNnKWvvc09ArGGJLv+Z8L4TP45esWft8psoczuZxBQjOBePHz
HnfM9/zkXAix763TqxsfjxCJJO/wC44vt7vQdUsZyVRYVoOgvnWad7bYV0tAORl3NjzUYDu/7Obu
WqBkovNas0ezzlTAzKuzlo5uxBonTn05kRcFsil3TfNLmAyO1pvn7UxNpbytHH9aAgi8kx5iyHjI
icVFxq6wt3jZ68/S36AKm2Naq1kZva+2TmU9hiSPQVVKpE2EnC2j51C+g2m9/apvF9lg1PQG/Omn
0IjWfrKAvR5i1MY4FRtksBpFRmm6vTYYcgXQohY4UYylbtw4v0ehzx2zWObmMXQkKwMRPi4tmoh+
q3pjDIws47VK8TWzDXuBY0GVQ0cty4xAUtzKd+NMYMqlzZxnAFEpu6jhaQq6w1LzfqWZnbl+1Ext
1NJJzOnKdPXbHlTD1DVoKPiK/9lF6jsvBmrphNXTr5s5JCLeqR0pENXQjtbZJZg8NpqEJzpiEEPC
MgiDFdPFY617TuVFl7NyyUehhnBo58hv4nU58I05y3YgWZ9eB7j2Pa2tlFhqo2b0bV3Wu38WzmBg
wJMu3+aKl2WkH9KRNkmt3gjDQSDG05gGaXl/6YKShvF8dfZ1sKiXXldXHqPH3Mk9TovBoyQdLGFK
HW4NxnjJDBIar/Qq9w8/gIlFAfiM1EG3D7XH7YhK+8OVXS0edGuuj2qsHaOAdp4HX4qWum5KqRvF
vYpmT1YLBHzUJ+tE/5oZUkk9cVP1/KO44APxW6dKTmbGj5HlMhR/DdeK+cRGlMAjFo9BcDdL2k+j
OaREG08x4yWQ/7Z94F/jlNUQeZiO+ccDNPVjmqNk+k3t5xtANrk8PesyWIs6/kziY/mEC9ozlx4a
J23X7ajw1HBSchZGBr0STwWoLZSz8yY3wfaqmO6j3ofzFeT778MV5efqiZKdOJqNjvQjOqEBpS1O
gRPjdQN14G+vee50c7cOmWF8rpUErCEJbtRotTUsZ1zewOs6b1ALGrpT8dZ7zi/2SWKsmn+AvAKN
4PzVI+0fJEqfYc9vuaTwPNb6o6rFvfbpGw5MOBCYUZ9XqywtiyzSlRNbECgj59v3X8GN2OOZmElV
V87n29XnqTND0Rb3EprztQeoMLMHFSKVPMkPzbdyOPMsDU2rr+tkD/sHPQpIDze3cIoQiT9PRrQF
35sD0nRiWngPOc4VxIJE9h2ITen07Rn1PQy31vcOVn0HCYBHpZa2fiJ4lU1YRVzyVZfuGDldE0tA
skEDnkOA3QtsbofmeNZIG8H5jD4vdXW+tk1Gb7facgTCLt2aL5K/zXEQ348EZTSFTgIxNeSi0JJS
6jGYW4/Ye3FLPeUuy+ZrFF8+ZAy8lp5WaiFO6xYQrRrR2K1Qu6faPBUD+RQSF9rtKHwSwLZyFOYW
A+VYQUUyNadoSx8tx9Ll4d9XBdOoDxHEgHd4nQ+N/GnZpOlxmoTK2U4z2TRFQdUJpFLAje2x7Zhy
/tyEc0VZ721GQ7VdIjevzlyYrZla2Mol3eELzY1wJrFGa/22gh5HN6pPvoMAUg/qLk46b5E6CrIE
VLetU/uLZZf1MMviF+iyKXWtJol1MUbHOVUGFrUb64eYirmuP5WylzxyRZs9lL7y1Uj9xeBJW13F
CnSMn9Z9szQVCtYNzdvgJN0h9C2zF60bGErQO9IVjG6ZajTfZttjNP3gB/dUunKBtjPwd6CSQDF5
9MRc9x2CAQkWj9oiFFZLLykegY2erht7tHrduDP6OUvsxynJNUOlhJb74k4Zha5aTl7appcs527a
IpIy+01oKZ7bpLDDvRDpT8aooRVVg/63KQWJpg/ZjfE+i2dpeaOlVHUcXr3WFkQuT62enDNFs6kr
m7TpDBlr4U3x0IRGnE2zburjcZJ5w/MLyt9d+Pc=
`protect end_protected
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
iisr0ydwFOm3eepmhOYSaxO3flYpViRsLN97vKyw+ai+x1TubmaH8qRRwK/QFeVsjlGTFdxookcr
olQwv0bmdw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
dJvTzz+PoD3n2Ot9SgKfpEhIshJxklhDhS1tYcrcmprfs5wN+lN+5Y+o9jEEql61IqDkJEIGu0xp
zaDWEeMqwkFuovmZnp/AnbrHb7R/19zPRtwSyZ8+VQRLsRMgscwutXu29fTUST6Ribitutae85tQ
1okc5mYK0mcSMIggcMg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
ZijKIWnBSOuwn6R4ZrzJp1qaSPGZMrP8GTp+SV+Sn9xEivGxLJtGM40xMLXxiYuxIopDD/A1usG6
HkSoNT6OzxHJWKkUEyyVzrZuJdNHJ5q3s3y5LSNY7eMxN9lY4/gygh7aVIBAO9YWzsWu3HLtrHA5
2vsUFQxQdkG5OTLVP1rH68P4j/dhqr/LVHw+9H76c/knGyalpHLRC7tnHQcfuezFJWlkzaNGHfUo
b5cE1YTvtdlZVmw2sVG/GbXIRi5fq3+Okdy+JgckZ4dVWbI20rfa9LkI09/kwD3anyrnovVQVx9h
F0AxolVKVVyWNAaSu1fvXllqzrdJiRLbdnsq0Q==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
LUajPw/jRTLlmEKb+9YylQ2jxw4jlSx/1GGaY1wFfWFdMwK2p0xvQMjui8K3EqJF0fnb3QNWuQDl
1vTtf04vcOAHkfRCeW7Mbp8qeUTtAsflGIPJDxHfVU8ZKprwANsENc8LVrpJ0WnjDFQIzJw7LDqc
Jj2TofWjKprdxXsMnu4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
KG6kiSPrd66zvVpG96eKD+783ebVLVFNF7pXgq+rCyBBRoa0N9Hp3DIWK5125mkICodI82zuSq6k
C8aCiPbDiv4tiuIn19WDNNPL4ncknL0KLZTLAkq0BIQIsnFNRaZegM9aXOdMYGKYLpnjSD9KRWRt
WPXPZfwprSu2D7PeDZMiij3MY+cixttgVmNfcx9Kkmvg+1B5sTSDTVs3fqpJBBO1YslTmxyJAIC6
uDuGqvQ1138z6f4f+f8vMXratK1Ypo3jPPb4FTNLYJio5Vd1Nbpl9kRRtj801Ie0GGhbggK6IXJx
785o6wX6g3tRyoHXGJ4DGUmWlIHATg0KIAflYw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 13424)
`protect data_block
rEtV4Bm3SmvVbKq1runp2SaaO1GImraXNQnz2t97NClVhlTBGZ14v+hHArmsTHZNME/QWduIEcCL
I8GdWPb/f0NXI5m0D8vUM2MFHCnzTFi82f0pjwFGBVpM7cHKBa5QRX5K/e5A/9KwgbwYV1tKqTXG
aWyx6JRfuzQINO3rQqM+n/1b6LSLygDM1QuiPthpMFKV8IfsVkaLDVqcLxH9/n7C64aisv1xK+OH
WhYRETSZok8+gbvdGdr2+VsE64ALl3DavNBK4S7IOGP5YtXviHmw+Qb/lvl6m+RggRYmTe1A6B5r
pghgGDxK2gS0ItU55quFmZMEuEH+bwLuaJA0/UWR19oWnbcTZnsCqEeN/xbKUzS6blm1K6RPZtYe
WSGhjFl0cKHEQe9DfEazTm6tS9mJ55lLbSuwE5o03LDGRapxUdSR0IiKy5C5UP4genzVw3zearva
qPWmPeGZcAEyFioI2o4OWQP+8mFdbza1kBOuw4BP76P2c+ij6wbxXAWVxtNmL8f6AgS1AV5SqIO0
ftTCve0JloVh9kpHsbXE1TS45+y0IuiC0N3a8PAEsXa/tnLsnAydpsXIQwMLXmgKfoXKzabAHHdI
XZJd/NxD7+xY3aINMVaO5eSSLIdjkYZIeqm6qf+x2eNd9v2nue3I9rjHkjMBIty9wqDCI5HznV19
h0aPmdRn9t7Ft5xXq0GXqSl2I9ZROoM4hg3RU6TCVY4IaDkErgP5cMhIwuHsntmeWvsvkZFygQtU
9TUaf90O9HINFkrdIHf0ZCgtCgUw6ffQNPAkw/6MaoKxm9wdczGi3ur+eyRvSLy7+LQX/dOqvXKM
9UFNjkQk392HWfkT8aaXacuJgFT4hmoEXDGY+tSqQrQRrPmelj+ksf3PcI2r64RSTjiR+9HNqWqJ
jPJio2xgGdQdGrH+UewLz0ySmNDYmqxIdyqKfv/B1BYMUpGd+l0eRCp0RwjP6nt7MKkBishuJTL2
2kpCGDQ4HELrlovnj0dMihRpFZAIpY55DfNVE2hnbkHthyDrEXapmovyPqDFel+HKDdimVyeM8CR
DKl0D2+OZK8XWAiVk9Ve6w0rONvwf/XvaAkgxa3rDJQo/8g8oiGRq4ku5l3OZUKrPVRcjVNCxHRq
81RLF34Ztt0FyGvWgFBPXPwl/QfIQcetnIv8BBHDyYvjjUEJZxJ0yVIBqSipzmyIn34Kt0GvhgJJ
oXsivJz4IQp2WiLYnKzv7NuBWYnOF+M/H8eFTLS7ynV/b0CRf7qayeeaKYL0uv9mUeXbILs7F9+8
XkemV9ihHFfHS04009LEbIzG2O13pEZ78n4YAi47TmCv22T8/Ve6sSAGowqE6FfeksCmQ1+Z98YQ
uXIyCDvF0dlGJwZxogjNRbjyCBj6OOagNPhSW71GcVdRv5XSPoZsF68V4hWQeNb+itDo7ZPtZJoJ
YzLjFDCWp+2G5a8+OtWGetlJNejx9rEDOQvPXNhCi9xzzzSvIevRpnt9XX8uVwzzSJnKhI91LgRg
ID2cjEMis7S70eKGvR2/KBOhU/KAbsgGALtSpbd8HPFqo4CWuxEHCYImqvt7m+vI7jIEpXbwjtx8
QWNgKL8RNSViXrcj5CsXvOI28Nk2V+GZ8jr1/8I4R/Yns4Xfj1TTWzVeNCNHbazn1nufigCGV4Vl
qtDHRGZpM2GzgWRsMj5tsZldV3pp52C/Dpr/92KUqWKMf/mZbYDJL1X0X2Tw7iboFgBgx1miq+ht
zrLMfkmBPAPakC7uTHv8wdz7HICGyvCct17zvGp/b+9c5KI7lCBCd9jn5PTW35q5ksO4eC9R2AqE
0xJmD9GKB17q8Jk7vlAMs/IJV9rgMDnRfyFkOl4hl2S45SaIY1ObTSNIHJYg+rp/nN6BMaWKrR+7
O6t2IjDTrKFkfrU0cMF3G7EiQSf6RI1d8iyqNJLJJ3fbFhF7XLnn/CwlkZ/03Hwn1nJocabXwbc2
9Q6RrzrxLCWMZVoXaUEBQvapxENHsyZOrmSevUQnuCknCx9Eh/GwdP2bYVHxXWg7ySdjQnVMtR4v
qT7n0yJuHI0ite3a92Oo/MBdlgCwEcxfvgz0ILRIK4wFe098lGOX0tVEsLdEUijEAeQR38bksd9a
fuwZzPBvMZQ+FON4CQYrDg971r8Qz89ArQjVxWF7TdD0Oaq9vaUrLocNzIw9AcIy8rWaQnwTR/K0
PsXLapKx1fOSZnuztuMHoRXGaqZVlZJGs22/GiJA9y/IBflmF5GNFnRUbXVT8r+FfMb7zIr8eP+b
OcPNp6F4kqt/b8gae/9JOIopCuWXpu5kDe0U5aC2qmvMuYbNI88aUx34i3WHd8NWKNbdtGDaQ8nM
iyuSX4j7EgwTOuBR/iFM7rZAATM59ZFv+9wRq8hbXVvfsBp13upya8YovLN1O9OWrzxUWym9ZPN1
mDhMT1YgOqVRaJ2ADyjP98UghsOXt6ybu9jGeEndP5T4mZjxZp82OMxqqS6VolaMbGRNPa271n87
65g6Q9l7RYtOL1PjdBOlgNpUdYZwxJ2EGgI1wPnrnuUiZ7sdhpuFkhJDdh2mHYlIUZHAsriLKEHR
XOdtU+Desuf1ojV6OryxMP052nRo3DfSj5+dKgSFWVXGLiS4Q5dQxDHIvUugnqZqf+FK5inrMME5
1eHWMPkrqY3H9syJMZ7RM9SwYc/zjL9fOqr9mE+npGx50NODLrgb0FydLIXRotOtI+YSbZHKzsKt
xoZNcJJ4GasWF69GNvRenQ3kp1eh71xjJw5a0KZmhsJJXThZLqSzb/sTisTU8jCaMh6S6ag0knK7
jonbXo+dctsmQfLpvLXHN4TNqJnY6alIH0HnsTz7EklgiqvaLbFn+25uUJSNDHESZG2BaAtNvG/4
WuvQCSLWeuJpsrPd+06Bzmmnlvn9InJZhGDVhnZlfj7Kh2PolkMjpLgzqH4f9hm/7zH7o7msjyvZ
Rj/JnTghr2ou7m5Ayp5K+yFEUt/y9WWmqXlKOpf12P8RITbx8ILm1kWRqB8L+xfF1r2HXt+av43O
pyKFj4Kq1FZckfpg2It+beWX2P825O6hDubEjA2RyF/zyyc3lMSS7vtAQMEOEJnWNslP5r0po6TK
F5+Ikch7kOxVShNh4LWWzwFtJb9SBv0iFIezeCGrgApE2blMwedVwOdpPdPvsQjNRYc8YG+dStcY
JUIrNMdc6m5qSEWO36XNGXLN/ZrjKkZcCr+z5oN8Oa4cO8jxqZo5bZDRVUh4VXM8a+hHCiVvWsEG
HkxV52NFazh7Duhb2Ix5qYigebEWfDnA3frHeY+lRAIE3+X/YoDjgbPuOqgwawkAvhSCeNbNxuTS
T9ZzmE8PWRbDowhElwhdboesSdX9tyyp7yCSM6fxKFXbUrPplwsSNsMYsJJ9grw0leD0bx4Cd0Vy
Y8dDayiLLROqmsdsKe7b4i2o6u8A0RQrPB31DrVO/yPiNygxChVesembc822gDnOAlf6FO502nEU
ItbE4EyM6ZuRk+69RSoT+2AZGRndh55WMQYb6i7ALzZeSttxOh6V+LV5SNYYdeQouPNdd+N45DZn
niJzd/11g0AFDHSZFxMK9p0VsOmXbAPFEjcTvMS7PiMwhUsav6ZfZjkVwz4X9s1v8DCZpNbKSq88
kGJQIcZYRdAPuD7V1zvdo0Zf6leEwpYg5lACMpJ8rGWyLPBrYD/CsWB0THjSjjkRntpZXUTF5Sq1
IPSYaQtCSAHZKO95giPeqw3zw2XQ5ci2o+t0eS1YvmSPlvMfZRnkdx98t2mA8ABd64gljY5f+0O0
px5Pec1R5VTiPNgghdEJlgrPqQxSP7vDXo0dtJmtqeP90QCRgaOqEt27wpqzv0KFUth0XwtaJeQ5
dejR/hEOliBmBscgJkx0gBF/nLybnTcQ6xwwOe25uqhvJIiepSDJE4ICrD/MSurrVfozreQGinSL
a/tMurSZF67eavaP5tFe2G44AmkmV4WBRnOeWOW2dJ2Q1sYHMUzfnWjdSw1sJJu6+Y0fUowVqq0Q
K2lcfV1v+sdb0adNWmXRoPrjCpXnMpWUyUXWCaY8r49ipi+4TCdxE4p/IUZfO1aumt4+xQcBT0dh
t1WR18HGPmHp719a+JPxfWkOQjw5JnEukkqxKV6fqJPDzGrHDJvrkNy1tkX0MN6Z+Olw//0xoyyG
9SEwAH72HyUlbfM2lhwM9N6f4cr+CLxPF2At8ppy84kKN/H+2RDt520oTXKCcGFU/txd8LdCs9qG
3diwadeKrfsinlzq/W+3PUAPHvjHcwRyRb4m4Wv6J0kW7ItY1ox7z91NbPGA481MOKLtCEwm6vuk
sfLsMi7+T/Hm+qsOXlQ9i8Pf9VAE9LWS2byZEwPIYDYtbLm2L09NRsMgfm6PotDA/9WaPtrx/CrM
IMllkwsRz86jBnsfx1s6w2v/gxQFWv0fY8mf1WywsWC+WArpCmvfHO0WMIJtyS/B+XcdiLdfrrJ3
qeRMJy8lhDn9mvRTVYzLXtu6Fv98eAxRiP4hPmT4+kxhTz4CT4cDPP9YKhdzODoL28xWfAYFbD04
Z7nP2BAp3o1FR08u/ctwg8oxDjcRwHkmDHquzKrPjnQBKXv9IMSCNsR7asFA/JqdhHcmuKZg6PRk
6XzKLzz1/Zs3XVZ/rpAcA4yoz12/yPHmsazO+a6cgbZy7JTSwRBhRd31L/KB4M7WXzNJ4paZAsOI
O5FWmQpp6eEyGGXpKkGy2qdqVRuRe0IjzwDJG6clerafsgCAj755Q2eTRVVvvRQw+G+hVjqaFu/+
m9KSJt+0hjHW1BHC4wyHN94ORPERUFukKcxOq8a3C4r5hTOZW3XWq1v7Ks4H7Zwi4AlNCGUKQ0ON
VSZKVFl61F+tBDQk+IqFz1WMfzhOfRJYfalfeqp5HOOIaK9cOhXG2oYdhceL4LDJlhJPAqpAc23Z
G9mCLMh7l3PvdGUWIx2s5Z4EpUsaxWTxxqD4a+cGuaZLzeV55zSCZ5qehwrwRTYvoBZE1+lOXnfi
Ryt8wko4y/GJZL/NuHI8l8tJKmVjS+XqWIN5sWUs9WMNit0HB/gZfmTuuvpwP7gjFuUjS2Q+jgYC
9ppF022c89tfs59OKVOjOQ9s2b2FlXyn4zn9AXI7AYGal0MNPRsQwnnaZJiTebyHcwtZucfEnh6z
9K9skBFs29qlMPNYsFP7y8mzdNhDng3TEgYpao3SPfXwDj/CSw/ObVggf8enRTUNlDfJ+17WwDyO
/ajc27MzTRLyBCCQhUYvMn80lvwSHxWDIL3xKvr2OLMoIAmgIZJG3sJMyhsOPqFxVb1Qk7NcojOn
D11t84xem8WyHJRbm0pbKV40U5U40scS0H5bcMWTEfGT4W0Mt47O181hbfymq/ykV0yIpouFyaDb
tUvUtKWqMknlkUxdllrfasNUWgJUfn8Cl8EV1Z3U5ABYiUNuRr5oKcdwlS7eB/n+UgV71hPGXiii
tFKvLiZLXS9l/eoEDDKLm6/8OksoHEEFzRFIR8skagCp4rd4fSGbOUietH2v8ecJdTlXFP0ex7TX
vh51q5DGduPDyv5nJCNInuPVn9Z9r55S/RGw+ySGAcaPEqaldHWakl5LrzE1/zI4K707/QMAGDAl
HQdn4RCGxESdD4HJn35p8o9hnYl7WqaHBddVyszwX//kjQ4qJolh4qp+txlSxnSJmCs83a+aCvMk
IbAnKPRH3SP74XCHOQ3bziFlRO0Q1JWSUp+e9CxVX0iTOPbgrB+wD9yT1o6m+o45pOEi4yqt1ZwB
6GRU83LP6o8j9UURxZDZ5WMgpNs4xuaPxAt+XstW7JOy51tYRnIykokiQYYg+aWP02kEZ7KL2cif
/t3AkMcRC0iKXbo3c1/h2uNlHbvkqXBOZnmGMzMriXwdE44Vt7izgW2oY3N5IFwqNHPtWi9SS6yA
hcD+oqiZ5YnDx8Be3R5HxKPygh4K5ePLmLR6um0pz3P8seQq1RKFP9ctf/u1v+7BlNqcdEez0X0N
I4X1lXx9dw1MpdfXfG2riDistMNSEH4Rrccb4Y/8cnRL9fh3mO987Fb0uI03HcxJiExzcwHZ9dco
s3vvxZTsaIGr2xmmD+LsMSI00fJFv0/mbMB3LLQfURbbNvuYtBK+fA8U8TOqSRvPYwXdCjv80svZ
ecFEkHhpXJBNTWSfUIzupFvHeVSIxo1FYZEy4sS3rdwokvKAiZK3rnzY+Ryed1c8On/UbN07w7X6
m6hS6lOKjYh+wxgHNswvu8N4sknoUX7Hwp9LBuU8+T0Ca/tOrCkICtK8kD5WkMmpO6IWAXUjK4Z8
/OmRAfzuhQeScqBIQTMuw2IkQruwSdfY/2ev76Y8v5xSi/gzcXVjJ6pNWe8NhZ5pL8vuon9u8D9v
ac2sfrz5UyHorqRAvNxS0nxaWXiYHYmk54FYhWXq/l06uTApLWRBji257/fX7WCJ6JtNeLLcAFYG
ui6Qlw2u4ilhoM33Ba9OQD+hKXM93Ab35owHIBR48oqnZlu/gRs9B7w/mQ9P7Aq6DwyYiEy7zN6P
zIrKF6PEXI2oo5vRRDZlhHjnxlG1qbQvhZImGO8R1X3muvsJ0Z9NyHew0PCSz7i9mW6rY2m1FJBl
jLOuJd9a+SClV8HYSGnNlxIsBxxS4kdb8pJAiZyO1GsyFurgT9epWWxp6MeSTru98ZQ2HxuKRPAh
LAyFLPqo+UCcwRFhd6SEMQhkLktq/u+ZRteg3JfitjOD93M8XsrOOZXAvc8OK94NqeYOeOIYfeiA
Bh8AZZCTK3Xt4QLtJ2oyW6gLSK/gyvC1P9wVOFLK0VxRCj7UL1ENqTGIylLsQV1EDrxvDeHgkr8n
+celZ0eo5oJZQc+yNrl6D8RLDaFfOndjQQuP1VMMLt/r+SCqzoIQpeaPzjqcZ5F2tDjq3vLL3JlK
L72Oet2zPrANXugoDIB6V4zLM77QJB3ICXMRSw3lLKHdoVR1fOZjH7lh6OFJTtre6FJuHv34LR+w
Sc62m9Wix3fNqnF2+9Qp1crzn4iR45vHd5J/GET/E8MKd44F0qOzeLFE7zgwf2+Iy6YZU0LJ7OWe
z0OlZFdrPEAemSaXyLI3Wg2c7W5Ef4UaJISjZfXU+aX/CFAP3KV58g4cgEfSs9fw8iuCFLuLh3Jh
GZg50idBZAseo6HiW0jDA4Nn9S03k0B9v1GqmSWPhP3YhzM/EK26PGYcgF0eivassZQFQSrc6Jil
NsS91pv/HNapigSr2eVnB1wDsPbMOeAWMefmfTJEy770FLL4nJvHH23BcLXTk4vQBAncc/ypOm8W
7K8vIx4OeBmtzlz+HHoN+Ki6SGNYfqwhxJ3Iclxi79j84bg6FlZ/sJmHW3B/BcC+MY8FKzU6WOYl
4ii86/wI6/Ymwxsc/fLpXuJgVnj1G6seQpKpHtSA/+fDWnvd7+23DNdK6HfBGZ+9h1HUSEREwoXj
99Lau/2+L3cctWkmre/U6dbCrUJx+9esOM4lxm0AgWGdwsmiTdhQhm1GO9efcz3nod2wuyLOoRFB
PRHCoU9xUQeiUOHk4A7KAbqWNnKmpYJRUFtQ3lyKzD1zt5ChuiYS+1trXUf0emVBc0RXJeOJM+oy
pdYUCtO7HboKltA1VXkzyJrTAnuRxZ1FiBt3NN7AswsisLqFyQAuddvPGzztWsE/T1mimJzTQK+f
f/Lv/B2HA5evVFXQh51vSrY2ub6y7UStyV1sLz4hRJqfnfYYtn4qKe+hiDORa9CUQSPNnR1nNwVS
OkQkOe7FGwVo2tF2pgxsVaObzuNgR5W00kvbG+HZrYc/VlQXu17CoYAXyKuimeuQUX6IOYQfOtOi
P/656J+ayneD3DdaM4CAxyapYpzyxTtzYw3d3BmLALR36ZccU/VhfYiHYcCtxg9XbjQuCmn0V9tm
VhQXJGWmHnrfgcSUohqw+023UH3zssHKe3HoXWtNxZuFWTm8uBN+FQJWwZg5o1SnFllNmOyhtpJN
XO8SRcSR9ghUC2PkIXtJSv9s4l9Gp1a1m77LFh4HZa3el3/C2W/EGR0B7R2Pzy8Y8kQnfhLd33aj
x06UIZTX/x5oFzGlrD7CuvF5JKo9vOIxzToHh5kdoOD6zjUKUGJYQquc/mE0DMReySwBHVcUIpLT
P0tPzMBnO/rCSMnc9ks+pckz6Kip2rnVsPX+HfAom3uAkz3m42JwY6b/bHCDef0RK/3WUac0dSKM
kEYtrhwBrDcHu2UrE9D4N3TPQpPhltMcgA3rCnJNzhStxgWfSGcSOX489GY3JX51jrPQ4KLwg3Te
uHo9coFgA7zxBD435Ek9ZfJZAcIO0Zt7s2uZwvFyTVmPWSIEW6daOf4f0gxbKYxTM8WdybNJXju9
AuBEu/AVDZ4+JGpSkGoI5khnH625YEMjmDdM7yC1jJKKFINwCI4JiWEAl64hmuHGoqBCRVIgMBYp
hCwZyPZsI1RVFT2dRHGrlaHOioCJ4s9qfl+jXm7NnHKSvxNcZuT+Ubv1PiLUCoGFG+sBAEE7OLIx
156yyQxHYKvnmGVKdSv1JDcqFOBTX70OTB59UidJY5m6HfaEtJa2TRtYd9dfiLW4T+bJCNByHVNJ
BP5PQ906S6hbtLHGTio7Jc/IK25r925Vil9Q71uHrIoeIOuJxTU2THyuDb8th3jMJAWZ28arIcD1
7zvWma3Osergrj5anOk44hmyfHWNmtZzWfjZ8g2mz5sCZf2xhx1wqFFUm2rP++JnqWZWqJpie9P/
FaUflE91AeT0nPFGzJobKS7vxP3YCIxqDXb4W+GNrbrMzqJv62IjXU/5VT55UrYBObNBKr5pNuPp
nl5/A4Sckp8yUP4cXgns9z450Dg8dC2rJeiALt5KoIAI0mqVyz6dmncs3964qm5zvqkhfspebtxv
+/5/HLRk1pKJC/0BEIG3U8PblJ4S3qWAR1ocDE72mQpK1S8J2OpVtmNPWqj+Q8XxAKeFhxNgDseh
3Ys+1h4JfwdhkuL1WuvUWRmr43qJQgrAU1dsla9XqNHMblQy5XDeZddFiARAWW3wQ5mQedn8mA5U
VcD6AFj0+myr/qmfSW0WZomoAlWRHZR8ww60cUN+wUjqZnXcQrMta/v0wrgmsv3Gm8XyHnb593L7
eG4J4D9wit4Xzo8ICB6DhsQ+QOfSpMQ+Uks7P55CB0dzcg3FIehDZWZfWj4jNvAY1gUscTVyYm20
ltt13qwaUWOMqO2BXOxzc3jQ7Wi51nA9iG29RjBhvOs8SIEWaroBNDKCGcQ3HvQk5wLRSMiGq6If
A/12iSm/sYD052pbIGYML2/C6RhJW3M52SyyIXliJtXn3B/si0AgHYfzqT0vXPlxQANLqtU76Uyl
JwP32T30MRjAm6qMdCDKPfadIidlWtpiNS/lxnet2Fgcu2RTx9pSlm5DVmFbm0VH38okdGyJDSIF
p+FEprQ9eDPqoUzNbjd4QlY9bph/Q/CVR7m8dBAbCFdT7pbH6Wdwk7LdzgRhdtDP9jIsKTNNte1q
GMvooCehfU4GiCw5Aa6s4ZZbQSVYuhRYgOHzovGzq1+5wOo7N2JA8vlRYSwwjVyUb2rqq7iWsbg+
JuJapgIlHZCoOngniStpVBvML3CdjisUnPZs7sdb7aLtZRCI8TsyQed5VNTTOv4NXqNYWssW/xWq
6f3VNQFk/gh7GyMyJ3d38QobBhLCLY4hmDK8JEZCWxIL9DN0kaLLviNG2wWKwZL2cD0vxQK+D5M6
PEIAaggXEQmwA138Km55S7ojd/DGbrMb9D+Sj/6WEvXGOXlRpGpFQu+ha0Zx9dB76EhCiH5bYq8w
bqILWA9l62keHeCH4BpTHJg8hCuBw91g8KmUfdeZqhZBGmg+jggKMotw4SoSSGVLhK21Ezgu6kSH
xJ58XYzSKRTRJwiPKrAW/4WoTYupBxtoBdz+SqQ84ip6iqZT0q/H92SSDYacziEwJ3uB05PxUTio
eQqXesLnKDT7FS0PXWpbQ6ZqpzZuwWNroQXXNu1J8npgWoFeQMl5AlAUYOaByxJ9IkIGyYOKvYWA
OgomT6uFDSlbXupq1moQTu5MMxn/ZMWnYIjBUqki5h/yxrMoUH85oCigWxdSG6HkE/Dlp5CORbr6
gSgkUnNa61GlwM8WyTdTAlnPRGGVdb1X4S8CEW5ZGHUyn/oCYY1HKlwtLQyyQeVplakXQCvrJ6kQ
Bg4uyIJgb9c+RoZytzND3ph+muOAgedD8oFvvTx3sNPkT//7bqD5QROXfB/CNgx/tsm0OEgPUtyx
ftKJXDzA7GJhHQNybc4wtemLWBnKgjvyPxxbdEyRdD4wobPkbKzOOTeAMstEFoqr0Y8H7QhkUQam
2jDhUkqJ284W1O4H/XuuB/Vl/qvyU9hoJQcPCgaBGFdq4QRDbpDlmpqlxXrXaHZlgWffJAnQn8Fv
sk4H4Ea0/WjIO8ifNl6SfybYK/5oIAIgUi2Nk8KE1m8gnJUPMXSYWsAeYkR6ybc3C9yJj6NzwSUW
CqJJugNELmiv6J9VPA9PaGQ64c+3pm+cpyDNDHQ1vY1qvj3nEgqx5n0Y39nCsQImiPV/Sg9yh2Bk
HQ4ZMwhLI+nFwK0OZ/zkh4odiDsOBE3M+kMnlZ5BJmXK2t+A59T7AvwpyVEVogCrqtbogq7EyP2R
/KoZIKfyE5vXtjndlUyZjAiNgpjTc1VakSJb07v4Jnou0T2uuBBVLBE8e5fRknL4orW7nwiNGR3A
FjSKy2+CMPD486jawdbxAbwfChXyeCLhOttQScZ5/UuJXKibAEIiWMO0zwi6h0787UrxLIJuioc4
nULkOdY/JKeviefRwjlnZY4q5i8h1F/oMT/HYeWGqrroYovXKcnUxbMWZD+jaopXwpKIKwV/u7gL
ICCVqIDSf8Gom4lbOw1ZcRZKLSyvneRHTfAaqVZivhe1m/wTbLuvizyo5v0fH7nNqAzAgtH7oirl
O09aUTNKpDm720Ay5sPItAEz0pFiZQIRDfWGCHCuuGaXZG0xuyl8ShQxJz/9BEeMVCPhZnOaNv8X
bNe0t7omyZMkSFNPR4U3evzcLjcuK7VEZZdMkX6tka5B3C4bRACtFyOeQCt79Xrriwjp3eDw8Yxl
i4ZnF2nnIzXhArnO3TFIuhZXD15yn9vVT16wMxV0rkzQ2P+1+g1u7aeDNwRT2xaUvdsFLGr61RsA
krrBB/uXlnDPWrMSIoSOLSTC16X9VfDFq7XtK2uA0BmKK5FJeWOI1ArralXwFlj8KdxJ0L25ro4p
IZhykME1I9BoKS3TjfbTDmfX1WVooDH5YBhsp3fnJjyZm0vZ9V7nsz7eC/en9E7r62uh+MrQsnxQ
HEOfnD5I5vsCo4FmTwA6lhGbUO5+59ZQ6busQ3Da/4/gKfWPi7Rx+7Y3AL2HiXlvnKxN32bezNjp
dYjFYXVPdjaFpz0GrP3APSdp3La8UFzXbVhLuwuv0mDPBPScpRdDo2G0X7gso054AFVY6n9p8tdd
5zYfJhmIvj/NqUn/wjbA1Ptn5IjIafceDKqCWE+o9brGUJBbmYQvsYtD4pa83lH8uoKqIULDiSXg
6yxJwmM59viy5qkaOJYrzsWg3wlO+PCkAvqg5HpLKFZUsQIYlmnRFiU2siCw5xh8Lv91KTWQE26H
JygYAC9Di3Fuj9L52dCNMgbtOCerVWI4RqUpIFnC+F3fY0d0urDChvfCB4v5ZfmHK7UQWuUl5DRA
Ncjw2/e3pwmVbyls0YUVrzdizPbhlKDJX7xzvC4K10nrAjnG++RxySdAOFZXubgPzTr62JQtSXmW
IIqO1vKeYP7Zb22j7YH/bXfT/F5cufY3ai23D7tEwC0XTRPsjTnkyjrFZDKy7H4jtCHGqFDihiKn
lzcjRj0nxDEydN0T3XZVLw1ckchidFI80LIRUz5/80zPxLB32RudBu90cckCuB1n8lnmLPij/zE+
aucm3Kwj0LLI/ESxyT4RR0eJrEyPbq9hWnKrwAbHzhPaF+fffQmkrsUci95u/+x5LJP6G4/zY5ZU
42fBuiz8uxbweZF5KyivG516l+EjFp1oi1B96wKupMTLWNO5UC4Axpffk4EKZEEns0gYRwpJIJRE
k8wuG63EMGWNSCTG/RO5z9NxoZktD7g60co/R42CBfts1WLyi+ow7jHsNlPv2xDWQd26f9hJIG0e
TVk9W8+8PqEnJMnsgKAfDu8qnlNGOsOHkqE+0aqrtum7PjdweTcx62yaHJffKPA9+xi5XkwSw90Q
gvLoWjJpXh3ptwi4hIt+bp5SLcz1MgCE3s+B9GMkZp6eji4CZRJ4Y8HsDzXziQLOBcJQbavNtaQc
TKFoacbgnSmdbaLo6XIalSOZIEQbh87hhxV6K+UWL1flpVWVAsJlAajEXmi7Y1H97PKK4PzSN+fr
yJifROBUNzCVFwmnra+Zipb4E5Lcxyic9aLP4yppTbb/i3T4qOrnXLKwuSrhJXSCcTyIRNfCOFlv
XN7teOJs72V0dh9L2Cz+VbtkRX0l6NYasCjX5gO0C9MmgYx+KYUX4dFrpHbbUVI/aeFPSRXeqpDp
Bj9ql3XKb0y+qM3C+ISe74cIUmyZPAsxtspP4l5ZqJ+0B83nubj14d/NJVghYmn7MX91fvjVASmN
lHcGwVvjoBHip3wjmlEjH6SoXc9kZSi06Y86jAP1G1cetsxKKdscQvvIUgoMDbTIh6hwcJVeWzdL
FeU4QV/2aGp2kibI09y/XFAZ2mNG6KrztPsjXWq3ds8FwxjebgVCba+YBkr11MEoN8SQGoQunHoR
wD0amqgzGzavEsdYCJ8t2cCLE6pF55bmrf4hm3BUaEi+H93IC5sJ2FrXcBTJB34BRd3BWFA4sQn8
EHoI6sWL/HNvZS+gmk9tJxOpZdOlBmBvL7QUxs9O7HcdiJgqyWSO2WiYWifPywrmOTezB/3RbwAO
kCUo352IbRcj3TrkIOubd3/438v4D7Ft3DhuapnoCgB3AiCh5BOxLotQ9OLv93+EDKzj/zShPRlD
D59DjxgDs4Iu+g15WT/OKtcR3zlU4vfTWVU8Pr0Rrd9q336s3AfGKPsXXriQ6NZ9n9r5uEGts4dA
CYsfvUEE6TTkT7HDGNd88HhGc9mYTrvIYqnxNJ2Dfxdy3D6py5NGKwO6Z/oHkj6jB0bWGX/iwhbN
OZ8Kc2Y/JJdWFNMlOGHs+2mgWXt6E5z02EvayLNFqqXbzAWxSJ4gVWUkRW1w4X6kYXnUfn/uK9T8
fyhoOAFAK7KnWzDARKpQjPRv4cyZKWEU8ND2VGBYHHhelKiwkDMuKr8qCOHoiTY9LsSSTJ0y3Om5
zPbN4R4hd7Ki1teS5VRo9DgtjemIkmKBmt9AVyH8O7supJ4F7fWQI9zIGnoUPi2/DYYul6u+5iWT
Nnlokkjfdc4WCCICsJu4zYJ/8oFwpYBTtAunbPpcyXF/jj8BGbtrurRFhOc9OHpTS5riE7CjTD41
SMNvyBkzXhdBL7s9fFTUr2SwP/m/pdiYt1Y8+cPm/1EIyP5d5UbuPMKsZl3LDwWXCMnKi/h3PD2z
CGJbKmdAx1uch5biRyNx6w3CCPCangeKeYwHKLHU3QjsWtCBfoAkwR+YArHSuJu8Xvtd34qhtsiL
s3yC9fez7iMXGfqasfXLzwl/T1pnQLZ2q5XYcSmbjHxP/9A27xwKycajveYOqzAvM3CRfiZE8eY6
nI0NQlJ53WwU2oTg26Z6QRQe3XHyzBwou5E1nBjHU2cxdKlVp9DtJEqKHiY19jXJ15FW+qthh9G3
7MbDqD0hJC4kwh8UFZkjzWYM6JzvLGwdsQBfme8bOryRIVZ67tt4bFVVLM9FXD4pW0GJ6ORp8Tdi
4nJ6S3aD+mYkO9ofUAzhp1lc820p3nSEDgqvhWKK+V8arvQArAOVqlMsfcrxjTAftF+gupUsk4Uu
x+TuA+NA2OPMbOvrKHF/9q/bRDZFWAK1pqkR/ayn+Hr9aqdjxKLKLgWR5GJILTb6RvYPQ7C4/P9u
ORGmHF3yzCa8y0jOFH93CrTEfxSjBF0EiTlKkF8k/2JU0TKPm5zvg6slp2L/EEy0ydkfd2uVivJM
qWFaC71OR8sCvnHywV9Rqc/3Z5M2hIVDYOyota7W0D+EpXlGCDVDQTpNeGWmOLMqNfWr9mWdkNpv
GYuGydcdMKsPCIlXc1LGOaspNv21aHliav8RjakyVwcswmUhf4ZBHyByl3pyxgpm9fvfdXUC4KzO
tu4VTi7sGKg3DdJhVLw6k/2u2icZUQJBG06UWsOYro6lLEAa68zHBoXCTBDX1LdBbB0EpvjZGyiV
uRE+GXFmHrA/q8FCObD20V/4gXKXk96VrBgMlOCPfO4TJLu2BNdhasrxouG2R9Tf4ha3DpYB5Wuc
u0SGgldtDs6NlsmbqCFk10eYfWxWmYr7FmwhHlxzl9F8T97rG2QylnqUtYMDx5M9tA9+oLYxWA8y
A61+YQeWWM79SjgKWslaAG554is4whtWWKHUsHr1n7NYjd26Xge/QVwVvSQh2RwbfymuNEN/70nO
f5l1YSAhk1y/G3FFQ3eccWGONkdgA9dS9HZQR7SD++bYaL7Y31aVlOxtswK1jcHpFCTFWeChLhpk
DhoqBem38sM9At8UHDlWF7FnNAdhktmFUDxRIqNrYrFlhR5Ay5crXOKjDrTyb8zQYmAalRw+P3dt
9fkWxL2T6HAMYBjUAvwxPOx3FXGcW7dkxacjYVhZ47bVwupVqkgXiYkIDfmm9tjzFNPCQnIDtgPR
22s3BLR4rzfdd1W6ClCfGZ33+Lcvtdd9Ki+ToBL4StuX9+m9nY0eq/rislQWncvUWRVJfHsBK+JW
b3dfPRlF4ThV5RejfaAqeMycTNOLFrA8X+xl3fZkznaeVNrgkR4kwoDX2c2Y4oUWRxg5an9f6XME
h5UtbZe1NWmkPyew4JFdfnNc+OItFmUqcl4XQxzLtu/yeQzsZyPgKfKbrZliJk7r5SqcKVjI+1/u
BssgQeOwTpFRPsa2skTlRCvfxpFwBXYQOkncuApZXm3H9ImD8i99TkdhAZ8NWgiMGx7rV2J3CCI5
HsIp3c31R1wqeIc8490LHA9lTaqll7qbFAsnlPCl3H4sik7s8zflMICkU+efqDw7eZ8f6rqVVVmh
MVUYBnN97fby00WKxxnfX/5ZjKDrN6aiFvfS8tCxuEgaYRk9kmkIXugVN6NzveA3HqSOhYMhKGKe
JFqOwIO7XaEuFPVFmRdwDreq6VIIsQvspti8FGzLp515iW3yBgfqUPz9yQyIEyzKSjfIuGcnc+Nl
53FjdgfO8sHjhl27ZrqtLlZXmHNt1QTIbla6eWi4A+ANmMq1Y82B1nJa/3DKWjO8O8ikeS55lE9/
rBW33a5rSwc91N8sK9MH9ltCWqCHzi9hh4nLPXYs0p63Ba1BX2BTEdHAMiV/ok7Gk3mE/xrbysXB
OsHxm/PTXLq1Oruj9e0Flq22LadcL1O/ORC4JSBOiiuM9gr4TqV/gDQtqKIIrYkM54hiOOsqqolt
2A0D6WDStP4Izq+kNwgo0WAOXA+JYOGHTHHRtkjSjMynoG6G7DtSNojNuPwXQEGyf2gtzfNWlyT2
XjOd44j92KD+xypnrDyiuuF5/HDY/EZqe/gEX7eB0n+d8POCNdlF0wY1m7sTcWRKbBWi+C4uj5nC
B0jFvqs+NEuIq0GN2tFo+Ec5OXuEP6EMYQGl1ODp7STVcqPqpma0n1YREle+zk8moNQW89cr0XwL
fAAaYcVNtR8pt2SOPnBu1ud25wfn1rf7gqp26RjKDz3HUT95C5RC584NThsfxQKdq5N1R+TRBfbA
LnMrcp9/gs2ZbcUq1Csl0IU5KbrWEzyG2Jkhrv1u0ZtToppSSSL0i8x5a5XjjkFQH6v5b2FdX7IJ
vboF3oVcuM4hjOKvru6TxveJKkRXAKn3T85gpZ6tqn9lWwIB3/VBbRBTulbAycK2aXgR41wbOmXg
QNMq39AVJRBU+wOnxXZr7+37NKgMNnKWvvc09ArGGJLv+Z8L4TP45esWft8psoczuZxBQjOBePHz
HnfM9/zkXAix763TqxsfjxCJJO/wC44vt7vQdUsZyVRYVoOgvnWad7bYV0tAORl3NjzUYDu/7Obu
WqBkovNas0ezzlTAzKuzlo5uxBonTn05kRcFsil3TfNLmAyO1pvn7UxNpbytHH9aAgi8kx5iyHjI
icVFxq6wt3jZ68/S36AKm2Naq1kZva+2TmU9hiSPQVVKpE2EnC2j51C+g2m9/apvF9lg1PQG/Omn
0IjWfrKAvR5i1MY4FRtksBpFRmm6vTYYcgXQohY4UYylbtw4v0ehzx2zWObmMXQkKwMRPi4tmoh+
q3pjDIws47VK8TWzDXuBY0GVQ0cty4xAUtzKd+NMYMqlzZxnAFEpu6jhaQq6w1LzfqWZnbl+1Ext
1NJJzOnKdPXbHlTD1DVoKPiK/9lF6jsvBmrphNXTr5s5JCLeqR0pENXQjtbZJZg8NpqEJzpiEEPC
MgiDFdPFY617TuVFl7NyyUehhnBo58hv4nU58I05y3YgWZ9eB7j2Pa2tlFhqo2b0bV3Wu38WzmBg
wJMu3+aKl2WkH9KRNkmt3gjDQSDG05gGaXl/6YKShvF8dfZ1sKiXXldXHqPH3Mk9TovBoyQdLGFK
HW4NxnjJDBIar/Qq9w8/gIlFAfiM1EG3D7XH7YhK+8OVXS0edGuuj2qsHaOAdp4HX4qWum5KqRvF
vYpmT1YLBHzUJ+tE/5oZUkk9cVP1/KO44APxW6dKTmbGj5HlMhR/DdeK+cRGlMAjFo9BcDdL2k+j
OaREG08x4yWQ/7Z94F/jlNUQeZiO+ccDNPVjmqNk+k3t5xtANrk8PesyWIs6/kziY/mEC9ozlx4a
J23X7ajw1HBSchZGBr0STwWoLZSz8yY3wfaqmO6j3ofzFeT778MV5efqiZKdOJqNjvQjOqEBpS1O
gRPjdQN14G+vee50c7cOmWF8rpUErCEJbtRotTUsZ1zewOs6b1ALGrpT8dZ7zi/2SWKsmn+AvAKN
4PzVI+0fJEqfYc9vuaTwPNb6o6rFvfbpGw5MOBCYUZ9XqywtiyzSlRNbECgj59v3X8GN2OOZmElV
V87n29XnqTND0Rb3EprztQeoMLMHFSKVPMkPzbdyOPMsDU2rr+tkD/sHPQpIDze3cIoQiT9PRrQF
35sD0nRiWngPOc4VxIJE9h2ITen07Rn1PQy31vcOVn0HCYBHpZa2fiJ4lU1YRVzyVZfuGDldE0tA
skEDnkOA3QtsbofmeNZIG8H5jD4vdXW+tk1Gb7facgTCLt2aL5K/zXEQ348EZTSFTgIxNeSi0JJS
6jGYW4/Ye3FLPeUuy+ZrFF8+ZAy8lp5WaiFO6xYQrRrR2K1Qu6faPBUD+RQSF9rtKHwSwLZyFOYW
A+VYQUUyNadoSx8tx9Ll4d9XBdOoDxHEgHd4nQ+N/GnZpOlxmoTK2U4z2TRFQdUJpFLAje2x7Zhy
/tyEc0VZ721GQ7VdIjevzlyYrZla2Mol3eELzY1wJrFGa/22gh5HN6pPvoMAUg/qLk46b5E6CrIE
VLetU/uLZZf1MMviF+iyKXWtJol1MUbHOVUGFrUb64eYirmuP5WylzxyRZs9lL7y1Uj9xeBJW13F
CnSMn9Z9szQVCtYNzdvgJN0h9C2zF60bGErQO9IVjG6ZajTfZttjNP3gB/dUunKBtjPwd6CSQDF5
9MRc9x2CAQkWj9oiFFZLLykegY2erht7tHrduDP6OUvsxynJNUOlhJb74k4Zha5aTl7appcs527a
IpIy+01oKZ7bpLDDvRDpT8aooRVVg/63KQWJpg/ZjfE+i2dpeaOlVHUcXr3WFkQuT62enDNFs6kr
m7TpDBlr4U3x0IRGnE2zburjcZJ5w/MLyt9d+Pc=
`protect end_protected
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
iisr0ydwFOm3eepmhOYSaxO3flYpViRsLN97vKyw+ai+x1TubmaH8qRRwK/QFeVsjlGTFdxookcr
olQwv0bmdw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
dJvTzz+PoD3n2Ot9SgKfpEhIshJxklhDhS1tYcrcmprfs5wN+lN+5Y+o9jEEql61IqDkJEIGu0xp
zaDWEeMqwkFuovmZnp/AnbrHb7R/19zPRtwSyZ8+VQRLsRMgscwutXu29fTUST6Ribitutae85tQ
1okc5mYK0mcSMIggcMg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
ZijKIWnBSOuwn6R4ZrzJp1qaSPGZMrP8GTp+SV+Sn9xEivGxLJtGM40xMLXxiYuxIopDD/A1usG6
HkSoNT6OzxHJWKkUEyyVzrZuJdNHJ5q3s3y5LSNY7eMxN9lY4/gygh7aVIBAO9YWzsWu3HLtrHA5
2vsUFQxQdkG5OTLVP1rH68P4j/dhqr/LVHw+9H76c/knGyalpHLRC7tnHQcfuezFJWlkzaNGHfUo
b5cE1YTvtdlZVmw2sVG/GbXIRi5fq3+Okdy+JgckZ4dVWbI20rfa9LkI09/kwD3anyrnovVQVx9h
F0AxolVKVVyWNAaSu1fvXllqzrdJiRLbdnsq0Q==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
LUajPw/jRTLlmEKb+9YylQ2jxw4jlSx/1GGaY1wFfWFdMwK2p0xvQMjui8K3EqJF0fnb3QNWuQDl
1vTtf04vcOAHkfRCeW7Mbp8qeUTtAsflGIPJDxHfVU8ZKprwANsENc8LVrpJ0WnjDFQIzJw7LDqc
Jj2TofWjKprdxXsMnu4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
KG6kiSPrd66zvVpG96eKD+783ebVLVFNF7pXgq+rCyBBRoa0N9Hp3DIWK5125mkICodI82zuSq6k
C8aCiPbDiv4tiuIn19WDNNPL4ncknL0KLZTLAkq0BIQIsnFNRaZegM9aXOdMYGKYLpnjSD9KRWRt
WPXPZfwprSu2D7PeDZMiij3MY+cixttgVmNfcx9Kkmvg+1B5sTSDTVs3fqpJBBO1YslTmxyJAIC6
uDuGqvQ1138z6f4f+f8vMXratK1Ypo3jPPb4FTNLYJio5Vd1Nbpl9kRRtj801Ie0GGhbggK6IXJx
785o6wX6g3tRyoHXGJ4DGUmWlIHATg0KIAflYw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 13424)
`protect data_block
rEtV4Bm3SmvVbKq1runp2SaaO1GImraXNQnz2t97NClVhlTBGZ14v+hHArmsTHZNME/QWduIEcCL
I8GdWPb/f0NXI5m0D8vUM2MFHCnzTFi82f0pjwFGBVpM7cHKBa5QRX5K/e5A/9KwgbwYV1tKqTXG
aWyx6JRfuzQINO3rQqM+n/1b6LSLygDM1QuiPthpMFKV8IfsVkaLDVqcLxH9/n7C64aisv1xK+OH
WhYRETSZok8+gbvdGdr2+VsE64ALl3DavNBK4S7IOGP5YtXviHmw+Qb/lvl6m+RggRYmTe1A6B5r
pghgGDxK2gS0ItU55quFmZMEuEH+bwLuaJA0/UWR19oWnbcTZnsCqEeN/xbKUzS6blm1K6RPZtYe
WSGhjFl0cKHEQe9DfEazTm6tS9mJ55lLbSuwE5o03LDGRapxUdSR0IiKy5C5UP4genzVw3zearva
qPWmPeGZcAEyFioI2o4OWQP+8mFdbza1kBOuw4BP76P2c+ij6wbxXAWVxtNmL8f6AgS1AV5SqIO0
ftTCve0JloVh9kpHsbXE1TS45+y0IuiC0N3a8PAEsXa/tnLsnAydpsXIQwMLXmgKfoXKzabAHHdI
XZJd/NxD7+xY3aINMVaO5eSSLIdjkYZIeqm6qf+x2eNd9v2nue3I9rjHkjMBIty9wqDCI5HznV19
h0aPmdRn9t7Ft5xXq0GXqSl2I9ZROoM4hg3RU6TCVY4IaDkErgP5cMhIwuHsntmeWvsvkZFygQtU
9TUaf90O9HINFkrdIHf0ZCgtCgUw6ffQNPAkw/6MaoKxm9wdczGi3ur+eyRvSLy7+LQX/dOqvXKM
9UFNjkQk392HWfkT8aaXacuJgFT4hmoEXDGY+tSqQrQRrPmelj+ksf3PcI2r64RSTjiR+9HNqWqJ
jPJio2xgGdQdGrH+UewLz0ySmNDYmqxIdyqKfv/B1BYMUpGd+l0eRCp0RwjP6nt7MKkBishuJTL2
2kpCGDQ4HELrlovnj0dMihRpFZAIpY55DfNVE2hnbkHthyDrEXapmovyPqDFel+HKDdimVyeM8CR
DKl0D2+OZK8XWAiVk9Ve6w0rONvwf/XvaAkgxa3rDJQo/8g8oiGRq4ku5l3OZUKrPVRcjVNCxHRq
81RLF34Ztt0FyGvWgFBPXPwl/QfIQcetnIv8BBHDyYvjjUEJZxJ0yVIBqSipzmyIn34Kt0GvhgJJ
oXsivJz4IQp2WiLYnKzv7NuBWYnOF+M/H8eFTLS7ynV/b0CRf7qayeeaKYL0uv9mUeXbILs7F9+8
XkemV9ihHFfHS04009LEbIzG2O13pEZ78n4YAi47TmCv22T8/Ve6sSAGowqE6FfeksCmQ1+Z98YQ
uXIyCDvF0dlGJwZxogjNRbjyCBj6OOagNPhSW71GcVdRv5XSPoZsF68V4hWQeNb+itDo7ZPtZJoJ
YzLjFDCWp+2G5a8+OtWGetlJNejx9rEDOQvPXNhCi9xzzzSvIevRpnt9XX8uVwzzSJnKhI91LgRg
ID2cjEMis7S70eKGvR2/KBOhU/KAbsgGALtSpbd8HPFqo4CWuxEHCYImqvt7m+vI7jIEpXbwjtx8
QWNgKL8RNSViXrcj5CsXvOI28Nk2V+GZ8jr1/8I4R/Yns4Xfj1TTWzVeNCNHbazn1nufigCGV4Vl
qtDHRGZpM2GzgWRsMj5tsZldV3pp52C/Dpr/92KUqWKMf/mZbYDJL1X0X2Tw7iboFgBgx1miq+ht
zrLMfkmBPAPakC7uTHv8wdz7HICGyvCct17zvGp/b+9c5KI7lCBCd9jn5PTW35q5ksO4eC9R2AqE
0xJmD9GKB17q8Jk7vlAMs/IJV9rgMDnRfyFkOl4hl2S45SaIY1ObTSNIHJYg+rp/nN6BMaWKrR+7
O6t2IjDTrKFkfrU0cMF3G7EiQSf6RI1d8iyqNJLJJ3fbFhF7XLnn/CwlkZ/03Hwn1nJocabXwbc2
9Q6RrzrxLCWMZVoXaUEBQvapxENHsyZOrmSevUQnuCknCx9Eh/GwdP2bYVHxXWg7ySdjQnVMtR4v
qT7n0yJuHI0ite3a92Oo/MBdlgCwEcxfvgz0ILRIK4wFe098lGOX0tVEsLdEUijEAeQR38bksd9a
fuwZzPBvMZQ+FON4CQYrDg971r8Qz89ArQjVxWF7TdD0Oaq9vaUrLocNzIw9AcIy8rWaQnwTR/K0
PsXLapKx1fOSZnuztuMHoRXGaqZVlZJGs22/GiJA9y/IBflmF5GNFnRUbXVT8r+FfMb7zIr8eP+b
OcPNp6F4kqt/b8gae/9JOIopCuWXpu5kDe0U5aC2qmvMuYbNI88aUx34i3WHd8NWKNbdtGDaQ8nM
iyuSX4j7EgwTOuBR/iFM7rZAATM59ZFv+9wRq8hbXVvfsBp13upya8YovLN1O9OWrzxUWym9ZPN1
mDhMT1YgOqVRaJ2ADyjP98UghsOXt6ybu9jGeEndP5T4mZjxZp82OMxqqS6VolaMbGRNPa271n87
65g6Q9l7RYtOL1PjdBOlgNpUdYZwxJ2EGgI1wPnrnuUiZ7sdhpuFkhJDdh2mHYlIUZHAsriLKEHR
XOdtU+Desuf1ojV6OryxMP052nRo3DfSj5+dKgSFWVXGLiS4Q5dQxDHIvUugnqZqf+FK5inrMME5
1eHWMPkrqY3H9syJMZ7RM9SwYc/zjL9fOqr9mE+npGx50NODLrgb0FydLIXRotOtI+YSbZHKzsKt
xoZNcJJ4GasWF69GNvRenQ3kp1eh71xjJw5a0KZmhsJJXThZLqSzb/sTisTU8jCaMh6S6ag0knK7
jonbXo+dctsmQfLpvLXHN4TNqJnY6alIH0HnsTz7EklgiqvaLbFn+25uUJSNDHESZG2BaAtNvG/4
WuvQCSLWeuJpsrPd+06Bzmmnlvn9InJZhGDVhnZlfj7Kh2PolkMjpLgzqH4f9hm/7zH7o7msjyvZ
Rj/JnTghr2ou7m5Ayp5K+yFEUt/y9WWmqXlKOpf12P8RITbx8ILm1kWRqB8L+xfF1r2HXt+av43O
pyKFj4Kq1FZckfpg2It+beWX2P825O6hDubEjA2RyF/zyyc3lMSS7vtAQMEOEJnWNslP5r0po6TK
F5+Ikch7kOxVShNh4LWWzwFtJb9SBv0iFIezeCGrgApE2blMwedVwOdpPdPvsQjNRYc8YG+dStcY
JUIrNMdc6m5qSEWO36XNGXLN/ZrjKkZcCr+z5oN8Oa4cO8jxqZo5bZDRVUh4VXM8a+hHCiVvWsEG
HkxV52NFazh7Duhb2Ix5qYigebEWfDnA3frHeY+lRAIE3+X/YoDjgbPuOqgwawkAvhSCeNbNxuTS
T9ZzmE8PWRbDowhElwhdboesSdX9tyyp7yCSM6fxKFXbUrPplwsSNsMYsJJ9grw0leD0bx4Cd0Vy
Y8dDayiLLROqmsdsKe7b4i2o6u8A0RQrPB31DrVO/yPiNygxChVesembc822gDnOAlf6FO502nEU
ItbE4EyM6ZuRk+69RSoT+2AZGRndh55WMQYb6i7ALzZeSttxOh6V+LV5SNYYdeQouPNdd+N45DZn
niJzd/11g0AFDHSZFxMK9p0VsOmXbAPFEjcTvMS7PiMwhUsav6ZfZjkVwz4X9s1v8DCZpNbKSq88
kGJQIcZYRdAPuD7V1zvdo0Zf6leEwpYg5lACMpJ8rGWyLPBrYD/CsWB0THjSjjkRntpZXUTF5Sq1
IPSYaQtCSAHZKO95giPeqw3zw2XQ5ci2o+t0eS1YvmSPlvMfZRnkdx98t2mA8ABd64gljY5f+0O0
px5Pec1R5VTiPNgghdEJlgrPqQxSP7vDXo0dtJmtqeP90QCRgaOqEt27wpqzv0KFUth0XwtaJeQ5
dejR/hEOliBmBscgJkx0gBF/nLybnTcQ6xwwOe25uqhvJIiepSDJE4ICrD/MSurrVfozreQGinSL
a/tMurSZF67eavaP5tFe2G44AmkmV4WBRnOeWOW2dJ2Q1sYHMUzfnWjdSw1sJJu6+Y0fUowVqq0Q
K2lcfV1v+sdb0adNWmXRoPrjCpXnMpWUyUXWCaY8r49ipi+4TCdxE4p/IUZfO1aumt4+xQcBT0dh
t1WR18HGPmHp719a+JPxfWkOQjw5JnEukkqxKV6fqJPDzGrHDJvrkNy1tkX0MN6Z+Olw//0xoyyG
9SEwAH72HyUlbfM2lhwM9N6f4cr+CLxPF2At8ppy84kKN/H+2RDt520oTXKCcGFU/txd8LdCs9qG
3diwadeKrfsinlzq/W+3PUAPHvjHcwRyRb4m4Wv6J0kW7ItY1ox7z91NbPGA481MOKLtCEwm6vuk
sfLsMi7+T/Hm+qsOXlQ9i8Pf9VAE9LWS2byZEwPIYDYtbLm2L09NRsMgfm6PotDA/9WaPtrx/CrM
IMllkwsRz86jBnsfx1s6w2v/gxQFWv0fY8mf1WywsWC+WArpCmvfHO0WMIJtyS/B+XcdiLdfrrJ3
qeRMJy8lhDn9mvRTVYzLXtu6Fv98eAxRiP4hPmT4+kxhTz4CT4cDPP9YKhdzODoL28xWfAYFbD04
Z7nP2BAp3o1FR08u/ctwg8oxDjcRwHkmDHquzKrPjnQBKXv9IMSCNsR7asFA/JqdhHcmuKZg6PRk
6XzKLzz1/Zs3XVZ/rpAcA4yoz12/yPHmsazO+a6cgbZy7JTSwRBhRd31L/KB4M7WXzNJ4paZAsOI
O5FWmQpp6eEyGGXpKkGy2qdqVRuRe0IjzwDJG6clerafsgCAj755Q2eTRVVvvRQw+G+hVjqaFu/+
m9KSJt+0hjHW1BHC4wyHN94ORPERUFukKcxOq8a3C4r5hTOZW3XWq1v7Ks4H7Zwi4AlNCGUKQ0ON
VSZKVFl61F+tBDQk+IqFz1WMfzhOfRJYfalfeqp5HOOIaK9cOhXG2oYdhceL4LDJlhJPAqpAc23Z
G9mCLMh7l3PvdGUWIx2s5Z4EpUsaxWTxxqD4a+cGuaZLzeV55zSCZ5qehwrwRTYvoBZE1+lOXnfi
Ryt8wko4y/GJZL/NuHI8l8tJKmVjS+XqWIN5sWUs9WMNit0HB/gZfmTuuvpwP7gjFuUjS2Q+jgYC
9ppF022c89tfs59OKVOjOQ9s2b2FlXyn4zn9AXI7AYGal0MNPRsQwnnaZJiTebyHcwtZucfEnh6z
9K9skBFs29qlMPNYsFP7y8mzdNhDng3TEgYpao3SPfXwDj/CSw/ObVggf8enRTUNlDfJ+17WwDyO
/ajc27MzTRLyBCCQhUYvMn80lvwSHxWDIL3xKvr2OLMoIAmgIZJG3sJMyhsOPqFxVb1Qk7NcojOn
D11t84xem8WyHJRbm0pbKV40U5U40scS0H5bcMWTEfGT4W0Mt47O181hbfymq/ykV0yIpouFyaDb
tUvUtKWqMknlkUxdllrfasNUWgJUfn8Cl8EV1Z3U5ABYiUNuRr5oKcdwlS7eB/n+UgV71hPGXiii
tFKvLiZLXS9l/eoEDDKLm6/8OksoHEEFzRFIR8skagCp4rd4fSGbOUietH2v8ecJdTlXFP0ex7TX
vh51q5DGduPDyv5nJCNInuPVn9Z9r55S/RGw+ySGAcaPEqaldHWakl5LrzE1/zI4K707/QMAGDAl
HQdn4RCGxESdD4HJn35p8o9hnYl7WqaHBddVyszwX//kjQ4qJolh4qp+txlSxnSJmCs83a+aCvMk
IbAnKPRH3SP74XCHOQ3bziFlRO0Q1JWSUp+e9CxVX0iTOPbgrB+wD9yT1o6m+o45pOEi4yqt1ZwB
6GRU83LP6o8j9UURxZDZ5WMgpNs4xuaPxAt+XstW7JOy51tYRnIykokiQYYg+aWP02kEZ7KL2cif
/t3AkMcRC0iKXbo3c1/h2uNlHbvkqXBOZnmGMzMriXwdE44Vt7izgW2oY3N5IFwqNHPtWi9SS6yA
hcD+oqiZ5YnDx8Be3R5HxKPygh4K5ePLmLR6um0pz3P8seQq1RKFP9ctf/u1v+7BlNqcdEez0X0N
I4X1lXx9dw1MpdfXfG2riDistMNSEH4Rrccb4Y/8cnRL9fh3mO987Fb0uI03HcxJiExzcwHZ9dco
s3vvxZTsaIGr2xmmD+LsMSI00fJFv0/mbMB3LLQfURbbNvuYtBK+fA8U8TOqSRvPYwXdCjv80svZ
ecFEkHhpXJBNTWSfUIzupFvHeVSIxo1FYZEy4sS3rdwokvKAiZK3rnzY+Ryed1c8On/UbN07w7X6
m6hS6lOKjYh+wxgHNswvu8N4sknoUX7Hwp9LBuU8+T0Ca/tOrCkICtK8kD5WkMmpO6IWAXUjK4Z8
/OmRAfzuhQeScqBIQTMuw2IkQruwSdfY/2ev76Y8v5xSi/gzcXVjJ6pNWe8NhZ5pL8vuon9u8D9v
ac2sfrz5UyHorqRAvNxS0nxaWXiYHYmk54FYhWXq/l06uTApLWRBji257/fX7WCJ6JtNeLLcAFYG
ui6Qlw2u4ilhoM33Ba9OQD+hKXM93Ab35owHIBR48oqnZlu/gRs9B7w/mQ9P7Aq6DwyYiEy7zN6P
zIrKF6PEXI2oo5vRRDZlhHjnxlG1qbQvhZImGO8R1X3muvsJ0Z9NyHew0PCSz7i9mW6rY2m1FJBl
jLOuJd9a+SClV8HYSGnNlxIsBxxS4kdb8pJAiZyO1GsyFurgT9epWWxp6MeSTru98ZQ2HxuKRPAh
LAyFLPqo+UCcwRFhd6SEMQhkLktq/u+ZRteg3JfitjOD93M8XsrOOZXAvc8OK94NqeYOeOIYfeiA
Bh8AZZCTK3Xt4QLtJ2oyW6gLSK/gyvC1P9wVOFLK0VxRCj7UL1ENqTGIylLsQV1EDrxvDeHgkr8n
+celZ0eo5oJZQc+yNrl6D8RLDaFfOndjQQuP1VMMLt/r+SCqzoIQpeaPzjqcZ5F2tDjq3vLL3JlK
L72Oet2zPrANXugoDIB6V4zLM77QJB3ICXMRSw3lLKHdoVR1fOZjH7lh6OFJTtre6FJuHv34LR+w
Sc62m9Wix3fNqnF2+9Qp1crzn4iR45vHd5J/GET/E8MKd44F0qOzeLFE7zgwf2+Iy6YZU0LJ7OWe
z0OlZFdrPEAemSaXyLI3Wg2c7W5Ef4UaJISjZfXU+aX/CFAP3KV58g4cgEfSs9fw8iuCFLuLh3Jh
GZg50idBZAseo6HiW0jDA4Nn9S03k0B9v1GqmSWPhP3YhzM/EK26PGYcgF0eivassZQFQSrc6Jil
NsS91pv/HNapigSr2eVnB1wDsPbMOeAWMefmfTJEy770FLL4nJvHH23BcLXTk4vQBAncc/ypOm8W
7K8vIx4OeBmtzlz+HHoN+Ki6SGNYfqwhxJ3Iclxi79j84bg6FlZ/sJmHW3B/BcC+MY8FKzU6WOYl
4ii86/wI6/Ymwxsc/fLpXuJgVnj1G6seQpKpHtSA/+fDWnvd7+23DNdK6HfBGZ+9h1HUSEREwoXj
99Lau/2+L3cctWkmre/U6dbCrUJx+9esOM4lxm0AgWGdwsmiTdhQhm1GO9efcz3nod2wuyLOoRFB
PRHCoU9xUQeiUOHk4A7KAbqWNnKmpYJRUFtQ3lyKzD1zt5ChuiYS+1trXUf0emVBc0RXJeOJM+oy
pdYUCtO7HboKltA1VXkzyJrTAnuRxZ1FiBt3NN7AswsisLqFyQAuddvPGzztWsE/T1mimJzTQK+f
f/Lv/B2HA5evVFXQh51vSrY2ub6y7UStyV1sLz4hRJqfnfYYtn4qKe+hiDORa9CUQSPNnR1nNwVS
OkQkOe7FGwVo2tF2pgxsVaObzuNgR5W00kvbG+HZrYc/VlQXu17CoYAXyKuimeuQUX6IOYQfOtOi
P/656J+ayneD3DdaM4CAxyapYpzyxTtzYw3d3BmLALR36ZccU/VhfYiHYcCtxg9XbjQuCmn0V9tm
VhQXJGWmHnrfgcSUohqw+023UH3zssHKe3HoXWtNxZuFWTm8uBN+FQJWwZg5o1SnFllNmOyhtpJN
XO8SRcSR9ghUC2PkIXtJSv9s4l9Gp1a1m77LFh4HZa3el3/C2W/EGR0B7R2Pzy8Y8kQnfhLd33aj
x06UIZTX/x5oFzGlrD7CuvF5JKo9vOIxzToHh5kdoOD6zjUKUGJYQquc/mE0DMReySwBHVcUIpLT
P0tPzMBnO/rCSMnc9ks+pckz6Kip2rnVsPX+HfAom3uAkz3m42JwY6b/bHCDef0RK/3WUac0dSKM
kEYtrhwBrDcHu2UrE9D4N3TPQpPhltMcgA3rCnJNzhStxgWfSGcSOX489GY3JX51jrPQ4KLwg3Te
uHo9coFgA7zxBD435Ek9ZfJZAcIO0Zt7s2uZwvFyTVmPWSIEW6daOf4f0gxbKYxTM8WdybNJXju9
AuBEu/AVDZ4+JGpSkGoI5khnH625YEMjmDdM7yC1jJKKFINwCI4JiWEAl64hmuHGoqBCRVIgMBYp
hCwZyPZsI1RVFT2dRHGrlaHOioCJ4s9qfl+jXm7NnHKSvxNcZuT+Ubv1PiLUCoGFG+sBAEE7OLIx
156yyQxHYKvnmGVKdSv1JDcqFOBTX70OTB59UidJY5m6HfaEtJa2TRtYd9dfiLW4T+bJCNByHVNJ
BP5PQ906S6hbtLHGTio7Jc/IK25r925Vil9Q71uHrIoeIOuJxTU2THyuDb8th3jMJAWZ28arIcD1
7zvWma3Osergrj5anOk44hmyfHWNmtZzWfjZ8g2mz5sCZf2xhx1wqFFUm2rP++JnqWZWqJpie9P/
FaUflE91AeT0nPFGzJobKS7vxP3YCIxqDXb4W+GNrbrMzqJv62IjXU/5VT55UrYBObNBKr5pNuPp
nl5/A4Sckp8yUP4cXgns9z450Dg8dC2rJeiALt5KoIAI0mqVyz6dmncs3964qm5zvqkhfspebtxv
+/5/HLRk1pKJC/0BEIG3U8PblJ4S3qWAR1ocDE72mQpK1S8J2OpVtmNPWqj+Q8XxAKeFhxNgDseh
3Ys+1h4JfwdhkuL1WuvUWRmr43qJQgrAU1dsla9XqNHMblQy5XDeZddFiARAWW3wQ5mQedn8mA5U
VcD6AFj0+myr/qmfSW0WZomoAlWRHZR8ww60cUN+wUjqZnXcQrMta/v0wrgmsv3Gm8XyHnb593L7
eG4J4D9wit4Xzo8ICB6DhsQ+QOfSpMQ+Uks7P55CB0dzcg3FIehDZWZfWj4jNvAY1gUscTVyYm20
ltt13qwaUWOMqO2BXOxzc3jQ7Wi51nA9iG29RjBhvOs8SIEWaroBNDKCGcQ3HvQk5wLRSMiGq6If
A/12iSm/sYD052pbIGYML2/C6RhJW3M52SyyIXliJtXn3B/si0AgHYfzqT0vXPlxQANLqtU76Uyl
JwP32T30MRjAm6qMdCDKPfadIidlWtpiNS/lxnet2Fgcu2RTx9pSlm5DVmFbm0VH38okdGyJDSIF
p+FEprQ9eDPqoUzNbjd4QlY9bph/Q/CVR7m8dBAbCFdT7pbH6Wdwk7LdzgRhdtDP9jIsKTNNte1q
GMvooCehfU4GiCw5Aa6s4ZZbQSVYuhRYgOHzovGzq1+5wOo7N2JA8vlRYSwwjVyUb2rqq7iWsbg+
JuJapgIlHZCoOngniStpVBvML3CdjisUnPZs7sdb7aLtZRCI8TsyQed5VNTTOv4NXqNYWssW/xWq
6f3VNQFk/gh7GyMyJ3d38QobBhLCLY4hmDK8JEZCWxIL9DN0kaLLviNG2wWKwZL2cD0vxQK+D5M6
PEIAaggXEQmwA138Km55S7ojd/DGbrMb9D+Sj/6WEvXGOXlRpGpFQu+ha0Zx9dB76EhCiH5bYq8w
bqILWA9l62keHeCH4BpTHJg8hCuBw91g8KmUfdeZqhZBGmg+jggKMotw4SoSSGVLhK21Ezgu6kSH
xJ58XYzSKRTRJwiPKrAW/4WoTYupBxtoBdz+SqQ84ip6iqZT0q/H92SSDYacziEwJ3uB05PxUTio
eQqXesLnKDT7FS0PXWpbQ6ZqpzZuwWNroQXXNu1J8npgWoFeQMl5AlAUYOaByxJ9IkIGyYOKvYWA
OgomT6uFDSlbXupq1moQTu5MMxn/ZMWnYIjBUqki5h/yxrMoUH85oCigWxdSG6HkE/Dlp5CORbr6
gSgkUnNa61GlwM8WyTdTAlnPRGGVdb1X4S8CEW5ZGHUyn/oCYY1HKlwtLQyyQeVplakXQCvrJ6kQ
Bg4uyIJgb9c+RoZytzND3ph+muOAgedD8oFvvTx3sNPkT//7bqD5QROXfB/CNgx/tsm0OEgPUtyx
ftKJXDzA7GJhHQNybc4wtemLWBnKgjvyPxxbdEyRdD4wobPkbKzOOTeAMstEFoqr0Y8H7QhkUQam
2jDhUkqJ284W1O4H/XuuB/Vl/qvyU9hoJQcPCgaBGFdq4QRDbpDlmpqlxXrXaHZlgWffJAnQn8Fv
sk4H4Ea0/WjIO8ifNl6SfybYK/5oIAIgUi2Nk8KE1m8gnJUPMXSYWsAeYkR6ybc3C9yJj6NzwSUW
CqJJugNELmiv6J9VPA9PaGQ64c+3pm+cpyDNDHQ1vY1qvj3nEgqx5n0Y39nCsQImiPV/Sg9yh2Bk
HQ4ZMwhLI+nFwK0OZ/zkh4odiDsOBE3M+kMnlZ5BJmXK2t+A59T7AvwpyVEVogCrqtbogq7EyP2R
/KoZIKfyE5vXtjndlUyZjAiNgpjTc1VakSJb07v4Jnou0T2uuBBVLBE8e5fRknL4orW7nwiNGR3A
FjSKy2+CMPD486jawdbxAbwfChXyeCLhOttQScZ5/UuJXKibAEIiWMO0zwi6h0787UrxLIJuioc4
nULkOdY/JKeviefRwjlnZY4q5i8h1F/oMT/HYeWGqrroYovXKcnUxbMWZD+jaopXwpKIKwV/u7gL
ICCVqIDSf8Gom4lbOw1ZcRZKLSyvneRHTfAaqVZivhe1m/wTbLuvizyo5v0fH7nNqAzAgtH7oirl
O09aUTNKpDm720Ay5sPItAEz0pFiZQIRDfWGCHCuuGaXZG0xuyl8ShQxJz/9BEeMVCPhZnOaNv8X
bNe0t7omyZMkSFNPR4U3evzcLjcuK7VEZZdMkX6tka5B3C4bRACtFyOeQCt79Xrriwjp3eDw8Yxl
i4ZnF2nnIzXhArnO3TFIuhZXD15yn9vVT16wMxV0rkzQ2P+1+g1u7aeDNwRT2xaUvdsFLGr61RsA
krrBB/uXlnDPWrMSIoSOLSTC16X9VfDFq7XtK2uA0BmKK5FJeWOI1ArralXwFlj8KdxJ0L25ro4p
IZhykME1I9BoKS3TjfbTDmfX1WVooDH5YBhsp3fnJjyZm0vZ9V7nsz7eC/en9E7r62uh+MrQsnxQ
HEOfnD5I5vsCo4FmTwA6lhGbUO5+59ZQ6busQ3Da/4/gKfWPi7Rx+7Y3AL2HiXlvnKxN32bezNjp
dYjFYXVPdjaFpz0GrP3APSdp3La8UFzXbVhLuwuv0mDPBPScpRdDo2G0X7gso054AFVY6n9p8tdd
5zYfJhmIvj/NqUn/wjbA1Ptn5IjIafceDKqCWE+o9brGUJBbmYQvsYtD4pa83lH8uoKqIULDiSXg
6yxJwmM59viy5qkaOJYrzsWg3wlO+PCkAvqg5HpLKFZUsQIYlmnRFiU2siCw5xh8Lv91KTWQE26H
JygYAC9Di3Fuj9L52dCNMgbtOCerVWI4RqUpIFnC+F3fY0d0urDChvfCB4v5ZfmHK7UQWuUl5DRA
Ncjw2/e3pwmVbyls0YUVrzdizPbhlKDJX7xzvC4K10nrAjnG++RxySdAOFZXubgPzTr62JQtSXmW
IIqO1vKeYP7Zb22j7YH/bXfT/F5cufY3ai23D7tEwC0XTRPsjTnkyjrFZDKy7H4jtCHGqFDihiKn
lzcjRj0nxDEydN0T3XZVLw1ckchidFI80LIRUz5/80zPxLB32RudBu90cckCuB1n8lnmLPij/zE+
aucm3Kwj0LLI/ESxyT4RR0eJrEyPbq9hWnKrwAbHzhPaF+fffQmkrsUci95u/+x5LJP6G4/zY5ZU
42fBuiz8uxbweZF5KyivG516l+EjFp1oi1B96wKupMTLWNO5UC4Axpffk4EKZEEns0gYRwpJIJRE
k8wuG63EMGWNSCTG/RO5z9NxoZktD7g60co/R42CBfts1WLyi+ow7jHsNlPv2xDWQd26f9hJIG0e
TVk9W8+8PqEnJMnsgKAfDu8qnlNGOsOHkqE+0aqrtum7PjdweTcx62yaHJffKPA9+xi5XkwSw90Q
gvLoWjJpXh3ptwi4hIt+bp5SLcz1MgCE3s+B9GMkZp6eji4CZRJ4Y8HsDzXziQLOBcJQbavNtaQc
TKFoacbgnSmdbaLo6XIalSOZIEQbh87hhxV6K+UWL1flpVWVAsJlAajEXmi7Y1H97PKK4PzSN+fr
yJifROBUNzCVFwmnra+Zipb4E5Lcxyic9aLP4yppTbb/i3T4qOrnXLKwuSrhJXSCcTyIRNfCOFlv
XN7teOJs72V0dh9L2Cz+VbtkRX0l6NYasCjX5gO0C9MmgYx+KYUX4dFrpHbbUVI/aeFPSRXeqpDp
Bj9ql3XKb0y+qM3C+ISe74cIUmyZPAsxtspP4l5ZqJ+0B83nubj14d/NJVghYmn7MX91fvjVASmN
lHcGwVvjoBHip3wjmlEjH6SoXc9kZSi06Y86jAP1G1cetsxKKdscQvvIUgoMDbTIh6hwcJVeWzdL
FeU4QV/2aGp2kibI09y/XFAZ2mNG6KrztPsjXWq3ds8FwxjebgVCba+YBkr11MEoN8SQGoQunHoR
wD0amqgzGzavEsdYCJ8t2cCLE6pF55bmrf4hm3BUaEi+H93IC5sJ2FrXcBTJB34BRd3BWFA4sQn8
EHoI6sWL/HNvZS+gmk9tJxOpZdOlBmBvL7QUxs9O7HcdiJgqyWSO2WiYWifPywrmOTezB/3RbwAO
kCUo352IbRcj3TrkIOubd3/438v4D7Ft3DhuapnoCgB3AiCh5BOxLotQ9OLv93+EDKzj/zShPRlD
D59DjxgDs4Iu+g15WT/OKtcR3zlU4vfTWVU8Pr0Rrd9q336s3AfGKPsXXriQ6NZ9n9r5uEGts4dA
CYsfvUEE6TTkT7HDGNd88HhGc9mYTrvIYqnxNJ2Dfxdy3D6py5NGKwO6Z/oHkj6jB0bWGX/iwhbN
OZ8Kc2Y/JJdWFNMlOGHs+2mgWXt6E5z02EvayLNFqqXbzAWxSJ4gVWUkRW1w4X6kYXnUfn/uK9T8
fyhoOAFAK7KnWzDARKpQjPRv4cyZKWEU8ND2VGBYHHhelKiwkDMuKr8qCOHoiTY9LsSSTJ0y3Om5
zPbN4R4hd7Ki1teS5VRo9DgtjemIkmKBmt9AVyH8O7supJ4F7fWQI9zIGnoUPi2/DYYul6u+5iWT
Nnlokkjfdc4WCCICsJu4zYJ/8oFwpYBTtAunbPpcyXF/jj8BGbtrurRFhOc9OHpTS5riE7CjTD41
SMNvyBkzXhdBL7s9fFTUr2SwP/m/pdiYt1Y8+cPm/1EIyP5d5UbuPMKsZl3LDwWXCMnKi/h3PD2z
CGJbKmdAx1uch5biRyNx6w3CCPCangeKeYwHKLHU3QjsWtCBfoAkwR+YArHSuJu8Xvtd34qhtsiL
s3yC9fez7iMXGfqasfXLzwl/T1pnQLZ2q5XYcSmbjHxP/9A27xwKycajveYOqzAvM3CRfiZE8eY6
nI0NQlJ53WwU2oTg26Z6QRQe3XHyzBwou5E1nBjHU2cxdKlVp9DtJEqKHiY19jXJ15FW+qthh9G3
7MbDqD0hJC4kwh8UFZkjzWYM6JzvLGwdsQBfme8bOryRIVZ67tt4bFVVLM9FXD4pW0GJ6ORp8Tdi
4nJ6S3aD+mYkO9ofUAzhp1lc820p3nSEDgqvhWKK+V8arvQArAOVqlMsfcrxjTAftF+gupUsk4Uu
x+TuA+NA2OPMbOvrKHF/9q/bRDZFWAK1pqkR/ayn+Hr9aqdjxKLKLgWR5GJILTb6RvYPQ7C4/P9u
ORGmHF3yzCa8y0jOFH93CrTEfxSjBF0EiTlKkF8k/2JU0TKPm5zvg6slp2L/EEy0ydkfd2uVivJM
qWFaC71OR8sCvnHywV9Rqc/3Z5M2hIVDYOyota7W0D+EpXlGCDVDQTpNeGWmOLMqNfWr9mWdkNpv
GYuGydcdMKsPCIlXc1LGOaspNv21aHliav8RjakyVwcswmUhf4ZBHyByl3pyxgpm9fvfdXUC4KzO
tu4VTi7sGKg3DdJhVLw6k/2u2icZUQJBG06UWsOYro6lLEAa68zHBoXCTBDX1LdBbB0EpvjZGyiV
uRE+GXFmHrA/q8FCObD20V/4gXKXk96VrBgMlOCPfO4TJLu2BNdhasrxouG2R9Tf4ha3DpYB5Wuc
u0SGgldtDs6NlsmbqCFk10eYfWxWmYr7FmwhHlxzl9F8T97rG2QylnqUtYMDx5M9tA9+oLYxWA8y
A61+YQeWWM79SjgKWslaAG554is4whtWWKHUsHr1n7NYjd26Xge/QVwVvSQh2RwbfymuNEN/70nO
f5l1YSAhk1y/G3FFQ3eccWGONkdgA9dS9HZQR7SD++bYaL7Y31aVlOxtswK1jcHpFCTFWeChLhpk
DhoqBem38sM9At8UHDlWF7FnNAdhktmFUDxRIqNrYrFlhR5Ay5crXOKjDrTyb8zQYmAalRw+P3dt
9fkWxL2T6HAMYBjUAvwxPOx3FXGcW7dkxacjYVhZ47bVwupVqkgXiYkIDfmm9tjzFNPCQnIDtgPR
22s3BLR4rzfdd1W6ClCfGZ33+Lcvtdd9Ki+ToBL4StuX9+m9nY0eq/rislQWncvUWRVJfHsBK+JW
b3dfPRlF4ThV5RejfaAqeMycTNOLFrA8X+xl3fZkznaeVNrgkR4kwoDX2c2Y4oUWRxg5an9f6XME
h5UtbZe1NWmkPyew4JFdfnNc+OItFmUqcl4XQxzLtu/yeQzsZyPgKfKbrZliJk7r5SqcKVjI+1/u
BssgQeOwTpFRPsa2skTlRCvfxpFwBXYQOkncuApZXm3H9ImD8i99TkdhAZ8NWgiMGx7rV2J3CCI5
HsIp3c31R1wqeIc8490LHA9lTaqll7qbFAsnlPCl3H4sik7s8zflMICkU+efqDw7eZ8f6rqVVVmh
MVUYBnN97fby00WKxxnfX/5ZjKDrN6aiFvfS8tCxuEgaYRk9kmkIXugVN6NzveA3HqSOhYMhKGKe
JFqOwIO7XaEuFPVFmRdwDreq6VIIsQvspti8FGzLp515iW3yBgfqUPz9yQyIEyzKSjfIuGcnc+Nl
53FjdgfO8sHjhl27ZrqtLlZXmHNt1QTIbla6eWi4A+ANmMq1Y82B1nJa/3DKWjO8O8ikeS55lE9/
rBW33a5rSwc91N8sK9MH9ltCWqCHzi9hh4nLPXYs0p63Ba1BX2BTEdHAMiV/ok7Gk3mE/xrbysXB
OsHxm/PTXLq1Oruj9e0Flq22LadcL1O/ORC4JSBOiiuM9gr4TqV/gDQtqKIIrYkM54hiOOsqqolt
2A0D6WDStP4Izq+kNwgo0WAOXA+JYOGHTHHRtkjSjMynoG6G7DtSNojNuPwXQEGyf2gtzfNWlyT2
XjOd44j92KD+xypnrDyiuuF5/HDY/EZqe/gEX7eB0n+d8POCNdlF0wY1m7sTcWRKbBWi+C4uj5nC
B0jFvqs+NEuIq0GN2tFo+Ec5OXuEP6EMYQGl1ODp7STVcqPqpma0n1YREle+zk8moNQW89cr0XwL
fAAaYcVNtR8pt2SOPnBu1ud25wfn1rf7gqp26RjKDz3HUT95C5RC584NThsfxQKdq5N1R+TRBfbA
LnMrcp9/gs2ZbcUq1Csl0IU5KbrWEzyG2Jkhrv1u0ZtToppSSSL0i8x5a5XjjkFQH6v5b2FdX7IJ
vboF3oVcuM4hjOKvru6TxveJKkRXAKn3T85gpZ6tqn9lWwIB3/VBbRBTulbAycK2aXgR41wbOmXg
QNMq39AVJRBU+wOnxXZr7+37NKgMNnKWvvc09ArGGJLv+Z8L4TP45esWft8psoczuZxBQjOBePHz
HnfM9/zkXAix763TqxsfjxCJJO/wC44vt7vQdUsZyVRYVoOgvnWad7bYV0tAORl3NjzUYDu/7Obu
WqBkovNas0ezzlTAzKuzlo5uxBonTn05kRcFsil3TfNLmAyO1pvn7UxNpbytHH9aAgi8kx5iyHjI
icVFxq6wt3jZ68/S36AKm2Naq1kZva+2TmU9hiSPQVVKpE2EnC2j51C+g2m9/apvF9lg1PQG/Omn
0IjWfrKAvR5i1MY4FRtksBpFRmm6vTYYcgXQohY4UYylbtw4v0ehzx2zWObmMXQkKwMRPi4tmoh+
q3pjDIws47VK8TWzDXuBY0GVQ0cty4xAUtzKd+NMYMqlzZxnAFEpu6jhaQq6w1LzfqWZnbl+1Ext
1NJJzOnKdPXbHlTD1DVoKPiK/9lF6jsvBmrphNXTr5s5JCLeqR0pENXQjtbZJZg8NpqEJzpiEEPC
MgiDFdPFY617TuVFl7NyyUehhnBo58hv4nU58I05y3YgWZ9eB7j2Pa2tlFhqo2b0bV3Wu38WzmBg
wJMu3+aKl2WkH9KRNkmt3gjDQSDG05gGaXl/6YKShvF8dfZ1sKiXXldXHqPH3Mk9TovBoyQdLGFK
HW4NxnjJDBIar/Qq9w8/gIlFAfiM1EG3D7XH7YhK+8OVXS0edGuuj2qsHaOAdp4HX4qWum5KqRvF
vYpmT1YLBHzUJ+tE/5oZUkk9cVP1/KO44APxW6dKTmbGj5HlMhR/DdeK+cRGlMAjFo9BcDdL2k+j
OaREG08x4yWQ/7Z94F/jlNUQeZiO+ccDNPVjmqNk+k3t5xtANrk8PesyWIs6/kziY/mEC9ozlx4a
J23X7ajw1HBSchZGBr0STwWoLZSz8yY3wfaqmO6j3ofzFeT778MV5efqiZKdOJqNjvQjOqEBpS1O
gRPjdQN14G+vee50c7cOmWF8rpUErCEJbtRotTUsZ1zewOs6b1ALGrpT8dZ7zi/2SWKsmn+AvAKN
4PzVI+0fJEqfYc9vuaTwPNb6o6rFvfbpGw5MOBCYUZ9XqywtiyzSlRNbECgj59v3X8GN2OOZmElV
V87n29XnqTND0Rb3EprztQeoMLMHFSKVPMkPzbdyOPMsDU2rr+tkD/sHPQpIDze3cIoQiT9PRrQF
35sD0nRiWngPOc4VxIJE9h2ITen07Rn1PQy31vcOVn0HCYBHpZa2fiJ4lU1YRVzyVZfuGDldE0tA
skEDnkOA3QtsbofmeNZIG8H5jD4vdXW+tk1Gb7facgTCLt2aL5K/zXEQ348EZTSFTgIxNeSi0JJS
6jGYW4/Ye3FLPeUuy+ZrFF8+ZAy8lp5WaiFO6xYQrRrR2K1Qu6faPBUD+RQSF9rtKHwSwLZyFOYW
A+VYQUUyNadoSx8tx9Ll4d9XBdOoDxHEgHd4nQ+N/GnZpOlxmoTK2U4z2TRFQdUJpFLAje2x7Zhy
/tyEc0VZ721GQ7VdIjevzlyYrZla2Mol3eELzY1wJrFGa/22gh5HN6pPvoMAUg/qLk46b5E6CrIE
VLetU/uLZZf1MMviF+iyKXWtJol1MUbHOVUGFrUb64eYirmuP5WylzxyRZs9lL7y1Uj9xeBJW13F
CnSMn9Z9szQVCtYNzdvgJN0h9C2zF60bGErQO9IVjG6ZajTfZttjNP3gB/dUunKBtjPwd6CSQDF5
9MRc9x2CAQkWj9oiFFZLLykegY2erht7tHrduDP6OUvsxynJNUOlhJb74k4Zha5aTl7appcs527a
IpIy+01oKZ7bpLDDvRDpT8aooRVVg/63KQWJpg/ZjfE+i2dpeaOlVHUcXr3WFkQuT62enDNFs6kr
m7TpDBlr4U3x0IRGnE2zburjcZJ5w/MLyt9d+Pc=
`protect end_protected
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2013"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
iisr0ydwFOm3eepmhOYSaxO3flYpViRsLN97vKyw+ai+x1TubmaH8qRRwK/QFeVsjlGTFdxookcr
olQwv0bmdw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
dJvTzz+PoD3n2Ot9SgKfpEhIshJxklhDhS1tYcrcmprfs5wN+lN+5Y+o9jEEql61IqDkJEIGu0xp
zaDWEeMqwkFuovmZnp/AnbrHb7R/19zPRtwSyZ8+VQRLsRMgscwutXu29fTUST6Ribitutae85tQ
1okc5mYK0mcSMIggcMg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2013_09", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
ZijKIWnBSOuwn6R4ZrzJp1qaSPGZMrP8GTp+SV+Sn9xEivGxLJtGM40xMLXxiYuxIopDD/A1usG6
HkSoNT6OzxHJWKkUEyyVzrZuJdNHJ5q3s3y5LSNY7eMxN9lY4/gygh7aVIBAO9YWzsWu3HLtrHA5
2vsUFQxQdkG5OTLVP1rH68P4j/dhqr/LVHw+9H76c/knGyalpHLRC7tnHQcfuezFJWlkzaNGHfUo
b5cE1YTvtdlZVmw2sVG/GbXIRi5fq3+Okdy+JgckZ4dVWbI20rfa9LkI09/kwD3anyrnovVQVx9h
F0AxolVKVVyWNAaSu1fvXllqzrdJiRLbdnsq0Q==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
LUajPw/jRTLlmEKb+9YylQ2jxw4jlSx/1GGaY1wFfWFdMwK2p0xvQMjui8K3EqJF0fnb3QNWuQDl
1vTtf04vcOAHkfRCeW7Mbp8qeUTtAsflGIPJDxHfVU8ZKprwANsENc8LVrpJ0WnjDFQIzJw7LDqc
Jj2TofWjKprdxXsMnu4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
KG6kiSPrd66zvVpG96eKD+783ebVLVFNF7pXgq+rCyBBRoa0N9Hp3DIWK5125mkICodI82zuSq6k
C8aCiPbDiv4tiuIn19WDNNPL4ncknL0KLZTLAkq0BIQIsnFNRaZegM9aXOdMYGKYLpnjSD9KRWRt
WPXPZfwprSu2D7PeDZMiij3MY+cixttgVmNfcx9Kkmvg+1B5sTSDTVs3fqpJBBO1YslTmxyJAIC6
uDuGqvQ1138z6f4f+f8vMXratK1Ypo3jPPb4FTNLYJio5Vd1Nbpl9kRRtj801Ie0GGhbggK6IXJx
785o6wX6g3tRyoHXGJ4DGUmWlIHATg0KIAflYw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 13424)
`protect data_block
rEtV4Bm3SmvVbKq1runp2SaaO1GImraXNQnz2t97NClVhlTBGZ14v+hHArmsTHZNME/QWduIEcCL
I8GdWPb/f0NXI5m0D8vUM2MFHCnzTFi82f0pjwFGBVpM7cHKBa5QRX5K/e5A/9KwgbwYV1tKqTXG
aWyx6JRfuzQINO3rQqM+n/1b6LSLygDM1QuiPthpMFKV8IfsVkaLDVqcLxH9/n7C64aisv1xK+OH
WhYRETSZok8+gbvdGdr2+VsE64ALl3DavNBK4S7IOGP5YtXviHmw+Qb/lvl6m+RggRYmTe1A6B5r
pghgGDxK2gS0ItU55quFmZMEuEH+bwLuaJA0/UWR19oWnbcTZnsCqEeN/xbKUzS6blm1K6RPZtYe
WSGhjFl0cKHEQe9DfEazTm6tS9mJ55lLbSuwE5o03LDGRapxUdSR0IiKy5C5UP4genzVw3zearva
qPWmPeGZcAEyFioI2o4OWQP+8mFdbza1kBOuw4BP76P2c+ij6wbxXAWVxtNmL8f6AgS1AV5SqIO0
ftTCve0JloVh9kpHsbXE1TS45+y0IuiC0N3a8PAEsXa/tnLsnAydpsXIQwMLXmgKfoXKzabAHHdI
XZJd/NxD7+xY3aINMVaO5eSSLIdjkYZIeqm6qf+x2eNd9v2nue3I9rjHkjMBIty9wqDCI5HznV19
h0aPmdRn9t7Ft5xXq0GXqSl2I9ZROoM4hg3RU6TCVY4IaDkErgP5cMhIwuHsntmeWvsvkZFygQtU
9TUaf90O9HINFkrdIHf0ZCgtCgUw6ffQNPAkw/6MaoKxm9wdczGi3ur+eyRvSLy7+LQX/dOqvXKM
9UFNjkQk392HWfkT8aaXacuJgFT4hmoEXDGY+tSqQrQRrPmelj+ksf3PcI2r64RSTjiR+9HNqWqJ
jPJio2xgGdQdGrH+UewLz0ySmNDYmqxIdyqKfv/B1BYMUpGd+l0eRCp0RwjP6nt7MKkBishuJTL2
2kpCGDQ4HELrlovnj0dMihRpFZAIpY55DfNVE2hnbkHthyDrEXapmovyPqDFel+HKDdimVyeM8CR
DKl0D2+OZK8XWAiVk9Ve6w0rONvwf/XvaAkgxa3rDJQo/8g8oiGRq4ku5l3OZUKrPVRcjVNCxHRq
81RLF34Ztt0FyGvWgFBPXPwl/QfIQcetnIv8BBHDyYvjjUEJZxJ0yVIBqSipzmyIn34Kt0GvhgJJ
oXsivJz4IQp2WiLYnKzv7NuBWYnOF+M/H8eFTLS7ynV/b0CRf7qayeeaKYL0uv9mUeXbILs7F9+8
XkemV9ihHFfHS04009LEbIzG2O13pEZ78n4YAi47TmCv22T8/Ve6sSAGowqE6FfeksCmQ1+Z98YQ
uXIyCDvF0dlGJwZxogjNRbjyCBj6OOagNPhSW71GcVdRv5XSPoZsF68V4hWQeNb+itDo7ZPtZJoJ
YzLjFDCWp+2G5a8+OtWGetlJNejx9rEDOQvPXNhCi9xzzzSvIevRpnt9XX8uVwzzSJnKhI91LgRg
ID2cjEMis7S70eKGvR2/KBOhU/KAbsgGALtSpbd8HPFqo4CWuxEHCYImqvt7m+vI7jIEpXbwjtx8
QWNgKL8RNSViXrcj5CsXvOI28Nk2V+GZ8jr1/8I4R/Yns4Xfj1TTWzVeNCNHbazn1nufigCGV4Vl
qtDHRGZpM2GzgWRsMj5tsZldV3pp52C/Dpr/92KUqWKMf/mZbYDJL1X0X2Tw7iboFgBgx1miq+ht
zrLMfkmBPAPakC7uTHv8wdz7HICGyvCct17zvGp/b+9c5KI7lCBCd9jn5PTW35q5ksO4eC9R2AqE
0xJmD9GKB17q8Jk7vlAMs/IJV9rgMDnRfyFkOl4hl2S45SaIY1ObTSNIHJYg+rp/nN6BMaWKrR+7
O6t2IjDTrKFkfrU0cMF3G7EiQSf6RI1d8iyqNJLJJ3fbFhF7XLnn/CwlkZ/03Hwn1nJocabXwbc2
9Q6RrzrxLCWMZVoXaUEBQvapxENHsyZOrmSevUQnuCknCx9Eh/GwdP2bYVHxXWg7ySdjQnVMtR4v
qT7n0yJuHI0ite3a92Oo/MBdlgCwEcxfvgz0ILRIK4wFe098lGOX0tVEsLdEUijEAeQR38bksd9a
fuwZzPBvMZQ+FON4CQYrDg971r8Qz89ArQjVxWF7TdD0Oaq9vaUrLocNzIw9AcIy8rWaQnwTR/K0
PsXLapKx1fOSZnuztuMHoRXGaqZVlZJGs22/GiJA9y/IBflmF5GNFnRUbXVT8r+FfMb7zIr8eP+b
OcPNp6F4kqt/b8gae/9JOIopCuWXpu5kDe0U5aC2qmvMuYbNI88aUx34i3WHd8NWKNbdtGDaQ8nM
iyuSX4j7EgwTOuBR/iFM7rZAATM59ZFv+9wRq8hbXVvfsBp13upya8YovLN1O9OWrzxUWym9ZPN1
mDhMT1YgOqVRaJ2ADyjP98UghsOXt6ybu9jGeEndP5T4mZjxZp82OMxqqS6VolaMbGRNPa271n87
65g6Q9l7RYtOL1PjdBOlgNpUdYZwxJ2EGgI1wPnrnuUiZ7sdhpuFkhJDdh2mHYlIUZHAsriLKEHR
XOdtU+Desuf1ojV6OryxMP052nRo3DfSj5+dKgSFWVXGLiS4Q5dQxDHIvUugnqZqf+FK5inrMME5
1eHWMPkrqY3H9syJMZ7RM9SwYc/zjL9fOqr9mE+npGx50NODLrgb0FydLIXRotOtI+YSbZHKzsKt
xoZNcJJ4GasWF69GNvRenQ3kp1eh71xjJw5a0KZmhsJJXThZLqSzb/sTisTU8jCaMh6S6ag0knK7
jonbXo+dctsmQfLpvLXHN4TNqJnY6alIH0HnsTz7EklgiqvaLbFn+25uUJSNDHESZG2BaAtNvG/4
WuvQCSLWeuJpsrPd+06Bzmmnlvn9InJZhGDVhnZlfj7Kh2PolkMjpLgzqH4f9hm/7zH7o7msjyvZ
Rj/JnTghr2ou7m5Ayp5K+yFEUt/y9WWmqXlKOpf12P8RITbx8ILm1kWRqB8L+xfF1r2HXt+av43O
pyKFj4Kq1FZckfpg2It+beWX2P825O6hDubEjA2RyF/zyyc3lMSS7vtAQMEOEJnWNslP5r0po6TK
F5+Ikch7kOxVShNh4LWWzwFtJb9SBv0iFIezeCGrgApE2blMwedVwOdpPdPvsQjNRYc8YG+dStcY
JUIrNMdc6m5qSEWO36XNGXLN/ZrjKkZcCr+z5oN8Oa4cO8jxqZo5bZDRVUh4VXM8a+hHCiVvWsEG
HkxV52NFazh7Duhb2Ix5qYigebEWfDnA3frHeY+lRAIE3+X/YoDjgbPuOqgwawkAvhSCeNbNxuTS
T9ZzmE8PWRbDowhElwhdboesSdX9tyyp7yCSM6fxKFXbUrPplwsSNsMYsJJ9grw0leD0bx4Cd0Vy
Y8dDayiLLROqmsdsKe7b4i2o6u8A0RQrPB31DrVO/yPiNygxChVesembc822gDnOAlf6FO502nEU
ItbE4EyM6ZuRk+69RSoT+2AZGRndh55WMQYb6i7ALzZeSttxOh6V+LV5SNYYdeQouPNdd+N45DZn
niJzd/11g0AFDHSZFxMK9p0VsOmXbAPFEjcTvMS7PiMwhUsav6ZfZjkVwz4X9s1v8DCZpNbKSq88
kGJQIcZYRdAPuD7V1zvdo0Zf6leEwpYg5lACMpJ8rGWyLPBrYD/CsWB0THjSjjkRntpZXUTF5Sq1
IPSYaQtCSAHZKO95giPeqw3zw2XQ5ci2o+t0eS1YvmSPlvMfZRnkdx98t2mA8ABd64gljY5f+0O0
px5Pec1R5VTiPNgghdEJlgrPqQxSP7vDXo0dtJmtqeP90QCRgaOqEt27wpqzv0KFUth0XwtaJeQ5
dejR/hEOliBmBscgJkx0gBF/nLybnTcQ6xwwOe25uqhvJIiepSDJE4ICrD/MSurrVfozreQGinSL
a/tMurSZF67eavaP5tFe2G44AmkmV4WBRnOeWOW2dJ2Q1sYHMUzfnWjdSw1sJJu6+Y0fUowVqq0Q
K2lcfV1v+sdb0adNWmXRoPrjCpXnMpWUyUXWCaY8r49ipi+4TCdxE4p/IUZfO1aumt4+xQcBT0dh
t1WR18HGPmHp719a+JPxfWkOQjw5JnEukkqxKV6fqJPDzGrHDJvrkNy1tkX0MN6Z+Olw//0xoyyG
9SEwAH72HyUlbfM2lhwM9N6f4cr+CLxPF2At8ppy84kKN/H+2RDt520oTXKCcGFU/txd8LdCs9qG
3diwadeKrfsinlzq/W+3PUAPHvjHcwRyRb4m4Wv6J0kW7ItY1ox7z91NbPGA481MOKLtCEwm6vuk
sfLsMi7+T/Hm+qsOXlQ9i8Pf9VAE9LWS2byZEwPIYDYtbLm2L09NRsMgfm6PotDA/9WaPtrx/CrM
IMllkwsRz86jBnsfx1s6w2v/gxQFWv0fY8mf1WywsWC+WArpCmvfHO0WMIJtyS/B+XcdiLdfrrJ3
qeRMJy8lhDn9mvRTVYzLXtu6Fv98eAxRiP4hPmT4+kxhTz4CT4cDPP9YKhdzODoL28xWfAYFbD04
Z7nP2BAp3o1FR08u/ctwg8oxDjcRwHkmDHquzKrPjnQBKXv9IMSCNsR7asFA/JqdhHcmuKZg6PRk
6XzKLzz1/Zs3XVZ/rpAcA4yoz12/yPHmsazO+a6cgbZy7JTSwRBhRd31L/KB4M7WXzNJ4paZAsOI
O5FWmQpp6eEyGGXpKkGy2qdqVRuRe0IjzwDJG6clerafsgCAj755Q2eTRVVvvRQw+G+hVjqaFu/+
m9KSJt+0hjHW1BHC4wyHN94ORPERUFukKcxOq8a3C4r5hTOZW3XWq1v7Ks4H7Zwi4AlNCGUKQ0ON
VSZKVFl61F+tBDQk+IqFz1WMfzhOfRJYfalfeqp5HOOIaK9cOhXG2oYdhceL4LDJlhJPAqpAc23Z
G9mCLMh7l3PvdGUWIx2s5Z4EpUsaxWTxxqD4a+cGuaZLzeV55zSCZ5qehwrwRTYvoBZE1+lOXnfi
Ryt8wko4y/GJZL/NuHI8l8tJKmVjS+XqWIN5sWUs9WMNit0HB/gZfmTuuvpwP7gjFuUjS2Q+jgYC
9ppF022c89tfs59OKVOjOQ9s2b2FlXyn4zn9AXI7AYGal0MNPRsQwnnaZJiTebyHcwtZucfEnh6z
9K9skBFs29qlMPNYsFP7y8mzdNhDng3TEgYpao3SPfXwDj/CSw/ObVggf8enRTUNlDfJ+17WwDyO
/ajc27MzTRLyBCCQhUYvMn80lvwSHxWDIL3xKvr2OLMoIAmgIZJG3sJMyhsOPqFxVb1Qk7NcojOn
D11t84xem8WyHJRbm0pbKV40U5U40scS0H5bcMWTEfGT4W0Mt47O181hbfymq/ykV0yIpouFyaDb
tUvUtKWqMknlkUxdllrfasNUWgJUfn8Cl8EV1Z3U5ABYiUNuRr5oKcdwlS7eB/n+UgV71hPGXiii
tFKvLiZLXS9l/eoEDDKLm6/8OksoHEEFzRFIR8skagCp4rd4fSGbOUietH2v8ecJdTlXFP0ex7TX
vh51q5DGduPDyv5nJCNInuPVn9Z9r55S/RGw+ySGAcaPEqaldHWakl5LrzE1/zI4K707/QMAGDAl
HQdn4RCGxESdD4HJn35p8o9hnYl7WqaHBddVyszwX//kjQ4qJolh4qp+txlSxnSJmCs83a+aCvMk
IbAnKPRH3SP74XCHOQ3bziFlRO0Q1JWSUp+e9CxVX0iTOPbgrB+wD9yT1o6m+o45pOEi4yqt1ZwB
6GRU83LP6o8j9UURxZDZ5WMgpNs4xuaPxAt+XstW7JOy51tYRnIykokiQYYg+aWP02kEZ7KL2cif
/t3AkMcRC0iKXbo3c1/h2uNlHbvkqXBOZnmGMzMriXwdE44Vt7izgW2oY3N5IFwqNHPtWi9SS6yA
hcD+oqiZ5YnDx8Be3R5HxKPygh4K5ePLmLR6um0pz3P8seQq1RKFP9ctf/u1v+7BlNqcdEez0X0N
I4X1lXx9dw1MpdfXfG2riDistMNSEH4Rrccb4Y/8cnRL9fh3mO987Fb0uI03HcxJiExzcwHZ9dco
s3vvxZTsaIGr2xmmD+LsMSI00fJFv0/mbMB3LLQfURbbNvuYtBK+fA8U8TOqSRvPYwXdCjv80svZ
ecFEkHhpXJBNTWSfUIzupFvHeVSIxo1FYZEy4sS3rdwokvKAiZK3rnzY+Ryed1c8On/UbN07w7X6
m6hS6lOKjYh+wxgHNswvu8N4sknoUX7Hwp9LBuU8+T0Ca/tOrCkICtK8kD5WkMmpO6IWAXUjK4Z8
/OmRAfzuhQeScqBIQTMuw2IkQruwSdfY/2ev76Y8v5xSi/gzcXVjJ6pNWe8NhZ5pL8vuon9u8D9v
ac2sfrz5UyHorqRAvNxS0nxaWXiYHYmk54FYhWXq/l06uTApLWRBji257/fX7WCJ6JtNeLLcAFYG
ui6Qlw2u4ilhoM33Ba9OQD+hKXM93Ab35owHIBR48oqnZlu/gRs9B7w/mQ9P7Aq6DwyYiEy7zN6P
zIrKF6PEXI2oo5vRRDZlhHjnxlG1qbQvhZImGO8R1X3muvsJ0Z9NyHew0PCSz7i9mW6rY2m1FJBl
jLOuJd9a+SClV8HYSGnNlxIsBxxS4kdb8pJAiZyO1GsyFurgT9epWWxp6MeSTru98ZQ2HxuKRPAh
LAyFLPqo+UCcwRFhd6SEMQhkLktq/u+ZRteg3JfitjOD93M8XsrOOZXAvc8OK94NqeYOeOIYfeiA
Bh8AZZCTK3Xt4QLtJ2oyW6gLSK/gyvC1P9wVOFLK0VxRCj7UL1ENqTGIylLsQV1EDrxvDeHgkr8n
+celZ0eo5oJZQc+yNrl6D8RLDaFfOndjQQuP1VMMLt/r+SCqzoIQpeaPzjqcZ5F2tDjq3vLL3JlK
L72Oet2zPrANXugoDIB6V4zLM77QJB3ICXMRSw3lLKHdoVR1fOZjH7lh6OFJTtre6FJuHv34LR+w
Sc62m9Wix3fNqnF2+9Qp1crzn4iR45vHd5J/GET/E8MKd44F0qOzeLFE7zgwf2+Iy6YZU0LJ7OWe
z0OlZFdrPEAemSaXyLI3Wg2c7W5Ef4UaJISjZfXU+aX/CFAP3KV58g4cgEfSs9fw8iuCFLuLh3Jh
GZg50idBZAseo6HiW0jDA4Nn9S03k0B9v1GqmSWPhP3YhzM/EK26PGYcgF0eivassZQFQSrc6Jil
NsS91pv/HNapigSr2eVnB1wDsPbMOeAWMefmfTJEy770FLL4nJvHH23BcLXTk4vQBAncc/ypOm8W
7K8vIx4OeBmtzlz+HHoN+Ki6SGNYfqwhxJ3Iclxi79j84bg6FlZ/sJmHW3B/BcC+MY8FKzU6WOYl
4ii86/wI6/Ymwxsc/fLpXuJgVnj1G6seQpKpHtSA/+fDWnvd7+23DNdK6HfBGZ+9h1HUSEREwoXj
99Lau/2+L3cctWkmre/U6dbCrUJx+9esOM4lxm0AgWGdwsmiTdhQhm1GO9efcz3nod2wuyLOoRFB
PRHCoU9xUQeiUOHk4A7KAbqWNnKmpYJRUFtQ3lyKzD1zt5ChuiYS+1trXUf0emVBc0RXJeOJM+oy
pdYUCtO7HboKltA1VXkzyJrTAnuRxZ1FiBt3NN7AswsisLqFyQAuddvPGzztWsE/T1mimJzTQK+f
f/Lv/B2HA5evVFXQh51vSrY2ub6y7UStyV1sLz4hRJqfnfYYtn4qKe+hiDORa9CUQSPNnR1nNwVS
OkQkOe7FGwVo2tF2pgxsVaObzuNgR5W00kvbG+HZrYc/VlQXu17CoYAXyKuimeuQUX6IOYQfOtOi
P/656J+ayneD3DdaM4CAxyapYpzyxTtzYw3d3BmLALR36ZccU/VhfYiHYcCtxg9XbjQuCmn0V9tm
VhQXJGWmHnrfgcSUohqw+023UH3zssHKe3HoXWtNxZuFWTm8uBN+FQJWwZg5o1SnFllNmOyhtpJN
XO8SRcSR9ghUC2PkIXtJSv9s4l9Gp1a1m77LFh4HZa3el3/C2W/EGR0B7R2Pzy8Y8kQnfhLd33aj
x06UIZTX/x5oFzGlrD7CuvF5JKo9vOIxzToHh5kdoOD6zjUKUGJYQquc/mE0DMReySwBHVcUIpLT
P0tPzMBnO/rCSMnc9ks+pckz6Kip2rnVsPX+HfAom3uAkz3m42JwY6b/bHCDef0RK/3WUac0dSKM
kEYtrhwBrDcHu2UrE9D4N3TPQpPhltMcgA3rCnJNzhStxgWfSGcSOX489GY3JX51jrPQ4KLwg3Te
uHo9coFgA7zxBD435Ek9ZfJZAcIO0Zt7s2uZwvFyTVmPWSIEW6daOf4f0gxbKYxTM8WdybNJXju9
AuBEu/AVDZ4+JGpSkGoI5khnH625YEMjmDdM7yC1jJKKFINwCI4JiWEAl64hmuHGoqBCRVIgMBYp
hCwZyPZsI1RVFT2dRHGrlaHOioCJ4s9qfl+jXm7NnHKSvxNcZuT+Ubv1PiLUCoGFG+sBAEE7OLIx
156yyQxHYKvnmGVKdSv1JDcqFOBTX70OTB59UidJY5m6HfaEtJa2TRtYd9dfiLW4T+bJCNByHVNJ
BP5PQ906S6hbtLHGTio7Jc/IK25r925Vil9Q71uHrIoeIOuJxTU2THyuDb8th3jMJAWZ28arIcD1
7zvWma3Osergrj5anOk44hmyfHWNmtZzWfjZ8g2mz5sCZf2xhx1wqFFUm2rP++JnqWZWqJpie9P/
FaUflE91AeT0nPFGzJobKS7vxP3YCIxqDXb4W+GNrbrMzqJv62IjXU/5VT55UrYBObNBKr5pNuPp
nl5/A4Sckp8yUP4cXgns9z450Dg8dC2rJeiALt5KoIAI0mqVyz6dmncs3964qm5zvqkhfspebtxv
+/5/HLRk1pKJC/0BEIG3U8PblJ4S3qWAR1ocDE72mQpK1S8J2OpVtmNPWqj+Q8XxAKeFhxNgDseh
3Ys+1h4JfwdhkuL1WuvUWRmr43qJQgrAU1dsla9XqNHMblQy5XDeZddFiARAWW3wQ5mQedn8mA5U
VcD6AFj0+myr/qmfSW0WZomoAlWRHZR8ww60cUN+wUjqZnXcQrMta/v0wrgmsv3Gm8XyHnb593L7
eG4J4D9wit4Xzo8ICB6DhsQ+QOfSpMQ+Uks7P55CB0dzcg3FIehDZWZfWj4jNvAY1gUscTVyYm20
ltt13qwaUWOMqO2BXOxzc3jQ7Wi51nA9iG29RjBhvOs8SIEWaroBNDKCGcQ3HvQk5wLRSMiGq6If
A/12iSm/sYD052pbIGYML2/C6RhJW3M52SyyIXliJtXn3B/si0AgHYfzqT0vXPlxQANLqtU76Uyl
JwP32T30MRjAm6qMdCDKPfadIidlWtpiNS/lxnet2Fgcu2RTx9pSlm5DVmFbm0VH38okdGyJDSIF
p+FEprQ9eDPqoUzNbjd4QlY9bph/Q/CVR7m8dBAbCFdT7pbH6Wdwk7LdzgRhdtDP9jIsKTNNte1q
GMvooCehfU4GiCw5Aa6s4ZZbQSVYuhRYgOHzovGzq1+5wOo7N2JA8vlRYSwwjVyUb2rqq7iWsbg+
JuJapgIlHZCoOngniStpVBvML3CdjisUnPZs7sdb7aLtZRCI8TsyQed5VNTTOv4NXqNYWssW/xWq
6f3VNQFk/gh7GyMyJ3d38QobBhLCLY4hmDK8JEZCWxIL9DN0kaLLviNG2wWKwZL2cD0vxQK+D5M6
PEIAaggXEQmwA138Km55S7ojd/DGbrMb9D+Sj/6WEvXGOXlRpGpFQu+ha0Zx9dB76EhCiH5bYq8w
bqILWA9l62keHeCH4BpTHJg8hCuBw91g8KmUfdeZqhZBGmg+jggKMotw4SoSSGVLhK21Ezgu6kSH
xJ58XYzSKRTRJwiPKrAW/4WoTYupBxtoBdz+SqQ84ip6iqZT0q/H92SSDYacziEwJ3uB05PxUTio
eQqXesLnKDT7FS0PXWpbQ6ZqpzZuwWNroQXXNu1J8npgWoFeQMl5AlAUYOaByxJ9IkIGyYOKvYWA
OgomT6uFDSlbXupq1moQTu5MMxn/ZMWnYIjBUqki5h/yxrMoUH85oCigWxdSG6HkE/Dlp5CORbr6
gSgkUnNa61GlwM8WyTdTAlnPRGGVdb1X4S8CEW5ZGHUyn/oCYY1HKlwtLQyyQeVplakXQCvrJ6kQ
Bg4uyIJgb9c+RoZytzND3ph+muOAgedD8oFvvTx3sNPkT//7bqD5QROXfB/CNgx/tsm0OEgPUtyx
ftKJXDzA7GJhHQNybc4wtemLWBnKgjvyPxxbdEyRdD4wobPkbKzOOTeAMstEFoqr0Y8H7QhkUQam
2jDhUkqJ284W1O4H/XuuB/Vl/qvyU9hoJQcPCgaBGFdq4QRDbpDlmpqlxXrXaHZlgWffJAnQn8Fv
sk4H4Ea0/WjIO8ifNl6SfybYK/5oIAIgUi2Nk8KE1m8gnJUPMXSYWsAeYkR6ybc3C9yJj6NzwSUW
CqJJugNELmiv6J9VPA9PaGQ64c+3pm+cpyDNDHQ1vY1qvj3nEgqx5n0Y39nCsQImiPV/Sg9yh2Bk
HQ4ZMwhLI+nFwK0OZ/zkh4odiDsOBE3M+kMnlZ5BJmXK2t+A59T7AvwpyVEVogCrqtbogq7EyP2R
/KoZIKfyE5vXtjndlUyZjAiNgpjTc1VakSJb07v4Jnou0T2uuBBVLBE8e5fRknL4orW7nwiNGR3A
FjSKy2+CMPD486jawdbxAbwfChXyeCLhOttQScZ5/UuJXKibAEIiWMO0zwi6h0787UrxLIJuioc4
nULkOdY/JKeviefRwjlnZY4q5i8h1F/oMT/HYeWGqrroYovXKcnUxbMWZD+jaopXwpKIKwV/u7gL
ICCVqIDSf8Gom4lbOw1ZcRZKLSyvneRHTfAaqVZivhe1m/wTbLuvizyo5v0fH7nNqAzAgtH7oirl
O09aUTNKpDm720Ay5sPItAEz0pFiZQIRDfWGCHCuuGaXZG0xuyl8ShQxJz/9BEeMVCPhZnOaNv8X
bNe0t7omyZMkSFNPR4U3evzcLjcuK7VEZZdMkX6tka5B3C4bRACtFyOeQCt79Xrriwjp3eDw8Yxl
i4ZnF2nnIzXhArnO3TFIuhZXD15yn9vVT16wMxV0rkzQ2P+1+g1u7aeDNwRT2xaUvdsFLGr61RsA
krrBB/uXlnDPWrMSIoSOLSTC16X9VfDFq7XtK2uA0BmKK5FJeWOI1ArralXwFlj8KdxJ0L25ro4p
IZhykME1I9BoKS3TjfbTDmfX1WVooDH5YBhsp3fnJjyZm0vZ9V7nsz7eC/en9E7r62uh+MrQsnxQ
HEOfnD5I5vsCo4FmTwA6lhGbUO5+59ZQ6busQ3Da/4/gKfWPi7Rx+7Y3AL2HiXlvnKxN32bezNjp
dYjFYXVPdjaFpz0GrP3APSdp3La8UFzXbVhLuwuv0mDPBPScpRdDo2G0X7gso054AFVY6n9p8tdd
5zYfJhmIvj/NqUn/wjbA1Ptn5IjIafceDKqCWE+o9brGUJBbmYQvsYtD4pa83lH8uoKqIULDiSXg
6yxJwmM59viy5qkaOJYrzsWg3wlO+PCkAvqg5HpLKFZUsQIYlmnRFiU2siCw5xh8Lv91KTWQE26H
JygYAC9Di3Fuj9L52dCNMgbtOCerVWI4RqUpIFnC+F3fY0d0urDChvfCB4v5ZfmHK7UQWuUl5DRA
Ncjw2/e3pwmVbyls0YUVrzdizPbhlKDJX7xzvC4K10nrAjnG++RxySdAOFZXubgPzTr62JQtSXmW
IIqO1vKeYP7Zb22j7YH/bXfT/F5cufY3ai23D7tEwC0XTRPsjTnkyjrFZDKy7H4jtCHGqFDihiKn
lzcjRj0nxDEydN0T3XZVLw1ckchidFI80LIRUz5/80zPxLB32RudBu90cckCuB1n8lnmLPij/zE+
aucm3Kwj0LLI/ESxyT4RR0eJrEyPbq9hWnKrwAbHzhPaF+fffQmkrsUci95u/+x5LJP6G4/zY5ZU
42fBuiz8uxbweZF5KyivG516l+EjFp1oi1B96wKupMTLWNO5UC4Axpffk4EKZEEns0gYRwpJIJRE
k8wuG63EMGWNSCTG/RO5z9NxoZktD7g60co/R42CBfts1WLyi+ow7jHsNlPv2xDWQd26f9hJIG0e
TVk9W8+8PqEnJMnsgKAfDu8qnlNGOsOHkqE+0aqrtum7PjdweTcx62yaHJffKPA9+xi5XkwSw90Q
gvLoWjJpXh3ptwi4hIt+bp5SLcz1MgCE3s+B9GMkZp6eji4CZRJ4Y8HsDzXziQLOBcJQbavNtaQc
TKFoacbgnSmdbaLo6XIalSOZIEQbh87hhxV6K+UWL1flpVWVAsJlAajEXmi7Y1H97PKK4PzSN+fr
yJifROBUNzCVFwmnra+Zipb4E5Lcxyic9aLP4yppTbb/i3T4qOrnXLKwuSrhJXSCcTyIRNfCOFlv
XN7teOJs72V0dh9L2Cz+VbtkRX0l6NYasCjX5gO0C9MmgYx+KYUX4dFrpHbbUVI/aeFPSRXeqpDp
Bj9ql3XKb0y+qM3C+ISe74cIUmyZPAsxtspP4l5ZqJ+0B83nubj14d/NJVghYmn7MX91fvjVASmN
lHcGwVvjoBHip3wjmlEjH6SoXc9kZSi06Y86jAP1G1cetsxKKdscQvvIUgoMDbTIh6hwcJVeWzdL
FeU4QV/2aGp2kibI09y/XFAZ2mNG6KrztPsjXWq3ds8FwxjebgVCba+YBkr11MEoN8SQGoQunHoR
wD0amqgzGzavEsdYCJ8t2cCLE6pF55bmrf4hm3BUaEi+H93IC5sJ2FrXcBTJB34BRd3BWFA4sQn8
EHoI6sWL/HNvZS+gmk9tJxOpZdOlBmBvL7QUxs9O7HcdiJgqyWSO2WiYWifPywrmOTezB/3RbwAO
kCUo352IbRcj3TrkIOubd3/438v4D7Ft3DhuapnoCgB3AiCh5BOxLotQ9OLv93+EDKzj/zShPRlD
D59DjxgDs4Iu+g15WT/OKtcR3zlU4vfTWVU8Pr0Rrd9q336s3AfGKPsXXriQ6NZ9n9r5uEGts4dA
CYsfvUEE6TTkT7HDGNd88HhGc9mYTrvIYqnxNJ2Dfxdy3D6py5NGKwO6Z/oHkj6jB0bWGX/iwhbN
OZ8Kc2Y/JJdWFNMlOGHs+2mgWXt6E5z02EvayLNFqqXbzAWxSJ4gVWUkRW1w4X6kYXnUfn/uK9T8
fyhoOAFAK7KnWzDARKpQjPRv4cyZKWEU8ND2VGBYHHhelKiwkDMuKr8qCOHoiTY9LsSSTJ0y3Om5
zPbN4R4hd7Ki1teS5VRo9DgtjemIkmKBmt9AVyH8O7supJ4F7fWQI9zIGnoUPi2/DYYul6u+5iWT
Nnlokkjfdc4WCCICsJu4zYJ/8oFwpYBTtAunbPpcyXF/jj8BGbtrurRFhOc9OHpTS5riE7CjTD41
SMNvyBkzXhdBL7s9fFTUr2SwP/m/pdiYt1Y8+cPm/1EIyP5d5UbuPMKsZl3LDwWXCMnKi/h3PD2z
CGJbKmdAx1uch5biRyNx6w3CCPCangeKeYwHKLHU3QjsWtCBfoAkwR+YArHSuJu8Xvtd34qhtsiL
s3yC9fez7iMXGfqasfXLzwl/T1pnQLZ2q5XYcSmbjHxP/9A27xwKycajveYOqzAvM3CRfiZE8eY6
nI0NQlJ53WwU2oTg26Z6QRQe3XHyzBwou5E1nBjHU2cxdKlVp9DtJEqKHiY19jXJ15FW+qthh9G3
7MbDqD0hJC4kwh8UFZkjzWYM6JzvLGwdsQBfme8bOryRIVZ67tt4bFVVLM9FXD4pW0GJ6ORp8Tdi
4nJ6S3aD+mYkO9ofUAzhp1lc820p3nSEDgqvhWKK+V8arvQArAOVqlMsfcrxjTAftF+gupUsk4Uu
x+TuA+NA2OPMbOvrKHF/9q/bRDZFWAK1pqkR/ayn+Hr9aqdjxKLKLgWR5GJILTb6RvYPQ7C4/P9u
ORGmHF3yzCa8y0jOFH93CrTEfxSjBF0EiTlKkF8k/2JU0TKPm5zvg6slp2L/EEy0ydkfd2uVivJM
qWFaC71OR8sCvnHywV9Rqc/3Z5M2hIVDYOyota7W0D+EpXlGCDVDQTpNeGWmOLMqNfWr9mWdkNpv
GYuGydcdMKsPCIlXc1LGOaspNv21aHliav8RjakyVwcswmUhf4ZBHyByl3pyxgpm9fvfdXUC4KzO
tu4VTi7sGKg3DdJhVLw6k/2u2icZUQJBG06UWsOYro6lLEAa68zHBoXCTBDX1LdBbB0EpvjZGyiV
uRE+GXFmHrA/q8FCObD20V/4gXKXk96VrBgMlOCPfO4TJLu2BNdhasrxouG2R9Tf4ha3DpYB5Wuc
u0SGgldtDs6NlsmbqCFk10eYfWxWmYr7FmwhHlxzl9F8T97rG2QylnqUtYMDx5M9tA9+oLYxWA8y
A61+YQeWWM79SjgKWslaAG554is4whtWWKHUsHr1n7NYjd26Xge/QVwVvSQh2RwbfymuNEN/70nO
f5l1YSAhk1y/G3FFQ3eccWGONkdgA9dS9HZQR7SD++bYaL7Y31aVlOxtswK1jcHpFCTFWeChLhpk
DhoqBem38sM9At8UHDlWF7FnNAdhktmFUDxRIqNrYrFlhR5Ay5crXOKjDrTyb8zQYmAalRw+P3dt
9fkWxL2T6HAMYBjUAvwxPOx3FXGcW7dkxacjYVhZ47bVwupVqkgXiYkIDfmm9tjzFNPCQnIDtgPR
22s3BLR4rzfdd1W6ClCfGZ33+Lcvtdd9Ki+ToBL4StuX9+m9nY0eq/rislQWncvUWRVJfHsBK+JW
b3dfPRlF4ThV5RejfaAqeMycTNOLFrA8X+xl3fZkznaeVNrgkR4kwoDX2c2Y4oUWRxg5an9f6XME
h5UtbZe1NWmkPyew4JFdfnNc+OItFmUqcl4XQxzLtu/yeQzsZyPgKfKbrZliJk7r5SqcKVjI+1/u
BssgQeOwTpFRPsa2skTlRCvfxpFwBXYQOkncuApZXm3H9ImD8i99TkdhAZ8NWgiMGx7rV2J3CCI5
HsIp3c31R1wqeIc8490LHA9lTaqll7qbFAsnlPCl3H4sik7s8zflMICkU+efqDw7eZ8f6rqVVVmh
MVUYBnN97fby00WKxxnfX/5ZjKDrN6aiFvfS8tCxuEgaYRk9kmkIXugVN6NzveA3HqSOhYMhKGKe
JFqOwIO7XaEuFPVFmRdwDreq6VIIsQvspti8FGzLp515iW3yBgfqUPz9yQyIEyzKSjfIuGcnc+Nl
53FjdgfO8sHjhl27ZrqtLlZXmHNt1QTIbla6eWi4A+ANmMq1Y82B1nJa/3DKWjO8O8ikeS55lE9/
rBW33a5rSwc91N8sK9MH9ltCWqCHzi9hh4nLPXYs0p63Ba1BX2BTEdHAMiV/ok7Gk3mE/xrbysXB
OsHxm/PTXLq1Oruj9e0Flq22LadcL1O/ORC4JSBOiiuM9gr4TqV/gDQtqKIIrYkM54hiOOsqqolt
2A0D6WDStP4Izq+kNwgo0WAOXA+JYOGHTHHRtkjSjMynoG6G7DtSNojNuPwXQEGyf2gtzfNWlyT2
XjOd44j92KD+xypnrDyiuuF5/HDY/EZqe/gEX7eB0n+d8POCNdlF0wY1m7sTcWRKbBWi+C4uj5nC
B0jFvqs+NEuIq0GN2tFo+Ec5OXuEP6EMYQGl1ODp7STVcqPqpma0n1YREle+zk8moNQW89cr0XwL
fAAaYcVNtR8pt2SOPnBu1ud25wfn1rf7gqp26RjKDz3HUT95C5RC584NThsfxQKdq5N1R+TRBfbA
LnMrcp9/gs2ZbcUq1Csl0IU5KbrWEzyG2Jkhrv1u0ZtToppSSSL0i8x5a5XjjkFQH6v5b2FdX7IJ
vboF3oVcuM4hjOKvru6TxveJKkRXAKn3T85gpZ6tqn9lWwIB3/VBbRBTulbAycK2aXgR41wbOmXg
QNMq39AVJRBU+wOnxXZr7+37NKgMNnKWvvc09ArGGJLv+Z8L4TP45esWft8psoczuZxBQjOBePHz
HnfM9/zkXAix763TqxsfjxCJJO/wC44vt7vQdUsZyVRYVoOgvnWad7bYV0tAORl3NjzUYDu/7Obu
WqBkovNas0ezzlTAzKuzlo5uxBonTn05kRcFsil3TfNLmAyO1pvn7UxNpbytHH9aAgi8kx5iyHjI
icVFxq6wt3jZ68/S36AKm2Naq1kZva+2TmU9hiSPQVVKpE2EnC2j51C+g2m9/apvF9lg1PQG/Omn
0IjWfrKAvR5i1MY4FRtksBpFRmm6vTYYcgXQohY4UYylbtw4v0ehzx2zWObmMXQkKwMRPi4tmoh+
q3pjDIws47VK8TWzDXuBY0GVQ0cty4xAUtzKd+NMYMqlzZxnAFEpu6jhaQq6w1LzfqWZnbl+1Ext
1NJJzOnKdPXbHlTD1DVoKPiK/9lF6jsvBmrphNXTr5s5JCLeqR0pENXQjtbZJZg8NpqEJzpiEEPC
MgiDFdPFY617TuVFl7NyyUehhnBo58hv4nU58I05y3YgWZ9eB7j2Pa2tlFhqo2b0bV3Wu38WzmBg
wJMu3+aKl2WkH9KRNkmt3gjDQSDG05gGaXl/6YKShvF8dfZ1sKiXXldXHqPH3Mk9TovBoyQdLGFK
HW4NxnjJDBIar/Qq9w8/gIlFAfiM1EG3D7XH7YhK+8OVXS0edGuuj2qsHaOAdp4HX4qWum5KqRvF
vYpmT1YLBHzUJ+tE/5oZUkk9cVP1/KO44APxW6dKTmbGj5HlMhR/DdeK+cRGlMAjFo9BcDdL2k+j
OaREG08x4yWQ/7Z94F/jlNUQeZiO+ccDNPVjmqNk+k3t5xtANrk8PesyWIs6/kziY/mEC9ozlx4a
J23X7ajw1HBSchZGBr0STwWoLZSz8yY3wfaqmO6j3ofzFeT778MV5efqiZKdOJqNjvQjOqEBpS1O
gRPjdQN14G+vee50c7cOmWF8rpUErCEJbtRotTUsZ1zewOs6b1ALGrpT8dZ7zi/2SWKsmn+AvAKN
4PzVI+0fJEqfYc9vuaTwPNb6o6rFvfbpGw5MOBCYUZ9XqywtiyzSlRNbECgj59v3X8GN2OOZmElV
V87n29XnqTND0Rb3EprztQeoMLMHFSKVPMkPzbdyOPMsDU2rr+tkD/sHPQpIDze3cIoQiT9PRrQF
35sD0nRiWngPOc4VxIJE9h2ITen07Rn1PQy31vcOVn0HCYBHpZa2fiJ4lU1YRVzyVZfuGDldE0tA
skEDnkOA3QtsbofmeNZIG8H5jD4vdXW+tk1Gb7facgTCLt2aL5K/zXEQ348EZTSFTgIxNeSi0JJS
6jGYW4/Ye3FLPeUuy+ZrFF8+ZAy8lp5WaiFO6xYQrRrR2K1Qu6faPBUD+RQSF9rtKHwSwLZyFOYW
A+VYQUUyNadoSx8tx9Ll4d9XBdOoDxHEgHd4nQ+N/GnZpOlxmoTK2U4z2TRFQdUJpFLAje2x7Zhy
/tyEc0VZ721GQ7VdIjevzlyYrZla2Mol3eELzY1wJrFGa/22gh5HN6pPvoMAUg/qLk46b5E6CrIE
VLetU/uLZZf1MMviF+iyKXWtJol1MUbHOVUGFrUb64eYirmuP5WylzxyRZs9lL7y1Uj9xeBJW13F
CnSMn9Z9szQVCtYNzdvgJN0h9C2zF60bGErQO9IVjG6ZajTfZttjNP3gB/dUunKBtjPwd6CSQDF5
9MRc9x2CAQkWj9oiFFZLLykegY2erht7tHrduDP6OUvsxynJNUOlhJb74k4Zha5aTl7appcs527a
IpIy+01oKZ7bpLDDvRDpT8aooRVVg/63KQWJpg/ZjfE+i2dpeaOlVHUcXr3WFkQuT62enDNFs6kr
m7TpDBlr4U3x0IRGnE2zburjcZJ5w/MLyt9d+Pc=
`protect end_protected
|
--------------------------------------------------------------------------------
-- Copyright (c) 1995-2007 Xilinx, Inc. All rights reserved.
--------------------------------------------------------------------------------
-- ____ ____
-- / /\/ /
-- /___/ \ / Vendor: Xilinx
-- \ \ \/ Version: J.40
-- \ \ Application: netgen
-- / / Filename: image_gen_bram_blue.vhd
-- /___/ /\ Timestamp: Thu Nov 06 17:29:19 2008
-- \ \ / \
-- \___\/\___\
--
-- Command : -intstyle ise -w -sim -ofmt vhdl D:\MyDocuments\OpenCores\projects\lq057q3dc02\coregen\tmp\_cg\image_gen_bram_blue.ngc D:\MyDocuments\OpenCores\projects\lq057q3dc02\coregen\tmp\_cg\image_gen_bram_blue.vhd
-- Device : 2vp30ff896-7
-- Input file : D:/MyDocuments/OpenCores/projects/lq057q3dc02/coregen/tmp/_cg/image_gen_bram_blue.ngc
-- Output file : D:/MyDocuments/OpenCores/projects/lq057q3dc02/coregen/tmp/_cg/image_gen_bram_blue.vhd
-- # of Entities : 1
-- Design Name : image_gen_bram_blue
-- Xilinx : C:\Xilinx\ISE_9_2
--
-- Purpose:
-- This VHDL netlist is a verification model and uses simulation
-- primitives which may not represent the true implementation of the
-- device, however the netlist is functionally correct and should not
-- be modified. This file cannot be synthesized and should only be used
-- with supported simulation tools.
--
-- Reference:
-- Development System Reference Guide, Chapter 23
-- Synthesis and Simulation Design Guide, Chapter 6
--
--------------------------------------------------------------------------------
-- synopsys translate_off
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
use UNISIM.VPKG.ALL;
entity image_gen_bram_blue is
port (
clka : in STD_LOGIC := 'X';
addra : in STD_LOGIC_VECTOR ( 16 downto 0 );
douta : out STD_LOGIC_VECTOR ( 5 downto 0 )
);
end image_gen_bram_blue;
architecture STRUCTURE of image_gen_bram_blue is
signal BU2_U0_blk_mem_generator_valid_cstr_ram_ena13 : STD_LOGIC;
signal BU2_N18 : STD_LOGIC;
signal BU2_N16 : STD_LOGIC;
signal BU2_N14 : STD_LOGIC;
signal BU2_N12 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta3 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta8 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_bindec_a_bindec_inst_a_enout_18_cmp_eq0000 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_ena3 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_N13 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_ena : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_ena0 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_ena1_2 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_ena12 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_5_f55 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_N12 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta25 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta24 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_N11 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta27 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta26 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_5_f54 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_N10 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta20 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta19 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_N9 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta22 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta21 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_5_f53 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_N8 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta16 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta15 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_N7 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta18 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta17 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_5_f52 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_N6 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta10 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta9 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_N5 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta12 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta11 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_5_f51 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_N4 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta5 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta4 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_N3 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta7 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta6 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_5_f5_5 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_N2 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta0 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_N1 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta2 : STD_LOGIC;
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta1 : STD_LOGIC;
signal BU2_N1 : STD_LOGIC;
signal NLW_VCC_P_UNCONNECTED : STD_LOGIC;
signal NLW_GND_G_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_0_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_1_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_2_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_3_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_4_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_5_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_6_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_7_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_8_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_9_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_10_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_11_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_12_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_13_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_14_ram_r_v2_init_ram_dp2x2_ram_DOB_1_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_14_ram_r_v2_init_ram_dp2x2_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_15_ram_r_v2_init_ram_dp4x4_ram_DOB_3_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_15_ram_r_v2_init_ram_dp4x4_ram_DOB_2_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_15_ram_r_v2_init_ram_dp4x4_ram_DOB_1_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_15_ram_r_v2_init_ram_dp4x4_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_16_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_17_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_18_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_19_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_20_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_21_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_22_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_23_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_24_ram_r_v2_init_ram_dp2x2_ram_DOB_1_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_24_ram_r_v2_init_ram_dp2x2_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_25_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_26_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_27_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_28_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED : STD_LOGIC;
signal addra_6 : STD_LOGIC_VECTOR ( 16 downto 0 );
signal douta_7 : STD_LOGIC_VECTOR ( 5 downto 0 );
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta13 : STD_LOGIC_VECTOR ( 1 downto 0 );
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta14 : STD_LOGIC_VECTOR ( 3 downto 0 );
signal BU2_U0_blk_mem_generator_valid_cstr_ram_douta23 : STD_LOGIC_VECTOR ( 1 downto 0 );
signal BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe : STD_LOGIC_VECTOR ( 4 downto 0 );
signal BU2_doutb : STD_LOGIC_VECTOR ( 0 downto 0 );
begin
addra_6(16) <= addra(16);
addra_6(15) <= addra(15);
addra_6(14) <= addra(14);
addra_6(13) <= addra(13);
addra_6(12) <= addra(12);
addra_6(11) <= addra(11);
addra_6(10) <= addra(10);
addra_6(9) <= addra(9);
addra_6(8) <= addra(8);
addra_6(7) <= addra(7);
addra_6(6) <= addra(6);
addra_6(5) <= addra(5);
addra_6(4) <= addra(4);
addra_6(3) <= addra(3);
addra_6(2) <= addra(2);
addra_6(1) <= addra(1);
addra_6(0) <= addra(0);
douta(5) <= douta_7(5);
douta(4) <= douta_7(4);
douta(3) <= douta_7(3);
douta(2) <= douta_7(2);
douta(1) <= douta_7(1);
douta(0) <= douta_7(0);
VCC_0 : VCC
port map (
P => NLW_VCC_P_UNCONNECTED
);
GND_1 : GND
port map (
G => NLW_GND_G_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_0_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
SRVAL_A => X"0",
SRVAL_B => X"0",
INIT_00 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_01 => X"A4DBB445D2DC4011E7E7B202CD5FFB5B4B625050D094681E0000000000000000",
INIT_02 => X"7B0479FFF5DC655E6D22D8EEA718ADE67FFFFFEBFFF0A71526EBA75D049D1E6A",
INIT_03 => X"C740FC8201D401806FFFCEFCBFF8CAFEBD3CB513675EC1E9D4AA69EAD3E085CF",
INIT_04 => X"69F9E2F1F9FF8E552B4D895DE0637FE73AD5D26A0EAC185F60A62BC4C0B6839D",
INIT_05 => X"9DB50673F3DD91988753CD249065768E628E6484BE56904FF244E8BAD574BA1E",
INIT_06 => X"60E939D1D116A653CFE2481C10CFBECFED1A8DBAE19D64BE45FC506A9D7FED8E",
INIT_07 => X"00E64B1F6F1B6507EA30255A7257C5784BE84600FA4FFC0B64C474D98DE28B68",
INIT_08 => X"EA3D9C5A7FFFD558502ED30CDCE1F6DF5EA472A5F37DFB6CF3B500E018920C47",
INIT_09 => X"7FD87C98960CF02ADBC430E7A37D7FB493EAC0E0BE255737A667289E59BE4067",
INIT_0A => X"112D146C05F92F5AAAFEBF16B76087C43CB540D5D7EADD27EA8B37C70024FFEA",
INIT_0B => X"663C5231CF63A0DF01E85747603C9B27FACAE7F709B2BF2A7FB65015F3E3DD47",
INIT_0C => X"3B6E174766514227B14AC73B909FFFE27FCD9847F1875F5C503C9D17CEBD4FFD",
INIT_0D => X"83518B0C30EF7E806FF40232FCEB9F236AC71F95DE687F4E597AE4CF42DCD7FB",
INIT_0E => X"7CD2148AFEDF9DD3CEB851D46C5C9A0F8066DD9FF151CCAD482A510870A79127",
INIT_0F => X"2FCC55D804276318E5599E1CCD2BB4916A83B1805BADFE0F8C34BB0D6C9F760C",
INIT_10 => X"ADC7133C223A33532E043F808F85290FE9381B24177FCF3E7FF3C012A97F8FCF",
INIT_11 => X"9AE090C08DD2499FD70B4B746415FEFE0BBB749E0F6FE7BD22BBD24826FBFEB1",
INIT_12 => X"CD1B512C4B429BFE0773FC4CBB27EBD1D44FD3752DE2C9D25263B678589DFF2E",
INIT_13 => X"7FFE367FE5E7FBD9A3DB6F2C58878F3D3DE090026761BC8BC9B3E8C0353F090F",
INIT_14 => X"79E7C184C159156A7C035E3AE7A5876C1AC748B7EA24D36FCB226E5701F209FE",
INIT_15 => X"7E581346C267A16EE2BDF6F22CC47D8FD56B6F27C23048FE1A7B9DEF2DFFFA32",
INIT_16 => X"A01CA7035E010137FD8AD00B90C7C7FE5B5E15D89AF11F3C74E7AFC1B6BF5485",
INIT_17 => X"CF4A9172F3FBCEFE5FC28F31A16E4BBEB6C7FF808396F3EA2EAD9EE2ADB08289",
INIT_18 => X"7F953E8D1A13EBC6E78157818FF518F71FC76BD1664090AFF15594462244AFE7",
INIT_19 => X"79400007EEDA4C26860D5AEAE53090719D0715174CDA319B2C40AEFEFBFFBEFE",
INIT_1A => X"09EF9D758F5C0C12A9D389234B04C60AFA10CCF3CFE7BFFE7F63BC63844527E6",
INIT_1B => X"69B7CD8EF5ADFC26BEA05C13CFC0FFFE7F8E738B4B912AE7EE300005DF7AD063",
INIT_1C => X"FCB93EF9AF8F73FE7EA4EFFFA9A19807F918C0CEBE833B72874F662F4680E225",
INIT_1D => X"4B7163F9D9E037DCFD0801FDBFD38FF96B9AFB85E66DD76D88C4490424D75D77",
INIT_1E => X"FEB397730E74397EAD9BF810DE8EE8D65156D1D177E78D8EEA3722BD1FC0FCB2",
INIT_1F => X"C618FC2AA4F3BEE700466D26549A187C2C4A7C9B3FADBBB25FFF7F3732C15E76",
INIT_20 => X"126AB5C537CEF497FE36C9397FC74AB67CFF85D02326503D7E7EFFE13F8F169B",
INIT_21 => X"F493F2BC7FAE28366E1F8D945EB9A3C4F59EE32987E7A623EB8FFFA047E3FF78",
INIT_22 => X"70039C2175016BF73E486DF18FB0C2B63CE55AB177FF3D9D0BA3A1352E5A8903",
INIT_23 => X"CA98813C65FEF1FBE59870698C74EBAC3F2B303B76531FDB5B648CBA7FB12B3E",
INIT_24 => X"A5D1F009473C0DAFED313E45D52F9E75F7E0530D7FE57D3E7C8FEEBC6B938DE6",
INIT_25 => X"5A587877ECBECC3F9B26E3FA9A08553E7F1FFC8A445594352AEC60DEE5FAAF9D",
INIT_26 => X"D67E3AE1FA9380C47FFE1E1D5D086C372335FC86615B6FE0E07119F500C5A86C",
INIT_27 => X"3FFF3C3FFB2F634CA06E3DE46F6B2FC860477AC002829EE0C29C193795D74B00",
INIT_28 => X"6AAC653C051BF0A2E6B24BC40369F4547F6F352D7300D729EB53671C2A57D81C",
INIT_29 => X"AEC034DEF91060EE46DA6E36A942E9616BBD6A8D12EE31A87FFFFE3FE4C6CCEB",
INIT_2A => X"E56F9761F238E4DDEA24AAA8380E6BB43DFFFF77FAA83BB4FDC70BBD7CE3B5E8",
INIT_2B => X"3C27A41BC3DD18F67D3FFFFFFD37C9FEDFC2C7B63AC48C6E0C0331C67DC62F7C",
INIT_2C => X"7F001DFF35635FB5B915FDA52D6AB83C45596D136C7EE87EB9F4F2E47B925BCB",
INIT_2D => X"33D423FD8DF8D0A25DDAE0913A71FFF88486C3746FE3ECD8A7F2F377BA34B03E",
INIT_2E => X"AA3E26EB059EAAFE410C255A119AF3B6A9C43C88BD1E479C7FE794FE57F9FB60",
INIT_2F => X"F212635EC5E8E7FFFEA2DDC44D33EFD41CF50DDE93FFC2BB713FB7E2C9580A7B",
INIT_30 => X"614720D97B5A27CE21B9D6FF7FFBCA5CE9FFDEB7C4BB458D5DD23FEC50FC7BF8",
INIT_31 => X"65FF031D87DDD32DCEFFE6CB993FD30E21C5557E45100AFBD75967335D4D3FAE",
INIT_32 => X"D2FFF92E37FB0BB3B40B66CAFDA709FBAF04921287CC6FE16C573290DCBAFFD4",
INIT_33 => X"C3313F67DC1D96FEDAA0BF45F30D0F916A5F824630EA0F6A796F95EFBFE98D2F",
INIT_34 => X"2AB17A26F83DF7B1201DF57E29C92D8C3987CBC3E8533FDDF7FFFF7B0D2C9933",
INIT_35 => X"93AF860E8ECD98B601D7FBA70DBF1FFEEEFBFD65F423DCC9BD22B77C9FDBD4F9",
INIT_36 => X"32F3FD911127FF7CE67DFC773861E138337C6737FA924B76F2E767933B0CD799",
INIT_37 => X"E3FC3E9AF9A7EB4037DE306FE5A52AFAE77ADE44630857854B358A8AD9F3F0F8",
INIT_38 => X"7380765E2BEF1FA03EE087F5C0DD1787965741122449F5D0270CFECDABE0185F",
INIT_39 => X"0924C977D6B6B7F32704B2D5CE86F8B621347F064C3F7277FEFDDFCF5868E4A5",
INIT_3A => X"8A0B97E55B19FC486329BFD1CECDCCBBF4FDFFC0170FD69F38B0E4433CF86733",
INIT_3B => X"0641BFE4CAF5FA92F8FB1FEB00988933CE244D49A17DD65EC951A2C3FE6067C4",
INIT_3C => X"7E017CDD88A6FDF7E98C1DD8CC493EAB331BC7AFCD3368F564ABA17AF7457126",
INIT_3D => X"F62E18C5C4FF4FFAEDBB8387AB7E18F03902675E5F13FB6E749FFFFA09E54507",
WRITE_MODE_B => "WRITE_FIRST",
INIT_3E => X"FD44DFE7C3129CF793B70936B58649146E430B7A6A15C7D39686096311A2BEA3",
SIM_COLLISION_CHECK => "NONE",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3F => X"3D33A8ECA6B01ED87C570DDFF304318163FCC9F372925EA5F6E1B9B3570482F2"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena,
ENB => BU2_N1,
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_0_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_1_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
SRVAL_A => X"0",
SRVAL_B => X"0",
INIT_00 => X"7F9F84AE3A28B7A249FFCFFAE5B62F2BF810648066DEF3748E4BE297D34B5EF5",
INIT_01 => X"A1FF9FE12813A7177C7EBA4A29CAF14DBE0949A3C61CBFF5CDA397AD198A4BB2",
INIT_02 => X"BD391153975B0EDBE7CB307DD948BFF32AEDFDF8A75FF8567FA911EEBFFF5AEB",
INIT_03 => X"3E1021FFC6877FFB57256DF4D3A7472A7EC7B67F1FFFE7B8990FF9FCA093232E",
INIT_04 => X"8207DFFB99E768D25E7FF9FFF37FC7B8CAA7E1F14B3D6A961EA935184142B05E",
INIT_05 => X"3FF71FFFEE1F62471F1FFFF475E361E25F5A714EA9480AAA179CEBFFBC98BFEB",
INIT_06 => X"57A87FFE2CE3A3BECFF163FEE638AD34E907B3FF5D7B3FF121EEA3E7F78E4FA4",
INIT_07 => X"1F8BC94A3A76F93F8ED483F81B5E3FE897CCCBEB271CD2341C3D4CF3D2A343D2",
INIT_08 => X"A22A9BE87993BFC62BF663D7B6B7953E7E190436E2D316863C864FEFF685C738",
INIT_09 => X"96C863B619F45C9679E9F3C2BFFE13035691064FED6F9E3CCF8ED1122CB5BDC1",
INIT_0A => X"417B06264F5E63FF50047C83E2FB22F12FBD7CA7F04E0A44AD988BE4D8D2BE2A",
INIT_0B => X"E556CA7FFB167B91679007DF6DDC180734F733F287CFBC2FB53B03811EF26650",
INIT_0C => X"2809125B77A85604944E9B3BA558BC6850E5F2A599F9ABF863FA950444BA6BFF",
INIT_0D => X"63C727F830FCBDD0570F7E1FE6F88BF4737FF0B4266173FFF3D2E3C5FBC4D96E",
INIT_0E => X"082AFC3C78ED27EC788F8BCAE46A4BF4FC6D384F3F56AE68FCCBEF42277BA03F",
INIT_0F => X"6D04026A87D8BEF17FB839545FEA8AFE5761ECDC9E0E60C05825C9873384FE20",
INIT_10 => X"FF7319FB6FCA9CABD11BEC5764251A54E7DCD27649A9EFE3DC5CFD98ECFB46C8",
INIT_11 => X"EFA4DE6E24D9C5CCD6E64236E5D86F415F81FD6E6E35806A7D917F8D4B0DB11F",
INIT_12 => X"79C8E4B5818ADF5EE66D7C5DBE8A8B12477CFF22FB5DDE0EFFE3DE5CABEFF706",
INIT_13 => X"17467C411EC352F2677C00CEFE3D73C0FFCB1A6C87FA84F7E9AC07FF730CB7A3",
INIT_14 => X"733C6CFF3B85E7CC7F84BFDAA9F56B5140859F030D8124F4478E7BDF1CA7FFB1",
INIT_15 => X"7F0B7086528F1CC4705245EC0057AE83B22862FA1ED7FE3695527F83A6B163A8",
INIT_16 => X"5DEF48DF375237732347565B6BEDFC7321DA78FC6EEE6ED6227C7EF02F84E7EA",
INIT_17 => X"CE30E8F1B31DFBA82B71FB7C2C0D2CE8219C7C530A27B7F47F8DB83150FFF616",
INIT_18 => X"52ADF6101C1E25FC23E1B04917686FBFFF98A13DD1CBFF3295DAB50540CF0070",
INIT_19 => X"08CC4B2D626DF41FFFFEE0F86D6BFBAF428C09C0B8BC382DAB3AB20FEE9DF3D7",
INIT_1A => X"FFFFF9769FD4BC98CEEB9E04620F2919C19C944B79FFF92D0057F1D43E61EFE2",
INIT_1B => X"A8E3D787FA5BD7F32709D98A307FEA230A27EE1A5E8BC7EE33127DB2081CEC9F",
INIT_1C => X"DFADC98145FFD5F213B7F953877F67C0755C98D218D87243FFFFFD34DB2DC2EA",
INIT_1D => X"FF67CFA80FD2E7CA0E6AA4256C3025A6DFFFF5D67E7E050A865FB3FC8F018C7B",
INIT_1E => X"03CC1CD22C362328BC3FF3EF6251F974D4297488058419CC898F51C4B2FCC4AD",
INIT_1F => X"67E02FD3A3A5E5F154C7F0FE4E06264BC9531FEC41FCC360D7B70961824B07D0",
INIT_20 => X"736DF8B1E9112DB10FAAFEE339FF5FA447E3B5E70BD0F5B4402127954860579F",
INIT_21 => X"E3BFBCFFEDFF536F93FB862048EFF0524D7B2E1138DAA07A9D8ED7F46899933F",
INIT_22 => X"63FBEE6B52F5FB2064D52C3BF61D564318BCC912E8E0E50A8E51F8F53DD8F1FB",
INIT_23 => X"3647701BA204AD1D4D21FB4DF01E990B65FEB855C496405175458D75E3FCEE43",
INIT_24 => X"2C835328FEDB6872783DF9B14E0A97C3775D5FE017FFE180AFFCA43EE307E5D4",
INIT_25 => X"972E180C452CB33A69764FC957FFE2F6B7FEF7C79867FF2A340086D76806EAC3",
INIT_26 => X"5D64539057EFE11AAFFBF21D8397865013295428F9A9ECB9772CAD545F8FD169",
INIT_27 => X"6FFFDB33D76FC07E51C3A9B51B4E2273A8016B8957D8B796791D5DBBC75E3FF9",
INIT_28 => X"5D84BA96B55DA56C602357B9F5F2B573A5C46D3F55E01DBB5EA5BFD527CFE7DA",
INIT_29 => X"0E7EEFD3F5FFD20EEF6D789F60E8BAFCC7A3FE8EF7CFE5CB9FECE0FDA71DBD0E",
INIT_2A => X"58065BFE36998807021DFD2E968FD4293FD328B44D3D00BE01895D2529F84FA2",
INIT_2B => X"7441F3CB028FEB27FFAC155077395C7E789405BE0F498E722E489738407FF4D3",
INIT_2C => X"FFA5AF5FE12BD7FC467B916A23EEAC23CB444024303FF25C88C8C8FC4C8CE66B",
INIT_2D => X"357B0DAEA2FDA23E419D68C379EFF9ABF4BA347AE3759F76A7A2F8175B1F93DF",
INIT_2E => X"18B75A5B04875F787574FD7988B471507A9F7FA1211F953FFF5F9BDE1AE2BFF8",
INIT_2F => X"084DA3BF2A156FC195313573E7FF72FFFF25536A70E7FFF4044DFA98746ED32D",
INIT_30 => X"B901015607FF06FFFEBEEA47D1AFFF900945868DFB97700189F714CBBEEA4FD6",
INIT_31 => X"FE1C4754DE6BFA7C08D8C65D5CD1EC41EB0F386E6D523F9F927AB9B2C262DE48",
INIT_32 => X"7BFE8BEE2412752FB07E8BC119D82794BCFF5B0974C33ED40F1BB6AD07FFCAFF",
INIT_33 => X"013664A25B6A84046F020E4F0EA5FE6E16942AFDBFFD87FFFEAE1A680047E146",
INIT_34 => X"A8CBFDA1856FF97FB80AF3FB8FF80FE01C508C703D7FDD400729EA771B8373A2",
INIT_35 => X"5890DA258FFD9FC31FA09373E0FDE92A3A98EA7327EF16A9234BB6E866AD4CFD",
INIT_36 => X"23B138E00FFFA63C4D1CEABD21390451BA183D96CDE2CBFDFB9580F324D9F51A",
INIT_37 => X"0A4C76D6616049E178DEDA9BE361CBF9F7FC9D201E73770BF9938445BFFC7BC1",
INIT_38 => X"D1DFD5117696CC6839C710E38ADA7EBC8B65F86997FC7F86EFB213FC3DF1EF62",
INIT_39 => X"B12AF3D4DD289F8D784BB28817F4FEDE93B0CCFE0F2465EA59ECA33F8083FAF5",
INIT_3A => X"C06D59FB37B23FFEB1A7BFFFFF64CDEA0C10F09F24172495899B2D5CB0B06628",
INIT_3B => X"9F857FFFFE85E9B435FBF139A02DE76759B8C6854EC439C3196FDD21FAD4B51A",
INIT_3C => X"4C7A70C1918CAE129794839BFE21CE6FFBF8437656F33FFEF24AE2AAF7C47FFE",
INIT_3D => X"8D017FF81BC951D313E043F621D730AF825F7BD78EA17FE305F03FFFFD0AB08C",
WRITE_MODE_B => "WRITE_FIRST",
INIT_3E => X"27FB6C8949377770E21D5AD9FF4D839089471FFFFE9B89F842B47F1CBAEF7FE8",
SIM_COLLISION_CHECK => "NONE",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3F => X"2EBA60FE38EB814586FFFFFFE43573FE3425E0FC684FFFFBC456D7635EA36D2C"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena0,
ENB => BU2_doutb(0),
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta0,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_1_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_2_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
SRVAL_A => X"0",
SRVAL_B => X"0",
INIT_00 => X"B21FFFFEF195C7FE1EE27039B217E6FE2FCB1B7D2884238301F791A40417016C",
INIT_01 => X"20FF787F746E179FBFFC45C32904E81C06786924CCCB9B66FADC6C567F1F4A19",
INIT_02 => X"FFF818FF25E5CA77AA9B9F054E29926DFCAEC4C69C0FB879937FB00171E64FFC",
INIT_03 => X"E32D3F86BD75EDB5FC3F7B1B9EBB762BAA7FF006600070BE61423AF0461430BF",
INIT_04 => X"F0670B8A586FFB61E67FF1A2138EF4D83C3F0098F9BC41FFFFF37FFFEB572CDE",
INIT_05 => X"1CFFC33BE58FF5A240F98079177C81FFFFFEFFFFF36FE02F142DFEBF5EA64463",
INIT_06 => X"3F0C68392B1D07FF7F3FFFFFFDFFE0AB8F587E8C66793C8AFC269A6A552B8C37",
INIT_07 => X"447F781C87FFFBFFAAC60D13A9DDDEF4FFF63C68A27ED0D781FFF311833FEA5E",
INIT_08 => X"312B80E8711E3FDE35EB8234B3FCC16FFFFFF21900FF862C589E4C37435F47FE",
INIT_09 => X"3B3DEF4FEA20F6B7FEF9EAB07FFF1F922C94F77D10DC7FFF1423BE7C9374F624",
INIT_0A => X"FFFDD8877FFEEFE86B34BD277DFEFFF8F595300C54E76779962083317366DDEC",
INIT_0B => X"733574AE1E1F7FFDA856A03A5D7C197DAC0A847AF731866BB373E453DB7DAF2F",
INIT_0C => X"85C950CAA7CA5FF6EBF475B044A10330793937453D2DDBA03FFF6FE27FF1889E",
INIT_0D => X"47B0758A8B1DBC7B7D51CFBF7E0CC8F8BFFEA0E07FE5CF4A584C765FDD65889A",
INIT_0E => X"D81411CE2BBEDAFBFFFF80007FEEB08A6323D4387E5B4B95854E7E83B0294FE6",
INIT_0F => X"E313A3E1FFE0F1BE1B4C6EDF3873DBCE70BB9A8EE7A620EFEB9AAED889FA1DDC",
INIT_10 => X"6ACF4FDCBD0E63288F34273DB8AA3367C7EBEF321C8D9C26DB217890D2FCC9FF",
INIT_11 => X"63EA973886278CF3C91BDC93125889FDCBE55BC1E16127FFAC295FFEFFD4AFF2",
INIT_12 => X"BF4E1C202BBC3A307954B015D3DF27EE62C75FFFFFCCB88E1586FFFF3B2AD6BC",
INIT_13 => X"1D0340E343E3FF83794BBFFFFA02B6226CE27FE84403F4563301FC262BC37E17",
INIT_14 => X"C67FFFFFF43C324647D4F8B426E19199614C972C9BC1D81FEBB63CADADD5D19A",
INIT_15 => X"68F7FBE02D68750A839706C268FFCE3FF0FE395575FA6BC39538FAF6E0B9FE07",
INIT_16 => X"8CD5045E7FD4FEED33A031CBF45495BFEEBA9E43C21FFF1E7FFFFFFFF479C08E",
INIT_17 => X"EDCCB852569EB562BFEA2A404B3FF57FFF6FFFFFE80216E01CFFF8D6EE1531BB",
INIT_18 => X"1435C97F5BFD62FFFE3FFFFFE7A6C7C405BFE796FA6CFF4996098CEFFFC13321",
INIT_19 => X"FCBCFFF3D93524AE7DFF60A2BE0146D1C0000C7F0FC732D40574913362759DE9",
INIT_1A => X"7EAF8CCA98F9126473FF8FFF9865E5BD996C872DE487064BFA0DFB7D29E5F3FE",
INIT_1B => X"FFFFFFFF7472198B79707FD3813F1638906254E3EFF3C10CF8FAFFE0B714D528",
INIT_1C => X"EFA1774EAFB3B4EBFC407C5C5FE99F9E5FFAFF40282BCC7A7AC6B705D88E05BF",
INIT_1D => X"47825F433FE5C4DB61FAFC02434BCEB67FED3450D2922EFFFFFFFFFFE0CD7528",
INIT_1E => X"4FFCC0F6CB8F976E61F94F48D9BC6EE9007CF88F15AA8A4C79BEFCB58CA6710A",
INIT_1F => X"77F2558BFB6634D68721F13F16FA0871FBB2682D57E3D06610C9373FFFEBB083",
INIT_20 => X"FE0FF0A4E256F5B8FD323EEFA451B3DDD387686F7FE25D12D77FB19F6C3366DE",
INIT_21 => X"F8BE829F7A73B015C9D64EB3FFC2D02EDA67B76FE4DE53083FFB2F45B50F65D6",
INIT_22 => X"A1B6357FE5BD4EC37D0DAAA1FF13D2B83F8268680D23BB80FFC7E7D8C56DE6D7",
INIT_23 => X"FDBFCB410F0AE33E7F660C2F1FB7FFFFCEFFF74F3ED34F17C365F93BD89D786F",
INIT_24 => X"7E5A4736C766FFFFC1FFCFE2C9F3906F805588F4178E30690642E8FFE50F737D",
INIT_25 => X"07FE609A391213DF0CDFF61547D82933025DF5FB76B3D5FFF8AF8CBDEB566970",
INIT_26 => X"AEFCB0351C95DF54BCE579F7CB2BFF7D940F53B228F57B4861B447C197B5C77F",
INIT_27 => X"63AE57F7223FFEB043BD30FE5E02C9A242D84AA01FFC7C8B1BFF52CB109B8D86",
INIT_28 => X"C0FBF64358768CBA3F2E0E1FFFF6B741A7FCFDA61F7597CEE43FAA2331FCFEE5",
INIT_29 => X"4F34CEFFFFF2172DFCF040BE66115FDCCE3BA1CCA22BFFDE13481789423FFE09",
INIT_2A => X"E99096A3ED225F907825AC7EE7107B00A033E71A56FFFF53E5120948DCC0C75E",
INIT_2B => X"5E82B969FB6956EE070A1FBAABF23989801A45B1FFC2A3B41DFB91FFFF99FD63",
INIT_2C => X"A64F6A7A3FF82AF630ED1743FFFC6C285B90CE70FDA7971AF38DB0D60FA1FFFD",
INIT_2D => X"AF300B01FFFED7CC7F1AC97371C1F2F88642243812CB5F92BDED5D25F7BB3478",
INIT_2E => X"582CBE312A596915898F0DD8592F806B9D7F6F10BCE6F2D8B195D6E1FFCA5B24",
INIT_2F => X"DC6F4F1D6E17AE27BE6F0ADB8CB908D41E0E1E33FF9F3FBCD1F939F8FFFEF7E2",
INIT_30 => X"7EB5166C8C8FCBCC902CEDFEFF118A05D68327F87FFF57EE0E64B56EEB1ECFB5",
INIT_31 => X"C2AE03FECEFFFAD923EDBFF870C044E663FA30EF84742BF9F1D895B5545FEE15",
INIT_32 => X"5E37BFF807EF0BEC7D4587EF86D87A8C8D2ED04FE8F1EEA88C028AF8EBE2A3F9",
INIT_33 => X"277F87E141DCD894920EBBDC15F6E42E9ED8D125D2947C3C5894434C82F5A752",
INIT_34 => X"362C3B2CF043A16E54E0AF1BE8FA1A8B2EF4C5BE0F48693943389FFEF23183D6",
INIT_35 => X"642CAC139398CCF0DDAF95D45A446D9DB39EFFFFF7CD07FA2BFFF4DED97A5511",
INIT_36 => X"A35C941BE3171DA6BE988FFFF5B8E58C26FFFF99D54AEACBB29CFF8269CA356B",
INIT_37 => X"FC885FFFE6A225AA0F77FF0C027193D7B70BFFD3B864B896109E31EC2E792E66",
INIT_38 => X"5653AF028C65EC567975FFC5C9FD31FDA59F4F968641F4BEBA52F156984042D1",
INIT_39 => X"1B8FFFC939FF3C7F713AA2F52763C3EEBB94747EA6E842DD0EB75FFFDC2DA304",
INIT_3A => X"FBB152A7C697CDF4B130F1D0BD6B4B93FD2AF7FFDC313CB27D1D84476EDBE19E",
INIT_3B => X"AC33A2E05260FF0B5D2B5BFAC36833444F3CE126BAD7841046DFFFEEEFE274FC",
INIT_3C => X"413957FDE998105E731AA5B9C92F3813513FFFF9FFDCAD7DFFEF3365568F334A",
INIT_3D => X"0D0D28751DBF4FDF3E7FFFFDFF2239C7FFD61A1150F1C645D9EB767FF2807FE0",
WRITE_MODE_B => "WRITE_FIRST",
INIT_3E => X"FFFDFFFFFE9881FFFFD34AD79A9D4559F0D42EFFC729BFD1FF2283E9F163823E",
SIM_COLLISION_CHECK => "NONE",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3F => X"C798F5323AA620A0EE6CCB7FF3B3BFF7FCE5F8F89755FCCC091C77DDCEDC4D2B"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena1_2,
ENB => BU2_doutb(0),
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta1,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_2_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_3_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
SRVAL_A => X"0",
SRVAL_B => X"0",
INIT_00 => X"A8F59DAFB7DFBE183ACCD0434636A8C846888FDAEA7CA4DCFFCFFFFFFCA573F3",
INIT_01 => X"9A661FCFA336D65C3A35325CDCFC99E1DF3FFFFFD927ABFCDBD0BA631AE39C3B",
INIT_02 => X"723039837FAF9512BC0FFFFFC602183CE788237F8DE95D2D908E2F61C7FFBC8A",
INIT_03 => X"FCAF7F7F5BD00DBFFFCB17901A9D16432916F65EA7FF970A85F29E6ED479FC50",
INIT_04 => X"FBA9EF4E6735A0AAEFE73E530528B0A180BE04FC8FC14D7C688196F68EB2F6C1",
INIT_05 => X"13234AD52CF82A026E2E6D0383D3C740465BB6F68219493FFC78FF3FE2FE6EDF",
INIT_06 => X"B861B25DC89477C248A9DB3FC540D5F5FCFE7F1FF6CE3F8FDBAD17FB43CF111C",
INIT_07 => X"6DC33D9FA00DAFDFFFFB780FFDD5779FDB1E1B63F694DCF870A2C9CE3017487D",
INIT_08 => X"FFF2FDD651F1238FDCBD072284D210F42C42D7020B190602F58740576563C7BA",
INIT_09 => X"FE6D1FD3ADEECE31AFC83A37A87307FDBE50916F433E89D869556732E1BFBF01",
INIT_0A => X"4391E158B7E47BFD17870357536207BA6E8F12E3EAD4BF01F4BE7D6724D4803F",
INIT_0B => X"652745B1B4EE78666F3647D5D20DBF01FCEC7E0B722B803FFF4F1FC6DE9599BB",
INIT_0C => X"4FCE20A6CB03FD0F45D4FFFAD060003FF8925F45D200E3E89103F036B007F7FA",
INIT_0D => X"14D9FFB58B22013FFF628FE81FC51EE001B92114FB1BDBFFB4A5FC0CC72985E2",
INIT_0E => X"FF507FA6ECF7D9FA59B98617794FD6FF8FF8BB0AB199D02A5F2E88F70AFCFDFF",
INIT_0F => X"FBE9282874BF91FFBEF13494EE56425E3F6BD1E976F5FFFFF605FFE444AD073F",
INIT_10 => X"8C0D336A7B985F167DC4DFE1BD57FFFC3367FF9224F87FFFFA97E3B4F5F355F7",
INIT_11 => X"6C9B76FD3CE3FCF91D03FFA3CABDFFFFE879EBAFDAA7BFEBED1D3D8082DD17FF",
INIT_12 => X"96C7F6B78DFFFFDFD525F988297AA2E97EC5964994BC527DEEF28C6905601D28",
INIT_13 => X"CDB45975BFF8036F337A81D3FB3DC9B223BA9F27E9EAD6DA46FAD8FE7E4CFEFE",
INIT_14 => X"520BD59F743F0EF2171CC472ACD7E9327BC595DE3F88B2F1C287EE508BFFFFFB",
INIT_15 => X"6FA6747F5D2B585C7EA7921FBFCFD62E921FF21A50FFFFF8922D9450D6182F77",
INIT_16 => X"7B9FB55F1D36FEF47D3F62C6D6FFFEF9D284CF1907026FBC929C70D857AFB941",
INIT_17 => X"EC3F2D2773FFFF7786713F8ED10142A29D2AFA10214FDCECEDAB8917A589B1FC",
INIT_18 => X"8CAC3C8AECDE5FDA7E9BFA133ACFC2BE59274A871E49139E7CBFFCFE504C4F92",
INIT_19 => X"030BE7FD0F4A7BFC13EC3A043F2C6C3A3FFFFFFE11124F2D183D6A98117FFE7E",
INIT_1A => X"FCF4A15FC627A80E1FF37FFCFB1D330603FE90234387237EF22DF7953CAE391D",
INIT_1B => X"7FF87FFBBE9BED9AAFFF37D7FF8783F0F47FFE857AE444CC7600616BC0BAFE7E",
INIT_1C => X"E7F237FA804F74F0BAE7F258497FA88221EF4614BE184FEFBD4066A0566B5B6A",
INIT_1D => X"CCBFF8F82911D24383A61FEF2DD67F3FE9A9223BC5D8A2A47F83FFFFDFBB4485",
INIT_1E => X"D6B6FE3401D2BF27F01C3ACE0A5196425FC7FE7F799DF18331EBE747BFF04AF2",
INIT_1F => X"FFE353716DD551405F9FF81FFFFF37497BF9EF3AFFFE91F8D37FDFF1BEA3FCC7",
INIT_20 => X"3FDFF09FFF2E06BDFFB0E44E7FED2BF8C5FD5B1B1A3BC8C6F1C8BF2A8144D7B7",
INIT_21 => X"FFF461B4FFC049FF143FB0A933A959C6BD3C7BBD1026D7D7FD9A0B323638F1BA",
INIT_22 => X"F17F2D2EAC4B91C7592373FF7F69C1FFC7197CD329E199A67DBF08187F754021",
INIT_23 => X"8DB508BD0913A4FFEFB16CDFFE7FDC2A7D7786FC9E5752AC3DB9BEF9FFF137FE",
INIT_24 => X"FBFB68FAFF9993BA7CABFFFDCAA9D6A61F321513FFE47FFE5FCFDE6A950BF5E7",
INIT_25 => X"5EB3FFFE372AB0E1FBD9C737FF05B7FE6C47DA48E70F95EFE240047EC0C372BF",
INIT_26 => X"BAD5240F6F2E07EF3B4FFD489647CFF3F63FD8BF9494626DFC1A1404FFFCF406",
INIT_27 => X"9DCFB170A00DB5F7FEABBC3759147FAFBC4B55FCB3FCC4AC23BFFFFE1F188C75",
INIT_28 => X"FB4BD357C81C5E71DF10629870FCE04060FFEFFCAE65EFDE022A58DFBF8107FF",
INIT_29 => X"FFAF95C471FCE98A7FFFF09FDAA6B5A41D60E3DFFF42E7FDE28E243C2886C6EF",
INIT_2A => X"3FFFC49FF18A616F6E6DB33E7F21F7A4250D62C36F98D9EF7F0D71EFDD4E1A87",
INIT_2B => X"3EEF0ADE341597C927DED30002E3A6FFBEB0AF67F1C1BE69FFFFE014393FE2D0",
INIT_2C => X"DB78BE9891578D3F3C7BFE5FEFE0C5CEFF7FE6583A3FFE003FFFD67F684AFB0F",
INIT_2D => X"1F2277C7FC90E67DBFFFCEFCBE3FBFF87FD97EFEE49438559AFA6BB8BEC90F8B",
INIT_2E => X"FFAF6735DC7FFFFE798E3FFE81817AD45B6AD0763928DF557FE9788B962F588F",
INIT_2F => X"7832BF34FCDEE6C643FD3498F8EE3F8AADD7D0EC8049EB1F9F35547FFF88DDA1",
INIT_30 => X"BEF94D85FDC1FFF217F38269312B841BFD1C2FF1F7AD73D83FB30956FFFFFFFE",
INIT_31 => X"CE7FC785AFCF979B10C51ED5F7A639EDAFBB937FFFFDFF1E5E13FF3CFE5FE433",
INIT_32 => X"ECD944F9E38D7AE3D7CFA65EC07FFE1E6FFF1F3DFE2FE9EA522BBBA1AE8BBFF1",
INIT_33 => X"6EFFC20C07C3FC0E2FFF8E7CBE67E1F7D33782FF648C7DFD6D9F88A49061F851",
INIT_34 => X"2FFFFEFD4F2CB3F8FF71DFFE8899F1E0777C5CFA4E4EAABCAE8EBF71DBA0BF7E",
INIT_35 => X"BFCE1FFF4BCDF1FF66FDA86F1EC9C98F772D54FFC5C904F56FFFF5213E98F9E0",
INIT_36 => X"34BEC2EFED3C6B8DF5522153D6E855FCBFFFFD1FA6AC63F8463EFFFD5782EFFE",
INIT_37 => X"DFB07BD4EB6DB0FFF3E3FF2FB7B903866167FFFEDFDBCFFC7C206FFFC7F6F35F",
INIT_38 => X"CEF3FFB3FEC383F07E7FFEFF7DEDBF3FD8A1DFF6EE8970AECFFD90EEEE6A5535",
INIT_39 => X"7FCBFEFCFF227F1C9B603757F2FAE06E847B5AFC9570A97B3C6A90B7F910A2BF",
INIT_3A => X"34FBBF62300CDE4A6AFAE2F4BDDA1540B42AFB66FF1C9C87D6387FEBCBD8F8E6",
INIT_3B => X"34F0B4F639BD9501F1ED7D3FFFFFA0F7E9668FF80277D3227FE7F879FF24F9DF",
INIT_3C => X"F3DE4689EFFEA75FF583FFFFF1E905487FFFF8FFFEA9FDDFB9C6FD1F777FDE23",
INIT_3D => X"F34BBFFFFDEF022A23FA7C7FFC3FF9DE45CF3F28587BBE1C3FF5B2F7BA9A670C",
WRITE_MODE_B => "WRITE_FIRST",
INIT_3E => X"0DFE8EFFF50BE09F20841FBCAF7DBF297DEFFBE6857DDCAD9F78BF6EF3CF0410",
SIM_COLLISION_CHECK => "NONE",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3F => X"55621FEE9A5FBFE3E5EAC7CE8D6846EE99BA1C97DFDFD46E75A7B3FFFD6C369E"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena12,
ENB => BU2_doutb(0),
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta2,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_3_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_4_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
SRVAL_A => X"0",
SRVAL_B => X"0",
INIT_00 => X"CBECFF08D6CC5BEAFCEECFFB3FCFED7EFF17FBFFF922C98219FB9EFFC46FBBF7",
INIT_01 => X"7FF998F90BEFE9BE7E97EF9F6328CFB27BFD1CBBBCF7F7FEE1E41FCAF2D1BFF8",
INIT_02 => X"74ABEF0F07C4AFAC0BFCFD2F50B78FE738DF1FCC35F9FF779BCC0DD8315ADFAA",
INIT_03 => X"5BFCE4E65AFF93E5DA741F335F31BF5FB3B92EF69BECF4E7BFEDBAAC53E7F0BB",
INIT_04 => X"FBE2FFD7FC083A1737543F43C9FC95763E3FD75D1FF2FF83FC6FF41FFF063496",
INIT_05 => X"1F123FD3D1E35FB7BE4F5DDC0BF5FF67F76BD9FFFFFF5DCC63FFAD9D1F8FF7FF",
INIT_06 => X"1F4F2997F9F2FFF7DC23CFFFFFFF73FC53FF1A1A6CAFD7FEC1C45C90245C7EEF",
INIT_07 => X"D3D7CFFFFFFF74307FFF9AAC04BFE9FC5A637FCCFA0DFFFFDE093FC7EE7FB7F8",
INIT_08 => X"7FB5CB307965EDFFE58A791435ACFD1FF986FF3074EF47E5BE0F84C89DF8FF23",
INIT_09 => X"BDDAE3AEAA2FFE93FE777F0076C387E14F0F2EE831F8FE0ECB1F6BFFFFFF020C",
INIT_0A => X"F7DB7E24FE7D8E267F0F7B7AD23F7EADDC56FFFFFFFFB4A47FC674833971E3FF",
INIT_0B => X"FF8F34D6A75F3CAA9F33FFFFFFFF44F27F4F9283DF01F7FE952CA8D7257FFD3F",
INIT_0C => X"1F89FFFFFFFFD8CE7FDDF636D429F7FEC423C13826FFFFAFF9657C007A01BE84",
INIT_0D => X"47D96A17219DFFFDE775C09C625CE3BFF9A4F806BEE05DFB57DF891C43A73E49",
INIT_0E => X"5D299DC10C1EF12FF47B78F61CFC16F4AFFF806AFE9F3BFF1F037F87FFFFE216",
INIT_0F => X"EE32F18E5FA623CD2FFFF2214CF73BE5DC5E5F4BFFFFF6123FE0A2FC35FFF7FF",
INIT_10 => X"AFEFF6AC49273DF6FDEDD4B1FFFFFBD01FC3703E5ABFE7FC50C7C8BE0D9B79AF",
INIT_11 => X"F973964CFFFFFEB83F2D0B1F5CBFD7F797E7B5978E9F542FE5EDF1298E253D5C",
INIT_12 => X"7F1C20D651FFF7E7CF5FBAADB159301FD9E7F9A6061FEC5DAFEFF291852F7FFF",
INIT_13 => X"58DFC49D9D1F435F85CFFC2A0760EC606FFBF5C34253FFFF772206B8BFFFFF96",
INIT_14 => X"3B63FFA257A952908FF8FDCFB9DFFFE86EBC050A4FFFFFE47F28B9ECF2FFB7F3",
INIT_15 => X"76FCF41944E5FEFF04AB858E6FFFFFF67FD04E264CFCAFDED6FFEC498B4E7E57",
INIT_16 => X"B56341DE53FFFFFC7F88799EA1FADFCCB35ECAD0084F639C6587FEF79F90914E",
INIT_17 => X"7030E05819F9DFA5ABFF7491E05E75E604B7FC45FFD1369D89BDF88A9AE5FF5F",
INIT_18 => X"91BD0A88167DB32D908FDEF2FCF986DCF79BEB67B5D3FFFE40FA97E8C8FFFFFE",
INIT_19 => X"1A8FD510FDB34BDB6FD3E783B52BFFF8FB46E0840DFFFFFE763C68D0FFFD7FF2",
INIT_1A => X"F7FBFFFEC911FFFFF928E22191FFFFFE72CD6AE6A7FF5FF5EB7A292D6FFEEA4B",
INIT_1B => X"BE265A6AD3FFFFFE7A03667B03FEEFE376C3C4A7DDBD5A6C0D47FF70FE3B5A9A",
INIT_1C => X"78E8F71FAFFCFFA78DC98C51115CDB06B692FD02FEB92EF3A9E7FFB4D773FFFC",
INIT_1D => X"11495ECC327D2FB9489F48BAFEBE6E4317FFF0A5D666FFFC3FA3CED4E2FFFFFE",
INIT_1E => X"B08654C7FF3D214BD1FFF7E0D786FFFF5D6B1C67A2FFFFFE7196CFB757FBFF9F",
INIT_1F => X"A7DFF8D2ACBFFFFFEF96208FD7FFFFFE61BEBC9847FBFFF39297E607BDFEAD1F",
INIT_20 => X"9EE51F064FFFFFFE27141ABF8BFBFF3C4A6FC76155EE32B502FCFDCFFC7CCED0",
INIT_21 => X"591C39A3DBF3FF01654FF1C747FEAE2C36DB8B0D7CB9AF9C17EF7F417C87FFFF",
INIT_22 => X"5A3FEDB5E4FB9B688FBEA2447BBC5D8CFB33FFC757A5FFFF0F20D6FAADFFFFFE",
INIT_23 => X"CBF991117A3F221DE9FBFFC058CEFFFF8F74AE1913FFFFFE59BCB0DAFFF13E63",
INIT_24 => X"2DF7FFF1D546FFFFFFB2626E60FF0000213350127FF13F288B13DFCBF9183868",
INIT_25 => X"FFA24E51DCFF00003FA5179B7FFF3FE15B91EE57482F222EB62D39ADB53FA47D",
INIT_26 => X"5B3688F6FFFF3F9F1031CB0C93840134DE08D713FB8FF2FF1AFCFFFECFDEFFFF",
INIT_27 => X"EFF8EEFFAE331A4E81B40E577A17EA3FE97DFFFFFAD2FFFFFE2790AFD3FF0000",
INIT_28 => X"135FB32B762FD69F1F7FFFFF4913FFFF39E8EF2133FF00004BCD4E15FFFF3F0D",
INIT_29 => X"FEFFFFFF9B99FFFFBB0DF421AEFF3C000B5B7793FFDF3F73069F4FDF7FC6466C",
INIT_2A => X"00000000000000000BF11F07FFCF3F8CDDFF8FBFEF1708AB6B91EF9BBC47FB9F",
INIT_2B => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_2C => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_2D => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_2E => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_2F => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_30 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_31 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_32 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_33 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_34 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_35 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_36 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_37 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_38 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_39 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3A => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3B => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3C => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3D => X"0000000000000000000000000000000000000000000000000000000000000000",
WRITE_MODE_B => "WRITE_FIRST",
INIT_3E => X"0000000000000000000000000000000000000000000000000000000000000000",
SIM_COLLISION_CHECK => "NONE",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3F => X"0000000000000000000000000000000000000000000000000000000000000000"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena3,
ENB => BU2_doutb(0),
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta3,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_4_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_5_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
SRVAL_A => X"0",
SRVAL_B => X"0",
INIT_00 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_01 => X"6C138C8803438F8D4EA5B5FC2DCFFCDF43C06CFAC95389A80000000000000000",
INIT_02 => X"75AC3C003CBFF9FD4BC0945497F547A07FFFFFE9FFFD20D0768687BFCA039FF1",
INIT_03 => X"DC0268442E0BEE5E47FECF6BDFFFF308B4423C12831F7D303333E7CD18E4CEDF",
INIT_04 => X"63FD767C7DFFA06176833C22D3778B5D06E63164F1C94673192A7C033DB973BF",
INIT_05 => X"15CCA89B7DAB392F009C3CFDB6B6ABD1C72DB70312F8603FF002887C21F6FDDE",
INIT_06 => X"80F6F8CE1429899B648A8C0300B27EBFF846887C3E84D89E6478E90455FFCA50",
INIT_07 => X"71B6C3006B915BBFFA4CE03C3332D19E54509FF8071FF1128A83DB5EBBF96E2E",
INIT_08 => X"FC41B83C31D397FA629E9F0E6F59F6F5A53CD6FABF397D26834D001D0A69AC91",
INIT_09 => X"7DC8C5EC64A9BB3BC17CAEF8771BDFD3E319000E377CCCB3566D598049BB9FDF",
INIT_0A => X"73BDBD1B4DDC1FE6BD3BC01E59A39B24558D1202C171D89FF5C6E8381B081E3C",
INIT_0B => X"C38FFC30180E765716A7E300635D9C9FFD86C8080F6AFF1E7F56032D7EAA3F8F",
INIT_0C => X"6060EB0063405C9FE886180407CFFFFC7FB22BE9FFFBBFC332BC430C16CF9FFF",
INIT_0D => X"F097F403C33FFFFE7FE53BB53D03FF811A80C00C97BDFFFF5752F8C0B609A60C",
INIT_0E => X"7FED5901999FFC23DCC74EF27A9AE17F178BEC8039C7606F0713AE0075E36D9F",
INIT_0F => X"E1834EFA07CAEE0D790F1E00F640D03A2C840F801C6C6EBFF2B3040355AFF8F2",
INIT_10 => X"614EF30077DCDEE5A80A4280837D79BFD7BB0422C24FF7FE7F709D60EBFFFE91",
INIT_11 => X"26CC46C08ABF7DBFFDB8447256D7F6FE7F77B65BC89FFFF51338CC7A03DB6728",
INIT_12 => X"E4584E221C23F1FE7FFB31611957F7AACF7CCC72099E7B623B6AB00046D72ED6",
INIT_13 => X"7FFF67CE6257FFD21CF81022ED03D26A7940F700DE3C70AC641374C03F95A0BF",
INIT_14 => X"78E03E01EEE4B66BFB204834F2E745B491CDC2B1E73509DFC2635F8FB99DF7FE",
INIT_15 => X"FEE19B00D7CAECFFDCCCE908E3CA6C5FF2705FC1D19937FE37FCD60FED7FBFFF",
INIT_16 => X"E2E1E527C2EBBB6FC591CF09E3BA3FFE47FF505F3E7F2EFD40E050009B307800",
INIT_17 => X"9409CE7121FDFFFE3F0CC31E1DBD96FFE4C00001F7E904EDFD1F73E19C37B8E7",
INIT_18 => X"7FEF02F281E757FFEA000001BFBB1CBBE389ABF01B2854CACEA5FA701E9CACAF",
INIT_19 => X"9D800001FFD870AAF07916A31D57254060A6A1989C686FB74424E0918FFFCFFE",
INIT_1A => X"B33FBB7778A8C87CB67A07071BECE9A7CDA4C0917FFFDFFE7EE00C8F07CBFFF9",
INIT_1B => X"3AB5BD6EAB4200AF30CA4072CFFF3FFE7EF7F78B8DF3F9FAF74000015FA01F24",
INIT_1C => X"F36300E49FF07EFE7F52D7AFCDD398AAE4A0C0017FB89ED77F5F8419781DB84D",
INIT_1D => X"37FFD26CED9D136FFA5000001FC04ACEEB2FF206FAFC1A5BFBA839A6A5B087AE",
INIT_1E => X"FF3800020EB461037D1CFE47469B23A154067404FF34B9DEF7E41C813FFD75FE",
INIT_1F => X"CB36FF91A5BC3B5A78A16913D5F9285FC80580BCFFD67BFE61FE12054CFE4667",
INIT_20 => X"5C3ECC379EEFB13BFF9301167FF1BFFE63FFC3D6CA38A8AE7E2800009E045EF9",
INIT_21 => X"708FF3F2FFC4DDFE71FF9301F1D10A089EA81CC86FB79D2749CDFEE63EE4D928",
INIT_22 => X"7FFFB44D4BA986A603001E0077ADE388FF9C77652F378C0DF6F5443B06091FB7",
INIT_23 => X"99DF9E00D1DE2C7BC092F3AD441422A678596E626F3CF9A467E82034FF2EAFFE",
INIT_24 => X"E7346BEDA2576F94C52A0D857F5BBE19A058F84CFED4F6FE7F7FCC2428CB1FE4",
INIT_25 => X"89EE46624A2CD54B0DBE78F47CD012FE7FFFC7FEE58F88CEA53BE0C0ACFF9FBD",
INIT_26 => X"968C2CFE038E4F3E7FFFEF8FCC2568C90569FF60C7E597BA6224FB78A611E969",
INIT_27 => X"7FFFFEBFFA3A941EB6253E13489537EB2E0E54BF51FD242C696D89AFBDFA4D34",
INIT_28 => X"B451E637E66D5AB6198DFE22F51C189228B5FD7FA62E6B90AACAD865C518B6C6",
INIT_29 => X"DE6FDB0D76D8576AB0E5F9F462EBC5F9821EF595929463E67FFFFC9FF97E8E3E",
INIT_2A => X"B70A47DFF2C86CE64EBE62A9CE67FD647EFFFFBFFD73838499C903368A0C438F",
INIT_2B => X"EE1EBE760AC76B2E7EBFFFFFFF8693E01FED04CCB1A2B45483BE1E6281EBDCC3",
INIT_2C => X"7FD95DFFAFF96B84FFDAF922E991BE3544FED89C3B0E1AB0F11F759F73A9B8F2",
INIT_2D => X"1FCE348D0DEFA423C4503A04FE9315FD9098E1CE4E4A0B93BC5841A7B9341F86",
INIT_2E => X"EE0A1C1C2C34A3F9B5F5DD8EC6524752D827490B20EA97CA7FF5E5FF97F584CB",
INIT_2F => X"2641AA7066D4E7DFF9328F32678A17983EEA30BF7FFF9611BFFEB49746F162BF",
INIT_30 => X"F6DB55D79ECE3FEC653D7479FFFF35FEF0FF4AD8A65EB919A3EBED1A1299E4FC",
INIT_31 => X"093F04AF7FA0810EF1FFEB6FB63D36951FCA0EF205F09DFC36CEE3ADDB89279C",
INIT_32 => X"E1F9F4C657FD5D220D420A18BD4AECFDCA6678EECF97F7AB9C515C8DAAA8AFDE",
INIT_33 => X"334534D0BFED79F8AB5BA1C195D717C4CC52313A3AE35FAC172FD5C47DBBB9CF",
INIT_34 => X"43518EA50246DFD8E25589F656C79ECE686FCB0ED8785EBFE0F0F95215107FA3",
INIT_35 => X"1A37B8DAB5F6FDDA53B7FC2EFC173FFDF077FF81A95EE3925C4DF7BFBE4EF5FE",
INIT_36 => X"00FAFCF4DD3B0FCFF8FBFF48551AF6E1FC42B60A47C5FEFE378F63F29D6EBFE1",
INIT_37 => X"FCFFFF3078AEF1AF224EC15C23F013D980ABFBA18A0FFFC66D63380381DE7A5C",
INIT_38 => X"BD01E1F265FE22B32BAFBFEFD98B3FDF86F502507C4BFCC82569FFDEC9B8FE57",
INIT_39 => X"6C431853D14A3FD07911EBD2BF9AF6C2561D7FB77F80BB5FF1FE3F0C4B21F4F9",
INIT_3A => X"F692E90C86EBF0826888FFBF944CC89A7BFEDFB8DF25EC6FDD50A23737F2B9AD",
INIT_3B => X"02557FF6D1035823BFF3FFB0FB11F2B7C99FAA8371FE7875DD4C74BFD9FCAFE4",
INIT_3C => X"5FF8FFECB81F7DF7F5486B2010474F82A02D3C37F7F31FE4A603074985F6F8D2",
INIT_3D => X"FAB709FA0F20F7F9AAE77B2F8E0D7FE5441DAC91057E7C785696BFF2B932B57E",
WRITE_MODE_B => "WRITE_FIRST",
INIT_3E => X"5C803AAFCF887FE22878E829E4E51F0A49569EF96D05B7627FF89FF02F037FEB",
SIM_COLLISION_CHECK => "NONE",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3F => X"D743A0D1E78B584A7E06BF3DE618F6ABA3FF8FE55A1ADFF5FA31C8C36621DA7D"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena,
ENB => BU2_N1,
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta4,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_5_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_6_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
SRVAL_A => X"0",
SRVAL_B => X"0",
INIT_00 => X"7F9E2FECF88BCF6949FFCFEE41F3AF80FC9E49C2FCCF43F9DBD6CA4FE54AFFE2",
INIT_01 => X"6E7F93F541AF0FB6FE41C98970BE3511A136339FE4BABFE21806D0F0EE3DC85C",
INIT_02 => X"7EDEF07D27EE4EFE831474FFEAF33FE2061D66F3AA67224A7FDDDDDF1FFD2418",
INIT_03 => X"0C04FBFFCEF4BFEA80DBF7F65ECFC89A7FFFF0E747FEA2C7531FBDF4BD192FBF",
INIT_04 => X"42AC0BE9C17FFD883FFFFF7FA77FFD3F36AFF7FAEBE915457F6590293FB3FF00",
INIT_05 => X"7FFF5FFFE9D2A5787233FAF8A615117C3FCA90C6BDBF6E5899873FFFFBB2FFEA",
INIT_06 => X"06D7FFFFC964E7FEBF9E5028F9604C2F1CFD07FE509A7FEEB54097E567DE286C",
INIT_07 => X"BFF5BBB8E4DEF8D4022207FE80E97FE6588327E8DDBEB9126E48BEFFD9D1817F",
INIT_08 => X"3F801FF35CBB7FF0F3B6EFFA18FAC4C67B74C2AF6CC385DD4BA21FFF85C9EB3A",
INIT_09 => X"DC871FD8167C6C1E6F890479BFFE5B65334A8047D13F7D787FCDBF790A37F216",
INIT_0A => X"75FA1805CA3E5BFD4285AD57EC729EE39FCA48623EAD2B97A86E0FECC04E7FDB",
INIT_0B => X"D2610D23F77F32769FE8DF74F45280573AF8C7AC19467FDD0767FFDC78F367B8",
INIT_0C => X"97ECFCC978DEBE542D7D978F6B757F9DAFE77FF0FEFC186C4404610A5F7BEFFF",
INIT_0D => X"1FF9CF687A877E0DA1A9FFC58FFBCD6E3480017381B893FFFBD9F39FFDB47F54",
INIT_0E => X"1EB8FF0A2CF4EB543F0FF3B8C241CFFF7D7C8479FFFF20ACC332E07781FF4F6F",
INIT_0F => X"0EFB85F810BD9BFEFFF254523FF66A9E309FFDCA27A99DAF9E3A2692738B3F90",
INIT_10 => X"FF48A25597E719115A17E3ADFCB6ACD8AAE333178ABEDF75698DFEB513EA39D2",
INIT_11 => X"ABCBFE98E693D151057CBC82A8B75FEFCE97FEEF4FFF676E1D907FF0F87EFFFF",
INIT_12 => X"D30564E892E73FFB117CFE410F70A2A60003003DFB7C1FFFFF93F85417F44CE6",
INIT_13 => X"638EFE1D6F060D16410300F1FF0177FFFFF1D5CCF7F2B13553ECC25B048C11DF",
INIT_14 => X"1D036CC0FBBC73F3FFC16ACC2FF945AD3DEFC8F08B90E89B6BFA07E873AFFF57",
INIT_15 => X"FFF36962A4BFD8559BF856F41C95EA089623660CB18FFFB1CC92FDC91F3844E6",
INIT_16 => X"0E4BAF5AD0C1E066988B4DDDAFDFFE1138A2FD787F50AFA833037EC01FB9E7F1",
INIT_17 => X"49BBDA01F3BFFE7E5C1CFE403F54ADF231637C63E59ADBFBFFF0D030926FFBF0",
INIT_18 => X"56DFFA2E3F2407F473FF0071F0E7377FFFE7C55C7B37FDB4635B2720095752B2",
INIT_19 => X"400CB431601DF19FFFFFFD4B1B6EFC26A98D0CB7A2285BDDF84E96F146FFF9EB",
INIT_1A => X"FFFFFE53BECFBC47C2109C7E0B190BE960D1D6B15D7FF754FECFF2C4BFD963E4",
INIT_1B => X"28CAE009C80EDD24A0C5F1F1A6FFF9829A2FFCBBFFB1E7FC001E7B3C08C24717",
INIT_1C => X"40D3AFF00CFFEC95433FEC64FE968FE87717FF1C1F3930EFFFFFFE38AE09EDEC",
INIT_1D => X"AFAFE971FE7D5FFE7A34C7B9700E89A77FFFF9CF62C0B71A7B855CB42334ADF7",
INIT_1E => X"539FC763CFF1E91DDFFFFC1F1544B6F5B3A7F335663650D28EF99BF045FFED85",
INIT_1F => X"E01F1FFC32DB03700767FC45FCDC49D6F1961FF1F3FFE936B7CFEFA53EFAF8A2",
INIT_20 => X"5AF4F9C1106C4324FF9A5FFF3BFCEAEC87FF5A0D2624F91042B7CCD97017D24B",
INIT_21 => X"289C8EFEFBFCE5D127FC558267A5FA327917B0A23FB099F18C40CFF8F5E925FE",
INIT_22 => X"57FC259DEC67F62E140D595D01BD71E16ACC316DF4B316F8BDA8F9D2EE75D2A6",
INIT_23 => X"258F1C5D21C21F1C40E70C9BFB5B97EC564C7D5F780C7F10249E0CFF47FFF4FA",
INIT_24 => X"DB4C91EBFF479530D5BF3CD18EF5F2218B4CBDFBCFFFF50167FF39C5FA9BF312",
INIT_25 => X"5857381339F23291431B2FF3EFFFF70E8FFF54D2EDBFE87E3227DD6650AEDFF8",
INIT_26 => X"17BE3FEB9FFFF5F99FFCAC032B2FDA1071CEB8B1B6666CE04F12C4BDBFDBDD8D",
INIT_27 => X"1FF955FCB61FE8A2300522D92929C0B23708A021CFED9DBF82393C636E373257",
INIT_28 => X"3F8269245C507BB040F415FDCBFC90B01F1B1F4738FCF04B7A9FEB02EFFFF5C6",
INIT_29 => X"B1E8F141CCFFC7E534F331FF176C95177C23FFC17FFFF6387FF1A5584B7DC466",
INIT_2A => X"7ABF60FE2E8695FE477DFE011FFFE7E7FFE329DA7FDD20BE0078DBB6B5A1BCEA",
INIT_2B => X"F6E0FD3957FFCF1FFFCD115D73DE9BFE014C8D2C8E3F9CFDB1E9C9C20AFFE7A3",
INIT_2C => X"FFC80C01D24F27FE79D7EE4CED8D040E70E6943E197FF64C558A307F80E612EB",
INIT_2D => X"472871C811E538628041C436C75FFCA4EBD4477DAFDFF3F0CB06FD3DCFFFDF3F",
INIT_2E => X"FEAFF9DE34913F0A96ED843DF3FF9191498F33849FFFFCFFFF86A5415EFF4FFE",
INIT_2F => X"69745FB91081EAC600FEFC6E9FFFA9FFFFBA3CD170EBFFF807DBFF2068E3023A",
INIT_30 => X"A80C9F217FFFABFFFF29DA8D3117FFE04FCC003166BF21AF70DFB23A4169DFB9",
INIT_31 => X"FF3F02CAC067FC7C30C73E618074012154FD65BF90C16FCBB94E884EBE0F9630",
INIT_32 => X"030087F05D6D4D0B3FE97A70FFD86FD875DE23DDF271FEA3A72895027FFFBFFF",
INIT_33 => X"E540FA0703E803F81200AA680EFE7CB2AADBB24E7FFE0FFFFF75DDF6003FF5CE",
INIT_34 => X"C84D02B00B27F9519FDC6A2C8FFD5FFFFF4A35FE3CFFF5D44731E6E6B958F260",
INIT_35 => X"6AEA7288AFFB7FFCFD5928FC32FE25CC61D3E66D4141A3659EAA7E79C76D03FE",
INIT_36 => X"DE3B0FFFD2FDE3BE59B7E6EECF56E9B547D29E39EEF827FFF7F61F52F4FBFF80",
INIT_37 => X"2127F12000BD359A01F2F5870379E7FFFD8985E7E9ACBD91727D3686EFFBFFFE",
INIT_38 => X"3452F6117079D7B801E20DD3B601F9ADB35D1126EFFDFFFF07324FFFC3FA9B6E",
INIT_39 => X"D0410D68239B7DC546A163480FFB3FFF166ABFFFFFC9289E10A45CC084EDFABF",
INIT_3A => X"7584EA884FC87FFF32EF7FFFFFB6734E35B400E086C5C2AD9C19284770CCDA47",
INIT_3B => X"E8C0FFFFFF29E49276AB01C0871BBEC73352DAC3CEF284FF96D5011F7D33462E",
INIT_3C => X"7E5300FF606A47696533823BFF78AE0D5FE5838E1986C29998049A7B4F73FFFF",
INIT_3D => X"71A9A05EF10E2BAC43FA83F130A74C397EBA57D9BF23BFFDCD07FFFFFE5C9A70",
WRITE_MODE_B => "WRITE_FIRST",
INIT_3E => X"E7DB8F87F09FEDB92BCE9DFB3CEB3FEAB63FFFFFFCB353FC0227001CAD97FF67",
SIM_COLLISION_CHECK => "NONE",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3F => X"7710291B3EFF3FA70C1FFFFFF89827FC49C71F011D37FFFC3FEBC89ED4776580"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena0,
ENB => BU2_doutb(0),
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta5,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_6_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_7_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
SRVAL_A => X"0",
SRVAL_B => X"0",
INIT_00 => X"FEFFFFFF0124AFFE1C020FC737D7FFFF1FFC947D18889C7EFED41F9D38CF5769",
INIT_01 => X"3C0007FE57BFFFFF1FF12FFCCDF1C68FE299779EAF0F37BFBCA1A27EF853BD74",
INIT_02 => X"FFF00700C9681E06695FE0D869FD8D193EEE85303EAFCF3046FFFFFE7E06BFFE",
INIT_03 => X"814BC0DA28FABE9BF991091B5E7FF9EB79FFFFF89FFEFF7E7EBF06F7F77FCF7F",
INIT_04 => X"F8F6B26C0A6DE82221FFFE030F81F83E3FFFFF06529EBFFFFFFCFFFFF3C7DF86",
INIT_05 => X"83FFFC3C1C7FF99C00F9FF9B5A1E7FFFFFFFFFFFFC1FDAA567E401E20A897C0C",
INIT_06 => X"400098E5C77EFFFF80FFFFFFFFFFF8428FC701E2EAAF6EE8FEB439F0C99DD2E2",
INIT_07 => X"7BDF87E07FFFF1FECC2100F0106A1E7CFDA64DDFD1FDE14E7FFFFC6080FFF304",
INIT_08 => X"3A198018A0B5B9BDFCA86FA3D8FE2462FFFFFCDE7FFFFBA078E0BB1C00F8FFFF",
INIT_09 => X"313AC7F3C64226CBFFFFF33EFFFF82582318F27C529FFFFFD80FFE7F8FFBFB67",
INIT_0A => X"FFFFEC06FFFF9A0667D8864B9FBC7FFDF082F00F33F8F83BDBD9830F2018BA23",
INIT_0B => X"0FD9CB81AEFB7FF67C28E03D34FF7FE4B9F987F9A0072283BE7E9DFBF696D6B7",
INIT_0C => X"0AC0E7322D593FD9DFE9F936026A6C4DF86FC3AB7EE8851FFFFFB0E2FFFE3A10",
INIT_0D => X"EC09F9F986F4468D70BB00345AED827F7FFF3F1FFFFAAAAA6F8E749DFF4926F5",
INIT_0E => X"9AFF0DFBF69291FFFFFF00FFFFF7251E34C2E5355FCF96CAF97D807F6A825FCE",
INIT_0F => X"FFD71FFFFFF50B7E2CF08B8FFEF198E7FF3B83006595373EE801B0FB84D98D36",
INIT_10 => X"4DCFE7FFFC7DA1C48FC42702721E277EDA61F00E059EEDFCBFA5BF6EB14EABFF",
INIT_11 => X"FC0FFA5415E12BF1BD81E370092AF2D699830F22A7C993FFA4B7BFFFFFE7DDBE",
INIT_12 => X"D771E3E71950B538FDE59BCCD2D15FF408FBBFFFFF0CDA5E5B813EA75A068488",
INIT_13 => X"1194BB66980EFFD9B80FFFFFFCFE31203216FFFD31C00538C3FE20B2E83CD60F",
INIT_14 => X"1517FFFFF903CA9006D0F4DFA4B89F7E7E83BF6288C137FFFB39C39D1B5EEB3A",
INIT_15 => X"1127EEC4E3441E07FC6EF83FE7FF3FFFAD79C73293CB37E450F4B7C1D2DBFF4D",
INIT_16 => X"0CB47C3EFFF9FF1DD4B6CF4FF3E9097B292D65226B47FFFFFFCFFFFFFF79E694",
INIT_17 => X"B61EC741713CD28DA8DACE256AD7F23FFF0FFFFFF709EADA11FF810E136DC676",
INIT_18 => X"780D39809623A07FFECFFFFFF0DB7DCC2F3ED8E9FC7CF82B48377C1FFFF87E1F",
INIT_19 => X"F95FFFFFEAC9CC367FFF9CE7C00021106F4003FFFFF8383906D6EF61E0F9833C",
INIT_1A => X"7DEF532E6000AEFFAFFFFFFF07FAB30791C0FF6A96B5A18CD293D3F147DBFFFF",
INIT_1B => X"FFFFFFFF73FE6390B72C7FB7F59A72D1B6A1544A5FF1BF1CF6FDFFFF4F3B7856",
INIT_1C => X"FCBD77D97EF91BF1DA41ACE23FC1847CFDFDFFFFD30AABA87DC423DBE071893F",
INIT_1D => X"99633DABFFF9643A47FDFFFC6C8DA3F27FFD2827E27D9CFFFFFFFFFF600F6D71",
INIT_1E => X"97FFFF046E81E7DC7FFA8F20E07FDBC6FFFFFF00E6D1C8FDFC50FF6C72C139BC",
INIT_1F => X"7FF4F34C781F0AE178DFE6A11B5D6DD4FD366BE32E3C2B655719FEAFFFE5CAAF",
INIT_20 => X"FFFFE7A2EE8F32D5FB0840DFAEBAC84E14A9971FFFF9D8CBDEFFC1C1FE76E23A",
INIT_21 => X"E9A8BC80DCC65D2372D7187FFFE832BA34FF3A5B4516C7D07FF19FD7E51764E1",
INIT_22 => X"85EAE4FFE153A366FEAD36D339C7B9087F85602195CBDFFFFFFFF17D8C0F3671",
INIT_23 => X"FE9329F96AD359767E7780202E0FFFFEFFFFF298E1EF5C4FFDA039FD94580976",
INIT_24 => X"7BF2802927857FFF3FFFD0CD3290B2DFF63AF8F96DFC3D45BB5809FC0505D6FF",
INIT_25 => X"03FF2A4DBAD5C8BF1ED4F019F00440263B9E15FAA94096FFF19BD012ED602DE6",
INIT_26 => X"CEFCA62618087F13B65E17F60CF3707F183C6ADCA55C0CCE66E680AF4FD3EF7F",
INIT_27 => X"F6CE7FE6263FC7FD829F33557FAEE0B842378795DFE612AB9BFE9BE7A917DD7E",
INIT_28 => X"7D59F230987825480A33F8A3FFE878ADDFFD6947FA9E4FEC8E7F8FAD4FFFFF09",
INIT_29 => X"7DFCC7BFFFD77F6FFF7867CF95DFBFCC0CFDCB5E3EB5FF4296990FE23C7FFDAC",
INIT_2A => X"D8F65E6FE03B3FE04BB67F6E1387FD16B52D97E04CFFFFE66D415EC7E301A990",
INIT_2B => X"D79CFA4FAB8DD21415153FBCD3FDFED444FDE48FFFFC6E287EEDF1EFFFA9B58F",
INIT_2C => X"B45CCEE39FF03CAC7029E73FFFFFD25233B4366AFDF88B49EBBF4709F6773FFE",
INIT_2D => X"280780FFFFFFA5B44674F018FB5375F65A6BA70FF217BF1D4F1BADC489884D7A",
INIT_2E => X"4C20E736C293A490D32F7EAFAFA7FD1E7D1D77EE8F1013B55AE27797FFF3A390",
INIT_2F => X"157041F6E5DFCABCF8E57206686C6D572B41F3E7FFED42EE5909FFFFFFFF5D70",
INIT_30 => X"F7D25E1A44598231D40B0BFFFFDBF602E3F77FFFFFFFA2FE11EC860B85152531",
INIT_31 => X"6B954FFFFF55574B22A41FFF8F3F9DF87D0FA8F807F860FAD5C04F46DDCFD9B3",
INIT_32 => X"9402FFFFF8E0C9F03D6AB3F29640D1BB26E21CBD17FCCC98EB07EEAA76E6A2EC",
INIT_33 => X"733FFDBC497F68561BFB889347F9EA5A96A0FCB3EAD43A8A9346EEB37C668991",
INIT_34 => X"B3851C93858F95D7565D88AAAD2564D9ECEB5E79F5564A4404B2BFFFFC0F7FF0",
INIT_35 => X"46DFB6ADB4D7C6553E233E4F992BE58CB794FFFFFAFC7FD83FFFE914B0281F59",
INIT_36 => X"1C745BAABDFE447F57245FFFFB3963DC3FFFFC8DB89AF96C0EF57FC28A07287F",
INIT_37 => X"FCCD77FFFDC163263EDBDDA9AD52E0987DA2FFE72BF95EBF2EDDF6A1DCB6B2AB",
INIT_38 => X"6F0BCBAB2C3AFE9904BBFFF6FBF4B80E72FC8647D9340D1704B21C066C12BD4F",
INIT_39 => X"87EFFFF0DBFFC9BCFABF54069769A25704F551B66B2D41BE1F8FD7FFEAB366DE",
INIT_3A => X"FC788A35BC6A8E570E4C36560953B7F31FF86BFFEAA005D4362A8ED441E5CC1E",
INIT_3B => X"1F4C116753327FA9E8ED2FFD06B0C6E87677A468C6EFAE116B4FFFF1F3FFEA1F",
INIT_3C => X"F54FC7FFDCD022D6153E7510FBFF500E771FFFFFFFFC0603FFFB5BF400158063",
INIT_3D => X"58233EA704FF1B393DFFFFFFFF91F8E3FFF3E50572DE31693960879FE954FF9C",
WRITE_MODE_B => "WRITE_FIRST",
INIT_3E => X"FFFFFFFFFE548BE3FFD7553B7C67B58D4EED3BFFC7F07FC07FEF67C1753C6F2A",
SIM_COLLISION_CHECK => "NONE",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3F => X"FFE01D4EB29B305567BD7BFFEF50FFFE8330EBC1455925667427856BB4DD93F9"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena1_2,
ENB => BU2_doutb(0),
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta6,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_7_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_8_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
SRVAL_A => X"0",
SRVAL_B => X"0",
INIT_00 => X"6CC5699FDFD3BE0DF945F0B7BD5B479879FE0A624BFD7B347FFFFFFF3FBD09FF",
INIT_01 => X"79363B38FEDB4C0E64143A00AF7EF8523FCFFFFFBCFD08FFE79F6B909C0C3DD6",
INIT_02 => X"797332FEACF973917FEFFFFF38084EFFC3BEF2136005215049F4E1E0C7FCFFDC",
INIT_03 => X"7F7FFFFF9AF1CE7FDBEACBE2DD9F83FB7C646899BBFFF8747C093583D592AD74",
INIT_04 => X"DB926F35E31592CCA60551F922F213F07EF581C85415912E67441B01D340F5DA",
INIT_05 => X"BC803BA344BDDF43F1174992DBEBF56277D038FB9FEFD871FFF8BFFFCB859F3F",
INIT_06 => X"B029B11C5F98C8CA765C1C01221A78FBFFFD7FFFE14F6FC7FB9A77B06AC3F50A",
INIT_07 => X"71073EF0BC6D2FFFFFFAFFFFAE458FD7E7FB3757E3B6E75D8CBC9FBE5B0DBE99",
INIT_08 => X"FFFFFE2FA68F5FFFFEEE1F2D26AD7838203AC5E27309E134477A9DC5E44585BA",
INIT_09 => X"FD785F2EDA646676A23D6BB24FCDC7FDEED7CDD28B3720BA6AEAFF2327877FFF",
INIT_0A => X"064D0E6A475E13F9C75ED63AAFE8DB70781390574BD8BFFFFE9A3E0EC5E27FFF",
INIT_0B => X"A6579C7ACF1860FC1F14027AF434FFFFFF0A7FFE33667FFFFC442F62B34FFDBB",
INIT_0C => X"1F73E71FF866FFFF8D8BFFF6E04CFFFFFC494FBEE06373F455D7ACF1401DF5FF",
INIT_0D => X"18CAFFFC85B8FFFFF71CFFBC6EFFB8F437767C4B038FD9FFF7D70CF676DEE302",
INIT_0E => X"F8EDFF94C5575DFE94990D4C7E9FF5FFAFC16DF343FEC8323F9CF8965556FFFF",
INIT_0F => X"36CBD79A8C6FADFF8E172DE7A1B9BB6A7E7CCB9209E7FFFFFABFFFEF680AFFFF",
INIT_10 => X"DDF68D4CEC0187E27DC5FEFCB90FFFFEAB9FFFE22847FFFFFB1EFFE5669291F3",
INIT_11 => X"705CB0FD7EF3FFFFC177FF4CEA6FFFFFF895F720663E8FF6FB7FE43C0D7ED5FF",
INIT_12 => X"4693F7E5D9FFFFFFE16FC3697DA807FE8BB6EAAAE27D02FE65E058AEF9606100",
INIT_13 => X"E10CE77AC860BFFD60CB0EBFFB7D8FF016635C90F21AA1F2785DC2BF7FDD43FF",
INIT_14 => X"01E76070FD3F56C26DFCD35F37CF8BCA716BF83F7FDECCFD7EFF827B3EFFFFFC",
INIT_15 => X"93878801911B18A07FE7E6DFFFA572D769FFED557DFFFFFCE7F3ED64DCDBD3F2",
INIT_16 => X"7D3F883FFF9A07D67A3F8390E3FFFFFFE4D8BF22CD379376C223E6F05F7ED3E6",
INIT_17 => X"7FBF264650FFFFFFF4C6FA43DA6A9379C234F238FE479F2BEE8BE1CEC96633CC",
INIT_18 => X"F35FFFA4EECD633E46DEF4BB861FF82C45C16A4CAB26F0707EFFF7FF2E6A4FD3",
INIT_19 => X"BBEAF769E663FCF2E2E196A855E1DE527FFE7FFF6AAB7E34ADFF130178FFFCBF",
INIT_1A => X"EEAF1DAB93E5D8AE3FFBBFFFFAA14CE82BFF1E1EA27FB0BFF0FFFCD4B4ABE43C",
INIT_1B => X"5FF77FFFF9EB76DD9FFC6ECFC07F487FFD67F54245CC823E9FF1FD14AF283FFF",
INIT_1C => X"EFF847F23FFEF4FFE8CFF1B921419B7EF26D3FC91A1CBF1FD7286B3D0C23B8E6",
INIT_1D => X"E77FF8305A4C03FEEDF13F3A9E6F0E77E9B091AD99B4C1921FFFFFFFFC1AF7EA",
INIT_1E => X"51EA3E50900D9FAFF8DE4CB2C1C841D67FFFFFFFFA800D415FFD8721FFFB51FD",
INIT_1F => X"FFBDE0A860B53FD47FFFFFFFFFFC82187FD58F797FF115FFFABFFF6C72FDADFE",
INIT_20 => X"7F3FFF7F7FA68AE5FFED847AFFF927FFE43F99B347A425FF6DA67C0B10273FCF",
INIT_21 => X"FE42802BFFF85BFFEF9F1C2E7F52B5FFF2117B5A0D9E07EFECA2470ABFB0566E",
INIT_22 => X"16DF7C3A2EFD85FFBDEA8A79E74B43FFD75CF47BE7AFC58A7E9FF7FE9E89A20C",
INIT_23 => X"F7F4013D1887E8FFE43C147CF9F37D727E6FFFFD2FE8F415BF45014BFFE9ABFF",
INIT_24 => X"F5FCEC7C7F2E31A27F27FFFD0EFF03AB38BB0B2FFFA99DFF41FFF2A9CFCFA1FF",
INIT_25 => X"010FFFFB435F3AE59D23DF0DFFF617FF073FE244932BE7FFB6A3F37F7C08D5FF",
INIT_26 => X"5D76749FFFC86BFE923FC34CC6DDD1FFF38175FF3CFA785FFB0213D6FFFFD0D8",
INIT_27 => X"EABFDBE4EEDFC5FFF163112F29E2FB2AFF5F243A7FFFEE761C7FFFFE0FD55EF9",
INIT_28 => X"F9E710AFA6B01E83FFF0BE05FFFFF6D41FFFDFFC2E04CCFBDB458A1FFF965BFE",
INIT_29 => X"FFEDF744FEFFF2981FFFB2FFFE43F5EB1D3A3A7FBFA887FEEB7EE9B7FC0580FF",
INIT_2A => X"7FFFD6FFCCB58668F236AEF7BF8F0FFAA4FC7499EBFBF27FFDC57AD3E8E9B8DB",
INIT_2B => X"384A3477FD04A7B603FD63AA69FBF8FF7C59409BCACDBD97FFFFE8307EFFFCCE",
INIT_2C => X"BFFA6CA8FBB1303F3D57D393F6F27F4EFFFFED45BCFFFFFE7FFFF63FF20D7CED",
INIT_2D => X"7F86FC09FC0ACF3A3FFF02EB7CFFFFFE7FE7EDFE1F95BC3583B92EDF7E505FB4",
INIT_2E => X"9FDF231F1FFFFFFE7E007FF8E040397CD8D92FB97C903FA06FFC4A27F9F568BF",
INIT_2F => X"7C0CBFF8FD1EFFF8974A2667FE93BFF9A7FCB4ED11D1E75F7F8B4AB1FE2FA3E4",
INIT_30 => X"4901D3F9FE2AFFFBDFFF98DF74FDEBF7FEC13207FFF4F3B59FCF5732BFFFFFFE",
INIT_31 => X"87EFC21D83FFB887A17C913FFFF4BFD51FC723CF7FFFFFFE7FFFFFF8FEFFF19A",
INIT_32 => X"82988C69FFB13DEE2FFFDCEA5FFFFFFE1FFFE0FE7FF7CAD2420C8BDF993A3FFC",
INIT_33 => X"DDFFF762CF3FFFFE1FFFF0FF7E57F9E9DB1897FFF13D7FF0DD3F1B8053E1BE4D",
INIT_34 => X"1FFFFFFE3F79CFFD3D7DDFFF7FBFFFFDF87F491D3C6D1A95ACEAA54DE7835CFD",
INIT_35 => X"3C62DFFE1BBEFFE9293F4CE6E02BF8D2D0E80E27E3B51E7A79FFF9C91587FE1E",
INIT_36 => X"B9FA408ECD14C9FA5EE99123E1AF6EFC83FFFE4F2963FC063FFFFFFECFD037FD",
INIT_37 => X"3BABB697F42889FF3FFFFF3728A8FC807E1FFFFFCFF22FFEBA53BFFDEFB0FDF9",
INIT_38 => X"FFDFFFDD24897CF07F87FFFF9EDFFFFFD83BDECA87CCFFC21CF9C975AC1BA35C",
INIT_39 => X"7FF7FFFFFDF1FC7C7AA5BF07ABD8FFB465FB93FD656017B6FD1B24BCFED9D97F",
INIT_3A => X"59C9BC045F85BFD43D7F62F6A655BCC13E46481EFF7CC17FC9A0BFF36B9D8DC8",
INIT_3B => X"59FD20F4A997DC807F382233FF7C19BFD7C39FFFCA60F9627FFFFFFFFF42FE3C",
INIT_3C => X"BC2C2953FFFF5CF3ECBA8FFFFA0514A87FFFFFFFFF3BFE3EADDCBF9F870FBFBD",
INIT_3D => X"F8F78FFFFC9365065FFDFFFFFDDFFE3E9A267FB44009FF87B0F037F49D74BC8E",
WRITE_MODE_B => "WRITE_FIRST",
INIT_3E => X"73FC7FFFF22FFF7E8850FF3DE00FFF31EAEE8FFEF7FD1B8FB849EFCC77FF27BF",
SIM_COLLISION_CHECK => "NONE",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3F => X"D436FFFDF9F1FFB0C3EE4FF24BF1818D5E6CD3EE3FEFBB3FF59FAFFFFEBAEA36"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena12,
ENB => BU2_doutb(0),
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta7,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_8_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_9_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
SRVAL_A => X"0",
SRVAL_B => X"0",
INIT_00 => X"F1F70ED827FA988D5FEA0F36DFFFD187D0A7C7FFFE650F2260FC7FFFF843C7FE",
INIT_01 => X"7FFE98EB23FFE763AE2FF7FFFC3CB38400FEFE9C13EF8FFF0724FFBE89F7FF25",
INIT_02 => X"1737F7FFF80055CC77FFFD1F9FBFFFFE8EF0FF824CEBBFD1E1F30DC258E71C8D",
INIT_03 => X"67FFFA111FBFFFFF04A6FFBB9F8AFF0BCFF93D36F8F31C7A7FFC40525FFFEFCB",
INIT_04 => X"76517F06EF6F7E53EFCA1FB3D91CDB043FFF47F5BFFDFF43C81BE3FFFFFA06A2",
INIT_05 => X"FDEFBFD3FCCF90BB3FBF82AF67F8FFFFE483FBFFFFFD0B5047FFCE03221FDDFD",
INIT_06 => X"3FBFFBBF5DFDFF7FEFCBEBFFFFFEE9C86FFFDCFC4FDFFDFC720EFF2717BF9EB7",
INIT_07 => X"E30BEBFFFFFFF5F67FFF1C1BD91FEBFEE82AFD8BD3C87D77BAFCFFD3E69038F3",
INIT_08 => X"7FCEF31546DFF3FFCDE9E7FAD97FFC6FF9F4FFE3E5F078F75FFF468783FFFF23",
INIT_09 => X"7281FC1E4CFFFD9FFA43FF83F83CF8F7BFFFCB0B17FFFF613D0BF7FFFFFFAF9E",
INIT_0A => X"F7D57FD3FC01F1B63FFF9A152BFFFF7AFE4B7FFFFFFF5AF27F00879EB22FFFFE",
INIT_0B => X"17FFDC5C8A3FFF3C7E447FFFFFFFE4067F811D8175AFFFFF6205AFC0C6EFFC1F",
INIT_0C => X"7EB07FFFFFFFE9247FE0867A2D3FFFFE030982EFC7BEFABFF1CEFFC3F801C195",
INIT_0D => X"7FE371A5BD5FFFFF637B9F4B835FFA6FFC377F957DD863910FFF7BC0309FFCF1",
INIT_0E => X"B8F797D6EC1CFFFFF66CFF35FF0522BA9FFFFA4CAFAFFDFEFF0D3FFFFFFFF9BE",
INIT_0F => X"F406FEADBE1C386B7FFFFEE3D97FFDFE3E56FF87FFFFFA845FF5CEFAAF7FEFFD",
INIT_10 => X"1FFFFE763BFFFFFFF9C4B333FFFFFD5A7FEA922B963FFFFD492F9097EDDCEBFF",
INIT_11 => X"FA2F727DFFFFFFFA7FF91A38AC3FEFFA451FBE4FEF98FBFFD481FE5E3E1C5D84",
INIT_12 => X"7FB73D8968BFCFF58CFFAB9DDE9EDD7FE487FEC7FF3CA6ECB7FFFC157CC7FFFF",
INIT_13 => X"9FFF907AD13E9D3F8D8BFE13FFE2AC106FFFFE3D0617FFFFFC4302067FFFFFEA",
INIT_14 => X"7B2BFD17BFDB031863FFFF06831BFF1F8931FCE13FFFFFF67F9C364FA97FCFEA",
INIT_15 => X"15FFFEA55903FF1FB5CD03A11FFFFFF87F4B6A4726FFDFF51EFF5A19D23F033D",
INIT_16 => X"388240E1CFFFFFFE7F446BDE96FDFFCA387FB533520F96B73C53FD97FFBD5473",
INIT_17 => X"7F74ED9531FFFFEC30FEA5F6524FE39D4A53FCAFFFE7D54647FFF7EB0203FEBF",
INIT_18 => X"4BFF84C4802E9BC49FE7FFDDFFF5761D1F67F7960997FFFCFAF818B827FFFFFE",
INIT_19 => X"61CFFF49FE7ACE1BBAE7FFDE824FFFFC7F8C75AC1BFFFFFE789B5356C3FFFFEC",
INIT_1A => X"65E7FFD16583FFFC7FBBF1140BFFFFFE7C59CCB6BBFFFFE9EBDD6C39D67CC0B6",
INIT_1B => X"7E82291E09FFFFFE7C54F77247FFFFECF80D2E44D9BF8D134C1FFF9DFFFDCE67",
INIT_1C => X"7DB3180A37FFFFEE4C641F2403FF14983B2FFEF9FF7C42B925FFFFCDE311FFFF",
INIT_1D => X"094C894C647E62BC7367BBEDFF7C5373D9FFFFC759F1FFFFFC9EB43319FFFFFE",
INIT_1E => X"43CFA7D2FFFF6A18BFFFF8C5D1F1FFFFBF1180E099FFFFFE7A24F0726FFCFFF6",
INIT_1F => X"B3FFFFE0B698FFFF1E7660804DFFFFFE75DBC3859FFCFF85322FA8BAFDFFA1CE",
INIT_20 => X"0FE77F0125FFFFFE4A4759843FFCFF88124FD12017FEF1B8C3964206FFFB18FE",
INIT_21 => X"12CF649BBFFCFF89123FD028CCFE3D35F30F131DFF7A97B9D79FFFF33E18FFFF",
INIT_22 => X"586BDDF22CFD1CC70903D830FD7E1CDEF781FFF97A80FFFFFF5BB9F95FFFFFFE",
INIT_23 => X"31C1DF14FC7FD69C33F1FFFE8CD9FFFFFFF091F8F5FFFFFE424CA6337FFFFFEC",
INIT_24 => X"59F9FFFE1769FFFFFF8BE11EE5FFFFFE6248EE0CFFFFFFD80F5BFC47A13D0253",
INIT_25 => X"FF94BECF45FFFFFE3CCB01F2FFFFFF2BA0FFDDD3F90590617F977159787FE4BC",
INIT_26 => X"7CD858E5FFFFFF301B34D781E7195B6C5CB043A5B07FF6FE28FFFFFF9771FFFF",
INIT_27 => X"F83FFC5FAEFC1D9E0A708382B1EFEEFF87FEFFFF6B91FFFFFF960F6049FFFFFE",
INIT_28 => X"F05BD4D3B9DFC33FAC7EFFFFA861FFFFFE5160E069FFFFFE7C167CDBFFFFFF33",
INIT_29 => X"DF7EFFFFDAEBFFFF7C51B3E0E5FFC3FE7C8B89A7FFFFFF41E07FBE7F0F167A9F",
INIT_2A => X"00000000000000007CAEE6AFFFFFFF32021F4F7F5E0E0A09C7FB15473FBFE7BF",
INIT_2B => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_2C => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_2D => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_2E => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_2F => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_30 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_31 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_32 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_33 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_34 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_35 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_36 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_37 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_38 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_39 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3A => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3B => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3C => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3D => X"0000000000000000000000000000000000000000000000000000000000000000",
WRITE_MODE_B => "WRITE_FIRST",
INIT_3E => X"0000000000000000000000000000000000000000000000000000000000000000",
SIM_COLLISION_CHECK => "NONE",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3F => X"0000000000000000000000000000000000000000000000000000000000000000"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena3,
ENB => BU2_doutb(0),
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta8,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_9_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_10_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
SRVAL_A => X"0",
SRVAL_B => X"0",
INIT_00 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_01 => X"1CE3839B05A5B80B20FA63001A9FFF3EBE80D83CC4CFEC260000000000000000",
INIT_02 => X"71866E00163FFE3D6A8048388D0C6EDE7FFFFFE4FFFFE73B44FED75E3F4BE000",
INIT_03 => X"EE8020381AFA5F7E7FFF3FE07FFFECFAB98188132A667EC00FC3E034D87906CA",
INIT_04 => X"47FE0F16F3FFFC8304FF7B4063DDF3810107F09FBB6E1E5A59F8F00016FFFC7F",
INIT_05 => X"990398F52FB08A30001FFC03755818E5EDED180009BFFFFFF280A00014F0407E",
INIT_06 => X"00FFF8C004507D665C80D000053C017FE280A00015817F5E43FF060AB1FFE89E",
INIT_07 => X"5947E3006922C07FE082C800190E31DE603F1FFD833FF6A2730037A401E09F29",
INIT_08 => X"E48350001B33BE5E7C811FF0723BF9A7863C31040CC37D2B03FD0001229012C2",
INIT_09 => X"7EC77BF3AA89FE6D427C9E169EF05FEB03F8000E1A9412A33A5218804813403F",
INIT_0A => X"F23D8307B85F7FFA89F8001E0F756337F2C21700C242807FE50130003386BF1C",
INIT_0B => X"3380003004654652F520F7006193807FE501F00021AC7FFC7F8984EBF68BFC95",
INIT_0C => X"1160F800614B407FF901E0002B27FFFE7FC1CC287D45FE0AF33CC0FC3F8F2FFD",
INIT_0D => X"FD1000002FDFFFFE7FC4D39FFCA7FEB4FB00C003AC726FFEE0ED00C01580C61F",
INIT_0E => X"7FF70E54FDBFFE483F0040F1242A5FFEEE7D0C800909C001B303FF0073F5017F",
INIT_0F => X"1E0040F97CC381F1BECC1E00CBA550038687FF801A5F427FF1300000CC3FFFFE",
INIT_10 => X"D2E2F30062FD1E304E0E7E808503037FF0380021B3DFF8FE7FFB8E2447FFFFCA",
INIT_11 => X"5E0D86C08288827FEC3840713463F9FE7FFBA73C25FFFFF60C38C0794DF1CFCF",
INIT_12 => X"E19840213BEDFFFE7FFC219E058FFFDEC07CC0713D6B6A7FBDFC300049DCCE6A",
INIT_13 => X"7FFFB880638FFFEB00F800219E06F39BFAB55000C09760E76CDE98C03431277F",
INIT_14 => X"00E000009F013766FC5C8830EF7F814EDD135AB1E020FF3FF040400096F6FFFE",
INIT_15 => X"FF469300CE69307FC0FB5FF8E0F5903FDE50400075D9FFFE7FFF184FEEFFFFFD",
INIT_16 => X"A116833FC1CCF81FD158C008502CFFFE3FFF989FFC7A3FFFF8E00000B7CF8003",
INIT_17 => X"D0D8C070F7F3FFFE7FFF0BDFFC3DDFFEF8C00000DFFFF813FDA54BE0871D5293",
INIT_18 => X"7F3EFCDFFF4C87FFAC000000AFC0E081FFC5C1F0054206EAAD14255F01DFF89F",
INIT_19 => X"A60000009F658091FB0E662302EEA6EA3C9E03380344618FB0ECE0F057FFFFFE",
INIT_1A => X"FBCF3F3703FD6F35C7C0C8C88420709F4824C0F0A7FFFFFE7F42722FF8300BFF",
INIT_1B => X"234C8910201A619F795840703FFFFFFE7F25F723F1F005FDCB8000005F7A1F18",
INIT_1C => X"B9E900E03FFF39FE7FE6FFC3F1F01EFDF8C0C0001F1891CBF4E7F9EF0138DE8F",
INIT_1D => X"7FF8749CF1FC70C1F96000009E1D5E23FEB7FCC1828BFF4753C1BD662482589F",
INIT_1E => X"FD0000029E8DE6BC7A87FF54C610CF44C47EC8C1FFEB14BFD9EC00847FFE7FFE",
INIT_1F => X"9477FE3EA4A8D5FDF01DD02FDBF6353E52DC00857FF8F8FE7FFCEE9188FFBCBF",
INIT_20 => X"101E0A5D69E9C17DBD56010AFFF8F8FE7FFF1FA8883F1AF0FE700000BF0E2CB8",
INIT_21 => X"FB86F3E2FFF5FCFE7FFFBF8E7E1E194FFEF00008978782E6E2B17F31BE8ED7CB",
INIT_22 => X"7FFFC400AECE1E991F3000003BDEA835DE833FBBFF03F4FF70EE3595090F317A",
INIT_23 => X"046F8000B3D8DF68C5154FCF9C0F2792B0710CA99F2AFB756EF23FF3FFCD69FE",
INIT_24 => X"1710D7F05E167787E12FD6C871ACA2EB3C35A7E1FF1F39FE7FFFD8461BECFFE5",
INIT_25 => X"11A7A5058C6018E6F62EB895FF032FFE7FFFED83E3E880FD9F4FE0C091F24FF6",
INIT_26 => X"BB5A2765FCBC05FE7FFFF67EEBC810FB2431FFE0D3F9BFF3678082FF161C388F",
INIT_27 => X"7FFFFEBFEC3287E541F63FF0D8FB87C26D024A7E03FF301F75EEDEA356D134D2",
INIT_28 => X"014B67CCDDF119DD00C0000F5ECC340F43FBF01C04E8582872752C07F114E0BE",
INIT_29 => X"01F00C83ABC06357BC7BDD75232FE256D36AEB67E3359AFE7FFFFEBFED867086",
INIT_2A => X"40311C60CD569350A01719B38FCF199E7FFFFFFFFF01C38C5FC483CCDBA0225C",
INIT_2B => X"55889D198C7F876E7F7FFFFFF894A3E87FDB78FCEA4E639400101575D663E1BE",
INIT_2C => X"7F19FBFFDE1D93935F187E20E3B598B34450C666D2FE0E7EAA25D5A21E109755",
INIT_2D => X"FF38470200FAA3F3C404FD79FCCE04FF48ABAE01E7BE0736F6F0E08032CF36EA",
INIT_2E => X"EE38EBC2AEFB81FC19D04FA2A53AEFB0BCD410B434850F067FF67DFFEFFBC825",
INIT_2F => X"04A99C96BDD0AFBE752168BC76044FF87FE61A5FFFFFA9F67FFDEF0F872D2B78",
INIT_30 => X"9E20E79DE2410FDC66FC3509BFFCAC68FFFF8F08C0DE0B96BFCEEC615A4687FC",
INIT_31 => X"0E3FA7E4AFC01475FFFFF598A5FEAC7E1FD50141E19257FC5C5319A5620D6FFE",
INIT_32 => X"FFFFFC91AC7EB5318D4591A77FC9B7FC789B05A38C1E6FE445EEE64D47A39FF6",
INIT_33 => X"EB42443B7EAAA7FDBA7EB66EE90E8FCF77B3A6CFD2E73FC607FFEE031F38AB3F",
INIT_34 => X"278FD0CC553F8FC875F652CB8BC17F0010EFE40E09778FFFFFF9FD69DD7FE6C4",
INIT_35 => X"EA5B982323C87EF23B5BFA29F95FFFFFFFF9FCBC4FC1E7FB204D47BE7F6FA3FD",
INIT_36 => X"7BD3FDB72343FFDFFFFFFEFEE5B9FBD75C4847113F1B49FB8BE00C19CABE4FD7",
INIT_37 => X"FFFFFF7EFCA5FC59984C81459FC559ED3DE4140BC7FECFEDA6DB28E33DC2FC8E",
INIT_38 => X"D80061C2A3F45B1F0E60510BA53E0FEA41C8A7708D58F97659B7FE9F086BFE1F",
INIT_39 => X"42C00967AEFF0FE5500F9F703F9DFBB870A7FF8780783FF7FFFFFFB3C1F3F97F",
INIT_3A => X"FE0A9DA24E80FA406731FFD818324EB7FFFF3FEB4967F0B7ED10E0062DF98007",
INIT_3B => X"7E693FF64F01AC0F7FFCFFC3AE15FCAFF75FE803F4F7A7777B2C71D7B37D1FF1",
INIT_3C => X"FFFDFFF3B58DFF47FC8F38001E77A2DCD7D41D6F8237BFF343147E2645CDF820",
INIT_3D => X"FB79D80016227ABD327F269FDB08BFF0022F914E8539F7B81767CFF64200FAD5",
WRITE_MODE_B => "WRITE_FIRST",
INIT_3E => X"6DBF599FF38EBFF291CE529E0553E8380D9B57F9E37A07293FFC7FFA795C7EDB",
SIM_COLLISION_CHECK => "NONE",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3F => X"6ED635BEA7F796F87F7E43FC78A58798EFFF1FFBBEAD7FE5FE07D8036F2113FA"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena,
ENB => BU2_N1,
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta9,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_10_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_11_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
SRVAL_A => X"0",
SRVAL_B => X"0",
INIT_00 => X"7FF981DEBFCB77E755FF9FF366DC3F79FE525803AB0FCAF5E921163FD349BFF2",
INIT_01 => X"1D7FCFF800590FE7FFF8D805E331CCEA4A22C87FEA3CFFF22E8D227E6E37667C",
INIT_02 => X"FF67D076DBB1CE148B1DD3FFE6747FF2D896CDFD6EAF604C7FFECDE7BFFDC8F8",
INIT_03 => X"0802A7FFE7F97FFAC29453FA9D5F330A7FFFD4FFEFFFF4FFCA1FC3F90D7B17CE",
INIT_04 => X"BB41C7F099DF0F087FFFFFFFDF5F963FEE27F8FCAF7A3BE1FFB8503C487E7F14",
INIT_05 => X"7FE7BFFFC75149807107FCFF7642C4FAFF9E9018FE85F1EC0582A7FFCC7A7FFA",
INIT_06 => X"8623FFFFA575A57A7FCC409A260C0CC80803AFFF8D76FFFE39AA0FF632BF1334",
INIT_07 => X"7FD0F07524EAF8180AFEAFFF3C30FFFE60AA9FFC1D7F83287EEBC6FFE3BD97FF",
INIT_08 => X"368EB7FDC258FFEE43439FE91C7C47F67C1CDA9FEA7F1E867394BFFFD236107F",
INIT_09 => X"67AD7FEE1EF9DFB44876F82AACBF291B5BC60FBFEBA561BD3FE5F5EC2D33F018",
INIT_0A => X"6604E01182FF8FFF3483A5CFF50F0BDD7FE4BFF8251CE418BD0EA7F62BC9FFE5",
INIT_0B => X"B180EE17FA43D2F07FE42720FC4E57982C00AFCA3A81FFE047327FE939F9CCE8",
INIT_0C => X"7FF8E51A3FFEA59B2E80CFDE86E3FFE0BDCFFFCFADF4AC3E38000107BFFEEFFF",
INIT_0D => X"5A005FAE27F3FFE0BD0EFFE5ADF760C0480001F01D88F3FFF463044BFED7C92C",
INIT_0E => X"5305FFD22BF3A12C400FFC78DECAA3FFFF778A93FFACFBEBBFFDFAEF3703D1B0",
INIT_0F => X"700007F80FFEEFFFFF5A78E5FFD6FFF94FFFF55DC16D0D30ADC19F38B067FFD1",
INIT_10 => X"FF8D3C4B7FF5F95777EFF79BDBDE856049018C4C5D673FAD327FFF39CFFA74D6",
INIT_11 => X"3807E9A627F93261638280D55E0FBFA53E0BFF4FFFEF4286626F800007809FFF",
INIT_12 => X"A7FCE4CF9E5FFFB14F8BFF45DFEB0F2E7FFFFFC004833FFFFFD87FAE8FF9C7EE",
INIT_13 => X"01E1FF6D3FEC0D4E7EFFFF0000FCFFFFFFFC187C5FFC023397DBE90271E84BE2",
INIT_14 => X"5EFF9300047E6BFFFFFEC0E83BFE208CAB1412D54F10F462B7F9FFF0549FFFB8",
INIT_15 => X"FFFC8441F27FB7DBB722676930639AB25E279E0F603FFF18510DFEB99FD54D9E",
INIT_16 => X"3F0DCFEA1B072E24A807BC2117BFFF583ADDFE981F937A7E63FF8100007973FF",
INIT_17 => X"183739FE567FFCB485BFFCF15F9787FC61FF8383E07B67FFFFFFE18876DFD6AF",
INIT_18 => X"B3BFFCD05FB6F3F823FFFF81F01DCBFFFFFFF9AF9DAFF42C2DE1C76804002214",
INIT_19 => X"100CFFC1600382BFFFFFFE661F39FC2DB54BF0084357C599587971FEFA7FFD74",
INIT_1A => X"FFFFFF9A726B7E3746679F89F3BAE56F20E985FE54FFFA6B2A3FFD1E5F6297FA",
INIT_1B => X"D4260094FA3B31BA60FE63FEE1FFF2D151DFF0FE3F078FF4501E7FC008C1FAFF",
INIT_1C => X"C0FBF3FEBFFFF6C3E7CFF2EBFF6F5FFE54E7FFE01FF8CB97FFFFFFC15BB35EBA",
INIT_1D => X"B7DFF36DFF023F8C210707C17FFE6DD03FFFFE3F202B0CEA4DBCE073280961A2",
INIT_1E => X"14BF1783F00F42019FFFFFFFAD200AFC0CE0FB751309CD058FF4DFFE6BFFF6AD",
INIT_1F => X"6FFFFFFFC60D55FA9B18F881BEA2DD05FEE2DFFFD7FFF2205FFFF7F53F15FF1E",
INIT_20 => X"165BFFC9BF16DDE7FFD27FFCA7FFF333AFFFE2E3FF07FE30746FE71E800F7F33",
INIT_21 => X"E70CDFFC17FFF99F6FFFE1B8FF97FCD0310F573C3F8875FFF43F3FFFFBA54674",
INIT_22 => X"CFFFCF8CFF2FFB204402EE61FF8A8A80CEA3FE9FF9D2184C9CBFFFF0E20ACCE5",
INIT_23 => X"24001E61DFB7EC5CAB4F0FD7FC4E975001AFF8A8157B804BEC6C5EFD2FFFF882",
INIT_24 => X"07DAEFA7FF95B1AEED6FFBF2F06F219BE8CE3EFDAFFFF9FF1FFFD18FFCF7FA8C",
INIT_25 => X"E637FC5BB16EE1FBA8F93FFAAFFFFBFE7FFF938AF1EFF36C31C21E788E60D718",
INIT_26 => X"CC19B7F4CFFFF9F87FFF1E60CC9FD044700ADF3ECEE064907F01A4ABFFED8959",
INIT_27 => X"FFFE05BB26BF3F9270032B1E3810002A3F0F9D9C3FF12F77811AFF2F3989E1BC",
INIT_28 => X"7F81C9C713070A778007ED83C7FF20CA3E88FFEFE5F923A839D9C7EEDFFFF9C1",
INIT_29 => X"C00F09C7BBFFEEBCD4C1CFFFE3F5A3ACC3BBFF1DCFFFF807FFFE97DD51BF1C5E",
INIT_2A => X"259001FF8DE1A34A3FE7FFA3AFFFF81FFFFD08112DBFAABE7FF819C74CD7626C",
INIT_2B => X"0F38FE5B2FFFF0FFFFF0941E21BA22FE003C19CF7C9887FEC00819F241FFF263",
INIT_2C => X"FFF341C29EB82FFE7FCFFF8F1F492E7480023C3D68FFFB3802BF7EFC0CFE21A2",
INIT_2D => X"78E7FE0F0EC71FBF001BEC06153FFEE33D1646FC6FD020B705BCFEAF27FFE0FF",
INIT_2E => X"FEBFF820B68EFFA73FFE5A7AFE137D5690B2FDCF6FFFE3FFFFE59AAE61FFDFFE",
INIT_2F => X"A09921FBFC4F287D18C279356FFFC7FFFFCEC9AE70E7FFFE7838003F67D9A47D",
INIT_30 => X"9F335A07EFFFC7FFFFCBE9DA0E0FFFFE703C003E634ACD7EFFE2CE0478A83FD5",
INIT_31 => X"FFCBE9E73F9FFF823F3FFE7E02E6BF0AC7F12C3FFD3F1FED290B9AA8FCDA6F40",
INIT_32 => X"03FF7FFF8301050C9BD2D65FFFCF1FE183D8044E71F0BF3AB6F7FAFEEFFFC7FF",
INIT_33 => X"D926D62903B57FFE86B5A617F16D7F394FDFA042EFFFFFFFFF80BBFFFFFFF9C0",
INIT_34 => X"0D29C0A89F4DFF99AC2FEFE29FFE3FFFFF8CF3FFC3FFE632783E1E07C7367FE0",
INIT_35 => X"5DB3FF5D5FFDBFFFFE9F27FFC1FFC9DA3F1C1EF17F2AFBE2FE124E0F07E2BFFF",
INIT_36 => X"FCFC87FFE1FE346A11D81E700F36CAF27E1D5F800FFBFFFFFAA532213417FBDF",
INIT_37 => X"4A480F80007A7707801D618003606FFFF90A225D89227A2B857E0D64DFFDBFFF",
INIT_38 => X"195F2611700073C7FE02FE6C1E40FBBA4FAEE4255FF9BFFFF8A73FFFFFFCD336",
INIT_39 => X"0FEEFE203F789A420808510DBFF77FFFE1367FFFFFF1B05625C80000720DF83C",
INIT_3A => X"87164E8DBFE2FFFFD000FFFFFFC77F2606D800FF931BF9C26E190847F0002780",
INIT_3B => X"59FFFFFFFFCEE38E773301FF93233F90E263DADBCEF1CE000FE7FE00FF18BA71",
INIT_3C => X"006300FF133F0097F9A503E7FFFA340C77D5FC011FB724909DF8280DBF91FFFF",
INIT_3D => X"FE3322B00DF50C7277D0FC0F3FAF74CF6B94932FFF37FFFED17FFFFFFF9089FE",
WRITE_MODE_B => "WRITE_FIRST",
INIT_3E => X"4FEDF07FFFB7033F07A217C87E8FFFF388FFFFFFFF2337FE03C7001C5CA7FF9F",
SIM_COLLISION_CHECK => "NONE",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3F => X"379FAFC87CBFFFCDE9FFFFFFFF20EFFE7E070000FDA7FFFFFF8D870FCA4F2B72"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena0,
ENB => BU2_doutb(0),
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta10,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_11_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_12_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
SRVAL_A => X"0",
SRVAL_B => X"0",
INIT_00 => X"B9FFFFFFFE3B9FFE60020000B6BFFFFFFFF1297902D0800107E1E07C3F87D86F",
INIT_01 => X"4000000117BFFFFFFFFE3A000E3F0000BDD1807D30779BE67B7E5E4FBCD3FFAD",
INIT_02 => X"FFFFFFFFF1F85506E2B0003D308F85F6FB100406BF0FFE7791FFFFFF80067FFE",
INIT_03 => X"7F88003F70FDF11A7A0164ECFFA7FD66A7FFFFFF0001FFFE0000010F077FFFFF",
INIT_04 => X"FD6635F0748FF27B9FFFFFFC007FFFFC400000FEE3FFFFFFFFFFFFFFFC38A306",
INIT_05 => X"7FFFFFC003FFFE787F0600F9F39FFFFFFFFFFFFFFFFFE167F81C001E521C7BDD",
INIT_06 => X"7FFF07E1E31FFFFFFFFFFFFFFFFFFD82703F001EB27E9F77F9A503F73C7FE6EB",
INIT_07 => X"803FFFFFFFFFFDA1F01F000F20CCFF22BCA4E7F322FF0FEAFFFFFF807FFFFC32",
INIT_08 => X"3C078007C099BE5DF8AA05DDBA7F20C9FFFFFF1EFFFFFC3878FF0700381FFFFF",
INIT_09 => X"74BA4B9DDEF49457FFFFFC3EFFFFFC34201F0E81FB1FFFFFE01F01807FFFFC57",
INIT_0A => X"FFFFF006FFFF03C6601F7D78A79FFFFEFA10F00F0FFFFF8D1C078300C0F4D898",
INIT_0B => X"001E3A3668B3FFFE0A78E03F0C00FFE9EE0787F840D7EE19FD7AC39DB4484D6F",
INIT_0C => X"0CD698026338FFE0641FFECE01E6761F7811FC037E11AB7FFFFFC01DFFFF4108",
INIT_0D => X"CBFFFE0781F1B482B082F10B5FFAA9FFFFFFC0FFFFFC3312700F079D111FB0D0",
INIT_0E => X"AA85F53A5B96B7FFFFFFFFFFFFFB3CE2380310D4BDFE20E9017E5FFF19993FF1",
INIT_0F => X"FFEFFFFFFFF9F84C300067BF7CCF67F4003B83009C8D6FC1F5FFBF0783C561F0",
INIT_10 => X"70302FFEBFC3DF08700427FF76F89081E99FFFFE03A261F0F9DC17CDC57A67FF",
INIT_11 => X"000F01CC0C1F980FEFFFFFF00736833DFDFE57B275D88FFFFCCBFFFFFFF80178",
INIT_12 => X"EC7FFFE00724D7F841FAE092838FFFF8B8F3FFFFFFF301D0607F7F7DAD410570",
INIT_13 => X"8198E03058A1FFE238FFFFFFFF013F5E41F17DD66280040003FF1D6E180031FF",
INIT_14 => X"1BEFFFFFFE00E23C79C4FC0798389F007FFFAD1E783E0FFFDC3FFF8207346B2C",
INIT_15 => X"7F07ED37E27C1F00FFEADE011FFFFFFFEE7FFF0F0FBF6BF9E198672E7647FF81",
INIT_16 => X"0CFCFC01FFFFFFFFF8B6FF390FA9FBEFDF819B1CD93FFDBFFFFFFFFFF8795C42",
INIT_17 => X"381EFF368F674212AFA3D60B263FFB7FFF9FFFFFF80DAEC638AFE1E9FC7DFFF0",
INIT_18 => X"1F66A812B1F3CEFFFFDFFFFFF8E97C32177F0F0F007CF8083AAF03FFFFFFFC07",
INIT_19 => X"FD3FFFFFF35423887FFF58E000001FF9253FFFFFFFFFC307F816FF169EE6845B",
INIT_1A => X"7FC79BE7800061C69FFFFFFFFFFF3A058C00FF18FB499B695DF4024BDFFCF5FF",
INIT_1B => X"FFFFFFFF8FFF367745C07F8FF9974AA3D9D4E6913FDDE3FFF9FFFFFFF5622BCA",
INIT_1C => X"BD6177C7F3319C631174E1D5FFEDE4DFEFFFFFFFE94BB8107FEF7BC98000A3DF",
INIT_1D => X"1036C5A7FFF46C5D83FFFFFFA50B5C067FFF30118200A07FFFFFFFFF9FF1693C",
INIT_1E => X"0FFFFFF85C86F8267FF4F0E1800019FFFFFFFFFFF8E2167FFC60FFE3FEEC6B7E",
INIT_1F => X"7FE48FCE87FFDBFFFFFFF8D11C9DDB9BFE616BE0FFD9C066982C1E9FFFFAF9D6",
INIT_20 => X"FFFFF4384E02EEB3FDA380C04338FEE1570EB8FFFFFA24BDCFFFFE15BF05E492",
INIT_21 => X"F201C0803100C5A6435AEDFFFFFF0E1D0FFFC36C2615C5A07FEBFFD912F4F1FF",
INIT_22 => X"C61363FFF3001E5AFFCD3BE0A21F7D787FB760314D8FFFFFFFFFE99DAC0CEECF",
INIT_23 => X"FF2332042CE33DF07F870030125FFFFFFFFFD3F340F3393FEA75B9FF49196B36",
INIT_24 => X"7E070030F3FBFFFFFFFF80FBFCF3F63FD3C678FFC83911963C2227FED4438CFF",
INIT_25 => X"FFFFEB1473CC387FB98F701FD2B6DF943C5ECBFACFD5AFFFFED3E075EE7FEEEE",
INIT_26 => X"A3BC2FC604563FB3B89A8FF00FF7E2FFE0A879B5219C0FD8711500307FEFFFFF",
INIT_27 => X"FB040FF2267FE8FEFCD7353380310F96605A00333FFF57D7E7FFE1EF8F5CC2FF",
INIT_28 => X"7E6F0B0FE780CB26652B0707BFE948A7FFFF9C170698BFF1B8FFD53031707F42",
INIT_29 => X"6AF43F5FFFF170E3FEFFB76FF3E67FE991F75791C0E87EE39B067FD202FFFEF1",
INIT_2A => X"FFBE666F1E0AFFD74FCCCDB19A10FC43B9937F7623FFFF849680AA3FFFFECF4E",
INIT_2B => X"DF2FD87045A4FC2F19C5FFFDFBFFFF197800CC7FFFFF4E9E18E9F16FFFC1727D",
INIT_2C => X"B8E2D8D2C7FFC0C8B01050FFFFFF613C6FF4BBDBFE6F7889417587CDFB93FFA7",
INIT_2D => X"27F9C7FFFFFF3B780FDCBDE7F6630C185C8C27D24DC7FFB31EA1DB045982B2C1",
INIT_2E => X"525B1B32771C9C17E2307FC0AACFFE5C3F5399FE33F5C390E359C9BFFFFC3C27",
INIT_2F => X"198041D0994FF325FDB39BFEABE40E78CC200BB7FFF18331360FC7FFFFFF9CFA",
INIT_30 => X"7AA187F92A39BC9E181893FFFFE2FB0153041FFFFFFFC1F405981EF3B9189C78",
INIT_31 => X"738CBBFFFF999BC763265FFFFFFFE3F441D82EE4D7FF1AF0E6C03E3CAD3FED46",
INIT_32 => X"A7B3BFFFFF1FF7F44AFD1BC4D9C0354BC8E1B1946BFFE54A724A2F669EE09C4E",
INIT_33 => X"67FE83B1F0C0DA471C06258555FFD91764E8C26F171303CCE3CD1FFFFF472F4F",
INIT_34 => X"3398BFC7CFFFF17BA3EEF265A433FA1210E5B007F97076C5C9CCFFFFFF00FFE4",
INIT_35 => X"B39EDE60B2E555660025AFC01D271C1385987FFFFCFCFFEC67FFE64720E6B39E",
INIT_36 => X"0071C864C1753C573A880FFFFDC71FE81FFFFC2E2047307001F0FFF9CFFF9637",
INIT_37 => X"DF4E4FFFF900E0CA1F2BFECE30CBFAE00388FFFAE7FE836FF47EA860F33A8CCC",
INIT_38 => X"6E4FACCC3310E8E0FC47FFF807F9721FFBBE0FC649038DD800F10BDF448D80C8",
INIT_39 => X"804FFFFFE7F505DFFC7DEB06D5D7839800F4CE08B8A03FC7DF8257FFF33F1E16",
INIT_3A => X"FFFCF5C79AB66F98007DD5A8D6F27FB22FC57FFFF33F03E65FB4D6987F3FE9E1",
INIT_3B => X"007D6D8F8328FFA8D9C9EFFFFB3FFE0E1F7DD5B0FE67C7EF239FFFFFFFF60ABF",
INIT_3C => X"3D14CFF7C11FC1D807B03620F8DFBFFE953FFFFFFFEFB4FFFFF0C047B52C2F8C",
INIT_3D => X"1DE3BCC7035F9CF8FE7FFFFFFFD661FFFFE71DA654117E8E06616FFFD7FCFF8C",
WRITE_MODE_B => "WRITE_FIRST",
INIT_3E => X"BFFFFFFFFF7E8DFFFFFA366CDA8F7AEE3F0327FFCBFDFFE7FF13FFE729BFDED0",
SIM_COLLISION_CHECK => "NONE",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3F => X"FFD5EEEDF7D6DFE61FC3B9FFEFDBBFF17F00F7AF299E5B145CD7F98F82BF5FE7"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena1_2,
ENB => BU2_doutb(0),
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta11,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_12_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_13_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
SRVAL_A => X"0",
SRVAL_B => X"0",
INIT_00 => X"1B7B7C7FE7E67F8807CCE0B0119C768C102FF382361EBF0CFFFFFFFFFEBE23FF",
INIT_01 => X"07FED3E8131C6AF277D9C3807218F837FFFFFFFF7E72FFFFFFCD5E23B45AA3E4",
INIT_02 => X"72F9C3013293F02BBFFFFFFFFDA767FFFFE357A3CC5C337A33BAB81FBFFE7D50",
INIT_03 => X"FFFFFFFFE3CDDFFFE7ADB742D3C06165103AB6E0E4FF360003FAD8A3361CCC70",
INIT_04 => X"E7F767078FB631CD95BBDF7C2C7C1580010C034F3819E1D8758DE3FD5EF0F315",
INIT_05 => X"8B3FECE4F87EEE3C000FA49CC3F3E6E4656BC0FB9E8BCC73FFFC7FFFEDFD5FFF",
INIT_06 => X"401990E1BF60EFB462A7E006FEE223FFFFFC3FFFDBC21FFFE7E5EFCC28990C89",
INIT_07 => X"635CC009820C77FFFFF9BFFF97CB7FEFFF9B7F03192E028F84BF81E59CFEC1F4",
INIT_08 => X"FFFB3FFFD75EFFFFFF79EFDA1CFA7E57220D3D1D0306EB58871BBE399B81044E",
INIT_09 => X"FE368FF291787631A11BDB310FC34BFECE25FE3CF3CF1F707CE40094267D3FFF",
INIT_0A => X"01245F8607C77FFF373F74FCF418C30870346FBAF6CA7FFFF9D17FFEB5F9FFFF",
INIT_0B => X"C73F78FCF7079FFE7F87FE7F6FEEFFFFF34BFFFFC321FFFFFEC59F56A17C13F7",
INIT_0C => X"7FE3E2437ADE7FFFFA07FFFC8043FFFFFE143FE593FA7C711376A3F0000DEBFC",
INIT_0D => X"ACC0FFF00007FFFFF98B7FDE9E5944FE324133C0031BE5FFD7AB75F879FF1FFC",
INIT_0E => X"F1C1FFA46CD051FAF068EBC38037F7FFFFB428FC7FFF3FC27F60A541B835FFFF",
INIT_0F => X"50199086FC2FB4FF8E6F46F8DFFFFC8C7FC05FCB63E3FFFFEA8DFFF161D7FFFF",
INIT_10 => X"BC70A9709FFFF8047F7B79F870FBFFFF5387FFFF23FFFFFFF200FFB8D24D15F4",
INIT_11 => X"719D7E7C7F87FFFDA10BFFDEE47FFFFFF2D2FFE13C5A8FF1DB003783FBDE2CFF",
INIT_12 => X"86AFF3D9C7FFFFFFF872FFA2563247F698E36DE81CFD7DFDFC4D3330FE9FFECC",
INIT_13 => X"F9CDFE69EA4347F411B7F7FF06BEF2F14EB1CB20FC057F007699FEFFFFD183F8",
INIT_14 => X"F35FFD7F031E991F9CAE306038C077F07B9BF0FFFFC605FC7E47FF2381FFFFFF",
INIT_15 => X"FE90FFFE1E04E7CC7B0F963FFF970B83F8EFAE6707FFFFFFFA107E30225687F9",
INIT_16 => X"7DEFDABFFE6282E7F87F3CE605FFFFFFFB837EB43381EBFAF0D7FC7F206FA448",
INIT_17 => X"FBBF2786AFFFFFFFFACBFC7426A99BFCF123FEBF80B7AC80ED9B1E3F0E1FCDF0",
INIT_18 => X"F9EBFEC8E5D2EBFD7105FABC8107F01043A5DB3CCC1F0DFC7F1FF2FFFCCDCFEC",
INIT_19 => X"344BFA2EE381FD7341AA329B661EC0007FFFFFFFFDCDFFC46F7FBC0097FFFF7F",
INIT_1A => X"1277C2581BE647527FFC7FFFF837FF0E5FFE60018DFFDB7FFFFBFB44DB6FCFFF",
INIT_1B => X"3FF8FFFFFC0D071F1FFB8FC27FFFCEFFF4E3F70DE6144AFED038FFC7E7CBFFFF",
INIT_1C => X"5FFA87EE7FFFE4FFFBBFFEE65DF29DFF7209FEA30470FFFFDBF02994E81D07E0",
INIT_1D => X"F13FF972601F1BFFEF99FEE002EA6F8FEE407A649E71FF8E7FFFFFFFF8DB6F0E",
INIT_1E => X"2F90FEB00FD0AFDFFC1E0F8107C69FCE7FFFFFFFFE7D3980DFE5071E7FF9D0FF",
INIT_1F => X"FE3F008F44725FCC7FFFFFFFFFFE0B85BFF10F03FFF62BFFE17FF9E8095F33FF",
INIT_20 => X"7FFFFFFFFF24D31CFFB9040BFFEDDFFFEC7FF9BECA60B2FF4D92FCA30FC49FFF",
INIT_21 => X"FF9B0051FFE8B3FFCE7FFC750F8BA1FF0805FCF903F7C7FFFE3D004DE08B67E6",
INIT_22 => X"F53FF093B9CFC7FFDE117AF9E2F3CBFFF660F37CCA6416667F7FFFFCBF41C3E4",
INIT_23 => X"E20786BF05B983FFEFC0F37FFD0896167F9FFFFBBE3FE7E7FCC6003FFFD1E5FF",
INIT_24 => X"FA001B9FFFC7DA967FDFFFF907FF5475FD3C00C7FFC1C7FF993FF7B87B3381FF",
INIT_25 => X"7FFFFFFF779ECBA5B8FDC01FFFC7CBFFAAFFDDC559EFE1FFF70C883E823FC77F",
INIT_26 => X"F9886A2FFF8FE3FF42FFDDDFA8FFC5FFF7068E6F83FEF35BFBFD1069FFFFE534",
INIT_27 => X"857FD0BC851FE2FFFF62B037C6DB7B4BFDFE065EFFFFF4EC7FFFFFFECF53DDFD",
INIT_28 => X"FB632EB3E155FA2FFF368BB4BFFFFB327FFFFFFEFF01AFFBC580069FFF18D7FF",
INIT_29 => X"FFD76F33FFFFFC867FFFCCBFA745FBCFA1B9C6BFFFF057FFADFF2E34BB0F82FF",
INIT_2A => X"7FFFE7BF880A7C6704BDB3CFFFB0D7FF63FF18F19817907FFE85E603B13DBD3B",
INIT_2B => X"C28909CFFE7BAFFEEBFDABD29803F1BFFF5334E3C8219D31FFFFF607FFFFFF3E",
INIT_2C => X"A7FCD8D3086BF09FFFD11723FC118F8FFFFFF246BFFFFFFE7FFFE6FF5547BB1E",
INIT_2D => X"BF0143DFFDFBA6FD7FFFE7ECFFFFFFFE7FFFF3FC1358FCF67EC711BFFFBF4FFE",
INIT_2E => X"FFFFB6F83FFFFFFE7FFFFFFCF1F47DC73778117FFCFF5FFDA7F5432B0B49B8BF",
INIT_2F => X"7FFF7FFFFFFA754BED87D7FFFFFF3FF477EAA918F4BD3F7FBE705E03FE371FA4",
INIT_30 => X"C201FBFFFFFAFFF9D7D793276C9F9E7FFF68FA03FF817FB5FFFF886A3FFFFFFE",
INIT_31 => X"DE1FB45A1FDFBE417E481003FFA57FCA7FFFD4A45FFFFFFE7FFFFFFFFEDFE597",
INIT_32 => X"CE8C5429FF801FF3DFFFE862CFFFFFFE7FFFFFFFFEEFD6E8F9F0AFFFE3FB7FFD",
INIT_33 => X"BBFFFBC100FFFFFE7FFFFFFFFF73BDF74EE09FFFA7FCFFFB563FCC224F97BE8C",
INIT_34 => X"7FFFFFFFFFBB03F99A81F7FF5FFDFFF1E4BFAF22638AFA7793FE5D1FFFFD8FFD",
INIT_35 => X"7B9CDFFF1BFFFFF3067DCDE2600E3849F25CFCB3FFC73FF903FFFE512C7FFFFE",
INIT_36 => X"617A03466D14C845FD4C7DC7FF0B47FE23FFFF95FB1FFFFE7FFFFFFF3FE04FFE",
INIT_37 => X"B94C752BFF8A93FF83FFFFC55B67FF7E7FFFFFFF3FE3BFFC7A72BFFCBFF0FFE3",
INIT_38 => X"93E0FFE10358FF0E7FFFFFFFFFEE3FFC59C21EDA3FC9FFEE5FFC87EEAC1C40D5",
INIT_39 => X"7FFFFFFFFEDE7FFF98367E953BDA7FD09FF889FCC51800EBFC8C8133FF7861FF",
INIT_3A => X"10197F6E9F83FFAC8FF897F8A03823C13EA5CA9DFF3D10FFC3CC7FFC5C4B8612",
INIT_3B => X"DFF8D5F25678E3817EFFE1C2FFFED27FFB8FBFFFE7900CA07FFFFFFFFF8BFFFF",
INIT_3C => X"FF8FE08CFFFF55BFF338DFFFF9410E227FFFFFFFFF35FFFE64FCFF250705FFE4",
INIT_3D => X"FC971FFFFE63652A7FFFFFFFFEE7FFFFEDDDFE354003FFC47FFAD9FB0FF9C38F",
WRITE_MODE_B => "WRITE_FIRST",
INIT_3E => X"7FFFFFFFFBC3FFFFCB09FFFAE005FFA2F7F0FDFB6FF4E78E3F89E0F6D7FF953F",
SIM_COLLISION_CHECK => "NONE",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3F => X"9228FFEEF80BFF31FFE857C37BF6FF8E7FD8CF7243FFF15FF917DFFFFF6C5FCC"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena12,
ENB => BU2_doutb(0),
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta12,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_13_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_14_ram_r_v2_init_ram_dp2x2_ram : RAMB16_S2_S2
generic map(
SRVAL_A => X"0",
SRVAL_B => X"0",
INIT_00 => X"FEAA56FFFFFFFFFFFFFFE5243C000C003FFFFFFFFFFFFFFFFE55407FFFFFFFFF",
INIT_01 => X"FFFFFC4304FFE36D6C25556A54156A543FFFFF1A5BFF2942282FFFFFFD3EC6FF",
INIT_02 => X"3FFFFFFFFFFFBFFFF95501BFFFFFFFFF9003FA4EFFFFF755FFC000BBFFFFF9BF",
INIT_03 => X"4FFFFFD8AAC0C650D43FFFFFFF9301BFFA56ABFFFFFFFFFFFFFFFA4E01A50C30",
INIT_04 => X"A500A95EFFFFDE553FF0018BFFFF99EBFFFFF64F1EFE9834EAF9555554056A54",
INIT_05 => X"FE95ABFFFFFFFFFFFFFFFFE495AF91303FFFFFFFFFFEAAAAA95516FFFFFFFFFF",
INIT_06 => X"FFFFE80F23FFE6FF75B95555540555505FFFFFFC7AC0F690B2EFFFFFFFF9557F",
INIT_07 => X"3FFFFFFFFFFA55AAA9501BFFFFFFFFFEAA40FA9EFFFFC55003FF16C7FFFF4ACF",
INIT_08 => X"5FFFFFFFB2FFF194B99FFFFFFFFFFEBFFFAAAABFFFFFFFFFFFFFFFFA34066A4C",
INIT_09 => X"554FE962FFFE894150FF044CBFFFFAFFFFFF64FF1FFFFFBFDD69A95A54005540",
INIT_0A => X"FFEAAABFFEBFFFFFFFFFFFFE4DFF0A403FFFFFFFFFAA5556A5506FFFFEAFFFFD",
INIT_0B => X"FFFDD0FF6FFFF3BFF65AAA555400100F5FFFFFFFECFC0155AADFFFFFFFFFFFFF",
INIT_0C => X"3FFFFFFFFEAA555695006FFFFEAFFFFE554FEAB7FFFD3541A43FC9DF2FFE297F",
INIT_0D => X"4FFFFFFFF6FC50555ADFFFFFFFFFFFFFFFAAAABFFFBFFFFFFFFFFFFF934EB654",
INIT_0E => X"550FE72BFFF65501540FCFF46FFFD0FFFFF340F0FFFFF3BFFC46A9555000000F",
INIT_0F => X"FFFAAABFFFBFFFFFFFFFFFFFE427AC583FFFFFFFFEAAAAA55405BFFFFFBFFFFE",
INIT_10 => X"FF8900313FFFFFBFFD8555554000003F27FFFFFFFDBD55551B1BFFFFFFFFFABF",
INIT_11 => X"3FFFFFFFAAA5AAE94006AFFFFFFFFFFE553EA87FFF88000154030AFFFFF9FFFF",
INIT_12 => X"1EFFFFFFFF1C55155B5BFFFFFFFFE56FFFFEAABFFFFFFFFFFFFFFFFFFA49FFC4",
INIT_13 => X"903AB1BFF740000155000AFFFFF3ABFFFF6140017FFFFFBFFE2555550000003F",
INIT_14 => X"AFFF9ABFFFFFFFFFFFFFFFFFFE4F4FFC3FFFFFFFAA956AA50F16ABFFFFFFFFFF",
INIT_15 => X"FFA00306BFFFEABFFF8955540000103C59FFFFFFFFBF5405586BFFFFFFFFE56A",
INIT_16 => X"3FFFFFFEA9556AA43F056BFFFFFFFFFF903AC6AFFDFFF05555400FFFFFEACFFF",
INIT_17 => X"58FFFFFFFFC70405186BFFFFFFFFFAAAAFFF95AFFFFFFFFFFFFFFFFFFF80E4E8",
INIT_18 => X"903AC6BFED0FFC15554013FFFFDE2FFFFFB40007BFFFD6BFFFF2555400001430",
INIT_19 => X"AFFF506FFFFFFFFFFFFFFFFFFFA439EC3FFFFFFE55415550FC05ABFFFFFFFFFF",
INIT_1A => X"FF651047BFFFD1AFFFFB00154000140058BFFFFFFFEBC554076ABFFFFFFFFFFE",
INIT_1B => X"3FFFFFF940001543BC05AFFFFFFFFFFE8C3AF1BFECFFF015555057FFFFCBFFFF",
INIT_1C => X"2DFFFFFFFFF1F654C7156BFFFFFFFFFFAFFE901AFFFFFFFFFFFFFFFFFFF90E40",
INIT_1D => X"4FFFC6FFD83FF055550567FFFF9B7FFFFF654108FFFFE9AFFFFD400450015001",
INIT_1E => X"FFFF8306AFFFFFFFFFFFFFFFFFFA54E83FFFFFE900FC000FBC05AFFFFFFFFFFE",
INIT_1F => X"FDD5555EFFFF5A6FFFFE900550155515B2FFFFFFFFF7F2A40B1406FFFFFFFFFF",
INIT_20 => X"3FFFFFA503FC50FAB056BFFFFFFFFFFE7FFF1BFFD800C05555042BFFFF087FFF",
INIT_21 => X"86FFFFFFFFF97D955B13B2FFFFFFFFFFFFFE40056AFFFAFFFFFFFFFFFFFE990C",
INIT_22 => X"3FEF6FFFE800055555003FFFFDAABFFFF645157BFFFF3A6FFFFFD0055419695A",
INIT_23 => X"FFFA900055ABEAAFFFFFFFFFFFFFAA503FFFFA5403BC53AAB15ABFFFFFFFFFFA",
INIT_24 => X"ED05158FFFFFABAFFFFF2005656FAA5A81FFFFFFFFFECC945B0362FFFFFFFFFF",
INIT_25 => X"3FFFF9400FF003AAF16ABFFFFFFFFFE9FFAC6FFFFD10155954003FFFFB1FFFFF",
INIT_26 => X"01BFFFFFFFFE5C545B0F61FFFFFFFFFFFFEA95505556AAABFFFFFFFFFFFFFFA4",
INIT_27 => X"FEAC6FFFF155556A540327FFE1DFFFFFED0415AFFFFFABBFFFFFB55665753FEB",
INIT_28 => X"FFAAA554000556AAFFFFFFFFFFFFFFE83FFFF9000F003FAAC16AFFFFFFFFFFA5",
INIT_29 => X"741051FFFFFE6BFFFFFFDD15A986403C01BFFFFFFFFEB55516CE61BFFFFFFFFF",
INIT_2A => X"3FFFE90F3C103FEA015BFFFFFFFFFE94FEAD6FFFDD16AABE540FCEFFD8EFFFFD",
INIT_2B => X"0046FFFFFFFF9E5945BE62FFFFFFFFFFFA9AAA54000016AAFFFFFFFFFFFFFFFC",
INIT_2C => X"FAB1AFFF495BFF0E940FFAFFD830BFFB9005553FFFFE2B3FFFFFF7A9A9B6814C",
INIT_2D => X"FAAAAAA5300006AAAFFFFFFFFFFFFFFC3FFFE93F3C13FEABC05BFFFFFFFFFE50",
INIT_2E => X"9501553FFFFE283FFFFFFE4DA9A19540052BFFFFFFFFA71555BA62FFFFFFFFFF",
INIT_2F => X"3FFFE43FFC03FEAF006FFFFFFFFFFA43FAB16FFF4A9C004E940F3AFFD9446FFF",
INIT_30 => X"052BFFFFFFFFF882A56921FFFFFFFFFFFFFA556A5400C16AABFFFFFFFFFFFFFC",
INIT_31 => X"FE6C2FFE53B50003A43C1FFF9D1B06FDA40017BFFFFCEB3FFFFFFFD3FFED5404",
INIT_32 => X"FFF9555A9543C15AAABFFFFFFFFFFFFC3FFFA4FAF00FE9ACF1BFFFFFFFFFFA4F",
INIT_33 => X"900018BFFFFFEBFFFFFFFFE0F0FC54150642FFFFFFFFFDD1B95562BFFFFFFFFF",
INIT_34 => X"3FFF94FEF0FFA5ACC1BFFFFFFFFFFA4EFA6B1FF94F890FC3E43C67FF791BADF7",
INIT_35 => X"47DBFFFFFFFFFE74A90476FFFFFFFFFFFFF95015554E005AAABFFFFFFFFFFFFC",
INIT_36 => X"3AABC6A40FD9000538004BFE791A5D9D40F05B7FFFFAAAAFFFFFFFE404FC555B",
INIT_37 => X"FFFA5001550E0016AABFFFFFFFFFFFFC3FFF943FFFEA95BC06FFFFFFFFFFFA4F",
INIT_38 => X"0FFC56EFFFF5AA6FFFFFFFF954FC156F97EFFFFFFFFFFF886900B6FFFFFFFFFF",
INIT_39 => X"3FFE500FFEAAAABC16FFFFFFFFFFFA4F3F95ADA95328555A9D56DFFE795A6125",
INIT_3A => X"D5AFFFFFFFFFFFDDAD0062FFFFFFFFFFFFFE53FC15400055AABFFFFFFFFFFFFC",
INIT_3B => X"FF935DBEA4785A5A9EA2FFFE2656B1D53FFC5B2FFFFFAA1FFFFFFFF904FC5AAB",
INIT_3C => X"FFFE93FF155501556ABFFFFFFFFFFFFC3FFA503FAAAAAAFC5BFFFFFFFFFFF94F",
INIT_3D => X"3FFC1DBFFFD6AE0BFFFFFFE2B101AFABE06FFFFFFFFFFFE759401DFFFFFFFFFF",
WRITE_MODE_B => "WRITE_FIRST",
INIT_3E => X"3FE903FAAAAABFF06FFFFFFFFFFFF94EBFE019FFF5B96AA50EBBFFFEE65AF625",
SIM_COLLISION_CHECK => "NONE",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3F => X"F5BFFFFFFFFFFFF9514118BFFFFFFFFFFFFF93EB015515555AAFFFFFFFFFFFFC"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena13,
ENB => BU2_doutb(0),
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(1) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(1) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(1) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta13(1),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta13(0),
DOB(1) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_14_ram_r_v2_init_ram_dp2x2_ram_DOB_1_UNCONNECTED,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_14_ram_r_v2_init_ram_dp2x2_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_15_ram_r_v2_init_ram_dp4x4_ram : RAMB16_S4_S4
generic map(
SRVAL_A => X"0",
SRVAL_B => X"0",
INIT_00 => X"8777777889ACFFFFFEFFEC8777877ADFFFFFFFFFFFFFFEB99ACDDDDEEEFFFEEF",
INIT_01 => X"ABCCCCAA99BEFFFFFFEDFFEDEEEFFFEDCCCBCCEFFFFFFFFFCA9999ABBCDEDBA9",
INIT_02 => X"4FFFEEDDDCCBBAAABAA99AAAABBBBBCDEFFFFFFFFFFFFFFFFFFFFFFFFFEDCCBA",
INIT_03 => X"FFFFFFFFEDCCBAAACCCCCCCCDDDDDDDDDDDEEEFFFFFFFFFFFFFFFFFFFFFFFFF4",
INIT_04 => X"FFFEFFFFFFFFFFFFFFFFFFFFFFFFFFEDB989988999ACEFFFFFFFFFFFFFFFFFFF",
INIT_05 => X"87667778999BEFEEEEFEDB77889769DEFFFFFFFFFFFFFFCA9ABDEDDEEFFFFFFF",
INIT_06 => X"ABCCDDCBBBCEFFFFFFEDFFEEEEEFFFEDCCDDDDEFFFFFFFFFDB9988ABCDEFDAA9",
INIT_07 => X"4FFEEEDDDCCBAAAABA9999AAABBBBCCDEFFFFFFFFFFFFFFFFFFFFFFFFFEDCCB9",
INIT_08 => X"FFFFFFFFFEDCBBAABCCCCCCCCCCCCDDDDDDDDEFFFFFFFFFFFFFFFFFFFFFFFFF4",
INIT_09 => X"EFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEDBA9998889ADFFFFFFFFFFFFFFFFFFFF",
INIT_0A => X"877767889A9ADECCCDEDB989999878CFFFFFFFFEFFFFFFEDCBCDDCDDDDEFFFFF",
INIT_0B => X"AACCDEEEDCDFEFFFFFFEEEEDDEEEFFEDDEDDDDEFFFFFFFFEDBA988ACCDFFDBA9",
INIT_0C => X"4EEEEEDDDCCCBAAA9A9999ABBBBBCDDEFFFFFFFFFFFFFFFFFFFFFFFFFEDDCBA9",
INIT_0D => X"FFFFFFFFFEDCCBBBBCCCCCCCCCCCCDDDDDDDEEFFFFFFFFFFFFFFFFFFFFFFFFF4",
INIT_0E => X"EFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFDCBA999988ACEFFFFFFFFFFFFFFFFFFF",
INIT_0F => X"87777899999ACCA89BDCA889AAA877BEFFFFFFFFFFFFFFFEEDDDDCCDCDEFFFFE",
INIT_10 => X"ABCDDEEEEDFFEFFFFFFEEEEEEEFFFFEDDEDDDDDDFFFFFFFEDBAA99ACDEFDBBBA",
INIT_11 => X"4EDEEEDDDCCCBBAA99999ABCCCCCCDEFFFFFFFFFFFFFFFFFFFFFFFFFFEDCBBA9",
INIT_12 => X"FFFFFFFFFFEDCCBBBBBCCCCCCCCCCCCDDDDEEEFFFFFFFFFFFFFFFFFFFFFFFFF4",
INIT_13 => X"EEFFEEFFFFFFFFFFFFFFFFFFFFFFFFFFEDCAA999989CEFFFFFFFFFFFFFFFFFFF",
INIT_14 => X"877778ABAABDEC9679BB989ABAA977ADFFFFFFFFFFFFFFFFFFEEDCDDCDEFFFFE",
INIT_15 => X"ABCDEFFFEEFFEEFFFFFEEEEEEEFEFFEDDDDDDDDDEEEFFEEDCBAAAABDEFFECDDA",
INIT_16 => X"4EDDDDDDCCCCBBA99999ABCCCCCCDEEFFFFFFFFFFFFFFFFFFFFFFFFFFECCBBA9",
INIT_17 => X"FFFFFFFFFFEDDCCCBBBBBBBCBBCCCCCCDDEEEEFFFFFFFFFFFFFFFFFFFFFFFFF4",
INIT_18 => X"EEEFEEEFFFFFFFFFFFFFFFFFFFFFFFFFEEDBA999989BEFFFFFFFFFFFFFFFFFFF",
INIT_19 => X"878779CDAACFFDA779CB989BBBAA979CEFFFFFFFFFFFFFFFFFFEEEEEDEFFFFFF",
INIT_1A => X"BCDDEFFFFFFFFEFFFFFEFFEEEFFFFFFEDDDEFEDDDDDDDDDCCAAAABCDFFFFFFFA",
INIT_1B => X"4DDDDDDDCCCBBBA98899ACDDCCCDEEFFFFFFFFFFFFFFFFFFFFFFFFFFFECBBBBB",
INIT_1C => X"FFFFFFFFFFEDDCCCBBBBBBBBBBBCCCCCDDEEEFFFFFFFFFFFFFFFFFFFFFFFFFF4",
INIT_1D => X"EEEFFEEEFFFFFFFFFFFFFFFFFFFFFFFFFEDCAA99889BEFFFFFFFFFFFFFFFFFFF",
INIT_1E => X"88888BDECBDFECB99BCB99ACBBBBA77BEFFFFFFFFFFFFFFFFFFFEFFFEFFFFFFF",
INIT_1F => X"BCDEEFFFFFFFFFFFFFEEFFFFEEFFFFFFEEDFFFEEDCBBBBBBBAAAABCCDDEFFFEA",
INIT_20 => X"4DDDDDDDCCCBBA98889ABCDDCCDDEFFFFFFFFFFFFFFFFFFFFFFFFFFFFECBBBBB",
INIT_21 => X"FFFFFFFFFEEDDDDCBAABBBBBBBBCCCCCDDDEEFFFFFFFFFFFFFFFFFFFFFFFFFF4",
INIT_22 => X"FFEFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEDBBA9878BEFFFFFFFFFFFFFFFFFFF",
INIT_23 => X"8888ADFFDCFFDCBAABB999BCBBBBA769EFFFFFFFFFFFFFFFFFFEEFFFEFFFFFFF",
INIT_24 => X"CDEFFFFFFFFFFFFFFFEEFFFFEEFFFFFFFEEFFFFEDCBAA99AA9ABBBAA9ACFFFC9",
INIT_25 => X"4DDDDDDDCCCBAA8789ABCDDCCDDEFFFFFFFFFFFFFFFFFFFFFFFFFFFFFDCBBBBB",
INIT_26 => X"FFFFFFFFFEEDDDDCBBAABBBBBBBCCCCCCDDEEEFFFFFFFFFFFFFFFFFFFFFFFFF4",
INIT_27 => X"FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFDCCA9778BDFFFFFFFFFFFFFFFFFFF",
INIT_28 => X"889ACFFFCDFFDCBABBA889BBBBBBA769EFFFFFFFFFFFFFFFFFEEEFFFEFFFFFFF",
INIT_29 => X"DEFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEFFFFFFDCBA9889AABCBB9879BFFFA8",
INIT_2A => X"4DDDDDDDCCBBA9889ABCDDDDDEEFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFECBBBBC",
INIT_2B => X"4444444444444444444444444444444444444444444444444444444444444444",
INIT_2C => X"4444444444444444444444444444444444444444444444444444444444444444",
INIT_2D => X"4444444444444444444444444444444444444444444444444444444444444444",
INIT_2E => X"4444444444444444444444444444444444444444444444444444444444444444",
INIT_2F => X"4444444444444444444444444444444444444444444444444444444444444444",
INIT_30 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_31 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_32 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_33 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_34 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_35 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_36 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_37 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_38 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_39 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3A => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3B => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3C => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3D => X"0000000000000000000000000000000000000000000000000000000000000000",
WRITE_MODE_B => "WRITE_FIRST",
INIT_3E => X"0000000000000000000000000000000000000000000000000000000000000000",
SIM_COLLISION_CHECK => "NONE",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3F => X"0000000000000000000000000000000000000000000000000000000000000000"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_bindec_a_bindec_inst_a_enout_18_cmp_eq0000,
ENB => BU2_doutb(0),
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(3) => BU2_doutb(0),
DIA(2) => BU2_doutb(0),
DIA(1) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(3) => BU2_doutb(0),
DIB(2) => BU2_doutb(0),
DIB(1) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(3) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta14(3),
DOA(2) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta14(2),
DOA(1) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta14(1),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta14(0),
DOB(3) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_15_ram_r_v2_init_ram_dp4x4_ram_DOB_3_UNCONNECTED,
DOB(2) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_15_ram_r_v2_init_ram_dp4x4_ram_DOB_2_UNCONNECTED,
DOB(1) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_15_ram_r_v2_init_ram_dp4x4_ram_DOB_1_UNCONNECTED,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_15_ram_r_v2_init_ram_dp4x4_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_16_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
SRVAL_A => X"0",
SRVAL_B => X"0",
INIT_00 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_01 => X"03038055BAEC73C2E0E8A20005BFFFFC0B011000C3C0199C0000000000000000",
INIT_02 => X"7190D0000D7FFFFE8301100083039FBC7FFFFFF3FFFFC80878FE4F20057A0000",
INIT_03 => X"E701300006067F3C7FFFFFF03FFFD0F941FF84AC1D3680000003E01182943903",
INIT_04 => X"7FFFFFE72FFFE0FF0700F87F53D3FC010007F0005D9A278C999420000D7FFFFF",
INIT_05 => X"9E0078F19FE273C0001FFC00298A64160C612000057FFFFFEB01B0000C0D803C",
INIT_06 => X"00FFF8C0298A62142E83E000017FFFFFFB01B0000C7C803C7FFFFFF30CFFCCE1",
INIT_07 => X"247803006A7C3FFFFB01F00008FE0E3C7FFFE00101FFFCC2FC000FEEFFD4B4C0",
INIT_08 => X"FF00E00008F38FBC7F7FE0008107FAC7783C0FEEF9EF3EC403FD00010F0A6154",
INIT_09 => X"7F3F8000318BFD4F3C7C81F0F1BBFFF603F8000E1F0E200B090018804A633FFF",
INIT_0A => X"0C3D80FFE9FDDFFE09F8001E1E6C4307F8001000C1C3BFFFFE00C00008807FFE",
INIT_0B => X"838000301D638653FE20F00060B23FFFFE0000001B27FFFE7FFFF810E989FE27",
INIT_0C => X"0D60F80060E17FFFFA0000001AAFFFFE7FFFF010F6C3FF520C3CC003E71E1FFF",
INIT_0D => X"F21000001A6FFFFE7FFBE387799FFF180400C0006BB79FFF000000C001040618",
INIT_0E => X"7FF8EFC7BE7FFFAC000040F0E2D63FFFC1200C80028480067B03FF0070A23EFF",
INIT_0F => X"000040F8DAEC5FFEBE301E00C3A390097687FF801937BDFFFE30000038FFFFFE",
INIT_10 => X"C5CCF300687C1E0D0E0E7E8083007CFFFE380020771FFFFE7FFC6FE7DFFFFFCC",
INIT_11 => X"1E0C06C086877AFFF2384070F32FFFFE7FFC47FFE3FFFFF80038C078F8E2200F",
INIT_12 => X"F2184020F81BFFFE7FFFC1FFFCFFFFCCC07CC070BEF39B817BC9300046DC0E32",
INIT_13 => X"7FFFC0FF9EFFFFEE00F800201FFB0C06FF449000C06340AB0C1E00C0338E5DFF",
INIT_14 => X"80E000001FFE3761FDE4A830E16D3124A11F42B1E09883FFEB804000700DFFFE",
INIT_15 => X"FD3FC300C31AF042C0F87FF8E04780FFF660400033E4FFFE7FFFE07012FFFFFD",
INIT_16 => X"200F3F3FC04F88FFF4F0C00835CDFFFE7FFFE0E002FC1FFF80E000002FFFFFFF",
INIT_17 => X"F500C0701BFFFFFE7FFFF3E0037637FF40C000006FFFFFFFFF6693E080CED25D",
INIT_18 => X"7FC000E000C80BFF700000003FFFFF7FFDD90DF0009CD6C2CCF63C9F005F847F",
INIT_19 => X"E80000001F83FF7FFC9F7B23031B76452C7B80D800C0057FD524E0F027FFFFFE",
INIT_1A => X"FC9FC2B7019A3E9097C3B007009F127F9D14C0F04FFFFFFE7F83F730000003FF",
INIT_1B => X"33FC710820BD247FAD4840715FFFFFFE7FC607CC01F007FFE4000000BFB9E0FF",
INIT_1C => X"2D6900E27FFFFFFE7FFB0BF401F01A7FF500C000FFD8603CF86FFE4F0016AF98",
INIT_1D => X"7FFD8DF701FC70BFFF8000007FE12E1CF327FF57824AAF6963FBC110243ACC7F",
INIT_1E => X"FF4000021F7FD780F2F5FF8FC604BC5C647C804CFF54DC7F6D6C0081FFFFFFFE",
INIT_1F => X"BA8CFFD4A4C2AF5BA0038099DF443CFF6C4C0081FFFFF7FE7FFF41B9F0FFFD7F",
INIT_20 => X"4001F13D0F52FCFED1460104FFFFFBFE7FFFA05F0C3FF97FFFC000004FFED778",
INIT_21 => X"A5D6F3EBFFFBE7FE7FFFE05F841FF8CFBF4000083FCE5B193E02FFC53EB26F40",
INIT_22 => X"7FFFDBDE140FFE80BD4000001FDBFCC7D2017FC2BF1A4C49A0E0FB7D0FB23CFC",
INIT_23 => X"BC8F800083F56FCC2F107FF15C0BE8332076F269FF8CE0F9C5413FE5FFF3DCFE",
INIT_24 => X"0E106FFEDE1259870927E24A7170B9F274B33FCBFFE3FCFE7FFFEFD80C0FFFE4",
INIT_25 => X"159FC307F01F1BF4B02138A3FFE79CFE7FFFF65C080F80FC838FE0C089EE6F98",
INIT_26 => X"333C2033FF5B3EFE7FFFFBDFE00F00F8E641FFE0CCF1DF9C6000A9FEA61C3C50",
INIT_27 => X"7FFFFC9FE03D87FC27B83FF0C4FDDFAC6C8244FF6BFF345F8DAF18A1E73203E4",
INIT_28 => X"589267FCC1FE77C80000015F93CC3BBF89C2F1FD871277CD62C5E053FE859D7E",
INIT_29 => X"00000057C9C0673F3A42C1F463E9EF9AC10CE353FC5D235E7FFFFF7FF9F9FF7E",
INIT_2A => X"7A82380040C08F9AE5D80317F0F063AE7FFFFFFFF5FFFC7C7FE903FCC69FACF8",
INIT_2B => X"77D087B7F0001D767FFFFFFFFD653C187FED80FCE621AD700060019BE563EB7F",
INIT_2C => X"7FE63FFFFFEC5C707FE28020E5CC35A54420D8B5E3BE04FFCC8636411E80EF9A",
INIT_2D => X"BFFD78000646D231C438E3A4005EF1FE900C6202F68E1FDB36A0DB2FC380CFAE",
INIT_2E => X"EE1CEDEE209E97FEA158C39F8F961FDB30A43B2FC6003FA47FD824FFFFFFAFE3",
INIT_2F => X"B87082498F485FD465802B2F8501BFCA7FF4013FFFFFEFF2FFFEC80002E1A44A",
INIT_30 => X"AF40230E01417FFC187EB4267FFFEC65FFFFE407027CB82F3FDCE6F094A6AFFE",
INIT_31 => X"0F7F87E39FFFC393FFFFF207417F7DA25FCE023FFF2A8FFE982102E6CA8DDFD4",
INIT_32 => X"FFFFFB0FC0FFFC1F2D4500DFFE8D2FFE8C010763452E5FCA6680229E06A07FF6",
INIT_33 => X"F3448457FF322FFECD81B920F34E3FEA650C629C18E3FFE6071FD7FF0BC7481F",
INIT_34 => X"49FFE1A39C1E3FED64C83A9C1BC6FFE6001FF5F1FC8FFFFFFFFFFC87E1FFD697",
INIT_35 => X"6EC3815C27C1FF140317FED004CFFFFFFFFFFEC3F23FF32C08488795FF8D2FFE",
INIT_36 => X"03E9FFC800D7FF3FFFFFFFC1FB87F9F8684A870AFFE2E7FCD1E040B7E8FFBFE5",
INIT_37 => X"FFFFFFE1FFE3FC9FD44D01417FF957F1D3E050A7EF3FBFF6CAC3265C3DCDFF18",
INIT_38 => X"EA0061C09FF8E9DF21E050A7D2BF7FF35AC02ECF3D4BFE6801C2FFA0081DFCCF",
INIT_39 => X"99C0472FD07F7FF9F20036CF0F83FCD070C5FF98000579DFFFFFFFF0C257FFCF",
INIT_3A => X"4C05349F4E9FFC901FC0BFCFE0017B67FFFFFFDCC233FEFFF410E00663FD543C",
INIT_3B => X"01815FEE90008FE8FFFFFFF06323FEC7F81FE80353FAAB73990C204FDD7D7FF9",
INIT_3C => X"3FFEFFF89114FE1BFB0F3800483AA9BF111C931FDD377FFA4C0FB51F65F3FD40",
INIT_3D => X"FEBF18004F9CC97E35FF8E7FCA0C7FFA4C1FCB3F6557FAB86807CFFDCC000033",
WRITE_MODE_B => "WRITE_FIRST",
INIT_3E => X"767FA87FCD8D7FF8CDDE767F050FF2B871E3C7FDE4800718EFFFFFFE698AFFCB",
SIM_COLLISION_CHECK => "NONE",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3F => X"9BCE2C7FE74FE4787F84F3FEF4E60787F7FFFFFDB6C53F0BFC471803209E56FC"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena,
ENB => BU2_N1,
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta15,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_16_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_17_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
SRVAL_A => X"0",
SRVAL_B => X"0",
INIT_00 => X"7FFD39FF7CD187E0B7FFFFFCC2E29FE1FF9A980398B079F9F2FFD1FFF54B7FF8",
INIT_01 => X"06FFFFFE52105F9FFF741801E88003F3F33E27FFFB387FF8EB8411FFAE0F8B7C",
INIT_02 => X"FF8C1070F77F31E7731CCFFFF476FFF8CB9423FE2F9FB44C7FFF6EFF7FFF70F8",
INIT_03 => X"F0019FFFF5F0FFF0CB94CFFC9C3FAB087FFFE5FF9FFFB8FFC6BFFFFE2413AFD3",
INIT_04 => X"F304BFFD1B3FA70A7FFFFFFFB7BF583FE18FFFFF3BF357F8FFCA103B870100E7",
INIT_05 => X"7FFFFFFFBB4FCE0070E7FFFFBC3B93FDFFE8901A3F83000FF9819FFFECF5FFF0",
INIT_06 => X"0615FFFFC9698CFDFFEA4058C0040C0FF0009FFFEBFDFFF4C1477FFB327FAB3E",
INIT_07 => X"FFE500DDC306F81FF2019FFFD5E3FFF480477FF31AFF2B3A7F08D9FFD883A780",
INIT_08 => X"C6718FFE6BDFFFF4830F7FF01DFF6FF27DE33D80FE3FA207838D7FFFE4B00AFC",
INIT_09 => X"879DFFF611FE978C7200001BFA7F438263C15FFFF27CB97EFFF6FB2DCBCFF01F",
INIT_0A => X"3800000E4FFD03FE5880723FF9AED4BEFFF70DD13C03E01F4CF19FF8B3F7FFF5",
INIT_0B => X"DA001A0FFC6B1F4FFFF7F52803BE301FCDFF9FF3438FFFF58710FFF73BFD77A6",
INIT_0C => X"FFF00B0300016C1FCDFFBFEB1B8FFFF53C22FFF1A3F9CF5E4000010002FEE3FF",
INIT_0D => X"99FF3FC41BEFFFF53CE5FFF58BFA8F60000001F00372FFFFFA8302C7FF1DCFA3",
INIT_0E => X"9EEBFFEE27FACFA2000FFFF8C1CCEFFFFEC78EB7FFCAE3B87FFFF3E778FC343F",
INIT_0F => X"000007F80000EFFFFF227F93FFE463573FFFF83C48EEF83F3BFF7FD47B1FFFE5",
INIT_10 => X"FFAE3FE8FFF959CFCFFFFA905044787F67FF7F9727DFFFC9BE2BFFD9BFF05C8E",
INIT_11 => X"67FFF28988420A7E6FFE7F18E63FFFC9BE57FF97BFF5815E000000000000AFFF",
INIT_12 => X"EFFC1B0FB7BFFFDD80A7FF85DFF11E9E000000000000BFFFFFE27FEA7FFE97E1",
INIT_13 => X"FF5FFFBD1FF5233E0000000000037FFFFFFE6079CFFF2B30B007F2351E5085FC",
INIT_14 => X"600000000002F7FFFFFF74F567FFB58C67F3E33F164F41FCEFF8000044FFFFDD",
INIT_15 => X"FFFFF27F51FFDADF8FE98797292FD67CCE2001F0637FFFDDDCBFFF097FE41C7E",
INIT_16 => X"00240F8DEA2F3018980003FE637FFF9D39BFFF78FFE659FE3C0000000004FFFF",
INIT_17 => X"383007FF2CFFFF38037FFF10FFE223FE3E000003E006FFFFFFFFFA2FDE3FE43F",
INIT_18 => X"0E7FFF11FFC3AFFE3C000001F00307FFFFFFFE27F49FF97C1E28074FFE2F0308",
INIT_19 => X"1FF300016000777FFFFFFF8BA5E7FE8C91D8002FFC2FC10138780FFF3BFFFE78",
INIT_1A => X"FFFFFFE35ED8FF585190602FFC6BE190E0F9BBFF17FFFC7019FFFED1FF8BAFFC",
INIT_1B => X"0BE1FF27FBEBF1C1E0FFDFFFABFFFCE037FFFEB53FD75FFA1FE1800008C00F0F",
INIT_1C => X"C0FC5FFFABFFF8E02FFFFD6B3FAD3FF61BF800001FF80F0FFFFFFFFE93973F33",
INIT_1D => X"6FFFFF693FA5FFFC4F07F8017FFE1A0FFFFFFFFFB4E683F08483FF4B25E9E1C1",
INIT_1E => X"67801803FFFF2301BFFFFFFFC9BD79F9429FFC490DE9C1E38FF87FFFF7FFF8B2",
INIT_1F => X"3FFFFFFFFB53CCFCA1BFFF2180E8C1E3FFFA7FFE5FFFFC3FCFFFF8E1FFABFFE2",
INIT_20 => X"417FFFC98074C1C3FFE21FFE0FFFFC3F9FFFFACC7FB3FFC807E0081FFFFF3B03",
INIT_21 => X"E02C9FFE2FFFFE1F1FFFFFB2FF33FF403EFF183FC078060053FFFFFFFD36D2F8",
INIT_22 => X"3FFFF186FFA3FCE07BFFF07E00780300269FFFFFFEE7F530B3DFFFC0E17CC0C3",
INIT_23 => X"5BFFE07E00701E9C1820F0CFFF932DC017BFFFD0737C0067E3AC1FFF3FFFFF02",
INIT_24 => X"0039FD77FFE6DC9E090FFC1F7764C027E7AC5FFCBFFFFE00FFFFEDEAFF0FFE02",
INIT_25 => X"041FFF98B665C027E79B1FFEBFFFFC01FFFFF30FFE1FF6664FFEE07F01E0CF58",
INIT_26 => X"C399CFFA9FFFFE07FFFFC64DF07FF4360FF6E03F01E063207F006693FFF1113B",
INIT_27 => X"FFFFB415C67F90360FFF2C1FC70000323F0F818FFFFE35F2820FFFA73804C023",
INIT_28 => X"007FD207EF38F3F80007FD8C3FFFC5F97F03FF9F3C04C0370759FFF49FFFFE3F",
INIT_29 => X"000FF9CB87FFF43C4C84FFFF3EFC403C3F7BFFE99FFFFFFFFFFF65B79F7EA37E",
INIT_2A => X"1422FFFFB2804079FF3FFFCBDFFFFFFFFFFE0A7BB37CD9FE0007C207FC470BEF",
INIT_2B => X"FF3BFF935FFFFFFFFFFE51FBBF7EE9FE0003FE0FFD6F97FF000819F6C7FFFB43",
INIT_2C => X"FFFD86E71E720FFE7FC0000FFDE132070001DC3C03FFFC500A5101FE7281C0D9",
INIT_2D => X"7FE0000FFCE9DA7400180C06E8FFFF343979C6FC91AFC0CDFEBCFF375FFFFFFF",
INIT_2E => X"FEBFF800307FFFCBDD483EF90197826DE63E7EF75FFFFFFFFFFB8DC780003FFE",
INIT_2F => X"30BE1F7602E4177CE67EBE475FFFFFFFFFF6D3C78F1FFFFE7FF8003F9DEDC2F5",
INIT_30 => X"86BF7C475FFFFFFFFFF9CFE7FFFFFFFE7FFC003F9E13F30BFFFEFE007A97FFE6",
INIT_31 => X"FFE437FFFFFFFFFE3FFFFE7FFE0788F3C7FC5C3FFC40FFF1CD24867B0219BF80",
INIT_32 => X"03FFFFFFFF01310F83C1719FFF78FFFEFAC802278FF0FFC36FBFACBE5FFFFFFF",
INIT_33 => X"C11971CF0394FFFF04CC4C17FFE3FFC2279F8CFE5FFFFFFFFFD757FFFFFFFE3E",
INIT_34 => X"F1B4EDB06F23FFE39B4FC35E3FFFFFFFFFAFAFFFFFFFF80E003FFE07FF0F7BE0",
INIT_35 => X"44C3D37CBFFE7FFFFF5F9FFFFFFFF1C6401FFE017F1843E0FE027E0F07E57FFF",
INIT_36 => X"FFBD7FFFFFFFC7E61E1FFE000F0D8CF07E1F1F800FF95FFFFCC4DEFF244FFFE2",
INIT_37 => X"738FFF8000058200001F018003607FFFFE0C3F3C2961FFC503801165BFFE7FFF",
INIT_38 => X"E15F0611700027FFFFFEFFDFDE3FBC47701F11253FFE7FFFFD2EFFFFFFFF1CEE",
INIT_39 => X"FFF2FFE03F07BC3F8F18720D7FF8FFFFFA11FFFFFFFE3FCE790FFFFFF1F7FEC3",
INIT_3A => X"060D8C8D7FF1FFFFE45FFFFFFFF87F1E071FFF00711BFD000F190847F00015FF",
INIT_3B => X"90BFFFFFFFF0E07E083CFE0071C7C0F0037CDAC3CEF007FFFFE9FFFFFF08EC00",
INIT_3C => X"007CFF00F1C7FF0FFE39021BFFF9C0F38FF5FFFF1F9F509F9E05CC0D7FE3FFFF",
INIT_3D => X"FFC2A00401FCF2FE8FF0FFFF3F8FCCF00C621B0D7FC3FFFF63FFFFFFFFE087FE",
WRITE_MODE_B => "WRITE_FIRST",
INIT_3E => X"DFE1FFFFFF9FBFC07471E7CAFF0BFFFCC5FFFFFFFFC30FFE03F8FFE3FD4FFFFF",
SIM_COLLISION_CHECK => "NONE",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3F => X"7C602FCAFF3BFFF61BFFFFFFFFC01FFE7FF8FFFFFC4FFFFFFFF1830BC37F10FE"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena0,
ENB => BU2_doutb(0),
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta16,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_17_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_18_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
SRVAL_A => X"0",
SRVAL_B => X"0",
INIT_00 => X"97FFFFFFFFC07FFE7FFDFFFFB6EFFFFFFFFEBA8103E08000AFE9FFFC3FAF9F90",
INIT_01 => X"7FFFFFFF177FFFFFFFFFB9FFF02800006BF1FFFC3F2FDC1978007E4D7F97FFC9",
INIT_02 => X"FFFFFFFFFE0F6E0619DFFFFCBFDFDE0F780004063FC7FFA74FFFFFFFFFF9FFFE",
INIT_03 => X"00F7FFFEBFAFB266F8010C0F9F2FFE4E9FFFFFFFFFFFFFFC7FFFFFFF077FFFFF",
INIT_04 => X"FA665C002F1FFCB97FFFFFFFFFFFFFFC7FFFFFFE03FFFFFFFFFFFFFFFFFF3D06",
INIT_05 => X"FFFFFFFFFFFFFFFC7FFFFFF8E3FFFFFFFFFFFFFFFFFFFDA70003FFFE9DAFEE51",
INIT_06 => X"7FFFFFE30B7FFFFFFFFFFFFFFFFFFE420000FFFE3DCCDE4BFD24D80FFCFFFBE6",
INIT_07 => X"FFFFFFFFFFFFFE800000FFFF3FFD7E507E25BC083EFFF5D9FFFFFFFFFFFFFFFA",
INIT_08 => X"C0007FFFFFAC3E70BE29BC0BE6FFC827FFFFFFE1FFFFFFCE78FFFF02F47FFFFF",
INIT_09 => X"B939780BDE0F25CFFFFFFFC1FFFFFFA2201FFE03387FFFFFFFFFFFFFFFFFFFD8",
INIT_0A => X"FFFFFFF9FFFFFC82601FFC879A5FFFFFFC0F0FF0FFFFFFD1E0007CFFFFD17E34",
INIT_0B => X"001FF9CFE513FFFB0C68E03F03FFFFF130007807FFCE382D3679F60BC888831F",
INIT_0C => X"F0CF40021F07FFFFA8000001FFE19460B27AF6179CB698FFFFFFFFFFFFFF8206",
INIT_0D => X"E40000007FF3C8817AF8F617BCB867FFFFFFFFFFFFFF3CFE000FF2E44C7FFFE5",
INIT_0E => X"70FDF2143CD18FFFFFFFFFFFFFFC3C084003FB72BC817FF2017FC000F878FFFF",
INIT_0F => X"FFFFFFFFFFFE07984000171FFD80FFF8003B8300FC7C1FFFF20040007FC341F2",
INIT_10 => X"00009F3F7A8000F0000427FF8E068FFFF6000001FF9E41F4FDFDF021B9861FFF",
INIT_11 => X"000FFFC3FC0087FFCA00000FFF1123F501FFB06C06387FFFC307FFFFFFFFFE50",
INIT_12 => X"D780001FFF13C7E881FF174F1C40FFFF38F7FFFFFFFFFD6000007FF655800400",
INIT_13 => X"219F17EF679FFFFC3807FFFFFFFFC580000FFEF7DB00040003FFFCE1F8000FFF",
INIT_14 => X"E0FFFFFFFFFF08020033F8C87F389F007FFF9CFE07FFFFFFCFC0007FFF0CE361",
INIT_15 => X"00EFF8D81C7C1F00FFE63E00FFFFFFFFEF8000FFFF877B3FA19F10E08E3FFFFE",
INIT_16 => X"0CAC03FFFFFFFFFE5F4900F9FF99B471AF8E20FF38FFFE7FFFFFFFFFFF86683E",
INIT_17 => X"3FE100F0FF103A610F8C19F0E1FFFCFFFFFFFFFFFFF1313E7F9FD1F0007DFFF0",
INIT_18 => X"5F084FE18FFFF1FFFF3FFFFFFF0D83FE78FFAFF0007CF8080660FFFFFFFFFFFA",
INIT_19 => X"FEFFFFFFFC661F8E7FFFDF1F000000091CFFFFFFFFFFFC05FFE900F0FE107818",
INIT_1A => X"7FFF5C1F00001FD07FFFFFFFFFFFC3F981FF00F8FEFE83099F9865873FECF3FF",
INIT_1B => X"FFFFFFFFFFFFBBF02BFF807FFC9B3D821F986108FFF217FFFFFFFFFFF9BC1832",
INIT_1C => X"9C3E883FFE8560221F182833FFE2133FF3FFFFFFF27467FC7FFEBC39000060BF",
INIT_1D => X"1F5AD49FFFEB9C3FFFFFFFFFC9F73FFA7FFC3FF1020062FFFFFFFFFFFFFE3114",
INIT_1E => X"FFFFFFFF6F7DFFF67FFAFFE100003AFFFFFFFFFFFF035E2BFE5F001FFE5745DF",
INIT_1F => X"7FF0FFCF00003BFFFFFFFF0EE0E178B7FF9F941FFF404AB81F500C7FFFF907B9",
INIT_20 => X"FFFFF9288EFCE38FFE78FF3FEC874A209751A5FFFFEC03803FFFFFE63FF3E762",
INIT_21 => X"FCA9FF7FE2BF70998300FBFFFFD00180FFFFFC701813C67E7FD3FFDE0FF393FF",
INIT_22 => X"0720EFFFFFA0013DFFF2C30063E0FEF87FE7603E3DA7FFFFFFFFF30ACC0C1C3F",
INIT_23 => X"FFC33C0310FCFEF07F47003FF63FFFFFFFFFE6F780FE04FFF37FC600D2A665F9",
INIT_24 => X"7C80003FE7FFFFFFFFFFEAF800F171FFE42D8700DF860E183F409FFF1B8002FF",
INIT_25 => X"FFFFBC1C03C287FFD0BC8FE0CE8F3FD83F9CBFFF0FCCC2FFFF1C000C107FEFE0",
INIT_26 => X"317FDFF903CFFFDBBF1B7FFC0FAFBEFFFF307873DE1C0FC67A0D003F2FFFFFFF",
INIT_27 => X"FC06FFF226BFF07F00E7330FFFC00F8E74350030BFFF90BFFFFF500F8F22BFFF",
INIT_28 => X"7F8F06FFFFFF0F1E489E00107FF68763FFFEACE7FE657FFEC5FD0E3F012FFF8B",
INIT_29 => X"317F002FFFFE701BFFFD470FF00AFFF10BF88D1FB0BFFF679C0CFFEA017FFF7E",
INIT_2A => X"FD84866F0011FFE5E7F5FF3FBC4FFE5FBE18FFC605FFFFF8F80019FFFFFF0F3E",
INIT_2B => X"8FCDE57FDE63E0131E2CFFBC0FFFFFE1800023FFFFFF8E7E25FE0E3FFFD1F007",
INIT_2C => X"BF21C7760FFFFF0F3000CFFFFFFF80FE57DB7C39FF4FF803820607CC03A7FFCC",
INIT_2D => X"2000BFFFFFFFC0FE6F637E02FB7CFC0860F027C1806FFFD2BF3BEDFBC679DFCB",
INIT_2E => X"4C87FCCEEBE07C4A03C07FDF265FFF847E6BEA01800C1C67FC3FC4CBFFFFC038",
INIT_2F => X"1E0041CFEB3FFC117ECBE801971C0F9FF01FFDCFFFFE03C00FF0BFFFFFFFE3FC",
INIT_30 => X"FCCBEC0718F980DFE007F3FFFFFCFC0033F8BFFFFFFFFFF80604F903AEE07CBA",
INIT_31 => X"8383EFFFFFE1E3C0E3D87FFFFFFFFFF87E38D3F71800F974F8C00003E8FFF1AA",
INIT_32 => X"87CCDFFFFFFFFFF878DE25E8E03FF3E3F0E0719D6DFFF691FC79C41E08E0808F",
INIT_33 => X"6FFFDBE1803FC667E001619F47FFED41F8E7141F0810030F03C3D7FFFF87CF3F",
INIT_34 => X"CC7D7FFA2BFFDB97FBDF2A1FAA50031C00E3AFFFFE0F81C231FF5FFFFFFFFFF8",
INIT_35 => X"FBBF361FB86C26780023603FE1A0FC60799FDFFFFF03FFF01FFFFF67C01E721F",
INIT_36 => X"0073C7E0FE7303E6FC8FDFFFFE00FFF07FFFFECFC03E827FFFF2FFFD27FFD3AF",
INIT_37 => X"3ECFAFFFFE001FF27FF7FD0FC0396CFFFF99FFFC1FFF1D5FF83F101FF75650F0",
INIT_38 => X"1F4BDD0FC0F5E0FFFC2FFFFFFFFE57BFFC7F5039C66F2DE000F007CF83047FEE",
INIT_39 => X"80DFFFFFFFF9AEBFFFFEC7F9B6AFC3E000F43FE8C724FFD93E83BFFFFC3F01E6",
INIT_3A => X"FFFE34F8C3EE4FE0007CB6171F76FFED1E0197FFFC3F00060EE30B1F80EBE1FF",
INIT_3B => X"007C5E1FE3A5FFF7C609E7FFFC3FFE0E0E59F63F01CFD7FF1CBFFFFFFFFBBC7F",
INIT_3C => X"FD1C3FF83E1FFFDE0E7BC83F079F9FFE497FFFFFFFF5D9FFFFFDF378C61CEFF0",
INIT_3D => X"1A7440F8FF7F5FF8BFFFFFFFFFE183FFFFFA71389830CFF000605FFFE081FFD3",
WRITE_MODE_B => "WRITE_FIRST",
INIT_3E => X"FFFFFFFFFF934BFFFFE1657013A0CFF0000067FFE7437FE800FEFFF71E3F81FE",
SIM_COLLISION_CHECK => "NONE",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3F => X"FFE4CA703BB1CFF8000083FFC79CFFE800FDFFCF1E1F80FA1C1801F07E3E9FE0"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena1_2,
ENB => BU2_doutb(0),
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta17,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_18_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_19_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
SRVAL_A => X"0",
SRVAL_B => X"0",
INIT_00 => X"0780F9FFCFFBBF600031FF300E1F8672603003FDFEBD3F03BFFFFFFFFF17B7FF",
INIT_01 => X"0003E3E70C1F8E00781E03FFFEBEF80FBFFFFFFFFF1FE7FFFFEBF7BC3839EFF8",
INIT_02 => X"7C0203FF3E39F0787FFFFFFFFE7F9FFFFFC9FFBC683C9F7C08C1BAFFCFFF3F20",
INIT_03 => X"FFFFFFFFFE7C7FFFFFC5BFFD7BBFBF650B415C002FFFFA0000061F9C081F0C72",
INIT_04 => X"FFD32F385488CFD58CC04D7F20FF19800003FF30001E01FA79B603FC9E44F0A3",
INIT_05 => X"87C0BDE7FFFF0E0000001C60C3FC07E279CC00F9DE73C4FFFFFFFFFFFAFE3FFF",
INIT_06 => X"00067001FFFF0F827C880002BE0217FFFFF8FFFFFBC4FFFFFFDF4F3FEC4203A9",
INIT_07 => X"7D2800043E0CEFFFFFFC7FFFF7CCFFFFFFC5AFB3FD64019183404C186000000E",
INIT_08 => X"FFFC7FFF27D9FFFFFFBE5F38F8A381FF21F9FDFF0300188D070B8001FFFE0406",
INIT_09 => X"FF8CBF2C0D20793FA0F17BCF0FC0C7FD0E1E0000FC0000087008000A59FC7FFF",
INIT_0A => X"00EAFFFE07C2E7FD271F8800F8073CF87FD8000E81397FFFFFE0FFFF45C7FFFF",
INIT_0B => X"D71F8000F8FFFFFE7FD8018F801D7FFFFB76FFFD832FFFFFFF4D7F942D3C1FF1",
INIT_0C => X"7FBC1E74843CFFFFF402FFFA003FFFFFFF7AFFD90C067DF210CFDFF00007EBFF",
INIT_0D => X"C8C5FFFD001FFFFFFE9EFFAF019B7FF3313EFFC0030FF7FFC79784007FFFFFFE",
INIT_0E => X"FE30FFEB6392E9F7F2F6BFC0001FC1FFEF8C10007FFFFFFC7FBF638CFFF1FFFF",
INIT_0F => X"7316578103FFE1FFEE00D800FFFFFFF07F7FFFFE2BEBFFFFB287FFF260FFFFFF",
INIT_10 => X"9C0F6680FFFFFFF87E7F3FFDBA0FFFFFA38BFFD421BFFFFFFC3DFF937182A7FD",
INIT_11 => X"7E1CF9FEFD77FFFEC10FFFB0E3FFFFFFFCF1FFF3BD8033FA7BEC0F80073F41FF",
INIT_12 => X"0697E0A1C0FFFFFFFDC9FF719DC067FBBB7F95E8027F82FEBC21F7C0FFFFFFF2",
INIT_13 => X"FC7BFF30098167F9327FFAFF017D017A7E6DC7C0FFFFFFFE791BEE7FFF23FCFD",
INIT_14 => X"313FFF7F00BCE0ABFC600F803F3FFFFE7C07DFBFFFE9FCF67E2FD04387FFFFFF",
INIT_15 => X"FE7000001FFFFFF27C1FD9BFFF27066BF85F8F8709FFFFFFFE77FEB80191E7FD",
INIT_16 => X"7E1FEE7FFFBD8107F8BFFF061BFFFFFFFFC7FD3800CFEFFC314FFE7F003F3830",
INIT_17 => X"F8FF180607FFFFFFFFF7FD7801D86FFE3097FC3F801FC870EC7B00000FFFFE02",
INIT_18 => X"FE87FBF0E331FFFEB04BFC3F800BFB684066C4030FFFFE027FFFF9FFFE70CFFF",
INIT_19 => X"F021FCAFE105FEFB806C8C8787FF3FFE7FFFFFFFFCF0FFFBE4FE40005FFFFFFF",
INIT_1A => X"A1F8BDC7E3E73FFE7FFFFFFFFE38FFF1D7FD8000DFFFFCFFF8E7FB64F701FBFE",
INIT_1B => X"7FFFFFFFFA0F07E0AFFF0FC1BFFF8EFFFC1FFFAC6F2A79FFD015FE87E2497FFF",
INIT_1C => X"9FF707E0FFFF47FFF0BFFB2D882E24FF121AFF9102C05FFFF0FF1273F001FFE0",
INIT_1D => X"F4FFFDA195C2A6FF6F8AFF9001BA3FFFFFFFFC1C600EFF807FFFFFFFFBE4F7F1",
INIT_1E => X"8F8BFFF8007A8FFFFEE1F07F003F1FC07FFFFFFFFDFED1FF7FFE0703FFFD95FF",
INIT_1F => X"FEC0FF8F7C0F9FC27FFFFFFFFFFFD3FC7FF60F04FFFC33FFFD7FFDB015C282FF",
INIT_20 => X"7FFFFFFFFFD8E3FEFFEE0403FFF9F3FFF3FFFDE3D41D83FFBD8BFE97002F1FFF",
INIT_21 => X"FF5C0003FFE0F3FFEAFFF86117F981FFC008FDB9000B9FFFFEC0FF303F8787E0",
INIT_22 => X"C8FFF804537BA1FFF80CFFBFE185CFFFE7800F3FF3E3E7E07FFFFFFF7F7E03E1",
INIT_23 => X"FC087BFC03C2E5FFF8000F3FFE07E7F07FFFFFFD9F4007EC7E78001FFFF1E7FF",
INIT_24 => X"F40007BFFFFFE3707FFFFFFCDF40D811BCC0003FFFD1C7FFD6FFE617F3B7E7FF",
INIT_25 => X"7FFFFFFEAFA1B3983F01C0CFFFA7C3FFF7FFF26B13A7E7FFF400837E01C1F5FF",
INIT_26 => X"780061BFFF4FEFFF99FFCC92C50FC1FFF806FF7F40016AFDFE00EFDFFFFFF9F2",
INIT_27 => X"7BFFBFC1C30FE3FFFE64CF4FC03CB725FE8107C1FFFFF8E27FFFFFFCDFEE3FF6",
INIT_28 => X"FC6341B780367817FFB673847FFFFC0E7FFFFFFF1F7DDFEC720001FFFF5FC7FF",
INIT_29 => X"FFF8F707BFFFFF7E7FFFFF7FC0BDCDF07638013FFFBFDFFF1FFF703138EFE0FF",
INIT_2A => X"7FFFF87FD4F9FA60073C41BFFE3FDFFF53FEA0F4F80791FFFF0641F7E01E5C0F",
INIT_2B => X"0308F23FFF7F8FFF17FF33F6F80FF0FFFC912317EC1E5E0BFFFFF607BFFFFFFE",
INIT_2C => X"1FFD10F7F803F03FFF908017FA0FDF35FFFFF647FFFFFFFE7FFFF9FF9C407E00",
INIT_2D => X"FE40503BFF061F84FFFFF6EFBFFFFFFE7FFFFFFFE0207D080300FD7FFCFF1FFE",
INIT_2E => X"BFFFC6FFBFFFFFFE7FFFFFFFFE38FA380D87F4FFFCFF7FFE07F96C27F837F8DF",
INIT_2F => X"7FFFFFFFFE3DF0CC13FFFBFFF9FF3FFD0FF1EE04F34FFF1FFFC091FBFFC2FF5C",
INIT_30 => X"2E01FFFFF3FA3FFC1FEFFC1C635F9E1FFF305DFDFF43FFEDBFFFEF9D5FFFFFFE",
INIT_31 => X"6FFF983B002FDE1EFFD04FFDFF847FEFDFFFE7181FFFFFFE7FFFFFFFFF3FEB64",
INIT_32 => X"B1F033EBFFE0BFF42FFFF09D1FFFFFFE7FFFFFFFFF1FF3F32E00AFFFCBFA7FF8",
INIT_33 => X"17FFFC7FDFFFFFFE7FFFFFFFFF8FE7FA180087FF87FDFFFA8E7F5064401FDE21",
INIT_34 => X"7FFFFFFFFFC7B7FC5801DFFFDFFDFFFEC1FEB08260199A1A36F20AC3FFE05FF6",
INIT_35 => X"D800EFFF5BFCFFF0107F737E6019982E7D300B6FFFD8EFFD97FFFF9EE3FFFFFE",
INIT_36 => X"5BFF7E666D03A82A7D100A2FFFCCAFFFD7FFFFE618FFFFFE7FFFFFFFFFFF6FFD",
INIT_37 => X"3FF00C17FF1377FF37FFFFF9871FFFFE7FFFFFFFFFFC9FFED98CBFFE3FF3FFFC",
INIT_38 => X"D7FFFFFE40C7FFFE7FFFFFFFFFF07FFEFBFC7F3F3FCAFFF115FAFDFE2C08A036",
INIT_39 => X"7FFFFFFFFFE0FFFEBA38BEF63BD8FFE39FFEFAFE8508201C3FF07C27FF5DFBFF",
INIT_3A => X"38107E9F1F82FFEBBFFEF3FF0009C03EFF58360BFFFE1DFFE7F3FFFF90387FFE",
INIT_3B => X"7FFAF1F9A009007EBF001F09FFFF1EFFE7F07FFFF40FFBDE7FFFFFFFFFF1FFFE",
INIT_3C => X"3F901F65FFFF9B7FFFC73FFFFD8102267FFFFFFFFFC3FFFF14157EE60701FFDB",
INIT_3D => X"FF0FFFFFFF4364D87FFFFFFFFF03FFFF0C15FF1E4005FFCA7FF4F5F6D0090070",
WRITE_MODE_B => "WRITE_FIRST",
INIT_3E => X"7FFFFFFFFC07FFFF0812FFF4E001FFDFFFF8EBF5080D00703FC61F63EFFFDB7F",
SIM_COLLISION_CHECK => "NONE",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3F => X"1033FFF8F805FFACFFF05FF8CC0F00707FFF3F60E7FFDF3FFE0FFFFFFFB07E02"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena12,
ENB => BU2_doutb(0),
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta18,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_19_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_20_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
SRVAL_A => X"0",
SRVAL_B => X"0",
INIT_00 => X"FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
INIT_01 => X"FFFC7FCE7CE3B7EC1F1843FFFC7FFFFFF3FF1FFF3FC0067FFFFFFFFFFFFFFFFF",
INIT_02 => X"8E701FFFFCFFFFFFF3FF1FFF7F00007FFFFFFFFFFFFFF00780FE3FBFFC7BFFFF",
INIT_03 => X"F7FF3FFFFE0180FFFFFFFFFFFFFFE0F801FF833FFBB0FFFFFFFC1FF1BCF3BBEC",
INIT_04 => X"FFFFFFF81FFFC0FF07FFF87FB796FFFEFFF80FFFC1F9BDEFE6703FFFFCFFFFFF",
INIT_05 => X"9FFFF8F1FBC703FFFFE003FFE1F9BDE7F3E13FFFFCFFFFFFF3FFBFFFFC03FFFF",
INIT_06 => X"FF00073FE1F9BEE7F283FFFFFCFFFFFFF3FFBFFFFC03FFFFFFFFFFFC03FFF0FF",
INIT_07 => X"FC7FFCFF96FFFFFFF3FFFFFFF801FFFFFFFFFFFE00FFF8FDFFFFFFE0FBE3780F",
INIT_08 => X"F7FFFFFFF80C7FFFFFFFFFFF00FFFCF8FFC3FFE0FBF0FFF7FC02FFFEE3F9BF27",
INIT_09 => X"FFFFFFFFC077FE70FF837FF0F07C3FFBFC07FFF1F3FDBF8CF87FE77FB6FCFFFF",
INIT_0A => X"FFC27FFFE63E3FFCF607FFE1F39C7CF808FFEFFF3F3C7FFFF7FFFFFFF87FFFFF",
INIT_0B => X"FC7FFFCFF19FF9AC0FDF0FFF9F8C7FFFF7FFFFFFF8DFFFFFFFFFFFFFF077FF38",
INIT_0C => X"FE9F07FF9FDD3FFFF3FFFFFFF9DFFFFFFFFFFFFFF83FFF9DFFC33FFFEFFFFFFE",
INIT_0D => X"FBEFFFFFF99FFFFFFFFFFC78FE7FFFDFFFFF3FFFE7CFFFFF7FFFFF3FF1FCF9E7",
INIT_0E => X"FFFFF0387FFFFFCFFFFFBF0FE1E1FFFF7F3FF37FF8FCFFFFFCFC00FF8F9B7FFF",
INIT_0F => X"FFFFBF07C1F03FFF3EDFE1FF38DFEFFAF978007FE7077FFFFBCFFFFFFB1FFFFF",
INIT_10 => X"38EF0CFF9883E1FEF1F1817F7F00FFFFFBC7FFDFF03FFFFFFFFFF0183FFFFFEF",
INIT_11 => X"E1F3F93F7E80FDFFFBC7BF8FF01FFFFFFFFFF8001FFFFFDFFFC73F87DFFC1FF0",
INIT_12 => X"FBE7BFDFF807FFFFFFFFFE0003FFFFEF3F833F8F9FFC0400FCE9CFFFBF23F1FD",
INIT_13 => X"FFFFFF0001FFFFF3FF07FFDFBFFC0001FCE2EFFF3FFF7F6CF3E1FF3FCF80F8FF",
INIT_14 => X"FF1FFFFFBFFFC89FFE0337CF1F0CDEE77EE0BD4E1F807AFFF3FFBFFFF003FFFF",
INIT_15 => X"FE001CFF3EE9DFC33F0780071FC779FFE67FBFFFF003FFFFFFFFFF8001FFFFFF",
INIT_16 => X"DFFFC0C03FCF71FFE41F3FF7F3F3FFFFFFFFFF0001FFFFFEFF1FFFFF9FFFFFFF",
INIT_17 => X"E4EF3F8FF7FFFFFFFFFFFC0000F80FFF7F3FFFFFDFFFFFFFFE181C1F7DEDFDA1",
INIT_18 => X"FFFFFF00003007FFBFFFFFFF9FFFFFFFFE3E0E0FFDEDF9B2F3F7C3E0FFDF75FF",
INIT_19 => X"CFFFFFFFBFFFFFFFFFFF83DCFEEED93733FC7FE7FFC0F4FFE4CB1F0FEFFFFFFF",
INIT_1A => X"FFFFFCC8FF6ED167983C7FFFFF80E1FFECDB3F0FDFFFFFFFFFFC0FC0000007FF",
INIT_1B => X"3C03FEF8DF80C3FFCC97BF8F3FFFFFFFFFF80FF001F003FFF7FFFFFFBFC7FFFF",
INIT_1C => X"CCB6FF1EFFFFFFFFFFFC07F801F019FFF9FF3FFFBFE7FFFFFF9FFF70FF66516F",
INIT_1D => X"FFFE03F801FC707FFDFFFFFFBFFEF1FFFC2FFF987DB2518F7C07FEF0DB821BFF",
INIT_1E => X"FE7FFFFDBFFE387FFCF3FFE839B8529C7B82FFC100C7EBFF8CB3FF7CFFFFF9FF",
INIT_1F => X"7CFDFFE75B5C52983FFFFF8220C7CBFF8D93FF7CFFFFF9FFFFFF807E00FFFCFF",
INIT_20 => X"9FFFFF06F0C30BFF1C99FEFDFFFFF1FFFFFFC03FF03FF8FFFF7FFFFFDFFF3807",
INIT_21 => X"3C190C19FFFFF5FFFFFFC03FF81FF8307F7FFFF7EFFF3C001CFEFFF9C16C1287",
INIT_22 => X"FFFFE03FF80FFE807E7FFFFFF7E71F07CCFFFFFCC0F411863F1FFF06F083CBFF",
INIT_23 => X"7EF07FFF77E39F8FE1EF3FFE63F835CC3F8FFE12008F17FE7C7FC013FFFFEDFF",
INIT_24 => X"FFEFDFFF61EE64780EDFFE338EFF57FC4CCFC027FFFFDDFFFFFFF03FF00FFFE4",
INIT_25 => X"E67FFF07FFFFF7F8CFDFC76FFFFFDDFFFFFFF83FF00F80FC7DF01F3F7BF19FDF",
INIT_26 => X"CCFFDFEFFFE7BDFFFFFFFC3FF00F00F8187E001F3DFE0FDF9FFF67FF39E3C43F",
INIT_27 => X"FFFFFF7FF03F87FC183FC00F3DFE0FCF93FDBDFF8C00CC3FF66FE75F07F3EFF8",
INIT_28 => X"3FE398033CFF8FEFFFFFFF3FE433C87FF2430E037803AFF19DC61FCFFFE2FCFF",
INIT_29 => X"FFFFFFCFF23F90FFC3C33E0B1C123FE33F0F1CCFFF9DE33FFFFFFFFFF1FFFFFE",
INIT_2A => X"8383FFFFC03B5FE31C1FFC8FFF7FDD9FFFFFFFFFF9FFFFFC3FF1FC033E7FDFEF",
INIT_2B => X"8C1F788FFF7FBE6FFFFFFFFFFE043FF83FF1FF031E1FDEE7FFFFF1F7F99C18FF",
INIT_2C => X"FFFFFFFFFFF39FF03FFCFFDF1C03CE46BBFF3733FCC1FDFF0F87F7FF1E7B5FE3",
INIT_2D => X"7FFE7FFFFD810C323BFF17C3FF61F3FF1F8FE3FE0675BFE3CD3F3C9FFCFFBF27",
INIT_2E => X"11FF1BF1DF218FFF3EDFC27E7765BFE3CB3BFC9FF8FF7FC3FFE01BFFFFFFCFE0",
INIT_2F => X"3FFF83C0772FBFE7923FEC9FF9FF7FE9FFF800FFFFFFCFF1FFFF0FFFFE1E207B",
INIT_30 => X"607FE4BFFDBFFFEDFFFF341FFFFFCC63FFFFF7FFFE3F383FC03F1DFFEF399FFF",
INIT_31 => X"F0FFC7E07FFFE00FFFFFFBFFFCFFBC3E603FFEFFFE3DBFFF1FFF03983262BFE7",
INIT_32 => X"FFFFFDFFFDFFDCDF32BDFFBFFF0E9FFF0FFF071C34D13FF3D8FFE5BFFB5EFFE7",
INIT_33 => X"FCBCFBCFFFC39FFF0FFFBF1F00917FF3D9FFE5BFE31EFFF7F8FFE7FF07FFF7FF",
INIT_34 => X"8FFFFF9FE3A17FF1D93FFDBFEC3DFFF7FFFFF9FFFBFFFFFFFFFFFEFFFCFFE667",
INIT_35 => X"D33C7F3FC83BFFE7FCEFFCFFFC3FFFFFFFFFFFFFFEFFFB700FB4F873FFF19FFF",
INIT_36 => X"FC07FEFFFFCFFFFFFFFFFF7FFF7FFDBF8FB6F8F9FFFCDFFF1FE07F8FF7417FF9",
INIT_37 => X"FFFFFFBFFF9FFEBFE7B3FEBCFFFE4FFE1FE06F9FF0417FF8D33CDE3FD23BFFEF",
INIT_38 => X"F3FF9E3E7FFF67E0CFE06F9FE0C1FFFC433FDE3FD2BFFF8FFE01FF3FF7FBFF3F",
INIT_39 => X"EFC07F1FE081FFFE73FFCE3FD077FF1F8F04FFDFFFFCFDCFFFFFFFDFC3CFFEDF",
INIT_3A => X"7FFFCC7F9177FF1F80007FEFFFFF33EFFFFFFFEFC3EFFFEFF9EF1FF91FFE73C3",
INIT_3B => X"80013FF61FFF8FE7FFFFFFFBE3EFFFEFFDE017FCCFFCD88FEF0C503FE183FFFE",
INIT_3C => X"FFFFFFFD71F3FF77FDF0C7FFC7FCD87FE71CF0FFE1C9FFFC7FFFCCFFBA2FFE7F",
INIT_3D => X"FCC0E7FFC07F78FFC7FFE1FFEBF2FFFC7FFFF8FFBACFFCC78007DFF8EFFFFFF0",
WRITE_MODE_B => "WRITE_FIRST",
INIT_3E => X"87FFE7FFEE72FFFCFE3E71FFBABFFCC7FE03CFFEF7FFF8F81FFFFFFC99F9FF7F",
SIM_COLLISION_CHECK => "NONE",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3F => X"FC3E23FF58BFF887FFF8F7FFF8E7F87FEFFFFFFECEFCFFBBFF78E7FCE07F91FF"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena,
ENB => BU2_N1,
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta19,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_20_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_21_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
SRVAL_A => X"0",
SRVAL_B => X"0",
INIT_00 => X"FFFE3BFFFF3DF81FF3FFFFFF7EFE7FBBFF1DE7FC787F87FE03FFCFFFE6B6FFFC",
INIT_01 => X"FDFFFFFF9E1F3FDDFF87E7FE187FFFFC033E1FFFF3C5FFFCEC7C0FFF517FF383",
INIT_02 => X"FFF7EF8F0F00FFF8031C3FFFF88DFFFCCC6C1FFF517FC7B3FFFF8DFFFFFE7F07",
INIT_03 => X"00007FFFF90BFFFCCC6C3FFFE2FFCCF7FFFFFBFFFFFF3F003E7FFFFFCB1C9FE1",
INIT_04 => X"FCFC7FFEE6FFC8F7FFFFFFFFCFFF9FC01F9FFFFFCCFCCFFFFFF3EFC7FF00FFF8",
INIT_05 => X"FFFFFFFFC7BF8FFF8FEFFFFFC7FC4FFFFFF36FE63F80FFF001807FFFF10BFFFC",
INIT_06 => X"F9F3FFFFF19E63FFFFF3BFE60003F3F000007FFFF20BFFF8FEFEFFFDCFFFCCC3",
INIT_07 => X"FFF9FFE3000107E002007FFFE617FFF8FFFEFFFDE5FFCCC7FFF73FFFE77FC7FF",
INIT_08 => X"06007FFF8C37FFF8FCFEFFFDE7FF880FFE00007FF1FFC107FC7CFFFFF8CFF9FF",
INIT_09 => X"F87CFFFBEBFF187DFC00000471FF87FC7C3F3FFFFC43C4FFFFF8FF3308000FE0",
INIT_0A => X"C000000031FE07FF9F7FEFFFFE31E27FFFF80C1F3C001FE00C007FFF3C2FFFF9",
INIT_0B => X"E3FFF9FFFF8CE13FFFF804CFFFFE0FE00C007FFC7C5FFFF9F8F1FFFACFFE7861",
INIT_0C => X"FFFFF0ECFFFFE3E00C007FF3FC5FFFF9C3E1FFFA57FEF0C18000010001FCE7FF",
INIT_0D => X"1800FFF7FC5FFFF9C3E3FFFE67FCF0DF800001F000FCF7FFFCFCFE3FFFE6309F",
INIT_0E => X"E1E7FFF5FFFCF09F800FFFF8C030E7FFFF78718FFFF31C67FFFFFC08FFFFF3C0",
INIT_0F => X"800007F80000E7FFFFBD804FFFF89C30FFFFFE13CFEFFBC03800FFE7FCBFFFF9",
INIT_10 => X"FFCFC027FFFE663F3FFFFC9FDFC7FB806000FFE708BFFFF1C1E7FFEE5FFC63BF",
INIT_11 => X"1FFFFC8F8FC3F9806001FFE0097FFFF1C1CFFFE85FF9FF3F8000000000009FFF",
INIT_12 => X"E003FFF0597FFFE1FF9FFFEA7FFDFE7F8000000000007FFFFFFC8019FFFF181F",
INIT_13 => X"FF3FFFD2BFF9E0FF800000000000FFFFFFFF7F843FFFCCCF8FFFFC071FC0FC00",
INIT_14 => X"800000000001FFFFFFFF87031FFFC673E00FFC071FC07C00E007FFFF9A7FFFE1",
INIT_15 => X"FFFFFB80CFFFE3207FE7F80739E01E00C1DFFFFFBEFFFFE1DC7FFFD6BFF9C3FF",
INIT_16 => X"FFE3F00FFBE0C00087FFFFFFBEFFFFE1387FFFA7BFFBC7FFC00000000003FFFF",
INIT_17 => X"07CFFFFFBDFFFFC000FFFFAFBFFB9FFFC0000003E001FFFFFFFFFC3031FFF8C0",
INIT_18 => X"01FFFFAFBFFB9FFFC0000001F000FFFFFFFFFFC80C7FFE43FFE7F88FFFE0FC00",
INIT_19 => X"E000000160000FFFFFFFFFF3C31FFF3371C7FFCFFFE03E010787FFFFB9FFFF80",
INIT_1A => X"FFFFFFFC61C7FF9FB00FFFCFFFE41E001F067FFF93FFFF8007FFFF6FBFF39FFF",
INIT_1B => X"F81FFFC7FBE40E001F003FFF27FFFF000FFFFFCF7FE73FFDE000000008C007FF",
INIT_1C => X"3F003FFF27FFFF001FFFFE9B7FCCFFFBE00000001FF807FFFFFFFFFF1C70FFC3",
INIT_1D => X"1FFFFD997FC3FFF7F0F800017FFE07FFFFFFFFFFC71E7FFCFC7FFF8321E61E00",
INIT_1E => X"F87FE003FFFF1CFE7FFFFFFFF1C307FE7E7FFF8101E63E0070003FFF6FFFFF40",
INIT_1F => X"1FFFFFFFFC60C3FF3F7FFFC180E73E0000023FFF4FFFFFC03FFFFD117FC7FFF5",
INIT_20 => X"9F3FFFE980733E0000023FFF1FFFFFC07FFFFF20FFCFFFEFF81FF01FFFFF0303",
INIT_21 => X"1FCCBFFF1FFFFFE0FFFFFA6DFFCFFF9FC000E03FFFF807FFCFFFFFFFFE3831FF",
INIT_22 => X"FFFFFA59FFDFFF5F8000007FFFF803FFE17FFFFFFF040CFF5FBFFFE0E07B3F00",
INIT_23 => X"8000007FFFF000E3F81FFF3FFFE3C33FE79FFFE0707BFF801FCC3FFE1FFFFFFD",
INIT_24 => X"FFF801EFFFF8E381F11FFFE07063FFC01FCC3FFE9FFFFFFFFFFFF651FFFFFCFF",
INIT_25 => X"F80FFFE73063FFC01FD8FFFC9FFFFFFFFFFFE4B1FFFFFB9D8001007FFFE0C067",
INIT_26 => X"3FDBFFFCBFFFFFFFFFFFE933FFFFE7F38001003FFFE0603F80FFE777FFFE1EF8",
INIT_27 => X"FFFFDB63F9FFDF8F8000D01FFF00003DC0F07E7BFFFFC60E7C07FFDFB803FFC0",
INIT_28 => X"80003C07FF0003FFFFF8027BFFFFF9070007FFFFBC03FFC0FF9BFFF8BFFFFFFF",
INIT_29 => X"FFF006387FFFF8C3C303FFFFBE03FFC3FFB9FFF1BFFFFFFFFFFFBB63E0FF3F3F",
INIT_2A => X"F3C1FFFF3E7FFF87FFBDFFF3BFFFFFFFFFFFB6E7C0FEF87F80003C07FC38F3EF",
INIT_2B => X"FFB9FFE33FFFFFFFFFFF6CE7C0FCE7FF8000000FFCF067FFFFF7E60E3FFFFC7C",
INIT_2C => X"FFFEFDFFE1FC1FFFFFC0000FFCF13E07FFFFE3C307FFFF9FF9E0FFFF7E7FFF07",
INIT_2D => X"FFE0000FFDF1E607FFE7F3F9FBFFFFC7C4E039FEFF7FFF03FF3DFFC73FFFFFFF",
INIT_2E => X"014007FFCDFFFFF3E33001FDFF6FFF83FF3EFF073FFFFFFFFFFD7BFFFFFFFFFF",
INIT_2F => X"3F8000FBFE03FF83FF7E7F873FFFFFFFFFFB37FFFFFFFFFFFFF8003FFCF1FE06",
INIT_30 => X"7F3F3F873FFFFFFFFFF227FFFFFFFFFFFFFC003FFEE3FF0C000101FF867FFFF8",
INIT_31 => X"FFF7EFFFFFFFFFFFBFFFFE7FFE078FFC380383C0033FFFFE0EE081F3FE187FFF",
INIT_32 => X"83FFFFFFFF0106F07C3F8FE000C7FFFF033801F7FFF07FFC1F3F9F3E3FFFFFFF",
INIT_33 => X"3EFF8FF0FC73FFFFF8FC0DE7FFE0FFFC1F1F9F7E3FFFFFFFFFE7CFFFFFFFFFFF",
INIT_34 => X"FE3C0C400F1FFFFD878FDC7E7FFFFFFFFFCF9FFFFFFFFFFF803FFE07FF007C1F",
INIT_35 => X"4303CC7C7FFFFFFFFF9F7FFFFFFFFE3F801FFE017F077C1F01FD81F0F81CFFFF",
INIT_36 => X"FF3CFFFFFFFFF81FE01FFE000F030F0F81E0E07FF0073FFFFF041E00C43FFFFC",
INIT_37 => X"FC0FFF800003FBFFFFE0FE7FFC9FDFFFFFF03F03C91FFFFE00000E647FFFFFFF",
INIT_38 => X"FEA0F9EE8FFFEFFFFFFCFFC01E007FFF80000E24FFFFFFFFFE21FFFFFFFFE01F",
INIT_39 => X"FFFCFFE03F007FFFF0078C0CFFFFFFFFFC0FFFFFFFFFC03FFE0FFFFFF003FCFF",
INIT_3A => X"F803F08CFFFFFFFFF83FFFFFFFFF80FFF81FFFFFF0E7FE000FE6F7B80FFFF3FF",
INIT_3B => X"E07FFFFFFFFF1FFF803FFFFFF0FFFF0FFC7F253C310FFDFFFFF1FFFFFF071FFF",
INIT_3C => X"807FFFFFF0FFFFFFFFC1FDFC0007FDFFFFE5FFFF1F8F8F606003F00CFFFFFFFF",
INIT_3D => X"FFFCDE07FE03FE01FFE0FFFF3F9F8300F001E30CFFFFFFFF80FFFFFFFFFF7FFF",
WRITE_MODE_B => "WRITE_FIRST",
INIT_3E => X"3FF1FFFFFF8FC000F80007C9FFF7FFFF03FFFFFFFFFCFFFF83FFFFFFFCFFFFFF",
SIM_COLLISION_CHECK => "NONE",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3F => X"F8002FC9FFC7FFF807FFFFFFFFFFFFFFFFFFFFFFFCFFFFFFFFFEFEF3C380FFFE"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena0,
ENB => BU2_doutb(0),
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta20,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_21_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_22_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
SRVAL_A => X"0",
SRVAL_B => X"0",
INIT_00 => X"8FFFFFFFFFFFFFFFFFFFFFFFB67FFFFFFFFF39FEFCFF7FFF9FF1FFFC3F9FE000",
INIT_01 => X"FFFFFFFF177FFFFFFFFFC7FFFFCFFFFFE7E1FFFC3F1FE000FC007E4CFFEFFFF1",
INIT_02 => X"FFFFFFFFFFF07FF9F81FFFFC3FBFE000FC0004067FFFFFC73FFFFFFFFFFFFFFF",
INIT_03 => X"FFFFFFFE3F9FCC01FC010C0FBFDFFF8E7FFFFFFFFFFFFFFFFFFFFFFF073FFFFF",
INIT_04 => X"FC661C001FFFFF38FFFFFFFFFFFFFFFFFFFFFFFE03BFFFFFFFFFFFFFFFFFC1F9",
INIT_05 => X"FFFFFFFFFFFFFFFFFFFFFFF803BFFFFFFFFFFFFFFFFFFED8FFFFFFFE1F9F9C23",
INIT_06 => X"FFFFFFE0F33FFFFFFFFFFFFFFFFFFF7DFFFFFFFE3FDF3C31FE24180003FFFCE1",
INIT_07 => X"FFFFFFFFFFFFFF3FFFFFFFFF3FDE3C39FF243C07C1FFF9C7FFFFFFFFFFFFFFFD",
INIT_08 => X"FFFFFFFFFF9E7C387F283C07C1FFF01FFFFFFFFFFFFFFFF1F8FFFF01F83FFFFF",
INIT_09 => X"7E387807E1FFC43FFFFFFFFFFFFFFFC1A01FFE00FC3FFFFFFFFFFFFFFFFFFF9F",
INIT_0A => X"FFFFFFFFFFFFFF01E01FFC007C3FFFFFFFFFFFFFFFFFFFE1FFFFFFFFFFCE3C78",
INIT_0B => X"801FF8001E0CFFFCF0671FC0FFFFFFFE3FFFFFFFFFC01C717878F007FF0700FF",
INIT_0C => X"FF3FC00200FFFFFFCFFFFFFFFFE008007C78F00FFF3087FFFFFFFFFFFFFFFC01",
INIT_0D => X"F7FFFFFFFFF00080FCF8F00FFF381FFFFFFFFFFFFFFFC003800FF1023E7F7FF9",
INIT_0E => X"FCFDF00FFF107FFFFFFFFFFFFFFFC3F38003F78F7EFF0003FE803FFFF807FFFF",
INIT_0F => X"FFFFFFFFFFFFFFEF80000FFFFEFFFFFFFFC47CFF03FCFFFFFBFFFFFFFFC081F1",
INIT_10 => X"80007FFFFCFFFFFFFFFBD80001FE7FFFFBFFFFFFFF8181F301FDF01E7E01FFFF",
INIT_11 => X"FFF0003FFC007FFFF3FFFFFFFF0FC3F201FFF01FF807FFFFFFFFFFFFFFFFFF9F",
INIT_12 => X"E7FFFFFFFF0FE7E701FFF03FE03FFFFFC70FFFFFFFFFFE7F8000FFF839FFFBFF",
INIT_13 => X"C19FF01F807FFFFFC7FFFFFFFFFFF9FF8000FFE7C3FFFBFFFC0003E007FFFFFF",
INIT_14 => X"FFFFFFFFFFFFF3FF800FFFEFFFC760FF80007C01FFFFFFFFEFFFFFFFFF03F31F",
INIT_15 => X"801FF01FFF83E0FF001E01FFFFFFFFFFCFFFFFFFFF80F37FC19FF01F01FFFFFF",
INIT_16 => X"F363FFFFFFFFFFFF9FFFFFF9FF8678FFCF8FE00007FFFFFFFFFFFFFFFFFF8FFF",
INIT_17 => X"3FFFFFF0FF0FFDFFCF8FC0001FFFFFFFFFFFFFFFFFFE3FFF807FE1FFFF82000F",
INIT_18 => X"9F0FD0007FFFFFFFFFFFFFFFFFF1FFFFFFFFCFFFFF8307F7FE1FFFFFFFFFFFFC",
INIT_19 => X"FFFFFFFFFF87FF8FFFFF9FFFFFFFFFF903FFFFFFFFFFFFF9FFFFFFF0FE0FFFE7",
INIT_1A => X"FFFF9FFFFFFFFFCFFFFFFFFFFFFFFC0181FFFFF8FE007CF61F9FD800FFF30FFF",
INIT_1B => X"FFFFFFFFFFFFC3F01DFFFFFFFC63007C1F9FD807FFE00FFFFFFFFFFFFE3FF803",
INIT_1C => X"7E3FFFFFFE79001C1F1F900FFFF00FFFFFFFFFFFFC7FE001FFFF3FF9FFFFE07F",
INIT_1D => X"1F1DA47FFFF003FFFFFFFFFFF1FF0003FFFE3FF1FDFFE1FFFFFFFFFFFFFFBEF3",
INIT_1E => X"FFFFFFFF8FFC0007FFFCFFE1FFFFF9FFFFFFFFFFFFFC61E7FF9FFFFFFE3881C0",
INIT_1F => X"FFF8FFCFFFFFF9FFFFFFFFFFFF01878FFFDFFFFFFF3F84E01F1F6DFFFFF0007F",
INIT_20 => X"FFFFFE270EFF1E7FFFB8FFFFE07F84E0171F43FFFFF0007FFFFFFFF83FF01803",
INIT_21 => X"FF26FFFFEC7F8E80031E07FFFFE0007FFFFFFF8000103801FFE3FFDFFFF00FFF",
INIT_22 => X"073E1FFFFFC000FFFFFFFC001C000007FFC7603FFD9FFFFFFFFFFDF8F3F3FDFF",
INIT_23 => X"FFFCC000FF00000FFF87003FF1FFFFFFFFFFFB0FFF0103FFFC6EFFFFCC7F9E00",
INIT_24 => X"FF00003FEFFFFFFFFFFFF307FF0F0FFFF81EFFFFC07FFFE03F7E7FFFE00001FF",
INIT_25 => X"FFFFCFE3FC3E7FFFE07EFFFFC17FFFE03FE27FFC0FC301FFFFE00003FF80101F",
INIT_26 => X"C0FEFFFF003FFFE3BFE6FFF80F9FC1FFFFC0780FFFE3F03FFC02003F1FFFFFFF",
INIT_27 => X"FFFDFFFA267FFFFFFF0730FFFFFFF07FF80E00307FFFEF7FFFFF9FF070FE7FFF",
INIT_28 => X"800F01FFFFFFF0FFF07C000FFFFF001FFFFF33F801FCFFFF03FE003F011FFFF3",
INIT_29 => X"C0F8001FFFE07007FFFE78F00FF9FFFE07FFFE1F809FFF9B9FFBFFF200FFFFFF",
INIT_2A => X"FE78F990FFF7FFF9DFFBFE3F803FFFBBBFF7FF8603FFFFFF000007FFFFFFF0FF",
INIT_2B => X"BFF3FE7FC01FFFFB1FE3FF3C07FFFFFE00001FFFFFFFF1FFC3F0001FFFE1F003",
INIT_2C => X"BFE03F71FFFFFFF030003FFFFFFFFFFF8FE00007FF8FF807FC07F833FC6FFFF7",
INIT_2D => X"20007FFFFFFFFFFF9F800001FC7FFC0780FFD83FFFDFFFE57FC7F1FFC007E033",
INIT_2E => X"BF000001F3FFFC3C03FF803FDE3FFFEAFF87F3FF8003E007FFFFC307FFFFFFC0",
INIT_2F => X"1FFFBE3F18FFFFDCFF07F3FF8003F01FFFFFFBFFFFFFFC0000007FFFFFFFFFFF",
INIT_30 => X"FF07F7FF07067F1FFFFFF7FFFFFF00000C007FFFFFFFFFFFF80300FC4FFFFC7C",
INIT_31 => X"FC7FE7FFFFFE03C01C003FFFFFFFFFFF800701F81FFFF8F8FF3FFFFF1BFFFE39",
INIT_32 => X"7800BFFFFFFFFFFF873FC3F0FFFFF0F3FF1FF19D9BFFF8F7FF87F7FE071F7F0F",
INIT_33 => X"9FFFE7C1FFFFC187FFFF1E61B3FFF1AFFF1FE7FF07EFFC0FFC3FCFFFFFF80F00",
INIT_34 => X"FFFCFFFCE7FFE24FFC3FCDFFA78FFC1FFF1F9FFFFF80003FFE003FFFFFFFFFFF",
INIT_35 => X"FC7FD9FFB763F87FFFDF1FFFFE2003FFFE603FFFFFFFFFFFFFFFFF87FFFE0C1F",
INIT_36 => X"FF8FC01F0070FFF9FF703FFFFFFFFFFFFFFFFF0FFFFE7C7FFFF1FFFE1FFFE49F",
INIT_37 => X"FF301FFFFFFFFFFDFFFFFE0FFFF8F0FFFF87FFFFFFFFE83FFFFFDFFFF071E0FF",
INIT_38 => X"FFB7FE0FFFF3F0FFFC1FFFFFFFFF997FFFFF9FFFC060CDFFFF0FFFC00003FFF1",
INIT_39 => X"803FFFFFFFFE327FFFFF7FFF88E003FFFF0BFFE70023FFE0FF7C0FFFFFC0FFF9",
INIT_3A => X"FFFF4CFFBCE18FFFFF83880FE071FFC0FFFE0FFFFFC0FFF9FF1FFC1FFFE7F1FF",
INIT_3B => X"FF833FFFFC23FFC03FF61FFFFFC001F1FFBE083FFFDFE7FF007FFFFFFFFCC5FF",
INIT_3C => X"02E3FFFFFFE00021FFFC003FFFBFDFFE3EFFFFFFFFF90BFFFFFE887FB803CFFF",
INIT_3D => X"E7F800FFFF3F9FF87FFFFFFFFFFA17FFFFFC8A3FA00FEFFFFF9F3FFFFF03FFE0",
WRITE_MODE_B => "WRITE_FIRST",
INIT_3E => X"7FFFFFFFFFE427FFFFFD927FA39FEFFFFFFF1FFFFF80FFF00001FFF8FFC00001",
SIM_COLLISION_CHECK => "NONE",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3F => X"FFF9277F838FEFFFFFFF87FFFFE07FF00003FFF0FFE00001E3E001FFFE7F1FE0"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena1_2,
ENB => BU2_doutb(0),
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta21,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_22_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_23_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
INIT_3B => X"3FFCF3FFC00600007FBFFF07FFFFE1FFFFFFFFFFF80007FFFFFFFFFFFFFFFFFF",
WRITE_MODE_B => "WRITE_FIRST",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3A => X"FFE0FF001F81FFFF9FFCF1FFC00600007F7FFE07FFFFE3FFFFFFFFFFE007FFFF",
INIT_3E => X"FFFFFFFFFFFFFFFFF7E1FFF8E003FFDEFFF0E7F8F00200007FEFFF01FFFFE0FF",
SIM_COLLISION_CHECK => "NONE",
INIT_3C => X"7FDFFF03FFFFE0FFFFFFFFFFFE0101DFFFFFFFFFFFFFFFFFFBE4FF180703FFEF",
INIT_3D => X"FFFFFFFFFF836407FFFFFFFFFFFFFFFFF3E4FFF84003FFEEFFF8F3F9E0060000",
SRVAL_A => X"0",
SRVAL_B => X"0",
INIT_00 => X"FFFFFBFFFFFC7FF00003FFCFFFE00601FFC003FFFE7E3F007FFFFFFFFFD86FFF",
INIT_01 => X"0001FC1FFFE00E01FFE003FFFE7CF8007FFFFFFFFFA05FFFFFF22F3F8007CFFF",
INIT_02 => X"FFFC03FF3E7DF007FFFFFFFFFF40BFFFFFF22F3FD003DF7FF8FFB9FFFFFFFE00",
INIT_03 => X"FFFFFFFFFC833FFFFFF66F7FC3803F66F87F1DFFDFFFFC000001E07FFFE00C71",
INIT_04 => X"FFE4FFBFC780FFC67CFF2C80DFFFE180000000FFFFE001F9FE7803FC1E38F07F",
INIT_05 => X"7FFF8C1800000E00000003FF3C0007E1FE3000F81E03C3FFFFFFFFFFF302FFFF",
INIT_06 => X"00000FFE00000F81FF7000013E020FFFFFFFFFFFEC3DFFFFFFE8DFBFEFC3FF92",
INIT_07 => X"FEF000033E0C1FFFFFFFFFFFD83BFFFFFFE89FB3FEE7FFBA7FFFCC0000000000",
INIT_08 => X"FFFFFFFFB837FFFFFFD13FB8FF63FFBADFF9FDFF030007FE07047FFE00000401",
INIT_09 => X"FFD27FA0FEE07F7A5FF67BFF0FC03FFE0E0FFFFF00000007FFF000077FFCFFFF",
INIT_0A => X"FFE77FFE07C1FFFEC70FFFFF00000007FFE00007FFF8FFFFFFFFFFFF7A2FFFFF",
INIT_0B => X"E70FFFFF00000001FFE00006FFFCFFFFFC81FFFEFCFFFFFFFF90FF88DEFC1F7A",
INIT_0C => X"FFC0018EFFFDFFFFF801FFFCFFDFFFFFFFA5FF81FFFE7CFBEFC0FFF00003F7FF",
INIT_0D => X"F0C3FFF9FFBFFFFFFF25FFCFFFE77DFBCF00FFC00307E3FFE78FFBFF80000001",
INIT_0E => X"FF4BFFCF9FEE7BFB0E008FC0000FE3FFCF83FFFF80000001FFC01FFEFFF3FFFF",
INIT_0F => X"8EE02780001FC3FFCE003FFF00000001FF803FFC13E7FFFFC283FFFB9FBFFFFF",
INIT_10 => X"DC001FFF00000001FF80FFFE7C07FFFFC387FFE7DF7FFFFFFF4BFFDF8FFE33F9",
INIT_11 => X"FFE3FFFFFE0FFFFF0107FFDF1EFFFFFFFF87FFBFC3FE37FC86F3F78000FF83FF",
INIT_12 => X"068FFF3E3DFFFFFFFE97FFBFE3FE6FFCC6FFF9E801FE01FF3C1E0FFF00000001",
INIT_13 => X"FE97FFBFF7FF6FFE4EFFFCFF00FE00FC7E1E3FFF00000001FFE7F1FFFFFFFFFE",
INIT_14 => X"4FFFFE7F007F0073FC1FFFFFC0000001FFFFE07FFFF003F87E1FE07C7DFFFFFF",
INIT_15 => X"FE0FFFFFE0000001FFFFE07FFFC701F3F83FCFF8FBFFFFFFFC9FFF3FFFEFEFFE",
INIT_16 => X"FFFFF1FFFF3F8007F87FBFF9F7FFFFFFFD2FFE3FFFFFE7FF4F3FFF7F001FC000",
INIT_17 => X"F87FBFF9EFFFFFFFFD2FFE7FFFF807FF4F8FFF3F800FF000EC04FFFFF0000001",
INIT_18 => X"FD5FFCFF1FF007FF4FC7FF3F8007FCF040183FFFF0000001FFFFFFFFFF7FCFFF",
INIT_19 => X"4FE7FF2FE003FFFC00107F7FF8000001FFFFFFFFFEFFFFFFE3FF7FFFCFFFFFFF",
INIT_1A => X"C0007E3FFC180001FFFFFFFFFC3FFFFFCFFEFFFFBFFFFFFFFD5FFC7B0FE007FF",
INIT_1B => X"FFFFFFFFFC0F07FF9FFDF03F7FFFF1FFF9BFF8339FE187FF6FF3FF07E188FFFF",
INIT_1C => X"BFFBF81EFFFF85FFFBFFFC33F9E1C3FFADF9FF0101E03FFFE000FC0FFFFE001F",
INIT_1D => X"FF7FFE3FF1C1C1FFB079FF0000721FFFF0000003FFFF007FFFFFFFFFFC0007FF",
INIT_1E => X"D079FF00003C9FFFFF000000FFFFE03FFFFFFFFFFFFFE1FF3FF7F8FEFFFE13FF",
INIT_1F => X"FF00007083FFE03FFFFFFFFFFFFFE3FCFFE7F0FDFFF837FFF7FFFE3FF1C1C1FF",
INIT_20 => X"FFFFFFFFFFFF03FDFFCFFBF9FFF1F7FFF6FFFE3C3003C1FFD279FF7B001E0FFF",
INIT_21 => X"FF9FFFF7FFF0F7FFFFFFFFBEF007C3FFEFFBFE7D00070FFFFF0000FFC07FF81F",
INIT_22 => X"EDFFFFDFF787C3FFEFFBFC7DE00387FFF80000FFFC1FF81FFFFFFFFFFF8003E3",
INIT_23 => X"F7FBFC7E0001C3FFF00000FFFFFFF80FFFFFFFFE7F8007E3FF7FFFF7FFE1E3FF",
INIT_24 => X"F800007FFFFFFC0FFFFFFFFE3F80200E7EFFFFEFFFE1C3FFFDFFF9DFF7CFC3FF",
INIT_25 => X"FFFFFFFC1FC07C7E7DFE3FDFFFC7C7FFDDFFE18F17DFC3FFFFFB7CFF0000E4FF",
INIT_26 => X"3DFF9F9FFF8FE7FFDBFFEC1E03FFE3FFFBFD00FF8000F23FFC00003FFFFFFE0F",
INIT_27 => X"BBFFDFFC00FFC1FFFB9D00FF80007B1FFF00F83FFFFFFF1FFFFFFFFF3F81FFF8",
INIT_28 => X"FD9E804FC0083C0FFFC9FC7BFFFFFFFFFFFFFFFFFF83FFF03BFFFFBFFF9FCFFF",
INIT_29 => X"FFFFF8F87FFFFFFFFFFFFFFFFF03FE0007C7FF7FFF3FCFFFBBFFBFCC381FC1FF",
INIT_2A => X"FFFFFFFFE307FC6007C3FF7FFF3FCFFFF7FF3F0CF80FD0FFFDFA800FC0003E07",
INIT_2B => X"03F7FEFFFE7F9FFF77FE3C0EF807B07FFEEFC00FF0003E07FFFFF9F87FFFFFFF",
INIT_2C => X"F7FE1F0FF807B07FFEEF600FFC003E03FFFFF9B87FFFFFFFFFFFFFFFE3BFFC00",
INIT_2D => X"FF7F2007FE01FF03FFFFF9107FFFFFFFFFFFFFFFFFFFFE0003FFFCFFFEFF3FFF",
INIT_2E => X"7FFFF9007FFFFFFFFFFFFFFFFFFFFC0001FFF3FFFEFF3FFEEFFE8FDFF803B8BF",
INIT_2F => X"FFFFFFFFFFFFF8300DFFF7FFFDFF7FFFEFFFCFFCF033BF3FFF7FA007FF01FF83",
INIT_30 => X"1C01F7FFFBFA7FFDCFFFDFFC603FDE3FFFBFC003FF80FFC27FFFF0003FFFFFFF",
INIT_31 => X"DFFFDFF8001FDE3FFF9FC003FFC4FFF03FFFF8003FFFFFFFFFFFFFFFFFFFF0F8",
INIT_32 => X"7FDFF017FFC07FF81FFFFF003FFFFFFFFFFFFFFFFFFFE1FC1C00A7FFF3FAFFFD",
INIT_33 => X"0FFFFF803FFFFFFFFFFFFFFFFFFFC3FC3C008FFFC7FCFFFFBFFF9FE3400FDE1E",
INIT_34 => X"FFFFFFFFFFFFCFFE3C01CFFF9FFCFFFBBE7F3F876007DA0C79DDF83FFFC03FF8",
INIT_35 => X"3C00DFFF9BFDFFFB60FE7F076007D81C38DFF81FFFE01FFE0FFFFFE01FFFFFFF",
INIT_36 => X"18FC7EFF6D0FC81C391FF81FFFF01FFF0FFFFFF807FFFFFFFFFFFFFFFFFF9FFE",
INIT_37 => X"7DFFFC0FFFFC0FFFCFFFFFFE00FFFFFFFFFFFFFFFFFF7FFF3C009FFF3FF1FFF7",
INIT_38 => X"EFFFFFFF803FFFFFFFFFFFFFFFFFFFFF3C003FFC3FC9FFF713FCFCFF2C07C008",
INIT_39 => X"FFFFFFFFFFFFFFFF7DC07F083BD9FFF78FFCF9FF0507C0007EFFFC2FFFBE07FF",
INIT_3F => X"EFC1FFF0F803FFFDFFF04FFC300000003FEFFF01FFFFE0FFFFFFFFFFFFC07E01"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena12,
ENB => BU2_doutb(0),
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta22,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_23_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_24_ram_r_v2_init_ram_dp2x2_ram : RAMB16_S2_S2
generic map(
WRITE_MODE_B => "WRITE_FIRST",
WRITE_MODE_A => "WRITE_FIRST",
INIT_B => X"0",
INIT_A => X"0",
SIM_COLLISION_CHECK => "NONE",
INIT_3E => X"7FFFFEAAAAAAAAAFFFFFFFFFFFFFFFFAAAAAABFFFFFFFFFFFAAFFFFFAAAAAFEA",
SRVAL_A => X"0",
INIT_3D => X"9556ABFFFFF955BFFFFFFFFEAFFFFFFFFFFFFFFFFFFFFFFEAAAAABFFFFFFFFFF",
INIT_3C => X"FFFFFEAAFFFFFFFFFFFFFFFFFFFFFFFD7FFFFFEAAAAAAAABFFFFFFFFFFFFFFFA",
INIT_3B => X"AAA9ABFFFFFFFFFFFAAFFFFFEAAAAFAA9556AAFFFFF955BFFFFFFFFFFFABFFFF",
INIT_3A => X"FFFFFFFFFFFFFFFAAAAAAFFFFFFFFFFFFFFFFEABFFFFFFFFFFFFFFFFFFFFFFFD",
INIT_39 => X"7FFFFFFAAAAAAAABFFFFFFFFFFFFFFFAEAAAABFFFEFFFFFFFAAABFFFEAAAAFEA",
INIT_38 => X"A556AABFFFFE55BFFFFFFFFFFFABFFFFFFFFFFFFFFFFFFFAAAAAAFFFFFFFFFFF",
INIT_37 => X"FFFFFFFFFFFAFFFFFFFFFFFFFFFFFFFD7FFFFFEAAAAAAAABFFFFFFFFFFFFFFFA",
INIT_36 => X"EAAABFFFFABFFFFFEAAABFFFEAAAABFAAA5AAAFFFFFE55BFFFFFFFFFFFABFFFF",
INIT_35 => X"FFFFFFFFFFFFFFEAAAAAAFFFFFFFFFFFFFFFFFFFFFFAFFFFFFFFFFFFFFFFFFFD",
INIT_34 => X"7FFFFFAAAFAAAAABBFFFFFFFFFFFFFFAAAAAFFFFFABFFABEAA96AFFFEAAAABFE",
INIT_33 => X"AAAAABFFFFFE55BFFFFFFFFFAFABFFFFFFFFFFFFFFFFFFAAAAAAAFFFFFFFFFFF",
INIT_32 => X"FFFFFFFFFFFEBFFFFFFFFFFFFFFFFFFD7FFFFFAAAFFAAAABAFFFFFFFFFFFFFFA",
INIT_31 => X"AAABFFFFFEAFFFFEAA96ABFFFAAAFFFFAAAAAAFFFFFF55FFFFFFFFFEAAABFFFF",
INIT_30 => X"FFEAFFFFFFFFFFAAAAAAAFFFFFFFFFFFFFFFFFFFFFFFBFFFFFFFFFFFFFFFFFFD",
INIT_2F => X"7FFFFFEAABFEAAAAFFFFFFFFFFFFFFFEAAAFFFFFFAABFFFAAAA59BFFFAABFFFE",
INIT_2E => X"AAAAAAFFFFFF96FFFFFFFFFAAAAFFFFFFFEAFFFFFFFFFEAAAAAAAFFFFFFFFFFF",
INIT_2D => X"FFFFFFFFEFFFFFFFFFFFFFFFFFFFFFFD7FFFFFEAEBFEAAAABFFFFFFFFFFFFFFF",
INIT_2C => X"AAAFFFFFFAAAAAFAAAA55BFFFA9BFFFEAAAAAAFFFFFF95FFFFFFFEAAAAAFFFFB",
INIT_2B => X"FFFFFFFFFFFFFAAAAAAAAFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFD",
INIT_2A => X"7FFFFFFAEBFFEAAAFFFFFFFFFFFFFFFFAAABFFFFFAAAAAAAAAA56BFFFA56FFFF",
INIT_29 => X"EAAAAABFFFFF95BFFFFFFAAAAABFFFEBFFFFFFFFFFFFEAAAAABAAFFFFFFFFFFF",
INIT_28 => X"FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFD7FFFFFFFFAFFEAAABFFFFFFFFFFFFFFF",
INIT_27 => X"AAABFFFFFEAAAAAAAAA9AFFFFE56FFFFFAAAAABFFFFF95BFFFFFEAAAAAAFEAAA",
INIT_26 => X"FFFFFFFFFFFFE6AAAAFAAFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFD",
INIT_25 => X"7FFFFFFFFAAFFEAAAFFFFFFFFFFFFFFFAAABFFFFFAAAAAAAAAAAAFFFFE96FFFF",
INIT_24 => X"FAAAAABFFFFF95BFFFFFEAAAAAAAAAAABFFFFFFFFFFFA6AAAAFEAFFFFFFFFFFF",
INIT_23 => X"FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFD7FFFFFFFFEABFEAAAFFFFFFFFFFFFFFF",
INIT_22 => X"EAAAFFFFFAAAAAAAAAAAAFFFFF96FFFFFEAAAAAFFFFFD5BFFFFFAAAAAAAAAAAA",
INIT_21 => X"BFFFFFFFFFFF96AAAAFEAFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF9",
INIT_20 => X"7FFFFFFFFEABFFAAAFFFFFFFFFFFFFFFEAAAFFFFFAAA6AAAAAAAAFFFFFE6FFFF",
INIT_1F => X"FFAAAAABFFFFE5BFFFFFAAAAAAAAAAAAAFFFFFFFFFFE5AAAAAFFFFFFFFFFFFFF",
INIT_1E => X"FFFFFEFFFFFFFFFFFFFFFFFFFFFFFFA97FFFFFFFFFABFFFAABFFFFFFFFFFFFFF",
INIT_1D => X"FAAABFFFFA955AAAAAAAAFFFFFE5FFFFFFEAAAABFFFFE5BFFFFFAAAAAAAAAAAA",
INIT_1C => X"ABFFFFFFFFFE5AAA6AFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFAA9",
INIT_1B => X"7FFFFFFFFFFFFFFEABFFFFFFFFFFFFFFFBEAAFFFFA555AAAAAAAAFFFFFF5BFFF",
INIT_1A => X"FFEAAAAAFFFFF9BFFFFEAAAAAAAAAAAAABFFFFFFFFF96AAAAAFFFFFFFFFFFFFF",
INIT_19 => X"FFFFFFFFFFFFFFFFFFFFFFFFFFFFEA557FFFFFFFFFFFFFFFABFFFFFFFFFFFFFF",
INIT_18 => X"FFEABFFFFAA556AAAAAAAFFFFFF5BFFFFFEAAAAAFFFFF9BFFFFEAAAAAAAAAA9A",
INIT_17 => X"ABFFFFFFFFF9AAAAABFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFAA55",
INIT_16 => X"7FFFFFFFFFFFFFFFEAFFFFFFFFFFFFFFFFEABFFFFA555AAAAAAAABFFFFF97FFF",
INIT_15 => X"FFEAA9AAFFFFF9BFFFFAAAAAAAAAAA96ABFFFFFFFFE5AAAAABFFFFFFFFFFFFFF",
INIT_14 => X"FFFFFFFFFFFFFFFFFFFFFFFFFFFAA5557FFFFFFFFFFFFFFFFAFFFFFFFFFFFFFF",
INIT_13 => X"FFEAAFFFFEAAAAAAAAAAABFFFFFD6FFFFFEAAAAAFFFFF9BFFFEAAAAAAAAAAA95",
INIT_12 => X"ABFFFFFFFFE6AAAAAAFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFA5569",
INIT_11 => X"7FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEAABFFFFFAAAAAAAA9ABFFFFFE5BFF",
INIT_10 => X"FFFAAA9AFFFFF9BFFFAAAAAAAAAAAA95AFFFFFFFFF96AAAAAAFFFFFFFFFFFFFF",
INIT_0F => X"FFFFFFFFFFFFFFFFFFFFFFFFFFE956A97FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
INIT_0E => X"FFFAAAFFFFFEAAAAAAA56BFFFFFE5BFFFFFEAA5ABFFFFDBFFFAAAAAAAAAAAAA5",
INIT_0D => X"BFFFFFFFFE56AAAAAABFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEA55AA9",
INIT_0C => X"7FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFAAAAFFFFFEAAAAA956BFAFFFF96FF",
INIT_0B => X"FFFFAA55BFFFFDBFFEAAAAAAAAAAAAA5BFFFFFFFFA56AAAAAABFFFFFFFFFFFFF",
INIT_0A => X"FFFFFFFFFFFFFFFFFFFFFFFFFA55AAA97FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
INIT_09 => X"FFFAAAAFFFFFFAAAAA55ABFBFFFF95BFFFFFEA55BFFFF9BFFAAAAAAAAAAAAAAA",
INIT_08 => X"BFFFFFFFE9555AAAAABFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEAAAAAA5",
INIT_07 => X"7FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFAAABFFFFFAAAA955AABFFFFFE57F",
INIT_06 => X"FFFFFAA5AFFFF9BFEAAAAAAAAAAAAAAABFFFFFFF956A5AAAAEBFFFFFFFFFFFFF",
INIT_05 => X"FFFFFFFFFFFFFFFFFFFFFFFFAAAAAA997FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
INIT_04 => X"FFFFAAABFFFFFAAA955AAABFFFFFE56FFFFFFEA5ABFFFAFFAAAAAAAAAAAAAAAA",
INIT_03 => X"BFFFFFFA556A6AAABFFFFFFFFFFEFFFFFFFFFFFFFFFFFFFFFFFFFFFAAAAAA699",
INIT_02 => X"7FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEAAABFFFFFEAA556AAAAFFFFFE55B",
INIT_01 => X"FFFFFFA9ABFFFEFAABEAAAAAAAAAAAAAAFFFFFE55555AAAAFFFFFFFFFFEABFFF",
INIT_00 => X"FFFFFFFFFFFFFFFFFFFFFFEA96AAA6A97FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
SRVAL_B => X"0",
INIT_3F => X"FFFFFFFFFFFFFFFFAAAAABFFFFFFFFFFFFFFFEAAFFFFFFFFFFFFFFFFFFFFFFFD"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena13,
ENB => BU2_doutb(0),
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(1) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(1) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(1) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta23(1),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta23(0),
DOB(1) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_24_ram_r_v2_init_ram_dp2x2_ram_DOB_1_UNCONNECTED,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_24_ram_r_v2_init_ram_dp2x2_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_25_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
INIT_A => X"0",
INIT_3C => X"FFFFFFFE0E0FFF8FFE0000003FFF07FFF8E30FFFFE00FFFF800003FFC01FFF80",
INIT_32 => X"FFFFFE0003FFE3E0C002007FFFF07FFFF000F8FFFBE0FFFC3F00187FFC01FFF8",
INIT_2E => X"000007FFFFC07FFFC0203C01F8F87FFC07C0007FFF00FFFE7FFFFFFFFFFFF01F",
INIT_38 => X"FC000001FFFF9FFFF01F807FFF00FFFFBC0001FFE007FFF07FFFFFC00007FFFF",
INIT_0F => X"000000003FFFFFFFC1E00000070000040000000000F8FFFFFC00000007FFFFFE",
INIT_13 => X"7FFFFFFFFFFFFFFC000000007FFFFFFFFFFF00000000801000000000007FFFFF",
INIT_35 => X"3C0000FFF007FFF87FFFFF0003FFFFFFFFFFFF0001FFFCFFF003000FFFFE7FFF",
INIT_10 => X"FFF00000070000000000000000FFFFFFFC0000000FFFFFFE7FFFFFFFFFFFFFF0",
INIT_1C => X"F3C00001FFFFFFFE7FFFFFFFFE0FE7FFFE0000007FFFFFFFFFFFFF8000F9E0F0",
INIT_37 => X"FFFFFFC0007FFF7FF8000003FFFFBFFFE01F807FFF80FFFF3C0001FFE007FFF0",
INIT_27 => X"7FFFFFFFFFC07803FFC0000003FFFFF0000003FFF00003FFF8100000F80C1FFF",
INIT_28 => X"FFFC000003FFFFF0000000FFF80007FFFC3C0000FFFC1FFE0038003FFFFF03FE",
INIT_1F => X"FF03FFF8003FE1E7C000007C003807FFF3E00003FFFFFFFE7FFFFFFFFF0003FF",
INIT_20 => X"E00000F8003C07FFE3E00003FFFFFFFE7FFFFFFFFFC007FFFF8000003FFFFFFF",
INIT_B => X"0",
INIT_0D => X"FC00000007FFFFFE7FFFFFFFFFFFFFE0000000001FFFFFFF800000000E030000",
INIT_1E => X"FF8000007FFFFFFFFF0FFFF0007FE1E38001003E003807FFF3C00003FFFFFFFE",
INIT_1B => X"C0000007007FFFFFF3E00000FFFFFFFE7FFFFFFFFE0FFFFFF80000007FFFFFFF",
INIT_23 => X"FF0000000FFFFFF01E00FFFF8007C3FFC00001FC00700FFF8380000FFFFFF3FE",
INIT_30 => X"1F80187FFE00FFF27FFFCBFFFFFFF39FFFFFF80001FFC7C0000003FFFFC07FFF",
INIT_2B => X"03E0007FFF807F9E7FFFFFFFFFFBC007FFFE000001FFFFF800000E0FFE0007FF",
INIT_1D => X"7FFFFFFFFE038FFFFE0000007FFFFFFFFFDFFFE0007DE0F08000000F007DE7FF",
INIT_0A => X"000000001FFFFFFF000000000C0380000700000000FFFFFFF800000007FFFFFE",
INIT_29 => X"0000003FFC000FFFFC3C0000FFFC1FFC00F0003FFFE21CFE7FFFFFFFFE000001",
INIT_26 => X"0000001FFFFFC3FE7FFFFFFFFFF0FF07FF80000003FFFFE000001FFFC00003FF",
INIT_04 => X"7FFFFFFFFFFFFF00F80007800FEF0000000000003E07C3F0000FC00003FFFFFF",
INIT_14 => X"000000007FFFFFFFFFFFC00000F3E01800000000007FFDFFFC0000000FFFFFFE",
INIT_3A => X"800003FFE00FFFE07FFFFFF00000FC1FFFFFFFF03C1FFF1FFE000000FFFF8FFF",
INIT_2F => X"C0007C3FF8F07FF80FC0107FFE00FFF67FFFFFFFFFFFF00FFFFFF00001FFDF84",
INIT_0C => X"00000000003EFFFFFC00000007FFFFFE7FFFFFFFFFFFFFE0000000001FFFFFFF",
INIT_06 => X"000000001E07C1F8017C000003FFFFFFFC00400003FFFFFE7FFFFFFFFFFFFF00",
INIT_2A => X"FC7C00003FFC3FFC03E0007FFF803E7E7FFFFFFFFE000003FFFE000001FFFFF0",
INIT_03 => X"F800C00001FFFFFE7FFFFFFFFFFFFF07FE007FC007CF00000000000E7F0FC7F0",
INIT_39 => X"F03F80FFFF00FFFF8C0001FFE00FFFE07FFBFFE00003FE3FFFFFFFE03C3FFF3F",
INIT_31 => X"7FFFF81FFFFFFFFFFFFFFC0003FFC3C1800001FFFFC07FFFE000FC7FFDF07FF8",
INIT_09 => X"7FFFFFFFFFFFFF800000000F0FFFFFFC000000000C03C0700780000001FFFFFF",
WRITE_MODE_A => "WRITE_FIRST",
INIT_33 => X"0003003FFFFC7FFFF00040FFFFE0FFFC3E00187FFC01FFF87FFFF800FFFFFFFF",
INIT_25 => X"F80000F800000FFF0000001FFFFFE3FE7FFFFFFFFFF07F03FE00000007FFFFE0",
INIT_36 => X"7FFFFF00003FFFFFFFFFFF8000FFFE7FF0010007FFFF3FFFE01F807FFF80FFFE",
INIT_07 => X"0380000001FFFFFFFC00000007FFFFFE7FFFFFFFFFFFFF000000001F07FFFFF0",
INIT_12 => X"FC00000007FFFFFE7FFFFFFFFFFFFFF0000000007FFFFFFFFFF6000000000000",
SIM_COLLISION_CHECK => "NONE",
INIT_18 => X"7FFFFFFFFFFFFFFFC00000007FFFFFFFFFFFF00003F3E07D000800000020FBFF",
INIT_11 => X"00000000017FFFFFFC0000000FFFFFFE7FFFFFFFFFFFFFE0000000003FFFFFFF",
INIT_0B => X"000000000E00000000000000007FFFFFF800000007FFFFFE7FFFFFFFFFFFFFC0",
SRVAL_A => X"0",
INIT_3B => X"7FFEFFF9E000701FFFFFFFFC1C1FFF1FFE0000003FFF07FFF0F38FFFFE00FFFF",
INIT_1A => X"FFFFFF0000F1E0F860000000007FFFFFF3E000003FFFFFFE7FFFFFFFFFFFFFFF",
INIT_16 => X"000000000030FFFFFBE000000FFFFFFE7FFFFFFFFFFFFFFF000000007FFFFFFF",
INIT_05 => X"6000070E07FFFC00000000001E07C3F8001EC00003FFFFFFFC00400003FFFFFE",
INIT_15 => X"FFFFE00001F7E03C000000000038FFFFF98000000FFFFFFE7FFFFFFFFFFFFFFE",
INIT_19 => X"F00000007FFFFFFFFFFFFC0001F1E0F8C0000000003FFBFFFBF000001FFFFFFE",
INIT_0E => X"7FFFFFFFFFFFFFF0000000001FFFFFFF80C000000703000000000000007CFFFF",
INIT_3E => X"F8001FFFF001FFFF00018FFFC07FFF007FFC3FFFF8000007FFFFFFFF0607FF87",
INIT_24 => X"00003FFF800183FFF00001FC00000FFF8300001FFFFFE3FE7FFFFFFFFFF0001B",
INIT_22 => X"7FFFFFFFFFF0017FFF8000000FFFFFF83F00FFFF000FE3FFC00000F8007C07FF",
INIT_08 => X"F800000007FFFFFE7FFFFFFFFFFFFF000000001F07FFFFF8000000001C07C0F8",
INIT_02 => X"000FE00003FFFFFFFC00E00000FFFFFE7FFFFFFFFFFFFFFFFF01FFC003840000",
INIT_3D => X"FF0000003FFF87FFF8001FFFF401FFFF800007FFC03FFF007FF83FFFF000000F",
INIT_01 => X"0000003FFF1FCFF00007FC0003FFFFFFFC00E000003FFFFE0000000000000000",
INIT_34 => X"F000007FFFC0FFFE3E00007FF003FFF87FFFFE0007FFFFFFFFFFFF0003FFF9F8",
INIT_2D => X"FFFF800003FFFFCC00000FFFFF800FFFE0701C01F9F87FFC03C0007FFF007FDE",
INIT_2C => X"7FFFFFFFFFFFE00FFFFF000003FFFFF800000FCFFF0003FFF0780800E1FC3FFC",
INIT_17 => X"FBF000000FFFFFFE7FFFFFFFFFFFFFFF800000003FFFFFFFFFFFE00003F3E07E",
INIT_00 => X"0000000000000000000000000000000000000000000000000000000000000000",
WRITE_MODE_B => "WRITE_FIRST",
INIT_21 => X"C3E00007FFFFFBFE7FFFFFFFFFE007FFFF8000001FFFFFFFFF01FFFE001FE1FF",
SRVAL_B => X"0",
INIT_3F => X"0001DFFF807FFF007FFF0FFFFF1800001FFFFFFF0103FFC7FF8000001FFFEFFF"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena,
ENB => BU2_N1,
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta24,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_25_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_26_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
INIT_03 => X"FFFFFFFFFE07FFFF3003FFFF01FFF0007FFFFFFFFFFFC00001FFFFFFF0E07FFF",
INIT_04 => X"0003FFFF01FFF0007FFFFFFFFFFFE000007FFFFFF0003FFFFFFC000000FFFFFF",
INIT_B => X"0",
INIT_A => X"0",
SIM_COLLISION_CHECK => "NONE",
INIT_3E => X"FFFE0000007FFFFFFFFFF837FFFFFFFFFFFFFFFFFFFFFFFE7C00000003FFFFFF",
INIT_01 => X"03FFFFFFE1E0FFE3FFF8000007FFFFFFFCC1FFFFFC03FFFF1003FFFF80FFFC00",
INIT_3D => X"FFFF01F8000001FFFFFF0000C07FFFFFFFFFFCF3FFFFFFFFFFFFFFFFFFFFFFFE",
INIT_3C => X"7F8000000FFFFFFFFFFE0000000003FFFFFA0000E07FFFFFFFFFFFF3FFFFFFFF",
INIT_3B => X"FFFFFFFFFFFFFFFE7FC000000FFFFFFFFF800000000003FFFFFE000000FFFFFF",
INIT_3A => X"FFFFFF73FFFFFFFFFFFFFFFFFFFFFFFE7FE000000FFFFFFFF000000000000FFF",
INIT_39 => X"FFFF001FC0FFFFFFFFFFFFF3FFFFFFFFFFFFFFFFFFFFFFFE7FF000000FFFFF00",
INIT_38 => X"0000000000001FFFFFFF003FE1FFFFFFFFFFFFDBFFFFFFFFFFDFFFFFFFFFFFFE",
INIT_37 => X"7FF0007FFFFFFC000000000000003FFFFFFFC0FFF6FFFFFFFFFFFF9BFFFFFFFF",
INIT_36 => X"FFC3FFFFFFFFFFFE7FE001FFF0FFF000000000000000FFFFFFFBE1FFFBFFFFFF",
INIT_35 => X"BFFC3F83FFFFFFFFFFE0FFFFFFFFFFFE7FE001FE80FF8000000000000003FFFF",
INIT_34 => X"FFC3F3FFF0FFFFFE7FF03F81FFFFFFFFFFF07FFFFFFFFFFE7FC001F800FF8000",
INIT_33 => X"00000000000FFFFFFF03F3F8001FFFFFFFE07F81FFFFFFFFFFF83FFFFFFFFFFE",
INIT_32 => X"7C00000000FEF80000000000003FFFFFFC07FFF8000FFFFFFFC07FC1FFFFFFFF",
INIT_31 => X"FFF81FFFFFFFFFFE4000018001F870000000000000FFFFFFF01F7FFC01E7FFFF",
INIT_30 => X"FFC0FFF8FFFFFFFFFFFC1FFFFFFFFFFE0003FFC001FC00F00000000001FFFFFF",
INIT_2F => X"C07FFFFC01FFFFFFFF81FFF8FFFFFFFFFFFC0FFFFFFFFFFE0007FFC003FE01F8",
INIT_2E => X"0000000003FFFFFC00FFFFFE00FFFFFFFFC1FFF8FFFFFFFFFFFE07FFFFFFFFFE",
INIT_2D => X"001FFFF003FE01F80000000007FFFFF803FFFFFF00FFFFFFFFC3FFF8FFFFFFFF",
INIT_2C => X"FFFF03FFFFFFFFFE003FFFF003FEC1F800000000FFFFFFE007FFFFFF81FFFFFF",
INIT_2B => X"FFC7FFFCFFFFFFFFFFFF83FFFFFF1FFE7FFFFFF003FFF80000000001FFFFFF80",
INIT_2A => X"0FFFFFFFC1FFFFFFFFC3FFFC7FFFFFFFFFFFC1FFFFFF07FE7FFFFFF803FFFC10",
INIT_29 => X"00000007FFFFFF003FFFFFFFC1FFFFFFFFC7FFFE7FFFFFFFFFFFC0FFFFFFC0FE",
INIT_28 => X"7FFFFFF800FFFC0000000007FFFFFE00FFFFFFFFC3FFFFFFFFE7FFFF7FFFFFFF",
INIT_27 => X"FFFFE0FFFFFFE07E7FFFFFE000FFFFC000000007FFFFF801FFFFFFFFC7FFFFFF",
INIT_26 => X"FFE7FFFF7FFFFFFFFFFFF0FFFFFFF80E7FFFFFC0001F9FC00000180FFFFFE007",
INIT_25 => X"FFFFFFFFCF9FFFFFFFE7FFFF7FFFFFFFFFFFF87FFFFFFC027FFFFF80001F3F80",
INIT_24 => X"0007FE1FFFFF007FFEFFFFFF8F9FFFFFFFF3FFFF7FFFFFFFFFFFF83FFFFFFF00",
INIT_23 => X"7FFFFF80000FFF0007FFFFFFFFFC00FFF87FFFFF8F87FFFFFFF3FFFFFFFFFFFF",
INIT_22 => X"FFFFFC3FFFFFFF807FFFFF800007FC001FFFFFFFFFF803FFE07FFFFF1F87FFFF",
INIT_21 => X"FFF37FFFFFFFFFFFFFFFFC1FFFFFFFE07FFFFFC00007F8003FFFFFFFFFC00FFF",
INIT_20 => X"E0FFFFF67F8FFFFFFFFDFFFFFFFFFFFFFFFFFC1FFFFFFFF07FFFFFE00000FCFC",
INIT_1F => X"FFFFFFFFFF803FFFC0FFFFFE7F1FFFFFFFFDFFFFBFFFFFFFFFFFFE0EFFFFFFF8",
INIT_1E => X"7FFFFFFC0000FFFFFFFFFFFFFE00FFFF81FFFFFEFE1FFFFFFFFFFFFF9FFFFFFF",
INIT_1D => X"FFFFFE06FFFFFFF87FFFFFFE8001FFFFFFFFFFFFF801FFFF03FFFFFCDE1FFFFF",
INIT_1C => X"FFFFFFFFDFFFFFFFFFFFFF04FFF3FFFC7FFFFFFFE007FFFFFFFFFFFFE00FFFFC",
INIT_1B => X"07FFFFF8041FFFFFFFFFFFFFDFFFFFFFFFFFFF00FFF8FFFE7FFFFFFFF73FFFFF",
INIT_1A => X"FFFFFFFF803FFFE00FFFFFF0001FFFFFFFFFFFFFEFFFFFFFFFFFFF807FFC7FFE",
INIT_19 => X"7FFFFFFE9FFFFFFFFFFFFFFC00FFFFC00E3FFFF0001FFFFEFFFFFFFFC7FFFFFF",
INIT_18 => X"FFFFFFC07FFC7FFE7FFFFFFE0FFFFFFFFFFFFFF003FFFF80001FFFF0001FFFFF",
INIT_17 => X"FFFFFFFFC3FFFFFFFFFFFFC07FFC7FFE7FFFFFFC1FFFFFFFFFFFFFC00FFFFF00",
INIT_16 => X"001FFFF0041FFFFF7FFFFFFFC1FFFFFEC7FFFFC07FFC3FFE7FFFFFFFFFFFFFFF",
INIT_15 => X"FFFFFC003FFFFC00001FFFF8C61FE1FF3FFFFFFFC1FFFFFE23FFFFE07FFE3FFE",
INIT_14 => X"7FFFFFFFFFFFFFFFFFFFF800FFFFF8001FFFFFF8E03F83FF1FFFFFFFE1FFFFFE",
INIT_13 => X"00FFFFE07FFE1FFE7FFFFFFFFFFFFFFFFFFF8003FFFFF0007FFFFFF8E03F03FF",
INIT_12 => X"1FFFFFFFE0FFFFFE007FFFF03FFE01FE7FFFFFFFFFFFFFFFFFFF0007FFFFE000",
INIT_11 => X"FFFFFF70703C07FF9FFFFFFFF0FFFFFE003FFFF03FFE00FE7FFFFFFFFFFF7FFF",
INIT_10 => X"FFF0001FFFFF8000FFFFFF60203807FF9FFFFFF8F07FFFFE001FFFF03FFF807E",
INIT_0F => X"7FFFF807FFFF1FFFFFC0003FFFFF000FFFFFFFE0301007FFC7FFFFF8007FFFFE",
INIT_0E => X"001FFFF81FFF007E7FF000073FFF1FFFFF80007FFFFC001FFFFFFFF000000FFF",
INIT_0D => X"E7FFFFF8003FFFFE001FFFF81FFF003E7FFFFE0FFFFF0FFFFF0001FFFFF8007F",
INIT_0C => X"FFFFFFF000001FFFF3FFFFFC003FFFFE001FFFFC0FFF003E7FFFFEFFFFFF1FFF",
INIT_0B => X"FC0007FFFFF000FFFFFFFBF00001FFFFF3FFFFFF803FFFFE000FFFFC07FF801E",
INIT_0A => X"7FFFFFFFFFFFFFFFE0001FFFFFC001FFFFFFF3E0C3FFFFFFF3FFFFFFC01FFFFE",
INIT_09 => X"0003FFFC07FFE0027FFFFFFFFFFFFFFF8000FFFFFF8003FFFFFF00C0F7FFFFFF",
INIT_08 => X"F9FFFFFFF00FFFFF0001FFFE03FFF0007FFFFFFFFFFFFFF80003FFFFFF0007FF",
INIT_07 => X"FFFE0000FFFFFFFFFDFFFFFFF80FFFFF0001FFFE03FFF0007FFFFFFFFFFFF800",
INIT_06 => X"000FFFFFFE001FFFFFFC0001FFFFFFFFFFFFFFFFFC07FFFF0001FFFE01FFF000",
WRITE_MODE_A => "WRITE_FIRST",
WRITE_MODE_B => "WRITE_FIRST",
SRVAL_B => X"0",
INIT_02 => X"FFF8000000FFFFFFFCE3FFFFFF03FFFF3003FFFF80FFF8007FFFF3FFFFFF8000",
SRVAL_A => X"0",
INIT_05 => X"7FFFFFFFFFFFF000001FFFFFF8003FFFFFFC0001C07FFFFFFE7FFFFFFE07FFFF",
INIT_00 => X"7FFFC7FFFFFE00000FFFFFFF8101FFC7FFE0000007FFFFFFFC003FFFF801FFFF",
INIT_3F => X"FFFFD037FFFFFFFFFFFFFFFFFFFFFFFE0000000003FFFFFFFFFF01FC3C000001"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena0,
ENB => BU2_doutb(0),
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta25,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_26_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_27_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
INIT_21 => X"FFDF00001FFFFF7FFCE1FFFFFFFFFFFFFFFFFFFFFFEFFFFE7FFC0020000FFFFF",
INIT_06 => X"0000001FFCFFFFFFFFFFFFFFFFFFFF8000000001C03FFFFFFFDBE7FFFFFFFF1F",
INIT_0E => X"FF020FFFFFEFFFFFFFFFFFFFFFFFFFFC7FFC0FFFFF00FFFC0000000007FFFFFF",
SRVAL_A => X"0",
INIT_1A => X"7FFFE0000000003FFFFFFFFFFFFFFFFE7E00000701FFFFFFE0603FFFFFFFFFFF",
INIT_1F => X"7FFF0030000007FFFFFFFFFFFFFE007FFFE0000000FFFF1FE0E0F3FFFFFFFFFF",
INIT_12 => X"F800000000FFF81FFE000FFFFFFFFFFFFFFFFFFFFFFFFF807FFFFFFFFE000000",
INIT_2C => X"401FFF8FFFFFFFFFCFFFFFFFFFFFFFFE7FFFFFFFFFF007FFFFF80000001FFFF8",
INIT_38 => X"7FFFFFF0000FFF0003FFFFFFFFFFE0FFFFFFE0003F9FF2000000003FFFFFFFFF",
INIT_04 => X"FF99E3FFFFFFFFC7FFFFFFFFFFFFFFFE00000001FC7FFFFFFFFFFFFFFFFFFE00",
INIT_07 => X"FFFFFFFFFFFFFFC000000000C03FFFFFFFDBC3FFFFFFFE3FFFFFFFFFFFFFFFFE",
INIT_1C => X"FFC0000001FEFFFFE0E07FFFFFFFFFFFFFFFFFFFFF801FFE7FFFC00600001FFF",
INIT_37 => X"FFFFFFFFFFFFFFFE7FFFFFF00007FF00007FFFFFFFFFF0FFFFFFE0000F8FFF00",
INIT_22 => X"F8C1FFFFFFFFFFFFFFFFFFFFFFFFFFFE7FF89FC0027FFFFFFFFFFE07000003FF",
INIT_30 => X"FFFFF800FFFFFFE000000FFFFFFFFFFFFFFFFFFFFFFFFFFE7FFFFFFFF00003FF",
INIT_2A => X"FFFF0000000FFFFE3FFFFFC07FFFFFFC400FFFF9FFFFFFFFFFFFFFFFFFFFFFFE",
INIT_2D => X"DFFFFFFFFFFFFFFE7FFFFFFFFF8003FFFF000000003FFFF8FFFFFE003FFFFFFC",
INIT_0C => X"00003FFDFFFFFFFFF0000000001FFFFFFF870FFFFFCF7FFFFFFFFFFFFFFFFFFE",
INIT_09 => X"FFC787FFFFFFFBFFFFFFFFFFFFFFFFFE5FE001FFFFFFFFFFFFFFFFFFFFFFFFE0",
INIT_2B => X"7FFFFF803FFFFFFCE01FFFC3FFFFFFFFFFFFFFFFFFFFFFFE7FFFFFFFFFFE0FFF",
INIT_32 => X"FFFF7FFFFFFFFFFE7FFFFFFF00000FFC00000E6207FFFF0FFFFFF801FFFFFFF0",
INIT_24 => X"7FFFFFC01FFFFFFFFFFFFC000000FFFFFFFF00003FFFFFFFC081FFFFFFFFFFFF",
INIT_16 => X"001FFFFFFFFFFFFFE0000006007FFFFFF0701FFFFFFFFFFFFFFFFFFFFFFFF000",
INIT_13 => X"FE600FFFFFFFFFFFFFFFFFFFFFFFFE007FFFFFF83C0000000000001FFFFFFFFF",
INIT_0D => X"F8000000000FFF7FFF070FFFFFC7FFFFFFFFFFFFFFFFFFFC7FF00FFFFF80FFFE",
INIT_2F => X"E000000007FFFFE3FFFFFC007FFFFFE0000007FFFFFFFFFFFFFFFFFFFFFFFFFE",
INIT_2E => X"7FFFFFFFFC0003FFFC00000001FFFFF1FFFFFC007FFFFFF800003FFFFFFFFFFF",
INIT_1B => X"FFFFFFFFFFFFFC0FFE00000003FCFFFFE0603FFFFFFFFFFFFFFFFFFFFFC007FC",
INIT_35 => X"FFFFE0004F9FFF800000FFFFFFDFFFFFFFFFFFFFFFFFFFFE7FFFFFF80001FFE0",
INIT_34 => X"0003FFFF1FFFFC3FFFFFF0005FFFFFE000007FFFFFFFFFFFFFFFFFFFFFFFFFFE",
SRVAL_B => X"0",
INIT_18 => X"E0F03FFFFFFFFFFFFFFFFFFFFFFE00007FFFF0000000000001FFFFFFFFFFFFFF",
INIT_10 => X"7FFFFFFFFF000000000000000001FFFFFC000000007FFE0FFE020FFFFFFFFFFF",
INIT_20 => X"FFFFFFDFF10001FFFFC700001FFFFF1FE8E0FFFFFFFFFFFFFFFFFFFFC00FFFFC",
INIT_39 => X"7FFFFFFFFFFFC1FFFFFF80007F1FFC000000001FFFDFFFFFFFFFFFFFFFFFFFFE",
INIT_02 => X"FFFFFFFFFFFF800007E00003C07FFFFFFFFFFBF9FFFFFFF8FFFFFFFFFFFFFFFE",
INIT_19 => X"FFFFFFFFFFF800707FFFE00000000006FFFFFFFFFFFFFFFE0000000F01FFFFFF",
INIT_11 => X"0000000003FFFFFFFC00000000FFFC0FFE000FFFFFFFFFFFFFFFFFFFFFFFFFE0",
INIT_1D => X"E0E07BFFFFFFFFFFFFFFFFFFFE00FFFC7FFFC00E00001FFFFFFFFFFFFFFFC00F",
INIT_23 => X"FFFFFFFFFFFFFFFE7FF8FFC00FFFFFFFFFFFFC000000FFFFFF9F00003FFFFFFF",
INIT_01 => X"00000000E8FFFFFFFFFFFFFFFFF000001FFE0003C0FFFFFFFFFF81B3FFFFFFFE",
INIT_17 => X"C000000F00FFFFFFF0703FFFFFFFFFFFFFFFFFFFFFFFC0007FFFFE0000000000",
INIT_0F => X"FFFFFFFFFFFFFFF07FFFFFFFFF000000000000000003FFFFFC000000003FFE0F",
INIT_08 => X"00000000007FFFFFFFD7C3FFFFFFFFFFFFFFFFFFFFFFFFFE070000FFFFFFFFFF",
INIT_36 => X"00003FFFFF8FFFFFFFFFFFFFFFFFFFFE7FFFFFF00001FF80000FFFFFFFFFF87F",
INIT_26 => X"FFFF0000FFFFFFFC4001FFFFF07FFFFFFFFF87FFFFFFFFFE7FFFFFC0FFFFFFFF",
INIT_14 => X"FFFFFFFFFFFFFC007FFFFFF000000000000003FFFFFFFFFFF000000000FFFCFF",
INIT_33 => X"7FFFFFFE00003FF80000FFFE0FFFFE1FFFFFF800FFFFFFF000003FFFFFFFF0FF",
INIT_05 => X"FFFFFFFFFFFFFFFE00000007FC7FFFFFFFFFFFFFFFFFFF0000000001E07FFFFF",
INIT_28 => X"FFF0FFFFFFFFFFFE7FFFFFFFFFFFFFFFFFFFC0000003FFFFFFFFFFC0FEFFFFFC",
INIT_29 => X"7FFFFFFFFFFF8FFFFFFF80000007FFFFFFFFFFE07F7FFFFC6007FFFDFFFFFFFF",
INIT_31 => X"00001FFFFFFFFC3FFFFFFFFFFFFFFFFE7FFFFFFFE00007FF0000000007FFFFC7",
INIT_03 => X"00000001C07FFFFFFFFEF3F07FFFFFF1FFFFFFFFFFFFFFFE00000000F8FFFFFF",
INIT_0B => X"7FE007FFFFFFFFFFFF9FFFFFFFFFFFFFC0000000003FFFFEFF870FFFFFFFFFFF",
INIT_0A => X"FFFFFFFFFFFFFFFE1FE003FFFFFFFFFFFFFFFFFFFFFFFFFE00000000003FFFFF",
INIT_27 => X"0003FFFDD9FFFFFFFFF8CFFFFFFFFFFE7FFFFFCFFFFFFFFFFFFFE0000001FFFF",
INIT_00 => X"7FFFFFFFFFFFFFFE0000000049FFFFFFFFFFC7FFFF0000007FFE0003C07FFFFF",
INIT_1E => X"FFFFFFFFF003FFF87FFF001E000007FFFFFFFFFFFFFF801FFFE0000001FFFE3F",
INIT_25 => X"FFFFF0000001FFFFFFFF00003FFFFFFFC001FFFFF03FFFFFFFFFFFFFFFFFFFFE",
INIT_15 => X"7FFFFFE0000000000001FFFFFFFFFFFFF0000000007FFCFFFE600FFFFFFFFFFF",
INIT_3A => X"FFFF83007F1FF00000007FFFFF8FFFFFFFFFFFFFFFFFFFFE7FFFFFE0001FFE00",
INIT_3B => X"0000FFFFFFDFFFFFFFFFFFFFFFFFFFFE7FFFFFC0003FF800FFFFFFFFFFFF03FF",
INIT_3C => X"FFFFFFFFFFFFFFFE7FFFFFC0007FE001FFFFFFFFFFFE07FFFFFF07807FFFF000",
INIT_3D => X"7FFFFF0000FFE007FFFFFFFFFFFC0FFFFFFF07C07FFFF0000000FFFFFFFFFFFF",
WRITE_MODE_B => "WRITE_FIRST",
INIT_3E => X"FFFFFFFFFFF81FFFFFFE0F807C7FF0000000FFFFFFFFFFFFFFFFFFFFFFFFFFFE",
SIM_COLLISION_CHECK => "NONE",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3F => X"FFFE1F807C7FF00000007FFFFFFFFFFFFFFFFFFFFFFFFFFE7FFFFE0001FFE01F"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena1_2,
ENB => BU2_doutb(0),
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta26,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_27_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ramloop_28_ram_r_v2_init_ram_dp1x1_ram : RAMB16_S1_S1
generic map(
SRVAL_A => X"0",
SRVAL_B => X"0",
INIT_00 => X"000007FFFFFFFFFFFFFFFFFFFFFFF9FE7FFFFC0001FFC0FFFFFFFFFFFFE01FFF",
INIT_01 => X"FFFFFFFFFFFFF1FE7FFFFC0001FF07FFFFFFFFFFFFC03FFFFFFC1FC07FFFF000",
INIT_02 => X"7FFFFC00C1FE0FFFFFFFFFFFFF807FFFFFFC1FC03FFFE080070047FFFFFFFFFF",
INIT_03 => X"FFFFFFFFFF00FFFFFFF81F803C7FC0980780E3FFFFFFFFFFFFFFFFFFFFFFF38E",
INIT_04 => X"FFF81FC0387F00380300F3FFFFFFFE7FFFFFFFFFFFFFFE067FFFFC03E1FF0FFF",
INIT_05 => X"000073FFFFFFF1FFFFFFFFFFFFFFF81E7FFFFF07E1FC3FFFFFFFFFFFFC01FFFF",
INIT_06 => X"FFFFFFFFFFFFF07E7FFFFFFFC1FDFFFFFFFFFFFFF003FFFFFFF03FC0103C007C",
INIT_07 => X"7FFFFFFFC1F3FFFFFFFFFFFFE007FFFFFFF07FCC0018007C000033FFFFFFFFFF",
INIT_08 => X"FFFFFFFFC00FFFFFFFE0FFC7001C007C00060200FCFFFFFFF8FFFFFFFFFFFBFE",
INIT_09 => X"FFE1FFDF001F80FC000F8400F03FFFFFF1FFFFFFFFFFFFFE7FFFFFFF8003FFFF",
INIT_0A => X"001F8001F83FFFFFF8FFFFFFFFFFFFFE7FFFFFFF0007FFFFFFFFFFFF801FFFFF",
INIT_0B => X"F8FFFFFFFFFFFFFE7FFFFFFF0003FFFFFFFFFFFF001FFFFFFFE3FFFF0003E0FC",
INIT_0C => X"7FFFFFFF0003FFFFFFFFFFFF003FFFFFFFC3FFFE000183FC003F000FFFFFFFFF",
INIT_0D => X"FF3FFFFE007FFFFFFFC3FFF0000083FC00FF003FFCFFFFFFF87FFFFFFFFFFFFE",
INIT_0E => X"FF87FFF0000187FC01FF703FFFFFFFFFF07FFFFFFFFFFFFE7FFFFFFF000FFFFF",
INIT_0F => X"01FFF87FFFFFFFFFF1FFFFFFFFFFFFFE7FFFFFFFFC1FFFFFFD7FFFFC007FFFFF",
INIT_10 => X"E3FFFFFFFFFFFFFE7FFFFFFFFFFFFFFFFC7FFFF800FFFFFFFF87FFE00001CFFE",
INIT_11 => X"7FFFFFFFFFFFFFFFFEFFFFE001FFFFFFFF0FFFC00001CFFF01FFF87FFFFFFFFF",
INIT_12 => X"F97FFFC003FFFFFFFF0FFFC000019FFF01FFFE17FFFFFFFFC3FFFFFFFFFFFFFE",
INIT_13 => X"FF0FFFC000009FFF81FFFF00FFFFFFFF81FFFFFFFFFFFFFE7FFFFFFFFFFFFFFF",
INIT_14 => X"80FFFF80FFFFFFFC03FFFFFFFFFFFFFE7FFFFFFFFFFFFFFF81FFFF8003FFFFFF",
INIT_15 => X"01FFFFFFFFFFFFFE7FFFFFFFFFF8FFFC07FFF00007FFFFFFFF0FFFC000001FFF",
INIT_16 => X"7FFFFFFFFFC07FF807FFC0000FFFFFFFFE1FFFC000001FFF80FFFF80FFFFFFFF",
INIT_17 => X"07FFC0001FFFFFFFFE1FFF800007FFFF807FFFC07FFFFFFF13FFFFFFFFFFFFFE",
INIT_18 => X"FE3FFF00000FFFFF803FFFC07FFFFFFFBFFFFFFFFFFFFFFE7FFFFFFFFF803000",
INIT_19 => X"801FFFD01FFFFFFFFFFFFFFFFFFFFFFE7FFFFFFFFF0000001FFF80003FFFFFFF",
INIT_1A => X"FFFFFFFFFFFFFFFE7FFFFFFFFFC000003FFF00007FFFFFFFFE3FFF80001FFFFF",
INIT_1B => X"7FFFFFFFFFF0F8007FFE0000FFFFFFFFFE7FFFC0001FFFFF800FFFF81FF7FFFF",
INIT_1C => X"7FFC0001FFFFFBFFFC7FFFC0061FFFFFC007FFFEFFFFFFFFFFFFFFFFFFFFFFFE",
INIT_1D => X"F8FFFFC00E3FFFFFC007FFFFFFFDFFFFFFFFFFFFFFFFFFFE7FFFFFFFFFFFF800",
INIT_1E => X"E007FFFFFFFF7FFFFFFFFFFFFFFFFFFE7FFFFFFFFFFFFE00FFF80001FFFFEFFF",
INIT_1F => X"FFFFFFFFFFFFFFFE7FFFFFFFFFFFFC03FFF80003FFFFCFFFF8FFFFC00E3FFFFF",
INIT_20 => X"7FFFFFFFFFFFFC03FFF00007FFFE0FFFF9FFFFC00FFFFFFFE007FFFCFFFFFFFF",
INIT_21 => X"FFE0000FFFFF0FFFF1FFFFC00FFFFFFFF007FFFEFFFFFFFFFFFFFFFFFFFFFFFE",
INIT_22 => X"F3FFFFE00FFFFFFFF007FFFE1FFFFFFFFFFFFFFFFFFFFFFE7FFFFFFFFFFFFC1F",
INIT_23 => X"F807FFFFFFFFFFFFFFFFFFFFFFFFFFFE7FFFFFFFFFFFF81FFF80000FFFFE1FFF",
INIT_24 => X"FFFFFFFFFFFFFFFE7FFFFFFFFFFFFFFFFF00001FFFFE3FFFE3FFFFE00FFFFFFF",
INIT_25 => X"7FFFFFFFFFFFFFFFFE00003FFFF83FFFE3FFFFF0EFFFFFFFF807FFFFFFFFFBFF",
INIT_26 => X"FE00007FFFF01FFFE7FFF3E1FFFFFFFFFC03FFFFFFFFFDFFFFFFFFFFFFFFFFFE",
INIT_27 => X"C7FFE003FFFFFFFFFC03FFFFFFFFFCFFFFFFFFFFFFFFFFFE7FFFFFFFFFFFFFFF",
INIT_28 => X"FE01FFFFFFFFFFFFFFFFFFFFFFFFFFFE7FFFFFFFFFFFFFFFFC00007FFFE03FFF",
INIT_29 => X"FFFFFFFFFFFFFFFE7FFFFFFFFFFFFFFFF80000FFFFC03FFFC7FFC003C7FFFFFF",
INIT_2A => X"7FFFFFFFFFFFFF9FF80000FFFFC03FFF8FFFC00307FFEFFFFE01FFFFFFFFFFFF",
INIT_2B => X"FC0001FFFF807FFF8FFFC00107FFCFFFFF00FFFFFFFFFFFFFFFFFFFFFFFFFFFE",
INIT_2C => X"0FFFE00007FFCFFFFF00FFFFFFFFFFFFFFFFFFFFFFFFFFFE7FFFFFFFFFFFFFFF",
INIT_2D => X"FF80FFFFFFFFFFFFFFFFFFFFFFFFFFFE7FFFFFFFFFFFFFFFFC0003FFFF00FFFF",
INIT_2E => X"FFFFFFFFFFFFFFFE7FFFFFFFFFFFFFFFFE000FFFFF00FFFF1FFFF00007FFC77F",
INIT_2F => X"7FFFFFFFFFFFFFFFFE000FFFFE00FFFE1FFFF0030FFFC0FFFF807FFFFFFFFFFF",
INIT_30 => X"FFFE0FFFFC05FFFE3FFFE0039FFFE1FFFFC03FFFFFFFFFFFFFFFFFFFFFFFFFFE",
INIT_31 => X"3FFFE007FFFFE1FFFFE03FFFFFFBFFFFFFFFFFFFFFFFFFFE7FFFFFFFFFFFFFFF",
INIT_32 => X"FFE00FFFFFFFFFFFFFFFFFFFFFFFFFFE7FFFFFFFFFFFFFFFFFFF5FFFFC05FFFE",
INIT_33 => X"FFFFFFFFFFFFFFFE7FFFFFFFFFFFFFFFFFFF7FFFF803FFFC7FFFE01FBFFFE1FF",
INIT_34 => X"7FFFFFFFFFFFFFFFFFFE3FFFE003FFFC7FFFC07F9FFFE5FFFFE007FFFFFFFFFF",
INIT_35 => X"FFFF3FFFE403FFFCFFFF80FF9FFFE7FFFFE007FFFFFFFFFFFFFFFFFFFFFFFFFE",
INIT_36 => X"E7FF81FF92FFF7FFFEE007FFFFFFFFFFFFFFFFFFFFFFFFFE7FFFFFFFFFFFFFFF",
INIT_37 => X"FE0003FFFFFFFFFFFFFFFFFFFFFFFFFE7FFFFFFFFFFFFFFFFFFF7FFFC00FFFF8",
INIT_38 => X"FFFFFFFFFFFFFFFE7FFFFFFFFFFFFFFFFFFFFFFFC037FFF8EFFF03FFD3FFFFFF",
INIT_39 => X"7FFFFFFFFFFFFFFFFFFFFFFFC427FFF87FFF07FFFAFFFFFFFF0003DFFFFFFFFF",
INIT_3A => X"FFFFFFFFE07FFFF07FFF0FFFFFFFFFFFFF8001FFFFFFFFFFFFFFFFFFFFFFFFFE",
INIT_3B => X"FFFF0FFFFFFFFFFFFFC000FFFFFFFFFFFFFFFFFFFFFFFFFE7FFFFFFFFFFFFFFF",
INIT_3C => X"FFE000FFFFFFFFFFFFFFFFFFFFFEFFFE7FFFFFFFFFFFFFFFFFFBFFFFF8FFFFF0",
INIT_3D => X"FFFFFFFFFFFC9BFE7FFFFFFFFFFFFFFFFFFBFFFFBFFFFFF1FFFF0FFFFFFFFFFF",
WRITE_MODE_B => "WRITE_FIRST",
INIT_3E => X"7FFFFFFFFFFFFFFFFFFFFFFF1FFFFFE1FFFF1FFFFFFFFFFFFFF000FFFFFFFFFF",
SIM_COLLISION_CHECK => "NONE",
INIT_A => X"0",
INIT_B => X"0",
WRITE_MODE_A => "WRITE_FIRST",
INIT_3F => X"FFFFFFFF07FFFFC3FFFFBFFFFFFFFFFFFFF000FFFFFFFFFFFFFFFFFFFFFF81FE"
)
port map (
CLKA => clka,
CLKB => BU2_doutb(0),
ENA => BU2_U0_blk_mem_generator_valid_cstr_ram_ena12,
ENB => BU2_doutb(0),
SSRA => BU2_doutb(0),
SSRB => BU2_doutb(0),
WEA => BU2_doutb(0),
WEB => BU2_doutb(0),
ADDRA(13) => addra_6(13),
ADDRA(12) => addra_6(12),
ADDRA(11) => addra_6(11),
ADDRA(10) => addra_6(10),
ADDRA(9) => addra_6(9),
ADDRA(8) => addra_6(8),
ADDRA(7) => addra_6(7),
ADDRA(6) => addra_6(6),
ADDRA(5) => addra_6(5),
ADDRA(4) => addra_6(4),
ADDRA(3) => addra_6(3),
ADDRA(2) => addra_6(2),
ADDRA(1) => addra_6(1),
ADDRA(0) => addra_6(0),
ADDRB(13) => BU2_doutb(0),
ADDRB(12) => BU2_doutb(0),
ADDRB(11) => BU2_doutb(0),
ADDRB(10) => BU2_doutb(0),
ADDRB(9) => BU2_doutb(0),
ADDRB(8) => BU2_doutb(0),
ADDRB(7) => BU2_doutb(0),
ADDRB(6) => BU2_doutb(0),
ADDRB(5) => BU2_doutb(0),
ADDRB(4) => BU2_doutb(0),
ADDRB(3) => BU2_doutb(0),
ADDRB(2) => BU2_doutb(0),
ADDRB(1) => BU2_doutb(0),
ADDRB(0) => BU2_doutb(0),
DIA(0) => BU2_doutb(0),
DIB(0) => BU2_doutb(0),
DOA(0) => BU2_U0_blk_mem_generator_valid_cstr_ram_douta27,
DOB(0) => NLW_BU2_U0_blk_mem_generator_valid_cstr_ramloop_28_ram_r_v2_init_ram_dp1x1_ram_DOB_0_UNCONNECTED
);
BU2_U0_blk_mem_generator_valid_cstr_ram_ena131 : LUT4
generic map(
INIT => X"0010"
)
port map (
I0 => addra_6(13),
I1 => addra_6(14),
I2 => addra_6(16),
I3 => addra_6(15),
O => BU2_U0_blk_mem_generator_valid_cstr_ram_ena13
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe_4_2 : LUT4
generic map(
INIT => X"222F"
)
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_N13,
I1 => BU2_N18,
I2 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(4),
I3 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_5_f52,
O => douta_7(2)
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe_4_2_SW0 : LUT4
generic map(
INIT => X"AF27"
)
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(1),
I1 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta14(0),
I2 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta13(0),
I3 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(0),
O => BU2_N18
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe_4_3 : LUT4
generic map(
INIT => X"222F"
)
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_N13,
I1 => BU2_N16,
I2 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(4),
I3 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_5_f53,
O => douta_7(3)
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe_4_3_SW0 : LUT4
generic map(
INIT => X"AF27"
)
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(1),
I1 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta14(1),
I2 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta13(1),
I3 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(0),
O => BU2_N16
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe_4_4 : LUT4
generic map(
INIT => X"222F"
)
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_N13,
I1 => BU2_N14,
I2 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(4),
I3 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_5_f54,
O => douta_7(4)
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe_4_4_SW0 : LUT4
generic map(
INIT => X"AF27"
)
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(1),
I1 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta14(2),
I2 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta23(0),
I3 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(0),
O => BU2_N14
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe_4_5 : LUT4
generic map(
INIT => X"222F"
)
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_N13,
I1 => BU2_N12,
I2 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(4),
I3 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_5_f55,
O => douta_7(5)
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe_4_5_SW0 : LUT4
generic map(
INIT => X"AF27"
)
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(1),
I1 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta14(3),
I2 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta23(1),
I3 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(0),
O => BU2_N12
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe_4_1 : LUT4
generic map(
INIT => X"888F"
)
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta3,
I1 => BU2_U0_blk_mem_generator_valid_cstr_N13,
I2 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_5_f5_5,
I3 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(4),
O => douta_7(0)
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe_4_11 : LUT4
generic map(
INIT => X"888F"
)
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta8,
I1 => BU2_U0_blk_mem_generator_valid_cstr_N13,
I2 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_5_f51,
I3 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(4),
O => douta_7(1)
);
BU2_U0_blk_mem_generator_valid_cstr_bindec_a_bindec_inst_a_enout_18_cmp_eq00001 : LUT3
generic map(
INIT => X"40"
)
port map (
I0 => addra_6(12),
I1 => addra_6(13),
I2 => BU2_U0_blk_mem_generator_valid_cstr_ram_ena3,
O => BU2_U0_blk_mem_generator_valid_cstr_bindec_a_bindec_inst_a_enout_18_cmp_eq0000
);
BU2_U0_blk_mem_generator_valid_cstr_bindec_a_bindec_inst_a_enout_18_cmp_eq000011 : LUT3
generic map(
INIT => X"04"
)
port map (
I0 => addra_6(14),
I1 => addra_6(16),
I2 => addra_6(15),
O => BU2_U0_blk_mem_generator_valid_cstr_ram_ena3
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe_4_221 : LUT3
generic map(
INIT => X"04"
)
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(3),
I1 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(4),
I2 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(2),
O => BU2_U0_blk_mem_generator_valid_cstr_N13
);
BU2_U0_blk_mem_generator_valid_cstr_ram_ena1 : LUT3
generic map(
INIT => X"01"
)
port map (
I0 => addra_6(16),
I1 => addra_6(15),
I2 => addra_6(14),
O => BU2_U0_blk_mem_generator_valid_cstr_ram_ena
);
BU2_U0_blk_mem_generator_valid_cstr_ram_ena01 : LUT3
generic map(
INIT => X"04"
)
port map (
I0 => addra_6(16),
I1 => addra_6(14),
I2 => addra_6(15),
O => BU2_U0_blk_mem_generator_valid_cstr_ram_ena0
);
BU2_U0_blk_mem_generator_valid_cstr_ram_ena11 : LUT3
generic map(
INIT => X"04"
)
port map (
I0 => addra_6(16),
I1 => addra_6(15),
I2 => addra_6(14),
O => BU2_U0_blk_mem_generator_valid_cstr_ram_ena1_2
);
BU2_U0_blk_mem_generator_valid_cstr_ram_ena121 : LUT3
generic map(
INIT => X"40"
)
port map (
I0 => addra_6(16),
I1 => addra_6(15),
I2 => addra_6(14),
O => BU2_U0_blk_mem_generator_valid_cstr_ram_ena12
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe_4 : FDE
generic map(
INIT => '0'
)
port map (
C => clka,
CE => BU2_N1,
D => addra_6(16),
Q => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(4)
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe_3 : FDE
generic map(
INIT => '0'
)
port map (
C => clka,
CE => BU2_N1,
D => addra_6(15),
Q => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(3)
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe_2 : FDE
generic map(
INIT => '0'
)
port map (
C => clka,
CE => BU2_N1,
D => addra_6(14),
Q => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(2)
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe_1 : FDE
generic map(
INIT => '0'
)
port map (
C => clka,
CE => BU2_N1,
D => addra_6(13),
Q => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(1)
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe_0 : FDE
generic map(
INIT => '0'
)
port map (
C => clka,
CE => BU2_N1,
D => addra_6(12),
Q => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(0)
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_5_f5_4 : MUXF5
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_N12,
I1 => BU2_U0_blk_mem_generator_valid_cstr_N11,
S => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(3),
O => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_5_f55
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_75 : LUT3
generic map(
INIT => X"1B"
)
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(2),
I1 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta24,
I2 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta25,
O => BU2_U0_blk_mem_generator_valid_cstr_N12
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_65 : LUT3
generic map(
INIT => X"1B"
)
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(2),
I1 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta26,
I2 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta27,
O => BU2_U0_blk_mem_generator_valid_cstr_N11
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_5_f5_3 : MUXF5
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_N10,
I1 => BU2_U0_blk_mem_generator_valid_cstr_N9,
S => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(3),
O => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_5_f54
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_74 : LUT3
generic map(
INIT => X"1B"
)
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(2),
I1 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta19,
I2 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta20,
O => BU2_U0_blk_mem_generator_valid_cstr_N10
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_64 : LUT3
generic map(
INIT => X"1B"
)
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(2),
I1 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta21,
I2 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta22,
O => BU2_U0_blk_mem_generator_valid_cstr_N9
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_5_f5_2 : MUXF5
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_N8,
I1 => BU2_U0_blk_mem_generator_valid_cstr_N7,
S => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(3),
O => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_5_f53
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_73 : LUT3
generic map(
INIT => X"1B"
)
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(2),
I1 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta15,
I2 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta16,
O => BU2_U0_blk_mem_generator_valid_cstr_N8
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_63 : LUT3
generic map(
INIT => X"1B"
)
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(2),
I1 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta17,
I2 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta18,
O => BU2_U0_blk_mem_generator_valid_cstr_N7
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_5_f5_1 : MUXF5
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_N6,
I1 => BU2_U0_blk_mem_generator_valid_cstr_N5,
S => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(3),
O => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_5_f52
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_72 : LUT3
generic map(
INIT => X"1B"
)
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(2),
I1 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta9,
I2 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta10,
O => BU2_U0_blk_mem_generator_valid_cstr_N6
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_62 : LUT3
generic map(
INIT => X"1B"
)
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(2),
I1 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta11,
I2 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta12,
O => BU2_U0_blk_mem_generator_valid_cstr_N5
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_5_f5_0 : MUXF5
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_N4,
I1 => BU2_U0_blk_mem_generator_valid_cstr_N3,
S => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(3),
O => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_5_f51
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_71 : LUT3
generic map(
INIT => X"1B"
)
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(2),
I1 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta4,
I2 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta5,
O => BU2_U0_blk_mem_generator_valid_cstr_N4
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_61 : LUT3
generic map(
INIT => X"1B"
)
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(2),
I1 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta6,
I2 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta7,
O => BU2_U0_blk_mem_generator_valid_cstr_N3
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_5_f5 : MUXF5
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_N2,
I1 => BU2_U0_blk_mem_generator_valid_cstr_N1,
S => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(3),
O => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_5_f5_5
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_7 : LUT3
generic map(
INIT => X"1B"
)
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(2),
I1 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta,
I2 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta0,
O => BU2_U0_blk_mem_generator_valid_cstr_N2
);
BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_Mmux_dout_mux_6 : LUT3
generic map(
INIT => X"1B"
)
port map (
I0 => BU2_U0_blk_mem_generator_valid_cstr_has_mux_a_A_sel_pipe(2),
I1 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta1,
I2 => BU2_U0_blk_mem_generator_valid_cstr_ram_douta2,
O => BU2_U0_blk_mem_generator_valid_cstr_N1
);
BU2_XST_VCC : VCC
port map (
P => BU2_N1
);
BU2_XST_GND : GND
port map (
G => BU2_doutb(0)
);
end STRUCTURE;
-- synopsys translate_on
|
--------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 16:11:55 11/19/2013
-- Design Name:
-- Module Name: C:/Users/etingi01/Mips32_948282_19.11.2013/My_16bitMult_tb_948282.vhd
-- Project Name: Mips32_948282_19.11.2013
-- Target Device:
-- Tool versions:
-- Description:
--
-- VHDL Test Bench Created by ISE for module: My_16bitMult_948282
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
-- Notes:
-- This testbench has been automatically generated using types std_logic and
-- std_logic_vector for the ports of the unit under test. Xilinx recommends
-- that these types always be used for the top-level I/O of a design in order
-- to guarantee that the testbench will bind correctly to the post-implementation
-- simulation model.
--------------------------------------------------------------------------------
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--USE ieee.numeric_std.ALL;
ENTITY My_16bitMult_tb_948282 IS
END My_16bitMult_tb_948282;
ARCHITECTURE behavior OF My_16bitMult_tb_948282 IS
-- Component Declaration for the Unit Under Test (UUT)
COMPONENT My_16bitMult_948282
PORT(
A_inputM : IN std_logic_vector(15 downto 0);
B_inputM : IN std_logic_vector(15 downto 0);
Hi_out : OUT std_logic_vector(15 downto 0);
Lo_out : OUT std_logic_vector(15 downto 0)
);
END COMPONENT;
--Inputs
signal A_inputM : std_logic_vector(15 downto 0) := (others => '0');
signal B_inputM : std_logic_vector(15 downto 0) := (others => '0');
--Outputs
signal Hi_out : std_logic_vector(15 downto 0);
signal Lo_out : std_logic_vector(15 downto 0);
-- No clocks detected in port list. Replace <clock> below with
-- appropriate port name
constant clk_period : time := 10 ns;
BEGIN
-- Instantiate the Unit Under Test (UUT)
uut: My_16bitMult_948282 PORT MAP (
A_inputM => A_inputM,
B_inputM => B_inputM,
Hi_out => Hi_out,
Lo_out => Lo_out
);
-- Stimulus process
stim_proc: process
begin
-- hold reset state for 100 ns.
wait for 100 ns;
wait for clk_period*10;
A_inputM<="0000000000000001";
B_inputM<="0000000000000100";
wait;
end process;
END;
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Entity: gr1553b_pads
-- File: gr1553b_pads.vhd
-- Author: Magnus Hjorth - Aeroflex Gaisler
-- Description: Pad instantiations for GR1553B
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library gaisler;
use gaisler.gr1553b_pkg.all;
library techmap;
use techmap.gencomp.all;
entity gr1553b_pads is
generic (
padtech: integer;
outen_pol: integer range 0 to 1;
level: integer := ttl;
slew: integer := 0;
voltage: integer := x33v;
strength: integer := 12;
filter: integer := 0
);
port (
txout: in gr1553b_txout_type;
rxin: out gr1553b_rxin_type;
busainen : out std_logic;
busainp : in std_logic;
busainn : in std_logic;
busaoutenin : out std_logic;
busaoutp : out std_logic;
busaoutn : out std_logic;
busbinen : out std_logic;
busbinp : in std_logic;
busbinn : in std_logic;
busboutenin : out std_logic;
busboutp : out std_logic;
busboutn : out std_logic
);
end;
architecture rtl of gr1553b_pads is
begin
outin_gen: if outen_pol /= 0 generate
busa_outin_pad : outpad
generic map (tech => padtech, level => level, slew => slew,
voltage => voltage, strength => strength)
port map (busaoutenin, txout.busA_txin);
busb_outin_pad : outpad
generic map (tech => padtech, level => level, slew => slew,
voltage => voltage, strength => strength)
port map (busboutenin, txout.busB_txin);
end generate;
outen_gen: if outen_pol = 0 generate
busa_outen_pad : outpad
generic map (tech => padtech, level => level, slew => slew,
voltage => voltage, strength => strength)
port map (busaoutenin, txout.busA_txen);
busb_outen_pad : outpad
generic map (tech => padtech, level => level, slew => slew,
voltage => voltage, strength => strength)
port map (busboutenin, txout.busB_txen);
end generate;
busa_inen_pad : outpad
generic map (tech => padtech, level => level, slew => slew,
voltage => voltage, strength => strength)
port map (busainen, txout.busA_rxen);
busa_inp_pad : inpad
generic map (tech => padtech, level => level, filter => filter,
voltage => voltage, strength => strength)
port map (busainp, rxin.busA_rxP);
busa_inn_pad : inpad
generic map (tech => padtech, level => level, filter => filter,
voltage => voltage, strength => strength)
port map (busainn, rxin.busA_rxN);
busa_outp_pad : outpad
generic map (tech => padtech, level => level, slew => slew,
voltage => voltage, strength => strength)
port map (busaoutp, txout.busA_txP);
busa_outn_pad : outpad
generic map (tech => padtech, level => level, slew => slew,
voltage => voltage, strength => strength)
port map (busaoutn, txout.busA_txN);
busb_inen_pad : outpad
generic map (tech => padtech, level => level, slew => slew,
voltage => voltage, strength => strength)
port map (busbinen, txout.busB_rxen);
busb_inp_pad : inpad
generic map (tech => padtech, level => level, filter => filter,
voltage => voltage, strength => strength)
port map (busbinp, rxin.busB_rxP);
busb_inn_pad : inpad
generic map (tech => padtech, level => level, filter => filter,
voltage => voltage, strength => strength)
port map (busbinn, rxin.busB_rxN);
busb_outp_pad : outpad
generic map (tech => padtech, level => level, slew => slew,
voltage => voltage, strength => strength)
port map (busboutp, txout.busB_txP);
busb_outn_pad : outpad
generic map (tech => padtech, level => level, slew => slew,
voltage => voltage, strength => strength)
port map (busboutn, txout.busB_txN);
end;
|
-----------------------------------------------------------------------------
-- LEON3 Demonstration design test bench
-- Copyright (C) 2004 Jiri Gaisler, Gaisler Research
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library gaisler;
use gaisler.libdcom.all;
use gaisler.sim.all;
library techmap;
use techmap.gencomp.all;
library micron;
use micron.components.all;
use work.config.all; -- configuration
use work.debug.all;
entity testbench is
generic (
fabtech : integer := CFG_FABTECH;
memtech : integer := CFG_MEMTECH;
padtech : integer := CFG_PADTECH;
clktech : integer := CFG_CLKTECH;
disas : integer := CFG_DISAS; -- Enable disassembly to console
dbguart : integer := CFG_DUART; -- Print UART on console
pclow : integer := CFG_PCLOW;
clkperiod : integer := 20; -- system clock period
romwidth : integer := 8+8*CFG_MCTRL_RAM16BIT; -- rom data width (8/16)
romdepth : integer := 16; -- rom address depth
sramwidth : integer := 32; -- ram data width (8/16/32)
sramdepth : integer := 18; -- ram address depth
srambanks : integer := 2 -- number of ram banks
);
end;
architecture behav of testbench is
constant promfile : string := "prom.srec"; -- rom contents
constant sramfile : string := "ram.srec"; -- ram contents
constant sdramfile : string := "ram.srec"; -- sdram contents
component leon3mp
generic (
fabtech : integer := CFG_FABTECH;
memtech : integer := CFG_MEMTECH;
padtech : integer := CFG_PADTECH;
clktech : integer := CFG_CLKTECH;
disas : integer := CFG_DISAS; -- Enable disassembly to console
dbguart : integer := CFG_DUART; -- Print UART on console
pclow : integer := CFG_PCLOW
);
port (
pb_sw : in std_logic_vector (4 downto 1); -- push buttons
pll_clk : in std_ulogic; -- PLL clock
led : out std_logic_vector(8 downto 1);
flash_a : out std_logic_vector(20 downto 0);
flash_d : inout std_logic_vector(15 downto 0);
sdram_a : out std_logic_vector(11 downto 0);
sdram_d : inout std_logic_vector(31 downto 0);
sdram_ba : out std_logic_vector(3 downto 0);
sdram_dqm : out std_logic_vector(3 downto 0);
sdram_clk : inout std_ulogic;
sdram_cke : out std_ulogic; -- sdram clock enable
sdram_csn : out std_ulogic; -- sdram chip select
sdram_wen : out std_ulogic; -- sdram write enable
sdram_rasn : out std_ulogic; -- sdram ras
sdram_casn : out std_ulogic; -- sdram cas
uart1_txd : out std_ulogic;
uart1_rxd : in std_ulogic;
uart1_rts : out std_ulogic;
uart1_cts : in std_ulogic;
uart2_txd : out std_ulogic;
uart2_rxd : in std_ulogic;
uart2_rts : out std_ulogic;
uart2_cts : in std_ulogic;
flash_oen : out std_ulogic;
flash_wen : out std_ulogic;
flash_cen : out std_ulogic;
flash_byte : out std_ulogic;
flash_ready : in std_ulogic;
flash_rpn : out std_ulogic;
flash_wpn : out std_ulogic;
phy_mii_data: inout std_logic; -- ethernet PHY interface
phy_tx_clk : in std_ulogic;
phy_rx_clk : in std_ulogic;
phy_rx_data : in std_logic_vector(3 downto 0);
phy_dv : in std_ulogic;
phy_rx_er : in std_ulogic;
phy_col : in std_ulogic;
phy_crs : in std_ulogic;
phy_tx_data : out std_logic_vector(3 downto 0);
phy_tx_en : out std_ulogic;
phy_mii_clk : out std_ulogic;
phy_100 : in std_ulogic; -- 100 Mbit indicator
phy_rst_n : out std_ulogic;
gpio : inout std_logic_vector(CFG_GRGPIO_WIDTH-1 downto 0);
-- lcd_data : inout std_logic_vector(7 downto 0);
-- lcd_rs : out std_ulogic;
-- lcd_rw : out std_ulogic;
-- lcd_en : out std_ulogic;
-- lcd_backl : out std_ulogic;
can_txd : out std_ulogic;
can_rxd : in std_ulogic;
smsc_addr : out std_logic_vector(14 downto 0);
smsc_data : inout std_logic_vector(31 downto 0);
smsc_nbe : out std_logic_vector(3 downto 0);
smsc_resetn : out std_ulogic;
smsc_ardy : in std_ulogic;
-- smsc_intr : in std_ulogic;
smsc_nldev : in std_ulogic;
smsc_nrd : out std_ulogic;
smsc_nwr : out std_ulogic;
smsc_ncs : out std_ulogic;
smsc_aen : out std_ulogic;
smsc_lclk : out std_ulogic;
smsc_wnr : out std_ulogic;
smsc_rdyrtn : out std_ulogic;
smsc_cycle : out std_ulogic;
smsc_nads : out std_ulogic
);
end component;
signal clk : std_logic := '0';
signal Rst : std_logic := '0'; -- Reset
constant ct : integer := clkperiod/2;
signal address : std_logic_vector(21 downto 0);
signal flash_d : std_logic_vector(15 downto 0);
signal romsn : std_ulogic;
signal oen : std_ulogic;
signal writen : std_ulogic;
signal dsuen, dsutx, dsurx, dsubre, dsuact : std_ulogic;
signal dsurst : std_ulogic;
signal test : std_ulogic;
signal error : std_logic;
signal GND : std_ulogic := '0';
signal VCC : std_ulogic := '1';
signal NC : std_ulogic := 'Z';
signal clk2 : std_ulogic := '1';
signal sdcke : std_ulogic; -- clk en
signal sdcsn : std_ulogic; -- chip sel
signal sdwen : std_ulogic; -- write en
signal sdrasn : std_ulogic; -- row addr stb
signal sdcasn : std_ulogic; -- col addr stb
signal sddqm : std_logic_vector ( 3 downto 0); -- data i/o mask
signal sdclk : std_ulogic;
signal txd1, rxd1 : std_ulogic;
signal txd2, rxd2 : std_ulogic;
signal etx_clk, erx_clk, erx_dv, erx_er, erx_col, erx_crs, etx_en, etx_er : std_logic:='0';
signal erxd, etxd: std_logic_vector(3 downto 0):=(others=>'0');
signal erxdt, etxdt: std_logic_vector(7 downto 0):=(others=>'0');
signal emdc, emdio: std_logic;
signal gtx_clk : std_ulogic;
signal ereset : std_logic;
signal led : std_logic_vector(8 downto 1);
constant lresp : boolean := false;
signal sa : std_logic_vector(14 downto 0);
signal ba : std_logic_vector(3 downto 0);
signal sd : std_logic_vector(31 downto 0);
signal pb_sw : std_logic_vector(4 downto 1);
signal lcd_data : std_logic_vector(7 downto 0);
signal lcd_rs : std_ulogic;
signal lcd_rw : std_ulogic;
signal lcd_en : std_ulogic;
signal lcd_backl: std_ulogic;
signal can_txd : std_ulogic;
signal can_rxd : std_ulogic;
signal gpio : std_logic_vector(CFG_GRGPIO_WIDTH-1 downto 0);
signal smsc_addr : std_logic_vector(21 downto 0);
signal smsc_data : std_logic_vector(31 downto 0);
signal smsc_nbe : std_logic_vector(3 downto 0);
signal smsc_resetn : std_ulogic;
signal smsc_ardy : std_ulogic;
signal smsc_intr : std_ulogic;
signal smsc_nldev : std_ulogic;
signal smsc_nrd : std_ulogic;
signal smsc_nwr : std_ulogic;
signal smsc_ncs : std_ulogic;
signal smsc_aen : std_ulogic;
signal smsc_lclk : std_ulogic;
signal smsc_wnr : std_ulogic;
signal smsc_rdyrtn : std_ulogic;
signal smsc_cycle : std_ulogic;
signal smsc_nads : std_ulogic;
begin
-- clock and reset
clk <= not clk after ct * 1 ns;
rst <= dsurst;
dsuen <= '1'; dsubre <= '0'; rxd1 <= '1';
can_rxd <= '1'; error <= led(8); sa(14 downto 12) <= "000";
pb_sw <= rst & "00" & dsubre;
cpu : leon3mp
generic map ( fabtech, memtech, padtech, clktech,
disas, dbguart, pclow )
port map (pb_sw, clk, led, address(21 downto 1), flash_d,
sa(11 downto 0), sd, ba, sddqm, sdclk, sdcke, sdcsn, sdwen, sdrasn,
sdcasn, txd1, rxd1, open, gnd, dsutx, dsurx, open, gnd,
oen, writen, romsn, open, vcc, open, open,
emdio, etx_clk, erx_clk, erxd, erx_dv, erx_er, erx_col, erx_crs,
etxd, etx_en, emdc, gnd, ereset, gpio,
-- lcd_data, lcd_rs, lcd_rw, lcd_en, lcd_backl,
can_txd, can_rxd,
smsc_addr(14 downto 0), smsc_data, smsc_nbe, smsc_resetn, smsc_ardy,-- smsc_intr,
smsc_nldev, smsc_nrd, smsc_nwr, smsc_ncs, smsc_aen, smsc_lclk,
smsc_wnr, smsc_rdyrtn, smsc_cycle, smsc_nads);
u0: mt48lc16m16a2 generic map (index => 0, fname => sdramfile)
PORT MAP(
Dq => sd(31 downto 16), Addr => sa(12 downto 0),
Ba => ba(1 downto 0), Clk => sdclk, Cke => sdcke,
Cs_n => sdcsn, Ras_n => sdrasn, Cas_n => sdcasn, We_n => sdwen,
Dqm => sddqm(3 downto 2));
u1: mt48lc16m16a2 generic map (index => 16, fname => sdramfile)
PORT MAP(
Dq => sd(15 downto 0), Addr => sa(12 downto 0),
Ba => ba(3 downto 2), Clk => sdclk, Cke => sdcke,
Cs_n => sdcsn, Ras_n => sdrasn, Cas_n => sdcasn, We_n => sdwen,
Dqm => sddqm(1 downto 0));
rom8 : if romwidth /= 16 generate
prom0 : sram16 generic map (index => 4, abits => romdepth, fname => promfile)
port map (address(romdepth downto 1), flash_d(15 downto 0), gnd, gnd,
romsn, writen, oen);
address(0) <= flash_d(15);
end generate;
rom16 : if romwidth = 16 generate
prom0 : sram16 generic map (index => 4, abits => romdepth, fname => promfile)
port map (address(romdepth downto 1), flash_d(15 downto 0), gnd, gnd,
romsn, writen, oen);
address(0) <= '0';
end generate;
emdio <= 'H';
erxd <= erxdt(3 downto 0);
etxdt <= "0000" & etxd;
p0: phy
generic map(base1000_t_fd => 0, base1000_t_hd => 0)
port map(rst, emdio, etx_clk, erx_clk, erxdt, erx_dv,
erx_er, erx_col, erx_crs, etxdt, etx_en, etx_er, emdc, gtx_clk);
error <= 'H'; -- ERROR pull-up
iuerr : process
begin
wait for 2000 ns;
if to_x01(error) = '1' then wait on error; end if;
assert (to_x01(error) = '1')
report "*** IU in error mode, simulation halted ***"
severity failure ;
end process;
flash_d <= buskeep(flash_d) after 5 ns;
sd <= buskeep(sd) after 5 ns;
smsc_data <= buskeep(smsc_data) after 5 ns;
smsc_addr(21 downto 15) <= (others => '0');
test0 : grtestmod
port map ( rst, clk, error, address(21 downto 2), smsc_data,
smsc_ncs, oen, writen, open);
dsucom : process
procedure dsucfg(signal dsurx : in std_ulogic; signal dsutx : out std_ulogic) is
variable w32 : std_logic_vector(31 downto 0);
variable c8 : std_logic_vector(7 downto 0);
constant txp : time := 160 * 1 ns;
begin
dsutx <= '1';
dsurst <= '0';
wait for 500 ns;
dsurst <= '1';
wait;
wait for 5000 ns;
txc(dsutx, 16#55#, txp); -- sync uart
txc(dsutx, 16#c0#, txp);
txa(dsutx, 16#90#, 16#40#, 16#00#, 16#44#, txp);
txa(dsutx, 16#00#, 16#00#, 16#20#, 16#00#, txp);
txc(dsutx, 16#80#, txp);
txa(dsutx, 16#90#, 16#40#, 16#00#, 16#44#, txp);
wait;
txc(dsutx, 16#c0#, txp);
txa(dsutx, 16#00#, 16#00#, 16#0a#, 16#aa#, txp);
txa(dsutx, 16#00#, 16#55#, 16#00#, 16#55#, txp);
txc(dsutx, 16#c0#, txp);
txa(dsutx, 16#00#, 16#00#, 16#0a#, 16#a0#, txp);
txa(dsutx, 16#01#, 16#02#, 16#09#, 16#33#, txp);
txc(dsutx, 16#c0#, txp);
txa(dsutx, 16#90#, 16#00#, 16#00#, 16#00#, txp);
txa(dsutx, 16#00#, 16#00#, 16#00#, 16#2e#, txp);
txc(dsutx, 16#c0#, txp);
txa(dsutx, 16#91#, 16#00#, 16#00#, 16#00#, txp);
txa(dsutx, 16#00#, 16#00#, 16#00#, 16#2e#, txp);
txc(dsutx, 16#c0#, txp);
txa(dsutx, 16#90#, 16#00#, 16#00#, 16#20#, txp);
txa(dsutx, 16#00#, 16#00#, 16#00#, 16#0f#, txp);
txc(dsutx, 16#c0#, txp);
txa(dsutx, 16#90#, 16#00#, 16#00#, 16#20#, txp);
txa(dsutx, 16#00#, 16#00#, 16#00#, 16#00#, txp);
txc(dsutx, 16#c0#, txp);
txa(dsutx, 16#80#, 16#00#, 16#02#, 16#10#, txp);
txa(dsutx, 16#00#, 16#00#, 16#00#, 16#0f#, txp);
txc(dsutx, 16#c0#, txp);
txa(dsutx, 16#91#, 16#40#, 16#00#, 16#24#, txp);
txa(dsutx, 16#00#, 16#00#, 16#00#, 16#24#, txp);
txc(dsutx, 16#c0#, txp);
txa(dsutx, 16#91#, 16#70#, 16#00#, 16#00#, txp);
txa(dsutx, 16#00#, 16#00#, 16#00#, 16#03#, txp);
txc(dsutx, 16#c0#, txp);
txa(dsutx, 16#90#, 16#00#, 16#00#, 16#20#, txp);
txa(dsutx, 16#00#, 16#00#, 16#ff#, 16#ff#, txp);
txc(dsutx, 16#c0#, txp);
txa(dsutx, 16#90#, 16#40#, 16#00#, 16#48#, txp);
txa(dsutx, 16#00#, 16#00#, 16#00#, 16#12#, txp);
txc(dsutx, 16#c0#, txp);
txa(dsutx, 16#90#, 16#40#, 16#00#, 16#60#, txp);
txa(dsutx, 16#00#, 16#00#, 16#12#, 16#10#, txp);
txc(dsutx, 16#80#, txp);
txa(dsutx, 16#90#, 16#00#, 16#00#, 16#00#, txp);
rxi(dsurx, w32, txp, lresp);
txc(dsutx, 16#a0#, txp);
txa(dsutx, 16#40#, 16#00#, 16#00#, 16#00#, txp);
rxi(dsurx, w32, txp, lresp);
end;
begin
dsucfg(dsutx, dsurx);
wait;
end process;
end ;
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Package: mmuconfig
-- File: mmuconfig.vhd
-- Author: Konrad Eisele, Jiri Gaisler, Gaisler Research
-- Description: MMU types and constants
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library grlib;
use grlib.stdlib.all;
library gaisler;
package mmuconfig is
constant M_CTX_SZ : integer := 8;
constant M_ENT_MAX : integer := 64;
constant XM_ENT_MAX_LOG : integer := log2(M_ENT_MAX);
constant M_ENT_MAX_LOG : integer := XM_ENT_MAX_LOG;
type mmu_idcache is (id_icache, id_dcache);
-- ##############################################################
-- 1.0 virtual address [sparc V8: p.243,Appx.H,Figure H-4]
-- +--------+--------+--------+---------------+
-- a) | INDEX1 | INDEX2 | INDEX3 | OFFSET |
-- +--------+--------+--------+---------------+
-- 31 24 23 18 17 12 11 0
constant VA_I1_SZ : integer := 8;
constant VA_I2_SZ : integer := 6;
constant VA_I3_SZ : integer := 6;
constant VA_I_SZ : integer := VA_I1_SZ+VA_I2_SZ+VA_I3_SZ;
constant VA_I_MAX : integer := 8;
constant VA_I1_U : integer := 31;
constant VA_I1_D : integer := 32-VA_I1_SZ;
constant VA_I2_U : integer := 31-VA_I1_SZ;
constant VA_I2_D : integer := 32-VA_I1_SZ-VA_I2_SZ;
constant VA_I3_U : integer := 31-VA_I1_SZ-VA_I2_SZ;
constant VA_I3_D : integer := 32-VA_I_SZ;
constant VA_I_U : integer := 31;
constant VA_I_D : integer := 32-VA_I_SZ;
constant VA_OFF_U : integer := 31-VA_I_SZ;
constant VA_OFF_D : integer := 0;
constant VA_OFFCTX_U : integer := 31;
constant VA_OFFCTX_D : integer := 0;
constant VA_OFFREG_U : integer := 31-VA_I1_SZ;
constant VA_OFFREG_D : integer := 0;
constant VA_OFFSEG_U : integer := 31-VA_I1_SZ-VA_I2_SZ;
constant VA_OFFSEG_D : integer := 0;
constant VA_OFFPAG_U : integer := 31-VA_I_SZ;
constant VA_OFFPAG_D : integer := 0;
-- 8k pages
-- 7 6 6 13
-- +--------+--------+--------+---------------+
-- a) | INDEX1 | INDEX2 | INDEX3 | OFFSET |
-- +--------+--------+--------+---------------+
-- 31 25 24 19 18 13 12 0
constant P8K_VA_I1_SZ : integer := 7;
constant P8K_VA_I2_SZ : integer := 6;
constant P8K_VA_I3_SZ : integer := 6;
constant P8K_VA_I_SZ : integer := P8K_VA_I1_SZ+P8K_VA_I2_SZ+P8K_VA_I3_SZ;
constant P8K_VA_I_MAX : integer := 7;
constant P8K_VA_I1_U : integer := 31;
constant P8K_VA_I1_D : integer := 32-P8K_VA_I1_SZ;
constant P8K_VA_I2_U : integer := 31-P8K_VA_I1_SZ;
constant P8K_VA_I2_D : integer := 32-P8K_VA_I1_SZ-P8K_VA_I2_SZ;
constant P8K_VA_I3_U : integer := 31-P8K_VA_I1_SZ-P8K_VA_I2_SZ;
constant P8K_VA_I3_D : integer := 32-P8K_VA_I_SZ;
constant P8K_VA_I_U : integer := 31;
constant P8K_VA_I_D : integer := 32-P8K_VA_I_SZ;
constant P8K_VA_OFF_U : integer := 31-P8K_VA_I_SZ;
constant P8K_VA_OFF_D : integer := 0;
constant P8K_VA_OFFCTX_U : integer := 31;
constant P8K_VA_OFFCTX_D : integer := 0;
constant P8K_VA_OFFREG_U : integer := 31-P8K_VA_I1_SZ;
constant P8K_VA_OFFREG_D : integer := 0;
constant P8K_VA_OFFSEG_U : integer := 31-P8K_VA_I1_SZ-P8K_VA_I2_SZ;
constant P8K_VA_OFFSEG_D : integer := 0;
constant P8K_VA_OFFPAG_U : integer := 31-P8K_VA_I_SZ;
constant P8K_VA_OFFPAG_D : integer := 0;
-- 16k pages
-- 6 6 6 14
-- +--------+--------+--------+---------------+
-- a) | INDEX1 | INDEX2 | INDEX3 | OFFSET |
-- +--------+--------+--------+---------------+
-- 31 26 25 20 19 14 13 0
constant P16K_VA_I1_SZ : integer := 6;
constant P16K_VA_I2_SZ : integer := 6;
constant P16K_VA_I3_SZ : integer := 6;
constant P16K_VA_I_SZ : integer := P16K_VA_I1_SZ+P16K_VA_I2_SZ+P16K_VA_I3_SZ;
constant P16K_VA_I_MAX : integer := 6;
constant P16K_VA_I1_U : integer := 31;
constant P16K_VA_I1_D : integer := 32-P16K_VA_I1_SZ;
constant P16K_VA_I2_U : integer := 31-P16K_VA_I1_SZ;
constant P16K_VA_I2_D : integer := 32-P16K_VA_I1_SZ-P16K_VA_I2_SZ;
constant P16K_VA_I3_U : integer := 31-P16K_VA_I1_SZ-P16K_VA_I2_SZ;
constant P16K_VA_I3_D : integer := 32-P16K_VA_I_SZ;
constant P16K_VA_I_U : integer := 31;
constant P16K_VA_I_D : integer := 32-P16K_VA_I_SZ;
constant P16K_VA_OFF_U : integer := 31-P16K_VA_I_SZ;
constant P16K_VA_OFF_D : integer := 0;
constant P16K_VA_OFFCTX_U : integer := 31;
constant P16K_VA_OFFCTX_D : integer := 0;
constant P16K_VA_OFFREG_U : integer := 31-P16K_VA_I1_SZ;
constant P16K_VA_OFFREG_D : integer := 0;
constant P16K_VA_OFFSEG_U : integer := 31-P16K_VA_I1_SZ-P16K_VA_I2_SZ;
constant P16K_VA_OFFSEG_D : integer := 0;
constant P16K_VA_OFFPAG_U : integer := 31-P16K_VA_I_SZ;
constant P16K_VA_OFFPAG_D : integer := 0;
-- 32k pages
-- 4 7 6 15
-- +--------+--------+--------+---------------+
-- a) | INDEX1 | INDEX2 | INDEX3 | OFFSET |
-- +--------+--------+--------+---------------+
-- 31 28 27 21 20 15 14 0
constant P32K_VA_I1_SZ : integer := 4;
constant P32K_VA_I2_SZ : integer := 7;
constant P32K_VA_I3_SZ : integer := 6;
constant P32K_VA_I_SZ : integer := P32K_VA_I1_SZ+P32K_VA_I2_SZ+P32K_VA_I3_SZ;
constant P32K_VA_I_MAX : integer := 7;
constant P32K_VA_I1_U : integer := 31;
constant P32K_VA_I1_D : integer := 32-P32K_VA_I1_SZ;
constant P32K_VA_I2_U : integer := 31-P32K_VA_I1_SZ;
constant P32K_VA_I2_D : integer := 32-P32K_VA_I1_SZ-P32K_VA_I2_SZ;
constant P32K_VA_I3_U : integer := 31-P32K_VA_I1_SZ-P32K_VA_I2_SZ;
constant P32K_VA_I3_D : integer := 32-P32K_VA_I_SZ;
constant P32K_VA_I_U : integer := 31;
constant P32K_VA_I_D : integer := 32-P32K_VA_I_SZ;
constant P32K_VA_OFF_U : integer := 31-P32K_VA_I_SZ;
constant P32K_VA_OFF_D : integer := 0;
constant P32K_VA_OFFCTX_U : integer := 31;
constant P32K_VA_OFFCTX_D : integer := 0;
constant P32K_VA_OFFREG_U : integer := 31-P32K_VA_I1_SZ;
constant P32K_VA_OFFREG_D : integer := 0;
constant P32K_VA_OFFSEG_U : integer := 31-P32K_VA_I1_SZ-P32K_VA_I2_SZ;
constant P32K_VA_OFFSEG_D : integer := 0;
constant P32K_VA_OFFPAG_U : integer := 31-P32K_VA_I_SZ;
constant P32K_VA_OFFPAG_D : integer := 0;
-- ##############################################################
-- 2.0 PAGE TABE DESCRIPTOR (PTD) [sparc V8: p.247,Appx.H,Figure H-7]
--
-- +-------------------------------------------------+---+---+
-- | Page Table Pointer (PTP) | 0 | 0 |
-- +-------------------------------------------------+---+---+
-- 31 2 1 0
--
-- 2.1 PAGE TABE ENTRY (PTE) [sparc V8: p.247,Appx.H,Figure H-8]
--
-- +-----------------------------+---+---+---+-----------+---+
-- |Physical Page Number (PPN) | C | M | R | ACC | ET|
-- +-----------------------------+---+---+---+-----------+---+
-- 31 8 7 6 5 4 2 1 0
--
constant PTD_PTP_U : integer := 31; -- PTD: page table pointer
constant PTD_PTP_D : integer := 2;
constant PTD_PTP32_U : integer := 27; -- PTD: page table pointer 32 bit
constant PTD_PTP32_D : integer := 2;
constant PTE_PPN_U : integer := 31; -- PTE: physical page number
constant PTE_PPN_D : integer := 8;
constant PTE_PPN_S : integer := (PTE_PPN_U+1)-PTE_PPN_D; -- PTE: pysical page number size
constant PTE_PPN32_U : integer := 27; -- PTE: physical page number 32 bit addr
constant PTE_PPN32_D : integer := 8;
constant PTE_PPN32_S : integer := (PTE_PPN32_U+1)-PTE_PPN32_D; -- PTE: pysical page number 32 bit size
constant PTE_PPN32REG_U : integer := PTE_PPN32_U; -- PTE: pte part of merged result address
constant PTE_PPN32REG_D : integer := PTE_PPN32_U+1-VA_I1_SZ;
constant PTE_PPN32SEG_U : integer := PTE_PPN32_U;
constant PTE_PPN32SEG_D : integer := PTE_PPN32_U+1-VA_I1_SZ-VA_I2_SZ;
constant PTE_PPN32PAG_U : integer := PTE_PPN32_U;
constant PTE_PPN32PAG_D : integer := PTE_PPN32_U+1-VA_I_SZ;
-- 8k pages
constant P8K_PTE_PPN32REG_U : integer := PTE_PPN32_U; -- PTE: pte part of merged result address
constant P8K_PTE_PPN32REG_D : integer := PTE_PPN32_U+1-P8K_VA_I1_SZ;
constant P8K_PTE_PPN32SEG_U : integer := PTE_PPN32_U;
constant P8K_PTE_PPN32SEG_D : integer := PTE_PPN32_U+1-P8K_VA_I1_SZ-P8K_VA_I2_SZ;
constant P8K_PTE_PPN32PAG_U : integer := PTE_PPN32_U;
constant P8K_PTE_PPN32PAG_D : integer := PTE_PPN32_U+1-P8K_VA_I_SZ;
-- 16k pages
constant P16K_PTE_PPN32REG_U : integer := PTE_PPN32_U; -- PTE: pte part of merged result address
constant P16K_PTE_PPN32REG_D : integer := PTE_PPN32_U+1-P16K_VA_I1_SZ;
constant P16K_PTE_PPN32SEG_U : integer := PTE_PPN32_U;
constant P16K_PTE_PPN32SEG_D : integer := PTE_PPN32_U+1-P16K_VA_I1_SZ-P16K_VA_I2_SZ;
constant P16K_PTE_PPN32PAG_U : integer := PTE_PPN32_U;
constant P16K_PTE_PPN32PAG_D : integer := PTE_PPN32_U+1-P16K_VA_I_SZ;
-- 32k pages
constant P32K_PTE_PPN32REG_U : integer := PTE_PPN32_U; -- PTE: pte part of merged result address
constant P32K_PTE_PPN32REG_D : integer := PTE_PPN32_U+1-P32K_VA_I1_SZ;
constant P32K_PTE_PPN32SEG_U : integer := PTE_PPN32_U;
constant P32K_PTE_PPN32SEG_D : integer := PTE_PPN32_U+1-P32K_VA_I1_SZ-P32K_VA_I2_SZ;
constant P32K_PTE_PPN32PAG_U : integer := PTE_PPN32_U;
constant P32K_PTE_PPN32PAG_D : integer := PTE_PPN32_U+1-P32K_VA_I_SZ;
constant PTE_C : integer := 7; -- PTE: Cacheable bit
constant PTE_M : integer := 6; -- PTE: Modified bit
constant PTE_R : integer := 5; -- PTE: Reference Bit - a "1" indicates an PTE
constant PTE_ACC_U : integer := 4; -- PTE: Access field
constant PTE_ACC_D : integer := 2;
constant ACC_W : integer := 2; -- PTE::ACC : write permission
constant ACC_E : integer := 3; -- PTE::ACC : exec permission
constant ACC_SU : integer := 4; -- PTE::ACC : privileged
constant PT_ET_U : integer := 1; -- PTD/PTE: PTE Type
constant PT_ET_D : integer := 0;
constant ET_INV : std_logic_vector(1 downto 0) := "00";
constant ET_PTD : std_logic_vector(1 downto 0) := "01";
constant ET_PTE : std_logic_vector(1 downto 0) := "10";
constant ET_RVD : std_logic_vector(1 downto 0) := "11";
constant PADDR_PTD_U : integer := 31;
constant PADDR_PTD_D : integer := 6;
-- ##############################################################
-- 3.0 TLBCAM TAG hardware representation (TTG)
--
type tlbcam_reg is record
ET : std_logic_vector(1 downto 0); -- et field
ACC : std_logic_vector(2 downto 0); -- on flush/probe this will become FPTY
M : std_logic; -- modified
R : std_logic; -- referenced
SU : std_logic; -- equal ACC >= 6
VALID : std_logic;
LVL : std_logic_vector(1 downto 0); -- level in pth
I1 : std_logic_vector(7 downto 0); -- vaddr
I2 : std_logic_vector(5 downto 0);
I3 : std_logic_vector(5 downto 0);
CTX : std_logic_vector(M_CTX_SZ-1 downto 0); -- ctx number
PPN : std_logic_vector(PTE_PPN_S-1 downto 0); -- physical page number
C : std_logic; -- cachable
end record;
constant tlbcam_reg_none : tlbcam_reg := ("00", "000", '0', '0', '0', '0',
"00", "00000000", "000000", "000000", "00000000", (others => '0'), '0');
-- tlbcam_reg::LVL
constant LVL_PAGE : std_logic_vector(1 downto 0) := "00"; -- equal tlbcam_tfp::TYP FPTY_PAGE
constant LVL_SEGMENT : std_logic_vector(1 downto 0) := "01"; -- equal tlbcam_tfp::TYP FPTY_SEGMENT
constant LVL_REGION : std_logic_vector(1 downto 0) := "10"; -- equal tlbcam_tfp::TYP FPTY_REGION
constant LVL_CTX : std_logic_vector(1 downto 0) := "11"; -- equal tlbcam_tfp::TYP FPTY_CTX
-- ##############################################################
-- 4.0 TLBCAM tag i/o for translation/flush/(probe)
--
type tlbcam_tfp is record
TYP : std_logic_vector(2 downto 0); -- f/(p) type
I1 : std_logic_vector(7 downto 0); -- vaddr
I2 : std_logic_vector(5 downto 0);
I3 : std_logic_vector(5 downto 0);
CTX : std_logic_vector(M_CTX_SZ-1 downto 0); -- ctx number
M : std_logic;
end record;
constant tlbcam_tfp_none : tlbcam_tfp := ("000", "00000000", "000000", "000000", "00000000", '0');
--tlbcam_tfp::TYP
constant FPTY_PAGE : std_logic_vector(2 downto 0) := "000"; -- level 3 PTE match I1+I2+I3
constant FPTY_SEGMENT : std_logic_vector(2 downto 0) := "001"; -- level 2/3 PTE/PTD match I1+I2
constant FPTY_REGION : std_logic_vector(2 downto 0) := "010"; -- level 1/2/3 PTE/PTD match I1
constant FPTY_CTX : std_logic_vector(2 downto 0) := "011"; -- level 0/1/2/3 PTE/PTD ctx
constant FPTY_N : std_logic_vector(2 downto 0) := "100"; -- entire tlb
-- ##############################################################
-- 5.0 MMU Control Register [sparc V8: p.253,Appx.H,Figure H-10]
--
-- +-------+-----+------------------+-----+-------+--+--+
-- | IMPL | VER | SC | PSO | resvd |NF|E |
-- +-------+-----+------------------+-----+-------+--+--+
-- 31 28 27 24 23 8 7 6 2 1 0
--
-- MMU Context Pointer [sparc V8: p.254,Appx.H,Figure H-11]
-- +-------------------------------------------+--------+
-- | Context Table Pointer | resvd |
-- +-------------------------------------------+--------+
-- 31 2 1 0
--
-- MMU Context Number [sparc V8: p.255,Appx.H,Figure H-12]
-- +----------------------------------------------------+
-- | Context Table Pointer |
-- +----------------------------------------------------+
-- 31 0
--
-- fault status/address register [sparc V8: p.256,Appx.H,Table H-13/14]
-- +------------+-----+---+----+----+-----+----+
-- | reserved | EBE | L | AT | FT | FAV | OW |
-- +------------+-----+---+----+----+-----+----+
-- 31 18 17 10 9 8 7 5 4 2 1 0
--
-- +----------------------------------------------------+
-- | fault address register |
-- +----------------------------------------------------+
-- 31 0
constant MMCTRL_CTXP_SZ : integer := 30;
constant MMCTRL_PTP32_U : integer := 25;
constant MMCTRL_PTP32_D : integer := 0;
constant MMCTRL_E : integer := 0;
constant MMCTRL_NF : integer := 1;
constant MMCTRL_PSO : integer := 7;
constant MMCTRL_SC_U : integer := 23;
constant MMCTRL_SC_D : integer := 8;
constant MMCTRL_PGSZ_U : integer := 17;
constant MMCTRL_PGSZ_D : integer := 16;
constant MMCTRL_VER_U : integer := 27;
constant MMCTRL_VER_D : integer := 24;
constant MMCTRL_IMPL_U : integer := 31;
constant MMCTRL_IMPL_D : integer := 28;
constant MMCTRL_TLBDIS : integer := 15;
constant MMCTRL_TLBSEP : integer := 14;
constant MMCTXP_U : integer := 31;
constant MMCTXP_D : integer := 2;
constant MMCTXNR_U : integer := M_CTX_SZ-1;
constant MMCTXNR_D : integer := 0;
constant FS_SZ : integer := 18; -- fault status size
constant FS_EBE_U : integer := 17;
constant FS_EBE_D : integer := 10;
constant FS_L_U : integer := 9;
constant FS_L_D : integer := 8;
constant FS_L_CTX : std_logic_vector(1 downto 0) := "00";
constant FS_L_L1 : std_logic_vector(1 downto 0) := "01";
constant FS_L_L2 : std_logic_vector(1 downto 0) := "10";
constant FS_L_L3 : std_logic_vector(1 downto 0) := "11";
constant FS_AT_U : integer := 7;
constant FS_AT_D : integer := 5;
constant FS_AT_LS : natural := 7; --L=0 S=1
constant FS_AT_ID : natural := 6; --D=0 I=1
constant FS_AT_SU : natural := 5; --U=0 SU=1
constant FS_AT_LUDS : std_logic_vector(2 downto 0) := "000";
constant FS_AT_LSDS : std_logic_vector(2 downto 0) := "001";
constant FS_AT_LUIS : std_logic_vector(2 downto 0) := "010";
constant FS_AT_LSIS : std_logic_vector(2 downto 0) := "011";
constant FS_AT_SUDS : std_logic_vector(2 downto 0) := "100";
constant FS_AT_SSDS : std_logic_vector(2 downto 0) := "101";
constant FS_AT_SUIS : std_logic_vector(2 downto 0) := "110";
constant FS_AT_SSIS : std_logic_vector(2 downto 0) := "111";
constant FS_FT_U : integer := 4;
constant FS_FT_D : integer := 2;
constant FS_FT_NONE : std_logic_vector(2 downto 0) := "000";
constant FS_FT_INV : std_logic_vector(2 downto 0) := "001";
constant FS_FT_PRO : std_logic_vector(2 downto 0) := "010";
constant FS_FT_PRI : std_logic_vector(2 downto 0) := "011";
constant FS_FT_TRANS : std_logic_vector(2 downto 0):= "100";
constant FS_FT_BUS : std_logic_vector(2 downto 0) := "101";
constant FS_FT_INT : std_logic_vector(2 downto 0) := "110";
constant FS_FT_RVD : std_logic_vector(2 downto 0) := "111";
constant FS_FAV : natural := 1;
constant FS_OW : natural := 0;
--# mmu ctrl reg
type mmctrl_type1 is record
e : std_logic; -- enable
nf : std_logic; -- no fault
pso : std_logic; -- partial store order
-- pre : std_logic; -- pretranslation source
-- pri : std_logic; -- i/d priority
pagesize : std_logic_vector(1 downto 0);-- page size
ctx : std_logic_vector(M_CTX_SZ-1 downto 0);-- context nr
ctxp : std_logic_vector(MMCTRL_CTXP_SZ-1 downto 0); -- context table pointer
tlbdis : std_logic; -- tlb disabled
bar : std_logic_vector(1 downto 0); -- preplace barrier
end record;
constant mmctrl_type1_none : mmctrl_type1 := ('0', '0', '0', (others => '0'), (others => '0'), (others => '0'), '0', (others => '0'));
--# fault status reg
type mmctrl_fs_type is record
ow : std_logic;
fav : std_logic;
ft : std_logic_vector(2 downto 0); -- fault type
at_ls : std_logic; -- access type, load/store
at_id : std_logic; -- access type, i/dcache
at_su : std_logic; -- access type, su/user
l : std_logic_vector(1 downto 0); -- level
ebe : std_logic_vector(7 downto 0);
end record;
constant mmctrl_fs_zero : mmctrl_fs_type :=
('0', '0', "000", '0', '0', '0', "00", "00000000");
type mmctrl_type2 is record
fs : mmctrl_fs_type;
valid : std_logic;
fa : std_logic_vector(VA_I_SZ-1 downto 0); -- fault address register
end record;
constant mmctrl2_zero : mmctrl_type2 :=
(mmctrl_fs_zero, '0', zero32(VA_I_SZ-1 downto 0));
-- ##############################################################
-- 6. Virtual Flush/Probe address [sparc V8: p.249,Appx.H,Figure H-9]
-- +---------------------------------------+--------+-------+
-- | VIRTUAL FLUSH&Probe Address (VFPA) | type | rvd |
-- +---------------------------------------+--------+-------+
-- 31 12 11 8 7 0
--
--
subtype FPA is natural range 31 downto 12;
constant FPA_I1_U : integer := 31;
constant FPA_I1_D : integer := 24;
constant FPA_I2_U : integer := 23;
constant FPA_I2_D : integer := 18;
constant FPA_I3_U : integer := 17;
constant FPA_I3_D : integer := 12;
constant FPTY_U : integer := 10; -- only 3 bits
constant FPTY_D : integer := 8;
-- ##############################################################
-- 7. control register virtual address [sparc V8: p.253,Appx.H,Table H-5]
-- +---------------------------------+-----+--------+
-- | | CNR | rsvd |
-- +---------------------------------+-----+--------+
-- 31 10 8 7 0
constant CNR_U : integer := 10;
constant CNR_D : integer := 8;
constant CNR_CTRL : std_logic_vector(2 downto 0) := "000";
constant CNR_CTXP : std_logic_vector(2 downto 0) := "001";
constant CNR_CTX : std_logic_vector(2 downto 0) := "010";
constant CNR_F : std_logic_vector(2 downto 0) := "011";
constant CNR_FADDR : std_logic_vector(2 downto 0) := "100";
-- ##############################################################
-- 8. Precise flush (ASI 0x10-14) [sparc V8: p.266,Appx.I]
-- supported: ASI_FLUSH_PAGE
-- ASI_FLUSH_CTX
constant PFLUSH_PAGE : std_logic := '0';
constant PFLUSH_CTX : std_logic := '1';
-- ##############################################################
-- 9. Diagnostic access
--
constant DIAGF_LVL_U : integer := 1;
constant DIAGF_LVL_D : integer := 0;
constant DIAGF_WR : integer := 3;
constant DIAGF_HIT : integer := 4;
constant DIAGF_CTX_U : integer := 12;
constant DIAGF_CTX_D : integer := 5;
constant DIAGF_VALID : integer := 13;
end mmuconfig;
|
--SINGLE_FILE_TAG
-------------------------------------------------------------------------------
-- $Id: steer_module_write.vhd,v 1.2 2003/05/07 22:45:11 ostlerf Exp $
-------------------------------------------------------------------------------
-- Steer_Module_Write - entity/architecture pair
-------------------------------------------------------------------------------
--
-- ****************************
-- ** Copyright Xilinx, Inc. **
-- ** All rights reserved. **
-- ****************************
--
-------------------------------------------------------------------------------
-- Filename: steer_module_write.vhd
-- Version: v1.00b
-- Description: Read and Write Steering logic for IPIF
--
-- For writes, this logic steers data from the correct byte
-- lane to IPIF devices which may be smaller than the bus
-- width. The BE signals are also steered if the BE_Steer
-- signal is asserted, which indicates that the address space
-- being accessed has a smaller maximum data transfer size
-- than the bus size.
--
-- For writes, the Decode_size signal determines how read
-- data is steered onto the byte lanes. To simplify the
-- logic, the read data is mirrored onto the entire data
-- bus, insuring that the lanes corrsponding to the BE's
-- have correct data.
--
--
--
-------------------------------------------------------------------------------
-- Structure:
--
-- steer_module_write.vhd
--
-------------------------------------------------------------------------------
-- Author: BLT
-- History:
-- BLT 4-26-2002 -- First version
-- ^^^^^^
-- First version of steering logic module.
-- ~~~~~~
--
-- DET 8/26/2002 Initial
-- ^^^^^^
-- - Corrected a problem with the BE outputs when Decode_size = "100" and
-- the decode_size is supposed to be used.
-- ~~~~~~
--
-- BLT 11-18-2002 -- Update to version v1.00b
-- ^^^^^^
-- Updated to use ipif_common_v1_00_b, which fixed a simulation problem
-- in the ipif_steer logic
-- ~~~~~~
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_cmb"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_signed.all;
use IEEE.std_logic_misc.all;
library ipif_common_v1_00_d;
use ipif_common_v1_00_d.STEER_TYPES.all;
-------------------------------------------------------------------------------
-- Port declarations
-- generic definitions:
-- C_DWIDTH : integer := width of host databus attached to the IPIF
-- C_SMALLEST : integer := width of smallest device (not access size)
-- attached to the IPIF
-- C_LARGEST : integer := width of largest device (not access size)
-- attached to the IPIF
-- C_MIRROR_SIZE : integer := smallest unit of data that is mirrored
-- C_AWIDTH : integer := width of the host address bus attached to
-- the IPIF
-- port definitions:
-- Wr_Data_In : in Write Data In (from host data bus)
-- Rd_Data_In : in Read Data In (from IPIC data bus)
-- Addr : in Address bus from host address bus
-- BE_In : in Byte Enables In from host side
-- Decode_size : in Size of MAXIMUM data access allowed to
-- a particular address map decode.
--
-- Size indication (Decode_size)
-- 001 - byte
-- 010 - halfword
-- 011 - word
-- 100 - doubleword
-- 101 - 128-b
-- 110 - 256-b
-- 111 - 512-b
-- num_bytes = 2^(n-1)
--
-- BE_Steer : in BE_Steer = 1 : steer BE's onto IPIF BE bus
-- BE_Steer = 0 : don't steer BE's, pass through
-- Wr_Data_Out : out Write Data Out (to IPIF data bus)
-- Rd_Data_Out : out Read Data Out (to host data bus)
-- BE_Out : out Byte Enables Out to IPIF side
--
-- Note: I have no way of knowing what the master size is for master writes
-- so smaller masters on the
-------------------------------------------------------------------------------
entity Steer_Module_Write is
generic (
C_DWIDTH_IN : integer := 32; -- 8, 16, 32, 64, 128, 256, or 512 -- HOST
C_DWIDTH_OUT : integer := 64; -- 8, 16, 32, 64, 128, 256, or 512 -- IP
C_SMALLEST_OUT : integer := 8; -- 8, 16, 32, 64, 128, 256, or 512 -- IP
C_AWIDTH : integer := 32
);
port (
Data_In : in std_logic_vector(0 to C_DWIDTH_IN-1);
BE_In : in std_logic_vector(0 to C_DWIDTH_IN/8-1);
Addr : in std_logic_vector(0 to C_AWIDTH-1);
Decode_size : in std_logic_vector(0 to 2);
Data_Out : out std_logic_vector(0 to C_DWIDTH_OUT-1);
BE_Out : out std_logic_vector(0 to C_DWIDTH_OUT/8-1)
);
end entity Steer_Module_Write;
-------------------------------------------------------------------------------
-- Architecture section
-------------------------------------------------------------------------------
architecture IMP of Steer_Module_Write is
-------------------------------------------------------------------------------
-- Function max -- returns maximum of x and y
-------------------------------------------------------------------------------
function max(x : integer; y : integer) return integer is
begin
if x > y then return x;
else return y;
end if;
end function max;
-------------------------------------------------------------------------------
-- Function min -- returns minimum of x and y
-------------------------------------------------------------------------------
function min(x : integer; y : integer) return integer is
begin
if x < y then return x;
else return y;
end if;
end function min;
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 8 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
return i;
end if;
end function log2;
-------------------------------------------------------------------------------
-- Function pwr -- returns x**y for integers x and y, y>=0
-------------------------------------------------------------------------------
function pwr(x: integer; y: integer) return integer is
variable z : integer := 1;
begin
if y = 0 then return 1;
else
for i in 1 to y loop
z := z * x;
end loop;
return z;
end if;
end function pwr;
function Addr_Start_Func (C_SMALLEST_OUT : integer;
C_DWIDTH_IN : integer)
return integer is
variable IP_Addr_Start : integer;
variable IP_Addr_Stop : integer;
begin
case C_SMALLEST_OUT is
when 8 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := 0; IP_Addr_Stop := 0;
when 32 => IP_Addr_Start := 0; IP_Addr_Stop := 1;
when 64 => IP_Addr_Start := 0; IP_Addr_Stop := 2;
when 128 => IP_Addr_Start := 0; IP_Addr_Stop := 3;
when 256 => IP_Addr_Start := 0; IP_Addr_Stop := 4;
when 512 => IP_Addr_Start := 0; IP_Addr_Stop := 5;
when others => IP_Addr_Start := 0; IP_Addr_Stop := 6;
end case;
when 16 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 32 => IP_Addr_Start := 1; IP_Addr_Stop := 1;
when 64 => IP_Addr_Start := 1; IP_Addr_Stop := 2;
when 128 => IP_Addr_Start := 1; IP_Addr_Stop := 3;
when 256 => IP_Addr_Start := 1; IP_Addr_Stop := 4;
when 512 => IP_Addr_Start := 1; IP_Addr_Stop := 5;
when others => IP_Addr_Start := 1; IP_Addr_Stop := 6;
end case;
when 32 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 32 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 64 => IP_Addr_Start := 2; IP_Addr_Stop := 2;
when 128 => IP_Addr_Start := 2; IP_Addr_Stop := 3;
when 256 => IP_Addr_Start := 2; IP_Addr_Stop := 4;
when 512 => IP_Addr_Start := 2; IP_Addr_Stop := 5;
when others => IP_Addr_Start := 2; IP_Addr_Stop := 6;
end case;
when 64 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 32 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 64 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 128 => IP_Addr_Start := 3; IP_Addr_Stop := 3;
when 256 => IP_Addr_Start := 3; IP_Addr_Stop := 4;
when 512 => IP_Addr_Start := 3; IP_Addr_Stop := 5;
when others => IP_Addr_Start := 3; IP_Addr_Stop := 6;
end case;
when 128 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 32 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 64 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 128 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 256 => IP_Addr_Start := 4; IP_Addr_Stop := 4;
when 512 => IP_Addr_Start := 4; IP_Addr_Stop := 5;
when others => IP_Addr_Start := 4; IP_Addr_Stop := 6;
end case;
when 256 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 32 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 64 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 128 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 256 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 512 => IP_Addr_Start := 5; IP_Addr_Stop := 5;
when others => IP_Addr_Start := 5; IP_Addr_Stop := 6;
end case;
when 512 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 32 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 64 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 128 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 256 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 512 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when others => IP_Addr_Start := 6; IP_Addr_Stop := 6;
end case;
when others => IP_Addr_Start := -1; IP_Addr_Stop := -1;
end case;
return IP_Addr_Start;
end function Addr_Start_Func;
function Addr_Stop_Func (C_SMALLEST_OUT : integer;
C_DWIDTH_IN : integer)
return integer is
variable IP_Addr_Start : integer;
variable IP_Addr_Stop : integer;
begin
case C_SMALLEST_OUT is
when 8 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := 0; IP_Addr_Stop := 0;
when 32 => IP_Addr_Start := 0; IP_Addr_Stop := 1;
when 64 => IP_Addr_Start := 0; IP_Addr_Stop := 2;
when 128 => IP_Addr_Start := 0; IP_Addr_Stop := 3;
when 256 => IP_Addr_Start := 0; IP_Addr_Stop := 4;
when 512 => IP_Addr_Start := 0; IP_Addr_Stop := 5;
when others => IP_Addr_Start := 0; IP_Addr_Stop := 6;
end case;
when 16 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 32 => IP_Addr_Start := 1; IP_Addr_Stop := 1;
when 64 => IP_Addr_Start := 1; IP_Addr_Stop := 2;
when 128 => IP_Addr_Start := 1; IP_Addr_Stop := 3;
when 256 => IP_Addr_Start := 1; IP_Addr_Stop := 4;
when 512 => IP_Addr_Start := 1; IP_Addr_Stop := 5;
when others => IP_Addr_Start := 1; IP_Addr_Stop := 6;
end case;
when 32 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 32 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 64 => IP_Addr_Start := 2; IP_Addr_Stop := 2;
when 128 => IP_Addr_Start := 2; IP_Addr_Stop := 3;
when 256 => IP_Addr_Start := 2; IP_Addr_Stop := 4;
when 512 => IP_Addr_Start := 2; IP_Addr_Stop := 5;
when others => IP_Addr_Start := 2; IP_Addr_Stop := 6;
end case;
when 64 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 32 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 64 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 128 => IP_Addr_Start := 3; IP_Addr_Stop := 3;
when 256 => IP_Addr_Start := 3; IP_Addr_Stop := 4;
when 512 => IP_Addr_Start := 3; IP_Addr_Stop := 5;
when others => IP_Addr_Start := 3; IP_Addr_Stop := 6;
end case;
when 128 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 32 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 64 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 128 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 256 => IP_Addr_Start := 4; IP_Addr_Stop := 4;
when 512 => IP_Addr_Start := 4; IP_Addr_Stop := 5;
when others => IP_Addr_Start := 4; IP_Addr_Stop := 6;
end case;
when 256 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 32 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 64 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 128 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 256 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 512 => IP_Addr_Start := 5; IP_Addr_Stop := 5;
when others => IP_Addr_Start := 5; IP_Addr_Stop := 6;
end case;
when 512 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 32 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 64 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 128 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 256 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 512 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when others => IP_Addr_Start := 6; IP_Addr_Stop := 6;
end case;
when others => IP_Addr_Start := -1; IP_Addr_Stop := -1;
end case;
return IP_Addr_Stop;
end function Addr_Stop_Func;
constant Addr_Size : integer_array_type(0 to 63) :=
(1=>1,3=>1,5=>1,7=>1,9=>1,11=>1,13=>1,15=>1,
17=>1,19=>1,21=>1,23=>1,25=>1,27=>1,29=>1,31=>1,
33=>1,35=>1,37=>1,39=>1,41=>1,43=>1,45=>1,47=>1,
49=>1,51=>1,53=>1,55=>1,57=>1,59=>1,61=>1,63=>1,
2=>2,6=>2,10=>2,14=>2,18=>2,22=>2,26=>2,30=>2,
34=>2,38=>2,42=>2,46=>2,50=>2,54=>2,58=>2,62=>2,
4=>4,12=>4,20=>4,28=>4,36=>4,44=>4,52=>4,60=>4,
8=>8,24=>8,40=>8,56=>8,16=>16,48=>16,32=>32,0=>64);
constant IP_Addr_Start : integer := Addr_Start_Func(C_SMALLEST_OUT,C_DWIDTH_IN);
constant IP_Addr_Stop : integer := Addr_Stop_Func(C_SMALLEST_OUT,C_DWIDTH_IN);
-------------------------------------------------------------------------------
-- Begin architecture
-------------------------------------------------------------------------------
begin -- architecture IMP
-- BE_STEER_PROC: process( Decode_size ) is
-- begin
-- BE_Steer <= '0';
-- case Decode_size is
-- when "000" => BE_Steer <= '0';
-- when "001" => if C_DWIDTH_IN > 8 then BE_Steer <= '1'; end if;
-- when "010" => if C_DWIDTH_IN > 16 then BE_Steer <= '1'; end if;
-- when "011" => if C_DWIDTH_IN > 32 then BE_Steer <= '1'; end if;
-- when "100" => if C_DWIDTH_IN > 64 then BE_Steer <= '1'; end if;
-- when "101" => if C_DWIDTH_IN > 128 then BE_Steer <= '1'; end if;
-- when "110" => if C_DWIDTH_IN > 256 then BE_Steer <= '1'; end if;
-- when "111" => if C_DWIDTH_IN > 512 then BE_Steer <= '1'; end if;
-- when others => BE_Steer <= '0';
-- end case;
-- end process BE_STEER_PROC;
MUX_PROCESS: process( Data_In,Decode_size,Addr,BE_In ) is
variable factor : integer;
variable addr_loop : integer;
variable addr_integer : integer;
variable num_addr_bits : integer;
variable size : integer;
variable address : integer;
variable data_address : integer;
variable replicate_factor : integer;
variable be_addr_base : integer;
variable be_addr_right : integer;
variable be_addr_left : integer;
variable be_num_addr_bits : integer;
variable be_uses_addr : boolean;
variable be_uses_decode_size : boolean;
variable be_start_addr : integer;
variable be_stop_addr : integer;
begin
num_addr_bits := IP_Addr_Stop-IP_Addr_Start+1;
-- Set up default condition
if C_DWIDTH_IN <= C_DWIDTH_OUT then
BE_Out(0 to C_DWIDTH_OUT/8-1) <= (others => '0');
for i in 0 to C_DWIDTH_OUT/C_DWIDTH_IN-1 loop
Data_Out(i*C_DWIDTH_IN to (i+1)*C_DWIDTH_IN-1) <= Data_In;
end loop;
else
Data_Out <= Data_In(0 to C_DWIDTH_OUT-1);
BE_Out <= BE_In(0 to C_DWIDTH_OUT/8-1);
end if;
be_addr_base := C_AWIDTH - log2(C_DWIDTH_IN/8);
be_addr_right := log2(C_DWIDTH_IN/C_SMALLEST_OUT);
be_addr_left := log2(C_DWIDTH_OUT/C_DWIDTH_IN);
be_num_addr_bits := be_addr_left + be_addr_right;
if be_addr_right+be_addr_left = 0 then
be_uses_addr := FALSE;
else
be_uses_addr := TRUE;
be_start_addr := be_addr_base - be_addr_left;
be_stop_addr := be_addr_base + be_addr_right - 1;
end if;
if C_DWIDTH_OUT > C_SMALLEST_OUT then
be_uses_decode_size := TRUE;
else
be_uses_decode_size := FALSE;
end if;
if be_uses_decode_size then
for k in log2(C_SMALLEST_OUT/8)+1 to log2(C_DWIDTH_OUT/8)+1 loop -- 1,2,3,4,5,6,7 6 for now
factor := pwr(2,k)/2; -- 1,2,4,8,16,32,64 number of byte lanes
if Decode_size = Conv_std_logic_vector(k,3) then
be_addr_base := C_AWIDTH - log2(C_DWIDTH_IN/8);
be_addr_right := log2(C_DWIDTH_IN/factor/8);
be_addr_left := log2((factor*8)/C_DWIDTH_IN);
be_num_addr_bits := be_addr_left + be_addr_right;
if be_addr_right+be_addr_left = 0 then
be_uses_addr := FALSE;
else
be_uses_addr := TRUE;
be_start_addr := be_addr_base - be_addr_left;
be_stop_addr := be_addr_base + be_addr_right - 1;
end if;
if be_uses_addr then -- BE IS a function of address -- TESTED
for j in 0 to pwr(2,be_num_addr_bits)-1 loop
if Addr(be_start_addr to be_stop_addr) = Conv_std_logic_vector(j,be_num_addr_bits) then
address := j*pwr(2,C_AWIDTH-be_stop_addr-1); -- generate real address from j loop variable
data_address := address;
if C_DWIDTH_IN < factor*8 then
for chunk in 0 to C_DWIDTH_IN/8-1 loop
BE_Out(address+chunk) <= BE_In(chunk);
end loop;
else
for chunk in 0 to factor-1 loop
BE_Out(chunk) <= BE_In(address+chunk);
end loop;
end if;
end if;
end loop;
else -- ADDED DET 8-26-02
BE_Out <= BE_In; -- ADDED DET 8-26-02
end if;
end if;
end loop;
else -- BE_Out is not a function of Decode_Size
be_addr_base := C_AWIDTH - log2(C_DWIDTH_IN/8);
be_addr_right := log2(C_DWIDTH_IN/C_DWIDTH_OUT);
be_addr_left := log2(C_DWIDTH_OUT/C_DWIDTH_IN);
be_num_addr_bits := be_addr_left + be_addr_right;
if be_addr_right+be_addr_left = 0 then
be_uses_addr := FALSE;
else
be_uses_addr := TRUE;
be_start_addr := be_addr_base - be_addr_left;
be_stop_addr := be_addr_base + be_addr_right - 1;
end if;
if be_uses_addr then -- BE IS a function of address -- TESTED
for j in 0 to pwr(2,be_num_addr_bits)-1 loop
if Addr(be_start_addr to be_stop_addr) = Conv_std_logic_vector(j,be_num_addr_bits) then
address := j*pwr(2,C_AWIDTH-be_stop_addr-1); -- generate real address from j loop variable
data_address := address;
if C_DWIDTH_IN < C_DWIDTH_OUT then
for chunk in 0 to C_DWIDTH_IN/8-1 loop
BE_Out(address+chunk) <= BE_In(chunk);
end loop;
else
for chunk in 0 to C_DWIDTH_OUT/8-1 loop
BE_Out(chunk) <= BE_In(address+chunk);
end loop;
end if;
end if;
end loop;
else
BE_Out <= BE_In;
end if;
end if;
-- end of be logic
-- Data_Out is not a function of Decode_Size
if IP_Addr_Start > -1 then -- Data_Out IS a function of address -- TESTED
for j in 0 to pwr(2,num_addr_bits)-1 loop
if Addr(C_AWIDTH-IP_Addr_Stop-1 to C_AWIDTH-IP_Addr_Start-1) = Conv_std_logic_vector(j,num_addr_bits) then
address := j*pwr(2,IP_Addr_Start); -- generate real address from j loop variable
if address = 0 then -- special case for address zero
size := C_DWIDTH_IN; -- size in bits
end if;
if address > 0 then -- else look up in size table
size := ADDR_SIZE(address)*8; -- size in bits
end if;
if C_DWIDTH_OUT >= C_DWIDTH_IN then -- peripheral is bigger than host bus
replicate_factor := C_DWIDTH_OUT/C_DWIDTH_IN;
else replicate_factor := 1;
end if;
for r in 0 to replicate_factor-1 loop
for p in 0 to (address*8)/size+1 loop -- loop only until address is covered
for m in 0 to size-1 loop -- set data to data on Data_In at "address"
if p*size+m+r*C_DWIDTH_IN < C_DWIDTH_OUT then -- stop at width of C_DWIDTH_OUT
Data_Out(p*size+m+r*C_DWIDTH_IN) <= Data_In(address*8+m);
end if;
end loop;
end loop;
end loop;
end if;
end loop;
else -- Data_Out is not a function of address
for m in 0 to C_DWIDTH_OUT-1 loop -- 0 to 3
Data_Out(m) <= Data_In(m mod C_DWIDTH_IN); -- just carry data across.
end loop;
end if;
end process MUX_PROCESS;
end architecture IMP;
|
--SINGLE_FILE_TAG
-------------------------------------------------------------------------------
-- $Id: steer_module_write.vhd,v 1.2 2003/05/07 22:45:11 ostlerf Exp $
-------------------------------------------------------------------------------
-- Steer_Module_Write - entity/architecture pair
-------------------------------------------------------------------------------
--
-- ****************************
-- ** Copyright Xilinx, Inc. **
-- ** All rights reserved. **
-- ****************************
--
-------------------------------------------------------------------------------
-- Filename: steer_module_write.vhd
-- Version: v1.00b
-- Description: Read and Write Steering logic for IPIF
--
-- For writes, this logic steers data from the correct byte
-- lane to IPIF devices which may be smaller than the bus
-- width. The BE signals are also steered if the BE_Steer
-- signal is asserted, which indicates that the address space
-- being accessed has a smaller maximum data transfer size
-- than the bus size.
--
-- For writes, the Decode_size signal determines how read
-- data is steered onto the byte lanes. To simplify the
-- logic, the read data is mirrored onto the entire data
-- bus, insuring that the lanes corrsponding to the BE's
-- have correct data.
--
--
--
-------------------------------------------------------------------------------
-- Structure:
--
-- steer_module_write.vhd
--
-------------------------------------------------------------------------------
-- Author: BLT
-- History:
-- BLT 4-26-2002 -- First version
-- ^^^^^^
-- First version of steering logic module.
-- ~~~~~~
--
-- DET 8/26/2002 Initial
-- ^^^^^^
-- - Corrected a problem with the BE outputs when Decode_size = "100" and
-- the decode_size is supposed to be used.
-- ~~~~~~
--
-- BLT 11-18-2002 -- Update to version v1.00b
-- ^^^^^^
-- Updated to use ipif_common_v1_00_b, which fixed a simulation problem
-- in the ipif_steer logic
-- ~~~~~~
--
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_cmb"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_signed.all;
use IEEE.std_logic_misc.all;
library ipif_common_v1_00_d;
use ipif_common_v1_00_d.STEER_TYPES.all;
-------------------------------------------------------------------------------
-- Port declarations
-- generic definitions:
-- C_DWIDTH : integer := width of host databus attached to the IPIF
-- C_SMALLEST : integer := width of smallest device (not access size)
-- attached to the IPIF
-- C_LARGEST : integer := width of largest device (not access size)
-- attached to the IPIF
-- C_MIRROR_SIZE : integer := smallest unit of data that is mirrored
-- C_AWIDTH : integer := width of the host address bus attached to
-- the IPIF
-- port definitions:
-- Wr_Data_In : in Write Data In (from host data bus)
-- Rd_Data_In : in Read Data In (from IPIC data bus)
-- Addr : in Address bus from host address bus
-- BE_In : in Byte Enables In from host side
-- Decode_size : in Size of MAXIMUM data access allowed to
-- a particular address map decode.
--
-- Size indication (Decode_size)
-- 001 - byte
-- 010 - halfword
-- 011 - word
-- 100 - doubleword
-- 101 - 128-b
-- 110 - 256-b
-- 111 - 512-b
-- num_bytes = 2^(n-1)
--
-- BE_Steer : in BE_Steer = 1 : steer BE's onto IPIF BE bus
-- BE_Steer = 0 : don't steer BE's, pass through
-- Wr_Data_Out : out Write Data Out (to IPIF data bus)
-- Rd_Data_Out : out Read Data Out (to host data bus)
-- BE_Out : out Byte Enables Out to IPIF side
--
-- Note: I have no way of knowing what the master size is for master writes
-- so smaller masters on the
-------------------------------------------------------------------------------
entity Steer_Module_Write is
generic (
C_DWIDTH_IN : integer := 32; -- 8, 16, 32, 64, 128, 256, or 512 -- HOST
C_DWIDTH_OUT : integer := 64; -- 8, 16, 32, 64, 128, 256, or 512 -- IP
C_SMALLEST_OUT : integer := 8; -- 8, 16, 32, 64, 128, 256, or 512 -- IP
C_AWIDTH : integer := 32
);
port (
Data_In : in std_logic_vector(0 to C_DWIDTH_IN-1);
BE_In : in std_logic_vector(0 to C_DWIDTH_IN/8-1);
Addr : in std_logic_vector(0 to C_AWIDTH-1);
Decode_size : in std_logic_vector(0 to 2);
Data_Out : out std_logic_vector(0 to C_DWIDTH_OUT-1);
BE_Out : out std_logic_vector(0 to C_DWIDTH_OUT/8-1)
);
end entity Steer_Module_Write;
-------------------------------------------------------------------------------
-- Architecture section
-------------------------------------------------------------------------------
architecture IMP of Steer_Module_Write is
-------------------------------------------------------------------------------
-- Function max -- returns maximum of x and y
-------------------------------------------------------------------------------
function max(x : integer; y : integer) return integer is
begin
if x > y then return x;
else return y;
end if;
end function max;
-------------------------------------------------------------------------------
-- Function min -- returns minimum of x and y
-------------------------------------------------------------------------------
function min(x : integer; y : integer) return integer is
begin
if x < y then return x;
else return y;
end if;
end function min;
-------------------------------------------------------------------------------
-- Function log2 -- returns number of bits needed to encode x choices
-- x = 0 returns 0
-- x = 1 returns 0
-- x = 2 returns 1
-- x = 4 returns 2, etc.
-------------------------------------------------------------------------------
function log2(x : natural) return integer is
variable i : integer := 0;
variable val: integer := 1;
begin
if x = 0 then return 0;
else
for j in 0 to 8 loop -- for loop for XST
if val >= x then null;
else
i := i+1;
val := val*2;
end if;
end loop;
return i;
end if;
end function log2;
-------------------------------------------------------------------------------
-- Function pwr -- returns x**y for integers x and y, y>=0
-------------------------------------------------------------------------------
function pwr(x: integer; y: integer) return integer is
variable z : integer := 1;
begin
if y = 0 then return 1;
else
for i in 1 to y loop
z := z * x;
end loop;
return z;
end if;
end function pwr;
function Addr_Start_Func (C_SMALLEST_OUT : integer;
C_DWIDTH_IN : integer)
return integer is
variable IP_Addr_Start : integer;
variable IP_Addr_Stop : integer;
begin
case C_SMALLEST_OUT is
when 8 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := 0; IP_Addr_Stop := 0;
when 32 => IP_Addr_Start := 0; IP_Addr_Stop := 1;
when 64 => IP_Addr_Start := 0; IP_Addr_Stop := 2;
when 128 => IP_Addr_Start := 0; IP_Addr_Stop := 3;
when 256 => IP_Addr_Start := 0; IP_Addr_Stop := 4;
when 512 => IP_Addr_Start := 0; IP_Addr_Stop := 5;
when others => IP_Addr_Start := 0; IP_Addr_Stop := 6;
end case;
when 16 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 32 => IP_Addr_Start := 1; IP_Addr_Stop := 1;
when 64 => IP_Addr_Start := 1; IP_Addr_Stop := 2;
when 128 => IP_Addr_Start := 1; IP_Addr_Stop := 3;
when 256 => IP_Addr_Start := 1; IP_Addr_Stop := 4;
when 512 => IP_Addr_Start := 1; IP_Addr_Stop := 5;
when others => IP_Addr_Start := 1; IP_Addr_Stop := 6;
end case;
when 32 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 32 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 64 => IP_Addr_Start := 2; IP_Addr_Stop := 2;
when 128 => IP_Addr_Start := 2; IP_Addr_Stop := 3;
when 256 => IP_Addr_Start := 2; IP_Addr_Stop := 4;
when 512 => IP_Addr_Start := 2; IP_Addr_Stop := 5;
when others => IP_Addr_Start := 2; IP_Addr_Stop := 6;
end case;
when 64 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 32 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 64 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 128 => IP_Addr_Start := 3; IP_Addr_Stop := 3;
when 256 => IP_Addr_Start := 3; IP_Addr_Stop := 4;
when 512 => IP_Addr_Start := 3; IP_Addr_Stop := 5;
when others => IP_Addr_Start := 3; IP_Addr_Stop := 6;
end case;
when 128 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 32 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 64 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 128 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 256 => IP_Addr_Start := 4; IP_Addr_Stop := 4;
when 512 => IP_Addr_Start := 4; IP_Addr_Stop := 5;
when others => IP_Addr_Start := 4; IP_Addr_Stop := 6;
end case;
when 256 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 32 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 64 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 128 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 256 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 512 => IP_Addr_Start := 5; IP_Addr_Stop := 5;
when others => IP_Addr_Start := 5; IP_Addr_Stop := 6;
end case;
when 512 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 32 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 64 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 128 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 256 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 512 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when others => IP_Addr_Start := 6; IP_Addr_Stop := 6;
end case;
when others => IP_Addr_Start := -1; IP_Addr_Stop := -1;
end case;
return IP_Addr_Start;
end function Addr_Start_Func;
function Addr_Stop_Func (C_SMALLEST_OUT : integer;
C_DWIDTH_IN : integer)
return integer is
variable IP_Addr_Start : integer;
variable IP_Addr_Stop : integer;
begin
case C_SMALLEST_OUT is
when 8 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := 0; IP_Addr_Stop := 0;
when 32 => IP_Addr_Start := 0; IP_Addr_Stop := 1;
when 64 => IP_Addr_Start := 0; IP_Addr_Stop := 2;
when 128 => IP_Addr_Start := 0; IP_Addr_Stop := 3;
when 256 => IP_Addr_Start := 0; IP_Addr_Stop := 4;
when 512 => IP_Addr_Start := 0; IP_Addr_Stop := 5;
when others => IP_Addr_Start := 0; IP_Addr_Stop := 6;
end case;
when 16 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 32 => IP_Addr_Start := 1; IP_Addr_Stop := 1;
when 64 => IP_Addr_Start := 1; IP_Addr_Stop := 2;
when 128 => IP_Addr_Start := 1; IP_Addr_Stop := 3;
when 256 => IP_Addr_Start := 1; IP_Addr_Stop := 4;
when 512 => IP_Addr_Start := 1; IP_Addr_Stop := 5;
when others => IP_Addr_Start := 1; IP_Addr_Stop := 6;
end case;
when 32 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 32 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 64 => IP_Addr_Start := 2; IP_Addr_Stop := 2;
when 128 => IP_Addr_Start := 2; IP_Addr_Stop := 3;
when 256 => IP_Addr_Start := 2; IP_Addr_Stop := 4;
when 512 => IP_Addr_Start := 2; IP_Addr_Stop := 5;
when others => IP_Addr_Start := 2; IP_Addr_Stop := 6;
end case;
when 64 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 32 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 64 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 128 => IP_Addr_Start := 3; IP_Addr_Stop := 3;
when 256 => IP_Addr_Start := 3; IP_Addr_Stop := 4;
when 512 => IP_Addr_Start := 3; IP_Addr_Stop := 5;
when others => IP_Addr_Start := 3; IP_Addr_Stop := 6;
end case;
when 128 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 32 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 64 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 128 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 256 => IP_Addr_Start := 4; IP_Addr_Stop := 4;
when 512 => IP_Addr_Start := 4; IP_Addr_Stop := 5;
when others => IP_Addr_Start := 4; IP_Addr_Stop := 6;
end case;
when 256 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 32 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 64 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 128 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 256 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 512 => IP_Addr_Start := 5; IP_Addr_Stop := 5;
when others => IP_Addr_Start := 5; IP_Addr_Stop := 6;
end case;
when 512 =>
case C_DWIDTH_IN is
when 8 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 16 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 32 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 64 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 128 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 256 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when 512 => IP_Addr_Start := -1; IP_Addr_Stop := -1;
when others => IP_Addr_Start := 6; IP_Addr_Stop := 6;
end case;
when others => IP_Addr_Start := -1; IP_Addr_Stop := -1;
end case;
return IP_Addr_Stop;
end function Addr_Stop_Func;
constant Addr_Size : integer_array_type(0 to 63) :=
(1=>1,3=>1,5=>1,7=>1,9=>1,11=>1,13=>1,15=>1,
17=>1,19=>1,21=>1,23=>1,25=>1,27=>1,29=>1,31=>1,
33=>1,35=>1,37=>1,39=>1,41=>1,43=>1,45=>1,47=>1,
49=>1,51=>1,53=>1,55=>1,57=>1,59=>1,61=>1,63=>1,
2=>2,6=>2,10=>2,14=>2,18=>2,22=>2,26=>2,30=>2,
34=>2,38=>2,42=>2,46=>2,50=>2,54=>2,58=>2,62=>2,
4=>4,12=>4,20=>4,28=>4,36=>4,44=>4,52=>4,60=>4,
8=>8,24=>8,40=>8,56=>8,16=>16,48=>16,32=>32,0=>64);
constant IP_Addr_Start : integer := Addr_Start_Func(C_SMALLEST_OUT,C_DWIDTH_IN);
constant IP_Addr_Stop : integer := Addr_Stop_Func(C_SMALLEST_OUT,C_DWIDTH_IN);
-------------------------------------------------------------------------------
-- Begin architecture
-------------------------------------------------------------------------------
begin -- architecture IMP
-- BE_STEER_PROC: process( Decode_size ) is
-- begin
-- BE_Steer <= '0';
-- case Decode_size is
-- when "000" => BE_Steer <= '0';
-- when "001" => if C_DWIDTH_IN > 8 then BE_Steer <= '1'; end if;
-- when "010" => if C_DWIDTH_IN > 16 then BE_Steer <= '1'; end if;
-- when "011" => if C_DWIDTH_IN > 32 then BE_Steer <= '1'; end if;
-- when "100" => if C_DWIDTH_IN > 64 then BE_Steer <= '1'; end if;
-- when "101" => if C_DWIDTH_IN > 128 then BE_Steer <= '1'; end if;
-- when "110" => if C_DWIDTH_IN > 256 then BE_Steer <= '1'; end if;
-- when "111" => if C_DWIDTH_IN > 512 then BE_Steer <= '1'; end if;
-- when others => BE_Steer <= '0';
-- end case;
-- end process BE_STEER_PROC;
MUX_PROCESS: process( Data_In,Decode_size,Addr,BE_In ) is
variable factor : integer;
variable addr_loop : integer;
variable addr_integer : integer;
variable num_addr_bits : integer;
variable size : integer;
variable address : integer;
variable data_address : integer;
variable replicate_factor : integer;
variable be_addr_base : integer;
variable be_addr_right : integer;
variable be_addr_left : integer;
variable be_num_addr_bits : integer;
variable be_uses_addr : boolean;
variable be_uses_decode_size : boolean;
variable be_start_addr : integer;
variable be_stop_addr : integer;
begin
num_addr_bits := IP_Addr_Stop-IP_Addr_Start+1;
-- Set up default condition
if C_DWIDTH_IN <= C_DWIDTH_OUT then
BE_Out(0 to C_DWIDTH_OUT/8-1) <= (others => '0');
for i in 0 to C_DWIDTH_OUT/C_DWIDTH_IN-1 loop
Data_Out(i*C_DWIDTH_IN to (i+1)*C_DWIDTH_IN-1) <= Data_In;
end loop;
else
Data_Out <= Data_In(0 to C_DWIDTH_OUT-1);
BE_Out <= BE_In(0 to C_DWIDTH_OUT/8-1);
end if;
be_addr_base := C_AWIDTH - log2(C_DWIDTH_IN/8);
be_addr_right := log2(C_DWIDTH_IN/C_SMALLEST_OUT);
be_addr_left := log2(C_DWIDTH_OUT/C_DWIDTH_IN);
be_num_addr_bits := be_addr_left + be_addr_right;
if be_addr_right+be_addr_left = 0 then
be_uses_addr := FALSE;
else
be_uses_addr := TRUE;
be_start_addr := be_addr_base - be_addr_left;
be_stop_addr := be_addr_base + be_addr_right - 1;
end if;
if C_DWIDTH_OUT > C_SMALLEST_OUT then
be_uses_decode_size := TRUE;
else
be_uses_decode_size := FALSE;
end if;
if be_uses_decode_size then
for k in log2(C_SMALLEST_OUT/8)+1 to log2(C_DWIDTH_OUT/8)+1 loop -- 1,2,3,4,5,6,7 6 for now
factor := pwr(2,k)/2; -- 1,2,4,8,16,32,64 number of byte lanes
if Decode_size = Conv_std_logic_vector(k,3) then
be_addr_base := C_AWIDTH - log2(C_DWIDTH_IN/8);
be_addr_right := log2(C_DWIDTH_IN/factor/8);
be_addr_left := log2((factor*8)/C_DWIDTH_IN);
be_num_addr_bits := be_addr_left + be_addr_right;
if be_addr_right+be_addr_left = 0 then
be_uses_addr := FALSE;
else
be_uses_addr := TRUE;
be_start_addr := be_addr_base - be_addr_left;
be_stop_addr := be_addr_base + be_addr_right - 1;
end if;
if be_uses_addr then -- BE IS a function of address -- TESTED
for j in 0 to pwr(2,be_num_addr_bits)-1 loop
if Addr(be_start_addr to be_stop_addr) = Conv_std_logic_vector(j,be_num_addr_bits) then
address := j*pwr(2,C_AWIDTH-be_stop_addr-1); -- generate real address from j loop variable
data_address := address;
if C_DWIDTH_IN < factor*8 then
for chunk in 0 to C_DWIDTH_IN/8-1 loop
BE_Out(address+chunk) <= BE_In(chunk);
end loop;
else
for chunk in 0 to factor-1 loop
BE_Out(chunk) <= BE_In(address+chunk);
end loop;
end if;
end if;
end loop;
else -- ADDED DET 8-26-02
BE_Out <= BE_In; -- ADDED DET 8-26-02
end if;
end if;
end loop;
else -- BE_Out is not a function of Decode_Size
be_addr_base := C_AWIDTH - log2(C_DWIDTH_IN/8);
be_addr_right := log2(C_DWIDTH_IN/C_DWIDTH_OUT);
be_addr_left := log2(C_DWIDTH_OUT/C_DWIDTH_IN);
be_num_addr_bits := be_addr_left + be_addr_right;
if be_addr_right+be_addr_left = 0 then
be_uses_addr := FALSE;
else
be_uses_addr := TRUE;
be_start_addr := be_addr_base - be_addr_left;
be_stop_addr := be_addr_base + be_addr_right - 1;
end if;
if be_uses_addr then -- BE IS a function of address -- TESTED
for j in 0 to pwr(2,be_num_addr_bits)-1 loop
if Addr(be_start_addr to be_stop_addr) = Conv_std_logic_vector(j,be_num_addr_bits) then
address := j*pwr(2,C_AWIDTH-be_stop_addr-1); -- generate real address from j loop variable
data_address := address;
if C_DWIDTH_IN < C_DWIDTH_OUT then
for chunk in 0 to C_DWIDTH_IN/8-1 loop
BE_Out(address+chunk) <= BE_In(chunk);
end loop;
else
for chunk in 0 to C_DWIDTH_OUT/8-1 loop
BE_Out(chunk) <= BE_In(address+chunk);
end loop;
end if;
end if;
end loop;
else
BE_Out <= BE_In;
end if;
end if;
-- end of be logic
-- Data_Out is not a function of Decode_Size
if IP_Addr_Start > -1 then -- Data_Out IS a function of address -- TESTED
for j in 0 to pwr(2,num_addr_bits)-1 loop
if Addr(C_AWIDTH-IP_Addr_Stop-1 to C_AWIDTH-IP_Addr_Start-1) = Conv_std_logic_vector(j,num_addr_bits) then
address := j*pwr(2,IP_Addr_Start); -- generate real address from j loop variable
if address = 0 then -- special case for address zero
size := C_DWIDTH_IN; -- size in bits
end if;
if address > 0 then -- else look up in size table
size := ADDR_SIZE(address)*8; -- size in bits
end if;
if C_DWIDTH_OUT >= C_DWIDTH_IN then -- peripheral is bigger than host bus
replicate_factor := C_DWIDTH_OUT/C_DWIDTH_IN;
else replicate_factor := 1;
end if;
for r in 0 to replicate_factor-1 loop
for p in 0 to (address*8)/size+1 loop -- loop only until address is covered
for m in 0 to size-1 loop -- set data to data on Data_In at "address"
if p*size+m+r*C_DWIDTH_IN < C_DWIDTH_OUT then -- stop at width of C_DWIDTH_OUT
Data_Out(p*size+m+r*C_DWIDTH_IN) <= Data_In(address*8+m);
end if;
end loop;
end loop;
end loop;
end if;
end loop;
else -- Data_Out is not a function of address
for m in 0 to C_DWIDTH_OUT-1 loop -- 0 to 3
Data_Out(m) <= Data_In(m mod C_DWIDTH_IN); -- just carry data across.
end loop;
end if;
end process MUX_PROCESS;
end architecture IMP;
|
-- (c) Copyright 1995-2017 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
-- DO NOT MODIFY THIS FILE.
-- IP VLNV: xilinx.com:user:vga_buffer:1.0
-- IP Revision: 3
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
ENTITY system_vga_buffer_1_1 IS
PORT (
clk_w : IN STD_LOGIC;
clk_r : IN STD_LOGIC;
wen : IN STD_LOGIC;
x_addr_w : IN STD_LOGIC_VECTOR(9 DOWNTO 0);
y_addr_w : IN STD_LOGIC_VECTOR(9 DOWNTO 0);
x_addr_r : IN STD_LOGIC_VECTOR(9 DOWNTO 0);
y_addr_r : IN STD_LOGIC_VECTOR(9 DOWNTO 0);
data_w : IN STD_LOGIC_VECTOR(23 DOWNTO 0);
data_r : OUT STD_LOGIC_VECTOR(23 DOWNTO 0)
);
END system_vga_buffer_1_1;
ARCHITECTURE system_vga_buffer_1_1_arch OF system_vga_buffer_1_1 IS
ATTRIBUTE DowngradeIPIdentifiedWarnings : STRING;
ATTRIBUTE DowngradeIPIdentifiedWarnings OF system_vga_buffer_1_1_arch: ARCHITECTURE IS "yes";
COMPONENT vga_buffer IS
GENERIC (
SIZE_POW2 : INTEGER
);
PORT (
clk_w : IN STD_LOGIC;
clk_r : IN STD_LOGIC;
wen : IN STD_LOGIC;
x_addr_w : IN STD_LOGIC_VECTOR(9 DOWNTO 0);
y_addr_w : IN STD_LOGIC_VECTOR(9 DOWNTO 0);
x_addr_r : IN STD_LOGIC_VECTOR(9 DOWNTO 0);
y_addr_r : IN STD_LOGIC_VECTOR(9 DOWNTO 0);
data_w : IN STD_LOGIC_VECTOR(23 DOWNTO 0);
data_r : OUT STD_LOGIC_VECTOR(23 DOWNTO 0)
);
END COMPONENT vga_buffer;
ATTRIBUTE X_INTERFACE_INFO : STRING;
ATTRIBUTE X_INTERFACE_INFO OF clk_w: SIGNAL IS "xilinx.com:signal:clock:1.0 clk CLK";
BEGIN
U0 : vga_buffer
GENERIC MAP (
SIZE_POW2 => 12
)
PORT MAP (
clk_w => clk_w,
clk_r => clk_r,
wen => wen,
x_addr_w => x_addr_w,
y_addr_w => y_addr_w,
x_addr_r => x_addr_r,
y_addr_r => y_addr_r,
data_w => data_w,
data_r => data_r
);
END system_vga_buffer_1_1_arch;
|
library verilog;
use verilog.vl_types.all;
entity TGC_ROM is
port(
address : in vl_logic_vector(6 downto 0);
clock : in vl_logic;
q : out vl_logic_vector(7 downto 0)
);
end TGC_ROM;
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2014"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
T9SzZY8k9gM9533XtJLJJkA/o+75gJmaKuOMoep9nwkvSLy1Jo67di/zYro0J9GKF2MDoM+xdUm1
JbcqDZ75Hw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
Dui2pA/UhqLaXatx9Z70nDBW19H1lO7dKPhN140V07Jc0L2D0YrpN0+8y39D1dI4yG1WkpVSgMFC
4B3SffF3OHMOB5cVjgRcHnx54QL9GaSEGOH1LoxwctA8gmSzkvmO8iRzhOvDgcczXOkCt+YXoT4s
dI3nTAWBI2a3XCOvbgg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2014_03", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
JQb4pHLv43VbvjLeiQJp3sIaVgayZH2jIbOLxS/lF33brBhGOwcZGs2QFJP/0nlReGUheF+Xc6pR
0dkN+UbWw6xe2SJa9THc+uqNRi/AH5TgC1c8QmhmmJH0AmEl/CEJfIVMvEiSRzCNiNuW1K3PDsAE
a8P4/pEjz8Fsb08sFGA8vD7Ef3K/JwqC+FBjvZAoW9GwTiUA0EKoFk/wJe0ynb+j+yO33vcxzMa6
/9MexNMW9TQ+cHK7/DRnGd0DNdfhevWedoIUnAonlSIlBkUYIOpQKkvomESvW9MMqDxOGYQ5pSN0
kObpxMZj7lAUgd8VISAObqCyIx7CrBKgM+zSaQ==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
WaLpv7BCNtvA9OZ28TETtjkauYBgURrqhVIKwtw0ZVyfFTqKRC9mtBWPZGCDBhLuuADPOgHsX3jj
aS63izHd0dSr1OYNmyh3v9MtBhLsxdGt/epV6Qmtum9fYv3kTMd7bNQS3UmaA1I+CMj3qhjSDudm
Rw31tvJDbSg7Vj4Y9c4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
joapmiOHjgcOy6kSpCaLwZJOHjP2ocHYZH41A2gdy9376SmNad0bsibThe95jKeHRdlkisAJ6fCz
w/dznlFTjV5LgMORrJ/iMFs4Yt79Uie1qUVi074PrvHqPGKKfTSxn9lROaw3OUHGAyNj8FdyKgPD
YV75YwlpOqgPp8w3C0r1qyY8IJIE0mnTPypK0MDZNJmOvXqRon1HpWzduGOCuNJGX1tovGduaMU3
4NSkrflmvq4eTglUE1oNgna3N1wPuJNgcIDwEfYR390A/614GIoON5WAHBV3KLGiLOtPZ/uh7X2g
ZNxD8MDdyNduMSTNIq0EX+g2eoSUXElNgk+7Dw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 5808)
`protect data_block
lJFbW3BScupe60htgIKGGeowbMK7NiFmyzKFVON7ExhcIEE4DbV/kwLrHoTJUbGZjU+Xaim4Q4X5
kMW1J0BOuWGw7UXDbZSI1UZPVoUdtK/QnOOeJ4ZmM4qrlVRhblZngRHEWks44USH0nebXoruCmKT
ieV7M0xh7ALkpyHfX15j6PJwMGcZXwMjqZ5YgFJJ5ukVR6LbsaKXvpQmR2cpwT/RxfkrIZR9JvC4
J4z9BQcXJ0WsXKq2YkUwLt1GO01L641mx0XP4LtCdpJLWgfyWgnMLlP4lDlwn/j35BmA7QcveIsP
5pVDOpiiVExTVL5dqYokH02WxBMe15YZBscoSSmA4WGOojV1e8IVCnLl8egSGMc4m/jm7oBLkoBY
qv8IZrKuRd1Olf744Xh6Cy1KdrHmM2cqRuTkmIEV5Xuby+etbuWM287a0Y/RAicS6o+PrwfD0edV
BwITEYl/QuGUeGH83e9Dd236R7m10fEgWZP6UBleFtj3auocaBOpNIBKCYGNt3JXo+gPVdHgI9+5
dv8dzKJZAvD7ukqjt19qZeq4DU0rSs62ORlSEKaT05SlTNUcoDACD7w1lB2+53w4a0hH0W/OcjXt
OV3MHa/iTJOjqdUOBVnGUyy9F/gK5L/mYIer5o8U7EXxurQ9C4sBNlI8VdegJo9lIUiP9gBbniuq
n3nnU+d5P2Ki5E7V06Du1wkjgxs7UTpgt16bNRIY+c/ju3E/hZCyq/IebQS/iu9/gS6GU1liYRW4
edPF0nvdiD8pcwR8hB35ly7cgqak6wgAV1hADT99X+QlIlPibmg0jCRXkqnvFx8aR+b844iXSyDU
7LAZE3Rw9ZstZQ7tbuwhMZyMbQoy7CIFCYcfMGTK7eOFPjz0kAKiv0h9xz94qYbrN7l1XUjFcrTp
DIPotEcE3cW7fiWhHcrysHfLzWI3baxUYagURK+PYA0TGTb1rEYp1ZpxiYzs79A/ZoRilQAETZv1
d4UjbMljwZ9WCSS1BJJo4u+EljZdwWRr7bKLH0VdQn0zQRmVbBBfccRvkQi+V01ta8j2hdd4fHPl
Ma4683IvUtlJx42uZeqnmo8DnSupxAQsVIeLSdXG8yynsRfs+T0uAaXrqmz3AWytzn5IKpK5Jfky
NbDF0OXhIcJzADc0hzhkNDDEODzh9ddA7ZE/7M9a3drAgpAKzRgZsxCHBii8tMQAYwGWt87SKER5
xZS0WZnsceouoCB0EB/iIAkuBbROyQhxVwPK66Wfp0xmF/a25yrHsgfSbVoCaJjw1dgqRPVjsbzM
Xoh5iu4KAGJgX5tqpE09HN4WG2a9q7jA1MVsDfmvoWtyKB+AgbGDi8z/cL6pgZo28q5T4WMfesSZ
6D+//ymSWKXsQH9cRpS3Rfbdwm+Ihj6xybwVVsWBVg+CDEn8PG2aRKEp5ig3AqRMn2oHrgdIVKp3
tL4AZ2lILj1t3sgQGEBdDSuFMa6pLq8C/uh/I6vH4iHUWKu0AvVipwa9YL86sPQiCYMXS76j5UhB
h7y2edkVFfmbz6I5n4oMkVIO+85+jiTAoWD7gi0/fD8dZL8DjKe+Ct+4Bibnd5bEy77lhn/5RY4+
GwSSD4CCCHXsoLTC9O5tNH0KViRD4Yb+GrJb9eOBjkh9caHi2+B/Tcl3AaOgdSUJqo2k2gV0WsDj
pMTkVWfxibnKHpQTCl49wm0aeW/66hkURa0YFh9YpC5+Lq0Gg6yQTI7gFnZYEUMilCtPkcOF80XP
e6FMhcroP7KLAQ+4YpEp/Z1Dr2JbbOLkMBMMoeZtPOZEjjr30GpAO71K5zcidI7kjy2Kk4835Sjr
4YlZzGNlo/tZv02/tFqRR4bBKwtPoY+ncOl+PCRybUS14CWWmEm59RMdwF2hsS0DprivtUvMPfZi
UU+OH4LhXR4UgMOVCNXciGDRr3OpYSFlGdypEH/Nk87v/3ypfNOLEXrUYIVOOjJhuVO/Fw858HQU
kPK6Vf7I+t37xVSW3aryH7B+TQP4W114lBqsRXDl7ZpSlfpopb+iVnMqj+ZYIkajRoUAp2JYtUVw
crlZQUOOkLAjnkuCQw6omwmCMOxZ2mfwfzkb8SSlA+ivxkDQDXVkEnh05ae54rYnMhQSQf9EVdK4
iJzdusac9XWjXR22FQpycUm6iRLjUXoh0laT/sMcBuRp6C8Q04ULMlfzS89QKGRPUmJVGkWLXuaa
hlFTHjd2maysXju4KutQkM/nZc+G/U+seVChCY2B4KP6/paLejmBkagHUmMtQdnyZUvNZBMTttm1
DjXboxnNv5BKkquRSwOQbC+3LFSOO7bzILhbwnYC09Unw/fg0uJNc5HXGDMmqKUqbIkxln9pPmTP
9GZCptIGQU14nxuI4B5bZ6vkdrO10tloA3D+XrgJZfbtKl5amkHU8uy4HaNGQgbBgWP2NkZnSe7N
CG9HKsBIkCMuJdMN2eZyORfWpEVgmP2Y2etTjx0L0XgKaMyRA7NxmfmLllagZKOIo2ae9nUVZiEq
JVfWexfcsKlEPe+IsfyAliRTK4dRpLsESi8xRQMnzZJqSU2aj1XWdOG2vcC9AhMjOJQBRsO3rKBP
PNCM50XcPu6hsJ494X+0UHuKwmXDLYtrAZp7Dsbd3KpNzoWxLalLHzS0MXNypfjiC6Y7wM+UHYB1
3ZJ2VZuFMcBuZaoehfZyCQ5UC9DsZuMVC948+oonrvIB3HoaUxC5Hw4LVq6F06ValUU5lbPlFS2b
xh9TivFBTxik380m4Awwnrubo9AI9vV43meJ6kgoPiTb7Fbaw+oNu+arvp1JkWxMo+jfwkv+AmV1
+gXSlfum2CNOLf8V/IenlDHlHAlAO3EcBz8yQi3WCJSat+CQ1roB0CcndtYEuq0EMZ7UnoLuDki3
7KHM9g6B+V2FHlau4X0HzX2/FnqE8uoaQY9tJx7DDdlFR/OP+X4WFDyXirXtdhVSaMK4EBD5QTlH
46/7fWJwLP6JIUQZZg7eMhI/SaKZqTWZNodMTRZYOjgJXmPm0L5cjDCpgeTDhuCizp2FPMuyvtrF
2QAYWBqcA5fwK8ilYnh9hos7FbcgY1i/yVFZvxAix91W6ZH6QNQ/Iet5E85JfnuqqCFc621lidnv
uD+vsDXiGbqnZJT2VycVsvtLrxIpZb3fdIdMWVhHnflI5Bx7ddp38uEo+Wd6xEx8MgQ7U2juRKPn
qlSndS8ili46r2tjCZwBSh4b+fkt1tTqgCCcURvSpSqQLi/56ZD26DeGZu4di329xBmJ9eQVJoft
erfotx06bVpU234iKwjrwJI8oE7D/Nyrwo2uE3eDHpiq9D7ykjEkoGjIkxjm2s/dVbpo/m4k6A3w
WRf0uqwhhAP+B4HfBGMXRVdJyig0loOu3EkKVV32RugnV4elxmKyyl4RjUvUVXtryYTu22zi7eFL
geo7lajlZ4K7AXvMjmK4p24m6hf570siho3ILQuFweGDkMm2yzsU1L/Y8DTa6oBOESABF7190AjE
cK+CF5JZjWtqCXyDGjPVEANEYCwf0AzFIYfN9uJkVYNxZEqXp4Vl6tGgk57l5YVdZoK/DV7DeZ3d
IolPFBQw/C1FjgghzAwTFYq+mQYBYb/rf0aOuRDKGLMjih6o72zO27lCH9I1StWgrZM4xSKkfUAn
ojXkuvxjZEP6+98U6hn9hG0DFrxekWJmEPaWGNKLJcS8axR+SyvMj/eBIAD8ef6y6kecDnaKWvPh
O0+JOH1L7xuOmqETss1ibyscpV6+UB4ElULxHuAMnRHfMIBJMJB4AaPs+hLcHNwDyEPgJtdyhDzi
yY0pP8DAkZm45lZ+hPe2aUXB+P7MqF1ksOUhsbqJ1RS6hOothXKKhb1YE0shj0aQavFuvjZW97KT
P3znRS+wcSDWcQMuLvyFiZiHc7KmUQcdJXAjM4Hjq6Xf88rP0ZYGDpxBHgwXYQJtVL0F/fU/ESwI
zviLR0e5L1XULqqXM+RPtdV/dMLqMkk8npcCMSsVwK6ZuG4ufYJH4a0vKurXXUaEslcBmjQ1zmXO
E56ezF/3RfGMBQmVtPiYqI8qqH+Rm+dAfoF2ZUO0cS68uY3KoXyQY6l5+zMMOBF0AOEZpX/0ArBz
YqHFhozbvX0airtIwfUg5SMqSickEB3A36H/u1mythHUO4lbIO1yGaQkSFeCSjkWT90ULs9pnHIY
SUzFOxqxneEyaBmWLTYoyLIg/X5g3i2iveuN3aBf3HciBOCIPVBvDebSDRzEt0/wVwVj8vFWEzrq
CyZuyzOUtL0T0i3VGzMe8aAS7RgCcpSC4+QGhqsHQ1GEmv4CAOEU6rHNnq/ybbzHd3jgPCcGxPzU
CZ6OoD8+WNLnXq97pmLTIAKtNYUZzQLNYoW2TO5BCaiHwedd/PORgqDDo8oBneN2FeUQh74wwSIj
NqGNAjwPDjURI7KyOzaD27SxHbtaNFaP9ObcpNI2ZQ0ZYrjZ75AQNwke8lD4kBcEjLYsMT+8819Z
BTqswvAk0NarytDXbC2ta6QwQallc7X6xVnQquCFJV+AJ6xkdHSrBrDBHDL0zNP2AUOQLjEB9FlL
MwkgJm3RJtlddk0xsV38u3qUOZ6SsGVNuaZv3BI3YS79ohiDru57ypYx1SfWDkZZRTJLL9yuuEyd
UvHmtiUtO/W4kNSp8sSHzuRuEZWWzSaR9RyNFmjiCHT0EffogdYUXefI2BFwy3202CZ3sXDH5iZC
yztFPbg3CF1SMG7j3e8gbobrucc1mgO182V2mnLwA0aYwSiaAAEIcm/u5oulZWeSadyPiAFg3F1M
EcjVdqxlc7w+/PmlT5hQb7ofwFwqkTiXpYF65ncx42XZgV0Ndxe0XFnmHuBAPblWkbthtWRCjXSG
t28+odyUcvKacfl9SFYkbsDTLF5gwKTjgwSkJVFeR0K37z4pmN6sBQdlo2n1euXcc6WfItQ0+64F
HlXRx23vWcaNZepNakUjcuEQDLw+iADnLDWvKkpwQMZUj0kX/pZg4p/2x30UdRJxMltvtYKv4gt3
0wGf0FpL0+m2biUE4gZiE8DainNHL8ovaHMVKheDPY1/dMa87JBixA5poYzYNhBTXwDgTYiiYhCB
ZbcQzbQFjnXKT1imwNqbSmnX8A/k90cNiDDcr8Exn9Wh5j/up9SmK1vCa9jBBA0dEFh8RHF5EJ5F
e4Znoo4pyzDtmk2vB3u066QZ7ase6J0bNUiP1MR26YOEQsO5dqFM9yIgo1DrpnoJArQ8wakTjUbd
6/xuHoDrphFyw8LdrWMlNyjf/AKfMTVjhNm7G2UgthmdTPa2f+r3Wz/X3v/TO4wh65OZJbmxyGiO
XmP6rcINevxJNP6EAvwmc1O1J4/5jRbIWBcnp4xes8KbsiS2AfaLRA656kiGg0ENiP2SeWEb3zuK
HsZKd5LH0Lo/DWZUBXhyO7xWZi6vN9hDpY5iarIW4LXFrZJqri8g1z41fLZkipNOdl/fWz3l1H9b
oKA5un3WVwHf/up0if8prxBSwuVfVmD6Qk8awZjn4mkPuNmOpH2f/FcXXdbCd8bPvXDpF4YLBWiF
1CqwgVOEL8pBwKmBb+4p6NgiuXTDseBEFIjaGaaRS5uPZAJK1OF4iXNiwT6crWYWlc6l4vA9/cv7
3QpU7pzudibGkt9I3nyTvxzD8ggYmVNuR1Z6WZrkiiMnYlKYeUkxko0rKResVes0VeLnQpgDNEYG
UN6IwNImrWsWxAUu2DHN1LSTa/z8efOo5p8Gxyj8bNjAXz964o1YX/8ISdEWIcV5XCWEurVuXNbH
EwZUWVYveGFuUWTridbT9Zyi+u/gwx+xNSIEeQuTs+wqF4atHfO/kb11lJGdQbvS58v5CUc0e+NC
yKbB53SkCzJR7vhFIGz+3IDyScbMuOAMNhp893tmtc7KJTbnUgRyeSx4eehneLOqGX5JwY0vDk4n
bffP1mJBDQ8ze6AmcXRwJio7VDAIEUDOqe5ZWzK7lHGyg/AWyiNk6Gx3s+VsQ2NbsdfWoH4TAD+q
NenKE4zPmhkgPj4Tc7JlGL67WJtU8xOeDYuKocx6ja7sFNGsd6ZomXdROipWScx03BNO3WJJWq5z
D8EskiTFOih6OZxohS/qi5ceFrayF3OU9PYgUW4WRUNZc2Q6zezpmhHyFMnb1Wn2sUnoiYW2fsGG
m7AP0ZnzEIfhXywQqLIt+W2KXEw76PkcY+NhyFYx+/q1AMTwg3gQFbbhgHQv/fkyfxTqE08ClVS5
unosOQ0+AkZb4mo1P+BZQ7I008kjPhvyysDn4vTQwPWfnuy27kBltcbLp8emjsjlaVV1GXm6rBm2
5dv8rQJ9/ovc/CN4hFhpY92QkE5ZUbXDRGXFjXrTivFbySH3DAHPZmE+lm+Cj/7y4rJ4aepn3Lbw
4ldZtsO/WgoVyb+ugbcGgwGGVmsDo2Q+irQwjWemfvNfACQSXi0cnXbIq7W5FRd7GgtyR3Ww0vZk
o/Hfu2jQH8q9TN9XR5pIgeePPWZOQrTckYBvLPksSiOpvho9ENyDqBoF+qhenE7z6ukp6w9VmaC4
IY8JQ+1dKcjkahuYwy7ELhToebN7W2SEC7qS+0Nk0PZGz2eLznOcz2rX4Femi+vmgsqCPu7sIhEr
nk9l4I0ck9V/qRMF12PXRTmBQzC9o+tD5nMH11j16aT0LeAnQLOppAFktyiGxHtuxxwnJQ6ub9vA
7+hVo1u32YR5XyzM1Ob/IDuUEu+WyepU5QXABJDCKCi31iRR0HYuN4bJY5Krij5pRwJdt3zhbBl0
sjQlW+QQn0uGlhT2IbNpxgXSRABwgDGjg5P6lIJ8zi7a148sCHSk1sTOeSh2IuzI8Xa+6WkflFA5
zLE9lgD/5HLPz/kBCt/6N8qDzzEjM5SiXL6QKUQhfAnlvEqHTQ0GRowAt3THI4vl9XgfXF8Z0C1q
kRbzqqOcis4pMQSsHPDFML7aCWCglPRrdUAMymz9GiB+F6w1Hqkhqpz4xq2l5aMI7ph7F5KdNDkN
3sQx0jHNsd535DBA/YoiuJJUMLyHFa4xM2mHDF4FwH8agw6vc8znFmXJFUOUm5ht0pSK/X/+bC+H
olTJme1CPF6hwODL+jsoKJ8YoqEnrYaUoLUthkbeR4W4tRg5Gr8tY9gqa8NYri5sKB1Suhbb2f56
E2kiGrnTk0A8ovuZO/+gWscbqJX1QDZ3dmMTp9ZMzJIC07NjkRKFkQZkh4+Ob1le6M+wBYjlvwcu
oPk+frRYYarP1mKjinATee9YB7S5BSC8a6b8azyKOE+7lxQ2fSmIurJBs2EoX4kFTAOOBjeJeLe5
oY2DPU1ctCxDOJnu2AC90oMa1adVHR2JThS0SOdJ1PY33dd7rVCzBMMpKdFtmJjds1R21ev5Skyg
HG8W7PSbh/x8wyb1OX2Ad9TatnYMAgELF6Utyf423EPCbf1cpAtkxD2zJx/4wzd/MLjHidTHJUX7
aBmPh1+uM2/q1uv1S8EmoSKo3sKYdgYRBA3LTtmks4HKO/FAI8zgdDSG1vhDqJFBPE5zdI9zNRdd
ylVqLwLMQByyPmD1SKnT7PChLK2pAigwqYRpbtLzWX8fhn54oYe6DySX1IbI8hpS21ZwgdbFvX7W
f88dhkbW2E/8SSNU9y5sHeevTSgnt50H+4x4Ps3M/Du1ZFqsVXpPYZ4i19kJzL36ndfqZAm62QU2
MT06Y5pPix1L+Gg6a8FMksPysuPzdV+KjbKAvN4CjdbFl+/i65MZbDyCGwTJA3lhQQIA
`protect end_protected
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2014"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
T9SzZY8k9gM9533XtJLJJkA/o+75gJmaKuOMoep9nwkvSLy1Jo67di/zYro0J9GKF2MDoM+xdUm1
JbcqDZ75Hw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
Dui2pA/UhqLaXatx9Z70nDBW19H1lO7dKPhN140V07Jc0L2D0YrpN0+8y39D1dI4yG1WkpVSgMFC
4B3SffF3OHMOB5cVjgRcHnx54QL9GaSEGOH1LoxwctA8gmSzkvmO8iRzhOvDgcczXOkCt+YXoT4s
dI3nTAWBI2a3XCOvbgg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2014_03", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
JQb4pHLv43VbvjLeiQJp3sIaVgayZH2jIbOLxS/lF33brBhGOwcZGs2QFJP/0nlReGUheF+Xc6pR
0dkN+UbWw6xe2SJa9THc+uqNRi/AH5TgC1c8QmhmmJH0AmEl/CEJfIVMvEiSRzCNiNuW1K3PDsAE
a8P4/pEjz8Fsb08sFGA8vD7Ef3K/JwqC+FBjvZAoW9GwTiUA0EKoFk/wJe0ynb+j+yO33vcxzMa6
/9MexNMW9TQ+cHK7/DRnGd0DNdfhevWedoIUnAonlSIlBkUYIOpQKkvomESvW9MMqDxOGYQ5pSN0
kObpxMZj7lAUgd8VISAObqCyIx7CrBKgM+zSaQ==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
WaLpv7BCNtvA9OZ28TETtjkauYBgURrqhVIKwtw0ZVyfFTqKRC9mtBWPZGCDBhLuuADPOgHsX3jj
aS63izHd0dSr1OYNmyh3v9MtBhLsxdGt/epV6Qmtum9fYv3kTMd7bNQS3UmaA1I+CMj3qhjSDudm
Rw31tvJDbSg7Vj4Y9c4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
joapmiOHjgcOy6kSpCaLwZJOHjP2ocHYZH41A2gdy9376SmNad0bsibThe95jKeHRdlkisAJ6fCz
w/dznlFTjV5LgMORrJ/iMFs4Yt79Uie1qUVi074PrvHqPGKKfTSxn9lROaw3OUHGAyNj8FdyKgPD
YV75YwlpOqgPp8w3C0r1qyY8IJIE0mnTPypK0MDZNJmOvXqRon1HpWzduGOCuNJGX1tovGduaMU3
4NSkrflmvq4eTglUE1oNgna3N1wPuJNgcIDwEfYR390A/614GIoON5WAHBV3KLGiLOtPZ/uh7X2g
ZNxD8MDdyNduMSTNIq0EX+g2eoSUXElNgk+7Dw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 5808)
`protect data_block
lJFbW3BScupe60htgIKGGeowbMK7NiFmyzKFVON7ExhcIEE4DbV/kwLrHoTJUbGZjU+Xaim4Q4X5
kMW1J0BOuWGw7UXDbZSI1UZPVoUdtK/QnOOeJ4ZmM4qrlVRhblZngRHEWks44USH0nebXoruCmKT
ieV7M0xh7ALkpyHfX15j6PJwMGcZXwMjqZ5YgFJJ5ukVR6LbsaKXvpQmR2cpwT/RxfkrIZR9JvC4
J4z9BQcXJ0WsXKq2YkUwLt1GO01L641mx0XP4LtCdpJLWgfyWgnMLlP4lDlwn/j35BmA7QcveIsP
5pVDOpiiVExTVL5dqYokH02WxBMe15YZBscoSSmA4WGOojV1e8IVCnLl8egSGMc4m/jm7oBLkoBY
qv8IZrKuRd1Olf744Xh6Cy1KdrHmM2cqRuTkmIEV5Xuby+etbuWM287a0Y/RAicS6o+PrwfD0edV
BwITEYl/QuGUeGH83e9Dd236R7m10fEgWZP6UBleFtj3auocaBOpNIBKCYGNt3JXo+gPVdHgI9+5
dv8dzKJZAvD7ukqjt19qZeq4DU0rSs62ORlSEKaT05SlTNUcoDACD7w1lB2+53w4a0hH0W/OcjXt
OV3MHa/iTJOjqdUOBVnGUyy9F/gK5L/mYIer5o8U7EXxurQ9C4sBNlI8VdegJo9lIUiP9gBbniuq
n3nnU+d5P2Ki5E7V06Du1wkjgxs7UTpgt16bNRIY+c/ju3E/hZCyq/IebQS/iu9/gS6GU1liYRW4
edPF0nvdiD8pcwR8hB35ly7cgqak6wgAV1hADT99X+QlIlPibmg0jCRXkqnvFx8aR+b844iXSyDU
7LAZE3Rw9ZstZQ7tbuwhMZyMbQoy7CIFCYcfMGTK7eOFPjz0kAKiv0h9xz94qYbrN7l1XUjFcrTp
DIPotEcE3cW7fiWhHcrysHfLzWI3baxUYagURK+PYA0TGTb1rEYp1ZpxiYzs79A/ZoRilQAETZv1
d4UjbMljwZ9WCSS1BJJo4u+EljZdwWRr7bKLH0VdQn0zQRmVbBBfccRvkQi+V01ta8j2hdd4fHPl
Ma4683IvUtlJx42uZeqnmo8DnSupxAQsVIeLSdXG8yynsRfs+T0uAaXrqmz3AWytzn5IKpK5Jfky
NbDF0OXhIcJzADc0hzhkNDDEODzh9ddA7ZE/7M9a3drAgpAKzRgZsxCHBii8tMQAYwGWt87SKER5
xZS0WZnsceouoCB0EB/iIAkuBbROyQhxVwPK66Wfp0xmF/a25yrHsgfSbVoCaJjw1dgqRPVjsbzM
Xoh5iu4KAGJgX5tqpE09HN4WG2a9q7jA1MVsDfmvoWtyKB+AgbGDi8z/cL6pgZo28q5T4WMfesSZ
6D+//ymSWKXsQH9cRpS3Rfbdwm+Ihj6xybwVVsWBVg+CDEn8PG2aRKEp5ig3AqRMn2oHrgdIVKp3
tL4AZ2lILj1t3sgQGEBdDSuFMa6pLq8C/uh/I6vH4iHUWKu0AvVipwa9YL86sPQiCYMXS76j5UhB
h7y2edkVFfmbz6I5n4oMkVIO+85+jiTAoWD7gi0/fD8dZL8DjKe+Ct+4Bibnd5bEy77lhn/5RY4+
GwSSD4CCCHXsoLTC9O5tNH0KViRD4Yb+GrJb9eOBjkh9caHi2+B/Tcl3AaOgdSUJqo2k2gV0WsDj
pMTkVWfxibnKHpQTCl49wm0aeW/66hkURa0YFh9YpC5+Lq0Gg6yQTI7gFnZYEUMilCtPkcOF80XP
e6FMhcroP7KLAQ+4YpEp/Z1Dr2JbbOLkMBMMoeZtPOZEjjr30GpAO71K5zcidI7kjy2Kk4835Sjr
4YlZzGNlo/tZv02/tFqRR4bBKwtPoY+ncOl+PCRybUS14CWWmEm59RMdwF2hsS0DprivtUvMPfZi
UU+OH4LhXR4UgMOVCNXciGDRr3OpYSFlGdypEH/Nk87v/3ypfNOLEXrUYIVOOjJhuVO/Fw858HQU
kPK6Vf7I+t37xVSW3aryH7B+TQP4W114lBqsRXDl7ZpSlfpopb+iVnMqj+ZYIkajRoUAp2JYtUVw
crlZQUOOkLAjnkuCQw6omwmCMOxZ2mfwfzkb8SSlA+ivxkDQDXVkEnh05ae54rYnMhQSQf9EVdK4
iJzdusac9XWjXR22FQpycUm6iRLjUXoh0laT/sMcBuRp6C8Q04ULMlfzS89QKGRPUmJVGkWLXuaa
hlFTHjd2maysXju4KutQkM/nZc+G/U+seVChCY2B4KP6/paLejmBkagHUmMtQdnyZUvNZBMTttm1
DjXboxnNv5BKkquRSwOQbC+3LFSOO7bzILhbwnYC09Unw/fg0uJNc5HXGDMmqKUqbIkxln9pPmTP
9GZCptIGQU14nxuI4B5bZ6vkdrO10tloA3D+XrgJZfbtKl5amkHU8uy4HaNGQgbBgWP2NkZnSe7N
CG9HKsBIkCMuJdMN2eZyORfWpEVgmP2Y2etTjx0L0XgKaMyRA7NxmfmLllagZKOIo2ae9nUVZiEq
JVfWexfcsKlEPe+IsfyAliRTK4dRpLsESi8xRQMnzZJqSU2aj1XWdOG2vcC9AhMjOJQBRsO3rKBP
PNCM50XcPu6hsJ494X+0UHuKwmXDLYtrAZp7Dsbd3KpNzoWxLalLHzS0MXNypfjiC6Y7wM+UHYB1
3ZJ2VZuFMcBuZaoehfZyCQ5UC9DsZuMVC948+oonrvIB3HoaUxC5Hw4LVq6F06ValUU5lbPlFS2b
xh9TivFBTxik380m4Awwnrubo9AI9vV43meJ6kgoPiTb7Fbaw+oNu+arvp1JkWxMo+jfwkv+AmV1
+gXSlfum2CNOLf8V/IenlDHlHAlAO3EcBz8yQi3WCJSat+CQ1roB0CcndtYEuq0EMZ7UnoLuDki3
7KHM9g6B+V2FHlau4X0HzX2/FnqE8uoaQY9tJx7DDdlFR/OP+X4WFDyXirXtdhVSaMK4EBD5QTlH
46/7fWJwLP6JIUQZZg7eMhI/SaKZqTWZNodMTRZYOjgJXmPm0L5cjDCpgeTDhuCizp2FPMuyvtrF
2QAYWBqcA5fwK8ilYnh9hos7FbcgY1i/yVFZvxAix91W6ZH6QNQ/Iet5E85JfnuqqCFc621lidnv
uD+vsDXiGbqnZJT2VycVsvtLrxIpZb3fdIdMWVhHnflI5Bx7ddp38uEo+Wd6xEx8MgQ7U2juRKPn
qlSndS8ili46r2tjCZwBSh4b+fkt1tTqgCCcURvSpSqQLi/56ZD26DeGZu4di329xBmJ9eQVJoft
erfotx06bVpU234iKwjrwJI8oE7D/Nyrwo2uE3eDHpiq9D7ykjEkoGjIkxjm2s/dVbpo/m4k6A3w
WRf0uqwhhAP+B4HfBGMXRVdJyig0loOu3EkKVV32RugnV4elxmKyyl4RjUvUVXtryYTu22zi7eFL
geo7lajlZ4K7AXvMjmK4p24m6hf570siho3ILQuFweGDkMm2yzsU1L/Y8DTa6oBOESABF7190AjE
cK+CF5JZjWtqCXyDGjPVEANEYCwf0AzFIYfN9uJkVYNxZEqXp4Vl6tGgk57l5YVdZoK/DV7DeZ3d
IolPFBQw/C1FjgghzAwTFYq+mQYBYb/rf0aOuRDKGLMjih6o72zO27lCH9I1StWgrZM4xSKkfUAn
ojXkuvxjZEP6+98U6hn9hG0DFrxekWJmEPaWGNKLJcS8axR+SyvMj/eBIAD8ef6y6kecDnaKWvPh
O0+JOH1L7xuOmqETss1ibyscpV6+UB4ElULxHuAMnRHfMIBJMJB4AaPs+hLcHNwDyEPgJtdyhDzi
yY0pP8DAkZm45lZ+hPe2aUXB+P7MqF1ksOUhsbqJ1RS6hOothXKKhb1YE0shj0aQavFuvjZW97KT
P3znRS+wcSDWcQMuLvyFiZiHc7KmUQcdJXAjM4Hjq6Xf88rP0ZYGDpxBHgwXYQJtVL0F/fU/ESwI
zviLR0e5L1XULqqXM+RPtdV/dMLqMkk8npcCMSsVwK6ZuG4ufYJH4a0vKurXXUaEslcBmjQ1zmXO
E56ezF/3RfGMBQmVtPiYqI8qqH+Rm+dAfoF2ZUO0cS68uY3KoXyQY6l5+zMMOBF0AOEZpX/0ArBz
YqHFhozbvX0airtIwfUg5SMqSickEB3A36H/u1mythHUO4lbIO1yGaQkSFeCSjkWT90ULs9pnHIY
SUzFOxqxneEyaBmWLTYoyLIg/X5g3i2iveuN3aBf3HciBOCIPVBvDebSDRzEt0/wVwVj8vFWEzrq
CyZuyzOUtL0T0i3VGzMe8aAS7RgCcpSC4+QGhqsHQ1GEmv4CAOEU6rHNnq/ybbzHd3jgPCcGxPzU
CZ6OoD8+WNLnXq97pmLTIAKtNYUZzQLNYoW2TO5BCaiHwedd/PORgqDDo8oBneN2FeUQh74wwSIj
NqGNAjwPDjURI7KyOzaD27SxHbtaNFaP9ObcpNI2ZQ0ZYrjZ75AQNwke8lD4kBcEjLYsMT+8819Z
BTqswvAk0NarytDXbC2ta6QwQallc7X6xVnQquCFJV+AJ6xkdHSrBrDBHDL0zNP2AUOQLjEB9FlL
MwkgJm3RJtlddk0xsV38u3qUOZ6SsGVNuaZv3BI3YS79ohiDru57ypYx1SfWDkZZRTJLL9yuuEyd
UvHmtiUtO/W4kNSp8sSHzuRuEZWWzSaR9RyNFmjiCHT0EffogdYUXefI2BFwy3202CZ3sXDH5iZC
yztFPbg3CF1SMG7j3e8gbobrucc1mgO182V2mnLwA0aYwSiaAAEIcm/u5oulZWeSadyPiAFg3F1M
EcjVdqxlc7w+/PmlT5hQb7ofwFwqkTiXpYF65ncx42XZgV0Ndxe0XFnmHuBAPblWkbthtWRCjXSG
t28+odyUcvKacfl9SFYkbsDTLF5gwKTjgwSkJVFeR0K37z4pmN6sBQdlo2n1euXcc6WfItQ0+64F
HlXRx23vWcaNZepNakUjcuEQDLw+iADnLDWvKkpwQMZUj0kX/pZg4p/2x30UdRJxMltvtYKv4gt3
0wGf0FpL0+m2biUE4gZiE8DainNHL8ovaHMVKheDPY1/dMa87JBixA5poYzYNhBTXwDgTYiiYhCB
ZbcQzbQFjnXKT1imwNqbSmnX8A/k90cNiDDcr8Exn9Wh5j/up9SmK1vCa9jBBA0dEFh8RHF5EJ5F
e4Znoo4pyzDtmk2vB3u066QZ7ase6J0bNUiP1MR26YOEQsO5dqFM9yIgo1DrpnoJArQ8wakTjUbd
6/xuHoDrphFyw8LdrWMlNyjf/AKfMTVjhNm7G2UgthmdTPa2f+r3Wz/X3v/TO4wh65OZJbmxyGiO
XmP6rcINevxJNP6EAvwmc1O1J4/5jRbIWBcnp4xes8KbsiS2AfaLRA656kiGg0ENiP2SeWEb3zuK
HsZKd5LH0Lo/DWZUBXhyO7xWZi6vN9hDpY5iarIW4LXFrZJqri8g1z41fLZkipNOdl/fWz3l1H9b
oKA5un3WVwHf/up0if8prxBSwuVfVmD6Qk8awZjn4mkPuNmOpH2f/FcXXdbCd8bPvXDpF4YLBWiF
1CqwgVOEL8pBwKmBb+4p6NgiuXTDseBEFIjaGaaRS5uPZAJK1OF4iXNiwT6crWYWlc6l4vA9/cv7
3QpU7pzudibGkt9I3nyTvxzD8ggYmVNuR1Z6WZrkiiMnYlKYeUkxko0rKResVes0VeLnQpgDNEYG
UN6IwNImrWsWxAUu2DHN1LSTa/z8efOo5p8Gxyj8bNjAXz964o1YX/8ISdEWIcV5XCWEurVuXNbH
EwZUWVYveGFuUWTridbT9Zyi+u/gwx+xNSIEeQuTs+wqF4atHfO/kb11lJGdQbvS58v5CUc0e+NC
yKbB53SkCzJR7vhFIGz+3IDyScbMuOAMNhp893tmtc7KJTbnUgRyeSx4eehneLOqGX5JwY0vDk4n
bffP1mJBDQ8ze6AmcXRwJio7VDAIEUDOqe5ZWzK7lHGyg/AWyiNk6Gx3s+VsQ2NbsdfWoH4TAD+q
NenKE4zPmhkgPj4Tc7JlGL67WJtU8xOeDYuKocx6ja7sFNGsd6ZomXdROipWScx03BNO3WJJWq5z
D8EskiTFOih6OZxohS/qi5ceFrayF3OU9PYgUW4WRUNZc2Q6zezpmhHyFMnb1Wn2sUnoiYW2fsGG
m7AP0ZnzEIfhXywQqLIt+W2KXEw76PkcY+NhyFYx+/q1AMTwg3gQFbbhgHQv/fkyfxTqE08ClVS5
unosOQ0+AkZb4mo1P+BZQ7I008kjPhvyysDn4vTQwPWfnuy27kBltcbLp8emjsjlaVV1GXm6rBm2
5dv8rQJ9/ovc/CN4hFhpY92QkE5ZUbXDRGXFjXrTivFbySH3DAHPZmE+lm+Cj/7y4rJ4aepn3Lbw
4ldZtsO/WgoVyb+ugbcGgwGGVmsDo2Q+irQwjWemfvNfACQSXi0cnXbIq7W5FRd7GgtyR3Ww0vZk
o/Hfu2jQH8q9TN9XR5pIgeePPWZOQrTckYBvLPksSiOpvho9ENyDqBoF+qhenE7z6ukp6w9VmaC4
IY8JQ+1dKcjkahuYwy7ELhToebN7W2SEC7qS+0Nk0PZGz2eLznOcz2rX4Femi+vmgsqCPu7sIhEr
nk9l4I0ck9V/qRMF12PXRTmBQzC9o+tD5nMH11j16aT0LeAnQLOppAFktyiGxHtuxxwnJQ6ub9vA
7+hVo1u32YR5XyzM1Ob/IDuUEu+WyepU5QXABJDCKCi31iRR0HYuN4bJY5Krij5pRwJdt3zhbBl0
sjQlW+QQn0uGlhT2IbNpxgXSRABwgDGjg5P6lIJ8zi7a148sCHSk1sTOeSh2IuzI8Xa+6WkflFA5
zLE9lgD/5HLPz/kBCt/6N8qDzzEjM5SiXL6QKUQhfAnlvEqHTQ0GRowAt3THI4vl9XgfXF8Z0C1q
kRbzqqOcis4pMQSsHPDFML7aCWCglPRrdUAMymz9GiB+F6w1Hqkhqpz4xq2l5aMI7ph7F5KdNDkN
3sQx0jHNsd535DBA/YoiuJJUMLyHFa4xM2mHDF4FwH8agw6vc8znFmXJFUOUm5ht0pSK/X/+bC+H
olTJme1CPF6hwODL+jsoKJ8YoqEnrYaUoLUthkbeR4W4tRg5Gr8tY9gqa8NYri5sKB1Suhbb2f56
E2kiGrnTk0A8ovuZO/+gWscbqJX1QDZ3dmMTp9ZMzJIC07NjkRKFkQZkh4+Ob1le6M+wBYjlvwcu
oPk+frRYYarP1mKjinATee9YB7S5BSC8a6b8azyKOE+7lxQ2fSmIurJBs2EoX4kFTAOOBjeJeLe5
oY2DPU1ctCxDOJnu2AC90oMa1adVHR2JThS0SOdJ1PY33dd7rVCzBMMpKdFtmJjds1R21ev5Skyg
HG8W7PSbh/x8wyb1OX2Ad9TatnYMAgELF6Utyf423EPCbf1cpAtkxD2zJx/4wzd/MLjHidTHJUX7
aBmPh1+uM2/q1uv1S8EmoSKo3sKYdgYRBA3LTtmks4HKO/FAI8zgdDSG1vhDqJFBPE5zdI9zNRdd
ylVqLwLMQByyPmD1SKnT7PChLK2pAigwqYRpbtLzWX8fhn54oYe6DySX1IbI8hpS21ZwgdbFvX7W
f88dhkbW2E/8SSNU9y5sHeevTSgnt50H+4x4Ps3M/Du1ZFqsVXpPYZ4i19kJzL36ndfqZAm62QU2
MT06Y5pPix1L+Gg6a8FMksPysuPzdV+KjbKAvN4CjdbFl+/i65MZbDyCGwTJA3lhQQIA
`protect end_protected
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2014"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
T9SzZY8k9gM9533XtJLJJkA/o+75gJmaKuOMoep9nwkvSLy1Jo67di/zYro0J9GKF2MDoM+xdUm1
JbcqDZ75Hw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
Dui2pA/UhqLaXatx9Z70nDBW19H1lO7dKPhN140V07Jc0L2D0YrpN0+8y39D1dI4yG1WkpVSgMFC
4B3SffF3OHMOB5cVjgRcHnx54QL9GaSEGOH1LoxwctA8gmSzkvmO8iRzhOvDgcczXOkCt+YXoT4s
dI3nTAWBI2a3XCOvbgg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2014_03", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
JQb4pHLv43VbvjLeiQJp3sIaVgayZH2jIbOLxS/lF33brBhGOwcZGs2QFJP/0nlReGUheF+Xc6pR
0dkN+UbWw6xe2SJa9THc+uqNRi/AH5TgC1c8QmhmmJH0AmEl/CEJfIVMvEiSRzCNiNuW1K3PDsAE
a8P4/pEjz8Fsb08sFGA8vD7Ef3K/JwqC+FBjvZAoW9GwTiUA0EKoFk/wJe0ynb+j+yO33vcxzMa6
/9MexNMW9TQ+cHK7/DRnGd0DNdfhevWedoIUnAonlSIlBkUYIOpQKkvomESvW9MMqDxOGYQ5pSN0
kObpxMZj7lAUgd8VISAObqCyIx7CrBKgM+zSaQ==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
WaLpv7BCNtvA9OZ28TETtjkauYBgURrqhVIKwtw0ZVyfFTqKRC9mtBWPZGCDBhLuuADPOgHsX3jj
aS63izHd0dSr1OYNmyh3v9MtBhLsxdGt/epV6Qmtum9fYv3kTMd7bNQS3UmaA1I+CMj3qhjSDudm
Rw31tvJDbSg7Vj4Y9c4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
joapmiOHjgcOy6kSpCaLwZJOHjP2ocHYZH41A2gdy9376SmNad0bsibThe95jKeHRdlkisAJ6fCz
w/dznlFTjV5LgMORrJ/iMFs4Yt79Uie1qUVi074PrvHqPGKKfTSxn9lROaw3OUHGAyNj8FdyKgPD
YV75YwlpOqgPp8w3C0r1qyY8IJIE0mnTPypK0MDZNJmOvXqRon1HpWzduGOCuNJGX1tovGduaMU3
4NSkrflmvq4eTglUE1oNgna3N1wPuJNgcIDwEfYR390A/614GIoON5WAHBV3KLGiLOtPZ/uh7X2g
ZNxD8MDdyNduMSTNIq0EX+g2eoSUXElNgk+7Dw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 5808)
`protect data_block
lJFbW3BScupe60htgIKGGeowbMK7NiFmyzKFVON7ExhcIEE4DbV/kwLrHoTJUbGZjU+Xaim4Q4X5
kMW1J0BOuWGw7UXDbZSI1UZPVoUdtK/QnOOeJ4ZmM4qrlVRhblZngRHEWks44USH0nebXoruCmKT
ieV7M0xh7ALkpyHfX15j6PJwMGcZXwMjqZ5YgFJJ5ukVR6LbsaKXvpQmR2cpwT/RxfkrIZR9JvC4
J4z9BQcXJ0WsXKq2YkUwLt1GO01L641mx0XP4LtCdpJLWgfyWgnMLlP4lDlwn/j35BmA7QcveIsP
5pVDOpiiVExTVL5dqYokH02WxBMe15YZBscoSSmA4WGOojV1e8IVCnLl8egSGMc4m/jm7oBLkoBY
qv8IZrKuRd1Olf744Xh6Cy1KdrHmM2cqRuTkmIEV5Xuby+etbuWM287a0Y/RAicS6o+PrwfD0edV
BwITEYl/QuGUeGH83e9Dd236R7m10fEgWZP6UBleFtj3auocaBOpNIBKCYGNt3JXo+gPVdHgI9+5
dv8dzKJZAvD7ukqjt19qZeq4DU0rSs62ORlSEKaT05SlTNUcoDACD7w1lB2+53w4a0hH0W/OcjXt
OV3MHa/iTJOjqdUOBVnGUyy9F/gK5L/mYIer5o8U7EXxurQ9C4sBNlI8VdegJo9lIUiP9gBbniuq
n3nnU+d5P2Ki5E7V06Du1wkjgxs7UTpgt16bNRIY+c/ju3E/hZCyq/IebQS/iu9/gS6GU1liYRW4
edPF0nvdiD8pcwR8hB35ly7cgqak6wgAV1hADT99X+QlIlPibmg0jCRXkqnvFx8aR+b844iXSyDU
7LAZE3Rw9ZstZQ7tbuwhMZyMbQoy7CIFCYcfMGTK7eOFPjz0kAKiv0h9xz94qYbrN7l1XUjFcrTp
DIPotEcE3cW7fiWhHcrysHfLzWI3baxUYagURK+PYA0TGTb1rEYp1ZpxiYzs79A/ZoRilQAETZv1
d4UjbMljwZ9WCSS1BJJo4u+EljZdwWRr7bKLH0VdQn0zQRmVbBBfccRvkQi+V01ta8j2hdd4fHPl
Ma4683IvUtlJx42uZeqnmo8DnSupxAQsVIeLSdXG8yynsRfs+T0uAaXrqmz3AWytzn5IKpK5Jfky
NbDF0OXhIcJzADc0hzhkNDDEODzh9ddA7ZE/7M9a3drAgpAKzRgZsxCHBii8tMQAYwGWt87SKER5
xZS0WZnsceouoCB0EB/iIAkuBbROyQhxVwPK66Wfp0xmF/a25yrHsgfSbVoCaJjw1dgqRPVjsbzM
Xoh5iu4KAGJgX5tqpE09HN4WG2a9q7jA1MVsDfmvoWtyKB+AgbGDi8z/cL6pgZo28q5T4WMfesSZ
6D+//ymSWKXsQH9cRpS3Rfbdwm+Ihj6xybwVVsWBVg+CDEn8PG2aRKEp5ig3AqRMn2oHrgdIVKp3
tL4AZ2lILj1t3sgQGEBdDSuFMa6pLq8C/uh/I6vH4iHUWKu0AvVipwa9YL86sPQiCYMXS76j5UhB
h7y2edkVFfmbz6I5n4oMkVIO+85+jiTAoWD7gi0/fD8dZL8DjKe+Ct+4Bibnd5bEy77lhn/5RY4+
GwSSD4CCCHXsoLTC9O5tNH0KViRD4Yb+GrJb9eOBjkh9caHi2+B/Tcl3AaOgdSUJqo2k2gV0WsDj
pMTkVWfxibnKHpQTCl49wm0aeW/66hkURa0YFh9YpC5+Lq0Gg6yQTI7gFnZYEUMilCtPkcOF80XP
e6FMhcroP7KLAQ+4YpEp/Z1Dr2JbbOLkMBMMoeZtPOZEjjr30GpAO71K5zcidI7kjy2Kk4835Sjr
4YlZzGNlo/tZv02/tFqRR4bBKwtPoY+ncOl+PCRybUS14CWWmEm59RMdwF2hsS0DprivtUvMPfZi
UU+OH4LhXR4UgMOVCNXciGDRr3OpYSFlGdypEH/Nk87v/3ypfNOLEXrUYIVOOjJhuVO/Fw858HQU
kPK6Vf7I+t37xVSW3aryH7B+TQP4W114lBqsRXDl7ZpSlfpopb+iVnMqj+ZYIkajRoUAp2JYtUVw
crlZQUOOkLAjnkuCQw6omwmCMOxZ2mfwfzkb8SSlA+ivxkDQDXVkEnh05ae54rYnMhQSQf9EVdK4
iJzdusac9XWjXR22FQpycUm6iRLjUXoh0laT/sMcBuRp6C8Q04ULMlfzS89QKGRPUmJVGkWLXuaa
hlFTHjd2maysXju4KutQkM/nZc+G/U+seVChCY2B4KP6/paLejmBkagHUmMtQdnyZUvNZBMTttm1
DjXboxnNv5BKkquRSwOQbC+3LFSOO7bzILhbwnYC09Unw/fg0uJNc5HXGDMmqKUqbIkxln9pPmTP
9GZCptIGQU14nxuI4B5bZ6vkdrO10tloA3D+XrgJZfbtKl5amkHU8uy4HaNGQgbBgWP2NkZnSe7N
CG9HKsBIkCMuJdMN2eZyORfWpEVgmP2Y2etTjx0L0XgKaMyRA7NxmfmLllagZKOIo2ae9nUVZiEq
JVfWexfcsKlEPe+IsfyAliRTK4dRpLsESi8xRQMnzZJqSU2aj1XWdOG2vcC9AhMjOJQBRsO3rKBP
PNCM50XcPu6hsJ494X+0UHuKwmXDLYtrAZp7Dsbd3KpNzoWxLalLHzS0MXNypfjiC6Y7wM+UHYB1
3ZJ2VZuFMcBuZaoehfZyCQ5UC9DsZuMVC948+oonrvIB3HoaUxC5Hw4LVq6F06ValUU5lbPlFS2b
xh9TivFBTxik380m4Awwnrubo9AI9vV43meJ6kgoPiTb7Fbaw+oNu+arvp1JkWxMo+jfwkv+AmV1
+gXSlfum2CNOLf8V/IenlDHlHAlAO3EcBz8yQi3WCJSat+CQ1roB0CcndtYEuq0EMZ7UnoLuDki3
7KHM9g6B+V2FHlau4X0HzX2/FnqE8uoaQY9tJx7DDdlFR/OP+X4WFDyXirXtdhVSaMK4EBD5QTlH
46/7fWJwLP6JIUQZZg7eMhI/SaKZqTWZNodMTRZYOjgJXmPm0L5cjDCpgeTDhuCizp2FPMuyvtrF
2QAYWBqcA5fwK8ilYnh9hos7FbcgY1i/yVFZvxAix91W6ZH6QNQ/Iet5E85JfnuqqCFc621lidnv
uD+vsDXiGbqnZJT2VycVsvtLrxIpZb3fdIdMWVhHnflI5Bx7ddp38uEo+Wd6xEx8MgQ7U2juRKPn
qlSndS8ili46r2tjCZwBSh4b+fkt1tTqgCCcURvSpSqQLi/56ZD26DeGZu4di329xBmJ9eQVJoft
erfotx06bVpU234iKwjrwJI8oE7D/Nyrwo2uE3eDHpiq9D7ykjEkoGjIkxjm2s/dVbpo/m4k6A3w
WRf0uqwhhAP+B4HfBGMXRVdJyig0loOu3EkKVV32RugnV4elxmKyyl4RjUvUVXtryYTu22zi7eFL
geo7lajlZ4K7AXvMjmK4p24m6hf570siho3ILQuFweGDkMm2yzsU1L/Y8DTa6oBOESABF7190AjE
cK+CF5JZjWtqCXyDGjPVEANEYCwf0AzFIYfN9uJkVYNxZEqXp4Vl6tGgk57l5YVdZoK/DV7DeZ3d
IolPFBQw/C1FjgghzAwTFYq+mQYBYb/rf0aOuRDKGLMjih6o72zO27lCH9I1StWgrZM4xSKkfUAn
ojXkuvxjZEP6+98U6hn9hG0DFrxekWJmEPaWGNKLJcS8axR+SyvMj/eBIAD8ef6y6kecDnaKWvPh
O0+JOH1L7xuOmqETss1ibyscpV6+UB4ElULxHuAMnRHfMIBJMJB4AaPs+hLcHNwDyEPgJtdyhDzi
yY0pP8DAkZm45lZ+hPe2aUXB+P7MqF1ksOUhsbqJ1RS6hOothXKKhb1YE0shj0aQavFuvjZW97KT
P3znRS+wcSDWcQMuLvyFiZiHc7KmUQcdJXAjM4Hjq6Xf88rP0ZYGDpxBHgwXYQJtVL0F/fU/ESwI
zviLR0e5L1XULqqXM+RPtdV/dMLqMkk8npcCMSsVwK6ZuG4ufYJH4a0vKurXXUaEslcBmjQ1zmXO
E56ezF/3RfGMBQmVtPiYqI8qqH+Rm+dAfoF2ZUO0cS68uY3KoXyQY6l5+zMMOBF0AOEZpX/0ArBz
YqHFhozbvX0airtIwfUg5SMqSickEB3A36H/u1mythHUO4lbIO1yGaQkSFeCSjkWT90ULs9pnHIY
SUzFOxqxneEyaBmWLTYoyLIg/X5g3i2iveuN3aBf3HciBOCIPVBvDebSDRzEt0/wVwVj8vFWEzrq
CyZuyzOUtL0T0i3VGzMe8aAS7RgCcpSC4+QGhqsHQ1GEmv4CAOEU6rHNnq/ybbzHd3jgPCcGxPzU
CZ6OoD8+WNLnXq97pmLTIAKtNYUZzQLNYoW2TO5BCaiHwedd/PORgqDDo8oBneN2FeUQh74wwSIj
NqGNAjwPDjURI7KyOzaD27SxHbtaNFaP9ObcpNI2ZQ0ZYrjZ75AQNwke8lD4kBcEjLYsMT+8819Z
BTqswvAk0NarytDXbC2ta6QwQallc7X6xVnQquCFJV+AJ6xkdHSrBrDBHDL0zNP2AUOQLjEB9FlL
MwkgJm3RJtlddk0xsV38u3qUOZ6SsGVNuaZv3BI3YS79ohiDru57ypYx1SfWDkZZRTJLL9yuuEyd
UvHmtiUtO/W4kNSp8sSHzuRuEZWWzSaR9RyNFmjiCHT0EffogdYUXefI2BFwy3202CZ3sXDH5iZC
yztFPbg3CF1SMG7j3e8gbobrucc1mgO182V2mnLwA0aYwSiaAAEIcm/u5oulZWeSadyPiAFg3F1M
EcjVdqxlc7w+/PmlT5hQb7ofwFwqkTiXpYF65ncx42XZgV0Ndxe0XFnmHuBAPblWkbthtWRCjXSG
t28+odyUcvKacfl9SFYkbsDTLF5gwKTjgwSkJVFeR0K37z4pmN6sBQdlo2n1euXcc6WfItQ0+64F
HlXRx23vWcaNZepNakUjcuEQDLw+iADnLDWvKkpwQMZUj0kX/pZg4p/2x30UdRJxMltvtYKv4gt3
0wGf0FpL0+m2biUE4gZiE8DainNHL8ovaHMVKheDPY1/dMa87JBixA5poYzYNhBTXwDgTYiiYhCB
ZbcQzbQFjnXKT1imwNqbSmnX8A/k90cNiDDcr8Exn9Wh5j/up9SmK1vCa9jBBA0dEFh8RHF5EJ5F
e4Znoo4pyzDtmk2vB3u066QZ7ase6J0bNUiP1MR26YOEQsO5dqFM9yIgo1DrpnoJArQ8wakTjUbd
6/xuHoDrphFyw8LdrWMlNyjf/AKfMTVjhNm7G2UgthmdTPa2f+r3Wz/X3v/TO4wh65OZJbmxyGiO
XmP6rcINevxJNP6EAvwmc1O1J4/5jRbIWBcnp4xes8KbsiS2AfaLRA656kiGg0ENiP2SeWEb3zuK
HsZKd5LH0Lo/DWZUBXhyO7xWZi6vN9hDpY5iarIW4LXFrZJqri8g1z41fLZkipNOdl/fWz3l1H9b
oKA5un3WVwHf/up0if8prxBSwuVfVmD6Qk8awZjn4mkPuNmOpH2f/FcXXdbCd8bPvXDpF4YLBWiF
1CqwgVOEL8pBwKmBb+4p6NgiuXTDseBEFIjaGaaRS5uPZAJK1OF4iXNiwT6crWYWlc6l4vA9/cv7
3QpU7pzudibGkt9I3nyTvxzD8ggYmVNuR1Z6WZrkiiMnYlKYeUkxko0rKResVes0VeLnQpgDNEYG
UN6IwNImrWsWxAUu2DHN1LSTa/z8efOo5p8Gxyj8bNjAXz964o1YX/8ISdEWIcV5XCWEurVuXNbH
EwZUWVYveGFuUWTridbT9Zyi+u/gwx+xNSIEeQuTs+wqF4atHfO/kb11lJGdQbvS58v5CUc0e+NC
yKbB53SkCzJR7vhFIGz+3IDyScbMuOAMNhp893tmtc7KJTbnUgRyeSx4eehneLOqGX5JwY0vDk4n
bffP1mJBDQ8ze6AmcXRwJio7VDAIEUDOqe5ZWzK7lHGyg/AWyiNk6Gx3s+VsQ2NbsdfWoH4TAD+q
NenKE4zPmhkgPj4Tc7JlGL67WJtU8xOeDYuKocx6ja7sFNGsd6ZomXdROipWScx03BNO3WJJWq5z
D8EskiTFOih6OZxohS/qi5ceFrayF3OU9PYgUW4WRUNZc2Q6zezpmhHyFMnb1Wn2sUnoiYW2fsGG
m7AP0ZnzEIfhXywQqLIt+W2KXEw76PkcY+NhyFYx+/q1AMTwg3gQFbbhgHQv/fkyfxTqE08ClVS5
unosOQ0+AkZb4mo1P+BZQ7I008kjPhvyysDn4vTQwPWfnuy27kBltcbLp8emjsjlaVV1GXm6rBm2
5dv8rQJ9/ovc/CN4hFhpY92QkE5ZUbXDRGXFjXrTivFbySH3DAHPZmE+lm+Cj/7y4rJ4aepn3Lbw
4ldZtsO/WgoVyb+ugbcGgwGGVmsDo2Q+irQwjWemfvNfACQSXi0cnXbIq7W5FRd7GgtyR3Ww0vZk
o/Hfu2jQH8q9TN9XR5pIgeePPWZOQrTckYBvLPksSiOpvho9ENyDqBoF+qhenE7z6ukp6w9VmaC4
IY8JQ+1dKcjkahuYwy7ELhToebN7W2SEC7qS+0Nk0PZGz2eLznOcz2rX4Femi+vmgsqCPu7sIhEr
nk9l4I0ck9V/qRMF12PXRTmBQzC9o+tD5nMH11j16aT0LeAnQLOppAFktyiGxHtuxxwnJQ6ub9vA
7+hVo1u32YR5XyzM1Ob/IDuUEu+WyepU5QXABJDCKCi31iRR0HYuN4bJY5Krij5pRwJdt3zhbBl0
sjQlW+QQn0uGlhT2IbNpxgXSRABwgDGjg5P6lIJ8zi7a148sCHSk1sTOeSh2IuzI8Xa+6WkflFA5
zLE9lgD/5HLPz/kBCt/6N8qDzzEjM5SiXL6QKUQhfAnlvEqHTQ0GRowAt3THI4vl9XgfXF8Z0C1q
kRbzqqOcis4pMQSsHPDFML7aCWCglPRrdUAMymz9GiB+F6w1Hqkhqpz4xq2l5aMI7ph7F5KdNDkN
3sQx0jHNsd535DBA/YoiuJJUMLyHFa4xM2mHDF4FwH8agw6vc8znFmXJFUOUm5ht0pSK/X/+bC+H
olTJme1CPF6hwODL+jsoKJ8YoqEnrYaUoLUthkbeR4W4tRg5Gr8tY9gqa8NYri5sKB1Suhbb2f56
E2kiGrnTk0A8ovuZO/+gWscbqJX1QDZ3dmMTp9ZMzJIC07NjkRKFkQZkh4+Ob1le6M+wBYjlvwcu
oPk+frRYYarP1mKjinATee9YB7S5BSC8a6b8azyKOE+7lxQ2fSmIurJBs2EoX4kFTAOOBjeJeLe5
oY2DPU1ctCxDOJnu2AC90oMa1adVHR2JThS0SOdJ1PY33dd7rVCzBMMpKdFtmJjds1R21ev5Skyg
HG8W7PSbh/x8wyb1OX2Ad9TatnYMAgELF6Utyf423EPCbf1cpAtkxD2zJx/4wzd/MLjHidTHJUX7
aBmPh1+uM2/q1uv1S8EmoSKo3sKYdgYRBA3LTtmks4HKO/FAI8zgdDSG1vhDqJFBPE5zdI9zNRdd
ylVqLwLMQByyPmD1SKnT7PChLK2pAigwqYRpbtLzWX8fhn54oYe6DySX1IbI8hpS21ZwgdbFvX7W
f88dhkbW2E/8SSNU9y5sHeevTSgnt50H+4x4Ps3M/Du1ZFqsVXpPYZ4i19kJzL36ndfqZAm62QU2
MT06Y5pPix1L+Gg6a8FMksPysuPzdV+KjbKAvN4CjdbFl+/i65MZbDyCGwTJA3lhQQIA
`protect end_protected
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2014"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
T9SzZY8k9gM9533XtJLJJkA/o+75gJmaKuOMoep9nwkvSLy1Jo67di/zYro0J9GKF2MDoM+xdUm1
JbcqDZ75Hw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
Dui2pA/UhqLaXatx9Z70nDBW19H1lO7dKPhN140V07Jc0L2D0YrpN0+8y39D1dI4yG1WkpVSgMFC
4B3SffF3OHMOB5cVjgRcHnx54QL9GaSEGOH1LoxwctA8gmSzkvmO8iRzhOvDgcczXOkCt+YXoT4s
dI3nTAWBI2a3XCOvbgg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2014_03", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
JQb4pHLv43VbvjLeiQJp3sIaVgayZH2jIbOLxS/lF33brBhGOwcZGs2QFJP/0nlReGUheF+Xc6pR
0dkN+UbWw6xe2SJa9THc+uqNRi/AH5TgC1c8QmhmmJH0AmEl/CEJfIVMvEiSRzCNiNuW1K3PDsAE
a8P4/pEjz8Fsb08sFGA8vD7Ef3K/JwqC+FBjvZAoW9GwTiUA0EKoFk/wJe0ynb+j+yO33vcxzMa6
/9MexNMW9TQ+cHK7/DRnGd0DNdfhevWedoIUnAonlSIlBkUYIOpQKkvomESvW9MMqDxOGYQ5pSN0
kObpxMZj7lAUgd8VISAObqCyIx7CrBKgM+zSaQ==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
WaLpv7BCNtvA9OZ28TETtjkauYBgURrqhVIKwtw0ZVyfFTqKRC9mtBWPZGCDBhLuuADPOgHsX3jj
aS63izHd0dSr1OYNmyh3v9MtBhLsxdGt/epV6Qmtum9fYv3kTMd7bNQS3UmaA1I+CMj3qhjSDudm
Rw31tvJDbSg7Vj4Y9c4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
joapmiOHjgcOy6kSpCaLwZJOHjP2ocHYZH41A2gdy9376SmNad0bsibThe95jKeHRdlkisAJ6fCz
w/dznlFTjV5LgMORrJ/iMFs4Yt79Uie1qUVi074PrvHqPGKKfTSxn9lROaw3OUHGAyNj8FdyKgPD
YV75YwlpOqgPp8w3C0r1qyY8IJIE0mnTPypK0MDZNJmOvXqRon1HpWzduGOCuNJGX1tovGduaMU3
4NSkrflmvq4eTglUE1oNgna3N1wPuJNgcIDwEfYR390A/614GIoON5WAHBV3KLGiLOtPZ/uh7X2g
ZNxD8MDdyNduMSTNIq0EX+g2eoSUXElNgk+7Dw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 5808)
`protect data_block
lJFbW3BScupe60htgIKGGeowbMK7NiFmyzKFVON7ExhcIEE4DbV/kwLrHoTJUbGZjU+Xaim4Q4X5
kMW1J0BOuWGw7UXDbZSI1UZPVoUdtK/QnOOeJ4ZmM4qrlVRhblZngRHEWks44USH0nebXoruCmKT
ieV7M0xh7ALkpyHfX15j6PJwMGcZXwMjqZ5YgFJJ5ukVR6LbsaKXvpQmR2cpwT/RxfkrIZR9JvC4
J4z9BQcXJ0WsXKq2YkUwLt1GO01L641mx0XP4LtCdpJLWgfyWgnMLlP4lDlwn/j35BmA7QcveIsP
5pVDOpiiVExTVL5dqYokH02WxBMe15YZBscoSSmA4WGOojV1e8IVCnLl8egSGMc4m/jm7oBLkoBY
qv8IZrKuRd1Olf744Xh6Cy1KdrHmM2cqRuTkmIEV5Xuby+etbuWM287a0Y/RAicS6o+PrwfD0edV
BwITEYl/QuGUeGH83e9Dd236R7m10fEgWZP6UBleFtj3auocaBOpNIBKCYGNt3JXo+gPVdHgI9+5
dv8dzKJZAvD7ukqjt19qZeq4DU0rSs62ORlSEKaT05SlTNUcoDACD7w1lB2+53w4a0hH0W/OcjXt
OV3MHa/iTJOjqdUOBVnGUyy9F/gK5L/mYIer5o8U7EXxurQ9C4sBNlI8VdegJo9lIUiP9gBbniuq
n3nnU+d5P2Ki5E7V06Du1wkjgxs7UTpgt16bNRIY+c/ju3E/hZCyq/IebQS/iu9/gS6GU1liYRW4
edPF0nvdiD8pcwR8hB35ly7cgqak6wgAV1hADT99X+QlIlPibmg0jCRXkqnvFx8aR+b844iXSyDU
7LAZE3Rw9ZstZQ7tbuwhMZyMbQoy7CIFCYcfMGTK7eOFPjz0kAKiv0h9xz94qYbrN7l1XUjFcrTp
DIPotEcE3cW7fiWhHcrysHfLzWI3baxUYagURK+PYA0TGTb1rEYp1ZpxiYzs79A/ZoRilQAETZv1
d4UjbMljwZ9WCSS1BJJo4u+EljZdwWRr7bKLH0VdQn0zQRmVbBBfccRvkQi+V01ta8j2hdd4fHPl
Ma4683IvUtlJx42uZeqnmo8DnSupxAQsVIeLSdXG8yynsRfs+T0uAaXrqmz3AWytzn5IKpK5Jfky
NbDF0OXhIcJzADc0hzhkNDDEODzh9ddA7ZE/7M9a3drAgpAKzRgZsxCHBii8tMQAYwGWt87SKER5
xZS0WZnsceouoCB0EB/iIAkuBbROyQhxVwPK66Wfp0xmF/a25yrHsgfSbVoCaJjw1dgqRPVjsbzM
Xoh5iu4KAGJgX5tqpE09HN4WG2a9q7jA1MVsDfmvoWtyKB+AgbGDi8z/cL6pgZo28q5T4WMfesSZ
6D+//ymSWKXsQH9cRpS3Rfbdwm+Ihj6xybwVVsWBVg+CDEn8PG2aRKEp5ig3AqRMn2oHrgdIVKp3
tL4AZ2lILj1t3sgQGEBdDSuFMa6pLq8C/uh/I6vH4iHUWKu0AvVipwa9YL86sPQiCYMXS76j5UhB
h7y2edkVFfmbz6I5n4oMkVIO+85+jiTAoWD7gi0/fD8dZL8DjKe+Ct+4Bibnd5bEy77lhn/5RY4+
GwSSD4CCCHXsoLTC9O5tNH0KViRD4Yb+GrJb9eOBjkh9caHi2+B/Tcl3AaOgdSUJqo2k2gV0WsDj
pMTkVWfxibnKHpQTCl49wm0aeW/66hkURa0YFh9YpC5+Lq0Gg6yQTI7gFnZYEUMilCtPkcOF80XP
e6FMhcroP7KLAQ+4YpEp/Z1Dr2JbbOLkMBMMoeZtPOZEjjr30GpAO71K5zcidI7kjy2Kk4835Sjr
4YlZzGNlo/tZv02/tFqRR4bBKwtPoY+ncOl+PCRybUS14CWWmEm59RMdwF2hsS0DprivtUvMPfZi
UU+OH4LhXR4UgMOVCNXciGDRr3OpYSFlGdypEH/Nk87v/3ypfNOLEXrUYIVOOjJhuVO/Fw858HQU
kPK6Vf7I+t37xVSW3aryH7B+TQP4W114lBqsRXDl7ZpSlfpopb+iVnMqj+ZYIkajRoUAp2JYtUVw
crlZQUOOkLAjnkuCQw6omwmCMOxZ2mfwfzkb8SSlA+ivxkDQDXVkEnh05ae54rYnMhQSQf9EVdK4
iJzdusac9XWjXR22FQpycUm6iRLjUXoh0laT/sMcBuRp6C8Q04ULMlfzS89QKGRPUmJVGkWLXuaa
hlFTHjd2maysXju4KutQkM/nZc+G/U+seVChCY2B4KP6/paLejmBkagHUmMtQdnyZUvNZBMTttm1
DjXboxnNv5BKkquRSwOQbC+3LFSOO7bzILhbwnYC09Unw/fg0uJNc5HXGDMmqKUqbIkxln9pPmTP
9GZCptIGQU14nxuI4B5bZ6vkdrO10tloA3D+XrgJZfbtKl5amkHU8uy4HaNGQgbBgWP2NkZnSe7N
CG9HKsBIkCMuJdMN2eZyORfWpEVgmP2Y2etTjx0L0XgKaMyRA7NxmfmLllagZKOIo2ae9nUVZiEq
JVfWexfcsKlEPe+IsfyAliRTK4dRpLsESi8xRQMnzZJqSU2aj1XWdOG2vcC9AhMjOJQBRsO3rKBP
PNCM50XcPu6hsJ494X+0UHuKwmXDLYtrAZp7Dsbd3KpNzoWxLalLHzS0MXNypfjiC6Y7wM+UHYB1
3ZJ2VZuFMcBuZaoehfZyCQ5UC9DsZuMVC948+oonrvIB3HoaUxC5Hw4LVq6F06ValUU5lbPlFS2b
xh9TivFBTxik380m4Awwnrubo9AI9vV43meJ6kgoPiTb7Fbaw+oNu+arvp1JkWxMo+jfwkv+AmV1
+gXSlfum2CNOLf8V/IenlDHlHAlAO3EcBz8yQi3WCJSat+CQ1roB0CcndtYEuq0EMZ7UnoLuDki3
7KHM9g6B+V2FHlau4X0HzX2/FnqE8uoaQY9tJx7DDdlFR/OP+X4WFDyXirXtdhVSaMK4EBD5QTlH
46/7fWJwLP6JIUQZZg7eMhI/SaKZqTWZNodMTRZYOjgJXmPm0L5cjDCpgeTDhuCizp2FPMuyvtrF
2QAYWBqcA5fwK8ilYnh9hos7FbcgY1i/yVFZvxAix91W6ZH6QNQ/Iet5E85JfnuqqCFc621lidnv
uD+vsDXiGbqnZJT2VycVsvtLrxIpZb3fdIdMWVhHnflI5Bx7ddp38uEo+Wd6xEx8MgQ7U2juRKPn
qlSndS8ili46r2tjCZwBSh4b+fkt1tTqgCCcURvSpSqQLi/56ZD26DeGZu4di329xBmJ9eQVJoft
erfotx06bVpU234iKwjrwJI8oE7D/Nyrwo2uE3eDHpiq9D7ykjEkoGjIkxjm2s/dVbpo/m4k6A3w
WRf0uqwhhAP+B4HfBGMXRVdJyig0loOu3EkKVV32RugnV4elxmKyyl4RjUvUVXtryYTu22zi7eFL
geo7lajlZ4K7AXvMjmK4p24m6hf570siho3ILQuFweGDkMm2yzsU1L/Y8DTa6oBOESABF7190AjE
cK+CF5JZjWtqCXyDGjPVEANEYCwf0AzFIYfN9uJkVYNxZEqXp4Vl6tGgk57l5YVdZoK/DV7DeZ3d
IolPFBQw/C1FjgghzAwTFYq+mQYBYb/rf0aOuRDKGLMjih6o72zO27lCH9I1StWgrZM4xSKkfUAn
ojXkuvxjZEP6+98U6hn9hG0DFrxekWJmEPaWGNKLJcS8axR+SyvMj/eBIAD8ef6y6kecDnaKWvPh
O0+JOH1L7xuOmqETss1ibyscpV6+UB4ElULxHuAMnRHfMIBJMJB4AaPs+hLcHNwDyEPgJtdyhDzi
yY0pP8DAkZm45lZ+hPe2aUXB+P7MqF1ksOUhsbqJ1RS6hOothXKKhb1YE0shj0aQavFuvjZW97KT
P3znRS+wcSDWcQMuLvyFiZiHc7KmUQcdJXAjM4Hjq6Xf88rP0ZYGDpxBHgwXYQJtVL0F/fU/ESwI
zviLR0e5L1XULqqXM+RPtdV/dMLqMkk8npcCMSsVwK6ZuG4ufYJH4a0vKurXXUaEslcBmjQ1zmXO
E56ezF/3RfGMBQmVtPiYqI8qqH+Rm+dAfoF2ZUO0cS68uY3KoXyQY6l5+zMMOBF0AOEZpX/0ArBz
YqHFhozbvX0airtIwfUg5SMqSickEB3A36H/u1mythHUO4lbIO1yGaQkSFeCSjkWT90ULs9pnHIY
SUzFOxqxneEyaBmWLTYoyLIg/X5g3i2iveuN3aBf3HciBOCIPVBvDebSDRzEt0/wVwVj8vFWEzrq
CyZuyzOUtL0T0i3VGzMe8aAS7RgCcpSC4+QGhqsHQ1GEmv4CAOEU6rHNnq/ybbzHd3jgPCcGxPzU
CZ6OoD8+WNLnXq97pmLTIAKtNYUZzQLNYoW2TO5BCaiHwedd/PORgqDDo8oBneN2FeUQh74wwSIj
NqGNAjwPDjURI7KyOzaD27SxHbtaNFaP9ObcpNI2ZQ0ZYrjZ75AQNwke8lD4kBcEjLYsMT+8819Z
BTqswvAk0NarytDXbC2ta6QwQallc7X6xVnQquCFJV+AJ6xkdHSrBrDBHDL0zNP2AUOQLjEB9FlL
MwkgJm3RJtlddk0xsV38u3qUOZ6SsGVNuaZv3BI3YS79ohiDru57ypYx1SfWDkZZRTJLL9yuuEyd
UvHmtiUtO/W4kNSp8sSHzuRuEZWWzSaR9RyNFmjiCHT0EffogdYUXefI2BFwy3202CZ3sXDH5iZC
yztFPbg3CF1SMG7j3e8gbobrucc1mgO182V2mnLwA0aYwSiaAAEIcm/u5oulZWeSadyPiAFg3F1M
EcjVdqxlc7w+/PmlT5hQb7ofwFwqkTiXpYF65ncx42XZgV0Ndxe0XFnmHuBAPblWkbthtWRCjXSG
t28+odyUcvKacfl9SFYkbsDTLF5gwKTjgwSkJVFeR0K37z4pmN6sBQdlo2n1euXcc6WfItQ0+64F
HlXRx23vWcaNZepNakUjcuEQDLw+iADnLDWvKkpwQMZUj0kX/pZg4p/2x30UdRJxMltvtYKv4gt3
0wGf0FpL0+m2biUE4gZiE8DainNHL8ovaHMVKheDPY1/dMa87JBixA5poYzYNhBTXwDgTYiiYhCB
ZbcQzbQFjnXKT1imwNqbSmnX8A/k90cNiDDcr8Exn9Wh5j/up9SmK1vCa9jBBA0dEFh8RHF5EJ5F
e4Znoo4pyzDtmk2vB3u066QZ7ase6J0bNUiP1MR26YOEQsO5dqFM9yIgo1DrpnoJArQ8wakTjUbd
6/xuHoDrphFyw8LdrWMlNyjf/AKfMTVjhNm7G2UgthmdTPa2f+r3Wz/X3v/TO4wh65OZJbmxyGiO
XmP6rcINevxJNP6EAvwmc1O1J4/5jRbIWBcnp4xes8KbsiS2AfaLRA656kiGg0ENiP2SeWEb3zuK
HsZKd5LH0Lo/DWZUBXhyO7xWZi6vN9hDpY5iarIW4LXFrZJqri8g1z41fLZkipNOdl/fWz3l1H9b
oKA5un3WVwHf/up0if8prxBSwuVfVmD6Qk8awZjn4mkPuNmOpH2f/FcXXdbCd8bPvXDpF4YLBWiF
1CqwgVOEL8pBwKmBb+4p6NgiuXTDseBEFIjaGaaRS5uPZAJK1OF4iXNiwT6crWYWlc6l4vA9/cv7
3QpU7pzudibGkt9I3nyTvxzD8ggYmVNuR1Z6WZrkiiMnYlKYeUkxko0rKResVes0VeLnQpgDNEYG
UN6IwNImrWsWxAUu2DHN1LSTa/z8efOo5p8Gxyj8bNjAXz964o1YX/8ISdEWIcV5XCWEurVuXNbH
EwZUWVYveGFuUWTridbT9Zyi+u/gwx+xNSIEeQuTs+wqF4atHfO/kb11lJGdQbvS58v5CUc0e+NC
yKbB53SkCzJR7vhFIGz+3IDyScbMuOAMNhp893tmtc7KJTbnUgRyeSx4eehneLOqGX5JwY0vDk4n
bffP1mJBDQ8ze6AmcXRwJio7VDAIEUDOqe5ZWzK7lHGyg/AWyiNk6Gx3s+VsQ2NbsdfWoH4TAD+q
NenKE4zPmhkgPj4Tc7JlGL67WJtU8xOeDYuKocx6ja7sFNGsd6ZomXdROipWScx03BNO3WJJWq5z
D8EskiTFOih6OZxohS/qi5ceFrayF3OU9PYgUW4WRUNZc2Q6zezpmhHyFMnb1Wn2sUnoiYW2fsGG
m7AP0ZnzEIfhXywQqLIt+W2KXEw76PkcY+NhyFYx+/q1AMTwg3gQFbbhgHQv/fkyfxTqE08ClVS5
unosOQ0+AkZb4mo1P+BZQ7I008kjPhvyysDn4vTQwPWfnuy27kBltcbLp8emjsjlaVV1GXm6rBm2
5dv8rQJ9/ovc/CN4hFhpY92QkE5ZUbXDRGXFjXrTivFbySH3DAHPZmE+lm+Cj/7y4rJ4aepn3Lbw
4ldZtsO/WgoVyb+ugbcGgwGGVmsDo2Q+irQwjWemfvNfACQSXi0cnXbIq7W5FRd7GgtyR3Ww0vZk
o/Hfu2jQH8q9TN9XR5pIgeePPWZOQrTckYBvLPksSiOpvho9ENyDqBoF+qhenE7z6ukp6w9VmaC4
IY8JQ+1dKcjkahuYwy7ELhToebN7W2SEC7qS+0Nk0PZGz2eLznOcz2rX4Femi+vmgsqCPu7sIhEr
nk9l4I0ck9V/qRMF12PXRTmBQzC9o+tD5nMH11j16aT0LeAnQLOppAFktyiGxHtuxxwnJQ6ub9vA
7+hVo1u32YR5XyzM1Ob/IDuUEu+WyepU5QXABJDCKCi31iRR0HYuN4bJY5Krij5pRwJdt3zhbBl0
sjQlW+QQn0uGlhT2IbNpxgXSRABwgDGjg5P6lIJ8zi7a148sCHSk1sTOeSh2IuzI8Xa+6WkflFA5
zLE9lgD/5HLPz/kBCt/6N8qDzzEjM5SiXL6QKUQhfAnlvEqHTQ0GRowAt3THI4vl9XgfXF8Z0C1q
kRbzqqOcis4pMQSsHPDFML7aCWCglPRrdUAMymz9GiB+F6w1Hqkhqpz4xq2l5aMI7ph7F5KdNDkN
3sQx0jHNsd535DBA/YoiuJJUMLyHFa4xM2mHDF4FwH8agw6vc8znFmXJFUOUm5ht0pSK/X/+bC+H
olTJme1CPF6hwODL+jsoKJ8YoqEnrYaUoLUthkbeR4W4tRg5Gr8tY9gqa8NYri5sKB1Suhbb2f56
E2kiGrnTk0A8ovuZO/+gWscbqJX1QDZ3dmMTp9ZMzJIC07NjkRKFkQZkh4+Ob1le6M+wBYjlvwcu
oPk+frRYYarP1mKjinATee9YB7S5BSC8a6b8azyKOE+7lxQ2fSmIurJBs2EoX4kFTAOOBjeJeLe5
oY2DPU1ctCxDOJnu2AC90oMa1adVHR2JThS0SOdJ1PY33dd7rVCzBMMpKdFtmJjds1R21ev5Skyg
HG8W7PSbh/x8wyb1OX2Ad9TatnYMAgELF6Utyf423EPCbf1cpAtkxD2zJx/4wzd/MLjHidTHJUX7
aBmPh1+uM2/q1uv1S8EmoSKo3sKYdgYRBA3LTtmks4HKO/FAI8zgdDSG1vhDqJFBPE5zdI9zNRdd
ylVqLwLMQByyPmD1SKnT7PChLK2pAigwqYRpbtLzWX8fhn54oYe6DySX1IbI8hpS21ZwgdbFvX7W
f88dhkbW2E/8SSNU9y5sHeevTSgnt50H+4x4Ps3M/Du1ZFqsVXpPYZ4i19kJzL36ndfqZAm62QU2
MT06Y5pPix1L+Gg6a8FMksPysuPzdV+KjbKAvN4CjdbFl+/i65MZbDyCGwTJA3lhQQIA
`protect end_protected
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2014"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
T9SzZY8k9gM9533XtJLJJkA/o+75gJmaKuOMoep9nwkvSLy1Jo67di/zYro0J9GKF2MDoM+xdUm1
JbcqDZ75Hw==
`protect key_keyowner = "Mentor Graphics Corporation", key_keyname= "MGC-VERIF-SIM-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
Dui2pA/UhqLaXatx9Z70nDBW19H1lO7dKPhN140V07Jc0L2D0YrpN0+8y39D1dI4yG1WkpVSgMFC
4B3SffF3OHMOB5cVjgRcHnx54QL9GaSEGOH1LoxwctA8gmSzkvmO8iRzhOvDgcczXOkCt+YXoT4s
dI3nTAWBI2a3XCOvbgg=
`protect key_keyowner = "Xilinx", key_keyname= "xilinx_2014_03", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
JQb4pHLv43VbvjLeiQJp3sIaVgayZH2jIbOLxS/lF33brBhGOwcZGs2QFJP/0nlReGUheF+Xc6pR
0dkN+UbWw6xe2SJa9THc+uqNRi/AH5TgC1c8QmhmmJH0AmEl/CEJfIVMvEiSRzCNiNuW1K3PDsAE
a8P4/pEjz8Fsb08sFGA8vD7Ef3K/JwqC+FBjvZAoW9GwTiUA0EKoFk/wJe0ynb+j+yO33vcxzMa6
/9MexNMW9TQ+cHK7/DRnGd0DNdfhevWedoIUnAonlSIlBkUYIOpQKkvomESvW9MMqDxOGYQ5pSN0
kObpxMZj7lAUgd8VISAObqCyIx7CrBKgM+zSaQ==
`protect key_keyowner = "Synopsys", key_keyname= "SNPS-VCS-RSA-1", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
WaLpv7BCNtvA9OZ28TETtjkauYBgURrqhVIKwtw0ZVyfFTqKRC9mtBWPZGCDBhLuuADPOgHsX3jj
aS63izHd0dSr1OYNmyh3v9MtBhLsxdGt/epV6Qmtum9fYv3kTMd7bNQS3UmaA1I+CMj3qhjSDudm
Rw31tvJDbSg7Vj4Y9c4=
`protect key_keyowner = "Aldec", key_keyname= "ALDEC08_001", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
joapmiOHjgcOy6kSpCaLwZJOHjP2ocHYZH41A2gdy9376SmNad0bsibThe95jKeHRdlkisAJ6fCz
w/dznlFTjV5LgMORrJ/iMFs4Yt79Uie1qUVi074PrvHqPGKKfTSxn9lROaw3OUHGAyNj8FdyKgPD
YV75YwlpOqgPp8w3C0r1qyY8IJIE0mnTPypK0MDZNJmOvXqRon1HpWzduGOCuNJGX1tovGduaMU3
4NSkrflmvq4eTglUE1oNgna3N1wPuJNgcIDwEfYR390A/614GIoON5WAHBV3KLGiLOtPZ/uh7X2g
ZNxD8MDdyNduMSTNIq0EX+g2eoSUXElNgk+7Dw==
`protect data_method = "AES128-CBC"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 5808)
`protect data_block
lJFbW3BScupe60htgIKGGeowbMK7NiFmyzKFVON7ExhcIEE4DbV/kwLrHoTJUbGZjU+Xaim4Q4X5
kMW1J0BOuWGw7UXDbZSI1UZPVoUdtK/QnOOeJ4ZmM4qrlVRhblZngRHEWks44USH0nebXoruCmKT
ieV7M0xh7ALkpyHfX15j6PJwMGcZXwMjqZ5YgFJJ5ukVR6LbsaKXvpQmR2cpwT/RxfkrIZR9JvC4
J4z9BQcXJ0WsXKq2YkUwLt1GO01L641mx0XP4LtCdpJLWgfyWgnMLlP4lDlwn/j35BmA7QcveIsP
5pVDOpiiVExTVL5dqYokH02WxBMe15YZBscoSSmA4WGOojV1e8IVCnLl8egSGMc4m/jm7oBLkoBY
qv8IZrKuRd1Olf744Xh6Cy1KdrHmM2cqRuTkmIEV5Xuby+etbuWM287a0Y/RAicS6o+PrwfD0edV
BwITEYl/QuGUeGH83e9Dd236R7m10fEgWZP6UBleFtj3auocaBOpNIBKCYGNt3JXo+gPVdHgI9+5
dv8dzKJZAvD7ukqjt19qZeq4DU0rSs62ORlSEKaT05SlTNUcoDACD7w1lB2+53w4a0hH0W/OcjXt
OV3MHa/iTJOjqdUOBVnGUyy9F/gK5L/mYIer5o8U7EXxurQ9C4sBNlI8VdegJo9lIUiP9gBbniuq
n3nnU+d5P2Ki5E7V06Du1wkjgxs7UTpgt16bNRIY+c/ju3E/hZCyq/IebQS/iu9/gS6GU1liYRW4
edPF0nvdiD8pcwR8hB35ly7cgqak6wgAV1hADT99X+QlIlPibmg0jCRXkqnvFx8aR+b844iXSyDU
7LAZE3Rw9ZstZQ7tbuwhMZyMbQoy7CIFCYcfMGTK7eOFPjz0kAKiv0h9xz94qYbrN7l1XUjFcrTp
DIPotEcE3cW7fiWhHcrysHfLzWI3baxUYagURK+PYA0TGTb1rEYp1ZpxiYzs79A/ZoRilQAETZv1
d4UjbMljwZ9WCSS1BJJo4u+EljZdwWRr7bKLH0VdQn0zQRmVbBBfccRvkQi+V01ta8j2hdd4fHPl
Ma4683IvUtlJx42uZeqnmo8DnSupxAQsVIeLSdXG8yynsRfs+T0uAaXrqmz3AWytzn5IKpK5Jfky
NbDF0OXhIcJzADc0hzhkNDDEODzh9ddA7ZE/7M9a3drAgpAKzRgZsxCHBii8tMQAYwGWt87SKER5
xZS0WZnsceouoCB0EB/iIAkuBbROyQhxVwPK66Wfp0xmF/a25yrHsgfSbVoCaJjw1dgqRPVjsbzM
Xoh5iu4KAGJgX5tqpE09HN4WG2a9q7jA1MVsDfmvoWtyKB+AgbGDi8z/cL6pgZo28q5T4WMfesSZ
6D+//ymSWKXsQH9cRpS3Rfbdwm+Ihj6xybwVVsWBVg+CDEn8PG2aRKEp5ig3AqRMn2oHrgdIVKp3
tL4AZ2lILj1t3sgQGEBdDSuFMa6pLq8C/uh/I6vH4iHUWKu0AvVipwa9YL86sPQiCYMXS76j5UhB
h7y2edkVFfmbz6I5n4oMkVIO+85+jiTAoWD7gi0/fD8dZL8DjKe+Ct+4Bibnd5bEy77lhn/5RY4+
GwSSD4CCCHXsoLTC9O5tNH0KViRD4Yb+GrJb9eOBjkh9caHi2+B/Tcl3AaOgdSUJqo2k2gV0WsDj
pMTkVWfxibnKHpQTCl49wm0aeW/66hkURa0YFh9YpC5+Lq0Gg6yQTI7gFnZYEUMilCtPkcOF80XP
e6FMhcroP7KLAQ+4YpEp/Z1Dr2JbbOLkMBMMoeZtPOZEjjr30GpAO71K5zcidI7kjy2Kk4835Sjr
4YlZzGNlo/tZv02/tFqRR4bBKwtPoY+ncOl+PCRybUS14CWWmEm59RMdwF2hsS0DprivtUvMPfZi
UU+OH4LhXR4UgMOVCNXciGDRr3OpYSFlGdypEH/Nk87v/3ypfNOLEXrUYIVOOjJhuVO/Fw858HQU
kPK6Vf7I+t37xVSW3aryH7B+TQP4W114lBqsRXDl7ZpSlfpopb+iVnMqj+ZYIkajRoUAp2JYtUVw
crlZQUOOkLAjnkuCQw6omwmCMOxZ2mfwfzkb8SSlA+ivxkDQDXVkEnh05ae54rYnMhQSQf9EVdK4
iJzdusac9XWjXR22FQpycUm6iRLjUXoh0laT/sMcBuRp6C8Q04ULMlfzS89QKGRPUmJVGkWLXuaa
hlFTHjd2maysXju4KutQkM/nZc+G/U+seVChCY2B4KP6/paLejmBkagHUmMtQdnyZUvNZBMTttm1
DjXboxnNv5BKkquRSwOQbC+3LFSOO7bzILhbwnYC09Unw/fg0uJNc5HXGDMmqKUqbIkxln9pPmTP
9GZCptIGQU14nxuI4B5bZ6vkdrO10tloA3D+XrgJZfbtKl5amkHU8uy4HaNGQgbBgWP2NkZnSe7N
CG9HKsBIkCMuJdMN2eZyORfWpEVgmP2Y2etTjx0L0XgKaMyRA7NxmfmLllagZKOIo2ae9nUVZiEq
JVfWexfcsKlEPe+IsfyAliRTK4dRpLsESi8xRQMnzZJqSU2aj1XWdOG2vcC9AhMjOJQBRsO3rKBP
PNCM50XcPu6hsJ494X+0UHuKwmXDLYtrAZp7Dsbd3KpNzoWxLalLHzS0MXNypfjiC6Y7wM+UHYB1
3ZJ2VZuFMcBuZaoehfZyCQ5UC9DsZuMVC948+oonrvIB3HoaUxC5Hw4LVq6F06ValUU5lbPlFS2b
xh9TivFBTxik380m4Awwnrubo9AI9vV43meJ6kgoPiTb7Fbaw+oNu+arvp1JkWxMo+jfwkv+AmV1
+gXSlfum2CNOLf8V/IenlDHlHAlAO3EcBz8yQi3WCJSat+CQ1roB0CcndtYEuq0EMZ7UnoLuDki3
7KHM9g6B+V2FHlau4X0HzX2/FnqE8uoaQY9tJx7DDdlFR/OP+X4WFDyXirXtdhVSaMK4EBD5QTlH
46/7fWJwLP6JIUQZZg7eMhI/SaKZqTWZNodMTRZYOjgJXmPm0L5cjDCpgeTDhuCizp2FPMuyvtrF
2QAYWBqcA5fwK8ilYnh9hos7FbcgY1i/yVFZvxAix91W6ZH6QNQ/Iet5E85JfnuqqCFc621lidnv
uD+vsDXiGbqnZJT2VycVsvtLrxIpZb3fdIdMWVhHnflI5Bx7ddp38uEo+Wd6xEx8MgQ7U2juRKPn
qlSndS8ili46r2tjCZwBSh4b+fkt1tTqgCCcURvSpSqQLi/56ZD26DeGZu4di329xBmJ9eQVJoft
erfotx06bVpU234iKwjrwJI8oE7D/Nyrwo2uE3eDHpiq9D7ykjEkoGjIkxjm2s/dVbpo/m4k6A3w
WRf0uqwhhAP+B4HfBGMXRVdJyig0loOu3EkKVV32RugnV4elxmKyyl4RjUvUVXtryYTu22zi7eFL
geo7lajlZ4K7AXvMjmK4p24m6hf570siho3ILQuFweGDkMm2yzsU1L/Y8DTa6oBOESABF7190AjE
cK+CF5JZjWtqCXyDGjPVEANEYCwf0AzFIYfN9uJkVYNxZEqXp4Vl6tGgk57l5YVdZoK/DV7DeZ3d
IolPFBQw/C1FjgghzAwTFYq+mQYBYb/rf0aOuRDKGLMjih6o72zO27lCH9I1StWgrZM4xSKkfUAn
ojXkuvxjZEP6+98U6hn9hG0DFrxekWJmEPaWGNKLJcS8axR+SyvMj/eBIAD8ef6y6kecDnaKWvPh
O0+JOH1L7xuOmqETss1ibyscpV6+UB4ElULxHuAMnRHfMIBJMJB4AaPs+hLcHNwDyEPgJtdyhDzi
yY0pP8DAkZm45lZ+hPe2aUXB+P7MqF1ksOUhsbqJ1RS6hOothXKKhb1YE0shj0aQavFuvjZW97KT
P3znRS+wcSDWcQMuLvyFiZiHc7KmUQcdJXAjM4Hjq6Xf88rP0ZYGDpxBHgwXYQJtVL0F/fU/ESwI
zviLR0e5L1XULqqXM+RPtdV/dMLqMkk8npcCMSsVwK6ZuG4ufYJH4a0vKurXXUaEslcBmjQ1zmXO
E56ezF/3RfGMBQmVtPiYqI8qqH+Rm+dAfoF2ZUO0cS68uY3KoXyQY6l5+zMMOBF0AOEZpX/0ArBz
YqHFhozbvX0airtIwfUg5SMqSickEB3A36H/u1mythHUO4lbIO1yGaQkSFeCSjkWT90ULs9pnHIY
SUzFOxqxneEyaBmWLTYoyLIg/X5g3i2iveuN3aBf3HciBOCIPVBvDebSDRzEt0/wVwVj8vFWEzrq
CyZuyzOUtL0T0i3VGzMe8aAS7RgCcpSC4+QGhqsHQ1GEmv4CAOEU6rHNnq/ybbzHd3jgPCcGxPzU
CZ6OoD8+WNLnXq97pmLTIAKtNYUZzQLNYoW2TO5BCaiHwedd/PORgqDDo8oBneN2FeUQh74wwSIj
NqGNAjwPDjURI7KyOzaD27SxHbtaNFaP9ObcpNI2ZQ0ZYrjZ75AQNwke8lD4kBcEjLYsMT+8819Z
BTqswvAk0NarytDXbC2ta6QwQallc7X6xVnQquCFJV+AJ6xkdHSrBrDBHDL0zNP2AUOQLjEB9FlL
MwkgJm3RJtlddk0xsV38u3qUOZ6SsGVNuaZv3BI3YS79ohiDru57ypYx1SfWDkZZRTJLL9yuuEyd
UvHmtiUtO/W4kNSp8sSHzuRuEZWWzSaR9RyNFmjiCHT0EffogdYUXefI2BFwy3202CZ3sXDH5iZC
yztFPbg3CF1SMG7j3e8gbobrucc1mgO182V2mnLwA0aYwSiaAAEIcm/u5oulZWeSadyPiAFg3F1M
EcjVdqxlc7w+/PmlT5hQb7ofwFwqkTiXpYF65ncx42XZgV0Ndxe0XFnmHuBAPblWkbthtWRCjXSG
t28+odyUcvKacfl9SFYkbsDTLF5gwKTjgwSkJVFeR0K37z4pmN6sBQdlo2n1euXcc6WfItQ0+64F
HlXRx23vWcaNZepNakUjcuEQDLw+iADnLDWvKkpwQMZUj0kX/pZg4p/2x30UdRJxMltvtYKv4gt3
0wGf0FpL0+m2biUE4gZiE8DainNHL8ovaHMVKheDPY1/dMa87JBixA5poYzYNhBTXwDgTYiiYhCB
ZbcQzbQFjnXKT1imwNqbSmnX8A/k90cNiDDcr8Exn9Wh5j/up9SmK1vCa9jBBA0dEFh8RHF5EJ5F
e4Znoo4pyzDtmk2vB3u066QZ7ase6J0bNUiP1MR26YOEQsO5dqFM9yIgo1DrpnoJArQ8wakTjUbd
6/xuHoDrphFyw8LdrWMlNyjf/AKfMTVjhNm7G2UgthmdTPa2f+r3Wz/X3v/TO4wh65OZJbmxyGiO
XmP6rcINevxJNP6EAvwmc1O1J4/5jRbIWBcnp4xes8KbsiS2AfaLRA656kiGg0ENiP2SeWEb3zuK
HsZKd5LH0Lo/DWZUBXhyO7xWZi6vN9hDpY5iarIW4LXFrZJqri8g1z41fLZkipNOdl/fWz3l1H9b
oKA5un3WVwHf/up0if8prxBSwuVfVmD6Qk8awZjn4mkPuNmOpH2f/FcXXdbCd8bPvXDpF4YLBWiF
1CqwgVOEL8pBwKmBb+4p6NgiuXTDseBEFIjaGaaRS5uPZAJK1OF4iXNiwT6crWYWlc6l4vA9/cv7
3QpU7pzudibGkt9I3nyTvxzD8ggYmVNuR1Z6WZrkiiMnYlKYeUkxko0rKResVes0VeLnQpgDNEYG
UN6IwNImrWsWxAUu2DHN1LSTa/z8efOo5p8Gxyj8bNjAXz964o1YX/8ISdEWIcV5XCWEurVuXNbH
EwZUWVYveGFuUWTridbT9Zyi+u/gwx+xNSIEeQuTs+wqF4atHfO/kb11lJGdQbvS58v5CUc0e+NC
yKbB53SkCzJR7vhFIGz+3IDyScbMuOAMNhp893tmtc7KJTbnUgRyeSx4eehneLOqGX5JwY0vDk4n
bffP1mJBDQ8ze6AmcXRwJio7VDAIEUDOqe5ZWzK7lHGyg/AWyiNk6Gx3s+VsQ2NbsdfWoH4TAD+q
NenKE4zPmhkgPj4Tc7JlGL67WJtU8xOeDYuKocx6ja7sFNGsd6ZomXdROipWScx03BNO3WJJWq5z
D8EskiTFOih6OZxohS/qi5ceFrayF3OU9PYgUW4WRUNZc2Q6zezpmhHyFMnb1Wn2sUnoiYW2fsGG
m7AP0ZnzEIfhXywQqLIt+W2KXEw76PkcY+NhyFYx+/q1AMTwg3gQFbbhgHQv/fkyfxTqE08ClVS5
unosOQ0+AkZb4mo1P+BZQ7I008kjPhvyysDn4vTQwPWfnuy27kBltcbLp8emjsjlaVV1GXm6rBm2
5dv8rQJ9/ovc/CN4hFhpY92QkE5ZUbXDRGXFjXrTivFbySH3DAHPZmE+lm+Cj/7y4rJ4aepn3Lbw
4ldZtsO/WgoVyb+ugbcGgwGGVmsDo2Q+irQwjWemfvNfACQSXi0cnXbIq7W5FRd7GgtyR3Ww0vZk
o/Hfu2jQH8q9TN9XR5pIgeePPWZOQrTckYBvLPksSiOpvho9ENyDqBoF+qhenE7z6ukp6w9VmaC4
IY8JQ+1dKcjkahuYwy7ELhToebN7W2SEC7qS+0Nk0PZGz2eLznOcz2rX4Femi+vmgsqCPu7sIhEr
nk9l4I0ck9V/qRMF12PXRTmBQzC9o+tD5nMH11j16aT0LeAnQLOppAFktyiGxHtuxxwnJQ6ub9vA
7+hVo1u32YR5XyzM1Ob/IDuUEu+WyepU5QXABJDCKCi31iRR0HYuN4bJY5Krij5pRwJdt3zhbBl0
sjQlW+QQn0uGlhT2IbNpxgXSRABwgDGjg5P6lIJ8zi7a148sCHSk1sTOeSh2IuzI8Xa+6WkflFA5
zLE9lgD/5HLPz/kBCt/6N8qDzzEjM5SiXL6QKUQhfAnlvEqHTQ0GRowAt3THI4vl9XgfXF8Z0C1q
kRbzqqOcis4pMQSsHPDFML7aCWCglPRrdUAMymz9GiB+F6w1Hqkhqpz4xq2l5aMI7ph7F5KdNDkN
3sQx0jHNsd535DBA/YoiuJJUMLyHFa4xM2mHDF4FwH8agw6vc8znFmXJFUOUm5ht0pSK/X/+bC+H
olTJme1CPF6hwODL+jsoKJ8YoqEnrYaUoLUthkbeR4W4tRg5Gr8tY9gqa8NYri5sKB1Suhbb2f56
E2kiGrnTk0A8ovuZO/+gWscbqJX1QDZ3dmMTp9ZMzJIC07NjkRKFkQZkh4+Ob1le6M+wBYjlvwcu
oPk+frRYYarP1mKjinATee9YB7S5BSC8a6b8azyKOE+7lxQ2fSmIurJBs2EoX4kFTAOOBjeJeLe5
oY2DPU1ctCxDOJnu2AC90oMa1adVHR2JThS0SOdJ1PY33dd7rVCzBMMpKdFtmJjds1R21ev5Skyg
HG8W7PSbh/x8wyb1OX2Ad9TatnYMAgELF6Utyf423EPCbf1cpAtkxD2zJx/4wzd/MLjHidTHJUX7
aBmPh1+uM2/q1uv1S8EmoSKo3sKYdgYRBA3LTtmks4HKO/FAI8zgdDSG1vhDqJFBPE5zdI9zNRdd
ylVqLwLMQByyPmD1SKnT7PChLK2pAigwqYRpbtLzWX8fhn54oYe6DySX1IbI8hpS21ZwgdbFvX7W
f88dhkbW2E/8SSNU9y5sHeevTSgnt50H+4x4Ps3M/Du1ZFqsVXpPYZ4i19kJzL36ndfqZAm62QU2
MT06Y5pPix1L+Gg6a8FMksPysuPzdV+KjbKAvN4CjdbFl+/i65MZbDyCGwTJA3lhQQIA
`protect end_protected
|
-- (C) 1992-2014 Altera Corporation. All rights reserved.
-- Your use of Altera Corporation's design tools, logic functions and other
-- software and tools, and its AMPP partner logic functions, and any output
-- files any of the foregoing (including device programming or simulation
-- files), and any associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License Subscription
-- Agreement, Altera MegaCore Function License Agreement, or other applicable
-- license agreement, including, without limitation, that your use is for the
-- sole purpose of programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the applicable
-- agreement for further details.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** SINGLE PRECISION INVERSE - CORE ***
--*** ***
--*** FP_INV_CORE.VHD ***
--*** ***
--*** Function: 36 bit Inverse ***
--*** (multiplicative iterative algorithm) ***
--*** ***
--*** 09/12/07 ML ***
--*** ***
--*** (c) 2007 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--*** ***
--***************************************************
--***************************************************
--*** Notes: Latency = 12 ***
--***************************************************
ENTITY fp_inv_core IS
GENERIC (synthesize : integer := 1);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
divisor : IN STD_LOGIC_VECTOR (36 DOWNTO 1);
quotient : OUT STD_LOGIC_VECTOR (36 DOWNTO 1)
);
END fp_inv_core;
ARCHITECTURE rtl OF fp_inv_core IS
signal zerovec : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal divisordel : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal invdivisor : STD_LOGIC_VECTOR (18 DOWNTO 1);
signal delinvdivisor : STD_LOGIC_VECTOR (18 DOWNTO 1);
signal scaleden : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal twonode : STD_LOGIC_VECTOR (37 DOWNTO 1);
signal nextguessff : STD_LOGIC_VECTOR (37 DOWNTO 1);
signal quotientnode : STD_LOGIC_VECTOR (36 DOWNTO 1);
component fp_div_est IS
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
divisor : IN STD_LOGIC_VECTOR (19 DOWNTO 1);
invdivisor : OUT STD_LOGIC_VECTOR (18 DOWNTO 1)
);
end component;
component fp_fxmul IS
GENERIC (
widthaa : positive := 18;
widthbb : positive := 18;
widthcc : positive := 36;
pipes : positive := 1;
accuracy : integer := 0; -- 0 = pruned multiplier, 1 = normal multiplier
device : integer := 0; -- 0 = "Stratix II", 1 = "Stratix III" (also 4)
synthesize : integer := 0
);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
dataaa : IN STD_LOGIC_VECTOR (widthaa DOWNTO 1);
databb : IN STD_LOGIC_VECTOR (widthbb DOWNTO 1);
result : OUT STD_LOGIC_VECTOR (widthcc DOWNTO 1)
);
end component;
component fp_del
GENERIC (
width : positive := 64;
pipes : positive := 2
);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
aa : IN STD_LOGIC_VECTOR (width DOWNTO 1);
cc : OUT STD_LOGIC_VECTOR (width DOWNTO 1)
);
end component;
BEGIN
gza: FOR k IN 1 TO 36 GENERATE
zerovec(k) <= '0';
END GENERATE;
invcore: fp_div_est
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
divisor=>divisor(36 DOWNTO 18),invdivisor=>invdivisor);
delinone: fp_del
GENERIC MAP (width=>36,pipes=>5)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
aa=>divisor,cc=>divisordel);
--**********************************
--*** ITERATION 0 - SCALE INPUTS ***
--**********************************
-- in level 5, out level 8
mulscaleone: fp_fxmul
GENERIC MAP (widthaa=>36,widthbb=>18,widthcc=>36,
pipes=>3,synthesize=>synthesize)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
dataaa=>divisordel,databb=>invdivisor,
result=>scaleden);
--********************
--*** ITERATION 1 ***
--********************
twonode <= '1' & zerovec(36 DOWNTO 1);
pita: PROCESS (sysclk,reset)
BEGIN
IF (reset = '1') THEN
FOR k IN 1 TO 37 LOOP
nextguessff(k) <= '0';
END LOOP;
ELSIF (rising_edge(sysclk)) THEN
IF (enable = '1') THEN
nextguessff <= twonode - ('0' & scaleden); -- level 9
END IF;
END IF;
END PROCESS;
deloneone: fp_del
GENERIC MAP (width=>18,pipes=>4)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
aa=>invdivisor,
cc=>delinvdivisor);
-- in level 9, out level 12
muloneone: fp_fxmul
GENERIC MAP (widthaa=>36,widthbb=>18,widthcc=>36,
pipes=>3,synthesize=>synthesize)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
dataaa=>nextguessff(36 DOWNTO 1),databb=>delinvdivisor,
result=>quotientnode);
quotient <= quotientnode(36 DOWNTO 1);
END rtl;
|
-- (C) 1992-2014 Altera Corporation. All rights reserved.
-- Your use of Altera Corporation's design tools, logic functions and other
-- software and tools, and its AMPP partner logic functions, and any output
-- files any of the foregoing (including device programming or simulation
-- files), and any associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License Subscription
-- Agreement, Altera MegaCore Function License Agreement, or other applicable
-- license agreement, including, without limitation, that your use is for the
-- sole purpose of programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the applicable
-- agreement for further details.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** SINGLE PRECISION INVERSE - CORE ***
--*** ***
--*** FP_INV_CORE.VHD ***
--*** ***
--*** Function: 36 bit Inverse ***
--*** (multiplicative iterative algorithm) ***
--*** ***
--*** 09/12/07 ML ***
--*** ***
--*** (c) 2007 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--*** ***
--***************************************************
--***************************************************
--*** Notes: Latency = 12 ***
--***************************************************
ENTITY fp_inv_core IS
GENERIC (synthesize : integer := 1);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
divisor : IN STD_LOGIC_VECTOR (36 DOWNTO 1);
quotient : OUT STD_LOGIC_VECTOR (36 DOWNTO 1)
);
END fp_inv_core;
ARCHITECTURE rtl OF fp_inv_core IS
signal zerovec : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal divisordel : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal invdivisor : STD_LOGIC_VECTOR (18 DOWNTO 1);
signal delinvdivisor : STD_LOGIC_VECTOR (18 DOWNTO 1);
signal scaleden : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal twonode : STD_LOGIC_VECTOR (37 DOWNTO 1);
signal nextguessff : STD_LOGIC_VECTOR (37 DOWNTO 1);
signal quotientnode : STD_LOGIC_VECTOR (36 DOWNTO 1);
component fp_div_est IS
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
divisor : IN STD_LOGIC_VECTOR (19 DOWNTO 1);
invdivisor : OUT STD_LOGIC_VECTOR (18 DOWNTO 1)
);
end component;
component fp_fxmul IS
GENERIC (
widthaa : positive := 18;
widthbb : positive := 18;
widthcc : positive := 36;
pipes : positive := 1;
accuracy : integer := 0; -- 0 = pruned multiplier, 1 = normal multiplier
device : integer := 0; -- 0 = "Stratix II", 1 = "Stratix III" (also 4)
synthesize : integer := 0
);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
dataaa : IN STD_LOGIC_VECTOR (widthaa DOWNTO 1);
databb : IN STD_LOGIC_VECTOR (widthbb DOWNTO 1);
result : OUT STD_LOGIC_VECTOR (widthcc DOWNTO 1)
);
end component;
component fp_del
GENERIC (
width : positive := 64;
pipes : positive := 2
);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
aa : IN STD_LOGIC_VECTOR (width DOWNTO 1);
cc : OUT STD_LOGIC_VECTOR (width DOWNTO 1)
);
end component;
BEGIN
gza: FOR k IN 1 TO 36 GENERATE
zerovec(k) <= '0';
END GENERATE;
invcore: fp_div_est
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
divisor=>divisor(36 DOWNTO 18),invdivisor=>invdivisor);
delinone: fp_del
GENERIC MAP (width=>36,pipes=>5)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
aa=>divisor,cc=>divisordel);
--**********************************
--*** ITERATION 0 - SCALE INPUTS ***
--**********************************
-- in level 5, out level 8
mulscaleone: fp_fxmul
GENERIC MAP (widthaa=>36,widthbb=>18,widthcc=>36,
pipes=>3,synthesize=>synthesize)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
dataaa=>divisordel,databb=>invdivisor,
result=>scaleden);
--********************
--*** ITERATION 1 ***
--********************
twonode <= '1' & zerovec(36 DOWNTO 1);
pita: PROCESS (sysclk,reset)
BEGIN
IF (reset = '1') THEN
FOR k IN 1 TO 37 LOOP
nextguessff(k) <= '0';
END LOOP;
ELSIF (rising_edge(sysclk)) THEN
IF (enable = '1') THEN
nextguessff <= twonode - ('0' & scaleden); -- level 9
END IF;
END IF;
END PROCESS;
deloneone: fp_del
GENERIC MAP (width=>18,pipes=>4)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
aa=>invdivisor,
cc=>delinvdivisor);
-- in level 9, out level 12
muloneone: fp_fxmul
GENERIC MAP (widthaa=>36,widthbb=>18,widthcc=>36,
pipes=>3,synthesize=>synthesize)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
dataaa=>nextguessff(36 DOWNTO 1),databb=>delinvdivisor,
result=>quotientnode);
quotient <= quotientnode(36 DOWNTO 1);
END rtl;
|
-- (C) 1992-2014 Altera Corporation. All rights reserved.
-- Your use of Altera Corporation's design tools, logic functions and other
-- software and tools, and its AMPP partner logic functions, and any output
-- files any of the foregoing (including device programming or simulation
-- files), and any associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License Subscription
-- Agreement, Altera MegaCore Function License Agreement, or other applicable
-- license agreement, including, without limitation, that your use is for the
-- sole purpose of programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the applicable
-- agreement for further details.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** SINGLE PRECISION INVERSE - CORE ***
--*** ***
--*** FP_INV_CORE.VHD ***
--*** ***
--*** Function: 36 bit Inverse ***
--*** (multiplicative iterative algorithm) ***
--*** ***
--*** 09/12/07 ML ***
--*** ***
--*** (c) 2007 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--*** ***
--***************************************************
--***************************************************
--*** Notes: Latency = 12 ***
--***************************************************
ENTITY fp_inv_core IS
GENERIC (synthesize : integer := 1);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
divisor : IN STD_LOGIC_VECTOR (36 DOWNTO 1);
quotient : OUT STD_LOGIC_VECTOR (36 DOWNTO 1)
);
END fp_inv_core;
ARCHITECTURE rtl OF fp_inv_core IS
signal zerovec : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal divisordel : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal invdivisor : STD_LOGIC_VECTOR (18 DOWNTO 1);
signal delinvdivisor : STD_LOGIC_VECTOR (18 DOWNTO 1);
signal scaleden : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal twonode : STD_LOGIC_VECTOR (37 DOWNTO 1);
signal nextguessff : STD_LOGIC_VECTOR (37 DOWNTO 1);
signal quotientnode : STD_LOGIC_VECTOR (36 DOWNTO 1);
component fp_div_est IS
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
divisor : IN STD_LOGIC_VECTOR (19 DOWNTO 1);
invdivisor : OUT STD_LOGIC_VECTOR (18 DOWNTO 1)
);
end component;
component fp_fxmul IS
GENERIC (
widthaa : positive := 18;
widthbb : positive := 18;
widthcc : positive := 36;
pipes : positive := 1;
accuracy : integer := 0; -- 0 = pruned multiplier, 1 = normal multiplier
device : integer := 0; -- 0 = "Stratix II", 1 = "Stratix III" (also 4)
synthesize : integer := 0
);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
dataaa : IN STD_LOGIC_VECTOR (widthaa DOWNTO 1);
databb : IN STD_LOGIC_VECTOR (widthbb DOWNTO 1);
result : OUT STD_LOGIC_VECTOR (widthcc DOWNTO 1)
);
end component;
component fp_del
GENERIC (
width : positive := 64;
pipes : positive := 2
);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
aa : IN STD_LOGIC_VECTOR (width DOWNTO 1);
cc : OUT STD_LOGIC_VECTOR (width DOWNTO 1)
);
end component;
BEGIN
gza: FOR k IN 1 TO 36 GENERATE
zerovec(k) <= '0';
END GENERATE;
invcore: fp_div_est
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
divisor=>divisor(36 DOWNTO 18),invdivisor=>invdivisor);
delinone: fp_del
GENERIC MAP (width=>36,pipes=>5)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
aa=>divisor,cc=>divisordel);
--**********************************
--*** ITERATION 0 - SCALE INPUTS ***
--**********************************
-- in level 5, out level 8
mulscaleone: fp_fxmul
GENERIC MAP (widthaa=>36,widthbb=>18,widthcc=>36,
pipes=>3,synthesize=>synthesize)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
dataaa=>divisordel,databb=>invdivisor,
result=>scaleden);
--********************
--*** ITERATION 1 ***
--********************
twonode <= '1' & zerovec(36 DOWNTO 1);
pita: PROCESS (sysclk,reset)
BEGIN
IF (reset = '1') THEN
FOR k IN 1 TO 37 LOOP
nextguessff(k) <= '0';
END LOOP;
ELSIF (rising_edge(sysclk)) THEN
IF (enable = '1') THEN
nextguessff <= twonode - ('0' & scaleden); -- level 9
END IF;
END IF;
END PROCESS;
deloneone: fp_del
GENERIC MAP (width=>18,pipes=>4)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
aa=>invdivisor,
cc=>delinvdivisor);
-- in level 9, out level 12
muloneone: fp_fxmul
GENERIC MAP (widthaa=>36,widthbb=>18,widthcc=>36,
pipes=>3,synthesize=>synthesize)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
dataaa=>nextguessff(36 DOWNTO 1),databb=>delinvdivisor,
result=>quotientnode);
quotient <= quotientnode(36 DOWNTO 1);
END rtl;
|
-- (C) 1992-2014 Altera Corporation. All rights reserved.
-- Your use of Altera Corporation's design tools, logic functions and other
-- software and tools, and its AMPP partner logic functions, and any output
-- files any of the foregoing (including device programming or simulation
-- files), and any associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License Subscription
-- Agreement, Altera MegaCore Function License Agreement, or other applicable
-- license agreement, including, without limitation, that your use is for the
-- sole purpose of programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the applicable
-- agreement for further details.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** SINGLE PRECISION INVERSE - CORE ***
--*** ***
--*** FP_INV_CORE.VHD ***
--*** ***
--*** Function: 36 bit Inverse ***
--*** (multiplicative iterative algorithm) ***
--*** ***
--*** 09/12/07 ML ***
--*** ***
--*** (c) 2007 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--*** ***
--***************************************************
--***************************************************
--*** Notes: Latency = 12 ***
--***************************************************
ENTITY fp_inv_core IS
GENERIC (synthesize : integer := 1);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
divisor : IN STD_LOGIC_VECTOR (36 DOWNTO 1);
quotient : OUT STD_LOGIC_VECTOR (36 DOWNTO 1)
);
END fp_inv_core;
ARCHITECTURE rtl OF fp_inv_core IS
signal zerovec : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal divisordel : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal invdivisor : STD_LOGIC_VECTOR (18 DOWNTO 1);
signal delinvdivisor : STD_LOGIC_VECTOR (18 DOWNTO 1);
signal scaleden : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal twonode : STD_LOGIC_VECTOR (37 DOWNTO 1);
signal nextguessff : STD_LOGIC_VECTOR (37 DOWNTO 1);
signal quotientnode : STD_LOGIC_VECTOR (36 DOWNTO 1);
component fp_div_est IS
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
divisor : IN STD_LOGIC_VECTOR (19 DOWNTO 1);
invdivisor : OUT STD_LOGIC_VECTOR (18 DOWNTO 1)
);
end component;
component fp_fxmul IS
GENERIC (
widthaa : positive := 18;
widthbb : positive := 18;
widthcc : positive := 36;
pipes : positive := 1;
accuracy : integer := 0; -- 0 = pruned multiplier, 1 = normal multiplier
device : integer := 0; -- 0 = "Stratix II", 1 = "Stratix III" (also 4)
synthesize : integer := 0
);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
dataaa : IN STD_LOGIC_VECTOR (widthaa DOWNTO 1);
databb : IN STD_LOGIC_VECTOR (widthbb DOWNTO 1);
result : OUT STD_LOGIC_VECTOR (widthcc DOWNTO 1)
);
end component;
component fp_del
GENERIC (
width : positive := 64;
pipes : positive := 2
);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
aa : IN STD_LOGIC_VECTOR (width DOWNTO 1);
cc : OUT STD_LOGIC_VECTOR (width DOWNTO 1)
);
end component;
BEGIN
gza: FOR k IN 1 TO 36 GENERATE
zerovec(k) <= '0';
END GENERATE;
invcore: fp_div_est
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
divisor=>divisor(36 DOWNTO 18),invdivisor=>invdivisor);
delinone: fp_del
GENERIC MAP (width=>36,pipes=>5)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
aa=>divisor,cc=>divisordel);
--**********************************
--*** ITERATION 0 - SCALE INPUTS ***
--**********************************
-- in level 5, out level 8
mulscaleone: fp_fxmul
GENERIC MAP (widthaa=>36,widthbb=>18,widthcc=>36,
pipes=>3,synthesize=>synthesize)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
dataaa=>divisordel,databb=>invdivisor,
result=>scaleden);
--********************
--*** ITERATION 1 ***
--********************
twonode <= '1' & zerovec(36 DOWNTO 1);
pita: PROCESS (sysclk,reset)
BEGIN
IF (reset = '1') THEN
FOR k IN 1 TO 37 LOOP
nextguessff(k) <= '0';
END LOOP;
ELSIF (rising_edge(sysclk)) THEN
IF (enable = '1') THEN
nextguessff <= twonode - ('0' & scaleden); -- level 9
END IF;
END IF;
END PROCESS;
deloneone: fp_del
GENERIC MAP (width=>18,pipes=>4)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
aa=>invdivisor,
cc=>delinvdivisor);
-- in level 9, out level 12
muloneone: fp_fxmul
GENERIC MAP (widthaa=>36,widthbb=>18,widthcc=>36,
pipes=>3,synthesize=>synthesize)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
dataaa=>nextguessff(36 DOWNTO 1),databb=>delinvdivisor,
result=>quotientnode);
quotient <= quotientnode(36 DOWNTO 1);
END rtl;
|
-- (C) 1992-2014 Altera Corporation. All rights reserved.
-- Your use of Altera Corporation's design tools, logic functions and other
-- software and tools, and its AMPP partner logic functions, and any output
-- files any of the foregoing (including device programming or simulation
-- files), and any associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License Subscription
-- Agreement, Altera MegaCore Function License Agreement, or other applicable
-- license agreement, including, without limitation, that your use is for the
-- sole purpose of programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the applicable
-- agreement for further details.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** SINGLE PRECISION INVERSE - CORE ***
--*** ***
--*** FP_INV_CORE.VHD ***
--*** ***
--*** Function: 36 bit Inverse ***
--*** (multiplicative iterative algorithm) ***
--*** ***
--*** 09/12/07 ML ***
--*** ***
--*** (c) 2007 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--*** ***
--***************************************************
--***************************************************
--*** Notes: Latency = 12 ***
--***************************************************
ENTITY fp_inv_core IS
GENERIC (synthesize : integer := 1);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
divisor : IN STD_LOGIC_VECTOR (36 DOWNTO 1);
quotient : OUT STD_LOGIC_VECTOR (36 DOWNTO 1)
);
END fp_inv_core;
ARCHITECTURE rtl OF fp_inv_core IS
signal zerovec : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal divisordel : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal invdivisor : STD_LOGIC_VECTOR (18 DOWNTO 1);
signal delinvdivisor : STD_LOGIC_VECTOR (18 DOWNTO 1);
signal scaleden : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal twonode : STD_LOGIC_VECTOR (37 DOWNTO 1);
signal nextguessff : STD_LOGIC_VECTOR (37 DOWNTO 1);
signal quotientnode : STD_LOGIC_VECTOR (36 DOWNTO 1);
component fp_div_est IS
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
divisor : IN STD_LOGIC_VECTOR (19 DOWNTO 1);
invdivisor : OUT STD_LOGIC_VECTOR (18 DOWNTO 1)
);
end component;
component fp_fxmul IS
GENERIC (
widthaa : positive := 18;
widthbb : positive := 18;
widthcc : positive := 36;
pipes : positive := 1;
accuracy : integer := 0; -- 0 = pruned multiplier, 1 = normal multiplier
device : integer := 0; -- 0 = "Stratix II", 1 = "Stratix III" (also 4)
synthesize : integer := 0
);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
dataaa : IN STD_LOGIC_VECTOR (widthaa DOWNTO 1);
databb : IN STD_LOGIC_VECTOR (widthbb DOWNTO 1);
result : OUT STD_LOGIC_VECTOR (widthcc DOWNTO 1)
);
end component;
component fp_del
GENERIC (
width : positive := 64;
pipes : positive := 2
);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
aa : IN STD_LOGIC_VECTOR (width DOWNTO 1);
cc : OUT STD_LOGIC_VECTOR (width DOWNTO 1)
);
end component;
BEGIN
gza: FOR k IN 1 TO 36 GENERATE
zerovec(k) <= '0';
END GENERATE;
invcore: fp_div_est
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
divisor=>divisor(36 DOWNTO 18),invdivisor=>invdivisor);
delinone: fp_del
GENERIC MAP (width=>36,pipes=>5)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
aa=>divisor,cc=>divisordel);
--**********************************
--*** ITERATION 0 - SCALE INPUTS ***
--**********************************
-- in level 5, out level 8
mulscaleone: fp_fxmul
GENERIC MAP (widthaa=>36,widthbb=>18,widthcc=>36,
pipes=>3,synthesize=>synthesize)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
dataaa=>divisordel,databb=>invdivisor,
result=>scaleden);
--********************
--*** ITERATION 1 ***
--********************
twonode <= '1' & zerovec(36 DOWNTO 1);
pita: PROCESS (sysclk,reset)
BEGIN
IF (reset = '1') THEN
FOR k IN 1 TO 37 LOOP
nextguessff(k) <= '0';
END LOOP;
ELSIF (rising_edge(sysclk)) THEN
IF (enable = '1') THEN
nextguessff <= twonode - ('0' & scaleden); -- level 9
END IF;
END IF;
END PROCESS;
deloneone: fp_del
GENERIC MAP (width=>18,pipes=>4)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
aa=>invdivisor,
cc=>delinvdivisor);
-- in level 9, out level 12
muloneone: fp_fxmul
GENERIC MAP (widthaa=>36,widthbb=>18,widthcc=>36,
pipes=>3,synthesize=>synthesize)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
dataaa=>nextguessff(36 DOWNTO 1),databb=>delinvdivisor,
result=>quotientnode);
quotient <= quotientnode(36 DOWNTO 1);
END rtl;
|
-- (C) 1992-2014 Altera Corporation. All rights reserved.
-- Your use of Altera Corporation's design tools, logic functions and other
-- software and tools, and its AMPP partner logic functions, and any output
-- files any of the foregoing (including device programming or simulation
-- files), and any associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License Subscription
-- Agreement, Altera MegaCore Function License Agreement, or other applicable
-- license agreement, including, without limitation, that your use is for the
-- sole purpose of programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the applicable
-- agreement for further details.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** SINGLE PRECISION INVERSE - CORE ***
--*** ***
--*** FP_INV_CORE.VHD ***
--*** ***
--*** Function: 36 bit Inverse ***
--*** (multiplicative iterative algorithm) ***
--*** ***
--*** 09/12/07 ML ***
--*** ***
--*** (c) 2007 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--*** ***
--***************************************************
--***************************************************
--*** Notes: Latency = 12 ***
--***************************************************
ENTITY fp_inv_core IS
GENERIC (synthesize : integer := 1);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
divisor : IN STD_LOGIC_VECTOR (36 DOWNTO 1);
quotient : OUT STD_LOGIC_VECTOR (36 DOWNTO 1)
);
END fp_inv_core;
ARCHITECTURE rtl OF fp_inv_core IS
signal zerovec : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal divisordel : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal invdivisor : STD_LOGIC_VECTOR (18 DOWNTO 1);
signal delinvdivisor : STD_LOGIC_VECTOR (18 DOWNTO 1);
signal scaleden : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal twonode : STD_LOGIC_VECTOR (37 DOWNTO 1);
signal nextguessff : STD_LOGIC_VECTOR (37 DOWNTO 1);
signal quotientnode : STD_LOGIC_VECTOR (36 DOWNTO 1);
component fp_div_est IS
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
divisor : IN STD_LOGIC_VECTOR (19 DOWNTO 1);
invdivisor : OUT STD_LOGIC_VECTOR (18 DOWNTO 1)
);
end component;
component fp_fxmul IS
GENERIC (
widthaa : positive := 18;
widthbb : positive := 18;
widthcc : positive := 36;
pipes : positive := 1;
accuracy : integer := 0; -- 0 = pruned multiplier, 1 = normal multiplier
device : integer := 0; -- 0 = "Stratix II", 1 = "Stratix III" (also 4)
synthesize : integer := 0
);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
dataaa : IN STD_LOGIC_VECTOR (widthaa DOWNTO 1);
databb : IN STD_LOGIC_VECTOR (widthbb DOWNTO 1);
result : OUT STD_LOGIC_VECTOR (widthcc DOWNTO 1)
);
end component;
component fp_del
GENERIC (
width : positive := 64;
pipes : positive := 2
);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
aa : IN STD_LOGIC_VECTOR (width DOWNTO 1);
cc : OUT STD_LOGIC_VECTOR (width DOWNTO 1)
);
end component;
BEGIN
gza: FOR k IN 1 TO 36 GENERATE
zerovec(k) <= '0';
END GENERATE;
invcore: fp_div_est
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
divisor=>divisor(36 DOWNTO 18),invdivisor=>invdivisor);
delinone: fp_del
GENERIC MAP (width=>36,pipes=>5)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
aa=>divisor,cc=>divisordel);
--**********************************
--*** ITERATION 0 - SCALE INPUTS ***
--**********************************
-- in level 5, out level 8
mulscaleone: fp_fxmul
GENERIC MAP (widthaa=>36,widthbb=>18,widthcc=>36,
pipes=>3,synthesize=>synthesize)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
dataaa=>divisordel,databb=>invdivisor,
result=>scaleden);
--********************
--*** ITERATION 1 ***
--********************
twonode <= '1' & zerovec(36 DOWNTO 1);
pita: PROCESS (sysclk,reset)
BEGIN
IF (reset = '1') THEN
FOR k IN 1 TO 37 LOOP
nextguessff(k) <= '0';
END LOOP;
ELSIF (rising_edge(sysclk)) THEN
IF (enable = '1') THEN
nextguessff <= twonode - ('0' & scaleden); -- level 9
END IF;
END IF;
END PROCESS;
deloneone: fp_del
GENERIC MAP (width=>18,pipes=>4)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
aa=>invdivisor,
cc=>delinvdivisor);
-- in level 9, out level 12
muloneone: fp_fxmul
GENERIC MAP (widthaa=>36,widthbb=>18,widthcc=>36,
pipes=>3,synthesize=>synthesize)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
dataaa=>nextguessff(36 DOWNTO 1),databb=>delinvdivisor,
result=>quotientnode);
quotient <= quotientnode(36 DOWNTO 1);
END rtl;
|
-- (C) 1992-2014 Altera Corporation. All rights reserved.
-- Your use of Altera Corporation's design tools, logic functions and other
-- software and tools, and its AMPP partner logic functions, and any output
-- files any of the foregoing (including device programming or simulation
-- files), and any associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License Subscription
-- Agreement, Altera MegaCore Function License Agreement, or other applicable
-- license agreement, including, without limitation, that your use is for the
-- sole purpose of programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the applicable
-- agreement for further details.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** SINGLE PRECISION INVERSE - CORE ***
--*** ***
--*** FP_INV_CORE.VHD ***
--*** ***
--*** Function: 36 bit Inverse ***
--*** (multiplicative iterative algorithm) ***
--*** ***
--*** 09/12/07 ML ***
--*** ***
--*** (c) 2007 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--*** ***
--***************************************************
--***************************************************
--*** Notes: Latency = 12 ***
--***************************************************
ENTITY fp_inv_core IS
GENERIC (synthesize : integer := 1);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
divisor : IN STD_LOGIC_VECTOR (36 DOWNTO 1);
quotient : OUT STD_LOGIC_VECTOR (36 DOWNTO 1)
);
END fp_inv_core;
ARCHITECTURE rtl OF fp_inv_core IS
signal zerovec : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal divisordel : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal invdivisor : STD_LOGIC_VECTOR (18 DOWNTO 1);
signal delinvdivisor : STD_LOGIC_VECTOR (18 DOWNTO 1);
signal scaleden : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal twonode : STD_LOGIC_VECTOR (37 DOWNTO 1);
signal nextguessff : STD_LOGIC_VECTOR (37 DOWNTO 1);
signal quotientnode : STD_LOGIC_VECTOR (36 DOWNTO 1);
component fp_div_est IS
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
divisor : IN STD_LOGIC_VECTOR (19 DOWNTO 1);
invdivisor : OUT STD_LOGIC_VECTOR (18 DOWNTO 1)
);
end component;
component fp_fxmul IS
GENERIC (
widthaa : positive := 18;
widthbb : positive := 18;
widthcc : positive := 36;
pipes : positive := 1;
accuracy : integer := 0; -- 0 = pruned multiplier, 1 = normal multiplier
device : integer := 0; -- 0 = "Stratix II", 1 = "Stratix III" (also 4)
synthesize : integer := 0
);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
dataaa : IN STD_LOGIC_VECTOR (widthaa DOWNTO 1);
databb : IN STD_LOGIC_VECTOR (widthbb DOWNTO 1);
result : OUT STD_LOGIC_VECTOR (widthcc DOWNTO 1)
);
end component;
component fp_del
GENERIC (
width : positive := 64;
pipes : positive := 2
);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
aa : IN STD_LOGIC_VECTOR (width DOWNTO 1);
cc : OUT STD_LOGIC_VECTOR (width DOWNTO 1)
);
end component;
BEGIN
gza: FOR k IN 1 TO 36 GENERATE
zerovec(k) <= '0';
END GENERATE;
invcore: fp_div_est
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
divisor=>divisor(36 DOWNTO 18),invdivisor=>invdivisor);
delinone: fp_del
GENERIC MAP (width=>36,pipes=>5)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
aa=>divisor,cc=>divisordel);
--**********************************
--*** ITERATION 0 - SCALE INPUTS ***
--**********************************
-- in level 5, out level 8
mulscaleone: fp_fxmul
GENERIC MAP (widthaa=>36,widthbb=>18,widthcc=>36,
pipes=>3,synthesize=>synthesize)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
dataaa=>divisordel,databb=>invdivisor,
result=>scaleden);
--********************
--*** ITERATION 1 ***
--********************
twonode <= '1' & zerovec(36 DOWNTO 1);
pita: PROCESS (sysclk,reset)
BEGIN
IF (reset = '1') THEN
FOR k IN 1 TO 37 LOOP
nextguessff(k) <= '0';
END LOOP;
ELSIF (rising_edge(sysclk)) THEN
IF (enable = '1') THEN
nextguessff <= twonode - ('0' & scaleden); -- level 9
END IF;
END IF;
END PROCESS;
deloneone: fp_del
GENERIC MAP (width=>18,pipes=>4)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
aa=>invdivisor,
cc=>delinvdivisor);
-- in level 9, out level 12
muloneone: fp_fxmul
GENERIC MAP (widthaa=>36,widthbb=>18,widthcc=>36,
pipes=>3,synthesize=>synthesize)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
dataaa=>nextguessff(36 DOWNTO 1),databb=>delinvdivisor,
result=>quotientnode);
quotient <= quotientnode(36 DOWNTO 1);
END rtl;
|
-- (C) 1992-2014 Altera Corporation. All rights reserved.
-- Your use of Altera Corporation's design tools, logic functions and other
-- software and tools, and its AMPP partner logic functions, and any output
-- files any of the foregoing (including device programming or simulation
-- files), and any associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License Subscription
-- Agreement, Altera MegaCore Function License Agreement, or other applicable
-- license agreement, including, without limitation, that your use is for the
-- sole purpose of programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the applicable
-- agreement for further details.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** SINGLE PRECISION INVERSE - CORE ***
--*** ***
--*** FP_INV_CORE.VHD ***
--*** ***
--*** Function: 36 bit Inverse ***
--*** (multiplicative iterative algorithm) ***
--*** ***
--*** 09/12/07 ML ***
--*** ***
--*** (c) 2007 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--*** ***
--***************************************************
--***************************************************
--*** Notes: Latency = 12 ***
--***************************************************
ENTITY fp_inv_core IS
GENERIC (synthesize : integer := 1);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
divisor : IN STD_LOGIC_VECTOR (36 DOWNTO 1);
quotient : OUT STD_LOGIC_VECTOR (36 DOWNTO 1)
);
END fp_inv_core;
ARCHITECTURE rtl OF fp_inv_core IS
signal zerovec : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal divisordel : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal invdivisor : STD_LOGIC_VECTOR (18 DOWNTO 1);
signal delinvdivisor : STD_LOGIC_VECTOR (18 DOWNTO 1);
signal scaleden : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal twonode : STD_LOGIC_VECTOR (37 DOWNTO 1);
signal nextguessff : STD_LOGIC_VECTOR (37 DOWNTO 1);
signal quotientnode : STD_LOGIC_VECTOR (36 DOWNTO 1);
component fp_div_est IS
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
divisor : IN STD_LOGIC_VECTOR (19 DOWNTO 1);
invdivisor : OUT STD_LOGIC_VECTOR (18 DOWNTO 1)
);
end component;
component fp_fxmul IS
GENERIC (
widthaa : positive := 18;
widthbb : positive := 18;
widthcc : positive := 36;
pipes : positive := 1;
accuracy : integer := 0; -- 0 = pruned multiplier, 1 = normal multiplier
device : integer := 0; -- 0 = "Stratix II", 1 = "Stratix III" (also 4)
synthesize : integer := 0
);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
dataaa : IN STD_LOGIC_VECTOR (widthaa DOWNTO 1);
databb : IN STD_LOGIC_VECTOR (widthbb DOWNTO 1);
result : OUT STD_LOGIC_VECTOR (widthcc DOWNTO 1)
);
end component;
component fp_del
GENERIC (
width : positive := 64;
pipes : positive := 2
);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
aa : IN STD_LOGIC_VECTOR (width DOWNTO 1);
cc : OUT STD_LOGIC_VECTOR (width DOWNTO 1)
);
end component;
BEGIN
gza: FOR k IN 1 TO 36 GENERATE
zerovec(k) <= '0';
END GENERATE;
invcore: fp_div_est
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
divisor=>divisor(36 DOWNTO 18),invdivisor=>invdivisor);
delinone: fp_del
GENERIC MAP (width=>36,pipes=>5)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
aa=>divisor,cc=>divisordel);
--**********************************
--*** ITERATION 0 - SCALE INPUTS ***
--**********************************
-- in level 5, out level 8
mulscaleone: fp_fxmul
GENERIC MAP (widthaa=>36,widthbb=>18,widthcc=>36,
pipes=>3,synthesize=>synthesize)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
dataaa=>divisordel,databb=>invdivisor,
result=>scaleden);
--********************
--*** ITERATION 1 ***
--********************
twonode <= '1' & zerovec(36 DOWNTO 1);
pita: PROCESS (sysclk,reset)
BEGIN
IF (reset = '1') THEN
FOR k IN 1 TO 37 LOOP
nextguessff(k) <= '0';
END LOOP;
ELSIF (rising_edge(sysclk)) THEN
IF (enable = '1') THEN
nextguessff <= twonode - ('0' & scaleden); -- level 9
END IF;
END IF;
END PROCESS;
deloneone: fp_del
GENERIC MAP (width=>18,pipes=>4)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
aa=>invdivisor,
cc=>delinvdivisor);
-- in level 9, out level 12
muloneone: fp_fxmul
GENERIC MAP (widthaa=>36,widthbb=>18,widthcc=>36,
pipes=>3,synthesize=>synthesize)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
dataaa=>nextguessff(36 DOWNTO 1),databb=>delinvdivisor,
result=>quotientnode);
quotient <= quotientnode(36 DOWNTO 1);
END rtl;
|
-- (C) 1992-2014 Altera Corporation. All rights reserved.
-- Your use of Altera Corporation's design tools, logic functions and other
-- software and tools, and its AMPP partner logic functions, and any output
-- files any of the foregoing (including device programming or simulation
-- files), and any associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License Subscription
-- Agreement, Altera MegaCore Function License Agreement, or other applicable
-- license agreement, including, without limitation, that your use is for the
-- sole purpose of programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the applicable
-- agreement for further details.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** SINGLE PRECISION INVERSE - CORE ***
--*** ***
--*** FP_INV_CORE.VHD ***
--*** ***
--*** Function: 36 bit Inverse ***
--*** (multiplicative iterative algorithm) ***
--*** ***
--*** 09/12/07 ML ***
--*** ***
--*** (c) 2007 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--*** ***
--***************************************************
--***************************************************
--*** Notes: Latency = 12 ***
--***************************************************
ENTITY fp_inv_core IS
GENERIC (synthesize : integer := 1);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
divisor : IN STD_LOGIC_VECTOR (36 DOWNTO 1);
quotient : OUT STD_LOGIC_VECTOR (36 DOWNTO 1)
);
END fp_inv_core;
ARCHITECTURE rtl OF fp_inv_core IS
signal zerovec : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal divisordel : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal invdivisor : STD_LOGIC_VECTOR (18 DOWNTO 1);
signal delinvdivisor : STD_LOGIC_VECTOR (18 DOWNTO 1);
signal scaleden : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal twonode : STD_LOGIC_VECTOR (37 DOWNTO 1);
signal nextguessff : STD_LOGIC_VECTOR (37 DOWNTO 1);
signal quotientnode : STD_LOGIC_VECTOR (36 DOWNTO 1);
component fp_div_est IS
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
divisor : IN STD_LOGIC_VECTOR (19 DOWNTO 1);
invdivisor : OUT STD_LOGIC_VECTOR (18 DOWNTO 1)
);
end component;
component fp_fxmul IS
GENERIC (
widthaa : positive := 18;
widthbb : positive := 18;
widthcc : positive := 36;
pipes : positive := 1;
accuracy : integer := 0; -- 0 = pruned multiplier, 1 = normal multiplier
device : integer := 0; -- 0 = "Stratix II", 1 = "Stratix III" (also 4)
synthesize : integer := 0
);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
dataaa : IN STD_LOGIC_VECTOR (widthaa DOWNTO 1);
databb : IN STD_LOGIC_VECTOR (widthbb DOWNTO 1);
result : OUT STD_LOGIC_VECTOR (widthcc DOWNTO 1)
);
end component;
component fp_del
GENERIC (
width : positive := 64;
pipes : positive := 2
);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
aa : IN STD_LOGIC_VECTOR (width DOWNTO 1);
cc : OUT STD_LOGIC_VECTOR (width DOWNTO 1)
);
end component;
BEGIN
gza: FOR k IN 1 TO 36 GENERATE
zerovec(k) <= '0';
END GENERATE;
invcore: fp_div_est
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
divisor=>divisor(36 DOWNTO 18),invdivisor=>invdivisor);
delinone: fp_del
GENERIC MAP (width=>36,pipes=>5)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
aa=>divisor,cc=>divisordel);
--**********************************
--*** ITERATION 0 - SCALE INPUTS ***
--**********************************
-- in level 5, out level 8
mulscaleone: fp_fxmul
GENERIC MAP (widthaa=>36,widthbb=>18,widthcc=>36,
pipes=>3,synthesize=>synthesize)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
dataaa=>divisordel,databb=>invdivisor,
result=>scaleden);
--********************
--*** ITERATION 1 ***
--********************
twonode <= '1' & zerovec(36 DOWNTO 1);
pita: PROCESS (sysclk,reset)
BEGIN
IF (reset = '1') THEN
FOR k IN 1 TO 37 LOOP
nextguessff(k) <= '0';
END LOOP;
ELSIF (rising_edge(sysclk)) THEN
IF (enable = '1') THEN
nextguessff <= twonode - ('0' & scaleden); -- level 9
END IF;
END IF;
END PROCESS;
deloneone: fp_del
GENERIC MAP (width=>18,pipes=>4)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
aa=>invdivisor,
cc=>delinvdivisor);
-- in level 9, out level 12
muloneone: fp_fxmul
GENERIC MAP (widthaa=>36,widthbb=>18,widthcc=>36,
pipes=>3,synthesize=>synthesize)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
dataaa=>nextguessff(36 DOWNTO 1),databb=>delinvdivisor,
result=>quotientnode);
quotient <= quotientnode(36 DOWNTO 1);
END rtl;
|
-- (C) 1992-2014 Altera Corporation. All rights reserved.
-- Your use of Altera Corporation's design tools, logic functions and other
-- software and tools, and its AMPP partner logic functions, and any output
-- files any of the foregoing (including device programming or simulation
-- files), and any associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License Subscription
-- Agreement, Altera MegaCore Function License Agreement, or other applicable
-- license agreement, including, without limitation, that your use is for the
-- sole purpose of programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the applicable
-- agreement for further details.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** SINGLE PRECISION INVERSE - CORE ***
--*** ***
--*** FP_INV_CORE.VHD ***
--*** ***
--*** Function: 36 bit Inverse ***
--*** (multiplicative iterative algorithm) ***
--*** ***
--*** 09/12/07 ML ***
--*** ***
--*** (c) 2007 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--*** ***
--***************************************************
--***************************************************
--*** Notes: Latency = 12 ***
--***************************************************
ENTITY fp_inv_core IS
GENERIC (synthesize : integer := 1);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
divisor : IN STD_LOGIC_VECTOR (36 DOWNTO 1);
quotient : OUT STD_LOGIC_VECTOR (36 DOWNTO 1)
);
END fp_inv_core;
ARCHITECTURE rtl OF fp_inv_core IS
signal zerovec : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal divisordel : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal invdivisor : STD_LOGIC_VECTOR (18 DOWNTO 1);
signal delinvdivisor : STD_LOGIC_VECTOR (18 DOWNTO 1);
signal scaleden : STD_LOGIC_VECTOR (36 DOWNTO 1);
signal twonode : STD_LOGIC_VECTOR (37 DOWNTO 1);
signal nextguessff : STD_LOGIC_VECTOR (37 DOWNTO 1);
signal quotientnode : STD_LOGIC_VECTOR (36 DOWNTO 1);
component fp_div_est IS
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
divisor : IN STD_LOGIC_VECTOR (19 DOWNTO 1);
invdivisor : OUT STD_LOGIC_VECTOR (18 DOWNTO 1)
);
end component;
component fp_fxmul IS
GENERIC (
widthaa : positive := 18;
widthbb : positive := 18;
widthcc : positive := 36;
pipes : positive := 1;
accuracy : integer := 0; -- 0 = pruned multiplier, 1 = normal multiplier
device : integer := 0; -- 0 = "Stratix II", 1 = "Stratix III" (also 4)
synthesize : integer := 0
);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
dataaa : IN STD_LOGIC_VECTOR (widthaa DOWNTO 1);
databb : IN STD_LOGIC_VECTOR (widthbb DOWNTO 1);
result : OUT STD_LOGIC_VECTOR (widthcc DOWNTO 1)
);
end component;
component fp_del
GENERIC (
width : positive := 64;
pipes : positive := 2
);
PORT (
sysclk : IN STD_LOGIC;
reset : IN STD_LOGIC;
enable : IN STD_LOGIC;
aa : IN STD_LOGIC_VECTOR (width DOWNTO 1);
cc : OUT STD_LOGIC_VECTOR (width DOWNTO 1)
);
end component;
BEGIN
gza: FOR k IN 1 TO 36 GENERATE
zerovec(k) <= '0';
END GENERATE;
invcore: fp_div_est
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
divisor=>divisor(36 DOWNTO 18),invdivisor=>invdivisor);
delinone: fp_del
GENERIC MAP (width=>36,pipes=>5)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
aa=>divisor,cc=>divisordel);
--**********************************
--*** ITERATION 0 - SCALE INPUTS ***
--**********************************
-- in level 5, out level 8
mulscaleone: fp_fxmul
GENERIC MAP (widthaa=>36,widthbb=>18,widthcc=>36,
pipes=>3,synthesize=>synthesize)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
dataaa=>divisordel,databb=>invdivisor,
result=>scaleden);
--********************
--*** ITERATION 1 ***
--********************
twonode <= '1' & zerovec(36 DOWNTO 1);
pita: PROCESS (sysclk,reset)
BEGIN
IF (reset = '1') THEN
FOR k IN 1 TO 37 LOOP
nextguessff(k) <= '0';
END LOOP;
ELSIF (rising_edge(sysclk)) THEN
IF (enable = '1') THEN
nextguessff <= twonode - ('0' & scaleden); -- level 9
END IF;
END IF;
END PROCESS;
deloneone: fp_del
GENERIC MAP (width=>18,pipes=>4)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
aa=>invdivisor,
cc=>delinvdivisor);
-- in level 9, out level 12
muloneone: fp_fxmul
GENERIC MAP (widthaa=>36,widthbb=>18,widthcc=>36,
pipes=>3,synthesize=>synthesize)
PORT MAP (sysclk=>sysclk,reset=>reset,enable=>enable,
dataaa=>nextguessff(36 DOWNTO 1),databb=>delinvdivisor,
result=>quotientnode);
quotient <= quotientnode(36 DOWNTO 1);
END rtl;
|
-------------------------------------------------------------------------------
-- Title : A sample GPIO port (wbgen2 example)
-- Project :
-------------------------------------------------------------------------------
-- File : gpio_port.vhdl
-- Author : T.W.
-- Company :
-- Created : 2010-02-22
-- Last update: 2010-03-15
-- Platform :
-- Standard : VHDL'87
-------------------------------------------------------------------------------
-- Description:
-------------------------------------------------------------------------------
-- Copyright (c) 2010 T.W.
-------------------------------------------------------------------------------
-- Revisions :
-- Date Version Author Description
-- 2010-02-22 1.0 slayer Created
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library work;
entity gpio_port is
port (
rst_n_i : in std_logic;
wb_clk_i : in std_logic;
wb_addr_i : in std_logic_vector(2 downto 0);
wb_data_i : in std_logic_vector(31 downto 0);
wb_data_o : out std_logic_vector(31 downto 0);
wb_cyc_i : in std_logic;
wb_sel_i : in std_logic_vector(3 downto 0);
wb_stb_i : in std_logic;
wb_we_i : in std_logic;
wb_ack_o : out std_logic;
-- our port :)
gpio_pins_b : inout std_logic_vector(31 downto 0)
);
end gpio_port;
architecture syn of gpio_port is
component wb_slave_gpio_port
port (
rst_n_i : in std_logic;
wb_clk_i : in std_logic;
wb_addr_i : in std_logic_vector(2 downto 0);
wb_data_i : in std_logic_vector(31 downto 0);
wb_data_o : out std_logic_vector(31 downto 0);
wb_cyc_i : in std_logic;
wb_sel_i : in std_logic_vector(3 downto 0);
wb_stb_i : in std_logic;
wb_we_i : in std_logic;
wb_ack_o : out std_logic;
gpio_ddr_o : out std_logic_vector(31 downto 0);
gpio_psr_i : in std_logic_vector(31 downto 0);
gpio_pdr_o : out std_logic_vector(31 downto 0);
gpio_pdr_wr_o : out std_logic;
gpio_sopr_o : out std_logic_vector(31 downto 0);
gpio_sopr_wr_o : out std_logic;
gpio_copr_o : out std_logic_vector(31 downto 0);
gpio_copr_wr_o : out std_logic);
end component;
signal gpio_ddr : std_logic_vector(31 downto 0);
signal gpio_psr : std_logic_vector(31 downto 0);
signal gpio_pdr : std_logic_vector(31 downto 0);
signal gpio_pdr_wr : std_logic;
signal gpio_sopr : std_logic_vector(31 downto 0);
signal gpio_sopr_wr : std_logic;
signal gpio_copr : std_logic_vector(31 downto 0);
signal gpio_copr_wr : std_logic;
-- regsiter containing current output state
signal gpio_reg : std_logic_vector(31 downto 0);
-- registers for synchronization of input pins
signal gpio_pins_sync1 : std_logic_vector(31 downto 0);
signal gpio_pins_sync0 : std_logic_vector(31 downto 0);
begin -- syn
wb_slave : wb_slave_gpio_port
port map (
rst_n_i => rst_n_i,
wb_clk_i => wb_clk_i,
wb_addr_i => wb_addr_i,
wb_data_i => wb_data_i,
wb_data_o => wb_data_o,
wb_cyc_i => wb_cyc_i,
wb_sel_i => wb_sel_i,
wb_stb_i => wb_stb_i,
wb_we_i => wb_we_i,
wb_ack_o => wb_ack_o,
gpio_ddr_o => gpio_ddr,
gpio_psr_i => gpio_pins_sync1,
gpio_pdr_o => gpio_pdr,
gpio_pdr_wr_o => gpio_pdr_wr,
gpio_sopr_o => gpio_sopr,
gpio_sopr_wr_o => gpio_sopr_wr,
gpio_copr_o => gpio_copr,
gpio_copr_wr_o => gpio_copr_wr);
process (wb_clk_i, rst_n_i)
begin -- process
if(rst_n_i = '0') then
gpio_reg <= (others => '0');
elsif rising_edge(wb_clk_i) then
if(gpio_pdr_wr = '1') then -- write operation to "PDR" register -
-- set the new values of GPIO outputs
gpio_reg <= gpio_pdr;
end if;
if(gpio_sopr_wr = '1') then -- write to "SOPR" reg - set ones
for i in 0 to 31 loop
if(gpio_sopr(i) = '1') then
gpio_reg(i) <= '1';
end if;
end loop;
end if;
if(gpio_copr_wr = '1') then -- write to "COPR" reg - set zeros
for i in 0 to 31 loop
if(gpio_copr(i) = '1') then
gpio_reg(i) <= '0';
end if;
end loop;
end if;
end if;
end process;
-- synchronizing process for input pins
synchronize_input_pins : process (wb_clk_i, rst_n_i)
begin -- process
if(rst_n_i = '0') then
gpio_pins_sync0 <= (others => '0');
gpio_pins_sync1 <= (others => '0');
elsif rising_edge(wb_clk_i) then
gpio_pins_sync0 <= gpio_pins_b;
gpio_pins_sync1 <= gpio_pins_sync0;
end if;
end process;
-- generate the tristate buffers for I/O pins
gen_tristates : for i in 0 to 31 generate
gpio_pins_b(i) <= gpio_reg(i) when gpio_ddr(i) = '1' else 'Z';
end generate gen_tristates;
end syn;
|
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity ProtocoloRS232_v2 is
Port ( Tx_salida : out STD_LOGIC;
Rx_entrada : in STD_LOGIC;
CLK : in STD_LOGIC;
CampanaTx : in STD_LOGIC;
CampanaRx : out STD_LOGIC;
Dato_Tx : in STD_LOGIC_VECTOR (7 downto 0);
Dato_Rx : out STD_LOGIC_VECTOR (7 downto 0));
end ProtocoloRS232_v2;
architecture Behavioral of ProtocoloRS232_v2 is
COMPONENT Rx
PORT(
Dato_entrada : IN std_logic;
CLK : IN std_logic;
Dato_salida : OUT std_logic_vector(7 downto 0);
Campana : OUT std_logic
);
END COMPONENT;
COMPONENT Tx
PORT(
Campana : IN std_logic;
CLK : IN std_logic;
Dato_entrada : IN std_logic_vector(7 downto 0);
Dato_salida : OUT std_logic
);
END COMPONENT;
begin
Inst_Rx: Rx PORT MAP(
Dato_entrada => Rx_entrada,
CLK => CLK,
Dato_salida => Dato_Rx,
Campana => CampanaRx
);
Inst_Tx: Tx PORT MAP(
Campana => CampanaTx,
CLK => CLK,
Dato_entrada => Dato_Tx,
Dato_salida => Tx_salida
);
end Behavioral;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc562.vhd,v 1.3 2001-10-29 02:12:45 paw Exp $
-- $Revision: 1.3 $
--
-- ---------------------------------------------------------------------
-- **************************** --
-- Ported to VHDL 93 by port93.pl - Tue Nov 5 16:37:31 1996 --
-- **************************** --
-- **************************** --
-- Reversed to VHDL 87 by reverse87.pl - Tue Nov 5 11:25:28 1996 --
-- **************************** --
-- **************************** --
-- Ported to VHDL 93 by port93.pl - Mon Nov 4 17:36:04 1996 --
-- **************************** --
ENTITY c03s04b01x00p01n01i00562ent IS
END c03s04b01x00p01n01i00562ent;
ARCHITECTURE c03s04b01x00p01n01i00562arch OF c03s04b01x00p01n01i00562ent IS
type integer_cons_vector is array (15 downto 0) of integer;
type integer_cons_vector_file is file of integer_cons_vector;
constant C19 : integer_cons_vector := (others => 3);
BEGIN
TESTING: PROCESS
file filein : integer_cons_vector_file open write_mode is "iofile.30";
BEGIN
for i in 1 to 100 loop
write(filein, C19);
end loop;
assert FALSE
report "***PASSED TEST: c03s04b01x00p01n01i00562 - The output file will be verified by test s010242.vhd."
severity NOTE;
wait;
END PROCESS TESTING;
END c03s04b01x00p01n01i00562arch;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc562.vhd,v 1.3 2001-10-29 02:12:45 paw Exp $
-- $Revision: 1.3 $
--
-- ---------------------------------------------------------------------
-- **************************** --
-- Ported to VHDL 93 by port93.pl - Tue Nov 5 16:37:31 1996 --
-- **************************** --
-- **************************** --
-- Reversed to VHDL 87 by reverse87.pl - Tue Nov 5 11:25:28 1996 --
-- **************************** --
-- **************************** --
-- Ported to VHDL 93 by port93.pl - Mon Nov 4 17:36:04 1996 --
-- **************************** --
ENTITY c03s04b01x00p01n01i00562ent IS
END c03s04b01x00p01n01i00562ent;
ARCHITECTURE c03s04b01x00p01n01i00562arch OF c03s04b01x00p01n01i00562ent IS
type integer_cons_vector is array (15 downto 0) of integer;
type integer_cons_vector_file is file of integer_cons_vector;
constant C19 : integer_cons_vector := (others => 3);
BEGIN
TESTING: PROCESS
file filein : integer_cons_vector_file open write_mode is "iofile.30";
BEGIN
for i in 1 to 100 loop
write(filein, C19);
end loop;
assert FALSE
report "***PASSED TEST: c03s04b01x00p01n01i00562 - The output file will be verified by test s010242.vhd."
severity NOTE;
wait;
END PROCESS TESTING;
END c03s04b01x00p01n01i00562arch;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc562.vhd,v 1.3 2001-10-29 02:12:45 paw Exp $
-- $Revision: 1.3 $
--
-- ---------------------------------------------------------------------
-- **************************** --
-- Ported to VHDL 93 by port93.pl - Tue Nov 5 16:37:31 1996 --
-- **************************** --
-- **************************** --
-- Reversed to VHDL 87 by reverse87.pl - Tue Nov 5 11:25:28 1996 --
-- **************************** --
-- **************************** --
-- Ported to VHDL 93 by port93.pl - Mon Nov 4 17:36:04 1996 --
-- **************************** --
ENTITY c03s04b01x00p01n01i00562ent IS
END c03s04b01x00p01n01i00562ent;
ARCHITECTURE c03s04b01x00p01n01i00562arch OF c03s04b01x00p01n01i00562ent IS
type integer_cons_vector is array (15 downto 0) of integer;
type integer_cons_vector_file is file of integer_cons_vector;
constant C19 : integer_cons_vector := (others => 3);
BEGIN
TESTING: PROCESS
file filein : integer_cons_vector_file open write_mode is "iofile.30";
BEGIN
for i in 1 to 100 loop
write(filein, C19);
end loop;
assert FALSE
report "***PASSED TEST: c03s04b01x00p01n01i00562 - The output file will be verified by test s010242.vhd."
severity NOTE;
wait;
END PROCESS TESTING;
END c03s04b01x00p01n01i00562arch;
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2013, Aeroflex Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Entity: rgmii
-- File: rgmii.vhd
-- Author: Fredrik Ringhage - Aeroflex Gaisler
-- Description: GMII to RGMII interface
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library gaisler;
use gaisler.net.all;
library grlib;
use grlib.amba.all;
use grlib.stdlib.all;
use grlib.devices.all;
library techmap;
use techmap.gencomp.all;
use techmap.allclkgen.all;
library eth;
use eth.grethpkg.all;
entity rgmii is
generic (
pindex : integer := 0;
paddr : integer := 0;
pmask : integer := 16#fff#;
tech : integer := 0;
gmii : integer := 0;
extclk : integer := 0;
clkdiv2 : integer := 0;
debugmem : integer := 0
);
port (
rstn : in std_ulogic;
clk_tx_g : in std_ulogic;
gmiii : out eth_in_type;
gmiio : in eth_out_type;
rgmiii : in eth_in_type;
rgmiio : out eth_out_type;
-- APB Status bus
apb_clk : in std_logic;
apb_rstn : in std_logic;
apbi : in apb_slv_in_type;
apbo : out apb_slv_out_type
);
end ;
architecture rtl of rgmii is
constant pconfig : apb_config_type := (
0 => ahb_device_reg ( VENDOR_GAISLER, GAISLER_RGMII, 0, 0, 0),
1 => apb_iobar(paddr, pmask));
attribute keep : boolean;
attribute syn_keep : boolean;
attribute syn_preserve : boolean;
signal vcc, gnd : std_ulogic;
signal tx_en, tx_ctlp, tx_ctl : std_ulogic;
signal txd : std_logic_vector(7 downto 0);
signal rxd, rxd_int : std_logic_vector(7 downto 0);
signal rx_clk, nrx_clk : std_ulogic;
signal rx_dv, rx_dv_int, rx_ctl, rx_ctl_int, rx_error : std_logic;
signal clk50i,clk50ni, clk25i, clk25ni, clk125i, clk2_5i, clk2_5ni : std_ulogic;
signal txp, txn, tx_clk_ddr, tx_clk, tx_clki, ntx_clk : std_ulogic;
signal cnt2_5, cnt25 : unsigned(5 downto 0);
signal rst50n,rsttxclkn,rsttxclk,rsttxclk90n,rsttxclk90 : std_logic;
-- RGMII Inband status signals
signal inbandopt,inbandreq : std_logic;
signal link_status : std_logic;
signal clock_speed : std_logic_vector(1 downto 0);
signal duplex_status : std_logic;
signal false_carrier_ind : std_logic;
signal carrier_ext : std_logic;
signal carrier_ext_error : std_logic;
signal carrier_sense : std_logic;
-- Extra registers to ease IOB placement
signal status_vector_apb : std_logic_vector(15 downto 0);
-- debug signal
signal WMemRgmiioData : std_logic_vector(15 downto 0);
signal RMemRgmiioData : std_logic_vector(15 downto 0);
signal RMemRgmiioAddr : std_logic_vector(9 downto 0);
signal WMemRgmiioAddr : std_logic_vector(9 downto 0);
signal WMemRgmiioWrEn : std_logic;
signal WMemRgmiiiData : std_logic_vector(15 downto 0);
signal RMemRgmiiiData : std_logic_vector(15 downto 0);
signal RMemRgmiiiAddr : std_logic_vector(9 downto 0);
signal WMemRgmiiiAddr : std_logic_vector(9 downto 0);
signal WMemRgmiiiWrEn : std_logic;
signal RMemRgmiiiRead : std_logic;
signal RMemRgmiioRead : std_logic;
signal clk_tx_g_n : std_logic;
begin -- rtl
vcc <= '1'; gnd <= '0';
---------------------------------------------------------------------------------------
-- MDIO path
---------------------------------------------------------------------------------------
gmiii.mdint <= rgmiii.mdint;
gmiii.mdio_i <= rgmiii.mdio_i;
rgmiio.mdio_o <= gmiio.mdio_o;
rgmiio.mdio_oe <= gmiio.mdio_oe;
rgmiio.mdc <= gmiio.mdc;
---------------------------------------------------------------------------------------
-- TX path
---------------------------------------------------------------------------------------
-- Generate transmit clocks.
tx_clk <= rgmiii.gtx_clk;
ntx_clk <= not tx_clk;
gmiii.gtx_clk <= tx_clk;
gmiii.tx_clk <= tx_clk;
process (tx_clk)
begin -- process
if rising_edge(tx_clk) then
if cnt25 = to_unsigned(4,cnt25'length) then
cnt25 <= to_unsigned(0,cnt25'length);
else
cnt25 <= cnt25 + 1;
end if;
if cnt25 = to_unsigned(0,cnt25'length) then
clk25i <= '1';
elsif cnt25 = to_unsigned(3,cnt25'length) then
clk25i <= '0';
else
clk25i <= clk25i;
end if;
clk25ni <= not clk25i;
if cnt2_5 = to_unsigned(49,cnt2_5'length) then
cnt2_5 <= to_unsigned(0,cnt2_5'length);
else
cnt2_5 <= cnt2_5 + 1;
end if;
if cnt2_5 = to_unsigned(0,cnt2_5'length) then
clk2_5i <= '1';
elsif cnt2_5 = to_unsigned(49,cnt2_5'length) then
clk2_5i <= '0';
else
clk2_5i <= clk2_5i;
end if;
clk2_5ni <= not clk2_5i;
if rsttxclkn = '0' then clk25i <= '0'; clk2_5i <= '0'; cnt2_5 <= to_unsigned(0,cnt2_5'length); cnt25 <= to_unsigned(0,cnt25'length); end if;
end if;
end process;
-- Generate RGMII control signal and check data rate
process (tx_clk)
begin -- process
if rising_edge(tx_clk) then
if (gmiio.gbit = '1') then
txd(7 downto 0) <= gmiio.txd(7 downto 0);
else
txd(7 downto 4) <= gmiio.txd(3 downto 0);
txd(3 downto 0) <= gmiio.txd(3 downto 0);
end if;
tx_en <= gmiio.tx_en;
tx_ctl <= gmiio.tx_en xor gmiio.tx_er;
end if;
if (gmii = 1) and (gmiio.gbit = '1') then
txp <= '1';
txn <= '0';
else
if gmiio.speed = '1' then
txp <= clk25i;
txn <= clk25ni;
else
txp <= clk2_5i;
txn <= clk2_5ni;
end if;
end if;
end process;
clk_tx_rst : eth_rstgen
port map(rstn, tx_clk, vcc, rsttxclkn, open);
rsttxclk <= not rsttxclkn;
clk_tx90_rst : eth_rstgen
port map(rstn, clk_tx_g, vcc, rsttxclk90n, open);
rsttxclk90 <= not rsttxclk90n;
clk_tx_g_n <= not clk_tx_g;
-- DDR outputs
rgmii_txd : for i in 0 to 3 generate
ddr_oreg0 : ddr_oreg generic map (tech, arch => 1)
port map (q => rgmiio.txd(i), c1 => tx_clk, c2 => ntx_clk, ce => vcc,
d1 => txd(i), d2 => txd(i+4), r => rsttxclk, s => gnd);
end generate;
rgmii_tx_ctl : ddr_oreg generic map (tech, arch => 1)
port map (q => rgmiio.tx_en, c1 => tx_clk, c2 => ntx_clk, ce => vcc,
d1 => tx_en, d2 => tx_ctl, r => rsttxclk, s => gnd);
rgmii_tx_clk : ddr_oreg generic map (tech, arch => 1)
port map (q =>tx_clk_ddr, c1 => clk_tx_g, c2 => clk_tx_g_n, ce => vcc,
d1 => txp, d2 => txn, r => rsttxclk90, s => gnd);
rgmiio.tx_er <= '0';
rgmiio.tx_clk <= tx_clk_ddr;
rgmiio.reset <= rstn;
rgmiio.gbit <= gmiio.gbit;
rgmiio.speed <= gmiio.speed when (gmii = 1) else '0';
-- Not used in RGMII mode
rgmiio.txd(7 downto 4) <= (others => '0');
---------------------------------------------------------------------------------------
-- RX path
---------------------------------------------------------------------------------------
-- Rx Clocks
rx_clk <= rgmiii.rx_clk;
nrx_clk <= not rgmiii.rx_clk;
-- DDR inputs
rgmii_rxd : for i in 0 to 3 generate
ddr_ireg0 : ddr_ireg generic map (tech, arch => 1)
port map (q1 => rxd_int(i), q2 => rxd_int(i+4), c1 => rx_clk, c2 => nrx_clk,
ce => vcc, d => rgmiii.rxd(i), r => gnd, s => gnd);
V7D : if (tech = virtex7) or (tech = kintex7) generate
process (rx_clk)
begin
if rising_edge(rx_clk) then
rxd(i) <= rxd_int(i+4);
end if;
end process;
rxd(i+4) <= rxd_int(i);
end generate;
S6D : if (tech = spartan6) generate
rxd(i) <= rxd_int(i);
rxd(i+4) <= rxd_int(i+4);
end generate;
end generate;
ddr_dv0 : ddr_ireg generic map (tech, arch => 1)
port map (q1 => rx_dv_int, q2 => rx_ctl_int, c1 => rx_clk, c2 => nrx_clk,
ce => vcc, d => rgmiii.rx_dv, r => gnd, s => gnd);
V7DV : if (tech = virtex7) or (tech = kintex7) generate
process (rx_clk)
begin
if rising_edge(rx_clk) then
rx_dv <= rx_ctl_int;
end if;
end process;
rx_ctl <= rx_dv_int;
end generate;
S6DV : if (tech = spartan6) generate
rx_dv <= rx_dv_int;
rx_ctl <= rx_ctl_int;
end generate;
-- Decode GMII error signal
rx_error <= rx_dv xor rx_ctl;
-- Enable inband status registers during Interframe Gap
inbandopt <= not ( rx_dv or rx_error );
inbandreq <= rx_error and not rx_dv;
-- Sample RGMII inband information
process (rx_clk)
begin
if rising_edge(rx_clk) then
if (inbandopt = '1') then
link_status <= rxd(0);
clock_speed <= rxd(2 downto 1);
duplex_status <= rxd(3);
end if;
if (inbandreq = '1') then
if (rxd = x"0E") then false_carrier_ind <= '1'; else false_carrier_ind <= '0'; end if;
if (rxd = x"0F") then carrier_ext <= '1'; else carrier_ext <= '0'; end if;
if (rxd = x"1F") then carrier_ext_error <= '1'; else carrier_ext_error <= '0'; end if;
if (rxd = x"FF") then carrier_sense <= '1'; else carrier_sense <= '0'; end if;
end if;
end if;
end process;
-- GMII output
gmiii.rxd <= rxd;
gmiii.rx_dv <= rx_dv;
gmiii.rx_er <= rx_error;
gmiii.rx_clk <= rx_clk;
gmiii.rx_col <= '0';
gmiii.rx_crs <= rx_dv;
gmiii.rmii_clk <= '0';
-- GMII output controlled via generics
gmiii.edclsepahb <= '0';
gmiii.edcldisable <= '0';
gmiii.phyrstaddr <= (others => '0');
gmiii.edcladdr <= (others => '0');
---------------------------------------------------------------------------------------
-- APB Section
---------------------------------------------------------------------------------------
apbo.pindex <= pindex;
apbo.pconfig <= pconfig;
apbo.pirq <= (others => '0');
apbo.prdata(31 downto 16) <= (others => '0');
apbo.prdata(15 downto 0) <= (others => '0') when apbi.psel(pindex) = '0' else
RMemRgmiiiData when RMemRgmiiiRead = '1' else
RMemRgmiioData when RMemRgmiioRead = '1' else
status_vector_apb;
-- Extra registers to ease CDC placement
process (apb_clk)
begin
if apb_clk'event and apb_clk = '1' then
status_vector_apb(15 downto 12) <= (others => '0');
status_vector_apb(11) <= '0';
status_vector_apb(10) <= '0';
status_vector_apb(9) <= gmiio.speed;
status_vector_apb(8) <= gmiio.gbit;
status_vector_apb(7) <= carrier_sense;
status_vector_apb(6) <= carrier_ext_error;
status_vector_apb(5) <= carrier_ext;
status_vector_apb(4) <= false_carrier_ind;
status_vector_apb(3) <= duplex_status;
status_vector_apb(2) <= clock_speed(1);
status_vector_apb(1) <= clock_speed(0);
status_vector_apb(0) <= link_status;
end if;
end process;
debugmem0 : if (debugmem /= 0) generate
-- Write GMII IN data
process (tx_clk)
begin -- process
if rising_edge(tx_clk) then
WMemRgmiioData(15 downto 0) <= "000" & tx_en & "000" & tx_ctl & txd;
if (tx_en = '1') and ((WMemRgmiioAddr < "0111111110") or (WMemRgmiioAddr = "1111111111")) then
WMemRgmiioAddr <= WMemRgmiioAddr + 1;
WMemRgmiioWrEn <= '1';
else
if (rx_dv = '0') then
WMemRgmiioAddr <= (others => '1');
else
WMemRgmiioAddr <= WMemRgmiioAddr;
end if;
WMemRgmiioWrEn <= '0';
end if;
end if;
end process;
-- Read
RMemRgmiioRead <= apbi.paddr(10) and apbi.psel(pindex);
RMemRgmiioAddr <= "00" & apbi.paddr(10-1 downto 2);
gmiii0 : syncram_2p generic map (tech, 10, 16, 1, 0, 0) port map(
apb_clk, RMemRgmiioRead, RMemRgmiioAddr, RMemRgmiioData,
tx_clk, WMemRgmiioWrEn, WMemRgmiioAddr(10-1 downto 0), WMemRgmiioData);
end generate;
debugmem1 : if (debugmem /= 0) generate
-- Write GMII IN data
process (rx_clk)
begin -- process
if rising_edge(rx_clk) then
WMemRgmiiiData(15 downto 0) <= "000" & rx_dv & "000" & rx_ctl & rxd(7 downto 4) & rxd(3 downto 0);
if ((rx_dv = '1') or (rx_ctl = '1')) and ((WMemRgmiiiAddr < "0111111110") or (WMemRgmiiiAddr = "1111111111")) then
WMemRgmiiiAddr <= WMemRgmiiiAddr + 1;
WMemRgmiiiWrEn <= '1';
else
if (rx_dv = '0') then
WMemRgmiiiAddr <= (others => '1');
else
WMemRgmiiiAddr <= WMemRgmiiiAddr;
end if;
WMemRgmiiiWrEn <= '0';
end if;
end if;
end process;
-- Read
RMemRgmiiiRead <= apbi.paddr(11) and apbi.psel(pindex);
RMemRgmiiiAddr <= "00" & apbi.paddr(10-1 downto 2);
rgmiii0 : syncram_2p generic map (tech, 10, 16, 1, 0, 0) port map(
apb_clk, RMemRgmiiiRead, RMemRgmiiiAddr, RMemRgmiiiData,
tx_clk, WMemRgmiiiWrEn, WMemRgmiiiAddr(10-1 downto 0), WMemRgmiiiData);
end generate;
end rtl;
|
-- -------------------------------------------------------------
--
-- Generated Architecture Declaration for rtl of inst_bb_e
--
-- Generated
-- by: wig
-- on: Sat Mar 3 09:45:57 2007
-- cmd: /cygdrive/c/Documents and Settings/wig/My Documents/work/MIX/mix_0.pl -nodelta ../../udc.xls
--
-- !!! Do not edit this file! Autogenerated by MIX !!!
-- $Author: wig $
-- $Id: inst_bb_e-rtl-a.vhd,v 1.1 2007/03/03 11:17:34 wig Exp $
-- $Date: 2007/03/03 11:17:34 $
-- $Log: inst_bb_e-rtl-a.vhd,v $
-- Revision 1.1 2007/03/03 11:17:34 wig
-- Extended ::udc: language dependent %AINS% and %PINS%: e.g. <VHDL>...</VHDL>
--
--
-- Based on Mix Architecture Template built into RCSfile: MixWriter.pm,v
-- Id: MixWriter.pm,v 1.101 2007/03/01 16:28:38 wig Exp
--
-- Generator: mix_0.pl Revision: 1.47 , [email protected]
-- (C) 2003,2005 Micronas GmbH
--
-- --------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
-- No project specific VHDL libraries/arch
udc: HEAD HOOK inst_bb_i
--
--
-- Start of Generated Architecture rtl of inst_bb_e
--
architecture rtl of inst_bb_e is
--
-- Generated Constant Declarations
--
--
-- Generated Components
--
--
-- Generated Signal List
--
--
-- End of Generated Signal List
--
udc: DECL HOOK VHDL inst_bb_i
begin
udc: BODY BOOK VHDL inst_bb_i
--
-- Generated Concurrent Statements
--
--
-- Generated Signal Assignments
--
--
-- Generated Instances and Port Mappings
--
end rtl;
udc: FOOT HOOK two lines inst_bb_i
second line inst_bb_i, config here inst_bb_e_rtl_conf and description bb instance
--
--!End of Architecture/s
-- --------------------------------------------------------------
|
-------------------------------------------------------------------
-- (c) Copyright 1984 - 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
-------------------------------------------------------------------
-- ************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: address_decoder.vhd
-- Version: v2.0
-- Description: Address decoder utilizing unconstrained arrays for Base
-- Address specification and ce number.
-------------------------------------------------------------------------------
-- Structure: This section shows the hierarchical structure of axi_lite_ipif.
--
-- --axi_lite_ipif.vhd
-- --slave_attachment.vhd
-- --address_decoder.vhd
-------------------------------------------------------------------------------
-- Author: BSB
--
-- History:
--
-- BSB 05/20/10 -- First version
-- ~~~~~~
-- - Created the first version v1.00.a
-- ^^^^^^
-- ~~~~~~
-- SK 08/09/2010 --
-- - updated the core with optimziation. Closed CR 574507
-- - combined the CE generation logic to further optimize the code.
-- ^^^^^^
-- ~~~~~~
-- SK 12/16/12 -- v2.0
-- 1. up reved to major version for 2013.1 Vivado release. No logic updates.
-- 2. Updated the version of AXI LITE IPIF to v2.0 in X.Y format
-- 3. updated the proc common version to proc_common_base_v5_0
-- 4. No Logic Updates
-- ^^^^^^
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_cmb"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use ieee.numeric_std.all;
--library proc_common_base_v5_0;
--use proc_common_base_v5_0.proc_common_pkg.clog2;
--use proc_common_base_v5_0.pselect_f;
--use proc_common_base_v5_0.ipif_pkg.all;
library axi_lite_ipif_v3_0;
use axi_lite_ipif_v3_0.ipif_pkg.all;
-------------------------------------------------------------------------------
-- Definition of Generics
-------------------------------------------------------------------------------
-- C_BUS_AWIDTH -- Address bus width
-- C_S_AXI_MIN_SIZE -- Minimum address range of the IP
-- C_ARD_ADDR_RANGE_ARRAY-- Base /High Address Pair for each Address Range
-- C_ARD_NUM_CE_ARRAY -- Desired number of chip enables for an address range
-- C_FAMILY -- Target FPGA family
-------------------------------------------------------------------------------
-- Definition of Ports
-------------------------------------------------------------------------------
-- Bus_clk -- Clock
-- Bus_rst -- Reset
-- Address_In_Erly -- Adddress in
-- Address_Valid_Erly -- Address is valid
-- Bus_RNW -- Read or write registered
-- Bus_RNW_Erly -- Read or Write
-- CS_CE_ld_enable -- chip select and chip enable registered
-- Clear_CS_CE_Reg -- Clear_CS_CE_Reg clear
-- RW_CE_ld_enable -- Read or Write Chip Enable
-- CS_for_gaps -- CS generation for the gaps between address ranges
-- CS_Out -- Chip select
-- RdCE_Out -- Read Chip enable
-- WrCE_Out -- Write chip enable
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Entity Declaration
-------------------------------------------------------------------------------
entity address_decoder is
generic (
C_BUS_AWIDTH : integer := 32;
C_S_AXI_MIN_SIZE : std_logic_vector(0 to 31) := X"000001FF";
C_ARD_ADDR_RANGE_ARRAY: SLV64_ARRAY_TYPE :=
(
X"0000_0000_1000_0000", -- IP user0 base address
X"0000_0000_1000_01FF", -- IP user0 high address
X"0000_0000_1000_0200", -- IP user1 base address
X"0000_0000_1000_02FF" -- IP user1 high address
);
C_ARD_NUM_CE_ARRAY : INTEGER_ARRAY_TYPE :=
(
8, -- User0 CE Number
1 -- User1 CE Number
);
C_FAMILY : string := "virtex6"
);
port (
Bus_clk : in std_logic;
Bus_rst : in std_logic;
-- PLB Interface signals
Address_In_Erly : in std_logic_vector(0 to C_BUS_AWIDTH-1);
Address_Valid_Erly : in std_logic;
Bus_RNW : in std_logic;
Bus_RNW_Erly : in std_logic;
-- Registering control signals
CS_CE_ld_enable : in std_logic;
Clear_CS_CE_Reg : in std_logic;
RW_CE_ld_enable : in std_logic;
CS_for_gaps : out std_logic;
-- Decode output signals
CS_Out : out std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
RdCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1);
WrCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1)
);
end entity address_decoder;
-------------------------------------------------------------------------------
-- Architecture section
-------------------------------------------------------------------------------
architecture IMP of address_decoder is
----------------------------------------------------------------------------------
-- below attributes are added to reduce the synth warnings in Vivado tool
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of imp : architecture is "yes";
----------------------------------------------------------------------------------
-- local type declarations ----------------------------------------------------
type decode_bit_array_type is Array(natural range 0 to (
(C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1) of
integer;
type short_addr_array_type is Array(natural range 0 to
C_ARD_ADDR_RANGE_ARRAY'LENGTH-1) of
std_logic_vector(0 to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- Function Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- This function converts a 64 bit address range array to a AWIDTH bit
-- address range array.
-------------------------------------------------------------------------------
function slv64_2_slv_awidth(slv64_addr_array : SLV64_ARRAY_TYPE;
awidth : integer)
return short_addr_array_type is
variable temp_addr : std_logic_vector(0 to 63);
variable slv_array : short_addr_array_type;
begin
for array_index in 0 to slv64_addr_array'length-1 loop
temp_addr := slv64_addr_array(array_index);
slv_array(array_index) := temp_addr((64-awidth) to 63);
end loop;
return(slv_array);
end function slv64_2_slv_awidth;
-------------------------------------------------------------------------------
--Function Addr_bits
--function to convert an address range (base address and an upper address)
--into the number of upper address bits needed for decoding a device
--select signal. will handle slices and big or little endian
-------------------------------------------------------------------------------
function Addr_Bits (x,y : std_logic_vector(0 to C_BUS_AWIDTH-1))
return integer is
variable addr_nor : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
addr_nor := x xor y;
for i in 0 to C_BUS_AWIDTH-1 loop
if addr_nor(i)='1' then
return i;
end if;
end loop;
--coverage off
return(C_BUS_AWIDTH);
--coverage on
end function Addr_Bits;
-------------------------------------------------------------------------------
--Function Get_Addr_Bits
--function calculates the array which has the decode bits for the each address
--range.
-------------------------------------------------------------------------------
function Get_Addr_Bits (baseaddrs : short_addr_array_type)
return decode_bit_array_type is
variable num_bits : decode_bit_array_type;
begin
for i in 0 to ((baseaddrs'length)/2)-1 loop
num_bits(i) := Addr_Bits (baseaddrs(i*2),
baseaddrs(i*2+1));
end loop;
return(num_bits);
end function Get_Addr_Bits;
-------------------------------------------------------------------------------
-- NEEDED_ADDR_BITS
--
-- Function Description:
-- This function calculates the number of address bits required
-- to support the CE generation logic. This is determined by
-- multiplying the number of CEs for an address space by the
-- data width of the address space (in bytes). Each address
-- space entry is processed and the biggest of the spaces is
-- used to set the number of address bits required to be latched
-- and used for CE decoding. A minimum value of 1 is returned by
-- this function.
--
-------------------------------------------------------------------------------
function needed_addr_bits (ce_array : INTEGER_ARRAY_TYPE)
return integer is
constant NUM_CE_ENTRIES : integer := CE_ARRAY'length;
variable biggest : integer := 2;
variable req_ce_addr_size : integer := 0;
variable num_addr_bits : integer := 0;
begin
for i in 0 to NUM_CE_ENTRIES-1 loop
req_ce_addr_size := ce_array(i) * 4;
if (req_ce_addr_size > biggest) Then
biggest := req_ce_addr_size;
end if;
end loop;
num_addr_bits := clog2(biggest);
return(num_addr_bits);
end function NEEDED_ADDR_BITS;
-----------------------------------------------------------------------------
-- Function calc_high_address
--
-- This function is used to calculate the high address of the each address
-- range
-----------------------------------------------------------------------------
function calc_high_address (high_address : short_addr_array_type;
index : integer) return std_logic_vector is
variable calc_high_addr : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
If (index = (C_ARD_ADDR_RANGE_ARRAY'length/2-1)) Then
calc_high_addr := C_S_AXI_MIN_SIZE(32-C_BUS_AWIDTH to 31);
else
calc_high_addr := high_address(index*2+2);
end if;
return(calc_high_addr);
end function calc_high_address;
----------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
constant ARD_ADDR_RANGE_ARRAY : short_addr_array_type :=
slv64_2_slv_awidth(C_ARD_ADDR_RANGE_ARRAY,
C_BUS_AWIDTH);
constant NUM_BASE_ADDRS : integer := (C_ARD_ADDR_RANGE_ARRAY'length)/2;
constant DECODE_BITS : decode_bit_array_type :=
Get_Addr_Bits(ARD_ADDR_RANGE_ARRAY);
constant NUM_CE_SIGNALS : integer :=
calc_num_ce(C_ARD_NUM_CE_ARRAY);
constant NUM_S_H_ADDR_BITS : integer :=
needed_addr_bits(C_ARD_NUM_CE_ARRAY);
-------------------------------------------------------------------------------
-- Signal Declarations
-------------------------------------------------------------------------------
signal pselect_hit_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal cs_out_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal ce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal rdce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal ce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1); --
signal cs_ce_clr : std_logic;
signal addr_out_s_h : std_logic_vector(0 to NUM_S_H_ADDR_BITS-1);
signal Bus_RNW_reg : std_logic;
-------------------------------------------------------------------------------
-- Begin architecture
-------------------------------------------------------------------------------
begin -- architecture IMP
-- Register clears
cs_ce_clr <= not Bus_rst or Clear_CS_CE_Reg;
addr_out_s_h <= Address_In_Erly(C_BUS_AWIDTH-NUM_S_H_ADDR_BITS
to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- MEM_DECODE_GEN: Universal Address Decode Block
-------------------------------------------------------------------------------
MEM_DECODE_GEN: for bar_index in 0 to NUM_BASE_ADDRS-1 generate
---------------
constant CE_INDEX_START : integer
:= calc_start_ce_index(C_ARD_NUM_CE_ARRAY,bar_index);
constant CE_ADDR_SIZE : Integer range 0 to 15
:= clog2(C_ARD_NUM_CE_ARRAY(bar_index));
constant OFFSET : integer := 2;
constant BASE_ADDR_x : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= ARD_ADDR_RANGE_ARRAY(bar_index*2+1);
constant HIGH_ADDR_X : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= calc_high_address(ARD_ADDR_RANGE_ARRAY,bar_index);
--constant DECODE_BITS_0 : integer:= DECODE_BITS(0);
---------
begin
---------
-- GEN_FOR_MULTI_CS: Below logic generates the CS for decoded address
-- -----------------
GEN_FOR_MULTI_CS : if C_ARD_ADDR_RANGE_ARRAY'length > 2 generate
-- Instantiate the basic Base Address Decoders
MEM_SELECT_I: entity axi_lite_ipif_v3_0.pselect_f
generic map
(
C_AB => DECODE_BITS(bar_index),
C_AW => C_BUS_AWIDTH,
C_BAR => ARD_ADDR_RANGE_ARRAY(bar_index*2),
C_FAMILY => C_FAMILY
)
port map
(
A => Address_In_Erly, -- [in]
AValid => Address_Valid_Erly, -- [in]
CS => pselect_hit_i(bar_index) -- [out]
);
end generate GEN_FOR_MULTI_CS;
-- GEN_FOR_ONE_CS: below logic decodes the CS for single address range
-- ---------------
GEN_FOR_ONE_CS : if C_ARD_ADDR_RANGE_ARRAY'length = 2 generate
pselect_hit_i(bar_index) <= Address_Valid_Erly;
end generate GEN_FOR_ONE_CS;
-- Instantate backend registers for the Chip Selects
BKEND_CS_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(Bus_Rst='0' or Clear_CS_CE_Reg = '1')then
cs_out_i(bar_index) <= '0';
elsif(CS_CE_ld_enable='1')then
cs_out_i(bar_index) <= pselect_hit_i(bar_index);
end if;
end if;
end process BKEND_CS_REG;
-------------------------------------------------------------------------
-- PER_CE_GEN: Now expand the individual CEs for each base address.
-------------------------------------------------------------------------
PER_CE_GEN: for j in 0 to C_ARD_NUM_CE_ARRAY(bar_index) - 1 generate
-----------
begin
-----------
----------------------------------------------------------------------
-- CE decoders for multiple CE's
----------------------------------------------------------------------
MULTIPLE_CES_THIS_CS_GEN : if CE_ADDR_SIZE > 0 generate
constant BAR : std_logic_vector(0 to CE_ADDR_SIZE-1) :=
std_logic_vector(to_unsigned(j,CE_ADDR_SIZE));
begin
CE_I : entity axi_lite_ipif_v3_0.pselect_f
generic map (
C_AB => CE_ADDR_SIZE ,
C_AW => CE_ADDR_SIZE ,
C_BAR => BAR ,
C_FAMILY => C_FAMILY
)
port map (
A => addr_out_s_h
(NUM_S_H_ADDR_BITS-OFFSET-CE_ADDR_SIZE
to NUM_S_H_ADDR_BITS - OFFSET - 1) ,
AValid => pselect_hit_i(bar_index) ,
CS => ce_expnd_i(CE_INDEX_START+j)
);
end generate MULTIPLE_CES_THIS_CS_GEN;
--------------------------------------
----------------------------------------------------------------------
-- SINGLE_CE_THIS_CS_GEN: CE decoders for single CE
----------------------------------------------------------------------
SINGLE_CE_THIS_CS_GEN : if CE_ADDR_SIZE = 0 generate
ce_expnd_i(CE_INDEX_START+j) <= pselect_hit_i(bar_index);
end generate;
-------------
end generate PER_CE_GEN;
------------------------
end generate MEM_DECODE_GEN;
-- RNW_REG_P: Register the incoming RNW signal at the time of registering the
-- address. This is need to generate the CE's separately.
RNW_REG_P:process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(RW_CE_ld_enable='1')then
Bus_RNW_reg <= Bus_RNW_Erly;
end if;
end if;
end process RNW_REG_P;
---------------------------------------------------------------------------
-- GEN_BKEND_CE_REGISTERS
-- This ForGen implements the backend registering for
-- the CE, RdCE, and WrCE output buses.
---------------------------------------------------------------------------
GEN_BKEND_CE_REGISTERS : for ce_index in 0 to NUM_CE_SIGNALS-1 generate
signal rdce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
------
begin
------
BKEND_RDCE_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(cs_ce_clr='1')then
ce_out_i(ce_index) <= '0';
elsif(RW_CE_ld_enable='1')then
ce_out_i(ce_index) <= ce_expnd_i(ce_index);
end if;
end if;
end process BKEND_RDCE_REG;
rdce_out_i(ce_index) <= ce_out_i(ce_index) and Bus_RNW_reg;
wrce_out_i(ce_index) <= ce_out_i(ce_index) and not Bus_RNW_reg;
-------------------------------
end generate GEN_BKEND_CE_REGISTERS;
-------------------------------------------------------------------------------
CS_for_gaps <= '0'; -- Removed the GAP adecoder logic
---------------------------------
CS_Out <= cs_out_i ;
RdCE_Out <= rdce_out_i ;
WrCE_Out <= wrce_out_i ;
end architecture IMP;
|
-------------------------------------------------------------------
-- (c) Copyright 1984 - 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
-------------------------------------------------------------------
-- ************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: address_decoder.vhd
-- Version: v2.0
-- Description: Address decoder utilizing unconstrained arrays for Base
-- Address specification and ce number.
-------------------------------------------------------------------------------
-- Structure: This section shows the hierarchical structure of axi_lite_ipif.
--
-- --axi_lite_ipif.vhd
-- --slave_attachment.vhd
-- --address_decoder.vhd
-------------------------------------------------------------------------------
-- Author: BSB
--
-- History:
--
-- BSB 05/20/10 -- First version
-- ~~~~~~
-- - Created the first version v1.00.a
-- ^^^^^^
-- ~~~~~~
-- SK 08/09/2010 --
-- - updated the core with optimziation. Closed CR 574507
-- - combined the CE generation logic to further optimize the code.
-- ^^^^^^
-- ~~~~~~
-- SK 12/16/12 -- v2.0
-- 1. up reved to major version for 2013.1 Vivado release. No logic updates.
-- 2. Updated the version of AXI LITE IPIF to v2.0 in X.Y format
-- 3. updated the proc common version to proc_common_base_v5_0
-- 4. No Logic Updates
-- ^^^^^^
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_cmb"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use ieee.numeric_std.all;
--library proc_common_base_v5_0;
--use proc_common_base_v5_0.proc_common_pkg.clog2;
--use proc_common_base_v5_0.pselect_f;
--use proc_common_base_v5_0.ipif_pkg.all;
library axi_lite_ipif_v3_0;
use axi_lite_ipif_v3_0.ipif_pkg.all;
-------------------------------------------------------------------------------
-- Definition of Generics
-------------------------------------------------------------------------------
-- C_BUS_AWIDTH -- Address bus width
-- C_S_AXI_MIN_SIZE -- Minimum address range of the IP
-- C_ARD_ADDR_RANGE_ARRAY-- Base /High Address Pair for each Address Range
-- C_ARD_NUM_CE_ARRAY -- Desired number of chip enables for an address range
-- C_FAMILY -- Target FPGA family
-------------------------------------------------------------------------------
-- Definition of Ports
-------------------------------------------------------------------------------
-- Bus_clk -- Clock
-- Bus_rst -- Reset
-- Address_In_Erly -- Adddress in
-- Address_Valid_Erly -- Address is valid
-- Bus_RNW -- Read or write registered
-- Bus_RNW_Erly -- Read or Write
-- CS_CE_ld_enable -- chip select and chip enable registered
-- Clear_CS_CE_Reg -- Clear_CS_CE_Reg clear
-- RW_CE_ld_enable -- Read or Write Chip Enable
-- CS_for_gaps -- CS generation for the gaps between address ranges
-- CS_Out -- Chip select
-- RdCE_Out -- Read Chip enable
-- WrCE_Out -- Write chip enable
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Entity Declaration
-------------------------------------------------------------------------------
entity address_decoder is
generic (
C_BUS_AWIDTH : integer := 32;
C_S_AXI_MIN_SIZE : std_logic_vector(0 to 31) := X"000001FF";
C_ARD_ADDR_RANGE_ARRAY: SLV64_ARRAY_TYPE :=
(
X"0000_0000_1000_0000", -- IP user0 base address
X"0000_0000_1000_01FF", -- IP user0 high address
X"0000_0000_1000_0200", -- IP user1 base address
X"0000_0000_1000_02FF" -- IP user1 high address
);
C_ARD_NUM_CE_ARRAY : INTEGER_ARRAY_TYPE :=
(
8, -- User0 CE Number
1 -- User1 CE Number
);
C_FAMILY : string := "virtex6"
);
port (
Bus_clk : in std_logic;
Bus_rst : in std_logic;
-- PLB Interface signals
Address_In_Erly : in std_logic_vector(0 to C_BUS_AWIDTH-1);
Address_Valid_Erly : in std_logic;
Bus_RNW : in std_logic;
Bus_RNW_Erly : in std_logic;
-- Registering control signals
CS_CE_ld_enable : in std_logic;
Clear_CS_CE_Reg : in std_logic;
RW_CE_ld_enable : in std_logic;
CS_for_gaps : out std_logic;
-- Decode output signals
CS_Out : out std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
RdCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1);
WrCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1)
);
end entity address_decoder;
-------------------------------------------------------------------------------
-- Architecture section
-------------------------------------------------------------------------------
architecture IMP of address_decoder is
----------------------------------------------------------------------------------
-- below attributes are added to reduce the synth warnings in Vivado tool
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of imp : architecture is "yes";
----------------------------------------------------------------------------------
-- local type declarations ----------------------------------------------------
type decode_bit_array_type is Array(natural range 0 to (
(C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1) of
integer;
type short_addr_array_type is Array(natural range 0 to
C_ARD_ADDR_RANGE_ARRAY'LENGTH-1) of
std_logic_vector(0 to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- Function Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- This function converts a 64 bit address range array to a AWIDTH bit
-- address range array.
-------------------------------------------------------------------------------
function slv64_2_slv_awidth(slv64_addr_array : SLV64_ARRAY_TYPE;
awidth : integer)
return short_addr_array_type is
variable temp_addr : std_logic_vector(0 to 63);
variable slv_array : short_addr_array_type;
begin
for array_index in 0 to slv64_addr_array'length-1 loop
temp_addr := slv64_addr_array(array_index);
slv_array(array_index) := temp_addr((64-awidth) to 63);
end loop;
return(slv_array);
end function slv64_2_slv_awidth;
-------------------------------------------------------------------------------
--Function Addr_bits
--function to convert an address range (base address and an upper address)
--into the number of upper address bits needed for decoding a device
--select signal. will handle slices and big or little endian
-------------------------------------------------------------------------------
function Addr_Bits (x,y : std_logic_vector(0 to C_BUS_AWIDTH-1))
return integer is
variable addr_nor : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
addr_nor := x xor y;
for i in 0 to C_BUS_AWIDTH-1 loop
if addr_nor(i)='1' then
return i;
end if;
end loop;
--coverage off
return(C_BUS_AWIDTH);
--coverage on
end function Addr_Bits;
-------------------------------------------------------------------------------
--Function Get_Addr_Bits
--function calculates the array which has the decode bits for the each address
--range.
-------------------------------------------------------------------------------
function Get_Addr_Bits (baseaddrs : short_addr_array_type)
return decode_bit_array_type is
variable num_bits : decode_bit_array_type;
begin
for i in 0 to ((baseaddrs'length)/2)-1 loop
num_bits(i) := Addr_Bits (baseaddrs(i*2),
baseaddrs(i*2+1));
end loop;
return(num_bits);
end function Get_Addr_Bits;
-------------------------------------------------------------------------------
-- NEEDED_ADDR_BITS
--
-- Function Description:
-- This function calculates the number of address bits required
-- to support the CE generation logic. This is determined by
-- multiplying the number of CEs for an address space by the
-- data width of the address space (in bytes). Each address
-- space entry is processed and the biggest of the spaces is
-- used to set the number of address bits required to be latched
-- and used for CE decoding. A minimum value of 1 is returned by
-- this function.
--
-------------------------------------------------------------------------------
function needed_addr_bits (ce_array : INTEGER_ARRAY_TYPE)
return integer is
constant NUM_CE_ENTRIES : integer := CE_ARRAY'length;
variable biggest : integer := 2;
variable req_ce_addr_size : integer := 0;
variable num_addr_bits : integer := 0;
begin
for i in 0 to NUM_CE_ENTRIES-1 loop
req_ce_addr_size := ce_array(i) * 4;
if (req_ce_addr_size > biggest) Then
biggest := req_ce_addr_size;
end if;
end loop;
num_addr_bits := clog2(biggest);
return(num_addr_bits);
end function NEEDED_ADDR_BITS;
-----------------------------------------------------------------------------
-- Function calc_high_address
--
-- This function is used to calculate the high address of the each address
-- range
-----------------------------------------------------------------------------
function calc_high_address (high_address : short_addr_array_type;
index : integer) return std_logic_vector is
variable calc_high_addr : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
If (index = (C_ARD_ADDR_RANGE_ARRAY'length/2-1)) Then
calc_high_addr := C_S_AXI_MIN_SIZE(32-C_BUS_AWIDTH to 31);
else
calc_high_addr := high_address(index*2+2);
end if;
return(calc_high_addr);
end function calc_high_address;
----------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
constant ARD_ADDR_RANGE_ARRAY : short_addr_array_type :=
slv64_2_slv_awidth(C_ARD_ADDR_RANGE_ARRAY,
C_BUS_AWIDTH);
constant NUM_BASE_ADDRS : integer := (C_ARD_ADDR_RANGE_ARRAY'length)/2;
constant DECODE_BITS : decode_bit_array_type :=
Get_Addr_Bits(ARD_ADDR_RANGE_ARRAY);
constant NUM_CE_SIGNALS : integer :=
calc_num_ce(C_ARD_NUM_CE_ARRAY);
constant NUM_S_H_ADDR_BITS : integer :=
needed_addr_bits(C_ARD_NUM_CE_ARRAY);
-------------------------------------------------------------------------------
-- Signal Declarations
-------------------------------------------------------------------------------
signal pselect_hit_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal cs_out_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal ce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal rdce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal ce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1); --
signal cs_ce_clr : std_logic;
signal addr_out_s_h : std_logic_vector(0 to NUM_S_H_ADDR_BITS-1);
signal Bus_RNW_reg : std_logic;
-------------------------------------------------------------------------------
-- Begin architecture
-------------------------------------------------------------------------------
begin -- architecture IMP
-- Register clears
cs_ce_clr <= not Bus_rst or Clear_CS_CE_Reg;
addr_out_s_h <= Address_In_Erly(C_BUS_AWIDTH-NUM_S_H_ADDR_BITS
to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- MEM_DECODE_GEN: Universal Address Decode Block
-------------------------------------------------------------------------------
MEM_DECODE_GEN: for bar_index in 0 to NUM_BASE_ADDRS-1 generate
---------------
constant CE_INDEX_START : integer
:= calc_start_ce_index(C_ARD_NUM_CE_ARRAY,bar_index);
constant CE_ADDR_SIZE : Integer range 0 to 15
:= clog2(C_ARD_NUM_CE_ARRAY(bar_index));
constant OFFSET : integer := 2;
constant BASE_ADDR_x : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= ARD_ADDR_RANGE_ARRAY(bar_index*2+1);
constant HIGH_ADDR_X : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= calc_high_address(ARD_ADDR_RANGE_ARRAY,bar_index);
--constant DECODE_BITS_0 : integer:= DECODE_BITS(0);
---------
begin
---------
-- GEN_FOR_MULTI_CS: Below logic generates the CS for decoded address
-- -----------------
GEN_FOR_MULTI_CS : if C_ARD_ADDR_RANGE_ARRAY'length > 2 generate
-- Instantiate the basic Base Address Decoders
MEM_SELECT_I: entity axi_lite_ipif_v3_0.pselect_f
generic map
(
C_AB => DECODE_BITS(bar_index),
C_AW => C_BUS_AWIDTH,
C_BAR => ARD_ADDR_RANGE_ARRAY(bar_index*2),
C_FAMILY => C_FAMILY
)
port map
(
A => Address_In_Erly, -- [in]
AValid => Address_Valid_Erly, -- [in]
CS => pselect_hit_i(bar_index) -- [out]
);
end generate GEN_FOR_MULTI_CS;
-- GEN_FOR_ONE_CS: below logic decodes the CS for single address range
-- ---------------
GEN_FOR_ONE_CS : if C_ARD_ADDR_RANGE_ARRAY'length = 2 generate
pselect_hit_i(bar_index) <= Address_Valid_Erly;
end generate GEN_FOR_ONE_CS;
-- Instantate backend registers for the Chip Selects
BKEND_CS_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(Bus_Rst='0' or Clear_CS_CE_Reg = '1')then
cs_out_i(bar_index) <= '0';
elsif(CS_CE_ld_enable='1')then
cs_out_i(bar_index) <= pselect_hit_i(bar_index);
end if;
end if;
end process BKEND_CS_REG;
-------------------------------------------------------------------------
-- PER_CE_GEN: Now expand the individual CEs for each base address.
-------------------------------------------------------------------------
PER_CE_GEN: for j in 0 to C_ARD_NUM_CE_ARRAY(bar_index) - 1 generate
-----------
begin
-----------
----------------------------------------------------------------------
-- CE decoders for multiple CE's
----------------------------------------------------------------------
MULTIPLE_CES_THIS_CS_GEN : if CE_ADDR_SIZE > 0 generate
constant BAR : std_logic_vector(0 to CE_ADDR_SIZE-1) :=
std_logic_vector(to_unsigned(j,CE_ADDR_SIZE));
begin
CE_I : entity axi_lite_ipif_v3_0.pselect_f
generic map (
C_AB => CE_ADDR_SIZE ,
C_AW => CE_ADDR_SIZE ,
C_BAR => BAR ,
C_FAMILY => C_FAMILY
)
port map (
A => addr_out_s_h
(NUM_S_H_ADDR_BITS-OFFSET-CE_ADDR_SIZE
to NUM_S_H_ADDR_BITS - OFFSET - 1) ,
AValid => pselect_hit_i(bar_index) ,
CS => ce_expnd_i(CE_INDEX_START+j)
);
end generate MULTIPLE_CES_THIS_CS_GEN;
--------------------------------------
----------------------------------------------------------------------
-- SINGLE_CE_THIS_CS_GEN: CE decoders for single CE
----------------------------------------------------------------------
SINGLE_CE_THIS_CS_GEN : if CE_ADDR_SIZE = 0 generate
ce_expnd_i(CE_INDEX_START+j) <= pselect_hit_i(bar_index);
end generate;
-------------
end generate PER_CE_GEN;
------------------------
end generate MEM_DECODE_GEN;
-- RNW_REG_P: Register the incoming RNW signal at the time of registering the
-- address. This is need to generate the CE's separately.
RNW_REG_P:process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(RW_CE_ld_enable='1')then
Bus_RNW_reg <= Bus_RNW_Erly;
end if;
end if;
end process RNW_REG_P;
---------------------------------------------------------------------------
-- GEN_BKEND_CE_REGISTERS
-- This ForGen implements the backend registering for
-- the CE, RdCE, and WrCE output buses.
---------------------------------------------------------------------------
GEN_BKEND_CE_REGISTERS : for ce_index in 0 to NUM_CE_SIGNALS-1 generate
signal rdce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
------
begin
------
BKEND_RDCE_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(cs_ce_clr='1')then
ce_out_i(ce_index) <= '0';
elsif(RW_CE_ld_enable='1')then
ce_out_i(ce_index) <= ce_expnd_i(ce_index);
end if;
end if;
end process BKEND_RDCE_REG;
rdce_out_i(ce_index) <= ce_out_i(ce_index) and Bus_RNW_reg;
wrce_out_i(ce_index) <= ce_out_i(ce_index) and not Bus_RNW_reg;
-------------------------------
end generate GEN_BKEND_CE_REGISTERS;
-------------------------------------------------------------------------------
CS_for_gaps <= '0'; -- Removed the GAP adecoder logic
---------------------------------
CS_Out <= cs_out_i ;
RdCE_Out <= rdce_out_i ;
WrCE_Out <= wrce_out_i ;
end architecture IMP;
|
-------------------------------------------------------------------
-- (c) Copyright 1984 - 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
-------------------------------------------------------------------
-- ************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: address_decoder.vhd
-- Version: v2.0
-- Description: Address decoder utilizing unconstrained arrays for Base
-- Address specification and ce number.
-------------------------------------------------------------------------------
-- Structure: This section shows the hierarchical structure of axi_lite_ipif.
--
-- --axi_lite_ipif.vhd
-- --slave_attachment.vhd
-- --address_decoder.vhd
-------------------------------------------------------------------------------
-- Author: BSB
--
-- History:
--
-- BSB 05/20/10 -- First version
-- ~~~~~~
-- - Created the first version v1.00.a
-- ^^^^^^
-- ~~~~~~
-- SK 08/09/2010 --
-- - updated the core with optimziation. Closed CR 574507
-- - combined the CE generation logic to further optimize the code.
-- ^^^^^^
-- ~~~~~~
-- SK 12/16/12 -- v2.0
-- 1. up reved to major version for 2013.1 Vivado release. No logic updates.
-- 2. Updated the version of AXI LITE IPIF to v2.0 in X.Y format
-- 3. updated the proc common version to proc_common_base_v5_0
-- 4. No Logic Updates
-- ^^^^^^
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_cmb"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use ieee.numeric_std.all;
--library proc_common_base_v5_0;
--use proc_common_base_v5_0.proc_common_pkg.clog2;
--use proc_common_base_v5_0.pselect_f;
--use proc_common_base_v5_0.ipif_pkg.all;
library axi_lite_ipif_v3_0;
use axi_lite_ipif_v3_0.ipif_pkg.all;
-------------------------------------------------------------------------------
-- Definition of Generics
-------------------------------------------------------------------------------
-- C_BUS_AWIDTH -- Address bus width
-- C_S_AXI_MIN_SIZE -- Minimum address range of the IP
-- C_ARD_ADDR_RANGE_ARRAY-- Base /High Address Pair for each Address Range
-- C_ARD_NUM_CE_ARRAY -- Desired number of chip enables for an address range
-- C_FAMILY -- Target FPGA family
-------------------------------------------------------------------------------
-- Definition of Ports
-------------------------------------------------------------------------------
-- Bus_clk -- Clock
-- Bus_rst -- Reset
-- Address_In_Erly -- Adddress in
-- Address_Valid_Erly -- Address is valid
-- Bus_RNW -- Read or write registered
-- Bus_RNW_Erly -- Read or Write
-- CS_CE_ld_enable -- chip select and chip enable registered
-- Clear_CS_CE_Reg -- Clear_CS_CE_Reg clear
-- RW_CE_ld_enable -- Read or Write Chip Enable
-- CS_for_gaps -- CS generation for the gaps between address ranges
-- CS_Out -- Chip select
-- RdCE_Out -- Read Chip enable
-- WrCE_Out -- Write chip enable
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Entity Declaration
-------------------------------------------------------------------------------
entity address_decoder is
generic (
C_BUS_AWIDTH : integer := 32;
C_S_AXI_MIN_SIZE : std_logic_vector(0 to 31) := X"000001FF";
C_ARD_ADDR_RANGE_ARRAY: SLV64_ARRAY_TYPE :=
(
X"0000_0000_1000_0000", -- IP user0 base address
X"0000_0000_1000_01FF", -- IP user0 high address
X"0000_0000_1000_0200", -- IP user1 base address
X"0000_0000_1000_02FF" -- IP user1 high address
);
C_ARD_NUM_CE_ARRAY : INTEGER_ARRAY_TYPE :=
(
8, -- User0 CE Number
1 -- User1 CE Number
);
C_FAMILY : string := "virtex6"
);
port (
Bus_clk : in std_logic;
Bus_rst : in std_logic;
-- PLB Interface signals
Address_In_Erly : in std_logic_vector(0 to C_BUS_AWIDTH-1);
Address_Valid_Erly : in std_logic;
Bus_RNW : in std_logic;
Bus_RNW_Erly : in std_logic;
-- Registering control signals
CS_CE_ld_enable : in std_logic;
Clear_CS_CE_Reg : in std_logic;
RW_CE_ld_enable : in std_logic;
CS_for_gaps : out std_logic;
-- Decode output signals
CS_Out : out std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
RdCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1);
WrCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1)
);
end entity address_decoder;
-------------------------------------------------------------------------------
-- Architecture section
-------------------------------------------------------------------------------
architecture IMP of address_decoder is
----------------------------------------------------------------------------------
-- below attributes are added to reduce the synth warnings in Vivado tool
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of imp : architecture is "yes";
----------------------------------------------------------------------------------
-- local type declarations ----------------------------------------------------
type decode_bit_array_type is Array(natural range 0 to (
(C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1) of
integer;
type short_addr_array_type is Array(natural range 0 to
C_ARD_ADDR_RANGE_ARRAY'LENGTH-1) of
std_logic_vector(0 to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- Function Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- This function converts a 64 bit address range array to a AWIDTH bit
-- address range array.
-------------------------------------------------------------------------------
function slv64_2_slv_awidth(slv64_addr_array : SLV64_ARRAY_TYPE;
awidth : integer)
return short_addr_array_type is
variable temp_addr : std_logic_vector(0 to 63);
variable slv_array : short_addr_array_type;
begin
for array_index in 0 to slv64_addr_array'length-1 loop
temp_addr := slv64_addr_array(array_index);
slv_array(array_index) := temp_addr((64-awidth) to 63);
end loop;
return(slv_array);
end function slv64_2_slv_awidth;
-------------------------------------------------------------------------------
--Function Addr_bits
--function to convert an address range (base address and an upper address)
--into the number of upper address bits needed for decoding a device
--select signal. will handle slices and big or little endian
-------------------------------------------------------------------------------
function Addr_Bits (x,y : std_logic_vector(0 to C_BUS_AWIDTH-1))
return integer is
variable addr_nor : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
addr_nor := x xor y;
for i in 0 to C_BUS_AWIDTH-1 loop
if addr_nor(i)='1' then
return i;
end if;
end loop;
--coverage off
return(C_BUS_AWIDTH);
--coverage on
end function Addr_Bits;
-------------------------------------------------------------------------------
--Function Get_Addr_Bits
--function calculates the array which has the decode bits for the each address
--range.
-------------------------------------------------------------------------------
function Get_Addr_Bits (baseaddrs : short_addr_array_type)
return decode_bit_array_type is
variable num_bits : decode_bit_array_type;
begin
for i in 0 to ((baseaddrs'length)/2)-1 loop
num_bits(i) := Addr_Bits (baseaddrs(i*2),
baseaddrs(i*2+1));
end loop;
return(num_bits);
end function Get_Addr_Bits;
-------------------------------------------------------------------------------
-- NEEDED_ADDR_BITS
--
-- Function Description:
-- This function calculates the number of address bits required
-- to support the CE generation logic. This is determined by
-- multiplying the number of CEs for an address space by the
-- data width of the address space (in bytes). Each address
-- space entry is processed and the biggest of the spaces is
-- used to set the number of address bits required to be latched
-- and used for CE decoding. A minimum value of 1 is returned by
-- this function.
--
-------------------------------------------------------------------------------
function needed_addr_bits (ce_array : INTEGER_ARRAY_TYPE)
return integer is
constant NUM_CE_ENTRIES : integer := CE_ARRAY'length;
variable biggest : integer := 2;
variable req_ce_addr_size : integer := 0;
variable num_addr_bits : integer := 0;
begin
for i in 0 to NUM_CE_ENTRIES-1 loop
req_ce_addr_size := ce_array(i) * 4;
if (req_ce_addr_size > biggest) Then
biggest := req_ce_addr_size;
end if;
end loop;
num_addr_bits := clog2(biggest);
return(num_addr_bits);
end function NEEDED_ADDR_BITS;
-----------------------------------------------------------------------------
-- Function calc_high_address
--
-- This function is used to calculate the high address of the each address
-- range
-----------------------------------------------------------------------------
function calc_high_address (high_address : short_addr_array_type;
index : integer) return std_logic_vector is
variable calc_high_addr : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
If (index = (C_ARD_ADDR_RANGE_ARRAY'length/2-1)) Then
calc_high_addr := C_S_AXI_MIN_SIZE(32-C_BUS_AWIDTH to 31);
else
calc_high_addr := high_address(index*2+2);
end if;
return(calc_high_addr);
end function calc_high_address;
----------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
constant ARD_ADDR_RANGE_ARRAY : short_addr_array_type :=
slv64_2_slv_awidth(C_ARD_ADDR_RANGE_ARRAY,
C_BUS_AWIDTH);
constant NUM_BASE_ADDRS : integer := (C_ARD_ADDR_RANGE_ARRAY'length)/2;
constant DECODE_BITS : decode_bit_array_type :=
Get_Addr_Bits(ARD_ADDR_RANGE_ARRAY);
constant NUM_CE_SIGNALS : integer :=
calc_num_ce(C_ARD_NUM_CE_ARRAY);
constant NUM_S_H_ADDR_BITS : integer :=
needed_addr_bits(C_ARD_NUM_CE_ARRAY);
-------------------------------------------------------------------------------
-- Signal Declarations
-------------------------------------------------------------------------------
signal pselect_hit_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal cs_out_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal ce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal rdce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal ce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1); --
signal cs_ce_clr : std_logic;
signal addr_out_s_h : std_logic_vector(0 to NUM_S_H_ADDR_BITS-1);
signal Bus_RNW_reg : std_logic;
-------------------------------------------------------------------------------
-- Begin architecture
-------------------------------------------------------------------------------
begin -- architecture IMP
-- Register clears
cs_ce_clr <= not Bus_rst or Clear_CS_CE_Reg;
addr_out_s_h <= Address_In_Erly(C_BUS_AWIDTH-NUM_S_H_ADDR_BITS
to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- MEM_DECODE_GEN: Universal Address Decode Block
-------------------------------------------------------------------------------
MEM_DECODE_GEN: for bar_index in 0 to NUM_BASE_ADDRS-1 generate
---------------
constant CE_INDEX_START : integer
:= calc_start_ce_index(C_ARD_NUM_CE_ARRAY,bar_index);
constant CE_ADDR_SIZE : Integer range 0 to 15
:= clog2(C_ARD_NUM_CE_ARRAY(bar_index));
constant OFFSET : integer := 2;
constant BASE_ADDR_x : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= ARD_ADDR_RANGE_ARRAY(bar_index*2+1);
constant HIGH_ADDR_X : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= calc_high_address(ARD_ADDR_RANGE_ARRAY,bar_index);
--constant DECODE_BITS_0 : integer:= DECODE_BITS(0);
---------
begin
---------
-- GEN_FOR_MULTI_CS: Below logic generates the CS for decoded address
-- -----------------
GEN_FOR_MULTI_CS : if C_ARD_ADDR_RANGE_ARRAY'length > 2 generate
-- Instantiate the basic Base Address Decoders
MEM_SELECT_I: entity axi_lite_ipif_v3_0.pselect_f
generic map
(
C_AB => DECODE_BITS(bar_index),
C_AW => C_BUS_AWIDTH,
C_BAR => ARD_ADDR_RANGE_ARRAY(bar_index*2),
C_FAMILY => C_FAMILY
)
port map
(
A => Address_In_Erly, -- [in]
AValid => Address_Valid_Erly, -- [in]
CS => pselect_hit_i(bar_index) -- [out]
);
end generate GEN_FOR_MULTI_CS;
-- GEN_FOR_ONE_CS: below logic decodes the CS for single address range
-- ---------------
GEN_FOR_ONE_CS : if C_ARD_ADDR_RANGE_ARRAY'length = 2 generate
pselect_hit_i(bar_index) <= Address_Valid_Erly;
end generate GEN_FOR_ONE_CS;
-- Instantate backend registers for the Chip Selects
BKEND_CS_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(Bus_Rst='0' or Clear_CS_CE_Reg = '1')then
cs_out_i(bar_index) <= '0';
elsif(CS_CE_ld_enable='1')then
cs_out_i(bar_index) <= pselect_hit_i(bar_index);
end if;
end if;
end process BKEND_CS_REG;
-------------------------------------------------------------------------
-- PER_CE_GEN: Now expand the individual CEs for each base address.
-------------------------------------------------------------------------
PER_CE_GEN: for j in 0 to C_ARD_NUM_CE_ARRAY(bar_index) - 1 generate
-----------
begin
-----------
----------------------------------------------------------------------
-- CE decoders for multiple CE's
----------------------------------------------------------------------
MULTIPLE_CES_THIS_CS_GEN : if CE_ADDR_SIZE > 0 generate
constant BAR : std_logic_vector(0 to CE_ADDR_SIZE-1) :=
std_logic_vector(to_unsigned(j,CE_ADDR_SIZE));
begin
CE_I : entity axi_lite_ipif_v3_0.pselect_f
generic map (
C_AB => CE_ADDR_SIZE ,
C_AW => CE_ADDR_SIZE ,
C_BAR => BAR ,
C_FAMILY => C_FAMILY
)
port map (
A => addr_out_s_h
(NUM_S_H_ADDR_BITS-OFFSET-CE_ADDR_SIZE
to NUM_S_H_ADDR_BITS - OFFSET - 1) ,
AValid => pselect_hit_i(bar_index) ,
CS => ce_expnd_i(CE_INDEX_START+j)
);
end generate MULTIPLE_CES_THIS_CS_GEN;
--------------------------------------
----------------------------------------------------------------------
-- SINGLE_CE_THIS_CS_GEN: CE decoders for single CE
----------------------------------------------------------------------
SINGLE_CE_THIS_CS_GEN : if CE_ADDR_SIZE = 0 generate
ce_expnd_i(CE_INDEX_START+j) <= pselect_hit_i(bar_index);
end generate;
-------------
end generate PER_CE_GEN;
------------------------
end generate MEM_DECODE_GEN;
-- RNW_REG_P: Register the incoming RNW signal at the time of registering the
-- address. This is need to generate the CE's separately.
RNW_REG_P:process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(RW_CE_ld_enable='1')then
Bus_RNW_reg <= Bus_RNW_Erly;
end if;
end if;
end process RNW_REG_P;
---------------------------------------------------------------------------
-- GEN_BKEND_CE_REGISTERS
-- This ForGen implements the backend registering for
-- the CE, RdCE, and WrCE output buses.
---------------------------------------------------------------------------
GEN_BKEND_CE_REGISTERS : for ce_index in 0 to NUM_CE_SIGNALS-1 generate
signal rdce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
------
begin
------
BKEND_RDCE_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(cs_ce_clr='1')then
ce_out_i(ce_index) <= '0';
elsif(RW_CE_ld_enable='1')then
ce_out_i(ce_index) <= ce_expnd_i(ce_index);
end if;
end if;
end process BKEND_RDCE_REG;
rdce_out_i(ce_index) <= ce_out_i(ce_index) and Bus_RNW_reg;
wrce_out_i(ce_index) <= ce_out_i(ce_index) and not Bus_RNW_reg;
-------------------------------
end generate GEN_BKEND_CE_REGISTERS;
-------------------------------------------------------------------------------
CS_for_gaps <= '0'; -- Removed the GAP adecoder logic
---------------------------------
CS_Out <= cs_out_i ;
RdCE_Out <= rdce_out_i ;
WrCE_Out <= wrce_out_i ;
end architecture IMP;
|
-------------------------------------------------------------------
-- (c) Copyright 1984 - 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
-------------------------------------------------------------------
-- ************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: address_decoder.vhd
-- Version: v2.0
-- Description: Address decoder utilizing unconstrained arrays for Base
-- Address specification and ce number.
-------------------------------------------------------------------------------
-- Structure: This section shows the hierarchical structure of axi_lite_ipif.
--
-- --axi_lite_ipif.vhd
-- --slave_attachment.vhd
-- --address_decoder.vhd
-------------------------------------------------------------------------------
-- Author: BSB
--
-- History:
--
-- BSB 05/20/10 -- First version
-- ~~~~~~
-- - Created the first version v1.00.a
-- ^^^^^^
-- ~~~~~~
-- SK 08/09/2010 --
-- - updated the core with optimziation. Closed CR 574507
-- - combined the CE generation logic to further optimize the code.
-- ^^^^^^
-- ~~~~~~
-- SK 12/16/12 -- v2.0
-- 1. up reved to major version for 2013.1 Vivado release. No logic updates.
-- 2. Updated the version of AXI LITE IPIF to v2.0 in X.Y format
-- 3. updated the proc common version to proc_common_base_v5_0
-- 4. No Logic Updates
-- ^^^^^^
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_cmb"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use ieee.numeric_std.all;
--library proc_common_base_v5_0;
--use proc_common_base_v5_0.proc_common_pkg.clog2;
--use proc_common_base_v5_0.pselect_f;
--use proc_common_base_v5_0.ipif_pkg.all;
library axi_lite_ipif_v3_0;
use axi_lite_ipif_v3_0.ipif_pkg.all;
-------------------------------------------------------------------------------
-- Definition of Generics
-------------------------------------------------------------------------------
-- C_BUS_AWIDTH -- Address bus width
-- C_S_AXI_MIN_SIZE -- Minimum address range of the IP
-- C_ARD_ADDR_RANGE_ARRAY-- Base /High Address Pair for each Address Range
-- C_ARD_NUM_CE_ARRAY -- Desired number of chip enables for an address range
-- C_FAMILY -- Target FPGA family
-------------------------------------------------------------------------------
-- Definition of Ports
-------------------------------------------------------------------------------
-- Bus_clk -- Clock
-- Bus_rst -- Reset
-- Address_In_Erly -- Adddress in
-- Address_Valid_Erly -- Address is valid
-- Bus_RNW -- Read or write registered
-- Bus_RNW_Erly -- Read or Write
-- CS_CE_ld_enable -- chip select and chip enable registered
-- Clear_CS_CE_Reg -- Clear_CS_CE_Reg clear
-- RW_CE_ld_enable -- Read or Write Chip Enable
-- CS_for_gaps -- CS generation for the gaps between address ranges
-- CS_Out -- Chip select
-- RdCE_Out -- Read Chip enable
-- WrCE_Out -- Write chip enable
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Entity Declaration
-------------------------------------------------------------------------------
entity address_decoder is
generic (
C_BUS_AWIDTH : integer := 32;
C_S_AXI_MIN_SIZE : std_logic_vector(0 to 31) := X"000001FF";
C_ARD_ADDR_RANGE_ARRAY: SLV64_ARRAY_TYPE :=
(
X"0000_0000_1000_0000", -- IP user0 base address
X"0000_0000_1000_01FF", -- IP user0 high address
X"0000_0000_1000_0200", -- IP user1 base address
X"0000_0000_1000_02FF" -- IP user1 high address
);
C_ARD_NUM_CE_ARRAY : INTEGER_ARRAY_TYPE :=
(
8, -- User0 CE Number
1 -- User1 CE Number
);
C_FAMILY : string := "virtex6"
);
port (
Bus_clk : in std_logic;
Bus_rst : in std_logic;
-- PLB Interface signals
Address_In_Erly : in std_logic_vector(0 to C_BUS_AWIDTH-1);
Address_Valid_Erly : in std_logic;
Bus_RNW : in std_logic;
Bus_RNW_Erly : in std_logic;
-- Registering control signals
CS_CE_ld_enable : in std_logic;
Clear_CS_CE_Reg : in std_logic;
RW_CE_ld_enable : in std_logic;
CS_for_gaps : out std_logic;
-- Decode output signals
CS_Out : out std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
RdCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1);
WrCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1)
);
end entity address_decoder;
-------------------------------------------------------------------------------
-- Architecture section
-------------------------------------------------------------------------------
architecture IMP of address_decoder is
----------------------------------------------------------------------------------
-- below attributes are added to reduce the synth warnings in Vivado tool
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of imp : architecture is "yes";
----------------------------------------------------------------------------------
-- local type declarations ----------------------------------------------------
type decode_bit_array_type is Array(natural range 0 to (
(C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1) of
integer;
type short_addr_array_type is Array(natural range 0 to
C_ARD_ADDR_RANGE_ARRAY'LENGTH-1) of
std_logic_vector(0 to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- Function Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- This function converts a 64 bit address range array to a AWIDTH bit
-- address range array.
-------------------------------------------------------------------------------
function slv64_2_slv_awidth(slv64_addr_array : SLV64_ARRAY_TYPE;
awidth : integer)
return short_addr_array_type is
variable temp_addr : std_logic_vector(0 to 63);
variable slv_array : short_addr_array_type;
begin
for array_index in 0 to slv64_addr_array'length-1 loop
temp_addr := slv64_addr_array(array_index);
slv_array(array_index) := temp_addr((64-awidth) to 63);
end loop;
return(slv_array);
end function slv64_2_slv_awidth;
-------------------------------------------------------------------------------
--Function Addr_bits
--function to convert an address range (base address and an upper address)
--into the number of upper address bits needed for decoding a device
--select signal. will handle slices and big or little endian
-------------------------------------------------------------------------------
function Addr_Bits (x,y : std_logic_vector(0 to C_BUS_AWIDTH-1))
return integer is
variable addr_nor : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
addr_nor := x xor y;
for i in 0 to C_BUS_AWIDTH-1 loop
if addr_nor(i)='1' then
return i;
end if;
end loop;
--coverage off
return(C_BUS_AWIDTH);
--coverage on
end function Addr_Bits;
-------------------------------------------------------------------------------
--Function Get_Addr_Bits
--function calculates the array which has the decode bits for the each address
--range.
-------------------------------------------------------------------------------
function Get_Addr_Bits (baseaddrs : short_addr_array_type)
return decode_bit_array_type is
variable num_bits : decode_bit_array_type;
begin
for i in 0 to ((baseaddrs'length)/2)-1 loop
num_bits(i) := Addr_Bits (baseaddrs(i*2),
baseaddrs(i*2+1));
end loop;
return(num_bits);
end function Get_Addr_Bits;
-------------------------------------------------------------------------------
-- NEEDED_ADDR_BITS
--
-- Function Description:
-- This function calculates the number of address bits required
-- to support the CE generation logic. This is determined by
-- multiplying the number of CEs for an address space by the
-- data width of the address space (in bytes). Each address
-- space entry is processed and the biggest of the spaces is
-- used to set the number of address bits required to be latched
-- and used for CE decoding. A minimum value of 1 is returned by
-- this function.
--
-------------------------------------------------------------------------------
function needed_addr_bits (ce_array : INTEGER_ARRAY_TYPE)
return integer is
constant NUM_CE_ENTRIES : integer := CE_ARRAY'length;
variable biggest : integer := 2;
variable req_ce_addr_size : integer := 0;
variable num_addr_bits : integer := 0;
begin
for i in 0 to NUM_CE_ENTRIES-1 loop
req_ce_addr_size := ce_array(i) * 4;
if (req_ce_addr_size > biggest) Then
biggest := req_ce_addr_size;
end if;
end loop;
num_addr_bits := clog2(biggest);
return(num_addr_bits);
end function NEEDED_ADDR_BITS;
-----------------------------------------------------------------------------
-- Function calc_high_address
--
-- This function is used to calculate the high address of the each address
-- range
-----------------------------------------------------------------------------
function calc_high_address (high_address : short_addr_array_type;
index : integer) return std_logic_vector is
variable calc_high_addr : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
If (index = (C_ARD_ADDR_RANGE_ARRAY'length/2-1)) Then
calc_high_addr := C_S_AXI_MIN_SIZE(32-C_BUS_AWIDTH to 31);
else
calc_high_addr := high_address(index*2+2);
end if;
return(calc_high_addr);
end function calc_high_address;
----------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
constant ARD_ADDR_RANGE_ARRAY : short_addr_array_type :=
slv64_2_slv_awidth(C_ARD_ADDR_RANGE_ARRAY,
C_BUS_AWIDTH);
constant NUM_BASE_ADDRS : integer := (C_ARD_ADDR_RANGE_ARRAY'length)/2;
constant DECODE_BITS : decode_bit_array_type :=
Get_Addr_Bits(ARD_ADDR_RANGE_ARRAY);
constant NUM_CE_SIGNALS : integer :=
calc_num_ce(C_ARD_NUM_CE_ARRAY);
constant NUM_S_H_ADDR_BITS : integer :=
needed_addr_bits(C_ARD_NUM_CE_ARRAY);
-------------------------------------------------------------------------------
-- Signal Declarations
-------------------------------------------------------------------------------
signal pselect_hit_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal cs_out_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal ce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal rdce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal ce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1); --
signal cs_ce_clr : std_logic;
signal addr_out_s_h : std_logic_vector(0 to NUM_S_H_ADDR_BITS-1);
signal Bus_RNW_reg : std_logic;
-------------------------------------------------------------------------------
-- Begin architecture
-------------------------------------------------------------------------------
begin -- architecture IMP
-- Register clears
cs_ce_clr <= not Bus_rst or Clear_CS_CE_Reg;
addr_out_s_h <= Address_In_Erly(C_BUS_AWIDTH-NUM_S_H_ADDR_BITS
to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- MEM_DECODE_GEN: Universal Address Decode Block
-------------------------------------------------------------------------------
MEM_DECODE_GEN: for bar_index in 0 to NUM_BASE_ADDRS-1 generate
---------------
constant CE_INDEX_START : integer
:= calc_start_ce_index(C_ARD_NUM_CE_ARRAY,bar_index);
constant CE_ADDR_SIZE : Integer range 0 to 15
:= clog2(C_ARD_NUM_CE_ARRAY(bar_index));
constant OFFSET : integer := 2;
constant BASE_ADDR_x : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= ARD_ADDR_RANGE_ARRAY(bar_index*2+1);
constant HIGH_ADDR_X : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= calc_high_address(ARD_ADDR_RANGE_ARRAY,bar_index);
--constant DECODE_BITS_0 : integer:= DECODE_BITS(0);
---------
begin
---------
-- GEN_FOR_MULTI_CS: Below logic generates the CS for decoded address
-- -----------------
GEN_FOR_MULTI_CS : if C_ARD_ADDR_RANGE_ARRAY'length > 2 generate
-- Instantiate the basic Base Address Decoders
MEM_SELECT_I: entity axi_lite_ipif_v3_0.pselect_f
generic map
(
C_AB => DECODE_BITS(bar_index),
C_AW => C_BUS_AWIDTH,
C_BAR => ARD_ADDR_RANGE_ARRAY(bar_index*2),
C_FAMILY => C_FAMILY
)
port map
(
A => Address_In_Erly, -- [in]
AValid => Address_Valid_Erly, -- [in]
CS => pselect_hit_i(bar_index) -- [out]
);
end generate GEN_FOR_MULTI_CS;
-- GEN_FOR_ONE_CS: below logic decodes the CS for single address range
-- ---------------
GEN_FOR_ONE_CS : if C_ARD_ADDR_RANGE_ARRAY'length = 2 generate
pselect_hit_i(bar_index) <= Address_Valid_Erly;
end generate GEN_FOR_ONE_CS;
-- Instantate backend registers for the Chip Selects
BKEND_CS_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(Bus_Rst='0' or Clear_CS_CE_Reg = '1')then
cs_out_i(bar_index) <= '0';
elsif(CS_CE_ld_enable='1')then
cs_out_i(bar_index) <= pselect_hit_i(bar_index);
end if;
end if;
end process BKEND_CS_REG;
-------------------------------------------------------------------------
-- PER_CE_GEN: Now expand the individual CEs for each base address.
-------------------------------------------------------------------------
PER_CE_GEN: for j in 0 to C_ARD_NUM_CE_ARRAY(bar_index) - 1 generate
-----------
begin
-----------
----------------------------------------------------------------------
-- CE decoders for multiple CE's
----------------------------------------------------------------------
MULTIPLE_CES_THIS_CS_GEN : if CE_ADDR_SIZE > 0 generate
constant BAR : std_logic_vector(0 to CE_ADDR_SIZE-1) :=
std_logic_vector(to_unsigned(j,CE_ADDR_SIZE));
begin
CE_I : entity axi_lite_ipif_v3_0.pselect_f
generic map (
C_AB => CE_ADDR_SIZE ,
C_AW => CE_ADDR_SIZE ,
C_BAR => BAR ,
C_FAMILY => C_FAMILY
)
port map (
A => addr_out_s_h
(NUM_S_H_ADDR_BITS-OFFSET-CE_ADDR_SIZE
to NUM_S_H_ADDR_BITS - OFFSET - 1) ,
AValid => pselect_hit_i(bar_index) ,
CS => ce_expnd_i(CE_INDEX_START+j)
);
end generate MULTIPLE_CES_THIS_CS_GEN;
--------------------------------------
----------------------------------------------------------------------
-- SINGLE_CE_THIS_CS_GEN: CE decoders for single CE
----------------------------------------------------------------------
SINGLE_CE_THIS_CS_GEN : if CE_ADDR_SIZE = 0 generate
ce_expnd_i(CE_INDEX_START+j) <= pselect_hit_i(bar_index);
end generate;
-------------
end generate PER_CE_GEN;
------------------------
end generate MEM_DECODE_GEN;
-- RNW_REG_P: Register the incoming RNW signal at the time of registering the
-- address. This is need to generate the CE's separately.
RNW_REG_P:process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(RW_CE_ld_enable='1')then
Bus_RNW_reg <= Bus_RNW_Erly;
end if;
end if;
end process RNW_REG_P;
---------------------------------------------------------------------------
-- GEN_BKEND_CE_REGISTERS
-- This ForGen implements the backend registering for
-- the CE, RdCE, and WrCE output buses.
---------------------------------------------------------------------------
GEN_BKEND_CE_REGISTERS : for ce_index in 0 to NUM_CE_SIGNALS-1 generate
signal rdce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
------
begin
------
BKEND_RDCE_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(cs_ce_clr='1')then
ce_out_i(ce_index) <= '0';
elsif(RW_CE_ld_enable='1')then
ce_out_i(ce_index) <= ce_expnd_i(ce_index);
end if;
end if;
end process BKEND_RDCE_REG;
rdce_out_i(ce_index) <= ce_out_i(ce_index) and Bus_RNW_reg;
wrce_out_i(ce_index) <= ce_out_i(ce_index) and not Bus_RNW_reg;
-------------------------------
end generate GEN_BKEND_CE_REGISTERS;
-------------------------------------------------------------------------------
CS_for_gaps <= '0'; -- Removed the GAP adecoder logic
---------------------------------
CS_Out <= cs_out_i ;
RdCE_Out <= rdce_out_i ;
WrCE_Out <= wrce_out_i ;
end architecture IMP;
|
-------------------------------------------------------------------
-- (c) Copyright 1984 - 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
-------------------------------------------------------------------
-- ************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: address_decoder.vhd
-- Version: v2.0
-- Description: Address decoder utilizing unconstrained arrays for Base
-- Address specification and ce number.
-------------------------------------------------------------------------------
-- Structure: This section shows the hierarchical structure of axi_lite_ipif.
--
-- --axi_lite_ipif.vhd
-- --slave_attachment.vhd
-- --address_decoder.vhd
-------------------------------------------------------------------------------
-- Author: BSB
--
-- History:
--
-- BSB 05/20/10 -- First version
-- ~~~~~~
-- - Created the first version v1.00.a
-- ^^^^^^
-- ~~~~~~
-- SK 08/09/2010 --
-- - updated the core with optimziation. Closed CR 574507
-- - combined the CE generation logic to further optimize the code.
-- ^^^^^^
-- ~~~~~~
-- SK 12/16/12 -- v2.0
-- 1. up reved to major version for 2013.1 Vivado release. No logic updates.
-- 2. Updated the version of AXI LITE IPIF to v2.0 in X.Y format
-- 3. updated the proc common version to proc_common_base_v5_0
-- 4. No Logic Updates
-- ^^^^^^
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_cmb"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use ieee.numeric_std.all;
--library proc_common_base_v5_0;
--use proc_common_base_v5_0.proc_common_pkg.clog2;
--use proc_common_base_v5_0.pselect_f;
--use proc_common_base_v5_0.ipif_pkg.all;
library axi_lite_ipif_v3_0;
use axi_lite_ipif_v3_0.ipif_pkg.all;
-------------------------------------------------------------------------------
-- Definition of Generics
-------------------------------------------------------------------------------
-- C_BUS_AWIDTH -- Address bus width
-- C_S_AXI_MIN_SIZE -- Minimum address range of the IP
-- C_ARD_ADDR_RANGE_ARRAY-- Base /High Address Pair for each Address Range
-- C_ARD_NUM_CE_ARRAY -- Desired number of chip enables for an address range
-- C_FAMILY -- Target FPGA family
-------------------------------------------------------------------------------
-- Definition of Ports
-------------------------------------------------------------------------------
-- Bus_clk -- Clock
-- Bus_rst -- Reset
-- Address_In_Erly -- Adddress in
-- Address_Valid_Erly -- Address is valid
-- Bus_RNW -- Read or write registered
-- Bus_RNW_Erly -- Read or Write
-- CS_CE_ld_enable -- chip select and chip enable registered
-- Clear_CS_CE_Reg -- Clear_CS_CE_Reg clear
-- RW_CE_ld_enable -- Read or Write Chip Enable
-- CS_for_gaps -- CS generation for the gaps between address ranges
-- CS_Out -- Chip select
-- RdCE_Out -- Read Chip enable
-- WrCE_Out -- Write chip enable
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Entity Declaration
-------------------------------------------------------------------------------
entity address_decoder is
generic (
C_BUS_AWIDTH : integer := 32;
C_S_AXI_MIN_SIZE : std_logic_vector(0 to 31) := X"000001FF";
C_ARD_ADDR_RANGE_ARRAY: SLV64_ARRAY_TYPE :=
(
X"0000_0000_1000_0000", -- IP user0 base address
X"0000_0000_1000_01FF", -- IP user0 high address
X"0000_0000_1000_0200", -- IP user1 base address
X"0000_0000_1000_02FF" -- IP user1 high address
);
C_ARD_NUM_CE_ARRAY : INTEGER_ARRAY_TYPE :=
(
8, -- User0 CE Number
1 -- User1 CE Number
);
C_FAMILY : string := "virtex6"
);
port (
Bus_clk : in std_logic;
Bus_rst : in std_logic;
-- PLB Interface signals
Address_In_Erly : in std_logic_vector(0 to C_BUS_AWIDTH-1);
Address_Valid_Erly : in std_logic;
Bus_RNW : in std_logic;
Bus_RNW_Erly : in std_logic;
-- Registering control signals
CS_CE_ld_enable : in std_logic;
Clear_CS_CE_Reg : in std_logic;
RW_CE_ld_enable : in std_logic;
CS_for_gaps : out std_logic;
-- Decode output signals
CS_Out : out std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
RdCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1);
WrCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1)
);
end entity address_decoder;
-------------------------------------------------------------------------------
-- Architecture section
-------------------------------------------------------------------------------
architecture IMP of address_decoder is
----------------------------------------------------------------------------------
-- below attributes are added to reduce the synth warnings in Vivado tool
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of imp : architecture is "yes";
----------------------------------------------------------------------------------
-- local type declarations ----------------------------------------------------
type decode_bit_array_type is Array(natural range 0 to (
(C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1) of
integer;
type short_addr_array_type is Array(natural range 0 to
C_ARD_ADDR_RANGE_ARRAY'LENGTH-1) of
std_logic_vector(0 to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- Function Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- This function converts a 64 bit address range array to a AWIDTH bit
-- address range array.
-------------------------------------------------------------------------------
function slv64_2_slv_awidth(slv64_addr_array : SLV64_ARRAY_TYPE;
awidth : integer)
return short_addr_array_type is
variable temp_addr : std_logic_vector(0 to 63);
variable slv_array : short_addr_array_type;
begin
for array_index in 0 to slv64_addr_array'length-1 loop
temp_addr := slv64_addr_array(array_index);
slv_array(array_index) := temp_addr((64-awidth) to 63);
end loop;
return(slv_array);
end function slv64_2_slv_awidth;
-------------------------------------------------------------------------------
--Function Addr_bits
--function to convert an address range (base address and an upper address)
--into the number of upper address bits needed for decoding a device
--select signal. will handle slices and big or little endian
-------------------------------------------------------------------------------
function Addr_Bits (x,y : std_logic_vector(0 to C_BUS_AWIDTH-1))
return integer is
variable addr_nor : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
addr_nor := x xor y;
for i in 0 to C_BUS_AWIDTH-1 loop
if addr_nor(i)='1' then
return i;
end if;
end loop;
--coverage off
return(C_BUS_AWIDTH);
--coverage on
end function Addr_Bits;
-------------------------------------------------------------------------------
--Function Get_Addr_Bits
--function calculates the array which has the decode bits for the each address
--range.
-------------------------------------------------------------------------------
function Get_Addr_Bits (baseaddrs : short_addr_array_type)
return decode_bit_array_type is
variable num_bits : decode_bit_array_type;
begin
for i in 0 to ((baseaddrs'length)/2)-1 loop
num_bits(i) := Addr_Bits (baseaddrs(i*2),
baseaddrs(i*2+1));
end loop;
return(num_bits);
end function Get_Addr_Bits;
-------------------------------------------------------------------------------
-- NEEDED_ADDR_BITS
--
-- Function Description:
-- This function calculates the number of address bits required
-- to support the CE generation logic. This is determined by
-- multiplying the number of CEs for an address space by the
-- data width of the address space (in bytes). Each address
-- space entry is processed and the biggest of the spaces is
-- used to set the number of address bits required to be latched
-- and used for CE decoding. A minimum value of 1 is returned by
-- this function.
--
-------------------------------------------------------------------------------
function needed_addr_bits (ce_array : INTEGER_ARRAY_TYPE)
return integer is
constant NUM_CE_ENTRIES : integer := CE_ARRAY'length;
variable biggest : integer := 2;
variable req_ce_addr_size : integer := 0;
variable num_addr_bits : integer := 0;
begin
for i in 0 to NUM_CE_ENTRIES-1 loop
req_ce_addr_size := ce_array(i) * 4;
if (req_ce_addr_size > biggest) Then
biggest := req_ce_addr_size;
end if;
end loop;
num_addr_bits := clog2(biggest);
return(num_addr_bits);
end function NEEDED_ADDR_BITS;
-----------------------------------------------------------------------------
-- Function calc_high_address
--
-- This function is used to calculate the high address of the each address
-- range
-----------------------------------------------------------------------------
function calc_high_address (high_address : short_addr_array_type;
index : integer) return std_logic_vector is
variable calc_high_addr : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
If (index = (C_ARD_ADDR_RANGE_ARRAY'length/2-1)) Then
calc_high_addr := C_S_AXI_MIN_SIZE(32-C_BUS_AWIDTH to 31);
else
calc_high_addr := high_address(index*2+2);
end if;
return(calc_high_addr);
end function calc_high_address;
----------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
constant ARD_ADDR_RANGE_ARRAY : short_addr_array_type :=
slv64_2_slv_awidth(C_ARD_ADDR_RANGE_ARRAY,
C_BUS_AWIDTH);
constant NUM_BASE_ADDRS : integer := (C_ARD_ADDR_RANGE_ARRAY'length)/2;
constant DECODE_BITS : decode_bit_array_type :=
Get_Addr_Bits(ARD_ADDR_RANGE_ARRAY);
constant NUM_CE_SIGNALS : integer :=
calc_num_ce(C_ARD_NUM_CE_ARRAY);
constant NUM_S_H_ADDR_BITS : integer :=
needed_addr_bits(C_ARD_NUM_CE_ARRAY);
-------------------------------------------------------------------------------
-- Signal Declarations
-------------------------------------------------------------------------------
signal pselect_hit_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal cs_out_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal ce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal rdce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal ce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1); --
signal cs_ce_clr : std_logic;
signal addr_out_s_h : std_logic_vector(0 to NUM_S_H_ADDR_BITS-1);
signal Bus_RNW_reg : std_logic;
-------------------------------------------------------------------------------
-- Begin architecture
-------------------------------------------------------------------------------
begin -- architecture IMP
-- Register clears
cs_ce_clr <= not Bus_rst or Clear_CS_CE_Reg;
addr_out_s_h <= Address_In_Erly(C_BUS_AWIDTH-NUM_S_H_ADDR_BITS
to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- MEM_DECODE_GEN: Universal Address Decode Block
-------------------------------------------------------------------------------
MEM_DECODE_GEN: for bar_index in 0 to NUM_BASE_ADDRS-1 generate
---------------
constant CE_INDEX_START : integer
:= calc_start_ce_index(C_ARD_NUM_CE_ARRAY,bar_index);
constant CE_ADDR_SIZE : Integer range 0 to 15
:= clog2(C_ARD_NUM_CE_ARRAY(bar_index));
constant OFFSET : integer := 2;
constant BASE_ADDR_x : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= ARD_ADDR_RANGE_ARRAY(bar_index*2+1);
constant HIGH_ADDR_X : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= calc_high_address(ARD_ADDR_RANGE_ARRAY,bar_index);
--constant DECODE_BITS_0 : integer:= DECODE_BITS(0);
---------
begin
---------
-- GEN_FOR_MULTI_CS: Below logic generates the CS for decoded address
-- -----------------
GEN_FOR_MULTI_CS : if C_ARD_ADDR_RANGE_ARRAY'length > 2 generate
-- Instantiate the basic Base Address Decoders
MEM_SELECT_I: entity axi_lite_ipif_v3_0.pselect_f
generic map
(
C_AB => DECODE_BITS(bar_index),
C_AW => C_BUS_AWIDTH,
C_BAR => ARD_ADDR_RANGE_ARRAY(bar_index*2),
C_FAMILY => C_FAMILY
)
port map
(
A => Address_In_Erly, -- [in]
AValid => Address_Valid_Erly, -- [in]
CS => pselect_hit_i(bar_index) -- [out]
);
end generate GEN_FOR_MULTI_CS;
-- GEN_FOR_ONE_CS: below logic decodes the CS for single address range
-- ---------------
GEN_FOR_ONE_CS : if C_ARD_ADDR_RANGE_ARRAY'length = 2 generate
pselect_hit_i(bar_index) <= Address_Valid_Erly;
end generate GEN_FOR_ONE_CS;
-- Instantate backend registers for the Chip Selects
BKEND_CS_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(Bus_Rst='0' or Clear_CS_CE_Reg = '1')then
cs_out_i(bar_index) <= '0';
elsif(CS_CE_ld_enable='1')then
cs_out_i(bar_index) <= pselect_hit_i(bar_index);
end if;
end if;
end process BKEND_CS_REG;
-------------------------------------------------------------------------
-- PER_CE_GEN: Now expand the individual CEs for each base address.
-------------------------------------------------------------------------
PER_CE_GEN: for j in 0 to C_ARD_NUM_CE_ARRAY(bar_index) - 1 generate
-----------
begin
-----------
----------------------------------------------------------------------
-- CE decoders for multiple CE's
----------------------------------------------------------------------
MULTIPLE_CES_THIS_CS_GEN : if CE_ADDR_SIZE > 0 generate
constant BAR : std_logic_vector(0 to CE_ADDR_SIZE-1) :=
std_logic_vector(to_unsigned(j,CE_ADDR_SIZE));
begin
CE_I : entity axi_lite_ipif_v3_0.pselect_f
generic map (
C_AB => CE_ADDR_SIZE ,
C_AW => CE_ADDR_SIZE ,
C_BAR => BAR ,
C_FAMILY => C_FAMILY
)
port map (
A => addr_out_s_h
(NUM_S_H_ADDR_BITS-OFFSET-CE_ADDR_SIZE
to NUM_S_H_ADDR_BITS - OFFSET - 1) ,
AValid => pselect_hit_i(bar_index) ,
CS => ce_expnd_i(CE_INDEX_START+j)
);
end generate MULTIPLE_CES_THIS_CS_GEN;
--------------------------------------
----------------------------------------------------------------------
-- SINGLE_CE_THIS_CS_GEN: CE decoders for single CE
----------------------------------------------------------------------
SINGLE_CE_THIS_CS_GEN : if CE_ADDR_SIZE = 0 generate
ce_expnd_i(CE_INDEX_START+j) <= pselect_hit_i(bar_index);
end generate;
-------------
end generate PER_CE_GEN;
------------------------
end generate MEM_DECODE_GEN;
-- RNW_REG_P: Register the incoming RNW signal at the time of registering the
-- address. This is need to generate the CE's separately.
RNW_REG_P:process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(RW_CE_ld_enable='1')then
Bus_RNW_reg <= Bus_RNW_Erly;
end if;
end if;
end process RNW_REG_P;
---------------------------------------------------------------------------
-- GEN_BKEND_CE_REGISTERS
-- This ForGen implements the backend registering for
-- the CE, RdCE, and WrCE output buses.
---------------------------------------------------------------------------
GEN_BKEND_CE_REGISTERS : for ce_index in 0 to NUM_CE_SIGNALS-1 generate
signal rdce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
------
begin
------
BKEND_RDCE_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(cs_ce_clr='1')then
ce_out_i(ce_index) <= '0';
elsif(RW_CE_ld_enable='1')then
ce_out_i(ce_index) <= ce_expnd_i(ce_index);
end if;
end if;
end process BKEND_RDCE_REG;
rdce_out_i(ce_index) <= ce_out_i(ce_index) and Bus_RNW_reg;
wrce_out_i(ce_index) <= ce_out_i(ce_index) and not Bus_RNW_reg;
-------------------------------
end generate GEN_BKEND_CE_REGISTERS;
-------------------------------------------------------------------------------
CS_for_gaps <= '0'; -- Removed the GAP adecoder logic
---------------------------------
CS_Out <= cs_out_i ;
RdCE_Out <= rdce_out_i ;
WrCE_Out <= wrce_out_i ;
end architecture IMP;
|
-------------------------------------------------------------------
-- (c) Copyright 1984 - 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
-------------------------------------------------------------------
-- ************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: address_decoder.vhd
-- Version: v2.0
-- Description: Address decoder utilizing unconstrained arrays for Base
-- Address specification and ce number.
-------------------------------------------------------------------------------
-- Structure: This section shows the hierarchical structure of axi_lite_ipif.
--
-- --axi_lite_ipif.vhd
-- --slave_attachment.vhd
-- --address_decoder.vhd
-------------------------------------------------------------------------------
-- Author: BSB
--
-- History:
--
-- BSB 05/20/10 -- First version
-- ~~~~~~
-- - Created the first version v1.00.a
-- ^^^^^^
-- ~~~~~~
-- SK 08/09/2010 --
-- - updated the core with optimziation. Closed CR 574507
-- - combined the CE generation logic to further optimize the code.
-- ^^^^^^
-- ~~~~~~
-- SK 12/16/12 -- v2.0
-- 1. up reved to major version for 2013.1 Vivado release. No logic updates.
-- 2. Updated the version of AXI LITE IPIF to v2.0 in X.Y format
-- 3. updated the proc common version to proc_common_base_v5_0
-- 4. No Logic Updates
-- ^^^^^^
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_cmb"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use ieee.numeric_std.all;
--library proc_common_base_v5_0;
--use proc_common_base_v5_0.proc_common_pkg.clog2;
--use proc_common_base_v5_0.pselect_f;
--use proc_common_base_v5_0.ipif_pkg.all;
library axi_lite_ipif_v3_0;
use axi_lite_ipif_v3_0.ipif_pkg.all;
-------------------------------------------------------------------------------
-- Definition of Generics
-------------------------------------------------------------------------------
-- C_BUS_AWIDTH -- Address bus width
-- C_S_AXI_MIN_SIZE -- Minimum address range of the IP
-- C_ARD_ADDR_RANGE_ARRAY-- Base /High Address Pair for each Address Range
-- C_ARD_NUM_CE_ARRAY -- Desired number of chip enables for an address range
-- C_FAMILY -- Target FPGA family
-------------------------------------------------------------------------------
-- Definition of Ports
-------------------------------------------------------------------------------
-- Bus_clk -- Clock
-- Bus_rst -- Reset
-- Address_In_Erly -- Adddress in
-- Address_Valid_Erly -- Address is valid
-- Bus_RNW -- Read or write registered
-- Bus_RNW_Erly -- Read or Write
-- CS_CE_ld_enable -- chip select and chip enable registered
-- Clear_CS_CE_Reg -- Clear_CS_CE_Reg clear
-- RW_CE_ld_enable -- Read or Write Chip Enable
-- CS_for_gaps -- CS generation for the gaps between address ranges
-- CS_Out -- Chip select
-- RdCE_Out -- Read Chip enable
-- WrCE_Out -- Write chip enable
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Entity Declaration
-------------------------------------------------------------------------------
entity address_decoder is
generic (
C_BUS_AWIDTH : integer := 32;
C_S_AXI_MIN_SIZE : std_logic_vector(0 to 31) := X"000001FF";
C_ARD_ADDR_RANGE_ARRAY: SLV64_ARRAY_TYPE :=
(
X"0000_0000_1000_0000", -- IP user0 base address
X"0000_0000_1000_01FF", -- IP user0 high address
X"0000_0000_1000_0200", -- IP user1 base address
X"0000_0000_1000_02FF" -- IP user1 high address
);
C_ARD_NUM_CE_ARRAY : INTEGER_ARRAY_TYPE :=
(
8, -- User0 CE Number
1 -- User1 CE Number
);
C_FAMILY : string := "virtex6"
);
port (
Bus_clk : in std_logic;
Bus_rst : in std_logic;
-- PLB Interface signals
Address_In_Erly : in std_logic_vector(0 to C_BUS_AWIDTH-1);
Address_Valid_Erly : in std_logic;
Bus_RNW : in std_logic;
Bus_RNW_Erly : in std_logic;
-- Registering control signals
CS_CE_ld_enable : in std_logic;
Clear_CS_CE_Reg : in std_logic;
RW_CE_ld_enable : in std_logic;
CS_for_gaps : out std_logic;
-- Decode output signals
CS_Out : out std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
RdCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1);
WrCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1)
);
end entity address_decoder;
-------------------------------------------------------------------------------
-- Architecture section
-------------------------------------------------------------------------------
architecture IMP of address_decoder is
----------------------------------------------------------------------------------
-- below attributes are added to reduce the synth warnings in Vivado tool
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of imp : architecture is "yes";
----------------------------------------------------------------------------------
-- local type declarations ----------------------------------------------------
type decode_bit_array_type is Array(natural range 0 to (
(C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1) of
integer;
type short_addr_array_type is Array(natural range 0 to
C_ARD_ADDR_RANGE_ARRAY'LENGTH-1) of
std_logic_vector(0 to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- Function Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- This function converts a 64 bit address range array to a AWIDTH bit
-- address range array.
-------------------------------------------------------------------------------
function slv64_2_slv_awidth(slv64_addr_array : SLV64_ARRAY_TYPE;
awidth : integer)
return short_addr_array_type is
variable temp_addr : std_logic_vector(0 to 63);
variable slv_array : short_addr_array_type;
begin
for array_index in 0 to slv64_addr_array'length-1 loop
temp_addr := slv64_addr_array(array_index);
slv_array(array_index) := temp_addr((64-awidth) to 63);
end loop;
return(slv_array);
end function slv64_2_slv_awidth;
-------------------------------------------------------------------------------
--Function Addr_bits
--function to convert an address range (base address and an upper address)
--into the number of upper address bits needed for decoding a device
--select signal. will handle slices and big or little endian
-------------------------------------------------------------------------------
function Addr_Bits (x,y : std_logic_vector(0 to C_BUS_AWIDTH-1))
return integer is
variable addr_nor : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
addr_nor := x xor y;
for i in 0 to C_BUS_AWIDTH-1 loop
if addr_nor(i)='1' then
return i;
end if;
end loop;
--coverage off
return(C_BUS_AWIDTH);
--coverage on
end function Addr_Bits;
-------------------------------------------------------------------------------
--Function Get_Addr_Bits
--function calculates the array which has the decode bits for the each address
--range.
-------------------------------------------------------------------------------
function Get_Addr_Bits (baseaddrs : short_addr_array_type)
return decode_bit_array_type is
variable num_bits : decode_bit_array_type;
begin
for i in 0 to ((baseaddrs'length)/2)-1 loop
num_bits(i) := Addr_Bits (baseaddrs(i*2),
baseaddrs(i*2+1));
end loop;
return(num_bits);
end function Get_Addr_Bits;
-------------------------------------------------------------------------------
-- NEEDED_ADDR_BITS
--
-- Function Description:
-- This function calculates the number of address bits required
-- to support the CE generation logic. This is determined by
-- multiplying the number of CEs for an address space by the
-- data width of the address space (in bytes). Each address
-- space entry is processed and the biggest of the spaces is
-- used to set the number of address bits required to be latched
-- and used for CE decoding. A minimum value of 1 is returned by
-- this function.
--
-------------------------------------------------------------------------------
function needed_addr_bits (ce_array : INTEGER_ARRAY_TYPE)
return integer is
constant NUM_CE_ENTRIES : integer := CE_ARRAY'length;
variable biggest : integer := 2;
variable req_ce_addr_size : integer := 0;
variable num_addr_bits : integer := 0;
begin
for i in 0 to NUM_CE_ENTRIES-1 loop
req_ce_addr_size := ce_array(i) * 4;
if (req_ce_addr_size > biggest) Then
biggest := req_ce_addr_size;
end if;
end loop;
num_addr_bits := clog2(biggest);
return(num_addr_bits);
end function NEEDED_ADDR_BITS;
-----------------------------------------------------------------------------
-- Function calc_high_address
--
-- This function is used to calculate the high address of the each address
-- range
-----------------------------------------------------------------------------
function calc_high_address (high_address : short_addr_array_type;
index : integer) return std_logic_vector is
variable calc_high_addr : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
If (index = (C_ARD_ADDR_RANGE_ARRAY'length/2-1)) Then
calc_high_addr := C_S_AXI_MIN_SIZE(32-C_BUS_AWIDTH to 31);
else
calc_high_addr := high_address(index*2+2);
end if;
return(calc_high_addr);
end function calc_high_address;
----------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
constant ARD_ADDR_RANGE_ARRAY : short_addr_array_type :=
slv64_2_slv_awidth(C_ARD_ADDR_RANGE_ARRAY,
C_BUS_AWIDTH);
constant NUM_BASE_ADDRS : integer := (C_ARD_ADDR_RANGE_ARRAY'length)/2;
constant DECODE_BITS : decode_bit_array_type :=
Get_Addr_Bits(ARD_ADDR_RANGE_ARRAY);
constant NUM_CE_SIGNALS : integer :=
calc_num_ce(C_ARD_NUM_CE_ARRAY);
constant NUM_S_H_ADDR_BITS : integer :=
needed_addr_bits(C_ARD_NUM_CE_ARRAY);
-------------------------------------------------------------------------------
-- Signal Declarations
-------------------------------------------------------------------------------
signal pselect_hit_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal cs_out_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal ce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal rdce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal ce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1); --
signal cs_ce_clr : std_logic;
signal addr_out_s_h : std_logic_vector(0 to NUM_S_H_ADDR_BITS-1);
signal Bus_RNW_reg : std_logic;
-------------------------------------------------------------------------------
-- Begin architecture
-------------------------------------------------------------------------------
begin -- architecture IMP
-- Register clears
cs_ce_clr <= not Bus_rst or Clear_CS_CE_Reg;
addr_out_s_h <= Address_In_Erly(C_BUS_AWIDTH-NUM_S_H_ADDR_BITS
to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- MEM_DECODE_GEN: Universal Address Decode Block
-------------------------------------------------------------------------------
MEM_DECODE_GEN: for bar_index in 0 to NUM_BASE_ADDRS-1 generate
---------------
constant CE_INDEX_START : integer
:= calc_start_ce_index(C_ARD_NUM_CE_ARRAY,bar_index);
constant CE_ADDR_SIZE : Integer range 0 to 15
:= clog2(C_ARD_NUM_CE_ARRAY(bar_index));
constant OFFSET : integer := 2;
constant BASE_ADDR_x : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= ARD_ADDR_RANGE_ARRAY(bar_index*2+1);
constant HIGH_ADDR_X : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= calc_high_address(ARD_ADDR_RANGE_ARRAY,bar_index);
--constant DECODE_BITS_0 : integer:= DECODE_BITS(0);
---------
begin
---------
-- GEN_FOR_MULTI_CS: Below logic generates the CS for decoded address
-- -----------------
GEN_FOR_MULTI_CS : if C_ARD_ADDR_RANGE_ARRAY'length > 2 generate
-- Instantiate the basic Base Address Decoders
MEM_SELECT_I: entity axi_lite_ipif_v3_0.pselect_f
generic map
(
C_AB => DECODE_BITS(bar_index),
C_AW => C_BUS_AWIDTH,
C_BAR => ARD_ADDR_RANGE_ARRAY(bar_index*2),
C_FAMILY => C_FAMILY
)
port map
(
A => Address_In_Erly, -- [in]
AValid => Address_Valid_Erly, -- [in]
CS => pselect_hit_i(bar_index) -- [out]
);
end generate GEN_FOR_MULTI_CS;
-- GEN_FOR_ONE_CS: below logic decodes the CS for single address range
-- ---------------
GEN_FOR_ONE_CS : if C_ARD_ADDR_RANGE_ARRAY'length = 2 generate
pselect_hit_i(bar_index) <= Address_Valid_Erly;
end generate GEN_FOR_ONE_CS;
-- Instantate backend registers for the Chip Selects
BKEND_CS_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(Bus_Rst='0' or Clear_CS_CE_Reg = '1')then
cs_out_i(bar_index) <= '0';
elsif(CS_CE_ld_enable='1')then
cs_out_i(bar_index) <= pselect_hit_i(bar_index);
end if;
end if;
end process BKEND_CS_REG;
-------------------------------------------------------------------------
-- PER_CE_GEN: Now expand the individual CEs for each base address.
-------------------------------------------------------------------------
PER_CE_GEN: for j in 0 to C_ARD_NUM_CE_ARRAY(bar_index) - 1 generate
-----------
begin
-----------
----------------------------------------------------------------------
-- CE decoders for multiple CE's
----------------------------------------------------------------------
MULTIPLE_CES_THIS_CS_GEN : if CE_ADDR_SIZE > 0 generate
constant BAR : std_logic_vector(0 to CE_ADDR_SIZE-1) :=
std_logic_vector(to_unsigned(j,CE_ADDR_SIZE));
begin
CE_I : entity axi_lite_ipif_v3_0.pselect_f
generic map (
C_AB => CE_ADDR_SIZE ,
C_AW => CE_ADDR_SIZE ,
C_BAR => BAR ,
C_FAMILY => C_FAMILY
)
port map (
A => addr_out_s_h
(NUM_S_H_ADDR_BITS-OFFSET-CE_ADDR_SIZE
to NUM_S_H_ADDR_BITS - OFFSET - 1) ,
AValid => pselect_hit_i(bar_index) ,
CS => ce_expnd_i(CE_INDEX_START+j)
);
end generate MULTIPLE_CES_THIS_CS_GEN;
--------------------------------------
----------------------------------------------------------------------
-- SINGLE_CE_THIS_CS_GEN: CE decoders for single CE
----------------------------------------------------------------------
SINGLE_CE_THIS_CS_GEN : if CE_ADDR_SIZE = 0 generate
ce_expnd_i(CE_INDEX_START+j) <= pselect_hit_i(bar_index);
end generate;
-------------
end generate PER_CE_GEN;
------------------------
end generate MEM_DECODE_GEN;
-- RNW_REG_P: Register the incoming RNW signal at the time of registering the
-- address. This is need to generate the CE's separately.
RNW_REG_P:process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(RW_CE_ld_enable='1')then
Bus_RNW_reg <= Bus_RNW_Erly;
end if;
end if;
end process RNW_REG_P;
---------------------------------------------------------------------------
-- GEN_BKEND_CE_REGISTERS
-- This ForGen implements the backend registering for
-- the CE, RdCE, and WrCE output buses.
---------------------------------------------------------------------------
GEN_BKEND_CE_REGISTERS : for ce_index in 0 to NUM_CE_SIGNALS-1 generate
signal rdce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
------
begin
------
BKEND_RDCE_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(cs_ce_clr='1')then
ce_out_i(ce_index) <= '0';
elsif(RW_CE_ld_enable='1')then
ce_out_i(ce_index) <= ce_expnd_i(ce_index);
end if;
end if;
end process BKEND_RDCE_REG;
rdce_out_i(ce_index) <= ce_out_i(ce_index) and Bus_RNW_reg;
wrce_out_i(ce_index) <= ce_out_i(ce_index) and not Bus_RNW_reg;
-------------------------------
end generate GEN_BKEND_CE_REGISTERS;
-------------------------------------------------------------------------------
CS_for_gaps <= '0'; -- Removed the GAP adecoder logic
---------------------------------
CS_Out <= cs_out_i ;
RdCE_Out <= rdce_out_i ;
WrCE_Out <= wrce_out_i ;
end architecture IMP;
|
-------------------------------------------------------------------
-- (c) Copyright 1984 - 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
-------------------------------------------------------------------
-- ************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: address_decoder.vhd
-- Version: v2.0
-- Description: Address decoder utilizing unconstrained arrays for Base
-- Address specification and ce number.
-------------------------------------------------------------------------------
-- Structure: This section shows the hierarchical structure of axi_lite_ipif.
--
-- --axi_lite_ipif.vhd
-- --slave_attachment.vhd
-- --address_decoder.vhd
-------------------------------------------------------------------------------
-- Author: BSB
--
-- History:
--
-- BSB 05/20/10 -- First version
-- ~~~~~~
-- - Created the first version v1.00.a
-- ^^^^^^
-- ~~~~~~
-- SK 08/09/2010 --
-- - updated the core with optimziation. Closed CR 574507
-- - combined the CE generation logic to further optimize the code.
-- ^^^^^^
-- ~~~~~~
-- SK 12/16/12 -- v2.0
-- 1. up reved to major version for 2013.1 Vivado release. No logic updates.
-- 2. Updated the version of AXI LITE IPIF to v2.0 in X.Y format
-- 3. updated the proc common version to proc_common_base_v5_0
-- 4. No Logic Updates
-- ^^^^^^
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_cmb"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use ieee.numeric_std.all;
--library proc_common_base_v5_0;
--use proc_common_base_v5_0.proc_common_pkg.clog2;
--use proc_common_base_v5_0.pselect_f;
--use proc_common_base_v5_0.ipif_pkg.all;
library axi_lite_ipif_v3_0;
use axi_lite_ipif_v3_0.ipif_pkg.all;
-------------------------------------------------------------------------------
-- Definition of Generics
-------------------------------------------------------------------------------
-- C_BUS_AWIDTH -- Address bus width
-- C_S_AXI_MIN_SIZE -- Minimum address range of the IP
-- C_ARD_ADDR_RANGE_ARRAY-- Base /High Address Pair for each Address Range
-- C_ARD_NUM_CE_ARRAY -- Desired number of chip enables for an address range
-- C_FAMILY -- Target FPGA family
-------------------------------------------------------------------------------
-- Definition of Ports
-------------------------------------------------------------------------------
-- Bus_clk -- Clock
-- Bus_rst -- Reset
-- Address_In_Erly -- Adddress in
-- Address_Valid_Erly -- Address is valid
-- Bus_RNW -- Read or write registered
-- Bus_RNW_Erly -- Read or Write
-- CS_CE_ld_enable -- chip select and chip enable registered
-- Clear_CS_CE_Reg -- Clear_CS_CE_Reg clear
-- RW_CE_ld_enable -- Read or Write Chip Enable
-- CS_for_gaps -- CS generation for the gaps between address ranges
-- CS_Out -- Chip select
-- RdCE_Out -- Read Chip enable
-- WrCE_Out -- Write chip enable
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Entity Declaration
-------------------------------------------------------------------------------
entity address_decoder is
generic (
C_BUS_AWIDTH : integer := 32;
C_S_AXI_MIN_SIZE : std_logic_vector(0 to 31) := X"000001FF";
C_ARD_ADDR_RANGE_ARRAY: SLV64_ARRAY_TYPE :=
(
X"0000_0000_1000_0000", -- IP user0 base address
X"0000_0000_1000_01FF", -- IP user0 high address
X"0000_0000_1000_0200", -- IP user1 base address
X"0000_0000_1000_02FF" -- IP user1 high address
);
C_ARD_NUM_CE_ARRAY : INTEGER_ARRAY_TYPE :=
(
8, -- User0 CE Number
1 -- User1 CE Number
);
C_FAMILY : string := "virtex6"
);
port (
Bus_clk : in std_logic;
Bus_rst : in std_logic;
-- PLB Interface signals
Address_In_Erly : in std_logic_vector(0 to C_BUS_AWIDTH-1);
Address_Valid_Erly : in std_logic;
Bus_RNW : in std_logic;
Bus_RNW_Erly : in std_logic;
-- Registering control signals
CS_CE_ld_enable : in std_logic;
Clear_CS_CE_Reg : in std_logic;
RW_CE_ld_enable : in std_logic;
CS_for_gaps : out std_logic;
-- Decode output signals
CS_Out : out std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
RdCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1);
WrCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1)
);
end entity address_decoder;
-------------------------------------------------------------------------------
-- Architecture section
-------------------------------------------------------------------------------
architecture IMP of address_decoder is
----------------------------------------------------------------------------------
-- below attributes are added to reduce the synth warnings in Vivado tool
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of imp : architecture is "yes";
----------------------------------------------------------------------------------
-- local type declarations ----------------------------------------------------
type decode_bit_array_type is Array(natural range 0 to (
(C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1) of
integer;
type short_addr_array_type is Array(natural range 0 to
C_ARD_ADDR_RANGE_ARRAY'LENGTH-1) of
std_logic_vector(0 to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- Function Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- This function converts a 64 bit address range array to a AWIDTH bit
-- address range array.
-------------------------------------------------------------------------------
function slv64_2_slv_awidth(slv64_addr_array : SLV64_ARRAY_TYPE;
awidth : integer)
return short_addr_array_type is
variable temp_addr : std_logic_vector(0 to 63);
variable slv_array : short_addr_array_type;
begin
for array_index in 0 to slv64_addr_array'length-1 loop
temp_addr := slv64_addr_array(array_index);
slv_array(array_index) := temp_addr((64-awidth) to 63);
end loop;
return(slv_array);
end function slv64_2_slv_awidth;
-------------------------------------------------------------------------------
--Function Addr_bits
--function to convert an address range (base address and an upper address)
--into the number of upper address bits needed for decoding a device
--select signal. will handle slices and big or little endian
-------------------------------------------------------------------------------
function Addr_Bits (x,y : std_logic_vector(0 to C_BUS_AWIDTH-1))
return integer is
variable addr_nor : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
addr_nor := x xor y;
for i in 0 to C_BUS_AWIDTH-1 loop
if addr_nor(i)='1' then
return i;
end if;
end loop;
--coverage off
return(C_BUS_AWIDTH);
--coverage on
end function Addr_Bits;
-------------------------------------------------------------------------------
--Function Get_Addr_Bits
--function calculates the array which has the decode bits for the each address
--range.
-------------------------------------------------------------------------------
function Get_Addr_Bits (baseaddrs : short_addr_array_type)
return decode_bit_array_type is
variable num_bits : decode_bit_array_type;
begin
for i in 0 to ((baseaddrs'length)/2)-1 loop
num_bits(i) := Addr_Bits (baseaddrs(i*2),
baseaddrs(i*2+1));
end loop;
return(num_bits);
end function Get_Addr_Bits;
-------------------------------------------------------------------------------
-- NEEDED_ADDR_BITS
--
-- Function Description:
-- This function calculates the number of address bits required
-- to support the CE generation logic. This is determined by
-- multiplying the number of CEs for an address space by the
-- data width of the address space (in bytes). Each address
-- space entry is processed and the biggest of the spaces is
-- used to set the number of address bits required to be latched
-- and used for CE decoding. A minimum value of 1 is returned by
-- this function.
--
-------------------------------------------------------------------------------
function needed_addr_bits (ce_array : INTEGER_ARRAY_TYPE)
return integer is
constant NUM_CE_ENTRIES : integer := CE_ARRAY'length;
variable biggest : integer := 2;
variable req_ce_addr_size : integer := 0;
variable num_addr_bits : integer := 0;
begin
for i in 0 to NUM_CE_ENTRIES-1 loop
req_ce_addr_size := ce_array(i) * 4;
if (req_ce_addr_size > biggest) Then
biggest := req_ce_addr_size;
end if;
end loop;
num_addr_bits := clog2(biggest);
return(num_addr_bits);
end function NEEDED_ADDR_BITS;
-----------------------------------------------------------------------------
-- Function calc_high_address
--
-- This function is used to calculate the high address of the each address
-- range
-----------------------------------------------------------------------------
function calc_high_address (high_address : short_addr_array_type;
index : integer) return std_logic_vector is
variable calc_high_addr : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
If (index = (C_ARD_ADDR_RANGE_ARRAY'length/2-1)) Then
calc_high_addr := C_S_AXI_MIN_SIZE(32-C_BUS_AWIDTH to 31);
else
calc_high_addr := high_address(index*2+2);
end if;
return(calc_high_addr);
end function calc_high_address;
----------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
constant ARD_ADDR_RANGE_ARRAY : short_addr_array_type :=
slv64_2_slv_awidth(C_ARD_ADDR_RANGE_ARRAY,
C_BUS_AWIDTH);
constant NUM_BASE_ADDRS : integer := (C_ARD_ADDR_RANGE_ARRAY'length)/2;
constant DECODE_BITS : decode_bit_array_type :=
Get_Addr_Bits(ARD_ADDR_RANGE_ARRAY);
constant NUM_CE_SIGNALS : integer :=
calc_num_ce(C_ARD_NUM_CE_ARRAY);
constant NUM_S_H_ADDR_BITS : integer :=
needed_addr_bits(C_ARD_NUM_CE_ARRAY);
-------------------------------------------------------------------------------
-- Signal Declarations
-------------------------------------------------------------------------------
signal pselect_hit_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal cs_out_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal ce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal rdce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal ce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1); --
signal cs_ce_clr : std_logic;
signal addr_out_s_h : std_logic_vector(0 to NUM_S_H_ADDR_BITS-1);
signal Bus_RNW_reg : std_logic;
-------------------------------------------------------------------------------
-- Begin architecture
-------------------------------------------------------------------------------
begin -- architecture IMP
-- Register clears
cs_ce_clr <= not Bus_rst or Clear_CS_CE_Reg;
addr_out_s_h <= Address_In_Erly(C_BUS_AWIDTH-NUM_S_H_ADDR_BITS
to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- MEM_DECODE_GEN: Universal Address Decode Block
-------------------------------------------------------------------------------
MEM_DECODE_GEN: for bar_index in 0 to NUM_BASE_ADDRS-1 generate
---------------
constant CE_INDEX_START : integer
:= calc_start_ce_index(C_ARD_NUM_CE_ARRAY,bar_index);
constant CE_ADDR_SIZE : Integer range 0 to 15
:= clog2(C_ARD_NUM_CE_ARRAY(bar_index));
constant OFFSET : integer := 2;
constant BASE_ADDR_x : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= ARD_ADDR_RANGE_ARRAY(bar_index*2+1);
constant HIGH_ADDR_X : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= calc_high_address(ARD_ADDR_RANGE_ARRAY,bar_index);
--constant DECODE_BITS_0 : integer:= DECODE_BITS(0);
---------
begin
---------
-- GEN_FOR_MULTI_CS: Below logic generates the CS for decoded address
-- -----------------
GEN_FOR_MULTI_CS : if C_ARD_ADDR_RANGE_ARRAY'length > 2 generate
-- Instantiate the basic Base Address Decoders
MEM_SELECT_I: entity axi_lite_ipif_v3_0.pselect_f
generic map
(
C_AB => DECODE_BITS(bar_index),
C_AW => C_BUS_AWIDTH,
C_BAR => ARD_ADDR_RANGE_ARRAY(bar_index*2),
C_FAMILY => C_FAMILY
)
port map
(
A => Address_In_Erly, -- [in]
AValid => Address_Valid_Erly, -- [in]
CS => pselect_hit_i(bar_index) -- [out]
);
end generate GEN_FOR_MULTI_CS;
-- GEN_FOR_ONE_CS: below logic decodes the CS for single address range
-- ---------------
GEN_FOR_ONE_CS : if C_ARD_ADDR_RANGE_ARRAY'length = 2 generate
pselect_hit_i(bar_index) <= Address_Valid_Erly;
end generate GEN_FOR_ONE_CS;
-- Instantate backend registers for the Chip Selects
BKEND_CS_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(Bus_Rst='0' or Clear_CS_CE_Reg = '1')then
cs_out_i(bar_index) <= '0';
elsif(CS_CE_ld_enable='1')then
cs_out_i(bar_index) <= pselect_hit_i(bar_index);
end if;
end if;
end process BKEND_CS_REG;
-------------------------------------------------------------------------
-- PER_CE_GEN: Now expand the individual CEs for each base address.
-------------------------------------------------------------------------
PER_CE_GEN: for j in 0 to C_ARD_NUM_CE_ARRAY(bar_index) - 1 generate
-----------
begin
-----------
----------------------------------------------------------------------
-- CE decoders for multiple CE's
----------------------------------------------------------------------
MULTIPLE_CES_THIS_CS_GEN : if CE_ADDR_SIZE > 0 generate
constant BAR : std_logic_vector(0 to CE_ADDR_SIZE-1) :=
std_logic_vector(to_unsigned(j,CE_ADDR_SIZE));
begin
CE_I : entity axi_lite_ipif_v3_0.pselect_f
generic map (
C_AB => CE_ADDR_SIZE ,
C_AW => CE_ADDR_SIZE ,
C_BAR => BAR ,
C_FAMILY => C_FAMILY
)
port map (
A => addr_out_s_h
(NUM_S_H_ADDR_BITS-OFFSET-CE_ADDR_SIZE
to NUM_S_H_ADDR_BITS - OFFSET - 1) ,
AValid => pselect_hit_i(bar_index) ,
CS => ce_expnd_i(CE_INDEX_START+j)
);
end generate MULTIPLE_CES_THIS_CS_GEN;
--------------------------------------
----------------------------------------------------------------------
-- SINGLE_CE_THIS_CS_GEN: CE decoders for single CE
----------------------------------------------------------------------
SINGLE_CE_THIS_CS_GEN : if CE_ADDR_SIZE = 0 generate
ce_expnd_i(CE_INDEX_START+j) <= pselect_hit_i(bar_index);
end generate;
-------------
end generate PER_CE_GEN;
------------------------
end generate MEM_DECODE_GEN;
-- RNW_REG_P: Register the incoming RNW signal at the time of registering the
-- address. This is need to generate the CE's separately.
RNW_REG_P:process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(RW_CE_ld_enable='1')then
Bus_RNW_reg <= Bus_RNW_Erly;
end if;
end if;
end process RNW_REG_P;
---------------------------------------------------------------------------
-- GEN_BKEND_CE_REGISTERS
-- This ForGen implements the backend registering for
-- the CE, RdCE, and WrCE output buses.
---------------------------------------------------------------------------
GEN_BKEND_CE_REGISTERS : for ce_index in 0 to NUM_CE_SIGNALS-1 generate
signal rdce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
------
begin
------
BKEND_RDCE_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(cs_ce_clr='1')then
ce_out_i(ce_index) <= '0';
elsif(RW_CE_ld_enable='1')then
ce_out_i(ce_index) <= ce_expnd_i(ce_index);
end if;
end if;
end process BKEND_RDCE_REG;
rdce_out_i(ce_index) <= ce_out_i(ce_index) and Bus_RNW_reg;
wrce_out_i(ce_index) <= ce_out_i(ce_index) and not Bus_RNW_reg;
-------------------------------
end generate GEN_BKEND_CE_REGISTERS;
-------------------------------------------------------------------------------
CS_for_gaps <= '0'; -- Removed the GAP adecoder logic
---------------------------------
CS_Out <= cs_out_i ;
RdCE_Out <= rdce_out_i ;
WrCE_Out <= wrce_out_i ;
end architecture IMP;
|
-------------------------------------------------------------------
-- (c) Copyright 1984 - 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
-------------------------------------------------------------------
-- ************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: address_decoder.vhd
-- Version: v2.0
-- Description: Address decoder utilizing unconstrained arrays for Base
-- Address specification and ce number.
-------------------------------------------------------------------------------
-- Structure: This section shows the hierarchical structure of axi_lite_ipif.
--
-- --axi_lite_ipif.vhd
-- --slave_attachment.vhd
-- --address_decoder.vhd
-------------------------------------------------------------------------------
-- Author: BSB
--
-- History:
--
-- BSB 05/20/10 -- First version
-- ~~~~~~
-- - Created the first version v1.00.a
-- ^^^^^^
-- ~~~~~~
-- SK 08/09/2010 --
-- - updated the core with optimziation. Closed CR 574507
-- - combined the CE generation logic to further optimize the code.
-- ^^^^^^
-- ~~~~~~
-- SK 12/16/12 -- v2.0
-- 1. up reved to major version for 2013.1 Vivado release. No logic updates.
-- 2. Updated the version of AXI LITE IPIF to v2.0 in X.Y format
-- 3. updated the proc common version to proc_common_base_v5_0
-- 4. No Logic Updates
-- ^^^^^^
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_cmb"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use ieee.numeric_std.all;
--library proc_common_base_v5_0;
--use proc_common_base_v5_0.proc_common_pkg.clog2;
--use proc_common_base_v5_0.pselect_f;
--use proc_common_base_v5_0.ipif_pkg.all;
library axi_lite_ipif_v3_0;
use axi_lite_ipif_v3_0.ipif_pkg.all;
-------------------------------------------------------------------------------
-- Definition of Generics
-------------------------------------------------------------------------------
-- C_BUS_AWIDTH -- Address bus width
-- C_S_AXI_MIN_SIZE -- Minimum address range of the IP
-- C_ARD_ADDR_RANGE_ARRAY-- Base /High Address Pair for each Address Range
-- C_ARD_NUM_CE_ARRAY -- Desired number of chip enables for an address range
-- C_FAMILY -- Target FPGA family
-------------------------------------------------------------------------------
-- Definition of Ports
-------------------------------------------------------------------------------
-- Bus_clk -- Clock
-- Bus_rst -- Reset
-- Address_In_Erly -- Adddress in
-- Address_Valid_Erly -- Address is valid
-- Bus_RNW -- Read or write registered
-- Bus_RNW_Erly -- Read or Write
-- CS_CE_ld_enable -- chip select and chip enable registered
-- Clear_CS_CE_Reg -- Clear_CS_CE_Reg clear
-- RW_CE_ld_enable -- Read or Write Chip Enable
-- CS_for_gaps -- CS generation for the gaps between address ranges
-- CS_Out -- Chip select
-- RdCE_Out -- Read Chip enable
-- WrCE_Out -- Write chip enable
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Entity Declaration
-------------------------------------------------------------------------------
entity address_decoder is
generic (
C_BUS_AWIDTH : integer := 32;
C_S_AXI_MIN_SIZE : std_logic_vector(0 to 31) := X"000001FF";
C_ARD_ADDR_RANGE_ARRAY: SLV64_ARRAY_TYPE :=
(
X"0000_0000_1000_0000", -- IP user0 base address
X"0000_0000_1000_01FF", -- IP user0 high address
X"0000_0000_1000_0200", -- IP user1 base address
X"0000_0000_1000_02FF" -- IP user1 high address
);
C_ARD_NUM_CE_ARRAY : INTEGER_ARRAY_TYPE :=
(
8, -- User0 CE Number
1 -- User1 CE Number
);
C_FAMILY : string := "virtex6"
);
port (
Bus_clk : in std_logic;
Bus_rst : in std_logic;
-- PLB Interface signals
Address_In_Erly : in std_logic_vector(0 to C_BUS_AWIDTH-1);
Address_Valid_Erly : in std_logic;
Bus_RNW : in std_logic;
Bus_RNW_Erly : in std_logic;
-- Registering control signals
CS_CE_ld_enable : in std_logic;
Clear_CS_CE_Reg : in std_logic;
RW_CE_ld_enable : in std_logic;
CS_for_gaps : out std_logic;
-- Decode output signals
CS_Out : out std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
RdCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1);
WrCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1)
);
end entity address_decoder;
-------------------------------------------------------------------------------
-- Architecture section
-------------------------------------------------------------------------------
architecture IMP of address_decoder is
----------------------------------------------------------------------------------
-- below attributes are added to reduce the synth warnings in Vivado tool
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of imp : architecture is "yes";
----------------------------------------------------------------------------------
-- local type declarations ----------------------------------------------------
type decode_bit_array_type is Array(natural range 0 to (
(C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1) of
integer;
type short_addr_array_type is Array(natural range 0 to
C_ARD_ADDR_RANGE_ARRAY'LENGTH-1) of
std_logic_vector(0 to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- Function Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- This function converts a 64 bit address range array to a AWIDTH bit
-- address range array.
-------------------------------------------------------------------------------
function slv64_2_slv_awidth(slv64_addr_array : SLV64_ARRAY_TYPE;
awidth : integer)
return short_addr_array_type is
variable temp_addr : std_logic_vector(0 to 63);
variable slv_array : short_addr_array_type;
begin
for array_index in 0 to slv64_addr_array'length-1 loop
temp_addr := slv64_addr_array(array_index);
slv_array(array_index) := temp_addr((64-awidth) to 63);
end loop;
return(slv_array);
end function slv64_2_slv_awidth;
-------------------------------------------------------------------------------
--Function Addr_bits
--function to convert an address range (base address and an upper address)
--into the number of upper address bits needed for decoding a device
--select signal. will handle slices and big or little endian
-------------------------------------------------------------------------------
function Addr_Bits (x,y : std_logic_vector(0 to C_BUS_AWIDTH-1))
return integer is
variable addr_nor : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
addr_nor := x xor y;
for i in 0 to C_BUS_AWIDTH-1 loop
if addr_nor(i)='1' then
return i;
end if;
end loop;
--coverage off
return(C_BUS_AWIDTH);
--coverage on
end function Addr_Bits;
-------------------------------------------------------------------------------
--Function Get_Addr_Bits
--function calculates the array which has the decode bits for the each address
--range.
-------------------------------------------------------------------------------
function Get_Addr_Bits (baseaddrs : short_addr_array_type)
return decode_bit_array_type is
variable num_bits : decode_bit_array_type;
begin
for i in 0 to ((baseaddrs'length)/2)-1 loop
num_bits(i) := Addr_Bits (baseaddrs(i*2),
baseaddrs(i*2+1));
end loop;
return(num_bits);
end function Get_Addr_Bits;
-------------------------------------------------------------------------------
-- NEEDED_ADDR_BITS
--
-- Function Description:
-- This function calculates the number of address bits required
-- to support the CE generation logic. This is determined by
-- multiplying the number of CEs for an address space by the
-- data width of the address space (in bytes). Each address
-- space entry is processed and the biggest of the spaces is
-- used to set the number of address bits required to be latched
-- and used for CE decoding. A minimum value of 1 is returned by
-- this function.
--
-------------------------------------------------------------------------------
function needed_addr_bits (ce_array : INTEGER_ARRAY_TYPE)
return integer is
constant NUM_CE_ENTRIES : integer := CE_ARRAY'length;
variable biggest : integer := 2;
variable req_ce_addr_size : integer := 0;
variable num_addr_bits : integer := 0;
begin
for i in 0 to NUM_CE_ENTRIES-1 loop
req_ce_addr_size := ce_array(i) * 4;
if (req_ce_addr_size > biggest) Then
biggest := req_ce_addr_size;
end if;
end loop;
num_addr_bits := clog2(biggest);
return(num_addr_bits);
end function NEEDED_ADDR_BITS;
-----------------------------------------------------------------------------
-- Function calc_high_address
--
-- This function is used to calculate the high address of the each address
-- range
-----------------------------------------------------------------------------
function calc_high_address (high_address : short_addr_array_type;
index : integer) return std_logic_vector is
variable calc_high_addr : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
If (index = (C_ARD_ADDR_RANGE_ARRAY'length/2-1)) Then
calc_high_addr := C_S_AXI_MIN_SIZE(32-C_BUS_AWIDTH to 31);
else
calc_high_addr := high_address(index*2+2);
end if;
return(calc_high_addr);
end function calc_high_address;
----------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
constant ARD_ADDR_RANGE_ARRAY : short_addr_array_type :=
slv64_2_slv_awidth(C_ARD_ADDR_RANGE_ARRAY,
C_BUS_AWIDTH);
constant NUM_BASE_ADDRS : integer := (C_ARD_ADDR_RANGE_ARRAY'length)/2;
constant DECODE_BITS : decode_bit_array_type :=
Get_Addr_Bits(ARD_ADDR_RANGE_ARRAY);
constant NUM_CE_SIGNALS : integer :=
calc_num_ce(C_ARD_NUM_CE_ARRAY);
constant NUM_S_H_ADDR_BITS : integer :=
needed_addr_bits(C_ARD_NUM_CE_ARRAY);
-------------------------------------------------------------------------------
-- Signal Declarations
-------------------------------------------------------------------------------
signal pselect_hit_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal cs_out_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal ce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal rdce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal ce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1); --
signal cs_ce_clr : std_logic;
signal addr_out_s_h : std_logic_vector(0 to NUM_S_H_ADDR_BITS-1);
signal Bus_RNW_reg : std_logic;
-------------------------------------------------------------------------------
-- Begin architecture
-------------------------------------------------------------------------------
begin -- architecture IMP
-- Register clears
cs_ce_clr <= not Bus_rst or Clear_CS_CE_Reg;
addr_out_s_h <= Address_In_Erly(C_BUS_AWIDTH-NUM_S_H_ADDR_BITS
to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- MEM_DECODE_GEN: Universal Address Decode Block
-------------------------------------------------------------------------------
MEM_DECODE_GEN: for bar_index in 0 to NUM_BASE_ADDRS-1 generate
---------------
constant CE_INDEX_START : integer
:= calc_start_ce_index(C_ARD_NUM_CE_ARRAY,bar_index);
constant CE_ADDR_SIZE : Integer range 0 to 15
:= clog2(C_ARD_NUM_CE_ARRAY(bar_index));
constant OFFSET : integer := 2;
constant BASE_ADDR_x : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= ARD_ADDR_RANGE_ARRAY(bar_index*2+1);
constant HIGH_ADDR_X : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= calc_high_address(ARD_ADDR_RANGE_ARRAY,bar_index);
--constant DECODE_BITS_0 : integer:= DECODE_BITS(0);
---------
begin
---------
-- GEN_FOR_MULTI_CS: Below logic generates the CS for decoded address
-- -----------------
GEN_FOR_MULTI_CS : if C_ARD_ADDR_RANGE_ARRAY'length > 2 generate
-- Instantiate the basic Base Address Decoders
MEM_SELECT_I: entity axi_lite_ipif_v3_0.pselect_f
generic map
(
C_AB => DECODE_BITS(bar_index),
C_AW => C_BUS_AWIDTH,
C_BAR => ARD_ADDR_RANGE_ARRAY(bar_index*2),
C_FAMILY => C_FAMILY
)
port map
(
A => Address_In_Erly, -- [in]
AValid => Address_Valid_Erly, -- [in]
CS => pselect_hit_i(bar_index) -- [out]
);
end generate GEN_FOR_MULTI_CS;
-- GEN_FOR_ONE_CS: below logic decodes the CS for single address range
-- ---------------
GEN_FOR_ONE_CS : if C_ARD_ADDR_RANGE_ARRAY'length = 2 generate
pselect_hit_i(bar_index) <= Address_Valid_Erly;
end generate GEN_FOR_ONE_CS;
-- Instantate backend registers for the Chip Selects
BKEND_CS_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(Bus_Rst='0' or Clear_CS_CE_Reg = '1')then
cs_out_i(bar_index) <= '0';
elsif(CS_CE_ld_enable='1')then
cs_out_i(bar_index) <= pselect_hit_i(bar_index);
end if;
end if;
end process BKEND_CS_REG;
-------------------------------------------------------------------------
-- PER_CE_GEN: Now expand the individual CEs for each base address.
-------------------------------------------------------------------------
PER_CE_GEN: for j in 0 to C_ARD_NUM_CE_ARRAY(bar_index) - 1 generate
-----------
begin
-----------
----------------------------------------------------------------------
-- CE decoders for multiple CE's
----------------------------------------------------------------------
MULTIPLE_CES_THIS_CS_GEN : if CE_ADDR_SIZE > 0 generate
constant BAR : std_logic_vector(0 to CE_ADDR_SIZE-1) :=
std_logic_vector(to_unsigned(j,CE_ADDR_SIZE));
begin
CE_I : entity axi_lite_ipif_v3_0.pselect_f
generic map (
C_AB => CE_ADDR_SIZE ,
C_AW => CE_ADDR_SIZE ,
C_BAR => BAR ,
C_FAMILY => C_FAMILY
)
port map (
A => addr_out_s_h
(NUM_S_H_ADDR_BITS-OFFSET-CE_ADDR_SIZE
to NUM_S_H_ADDR_BITS - OFFSET - 1) ,
AValid => pselect_hit_i(bar_index) ,
CS => ce_expnd_i(CE_INDEX_START+j)
);
end generate MULTIPLE_CES_THIS_CS_GEN;
--------------------------------------
----------------------------------------------------------------------
-- SINGLE_CE_THIS_CS_GEN: CE decoders for single CE
----------------------------------------------------------------------
SINGLE_CE_THIS_CS_GEN : if CE_ADDR_SIZE = 0 generate
ce_expnd_i(CE_INDEX_START+j) <= pselect_hit_i(bar_index);
end generate;
-------------
end generate PER_CE_GEN;
------------------------
end generate MEM_DECODE_GEN;
-- RNW_REG_P: Register the incoming RNW signal at the time of registering the
-- address. This is need to generate the CE's separately.
RNW_REG_P:process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(RW_CE_ld_enable='1')then
Bus_RNW_reg <= Bus_RNW_Erly;
end if;
end if;
end process RNW_REG_P;
---------------------------------------------------------------------------
-- GEN_BKEND_CE_REGISTERS
-- This ForGen implements the backend registering for
-- the CE, RdCE, and WrCE output buses.
---------------------------------------------------------------------------
GEN_BKEND_CE_REGISTERS : for ce_index in 0 to NUM_CE_SIGNALS-1 generate
signal rdce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
------
begin
------
BKEND_RDCE_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(cs_ce_clr='1')then
ce_out_i(ce_index) <= '0';
elsif(RW_CE_ld_enable='1')then
ce_out_i(ce_index) <= ce_expnd_i(ce_index);
end if;
end if;
end process BKEND_RDCE_REG;
rdce_out_i(ce_index) <= ce_out_i(ce_index) and Bus_RNW_reg;
wrce_out_i(ce_index) <= ce_out_i(ce_index) and not Bus_RNW_reg;
-------------------------------
end generate GEN_BKEND_CE_REGISTERS;
-------------------------------------------------------------------------------
CS_for_gaps <= '0'; -- Removed the GAP adecoder logic
---------------------------------
CS_Out <= cs_out_i ;
RdCE_Out <= rdce_out_i ;
WrCE_Out <= wrce_out_i ;
end architecture IMP;
|
-------------------------------------------------------------------
-- (c) Copyright 1984 - 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
-------------------------------------------------------------------
-- ************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: address_decoder.vhd
-- Version: v2.0
-- Description: Address decoder utilizing unconstrained arrays for Base
-- Address specification and ce number.
-------------------------------------------------------------------------------
-- Structure: This section shows the hierarchical structure of axi_lite_ipif.
--
-- --axi_lite_ipif.vhd
-- --slave_attachment.vhd
-- --address_decoder.vhd
-------------------------------------------------------------------------------
-- Author: BSB
--
-- History:
--
-- BSB 05/20/10 -- First version
-- ~~~~~~
-- - Created the first version v1.00.a
-- ^^^^^^
-- ~~~~~~
-- SK 08/09/2010 --
-- - updated the core with optimziation. Closed CR 574507
-- - combined the CE generation logic to further optimize the code.
-- ^^^^^^
-- ~~~~~~
-- SK 12/16/12 -- v2.0
-- 1. up reved to major version for 2013.1 Vivado release. No logic updates.
-- 2. Updated the version of AXI LITE IPIF to v2.0 in X.Y format
-- 3. updated the proc common version to proc_common_base_v5_0
-- 4. No Logic Updates
-- ^^^^^^
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_cmb"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use ieee.numeric_std.all;
--library proc_common_base_v5_0;
--use proc_common_base_v5_0.proc_common_pkg.clog2;
--use proc_common_base_v5_0.pselect_f;
--use proc_common_base_v5_0.ipif_pkg.all;
library axi_lite_ipif_v3_0;
use axi_lite_ipif_v3_0.ipif_pkg.all;
-------------------------------------------------------------------------------
-- Definition of Generics
-------------------------------------------------------------------------------
-- C_BUS_AWIDTH -- Address bus width
-- C_S_AXI_MIN_SIZE -- Minimum address range of the IP
-- C_ARD_ADDR_RANGE_ARRAY-- Base /High Address Pair for each Address Range
-- C_ARD_NUM_CE_ARRAY -- Desired number of chip enables for an address range
-- C_FAMILY -- Target FPGA family
-------------------------------------------------------------------------------
-- Definition of Ports
-------------------------------------------------------------------------------
-- Bus_clk -- Clock
-- Bus_rst -- Reset
-- Address_In_Erly -- Adddress in
-- Address_Valid_Erly -- Address is valid
-- Bus_RNW -- Read or write registered
-- Bus_RNW_Erly -- Read or Write
-- CS_CE_ld_enable -- chip select and chip enable registered
-- Clear_CS_CE_Reg -- Clear_CS_CE_Reg clear
-- RW_CE_ld_enable -- Read or Write Chip Enable
-- CS_for_gaps -- CS generation for the gaps between address ranges
-- CS_Out -- Chip select
-- RdCE_Out -- Read Chip enable
-- WrCE_Out -- Write chip enable
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Entity Declaration
-------------------------------------------------------------------------------
entity address_decoder is
generic (
C_BUS_AWIDTH : integer := 32;
C_S_AXI_MIN_SIZE : std_logic_vector(0 to 31) := X"000001FF";
C_ARD_ADDR_RANGE_ARRAY: SLV64_ARRAY_TYPE :=
(
X"0000_0000_1000_0000", -- IP user0 base address
X"0000_0000_1000_01FF", -- IP user0 high address
X"0000_0000_1000_0200", -- IP user1 base address
X"0000_0000_1000_02FF" -- IP user1 high address
);
C_ARD_NUM_CE_ARRAY : INTEGER_ARRAY_TYPE :=
(
8, -- User0 CE Number
1 -- User1 CE Number
);
C_FAMILY : string := "virtex6"
);
port (
Bus_clk : in std_logic;
Bus_rst : in std_logic;
-- PLB Interface signals
Address_In_Erly : in std_logic_vector(0 to C_BUS_AWIDTH-1);
Address_Valid_Erly : in std_logic;
Bus_RNW : in std_logic;
Bus_RNW_Erly : in std_logic;
-- Registering control signals
CS_CE_ld_enable : in std_logic;
Clear_CS_CE_Reg : in std_logic;
RW_CE_ld_enable : in std_logic;
CS_for_gaps : out std_logic;
-- Decode output signals
CS_Out : out std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
RdCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1);
WrCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1)
);
end entity address_decoder;
-------------------------------------------------------------------------------
-- Architecture section
-------------------------------------------------------------------------------
architecture IMP of address_decoder is
----------------------------------------------------------------------------------
-- below attributes are added to reduce the synth warnings in Vivado tool
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of imp : architecture is "yes";
----------------------------------------------------------------------------------
-- local type declarations ----------------------------------------------------
type decode_bit_array_type is Array(natural range 0 to (
(C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1) of
integer;
type short_addr_array_type is Array(natural range 0 to
C_ARD_ADDR_RANGE_ARRAY'LENGTH-1) of
std_logic_vector(0 to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- Function Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- This function converts a 64 bit address range array to a AWIDTH bit
-- address range array.
-------------------------------------------------------------------------------
function slv64_2_slv_awidth(slv64_addr_array : SLV64_ARRAY_TYPE;
awidth : integer)
return short_addr_array_type is
variable temp_addr : std_logic_vector(0 to 63);
variable slv_array : short_addr_array_type;
begin
for array_index in 0 to slv64_addr_array'length-1 loop
temp_addr := slv64_addr_array(array_index);
slv_array(array_index) := temp_addr((64-awidth) to 63);
end loop;
return(slv_array);
end function slv64_2_slv_awidth;
-------------------------------------------------------------------------------
--Function Addr_bits
--function to convert an address range (base address and an upper address)
--into the number of upper address bits needed for decoding a device
--select signal. will handle slices and big or little endian
-------------------------------------------------------------------------------
function Addr_Bits (x,y : std_logic_vector(0 to C_BUS_AWIDTH-1))
return integer is
variable addr_nor : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
addr_nor := x xor y;
for i in 0 to C_BUS_AWIDTH-1 loop
if addr_nor(i)='1' then
return i;
end if;
end loop;
--coverage off
return(C_BUS_AWIDTH);
--coverage on
end function Addr_Bits;
-------------------------------------------------------------------------------
--Function Get_Addr_Bits
--function calculates the array which has the decode bits for the each address
--range.
-------------------------------------------------------------------------------
function Get_Addr_Bits (baseaddrs : short_addr_array_type)
return decode_bit_array_type is
variable num_bits : decode_bit_array_type;
begin
for i in 0 to ((baseaddrs'length)/2)-1 loop
num_bits(i) := Addr_Bits (baseaddrs(i*2),
baseaddrs(i*2+1));
end loop;
return(num_bits);
end function Get_Addr_Bits;
-------------------------------------------------------------------------------
-- NEEDED_ADDR_BITS
--
-- Function Description:
-- This function calculates the number of address bits required
-- to support the CE generation logic. This is determined by
-- multiplying the number of CEs for an address space by the
-- data width of the address space (in bytes). Each address
-- space entry is processed and the biggest of the spaces is
-- used to set the number of address bits required to be latched
-- and used for CE decoding. A minimum value of 1 is returned by
-- this function.
--
-------------------------------------------------------------------------------
function needed_addr_bits (ce_array : INTEGER_ARRAY_TYPE)
return integer is
constant NUM_CE_ENTRIES : integer := CE_ARRAY'length;
variable biggest : integer := 2;
variable req_ce_addr_size : integer := 0;
variable num_addr_bits : integer := 0;
begin
for i in 0 to NUM_CE_ENTRIES-1 loop
req_ce_addr_size := ce_array(i) * 4;
if (req_ce_addr_size > biggest) Then
biggest := req_ce_addr_size;
end if;
end loop;
num_addr_bits := clog2(biggest);
return(num_addr_bits);
end function NEEDED_ADDR_BITS;
-----------------------------------------------------------------------------
-- Function calc_high_address
--
-- This function is used to calculate the high address of the each address
-- range
-----------------------------------------------------------------------------
function calc_high_address (high_address : short_addr_array_type;
index : integer) return std_logic_vector is
variable calc_high_addr : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
If (index = (C_ARD_ADDR_RANGE_ARRAY'length/2-1)) Then
calc_high_addr := C_S_AXI_MIN_SIZE(32-C_BUS_AWIDTH to 31);
else
calc_high_addr := high_address(index*2+2);
end if;
return(calc_high_addr);
end function calc_high_address;
----------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
constant ARD_ADDR_RANGE_ARRAY : short_addr_array_type :=
slv64_2_slv_awidth(C_ARD_ADDR_RANGE_ARRAY,
C_BUS_AWIDTH);
constant NUM_BASE_ADDRS : integer := (C_ARD_ADDR_RANGE_ARRAY'length)/2;
constant DECODE_BITS : decode_bit_array_type :=
Get_Addr_Bits(ARD_ADDR_RANGE_ARRAY);
constant NUM_CE_SIGNALS : integer :=
calc_num_ce(C_ARD_NUM_CE_ARRAY);
constant NUM_S_H_ADDR_BITS : integer :=
needed_addr_bits(C_ARD_NUM_CE_ARRAY);
-------------------------------------------------------------------------------
-- Signal Declarations
-------------------------------------------------------------------------------
signal pselect_hit_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal cs_out_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal ce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal rdce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal ce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1); --
signal cs_ce_clr : std_logic;
signal addr_out_s_h : std_logic_vector(0 to NUM_S_H_ADDR_BITS-1);
signal Bus_RNW_reg : std_logic;
-------------------------------------------------------------------------------
-- Begin architecture
-------------------------------------------------------------------------------
begin -- architecture IMP
-- Register clears
cs_ce_clr <= not Bus_rst or Clear_CS_CE_Reg;
addr_out_s_h <= Address_In_Erly(C_BUS_AWIDTH-NUM_S_H_ADDR_BITS
to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- MEM_DECODE_GEN: Universal Address Decode Block
-------------------------------------------------------------------------------
MEM_DECODE_GEN: for bar_index in 0 to NUM_BASE_ADDRS-1 generate
---------------
constant CE_INDEX_START : integer
:= calc_start_ce_index(C_ARD_NUM_CE_ARRAY,bar_index);
constant CE_ADDR_SIZE : Integer range 0 to 15
:= clog2(C_ARD_NUM_CE_ARRAY(bar_index));
constant OFFSET : integer := 2;
constant BASE_ADDR_x : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= ARD_ADDR_RANGE_ARRAY(bar_index*2+1);
constant HIGH_ADDR_X : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= calc_high_address(ARD_ADDR_RANGE_ARRAY,bar_index);
--constant DECODE_BITS_0 : integer:= DECODE_BITS(0);
---------
begin
---------
-- GEN_FOR_MULTI_CS: Below logic generates the CS for decoded address
-- -----------------
GEN_FOR_MULTI_CS : if C_ARD_ADDR_RANGE_ARRAY'length > 2 generate
-- Instantiate the basic Base Address Decoders
MEM_SELECT_I: entity axi_lite_ipif_v3_0.pselect_f
generic map
(
C_AB => DECODE_BITS(bar_index),
C_AW => C_BUS_AWIDTH,
C_BAR => ARD_ADDR_RANGE_ARRAY(bar_index*2),
C_FAMILY => C_FAMILY
)
port map
(
A => Address_In_Erly, -- [in]
AValid => Address_Valid_Erly, -- [in]
CS => pselect_hit_i(bar_index) -- [out]
);
end generate GEN_FOR_MULTI_CS;
-- GEN_FOR_ONE_CS: below logic decodes the CS for single address range
-- ---------------
GEN_FOR_ONE_CS : if C_ARD_ADDR_RANGE_ARRAY'length = 2 generate
pselect_hit_i(bar_index) <= Address_Valid_Erly;
end generate GEN_FOR_ONE_CS;
-- Instantate backend registers for the Chip Selects
BKEND_CS_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(Bus_Rst='0' or Clear_CS_CE_Reg = '1')then
cs_out_i(bar_index) <= '0';
elsif(CS_CE_ld_enable='1')then
cs_out_i(bar_index) <= pselect_hit_i(bar_index);
end if;
end if;
end process BKEND_CS_REG;
-------------------------------------------------------------------------
-- PER_CE_GEN: Now expand the individual CEs for each base address.
-------------------------------------------------------------------------
PER_CE_GEN: for j in 0 to C_ARD_NUM_CE_ARRAY(bar_index) - 1 generate
-----------
begin
-----------
----------------------------------------------------------------------
-- CE decoders for multiple CE's
----------------------------------------------------------------------
MULTIPLE_CES_THIS_CS_GEN : if CE_ADDR_SIZE > 0 generate
constant BAR : std_logic_vector(0 to CE_ADDR_SIZE-1) :=
std_logic_vector(to_unsigned(j,CE_ADDR_SIZE));
begin
CE_I : entity axi_lite_ipif_v3_0.pselect_f
generic map (
C_AB => CE_ADDR_SIZE ,
C_AW => CE_ADDR_SIZE ,
C_BAR => BAR ,
C_FAMILY => C_FAMILY
)
port map (
A => addr_out_s_h
(NUM_S_H_ADDR_BITS-OFFSET-CE_ADDR_SIZE
to NUM_S_H_ADDR_BITS - OFFSET - 1) ,
AValid => pselect_hit_i(bar_index) ,
CS => ce_expnd_i(CE_INDEX_START+j)
);
end generate MULTIPLE_CES_THIS_CS_GEN;
--------------------------------------
----------------------------------------------------------------------
-- SINGLE_CE_THIS_CS_GEN: CE decoders for single CE
----------------------------------------------------------------------
SINGLE_CE_THIS_CS_GEN : if CE_ADDR_SIZE = 0 generate
ce_expnd_i(CE_INDEX_START+j) <= pselect_hit_i(bar_index);
end generate;
-------------
end generate PER_CE_GEN;
------------------------
end generate MEM_DECODE_GEN;
-- RNW_REG_P: Register the incoming RNW signal at the time of registering the
-- address. This is need to generate the CE's separately.
RNW_REG_P:process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(RW_CE_ld_enable='1')then
Bus_RNW_reg <= Bus_RNW_Erly;
end if;
end if;
end process RNW_REG_P;
---------------------------------------------------------------------------
-- GEN_BKEND_CE_REGISTERS
-- This ForGen implements the backend registering for
-- the CE, RdCE, and WrCE output buses.
---------------------------------------------------------------------------
GEN_BKEND_CE_REGISTERS : for ce_index in 0 to NUM_CE_SIGNALS-1 generate
signal rdce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
------
begin
------
BKEND_RDCE_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(cs_ce_clr='1')then
ce_out_i(ce_index) <= '0';
elsif(RW_CE_ld_enable='1')then
ce_out_i(ce_index) <= ce_expnd_i(ce_index);
end if;
end if;
end process BKEND_RDCE_REG;
rdce_out_i(ce_index) <= ce_out_i(ce_index) and Bus_RNW_reg;
wrce_out_i(ce_index) <= ce_out_i(ce_index) and not Bus_RNW_reg;
-------------------------------
end generate GEN_BKEND_CE_REGISTERS;
-------------------------------------------------------------------------------
CS_for_gaps <= '0'; -- Removed the GAP adecoder logic
---------------------------------
CS_Out <= cs_out_i ;
RdCE_Out <= rdce_out_i ;
WrCE_Out <= wrce_out_i ;
end architecture IMP;
|
-------------------------------------------------------------------
-- (c) Copyright 1984 - 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
-------------------------------------------------------------------
-- ************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: address_decoder.vhd
-- Version: v2.0
-- Description: Address decoder utilizing unconstrained arrays for Base
-- Address specification and ce number.
-------------------------------------------------------------------------------
-- Structure: This section shows the hierarchical structure of axi_lite_ipif.
--
-- --axi_lite_ipif.vhd
-- --slave_attachment.vhd
-- --address_decoder.vhd
-------------------------------------------------------------------------------
-- Author: BSB
--
-- History:
--
-- BSB 05/20/10 -- First version
-- ~~~~~~
-- - Created the first version v1.00.a
-- ^^^^^^
-- ~~~~~~
-- SK 08/09/2010 --
-- - updated the core with optimziation. Closed CR 574507
-- - combined the CE generation logic to further optimize the code.
-- ^^^^^^
-- ~~~~~~
-- SK 12/16/12 -- v2.0
-- 1. up reved to major version for 2013.1 Vivado release. No logic updates.
-- 2. Updated the version of AXI LITE IPIF to v2.0 in X.Y format
-- 3. updated the proc common version to proc_common_base_v5_0
-- 4. No Logic Updates
-- ^^^^^^
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_cmb"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use ieee.numeric_std.all;
--library proc_common_base_v5_0;
--use proc_common_base_v5_0.proc_common_pkg.clog2;
--use proc_common_base_v5_0.pselect_f;
--use proc_common_base_v5_0.ipif_pkg.all;
library axi_lite_ipif_v3_0;
use axi_lite_ipif_v3_0.ipif_pkg.all;
-------------------------------------------------------------------------------
-- Definition of Generics
-------------------------------------------------------------------------------
-- C_BUS_AWIDTH -- Address bus width
-- C_S_AXI_MIN_SIZE -- Minimum address range of the IP
-- C_ARD_ADDR_RANGE_ARRAY-- Base /High Address Pair for each Address Range
-- C_ARD_NUM_CE_ARRAY -- Desired number of chip enables for an address range
-- C_FAMILY -- Target FPGA family
-------------------------------------------------------------------------------
-- Definition of Ports
-------------------------------------------------------------------------------
-- Bus_clk -- Clock
-- Bus_rst -- Reset
-- Address_In_Erly -- Adddress in
-- Address_Valid_Erly -- Address is valid
-- Bus_RNW -- Read or write registered
-- Bus_RNW_Erly -- Read or Write
-- CS_CE_ld_enable -- chip select and chip enable registered
-- Clear_CS_CE_Reg -- Clear_CS_CE_Reg clear
-- RW_CE_ld_enable -- Read or Write Chip Enable
-- CS_for_gaps -- CS generation for the gaps between address ranges
-- CS_Out -- Chip select
-- RdCE_Out -- Read Chip enable
-- WrCE_Out -- Write chip enable
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Entity Declaration
-------------------------------------------------------------------------------
entity address_decoder is
generic (
C_BUS_AWIDTH : integer := 32;
C_S_AXI_MIN_SIZE : std_logic_vector(0 to 31) := X"000001FF";
C_ARD_ADDR_RANGE_ARRAY: SLV64_ARRAY_TYPE :=
(
X"0000_0000_1000_0000", -- IP user0 base address
X"0000_0000_1000_01FF", -- IP user0 high address
X"0000_0000_1000_0200", -- IP user1 base address
X"0000_0000_1000_02FF" -- IP user1 high address
);
C_ARD_NUM_CE_ARRAY : INTEGER_ARRAY_TYPE :=
(
8, -- User0 CE Number
1 -- User1 CE Number
);
C_FAMILY : string := "virtex6"
);
port (
Bus_clk : in std_logic;
Bus_rst : in std_logic;
-- PLB Interface signals
Address_In_Erly : in std_logic_vector(0 to C_BUS_AWIDTH-1);
Address_Valid_Erly : in std_logic;
Bus_RNW : in std_logic;
Bus_RNW_Erly : in std_logic;
-- Registering control signals
CS_CE_ld_enable : in std_logic;
Clear_CS_CE_Reg : in std_logic;
RW_CE_ld_enable : in std_logic;
CS_for_gaps : out std_logic;
-- Decode output signals
CS_Out : out std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
RdCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1);
WrCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1)
);
end entity address_decoder;
-------------------------------------------------------------------------------
-- Architecture section
-------------------------------------------------------------------------------
architecture IMP of address_decoder is
----------------------------------------------------------------------------------
-- below attributes are added to reduce the synth warnings in Vivado tool
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of imp : architecture is "yes";
----------------------------------------------------------------------------------
-- local type declarations ----------------------------------------------------
type decode_bit_array_type is Array(natural range 0 to (
(C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1) of
integer;
type short_addr_array_type is Array(natural range 0 to
C_ARD_ADDR_RANGE_ARRAY'LENGTH-1) of
std_logic_vector(0 to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- Function Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- This function converts a 64 bit address range array to a AWIDTH bit
-- address range array.
-------------------------------------------------------------------------------
function slv64_2_slv_awidth(slv64_addr_array : SLV64_ARRAY_TYPE;
awidth : integer)
return short_addr_array_type is
variable temp_addr : std_logic_vector(0 to 63);
variable slv_array : short_addr_array_type;
begin
for array_index in 0 to slv64_addr_array'length-1 loop
temp_addr := slv64_addr_array(array_index);
slv_array(array_index) := temp_addr((64-awidth) to 63);
end loop;
return(slv_array);
end function slv64_2_slv_awidth;
-------------------------------------------------------------------------------
--Function Addr_bits
--function to convert an address range (base address and an upper address)
--into the number of upper address bits needed for decoding a device
--select signal. will handle slices and big or little endian
-------------------------------------------------------------------------------
function Addr_Bits (x,y : std_logic_vector(0 to C_BUS_AWIDTH-1))
return integer is
variable addr_nor : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
addr_nor := x xor y;
for i in 0 to C_BUS_AWIDTH-1 loop
if addr_nor(i)='1' then
return i;
end if;
end loop;
--coverage off
return(C_BUS_AWIDTH);
--coverage on
end function Addr_Bits;
-------------------------------------------------------------------------------
--Function Get_Addr_Bits
--function calculates the array which has the decode bits for the each address
--range.
-------------------------------------------------------------------------------
function Get_Addr_Bits (baseaddrs : short_addr_array_type)
return decode_bit_array_type is
variable num_bits : decode_bit_array_type;
begin
for i in 0 to ((baseaddrs'length)/2)-1 loop
num_bits(i) := Addr_Bits (baseaddrs(i*2),
baseaddrs(i*2+1));
end loop;
return(num_bits);
end function Get_Addr_Bits;
-------------------------------------------------------------------------------
-- NEEDED_ADDR_BITS
--
-- Function Description:
-- This function calculates the number of address bits required
-- to support the CE generation logic. This is determined by
-- multiplying the number of CEs for an address space by the
-- data width of the address space (in bytes). Each address
-- space entry is processed and the biggest of the spaces is
-- used to set the number of address bits required to be latched
-- and used for CE decoding. A minimum value of 1 is returned by
-- this function.
--
-------------------------------------------------------------------------------
function needed_addr_bits (ce_array : INTEGER_ARRAY_TYPE)
return integer is
constant NUM_CE_ENTRIES : integer := CE_ARRAY'length;
variable biggest : integer := 2;
variable req_ce_addr_size : integer := 0;
variable num_addr_bits : integer := 0;
begin
for i in 0 to NUM_CE_ENTRIES-1 loop
req_ce_addr_size := ce_array(i) * 4;
if (req_ce_addr_size > biggest) Then
biggest := req_ce_addr_size;
end if;
end loop;
num_addr_bits := clog2(biggest);
return(num_addr_bits);
end function NEEDED_ADDR_BITS;
-----------------------------------------------------------------------------
-- Function calc_high_address
--
-- This function is used to calculate the high address of the each address
-- range
-----------------------------------------------------------------------------
function calc_high_address (high_address : short_addr_array_type;
index : integer) return std_logic_vector is
variable calc_high_addr : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
If (index = (C_ARD_ADDR_RANGE_ARRAY'length/2-1)) Then
calc_high_addr := C_S_AXI_MIN_SIZE(32-C_BUS_AWIDTH to 31);
else
calc_high_addr := high_address(index*2+2);
end if;
return(calc_high_addr);
end function calc_high_address;
----------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
constant ARD_ADDR_RANGE_ARRAY : short_addr_array_type :=
slv64_2_slv_awidth(C_ARD_ADDR_RANGE_ARRAY,
C_BUS_AWIDTH);
constant NUM_BASE_ADDRS : integer := (C_ARD_ADDR_RANGE_ARRAY'length)/2;
constant DECODE_BITS : decode_bit_array_type :=
Get_Addr_Bits(ARD_ADDR_RANGE_ARRAY);
constant NUM_CE_SIGNALS : integer :=
calc_num_ce(C_ARD_NUM_CE_ARRAY);
constant NUM_S_H_ADDR_BITS : integer :=
needed_addr_bits(C_ARD_NUM_CE_ARRAY);
-------------------------------------------------------------------------------
-- Signal Declarations
-------------------------------------------------------------------------------
signal pselect_hit_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal cs_out_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal ce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal rdce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal ce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1); --
signal cs_ce_clr : std_logic;
signal addr_out_s_h : std_logic_vector(0 to NUM_S_H_ADDR_BITS-1);
signal Bus_RNW_reg : std_logic;
-------------------------------------------------------------------------------
-- Begin architecture
-------------------------------------------------------------------------------
begin -- architecture IMP
-- Register clears
cs_ce_clr <= not Bus_rst or Clear_CS_CE_Reg;
addr_out_s_h <= Address_In_Erly(C_BUS_AWIDTH-NUM_S_H_ADDR_BITS
to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- MEM_DECODE_GEN: Universal Address Decode Block
-------------------------------------------------------------------------------
MEM_DECODE_GEN: for bar_index in 0 to NUM_BASE_ADDRS-1 generate
---------------
constant CE_INDEX_START : integer
:= calc_start_ce_index(C_ARD_NUM_CE_ARRAY,bar_index);
constant CE_ADDR_SIZE : Integer range 0 to 15
:= clog2(C_ARD_NUM_CE_ARRAY(bar_index));
constant OFFSET : integer := 2;
constant BASE_ADDR_x : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= ARD_ADDR_RANGE_ARRAY(bar_index*2+1);
constant HIGH_ADDR_X : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= calc_high_address(ARD_ADDR_RANGE_ARRAY,bar_index);
--constant DECODE_BITS_0 : integer:= DECODE_BITS(0);
---------
begin
---------
-- GEN_FOR_MULTI_CS: Below logic generates the CS for decoded address
-- -----------------
GEN_FOR_MULTI_CS : if C_ARD_ADDR_RANGE_ARRAY'length > 2 generate
-- Instantiate the basic Base Address Decoders
MEM_SELECT_I: entity axi_lite_ipif_v3_0.pselect_f
generic map
(
C_AB => DECODE_BITS(bar_index),
C_AW => C_BUS_AWIDTH,
C_BAR => ARD_ADDR_RANGE_ARRAY(bar_index*2),
C_FAMILY => C_FAMILY
)
port map
(
A => Address_In_Erly, -- [in]
AValid => Address_Valid_Erly, -- [in]
CS => pselect_hit_i(bar_index) -- [out]
);
end generate GEN_FOR_MULTI_CS;
-- GEN_FOR_ONE_CS: below logic decodes the CS for single address range
-- ---------------
GEN_FOR_ONE_CS : if C_ARD_ADDR_RANGE_ARRAY'length = 2 generate
pselect_hit_i(bar_index) <= Address_Valid_Erly;
end generate GEN_FOR_ONE_CS;
-- Instantate backend registers for the Chip Selects
BKEND_CS_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(Bus_Rst='0' or Clear_CS_CE_Reg = '1')then
cs_out_i(bar_index) <= '0';
elsif(CS_CE_ld_enable='1')then
cs_out_i(bar_index) <= pselect_hit_i(bar_index);
end if;
end if;
end process BKEND_CS_REG;
-------------------------------------------------------------------------
-- PER_CE_GEN: Now expand the individual CEs for each base address.
-------------------------------------------------------------------------
PER_CE_GEN: for j in 0 to C_ARD_NUM_CE_ARRAY(bar_index) - 1 generate
-----------
begin
-----------
----------------------------------------------------------------------
-- CE decoders for multiple CE's
----------------------------------------------------------------------
MULTIPLE_CES_THIS_CS_GEN : if CE_ADDR_SIZE > 0 generate
constant BAR : std_logic_vector(0 to CE_ADDR_SIZE-1) :=
std_logic_vector(to_unsigned(j,CE_ADDR_SIZE));
begin
CE_I : entity axi_lite_ipif_v3_0.pselect_f
generic map (
C_AB => CE_ADDR_SIZE ,
C_AW => CE_ADDR_SIZE ,
C_BAR => BAR ,
C_FAMILY => C_FAMILY
)
port map (
A => addr_out_s_h
(NUM_S_H_ADDR_BITS-OFFSET-CE_ADDR_SIZE
to NUM_S_H_ADDR_BITS - OFFSET - 1) ,
AValid => pselect_hit_i(bar_index) ,
CS => ce_expnd_i(CE_INDEX_START+j)
);
end generate MULTIPLE_CES_THIS_CS_GEN;
--------------------------------------
----------------------------------------------------------------------
-- SINGLE_CE_THIS_CS_GEN: CE decoders for single CE
----------------------------------------------------------------------
SINGLE_CE_THIS_CS_GEN : if CE_ADDR_SIZE = 0 generate
ce_expnd_i(CE_INDEX_START+j) <= pselect_hit_i(bar_index);
end generate;
-------------
end generate PER_CE_GEN;
------------------------
end generate MEM_DECODE_GEN;
-- RNW_REG_P: Register the incoming RNW signal at the time of registering the
-- address. This is need to generate the CE's separately.
RNW_REG_P:process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(RW_CE_ld_enable='1')then
Bus_RNW_reg <= Bus_RNW_Erly;
end if;
end if;
end process RNW_REG_P;
---------------------------------------------------------------------------
-- GEN_BKEND_CE_REGISTERS
-- This ForGen implements the backend registering for
-- the CE, RdCE, and WrCE output buses.
---------------------------------------------------------------------------
GEN_BKEND_CE_REGISTERS : for ce_index in 0 to NUM_CE_SIGNALS-1 generate
signal rdce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
------
begin
------
BKEND_RDCE_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(cs_ce_clr='1')then
ce_out_i(ce_index) <= '0';
elsif(RW_CE_ld_enable='1')then
ce_out_i(ce_index) <= ce_expnd_i(ce_index);
end if;
end if;
end process BKEND_RDCE_REG;
rdce_out_i(ce_index) <= ce_out_i(ce_index) and Bus_RNW_reg;
wrce_out_i(ce_index) <= ce_out_i(ce_index) and not Bus_RNW_reg;
-------------------------------
end generate GEN_BKEND_CE_REGISTERS;
-------------------------------------------------------------------------------
CS_for_gaps <= '0'; -- Removed the GAP adecoder logic
---------------------------------
CS_Out <= cs_out_i ;
RdCE_Out <= rdce_out_i ;
WrCE_Out <= wrce_out_i ;
end architecture IMP;
|
-------------------------------------------------------------------
-- (c) Copyright 1984 - 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
-------------------------------------------------------------------
-- ************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: address_decoder.vhd
-- Version: v2.0
-- Description: Address decoder utilizing unconstrained arrays for Base
-- Address specification and ce number.
-------------------------------------------------------------------------------
-- Structure: This section shows the hierarchical structure of axi_lite_ipif.
--
-- --axi_lite_ipif.vhd
-- --slave_attachment.vhd
-- --address_decoder.vhd
-------------------------------------------------------------------------------
-- Author: BSB
--
-- History:
--
-- BSB 05/20/10 -- First version
-- ~~~~~~
-- - Created the first version v1.00.a
-- ^^^^^^
-- ~~~~~~
-- SK 08/09/2010 --
-- - updated the core with optimziation. Closed CR 574507
-- - combined the CE generation logic to further optimize the code.
-- ^^^^^^
-- ~~~~~~
-- SK 12/16/12 -- v2.0
-- 1. up reved to major version for 2013.1 Vivado release. No logic updates.
-- 2. Updated the version of AXI LITE IPIF to v2.0 in X.Y format
-- 3. updated the proc common version to proc_common_base_v5_0
-- 4. No Logic Updates
-- ^^^^^^
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_cmb"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use ieee.numeric_std.all;
--library proc_common_base_v5_0;
--use proc_common_base_v5_0.proc_common_pkg.clog2;
--use proc_common_base_v5_0.pselect_f;
--use proc_common_base_v5_0.ipif_pkg.all;
library axi_lite_ipif_v3_0;
use axi_lite_ipif_v3_0.ipif_pkg.all;
-------------------------------------------------------------------------------
-- Definition of Generics
-------------------------------------------------------------------------------
-- C_BUS_AWIDTH -- Address bus width
-- C_S_AXI_MIN_SIZE -- Minimum address range of the IP
-- C_ARD_ADDR_RANGE_ARRAY-- Base /High Address Pair for each Address Range
-- C_ARD_NUM_CE_ARRAY -- Desired number of chip enables for an address range
-- C_FAMILY -- Target FPGA family
-------------------------------------------------------------------------------
-- Definition of Ports
-------------------------------------------------------------------------------
-- Bus_clk -- Clock
-- Bus_rst -- Reset
-- Address_In_Erly -- Adddress in
-- Address_Valid_Erly -- Address is valid
-- Bus_RNW -- Read or write registered
-- Bus_RNW_Erly -- Read or Write
-- CS_CE_ld_enable -- chip select and chip enable registered
-- Clear_CS_CE_Reg -- Clear_CS_CE_Reg clear
-- RW_CE_ld_enable -- Read or Write Chip Enable
-- CS_for_gaps -- CS generation for the gaps between address ranges
-- CS_Out -- Chip select
-- RdCE_Out -- Read Chip enable
-- WrCE_Out -- Write chip enable
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Entity Declaration
-------------------------------------------------------------------------------
entity address_decoder is
generic (
C_BUS_AWIDTH : integer := 32;
C_S_AXI_MIN_SIZE : std_logic_vector(0 to 31) := X"000001FF";
C_ARD_ADDR_RANGE_ARRAY: SLV64_ARRAY_TYPE :=
(
X"0000_0000_1000_0000", -- IP user0 base address
X"0000_0000_1000_01FF", -- IP user0 high address
X"0000_0000_1000_0200", -- IP user1 base address
X"0000_0000_1000_02FF" -- IP user1 high address
);
C_ARD_NUM_CE_ARRAY : INTEGER_ARRAY_TYPE :=
(
8, -- User0 CE Number
1 -- User1 CE Number
);
C_FAMILY : string := "virtex6"
);
port (
Bus_clk : in std_logic;
Bus_rst : in std_logic;
-- PLB Interface signals
Address_In_Erly : in std_logic_vector(0 to C_BUS_AWIDTH-1);
Address_Valid_Erly : in std_logic;
Bus_RNW : in std_logic;
Bus_RNW_Erly : in std_logic;
-- Registering control signals
CS_CE_ld_enable : in std_logic;
Clear_CS_CE_Reg : in std_logic;
RW_CE_ld_enable : in std_logic;
CS_for_gaps : out std_logic;
-- Decode output signals
CS_Out : out std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
RdCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1);
WrCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1)
);
end entity address_decoder;
-------------------------------------------------------------------------------
-- Architecture section
-------------------------------------------------------------------------------
architecture IMP of address_decoder is
----------------------------------------------------------------------------------
-- below attributes are added to reduce the synth warnings in Vivado tool
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of imp : architecture is "yes";
----------------------------------------------------------------------------------
-- local type declarations ----------------------------------------------------
type decode_bit_array_type is Array(natural range 0 to (
(C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1) of
integer;
type short_addr_array_type is Array(natural range 0 to
C_ARD_ADDR_RANGE_ARRAY'LENGTH-1) of
std_logic_vector(0 to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- Function Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- This function converts a 64 bit address range array to a AWIDTH bit
-- address range array.
-------------------------------------------------------------------------------
function slv64_2_slv_awidth(slv64_addr_array : SLV64_ARRAY_TYPE;
awidth : integer)
return short_addr_array_type is
variable temp_addr : std_logic_vector(0 to 63);
variable slv_array : short_addr_array_type;
begin
for array_index in 0 to slv64_addr_array'length-1 loop
temp_addr := slv64_addr_array(array_index);
slv_array(array_index) := temp_addr((64-awidth) to 63);
end loop;
return(slv_array);
end function slv64_2_slv_awidth;
-------------------------------------------------------------------------------
--Function Addr_bits
--function to convert an address range (base address and an upper address)
--into the number of upper address bits needed for decoding a device
--select signal. will handle slices and big or little endian
-------------------------------------------------------------------------------
function Addr_Bits (x,y : std_logic_vector(0 to C_BUS_AWIDTH-1))
return integer is
variable addr_nor : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
addr_nor := x xor y;
for i in 0 to C_BUS_AWIDTH-1 loop
if addr_nor(i)='1' then
return i;
end if;
end loop;
--coverage off
return(C_BUS_AWIDTH);
--coverage on
end function Addr_Bits;
-------------------------------------------------------------------------------
--Function Get_Addr_Bits
--function calculates the array which has the decode bits for the each address
--range.
-------------------------------------------------------------------------------
function Get_Addr_Bits (baseaddrs : short_addr_array_type)
return decode_bit_array_type is
variable num_bits : decode_bit_array_type;
begin
for i in 0 to ((baseaddrs'length)/2)-1 loop
num_bits(i) := Addr_Bits (baseaddrs(i*2),
baseaddrs(i*2+1));
end loop;
return(num_bits);
end function Get_Addr_Bits;
-------------------------------------------------------------------------------
-- NEEDED_ADDR_BITS
--
-- Function Description:
-- This function calculates the number of address bits required
-- to support the CE generation logic. This is determined by
-- multiplying the number of CEs for an address space by the
-- data width of the address space (in bytes). Each address
-- space entry is processed and the biggest of the spaces is
-- used to set the number of address bits required to be latched
-- and used for CE decoding. A minimum value of 1 is returned by
-- this function.
--
-------------------------------------------------------------------------------
function needed_addr_bits (ce_array : INTEGER_ARRAY_TYPE)
return integer is
constant NUM_CE_ENTRIES : integer := CE_ARRAY'length;
variable biggest : integer := 2;
variable req_ce_addr_size : integer := 0;
variable num_addr_bits : integer := 0;
begin
for i in 0 to NUM_CE_ENTRIES-1 loop
req_ce_addr_size := ce_array(i) * 4;
if (req_ce_addr_size > biggest) Then
biggest := req_ce_addr_size;
end if;
end loop;
num_addr_bits := clog2(biggest);
return(num_addr_bits);
end function NEEDED_ADDR_BITS;
-----------------------------------------------------------------------------
-- Function calc_high_address
--
-- This function is used to calculate the high address of the each address
-- range
-----------------------------------------------------------------------------
function calc_high_address (high_address : short_addr_array_type;
index : integer) return std_logic_vector is
variable calc_high_addr : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
If (index = (C_ARD_ADDR_RANGE_ARRAY'length/2-1)) Then
calc_high_addr := C_S_AXI_MIN_SIZE(32-C_BUS_AWIDTH to 31);
else
calc_high_addr := high_address(index*2+2);
end if;
return(calc_high_addr);
end function calc_high_address;
----------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
constant ARD_ADDR_RANGE_ARRAY : short_addr_array_type :=
slv64_2_slv_awidth(C_ARD_ADDR_RANGE_ARRAY,
C_BUS_AWIDTH);
constant NUM_BASE_ADDRS : integer := (C_ARD_ADDR_RANGE_ARRAY'length)/2;
constant DECODE_BITS : decode_bit_array_type :=
Get_Addr_Bits(ARD_ADDR_RANGE_ARRAY);
constant NUM_CE_SIGNALS : integer :=
calc_num_ce(C_ARD_NUM_CE_ARRAY);
constant NUM_S_H_ADDR_BITS : integer :=
needed_addr_bits(C_ARD_NUM_CE_ARRAY);
-------------------------------------------------------------------------------
-- Signal Declarations
-------------------------------------------------------------------------------
signal pselect_hit_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal cs_out_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal ce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal rdce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal ce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1); --
signal cs_ce_clr : std_logic;
signal addr_out_s_h : std_logic_vector(0 to NUM_S_H_ADDR_BITS-1);
signal Bus_RNW_reg : std_logic;
-------------------------------------------------------------------------------
-- Begin architecture
-------------------------------------------------------------------------------
begin -- architecture IMP
-- Register clears
cs_ce_clr <= not Bus_rst or Clear_CS_CE_Reg;
addr_out_s_h <= Address_In_Erly(C_BUS_AWIDTH-NUM_S_H_ADDR_BITS
to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- MEM_DECODE_GEN: Universal Address Decode Block
-------------------------------------------------------------------------------
MEM_DECODE_GEN: for bar_index in 0 to NUM_BASE_ADDRS-1 generate
---------------
constant CE_INDEX_START : integer
:= calc_start_ce_index(C_ARD_NUM_CE_ARRAY,bar_index);
constant CE_ADDR_SIZE : Integer range 0 to 15
:= clog2(C_ARD_NUM_CE_ARRAY(bar_index));
constant OFFSET : integer := 2;
constant BASE_ADDR_x : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= ARD_ADDR_RANGE_ARRAY(bar_index*2+1);
constant HIGH_ADDR_X : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= calc_high_address(ARD_ADDR_RANGE_ARRAY,bar_index);
--constant DECODE_BITS_0 : integer:= DECODE_BITS(0);
---------
begin
---------
-- GEN_FOR_MULTI_CS: Below logic generates the CS for decoded address
-- -----------------
GEN_FOR_MULTI_CS : if C_ARD_ADDR_RANGE_ARRAY'length > 2 generate
-- Instantiate the basic Base Address Decoders
MEM_SELECT_I: entity axi_lite_ipif_v3_0.pselect_f
generic map
(
C_AB => DECODE_BITS(bar_index),
C_AW => C_BUS_AWIDTH,
C_BAR => ARD_ADDR_RANGE_ARRAY(bar_index*2),
C_FAMILY => C_FAMILY
)
port map
(
A => Address_In_Erly, -- [in]
AValid => Address_Valid_Erly, -- [in]
CS => pselect_hit_i(bar_index) -- [out]
);
end generate GEN_FOR_MULTI_CS;
-- GEN_FOR_ONE_CS: below logic decodes the CS for single address range
-- ---------------
GEN_FOR_ONE_CS : if C_ARD_ADDR_RANGE_ARRAY'length = 2 generate
pselect_hit_i(bar_index) <= Address_Valid_Erly;
end generate GEN_FOR_ONE_CS;
-- Instantate backend registers for the Chip Selects
BKEND_CS_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(Bus_Rst='0' or Clear_CS_CE_Reg = '1')then
cs_out_i(bar_index) <= '0';
elsif(CS_CE_ld_enable='1')then
cs_out_i(bar_index) <= pselect_hit_i(bar_index);
end if;
end if;
end process BKEND_CS_REG;
-------------------------------------------------------------------------
-- PER_CE_GEN: Now expand the individual CEs for each base address.
-------------------------------------------------------------------------
PER_CE_GEN: for j in 0 to C_ARD_NUM_CE_ARRAY(bar_index) - 1 generate
-----------
begin
-----------
----------------------------------------------------------------------
-- CE decoders for multiple CE's
----------------------------------------------------------------------
MULTIPLE_CES_THIS_CS_GEN : if CE_ADDR_SIZE > 0 generate
constant BAR : std_logic_vector(0 to CE_ADDR_SIZE-1) :=
std_logic_vector(to_unsigned(j,CE_ADDR_SIZE));
begin
CE_I : entity axi_lite_ipif_v3_0.pselect_f
generic map (
C_AB => CE_ADDR_SIZE ,
C_AW => CE_ADDR_SIZE ,
C_BAR => BAR ,
C_FAMILY => C_FAMILY
)
port map (
A => addr_out_s_h
(NUM_S_H_ADDR_BITS-OFFSET-CE_ADDR_SIZE
to NUM_S_H_ADDR_BITS - OFFSET - 1) ,
AValid => pselect_hit_i(bar_index) ,
CS => ce_expnd_i(CE_INDEX_START+j)
);
end generate MULTIPLE_CES_THIS_CS_GEN;
--------------------------------------
----------------------------------------------------------------------
-- SINGLE_CE_THIS_CS_GEN: CE decoders for single CE
----------------------------------------------------------------------
SINGLE_CE_THIS_CS_GEN : if CE_ADDR_SIZE = 0 generate
ce_expnd_i(CE_INDEX_START+j) <= pselect_hit_i(bar_index);
end generate;
-------------
end generate PER_CE_GEN;
------------------------
end generate MEM_DECODE_GEN;
-- RNW_REG_P: Register the incoming RNW signal at the time of registering the
-- address. This is need to generate the CE's separately.
RNW_REG_P:process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(RW_CE_ld_enable='1')then
Bus_RNW_reg <= Bus_RNW_Erly;
end if;
end if;
end process RNW_REG_P;
---------------------------------------------------------------------------
-- GEN_BKEND_CE_REGISTERS
-- This ForGen implements the backend registering for
-- the CE, RdCE, and WrCE output buses.
---------------------------------------------------------------------------
GEN_BKEND_CE_REGISTERS : for ce_index in 0 to NUM_CE_SIGNALS-1 generate
signal rdce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
------
begin
------
BKEND_RDCE_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(cs_ce_clr='1')then
ce_out_i(ce_index) <= '0';
elsif(RW_CE_ld_enable='1')then
ce_out_i(ce_index) <= ce_expnd_i(ce_index);
end if;
end if;
end process BKEND_RDCE_REG;
rdce_out_i(ce_index) <= ce_out_i(ce_index) and Bus_RNW_reg;
wrce_out_i(ce_index) <= ce_out_i(ce_index) and not Bus_RNW_reg;
-------------------------------
end generate GEN_BKEND_CE_REGISTERS;
-------------------------------------------------------------------------------
CS_for_gaps <= '0'; -- Removed the GAP adecoder logic
---------------------------------
CS_Out <= cs_out_i ;
RdCE_Out <= rdce_out_i ;
WrCE_Out <= wrce_out_i ;
end architecture IMP;
|
-------------------------------------------------------------------
-- (c) Copyright 1984 - 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
-------------------------------------------------------------------
-- ************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: address_decoder.vhd
-- Version: v2.0
-- Description: Address decoder utilizing unconstrained arrays for Base
-- Address specification and ce number.
-------------------------------------------------------------------------------
-- Structure: This section shows the hierarchical structure of axi_lite_ipif.
--
-- --axi_lite_ipif.vhd
-- --slave_attachment.vhd
-- --address_decoder.vhd
-------------------------------------------------------------------------------
-- Author: BSB
--
-- History:
--
-- BSB 05/20/10 -- First version
-- ~~~~~~
-- - Created the first version v1.00.a
-- ^^^^^^
-- ~~~~~~
-- SK 08/09/2010 --
-- - updated the core with optimziation. Closed CR 574507
-- - combined the CE generation logic to further optimize the code.
-- ^^^^^^
-- ~~~~~~
-- SK 12/16/12 -- v2.0
-- 1. up reved to major version for 2013.1 Vivado release. No logic updates.
-- 2. Updated the version of AXI LITE IPIF to v2.0 in X.Y format
-- 3. updated the proc common version to proc_common_base_v5_0
-- 4. No Logic Updates
-- ^^^^^^
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_cmb"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use ieee.numeric_std.all;
--library proc_common_base_v5_0;
--use proc_common_base_v5_0.proc_common_pkg.clog2;
--use proc_common_base_v5_0.pselect_f;
--use proc_common_base_v5_0.ipif_pkg.all;
library axi_lite_ipif_v3_0;
use axi_lite_ipif_v3_0.ipif_pkg.all;
-------------------------------------------------------------------------------
-- Definition of Generics
-------------------------------------------------------------------------------
-- C_BUS_AWIDTH -- Address bus width
-- C_S_AXI_MIN_SIZE -- Minimum address range of the IP
-- C_ARD_ADDR_RANGE_ARRAY-- Base /High Address Pair for each Address Range
-- C_ARD_NUM_CE_ARRAY -- Desired number of chip enables for an address range
-- C_FAMILY -- Target FPGA family
-------------------------------------------------------------------------------
-- Definition of Ports
-------------------------------------------------------------------------------
-- Bus_clk -- Clock
-- Bus_rst -- Reset
-- Address_In_Erly -- Adddress in
-- Address_Valid_Erly -- Address is valid
-- Bus_RNW -- Read or write registered
-- Bus_RNW_Erly -- Read or Write
-- CS_CE_ld_enable -- chip select and chip enable registered
-- Clear_CS_CE_Reg -- Clear_CS_CE_Reg clear
-- RW_CE_ld_enable -- Read or Write Chip Enable
-- CS_for_gaps -- CS generation for the gaps between address ranges
-- CS_Out -- Chip select
-- RdCE_Out -- Read Chip enable
-- WrCE_Out -- Write chip enable
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Entity Declaration
-------------------------------------------------------------------------------
entity address_decoder is
generic (
C_BUS_AWIDTH : integer := 32;
C_S_AXI_MIN_SIZE : std_logic_vector(0 to 31) := X"000001FF";
C_ARD_ADDR_RANGE_ARRAY: SLV64_ARRAY_TYPE :=
(
X"0000_0000_1000_0000", -- IP user0 base address
X"0000_0000_1000_01FF", -- IP user0 high address
X"0000_0000_1000_0200", -- IP user1 base address
X"0000_0000_1000_02FF" -- IP user1 high address
);
C_ARD_NUM_CE_ARRAY : INTEGER_ARRAY_TYPE :=
(
8, -- User0 CE Number
1 -- User1 CE Number
);
C_FAMILY : string := "virtex6"
);
port (
Bus_clk : in std_logic;
Bus_rst : in std_logic;
-- PLB Interface signals
Address_In_Erly : in std_logic_vector(0 to C_BUS_AWIDTH-1);
Address_Valid_Erly : in std_logic;
Bus_RNW : in std_logic;
Bus_RNW_Erly : in std_logic;
-- Registering control signals
CS_CE_ld_enable : in std_logic;
Clear_CS_CE_Reg : in std_logic;
RW_CE_ld_enable : in std_logic;
CS_for_gaps : out std_logic;
-- Decode output signals
CS_Out : out std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
RdCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1);
WrCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1)
);
end entity address_decoder;
-------------------------------------------------------------------------------
-- Architecture section
-------------------------------------------------------------------------------
architecture IMP of address_decoder is
----------------------------------------------------------------------------------
-- below attributes are added to reduce the synth warnings in Vivado tool
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of imp : architecture is "yes";
----------------------------------------------------------------------------------
-- local type declarations ----------------------------------------------------
type decode_bit_array_type is Array(natural range 0 to (
(C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1) of
integer;
type short_addr_array_type is Array(natural range 0 to
C_ARD_ADDR_RANGE_ARRAY'LENGTH-1) of
std_logic_vector(0 to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- Function Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- This function converts a 64 bit address range array to a AWIDTH bit
-- address range array.
-------------------------------------------------------------------------------
function slv64_2_slv_awidth(slv64_addr_array : SLV64_ARRAY_TYPE;
awidth : integer)
return short_addr_array_type is
variable temp_addr : std_logic_vector(0 to 63);
variable slv_array : short_addr_array_type;
begin
for array_index in 0 to slv64_addr_array'length-1 loop
temp_addr := slv64_addr_array(array_index);
slv_array(array_index) := temp_addr((64-awidth) to 63);
end loop;
return(slv_array);
end function slv64_2_slv_awidth;
-------------------------------------------------------------------------------
--Function Addr_bits
--function to convert an address range (base address and an upper address)
--into the number of upper address bits needed for decoding a device
--select signal. will handle slices and big or little endian
-------------------------------------------------------------------------------
function Addr_Bits (x,y : std_logic_vector(0 to C_BUS_AWIDTH-1))
return integer is
variable addr_nor : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
addr_nor := x xor y;
for i in 0 to C_BUS_AWIDTH-1 loop
if addr_nor(i)='1' then
return i;
end if;
end loop;
--coverage off
return(C_BUS_AWIDTH);
--coverage on
end function Addr_Bits;
-------------------------------------------------------------------------------
--Function Get_Addr_Bits
--function calculates the array which has the decode bits for the each address
--range.
-------------------------------------------------------------------------------
function Get_Addr_Bits (baseaddrs : short_addr_array_type)
return decode_bit_array_type is
variable num_bits : decode_bit_array_type;
begin
for i in 0 to ((baseaddrs'length)/2)-1 loop
num_bits(i) := Addr_Bits (baseaddrs(i*2),
baseaddrs(i*2+1));
end loop;
return(num_bits);
end function Get_Addr_Bits;
-------------------------------------------------------------------------------
-- NEEDED_ADDR_BITS
--
-- Function Description:
-- This function calculates the number of address bits required
-- to support the CE generation logic. This is determined by
-- multiplying the number of CEs for an address space by the
-- data width of the address space (in bytes). Each address
-- space entry is processed and the biggest of the spaces is
-- used to set the number of address bits required to be latched
-- and used for CE decoding. A minimum value of 1 is returned by
-- this function.
--
-------------------------------------------------------------------------------
function needed_addr_bits (ce_array : INTEGER_ARRAY_TYPE)
return integer is
constant NUM_CE_ENTRIES : integer := CE_ARRAY'length;
variable biggest : integer := 2;
variable req_ce_addr_size : integer := 0;
variable num_addr_bits : integer := 0;
begin
for i in 0 to NUM_CE_ENTRIES-1 loop
req_ce_addr_size := ce_array(i) * 4;
if (req_ce_addr_size > biggest) Then
biggest := req_ce_addr_size;
end if;
end loop;
num_addr_bits := clog2(biggest);
return(num_addr_bits);
end function NEEDED_ADDR_BITS;
-----------------------------------------------------------------------------
-- Function calc_high_address
--
-- This function is used to calculate the high address of the each address
-- range
-----------------------------------------------------------------------------
function calc_high_address (high_address : short_addr_array_type;
index : integer) return std_logic_vector is
variable calc_high_addr : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
If (index = (C_ARD_ADDR_RANGE_ARRAY'length/2-1)) Then
calc_high_addr := C_S_AXI_MIN_SIZE(32-C_BUS_AWIDTH to 31);
else
calc_high_addr := high_address(index*2+2);
end if;
return(calc_high_addr);
end function calc_high_address;
----------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
constant ARD_ADDR_RANGE_ARRAY : short_addr_array_type :=
slv64_2_slv_awidth(C_ARD_ADDR_RANGE_ARRAY,
C_BUS_AWIDTH);
constant NUM_BASE_ADDRS : integer := (C_ARD_ADDR_RANGE_ARRAY'length)/2;
constant DECODE_BITS : decode_bit_array_type :=
Get_Addr_Bits(ARD_ADDR_RANGE_ARRAY);
constant NUM_CE_SIGNALS : integer :=
calc_num_ce(C_ARD_NUM_CE_ARRAY);
constant NUM_S_H_ADDR_BITS : integer :=
needed_addr_bits(C_ARD_NUM_CE_ARRAY);
-------------------------------------------------------------------------------
-- Signal Declarations
-------------------------------------------------------------------------------
signal pselect_hit_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal cs_out_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal ce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal rdce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal ce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1); --
signal cs_ce_clr : std_logic;
signal addr_out_s_h : std_logic_vector(0 to NUM_S_H_ADDR_BITS-1);
signal Bus_RNW_reg : std_logic;
-------------------------------------------------------------------------------
-- Begin architecture
-------------------------------------------------------------------------------
begin -- architecture IMP
-- Register clears
cs_ce_clr <= not Bus_rst or Clear_CS_CE_Reg;
addr_out_s_h <= Address_In_Erly(C_BUS_AWIDTH-NUM_S_H_ADDR_BITS
to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- MEM_DECODE_GEN: Universal Address Decode Block
-------------------------------------------------------------------------------
MEM_DECODE_GEN: for bar_index in 0 to NUM_BASE_ADDRS-1 generate
---------------
constant CE_INDEX_START : integer
:= calc_start_ce_index(C_ARD_NUM_CE_ARRAY,bar_index);
constant CE_ADDR_SIZE : Integer range 0 to 15
:= clog2(C_ARD_NUM_CE_ARRAY(bar_index));
constant OFFSET : integer := 2;
constant BASE_ADDR_x : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= ARD_ADDR_RANGE_ARRAY(bar_index*2+1);
constant HIGH_ADDR_X : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= calc_high_address(ARD_ADDR_RANGE_ARRAY,bar_index);
--constant DECODE_BITS_0 : integer:= DECODE_BITS(0);
---------
begin
---------
-- GEN_FOR_MULTI_CS: Below logic generates the CS for decoded address
-- -----------------
GEN_FOR_MULTI_CS : if C_ARD_ADDR_RANGE_ARRAY'length > 2 generate
-- Instantiate the basic Base Address Decoders
MEM_SELECT_I: entity axi_lite_ipif_v3_0.pselect_f
generic map
(
C_AB => DECODE_BITS(bar_index),
C_AW => C_BUS_AWIDTH,
C_BAR => ARD_ADDR_RANGE_ARRAY(bar_index*2),
C_FAMILY => C_FAMILY
)
port map
(
A => Address_In_Erly, -- [in]
AValid => Address_Valid_Erly, -- [in]
CS => pselect_hit_i(bar_index) -- [out]
);
end generate GEN_FOR_MULTI_CS;
-- GEN_FOR_ONE_CS: below logic decodes the CS for single address range
-- ---------------
GEN_FOR_ONE_CS : if C_ARD_ADDR_RANGE_ARRAY'length = 2 generate
pselect_hit_i(bar_index) <= Address_Valid_Erly;
end generate GEN_FOR_ONE_CS;
-- Instantate backend registers for the Chip Selects
BKEND_CS_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(Bus_Rst='0' or Clear_CS_CE_Reg = '1')then
cs_out_i(bar_index) <= '0';
elsif(CS_CE_ld_enable='1')then
cs_out_i(bar_index) <= pselect_hit_i(bar_index);
end if;
end if;
end process BKEND_CS_REG;
-------------------------------------------------------------------------
-- PER_CE_GEN: Now expand the individual CEs for each base address.
-------------------------------------------------------------------------
PER_CE_GEN: for j in 0 to C_ARD_NUM_CE_ARRAY(bar_index) - 1 generate
-----------
begin
-----------
----------------------------------------------------------------------
-- CE decoders for multiple CE's
----------------------------------------------------------------------
MULTIPLE_CES_THIS_CS_GEN : if CE_ADDR_SIZE > 0 generate
constant BAR : std_logic_vector(0 to CE_ADDR_SIZE-1) :=
std_logic_vector(to_unsigned(j,CE_ADDR_SIZE));
begin
CE_I : entity axi_lite_ipif_v3_0.pselect_f
generic map (
C_AB => CE_ADDR_SIZE ,
C_AW => CE_ADDR_SIZE ,
C_BAR => BAR ,
C_FAMILY => C_FAMILY
)
port map (
A => addr_out_s_h
(NUM_S_H_ADDR_BITS-OFFSET-CE_ADDR_SIZE
to NUM_S_H_ADDR_BITS - OFFSET - 1) ,
AValid => pselect_hit_i(bar_index) ,
CS => ce_expnd_i(CE_INDEX_START+j)
);
end generate MULTIPLE_CES_THIS_CS_GEN;
--------------------------------------
----------------------------------------------------------------------
-- SINGLE_CE_THIS_CS_GEN: CE decoders for single CE
----------------------------------------------------------------------
SINGLE_CE_THIS_CS_GEN : if CE_ADDR_SIZE = 0 generate
ce_expnd_i(CE_INDEX_START+j) <= pselect_hit_i(bar_index);
end generate;
-------------
end generate PER_CE_GEN;
------------------------
end generate MEM_DECODE_GEN;
-- RNW_REG_P: Register the incoming RNW signal at the time of registering the
-- address. This is need to generate the CE's separately.
RNW_REG_P:process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(RW_CE_ld_enable='1')then
Bus_RNW_reg <= Bus_RNW_Erly;
end if;
end if;
end process RNW_REG_P;
---------------------------------------------------------------------------
-- GEN_BKEND_CE_REGISTERS
-- This ForGen implements the backend registering for
-- the CE, RdCE, and WrCE output buses.
---------------------------------------------------------------------------
GEN_BKEND_CE_REGISTERS : for ce_index in 0 to NUM_CE_SIGNALS-1 generate
signal rdce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
------
begin
------
BKEND_RDCE_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(cs_ce_clr='1')then
ce_out_i(ce_index) <= '0';
elsif(RW_CE_ld_enable='1')then
ce_out_i(ce_index) <= ce_expnd_i(ce_index);
end if;
end if;
end process BKEND_RDCE_REG;
rdce_out_i(ce_index) <= ce_out_i(ce_index) and Bus_RNW_reg;
wrce_out_i(ce_index) <= ce_out_i(ce_index) and not Bus_RNW_reg;
-------------------------------
end generate GEN_BKEND_CE_REGISTERS;
-------------------------------------------------------------------------------
CS_for_gaps <= '0'; -- Removed the GAP adecoder logic
---------------------------------
CS_Out <= cs_out_i ;
RdCE_Out <= rdce_out_i ;
WrCE_Out <= wrce_out_i ;
end architecture IMP;
|
-------------------------------------------------------------------
-- (c) Copyright 1984 - 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
-------------------------------------------------------------------
-- ************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: address_decoder.vhd
-- Version: v2.0
-- Description: Address decoder utilizing unconstrained arrays for Base
-- Address specification and ce number.
-------------------------------------------------------------------------------
-- Structure: This section shows the hierarchical structure of axi_lite_ipif.
--
-- --axi_lite_ipif.vhd
-- --slave_attachment.vhd
-- --address_decoder.vhd
-------------------------------------------------------------------------------
-- Author: BSB
--
-- History:
--
-- BSB 05/20/10 -- First version
-- ~~~~~~
-- - Created the first version v1.00.a
-- ^^^^^^
-- ~~~~~~
-- SK 08/09/2010 --
-- - updated the core with optimziation. Closed CR 574507
-- - combined the CE generation logic to further optimize the code.
-- ^^^^^^
-- ~~~~~~
-- SK 12/16/12 -- v2.0
-- 1. up reved to major version for 2013.1 Vivado release. No logic updates.
-- 2. Updated the version of AXI LITE IPIF to v2.0 in X.Y format
-- 3. updated the proc common version to proc_common_base_v5_0
-- 4. No Logic Updates
-- ^^^^^^
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_cmb"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use ieee.numeric_std.all;
--library proc_common_base_v5_0;
--use proc_common_base_v5_0.proc_common_pkg.clog2;
--use proc_common_base_v5_0.pselect_f;
--use proc_common_base_v5_0.ipif_pkg.all;
library axi_lite_ipif_v3_0;
use axi_lite_ipif_v3_0.ipif_pkg.all;
-------------------------------------------------------------------------------
-- Definition of Generics
-------------------------------------------------------------------------------
-- C_BUS_AWIDTH -- Address bus width
-- C_S_AXI_MIN_SIZE -- Minimum address range of the IP
-- C_ARD_ADDR_RANGE_ARRAY-- Base /High Address Pair for each Address Range
-- C_ARD_NUM_CE_ARRAY -- Desired number of chip enables for an address range
-- C_FAMILY -- Target FPGA family
-------------------------------------------------------------------------------
-- Definition of Ports
-------------------------------------------------------------------------------
-- Bus_clk -- Clock
-- Bus_rst -- Reset
-- Address_In_Erly -- Adddress in
-- Address_Valid_Erly -- Address is valid
-- Bus_RNW -- Read or write registered
-- Bus_RNW_Erly -- Read or Write
-- CS_CE_ld_enable -- chip select and chip enable registered
-- Clear_CS_CE_Reg -- Clear_CS_CE_Reg clear
-- RW_CE_ld_enable -- Read or Write Chip Enable
-- CS_for_gaps -- CS generation for the gaps between address ranges
-- CS_Out -- Chip select
-- RdCE_Out -- Read Chip enable
-- WrCE_Out -- Write chip enable
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Entity Declaration
-------------------------------------------------------------------------------
entity address_decoder is
generic (
C_BUS_AWIDTH : integer := 32;
C_S_AXI_MIN_SIZE : std_logic_vector(0 to 31) := X"000001FF";
C_ARD_ADDR_RANGE_ARRAY: SLV64_ARRAY_TYPE :=
(
X"0000_0000_1000_0000", -- IP user0 base address
X"0000_0000_1000_01FF", -- IP user0 high address
X"0000_0000_1000_0200", -- IP user1 base address
X"0000_0000_1000_02FF" -- IP user1 high address
);
C_ARD_NUM_CE_ARRAY : INTEGER_ARRAY_TYPE :=
(
8, -- User0 CE Number
1 -- User1 CE Number
);
C_FAMILY : string := "virtex6"
);
port (
Bus_clk : in std_logic;
Bus_rst : in std_logic;
-- PLB Interface signals
Address_In_Erly : in std_logic_vector(0 to C_BUS_AWIDTH-1);
Address_Valid_Erly : in std_logic;
Bus_RNW : in std_logic;
Bus_RNW_Erly : in std_logic;
-- Registering control signals
CS_CE_ld_enable : in std_logic;
Clear_CS_CE_Reg : in std_logic;
RW_CE_ld_enable : in std_logic;
CS_for_gaps : out std_logic;
-- Decode output signals
CS_Out : out std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
RdCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1);
WrCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1)
);
end entity address_decoder;
-------------------------------------------------------------------------------
-- Architecture section
-------------------------------------------------------------------------------
architecture IMP of address_decoder is
----------------------------------------------------------------------------------
-- below attributes are added to reduce the synth warnings in Vivado tool
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of imp : architecture is "yes";
----------------------------------------------------------------------------------
-- local type declarations ----------------------------------------------------
type decode_bit_array_type is Array(natural range 0 to (
(C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1) of
integer;
type short_addr_array_type is Array(natural range 0 to
C_ARD_ADDR_RANGE_ARRAY'LENGTH-1) of
std_logic_vector(0 to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- Function Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- This function converts a 64 bit address range array to a AWIDTH bit
-- address range array.
-------------------------------------------------------------------------------
function slv64_2_slv_awidth(slv64_addr_array : SLV64_ARRAY_TYPE;
awidth : integer)
return short_addr_array_type is
variable temp_addr : std_logic_vector(0 to 63);
variable slv_array : short_addr_array_type;
begin
for array_index in 0 to slv64_addr_array'length-1 loop
temp_addr := slv64_addr_array(array_index);
slv_array(array_index) := temp_addr((64-awidth) to 63);
end loop;
return(slv_array);
end function slv64_2_slv_awidth;
-------------------------------------------------------------------------------
--Function Addr_bits
--function to convert an address range (base address and an upper address)
--into the number of upper address bits needed for decoding a device
--select signal. will handle slices and big or little endian
-------------------------------------------------------------------------------
function Addr_Bits (x,y : std_logic_vector(0 to C_BUS_AWIDTH-1))
return integer is
variable addr_nor : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
addr_nor := x xor y;
for i in 0 to C_BUS_AWIDTH-1 loop
if addr_nor(i)='1' then
return i;
end if;
end loop;
--coverage off
return(C_BUS_AWIDTH);
--coverage on
end function Addr_Bits;
-------------------------------------------------------------------------------
--Function Get_Addr_Bits
--function calculates the array which has the decode bits for the each address
--range.
-------------------------------------------------------------------------------
function Get_Addr_Bits (baseaddrs : short_addr_array_type)
return decode_bit_array_type is
variable num_bits : decode_bit_array_type;
begin
for i in 0 to ((baseaddrs'length)/2)-1 loop
num_bits(i) := Addr_Bits (baseaddrs(i*2),
baseaddrs(i*2+1));
end loop;
return(num_bits);
end function Get_Addr_Bits;
-------------------------------------------------------------------------------
-- NEEDED_ADDR_BITS
--
-- Function Description:
-- This function calculates the number of address bits required
-- to support the CE generation logic. This is determined by
-- multiplying the number of CEs for an address space by the
-- data width of the address space (in bytes). Each address
-- space entry is processed and the biggest of the spaces is
-- used to set the number of address bits required to be latched
-- and used for CE decoding. A minimum value of 1 is returned by
-- this function.
--
-------------------------------------------------------------------------------
function needed_addr_bits (ce_array : INTEGER_ARRAY_TYPE)
return integer is
constant NUM_CE_ENTRIES : integer := CE_ARRAY'length;
variable biggest : integer := 2;
variable req_ce_addr_size : integer := 0;
variable num_addr_bits : integer := 0;
begin
for i in 0 to NUM_CE_ENTRIES-1 loop
req_ce_addr_size := ce_array(i) * 4;
if (req_ce_addr_size > biggest) Then
biggest := req_ce_addr_size;
end if;
end loop;
num_addr_bits := clog2(biggest);
return(num_addr_bits);
end function NEEDED_ADDR_BITS;
-----------------------------------------------------------------------------
-- Function calc_high_address
--
-- This function is used to calculate the high address of the each address
-- range
-----------------------------------------------------------------------------
function calc_high_address (high_address : short_addr_array_type;
index : integer) return std_logic_vector is
variable calc_high_addr : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
If (index = (C_ARD_ADDR_RANGE_ARRAY'length/2-1)) Then
calc_high_addr := C_S_AXI_MIN_SIZE(32-C_BUS_AWIDTH to 31);
else
calc_high_addr := high_address(index*2+2);
end if;
return(calc_high_addr);
end function calc_high_address;
----------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
constant ARD_ADDR_RANGE_ARRAY : short_addr_array_type :=
slv64_2_slv_awidth(C_ARD_ADDR_RANGE_ARRAY,
C_BUS_AWIDTH);
constant NUM_BASE_ADDRS : integer := (C_ARD_ADDR_RANGE_ARRAY'length)/2;
constant DECODE_BITS : decode_bit_array_type :=
Get_Addr_Bits(ARD_ADDR_RANGE_ARRAY);
constant NUM_CE_SIGNALS : integer :=
calc_num_ce(C_ARD_NUM_CE_ARRAY);
constant NUM_S_H_ADDR_BITS : integer :=
needed_addr_bits(C_ARD_NUM_CE_ARRAY);
-------------------------------------------------------------------------------
-- Signal Declarations
-------------------------------------------------------------------------------
signal pselect_hit_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal cs_out_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal ce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal rdce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal ce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1); --
signal cs_ce_clr : std_logic;
signal addr_out_s_h : std_logic_vector(0 to NUM_S_H_ADDR_BITS-1);
signal Bus_RNW_reg : std_logic;
-------------------------------------------------------------------------------
-- Begin architecture
-------------------------------------------------------------------------------
begin -- architecture IMP
-- Register clears
cs_ce_clr <= not Bus_rst or Clear_CS_CE_Reg;
addr_out_s_h <= Address_In_Erly(C_BUS_AWIDTH-NUM_S_H_ADDR_BITS
to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- MEM_DECODE_GEN: Universal Address Decode Block
-------------------------------------------------------------------------------
MEM_DECODE_GEN: for bar_index in 0 to NUM_BASE_ADDRS-1 generate
---------------
constant CE_INDEX_START : integer
:= calc_start_ce_index(C_ARD_NUM_CE_ARRAY,bar_index);
constant CE_ADDR_SIZE : Integer range 0 to 15
:= clog2(C_ARD_NUM_CE_ARRAY(bar_index));
constant OFFSET : integer := 2;
constant BASE_ADDR_x : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= ARD_ADDR_RANGE_ARRAY(bar_index*2+1);
constant HIGH_ADDR_X : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= calc_high_address(ARD_ADDR_RANGE_ARRAY,bar_index);
--constant DECODE_BITS_0 : integer:= DECODE_BITS(0);
---------
begin
---------
-- GEN_FOR_MULTI_CS: Below logic generates the CS for decoded address
-- -----------------
GEN_FOR_MULTI_CS : if C_ARD_ADDR_RANGE_ARRAY'length > 2 generate
-- Instantiate the basic Base Address Decoders
MEM_SELECT_I: entity axi_lite_ipif_v3_0.pselect_f
generic map
(
C_AB => DECODE_BITS(bar_index),
C_AW => C_BUS_AWIDTH,
C_BAR => ARD_ADDR_RANGE_ARRAY(bar_index*2),
C_FAMILY => C_FAMILY
)
port map
(
A => Address_In_Erly, -- [in]
AValid => Address_Valid_Erly, -- [in]
CS => pselect_hit_i(bar_index) -- [out]
);
end generate GEN_FOR_MULTI_CS;
-- GEN_FOR_ONE_CS: below logic decodes the CS for single address range
-- ---------------
GEN_FOR_ONE_CS : if C_ARD_ADDR_RANGE_ARRAY'length = 2 generate
pselect_hit_i(bar_index) <= Address_Valid_Erly;
end generate GEN_FOR_ONE_CS;
-- Instantate backend registers for the Chip Selects
BKEND_CS_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(Bus_Rst='0' or Clear_CS_CE_Reg = '1')then
cs_out_i(bar_index) <= '0';
elsif(CS_CE_ld_enable='1')then
cs_out_i(bar_index) <= pselect_hit_i(bar_index);
end if;
end if;
end process BKEND_CS_REG;
-------------------------------------------------------------------------
-- PER_CE_GEN: Now expand the individual CEs for each base address.
-------------------------------------------------------------------------
PER_CE_GEN: for j in 0 to C_ARD_NUM_CE_ARRAY(bar_index) - 1 generate
-----------
begin
-----------
----------------------------------------------------------------------
-- CE decoders for multiple CE's
----------------------------------------------------------------------
MULTIPLE_CES_THIS_CS_GEN : if CE_ADDR_SIZE > 0 generate
constant BAR : std_logic_vector(0 to CE_ADDR_SIZE-1) :=
std_logic_vector(to_unsigned(j,CE_ADDR_SIZE));
begin
CE_I : entity axi_lite_ipif_v3_0.pselect_f
generic map (
C_AB => CE_ADDR_SIZE ,
C_AW => CE_ADDR_SIZE ,
C_BAR => BAR ,
C_FAMILY => C_FAMILY
)
port map (
A => addr_out_s_h
(NUM_S_H_ADDR_BITS-OFFSET-CE_ADDR_SIZE
to NUM_S_H_ADDR_BITS - OFFSET - 1) ,
AValid => pselect_hit_i(bar_index) ,
CS => ce_expnd_i(CE_INDEX_START+j)
);
end generate MULTIPLE_CES_THIS_CS_GEN;
--------------------------------------
----------------------------------------------------------------------
-- SINGLE_CE_THIS_CS_GEN: CE decoders for single CE
----------------------------------------------------------------------
SINGLE_CE_THIS_CS_GEN : if CE_ADDR_SIZE = 0 generate
ce_expnd_i(CE_INDEX_START+j) <= pselect_hit_i(bar_index);
end generate;
-------------
end generate PER_CE_GEN;
------------------------
end generate MEM_DECODE_GEN;
-- RNW_REG_P: Register the incoming RNW signal at the time of registering the
-- address. This is need to generate the CE's separately.
RNW_REG_P:process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(RW_CE_ld_enable='1')then
Bus_RNW_reg <= Bus_RNW_Erly;
end if;
end if;
end process RNW_REG_P;
---------------------------------------------------------------------------
-- GEN_BKEND_CE_REGISTERS
-- This ForGen implements the backend registering for
-- the CE, RdCE, and WrCE output buses.
---------------------------------------------------------------------------
GEN_BKEND_CE_REGISTERS : for ce_index in 0 to NUM_CE_SIGNALS-1 generate
signal rdce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
------
begin
------
BKEND_RDCE_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(cs_ce_clr='1')then
ce_out_i(ce_index) <= '0';
elsif(RW_CE_ld_enable='1')then
ce_out_i(ce_index) <= ce_expnd_i(ce_index);
end if;
end if;
end process BKEND_RDCE_REG;
rdce_out_i(ce_index) <= ce_out_i(ce_index) and Bus_RNW_reg;
wrce_out_i(ce_index) <= ce_out_i(ce_index) and not Bus_RNW_reg;
-------------------------------
end generate GEN_BKEND_CE_REGISTERS;
-------------------------------------------------------------------------------
CS_for_gaps <= '0'; -- Removed the GAP adecoder logic
---------------------------------
CS_Out <= cs_out_i ;
RdCE_Out <= rdce_out_i ;
WrCE_Out <= wrce_out_i ;
end architecture IMP;
|
-------------------------------------------------------------------
-- (c) Copyright 1984 - 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
-------------------------------------------------------------------
-- ************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: address_decoder.vhd
-- Version: v2.0
-- Description: Address decoder utilizing unconstrained arrays for Base
-- Address specification and ce number.
-------------------------------------------------------------------------------
-- Structure: This section shows the hierarchical structure of axi_lite_ipif.
--
-- --axi_lite_ipif.vhd
-- --slave_attachment.vhd
-- --address_decoder.vhd
-------------------------------------------------------------------------------
-- Author: BSB
--
-- History:
--
-- BSB 05/20/10 -- First version
-- ~~~~~~
-- - Created the first version v1.00.a
-- ^^^^^^
-- ~~~~~~
-- SK 08/09/2010 --
-- - updated the core with optimziation. Closed CR 574507
-- - combined the CE generation logic to further optimize the code.
-- ^^^^^^
-- ~~~~~~
-- SK 12/16/12 -- v2.0
-- 1. up reved to major version for 2013.1 Vivado release. No logic updates.
-- 2. Updated the version of AXI LITE IPIF to v2.0 in X.Y format
-- 3. updated the proc common version to proc_common_base_v5_0
-- 4. No Logic Updates
-- ^^^^^^
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_cmb"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use ieee.numeric_std.all;
--library proc_common_base_v5_0;
--use proc_common_base_v5_0.proc_common_pkg.clog2;
--use proc_common_base_v5_0.pselect_f;
--use proc_common_base_v5_0.ipif_pkg.all;
library axi_lite_ipif_v3_0;
use axi_lite_ipif_v3_0.ipif_pkg.all;
-------------------------------------------------------------------------------
-- Definition of Generics
-------------------------------------------------------------------------------
-- C_BUS_AWIDTH -- Address bus width
-- C_S_AXI_MIN_SIZE -- Minimum address range of the IP
-- C_ARD_ADDR_RANGE_ARRAY-- Base /High Address Pair for each Address Range
-- C_ARD_NUM_CE_ARRAY -- Desired number of chip enables for an address range
-- C_FAMILY -- Target FPGA family
-------------------------------------------------------------------------------
-- Definition of Ports
-------------------------------------------------------------------------------
-- Bus_clk -- Clock
-- Bus_rst -- Reset
-- Address_In_Erly -- Adddress in
-- Address_Valid_Erly -- Address is valid
-- Bus_RNW -- Read or write registered
-- Bus_RNW_Erly -- Read or Write
-- CS_CE_ld_enable -- chip select and chip enable registered
-- Clear_CS_CE_Reg -- Clear_CS_CE_Reg clear
-- RW_CE_ld_enable -- Read or Write Chip Enable
-- CS_for_gaps -- CS generation for the gaps between address ranges
-- CS_Out -- Chip select
-- RdCE_Out -- Read Chip enable
-- WrCE_Out -- Write chip enable
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Entity Declaration
-------------------------------------------------------------------------------
entity address_decoder is
generic (
C_BUS_AWIDTH : integer := 32;
C_S_AXI_MIN_SIZE : std_logic_vector(0 to 31) := X"000001FF";
C_ARD_ADDR_RANGE_ARRAY: SLV64_ARRAY_TYPE :=
(
X"0000_0000_1000_0000", -- IP user0 base address
X"0000_0000_1000_01FF", -- IP user0 high address
X"0000_0000_1000_0200", -- IP user1 base address
X"0000_0000_1000_02FF" -- IP user1 high address
);
C_ARD_NUM_CE_ARRAY : INTEGER_ARRAY_TYPE :=
(
8, -- User0 CE Number
1 -- User1 CE Number
);
C_FAMILY : string := "virtex6"
);
port (
Bus_clk : in std_logic;
Bus_rst : in std_logic;
-- PLB Interface signals
Address_In_Erly : in std_logic_vector(0 to C_BUS_AWIDTH-1);
Address_Valid_Erly : in std_logic;
Bus_RNW : in std_logic;
Bus_RNW_Erly : in std_logic;
-- Registering control signals
CS_CE_ld_enable : in std_logic;
Clear_CS_CE_Reg : in std_logic;
RW_CE_ld_enable : in std_logic;
CS_for_gaps : out std_logic;
-- Decode output signals
CS_Out : out std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
RdCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1);
WrCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1)
);
end entity address_decoder;
-------------------------------------------------------------------------------
-- Architecture section
-------------------------------------------------------------------------------
architecture IMP of address_decoder is
----------------------------------------------------------------------------------
-- below attributes are added to reduce the synth warnings in Vivado tool
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of imp : architecture is "yes";
----------------------------------------------------------------------------------
-- local type declarations ----------------------------------------------------
type decode_bit_array_type is Array(natural range 0 to (
(C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1) of
integer;
type short_addr_array_type is Array(natural range 0 to
C_ARD_ADDR_RANGE_ARRAY'LENGTH-1) of
std_logic_vector(0 to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- Function Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- This function converts a 64 bit address range array to a AWIDTH bit
-- address range array.
-------------------------------------------------------------------------------
function slv64_2_slv_awidth(slv64_addr_array : SLV64_ARRAY_TYPE;
awidth : integer)
return short_addr_array_type is
variable temp_addr : std_logic_vector(0 to 63);
variable slv_array : short_addr_array_type;
begin
for array_index in 0 to slv64_addr_array'length-1 loop
temp_addr := slv64_addr_array(array_index);
slv_array(array_index) := temp_addr((64-awidth) to 63);
end loop;
return(slv_array);
end function slv64_2_slv_awidth;
-------------------------------------------------------------------------------
--Function Addr_bits
--function to convert an address range (base address and an upper address)
--into the number of upper address bits needed for decoding a device
--select signal. will handle slices and big or little endian
-------------------------------------------------------------------------------
function Addr_Bits (x,y : std_logic_vector(0 to C_BUS_AWIDTH-1))
return integer is
variable addr_nor : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
addr_nor := x xor y;
for i in 0 to C_BUS_AWIDTH-1 loop
if addr_nor(i)='1' then
return i;
end if;
end loop;
--coverage off
return(C_BUS_AWIDTH);
--coverage on
end function Addr_Bits;
-------------------------------------------------------------------------------
--Function Get_Addr_Bits
--function calculates the array which has the decode bits for the each address
--range.
-------------------------------------------------------------------------------
function Get_Addr_Bits (baseaddrs : short_addr_array_type)
return decode_bit_array_type is
variable num_bits : decode_bit_array_type;
begin
for i in 0 to ((baseaddrs'length)/2)-1 loop
num_bits(i) := Addr_Bits (baseaddrs(i*2),
baseaddrs(i*2+1));
end loop;
return(num_bits);
end function Get_Addr_Bits;
-------------------------------------------------------------------------------
-- NEEDED_ADDR_BITS
--
-- Function Description:
-- This function calculates the number of address bits required
-- to support the CE generation logic. This is determined by
-- multiplying the number of CEs for an address space by the
-- data width of the address space (in bytes). Each address
-- space entry is processed and the biggest of the spaces is
-- used to set the number of address bits required to be latched
-- and used for CE decoding. A minimum value of 1 is returned by
-- this function.
--
-------------------------------------------------------------------------------
function needed_addr_bits (ce_array : INTEGER_ARRAY_TYPE)
return integer is
constant NUM_CE_ENTRIES : integer := CE_ARRAY'length;
variable biggest : integer := 2;
variable req_ce_addr_size : integer := 0;
variable num_addr_bits : integer := 0;
begin
for i in 0 to NUM_CE_ENTRIES-1 loop
req_ce_addr_size := ce_array(i) * 4;
if (req_ce_addr_size > biggest) Then
biggest := req_ce_addr_size;
end if;
end loop;
num_addr_bits := clog2(biggest);
return(num_addr_bits);
end function NEEDED_ADDR_BITS;
-----------------------------------------------------------------------------
-- Function calc_high_address
--
-- This function is used to calculate the high address of the each address
-- range
-----------------------------------------------------------------------------
function calc_high_address (high_address : short_addr_array_type;
index : integer) return std_logic_vector is
variable calc_high_addr : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
If (index = (C_ARD_ADDR_RANGE_ARRAY'length/2-1)) Then
calc_high_addr := C_S_AXI_MIN_SIZE(32-C_BUS_AWIDTH to 31);
else
calc_high_addr := high_address(index*2+2);
end if;
return(calc_high_addr);
end function calc_high_address;
----------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
constant ARD_ADDR_RANGE_ARRAY : short_addr_array_type :=
slv64_2_slv_awidth(C_ARD_ADDR_RANGE_ARRAY,
C_BUS_AWIDTH);
constant NUM_BASE_ADDRS : integer := (C_ARD_ADDR_RANGE_ARRAY'length)/2;
constant DECODE_BITS : decode_bit_array_type :=
Get_Addr_Bits(ARD_ADDR_RANGE_ARRAY);
constant NUM_CE_SIGNALS : integer :=
calc_num_ce(C_ARD_NUM_CE_ARRAY);
constant NUM_S_H_ADDR_BITS : integer :=
needed_addr_bits(C_ARD_NUM_CE_ARRAY);
-------------------------------------------------------------------------------
-- Signal Declarations
-------------------------------------------------------------------------------
signal pselect_hit_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal cs_out_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal ce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal rdce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal ce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1); --
signal cs_ce_clr : std_logic;
signal addr_out_s_h : std_logic_vector(0 to NUM_S_H_ADDR_BITS-1);
signal Bus_RNW_reg : std_logic;
-------------------------------------------------------------------------------
-- Begin architecture
-------------------------------------------------------------------------------
begin -- architecture IMP
-- Register clears
cs_ce_clr <= not Bus_rst or Clear_CS_CE_Reg;
addr_out_s_h <= Address_In_Erly(C_BUS_AWIDTH-NUM_S_H_ADDR_BITS
to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- MEM_DECODE_GEN: Universal Address Decode Block
-------------------------------------------------------------------------------
MEM_DECODE_GEN: for bar_index in 0 to NUM_BASE_ADDRS-1 generate
---------------
constant CE_INDEX_START : integer
:= calc_start_ce_index(C_ARD_NUM_CE_ARRAY,bar_index);
constant CE_ADDR_SIZE : Integer range 0 to 15
:= clog2(C_ARD_NUM_CE_ARRAY(bar_index));
constant OFFSET : integer := 2;
constant BASE_ADDR_x : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= ARD_ADDR_RANGE_ARRAY(bar_index*2+1);
constant HIGH_ADDR_X : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= calc_high_address(ARD_ADDR_RANGE_ARRAY,bar_index);
--constant DECODE_BITS_0 : integer:= DECODE_BITS(0);
---------
begin
---------
-- GEN_FOR_MULTI_CS: Below logic generates the CS for decoded address
-- -----------------
GEN_FOR_MULTI_CS : if C_ARD_ADDR_RANGE_ARRAY'length > 2 generate
-- Instantiate the basic Base Address Decoders
MEM_SELECT_I: entity axi_lite_ipif_v3_0.pselect_f
generic map
(
C_AB => DECODE_BITS(bar_index),
C_AW => C_BUS_AWIDTH,
C_BAR => ARD_ADDR_RANGE_ARRAY(bar_index*2),
C_FAMILY => C_FAMILY
)
port map
(
A => Address_In_Erly, -- [in]
AValid => Address_Valid_Erly, -- [in]
CS => pselect_hit_i(bar_index) -- [out]
);
end generate GEN_FOR_MULTI_CS;
-- GEN_FOR_ONE_CS: below logic decodes the CS for single address range
-- ---------------
GEN_FOR_ONE_CS : if C_ARD_ADDR_RANGE_ARRAY'length = 2 generate
pselect_hit_i(bar_index) <= Address_Valid_Erly;
end generate GEN_FOR_ONE_CS;
-- Instantate backend registers for the Chip Selects
BKEND_CS_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(Bus_Rst='0' or Clear_CS_CE_Reg = '1')then
cs_out_i(bar_index) <= '0';
elsif(CS_CE_ld_enable='1')then
cs_out_i(bar_index) <= pselect_hit_i(bar_index);
end if;
end if;
end process BKEND_CS_REG;
-------------------------------------------------------------------------
-- PER_CE_GEN: Now expand the individual CEs for each base address.
-------------------------------------------------------------------------
PER_CE_GEN: for j in 0 to C_ARD_NUM_CE_ARRAY(bar_index) - 1 generate
-----------
begin
-----------
----------------------------------------------------------------------
-- CE decoders for multiple CE's
----------------------------------------------------------------------
MULTIPLE_CES_THIS_CS_GEN : if CE_ADDR_SIZE > 0 generate
constant BAR : std_logic_vector(0 to CE_ADDR_SIZE-1) :=
std_logic_vector(to_unsigned(j,CE_ADDR_SIZE));
begin
CE_I : entity axi_lite_ipif_v3_0.pselect_f
generic map (
C_AB => CE_ADDR_SIZE ,
C_AW => CE_ADDR_SIZE ,
C_BAR => BAR ,
C_FAMILY => C_FAMILY
)
port map (
A => addr_out_s_h
(NUM_S_H_ADDR_BITS-OFFSET-CE_ADDR_SIZE
to NUM_S_H_ADDR_BITS - OFFSET - 1) ,
AValid => pselect_hit_i(bar_index) ,
CS => ce_expnd_i(CE_INDEX_START+j)
);
end generate MULTIPLE_CES_THIS_CS_GEN;
--------------------------------------
----------------------------------------------------------------------
-- SINGLE_CE_THIS_CS_GEN: CE decoders for single CE
----------------------------------------------------------------------
SINGLE_CE_THIS_CS_GEN : if CE_ADDR_SIZE = 0 generate
ce_expnd_i(CE_INDEX_START+j) <= pselect_hit_i(bar_index);
end generate;
-------------
end generate PER_CE_GEN;
------------------------
end generate MEM_DECODE_GEN;
-- RNW_REG_P: Register the incoming RNW signal at the time of registering the
-- address. This is need to generate the CE's separately.
RNW_REG_P:process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(RW_CE_ld_enable='1')then
Bus_RNW_reg <= Bus_RNW_Erly;
end if;
end if;
end process RNW_REG_P;
---------------------------------------------------------------------------
-- GEN_BKEND_CE_REGISTERS
-- This ForGen implements the backend registering for
-- the CE, RdCE, and WrCE output buses.
---------------------------------------------------------------------------
GEN_BKEND_CE_REGISTERS : for ce_index in 0 to NUM_CE_SIGNALS-1 generate
signal rdce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
------
begin
------
BKEND_RDCE_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(cs_ce_clr='1')then
ce_out_i(ce_index) <= '0';
elsif(RW_CE_ld_enable='1')then
ce_out_i(ce_index) <= ce_expnd_i(ce_index);
end if;
end if;
end process BKEND_RDCE_REG;
rdce_out_i(ce_index) <= ce_out_i(ce_index) and Bus_RNW_reg;
wrce_out_i(ce_index) <= ce_out_i(ce_index) and not Bus_RNW_reg;
-------------------------------
end generate GEN_BKEND_CE_REGISTERS;
-------------------------------------------------------------------------------
CS_for_gaps <= '0'; -- Removed the GAP adecoder logic
---------------------------------
CS_Out <= cs_out_i ;
RdCE_Out <= rdce_out_i ;
WrCE_Out <= wrce_out_i ;
end architecture IMP;
|
-------------------------------------------------------------------
-- (c) Copyright 1984 - 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
-------------------------------------------------------------------
-- ************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: address_decoder.vhd
-- Version: v2.0
-- Description: Address decoder utilizing unconstrained arrays for Base
-- Address specification and ce number.
-------------------------------------------------------------------------------
-- Structure: This section shows the hierarchical structure of axi_lite_ipif.
--
-- --axi_lite_ipif.vhd
-- --slave_attachment.vhd
-- --address_decoder.vhd
-------------------------------------------------------------------------------
-- Author: BSB
--
-- History:
--
-- BSB 05/20/10 -- First version
-- ~~~~~~
-- - Created the first version v1.00.a
-- ^^^^^^
-- ~~~~~~
-- SK 08/09/2010 --
-- - updated the core with optimziation. Closed CR 574507
-- - combined the CE generation logic to further optimize the code.
-- ^^^^^^
-- ~~~~~~
-- SK 12/16/12 -- v2.0
-- 1. up reved to major version for 2013.1 Vivado release. No logic updates.
-- 2. Updated the version of AXI LITE IPIF to v2.0 in X.Y format
-- 3. updated the proc common version to proc_common_base_v5_0
-- 4. No Logic Updates
-- ^^^^^^
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_cmb"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use ieee.numeric_std.all;
--library proc_common_base_v5_0;
--use proc_common_base_v5_0.proc_common_pkg.clog2;
--use proc_common_base_v5_0.pselect_f;
--use proc_common_base_v5_0.ipif_pkg.all;
library axi_lite_ipif_v3_0;
use axi_lite_ipif_v3_0.ipif_pkg.all;
-------------------------------------------------------------------------------
-- Definition of Generics
-------------------------------------------------------------------------------
-- C_BUS_AWIDTH -- Address bus width
-- C_S_AXI_MIN_SIZE -- Minimum address range of the IP
-- C_ARD_ADDR_RANGE_ARRAY-- Base /High Address Pair for each Address Range
-- C_ARD_NUM_CE_ARRAY -- Desired number of chip enables for an address range
-- C_FAMILY -- Target FPGA family
-------------------------------------------------------------------------------
-- Definition of Ports
-------------------------------------------------------------------------------
-- Bus_clk -- Clock
-- Bus_rst -- Reset
-- Address_In_Erly -- Adddress in
-- Address_Valid_Erly -- Address is valid
-- Bus_RNW -- Read or write registered
-- Bus_RNW_Erly -- Read or Write
-- CS_CE_ld_enable -- chip select and chip enable registered
-- Clear_CS_CE_Reg -- Clear_CS_CE_Reg clear
-- RW_CE_ld_enable -- Read or Write Chip Enable
-- CS_for_gaps -- CS generation for the gaps between address ranges
-- CS_Out -- Chip select
-- RdCE_Out -- Read Chip enable
-- WrCE_Out -- Write chip enable
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Entity Declaration
-------------------------------------------------------------------------------
entity address_decoder is
generic (
C_BUS_AWIDTH : integer := 32;
C_S_AXI_MIN_SIZE : std_logic_vector(0 to 31) := X"000001FF";
C_ARD_ADDR_RANGE_ARRAY: SLV64_ARRAY_TYPE :=
(
X"0000_0000_1000_0000", -- IP user0 base address
X"0000_0000_1000_01FF", -- IP user0 high address
X"0000_0000_1000_0200", -- IP user1 base address
X"0000_0000_1000_02FF" -- IP user1 high address
);
C_ARD_NUM_CE_ARRAY : INTEGER_ARRAY_TYPE :=
(
8, -- User0 CE Number
1 -- User1 CE Number
);
C_FAMILY : string := "virtex6"
);
port (
Bus_clk : in std_logic;
Bus_rst : in std_logic;
-- PLB Interface signals
Address_In_Erly : in std_logic_vector(0 to C_BUS_AWIDTH-1);
Address_Valid_Erly : in std_logic;
Bus_RNW : in std_logic;
Bus_RNW_Erly : in std_logic;
-- Registering control signals
CS_CE_ld_enable : in std_logic;
Clear_CS_CE_Reg : in std_logic;
RW_CE_ld_enable : in std_logic;
CS_for_gaps : out std_logic;
-- Decode output signals
CS_Out : out std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
RdCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1);
WrCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1)
);
end entity address_decoder;
-------------------------------------------------------------------------------
-- Architecture section
-------------------------------------------------------------------------------
architecture IMP of address_decoder is
----------------------------------------------------------------------------------
-- below attributes are added to reduce the synth warnings in Vivado tool
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of imp : architecture is "yes";
----------------------------------------------------------------------------------
-- local type declarations ----------------------------------------------------
type decode_bit_array_type is Array(natural range 0 to (
(C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1) of
integer;
type short_addr_array_type is Array(natural range 0 to
C_ARD_ADDR_RANGE_ARRAY'LENGTH-1) of
std_logic_vector(0 to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- Function Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- This function converts a 64 bit address range array to a AWIDTH bit
-- address range array.
-------------------------------------------------------------------------------
function slv64_2_slv_awidth(slv64_addr_array : SLV64_ARRAY_TYPE;
awidth : integer)
return short_addr_array_type is
variable temp_addr : std_logic_vector(0 to 63);
variable slv_array : short_addr_array_type;
begin
for array_index in 0 to slv64_addr_array'length-1 loop
temp_addr := slv64_addr_array(array_index);
slv_array(array_index) := temp_addr((64-awidth) to 63);
end loop;
return(slv_array);
end function slv64_2_slv_awidth;
-------------------------------------------------------------------------------
--Function Addr_bits
--function to convert an address range (base address and an upper address)
--into the number of upper address bits needed for decoding a device
--select signal. will handle slices and big or little endian
-------------------------------------------------------------------------------
function Addr_Bits (x,y : std_logic_vector(0 to C_BUS_AWIDTH-1))
return integer is
variable addr_nor : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
addr_nor := x xor y;
for i in 0 to C_BUS_AWIDTH-1 loop
if addr_nor(i)='1' then
return i;
end if;
end loop;
--coverage off
return(C_BUS_AWIDTH);
--coverage on
end function Addr_Bits;
-------------------------------------------------------------------------------
--Function Get_Addr_Bits
--function calculates the array which has the decode bits for the each address
--range.
-------------------------------------------------------------------------------
function Get_Addr_Bits (baseaddrs : short_addr_array_type)
return decode_bit_array_type is
variable num_bits : decode_bit_array_type;
begin
for i in 0 to ((baseaddrs'length)/2)-1 loop
num_bits(i) := Addr_Bits (baseaddrs(i*2),
baseaddrs(i*2+1));
end loop;
return(num_bits);
end function Get_Addr_Bits;
-------------------------------------------------------------------------------
-- NEEDED_ADDR_BITS
--
-- Function Description:
-- This function calculates the number of address bits required
-- to support the CE generation logic. This is determined by
-- multiplying the number of CEs for an address space by the
-- data width of the address space (in bytes). Each address
-- space entry is processed and the biggest of the spaces is
-- used to set the number of address bits required to be latched
-- and used for CE decoding. A minimum value of 1 is returned by
-- this function.
--
-------------------------------------------------------------------------------
function needed_addr_bits (ce_array : INTEGER_ARRAY_TYPE)
return integer is
constant NUM_CE_ENTRIES : integer := CE_ARRAY'length;
variable biggest : integer := 2;
variable req_ce_addr_size : integer := 0;
variable num_addr_bits : integer := 0;
begin
for i in 0 to NUM_CE_ENTRIES-1 loop
req_ce_addr_size := ce_array(i) * 4;
if (req_ce_addr_size > biggest) Then
biggest := req_ce_addr_size;
end if;
end loop;
num_addr_bits := clog2(biggest);
return(num_addr_bits);
end function NEEDED_ADDR_BITS;
-----------------------------------------------------------------------------
-- Function calc_high_address
--
-- This function is used to calculate the high address of the each address
-- range
-----------------------------------------------------------------------------
function calc_high_address (high_address : short_addr_array_type;
index : integer) return std_logic_vector is
variable calc_high_addr : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
If (index = (C_ARD_ADDR_RANGE_ARRAY'length/2-1)) Then
calc_high_addr := C_S_AXI_MIN_SIZE(32-C_BUS_AWIDTH to 31);
else
calc_high_addr := high_address(index*2+2);
end if;
return(calc_high_addr);
end function calc_high_address;
----------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
constant ARD_ADDR_RANGE_ARRAY : short_addr_array_type :=
slv64_2_slv_awidth(C_ARD_ADDR_RANGE_ARRAY,
C_BUS_AWIDTH);
constant NUM_BASE_ADDRS : integer := (C_ARD_ADDR_RANGE_ARRAY'length)/2;
constant DECODE_BITS : decode_bit_array_type :=
Get_Addr_Bits(ARD_ADDR_RANGE_ARRAY);
constant NUM_CE_SIGNALS : integer :=
calc_num_ce(C_ARD_NUM_CE_ARRAY);
constant NUM_S_H_ADDR_BITS : integer :=
needed_addr_bits(C_ARD_NUM_CE_ARRAY);
-------------------------------------------------------------------------------
-- Signal Declarations
-------------------------------------------------------------------------------
signal pselect_hit_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal cs_out_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal ce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal rdce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal ce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1); --
signal cs_ce_clr : std_logic;
signal addr_out_s_h : std_logic_vector(0 to NUM_S_H_ADDR_BITS-1);
signal Bus_RNW_reg : std_logic;
-------------------------------------------------------------------------------
-- Begin architecture
-------------------------------------------------------------------------------
begin -- architecture IMP
-- Register clears
cs_ce_clr <= not Bus_rst or Clear_CS_CE_Reg;
addr_out_s_h <= Address_In_Erly(C_BUS_AWIDTH-NUM_S_H_ADDR_BITS
to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- MEM_DECODE_GEN: Universal Address Decode Block
-------------------------------------------------------------------------------
MEM_DECODE_GEN: for bar_index in 0 to NUM_BASE_ADDRS-1 generate
---------------
constant CE_INDEX_START : integer
:= calc_start_ce_index(C_ARD_NUM_CE_ARRAY,bar_index);
constant CE_ADDR_SIZE : Integer range 0 to 15
:= clog2(C_ARD_NUM_CE_ARRAY(bar_index));
constant OFFSET : integer := 2;
constant BASE_ADDR_x : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= ARD_ADDR_RANGE_ARRAY(bar_index*2+1);
constant HIGH_ADDR_X : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= calc_high_address(ARD_ADDR_RANGE_ARRAY,bar_index);
--constant DECODE_BITS_0 : integer:= DECODE_BITS(0);
---------
begin
---------
-- GEN_FOR_MULTI_CS: Below logic generates the CS for decoded address
-- -----------------
GEN_FOR_MULTI_CS : if C_ARD_ADDR_RANGE_ARRAY'length > 2 generate
-- Instantiate the basic Base Address Decoders
MEM_SELECT_I: entity axi_lite_ipif_v3_0.pselect_f
generic map
(
C_AB => DECODE_BITS(bar_index),
C_AW => C_BUS_AWIDTH,
C_BAR => ARD_ADDR_RANGE_ARRAY(bar_index*2),
C_FAMILY => C_FAMILY
)
port map
(
A => Address_In_Erly, -- [in]
AValid => Address_Valid_Erly, -- [in]
CS => pselect_hit_i(bar_index) -- [out]
);
end generate GEN_FOR_MULTI_CS;
-- GEN_FOR_ONE_CS: below logic decodes the CS for single address range
-- ---------------
GEN_FOR_ONE_CS : if C_ARD_ADDR_RANGE_ARRAY'length = 2 generate
pselect_hit_i(bar_index) <= Address_Valid_Erly;
end generate GEN_FOR_ONE_CS;
-- Instantate backend registers for the Chip Selects
BKEND_CS_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(Bus_Rst='0' or Clear_CS_CE_Reg = '1')then
cs_out_i(bar_index) <= '0';
elsif(CS_CE_ld_enable='1')then
cs_out_i(bar_index) <= pselect_hit_i(bar_index);
end if;
end if;
end process BKEND_CS_REG;
-------------------------------------------------------------------------
-- PER_CE_GEN: Now expand the individual CEs for each base address.
-------------------------------------------------------------------------
PER_CE_GEN: for j in 0 to C_ARD_NUM_CE_ARRAY(bar_index) - 1 generate
-----------
begin
-----------
----------------------------------------------------------------------
-- CE decoders for multiple CE's
----------------------------------------------------------------------
MULTIPLE_CES_THIS_CS_GEN : if CE_ADDR_SIZE > 0 generate
constant BAR : std_logic_vector(0 to CE_ADDR_SIZE-1) :=
std_logic_vector(to_unsigned(j,CE_ADDR_SIZE));
begin
CE_I : entity axi_lite_ipif_v3_0.pselect_f
generic map (
C_AB => CE_ADDR_SIZE ,
C_AW => CE_ADDR_SIZE ,
C_BAR => BAR ,
C_FAMILY => C_FAMILY
)
port map (
A => addr_out_s_h
(NUM_S_H_ADDR_BITS-OFFSET-CE_ADDR_SIZE
to NUM_S_H_ADDR_BITS - OFFSET - 1) ,
AValid => pselect_hit_i(bar_index) ,
CS => ce_expnd_i(CE_INDEX_START+j)
);
end generate MULTIPLE_CES_THIS_CS_GEN;
--------------------------------------
----------------------------------------------------------------------
-- SINGLE_CE_THIS_CS_GEN: CE decoders for single CE
----------------------------------------------------------------------
SINGLE_CE_THIS_CS_GEN : if CE_ADDR_SIZE = 0 generate
ce_expnd_i(CE_INDEX_START+j) <= pselect_hit_i(bar_index);
end generate;
-------------
end generate PER_CE_GEN;
------------------------
end generate MEM_DECODE_GEN;
-- RNW_REG_P: Register the incoming RNW signal at the time of registering the
-- address. This is need to generate the CE's separately.
RNW_REG_P:process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(RW_CE_ld_enable='1')then
Bus_RNW_reg <= Bus_RNW_Erly;
end if;
end if;
end process RNW_REG_P;
---------------------------------------------------------------------------
-- GEN_BKEND_CE_REGISTERS
-- This ForGen implements the backend registering for
-- the CE, RdCE, and WrCE output buses.
---------------------------------------------------------------------------
GEN_BKEND_CE_REGISTERS : for ce_index in 0 to NUM_CE_SIGNALS-1 generate
signal rdce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
------
begin
------
BKEND_RDCE_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(cs_ce_clr='1')then
ce_out_i(ce_index) <= '0';
elsif(RW_CE_ld_enable='1')then
ce_out_i(ce_index) <= ce_expnd_i(ce_index);
end if;
end if;
end process BKEND_RDCE_REG;
rdce_out_i(ce_index) <= ce_out_i(ce_index) and Bus_RNW_reg;
wrce_out_i(ce_index) <= ce_out_i(ce_index) and not Bus_RNW_reg;
-------------------------------
end generate GEN_BKEND_CE_REGISTERS;
-------------------------------------------------------------------------------
CS_for_gaps <= '0'; -- Removed the GAP adecoder logic
---------------------------------
CS_Out <= cs_out_i ;
RdCE_Out <= rdce_out_i ;
WrCE_Out <= wrce_out_i ;
end architecture IMP;
|
-------------------------------------------------------------------
-- (c) Copyright 1984 - 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
-------------------------------------------------------------------
-- ************************************************************************
--
-------------------------------------------------------------------------------
-- Filename: address_decoder.vhd
-- Version: v2.0
-- Description: Address decoder utilizing unconstrained arrays for Base
-- Address specification and ce number.
-------------------------------------------------------------------------------
-- Structure: This section shows the hierarchical structure of axi_lite_ipif.
--
-- --axi_lite_ipif.vhd
-- --slave_attachment.vhd
-- --address_decoder.vhd
-------------------------------------------------------------------------------
-- Author: BSB
--
-- History:
--
-- BSB 05/20/10 -- First version
-- ~~~~~~
-- - Created the first version v1.00.a
-- ^^^^^^
-- ~~~~~~
-- SK 08/09/2010 --
-- - updated the core with optimziation. Closed CR 574507
-- - combined the CE generation logic to further optimize the code.
-- ^^^^^^
-- ~~~~~~
-- SK 12/16/12 -- v2.0
-- 1. up reved to major version for 2013.1 Vivado release. No logic updates.
-- 2. Updated the version of AXI LITE IPIF to v2.0 in X.Y format
-- 3. updated the proc common version to proc_common_base_v5_0
-- 4. No Logic Updates
-- ^^^^^^
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_cmb"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use ieee.numeric_std.all;
--library proc_common_base_v5_0;
--use proc_common_base_v5_0.proc_common_pkg.clog2;
--use proc_common_base_v5_0.pselect_f;
--use proc_common_base_v5_0.ipif_pkg.all;
library axi_lite_ipif_v3_0;
use axi_lite_ipif_v3_0.ipif_pkg.all;
-------------------------------------------------------------------------------
-- Definition of Generics
-------------------------------------------------------------------------------
-- C_BUS_AWIDTH -- Address bus width
-- C_S_AXI_MIN_SIZE -- Minimum address range of the IP
-- C_ARD_ADDR_RANGE_ARRAY-- Base /High Address Pair for each Address Range
-- C_ARD_NUM_CE_ARRAY -- Desired number of chip enables for an address range
-- C_FAMILY -- Target FPGA family
-------------------------------------------------------------------------------
-- Definition of Ports
-------------------------------------------------------------------------------
-- Bus_clk -- Clock
-- Bus_rst -- Reset
-- Address_In_Erly -- Adddress in
-- Address_Valid_Erly -- Address is valid
-- Bus_RNW -- Read or write registered
-- Bus_RNW_Erly -- Read or Write
-- CS_CE_ld_enable -- chip select and chip enable registered
-- Clear_CS_CE_Reg -- Clear_CS_CE_Reg clear
-- RW_CE_ld_enable -- Read or Write Chip Enable
-- CS_for_gaps -- CS generation for the gaps between address ranges
-- CS_Out -- Chip select
-- RdCE_Out -- Read Chip enable
-- WrCE_Out -- Write chip enable
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- Entity Declaration
-------------------------------------------------------------------------------
entity address_decoder is
generic (
C_BUS_AWIDTH : integer := 32;
C_S_AXI_MIN_SIZE : std_logic_vector(0 to 31) := X"000001FF";
C_ARD_ADDR_RANGE_ARRAY: SLV64_ARRAY_TYPE :=
(
X"0000_0000_1000_0000", -- IP user0 base address
X"0000_0000_1000_01FF", -- IP user0 high address
X"0000_0000_1000_0200", -- IP user1 base address
X"0000_0000_1000_02FF" -- IP user1 high address
);
C_ARD_NUM_CE_ARRAY : INTEGER_ARRAY_TYPE :=
(
8, -- User0 CE Number
1 -- User1 CE Number
);
C_FAMILY : string := "virtex6"
);
port (
Bus_clk : in std_logic;
Bus_rst : in std_logic;
-- PLB Interface signals
Address_In_Erly : in std_logic_vector(0 to C_BUS_AWIDTH-1);
Address_Valid_Erly : in std_logic;
Bus_RNW : in std_logic;
Bus_RNW_Erly : in std_logic;
-- Registering control signals
CS_CE_ld_enable : in std_logic;
Clear_CS_CE_Reg : in std_logic;
RW_CE_ld_enable : in std_logic;
CS_for_gaps : out std_logic;
-- Decode output signals
CS_Out : out std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
RdCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1);
WrCE_Out : out std_logic_vector
(0 to calc_num_ce(C_ARD_NUM_CE_ARRAY)-1)
);
end entity address_decoder;
-------------------------------------------------------------------------------
-- Architecture section
-------------------------------------------------------------------------------
architecture IMP of address_decoder is
----------------------------------------------------------------------------------
-- below attributes are added to reduce the synth warnings in Vivado tool
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of imp : architecture is "yes";
----------------------------------------------------------------------------------
-- local type declarations ----------------------------------------------------
type decode_bit_array_type is Array(natural range 0 to (
(C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1) of
integer;
type short_addr_array_type is Array(natural range 0 to
C_ARD_ADDR_RANGE_ARRAY'LENGTH-1) of
std_logic_vector(0 to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- Function Declarations
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- This function converts a 64 bit address range array to a AWIDTH bit
-- address range array.
-------------------------------------------------------------------------------
function slv64_2_slv_awidth(slv64_addr_array : SLV64_ARRAY_TYPE;
awidth : integer)
return short_addr_array_type is
variable temp_addr : std_logic_vector(0 to 63);
variable slv_array : short_addr_array_type;
begin
for array_index in 0 to slv64_addr_array'length-1 loop
temp_addr := slv64_addr_array(array_index);
slv_array(array_index) := temp_addr((64-awidth) to 63);
end loop;
return(slv_array);
end function slv64_2_slv_awidth;
-------------------------------------------------------------------------------
--Function Addr_bits
--function to convert an address range (base address and an upper address)
--into the number of upper address bits needed for decoding a device
--select signal. will handle slices and big or little endian
-------------------------------------------------------------------------------
function Addr_Bits (x,y : std_logic_vector(0 to C_BUS_AWIDTH-1))
return integer is
variable addr_nor : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
addr_nor := x xor y;
for i in 0 to C_BUS_AWIDTH-1 loop
if addr_nor(i)='1' then
return i;
end if;
end loop;
--coverage off
return(C_BUS_AWIDTH);
--coverage on
end function Addr_Bits;
-------------------------------------------------------------------------------
--Function Get_Addr_Bits
--function calculates the array which has the decode bits for the each address
--range.
-------------------------------------------------------------------------------
function Get_Addr_Bits (baseaddrs : short_addr_array_type)
return decode_bit_array_type is
variable num_bits : decode_bit_array_type;
begin
for i in 0 to ((baseaddrs'length)/2)-1 loop
num_bits(i) := Addr_Bits (baseaddrs(i*2),
baseaddrs(i*2+1));
end loop;
return(num_bits);
end function Get_Addr_Bits;
-------------------------------------------------------------------------------
-- NEEDED_ADDR_BITS
--
-- Function Description:
-- This function calculates the number of address bits required
-- to support the CE generation logic. This is determined by
-- multiplying the number of CEs for an address space by the
-- data width of the address space (in bytes). Each address
-- space entry is processed and the biggest of the spaces is
-- used to set the number of address bits required to be latched
-- and used for CE decoding. A minimum value of 1 is returned by
-- this function.
--
-------------------------------------------------------------------------------
function needed_addr_bits (ce_array : INTEGER_ARRAY_TYPE)
return integer is
constant NUM_CE_ENTRIES : integer := CE_ARRAY'length;
variable biggest : integer := 2;
variable req_ce_addr_size : integer := 0;
variable num_addr_bits : integer := 0;
begin
for i in 0 to NUM_CE_ENTRIES-1 loop
req_ce_addr_size := ce_array(i) * 4;
if (req_ce_addr_size > biggest) Then
biggest := req_ce_addr_size;
end if;
end loop;
num_addr_bits := clog2(biggest);
return(num_addr_bits);
end function NEEDED_ADDR_BITS;
-----------------------------------------------------------------------------
-- Function calc_high_address
--
-- This function is used to calculate the high address of the each address
-- range
-----------------------------------------------------------------------------
function calc_high_address (high_address : short_addr_array_type;
index : integer) return std_logic_vector is
variable calc_high_addr : std_logic_vector(0 to C_BUS_AWIDTH-1);
begin
If (index = (C_ARD_ADDR_RANGE_ARRAY'length/2-1)) Then
calc_high_addr := C_S_AXI_MIN_SIZE(32-C_BUS_AWIDTH to 31);
else
calc_high_addr := high_address(index*2+2);
end if;
return(calc_high_addr);
end function calc_high_address;
----------------------------------------------------------------------------
-- Constant Declarations
-------------------------------------------------------------------------------
constant ARD_ADDR_RANGE_ARRAY : short_addr_array_type :=
slv64_2_slv_awidth(C_ARD_ADDR_RANGE_ARRAY,
C_BUS_AWIDTH);
constant NUM_BASE_ADDRS : integer := (C_ARD_ADDR_RANGE_ARRAY'length)/2;
constant DECODE_BITS : decode_bit_array_type :=
Get_Addr_Bits(ARD_ADDR_RANGE_ARRAY);
constant NUM_CE_SIGNALS : integer :=
calc_num_ce(C_ARD_NUM_CE_ARRAY);
constant NUM_S_H_ADDR_BITS : integer :=
needed_addr_bits(C_ARD_NUM_CE_ARRAY);
-------------------------------------------------------------------------------
-- Signal Declarations
-------------------------------------------------------------------------------
signal pselect_hit_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal cs_out_i : std_logic_vector
(0 to ((C_ARD_ADDR_RANGE_ARRAY'LENGTH)/2)-1);
signal ce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal rdce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal ce_out_i : std_logic_vector(0 to NUM_CE_SIGNALS-1); --
signal cs_ce_clr : std_logic;
signal addr_out_s_h : std_logic_vector(0 to NUM_S_H_ADDR_BITS-1);
signal Bus_RNW_reg : std_logic;
-------------------------------------------------------------------------------
-- Begin architecture
-------------------------------------------------------------------------------
begin -- architecture IMP
-- Register clears
cs_ce_clr <= not Bus_rst or Clear_CS_CE_Reg;
addr_out_s_h <= Address_In_Erly(C_BUS_AWIDTH-NUM_S_H_ADDR_BITS
to C_BUS_AWIDTH-1);
-------------------------------------------------------------------------------
-- MEM_DECODE_GEN: Universal Address Decode Block
-------------------------------------------------------------------------------
MEM_DECODE_GEN: for bar_index in 0 to NUM_BASE_ADDRS-1 generate
---------------
constant CE_INDEX_START : integer
:= calc_start_ce_index(C_ARD_NUM_CE_ARRAY,bar_index);
constant CE_ADDR_SIZE : Integer range 0 to 15
:= clog2(C_ARD_NUM_CE_ARRAY(bar_index));
constant OFFSET : integer := 2;
constant BASE_ADDR_x : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= ARD_ADDR_RANGE_ARRAY(bar_index*2+1);
constant HIGH_ADDR_X : std_logic_vector(0 to C_BUS_AWIDTH-1)
:= calc_high_address(ARD_ADDR_RANGE_ARRAY,bar_index);
--constant DECODE_BITS_0 : integer:= DECODE_BITS(0);
---------
begin
---------
-- GEN_FOR_MULTI_CS: Below logic generates the CS for decoded address
-- -----------------
GEN_FOR_MULTI_CS : if C_ARD_ADDR_RANGE_ARRAY'length > 2 generate
-- Instantiate the basic Base Address Decoders
MEM_SELECT_I: entity axi_lite_ipif_v3_0.pselect_f
generic map
(
C_AB => DECODE_BITS(bar_index),
C_AW => C_BUS_AWIDTH,
C_BAR => ARD_ADDR_RANGE_ARRAY(bar_index*2),
C_FAMILY => C_FAMILY
)
port map
(
A => Address_In_Erly, -- [in]
AValid => Address_Valid_Erly, -- [in]
CS => pselect_hit_i(bar_index) -- [out]
);
end generate GEN_FOR_MULTI_CS;
-- GEN_FOR_ONE_CS: below logic decodes the CS for single address range
-- ---------------
GEN_FOR_ONE_CS : if C_ARD_ADDR_RANGE_ARRAY'length = 2 generate
pselect_hit_i(bar_index) <= Address_Valid_Erly;
end generate GEN_FOR_ONE_CS;
-- Instantate backend registers for the Chip Selects
BKEND_CS_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(Bus_Rst='0' or Clear_CS_CE_Reg = '1')then
cs_out_i(bar_index) <= '0';
elsif(CS_CE_ld_enable='1')then
cs_out_i(bar_index) <= pselect_hit_i(bar_index);
end if;
end if;
end process BKEND_CS_REG;
-------------------------------------------------------------------------
-- PER_CE_GEN: Now expand the individual CEs for each base address.
-------------------------------------------------------------------------
PER_CE_GEN: for j in 0 to C_ARD_NUM_CE_ARRAY(bar_index) - 1 generate
-----------
begin
-----------
----------------------------------------------------------------------
-- CE decoders for multiple CE's
----------------------------------------------------------------------
MULTIPLE_CES_THIS_CS_GEN : if CE_ADDR_SIZE > 0 generate
constant BAR : std_logic_vector(0 to CE_ADDR_SIZE-1) :=
std_logic_vector(to_unsigned(j,CE_ADDR_SIZE));
begin
CE_I : entity axi_lite_ipif_v3_0.pselect_f
generic map (
C_AB => CE_ADDR_SIZE ,
C_AW => CE_ADDR_SIZE ,
C_BAR => BAR ,
C_FAMILY => C_FAMILY
)
port map (
A => addr_out_s_h
(NUM_S_H_ADDR_BITS-OFFSET-CE_ADDR_SIZE
to NUM_S_H_ADDR_BITS - OFFSET - 1) ,
AValid => pselect_hit_i(bar_index) ,
CS => ce_expnd_i(CE_INDEX_START+j)
);
end generate MULTIPLE_CES_THIS_CS_GEN;
--------------------------------------
----------------------------------------------------------------------
-- SINGLE_CE_THIS_CS_GEN: CE decoders for single CE
----------------------------------------------------------------------
SINGLE_CE_THIS_CS_GEN : if CE_ADDR_SIZE = 0 generate
ce_expnd_i(CE_INDEX_START+j) <= pselect_hit_i(bar_index);
end generate;
-------------
end generate PER_CE_GEN;
------------------------
end generate MEM_DECODE_GEN;
-- RNW_REG_P: Register the incoming RNW signal at the time of registering the
-- address. This is need to generate the CE's separately.
RNW_REG_P:process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(RW_CE_ld_enable='1')then
Bus_RNW_reg <= Bus_RNW_Erly;
end if;
end if;
end process RNW_REG_P;
---------------------------------------------------------------------------
-- GEN_BKEND_CE_REGISTERS
-- This ForGen implements the backend registering for
-- the CE, RdCE, and WrCE output buses.
---------------------------------------------------------------------------
GEN_BKEND_CE_REGISTERS : for ce_index in 0 to NUM_CE_SIGNALS-1 generate
signal rdce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
signal wrce_expnd_i : std_logic_vector(0 to NUM_CE_SIGNALS-1);
------
begin
------
BKEND_RDCE_REG : process(Bus_Clk)
begin
if(Bus_Clk'EVENT and Bus_Clk = '1')then
if(cs_ce_clr='1')then
ce_out_i(ce_index) <= '0';
elsif(RW_CE_ld_enable='1')then
ce_out_i(ce_index) <= ce_expnd_i(ce_index);
end if;
end if;
end process BKEND_RDCE_REG;
rdce_out_i(ce_index) <= ce_out_i(ce_index) and Bus_RNW_reg;
wrce_out_i(ce_index) <= ce_out_i(ce_index) and not Bus_RNW_reg;
-------------------------------
end generate GEN_BKEND_CE_REGISTERS;
-------------------------------------------------------------------------------
CS_for_gaps <= '0'; -- Removed the GAP adecoder logic
---------------------------------
CS_Out <= cs_out_i ;
RdCE_Out <= rdce_out_i ;
WrCE_Out <= wrce_out_i ;
end architecture IMP;
|
-------------------------------------------------------------------------------
--! @file rx_var_select.vhd
--! @author Johannes Walter <[email protected]>
--! @copyright CERN TE-EPC-CCE
--! @date 2014-04-03
--! @brief Toggle between VAR1 and VAR2 when receiving data.
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
--! @brief Entity declaration of rx_var_select
--! @details
--! Multiplexer control for data reception. When VAR1 or VAR2 are received,
--! the Wishbone interface will be connected to the corresponding receiver.
entity rx_var_select is
port (
--! @name Clock and resets
--! @{
--! System clock
clk_i : in std_ulogic;
--! Asynchronous active-low reset
rst_asy_n_i : in std_ulogic;
--! Synchronous active-high reset
rst_syn_i : in std_ulogic;
--! @}
--! @name Ready signals
--! @{
--! VAR1 is ready
var1_rdy_i : in std_ulogic;
--! VAR2 is ready
var2_rdy_i : in std_ulogic;
--! @}
--! @name Multiplexer control
--! @{
--! Select receiver, 0 = VAR1, 1 = VAR2, VAR2 is default
var_select_o : out std_ulogic);
--! @}
end entity rx_var_select;
--! RTL implementation of rx_var_select
architecture rtl of rx_var_select is
---------------------------------------------------------------------------
--! @name Internal Registers
---------------------------------------------------------------------------
--! @{
signal var_select : std_ulogic;
--! @}
begin -- architecture rtl
---------------------------------------------------------------------------
-- Outputs
---------------------------------------------------------------------------
var_select_o <= var_select;
---------------------------------------------------------------------------
-- Registering
---------------------------------------------------------------------------
regs : process (clk_i, rst_asy_n_i) is
procedure reset is
begin
var_select <= '1';
end procedure reset;
begin -- process regs
if rst_asy_n_i = '0' then
reset;
elsif rising_edge(clk_i) then
if rst_syn_i = '1' then
reset;
elsif var1_rdy_i = '1' then
var_select <= '0';
elsif var2_rdy_i = '1' then
var_select <= '1';
end if;
end if;
end process regs;
end architecture rtl;
|
--------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 13:16:46 06/18/2015
-- Design Name:
-- Module Name: C:/Users/lwilkinson/Documents/Xilinx/IBM2030/Testbench_panel_LEDs.vhd
-- Project Name: IBM2030
-- Target Device:
-- Tool versions:
-- Description:
--
-- VHDL Test Bench Created by ISE for module: panel_LEDs
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
-- Notes:
-- This testbench has been automatically generated using types std_logic and
-- std_logic_vector for the ports of the unit under test. Xilinx recommends
-- that these types always be used for the top-level I/O of a design in order
-- to guarantee that the testbench will bind correctly to the post-implementation
-- simulation model.
--------------------------------------------------------------------------------
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--USE ieee.numeric_std.ALL;
ENTITY Testbench_panel_LEDs IS
END Testbench_panel_LEDs;
ARCHITECTURE behavior OF Testbench_panel_LEDs IS
-- Component Declaration for the Unit Under Test (UUT)
COMPONENT panel_LEDs
PORT(
LEDs : IN std_logic_vector(0 to 255);
clk : IN std_logic;
MAX7219_CLK : OUT std_logic;
MAX7219_DIN0 : OUT std_logic;
MAX7219_DIN1 : OUT std_logic;
MAX7219_DIN2 : OUT std_logic;
MAX7219_DIN3 : OUT std_logic;
MAX7219_LOAD : OUT std_logic;
MAX6951_CLK : OUT std_logic;
MAX6951_DIN : OUT std_logic;
MAX6951_CS0 : OUT std_logic;
MAX6951_CS1 : OUT std_logic;
MAX6951_CS2 : OUT std_logic;
MAX6951_CS3 : OUT std_logic
);
END COMPONENT;
--Inputs
signal LEDs : std_logic_vector(0 to 255) := (1 => '1',3 => '1',5 => '1',7 => '1',9 => '1',11 => '1',13 => '1',15 => '1',17 => '1',others => '0');
signal clk : std_logic := '0';
--Outputs
signal MAX7219_CLK : std_logic;
signal MAX7219_DIN0 : std_logic;
signal MAX7219_DIN1 : std_logic;
signal MAX7219_DIN2 : std_logic;
signal MAX7219_DIN3 : std_logic;
signal MAX7219_LOAD : std_logic;
signal MAX6951_CLK : std_logic;
signal MAX6951_DIN : std_logic;
signal MAX6951_CS0 : std_logic;
signal MAX6951_CS1 : std_logic;
signal MAX6951_CS2 : std_logic;
signal MAX6951_CS3 : std_logic;
-- Clock period definitions
constant clk_period : time := 20 ns;
BEGIN
-- Instantiate the Unit Under Test (UUT)
uut: panel_LEDs PORT MAP (
LEDs => LEDs,
clk => clk,
MAX7219_CLK => MAX7219_CLK,
MAX7219_DIN0 => MAX7219_DIN0,
MAX7219_DIN1 => MAX7219_DIN1,
MAX7219_DIN2 => MAX7219_DIN2,
MAX7219_DIN3 => MAX7219_DIN3,
MAX7219_LOAD => MAX7219_LOAD,
MAX6951_CLK => MAX6951_CLK,
MAX6951_DIN => MAX6951_DIN,
MAX6951_CS0 => MAX6951_CS0,
MAX6951_CS1 => MAX6951_CS1,
MAX6951_CS2 => MAX6951_CS2,
MAX6951_CS3 => MAX6951_CS3
);
-- Clock process definitions
clk_process :process
begin
clk <= '0';
wait for clk_period/2;
clk <= '1';
wait for clk_period/2;
end process;
-- Stimulus process
stim_proc: process
begin
-- hold reset state for 100 ns.
wait for 100 ns;
wait for 1ms;
-- insert stimulus here
wait;
end process;
END;
|
-- $Id: pdp11_core_rbus.vhd 1310 2022-10-27 16:15:50Z mueller $
-- SPDX-License-Identifier: GPL-3.0-or-later
-- Copyright 2007-2019 by Walter F.J. Mueller <[email protected]>
--
------------------------------------------------------------------------------
-- Module Name: pdp11_core_rbus - syn
-- Description: pdp11: core to rbus interface
--
-- Dependencies: -
-- Test bench: tb/tb_rlink_tba_pdp11core
--
-- Target Devices: generic
-- Tool versions: ise 8.2-14.7; viv 2014.4-2019.1; ghdl 0.18-0.35
--
-- Synthesized (xst):
-- Date Rev ise Target flop lutl lutm slic t peri
-- 2014-12-21 591 14.7 131013 xc6slx16-2 52 118 0 58 s 4.9
--
-- Revision History: -
-- Date Rev Version Comment
-- 2019-06-02 1159 1.5.4 use rbaddr_ constants
-- 2019-03-02 1116 1.5.3 rename state field rbinit to greset
-- 2016-05-22 767 1.5.2 don't init N_REGS (vivado fix for fsm inference)
-- 2015-07-10 700 1.5.1 add cpuact logic, redefine lam as cpuact 1->0
-- 2015-05-09 677 1.5 start/stop/suspend overhaul; reset overhaul
-- 2014-12-26 621 1.4 use full size 4k word ibus window
-- 2014-12-21 617 1.3.1 use separate RB_STAT bits for cmderr and cmdmerr
-- 2014-09-05 591 1.3 use new rlink v4 iface and 4 bit STAT
-- 2014-08-15 583 1.2 rb_mreq addr now 16 bit
-- 2011-11-18 427 1.1.1 now numeric_std clean
-- 2010-12-29 351 1.1 renamed from pdp11_core_rri; ported to rbv3
-- 2010-10-23 335 1.2.3 rename RRI_LAM->RB_LAM;
-- 2010-06-20 308 1.2.2 use c_ibrb_ibf_ def's
-- 2010-06-18 306 1.2.1 rename RB_ADDR->RB_ADDR_CORE, add RB_ADDR_IBUS;
-- add ibrb register and ibr window logic
-- 2010-06-13 305 1.2 add CP_ADDR in port; mostly rewritten for new
-- rri <-> cp mapping
-- 2010-06-03 299 1.1.2 correct rbus init logic (use we, din, RB_ADDR)
-- 2010-05-02 287 1.1.1 rename RP_STAT->RB_STAT; remove unneeded unsigned()
-- 2010-05-01 285 1.1 port to rri V2 interface, add RB_ADDR generic;
-- rename c_rp_addr_* -> c_rb_addr_*
-- 2008-05-03 143 1.0.8 rename _cpursta->_cpurust
-- 2008-04-27 140 1.0.7 use cpursta interface, remove cpufail
-- 2008-03-02 121 1.0.6 set RP_ERR when cmderr or cmdmerr status seen
-- 2008-02-24 119 1.0.5 support lah,rps,wps cp commands
-- 2008-01-20 113 1.0.4 use single LAM; change to RRI_LAM interface
-- 2007-10-12 88 1.0.3 avoid ieee.std_logic_unsigned, use cast to unsigned
-- 2007-08-16 74 1.0.2 add AP_LAM interface to pdp11_core_rri
-- 2007-08-12 73 1.0.1 use def's; add stat command; wait for step complete
-- 2007-07-08 65 1.0 Initial version
------------------------------------------------------------------------------
--
-- rbus registers:
--
-- Addr Bits Name r/w/f Function
--
-- 00000 conf r/w/- cpu configuration (e.g. cpu type)
-- (currently unused, all bits MBZ)
-- 00001 cntl -/f/- cpu control
-- 3:00 func function code
-- 0000: noop
-- 0001: start
-- 0010: stop
-- 0011: step
-- 0100: creset
-- 0101: breset
-- 0110: suspend
-- 0111: resume
-- 00010 stat r/-/- cpu status
-- 9 suspext r/-/- cp_stat: statext
-- 8 suspint r/-/- cp_stat: statint
-- 7:04 cpurust r/-/- cp_stat: cpurust
-- 3 cpususp r/-/- cp_stat: cpususp
-- 2 cpugo r/-/- cp_stat: cpugo
-- 1 cmdmerr r/-/- cp_stat: cmdmerr
-- 0 cmderr r/-/- cp_stat: cmderr
-- 00011 psw r/w/- processor status word access
-- 00100 al r/w/- address register, low
-- 00101 ah r/w/- address register, high
-- 7 ubm r/w/- ubmap access
-- 6 p22 r/w/- 22bit access
-- 5:00 addr r/w/- addr(21:16)
-- 00110 mem r/w/- memory access
-- 00111 memi r/w/- memory access, inc address
-- 01rrr gr[] r/w/- general regs
-- 10000 membe r/w/- memory write byte enables
-- 3 stick r/w/- sticky flag
-- 1:00 be r/w/- byte enables
--
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.slvtypes.all;
use work.rblib.all;
use work.pdp11.all;
-- ----------------------------------------------------------------------------
entity pdp11_core_rbus is -- core to rbus interface
generic (
RB_ADDR_CORE : slv16 := rbaddr_cpu0_core;
RB_ADDR_IBUS : slv16 := rbaddr_cpu0_ibus);
port (
CLK : in slbit; -- clock
RESET : in slbit; -- reset
RB_MREQ : in rb_mreq_type; -- rbus: request
RB_SRES : out rb_sres_type; -- rbus: response
RB_STAT : out slv4; -- rbus: status flags
RB_LAM : out slbit; -- remote attention
GRESET : out slbit; -- general reset
CP_CNTL : out cp_cntl_type; -- console control port
CP_ADDR : out cp_addr_type; -- console address port
CP_DIN : out slv16; -- console data in
CP_STAT : in cp_stat_type; -- console status port
CP_DOUT : in slv16 -- console data out
);
end pdp11_core_rbus;
architecture syn of pdp11_core_rbus is
type state_type is (
s_idle, -- s_idle: wait for rbus access
s_cpwait, -- s_cpwait: wait for cp port ack
s_cpstep -- s_cpstep: wait for cpustep done
);
type regs_type is record
state : state_type; -- state
rbselc : slbit; -- rbus select for core
rbseli : slbit; -- rbus select for ibus
greset : slbit; -- greset from rbus init (1 cycle pulse)
cpreq : slbit; -- cp request flag
cpfunc : slv5; -- cp function
cpuact_1 : slbit; -- prev cycle cpuact
addr : slv22_1; -- address register
ena_22bit : slbit; -- 22bit enable
ena_ubmap : slbit; -- ubmap enable
membe : slv2; -- memory write byte enables
membestick : slbit; -- memory write byte enables sticky
doinc : slbit; -- at cmdack: do addr reg inc
waitstep : slbit; -- at cmdack: wait for cpu step complete
end record regs_type;
constant regs_init : regs_type := (
s_idle, -- state
'0','0', -- rbselc,rbseli
'0', -- greset
'0', -- cpreq
(others=>'0'), -- cpfunc
'0', -- cpuact_1
(others=>'0'), -- addr
'0','0', -- ena_22bit, ena_ubmap
"11",'0', -- membe,membestick
'0','0' -- doinc, waitstep
);
signal R_REGS : regs_type := regs_init;
signal N_REGS : regs_type; -- don't init (vivado fix for fsm infer)
begin
proc_regs: process (CLK)
begin
if rising_edge(CLK) then
if RESET = '1' then
R_REGS <= regs_init;
else
R_REGS <= N_REGS;
end if;
end if;
end process proc_regs;
proc_next: process (R_REGS, RB_MREQ, CP_STAT, CP_DOUT)
variable r : regs_type := regs_init;
variable n : regs_type := regs_init;
variable irb_ack : slbit := '0';
variable irb_busy : slbit := '0';
variable irb_err : slbit := '0';
variable irb_dout : slv16 := (others=>'0');
variable irb_lam : slbit := '0';
variable irbena : slbit := '0';
variable icpuact : slbit := '0';
variable icpreq : slbit := '0';
variable icpaddr : cp_addr_type := cp_addr_init;
begin
r := R_REGS;
n := R_REGS;
irb_ack := '0';
irb_busy := '0';
irb_err := '0';
irb_dout := (others=>'0');
irb_lam := '0';
irbena := RB_MREQ.re or RB_MREQ.we;
icpreq := '0';
-- generate single cycle pulse in case init against rbus base address seen
-- is used to generate some state machine resets via GRESET
n.greset := '0';
if RB_MREQ.init='1' and RB_MREQ.addr=RB_ADDR_CORE then
n.greset := RB_MREQ.din(c_init_rbf_greset);
end if;
-- rbus address decoder
n.rbseli := '0';
n.rbselc := '0';
if RB_MREQ.aval='1' then
if RB_MREQ.addr(15 downto 5)=RB_ADDR_CORE(15 downto 5) then
n.rbselc := '1';
end if;
if RB_MREQ.addr(15 downto 12)=RB_ADDR_IBUS(15 downto 12) then
n.rbseli := '1';
end if;
end if;
if (r.rbselc='1' or r.rbseli='1') and irbena='1' then
irb_ack := '1'; -- ack all (maybe rejected later)
end if;
case r.state is
when s_idle => -- s_idle: wait for rbus access ------
n.doinc := '0';
n.waitstep := '0';
if r.rbseli = '1' then
if irbena = '1' then
n.cpfunc := c_cpfunc_rmem;
n.cpfunc(0) := RB_MREQ.we;
icpreq := '1';
end if;
elsif r.rbselc = '1' then
case RB_MREQ.addr(4 downto 0) is
when c_rbaddr_conf => -- conf -------------------------
null; -- currently no action
when c_rbaddr_cntl => -- cntl -------------------------
if irbena = '1' then
n.cpfunc := RB_MREQ.din(n.cpfunc'range);
end if;
if RB_MREQ.we = '1' then
icpreq := '1';
if RB_MREQ.din(3 downto 0) = c_cpfunc_step(3 downto 0) then
n.waitstep := '1';
end if;
end if;
when c_rbaddr_stat => -- stat ------------------
irb_dout(c_stat_rbf_suspext) := CP_STAT.suspext;
irb_dout(c_stat_rbf_suspint) := CP_STAT.suspint;
irb_dout(c_stat_rbf_cpurust) := CP_STAT.cpurust;
irb_dout(c_stat_rbf_cpususp) := CP_STAT.cpususp;
irb_dout(c_stat_rbf_cpugo) := CP_STAT.cpugo;
irb_dout(c_stat_rbf_cmdmerr) := CP_STAT.cmdmerr;
irb_dout(c_stat_rbf_cmderr) := CP_STAT.cmderr;
when c_rbaddr_psw => -- psw -------------------
if irbena = '1' then
n.cpfunc := c_cpfunc_rpsw;
n.cpfunc(0) := RB_MREQ.we;
icpreq := '1';
end if;
when c_rbaddr_al => -- al --------------------
irb_dout(c_al_rbf_addr) := r.addr(c_al_rbf_addr);
if RB_MREQ.we = '1' then
n.addr := (others=>'0'); -- write to al clears ah !!
n.ena_22bit := '0';
n.ena_ubmap := '0';
n.addr(c_al_rbf_addr) := RB_MREQ.din(c_al_rbf_addr);
end if;
when c_rbaddr_ah => -- ah --------------------
irb_dout(c_ah_rbf_ena_ubmap) := r.ena_ubmap;
irb_dout(c_ah_rbf_ena_22bit) := r.ena_22bit;
irb_dout(c_ah_rbf_addr) := r.addr(21 downto 16);
if RB_MREQ.we = '1' then
n.addr(21 downto 16) := RB_MREQ.din(c_ah_rbf_addr);
n.ena_22bit := RB_MREQ.din(c_ah_rbf_ena_22bit);
n.ena_ubmap := RB_MREQ.din(c_ah_rbf_ena_ubmap);
end if;
when c_rbaddr_mem => -- mem -------------------
if irbena = '1' then
n.cpfunc := c_cpfunc_rmem;
n.cpfunc(0) := RB_MREQ.we;
icpreq := '1';
end if;
when c_rbaddr_memi => -- memi ------------------
if irbena = '1' then
n.cpfunc := c_cpfunc_rmem;
n.cpfunc(0) := RB_MREQ.we;
n.doinc := '1';
icpreq := '1';
end if;
when c_rbaddr_r0 | c_rbaddr_r1 |
c_rbaddr_r2 | c_rbaddr_r3 |
c_rbaddr_r4 | c_rbaddr_r5 |
c_rbaddr_sp | c_rbaddr_pc => -- r* -----------------
if irbena = '1' then
n.cpfunc := c_cpfunc_rreg;
n.cpfunc(0) := RB_MREQ.we;
icpreq := '1';
end if;
when c_rbaddr_membe => -- membe -----------------
irb_dout(c_membe_rbf_be) := r.membe;
irb_dout(c_membe_rbf_stick) := r.membestick;
if RB_MREQ.we = '1' then
n.membe := RB_MREQ.din(c_membe_rbf_be);
n.membestick := RB_MREQ.din(c_membe_rbf_stick);
end if;
when others =>
irb_ack := '0';
end case;
end if;
if icpreq = '1' then
irb_busy := '1';
n.cpreq := '1';
n.state := s_cpwait;
end if;
when s_cpwait => -- s_cpwait: wait for cp port ack ----
n.cpreq := '0'; -- cpreq only for 1 cycle
if (r.rbselc or r.rbseli)='0' or irbena='0' then -- rbus cycle abort
if r.cpfunc = c_cpfunc_wmem and -- if wmem command
r.membestick = '0' then -- and be's not sticky
n.membe := "11"; -- re-enable both bytes
end if;
n.state := s_idle; -- quit
else
irb_dout := CP_DOUT;
irb_err := CP_STAT.cmderr or CP_STAT.cmdmerr;
if CP_STAT.cmdack = '1' then -- normal cycle end
if r.cpfunc = c_cpfunc_wmem and -- if wmem command
r.membestick = '0' then -- and be's not sticky
n.membe := "11"; -- re-enable both bytes
end if;
if r.doinc = '1' then
n.addr := slv(unsigned(r.addr) + 1);
end if;
if r.waitstep = '1' then
irb_busy := '1';
n.state := s_cpstep;
else
n.state := s_idle;
end if;
else
irb_busy := '1';
end if;
end if;
when s_cpstep => -- s_cpstep: wait for cpustep done ---
n.state := s_cpstep; -- needed to prevent vivado iSTATE
if r.rbselc='0' or irbena='0' then -- rbus cycle abort
n.state := s_idle; -- quit
else
if CP_STAT.cpustep = '0' then -- cpustep done
n.state := s_idle;
else
irb_busy := '1';
end if;
end if;
when others => null;
end case;
icpaddr := cp_addr_init;
icpaddr.be := r.membe;
if r.rbseli = '0' then -- access via cp
icpaddr.addr := r.addr;
icpaddr.racc := '0';
icpaddr.ena_22bit := r.ena_22bit;
icpaddr.ena_ubmap := r.ena_ubmap;
else -- access via ibus window
icpaddr.addr(15 downto 13) := "111";
icpaddr.addr(12 downto 1) := RB_MREQ.addr(11 downto 0);
icpaddr.racc := '1';
icpaddr.ena_22bit := '0';
icpaddr.ena_ubmap := '0';
end if;
icpuact := CP_STAT.cpugo and not CP_STAT.suspint;
n.cpuact_1 := icpuact; -- delay cpuact
if (r.cpuact_1='1' and icpuact='0') then -- cpuact 1 -> 0
irb_lam := '1';
end if;
N_REGS <= n;
RB_SRES.ack <= irb_ack;
RB_SRES.err <= irb_err;
RB_SRES.busy <= irb_busy;
RB_SRES.dout <= irb_dout;
RB_STAT(3) <= CP_STAT.cmderr;
RB_STAT(2) <= CP_STAT.cmdmerr;
RB_STAT(1) <= CP_STAT.cpususp;
RB_STAT(0) <= CP_STAT.cpugo;
RB_LAM <= irb_lam;
GRESET <= R_REGS.greset;
CP_CNTL.req <= r.cpreq;
CP_CNTL.func <= r.cpfunc;
CP_CNTL.rnum <= RB_MREQ.addr(2 downto 0);
CP_ADDR <= icpaddr;
CP_DIN <= RB_MREQ.din;
end process proc_next;
end syn;
|
-------------------------------------------------------------------------------
-- Title : Fixed point implementation of Goertzel's Algorithm
-------------------------------------------------------------------------------
-- Author : strongly-typed
-- Standard : VHDL'87
-------------------------------------------------------------------------------
-- Description: Fixed point implementation of Goertzel's Algorithm to detect a
-- fixed frequency in an analog signal.
--
-- This is just the pipeline. The control unit in in entity
-- goertzel_control_unit and the muxes are in goertzel_muxes.
--
-- This does not implement the calculation
-- of the magnitude of the signal at the end of one block.
-- Mind overflows!
-------------------------------------------------------------------------------
-- Copyright (c) 2012
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.math_real.all;
library work;
use work.signalprocessing_pkg.all;
-------------------------------------------------------------------------------
entity goertzel_pipeline is
generic (
-- Width of ADC input
-- Due to overflow prevention: Not as wide as the internal width of
-- calculations. Set in the signalprocessing_pkg.vhd
-- INPUT_WIDTH : natural := 14;
-- Width of internal calculations
-- Remember that internal multiplier are at most 18 bits wide (in Xilinx Spartan)
-- CALC_WIDTH : natural := 18;
-- Fixed point data format
Q : natural := 13
);
port (
-- Goertzel Coefficient calculated by
coef_p : in goertzel_coef_type;
-- One values from ADC
input_p : in goertzel_input_type;
-- The old result
delay_p : in goertzel_result_type;
-- Result
result_p : out goertzel_result_type;
clk : in std_logic
);
end goertzel_pipeline;
architecture rtl of goertzel_pipeline is
signal delay_1_reg : goertzel_data_type := (others => '0');
signal delay_1_reg2 : goertzel_data_type := (others => '0');
signal delay_2_reg : goertzel_data_type := (others => '0');
signal delay_2_reg2 : goertzel_data_type := (others => '0');
signal coef_reg : goertzel_coef_type := (others => '0');
signal input_reg : goertzel_input_type := (others => '0');
signal input_reg2 : goertzel_input_type := (others => '0');
signal prod_scaled_reg : goertzel_data_type := (others => '0');
signal overflow : std_logic := '0';
begin -- architecture rtl
-- data path B
B : process (clk) is
variable prod_v : signed(35 downto 0) := (others => '0');
begin -- process B
if rising_edge(clk) then -- rising clock edge
-- 1st RTL
-- inputs from BRAM is already registered
--delay_1_reg2 <= delay_p(0);
--delay_2_reg2 <= delay_p(1);
coef_reg <= coef_p;
input_reg <= input_p;
-- 2nd RTL
delay_1_reg2 <= delay_p(0);
delay_2_reg2 <= delay_p(1);
prod_v := delay_p(0) * coef_reg;
prod_scaled_reg <= prod_v((Q + CALC_WIDTH - 1) downto Q);
if (prod_v(35 downto Q + CALC_WIDTH) = (35 downto (Q + CALC_WIDTH) => '0')) or
(prod_v(35 downto Q + CALC_WIDTH) = (35 downto (Q + CALC_WIDTH) => '1')) then
overflow <= '0';
else
overflow <= '1';
end if;
input_reg2 <= input_reg;
-- 3rd RTL
result_p(0) <= -delay_2_reg2 + prod_scaled_reg + input_reg2;
result_p(1) <= delay_1_reg2;
end if;
end process B;
end architecture rtl;
|
-------------------------------------------------------------------------------
-- Title : Fixed point implementation of Goertzel's Algorithm
-------------------------------------------------------------------------------
-- Author : strongly-typed
-- Standard : VHDL'87
-------------------------------------------------------------------------------
-- Description: Fixed point implementation of Goertzel's Algorithm to detect a
-- fixed frequency in an analog signal.
--
-- This is just the pipeline. The control unit in in entity
-- goertzel_control_unit and the muxes are in goertzel_muxes.
--
-- This does not implement the calculation
-- of the magnitude of the signal at the end of one block.
-- Mind overflows!
-------------------------------------------------------------------------------
-- Copyright (c) 2012
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.math_real.all;
library work;
use work.signalprocessing_pkg.all;
-------------------------------------------------------------------------------
entity goertzel_pipeline is
generic (
-- Width of ADC input
-- Due to overflow prevention: Not as wide as the internal width of
-- calculations. Set in the signalprocessing_pkg.vhd
-- INPUT_WIDTH : natural := 14;
-- Width of internal calculations
-- Remember that internal multiplier are at most 18 bits wide (in Xilinx Spartan)
-- CALC_WIDTH : natural := 18;
-- Fixed point data format
Q : natural := 13
);
port (
-- Goertzel Coefficient calculated by
coef_p : in goertzel_coef_type;
-- One values from ADC
input_p : in goertzel_input_type;
-- The old result
delay_p : in goertzel_result_type;
-- Result
result_p : out goertzel_result_type;
clk : in std_logic
);
end goertzel_pipeline;
architecture rtl of goertzel_pipeline is
signal delay_1_reg : goertzel_data_type := (others => '0');
signal delay_1_reg2 : goertzel_data_type := (others => '0');
signal delay_2_reg : goertzel_data_type := (others => '0');
signal delay_2_reg2 : goertzel_data_type := (others => '0');
signal coef_reg : goertzel_coef_type := (others => '0');
signal input_reg : goertzel_input_type := (others => '0');
signal input_reg2 : goertzel_input_type := (others => '0');
signal prod_scaled_reg : goertzel_data_type := (others => '0');
signal overflow : std_logic := '0';
begin -- architecture rtl
-- data path B
B : process (clk) is
variable prod_v : signed(35 downto 0) := (others => '0');
begin -- process B
if rising_edge(clk) then -- rising clock edge
-- 1st RTL
-- inputs from BRAM is already registered
--delay_1_reg2 <= delay_p(0);
--delay_2_reg2 <= delay_p(1);
coef_reg <= coef_p;
input_reg <= input_p;
-- 2nd RTL
delay_1_reg2 <= delay_p(0);
delay_2_reg2 <= delay_p(1);
prod_v := delay_p(0) * coef_reg;
prod_scaled_reg <= prod_v((Q + CALC_WIDTH - 1) downto Q);
if (prod_v(35 downto Q + CALC_WIDTH) = (35 downto (Q + CALC_WIDTH) => '0')) or
(prod_v(35 downto Q + CALC_WIDTH) = (35 downto (Q + CALC_WIDTH) => '1')) then
overflow <= '0';
else
overflow <= '1';
end if;
input_reg2 <= input_reg;
-- 3rd RTL
result_p(0) <= -delay_2_reg2 + prod_scaled_reg + input_reg2;
result_p(1) <= delay_1_reg2;
end if;
end process B;
end architecture rtl;
|
-- Copyright (C) 2002 Morgan Kaufmann Publishers, Inc
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
entity inline_08 is
end entity inline_08;
----------------------------------------------------------------
library ieee; use ieee.std_logic_1164.all;
architecture std_cell of inline_08 is
attribute cell_name : string;
attribute pin_number : positive;
attribute max_wire_delay : delay_length;
attribute encoding : bit_vector;
type length is range 0 to integer'high
units nm;
um = 1000 nm;
mm = 1000 um;
mil = 25400 nm;
end units length;
type coordinate is record
x, y : length;
end record coordinate;
attribute cell_position : coordinate;
type built_in_type is (bv_incr, std_incr);
attribute built_in : built_in_type;
signal enable, clk : bit;
type state_type is (idle_state, other_state);
type speed_range is (high, other_speed);
type coolant_level is (high, other_level);
attribute representation : string;
function increment ( vector : in bit_vector ) return bit_vector is
begin
end;
function increment ( vector : in std_logic_vector ) return std_logic_vector is
begin
end;
attribute cell_name of std_cell : architecture is "DFF_SR_QQNN";
attribute pin_number of enable : signal is 14;
attribute max_wire_delay of clk : signal is 50 ps;
attribute encoding of idle_state : literal is b"0000";
attribute cell_position of the_fpu : label is ( 540 um, 1200 um );
attribute built_in of
increment [ bit_vector return bit_vector ] : function is bv_incr;
attribute built_in of
increment [ std_logic_vector return std_logic_vector ] : function is std_incr;
attribute representation of high [ return speed_range ] : literal is "byte";
attribute representation of high [ return coolant_level ] : literal is "word";
begin
the_fpu : block is
begin
end block the_fpu;
process is
variable v1 : string(1 to 11);
variable v2 : positive;
variable v3 : time;
variable v4 : bit_vector(0 to 3);
variable v5 : coordinate;
variable v6, v7 : built_in_type;
variable v8, v9 : string(1 to 4);
begin
-- code from book included...
v1 := std_cell'cell_name ;
v2 := enable'pin_number ;
v3 := clk'max_wire_delay ;
v4 := idle_state'encoding ;
v5 := the_fpu'cell_position ;
v6 := increment [ bit_vector return bit_vector ] 'built_in ;
v7 := increment [ std_logic_vector return std_logic_vector ] 'built_in ;
v8 := high [ return speed_range ] 'representation ;
v9 := high [ return coolant_level ] 'representation ;
-- end code from book
wait;
end process;
end architecture std_cell;
|
-- Copyright (C) 2002 Morgan Kaufmann Publishers, Inc
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
entity inline_08 is
end entity inline_08;
----------------------------------------------------------------
library ieee; use ieee.std_logic_1164.all;
architecture std_cell of inline_08 is
attribute cell_name : string;
attribute pin_number : positive;
attribute max_wire_delay : delay_length;
attribute encoding : bit_vector;
type length is range 0 to integer'high
units nm;
um = 1000 nm;
mm = 1000 um;
mil = 25400 nm;
end units length;
type coordinate is record
x, y : length;
end record coordinate;
attribute cell_position : coordinate;
type built_in_type is (bv_incr, std_incr);
attribute built_in : built_in_type;
signal enable, clk : bit;
type state_type is (idle_state, other_state);
type speed_range is (high, other_speed);
type coolant_level is (high, other_level);
attribute representation : string;
function increment ( vector : in bit_vector ) return bit_vector is
begin
end;
function increment ( vector : in std_logic_vector ) return std_logic_vector is
begin
end;
attribute cell_name of std_cell : architecture is "DFF_SR_QQNN";
attribute pin_number of enable : signal is 14;
attribute max_wire_delay of clk : signal is 50 ps;
attribute encoding of idle_state : literal is b"0000";
attribute cell_position of the_fpu : label is ( 540 um, 1200 um );
attribute built_in of
increment [ bit_vector return bit_vector ] : function is bv_incr;
attribute built_in of
increment [ std_logic_vector return std_logic_vector ] : function is std_incr;
attribute representation of high [ return speed_range ] : literal is "byte";
attribute representation of high [ return coolant_level ] : literal is "word";
begin
the_fpu : block is
begin
end block the_fpu;
process is
variable v1 : string(1 to 11);
variable v2 : positive;
variable v3 : time;
variable v4 : bit_vector(0 to 3);
variable v5 : coordinate;
variable v6, v7 : built_in_type;
variable v8, v9 : string(1 to 4);
begin
-- code from book included...
v1 := std_cell'cell_name ;
v2 := enable'pin_number ;
v3 := clk'max_wire_delay ;
v4 := idle_state'encoding ;
v5 := the_fpu'cell_position ;
v6 := increment [ bit_vector return bit_vector ] 'built_in ;
v7 := increment [ std_logic_vector return std_logic_vector ] 'built_in ;
v8 := high [ return speed_range ] 'representation ;
v9 := high [ return coolant_level ] 'representation ;
-- end code from book
wait;
end process;
end architecture std_cell;
|
-- Copyright (C) 2002 Morgan Kaufmann Publishers, Inc
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
entity inline_08 is
end entity inline_08;
----------------------------------------------------------------
library ieee; use ieee.std_logic_1164.all;
architecture std_cell of inline_08 is
attribute cell_name : string;
attribute pin_number : positive;
attribute max_wire_delay : delay_length;
attribute encoding : bit_vector;
type length is range 0 to integer'high
units nm;
um = 1000 nm;
mm = 1000 um;
mil = 25400 nm;
end units length;
type coordinate is record
x, y : length;
end record coordinate;
attribute cell_position : coordinate;
type built_in_type is (bv_incr, std_incr);
attribute built_in : built_in_type;
signal enable, clk : bit;
type state_type is (idle_state, other_state);
type speed_range is (high, other_speed);
type coolant_level is (high, other_level);
attribute representation : string;
function increment ( vector : in bit_vector ) return bit_vector is
begin
end;
function increment ( vector : in std_logic_vector ) return std_logic_vector is
begin
end;
attribute cell_name of std_cell : architecture is "DFF_SR_QQNN";
attribute pin_number of enable : signal is 14;
attribute max_wire_delay of clk : signal is 50 ps;
attribute encoding of idle_state : literal is b"0000";
attribute cell_position of the_fpu : label is ( 540 um, 1200 um );
attribute built_in of
increment [ bit_vector return bit_vector ] : function is bv_incr;
attribute built_in of
increment [ std_logic_vector return std_logic_vector ] : function is std_incr;
attribute representation of high [ return speed_range ] : literal is "byte";
attribute representation of high [ return coolant_level ] : literal is "word";
begin
the_fpu : block is
begin
end block the_fpu;
process is
variable v1 : string(1 to 11);
variable v2 : positive;
variable v3 : time;
variable v4 : bit_vector(0 to 3);
variable v5 : coordinate;
variable v6, v7 : built_in_type;
variable v8, v9 : string(1 to 4);
begin
-- code from book included...
v1 := std_cell'cell_name ;
v2 := enable'pin_number ;
v3 := clk'max_wire_delay ;
v4 := idle_state'encoding ;
v5 := the_fpu'cell_position ;
v6 := increment [ bit_vector return bit_vector ] 'built_in ;
v7 := increment [ std_logic_vector return std_logic_vector ] 'built_in ;
v8 := high [ return speed_range ] 'representation ;
v9 := high [ return coolant_level ] 'representation ;
-- end code from book
wait;
end process;
end architecture std_cell;
|
entity mux4to1 is
port (
A,B : in bit;
Y1 : out bit
);
end entity mux4to1;
architecture behv of mux4to1 is
--signal test : bit_vector(1 downto 0);
begin
y1proc : process(A, B)
type foo is (F1, F2);
type foo_vec1 is array (integer range <>) of foo;
type foo_vec2 is array (integer range <>) of foo;
variable x : integer;
variable f : foo;
begin
--test <= A & B;
case (A&B) is -- Error
--case test is
when others => Y1 <= '0';
end case;
case (x & x) is -- Error
when others => null;
end case;
case (f & f) is -- Error
when others => null;
end case;
end process;
process is
type int_vec is array (integer range <>) of integer;
variable x : integer;
begin
case (x & x) is -- Error
when others => null;
end case;
end process;
end architecture;
|
entity mux4to1 is
port (
A,B : in bit;
Y1 : out bit
);
end entity mux4to1;
architecture behv of mux4to1 is
--signal test : bit_vector(1 downto 0);
begin
y1proc : process(A, B)
type foo is (F1, F2);
type foo_vec1 is array (integer range <>) of foo;
type foo_vec2 is array (integer range <>) of foo;
variable x : integer;
variable f : foo;
begin
--test <= A & B;
case (A&B) is -- Error
--case test is
when others => Y1 <= '0';
end case;
case (x & x) is -- Error
when others => null;
end case;
case (f & f) is -- Error
when others => null;
end case;
end process;
process is
type int_vec is array (integer range <>) of integer;
variable x : integer;
begin
case (x & x) is -- Error
when others => null;
end case;
end process;
end architecture;
|
entity mux4to1 is
port (
A,B : in bit;
Y1 : out bit
);
end entity mux4to1;
architecture behv of mux4to1 is
--signal test : bit_vector(1 downto 0);
begin
y1proc : process(A, B)
type foo is (F1, F2);
type foo_vec1 is array (integer range <>) of foo;
type foo_vec2 is array (integer range <>) of foo;
variable x : integer;
variable f : foo;
begin
--test <= A & B;
case (A&B) is -- Error
--case test is
when others => Y1 <= '0';
end case;
case (x & x) is -- Error
when others => null;
end case;
case (f & f) is -- Error
when others => null;
end case;
end process;
process is
type int_vec is array (integer range <>) of integer;
variable x : integer;
begin
case (x & x) is -- Error
when others => null;
end case;
end process;
end architecture;
|
------------------------------------------------------------------------------
-- FIFO controller
--
-- Project :
-- File : $URL: svn+ssh://[email protected]/home/plessl/SVN/simzippy/trunk/vhdl/fifoctrl.vhd $
-- Authors : Rolf Enzler <[email protected]>
-- Christian Plessl <[email protected]>
-- Company : Swiss Federal Institute of Technology (ETH) Zurich
-- Created : 2003/01/17
-- $Id: fifoctrl.vhd 241 2005-04-07 08:50:55Z plessl $
------------------------------------------------------------------------------
-- FIFO controller: The controller arbitrates the access to the FIFO
-- between the engine. The engine is given priority over the FIFO access.
--
-- Whenever the engine is running (RunningxSI = 1) the engine can issue a FIFO
-- read or write request EngInPortxEI/EngOutPortxEI).
-- FIXME: Signal names are confusing, rename
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
entity FifoCtrl is
port (
RunningxSI : in std_logic;
EngInPortxEI : in std_logic;
EngOutPortxEI : in std_logic;
DecFifoWExEI : in std_logic;
DecFifoRExEI : in std_logic;
FifoMuxSO : out std_logic;
FifoWExEO : out std_logic;
FifoRExEO : out std_logic);
end FifoCtrl;
architecture simple of FifoCtrl is
signal EngWriteReqxS : std_logic;
signal EngReadReqxS : std_logic;
signal IFWriteReqxS : std_logic;
signal IFReadReqxS : std_logic;
begin -- simple
EngWriteReqxS <= RunningxSI and EngOutPortxEI;
EngReadReqxS <= RunningxSI and EngInPortxEI;
IFWriteReqxS <= DecFifoWExEI;
IFReadReqxS <= DecFifoRExEI;
FifoMux : process (EngWriteReqxS)
begin
-- always interface write unless engine write request;
-- engine write is priorized over interface write
if (EngWriteReqxS = '1') then
FifoMuxSO <= '1';
else
FifoMuxSO <= '0';
end if;
end process FifoMux;
FifoWE : process (EngWriteReqxS, IFWriteReqxS)
begin
if (EngWriteReqxS = '1') or (IFWriteReqxS = '1') then
FifoWExEO <= '1';
else
FifoWExEO <= '0';
end if;
end process FifoWE;
FifoRE : process (EngReadReqxS, IFReadReqxS)
begin
if (EngReadReqxS = '1') or (IFReadReqxS = '1') then
FifoRExEO <= '1';
else
FifoRExEO <= '0';
end if;
end process FifoRE;
-- assertions
WarnConcWrite : process (EngWriteReqxS, IFWriteReqxS)
begin
assert (EngWriteReqxS = '1') nand (IFWriteReqxS = '1')
report "FifoCtrl: concurrent interface and engine write requests"
severity warning;
end process WarnConcWrite;
WarnConcRead : process (EngReadReqxS, IFReadReqxS)
begin
assert (EngReadReqxS = '1') nand (IFReadReqxS = '1')
report "FifoCtrl: concurrent interface and engine read requests"
severity warning;
end process WarnConcRead;
end simple;
|
-- circuito_superamostragem.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity circuito_superamostragem is
generic(
M: integer := 16 -- para transmissao de 110 bauds com gerador de tick 16 * 110 Hz
);
port(
clock, reset: in std_logic;
tick: in std_logic;
load: in std_logic;
habilita_circuito: out std_logic
);
end circuito_superamostragem;
architecture arch of circuito_superamostragem is
signal contagem, prox_contagem: integer;
signal prox_enable: std_logic;
begin
process(clock,reset)
begin
if (reset='1') then
contagem <= 0;
elsif (clock'event and clock='1') then
if tick = '1' then
if load = '1' then
contagem <= (M / 2);
else
contagem <= prox_contagem;
end if;
end if;
if prox_enable = '0' then
if((contagem = (M-1)) and (tick = '1')) then
prox_enable <= '1';
end if;
else
prox_enable <= '0';
end if;
end if;
end process;
-- logica de proximo estado
prox_contagem <= 0 when contagem=(M-1) else contagem + 1;
-- logica de saida
habilita_circuito <= prox_enable;
end arch;
|
-- opa: Open Processor Architecture
-- Copyright (C) 2014-2016 Wesley W. Terpstra
--
-- This program is free software: you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program. If not, see <http://www.gnu.org/licenses/>.
--
-- To apply the GPL to my VHDL, please follow these definitions:
-- Program - The entire collection of VHDL in this project and any
-- netlist or floorplan derived from it.
-- System Library - Any macro that translates directly to hardware
-- e.g. registers, IO pins, or memory blocks
--
-- My intent is that if you include OPA into your project, all of the HDL
-- and other design files that go into the same physical chip must also
-- be released under the GPL. If this does not cover your usage, then you
-- must consult me directly to receive the code under a different license.
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library altera_mf;
use altera_mf.altera_mf_components.all;
entity uart is
generic(
g_wide : natural := 8;
g_deep : natural := 10);
port(
clk_i : in std_logic;
rst_n_i : in std_logic;
stb_i : in std_logic;
stall_o : out std_logic;
dat_i : in std_logic_vector(g_wide-1 downto 0);
stb_o : out std_logic;
stall_i : in std_logic;
dat_o : out std_logic_vector(g_wide-1 downto 0));
end uart;
architecture rtl of uart is
-- Virtual JTAG pins
signal s_tck : std_logic;
signal s_tdi : std_logic;
signal s_tdo : std_logic;
signal s_virtual_state_cdr : std_logic;
signal s_virtual_state_sdr : std_logic;
signal s_virtual_state_udr : std_logic;
-- SYS to JTAG
signal s_s2j_full : std_logic;
signal s_s2j_push : std_logic;
signal s_s2j_empty : std_logic;
signal s_s2j_pop : std_logic;
signal s_s2j_dat : std_logic_vector(g_wide-1 downto 0);
-- JTAG to SYS
signal s_j2s_full : std_logic;
signal s_j2s_push : std_logic;
signal s_j2s_empty : std_logic;
signal s_j2s_pop : std_logic;
signal s_j2s_dat : std_logic_vector(g_wide-1 downto 0);
-- JTAG shift register
signal r_jtag_valid : std_logic;
signal r_jtag_dat : std_logic_vector(g_wide-1 downto 0);
begin
stall_o <= s_s2j_full;
s_s2j_push <= stb_i and not s_s2j_full;
s_s2j_pop <= s_virtual_state_cdr and not s_s2j_empty;
s2j : dcfifo
generic map(
lpm_width => g_wide,
lpm_widthu => g_deep,
lpm_numwords => 2**g_deep,
lpm_showahead => "ON",
overflow_checking => "OFF",
underflow_checking=> "OFF",
rdsync_delaypipe => 4,
wrsync_delaypipe => 4)
port map(
aclr => "not"(rst_n_i),
wrclk => clk_i,
data => dat_i,
wrreq => s_s2j_push,
wrfull => s_s2j_full,
rdclk => s_tck,
q => s_s2j_dat,
rdreq => s_s2j_pop,
rdempty => s_s2j_empty);
-- !!! no flow control on input from JTAG; we drop on overflow
s_j2s_push <= r_jtag_valid and s_virtual_state_udr and not s_j2s_full;
stb_o <= not s_j2s_empty;
dat_o <= s_j2s_dat;
s_j2s_pop <= not stall_i and not s_j2s_empty;
j2s : dcfifo
generic map(
lpm_width => g_wide,
lpm_widthu => g_deep,
lpm_numwords => 2**g_deep,
lpm_showahead => "ON",
overflow_checking => "OFF",
underflow_checking=> "OFF",
rdsync_delaypipe => 4,
wrsync_delaypipe => 4)
port map(
aclr => "not"(rst_n_i),
wrclk => s_tck,
data => r_jtag_dat,
wrreq => s_j2s_push,
wrfull => s_j2s_full,
rdclk => clk_i,
q => s_j2s_dat,
rdreq => s_j2s_pop,
rdempty => s_j2s_empty);
vjtag : sld_virtual_jtag
generic map(
sld_instance_index => 98,
sld_ir_width => 1)
port map(
ir_in => open,
ir_out => "0",
jtag_state_cdr => open,
jtag_state_cir => open,
jtag_state_e1dr => open,
jtag_state_e1ir => open,
jtag_state_e2dr => open,
jtag_state_e2ir => open,
jtag_state_pdr => open,
jtag_state_pir => open,
jtag_state_rti => open,
jtag_state_sdr => open,
jtag_state_sdrs => open,
jtag_state_sir => open,
jtag_state_sirs => open,
jtag_state_tlr => open,
jtag_state_udr => open,
jtag_state_uir => open,
tck => s_tck,
tdi => s_tdi,
tdo => s_tdo,
tms => open,
virtual_state_cdr => s_virtual_state_cdr,
virtual_state_cir => open,
virtual_state_e1dr => open,
virtual_state_e2dr => open,
virtual_state_pdr => open,
virtual_state_sdr => s_virtual_state_sdr,
virtual_state_udr => s_virtual_state_udr,
virtual_state_uir => open);
jtag : process(s_tck) is
begin
if rising_edge(s_tck) then
if s_virtual_state_cdr = '1' then
r_jtag_valid <= not s_s2j_empty;
r_jtag_dat <= s_s2j_dat;
end if;
if s_virtual_state_sdr = '1' then
r_jtag_valid <= s_tdi;
r_jtag_dat <= r_jtag_valid & r_jtag_dat(r_jtag_dat'high downto r_jtag_dat'low+1);
end if;
end if;
end process;
s_tdo <= r_jtag_dat(r_jtag_dat'low);
end rtl;
|
-- This file is not intended for synthesis, is is present so that simulators
-- see a complete view of the system.
-- You may use the entity declaration from this file as the basis for a
-- component declaration in a VHDL file instantiating this entity.
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.NUMERIC_STD.all;
entity alt_dspbuilder_bus_concat is
generic (
WIDTHB : natural := 8;
WIDTHA : natural := 8
);
port (
b : in std_logic_vector(widthB-1 downto 0);
clock : in std_logic;
a : in std_logic_vector(widthA-1 downto 0);
aclr : in std_logic;
output : out std_logic_vector(widthA+widthB-1 downto 0)
);
end entity alt_dspbuilder_bus_concat;
architecture rtl of alt_dspbuilder_bus_concat is
component alt_dspbuilder_bus_concat_GNXPBV3I7L is
generic (
WIDTHB : natural := 4;
WIDTHA : natural := 12
);
port (
a : in std_logic_vector(12-1 downto 0);
aclr : in std_logic;
b : in std_logic_vector(4-1 downto 0);
clock : in std_logic;
output : out std_logic_vector(16-1 downto 0)
);
end component alt_dspbuilder_bus_concat_GNXPBV3I7L;
begin
alt_dspbuilder_bus_concat_GNXPBV3I7L_0: if ((WIDTHB = 4) and (WIDTHA = 12)) generate
inst_alt_dspbuilder_bus_concat_GNXPBV3I7L_0: alt_dspbuilder_bus_concat_GNXPBV3I7L
generic map(WIDTHB => 4, WIDTHA => 12)
port map(a => a, aclr => aclr, b => b, clock => clock, output => output);
end generate;
assert not (((WIDTHB = 4) and (WIDTHA = 12)))
report "Please run generate again" severity error;
end architecture rtl;
|
-- This file is not intended for synthesis, is is present so that simulators
-- see a complete view of the system.
-- You may use the entity declaration from this file as the basis for a
-- component declaration in a VHDL file instantiating this entity.
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.NUMERIC_STD.all;
entity alt_dspbuilder_bus_concat is
generic (
WIDTHB : natural := 8;
WIDTHA : natural := 8
);
port (
b : in std_logic_vector(widthB-1 downto 0);
clock : in std_logic;
a : in std_logic_vector(widthA-1 downto 0);
aclr : in std_logic;
output : out std_logic_vector(widthA+widthB-1 downto 0)
);
end entity alt_dspbuilder_bus_concat;
architecture rtl of alt_dspbuilder_bus_concat is
component alt_dspbuilder_bus_concat_GNXPBV3I7L is
generic (
WIDTHB : natural := 4;
WIDTHA : natural := 12
);
port (
a : in std_logic_vector(12-1 downto 0);
aclr : in std_logic;
b : in std_logic_vector(4-1 downto 0);
clock : in std_logic;
output : out std_logic_vector(16-1 downto 0)
);
end component alt_dspbuilder_bus_concat_GNXPBV3I7L;
begin
alt_dspbuilder_bus_concat_GNXPBV3I7L_0: if ((WIDTHB = 4) and (WIDTHA = 12)) generate
inst_alt_dspbuilder_bus_concat_GNXPBV3I7L_0: alt_dspbuilder_bus_concat_GNXPBV3I7L
generic map(WIDTHB => 4, WIDTHA => 12)
port map(a => a, aclr => aclr, b => b, clock => clock, output => output);
end generate;
assert not (((WIDTHB = 4) and (WIDTHA = 12)))
report "Please run generate again" severity error;
end architecture rtl;
|
-- Copyright (C) 2002 Morgan Kaufmann Publishers, Inc
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- not in book
library ieee_proposed; use ieee_proposed.electrical_systems.all;
package transmission_lines_types is
type word is array (0 to 31) of bit;
subtype bus_lines is integer range 0 to 31;
nature electrical_bus is array (bus_lines) of electrical;
end package transmission_lines_types;
library ieee_proposed; use ieee_proposed.electrical_systems.all;
use work.transmission_lines_types.all;
-- end not in book
entity transmission_lines is
port ( terminal data_bus : electrical_bus;
signal clk : in bit; signal data_out : out word );
end entity transmission_lines;
----------------------------------------------------------------
architecture abstract of transmission_lines is
constant threshold : voltage := 1.5;
quantity bus_voltages across bus_currents through
data_bus to electrical_ref;
begin
logic_value_maps : process (clk) is
begin
if clk = '1' then
for index in bus_lines loop
if bus_voltages(index) > threshold then
data_out(index) <= '1';
else
data_out(index) <= '0';
end if;
end loop;
end if;
end process logic_value_maps;
-- additional VHDL-AMS code to describe reflections and attenuation
-- ...
end architecture abstract;
|
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