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qwen2.5coder-7b-origen-verilog-vhdl-chisel-interleaved-gs16

Text Generation

text-generation-inference

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qwen2.5coder-7b-origen-verilog-vhdl-chisel-interleaved-gs16

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Upload Qwen2ForCausalLM

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initial commit

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charleshong3 commited on 24 days ago