rtl-llm
/

qwen2.5coder-7b-origen-vhdl-pymtl-verilog

Text Generation

text-generation-inference

Model card Files Files and versions Community

qwen2.5coder-7b-origen-vhdl-pymtl-verilog / .gitattributes

Commit History

Upload tokenizer

3a5dba0
verified

charleshong3 commited on 27 days ago

initial commit

3ea8314
verified

charleshong3 commited on 27 days ago