data/text/DLP3/898480

TPS62810-Q1: Power Good

Part Number: TPS62810-Q1 Hi, I understand that the PG only responds to a variation of the voltage regulated downwards. Consequently, if the voltage rises in a worrying way, I could not know this by only monitoring the PG. Correct? I do see that the IC has UVP and also OVP Power Good so I might be wrong for the above? For example let's assume that the PGOOD is not monitored and therefore has no way of understanding if everything is in order. If an external entity forced the regulated voltage to a value greater or less than the nominal one, would the IC would continue to work as if nothing had happened or would switch off? Obviously, being protected from short circuit, the integrated will respond if the output is brought to ground. But for intermediate values or higher than the nominal one? Many Thanks, Antonio

Hello Antonio, As you can see with UVP and OVP, PG states the good regulation of the output voltage at the intended value if VOUT is between UVP and OVP window. PG is an indicator which in TPS62810-Q1 is providing a binary output state. If VOUT was regulated at intended value within UVP and OVP window, PG=VOUT (referring to schematic page 1 of D/S). Then if the voltage rises above OVP as you mentioned, PG=0 if voltage at feedback is reaching 110% (raising typical value) of VOUT. If an external entity forced the regulated voltage to a value greater or less than the nominal one. The TPS62810-Q1 would try to regulate the output, you would need to refer to the Current limit section (9.4.4 and 9.4.5 topic in Datasheet). Let me know if you have any further questions. Thanks a lot! Regards, Dorian

Hi Dorian, Ok, thank you clear. The assumptions, however, were that pin was not monitored. Without relying on the PG signal, I seem to understand that in the event of "external forcing" (therefore of bad regulation) the IC continues to work trying to regulate the output. At that point, the only parameter we can rely on is the current, or rather the over-current protection system. In the event that the output is brought to GND, it is easy to guess that the protection takes over and we are all safe. It is more difficult to understand what would happen if the output were forced, let's say 130% of the nominal value. I know it is perhaps a stupid question because this is highly unlikely to happen, but perhaps not too much. Take for example the LM46002 (I guess it has similar logic) to generate the 5V for the USB HOST device. This voltage is brought to the outside through the connector and the PGOOD is not connected to the enable of the uC to prevent a problem on USB from turning off everything. Suppose someone connects 6V ... what would then happen here? Many Thanks, Antonio

Hello Antonio, I would like to understand how this 130% of output voltage could happen, are you referring to someone forcing a voltage at the output? How would behave the TPS62810-Q1? The following App-Note is a good read on this question: <secret URL>/lit/an/slyt689/slyt689.pdf Your device should then be used in PFM to prevent Boost behavior at the input or use an additional diode. Was is the question you are asking here? Thank you, Dorian

Hi Dorian, Thanks a lot for the answer. The suggested document is interesting. Your interpretation is correct. The question is "what happens if someone forces the Vout beyond a certain threshold?". More than the solution, I would like to understand what would happen to the IC in these conditions if kept in Forced PWM mode and in the absence of a diode. But I guess it's not easy to say. Many Thanks, Antonio

Hello Antonio, I think this is answered in the same App Note (section 6. Prohibit the bosst mode of step-down converters), if you force Vout beyond a certain threshold with IC in FPWM. Then your IC can behave like a boost converter, which you want to avoid. Current might flow from output to input, and enable IC which will start to act like a boost converter as inductor would be at the input of that system. Does this answer your question? Thanks a lot! Regards, Dorian