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TPS55165Q1-EVM: How to enable IGN_PWRL function and SS_EN

Part Number: TPS55165Q1-EVM I want to use the TPS55165Q1 IC with the following settings: 1- Normal Mode ( Always ) with output 12v fixed. 2- Power latch on ( always on even if battery voltage drop during crank ) , without external micro-controller signal if possible . using a pull up or pull down is preferred . 3- with Spread-Spectrum enabled to reduce EMI . Problem 1: I have problem understanding how to connect IGN_PWRL IN TPS55165Q1-EVM (SLVUAY1) The schematic shows that inorder to enable the Power latch , the jumper should be connected to GND. while in datasheet it says in the pin description of IGN_PWRL:" Logic-level IGN power-latch signal. The IGN pin is latched when this pin is high (1) and is not latched when this pin is low (0). So what is the correct way of connecting this pin ? Problem 2: SS_En The datasheet and EVM document states that: This feature can only be enabled when the device is in normal mode with step-down operation. So if i leave this pin unconnected ( SS enabled ) Does this means that during operation in boost mode ( Vin < 12v) this feature is disable automatically and the device continue working normally ? Or Does it mean that when operating in boost mode ( Vin < 12v) this device will be disable because SS is enabled ?

Dear Sir. 1. For the feature of IGN_PWRL, please check datasheet "8.4.3 Power-Up and Power-Down Sequences", it is easy for you to understand it; 2. SS_En: Yes, the frequency dithering function only valid in buck mode. The frequency will keep unchanged when Vin<Vo even you left this pin open.

Dear Ms Helen Your answer was NOT helpful in any way : 1. I did check section 8.4.3 , and this showed me that this pin should be connected to 5v inorder to latch power. but your answer didnot clearifay the following : a) can this be done by a pull-up and what is the value ? 10k 100k ? b) you didn't acknowledge why does the EVM has Latch jumper connect to GND , to enable this feature . 2. SS_EN , when you said " The frequency will keep unchanged when Vin<Vo even you left this pin open. " , do you mean the device will work properly but at a fixed frequency , YES or NO ?

Hi Sammy, Please check my below comments: 1. I did check section 8.4.3 , and this showed me that this pin should be connected to 5v in order to latch power. but your answer did not clearifay the following : a) can this be done by a pull-up and what is the value ? 10k 100k ? --> you can use 10k-100k ohm, either one is OK. b) you didn't acknowledge why does the EVM has Latch jumper connect to GND , to enable this feature . --> Sorry for the confusion, this is a mistake in the schematic. It should be marked as unlatch. 2. SS_EN , when you said " The frequency will keep unchanged when Vin<Vo even you left this pin open. " , do you mean the device will work properly but at a fixed frequency , YES or NO ? --> Yes, the device will work properly but at a fixed frequency.