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Ticket Name: TDA2SA: tda2xx linux can not boot from sd
Query Text:
Part Number: TDA2SA Other Parts Discussed in Thread: TDA2 Hi, I have a new custom board. It can boot BIOS from SD. But when I want to test linux boot, it has no logs displayed. My custom board has only 512MB RAM, so I had modified some files refer to ch6.6 in VisionSDK_UserGuide_MemoryMap.pdf. The SD card had formated follow the VisionSDK_Linux_UserGuide.pdf. I had tested the sd crad in tda2xx evm and it shows the u-boot message although linux can't start. How do I debug my custom board? Thanks. Terry
Responses:
Hi Terry, I would suggest you to first try to get modified SDK working on TDA2 EVM. Then you can make same changes for custom board. Can you share the changes you have made for memory update. Regards, Rishabh
Hi Rishabh, I am working on VSDK 3.07. The default settings could boot to linux on TDA2 evm. Do you mean I test the 512MB memory case on EVM not my custom board? attach the chages file. Terry fix.txt diff --git a/ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/dra72-evm-infoadas.dts b/ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/dra72-evm-infoadas.dts
index 4c77254f1..359ab3977 100755
--- a/ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/dra72-evm-infoadas.dts
+++ b/ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/dra72-evm-infoadas.dts
@@ -36,17 +36,20 @@ DISABLE_PRCM(gpio6);
/* Update the CMA regions for Vision SDK binaries */
&ipu2_cma_pool {
- reg = <0x0 0x99000000 0x0 0x5000000>;
+ reg = <0x0 0x99000000 0x0 0x2000000>;
};
&dsp1_cma_pool {
- reg = <0x0 0xa1000000 0x0 0x2000000>;
+ reg = <0x0 0x9B000000 0x0 0x1000000>;
};
&ipu1_cma_pool {
- reg = <0x0 0x9e000000 0x0 0x2000000>;
+ reg = <0x0 0x9D000000 0x0 0x100000>;
};
+&dsp2_cma_pool {
+ reg = <0x0 0x9C000000 0x0 0x1000000>;
+};
/* Additional memory regions required for Vision SDK
* Keep this in sync with VSDK apps/build/tda2ex/mem_segment_definition_linux.xs
@@ -60,24 +63,30 @@ DISABLE_PRCM(gpio6);
status = "okay";
};
- cmem_pool: cmem@A9000000 {
+ cmem_pool: cmem@9D200000 {
compatible = "shared-dma-pool";
- reg = <0x0 0xA9000000 0x0 0x4000000>;
+ reg = <0x0 0x9D200000 0x0 0x2000000>;
no-map;
status = "okay";
};
vsdk_sr1_mem: vsdk_sr1_mem@84000000 {
compatible = "shared-dma-pool";
- reg = <0x0 0x84000000 0x0 0x10000000>;
+ reg = <0x0 0x84000000 0x0 0xD000000>;
status = "okay";
};
- vsdk_sr0_mem: vsdk_sr0_mem@A0000000 {
+ vsdk_sr0_mem: vsdk_sr0_mem@9FB00000 {
compatible = "shared-dma-pool";
- reg = <0x0 0xA0000000 0x0 0x1000000>;
+ reg = <0x0 0x9FB00000 0x0 0x500000>;
status = "okay";
};
+
+ vsdk_eve_mem: vsdk_eve_mem@9D100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x0 0x9D100000 0x0 0x100000>;
+ status = "okay";
+ };
};
&ipu1 {
diff --git a/ti_components/os_tools/linux/u-boot/u-boot/board/ti/dra7xx/evm.c b/ti_components/os_tools/linux/u-boot/u-boot/board/ti/dra7xx/evm.c
index e6a7dacfe..bb23f86fd 100755
--- a/ti_components/os_tools/linux/u-boot/u-boot/board/ti/dra7xx/evm.c
+++ b/ti_components/os_tools/linux/u-boot/u-boot/board/ti/dra7xx/evm.c
@@ -44,8 +44,9 @@
(strncmp("H", board_ti_get_rev(), 1) <= 0))
#define board_is_dra72x_revc_or_later() (board_is_dra72x_evm() && \
(strncmp("C", board_ti_get_rev(), 1) <= 0))
-#define board_ti_get_emif_size() board_ti_get_emif1_size() + \
- board_ti_get_emif2_size()
+//#define board_ti_get_emif_size() board_ti_get_emif1_size() + \
+// board_ti_get_emif2_size()
+#define board_ti_get_emif_size() 0x20000000
#ifdef CONFIG_DRIVER_TI_CPSW
#include <cpsw.h>
diff --git a/vision_sdk/apps/build/tda2xx/mem_segment_definition_linux.xs b/vision_sdk/apps/build/tda2xx/mem_segment_definition_linux.xs
index f1f70adb1..aa0a2ba7d 100755
--- a/vision_sdk/apps/build/tda2xx/mem_segment_definition_linux.xs
+++ b/vision_sdk/apps/build/tda2xx/mem_segment_definition_linux.xs
@@ -11,6 +11,8 @@
* ======== mem_segment_definition.xs ========
* ======== Single file for the memory map configuration of all cores =========
*/
+function getMemSegmentDefinition_external(core)
+{
KB=1024;
MB=KB*KB;
@@ -49,12 +51,12 @@ SR2_BASE_ADDR 0xA9000000
A15-Linux 0xC0000000(End of Interleaving)
*************************/
DDR3_ADDR = 0x80000000;
-DDR3_SIZE = 1024*MB;
+DDR3_SIZE = 512*MB;
DDR3_LINUX_MEM_OFFSET = 64*MB;
/* First 512 MB - cached */
DDR3_BASE_ADDR_0 = 0x80000000;
-DDR3_BASE_SIZE_0 = 448*MB + DDR3_LINUX_MEM_OFFSET;
+DDR3_BASE_SIZE_0 = 507*MB;
/* The start address of the second mem section should be 16MB aligned.
@@ -62,13 +64,22 @@ DDR3_BASE_SIZE_0 = 448*MB + DDR3_LINUX_MEM_OFFSET;
* to map SR0, REMOTE_LOG_MEM sections.
* tlb_config_eveX.c need to be modified otherwise
*/
-DDR3_BASE_ADDR_1 = 0xA0000000;
-DDR3_BASE_SIZE_1 = 512*MB;
+DDR3_BASE_ADDR_1 = DDR3_BASE_ADDR_0 + DDR3_BASE_SIZE_0;
+DDR3_BASE_SIZE_1 = DDR3_SIZE - DDR3_BASE_SIZE_0;
+
+if(core=="ipu1_1" || core=="ipu1_0" || core=="ipu2")
+{
+ /* for ipu1_0, ipu1_1, ipu2 DDR3_BASE_ADDR_1 should be
+ * in non-cached virtual address of
+ * DDR3_BASE_ADDR_1 + 512*MB
+ */
+ DDR3_BASE_ADDR_1 = DDR3_BASE_ADDR_1+512*MB;
+}
/* Address and Size definitions of different components running on different cores */
NDK_START_ADDR = DDR3_BASE_ADDR_0 + DDR3_LINUX_MEM_OFFSET;
NDK_MEM_SIZE = 2*MB
-SR1_FRAME_BUFFER_SIZE = 300*MB;
+SR1_FRAME_BUFFER_SIZE = 205*MB;
SR1_BUFF_ECC_ASIL_SIZE = 4*KB;
SR1_BUFF_ECC_QM_SIZE = 4*KB;
SR1_BUFF_NON_ECC_ASIL_SIZE = 4*KB;
@@ -83,20 +94,20 @@ if (ipummSupport == "yes") {
IPU2_DATA_SIZE = 60*MB;
}
else {
- IPU2_DATA_SIZE = 20*MB;
+ IPU2_DATA_SIZE = 16*MB;
}
-IPU1_START_ADDR = 0x9e000000;
-IPU1_0_CODE_SIZE = 8*MB;
-IPU1_0_DATA_SIZE = 21*MB;
+IPU1_START_ADDR = 0x9D000000;
+IPU1_0_CODE_SIZE = 1*KB;
+IPU1_0_DATA_SIZE = 1*KB;
-DSP1_START_ADDR = 0xA1000000;
+DSP1_START_ADDR = 0x9B000000;
DSP1_CODE_SIZE = 2*MB;
-DSP1_DATA_SIZE = 24*MB;
+DSP1_DATA_SIZE = 12*MB;
-DSP2_START_ADDR = 0xA3000000;
+DSP2_START_ADDR = 0x9C000000;
DSP2_CODE_SIZE = 2*MB;
-DSP2_DATA_SIZE = 14*MB;
+DSP2_DATA_SIZE = 12*MB;
/* The start address of the second mem section should be 16MB aligned.
* This alignment is a must as a single 16MB mapping is used for EVE
@@ -119,25 +130,25 @@ PM_DATA_LEN = 512*KB;
OPENVX_SHM_SIZE = 2*MB;
/* The start address of EVE memory must be 16MB aligned. */
-EVE_START_ADDR = 0xA5000000;
+EVE_START_ADDR = 0x9D100000;
/* EVE vecs space should be align with 16MB boundary, and if possible try to fit
* the entire vecs+code+data in 16MB section. In this case a single TLB map would
* be enough to map vecs+code+data of an EVE.
* tlb_config_eveX.c need to be modified if any of these EVE memory sections or
* SR1_FRAME_BUFFER_MEM section is modified.
*/
-EVE1_VECS_SIZE = 0.5*MB;
-EVE1_CODE_SIZE = 2*MB;
-EVE1_DATA_SIZE =13.5*MB;
-EVE2_VECS_SIZE = 0.5*MB;
-EVE2_CODE_SIZE = 2*MB;
-EVE2_DATA_SIZE =13.5*MB;
-EVE3_VECS_SIZE = 0.5*MB;
-EVE3_CODE_SIZE = 2*MB;
-EVE3_DATA_SIZE =13.5*MB;
-EVE4_VECS_SIZE = 0.5*MB;
-EVE4_CODE_SIZE = 2*MB;
-EVE4_DATA_SIZE =13.5*MB;
+EVE1_VECS_SIZE = 1*KB;
+EVE1_CODE_SIZE = 1*KB;
+EVE1_DATA_SIZE = 1*KB;
+EVE2_VECS_SIZE = 1*KB;
+EVE2_CODE_SIZE = 1*KB;
+EVE2_DATA_SIZE = 1*KB;
+EVE3_VECS_SIZE = 1*KB;
+EVE3_CODE_SIZE = 1*KB;
+EVE3_DATA_SIZE = 1*KB;
+EVE4_VECS_SIZE = 1*KB;
+EVE4_CODE_SIZE = 1*KB;
+EVE4_DATA_SIZE = 1*KB;
TOTAL_MEM_SIZE = (DDR3_SIZE);
@@ -216,12 +227,10 @@ if (A15TargetOS == "Qnx") {
}
else {
/* Shared Region handled by A15 HLOS Linux*/
- SR2_BASE_ADDR = 0xA9000000;
+ SR2_BASE_ADDR = 0x9D200000;
SR2_SIZE = 0x2000000;
}
-function getMemSegmentDefinition_external(core)
-{
var memory = new Array();
var index = 0;
diff --git a/vision_sdk/apps/configs/tda2xx_evm_linux_all/cfg.mk b/vision_sdk/apps/configs/tda2xx_evm_linux_all/cfg.mk
index 1e150d5e9..6e8f2a21e 100755
--- a/vision_sdk/apps/configs/tda2xx_evm_linux_all/cfg.mk
+++ b/vision_sdk/apps/configs/tda2xx_evm_linux_all/cfg.mk
@@ -23,10 +23,10 @@ PROC_IPU2_INCLUDE=yes
PROC_A15_0_INCLUDE=yes
PROC_DSP1_INCLUDE=yes
PROC_DSP2_INCLUDE=yes
-PROC_EVE1_INCLUDE=yes
-PROC_EVE2_INCLUDE=yes
-PROC_EVE3_INCLUDE=yes
-PROC_EVE4_INCLUDE=yes
+PROC_EVE1_INCLUDE=no
+PROC_EVE2_INCLUDE=no
+PROC_EVE3_INCLUDE=no
+PROC_EVE4_INCLUDE=no
VSDK_BOARD_TYPE=TDA2XX_EVM
diff --git a/vision_sdk/links_fw/include/link_api/system_vring_config.h b/vision_sdk/links_fw/include/link_api/system_vring_config.h
old mode 100644
new mode 100755
index 3a6b0e91f..b062abb85
--- a/vision_sdk/links_fw/include/link_api/system_vring_config.h
+++ b/vision_sdk/links_fw/include/link_api/system_vring_config.h
@@ -107,11 +107,11 @@ extern "C" {
#define IPU_MEM_VRING_BUFS0 0x60040000
#define IPU_MEM_VRING_BUFS1 0x60080000
-#define DSP_MEM_IPC_VRING 0xA0000000
-#define DSP_MEM_RPMSG_VRING0 0xA0000000
-#define DSP_MEM_RPMSG_VRING1 0xA0004000
-#define DSP_MEM_VRING_BUFS0 0xA0040000
-#define DSP_MEM_VRING_BUFS1 0xA0080000
+#define DSP_MEM_IPC_VRING 0x9FB00000
+#define DSP_MEM_RPMSG_VRING0 0x9FB00000
+#define DSP_MEM_RPMSG_VRING1 0x9FB04000
+#define DSP_MEM_VRING_BUFS0 0x9FB40000
+#define DSP_MEM_VRING_BUFS1 0x9FB80000
/*
* Vring physical addresses
@@ -129,15 +129,15 @@ extern "C" {
*/
#ifdef BUILD_M4_0
-#define IPU_PHYS_MEM_IPC_VRING 0x9e000000
+#define IPU_PHYS_MEM_IPC_VRING 0x9D000000
#endif
#ifdef BUILD_DSP_1
-#define DSP_PHYS_MEM_IPC_VRING 0xa1000000
+#define DSP_PHYS_MEM_IPC_VRING 0x9B000000
#endif
#ifdef BUILD_DSP_2
-#define DSP_PHYS_MEM_IPC_VRING 0xa3000000
+#define DSP_PHYS_MEM_IPC_VRING 0x9C000000
#endif
#ifdef BUILD_M4_2
diff --git a/vision_sdk/links_fw/src/hlos/osa/include/osa_mem_map.h b/vision_sdk/links_fw/src/hlos/osa/include/osa_mem_map.h
old mode 100644
new mode 100755
index 08126c6e8..5f80957cc
--- a/vision_sdk/links_fw/src/hlos/osa/include/osa_mem_map.h
+++ b/vision_sdk/links_fw/src/hlos/osa/include/osa_mem_map.h
@@ -11,22 +11,22 @@
#define _SYSTEM_MEM_MAP_H_
-#define SR0_ADDR 0xa0100000
+#define SR0_ADDR 0x9fc00000
#define SR0_SIZE 0x100000
-#define SYSTEM_IPC_SHM_MEM_ADDR 0xa02c0000
+#define SYSTEM_IPC_SHM_MEM_ADDR 0x9fdc0000
#define SYSTEM_IPC_SHM_MEM_SIZE 0x80000
-#define SYSTEM_AUTOSAR_IPC_SHM_MEM_ADDR 0xa0340000
+#define SYSTEM_AUTOSAR_IPC_SHM_MEM_ADDR 0xbfe40000
#define SYSTEM_AUTOSAR_IPC_SHM_MEM_SIZE 0x80000
-#define REMOTE_LOG_MEM_ADDR 0xa0200000
+#define REMOTE_LOG_MEM_ADDR 0x9fd00000
#define REMOTE_LOG_MEM_SIZE 0x40000
#define SR1_FRAME_BUFFER_MEM_ADDR 0x84203000
-#define SR1_FRAME_BUFFER_MEM_SIZE 0x12c00000
+#define SR1_FRAME_BUFFER_MEM_SIZE 0xcd00000
-#define SR2_FRAME_BUFFER_MEM_ADDR 0xa9000000
+#define SR2_FRAME_BUFFER_MEM_ADDR 0x9d200000
#define SR2_FRAME_BUFFER_MEM_SIZE 0x2000000
#endif /* _SYSTEM_MEM_MAP_H_ */
diff --git a/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/ipu2/gen_system_mem_map.xs b/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/ipu2/gen_system_mem_map.xs
index 2777eefa0..67583dab8 100755
--- a/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/ipu2/gen_system_mem_map.xs
+++ b/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/ipu2/gen_system_mem_map.xs
@@ -49,16 +49,16 @@ function GenSystemMemMap()
fd.writeLine("#define _SYSTEM_MEM_MAP_H_");
fd.writeLine("");
fd.writeLine("");
- fd.writeLine("#define SR0_ADDR " + Value2HexString(SR0.base));
+ fd.writeLine("#define SR0_ADDR " + Value2HexString((SR0.base) - 0x20000000));
fd.writeLine("#define SR0_SIZE " + Value2HexString(SR0.len) );
fd.writeLine("");
- fd.writeLine("#define SYSTEM_IPC_SHM_MEM_ADDR " + Value2HexString(SYSTEM_IPC_SHM_MEM.base));
+ fd.writeLine("#define SYSTEM_IPC_SHM_MEM_ADDR " + Value2HexString((SYSTEM_IPC_SHM_MEM.base) - 0x20000000));
fd.writeLine("#define SYSTEM_IPC_SHM_MEM_SIZE " + Value2HexString(SYSTEM_IPC_SHM_MEM.len) );
fd.writeLine("");
fd.writeLine("#define SYSTEM_AUTOSAR_IPC_SHM_MEM_ADDR " + Value2HexString(SYSTEM_AUTOSAR_IPC_SHM_MEM.base));
fd.writeLine("#define SYSTEM_AUTOSAR_IPC_SHM_MEM_SIZE " + Value2HexString(SYSTEM_AUTOSAR_IPC_SHM_MEM.len) );
fd.writeLine("");
- fd.writeLine("#define REMOTE_LOG_MEM_ADDR " + Value2HexString(REMOTE_LOG_MEM.base));
+ fd.writeLine("#define REMOTE_LOG_MEM_ADDR " + Value2HexString((REMOTE_LOG_MEM.base) - 0x20000000));
fd.writeLine("#define REMOTE_LOG_MEM_SIZE " + Value2HexString(REMOTE_LOG_MEM.len) );
fd.writeLine("");
fd.writeLine("#define SR1_FRAME_BUFFER_MEM_ADDR " + Value2HexString(SR1.base));
diff --git a/vision_sdk/links_fw/src/rtos/links_common/system/system_rsc_table_ipu.h b/vision_sdk/links_fw/src/rtos/links_common/system/system_rsc_table_ipu.h
old mode 100644
new mode 100755
index f97437a9d..7605b66a0
--- a/vision_sdk/links_fw/src/rtos/links_common/system/system_rsc_table_ipu.h
+++ b/vision_sdk/links_fw/src/rtos/links_common/system/system_rsc_table_ipu.h
@@ -79,9 +79,9 @@ Limited License.
/* Number of entries in resource table */
#ifdef IPU1_LOAD_EVES
-#define RSC_NUM_ENTRIES 19
+#define RSC_NUM_ENTRIES 20
#else
-#define RSC_NUM_ENTRIES 18
+#define RSC_NUM_ENTRIES 19
#endif
/* IPU Memory Map */
@@ -107,10 +107,13 @@ Limited License.
#define IPU_TILER_MODE_0_1 0xA0000000
#define L3_TILER_MODE_2 0x70000000
-#define IPU_TILER_MODE_2 0xB0000000
+#define IPU_TILER_MODE_2 0xA1000000
#define L3_TILER_MODE_3 0x78000000
-#define IPU_TILER_MODE_3 0xB8000000
+#define IPU_TILER_MODE_3 0xB0000000
+
+#define L3_AMMU_NONCACHED 0x9FB00000
+#define IPU_AMMU_NONCACHED 0xBFB00000
#define IPU_MEM_TEXT 0x0
@@ -126,7 +129,7 @@ Limited License.
#define IPU_MEM_IPC_DATA XDC_CFG_IPC_DATA
#define IPU_NDK_MEM XDC_CFG_NDK_MEM
#define SYSTEM_COMMON_SHM_VIRT XDC_CFG_SYSTEM_COMMON_SHM_VIRT
-#define SYSTEM_COMMON_SHM XDC_CFG_SYSTEM_COMMON_SHM_VIRT
+#define SYSTEM_COMMON_SHM (XDC_CFG_SYSTEM_COMMON_SHM_VIRT - 0x20000000)
#define EVE_MEM_VIRT XDC_CFG_EVE_MEM
#define EVE_MEM XDC_CFG_EVE_MEM
@@ -227,6 +230,8 @@ struct my_resource_table {
/* devmem entry */
struct fw_rsc_devmem devmem13;
+ /* devmem entry */
+ struct fw_rsc_devmem devmem14;
};
extern char ti_trace_SysMin_Module_State_0_outbuf__A;
@@ -262,6 +267,7 @@ struct my_resource_table ti_ipc_remoteproc_ResourceTable = {
offsetof(struct my_resource_table, devmem12),
#endif
offsetof(struct my_resource_table, devmem13),
+ offsetof(struct my_resource_table, devmem14),
},
/* rpmsg vdev entry */
@@ -380,6 +386,13 @@ struct my_resource_table ti_ipc_remoteproc_ResourceTable = {
SR2_VIRT, SR2_PHYS,
SR2_SIZE, 0, 0, "SR2_MEM",
},
+
+ {
+ TYPE_DEVMEM,
+ IPU_AMMU_NONCACHED, L3_AMMU_NONCACHED,
+ 0x500000, 0, 0, "IPU_AMMU_NONCACHED",
+ },
+
};
#endif /* _RSC_TABLE_IPU_H_ */
diff --git a/vision_sdk/links_fw/src/rtos/links_ipu/system/system_bsp_init.c b/vision_sdk/links_fw/src/rtos/links_ipu/system/system_bsp_init.c
old mode 100644
new mode 100755
index 55eb2b8e2..326de2a55
--- a/vision_sdk/links_fw/src/rtos/links_ipu/system/system_bsp_init.c
+++ b/vision_sdk/links_fw/src/rtos/links_ipu/system/system_bsp_init.c
@@ -288,9 +288,11 @@ Int32 System_bspInit(void)
#ifdef DDR_MEM_1024M
/* This one to one mapping is required for the 1GB builds */
- vpsInitPrms.virtBaseAddr = 0x80000000U;
+ vpsInitPrms.virtBaseAddr = 0xA0000000U;
vpsInitPrms.physBaseAddr = 0x80000000U;
vpsInitPrms.isAddrTransReq = FALSE;
+ /* if Virtual address != Physical address then enable translation */
+ vpsInitPrms.isAddrTransReq = TRUE;
#else
vpsInitPrms.virtBaseAddr = 0xA0000000U;
vpsInitPrms.physBaseAddr = 0x80000000U;
Hi Terry, Yes I meant that you first try 512 MB configuration on the EVM. Regards, Rishabh
Hi Rishabh, I have uploaded the files I changed last reply. Have it any error ? Any else files should to modify ? The SD card (images for 512MB ram) test on the EVM can't boot linux. Can you help to debug ? Attached logs on evm. 3157.boot.log U-Boot SPL 2016.05 (Sep 19 2019 - 10:59:33)
DRA752-GP ES1.1
no pinctrl for ddr_1_8v
Card did not respond to voltage select!
*** Warning - MMC init failed, using default environment
Trying to boot from MMC1
reading dra7-ipu2-fw.lzop
spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1
spl: error reading image dra7-ipu2-fw.lzop, err - -1
Error loading remotecore IPU2!,Continuing with boot ...
reading dra7-dsp1-fw.lzop
spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1
spl: error reading image dra7-dsp1-fw.lzop, err - -1
Error loading remotecore DSP1!,Continuing with boot ...
reading dra7-dsp2-fw.lzop
spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1
spl: error reading image dra7-dsp2-fw.lzop, err - -1
Error loading remotecore DSP2!,Continuing with boot ...
reading dra7-ipu1-fw.lzop
spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1
spl: error reading image dra7-ipu1-fw.lzop, err - -1
Error loading remotecore IPU1!,Continuing with boot ...
spl: falcon_args_file not set in environment, falling back to default
reading single-stage-boot.dtb
spl_load_image_fat_os: error reading image single-stage-boot.dtb, err - -1
reading u-boot.img
reading u-boot.img
reading u-boot.img
reading u-boot.img
U-Boot 2016.05 (Sep 19 2019 - 10:59:33 +0800)
CPU : DRA752-GP ES1.1
Model: TI DRA742
Board: DRA74x EVM REV G.0
DRAM: 1.5 GiB
MMC: mmc@4809c000: fail to find hs-rev11 mode FDT_ERR_NOTFOUND
mmc@4809c000: fail to find sdr25-rev11 mode FDT_ERR_NOTFOUND
mmc@4809c000: fail to find sdr12-rev11 mode FDT_ERR_NOTFOUND
mmc@480b4000: fail to find hs-rev11 mode FDT_ERR_NOTFOUND
OMAP SD/MMC: 0, OMAP SD/MMC: 1
** First descriptor is NOT a primary desc on 1:1 **
*** Warning - bad CRC, using default environment
GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645
part_get_info_efi: *** ERROR: Invalid GPT ***
GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645
part_get_info_efi: *** ERROR: Invalid Backup GPT ***
ERROR: cannot find partition: 'userdata'
at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size()
Warning: fastboot.userdata_size: unable to calc
SCSI: SATA link 0 timeout.
AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode
flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst
scanning bus for devices...
Found 0 device(s).
Net:
Warning: ethernet@48484000 using MAC address from ROM
eth0: ethernet@48484000
Hit any key to stop autoboot: 0
## Error: "board_findfdt" not defined
switch to partitions #0, OK
mmc0 is current device
SD/MMC found on device 0
reading boot.scr
** Unable to read file boot.scr **
reading uEnv.txt
172 bytes read in 3 ms (55.7 KiB/s)
Loaded env from uEnv.txt
Importing environment from mmc0 ...
switch to partitions #0, OK
mmc0 is current device
SD/MMC found on device 0
** File not found /boot/zImage **
** First descriptor is NOT a primary desc on 1:1 **
switch to partitions #0, OK
mmc1(part 0) is current device
** First descriptor is NOT a primary desc on 1:1 **
mmc - MMC sub system
Usage:
mmc info - display info of the current MMC device
mmc read addr blk# cnt
mmc write addr blk# cnt
mmc erase blk# cnt
mmc rescan
mmc part - lists available partition on current mmc device
mmc dev [dev] [part] - show or set current mmc device [partition]
mmc list - lists available devices
mmc hwpartition [args...] - does hardware partitioning
arguments (sizes in 512-byte blocks):
[user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes
[gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition
[check|set|complete] - mode, complete set partitioning completed
WARNING: Partitioning is a write-once setting once it is set to complete.
Power cycling is required to initialize partitions after set to complete.
mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode
- Set the BOOT_BUS_WIDTH field of the specified device
mmc bootpart-resize <dev> <boot part size MB> <RPMB part size MB>
- Change sizes of boot and RPMB partitions of specified device
mmc partconf dev boot_ack boot_partition partition_access
- Change the bits of the PARTITION_CONFIG field of the specified device
mmc rst-function dev value
- Change the RST_n_FUNCTION field of the specified device
WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values.
mmc setdsr <value> - set DSR register value
mmc - MMC sub system
Usage:
mmc info - display info of the current MMC device
mmc read addr blk# cnt
mmc write addr blk# cnt
mmc erase blk# cnt
mmc rescan
mmc part - lists available partition on current mmc device
mmc dev [dev] [part] - show or set current mmc device [partition]
mmc list - lists available devices
mmc hwpartition [args...] - does hardware partitioning
arguments (sizes in 512-byte blocks):
[user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes
[gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition
[check|set|complete] - mode, complete set partitioning completed
WARNING: Partitioning is a write-once setting once it is set to complete.
Power cycling is required to initialize partitions after set to complete.
mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode
- Set the BOOT_BUS_WIDTH field of the specified device
mmc bootpart-resize <dev> <boot part size MB> <RPMB part size MB>
- Change sizes of boot and RPMB partitions of specified device
mmc partconf dev boot_ack boot_partition partition_access
- Change the bits of the PARTITION_CONFIG field of the specified device
mmc rst-function dev value
- Change the RST_n_FUNCTION field of the specified device
WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values.
mmc setdsr <value> - set DSR register value
Booting from eMMC ...
Wrong Image Format for bootm command
ERROR: can't get kernel image!
=>
Thank you. Terry
Hi Terry, Changes look fine at a glance, I will ask Linux expert to further review the code. Meanwhile can you look at below thread: https://e2e.ti.com/support/processors/f/791/p/812928/3014857 Regards, Rishabh
From the log it looks like basic board detect is not implemented in the u-boot. Did you port the u-boot for your custom board? I recommend you to start with a working version of kernel and u-boot running standalone before you integrate with RTOS. You will have to do baseport changes to kernel and u-boot for that. Regards, Nikhil D
Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh
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