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Ticket Name: TDA4VM: How to control DL pre proc kernel to switch different channels for processing? Only one specified channel is processed at a time.

Query Text:
Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Dear exprets, My graph now accepts four camera inputs, but when doing deep learning processing, I want it to only process one selected channel. I know that the display kernel can select different channels for display. So I wonder if DL pre proc kernel can also select a certain channel for processing? Regards, Xin

Responses:
Hi, Could you please elaborate more on exact use case you are looking for ? What do you mean by xiu xin said: I want it to only process one selected channel

Hi Pratik, My graph now has four cameras, which means four channels of input, but I only want the DL pre proc kernel to receive one channel as input, and I can choose one of the four channels as input. Regards, Xin

Hi Xin, With four cameras as input, the input to the node would be an object array out of which you would be sending the first element into the node right? May I know why are you opting for doing it one at a time rather than using vxReplicateNode and processing all the 4 images? Regards, Nikhil

Hi Nikhil, Yes, just use the vxReplicateNode to process four data at the same time, which I saw in the demo and have practiced, but in the actual application, I only need to process the deep learning of two camera inputs, and do not need to process the two inputs at the same time. I just need to send a control command to switch these two inputs and select one of them. Moreover, the c7x kernel is very occupied by the DL node, and the four channels at the same time achieve 99% occupancy. I also need to run other nodes, so performance is a consideration. Regards, Xin

Hi Xin, Understood. The channel switch is not readily available in the SDK, however you could modify the target implementation of the node to achieve the same. You could refer the display node implementation for the control command "TIVX_DISPLAY_SELECT_CHANNEL" and do the same implementation for the DL preproc node. I see that there is no control function in the dl pre proc node. You could add the control function in the tivxAddTargetKernelDLPreProc() in vision_apps/kernels/img_proc/c66/vx_dl_pre_proc_target.c After this, you could use this control command API and then follow the implementation of the display node. Regards, Nikhil

Hi Nikhil, Yes, I'm doing that, but I'm not sure if porting this functionality to DL preproc node will work correctly or achieve the same functionality. I've had a few issues along the way. For example, the display node uses the TIVX_DISPLAY_SELECT_CHANNEL macro when sending control commands, which is defined as follows: #define TIVX_DISPLAY_SELECT_CHANNEL (0x30000000u), I don't understand (0x30000000u) how this value is set, suppose I define a similar macro in DL preproc node, How should the value after the macro be set? Regards, Xin

Hi Xin, This is just a unique number assigned as enum to identify this control command in the switch case inside the control function. You could use the same 0x30000000u or use your own unique ENUM value. Regards, Nikhil

Hi Nikhil, I added the switch channel function mimicking display node, but it failed when sending command control, causing the program to exit. Are you sure you can port this function? Regards, Xin

Hi Xin, Could you please let me know your changes on the target side of this node? Did the call reach the control function? Regards, Nikhil

Hi Nikhil, These are the changes I made to three files, named main.c; kernels/img_proc/c66/vx_dl_pre_proc_target.c ; kernels/img_proc/include/TI/tivx_img_proc_kernels.h Regards, Xin 2158.main.c.txt +    //init 
+    obj->channel_params.active_channel_id = 2;
+    obj->switch_preproc_ch_obj = vxCreateUserDataObject(obj->context, "tivx_preproc_select_channel_params_t", sizeof(tivx_preproc_select_channel_params_t),&obj->channel_params); 
+    status = vxGetStatus((vx_reference)obj->switch_preproc_ch_obj);



+static vx_status SendCmdtoPreProc(AppObj *obj,PreProcObj *preProcObj)
+{
+    
+    if(obj->switch_preproc_ch_obj == NULL)
+        {
+            vx_status status = VX_FAILURE;
+            return status;
+        }
+    
+    
+    vx_reference refs[1];
+    vx_status status = VX_FAILURE;
+
+    obj->channel_params.active_channel_id = (obj->channel_params.active_channel_id + 1) % NUM_CAPT_CHANNELS_TOTAL;
+    APP_PRINTF("active_channel_id:%d\n",obj->channel_params.active_channel_id);
+    vxCopyUserDataObject(obj->switch_preproc_ch_obj, 0,
+                    sizeof(tivx_preproc_select_channel_params_t),
+                    &obj->channel_params, VX_WRITE_ONLY, VX_MEMORY_TYPE_HOST);
+    refs[0] = (vx_reference) obj->switch_preproc_ch_obj;
+    status = tivxNodeSendCommand(preProcObj->node, 0u, TIVX_PREPROC_SELECT_CHANNEL, refs, 1u);
+    APP_PRINTF("App Send Preproc Command Done!\n");
+
+    if(status != VX_SUCCESS)
+    {
+        APP_PRINTF("PreProc: Node send command failed!\n");
+    }
+
+    return status;
+}
+




+            if(status == VX_SUCCESS )
+            {
+                status = SendCmdtoPreProc(obj,&obj->preProcObj);
+            }


 2158.vx_dl_pre_proc_target.c.txt diff --git a/kernels/img_proc/c66/vx_dl_pre_proc_target.c b/kernels/img_proc/c66/vx_dl_pre_proc_target.c
index 9b9b892..4e64d79 100644
--- a/kernels/img_proc/c66/vx_dl_pre_proc_target.c
+++ b/kernels/img_proc/c66/vx_dl_pre_proc_target.c
@@ -111,8 +111,16 @@ typedef struct {
     uint64_t l2_global_base;
     uint32_t alloc_size;
 
+    /**< Id of active channel,duwei add*/
+    uint32_t active_channel;
+
 } tivxDLPreProcKernelParams;
 
+static vx_status VX_CALLBACK tivxKernelDLPreProcControl(
+       tivx_target_kernel_instance kernel,
+       uint32_t node_cmd_id, tivx_obj_desc_t *obj_desc[],
+       uint16_t num_params, void *priv_arg);
+
 static tivx_target_kernel vx_dl_pre_proc_target_kernel = NULL;
 
 static vx_status VX_CALLBACK tivxKernelDLPreProcCreate
@@ -485,6 +493,96 @@ static vx_status VX_CALLBACK tivxKernelDLPreProcDelete(
     return (status);
 }
 
+
+static vx_status tivxPreProcSwitchChannel(tivxDLPreProcKernelParams *preproc,
+    const tivx_obj_desc_user_data_object_t *usr_data_obj)
+{
+    vx_status                             status = (vx_status)VX_SUCCESS;
+    tivx_preproc_select_channel_params_t *ch_prms = NULL;
+    void                                 *target_ptr;
+
+    if (NULL != usr_data_obj)
+    {
+        target_ptr = tivxMemShared2TargetPtr(&usr_data_obj->mem_ptr);
+
+        tivxCheckStatus(&status, tivxMemBufferMap(target_ptr, usr_data_obj->mem_size,
+            (vx_enum)VX_MEMORY_TYPE_HOST, (vx_enum)VX_READ_ONLY));
+
+        if (sizeof(tivx_preproc_select_channel_params_t) ==
+                usr_data_obj->mem_size)
+        {
+            ch_prms = (tivx_preproc_select_channel_params_t *)target_ptr;
+            preproc->active_channel = ch_prms->active_channel_id;
+        }
+        else
+        {
+            VX_PRINT(VX_ZONE_ERROR, "Invalid Size \n");
+            status = (vx_status)VX_ERROR_INVALID_PARAMETERS;
+        }
+
+        tivxCheckStatus(&status, tivxMemBufferUnmap(target_ptr, usr_data_obj->mem_size,
+            (vx_enum)VX_MEMORY_TYPE_HOST, (vx_enum)VX_READ_ONLY));
+    }
+    else
+    {
+        VX_PRINT(VX_ZONE_ERROR, "User Data Object is NULL \n");
+        status = (vx_status)VX_ERROR_INVALID_PARAMETERS;
+    }
+
+    return (status);
+}
+
+static vx_status VX_CALLBACK tivxKernelDLPreProcControl(
+       tivx_target_kernel_instance kernel,
+       uint32_t node_cmd_id, tivx_obj_desc_t *obj_desc[],
+       uint16_t num_params, void *priv_arg)
+{
+    vx_status            status = (vx_status)VX_SUCCESS;
+    uint32_t             size;
+    tivxDLPreProcKernelParams   *preproc = NULL;
+
+    status = tivxGetTargetKernelInstanceContext(kernel,
+        (void **)&preproc, &size);
+
+    if ((vx_status)VX_SUCCESS != status)
+    {
+        VX_PRINT(VX_ZONE_ERROR, "Failed to Get Target Kernel Instance Context\n");
+    }
+    else if ((NULL == preproc) ||
+        (sizeof(tivxDLPreProcKernelParams) != size))
+    {
+        VX_PRINT(VX_ZONE_ERROR, "Invalid Object Size\n");
+        status = (vx_status)VX_FAILURE;
+    }
+    else
+    {
+        /* do nothing */
+    }
+
+    if ((vx_status)VX_SUCCESS == status)
+    {
+        switch (node_cmd_id)
+        {
+            case TIVX_PREPROC_SELECT_CHANNEL:
+            {
+                status = tivxPreProcSwitchChannel(preproc,
+                    (tivx_obj_desc_user_data_object_t *)obj_desc[0U]);
+                break;
+            }
+            default:
+            {
+                VX_PRINT(VX_ZONE_ERROR, "Invalid Command Id\n");
+                status = (vx_status)VX_FAILURE;
+                break;
+            }
+        }
+    }
+
+    return (status);
+}
+
+
 static inline void convertYCbCrToRGB(int32_t Y, int32_t Cb, int32_t Cr, float *R, float *G, float *B, float min_val, float max_val)
 {
     Y  = Y - 16;
@@ -2390,7 +2488,7 @@ void tivxAddTargetKernelDLPreProc()
                                             tivxKernelDLPreProcProcess,
                                             tivxKernelDLPreProcCreate,
                                             tivxKernelDLPreProcDelete,
-                                            NULL,
+                                            tivxKernelDLPreProcControl,
                                             NULL
                                         );
     }
(END) 2158.tivx_img_proc_kernels.h.txt diff --git a/kernels/img_proc/include/TI/tivx_img_proc_kernels.h b/kernels/img_proc/include/TI/tivx_img_proc_kernels.h
index 2b4f206..3ed4ef8 100644
--- a/kernels/img_proc/include/TI/tivx_img_proc_kernels.h
+++ b/kernels/img_proc/include/TI/tivx_img_proc_kernels.h
@@ -227,6 +227,15 @@ extern "C" {
 #define TIVX_DL_COLOR_BLEND_MAX_CLASSES    (256U)
 #define TIVX_DL_COLOR_BLEND_MAX_COLORS     (3U)
 
+#define TIVX_PREPROC_SELECT_CHANNEL         (0x11100000u)
+
+typedef struct
+{
+    /*! Id of the active channel to be displayed */
+    uint32_t                   active_channel_id;
+} tivx_preproc_select_channel_params_t;
+
 /*!
  * \brief
  * \ingroup group_vision_apps_kernels_img_proc

Hi, The implementation looks correct. May I know the error that you are facing? Nikhil Dasan said: Did the call reach the control function? Also are calling the node send command after vxVerifyGraph()? Regards, Nikhil

Hi Nikhil, I don't know how to verify this(Did the call reach the control function?),But I call the node send command after vxVerifyGraph(). Regards, Xin

Hi Xin, You could verify with logs. Could you let me know what is the error that you are getting? You could add some logs in the newly added control function and check if it is printing on the console. Did you make the change in the process function too? i.e. based on this active channel, you would extract the image from the object array. (refer display node process function for the same) Regards, Nikhil

Hi Nikhil, The following is the error message encountered, I added some print in the contral function, but it doesn't seem to print out, I didn't modify the process function, I don't quite understand what the display process function does, what else does it need in the display process function? Regards, Xin log (2).txt REMOTE_SERVICE: Init ... Done !!!
APP: Init ... Done !!!
captureObj init done!
displayM2MObj init done!
app_init_scaler done!
OK to open file! /opt/vision_apps/test_data/psdkra/tidl_models/tidl_io_peele_300_1.bin
OK to open file! /opt/vision_apps/test_data/psdkra/tidl_models/tidl_net_peele_300.bin
Computing checksum at 0x0000FFFFA22D0FC0, size = 6853104
createOutputTensors: ioBufDesc->numOutputBuf=1
createOutputTensors: id = 0, input_width = 1024, input_height= 512
createOutputTensors: id = 0, output_width = W(1405) + L(0) + R(0)
createOutputTensors: id = 0, output_height = H(1) + T(0) + B(0)
createOutputTensors: id = 0, output_channels = outNumChannels(1)
app_init_tidl done!
OD Pre Proc Update Done!
OD Pre Proc init done!
Draw detections Update Done!
width=960, height=540, num_ch=4
Draw Detections Init Done!
app_init_display done!
is_enable_gui = 1
graph Set Reference Name  Success !!
Capture graph done !
DisplayM2M graph done !
replicate[0] = 1
scaler replicate[1] = 1, Scalre: W(960), H(540)
scaler replicate[2] = 1, Scalre: W(960), H(540)
scaler replicate[3] = 1, Scalre: W(1280), H(960)
scaler replicate[4] = 1, Scalre: W(1280), H(960)
scaler replicate[5] = 0, Scalre: W(1280), H(960)
Scaler graph done !
PreProcObj graph done!
odTIDLObj graph done!
drawDetectionsObj graph done!
Display graph done !
set node parameter done...
vx verify graph done...
App Send Scaler Command Done!
Export Graph To Dot Done...
vxSetGraphScheduleConfig done
app_create_graph exiting
success to start remote service!!!
    11.089220 s: CIO: Init ... Done !!!
    11.089292 s: ### CPU Frequency = 1000000000 Hz
    11.089334 s: CPU is running FreeRTOS
    11.089362 s: APP: Init ... !!!
    11.089386 s: SCICLIENT: Init ... !!!
    11.089651 s: SCICLIENT: DMSC FW version [8.5.2--v08.05.02 (Chill Capybar]
    11.089703 s: SCICLIENT: DMSC FW revision 0x8
    11.089736 s: SCICLIENT: DMSC FW ABI revision 3.1
    11.089771 s: SCICLIENT: Init ... Done !!!
    11.089797 s: UDMA: Init ... !!!
    11.091234 s: UDMA: Init ... Done !!!
    11.091297 s: MEM: Init ... !!!
    11.091342 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ db000000 of size 16777216 bytes !!!
    11.091419 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 3600000 of size 262144 bytes !!!
    11.091483 s: MEM: Init ... Done !!!
    11.091509 s: IPC: Init ... !!!
    11.091570 s: IPC: 6 CPUs participating in IPC !!!
    11.091618 s: IPC: Waiting for HLOS to be ready ... !!!
    11.091669 s: IPC: HLOS is ready !!!
    11.106884 s: IPC: Init ... Done !!!
    11.106951 s: APP: Syncing with 5 CPUs ... !!!
    11.963519 s: APP: Syncing with 5 CPUs ... Done !!!
    11.963704 s: REMOTE_SERVICE: Init ... !!!
    11.965377 s: REMOTE_SERVICE: Init ... Done !!!
    11.965441 s: FVID2: Init ... !!!
    11.965517 s: FVID2: Init ... Done !!!
    11.965577 s: DSS: Init ... !!!
    11.965608 s: DSS: Display type is HDMI !!!
    11.965649 s: DSS: M2M Path is enabled !!!
    11.965679 s: DSS: SoC init ... !!!
    11.965705 s: SCICLIENT: Sciclient_pmSetModuleState module=152 state=2
    11.965942 s: SCICLIENT: Sciclient_pmSetModuleState success
    11.965982 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=4 parent=6
    11.966136 s: SCICLIENT: Sciclient_pmSetModuleClkParent success
    11.966177 s: SCICLIENT: Sciclient_pmSetModuleClkFreq module=152 clk=4 freq=61875000
    11.968170 s: SCICLIENT: Sciclient_pmSetModuleClkFreq success
    11.968209 s: SCICLIENT: Sciclient_pmModuleClkRequest module=152 clk=4 state=2 flag=0
    11.968812 s: SCICLIENT: Sciclient_pmModuleClkRequest success
    11.968849 s: DSS: SoC init ... Done !!!
    11.968877 s: DSS: Board init ... !!!
    11.973652 s: DSS: Board init ... Done !!!
    11.976703 s: DSS: Init ... Done !!!
    11.976768 s: VHWA: VPAC Init ... !!!
    11.976798 s: SCICLIENT: Sciclient_pmSetModuleState module=290 state=2
    11.977110 s: SCICLIENT: Sciclient_pmSetModuleState success
    11.977150 s: VHWA: LDC Init ... !!!
    11.981945 s: VHWA: LDC Init ... Done !!!
    11.982007 s: VHWA: MSC Init ... !!!
    11.994348 s: VHWA: MSC Init ... Done !!!
    11.994413 s: VHWA: NF Init ... !!!
    11.996204 s: VHWA: NF Init ... Done !!!
    11.996260 s: VHWA: VISS Init ... !!!
    12.007223 s: VHWA: VISS Init ... Done !!!
    12.007287 s: VHWA: VPAC Init ... Done !!!
    12.007336 s:  VX_ZONE_INIT:Enabled
    12.007366 s:  VX_ZONE_ERROR:Enabled
    12.007393 s:  VX_ZONE_WARNING:Enabled
    12.008581 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-0
    12.008847 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_NF
    12.009081 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_LDC1
    12.009317 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC1
    12.009537 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC2
    12.009840 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_VISS1
    12.010114 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE1
    12.010385 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE2
    12.010661 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY1
    12.010914 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY2
    12.011150 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CSITX
    12.011412 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE3
    12.011678 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE4
    12.011960 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE5
    12.012228 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE6
    12.012489 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE7
    12.012773 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE8
    12.013041 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M1
    12.013287 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M2
    12.013531 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M3
    12.013785 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M4
    12.013844 s:  VX_ZONE_INIT:[tivxInitLocal:145] Initialization Done !!!
    12.013882 s: APP: OpenVX Target kernel init ... !!!
    12.036380 s: APP: OpenVX Target kernel init ... Done !!!
    12.036440 s: CSI2RX: Init ... !!!
    12.036468 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=2
    12.036611 s: SCICLIENT: Sciclient_pmSetModuleState success
    12.036660 s: SCICLIENT: Sciclient_pmSetModuleState module=26 state=2
    12.036838 s: SCICLIENT: Sciclient_pmSetModuleState success
    12.036871 s: SCICLIENT: Sciclient_pmSetModuleState module=27 state=2
    12.037026 s: SCICLIENT: Sciclient_pmSetModuleState success
    12.037058 s: SCICLIENT: Sciclient_pmSetModuleState module=147 state=2
    12.037166 s: SCICLIENT: Sciclient_pmSetModuleState success
    12.037197 s: SCICLIENT: Sciclient_pmSetModuleState module=148 state=2
    12.037304 s: SCICLIENT: Sciclient_pmSetModuleState success
    12.037507 s: CSI2RX: Init ... Done !!!
    12.037546 s: CSI2TX: Init ... !!!
    12.037570 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=2
    12.037676 s: SCICLIENT: Sciclient_pmSetModuleState success
    12.037711 s: SCICLIENT: Sciclient_pmSetModuleState module=28 state=2
    12.037869 s: SCICLIENT: Sciclient_pmSetModuleState success
    12.037901 s: SCICLIENT: Sciclient_pmSetModuleState module=296 state=2
    12.038036 s: SCICLIENT: Sciclient_pmSetModuleState success
    12.038111 s: CSI2TX: Init ... Done !!!
    12.038144 s: ISS: Init ... !!!
    12.038182 s: IssSensor_Init ... Done !!!
    12.038246 s: IttRemoteServer_Init ... Done !!!
    12.038282 s: VISS REMOTE SERVICE: Init ... !!!
    12.038344 s: VISS REMOTE SERVICE: Init ... Done !!!
    12.038380 s: UDMA Copy: Init ... !!!
    12.040242 s: UDMA Copy: Init ... Done !!!
    12.040341 s: APP: Init ... Done !!!
    12.040378 s: APP: Run ... !!!
    12.040403 s: IPC: Starting echo test ...
    12.043319 s: APP: Run ... Done !!!
    12.044890 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[.] C66X_2[.] C7X_1[.]
    12.045014 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[.] C7X_1[.]
    12.045111 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[.]
    12.045206 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[P]
    11.193050 s: CIO: Init ... Done !!!
    11.193118 s: ### CPU Frequency = 1000000000 Hz
    11.193159 s: CPU is running FreeRTOS
    11.193185 s: APP: Init ... !!!
    11.193208 s: SCICLIENT: Init ... !!!
    11.193470 s: SCICLIENT: DMSC FW version [8.5.2--v08.05.02 (Chill Capybar]
    11.193519 s: SCICLIENT: DMSC FW revision 0x8
    11.193553 s: SCICLIENT: DMSC FW ABI revision 3.1
    11.193605 s: SCICLIENT: Init ... Done !!!
    11.193634 s: UDMA: Init ... !!!
    11.195189 s: UDMA: Init ... Done !!!
    11.195250 s: MEM: Init ... !!!
    11.195292 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ dc000000 of size 16777216 bytes !!!
    11.195365 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 3640000 of size 262144 bytes !!!
    11.195425 s: MEM: Init ... Done !!!
    11.195451 s: IPC: Init ... !!!
    11.195512 s: IPC: 6 CPUs participating in IPC !!!
    11.195561 s: IPC: Waiting for HLOS to be ready ... !!!
    11.195615 s: IPC: HLOS is ready !!!
    11.210798 s: IPC: Init ... Done !!!
    11.210862 s: APP: Syncing with 5 CPUs ... !!!
    11.963517 s: APP: Syncing with 5 CPUs ... Done !!!
    11.963709 s: REMOTE_SERVICE: Init ... !!!
    11.965274 s: REMOTE_SERVICE: Init ... Done !!!
    11.965337 s: FVID2: Init ... !!!
    11.965407 s: FVID2: Init ... Done !!!
    11.965440 s: VHWA: DMPAC: Init ... !!!
    11.965466 s: SCICLIENT: Sciclient_pmSetModuleState module=48 state=2
    11.965691 s: SCICLIENT: Sciclient_pmSetModuleState success
    11.965734 s: SCICLIENT: Sciclient_pmSetModuleState module=305 state=2
    11.966040 s: SCICLIENT: Sciclient_pmSetModuleState success
    11.966076 s: VHWA: DOF Init ... !!!
    11.976997 s: VHWA: DOF Init ... Done !!!
    11.977064 s: VHWA: SDE Init ... !!!
    11.981002 s: VHWA: SDE Init ... Done !!!
    11.981062 s: VHWA: DMPAC: Init ... Done !!!
    11.981106 s:  VX_ZONE_INIT:Enabled
    11.981135 s:  VX_ZONE_ERROR:Enabled
    11.981161 s:  VX_ZONE_WARNING:Enabled
    11.982352 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-1
    11.982600 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_SDE
    11.982829 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_DOF
    11.982886 s:  VX_ZONE_INIT:[tivxInitLocal:145] Initialization Done !!!
    11.982924 s: APP: OpenVX Target kernel init ... !!!
    11.983200 s: APP: OpenVX Target kernel init ... Done !!!
    11.983241 s: UDMA Copy: Init ... !!!
    11.985280 s: UDMA Copy: Init ... Done !!!
    11.985347 s: APP: Init ... Done !!!
    11.985379 s: APP: Run ... !!!
    11.985405 s: IPC: Starting echo test ...
    11.987959 s: APP: Run ... Done !!!
    11.989197 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[.] C7X_1[.]
    11.989310 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[.]
    11.989403 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[P]
    12.044137 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[P]
    10.989483 s: CIO: Init ... Done !!!
    10.989508 s: ### CPU Frequency = 1350000000 Hz
    10.989519 s: CPU is running FreeRTOS
    10.989527 s: APP: Init ... !!!
    10.989534 s: SCICLIENT: Init ... !!!
    10.989762 s: SCICLIENT: DMSC FW version [8.5.2--v08.05.02 (Chill Capybar]
    10.989774 s: SCICLIENT: DMSC FW revision 0x8
    10.989783 s: SCICLIENT: DMSC FW ABI revision 3.1
    10.989793 s: SCICLIENT: Init ... Done !!!
    10.989802 s: UDMA: Init ... !!!
    10.991443 s: UDMA: Init ... Done !!!
    10.991462 s: MEM: Init ... !!!
    10.991476 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ de000000 of size 16777216 bytes !!!
    10.991494 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 800000 of size 229376 bytes !!!
    10.991509 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ df000000 of size 50331648 bytes !!!
    10.991525 s: MEM: Init ... Done !!!
    10.991534 s: IPC: Init ... !!!
    10.991556 s: IPC: 6 CPUs participating in IPC !!!
    10.991571 s: IPC: Waiting for HLOS to be ready ... !!!
    10.991584 s: IPC: HLOS is ready !!!
    10.995336 s: IPC: Init ... Done !!!
    10.995360 s: APP: Syncing with 5 CPUs ... !!!
    11.963516 s: APP: Syncing with 5 CPUs ... Done !!!
    11.963529 s: REMOTE_SERVICE: Init ... !!!
    11.964187 s: REMOTE_SERVICE: Init ... Done !!!
    11.964223 s:  VX_ZONE_INIT:Enabled
    11.964236 s:  VX_ZONE_ERROR:Enabled
    11.964250 s:  VX_ZONE_WARNING:Enabled
    11.967545 s:  VX_ZONE_INIT:[tivxInitLocal:145] Initialization Done !!!
    11.967560 s: APP: OpenVX Target kernel init ... !!!
    11.967877 s: APP: OpenVX Target kernel init ... Done !!!
    11.967891 s: UDMA Copy: Init ... !!!
    11.971873 s: UDMA Copy: Init ... Done !!!
    11.971892 s: APP: Init ... Done !!!
    11.971901 s: APP: Run ... !!!
    11.971910 s: IPC: Starting echo test ...
    11.972997 s: APP: Run ... Done !!!
    11.973378 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[s] C66X_2[.] C7X_1[P]
    11.973634 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[s] C66X_2[P] C7X_1[P]
    11.988523 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[s] C66X_2[P] C7X_1[P]
    12.043991 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[s] C66X_2[P] C7X_1[P]
    11.401160 s: CIO: Init ... Done !!!
    11.401195 s: ### CPU Frequency = 1350000000 Hz
    11.401208 s: CPU is running FreeRTOS
    11.401217 s: APP: Init ... !!!
    11.401226 s: SCICLIENT: Init ... !!!
    11.401466 s: SCICLIENT: DMSC FW version [8.5.2--v08.05.02 (Chill Capybar]
    11.401480 s: SCICLIENT: DMSC FW revision 0x8
    11.401491 s: SCICLIENT: DMSC FW ABI revision 3.1
    11.401503 s: SCICLIENT: Init ... Done !!!
    11.401512 s: UDMA: Init ... !!!
    11.403385 s: UDMA: Init ... Done !!!
    11.403411 s: MEM: Init ... !!!
    11.403430 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ e2000000 of size 16777216 bytes !!!
    11.403451 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 800000 of size 229376 bytes !!!
    11.403470 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ e3000000 of size 50331648 bytes !!!
    11.403487 s: MEM: Init ... Done !!!
    11.403497 s: IPC: Init ... !!!
    11.403523 s: IPC: 6 CPUs participating in IPC !!!
    11.403539 s: IPC: Waiting for HLOS to be ready ... !!!
    11.403551 s: IPC: HLOS is ready !!!
    11.408221 s: IPC: Init ... Done !!!
    11.408249 s: APP: Syncing with 5 CPUs ... !!!
    11.963516 s: APP: Syncing with 5 CPUs ... Done !!!
    11.963529 s: REMOTE_SERVICE: Init ... !!!
    11.964208 s: REMOTE_SERVICE: Init ... Done !!!
    11.964245 s:  VX_ZONE_INIT:Enabled
    11.964256 s:  VX_ZONE_ERROR:Enabled
    11.964265 s:  VX_ZONE_WARNING:Enabled
    11.967556 s:  VX_ZONE_INIT:[tivxInitLocal:145] Initialization Done !!!
    11.967571 s: APP: OpenVX Target kernel init ... !!!
    11.967896 s: APP: OpenVX Target kernel init ... Done !!!
    11.967912 s: UDMA Copy: Init ... !!!
    11.972037 s: UDMA Copy: Init ... Done !!!
    11.972057 s: APP: Init ... Done !!!
    11.972066 s: APP: Run ... !!!
    11.972076 s: IPC: Starting echo test ...
    11.973251 s: APP: Run ... Done !!!
    11.973572 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[s] C7X_1[.]
    11.973630 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[s] C7X_1[P]
    11.988550 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[s] C7X_1[P]
    12.044017 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[P] C66X_2[s] C7X_1[P]
    11.959732 s: CIO: Init ... Done !!!
    11.959747 s: ### CPU Frequency = 1000000000 Hz
    11.959758 s: CPU is running FreeRTOS
    11.959766 s: APP: Init ... !!!
    11.959773 s: SCICLIENT: Init ... !!!
    11.960004 s: SCICLIENT: DMSC FW version [8.5.2--v08.05.02 (Chill Capybar]
    11.960017 s: SCICLIENT: DMSC FW revision 0x8
    11.960027 s: SCICLIENT: DMSC FW ABI revision 3.1
    11.960038 s: SCICLIENT: Init ... Done !!!
    11.960047 s: UDMA: Init ... !!!
    11.961297 s: UDMA: Init ... Done !!!
    11.961309 s: MEM: Init ... !!!
    11.961320 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ 117000000 of size 268435456 bytes !!!
    11.961340 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 70020000 of size 8159232 bytes !!!
    11.961358 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 64800000 of size 458752 bytes !!!
    11.961375 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 64e00000 of size 16384 bytes !!!
    11.961392 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ 100000000 of size 385875968 bytes !!!
    11.961411 s: MEM: Init ... Done !!!
    11.961419 s: IPC: Init ... !!!
    11.961433 s: IPC: 6 CPUs participating in IPC !!!
    11.961448 s: IPC: Waiting for HLOS to be ready ... !!!
    11.961459 s: IPC: HLOS is ready !!!
    11.963490 s: IPC: Init ... Done !!!
    11.963503 s: APP: Syncing with 5 CPUs ... !!!
    11.963517 s: APP: Syncing with 5 CPUs ... Done !!!
    11.963528 s: REMOTE_SERVICE: Init ... !!!
    11.963679 s: REMOTE_SERVICE: Init ... Done !!!
    11.963701 s:  VX_ZONE_INIT:Enabled
    11.963712 s:  VX_ZONE_ERROR:Enabled
    11.963722 s:  VX_ZONE_WARNING:Enabled
    11.963861 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1
    11.963957 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_2
    11.964020 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_3
    11.964125 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_4
    11.964190 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_5
    11.964254 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_6
    11.964365 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_7
    11.964432 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_8
    11.964454 s:  VX_ZONE_INIT:[tivxInitLocal:145] Initialization Done !!!
    11.964467 s: APP: OpenVX Target kernel init ... !!!
    11.964615 s: APP: OpenVX Target kernel init ... Done !!!
    11.964628 s: APP: Init ... Done !!!
    11.964637 s: APP: Run ... !!!
    11.964644 s: IPC: Starting echo test ...
    11.964802 s: APP: Run ... Done !!!
    11.973371 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[.] C7X_1[s]
    11.973628 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[P] C7X_1[s]
    11.988570 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[s]
    12.044067 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[s]
[2023-07-31 10:52:52.389906] [A72   ] [app_log_linux.c     ] [INF]  GTC Frequency = 200 MHz
[2023-07-31 10:52:52.389992] [A72   ] [tivx_platform.c     ] [INF]   VX_ZONE_INIT:Enabled
[2023-07-31 10:52:52.389996] [A72   ] [tivx_platform.c     ] [INF]   VX_ZONE_ERROR:Enabled
[2023-07-31 10:52:52.389999] [A72   ] [tivx_platform.c     ] [INF]   VX_ZONE_WARNING:Enabled
[2023-07-31 10:52:52.390693] [A72   ] [tivx_platform.c     ] [INF]   VX_ZONE_INIT:[tivxInitLocal:145] Initialization Done !!!
[2023-07-31 10:52:52.391892] [A72   ] [tivx_platform.c     ] [INF]   VX_ZONE_INIT:[tivxHostInitLocal:93] Initialization Done for HOST !!!
    47.564514 s:  REMOTE_SERVICE_SENSOR: Received command 00001002 to configure 4 sensor(s) !!!
    47.564685 s:  REMOTE_SERVICE_SENSOR: IMX390: numSensors 4 portNum 1
    47.564749 s:  REMOTE_SERVICE_SENSOR: IMX390: Configuring MAX96722  portIdMap=0 ... !!!
    47.713267 s:  REMOTE_SERVICE_SENSOR: Sensor(s) configuration done !!!
active_channel_id:3
App Send Preproc Command Done!
PreProc: Node send command failed!
delete app...
Capture Node delete done!
DisplayM2M Node delete done!
Scaler Node delete done!
PreProcObj delete done!
odTIDLObj delete done!
drawDetectionsObj delete done!
MOSAIC Node delete done!
Display Node delete done!
Graph delete done!
deinit app...
app_deinit_capture done
app_deinit_displayM2M done
app_deinit_scaler done
PreProcObj deinit done!
odTIDLObj deinit done!
Draw detections deinit Done!
Mosaic deinit Done!
app_deinit_display done
app_deinit_switch_ch_obj done
app_deinit_switch_preproc_ch_obj done
[2023-07-31 10:52:57.500629] [A72   ] [tivx_platform.c     ] [INF]   VX_ZONE_ERROR:[ownContextSendControlCmd:681] Command ack message returned failure cmd_status: -1
[2023-07-31 10:52:57.500672] [A72   ] [tivx_platform.c     ] [INF]   VX_ZONE_ERROR:[ownContextSendControlCmd:718] tivxEventWait() failed.
    51.852575 s:  VX_ZONE_ERROR:[ownTargetKernelControl:430] Kernel control function is NULL
    51.852596 s:  VX_ZONE_ERROR:[ownTargetNodeDescNodeControl:1007] SendCommand Failed
    52.110696 s: ==========================================================
appGrpxDeInit done
tivxHwaUnLoadKernels done
tivxFileIOUnLoadKernels done
tivxTIDLUnLoadKernels done
tivxImgProcUnLoadKernels done
vxReleaseContext  done
APP: Deinit ... !!!
REMOTE_SERVICE: Deinit ... !!!
REMOTE_SERVICE: Deinit ... Done !!!
IPC: Deinit ... !!!
IPC: DeInit ... Done !!!
MEM: Deinit ... !!!
DDR_SHARED_MEM: Alloc's: 143 alloc's of 158460844 bytes
DDR_SHARED_MEM: Free's : 143 free's  of 158460844 bytes
DDR_SHARED_MEM: Open's : 0 allocs  of 0 bytes
DDR_SHARED_MEM: Total size: 536870912 bytes
MEM: Deinit ... Done !!!
APP: Deinit ... Done !!!
root@Linux:~#     52.110798 s:  Capture Status: Instance|0
    52.110833 s: ==========================================================
    52.110880 s:  overflowCount: 0
    52.110918 s:  spuriousUdmaIntrCount: 0
    52.110956 s:  frontFIFOOvflCount: 0
    52.110991 s:  crcCount: 0
    52.111022 s:  eccCount: 0
    52.111057 s:  correctedEccCount: 0
    52.111091 s:  dataIdErrorCount: 0
    52.111127 s:  invalidAccessCount: 0
    52.111163 s:  invalidSpCount: 0
    52.111204 s:  strmFIFOOvflCount[0]: 0
    52.111248 s:  strmFIFOOvflCount[1]: 0
    52.111280 s:  Channel Num | Frame Queue Count | Frame De-queue Count | Frame Drop Count | Error Frame Count |
    52.111359 s:            0 |               104 |                  104 |                6 |                 0 |
    52.111437 s:            1 |               104 |                  104 |                6 |                 0 |
    52.111516 s:            2 |               104 |                  104 |                6 |                 0 |
    52.111593 s:            3 |               104 |                  104 |                6 |                 0 |
    52.145710 s: ==========================================================
    52.145811 s:  Display M2M Status: Instance|0
    52.145851 s: ==========================================================
    52.145900 s:  Queue Count: 102
    52.145936 s:  De-queue Count: 102
    52.145975 s:  Write-back Frames Count: 102
    52.146013 s:  Underflow Count: 0
    52.146111 s: ==========================================================
    52.146174 s:  Display M2M Status: Instance|0
    52.146209 s: ==========================================================
    52.146255 s:  Queue Count: 102
    52.146291 s:  De-queue Count: 102
    52.146329 s:  Write-back Frames Count: 102
    52.146367 s:  Underflow Count: 0
    52.146443 s: ==========================================================
    52.146502 s:  Display M2M Status: Instance|0
    52.146535 s: ==========================================================
    52.146580 s:  Queue Count: 102
    52.146614 s:  De-queue Count: 102
    52.146668 s:  Write-back Frames Count: 102
    52.146708 s:  Underflow Count: 0
    52.146786 s: ==========================================================
    52.146846 s:  Display M2M Status: Instance|0
    52.146880 s: ==========================================================
    52.146926 s:  Queue Count: 102
    52.146960 s:  De-queue Count: 102
    52.146997 s:  Write-back Frames Count: 102
    52.147036 s:  Underflow Count: 0
[2023-07-31 10:52:57.808632] [A72   ] [tivx_platform.c     ] [INF]   VX_ZONE_ERROR:[ownReleaseReferenceInt:294] Invalid reference
[2023-07-31 10:52:57.808663] [A72   ] [tivx_platform.c     ] [INF]   VX_ZONE_ERROR:[ownReleaseReferenceInt:294] Invalid reference
[2023-07-31 10:52:57.808666] [A72   ] [tivx_platform.c     ] [INF]   VX_ZONE_ERROR:[ownReleaseReferenceInt:294] Invalid reference
[2023-07-31 10:52:57.808669] [A72   ] [tivx_platform.c     ] [INF]   VX_ZONE_ERROR:[ownReleaseReferenceInt:294] Invalid reference
[2023-07-31 10:52:57.808672] [A72   ] [tivx_platform.c     ] [INF]   VX_ZONE_ERROR:[ownReleaseReferenceInt:294] Invalid reference
[2023-07-31 10:52:58.305843] [A72   ] [tivx_platform.c     ] [INF]   VX_ZONE_WARNING:[vxReleaseContext:1060] Found a reference 0xffffae9c08a8 of type 0000080f at external count 1, internal count 0, releasing it
[2023-07-31 10:52:58.305855] [A72   ] [tivx_platform.c     ] [INF]   VX_ZONE_WARNING:[vxReleaseContext:1062] Releasing reference (name=image_104) now as a part of garbage collection
[2023-07-31 10:52:58.305886] [A72   ] [tivx_platform.c     ] [INF]   VX_ZONE_INIT:[tivxHostDeInitLocal:107] De-Initialization Done for HOST !!!
[2023-07-31 10:52:58.310284] [A72   ] [tivx_platform.c     ] [INF]   VX_ZONE_INIT:[tivxDeInitLocal:223] De-Initialization Done !!!

Hi Xin, The error log shows that the control command is not registered on the target. Could you please confirm if the tivxAddTargetKernelDLPreProc() is being called by putting some logs into it? May I know on which target are you running this node? Is it on C66 DSP itself? Regards, Nikhil

Hi NIkhil, I think tivxAddTargetKernelDLPreProc () is called, because I am during program execution to the 100th cycle for DL preproc node sends the control command, before sending the application can run normally. DL preproc node This node runs the target of TI default, I have not changed it, here is the definition I see: Regards, Xin

Hi Xin, I am suspecting that the control function that you have added in the tivxAddTargetKernelDLPreProc() is not reflected in the build. To confirm this, could you put a log in this function and see if it is getting printed (To ensure that the target file got built after your changes) 51.852575 s: VX_ZONE_ERROR:[ownTargetKernelControl:430] Kernel control function is NULL 51.852596 s: VX_ZONE_ERROR:[ownTargetNodeDescNodeControl:1007] SendCommand Failed The above logs states that the control function is still NULL in the kernel. Regards, Nikhil

Hi Nikhil, I recompiled the SDK with these changes, but it still reported that the control functions were empty. What was the cause? Regards, Xin

Hi Xin, I tried inserting control command in the tivxImgPreProcNode ( As DL node was not readily used in the SDK demos) and I was able to reach and print the message in the control function. I included this in the vision_apps object detection demo. Please refer the below patch on vision_apps folder in SDK 8.6 vision_apps_preproc_controlCmd.patch The same should work for tivxDLPreProcNode Regards, Nikhil

Hi NIkhil, I refer to your patch add print log in the control function.but it still print "Kernel control function is NULL",I think the question now is why is the control function empty? Why didn't the changes I added take effect after compilation? How does the host side connect to the target side when the program is running? Do my host side and target side not correspond? Regards, Xin

Hi NIkhil, I managed to send the control command, but it failed earlier because the target side of my DL preproc node was not vx_dl_pre_proc_target.c, but vx_image_preprocessing_target.c. The command was sent successfully, but it is not convenient for testing. I am not sure whether it works. I would like to know whether displayM2M node also supports selecting channels to facilitate testing Regards, Xin

Hi Xin, I am assuming that now you could send a control command from the application to the control API of the target right? xiu xin said: I would like to know whether displayM2M node also supports selecting channels to facilitate testing Currently, in the SDK, only the display node has this active channel selection implementation. Since you already have the active channel implementation in place, all you have to do is to use it in the process function of the node. Please refer the implementation of "active_channel" in the process function of the display node. You could see that based on the active channel you have selected, tivxGetObjDescElement() would take only the object descriptor corresponding to the active channel and use it for processing. Regards, Nikhil

Hi NIkhil, After I added "active_channel" functionality to the process function of vx_image_preprocessing_target.c via tivxGetObjDescElement(), the program stopped running. Taking the vision_apps object detection demo as an example, the input of DL preproc node comes from scaler node. When DL preproc node adds the selection channel function, Does DL preproc node need replicated node enabled and how is num_ch set? Here are the changes I made to vx_image_preprocessing_target.c: Regards, Xin vx_image_preprocessing_target.c.txt diff --git a/kernels/img_proc/c66/vx_image_preprocessing_target.c b/kernels/img_proc/c66/vx_image_preprocessing_target.c
index 56d27ca..757b532 100644
--- a/kernels/img_proc/c66/vx_image_preprocessing_target.c
+++ b/kernels/img_proc/c66/vx_image_preprocessing_target.c
@@ -61,7 +61,7 @@
 */
 
 
-
+#include <stdio.h>
 #include <TI/tivx.h>
 #include <TI/tivx_img_proc.h>
 #include <TI/tivx_target_kernel.h>
@@ -129,6 +129,9 @@ typedef struct {
     uint32_t l2_heap_id;
     uint64_t l2_global_base;
 
+    /**< Id of active channel */
+    uint32_t active_channel;
+
 } tivxImgPreProcKernelParams;
 
 static vx_status img_proc_pipeline_blocks_nv12ToRgbp
@@ -192,6 +195,51 @@ static vx_status img_proc_execute_16bit_RgbiToRgbp
     void *out_tensor_target_ptr
 );
 
+static vx_status tivxPreProcSwitchChannel(tivxImgPreProcKernelParams *preproc,
+    const tivx_obj_desc_user_data_object_t *usr_data_obj)
+{
+    vx_status                             status = (vx_status)VX_SUCCESS;
+    tivx_preproc_select_channel_params_t *ch_prms = NULL;
+    void                                 *target_ptr;
+
+    // printf("-----start switch channel ----- \n");
+    if (NULL != usr_data_obj)
+    {
+        target_ptr = tivxMemShared2TargetPtr(&usr_data_obj->mem_ptr);
+
+        tivxCheckStatus(&status, tivxMemBufferMap(target_ptr, usr_data_obj->mem_size,
+            (vx_enum)VX_MEMORY_TYPE_HOST, (vx_enum)VX_READ_ONLY));
+
+        if (sizeof(tivx_preproc_select_channel_params_t) ==
+                usr_data_obj->mem_size)
+        {
+            ch_prms = (tivx_preproc_select_channel_params_t *)target_ptr;
+            preproc->active_channel = ch_prms->active_preproc_channel_id;
+        }
+        else
+        {
+            VX_PRINT(VX_ZONE_ERROR, "Invalid Size \n");
+            status = (vx_status)VX_ERROR_INVALID_PARAMETERS;
+        }
+
+        tivxCheckStatus(&status, tivxMemBufferUnmap(target_ptr, usr_data_obj->mem_size,
+            (vx_enum)VX_MEMORY_TYPE_HOST, (vx_enum)VX_READ_ONLY));
+    }
+    else
+    {
+        VX_PRINT(VX_ZONE_ERROR, "User Data Object is NULL \n");
+        status = (vx_status)VX_ERROR_INVALID_PARAMETERS;
+    }
+
+    return (status);
+}
+
+static vx_status VX_CALLBACK tivxKernelImgPreProcControl(
+       tivx_target_kernel_instance kernel,
+       uint32_t node_cmd_id, tivx_obj_desc_t *obj_desc[],
+       uint16_t num_params, void *priv_arg);
+
+
 static vx_status dma_create(DMAObj *dmaObj, vx_size transfer_type, vx_uint32 dma_ch)
 {
     vx_status status = VX_SUCCESS;
@@ -637,6 +685,58 @@ static vx_status VX_CALLBACK tivxKernelImgPreProcDelete(
     return (status);
 }
 
+static vx_status VX_CALLBACK tivxKernelImgPreProcControl(
+       tivx_target_kernel_instance kernel,
+       uint32_t node_cmd_id, tivx_obj_desc_t *obj_desc[],
+       uint16_t num_params, void *priv_arg)
+{
+    vx_status            status = (vx_status)VX_SUCCESS;
+    uint32_t             size;
+    tivxImgPreProcKernelParams   *preproc = NULL;
+
+    status = tivxGetTargetKernelInstanceContext(kernel,
+        (void **)&preproc, &size);
+
+    if ((vx_status)VX_SUCCESS != status)
+    {
+        VX_PRINT(VX_ZONE_ERROR, "Failed to Get Target Kernel Instance Context\n");
+    }
+    else if ((NULL == preproc) ||
+        (sizeof(tivxImgPreProcKernelParams) != size))
+    {
+        VX_PRINT(VX_ZONE_ERROR, "Invalid Object Size\n");
+        status = (vx_status)VX_FAILURE;
+    }
+    else
+    {
+        /* do nothing */
+        // printf("Success to Get PreProc Target Kernel Instance Context\n");
+    }
+
+    if ((vx_status)VX_SUCCESS == status)
+    {
+        switch (node_cmd_id)
+        {
+            case TIVX_PREPROC_SELECT_CHANNEL:
+            {
+                // printf("hahahahhahhahahahahhahahahahhahaha");
+                status = tivxPreProcSwitchChannel(preproc,
+                    (tivx_obj_desc_user_data_object_t *)obj_desc[0U]);
+                break;
+            }
+            default:
+            {
+                VX_PRINT(VX_ZONE_ERROR, "Invalid Command Id\n");
+                status = (vx_status)VX_FAILURE;
+                break;
+            }
+        }
+    }
+
+    return (status);
+}
+
+
 static vx_status VX_CALLBACK tivxKernelImgPreProcProcess
 (
     tivx_target_kernel_instance kernel,
@@ -691,6 +791,8 @@ static vx_status VX_CALLBACK tivxKernelImgPreProcProcess
 
         tivx_obj_desc_image_t *in_img_desc;
         void* in_image_target_ptr[2];
+        uint32_t active_channel;
+        active_channel = prms->active_channel;
 
         tivx_obj_desc_tensor_t *out_tensor_desc;
         void *out_tensor_target_ptr;
@@ -699,7 +801,14 @@ static vx_status VX_CALLBACK tivxKernelImgPreProcProcess
         configuration_target_ptr = tivxMemShared2TargetPtr(&configuration_desc->mem_ptr);
         tivxMemBufferMap(configuration_target_ptr, configuration_desc->mem_size, VX_MEMORY_TYPE_HOST,VX_READ_ONLY);
 
-        in_img_desc  = (tivx_obj_desc_image_t *)obj_desc[TIVX_KERNEL_IMG_PREPROCESS_INPUT_IMAGE_IDX];
+        // in_img_desc  = (tivx_obj_desc_image_t *)obj_desc[TIVX_KERNEL_IMG_PREPROCESS_INPUT_IMAGE_IDX];
+        in_img_desc = (tivx_obj_desc_image_t *)
+            tivxGetObjDescElement(obj_desc[TIVX_KERNEL_IMG_PREPROCESS_INPUT_IMAGE_IDX],
+                                  active_channel);
+        if (in_img_desc == NULL)
+        {
+            status = (vx_status)VX_FAILURE;
+        }
         in_image_target_ptr[0]  = tivxMemShared2TargetPtr(&in_img_desc->mem_ptr[0]);
         tivxMemBufferMap(in_image_target_ptr[0], in_img_desc->mem_size[0], TIVX_MEMORY_TYPE_DMA, VX_READ_ONLY);
         in_image_target_ptr[1]  = NULL;
@@ -790,7 +899,7 @@ void tivxAddTargetKernelImgPreProc()
                                             tivxKernelImgPreProcProcess,
                                             tivxKernelImgPreProcCreate,
                                             tivxKernelImgPreProcDelete,
-                                            NULL,
+                                            tivxKernelImgPreProcControl,
                                             NULL
                                         );
     }
(END)

Hi, xiu xin said: Taking the vision_apps object detection demo as an example, the input of DL preproc node comes from scaler node. When DL preproc node adds the selection channel function I am not sure how your usecase would be similar to the object detection demo flow. Here, the output from the preproc node would be object array of tensors which are generated at a time for multiple channels and fed to the TIDL node. As, you DL pre proc node would give only 1 channel output at a time, the TIDL node should also be aware of the same. xiu xin said: Does DL preproc node need replicated node enabled and how is num_ch set? Replicated node is not needed here if you are doing one channel at a time. The object array from which the image is extracted would have the num_ch information. The changes that you have done to the process function looks correct. Please check if your application is ready to accept this flow. Regards, Nikhil

Hi Nikhil, I modified the graph according to the above changes, but the program does not work properly. Can you add the function of DL Preproc node switching channels with app_tidl_od_cam as an example? Looking forward to your reply. Regards, Xin

Hi Xin, app_tidl_od_cam demo is for processing multiple camera input at a time and display the same using a mosaic node so that all camera inputs are visible on the display at a time. However, your usecase would be to receive 2 camera input and then process and display only 1 camera at a time right? This would require major changes in the code like removal of replicate nodes, removal of mosaic node etc. I would suggest you share the application source code you have developed as per your usecase which I could review at my end. Regards, Nikhil

Hi Nikhil, My graph also accepts four cameras, but the images of one channel are randomly selected for deep learning processing. They can also be displayed on the same screen through mosaic node. One image is processed, and the remaining three are original images, which does not affect the addition of switching channel function. Alternatively, you can use the display node to display the post-processed image without creating a mosaic node during the create graph phase. The test case I wrote now is the same as the app_tidl_od_cam demo, but due to the different camera sensor used, the program is slightly different in some places, such as the register configuration, etc. If I send you my demo, it won't actually work well on your computer, it will consume more time. Thank you for your help. Regards, Xin

Hi Xin, I shall try to modify the application. I would require some time though as there would be a lot of modifications. I shall get back to you with an application by next week. I shall do this with the imgPreProc itself instead of dlPreproc as they should be same. Regards, Nikhil

Hi Nikhil, Thank you for your patient help and I will look forward to your reply next week. Regards, Xin

Sure, Thank you

Hi Nikhil, Is there any good news? Regards, Xin

Hi Xin, I just realized while planning for the implementation. The active channel selection using control command should be for preproc, tidl and postproc node because you would be doing the full deep learning processing only for one channel right? Have you also done the same? Initially I thought the control command was required only for pre-proc. May I know what have you done at your end? Sorry for the delay in the implementation because of festival holidays here in India this week. Regards, Nikhil

Hi Nikhil, Celebrate your wonderful holiday. What I'm doing so far is just sending a control command to the preprocessor node, using tivxGetObjDescElement() in the corresponding target, and I didn't succeed, and then I realized that I might need to enable replication on the preprocessor node before sending the control command, but when I enabled replication, it didn't work either, I am also currently learning the use of select link in the Tda2 sdk and want to port its functionality to Tda4 for use as a node, if successful this will be a perfect solution as I have seen on the forum that someone has successfully ported it. But I'm not familiar with Tda2 and I'm still working on it. Regards, Xin

Hi Nikhil, Have you implemented switching channels? Do you have any further ideas? Regards, xin

Hi Xin, I have a patch to switch channels in preproc on app_tidl_od_cam application. This patch is on SDK 8.6 and has to be applied on vision_apps folder. /cfs-file/__key/communityserver-discussions-components-files/791/pre_2D00_proc_5F00_switch.patch Here I had to add channel switch to post proc (drawBoxDetection) as well because this was taking reference image from input and that also should be changed when the channel is switched. To change the channel, press "c" after running the application in interactive mode. Regards, Nikhil

Hi Nikhil, According to your patch, I have successfully implemented the switch channel, do you have any suggestions for porting TDA2 select link to TDA4? Is it convenient for the TDA4 SDK to create a select node? Regards, Xin

Hi Xin, TDA2 has Link framework and TDA4 supports OpenVX framework. In this the select link and select nodes are not supported. I would suggest using the switch channel itself. Regards, Nikhil

Hi Nikhil, TDA4 platform, if from four input channels select the specified two or three channels, how to achieve? Regards, Xin

Hi Xin, I thought your usecase was to process each channel individually which was the reason for the switch channel right? xiu xin said: select the specified two or three channels Do you mean to select 2 or 3 channels in parallel? Regards, Nikhil

Hi Nikhil, Some post-processing needs to specify one channel, some post-processing needs to specify two or three channels at the same time, how to select two or three channels at the same time? Regards Xin

Hi Nikhil, Since this thread is too long, I have started a new one, if you have any suggestions, please share them in the thread below. TDA4VM: How can multiple specified channels be selected simultaneously? - Processors forum - Processors - TI E2E support forums Regards, Xin