| Ticket Name: TDA4VM: Configure DPI0 to output BT1120 | |
| Query Text: | |
| Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Hi team, SDK: ti-processor-sdk-rtos-j721e-evm-08_05_00_11 H/W design: VOUT0 connected externally to NVP6021, and BT.1120 switch to AHD output. And NVP6021 pin is defined as follows: TDA4VM <==> NVP6021 h/w connection： VOUT0_DATA2~9 connected to NVP6021 Y0~7 VOUT0_DATA12~19 connected to NVP6021 C0~7 These correspond to the data map mentioned in the manual: 1920*1080p 25fps was selected and the customer made the following modifications in SDK： app_init.c: appInit() prm.timings.hFrontPorch = 460U; prm.timings.hBackPorch = 110U; prm.timings.hSyncLen = 150U; prm.timings.vFrontPorch = 4U; prm.timings.vBackPorch = 34U; prm.timings.vSyncLen = 7U; prm.timings.pixelClock = 74250000ULL; app_dss_defaults.c: appDctrlDefaultInit() vpParams.dvoFormat = APP_DCTRL_DV_BT1120_EMBSYNC; app_dss_defaults.c appDssDefaultInit() The EVM uses VOUT0 to HDMI and the customer's design uses VOUT0 too, so they have modified the following under the code corresponding to the APP_DSS_DEFAULT_DISPLAY_TYPE_DPI_HDMI macro: else if(prm->display_type==APP_DSS_DEFAULT_DISPLAY_TYPE_DPI_HDMI) { appLogPrintf("DSS: Display type is HDMI !!!\n"); obj->nodeOverlayId = APP_DCTRL_NODE_OVERLAY2; obj->nodeVpId = APP_DCTRL_NODE_VP2; obj->nodeDpiId = APP_DCTRL_NODE_DPI_DPI0; obj->overlayId = APP_DSS_OVERLAY_ID_2; obj->vpId = APP_DSS_VP_ID_2; //yaogang modify //obj->videoIfWidth = APP_DCTRL_VIFW_24BIT; obj->videoIfWidth = APP_DCTRL_VIFW_16BIT; } NVP6021 Initialization: the registers of the NVP6021 have been set according to the configuration list given by the FAE. And please see the test: 1) The measured clock output is 74.25M with oscilloscope and it was good. 2) Enable the Colorbar test output of the NVP6021 and it display has no probelem. 3) Turn off the Colorbar test output of the NVP6021 and enable the TDA2VM Colorbar. dss_dctrl.h: Note: The screen identification signal was 1080p 25 for test item 2 and NTSC for test item 3. Could you help check is there any problem with the modification of the code above? And how to troubleshoot the issue next? Thanks. Best Regards, Cherry | |
| Responses: | |
| Hi Cherry, Above changes look to be fine. Can you please keep VideoIfWidth to be 24B, ie "obj->videoIfWidth = APP_DCTRL_VIFW_24BIT;" ? Also if the colorbar output is correct, can you please not connect any of the video pipeline and see if you are able to get correct background color from the overlay manager? You can try changing background color in overlay manager .. Regards, Brijesh | |
| Hi Brijesh, Thank you for the support. 1) It's found that the code set the timing in csl_dssVideoPort.c 的CSL_dssVpSetLcdBlankTiming function. dvoFormat = BT1120 so enter 438 line else At the same time, scamFormat = FVID2_SF_PROGRESSIVE, hBackPorch hFrontPorch do not set the correspond register, only hSyncVal is being used when checking the code. So they modified prm.timings.hSyncLen = 720U; in app_init.c: appInit() (Sum of row blanking) Why is there no register setting for the blankCfg->vSyncLen field sync in the function? Test the TDA2 colorbar again, as shown below: The color is good, but there is a misalignment. 2) Using APP_DCTRL_VIFW_24BIT to test TDA2 colorbar is as same as the above figure. Thanks and regards, Cherry | |
| Hi Cherry, For the embedded sync, ie BT1120 output format, there is no front porch or back porch. It just contains distance from EAV to SAV code and this can be specificied using hsyncLen and vsyncLen. Regarding VBP and VFP, they are just vertical blanking in BT mode. Please refer to below register description for more details. Regards, Brijesh | |
| Hi Brijesh, As per the NVP6021 manual, app_init.c: appInit() modified timing as follows: And review the NVP6021 VOUT output signal through oscilloscope: 1) Enable the colorbar of NVP6021. 2) Turn off the colorbar test output of NVP6021 and enable the colorbar of TDA2VM. As you can see the cycles are the same, but the contents are different. So they suspected the output data from BT1120 is wrong and synchronization is good. Thanks and regards, Cherry | |
| Hi Cherry, Are you sure that the BT1120 output is connected over vout0? Because, if i remember, it is not possible to get BT110 output on vout1. So can you please check and confirm? Regards, Brijesh | |
| I am sure it is VOUT0 output. Here is a screenshot of part of our schematic diagram | |
| There were a number of typos of TDA2VM in the previous description, but to correct this, TDA4VM is used. | |
| ” it requires two pixel clock cycles to send out one pixel.“ Could this be the problem? I'm looking at the TDA4VM datasheet and the code | |
| Hi Gang Yao, When you say you are enabling color bar, can you please tell us where/how you are enabling color bard? Are you enabling it in the overlay managar? Which Video port are you using to connect to vout0? Can you please share the registers of this video port and register of overlay manager? Regards, Brijesh | |
| gang yao said: ” it requires two pixel clock cycles to send out one pixel.“ Could this be the problem? I'm looking at the TDA4VM datasheet and the code This should not be an issue for BT1120 format, as this requires just one clock cycle to output a pixel. To confirm, can you please share VP and overlay manager's register dump? Regards, Brijesh | |
| enable color bar vision_apps/utils/dss/src/app_dss_defaults.c : | |
| appDctrlDefaultInit() | |
| { | |
| overlayParams.overlayId = obj->overlayId; //APP_DSS_OVERLAY_ID_2 | |
| overlayParams.colorKeyEnable = 1; | |
| overlayParams.colorKeySel = APP_DCTRL_OVERLAY_TRANS_COLOR_SRC; | |
| overlayParams.transColorKeyMin = 0x0u; | |
| overlayParams.transColorKeyMax = 0x0u; | |
| overlayParams.backGroundColor = 0x0u; | |
| retVal+= appRemoteServiceRun(cpuId, APP_DCTRL_REMOTE_SERVICE_NAME, APP_DCTRL_CMD_SET_OVERLAY_PARAMS, &overlayParams, sizeof(overlayParams), 0U); | |
| } | |
| vision_apps/utils/dss/src/app_dctrl.c : | |
| appDctrlControl() | |
| { | |
| case APP_DCTRL_CMD_SET_OVERLAY_PARAMS: | |
| retVal = appDctrlSetOverlayParamsCmd(gAppDctrlHandle, | |
| (const app_dctrl_overlay_params_t*) params, | |
| size); | |
| } | |
| appDctrlSetOverlayParamsCmd() | |
| { | |
| Dss_dctrlOverlayParamsInit(&drvOverlayParams); | |
| drvOverlayParams.overlayId = overlayParams->overlayId; | |
| drvOverlayParams.overlayCfg.colorKeyEnable = overlayParams->colorKeyEnable; | |
| drvOverlayParams.overlayCfg.colorKeySel = overlayParams->colorKeySel; | |
| drvOverlayParams.overlayCfg.transColorKeyMin = overlayParams->transColorKeyMin; | |
| drvOverlayParams.overlayCfg.transColorKeyMax = overlayParams->transColorKeyMax; | |
| drvOverlayParams.overlayCfg.backGroundColor = overlayParams->backGroundColor; | |
| retVal = Fvid2_control(handle, IOCTL_DSS_DCTRL_SET_OVERLAY_PARAMS, &drvOverlayParams, NULL); | |
| } | |
| app_dctrl.h : | |
| Dss_dctrlOverlayParamsInit() | |
| { | |
| if(NULL != overlayParams) | |
| { | |
| overlayParams->overlayId = CSL_DSS_OVERLAY_ID_1; | |
| overlayParams->colorbarEnable = TRUE; //yaogang modify | |
| CSL_dssOverlayCfgInit(&(overlayParams->overlayCfg)); | |
| } | |
| } | |
| vp2 connect to vout0 vision_apps/utils/dss/src/app_dss_defaults.c : | |
| appDssDefaultInit() | |
| { | |
| else if(prm->display_type==APP_DSS_DEFAULT_DISPLAY_TYPE_DPI_HDMI) | |
| { | |
| appLogPrintf("DSS: Display type is HDMI !!!\n"); | |
| obj->nodeOverlayId = APP_DCTRL_NODE_OVERLAY2; | |
| obj->nodeVpId = APP_DCTRL_NODE_VP2; | |
| obj->nodeDpiId = APP_DCTRL_NODE_DPI_DPI0; | |
| obj->overlayId = APP_DSS_OVERLAY_ID_2; | |
| obj->vpId = APP_DSS_VP_ID_2; | |
| //yaogang modify | |
| //obj->videoIfWidth = APP_DCTRL_VIFW_24BIT; | |
| obj->videoIfWidth = APP_DCTRL_VIFW_16BIT; | |
| } | |
| if(prm->enableM2m == TRUE) | |
| { | |
| appLogPrintf("DSS: M2M Path is enabled !!!\n"); | |
| obj->m2m.enableM2m = true; | |
| obj->m2m.nodeOverlayId = APP_DCTRL_NODE_OVERLAY4; | |
| obj->m2m.overlayId = APP_DSS_OVERLAY_ID_4; | |
| obj->m2m.pipeId = APP_DCTRL_NODE_VIDL2; | |
| obj->m2m.vpId = APP_DSS_VP_ID_4; | |
| obj->m2m.nodeVpId = APP_DCTRL_NODE_VP4; | |
| } | |
| ...... | |
| appDctrlDefaultInit(obj); | |
| } | |
| appDctrlDefaultInit() | |
| { | |
| pathInfo.edgeInfo[pathInfo.numEdges].startNode = APP_DCTRL_NODE_VID1; | |
| pathInfo.edgeInfo[pathInfo.numEdges].endNode = obj->nodeOverlayId; //APP_DCTRL_NODE_OVERLAY2 | |
| printf("edge[%d]: %d --> %d\n", pathInfo.numEdges, | |
| pathInfo.edgeInfo[pathInfo.numEdges].startNode, pathInfo.edgeInfo[pathInfo.numEdges].endNode); | |
| pathInfo.numEdges++; | |
| pathInfo.edgeInfo[pathInfo.numEdges].startNode = APP_DCTRL_NODE_VID2; | |
| pathInfo.edgeInfo[pathInfo.numEdges].endNode = obj->nodeOverlayId; | |
| printf("edge[%d]: %d --> %d\n", pathInfo.numEdges, | |
| pathInfo.edgeInfo[pathInfo.numEdges].startNode, pathInfo.edgeInfo[pathInfo.numEdges].endNode); | |
| pathInfo.numEdges++; | |
| pathInfo.edgeInfo[pathInfo.numEdges].startNode = APP_DCTRL_NODE_VIDL1; | |
| pathInfo.edgeInfo[pathInfo.numEdges].endNode = obj->nodeOverlayId; | |
| printf("edge[%d]: %d --> %d\n", pathInfo.numEdges, | |
| pathInfo.edgeInfo[pathInfo.numEdges].startNode, pathInfo.edgeInfo[pathInfo.numEdges].endNode); | |
| pathInfo.numEdges++; | |
| pathInfo.edgeInfo[pathInfo.numEdges].startNode = obj->nodeOverlayId; | |
| pathInfo.edgeInfo[pathInfo.numEdges].endNode = obj->nodeVpId; //APP_DCTRL_NODE_VP2 | |
| printf("edge[%d]: %d --> %d\n", pathInfo.numEdges, | |
| pathInfo.edgeInfo[pathInfo.numEdges].startNode, pathInfo.edgeInfo[pathInfo.numEdges].endNode); | |
| pathInfo.numEdges++; | |
| pathInfo.edgeInfo[pathInfo.numEdges].startNode = obj->nodeVpId; | |
| pathInfo.edgeInfo[pathInfo.numEdges].endNode = obj->nodeDpiId; //APP_DCTRL_NODE_DPI_DPI0 | |
| printf("edge[%d]: %d --> %d\n", pathInfo.numEdges, | |
| pathInfo.edgeInfo[pathInfo.numEdges].startNode, pathInfo.edgeInfo[pathInfo.numEdges].endNode); | |
| pathInfo.numEdges++; | |
| if (true == obj->m2m.enableM2m) | |
| { | |
| pathInfo.edgeInfo[pathInfo.numEdges].startNode = obj->m2m.pipeId; //APP_DCTRL_NODE_VIDL2 | |
| pathInfo.edgeInfo[pathInfo.numEdges].endNode = obj->m2m.nodeOverlayId; //APP_DCTRL_NODE_OVERLAY4 | |
| printf("edge[%d]: %d --> %d\n", pathInfo.numEdges, | |
| pathInfo.edgeInfo[pathInfo.numEdges].startNode, pathInfo.edgeInfo[pathInfo.numEdges].endNode); | |
| pathInfo.numEdges++; | |
| pathInfo.edgeInfo[pathInfo.numEdges].startNode = obj->m2m.nodeOverlayId; | |
| pathInfo.edgeInfo[pathInfo.numEdges].endNode = obj->m2m.nodeVpId; //APP_DCTRL_NODE_VP4 | |
| printf("edge[%d]: %d --> %d\n", pathInfo.numEdges, | |
| pathInfo.edgeInfo[pathInfo.numEdges].startNode, pathInfo.edgeInfo[pathInfo.numEdges].endNode); | |
| pathInfo.numEdges++; | |
| } | |
| } | |
| DSS0_OVR2 Registers reg_addr reg_val | |
| 0x4a90000 0x00000C00 | |
| 0x4a90004 0x00000000 | |
| 0x4a90008 0x00000000 | |
| 0x4a9000c 0x00000000 | |
| 0x4a90010 0x0F00F00F | |
| 0x4a90014 0x00000000 | |
| 0x4a90018 0x00000000 | |
| 0x4a9001c 0x00000000 | |
| 0x4a90020 0x00000001 | |
| 0x4a90024 0x00000005 | |
| 0x4a90028 0x00000000 | |
| 0x4a9002c 0x00000000 | |
| 0x4a90030 0x00000003 | |
| 0x4a90034 0x00000000 | |
| 0x4a90038 0x00000000 | |
| 0x4a9003c 0x00000000 | |
| 0x4a90040 0x00000000 | |
| 0x4a90044 0x00000000 | |
| 0x4a90048 0x00000000 | |
| DSS0_VP2 Registers reg_addr reg_val | |
| 0x4aa0000 0x03200000 | |
| 0x4aa0004 0x00000141 | |
| 0x4aa0008 0x00810042 | |
| 0x4aa000c 0x07DA0019 | |
| 0x4aa0010 0x007007B6 | |
| 0x4aa0014 0x00000000 | |
| 0x4aa0018 0x00000000 | |
| 0x4aa001c 0x00000000 | |
| 0x4aa0020 0x00000000 | |
| 0x4aa0024 0x00000000 | |
| 0x4aa0028 0x00000000 | |
| 0x4aa002c 0x00000000 | |
| 0x4aa0030 0x00000000 | |
| 0x4aa0034 0x00000000 | |
| 0x4aa0038 0x00000000 | |
| 0x4aa003c 0x00000000 | |
| 0x4aa0040 0x00000000 | |
| 0x4aa0044 0x00000433 | |
| 0x4aa0048 0x00000000 | |
| 0x4aa004c 0x00000000 | |
| 0x4aa0050 0x0437077F | |
| 0x4aa0054 0x000000D1 | |
| 0x4aa0058 0x02900402 | |
| 0x4aa005c 0x07A20070 | |
| 0x4aa0060 0x000007EE | |
| 0x4aa0064 0x00000000 | |
| 0x4aa0068 0x00000000 | |
| 0x4aa006c 0x40004000 | |
| 0x4aa0070 0x00000000 | |
| 0x4aa0074 0x00000000 | |
| 0x4aa0078 0x00000000 | |
| 0x4aa007c 0x00000000 | |
| 0x4aa0080 0x00000000 | |
| 0x4aa0084 0x00000000 | |
| 0x4aa0088 0x00000000 | |
| 0x4aa008c 0x00000000 | |
| 0x4aa0090 0x00000000 | |
| 0x4aa0094 0x00000000 | |
| 0x4aa0098 0x00000000 | |
| 0x4aa009c 0x00000000 | |
| 0x4aa00a0 0x00000000 | |
| 0x4aa00a4 0x00000000 | |
| 0x4aa00a8 0x00000000 | |
| 0x4aa00ac 0x00000000 | |
| 0x4aa00b0 0x00000000 | |
| 0x4aa00b4 0x00000000 | |
| 0x4aa00b8 0x00000000 | |
| 0x4aa00bc 0x00000000 | |
| 0x4aa00c0 0x00000000 | |
| 0x4aa00c4 0x00000000 | |
| 0x4aa00c8 0x00000000 | |
| 0x4aa00cc 0x00000000 | |
| 0x4aa00d0 0x00000000 | |
| 0x4aa00d4 0x00000000 | |
| 0x4aa00d8 0x00000000 | |
| 0x4aa00dc 0x00000000 | |
| 0x4aa00e0 0x00000000 | |
| 0x4aa00e4 0x00000000 | |
| 0x4aa00e8 0x00000000 | |
| 0x4aa00ec 0x00000000 | |
| 0x4aa00f0 0x00000000 | |
| 0x4aa00f4 0x00000000 | |
| 0x4aa00f8 0x00000000 | |
| 0x4aa00fc 0x00000000 | |
| 0x4aa0100 0x00000000 | |
| 0x4aa0104 0x00000000 | |
| 0x4aa0108 0x00000000 | |
| 0x4aa010c 0x00000000 | |
| 0x4aa0110 0x00000000 | |
| 0x4aa0114 0x00000000 | |
| 0x4aa0118 0x00000000 | |
| 0x4aa011c 0x00000000 | |
| 0x4aa0120 0x00000000 | |
| 0x4aa0124 0x00000000 | |
| 0x4aa0128 0x00000000 | |
| 0x4aa012c 0x00000000 | |
| 0x4aa0130 0x00000000 | |
| 0x4aa0134 0x00000000 | |
| 0x4aa0138 0x00000000 | |
| 0x4aa013c 0x00000000 | |
| 0x4aa0140 0x00000000 | |
| 0x4aa0144 0x00000000 | |
| 0x4aa0148 0x00000000 | |
| 0x4aa014c 0x00000000 | |
| 0x4aa0150 0x00000000 | |
| 0x4aa0154 0x00000000 | |
| 0x4aa0158 0x00000000 | |
| 0x4aa015c 0x00000000 | |
| 0x4aa0160 0x00000000 | |
| 0x4aa0164 0x00000000 | |
| 0x4aa0168 0x00000000 | |
| 0x4aa016c 0x00000000 | |
| 0x4aa0170 0x00000000 | |
| 0x4aa0174 0x00000000 | |
| 0x4aa0178 0x00000000 | |
| Hi Brijesh, Is there any progress on this issue | |
| Hi gang yao, There are couple of things in the register dump that i suspect. - I see you have enabled three inputs in the overlay manager registers, VID1, VID2 and VIDL1 and there is not color bar output enable in the overlay manager. Can you please disable these inputs and enable just color bar from overlay manager? - In DATALINES field of VP_CONTROL register, it is set to 0x1, which means 16bit output, can we please try changing it to 0x5, ie full 36 bit output from overlay manager? - In addition, horizontal blanking is set to 722 clock pulses. can you please review and see if it is ok? Typically for YUV422, it should be multiple of 4.. Can you please set it to multiple of 4 value? Regards, Brijesh | |