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Ticket Name: RTOS/TDA2: How can setup 1ms timer at use case? |
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Query Text: |
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Part Number: TDA2 Tool/software: TI-RTOS Hi Sir, We application need use 1ms timer. I reference CSL(chip support library) sample code of SDK v3.3 ($SDK\ti_components\drivers\pdk_01_09_00_17\packages\ti\csl\example\timer\timer_app\main_m4.c) and try to same setting at use case. But I found some problem as below: 1. When use case setup timer to call Intc_Init() API that will occurs dead lock. (UART console stop print message) 2. Timer interrupt not generate after disable Intc_Init() to avoid dead lock(1st problem). Could you please advice me how to setup timer? Have any document or sample code can reference? Thanks for your support. main_m4(TI SDK timer sample code).c /* |
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* Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/ |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* |
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* Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* |
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* Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the |
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* distribution. |
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* |
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* Neither the name of Texas Instruments Incorporated nor the names of |
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* its contributors may be used to endorse or promote products derived |
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* from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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* |
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*/ |
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/** |
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* \file main_m4.c |
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* |
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* \brief This file demonstrates TIMER dal. |
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* |
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**/ |
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/* ========================================================================== */ |
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/* Include Files */ |
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/* ========================================================================== */ |
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#include <ti/csl/example/utils/uart_console/inc/uartConfig.h> |
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#include "stdint.h" |
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#include "stdio.h" |
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#include <ti/csl/soc.h> |
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#include <ti/csl/csl_timer.h> |
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#include "sample.h" |
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#include <ti/csl/csl_types.h> |
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#include <ti/csl/arch/csl_arch.h> |
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#if defined (SOC_AM574x) || defined (SOC_AM572x) || defined (SOC_AM571x) |
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#include <ti/board/board.h> |
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#endif |
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/* ========================================================================== */ |
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/* Macros & Typedefs */ |
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/* ========================================================================== */ |
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#if defined (SOC_AM574x) || defined (SOC_AM572x) || defined (SOC_AM571x) |
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uint32_t INP_CLK_FREQ = 20000000U; |
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uint32_t TIMER_INITIAL_COUNT = 0U; |
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uint32_t TIMER_RLD_COUNT = 0U; |
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void Timer_val(uint32_t inp_clk, uint32_t delay, uint32_t prescl_val); |
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#else |
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#define TIMER_INITIAL_COUNT (0xFFF00000U) |
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#define TIMER_RLD_COUNT (0xFFF00000U) |
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#endif |
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#if defined (SOC_AM574x) || defined (SOC_AM572x) || defined (SOC_AM571x) |
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uint32_t irq_count = CSL_IPU_IRQ_XBAR_COUNT; |
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uint32_t uartBaseAddr = CSL_MPU_UART3_REGS; |
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#endif |
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#if defined (SOC_TDA2XX) || defined (SOC_TDA2PX) || defined (SOC_TDA2EX) || defined (SOC_DRA72x) || defined (SOC_DRA75x) |
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uint32_t irq_count = CSL_IPU1_IRQ_XBAR_COUNT; |
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uint32_t uartBaseAddr = SOC_UART1_BASE; |
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#endif |
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#if defined (SOC_TDA3XX) || defined (SOC_DRA78x) |
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uint32_t irq_count = CSL_IPU1_IRQ_XBAR_COUNT; |
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uint32_t uartBaseAddr = SOC_UART3_BASE; |
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#endif |
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/* ========================================================================== */ |
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/* Internal Varialbes Definitions */ |
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/* ========================================================================== */ |
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static volatile uint32_t gCntValue = 10; |
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static volatile uint32_t gIsrSemaphore = 0; |
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static volatile uint32_t gXbarInst = 1; |
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static volatile uint32_t gNumSuccess = 0; |
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/* ========================================================================== */ |
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/* Internal Function Declarations */ |
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/* ========================================================================== */ |
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static void TimerPRCMConfigure(void); |
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static void TimerIntcInit(void); |
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static void TimerIntcDeInit(void); |
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static void TimerSetUp(void); |
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static void TimerIsr(void *handle); |
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static void TimerRun(void); |
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/* ========================================================================== */ |
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/* Function Definitions */ |
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/* ========================================================================== */ |
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void padConfig_prcmEnable() |
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{ |
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#if defined (SOC_AM574x) || defined (SOC_AM572x) || defined (SOC_AM571x) |
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/*Pad configurations */ |
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Board_initCfg boardCfg; |
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boardCfg = BOARD_INIT_UNLOCK_MMR | BOARD_INIT_UART_STDIO | |
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BOARD_INIT_MODULE_CLOCK | BOARD_INIT_PINMUX_CONFIG; |
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Board_init(boardCfg); |
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#endif |
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#if defined (SOC_TDA2XX) || defined (SOC_TDA2PX) || defined (SOC_TDA2EX) || defined (SOC_DRA72x) || defined (SOC_DRA75x) |
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/*Pad configurations */ |
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HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_UART1_RXD,0x00040000); |
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HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_UART1_TXD,0x00000000); |
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/* Initialize the UART Instance */ |
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UARTConfigInit(uartBaseAddr, BAUD_RATE_115200, UART_WORD_LENGTH_8, UART_STOP_BIT_1, UART_NO_PARITY, |
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UART_16x_MODE); |
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#endif |
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#if defined (SOC_TDA3XX) || defined (SOC_DRA78x) |
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/*Pad configurations */ |
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HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_IO_SPI1_SCLK,0x00040001); |
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HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_IO_SPI1_CS0,0x00000001); |
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/* Initialize the UART Instance */ |
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UARTConfigInit(uartBaseAddr, BAUD_RATE_115200, UART_WORD_LENGTH_8, UART_STOP_BIT_1, UART_NO_PARITY, |
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UART_16x_MODE); |
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#endif |
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} |
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int main(void) |
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{ |
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/* Do Pad Config for UART */ |
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padConfig_prcmEnable(); |
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/*Set PRCM for Timer4 */ |
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/*This is done in SBL, adding here to make the app standalone */ |
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TimerPRCMConfigure(); |
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#if defined (SOC_AM574x) || defined (SOC_AM572x) || defined (SOC_AM571x) |
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/*Set the timer reload count value */ |
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Timer_val(INP_CLK_FREQ, 50000U,1U); |
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#endif |
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UARTConfigPuts(uartBaseAddr,"\nTimer Application Running", -1); |
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/* Run the Timer irq_count times, |
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* increment gXbarInst in each iteration */ |
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for (gXbarInst = 1; gXbarInst <= irq_count; gXbarInst++) |
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{ |
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TimerRun(); |
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} |
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if (gNumSuccess == irq_count) |
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{ |
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UARTConfigPuts(uartBaseAddr,"\nAll Xbar instances for M4 are verified successfully", -1); |
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} |
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return 0; |
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} |
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static void TimerRun(void) |
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{ |
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/* Register Timer4 interrupts on to INTC */ |
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TimerIntcInit(); |
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/* Perform the necessary configurations for Timer4 */ |
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TimerSetUp(); |
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/* Enable the Timer4 interrupts */ |
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TIMERIntEnable(SOC_TIMER4_BASE, TIMER_INT_OVF_EN_FLAG); |
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/* Start the Timer */ |
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TIMEREnable(SOC_TIMER4_BASE); |
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UARTConfigPuts(uartBaseAddr,"\ncntValue:", -1); |
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while (gCntValue) |
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{ |
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if (gIsrSemaphore) |
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{ |
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gIsrSemaphore--; |
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UARTConfigPuts(uartBaseAddr," ", -1); |
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UARTConfigPutNum(uartBaseAddr,(int32_t)gCntValue); |
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} |
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} |
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/* Stop the Timer */ |
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TIMERDisable(SOC_TIMER4_BASE); |
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if (gCntValue == 0) |
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{ |
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UARTConfigPuts(uartBaseAddr,"\n|RESULT|SUCCESS|", -1); |
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} |
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else |
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{ |
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UARTConfigPuts(uartBaseAddr,"\n|RESULT|FAIL|", -1); |
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} |
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/* Unregister Timer4 interrupts */ |
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TimerIntcDeInit(); |
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} |
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/* |
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** Do the necessary Timer configurations on to INTC. |
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*/ |
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static void TimerIntcInit(void) |
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{ |
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CSL_xbarIrqConfigure(CSL_XBAR_IRQ_CPU_ID_IPU1,gXbarInst,CSL_XBAR_TIMER4_IRQ); |
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UARTConfigPuts(uartBaseAddr,"\nXBar is sucessfully connected to inst:", -1); |
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UARTConfigPutNum(uartBaseAddr,(int32_t)gXbarInst); |
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/* Initialize the interrupt control */ |
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Intc_Init(); |
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/* Enable the interrupt */ |
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Intc_IntEnable(0); |
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/* Registering TimerIsr */ |
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Intc_IntRegister(intrM4[gXbarInst - 1], (IntrFuncPtr) TimerIsr, NULL); |
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/* Set the priority */ |
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Intc_IntPrioritySet(intrM4[gXbarInst - 1], 1, 0); |
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/* Enable the system interrupt */ |
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Intc_SystemEnable(intrM4[gXbarInst - 1]); |
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} |
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/* |
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** Disable the interrupt configurations on INTC. |
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*/ |
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static void TimerIntcDeInit(void) |
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{ |
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/* Restore the initial state of gCntValue */ |
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gCntValue = 10; |
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/* Disconnect the XBar */ |
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CSL_xbarIrqConfigure(CSL_XBAR_IRQ_CPU_ID_IPU1,gXbarInst,CSL_XBAR_IRQ_MIN); |
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/* Disable the timer interrupt */ |
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Intc_SystemDisable(intrM4[gXbarInst - 1]); |
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/* Unregister the interrupt */ |
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Intc_IntUnregister(intrM4[gXbarInst - 1]); |
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} |
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/* |
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** Setup the timer for one-shot and compare mode. |
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*/ |
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static void TimerSetUp(void) |
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{ |
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/*Reset the timer module */ |
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TIMERReset(SOC_TIMER4_BASE); |
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/* Enable free run in emulation mode */ |
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TIMEREmuModeConfigure(SOC_TIMER4_BASE, TIMER_FREE); |
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/* Load the counter with the initial count value */ |
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TIMERCounterSet(SOC_TIMER4_BASE, TIMER_INITIAL_COUNT); |
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/* Load the load register with the reload count value */ |
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TIMERReloadSet(SOC_TIMER4_BASE, TIMER_RLD_COUNT); |
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/* Configure the Timer for Auto-reload and compare mode */ |
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TIMERModeConfigure(SOC_TIMER4_BASE, TIMER_AUTORLD_NOCMP_ENABLE); |
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/* Configure the posted mode of TIMER */ |
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TIMERPostedModeConfig(SOC_TIMER4_BASE, TIMER_NONPOSTED); |
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/* Configure the read mode of TIMER */ |
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TIMERReadModeConfig(SOC_TIMER4_BASE, TIMER_READ_MODE_NONPOSTED); |
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} |
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/* |
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** Timer interrupt service routine. This will send a character to serial |
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** console. |
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*/ |
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static void TimerIsr(void *handle) |
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{ |
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/* Disable the Timer interrupts */ |
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TIMERIntDisable(SOC_TIMER4_BASE, TIMER_INT_OVF_EN_FLAG); |
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/* Clear the status of the interrupt flags */ |
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TIMERIntStatusClear(SOC_TIMER4_BASE, TIMER_INT_OVF_IT_FLAG); |
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gIsrSemaphore++; |
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gCntValue--; |
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if (gCntValue == 0) |
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{ |
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UARTConfigPuts(uartBaseAddr," ", -1); |
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UARTConfigPutNum(uartBaseAddr,(int32_t) (gCntValue)); |
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gIsrSemaphore = 0; |
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gNumSuccess++; |
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} |
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/* Enable the Timer interrupts */ |
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TIMERIntEnable(SOC_TIMER4_BASE, TIMER_INT_OVF_EN_FLAG); |
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} |
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/* |
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** Timer4 PRCM configuration. This will explicitly enable the Timer4 module. |
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*/ |
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static void TimerPRCMConfigure(void) |
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{ |
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HW_WR_REG32(SOC_L4PER_CM_CORE_BASE + CM_L4PER_TIMER4_CLKCTRL, 0x2); |
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while ((HW_RD_REG32(SOC_L4PER_CM_CORE_BASE + |
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CM_L4PER_TIMER4_CLKCTRL) & (0x00030000)) != 0x0) ; |
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} |
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/* |
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** This function is used to find the timer count value |
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** required for the provided delay |
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** inp_clk is the input clock source of the timer. |
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** time unit is always micro seconds. |
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** prescl_val defines the timer prescale value. |
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*/ |
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#if defined (SOC_AM574x) || defined (SOC_AM572x) || defined (SOC_AM571x) |
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void Timer_val(uint32_t inp_clk, uint32_t delay, uint32_t prescl_val) |
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{ |
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uint32_t divisor = 1000000U, count = 0U; |
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divisor = divisor * prescl_val; |
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count = (inp_clk / divisor) * delay; |
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if(count <= 0xffffffffU) |
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{ |
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TIMER_INITIAL_COUNT = 0xffffffff - count; |
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TIMER_RLD_COUNT = 0xffffffff - count; |
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} |
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else |
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{ |
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TIMER_INITIAL_COUNT = 0U; |
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TIMER_RLD_COUNT = 0U; |
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} |
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} |
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#endif |
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/********************************* End of file ******************************/ |
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Test_UseCase_Timer_Sample_Code.c if defined (SOC_AM574x) || defined (SOC_AM572x) || defined (SOC_AM571x)
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uint32_t INP_CLK_FREQ = 20000000U;
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uint32_t TIMER_INITIAL_COUNT = 0U;
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uint32_t TIMER_RLD_COUNT = 0U;
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void Timer2_val(uint32_t inp_clk, uint32_t delay, uint32_t prescl_val);
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#else
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#define TIMER_INITIAL_COUNT (0xFFF00000U)
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#define TIMER_RLD_COUNT (0xFFF00000U)
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#endif
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void Set_Timer4(void);
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void Timer4PRCMConfigure(void);
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void Timer4IntcInit(void);
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void Timer4IntcDeInit(void);
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void Timer4SetUp(void);
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void Timer4Isr(void *handle);
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void Timer4Run(void);
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void Chains_Warning_Test(void)
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{
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char ch;
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Bool done;
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UInt32 start, end, diff;
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done = FALSE;
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Set_Timer4();
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while(!done)
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{
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Chains_showMainMenu(gChains_WarningTestMenu);
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ch = Chains_readChar();
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Vps_printf(" \r\n");
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switch(ch)
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{
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case '1':
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/* Get start ticks */
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start = BspOsal_getCurTimeInMsec();
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Vps_printf("Start tick = %d",start);
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break;
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case '2':
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/* Get start ticks */
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end = BspOsal_getCurTimeInMsec();
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Vps_printf("end tick = %d",end);
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diff = end - start;
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Vps_printf("Time duration = %d ms",diff);
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break;
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case '0':
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done = TRUE;
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break;
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}
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}
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}
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void Set_Timer4(void)
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{
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Vps_printf(" Enter %s.\r\n",__FUNCTION__);BspOsal_sleep((UInt32) 500U);
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Vps_printf(" Timer4PRCMConfigure()\r\n");BspOsal_sleep((UInt32) 500U);
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Timer4PRCMConfigure();
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#if defined (SOC_AM574x) || defined (SOC_AM572x) || defined (SOC_AM571x)
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/*Set the timer reload count value */
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Timer2_val(INP_CLK_FREQ, 50000U,1U);
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#endif
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Timer4Run();
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}
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void Timer4PRCMConfigure(void)
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{
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Vps_printf(" Enter %s.\r\n",__FUNCTION__);BspOsal_sleep((UInt32) 500U);
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HW_WR_REG32(SOC_L4PER_CM_CORE_BASE + CM_L4PER_TIMER4_CLKCTRL, 0x2);
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while ((HW_RD_REG32(SOC_L4PER_CM_CORE_BASE +
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CM_L4PER_TIMER4_CLKCTRL) & (0x00030000)) != 0x0) ;
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}
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void Timer4Run(void)
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{
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Uint32 Timer_count = 0;
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Uint32 Timer_count_Update_Interval = 0;
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Vps_printf(" Enter %s.\r\n",__FUNCTION__);BspOsal_sleep((UInt32) 500U);
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Vps_printf(" Register Timer4 interrupts on to INTC.\r\n");BspOsal_sleep((UInt32) 500U);
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/* Register Timer2 interrupts on to INTC */
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Timer4IntcInit();
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Vps_printf(" Perform the necessary configurations for Timer2.\r\n");BspOsal_sleep((UInt32) 500U);
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/* Perform the necessary configurations for Timer2 */
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Timer4SetUp();
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Vps_printf(" Enable the Timer2 interrupts.\r\n");BspOsal_sleep((UInt32) 500U);
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/* Enable the Timer2 interrupts */
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TIMERIntEnable(SOC_TIMER4_BASE, TIMER_INT_OVF_EN_FLAG);
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Vps_printf(" Start the Timer.\r\n");BspOsal_sleep((UInt32) 500U);
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/* Start the Timer */
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TIMEREnable(SOC_TIMER4_BASE);
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Vps_printf(" Enter while loop.\r\n");BspOsal_sleep((UInt32) 500U);
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Vps_printf("Current TC = %d",BspOsal_getCurTimeInMsec() / 1000);
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Timer_count = TIMERCounterGet(SOC_TIMER4_BASE);
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Vps_printf("%d sec TC = %d",Timer_count_Update_Interval, Timer_count);BspOsal_sleep((UInt32) 500U);
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while (gCntValue_T2)
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{
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Vps_printf("Current TC = %d",BspOsal_getCurTimeInMsec() / 1000);
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Timer_count = TIMERCounterGet(SOC_TIMER4_BASE);
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Vps_printf("%d sec TC = %d",Timer_count_Update_Interval, Timer_count);
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if(Timer_count_Update_Interval < (BspOsal_getCurTimeInMsec() / 1000))
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{
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Timer_count_Update_Interval++;
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Timer_count = TIMERCounterGet(SOC_TIMER4_BASE);
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Vps_printf("%d sec TC = %d",Timer_count_Update_Interval, Timer_count);
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}
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if (gIsrSemaphore_T2)
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{
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gIsrSemaphore_T2--;
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Vps_printf(" gIsrSemaphore_T2 = %d.\r\n",gIsrSemaphore_T2);//BspOsal_sleep((UInt32) 500U);
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}
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}
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Vps_printf(" TIMERDisable().\r\n");BspOsal_sleep((UInt32) 500U);
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/* Stop the Timer */
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TIMERDisable(SOC_TIMER4_BASE);
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Vps_printf(" TimerIntcDeInit().\r\n");BspOsal_sleep((UInt32) 500U);
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/* Unregister Timer2 interrupts */
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Timer4IntcDeInit();
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}
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/*
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** Do the necessary Timer configurations on to INTC.
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*/
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void Timer4IntcInit(void)
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{
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Vps_printf(" Enter %s.\r\n",__FUNCTION__);BspOsal_sleep((UInt32) 500U);
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Vps_printf(" Set XBar for Timer4.\r\n");BspOsal_sleep((UInt32) 500U);
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CSL_xbarIrqConfigure(CSL_XBAR_IRQ_CPU_ID_IPU1,gXbarInst_T2,CSL_XBAR_TIMER4_IRQ);
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Vps_printf(" Skip Intc_Init.\r\n");BspOsal_sleep((UInt32) 500U);
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/* Initialize the interrupt control */
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//Intc_Init();
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Vps_printf(" Enable the interrupt.\r\n");BspOsal_sleep((UInt32) 500U);
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/* Enable the interrupt */
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Intc_IntEnable(0);
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Vps_printf(" Registering TimerIsr.\r\n");BspOsal_sleep((UInt32) 500U);
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Vps_printf(" Int Number = %d.\r\n",intrM4[gXbarInst_T2 - 1]);BspOsal_sleep((UInt32) 500U);
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/* Registering TimerIsr */
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Intc_IntRegister(intrM4[gXbarInst_T2 - 1], (IntrFuncPtr) Timer4Isr, NULL);
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Vps_printf(" Set the priority.\r\n");BspOsal_sleep((UInt32) 500U);
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/* Set the priority */
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Intc_IntPrioritySet(intrM4[gXbarInst_T2 - 1], 1, 0);
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Vps_printf(" Enable the system interrupt.\r\n");BspOsal_sleep((UInt32) 500U);
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/* Enable the system interrupt */
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Intc_SystemEnable(intrM4[gXbarInst_T2 - 1]);
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}
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/*
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** Setup the timer for one-shot and compare mode.
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*/
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void Timer4SetUp(void)
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{
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Vps_printf(" Enter %s.\r\n",__FUNCTION__);BspOsal_sleep((UInt32) 500U);
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Vps_printf(" Reset the timer module.\r\n");BspOsal_sleep((UInt32) 500U);
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/*Reset the timer module */
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TIMERReset(SOC_TIMER4_BASE);
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Vps_printf(" Enable free run in emulation mode.\r\n");BspOsal_sleep((UInt32) 500U);
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/* Enable free run in emulation mode */
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TIMEREmuModeConfigure(SOC_TIMER4_BASE, TIMER_FREE);
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Vps_printf(" Load the counter with the initial count value.\r\n");BspOsal_sleep((UInt32) 500U);
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/* Load the counter with the initial count value */
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TIMERCounterSet(SOC_TIMER4_BASE, TIMER_INITIAL_COUNT);
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Vps_printf(" Load the load register with the reload count value.\r\n");BspOsal_sleep((UInt32) 500U);
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/* Load the load register with the reload count value */
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TIMERReloadSet(SOC_TIMER4_BASE, TIMER_RLD_COUNT);
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Vps_printf(" Configure the Timer for Auto-reload and compare mode.\r\n");BspOsal_sleep((UInt32) 500U);
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/* Configure the Timer for Auto-reload and compare mode */
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TIMERModeConfigure(SOC_TIMER4_BASE, TIMER_AUTORLD_NOCMP_ENABLE);
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Vps_printf(" Configure the posted mode of TIMER.\r\n");BspOsal_sleep((UInt32) 500U);
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/* Configure the posted mode of TIMER */
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TIMERPostedModeConfig(SOC_TIMER4_BASE, TIMER_NONPOSTED);
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Vps_printf(" Configure the read mode of TIMER.\r\n");BspOsal_sleep((UInt32) 500U);
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/* Configure the read mode of TIMER */
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TIMERReadModeConfig(SOC_TIMER4_BASE, TIMER_READ_MODE_NONPOSTED);
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}
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/*
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** Disable the interrupt configurations on INTC.
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*/
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void Timer4IntcDeInit(void)
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{
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Vps_printf(" Enter %s.\r\n",__FUNCTION__);
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/* Restore the initial state of gCntValue_T2 */
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gCntValue_T2 = 10;
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Vps_printf(" Disconnect the XBar.\r\n");
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/* Disconnect the XBar */
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CSL_xbarIrqConfigure(CSL_XBAR_IRQ_CPU_ID_IPU1,gXbarInst_T2,CSL_XBAR_IRQ_MIN);
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Vps_printf(" Disable the timer interrupt.\r\n");
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/* Disable the timer interrupt */
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Intc_SystemDisable(intrM4[gXbarInst_T2 - 1]);
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Vps_printf(" Unregister the interrupt.\r\n");
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/* Unregister the interrupt */
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Intc_IntUnregister(intrM4[gXbarInst_T2 - 1]);
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}
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|
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/*
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** This function is used to find the timer count value
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** required for the provided delay
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** inp_clk is the input clock source of the timer.
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** time unit is always micro seconds.
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** prescl_val defines the timer prescale value.
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*/
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#if defined (SOC_AM574x) || defined (SOC_AM572x) || defined (SOC_AM571x)
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void Timer4_val(uint32_t inp_clk, uint32_t delay, uint32_t prescl_val)
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|
{
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|
Vps_printf(" Enter %s.\r\n",__FUNCTION__);
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uint32_t divisor = 1000000U, count = 0U;
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divisor = divisor * prescl_val;
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count = (inp_clk / divisor) * delay;
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|
if(count <= 0xffffffffU)
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|
{
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|
TIMER_INITIAL_COUNT = 0xffffffff - count;
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TIMER_RLD_COUNT = 0xffffffff - count;
|
|
}
|
|
else
|
|
{
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|
TIMER_INITIAL_COUNT = 0U;
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|
TIMER_RLD_COUNT = 0U;
|
|
}
|
|
}
|
|
#endif
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|
|
/*
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|
** Timer interrupt service routine. This will send a character to serial
|
|
** console.
|
|
*/
|
|
void Timer4Isr(void *handle)
|
|
{
|
|
Vps_printf(" Enter %s.\r\n",__FUNCTION__);
|
|
|
|
/* Disable the Timer interrupts */
|
|
TIMERIntDisable(SOC_TIMER4_BASE, TIMER_INT_OVF_EN_FLAG);
|
|
|
|
/* Clear the status of the interrupt flags */
|
|
TIMERIntStatusClear(SOC_TIMER4_BASE, TIMER_INT_OVF_IT_FLAG);
|
|
|
|
gIsrSemaphore_T2++;
|
|
gCntValue_T2--;
|
|
|
|
if (gCntValue_T2 == 0)
|
|
{
|
|
gIsrSemaphore_T2 = 0;
|
|
gNumSuccess_T2++;
|
|
}
|
|
|
|
/* Enable the Timer interrupts */
|
|
TIMERIntEnable(SOC_TIMER4_BASE, TIMER_INT_OVF_EN_FLAG);
|
|
}
|
|
|
|
---------------------------------------------- System info: OS : RTOS platform: TDA2 SDK: v3.3 Attachment file: main_m4(TI SDK timer sample code) --- TI SDK v3.3 sample code Test_UseCase_Timer_Sample_Code --- Test timer setting by use case ---------------------------------------------- |
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Responses: |
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Hi Prince, You need to use OSAL for interrupts in Vision SDK. Please refer to threads: e2e.ti.com/.../2358890 e2e.ti.com/.../2205420 Regards, Rishabh |
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Hi Rishabh, Thanks for your reply. Have any OSAL information or document can sharing? |
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Hi, Can you please refer to header files. You can just grep OSAL in PDK. Regards, Rishabh |
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Hi Rishabh, I search OSAL and find the Utils_globalTimerInit API from $SDK_folder\vision_sdk\links_fw\src\rtos\utils_common\src\utils_global_time.c The API will register timer to generate interrupt per hour. /** ******************************************************************************* * * \brief Initializes the global timer for 1ms period. * * \return returns 0 on success * ******************************************************************************* */ Int32 Utils_globalTimerInit(void) { Utils_GlobalTimerObj *pClkObj; pClkObj = &gUtils_GlobalTimerObj; pClkObj->clkHandle = BspOsal_clockCreate( &Utils_globalTimerPrdFunc, COUNTER_32K_OVERFLOW_CHECK_TIMER_PERIOD_IN_MS, (Bool)FALSE, pClkObj ); UTILS_assert(pClkObj->clkHandle!=NULL); BspOsal_clockStart(pClkObj->clkHandle); return SYSTEM_LINK_STATUS_SOK; } I need one timer to generate interrupt per 100ms, could you please give me some advise? Thanks for your support. |
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Hi, You can use GP timer to generate an compare interrupt. You should modify TIMER_INITIAL_COUNT to get an interrupt every 100 ms. Regards, Rishabh |
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Hi Rishabh, How to use GP timer ? I have not find relative document or sample code. Could you please sharing more information to me? Many thanks. |
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Hi Prince, The example in your question is for general purpose timer (also known as only timer). Regards, Rishabh |
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Hi Rishabh, Thanks for your replay. I don't understand what different Utils_globalTimerInit with GP timer. Utils_globalTimerInit() need initialize at System_initCommon() that can workable and generate interrupt. GP timer I don't know how to setting after refer CSL sample code. Have any tutorial can sharing about GP timer? |
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Hi Prince, Global timer uses 32K Timer. You can check the Timers chapter in TDA2 TRM for different kind of timer and their description. Regards, Rishabh |
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Hi Rishabh, I will study from TRM first. Will create new ticket if I stuck in the problem after study. Thanks for your support. Have nice day. Prince. |
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Hi Prince, Ok thanks for the update. Regards, Rishabh |
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