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How many 3 to 8 line decoders with an enable input are needed to construct a 6 to 64 line decoder without using any other logic gates 7 8 9 10 | Decoder | 39 |
How many 3 to 8 line decoders with an enable input are needed to construct a 6 to 64 line decoder without using any other logic gates 7 8 9 10 | Decoder | 39 |
How many 3 to 8 line decoders with an enable input are needed to construct a 6 to 64 line decoder without using any other logic gates 7 8 9 10 | Decoder | 39 |
How many 3 to 8 line decoders with an enable input are needed to construct a 6 to 64 line decoder without using any other logic gates 7 8 9 10 | Decoder | 39 |
How many 3 to 8 line decoders with an enable input are needed to construct a 6 to 64 line decoder without using any other logic gates 7 8 9 10 | Decoder | 39 |
How many 3 to 8 line decoders with an enable input are needed to construct a 6 to 64 line decoder without using any other logic gates 7 8 9 10 | Decoder | 39 |
How many 3 to 8 line decoders with an enable input are needed to construct a 6 to 64 line decoder without using any other logic gates 7 8 9 10 | Decoder | 39 |
How many 3 to 8 line decoders with an enable input are needed to construct a 6 to 64 line decoder without using any other logic gates 7 8 9 10 | Decoder | 39 |
How many 3 to 8 line decoders with an enable input are needed to construct a 6 to 64 line decoder without using any other logic gates 7 8 9 10 | Decoder | 39 |
The 2 n vertices of a graph G corresponds to all subsets of a set of size n for n geq 6 Two vertices of G are adjacent if and only if the corresponding sets intersect in exactly two elements The number of vertices of degree zero in G is 1 n n 1 2 n | Degree Of Graph | 40 |
Show that all vertices in an undirected finite graph cannot have distinct degrees if the graph has at least two vertices | Degree Of Graph | 40 |
The degree sequence of a simple graph is the sequence of the degrees of the nodes in the graph in decreasing order Which of the following sequences can not be the degree sequence of any graph 7 6 5 4 4 3 2 1 6 6 6 6 3 3 2 2 7 6 6 4 4 3 2 2 8 7 7 6 4 2 1 1 I and II III and IV IV only II and IV | Degree Of Graph | 40 |
The 2 n vertices of a graph G corresponds to all subsets of a set of size n for n geq 6 Two vertices of G are adjacent if and only if the corresponding sets intersect in exactly two elements The maximum degree of a vertex in G is binom frac n 2 2 2 frac n 2 2 n 2 2 n 3 imes 3 2 n 1 | Degree Of Graph | 40 |
The determinant of the matrix given below is begin bmatrix 0 amp 1 amp 0 amp 2 1 amp 1 amp 1 amp 3 0 amp 0 amp 0 amp 1 1 amp 2 amp 0 amp 1 end bmatrix 1 0 1 2 | Determinant | 41 |
If the matrix A is such that A begin bmatrix 2 u22124 7 end bmatrix begin bmatrix 1 amp 9 amp 5 end bmatrix then the determinant of A is equal to ______ | Determinant | 41 |
The determinant of the matrix given below is begin bmatrix 0 amp 1 amp 0 amp 2 1 amp 1 amp 1 amp 3 0 amp 0 amp 0 amp 1 1 amp 2 amp 0 amp 1 end bmatrix 1 0 1 2 | Determinant | 41 |
The determinant of the matrix begin bmatrix 6 amp 8 amp 1 amp 1 0 amp 2 amp 4 amp 6 0 amp 0 amp 4 amp 8 0 amp 0 amp 0 amp 1 end bmatrix 11 48 0 24 | Determinant | 41 |
The determinant of the matrix given below is begin bmatrix 0 amp 1 amp 0 amp 2 1 amp 1 amp 1 amp 3 0 amp 0 amp 0 amp 1 1 amp 2 amp 0 amp 1 end bmatrix 1 0 1 2 | Determinant | 41 |
If the matrix A is such that A begin bmatrix 2 u22124 7 end bmatrix begin bmatrix 1 amp 9 amp 5 end bmatrix then the determinant of A is equal to ______ | Determinant | 41 |
If the matrix A is such that A begin bmatrix 2 u22124 7 end bmatrix begin bmatrix 1 amp 9 amp 5 end bmatrix then the determinant of A is equal to ______ | Determinant | 41 |
The determinant of the matrix begin bmatrix 2 amp 0 amp 0 amp 0 8 amp 1 amp 7 amp 2 2 amp 0 amp 2 amp 0 9 amp 0 amp 6 amp 1 end bmatrix 4 0 15 20 | Determinant | 41 |
The determinant of the matrix begin bmatrix 6 amp 8 amp 1 amp 1 0 amp 2 amp 4 amp 6 0 amp 0 amp 4 amp 8 0 amp 0 amp 0 amp 1 end bmatrix 11 48 0 24 | Determinant | 41 |
The determinant of the matrix given below is begin bmatrix 0 amp 1 amp 0 amp 2 1 amp 1 amp 1 amp 3 0 amp 0 amp 0 amp 1 1 amp 2 amp 0 amp 1 end bmatrix 1 0 1 2 | Determinant | 41 |
The determinant of the matrix begin bmatrix 6 amp 8 amp 1 amp 1 0 amp 2 amp 4 amp 6 0 amp 0 amp 4 amp 8 0 amp 0 amp 0 amp 1 end bmatrix 11 48 0 24 | Determinant | 41 |
Let the function f heta begin vmatrix sin heta amp cos heta amp an heta sin frac pi 6 amp cos frac pi 6 amp an frac pi 6 amp sin frac pi 3 amp cos frac pi 3 amp an frac pi 3 end vmatrix where heta in left frac pi 6 frac pi 3 right and f heta denote the derivative of f with respect to heta Which of the following statements is are TRUE There exists heta in frac pi 6 frac pi 3 such that f heta 0 There exists heta in frac pi 6 frac pi 3 such that f heta eq 0 I only II only Both I and II Neither I Nor II | Differentiability | 42 |
Let f be a function defined by f x begin cases x 2 amp ext for x leq 1 ax 2 bx c amp ext for 1 lt x leq 2 x d amp ext for x gt 2 end cases Find the values for the constants a b c and d so that f is continuous and differentiable everywhere on the real line | Differentiability | 42 |
Let the function f heta begin vmatrix sin heta amp cos heta amp an heta sin frac pi 6 amp cos frac pi 6 amp an frac pi 6 amp sin frac pi 3 amp cos frac pi 3 amp an frac pi 3 end vmatrix where heta in left frac pi 6 frac pi 3 right and f heta denote the derivative of f with respect to heta Which of the following statements is are TRUE There exists heta in frac pi 6 frac pi 3 such that f heta 0 There exists heta in frac pi 6 frac pi 3 such that f heta eq 0 I only II only Both I and II Neither I Nor II | Differentiability | 42 |
Let f be a function defined by f x begin cases x 2 amp ext for x leq 1 ax 2 bx c amp ext for 1 lt x leq 2 x d amp ext for x gt 2 end cases Find the values for the constants a b c and d so that f is continuous and differentiable everywhere on the real line | Differentiability | 42 |
If f x R sin frac pi x 2 S f u2019 frac 1 2 sqrt 2 and int_0 1 f x dx frac 2R pi then the constants R and S are frac 2 pi and frac 16 pi frac 2 pi and 0 frac 4 pi and 0 frac 4 pi and frac 16 pi | Differentiability | 42 |
Let f be a function defined by f x begin cases x 2 amp ext for x leq 1 ax 2 bx c amp ext for 1 lt x leq 2 x d amp ext for x gt 2 end cases Find the values for the constants a b c and d so that f is continuous and differentiable everywhere on the real line | Differentiability | 42 |
If f x R sin frac pi x 2 S f u2019 frac 1 2 sqrt 2 and int_0 1 f x dx frac 2R pi then the constants R and S are frac 2 pi and frac 16 pi frac 2 pi and 0 frac 4 pi and 0 frac 4 pi and frac 16 pi | Differentiability | 42 |
If f x R sin frac pi x 2 S f u2019 frac 1 2 sqrt 2 and int_0 1 f x dx frac 2R pi then the constants R and S are frac 2 pi and frac 16 pi frac 2 pi and 0 frac 4 pi and 0 frac 4 pi and frac 16 pi | Differentiability | 42 |
If f x R sin frac pi x 2 S f u2019 frac 1 2 sqrt 2 and int_0 1 f x dx frac 2R pi then the constants R and S are frac 2 pi and frac 16 pi frac 2 pi and 0 frac 4 pi and 0 frac 4 pi and frac 16 pi | Differentiability | 42 |
Let the function f heta begin vmatrix sin heta amp cos heta amp an heta sin frac pi 6 amp cos frac pi 6 amp an frac pi 6 amp sin frac pi 3 amp cos frac pi 3 amp an frac pi 3 end vmatrix where heta in left frac pi 6 frac pi 3 right and f heta denote the derivative of f with respect to heta Which of the following statements is are TRUE There exists heta in frac pi 6 frac pi 3 such that f heta 0 There exists heta in frac pi 6 frac pi 3 such that f heta eq 0 I only II only Both I and II Neither I Nor II | Differentiability | 42 |
If f x R sin frac pi x 2 S f u2019 frac 1 2 sqrt 2 and int_0 1 f x dx frac 2R pi then the constants R and S are frac 2 pi and frac 16 pi frac 2 pi and 0 frac 4 pi and 0 frac 4 pi and frac 16 pi | Differentiability | 42 |
A logic network has two data inputs A and B and two control inputs C_0 and C_1 It implements the function F according to the following table C_1 C_2 F 0 0 overline A B 0 1 A B 1 0 A oplus B Implement the circuit using one 4 to 1 Multiplexer one 2 input Exclusive OR gate one 2 input AND gate one 2 input OR gate and one Inverter | Digital Circuits | 43 |
In the following truth table V 1 if and only if the input is valid Inputs Outputs D_0 D_1 D_2 D_3 X_0 X_1 V 0 0 0 0 x x 0 1 0 0 0 0 0 1 x 1 0 0 0 1 1 x x 1 0 1 0 1 x x x 1 1 1 1 What function does the truth table represent Priority encoder Decoder Multiplexer Demultiplexer | Digital Circuits | 43 |
A logic network has two data inputs A and B and two control inputs C_0 and C_1 It implements the function F according to the following table C_1 C_2 F 0 0 overline A B 0 1 A B 1 0 A oplus B Implement the circuit using one 4 to 1 Multiplexer one 2 input Exclusive OR gate one 2 input AND gate one 2 input OR gate and one Inverter | Digital Circuits | 43 |
Consider the following combinational function block involving four Boolean variables x y a b where x a b are inputs and y is the output f x a b y if x is 1 y a else y b Which one of the following digital logic blocks is the most suitable for implementing this function Full adder Priority encoder Multiplexor Flip flop | Digital Circuits | 43 |
A logic network has two data inputs A and B and two control inputs C_0 and C_1 It implements the function F according to the following table C_1 C_2 F 0 0 overline A B 0 1 A B 1 0 A oplus B Implement the circuit using one 4 to 1 Multiplexer one 2 input Exclusive OR gate one 2 input AND gate one 2 input OR gate and one Inverter | Digital Circuits | 43 |
In the following truth table V 1 if and only if the input is valid Inputs Outputs D_0 D_1 D_2 D_3 X_0 X_1 V 0 0 0 0 x x 0 1 0 0 0 0 0 1 x 1 0 0 0 1 1 x x 1 0 1 0 1 x x x 1 1 1 1 What function does the truth table represent Priority encoder Decoder Multiplexer Demultiplexer | Digital Circuits | 43 |
A logic network has two data inputs A and B and two control inputs C_0 and C_1 It implements the function F according to the following table C_1 C_2 F 0 0 overline A B 0 1 A B 1 0 A oplus B Implement the circuit using one 4 to 1 Multiplexer one 2 input Exclusive OR gate one 2 input AND gate one 2 input OR gate and one Inverter | Digital Circuits | 43 |
In the following truth table V 1 if and only if the input is valid Inputs Outputs D_0 D_1 D_2 D_3 X_0 X_1 V 0 0 0 0 x x 0 1 0 0 0 0 0 1 x 1 0 0 0 1 1 x x 1 0 1 0 1 x x x 1 1 1 1 What function does the truth table represent Priority encoder Decoder Multiplexer Demultiplexer | Digital Circuits | 43 |
Consider the following combinational function block involving four Boolean variables x y a b where x a b are inputs and y is the output f x a b y if x is 1 y a else y b Which one of the following digital logic blocks is the most suitable for implementing this function Full adder Priority encoder Multiplexor Flip flop | Digital Circuits | 43 |
Consider the following combinational function block involving four Boolean variables x y a b where x a b are inputs and y is the output f x a b y if x is 1 y a else y b Which one of the following digital logic blocks is the most suitable for implementing this function Full adder Priority encoder Multiplexor Flip flop | Digital Circuits | 43 |
In the following truth table V 1 if and only if the input is valid Inputs Outputs D_0 D_1 D_2 D_3 X_0 X_1 V 0 0 0 0 x x 0 1 0 0 0 0 0 1 x 1 0 0 0 1 1 x x 1 0 1 0 1 x x x 1 1 1 1 What function does the truth table represent Priority encoder Decoder Multiplexer Demultiplexer | Digital Circuits | 43 |
In the following truth table V 1 if and only if the input is valid Inputs Outputs D_0 D_1 D_2 D_3 X_0 X_1 V 0 0 0 0 x x 0 1 0 0 0 0 0 1 x 1 0 0 0 1 1 x x 1 0 1 0 1 x x x 1 1 1 1 What function does the truth table represent Priority encoder Decoder Multiplexer Demultiplexer | Digital Circuits | 43 |
Consider a 4 bit Johnson counter with an initial value of 0000 The counting sequence of this counter is 0 1 3 7 15 14 12 8 0 0 1 3 5 7 9 11 13 15 0 0 2 4 6 8 10 12 14 0 0 8 12 14 15 7 3 1 0 | Digital Counter | 44 |
The minimum number of ext D flip flops needed to design a mod 258 counter is 9 8 512 258 | Digital Counter | 44 |
The next state table of a 2 bit saturating up counter is given below begin array cc cc Q_1 amp Q_0 amp Q_1 amp Q_0 hline 0 amp 0 amp 0 amp 1 0 amp 1 amp 1 amp 0 1 amp 0 amp 1 amp 1 1 amp 1 amp 1 amp 1 end array The counter is built as a synchronous sequential circuit using T flip flops The expressions for T_1 and T_0 are T_1 Q_1Q_0 quad T_0 bar Q_1 bar Q_0 T_1 bar Q_1 Q_0 quad T_0 bar Q_1 bar Q_0 T_1 Q_1 Q_0 quad T_0 bar Q_1 bar Q_0 T_1 bar Q_1 Q_0 quad T_0 Q_1 Q_0 | Digital Counter | 44 |
The minimum number of JK flip flops required to construct a synchronous counter with the count sequence 0 0 1 1 2 2 3 3 0 0 is _______ | Digital Counter | 44 |
Let k 2 n A circuit is built by giving the output of an n bit binary counter as input to an n ext to 2 n bit decoder This circuit is equivalent to a k bit binary up counter k bit binary down counter k bit ring counter k bit Johnson counter | Digital Counter | 44 |
We want to design a synchronous counter that counts the sequence 0 1 0 2 0 3 and then repeats The minimum number of ext J K flip flops required to implement this counter is _____________ | Digital Counter | 44 |
The next state table of a 2 bit saturating up counter is given below begin array cc cc Q_1 amp Q_0 amp Q_1 amp Q_0 hline 0 amp 0 amp 0 amp 1 0 amp 1 amp 1 amp 0 1 amp 0 amp 1 amp 1 1 amp 1 amp 1 amp 1 end array The counter is built as a synchronous sequential circuit using T flip flops The expressions for T_1 and T_0 are T_1 Q_1Q_0 quad T_0 bar Q_1 bar Q_0 T_1 bar Q_1 Q_0 quad T_0 bar Q_1 bar Q_0 T_1 Q_1 Q_0 quad T_0 bar Q_1 bar Q_0 T_1 bar Q_1 Q_0 quad T_0 Q_1 Q_0 | Digital Counter | 44 |
Consider the following two scenarios in the dining philosophers problem First a philosopher has to enter a room with the table that restricts the number of philosophers to four There is no restriction on the number of philosophers entering the room Which of the following is true Deadlock is possible in i and ii Deadlock is possible in i Starvation is possible in i Deadlock is not possible in ii Starvation is not possible in ii | Dining Philosopher | 45 |
Consider the following two scenarios in the dining philosophers problem First a philosopher has to enter a room with the table that restricts the number of philosophers to four There is no restriction on the number of philosophers entering the room Which of the following is true Deadlock is possible in i and ii Deadlock is possible in i Starvation is possible in i Deadlock is not possible in ii Starvation is not possible in ii | Dining Philosopher | 45 |
Consider the following two scenarios in the dining philosophers problem First a philosopher has to enter a room with the table that restricts the number of philosophers to four There is no restriction on the number of philosophers entering the room Which of the following is true Deadlock is possible in i and ii Deadlock is possible in i Starvation is possible in i Deadlock is not possible in ii Starvation is not possible in ii | Dining Philosopher | 45 |
Consider the following two scenarios in the dining philosophers problem First a philosopher has to enter a room with the table that restricts the number of philosophers to four There is no restriction on the number of philosophers entering the room Which of the following is true Deadlock is possible in i and ii Deadlock is possible in i Starvation is possible in i Deadlock is not possible in ii Starvation is not possible in ii | Dining Philosopher | 45 |
Consider the following two scenarios in the dining philosophers problem First a philosopher has to enter a room with the table that restricts the number of philosophers to four There is no restriction on the number of philosophers entering the room Which of the following is true Deadlock is possible in i and ii Deadlock is possible in i Starvation is possible in i Deadlock is not possible in ii Starvation is not possible in ii | Dining Philosopher | 45 |
Consider the following two scenarios in the dining philosophers problem First a philosopher has to enter a room with the table that restricts the number of philosophers to four There is no restriction on the number of philosophers entering the room Which of the following is true Deadlock is possible in i and ii Deadlock is possible in i Starvation is possible in i Deadlock is not possible in ii Starvation is not possible in ii | Dining Philosopher | 45 |
Consider the following two scenarios in the dining philosophers problem First a philosopher has to enter a room with the table that restricts the number of philosophers to four There is no restriction on the number of philosophers entering the room Which of the following is true Deadlock is possible in i and ii Deadlock is possible in i Starvation is possible in i Deadlock is not possible in ii Starvation is not possible in ii | Dining Philosopher | 45 |
Consider the following two scenarios in the dining philosophers problem First a philosopher has to enter a room with the table that restricts the number of philosophers to four There is no restriction on the number of philosophers entering the room Which of the following is true Deadlock is possible in i and ii Deadlock is possible in i Starvation is possible in i Deadlock is not possible in ii Starvation is not possible in ii | Dining Philosopher | 45 |
Consider the following two scenarios in the dining philosophers problem First a philosopher has to enter a room with the table that restricts the number of philosophers to four There is no restriction on the number of philosophers entering the room Which of the following is true Deadlock is possible in i and ii Deadlock is possible in i Starvation is possible in i Deadlock is not possible in ii Starvation is not possible in ii | Dining Philosopher | 45 |
Consider the following two scenarios in the dining philosophers problem First a philosopher has to enter a room with the table that restricts the number of philosophers to four There is no restriction on the number of philosophers entering the room Which of the following is true Deadlock is possible in i and ii Deadlock is possible in i Starvation is possible in i Deadlock is not possible in ii Starvation is not possible in ii | Dining Philosopher | 45 |
Consider the following two scenarios in the dining philosophers problem First a philosopher has to enter a room with the table that restricts the number of philosophers to four There is no restriction on the number of philosophers entering the room Which of the following is true Deadlock is possible in i and ii Deadlock is possible in i Starvation is possible in i Deadlock is not possible in ii Starvation is not possible in ii | Dining Philosopher | 45 |
Consider the following two scenarios in the dining philosophers problem First a philosopher has to enter a room with the table that restricts the number of philosophers to four There is no restriction on the number of philosophers entering the room Which of the following is true Deadlock is possible in i and ii Deadlock is possible in i Starvation is possible in i Deadlock is not possible in ii Starvation is not possible in ii | Dining Philosopher | 45 |
Consider the following two scenarios in the dining philosophers problem First a philosopher has to enter a room with the table that restricts the number of philosophers to four There is no restriction on the number of philosophers entering the room Which of the following is true Deadlock is possible in i and ii Deadlock is possible in i Starvation is possible in i Deadlock is not possible in ii Starvation is not possible in ii | Dining Philosopher | 45 |
Consider the following two scenarios in the dining philosophers problem First a philosopher has to enter a room with the table that restricts the number of philosophers to four There is no restriction on the number of philosophers entering the room Which of the following is true Deadlock is possible in i and ii Deadlock is possible in i Starvation is possible in i Deadlock is not possible in ii Starvation is not possible in ii | Dining Philosopher | 45 |
Four branches of a company are located at M N O and P M is north of N at a distance of 4 km P is south of O at a distance of 2 km N is southeast of O by 1 km What is the distance between M and P in km 5 34 6 74 28 5 45 49 | Direction Sense | 46 |
Four branches of a company are located at M N O and P M is north of N at a distance of 4 km P is south of O at a distance of 2 km N is southeast of O by 1 km What is the distance between M and P in km 5 34 6 74 28 5 45 49 | Direction Sense | 46 |
There are five buildings called V W X Y and Z in a row not necessarily in that order V is to the West of W Z is to the East of X and the West of V W is to the West of Y Which is the building in the middle V W X Y | Direction Sense | 46 |
There are five buildings called V W X Y and Z in a row not necessarily in that order V is to the West of W Z is to the East of X and the West of V W is to the West of Y Which is the building in the middle V W X Y | Direction Sense | 46 |
Four branches of a company are located at M N O and P M is north of N at a distance of 4 km P is south of O at a distance of 2 km N is southeast of O by 1 km What is the distance between M and P in km 5 34 6 74 28 5 45 49 | Direction Sense | 46 |
Four branches of a company are located at M N O and P M is north of N at a distance of 4 km P is south of O at a distance of 2 km N is southeast of O by 1 km What is the distance between M and P in km 5 34 6 74 28 5 45 49 | Direction Sense | 46 |
There are five buildings called V W X Y and Z in a row not necessarily in that order V is to the West of W Z is to the East of X and the West of V W is to the West of Y Which is the building in the middle V W X Y | Direction Sense | 46 |
Four branches of a company are located at M N O and P M is north of N at a distance of 4 km P is south of O at a distance of 2 km N is southeast of O by 1 km What is the distance between M and P in km 5 34 6 74 28 5 45 49 | Direction Sense | 46 |
Four branches of a company are located at M N O and P M is north of N at a distance of 4 km P is south of O at a distance of 2 km N is southeast of O by 1 km What is the distance between M and P in km 5 34 6 74 28 5 45 49 | Direction Sense | 46 |
Four branches of a company are located at M N O and P M is north of N at a distance of 4 km P is south of O at a distance of 2 km N is southeast of O by 1 km What is the distance between M and P in km 5 34 6 74 28 5 45 49 | Direction Sense | 46 |
Four branches of a company are located at M N O and P M is north of N at a distance of 4 km P is south of O at a distance of 2 km N is southeast of O by 1 km What is the distance between M and P in km 5 34 6 74 28 5 45 49 | Direction Sense | 46 |
Four branches of a company are located at M N O and P M is north of N at a distance of 4 km P is south of O at a distance of 2 km N is southeast of O by 1 km What is the distance between M and P in km 5 34 6 74 28 5 45 49 | Direction Sense | 46 |
There are five buildings called V W X Y and Z in a row not necessarily in that order V is to the West of W Z is to the East of X and the West of V W is to the West of Y Which is the building in the middle V W X Y | Direction Sense | 46 |
Suppose a disk has 201 cylinders numbered from 0 to 200 At some time the disk arm is at cylinder 100 and there is a queue of disk access requests for cylinders 30 85 90 100 105 110 135 and 145 If Shortest Seek Time First SSTF is being used for scheduling the disk access the request for cylinder 90 is serviced after servicing ____________ number of requests | Disk Scheduling | 47 |
The head of a moving head disk with 100 tracks numbered 0 to 99 is currently serving a request at track 55 If the queue of requests kept in FIFO order is 10 70 75 23 65 which of the two disk scheduling algorithms FCFS First Come First Served and SSTF Shortest Seek Time First will require less head movement Find the head movement for each of the algorithms | Disk Scheduling | 47 |
Suppose a disk has 201 cylinders numbered from 0 to 200 At some time the disk arm is at cylinder 100 and there is a queue of disk access requests for cylinders 30 85 90 100 105 110 135 and 145 If Shortest Seek Time First SSTF is being used for scheduling the disk access the request for cylinder 90 is serviced after servicing ____________ number of requests | Disk Scheduling | 47 |
Consider an operating system capable of loading and executing a single sequential user process at a time The disk head scheduling algorithm used is First Come First Served FCFS If FCFS is replaced by Shortest Seek Time First SSTF claimed by the vendor to give 50 better benchmark results what is the expected improvement in the I O performance of user programs 50 40 25 0 | Disk Scheduling | 47 |
The dual of a Boolean function F x_1 x_2 dots x_n written as F D is the same expression as that of F with and u22c5 swapped F is said to be self dual if F F D The number of self dual functions with n Boolean variables is 2 n 2 n 1 2 2 n 2 2 n 1 | Dual Function | 48 |
The dual of a Boolean function F x_1 x_2 dots x_n written as F D is the same expression as that of F with and u22c5 swapped F is said to be self dual if F F D The number of self dual functions with n Boolean variables is 2 n 2 n 1 2 2 n 2 2 n 1 | Dual Function | 48 |
The dual of a Boolean function F x_1 x_2 dots x_n written as F D is the same expression as that of F with and u22c5 swapped F is said to be self dual if F F D The number of self dual functions with n Boolean variables is 2 n 2 n 1 2 2 n 2 2 n 1 | Dual Function | 48 |
The dual of a Boolean function F x_1 x_2 dots x_n written as F D is the same expression as that of F with and u22c5 swapped F is said to be self dual if F F D The number of self dual functions with n Boolean variables is 2 n 2 n 1 2 2 n 2 2 n 1 | Dual Function | 48 |
The dual of a Boolean function F x_1 x_2 dots x_n written as F D is the same expression as that of F with and u22c5 swapped F is said to be self dual if F F D The number of self dual functions with n Boolean variables is 2 n 2 n 1 2 2 n 2 2 n 1 | Dual Function | 48 |
The dual of a Boolean function F x_1 x_2 dots x_n written as F D is the same expression as that of F with and u22c5 swapped F is said to be self dual if F F D The number of self dual functions with n Boolean variables is 2 n 2 n 1 2 2 n 2 2 n 1 | Dual Function | 48 |
The dual of a Boolean function F x_1 x_2 dots x_n written as F D is the same expression as that of F with and u22c5 swapped F is said to be self dual if F F D The number of self dual functions with n Boolean variables is 2 n 2 n 1 2 2 n 2 2 n 1 | Dual Function | 48 |
The dual of a Boolean function F x_1 x_2 dots x_n written as F D is the same expression as that of F with and u22c5 swapped F is said to be self dual if F F D The number of self dual functions with n Boolean variables is 2 n 2 n 1 2 2 n 2 2 n 1 | Dual Function | 48 |
The dual of a Boolean function F x_1 x_2 dots x_n written as F D is the same expression as that of F with and u22c5 swapped F is said to be self dual if F F D The number of self dual functions with n Boolean variables is 2 n 2 n 1 2 2 n 2 2 n 1 | Dual Function | 48 |
The dual of a Boolean function F x_1 x_2 dots x_n written as F D is the same expression as that of F with and u22c5 swapped F is said to be self dual if F F D The number of self dual functions with n Boolean variables is 2 n 2 n 1 2 2 n 2 2 n 1 | Dual Function | 48 |
The dual of a Boolean function F x_1 x_2 dots x_n written as F D is the same expression as that of F with and u22c5 swapped F is said to be self dual if F F D The number of self dual functions with n Boolean variables is 2 n 2 n 1 2 2 n 2 2 n 1 | Dual Function | 48 |
The dual of a Boolean function F x_1 x_2 dots x_n written as F D is the same expression as that of F with and u22c5 swapped F is said to be self dual if F F D The number of self dual functions with n Boolean variables is 2 n 2 n 1 2 2 n 2 2 n 1 | Dual Function | 48 |
The dual of a Boolean function F x_1 x_2 dots x_n written as F D is the same expression as that of F with and u22c5 swapped F is said to be self dual if F F D The number of self dual functions with n Boolean variables is 2 n 2 n 1 2 2 n 2 2 n 1 | Dual Function | 48 |
The dual of a Boolean function F x_1 x_2 dots x_n written as F D is the same expression as that of F with and u22c5 swapped F is said to be self dual if F F D The number of self dual functions with n Boolean variables is 2 n 2 n 1 2 2 n 2 2 n 1 | Dual Function | 48 |
Suppose the time to service a page fault is on the average 10 milliseconds while a memory access takes 1 microsecond Then a 99 99 hit ratio results in average memory access time of 1 9999 milliseconds 1 millisecond 9 999 microseconds 1 9999 microseconds | Effective Memory Access | 49 |
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