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DetectVul 2

static int adpcm_encode_frame(AVCodecContext *avctx, AVPacket *avpkt, const AVFrame *frame, int *got_packet_ptr) { int n, i, ch, st, pkt_size, ret; const int16_t *samples; int16_t **samples_p; uint8_t *dst; ADPCMEncodeContext *c = avctx->priv_data; uint8_t *buf; samples = (const int16_t *)frame->data[0]; samples_p = (int16_t **)frame->extended_data; st = avctx->channels == 2; if (avctx->codec_id == AV_CODEC_ID_ADPCM_SWF) pkt_size = (2 + avctx->channels * (22 + 4 * (frame->nb_samples - 1)) + 7) / 8; else pkt_size = avctx->block_align; if ((ret = ff_alloc_packet(avpkt, pkt_size))) { av_log(avctx, AV_LOG_ERROR, "Error getting output packet\n"); return ret; } dst = avpkt->data; switch(avctx->codec->id) { case AV_CODEC_ID_ADPCM_IMA_WAV: { int blocks, j; blocks = (frame->nb_samples - 1) / 8; for (ch = 0; ch < avctx->channels; ch++) { ADPCMChannelStatus *status = &c->status[ch]; status->prev_sample = samples_p[ch][0]; /* status->step_index = 0; XXX: not sure how to init the state machine */ bytestream_put_le16(&dst, status->prev_sample); *dst++ = status->step_index; *dst++ = 0; /* unknown */ } /* stereo: 4 bytes (8 samples) for left, 4 bytes for right */ if (avctx->trellis > 0) { FF_ALLOC_OR_GOTO(avctx, buf, avctx->channels * blocks * 8, error); for (ch = 0; ch < avctx->channels; ch++) { adpcm_compress_trellis(avctx, &samples_p[ch][1], buf + ch * blocks * 8, &c->status[ch], blocks * 8, 1); } for (i = 0; i < blocks; i++) { for (ch = 0; ch < avctx->channels; ch++) { uint8_t *buf1 = buf + ch * blocks * 8 + i * 8; for (j = 0; j < 8; j += 2) *dst++ = buf1[j] | (buf1[j + 1] << 4); } } av_free(buf); } else { for (i = 0; i < blocks; i++) { for (ch = 0; ch < avctx->channels; ch++) { ADPCMChannelStatus *status = &c->status[ch]; const int16_t *smp = &samples_p[ch][1 + i * 8]; for (j = 0; j < 8; j += 2) { uint8_t v = adpcm_ima_compress_sample(status, smp[j ]); v |= adpcm_ima_compress_sample(status, smp[j + 1]) << 4; *dst++ = v; } } } } break; } case AV_CODEC_ID_ADPCM_IMA_QT: { PutBitContext pb; init_put_bits(&pb, dst, pkt_size * 8); for (ch = 0; ch < avctx->channels; ch++) { ADPCMChannelStatus *status = &c->status[ch]; put_bits(&pb, 9, (status->prev_sample & 0xFFFF) >> 7); put_bits(&pb, 7, status->step_index); if (avctx->trellis > 0) { uint8_t buf[64]; adpcm_compress_trellis(avctx, &samples_p[ch][1], buf, status, 64, 1); for (i = 0; i < 64; i++) put_bits(&pb, 4, buf[i ^ 1]); } else { for (i = 0; i < 64; i += 2) { int t1, t2; t1 = adpcm_ima_qt_compress_sample(status, samples_p[ch][i ]); t2 = adpcm_ima_qt_compress_sample(status, samples_p[ch][i + 1]); put_bits(&pb, 4, t2); put_bits(&pb, 4, t1); } } } flush_put_bits(&pb); break; } case AV_CODEC_ID_ADPCM_SWF: { PutBitContext pb; init_put_bits(&pb, dst, pkt_size * 8); n = frame->nb_samples - 1; // store AdpcmCodeSize put_bits(&pb, 2, 2); // set 4-bit flash adpcm format // init the encoder state for (i = 0; i < avctx->channels; i++) { // clip step so it fits 6 bits c->status[i].step_index = av_clip(c->status[i].step_index, 0, 63); put_sbits(&pb, 16, samples[i]); put_bits(&pb, 6, c->status[i].step_index); c->status[i].prev_sample = samples[i]; } if (avctx->trellis > 0) { FF_ALLOC_OR_GOTO(avctx, buf, 2 * n, error); adpcm_compress_trellis(avctx, samples + avctx->channels, buf, &c->status[0], n, avctx->channels); if (avctx->channels == 2) adpcm_compress_trellis(avctx, samples + avctx->channels + 1, buf + n, &c->status[1], n, avctx->channels); for (i = 0; i < n; i++) { put_bits(&pb, 4, buf[i]); if (avctx->channels == 2) put_bits(&pb, 4, buf[n + i]); } av_free(buf); } else { for (i = 1; i < frame->nb_samples; i++) { put_bits(&pb, 4, adpcm_ima_compress_sample(&c->status[0], samples[avctx->channels * i])); if (avctx->channels == 2) put_bits(&pb, 4, adpcm_ima_compress_sample(&c->status[1], samples[2 * i + 1])); } } flush_put_bits(&pb); break; } case AV_CODEC_ID_ADPCM_MS: for (i = 0; i < avctx->channels; i++) { int predictor = 0; *dst++ = predictor; c->status[i].coeff1 = ff_adpcm_AdaptCoeff1[predictor]; c->status[i].coeff2 = ff_adpcm_AdaptCoeff2[predictor]; } for (i = 0; i < avctx->channels; i++) { if (c->status[i].idelta < 16) c->status[i].idelta = 16; bytestream_put_le16(&dst, c->status[i].idelta); } for (i = 0; i < avctx->channels; i++) c->status[i].sample2= *samples++; for (i = 0; i < avctx->channels; i++) { c->status[i].sample1 = *samples++; bytestream_put_le16(&dst, c->status[i].sample1); } for (i = 0; i < avctx->channels; i++) bytestream_put_le16(&dst, c->status[i].sample2); if (avctx->trellis > 0) { n = avctx->block_align - 7 * avctx->channels; FF_ALLOC_OR_GOTO(avctx, buf, 2 * n, error); if (avctx->channels == 1) { adpcm_compress_trellis(avctx, samples, buf, &c->status[0], n, avctx->channels); for (i = 0; i < n; i += 2) *dst++ = (buf[i] << 4) | buf[i + 1]; } else { adpcm_compress_trellis(avctx, samples, buf, &c->status[0], n, avctx->channels); adpcm_compress_trellis(avctx, samples + 1, buf + n, &c->status[1], n, avctx->channels); for (i = 0; i < n; i++) *dst++ = (buf[i] << 4) | buf[n + i]; } av_free(buf); } else { for (i = 7 * avctx->channels; i < avctx->block_align; i++) { int nibble; nibble = adpcm_ms_compress_sample(&c->status[ 0], *samples++) << 4; nibble |= adpcm_ms_compress_sample(&c->status[st], *samples++); *dst++ = nibble; } } break; case AV_CODEC_ID_ADPCM_YAMAHA: n = frame->nb_samples / 2; if (avctx->trellis > 0) { FF_ALLOC_OR_GOTO(avctx, buf, 2 * n * 2, error); n *= 2; if (avctx->channels == 1) { adpcm_compress_trellis(avctx, samples, buf, &c->status[0], n, avctx->channels); for (i = 0; i < n; i += 2) *dst++ = buf[i] | (buf[i + 1] << 4); } else { adpcm_compress_trellis(avctx, samples, buf, &c->status[0], n, avctx->channels); adpcm_compress_trellis(avctx, samples + 1, buf + n, &c->status[1], n, avctx->channels); for (i = 0; i < n; i++) *dst++ = buf[i] | (buf[n + i] << 4); } av_free(buf); } else for (n *= avctx->channels; n > 0; n--) { int nibble; nibble = adpcm_yamaha_compress_sample(&c->status[ 0], *samples++); nibble |= adpcm_yamaha_compress_sample(&c->status[st], *samples++) << 4; *dst++ = nibble; } break; default: return AVERROR(EINVAL); } avpkt->size = pkt_size; *got_packet_ptr = 1; return 0; error: return AVERROR(ENOMEM); }

FFmpeg

3d79d0c93e5b37a35b1b22d6c18699c233aad1ba

static int adpcm_encode_frame(AVCodecContext *avctx, AVPacket *avpkt, const AVFrame *frame, int *got_packet_ptr) { int n, i, ch, st, pkt_size, ret; const int16_t *samples; int16_t **samples_p; uint8_t *dst; ADPCMEncodeContext *c = avctx->priv_data; uint8_t *buf; samples = (const int16_t *)frame->data[0]; samples_p = (int16_t **)frame->extended_data; st = avctx->channels == 2; if (avctx->codec_id == AV_CODEC_ID_ADPCM_SWF) pkt_size = (2 + avctx->channels * (22 + 4 * (frame->nb_samples - 1)) + 7) / 8; else pkt_size = avctx->block_align; if ((ret = ff_alloc_packet(avpkt, pkt_size))) { av_log(avctx, AV_LOG_ERROR, "Error getting output packet\n"); return ret; } dst = avpkt->data; switch(avctx->codec->id) { case AV_CODEC_ID_ADPCM_IMA_WAV: { int blocks, j; blocks = (frame->nb_samples - 1) / 8; for (ch = 0; ch < avctx->channels; ch++) { ADPCMChannelStatus *status = &c->status[ch]; status->prev_sample = samples_p[ch][0]; bytestream_put_le16(&dst, status->prev_sample); *dst++ = status->step_index; *dst++ = 0; } if (avctx->trellis > 0) { FF_ALLOC_OR_GOTO(avctx, buf, avctx->channels * blocks * 8, error); for (ch = 0; ch < avctx->channels; ch++) { adpcm_compress_trellis(avctx, &samples_p[ch][1], buf + ch * blocks * 8, &c->status[ch], blocks * 8, 1); } for (i = 0; i < blocks; i++) { for (ch = 0; ch < avctx->channels; ch++) { uint8_t *buf1 = buf + ch * blocks * 8 + i * 8; for (j = 0; j < 8; j += 2) *dst++ = buf1[j] | (buf1[j + 1] << 4); } } av_free(buf); } else { for (i = 0; i < blocks; i++) { for (ch = 0; ch < avctx->channels; ch++) { ADPCMChannelStatus *status = &c->status[ch]; const int16_t *smp = &samples_p[ch][1 + i * 8]; for (j = 0; j < 8; j += 2) { uint8_t v = adpcm_ima_compress_sample(status, smp[j ]); v |= adpcm_ima_compress_sample(status, smp[j + 1]) << 4; *dst++ = v; } } } } break; } case AV_CODEC_ID_ADPCM_IMA_QT: { PutBitContext pb; init_put_bits(&pb, dst, pkt_size * 8); for (ch = 0; ch < avctx->channels; ch++) { ADPCMChannelStatus *status = &c->status[ch]; put_bits(&pb, 9, (status->prev_sample & 0xFFFF) >> 7); put_bits(&pb, 7, status->step_index); if (avctx->trellis > 0) { uint8_t buf[64]; adpcm_compress_trellis(avctx, &samples_p[ch][1], buf, status, 64, 1); for (i = 0; i < 64; i++) put_bits(&pb, 4, buf[i ^ 1]); } else { for (i = 0; i < 64; i += 2) { int t1, t2; t1 = adpcm_ima_qt_compress_sample(status, samples_p[ch][i ]); t2 = adpcm_ima_qt_compress_sample(status, samples_p[ch][i + 1]); put_bits(&pb, 4, t2); put_bits(&pb, 4, t1); } } } flush_put_bits(&pb); break; } case AV_CODEC_ID_ADPCM_SWF: { PutBitContext pb; init_put_bits(&pb, dst, pkt_size * 8); n = frame->nb_samples - 1; put_bits(&pb, 2, 2); for (i = 0; i < avctx->channels; i++) { c->status[i].step_index = av_clip(c->status[i].step_index, 0, 63); put_sbits(&pb, 16, samples[i]); put_bits(&pb, 6, c->status[i].step_index); c->status[i].prev_sample = samples[i]; } if (avctx->trellis > 0) { FF_ALLOC_OR_GOTO(avctx, buf, 2 * n, error); adpcm_compress_trellis(avctx, samples + avctx->channels, buf, &c->status[0], n, avctx->channels); if (avctx->channels == 2) adpcm_compress_trellis(avctx, samples + avctx->channels + 1, buf + n, &c->status[1], n, avctx->channels); for (i = 0; i < n; i++) { put_bits(&pb, 4, buf[i]); if (avctx->channels == 2) put_bits(&pb, 4, buf[n + i]); } av_free(buf); } else { for (i = 1; i < frame->nb_samples; i++) { put_bits(&pb, 4, adpcm_ima_compress_sample(&c->status[0], samples[avctx->channels * i])); if (avctx->channels == 2) put_bits(&pb, 4, adpcm_ima_compress_sample(&c->status[1], samples[2 * i + 1])); } } flush_put_bits(&pb); break; } case AV_CODEC_ID_ADPCM_MS: for (i = 0; i < avctx->channels; i++) { int predictor = 0; *dst++ = predictor; c->status[i].coeff1 = ff_adpcm_AdaptCoeff1[predictor]; c->status[i].coeff2 = ff_adpcm_AdaptCoeff2[predictor]; } for (i = 0; i < avctx->channels; i++) { if (c->status[i].idelta < 16) c->status[i].idelta = 16; bytestream_put_le16(&dst, c->status[i].idelta); } for (i = 0; i < avctx->channels; i++) c->status[i].sample2= *samples++; for (i = 0; i < avctx->channels; i++) { c->status[i].sample1 = *samples++; bytestream_put_le16(&dst, c->status[i].sample1); } for (i = 0; i < avctx->channels; i++) bytestream_put_le16(&dst, c->status[i].sample2); if (avctx->trellis > 0) { n = avctx->block_align - 7 * avctx->channels; FF_ALLOC_OR_GOTO(avctx, buf, 2 * n, error); if (avctx->channels == 1) { adpcm_compress_trellis(avctx, samples, buf, &c->status[0], n, avctx->channels); for (i = 0; i < n; i += 2) *dst++ = (buf[i] << 4) | buf[i + 1]; } else { adpcm_compress_trellis(avctx, samples, buf, &c->status[0], n, avctx->channels); adpcm_compress_trellis(avctx, samples + 1, buf + n, &c->status[1], n, avctx->channels); for (i = 0; i < n; i++) *dst++ = (buf[i] << 4) | buf[n + i]; } av_free(buf); } else { for (i = 7 * avctx->channels; i < avctx->block_align; i++) { int nibble; nibble = adpcm_ms_compress_sample(&c->status[ 0], *samples++) << 4; nibble |= adpcm_ms_compress_sample(&c->status[st], *samples++); *dst++ = nibble; } } break; case AV_CODEC_ID_ADPCM_YAMAHA: n = frame->nb_samples / 2; if (avctx->trellis > 0) { FF_ALLOC_OR_GOTO(avctx, buf, 2 * n * 2, error); n *= 2; if (avctx->channels == 1) { adpcm_compress_trellis(avctx, samples, buf, &c->status[0], n, avctx->channels); for (i = 0; i < n; i += 2) *dst++ = buf[i] | (buf[i + 1] << 4); } else { adpcm_compress_trellis(avctx, samples, buf, &c->status[0], n, avctx->channels); adpcm_compress_trellis(avctx, samples + 1, buf + n, &c->status[1], n, avctx->channels); for (i = 0; i < n; i++) *dst++ = buf[i] | (buf[n + i] << 4); } av_free(buf); } else for (n *= avctx->channels; n > 0; n--) { int nibble; nibble = adpcm_yamaha_compress_sample(&c->status[ 0], *samples++); nibble |= adpcm_yamaha_compress_sample(&c->status[st], *samples++) << 4; *dst++ = nibble; } break; default: return AVERROR(EINVAL); } avpkt->size = pkt_size; *got_packet_ptr = 1; return 0; error: return AVERROR(ENOMEM); }

static int FUNC_0(AVCodecContext *VAR_0, AVPacket *VAR_1, const AVFrame *VAR_2, int *VAR_3) { int VAR_4, VAR_5, VAR_6, VAR_7, VAR_8, VAR_9; const int16_t *VAR_10; int16_t **samples_p; uint8_t *dst; ADPCMEncodeContext *c = VAR_0->priv_data; uint8_t *buf; VAR_10 = (const int16_t *)VAR_2->data[0]; samples_p = (int16_t **)VAR_2->extended_data; VAR_7 = VAR_0->channels == 2; if (VAR_0->codec_id == AV_CODEC_ID_ADPCM_SWF) VAR_8 = (2 + VAR_0->channels * (22 + 4 * (VAR_2->nb_samples - 1)) + 7) / 8; else VAR_8 = VAR_0->block_align; if ((VAR_9 = ff_alloc_packet(VAR_1, VAR_8))) { av_log(VAR_0, AV_LOG_ERROR, "Error getting output packet\VAR_4"); return VAR_9; } dst = VAR_1->data; switch(VAR_0->codec->id) { case AV_CODEC_ID_ADPCM_IMA_WAV: { int VAR_11, VAR_12; VAR_11 = (VAR_2->nb_samples - 1) / 8; for (VAR_6 = 0; VAR_6 < VAR_0->channels; VAR_6++) { ADPCMChannelStatus *status = &c->status[VAR_6]; status->prev_sample = samples_p[VAR_6][0]; bytestream_put_le16(&dst, status->prev_sample); *dst++ = status->step_index; *dst++ = 0; } if (VAR_0->trellis > 0) { FF_ALLOC_OR_GOTO(VAR_0, buf, VAR_0->channels * VAR_11 * 8, error); for (VAR_6 = 0; VAR_6 < VAR_0->channels; VAR_6++) { adpcm_compress_trellis(VAR_0, &samples_p[VAR_6][1], buf + VAR_6 * VAR_11 * 8, &c->status[VAR_6], VAR_11 * 8, 1); } for (VAR_5 = 0; VAR_5 < VAR_11; VAR_5++) { for (VAR_6 = 0; VAR_6 < VAR_0->channels; VAR_6++) { uint8_t *buf1 = buf + VAR_6 * VAR_11 * 8 + VAR_5 * 8; for (VAR_12 = 0; VAR_12 < 8; VAR_12 += 2) *dst++ = buf1[VAR_12] | (buf1[VAR_12 + 1] << 4); } } av_free(buf); } else { for (VAR_5 = 0; VAR_5 < VAR_11; VAR_5++) { for (VAR_6 = 0; VAR_6 < VAR_0->channels; VAR_6++) { ADPCMChannelStatus *status = &c->status[VAR_6]; const int16_t *smp = &samples_p[VAR_6][1 + VAR_5 * 8]; for (VAR_12 = 0; VAR_12 < 8; VAR_12 += 2) { uint8_t v = adpcm_ima_compress_sample(status, smp[VAR_12 ]); v |= adpcm_ima_compress_sample(status, smp[VAR_12 + 1]) << 4; *dst++ = v; } } } } break; } case AV_CODEC_ID_ADPCM_IMA_QT: { PutBitContext pb; init_put_bits(&pb, dst, VAR_8 * 8); for (VAR_6 = 0; VAR_6 < VAR_0->channels; VAR_6++) { ADPCMChannelStatus *status = &c->status[VAR_6]; put_bits(&pb, 9, (status->prev_sample & 0xFFFF) >> 7); put_bits(&pb, 7, status->step_index); if (VAR_0->trellis > 0) { uint8_t buf[64]; adpcm_compress_trellis(VAR_0, &samples_p[VAR_6][1], buf, status, 64, 1); for (VAR_5 = 0; VAR_5 < 64; VAR_5++) put_bits(&pb, 4, buf[VAR_5 ^ 1]); } else { for (VAR_5 = 0; VAR_5 < 64; VAR_5 += 2) { int t1, t2; t1 = adpcm_ima_qt_compress_sample(status, samples_p[VAR_6][VAR_5 ]); t2 = adpcm_ima_qt_compress_sample(status, samples_p[VAR_6][VAR_5 + 1]); put_bits(&pb, 4, t2); put_bits(&pb, 4, t1); } } } flush_put_bits(&pb); break; } case AV_CODEC_ID_ADPCM_SWF: { PutBitContext pb; init_put_bits(&pb, dst, VAR_8 * 8); VAR_4 = VAR_2->nb_samples - 1; put_bits(&pb, 2, 2); for (VAR_5 = 0; VAR_5 < VAR_0->channels; VAR_5++) { c->status[VAR_5].step_index = av_clip(c->status[VAR_5].step_index, 0, 63); put_sbits(&pb, 16, VAR_10[VAR_5]); put_bits(&pb, 6, c->status[VAR_5].step_index); c->status[VAR_5].prev_sample = VAR_10[VAR_5]; } if (VAR_0->trellis > 0) { FF_ALLOC_OR_GOTO(VAR_0, buf, 2 * VAR_4, error); adpcm_compress_trellis(VAR_0, VAR_10 + VAR_0->channels, buf, &c->status[0], VAR_4, VAR_0->channels); if (VAR_0->channels == 2) adpcm_compress_trellis(VAR_0, VAR_10 + VAR_0->channels + 1, buf + VAR_4, &c->status[1], VAR_4, VAR_0->channels); for (VAR_5 = 0; VAR_5 < VAR_4; VAR_5++) { put_bits(&pb, 4, buf[VAR_5]); if (VAR_0->channels == 2) put_bits(&pb, 4, buf[VAR_4 + VAR_5]); } av_free(buf); } else { for (VAR_5 = 1; VAR_5 < VAR_2->nb_samples; VAR_5++) { put_bits(&pb, 4, adpcm_ima_compress_sample(&c->status[0], VAR_10[VAR_0->channels * VAR_5])); if (VAR_0->channels == 2) put_bits(&pb, 4, adpcm_ima_compress_sample(&c->status[1], VAR_10[2 * VAR_5 + 1])); } } flush_put_bits(&pb); break; } case AV_CODEC_ID_ADPCM_MS: for (VAR_5 = 0; VAR_5 < VAR_0->channels; VAR_5++) { int predictor = 0; *dst++ = predictor; c->status[VAR_5].coeff1 = ff_adpcm_AdaptCoeff1[predictor]; c->status[VAR_5].coeff2 = ff_adpcm_AdaptCoeff2[predictor]; } for (VAR_5 = 0; VAR_5 < VAR_0->channels; VAR_5++) { if (c->status[VAR_5].idelta < 16) c->status[VAR_5].idelta = 16; bytestream_put_le16(&dst, c->status[VAR_5].idelta); } for (VAR_5 = 0; VAR_5 < VAR_0->channels; VAR_5++) c->status[VAR_5].sample2= *VAR_10++; for (VAR_5 = 0; VAR_5 < VAR_0->channels; VAR_5++) { c->status[VAR_5].sample1 = *VAR_10++; bytestream_put_le16(&dst, c->status[VAR_5].sample1); } for (VAR_5 = 0; VAR_5 < VAR_0->channels; VAR_5++) bytestream_put_le16(&dst, c->status[VAR_5].sample2); if (VAR_0->trellis > 0) { VAR_4 = VAR_0->block_align - 7 * VAR_0->channels; FF_ALLOC_OR_GOTO(VAR_0, buf, 2 * VAR_4, error); if (VAR_0->channels == 1) { adpcm_compress_trellis(VAR_0, VAR_10, buf, &c->status[0], VAR_4, VAR_0->channels); for (VAR_5 = 0; VAR_5 < VAR_4; VAR_5 += 2) *dst++ = (buf[VAR_5] << 4) | buf[VAR_5 + 1]; } else { adpcm_compress_trellis(VAR_0, VAR_10, buf, &c->status[0], VAR_4, VAR_0->channels); adpcm_compress_trellis(VAR_0, VAR_10 + 1, buf + VAR_4, &c->status[1], VAR_4, VAR_0->channels); for (VAR_5 = 0; VAR_5 < VAR_4; VAR_5++) *dst++ = (buf[VAR_5] << 4) | buf[VAR_4 + VAR_5]; } av_free(buf); } else { for (VAR_5 = 7 * VAR_0->channels; VAR_5 < VAR_0->block_align; VAR_5++) { int VAR_13; VAR_13 = adpcm_ms_compress_sample(&c->status[ 0], *VAR_10++) << 4; VAR_13 |= adpcm_ms_compress_sample(&c->status[VAR_7], *VAR_10++); *dst++ = VAR_13; } } break; case AV_CODEC_ID_ADPCM_YAMAHA: VAR_4 = VAR_2->nb_samples / 2; if (VAR_0->trellis > 0) { FF_ALLOC_OR_GOTO(VAR_0, buf, 2 * VAR_4 * 2, error); VAR_4 *= 2; if (VAR_0->channels == 1) { adpcm_compress_trellis(VAR_0, VAR_10, buf, &c->status[0], VAR_4, VAR_0->channels); for (VAR_5 = 0; VAR_5 < VAR_4; VAR_5 += 2) *dst++ = buf[VAR_5] | (buf[VAR_5 + 1] << 4); } else { adpcm_compress_trellis(VAR_0, VAR_10, buf, &c->status[0], VAR_4, VAR_0->channels); adpcm_compress_trellis(VAR_0, VAR_10 + 1, buf + VAR_4, &c->status[1], VAR_4, VAR_0->channels); for (VAR_5 = 0; VAR_5 < VAR_4; VAR_5++) *dst++ = buf[VAR_5] | (buf[VAR_4 + VAR_5] << 4); } av_free(buf); } else for (VAR_4 *= VAR_0->channels; VAR_4 > 0; VAR_4--) { int VAR_13; VAR_13 = adpcm_yamaha_compress_sample(&c->status[ 0], *VAR_10++); VAR_13 |= adpcm_yamaha_compress_sample(&c->status[VAR_7], *VAR_10++) << 4; *dst++ = VAR_13; } break; default: return AVERROR(EINVAL); } VAR_1->size = VAR_8; *VAR_3 = 1; return 0; error: return AVERROR(ENOMEM); }

yuv2rgb_full_2_c_template(SwsContext *c, const int16_t *buf[2], const int16_t *ubuf[2], const int16_t *vbuf[2], const int16_t *abuf[2], uint8_t *dest, int dstW, int yalpha, int uvalpha, int y, enum AVPixelFormat target, int hasAlpha) { const int16_t *buf0 = buf[0], *buf1 = buf[1], *ubuf0 = ubuf[0], *ubuf1 = ubuf[1], *vbuf0 = vbuf[0], *vbuf1 = vbuf[1], *abuf0 = hasAlpha ? abuf[0] : NULL, *abuf1 = hasAlpha ? abuf[1] : NULL; int yalpha1 = 4096 - yalpha; int uvalpha1 = 4096 - uvalpha; int i; int step = (target == AV_PIX_FMT_RGB24 || target == AV_PIX_FMT_BGR24) ? 3 : 4; int err[4] = {0}; if( target == AV_PIX_FMT_BGR4_BYTE || target == AV_PIX_FMT_RGB4_BYTE || target == AV_PIX_FMT_BGR8 || target == AV_PIX_FMT_RGB8) step = 1; for (i = 0; i < dstW; i++) { int Y = ( buf0[i] * yalpha1 + buf1[i] * yalpha ) >> 10; //FIXME rounding int U = (ubuf0[i] * uvalpha1 + ubuf1[i] * uvalpha-(128 << 19)) >> 10; int V = (vbuf0[i] * uvalpha1 + vbuf1[i] * uvalpha-(128 << 19)) >> 10; int A; if (hasAlpha) { A = (abuf0[i] * yalpha1 + abuf1[i] * yalpha + (1<<18)) >> 19; if (A & 0x100) A = av_clip_uint8(A); } yuv2rgb_write_full(c, dest, i, Y, A, U, V, y, target, hasAlpha, err); dest += step; } c->dither_error[0][i] = err[0]; c->dither_error[1][i] = err[1]; c->dither_error[2][i] = err[2]; }

FFmpeg

8ef453ff830b40f635b94099d1debad3d809847f

yuv2rgb_full_2_c_template(SwsContext *c, const int16_t *buf[2], const int16_t *ubuf[2], const int16_t *vbuf[2], const int16_t *abuf[2], uint8_t *dest, int dstW, int yalpha, int uvalpha, int y, enum AVPixelFormat target, int hasAlpha) { const int16_t *buf0 = buf[0], *buf1 = buf[1], *ubuf0 = ubuf[0], *ubuf1 = ubuf[1], *vbuf0 = vbuf[0], *vbuf1 = vbuf[1], *abuf0 = hasAlpha ? abuf[0] : NULL, *abuf1 = hasAlpha ? abuf[1] : NULL; int yalpha1 = 4096 - yalpha; int uvalpha1 = 4096 - uvalpha; int i; int step = (target == AV_PIX_FMT_RGB24 || target == AV_PIX_FMT_BGR24) ? 3 : 4; int err[4] = {0}; if( target == AV_PIX_FMT_BGR4_BYTE || target == AV_PIX_FMT_RGB4_BYTE || target == AV_PIX_FMT_BGR8 || target == AV_PIX_FMT_RGB8) step = 1; for (i = 0; i < dstW; i++) { int Y = ( buf0[i] * yalpha1 + buf1[i] * yalpha ) >> 10; int U = (ubuf0[i] * uvalpha1 + ubuf1[i] * uvalpha-(128 << 19)) >> 10; int V = (vbuf0[i] * uvalpha1 + vbuf1[i] * uvalpha-(128 << 19)) >> 10; int A; if (hasAlpha) { A = (abuf0[i] * yalpha1 + abuf1[i] * yalpha + (1<<18)) >> 19; if (A & 0x100) A = av_clip_uint8(A); } yuv2rgb_write_full(c, dest, i, Y, A, U, V, y, target, hasAlpha, err); dest += step; } c->dither_error[0][i] = err[0]; c->dither_error[1][i] = err[1]; c->dither_error[2][i] = err[2]; }

FUNC_0(SwsContext *VAR_0, const int16_t *VAR_1[2], const int16_t *VAR_2[2], const int16_t *VAR_3[2], const int16_t *VAR_4[2], uint8_t *VAR_5, int VAR_6, int VAR_7, int VAR_8, int VAR_9, enum AVPixelFormat VAR_10, int VAR_11) { const int16_t *VAR_12 = VAR_1[0], *buf1 = VAR_1[1], *ubuf0 = VAR_2[0], *ubuf1 = VAR_2[1], *vbuf0 = VAR_3[0], *vbuf1 = VAR_3[1], *abuf0 = VAR_11 ? VAR_4[0] : NULL, *abuf1 = VAR_11 ? VAR_4[1] : NULL; int VAR_13 = 4096 - VAR_7; int VAR_14 = 4096 - VAR_8; int VAR_15; int VAR_16 = (VAR_10 == AV_PIX_FMT_RGB24 || VAR_10 == AV_PIX_FMT_BGR24) ? 3 : 4; int VAR_17[4] = {0}; if( VAR_10 == AV_PIX_FMT_BGR4_BYTE || VAR_10 == AV_PIX_FMT_RGB4_BYTE || VAR_10 == AV_PIX_FMT_BGR8 || VAR_10 == AV_PIX_FMT_RGB8) VAR_16 = 1; for (VAR_15 = 0; VAR_15 < VAR_6; VAR_15++) { int VAR_18 = ( VAR_12[VAR_15] * VAR_13 + buf1[VAR_15] * VAR_7 ) >> 10; int VAR_19 = (ubuf0[VAR_15] * VAR_14 + ubuf1[VAR_15] * VAR_8-(128 << 19)) >> 10; int VAR_20 = (vbuf0[VAR_15] * VAR_14 + vbuf1[VAR_15] * VAR_8-(128 << 19)) >> 10; int VAR_21; if (VAR_11) { VAR_21 = (abuf0[VAR_15] * VAR_13 + abuf1[VAR_15] * VAR_7 + (1<<18)) >> 19; if (VAR_21 & 0x100) VAR_21 = av_clip_uint8(VAR_21); } yuv2rgb_write_full(VAR_0, VAR_5, VAR_15, VAR_18, VAR_21, VAR_19, VAR_20, VAR_9, VAR_10, VAR_11, VAR_17); VAR_5 += VAR_16; } VAR_0->dither_error[0][VAR_15] = VAR_17[0]; VAR_0->dither_error[1][VAR_15] = VAR_17[1]; VAR_0->dither_error[2][VAR_15] = VAR_17[2]; }

static void clone_slice(H264Context *dst, H264Context *src) { memcpy(dst->block_offset, src->block_offset, sizeof(dst->block_offset)); dst->s.current_picture_ptr = src->s.current_picture_ptr; dst->s.current_picture = src->s.current_picture; dst->s.linesize = src->s.linesize; dst->s.uvlinesize = src->s.uvlinesize; dst->s.first_field = src->s.first_field; dst->prev_poc_msb = src->prev_poc_msb; dst->prev_poc_lsb = src->prev_poc_lsb; dst->prev_frame_num_offset = src->prev_frame_num_offset; dst->prev_frame_num = src->prev_frame_num; dst->short_ref_count = src->short_ref_count; memcpy(dst->short_ref, src->short_ref, sizeof(dst->short_ref)); memcpy(dst->long_ref, src->long_ref, sizeof(dst->long_ref)); memcpy(dst->default_ref_list, src->default_ref_list, sizeof(dst->default_ref_list)); memcpy(dst->ref_list, src->ref_list, sizeof(dst->ref_list)); memcpy(dst->dequant4_coeff, src->dequant4_coeff, sizeof(src->dequant4_coeff)); memcpy(dst->dequant8_coeff, src->dequant8_coeff, sizeof(src->dequant8_coeff)); }

FFmpeg

f1d8763a02b5fce9a7d9789e049d74a45b15e1e8

static void clone_slice(H264Context *dst, H264Context *src) { memcpy(dst->block_offset, src->block_offset, sizeof(dst->block_offset)); dst->s.current_picture_ptr = src->s.current_picture_ptr; dst->s.current_picture = src->s.current_picture; dst->s.linesize = src->s.linesize; dst->s.uvlinesize = src->s.uvlinesize; dst->s.first_field = src->s.first_field; dst->prev_poc_msb = src->prev_poc_msb; dst->prev_poc_lsb = src->prev_poc_lsb; dst->prev_frame_num_offset = src->prev_frame_num_offset; dst->prev_frame_num = src->prev_frame_num; dst->short_ref_count = src->short_ref_count; memcpy(dst->short_ref, src->short_ref, sizeof(dst->short_ref)); memcpy(dst->long_ref, src->long_ref, sizeof(dst->long_ref)); memcpy(dst->default_ref_list, src->default_ref_list, sizeof(dst->default_ref_list)); memcpy(dst->ref_list, src->ref_list, sizeof(dst->ref_list)); memcpy(dst->dequant4_coeff, src->dequant4_coeff, sizeof(src->dequant4_coeff)); memcpy(dst->dequant8_coeff, src->dequant8_coeff, sizeof(src->dequant8_coeff)); }

static void FUNC_0(H264Context *VAR_0, H264Context *VAR_1) { memcpy(VAR_0->block_offset, VAR_1->block_offset, sizeof(VAR_0->block_offset)); VAR_0->s.current_picture_ptr = VAR_1->s.current_picture_ptr; VAR_0->s.current_picture = VAR_1->s.current_picture; VAR_0->s.linesize = VAR_1->s.linesize; VAR_0->s.uvlinesize = VAR_1->s.uvlinesize; VAR_0->s.first_field = VAR_1->s.first_field; VAR_0->prev_poc_msb = VAR_1->prev_poc_msb; VAR_0->prev_poc_lsb = VAR_1->prev_poc_lsb; VAR_0->prev_frame_num_offset = VAR_1->prev_frame_num_offset; VAR_0->prev_frame_num = VAR_1->prev_frame_num; VAR_0->short_ref_count = VAR_1->short_ref_count; memcpy(VAR_0->short_ref, VAR_1->short_ref, sizeof(VAR_0->short_ref)); memcpy(VAR_0->long_ref, VAR_1->long_ref, sizeof(VAR_0->long_ref)); memcpy(VAR_0->default_ref_list, VAR_1->default_ref_list, sizeof(VAR_0->default_ref_list)); memcpy(VAR_0->ref_list, VAR_1->ref_list, sizeof(VAR_0->ref_list)); memcpy(VAR_0->dequant4_coeff, VAR_1->dequant4_coeff, sizeof(VAR_1->dequant4_coeff)); memcpy(VAR_0->dequant8_coeff, VAR_1->dequant8_coeff, sizeof(VAR_1->dequant8_coeff)); }

static inline void gen_op_arith_subf(DisasContext *ctx, TCGv ret, TCGv arg1, TCGv arg2, int add_ca, int compute_ca, int compute_ov) { TCGv t0, t1; if ((!compute_ca && !compute_ov) || (!TCGV_EQUAL(ret, arg1) && !TCGV_EQUAL(ret, arg2))) { t0 = ret; } else { t0 = tcg_temp_local_new(); } if (add_ca) { t1 = tcg_temp_local_new(); tcg_gen_mov_tl(t1, cpu_ca); } else { TCGV_UNUSED(t1); } if (compute_ca) { /* Start with XER CA disabled, the most likely case */ tcg_gen_movi_tl(cpu_ca, 0); } if (compute_ov) { /* Start with XER OV disabled, the most likely case */ tcg_gen_movi_tl(cpu_ov, 0); } if (add_ca) { tcg_gen_not_tl(t0, arg1); tcg_gen_add_tl(t0, t0, arg2); gen_op_arith_compute_ca(ctx, t0, arg2, 0); tcg_gen_add_tl(t0, t0, t1); gen_op_arith_compute_ca(ctx, t0, t1, 0); tcg_temp_free(t1); } else { tcg_gen_sub_tl(t0, arg2, arg1); if (compute_ca) { gen_op_arith_compute_ca(ctx, t0, arg2, 1); } } if (compute_ov) { gen_op_arith_compute_ov(ctx, t0, arg1, arg2, 1); } if (unlikely(Rc(ctx->opcode) != 0)) gen_set_Rc0(ctx, t0); if (!TCGV_EQUAL(t0, ret)) { tcg_gen_mov_tl(ret, t0); tcg_temp_free(t0); } }

qemu

ffe30937c89dd67a53bf3f35b962701cd9d8f70e

static inline void gen_op_arith_subf(DisasContext *ctx, TCGv ret, TCGv arg1, TCGv arg2, int add_ca, int compute_ca, int compute_ov) { TCGv t0, t1; if ((!compute_ca && !compute_ov) || (!TCGV_EQUAL(ret, arg1) && !TCGV_EQUAL(ret, arg2))) { t0 = ret; } else { t0 = tcg_temp_local_new(); } if (add_ca) { t1 = tcg_temp_local_new(); tcg_gen_mov_tl(t1, cpu_ca); } else { TCGV_UNUSED(t1); } if (compute_ca) { tcg_gen_movi_tl(cpu_ca, 0); } if (compute_ov) { tcg_gen_movi_tl(cpu_ov, 0); } if (add_ca) { tcg_gen_not_tl(t0, arg1); tcg_gen_add_tl(t0, t0, arg2); gen_op_arith_compute_ca(ctx, t0, arg2, 0); tcg_gen_add_tl(t0, t0, t1); gen_op_arith_compute_ca(ctx, t0, t1, 0); tcg_temp_free(t1); } else { tcg_gen_sub_tl(t0, arg2, arg1); if (compute_ca) { gen_op_arith_compute_ca(ctx, t0, arg2, 1); } } if (compute_ov) { gen_op_arith_compute_ov(ctx, t0, arg1, arg2, 1); } if (unlikely(Rc(ctx->opcode) != 0)) gen_set_Rc0(ctx, t0); if (!TCGV_EQUAL(t0, ret)) { tcg_gen_mov_tl(ret, t0); tcg_temp_free(t0); } }

static inline void FUNC_0(DisasContext *VAR_0, TCGv VAR_1, TCGv VAR_2, TCGv VAR_3, int VAR_4, int VAR_5, int VAR_6) { TCGv t0, t1; if ((!VAR_5 && !VAR_6) || (!TCGV_EQUAL(VAR_1, VAR_2) && !TCGV_EQUAL(VAR_1, VAR_3))) { t0 = VAR_1; } else { t0 = tcg_temp_local_new(); } if (VAR_4) { t1 = tcg_temp_local_new(); tcg_gen_mov_tl(t1, cpu_ca); } else { TCGV_UNUSED(t1); } if (VAR_5) { tcg_gen_movi_tl(cpu_ca, 0); } if (VAR_6) { tcg_gen_movi_tl(cpu_ov, 0); } if (VAR_4) { tcg_gen_not_tl(t0, VAR_2); tcg_gen_add_tl(t0, t0, VAR_3); gen_op_arith_compute_ca(VAR_0, t0, VAR_3, 0); tcg_gen_add_tl(t0, t0, t1); gen_op_arith_compute_ca(VAR_0, t0, t1, 0); tcg_temp_free(t1); } else { tcg_gen_sub_tl(t0, VAR_3, VAR_2); if (VAR_5) { gen_op_arith_compute_ca(VAR_0, t0, VAR_3, 1); } } if (VAR_6) { gen_op_arith_compute_ov(VAR_0, t0, VAR_2, VAR_3, 1); } if (unlikely(Rc(VAR_0->opcode) != 0)) gen_set_Rc0(VAR_0, t0); if (!TCGV_EQUAL(t0, VAR_1)) { tcg_gen_mov_tl(VAR_1, t0); tcg_temp_free(t0); } }

static void mxf_packet_timestamps(MXFContext *mxf, AVPacket *pkt) { int64_t last_ofs = -1, next_ofs; MXFIndexTable *t = &mxf->index_tables[0]; /* this is called from the OP1a demuxing logic, which means there * may be no index tables */ if (mxf->nb_index_tables <= 0) return; /* find mxf->current_edit_unit so that the next edit unit starts ahead of pkt->pos */ for (;;) { if (mxf_edit_unit_absolute_offset(mxf, t, mxf->current_edit_unit + 1, NULL, &next_ofs, 0) < 0) break; if (next_ofs <= last_ofs) { /* large next_ofs didn't change or current_edit_unit wrapped * around this fixes the infinite loop on zzuf3.mxf */ av_log(mxf->fc, AV_LOG_ERROR, "next_ofs didn't change. not deriving packet timestamps\n"); return; } if (next_ofs > pkt->pos) break; last_ofs = next_ofs; mxf->current_edit_unit++; } if (mxf->current_edit_unit >= t->nb_ptses) return; pkt->dts = mxf->current_edit_unit + t->first_dts; pkt->pts = t->ptses[mxf->current_edit_unit]; }

FFmpeg

9123950be0dbbfceacb38c0a9b09fdb01ae5b111

static void mxf_packet_timestamps(MXFContext *mxf, AVPacket *pkt) { int64_t last_ofs = -1, next_ofs; MXFIndexTable *t = &mxf->index_tables[0]; if (mxf->nb_index_tables <= 0) return; for (;;) { if (mxf_edit_unit_absolute_offset(mxf, t, mxf->current_edit_unit + 1, NULL, &next_ofs, 0) < 0) break; if (next_ofs <= last_ofs) { av_log(mxf->fc, AV_LOG_ERROR, "next_ofs didn't change. not deriving packet timestamps\n"); return; } if (next_ofs > pkt->pos) break; last_ofs = next_ofs; mxf->current_edit_unit++; } if (mxf->current_edit_unit >= t->nb_ptses) return; pkt->dts = mxf->current_edit_unit + t->first_dts; pkt->pts = t->ptses[mxf->current_edit_unit]; }

static void FUNC_0(MXFContext *VAR_0, AVPacket *VAR_1) { int64_t last_ofs = -1, next_ofs; MXFIndexTable *t = &VAR_0->index_tables[0]; if (VAR_0->nb_index_tables <= 0) return; for (;;) { if (mxf_edit_unit_absolute_offset(VAR_0, t, VAR_0->current_edit_unit + 1, NULL, &next_ofs, 0) < 0) break; if (next_ofs <= last_ofs) { av_log(VAR_0->fc, AV_LOG_ERROR, "next_ofs didn't change. not deriving packet timestamps\n"); return; } if (next_ofs > VAR_1->pos) break; last_ofs = next_ofs; VAR_0->current_edit_unit++; } if (VAR_0->current_edit_unit >= t->nb_ptses) return; VAR_1->dts = VAR_0->current_edit_unit + t->first_dts; VAR_1->pts = t->ptses[VAR_0->current_edit_unit]; }

static void ff_h264_idct_add16intra_mmx(uint8_t *dst, const int *block_offset, DCTELEM *block, int stride, const uint8_t nnzc[6*8]){ int i; for(i=0; i<16; i++){ if(nnzc[ scan8[i] ] || block[i*16]) ff_h264_idct_add_mmx(dst + block_offset[i], block + i*16, stride); } }

FFmpeg

1d16a1cf99488f16492b1bb48e023f4da8377e07

static void ff_h264_idct_add16intra_mmx(uint8_t *dst, const int *block_offset, DCTELEM *block, int stride, const uint8_t nnzc[6*8]){ int i; for(i=0; i<16; i++){ if(nnzc[ scan8[i] ] || block[i*16]) ff_h264_idct_add_mmx(dst + block_offset[i], block + i*16, stride); } }

static void FUNC_0(uint8_t *VAR_0, const int *VAR_1, DCTELEM *VAR_2, int VAR_3, const uint8_t VAR_4[6*8]){ int VAR_5; for(VAR_5=0; VAR_5<16; VAR_5++){ if(VAR_4[ scan8[VAR_5] ] || VAR_2[VAR_5*16]) ff_h264_idct_add_mmx(VAR_0 + VAR_1[VAR_5], VAR_2 + VAR_5*16, VAR_3); } }

static void process_subpacket_9 (QDM2Context *q, QDM2SubPNode *node) { GetBitContext gb; int i, j, k, n, ch, run, level, diff; init_get_bits(&gb, node->packet->data, node->packet->size*8); n = coeff_per_sb_for_avg[q->coeff_per_sb_select][QDM2_SB_USED(q->sub_sampling) - 1] + 1; // same as averagesomething function for (i = 1; i < n; i++) for (ch=0; ch < q->nb_channels; ch++) { level = qdm2_get_vlc(&gb, &vlc_tab_level, 0, 2); q->quantized_coeffs[ch][i][0] = level; for (j = 0; j < (8 - 1); ) { run = qdm2_get_vlc(&gb, &vlc_tab_run, 0, 1) + 1; diff = qdm2_get_se_vlc(&vlc_tab_diff, &gb, 2); for (k = 1; k <= run; k++) q->quantized_coeffs[ch][i][j + k] = (level + ((k*diff) / run)); level += diff; j += run; } } for (ch = 0; ch < q->nb_channels; ch++) for (i = 0; i < 8; i++) q->quantized_coeffs[ch][0][i] = 0; }

FFmpeg

cece491daa9f4c7c908e016f4e285a49d37cb17c

static void process_subpacket_9 (QDM2Context *q, QDM2SubPNode *node) { GetBitContext gb; int i, j, k, n, ch, run, level, diff; init_get_bits(&gb, node->packet->data, node->packet->size*8); n = coeff_per_sb_for_avg[q->coeff_per_sb_select][QDM2_SB_USED(q->sub_sampling) - 1] + 1; for (i = 1; i < n; i++) for (ch=0; ch < q->nb_channels; ch++) { level = qdm2_get_vlc(&gb, &vlc_tab_level, 0, 2); q->quantized_coeffs[ch][i][0] = level; for (j = 0; j < (8 - 1); ) { run = qdm2_get_vlc(&gb, &vlc_tab_run, 0, 1) + 1; diff = qdm2_get_se_vlc(&vlc_tab_diff, &gb, 2); for (k = 1; k <= run; k++) q->quantized_coeffs[ch][i][j + k] = (level + ((k*diff) / run)); level += diff; j += run; } } for (ch = 0; ch < q->nb_channels; ch++) for (i = 0; i < 8; i++) q->quantized_coeffs[ch][0][i] = 0; }

static void FUNC_0 (QDM2Context *VAR_0, QDM2SubPNode *VAR_1) { GetBitContext gb; int VAR_2, VAR_3, VAR_4, VAR_5, VAR_6, VAR_7, VAR_8, VAR_9; init_get_bits(&gb, VAR_1->packet->data, VAR_1->packet->size*8); VAR_5 = coeff_per_sb_for_avg[VAR_0->coeff_per_sb_select][QDM2_SB_USED(VAR_0->sub_sampling) - 1] + 1; for (VAR_2 = 1; VAR_2 < VAR_5; VAR_2++) for (VAR_6=0; VAR_6 < VAR_0->nb_channels; VAR_6++) { VAR_8 = qdm2_get_vlc(&gb, &vlc_tab_level, 0, 2); VAR_0->quantized_coeffs[VAR_6][VAR_2][0] = VAR_8; for (VAR_3 = 0; VAR_3 < (8 - 1); ) { VAR_7 = qdm2_get_vlc(&gb, &vlc_tab_run, 0, 1) + 1; VAR_9 = qdm2_get_se_vlc(&vlc_tab_diff, &gb, 2); for (VAR_4 = 1; VAR_4 <= VAR_7; VAR_4++) VAR_0->quantized_coeffs[VAR_6][VAR_2][VAR_3 + VAR_4] = (VAR_8 + ((VAR_4*VAR_9) / VAR_7)); VAR_8 += VAR_9; VAR_3 += VAR_7; } } for (VAR_6 = 0; VAR_6 < VAR_0->nb_channels; VAR_6++) for (VAR_2 = 0; VAR_2 < 8; VAR_2++) VAR_0->quantized_coeffs[VAR_6][0][VAR_2] = 0; }

static inline void h264_loop_filter_chroma_c(uint8_t *pix, int xstride, int ystride, int alpha, int beta, int8_t *tc0) { int i, d; for( i = 0; i < 4; i++ ) { const int tc = tc0[i]; if( tc <= 0 ) { pix += 2*ystride; continue; } for( d = 0; d < 2; d++ ) { const int p0 = pix[-1*xstride]; const int p1 = pix[-2*xstride]; const int q0 = pix[0]; const int q1 = pix[1*xstride]; if( FFABS( p0 - q0 ) < alpha && FFABS( p1 - p0 ) < beta && FFABS( q1 - q0 ) < beta ) { int delta = av_clip( (((q0 - p0 ) << 2) + (p1 - q1) + 4) >> 3, -tc, tc ); pix[-xstride] = av_clip_uint8( p0 + delta ); /* p0' */ pix[0] = av_clip_uint8( q0 - delta ); /* q0' */ } pix += ystride; } } }

FFmpeg

3f50965b28d0c4ef10dde0bf2f7a9f78fa36b378

static inline void h264_loop_filter_chroma_c(uint8_t *pix, int xstride, int ystride, int alpha, int beta, int8_t *tc0) { int i, d; for( i = 0; i < 4; i++ ) { const int tc = tc0[i]; if( tc <= 0 ) { pix += 2*ystride; continue; } for( d = 0; d < 2; d++ ) { const int p0 = pix[-1*xstride]; const int p1 = pix[-2*xstride]; const int q0 = pix[0]; const int q1 = pix[1*xstride]; if( FFABS( p0 - q0 ) < alpha && FFABS( p1 - p0 ) < beta && FFABS( q1 - q0 ) < beta ) { int delta = av_clip( (((q0 - p0 ) << 2) + (p1 - q1) + 4) >> 3, -tc, tc ); pix[-xstride] = av_clip_uint8( p0 + delta ); pix[0] = av_clip_uint8( q0 - delta ); } pix += ystride; } } }

static inline void FUNC_0(uint8_t *VAR_0, int VAR_1, int VAR_2, int VAR_3, int VAR_4, int8_t *VAR_5) { int VAR_6, VAR_7; for( VAR_6 = 0; VAR_6 < 4; VAR_6++ ) { const int VAR_8 = VAR_5[VAR_6]; if( VAR_8 <= 0 ) { VAR_0 += 2*VAR_2; continue; } for( VAR_7 = 0; VAR_7 < 2; VAR_7++ ) { const int VAR_9 = VAR_0[-1*VAR_1]; const int VAR_10 = VAR_0[-2*VAR_1]; const int VAR_11 = VAR_0[0]; const int VAR_12 = VAR_0[1*VAR_1]; if( FFABS( VAR_9 - VAR_11 ) < VAR_3 && FFABS( VAR_10 - VAR_9 ) < VAR_4 && FFABS( VAR_12 - VAR_11 ) < VAR_4 ) { int VAR_13 = av_clip( (((VAR_11 - VAR_9 ) << 2) + (VAR_10 - VAR_12) + 4) >> 3, -VAR_8, VAR_8 ); VAR_0[-VAR_1] = av_clip_uint8( VAR_9 + VAR_13 ); VAR_0[0] = av_clip_uint8( VAR_11 - VAR_13 ); } VAR_0 += VAR_2; } } }

static int lag_decode_zero_run_line(LagarithContext *l, uint8_t *dst, const uint8_t *src, const uint8_t *src_end, int width, int esc_count) { int i = 0; int count; uint8_t zero_run = 0; const uint8_t *src_start = src; uint8_t mask1 = -(esc_count < 2); uint8_t mask2 = -(esc_count < 3); uint8_t *end = dst + (width - 2); output_zeros: if (l->zeros_rem) { count = FFMIN(l->zeros_rem, width - i); if (end - dst < count) { av_log(l->avctx, AV_LOG_ERROR, "Too many zeros remaining.\n"); return AVERROR_INVALIDDATA; } memset(dst, 0, count); l->zeros_rem -= count; dst += count; } while (dst < end) { i = 0; while (!zero_run && dst + i < end) { i++; if (i+2 >= src_end - src) return AVERROR_INVALIDDATA; zero_run = !(src[i] | (src[i + 1] & mask1) | (src[i + 2] & mask2)); } if (zero_run) { zero_run = 0; i += esc_count; memcpy(dst, src, i); dst += i; l->zeros_rem = lag_calc_zero_run(src[i]); src += i + 1; goto output_zeros; } else { memcpy(dst, src, i); src += i; dst += i; } } return src - src_start; }

FFmpeg

100a54da5264436202daeedd68ed5e4a8be41459

static int lag_decode_zero_run_line(LagarithContext *l, uint8_t *dst, const uint8_t *src, const uint8_t *src_end, int width, int esc_count) { int i = 0; int count; uint8_t zero_run = 0; const uint8_t *src_start = src; uint8_t mask1 = -(esc_count < 2); uint8_t mask2 = -(esc_count < 3); uint8_t *end = dst + (width - 2); output_zeros: if (l->zeros_rem) { count = FFMIN(l->zeros_rem, width - i); if (end - dst < count) { av_log(l->avctx, AV_LOG_ERROR, "Too many zeros remaining.\n"); return AVERROR_INVALIDDATA; } memset(dst, 0, count); l->zeros_rem -= count; dst += count; } while (dst < end) { i = 0; while (!zero_run && dst + i < end) { i++; if (i+2 >= src_end - src) return AVERROR_INVALIDDATA; zero_run = !(src[i] | (src[i + 1] & mask1) | (src[i + 2] & mask2)); } if (zero_run) { zero_run = 0; i += esc_count; memcpy(dst, src, i); dst += i; l->zeros_rem = lag_calc_zero_run(src[i]); src += i + 1; goto output_zeros; } else { memcpy(dst, src, i); src += i; dst += i; } } return src - src_start; }

static int FUNC_0(LagarithContext *VAR_0, uint8_t *VAR_1, const uint8_t *VAR_2, const uint8_t *VAR_3, int VAR_4, int VAR_5) { int VAR_6 = 0; int VAR_7; uint8_t zero_run = 0; const uint8_t *VAR_8 = VAR_2; uint8_t mask1 = -(VAR_5 < 2); uint8_t mask2 = -(VAR_5 < 3); uint8_t *end = VAR_1 + (VAR_4 - 2); output_zeros: if (VAR_0->zeros_rem) { VAR_7 = FFMIN(VAR_0->zeros_rem, VAR_4 - VAR_6); if (end - VAR_1 < VAR_7) { av_log(VAR_0->avctx, AV_LOG_ERROR, "Too many zeros remaining.\n"); return AVERROR_INVALIDDATA; } memset(VAR_1, 0, VAR_7); VAR_0->zeros_rem -= VAR_7; VAR_1 += VAR_7; } while (VAR_1 < end) { VAR_6 = 0; while (!zero_run && VAR_1 + VAR_6 < end) { VAR_6++; if (VAR_6+2 >= VAR_3 - VAR_2) return AVERROR_INVALIDDATA; zero_run = !(VAR_2[VAR_6] | (VAR_2[VAR_6 + 1] & mask1) | (VAR_2[VAR_6 + 2] & mask2)); } if (zero_run) { zero_run = 0; VAR_6 += VAR_5; memcpy(VAR_1, VAR_2, VAR_6); VAR_1 += VAR_6; VAR_0->zeros_rem = lag_calc_zero_run(VAR_2[VAR_6]); VAR_2 += VAR_6 + 1; goto output_zeros; } else { memcpy(VAR_1, VAR_2, VAR_6); VAR_2 += VAR_6; VAR_1 += VAR_6; } } return VAR_2 - VAR_8; }

static int ffmmal_read_frame(AVCodecContext *avctx, AVFrame *frame, int *got_frame) { MMALDecodeContext *ctx = avctx->priv_data; MMAL_BUFFER_HEADER_T *buffer = NULL; MMAL_STATUS_T status = 0; int ret = 0; if (ctx->eos_received) goto done; while (1) { // To ensure decoding in lockstep with a constant delay between fed packets // and output frames, we always wait until an output buffer is available. // Except during start we don't know after how many input packets the decoder // is going to return the first buffer, and we can't distinguish decoder // being busy from decoder waiting for input. So just poll at the start and // keep feeding new data to the buffer. // We are pretty sure the decoder will produce output if we sent more input // frames than what a h264 decoder could logically delay. This avoids too // excessive buffering. // We also wait if we sent eos, but didn't receive it yet (think of decoding // stream with a very low number of frames). if (ctx->frames_output || ctx->packets_sent > MAX_DELAYED_FRAMES || (ctx->packets_sent && ctx->eos_sent)) { // MMAL will ignore broken input packets, which means the frame we // expect here may never arrive. Dealing with this correctly is // complicated, so here's a hack to avoid that it freezes forever // in this unlikely situation. buffer = mmal_queue_timedwait(ctx->queue_decoded_frames, 100); if (!buffer) { av_log(avctx, AV_LOG_ERROR, "Did not get output frame from MMAL.\n"); ret = AVERROR_UNKNOWN; goto done; } } else { buffer = mmal_queue_get(ctx->queue_decoded_frames); if (!buffer) goto done; } ctx->eos_received |= !!(buffer->flags & MMAL_BUFFER_HEADER_FLAG_EOS); if (ctx->eos_received) goto done; if (buffer->cmd == MMAL_EVENT_FORMAT_CHANGED) { MMAL_COMPONENT_T *decoder = ctx->decoder; MMAL_EVENT_FORMAT_CHANGED_T *ev = mmal_event_format_changed_get(buffer); MMAL_BUFFER_HEADER_T *stale_buffer; av_log(avctx, AV_LOG_INFO, "Changing output format.\n"); if ((status = mmal_port_disable(decoder->output[0]))) goto done; while ((stale_buffer = mmal_queue_get(ctx->queue_decoded_frames))) mmal_buffer_header_release(stale_buffer); mmal_format_copy(decoder->output[0]->format, ev->format); if ((ret = ffmal_update_format(avctx)) < 0) goto done; if ((status = mmal_port_enable(decoder->output[0], output_callback))) goto done; if ((ret = ffmmal_fill_output_port(avctx)) < 0) goto done; if ((ret = ffmmal_fill_input_port(avctx)) < 0) goto done; mmal_buffer_header_release(buffer); continue; } else if (buffer->cmd) { char s[20]; av_get_codec_tag_string(s, sizeof(s), buffer->cmd); av_log(avctx, AV_LOG_WARNING, "Unknown MMAL event %s on output port\n", s); goto done; } else if (buffer->length == 0) { // Unused output buffer that got drained after format change. mmal_buffer_header_release(buffer); continue; } ctx->frames_output++; if ((ret = ffmal_copy_frame(avctx, frame, buffer)) < 0) goto done; *got_frame = 1; break; } done: if (buffer) mmal_buffer_header_release(buffer); if (status && ret >= 0) ret = AVERROR_UNKNOWN; return ret; }

FFmpeg

39f01e346cab464ef6c0d4ec58cc13b7123e60d8

static int ffmmal_read_frame(AVCodecContext *avctx, AVFrame *frame, int *got_frame) { MMALDecodeContext *ctx = avctx->priv_data; MMAL_BUFFER_HEADER_T *buffer = NULL; MMAL_STATUS_T status = 0; int ret = 0; if (ctx->eos_received) goto done; while (1) { if (ctx->frames_output || ctx->packets_sent > MAX_DELAYED_FRAMES || (ctx->packets_sent && ctx->eos_sent)) { buffer = mmal_queue_timedwait(ctx->queue_decoded_frames, 100); if (!buffer) { av_log(avctx, AV_LOG_ERROR, "Did not get output frame from MMAL.\n"); ret = AVERROR_UNKNOWN; goto done; } } else { buffer = mmal_queue_get(ctx->queue_decoded_frames); if (!buffer) goto done; } ctx->eos_received |= !!(buffer->flags & MMAL_BUFFER_HEADER_FLAG_EOS); if (ctx->eos_received) goto done; if (buffer->cmd == MMAL_EVENT_FORMAT_CHANGED) { MMAL_COMPONENT_T *decoder = ctx->decoder; MMAL_EVENT_FORMAT_CHANGED_T *ev = mmal_event_format_changed_get(buffer); MMAL_BUFFER_HEADER_T *stale_buffer; av_log(avctx, AV_LOG_INFO, "Changing output format.\n"); if ((status = mmal_port_disable(decoder->output[0]))) goto done; while ((stale_buffer = mmal_queue_get(ctx->queue_decoded_frames))) mmal_buffer_header_release(stale_buffer); mmal_format_copy(decoder->output[0]->format, ev->format); if ((ret = ffmal_update_format(avctx)) < 0) goto done; if ((status = mmal_port_enable(decoder->output[0], output_callback))) goto done; if ((ret = ffmmal_fill_output_port(avctx)) < 0) goto done; if ((ret = ffmmal_fill_input_port(avctx)) < 0) goto done; mmal_buffer_header_release(buffer); continue; } else if (buffer->cmd) { char s[20]; av_get_codec_tag_string(s, sizeof(s), buffer->cmd); av_log(avctx, AV_LOG_WARNING, "Unknown MMAL event %s on output port\n", s); goto done; } else if (buffer->length == 0) { mmal_buffer_header_release(buffer); continue; } ctx->frames_output++; if ((ret = ffmal_copy_frame(avctx, frame, buffer)) < 0) goto done; *got_frame = 1; break; } done: if (buffer) mmal_buffer_header_release(buffer); if (status && ret >= 0) ret = AVERROR_UNKNOWN; return ret; }

static int FUNC_0(AVCodecContext *VAR_0, AVFrame *VAR_1, int *VAR_2) { MMALDecodeContext *ctx = VAR_0->priv_data; MMAL_BUFFER_HEADER_T *buffer = NULL; MMAL_STATUS_T status = 0; int VAR_3 = 0; if (ctx->eos_received) goto done; while (1) { if (ctx->frames_output || ctx->packets_sent > MAX_DELAYED_FRAMES || (ctx->packets_sent && ctx->eos_sent)) { buffer = mmal_queue_timedwait(ctx->queue_decoded_frames, 100); if (!buffer) { av_log(VAR_0, AV_LOG_ERROR, "Did not get output VAR_1 from MMAL.\n"); VAR_3 = AVERROR_UNKNOWN; goto done; } } else { buffer = mmal_queue_get(ctx->queue_decoded_frames); if (!buffer) goto done; } ctx->eos_received |= !!(buffer->flags & MMAL_BUFFER_HEADER_FLAG_EOS); if (ctx->eos_received) goto done; if (buffer->cmd == MMAL_EVENT_FORMAT_CHANGED) { MMAL_COMPONENT_T *decoder = ctx->decoder; MMAL_EVENT_FORMAT_CHANGED_T *ev = mmal_event_format_changed_get(buffer); MMAL_BUFFER_HEADER_T *stale_buffer; av_log(VAR_0, AV_LOG_INFO, "Changing output format.\n"); if ((status = mmal_port_disable(decoder->output[0]))) goto done; while ((stale_buffer = mmal_queue_get(ctx->queue_decoded_frames))) mmal_buffer_header_release(stale_buffer); mmal_format_copy(decoder->output[0]->format, ev->format); if ((VAR_3 = ffmal_update_format(VAR_0)) < 0) goto done; if ((status = mmal_port_enable(decoder->output[0], output_callback))) goto done; if ((VAR_3 = ffmmal_fill_output_port(VAR_0)) < 0) goto done; if ((VAR_3 = ffmmal_fill_input_port(VAR_0)) < 0) goto done; mmal_buffer_header_release(buffer); continue; } else if (buffer->cmd) { char VAR_4[20]; av_get_codec_tag_string(VAR_4, sizeof(VAR_4), buffer->cmd); av_log(VAR_0, AV_LOG_WARNING, "Unknown MMAL event %VAR_4 on output port\n", VAR_4); goto done; } else if (buffer->length == 0) { mmal_buffer_header_release(buffer); continue; } ctx->frames_output++; if ((VAR_3 = ffmal_copy_frame(VAR_0, VAR_1, buffer)) < 0) goto done; *VAR_2 = 1; break; } done: if (buffer) mmal_buffer_header_release(buffer); if (status && VAR_3 >= 0) VAR_3 = AVERROR_UNKNOWN; return VAR_3; }

static int send_dma_request(int cmd, uint64_t sector, int nb_sectors, PrdtEntry *prdt, int prdt_entries, void(*post_exec)(QPCIDevice *dev, void *ide_base, uint64_t sector, int nb_sectors)) { QPCIDevice *dev; void *bmdma_base; void *ide_base; uintptr_t guest_prdt; size_t len; bool from_dev; uint8_t status; int flags; dev = get_pci_device(&bmdma_base, &ide_base); flags = cmd & ~0xff; cmd &= 0xff; switch (cmd) { case CMD_READ_DMA: case CMD_PACKET: /* Assuming we only test data reads w/ ATAPI, otherwise we need to know * the SCSI command being sent in the packet, too. */ from_dev = true; break; case CMD_WRITE_DMA: from_dev = false; break; default: g_assert_not_reached(); } if (flags & CMDF_NO_BM) { qpci_config_writew(dev, PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY); } /* Select device 0 */ qpci_io_writeb(dev, ide_base + reg_device, 0 | LBA); /* Stop any running transfer, clear any pending interrupt */ qpci_io_writeb(dev, bmdma_base + bmreg_cmd, 0); qpci_io_writeb(dev, bmdma_base + bmreg_status, BM_STS_INTR); /* Setup PRDT */ len = sizeof(*prdt) * prdt_entries; guest_prdt = guest_alloc(guest_malloc, len); memwrite(guest_prdt, prdt, len); qpci_io_writel(dev, bmdma_base + bmreg_prdt, guest_prdt); /* ATA DMA command */ if (cmd == CMD_PACKET) { /* Enables ATAPI DMA; otherwise PIO is attempted */ qpci_io_writeb(dev, ide_base + reg_feature, 0x01); } else { qpci_io_writeb(dev, ide_base + reg_nsectors, nb_sectors); qpci_io_writeb(dev, ide_base + reg_lba_low, sector & 0xff); qpci_io_writeb(dev, ide_base + reg_lba_middle, (sector >> 8) & 0xff); qpci_io_writeb(dev, ide_base + reg_lba_high, (sector >> 16) & 0xff); } qpci_io_writeb(dev, ide_base + reg_command, cmd); if (post_exec) { post_exec(dev, ide_base, sector, nb_sectors); } /* Start DMA transfer */ qpci_io_writeb(dev, bmdma_base + bmreg_cmd, BM_CMD_START | (from_dev ? BM_CMD_WRITE : 0)); if (flags & CMDF_ABORT) { qpci_io_writeb(dev, bmdma_base + bmreg_cmd, 0); } /* Wait for the DMA transfer to complete */ do { status = qpci_io_readb(dev, bmdma_base + bmreg_status); } while ((status & (BM_STS_ACTIVE | BM_STS_INTR)) == BM_STS_ACTIVE); g_assert_cmpint(get_irq(IDE_PRIMARY_IRQ), ==, !!(status & BM_STS_INTR)); /* Check IDE status code */ assert_bit_set(qpci_io_readb(dev, ide_base + reg_status), DRDY); assert_bit_clear(qpci_io_readb(dev, ide_base + reg_status), BSY | DRQ); /* Reading the status register clears the IRQ */ g_assert(!get_irq(IDE_PRIMARY_IRQ)); /* Stop DMA transfer if still active */ if (status & BM_STS_ACTIVE) { qpci_io_writeb(dev, bmdma_base + bmreg_cmd, 0); } free_pci_device(dev); return status; }

qemu

b4ba67d9a702507793c2724e56f98e9b0f7be02b

static int send_dma_request(int cmd, uint64_t sector, int nb_sectors, PrdtEntry *prdt, int prdt_entries, void(*post_exec)(QPCIDevice *dev, void *ide_base, uint64_t sector, int nb_sectors)) { QPCIDevice *dev; void *bmdma_base; void *ide_base; uintptr_t guest_prdt; size_t len; bool from_dev; uint8_t status; int flags; dev = get_pci_device(&bmdma_base, &ide_base); flags = cmd & ~0xff; cmd &= 0xff; switch (cmd) { case CMD_READ_DMA: case CMD_PACKET: from_dev = true; break; case CMD_WRITE_DMA: from_dev = false; break; default: g_assert_not_reached(); } if (flags & CMDF_NO_BM) { qpci_config_writew(dev, PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY); } qpci_io_writeb(dev, ide_base + reg_device, 0 | LBA); qpci_io_writeb(dev, bmdma_base + bmreg_cmd, 0); qpci_io_writeb(dev, bmdma_base + bmreg_status, BM_STS_INTR); len = sizeof(*prdt) * prdt_entries; guest_prdt = guest_alloc(guest_malloc, len); memwrite(guest_prdt, prdt, len); qpci_io_writel(dev, bmdma_base + bmreg_prdt, guest_prdt); if (cmd == CMD_PACKET) { qpci_io_writeb(dev, ide_base + reg_feature, 0x01); } else { qpci_io_writeb(dev, ide_base + reg_nsectors, nb_sectors); qpci_io_writeb(dev, ide_base + reg_lba_low, sector & 0xff); qpci_io_writeb(dev, ide_base + reg_lba_middle, (sector >> 8) & 0xff); qpci_io_writeb(dev, ide_base + reg_lba_high, (sector >> 16) & 0xff); } qpci_io_writeb(dev, ide_base + reg_command, cmd); if (post_exec) { post_exec(dev, ide_base, sector, nb_sectors); } qpci_io_writeb(dev, bmdma_base + bmreg_cmd, BM_CMD_START | (from_dev ? BM_CMD_WRITE : 0)); if (flags & CMDF_ABORT) { qpci_io_writeb(dev, bmdma_base + bmreg_cmd, 0); } do { status = qpci_io_readb(dev, bmdma_base + bmreg_status); } while ((status & (BM_STS_ACTIVE | BM_STS_INTR)) == BM_STS_ACTIVE); g_assert_cmpint(get_irq(IDE_PRIMARY_IRQ), ==, !!(status & BM_STS_INTR)); assert_bit_set(qpci_io_readb(dev, ide_base + reg_status), DRDY); assert_bit_clear(qpci_io_readb(dev, ide_base + reg_status), BSY | DRQ); g_assert(!get_irq(IDE_PRIMARY_IRQ)); if (status & BM_STS_ACTIVE) { qpci_io_writeb(dev, bmdma_base + bmreg_cmd, 0); } free_pci_device(dev); return status; }

static int FUNC_0(int VAR_0, uint64_t VAR_8, int VAR_8, PrdtEntry *VAR_3, int VAR_4, void(*VAR_5)(QPCIDevice *VAR_6, void *VAR_9, uint64_t VAR_8, int VAR_8)) { QPCIDevice *VAR_6; void *VAR_8; void *VAR_9; uintptr_t guest_prdt; size_t len; bool from_dev; uint8_t status; int VAR_9; VAR_6 = get_pci_device(&VAR_8, &VAR_9); VAR_9 = VAR_0 & ~0xff; VAR_0 &= 0xff; switch (VAR_0) { case CMD_READ_DMA: case CMD_PACKET: from_dev = true; break; case CMD_WRITE_DMA: from_dev = false; break; default: g_assert_not_reached(); } if (VAR_9 & CMDF_NO_BM) { qpci_config_writew(VAR_6, PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY); } qpci_io_writeb(VAR_6, VAR_9 + reg_device, 0 | LBA); qpci_io_writeb(VAR_6, VAR_8 + bmreg_cmd, 0); qpci_io_writeb(VAR_6, VAR_8 + bmreg_status, BM_STS_INTR); len = sizeof(*VAR_3) * VAR_4; guest_prdt = guest_alloc(guest_malloc, len); memwrite(guest_prdt, VAR_3, len); qpci_io_writel(VAR_6, VAR_8 + bmreg_prdt, guest_prdt); if (VAR_0 == CMD_PACKET) { qpci_io_writeb(VAR_6, VAR_9 + reg_feature, 0x01); } else { qpci_io_writeb(VAR_6, VAR_9 + reg_nsectors, VAR_8); qpci_io_writeb(VAR_6, VAR_9 + reg_lba_low, VAR_8 & 0xff); qpci_io_writeb(VAR_6, VAR_9 + reg_lba_middle, (VAR_8 >> 8) & 0xff); qpci_io_writeb(VAR_6, VAR_9 + reg_lba_high, (VAR_8 >> 16) & 0xff); } qpci_io_writeb(VAR_6, VAR_9 + reg_command, VAR_0); if (VAR_5) { VAR_5(VAR_6, VAR_9, VAR_8, VAR_8); } qpci_io_writeb(VAR_6, VAR_8 + bmreg_cmd, BM_CMD_START | (from_dev ? BM_CMD_WRITE : 0)); if (VAR_9 & CMDF_ABORT) { qpci_io_writeb(VAR_6, VAR_8 + bmreg_cmd, 0); } do { status = qpci_io_readb(VAR_6, VAR_8 + bmreg_status); } while ((status & (BM_STS_ACTIVE | BM_STS_INTR)) == BM_STS_ACTIVE); g_assert_cmpint(get_irq(IDE_PRIMARY_IRQ), ==, !!(status & BM_STS_INTR)); assert_bit_set(qpci_io_readb(VAR_6, VAR_9 + reg_status), DRDY); assert_bit_clear(qpci_io_readb(VAR_6, VAR_9 + reg_status), BSY | DRQ); g_assert(!get_irq(IDE_PRIMARY_IRQ)); if (status & BM_STS_ACTIVE) { qpci_io_writeb(VAR_6, VAR_8 + bmreg_cmd, 0); } free_pci_device(VAR_6); return status; }

static int mxf_read_close(AVFormatContext *s) { MXFContext *mxf = s->priv_data; MXFIndexTableSegment *seg; int i; av_freep(&mxf->packages_refs); for (i = 0; i < s->nb_streams; i++) s->streams[i]->priv_data = NULL; for (i = 0; i < mxf->metadata_sets_count; i++) { switch (mxf->metadata_sets[i]->type) { case MultipleDescriptor: av_freep(&((MXFDescriptor *)mxf->metadata_sets[i])->sub_descriptors_refs); break; case Sequence: av_freep(&((MXFSequence *)mxf->metadata_sets[i])->structural_components_refs); break; case SourcePackage: case MaterialPackage: av_freep(&((MXFPackage *)mxf->metadata_sets[i])->tracks_refs); break; case IndexTableSegment: seg = (MXFIndexTableSegment *)mxf->metadata_sets[i]; av_freep(&seg->temporal_offset_entries); av_freep(&seg->flag_entries); av_freep(&seg->stream_offset_entries); break; default: break; } av_freep(&mxf->metadata_sets[i]); } av_freep(&mxf->partitions); av_freep(&mxf->metadata_sets); av_freep(&mxf->aesc); av_freep(&mxf->local_tags); for (i = 0; i < mxf->nb_index_tables; i++) { av_freep(&mxf->index_tables[i].segments); av_freep(&mxf->index_tables[i].ptses); av_freep(&mxf->index_tables[i].fake_index); } av_freep(&mxf->index_tables); return 0; }

FFmpeg

873049e6d854a69292934eb882731dd2ad7438b9

static int mxf_read_close(AVFormatContext *s) { MXFContext *mxf = s->priv_data; MXFIndexTableSegment *seg; int i; av_freep(&mxf->packages_refs); for (i = 0; i < s->nb_streams; i++) s->streams[i]->priv_data = NULL; for (i = 0; i < mxf->metadata_sets_count; i++) { switch (mxf->metadata_sets[i]->type) { case MultipleDescriptor: av_freep(&((MXFDescriptor *)mxf->metadata_sets[i])->sub_descriptors_refs); break; case Sequence: av_freep(&((MXFSequence *)mxf->metadata_sets[i])->structural_components_refs); break; case SourcePackage: case MaterialPackage: av_freep(&((MXFPackage *)mxf->metadata_sets[i])->tracks_refs); break; case IndexTableSegment: seg = (MXFIndexTableSegment *)mxf->metadata_sets[i]; av_freep(&seg->temporal_offset_entries); av_freep(&seg->flag_entries); av_freep(&seg->stream_offset_entries); break; default: break; } av_freep(&mxf->metadata_sets[i]); } av_freep(&mxf->partitions); av_freep(&mxf->metadata_sets); av_freep(&mxf->aesc); av_freep(&mxf->local_tags); for (i = 0; i < mxf->nb_index_tables; i++) { av_freep(&mxf->index_tables[i].segments); av_freep(&mxf->index_tables[i].ptses); av_freep(&mxf->index_tables[i].fake_index); } av_freep(&mxf->index_tables); return 0; }

static int FUNC_0(AVFormatContext *VAR_0) { MXFContext *mxf = VAR_0->priv_data; MXFIndexTableSegment *seg; int VAR_1; av_freep(&mxf->packages_refs); for (VAR_1 = 0; VAR_1 < VAR_0->nb_streams; VAR_1++) VAR_0->streams[VAR_1]->priv_data = NULL; for (VAR_1 = 0; VAR_1 < mxf->metadata_sets_count; VAR_1++) { switch (mxf->metadata_sets[VAR_1]->type) { case MultipleDescriptor: av_freep(&((MXFDescriptor *)mxf->metadata_sets[VAR_1])->sub_descriptors_refs); break; case Sequence: av_freep(&((MXFSequence *)mxf->metadata_sets[VAR_1])->structural_components_refs); break; case SourcePackage: case MaterialPackage: av_freep(&((MXFPackage *)mxf->metadata_sets[VAR_1])->tracks_refs); break; case IndexTableSegment: seg = (MXFIndexTableSegment *)mxf->metadata_sets[VAR_1]; av_freep(&seg->temporal_offset_entries); av_freep(&seg->flag_entries); av_freep(&seg->stream_offset_entries); break; default: break; } av_freep(&mxf->metadata_sets[VAR_1]); } av_freep(&mxf->partitions); av_freep(&mxf->metadata_sets); av_freep(&mxf->aesc); av_freep(&mxf->local_tags); for (VAR_1 = 0; VAR_1 < mxf->nb_index_tables; VAR_1++) { av_freep(&mxf->index_tables[VAR_1].segments); av_freep(&mxf->index_tables[VAR_1].ptses); av_freep(&mxf->index_tables[VAR_1].fake_index); } av_freep(&mxf->index_tables); return 0; }

static int adts_aac_read_packet(AVFormatContext *s, AVPacket *pkt) { int ret, fsize; ret = av_get_packet(s->pb, pkt, ADTS_HEADER_SIZE); if (ret < 0) return ret; if (ret < ADTS_HEADER_SIZE) { av_packet_unref(pkt); return AVERROR(EIO); } if ((AV_RB16(pkt->data) >> 4) != 0xfff) { av_packet_unref(pkt); return AVERROR_INVALIDDATA; } fsize = (AV_RB32(pkt->data + 3) >> 13) & 0x1FFF; if (fsize < ADTS_HEADER_SIZE) { av_packet_unref(pkt); return AVERROR_INVALIDDATA; } return av_append_packet(s->pb, pkt, fsize - ADTS_HEADER_SIZE); }

FFmpeg

2779d33ed99898675e0b3884fabe1ce6839f36d1

static int adts_aac_read_packet(AVFormatContext *s, AVPacket *pkt) { int ret, fsize; ret = av_get_packet(s->pb, pkt, ADTS_HEADER_SIZE); if (ret < 0) return ret; if (ret < ADTS_HEADER_SIZE) { av_packet_unref(pkt); return AVERROR(EIO); } if ((AV_RB16(pkt->data) >> 4) != 0xfff) { av_packet_unref(pkt); return AVERROR_INVALIDDATA; } fsize = (AV_RB32(pkt->data + 3) >> 13) & 0x1FFF; if (fsize < ADTS_HEADER_SIZE) { av_packet_unref(pkt); return AVERROR_INVALIDDATA; } return av_append_packet(s->pb, pkt, fsize - ADTS_HEADER_SIZE); }

static int FUNC_0(AVFormatContext *VAR_0, AVPacket *VAR_1) { int VAR_2, VAR_3; VAR_2 = av_get_packet(VAR_0->pb, VAR_1, ADTS_HEADER_SIZE); if (VAR_2 < 0) return VAR_2; if (VAR_2 < ADTS_HEADER_SIZE) { av_packet_unref(VAR_1); return AVERROR(EIO); } if ((AV_RB16(VAR_1->data) >> 4) != 0xfff) { av_packet_unref(VAR_1); return AVERROR_INVALIDDATA; } VAR_3 = (AV_RB32(VAR_1->data + 3) >> 13) & 0x1FFF; if (VAR_3 < ADTS_HEADER_SIZE) { av_packet_unref(VAR_1); return AVERROR_INVALIDDATA; } return av_append_packet(VAR_0->pb, VAR_1, VAR_3 - ADTS_HEADER_SIZE); }

static int bgr24ToYv12Wrapper(SwsContext *c, const uint8_t *src[], int srcStride[], int srcSliceY, int srcSliceH, uint8_t *dst[], int dstStride[]) { rgb24toyv12( src[0], dst[0] + srcSliceY * dstStride[0], dst[1] + (srcSliceY >> 1) * dstStride[1], dst[2] + (srcSliceY >> 1) * dstStride[2], c->srcW, srcSliceH, dstStride[0], dstStride[1], srcStride[0]); if (dst[3]) fillPlane(dst[3], dstStride[3], c->srcW, srcSliceH, srcSliceY, 255); return srcSliceH; }

FFmpeg

a37fd7f9578d2dfbe20a109aae91e5f0a4b58874

static int bgr24ToYv12Wrapper(SwsContext *c, const uint8_t *src[], int srcStride[], int srcSliceY, int srcSliceH, uint8_t *dst[], int dstStride[]) { rgb24toyv12( src[0], dst[0] + srcSliceY * dstStride[0], dst[1] + (srcSliceY >> 1) * dstStride[1], dst[2] + (srcSliceY >> 1) * dstStride[2], c->srcW, srcSliceH, dstStride[0], dstStride[1], srcStride[0]); if (dst[3]) fillPlane(dst[3], dstStride[3], c->srcW, srcSliceH, srcSliceY, 255); return srcSliceH; }

static int FUNC_0(SwsContext *VAR_0, const uint8_t *VAR_1[], int VAR_2[], int VAR_3, int VAR_4, uint8_t *VAR_5[], int VAR_6[]) { rgb24toyv12( VAR_1[0], VAR_5[0] + VAR_3 * VAR_6[0], VAR_5[1] + (VAR_3 >> 1) * VAR_6[1], VAR_5[2] + (VAR_3 >> 1) * VAR_6[2], VAR_0->srcW, VAR_4, VAR_6[0], VAR_6[1], VAR_2[0]); if (VAR_5[3]) fillPlane(VAR_5[3], VAR_6[3], VAR_0->srcW, VAR_4, VAR_3, 255); return VAR_4; }

void rgb15tobgr32(const uint8_t *src, uint8_t *dst, unsigned int src_size) { const uint16_t *end; uint8_t *d = (uint8_t *)dst; const uint16_t *s = (const uint16_t *)src; end = s + src_size/2; while(s < end) { register uint16_t bgr; bgr = *s++; *d++ = (bgr&0x7C00)>>7; *d++ = (bgr&0x3E0)>>2; *d++ = (bgr&0x1F)<<3; *d++ = 0; } }

FFmpeg

7f526efd17973ec6d2204f7a47b6923e2be31363

void rgb15tobgr32(const uint8_t *src, uint8_t *dst, unsigned int src_size) { const uint16_t *end; uint8_t *d = (uint8_t *)dst; const uint16_t *s = (const uint16_t *)src; end = s + src_size/2; while(s < end) { register uint16_t bgr; bgr = *s++; *d++ = (bgr&0x7C00)>>7; *d++ = (bgr&0x3E0)>>2; *d++ = (bgr&0x1F)<<3; *d++ = 0; } }

void FUNC_0(const uint8_t *VAR_0, uint8_t *VAR_1, unsigned int VAR_2) { const uint16_t *VAR_3; uint8_t *d = (uint8_t *)VAR_1; const uint16_t *VAR_4 = (const uint16_t *)VAR_0; VAR_3 = VAR_4 + VAR_2/2; while(VAR_4 < VAR_3) { register uint16_t VAR_5; VAR_5 = *VAR_4++; *d++ = (VAR_5&0x7C00)>>7; *d++ = (VAR_5&0x3E0)>>2; *d++ = (VAR_5&0x1F)<<3; *d++ = 0; } }

static int vp5_parse_header(VP56Context *s, const uint8_t *buf, int buf_size) { VP56RangeCoder *c = &s->c; int rows, cols; ff_vp56_init_range_decoder(&s->c, buf, buf_size); s->frames[VP56_FRAME_CURRENT]->key_frame = !vp56_rac_get(c); vp56_rac_get(c); ff_vp56_init_dequant(s, vp56_rac_gets(c, 6)); if (s->frames[VP56_FRAME_CURRENT]->key_frame) { vp56_rac_gets(c, 8); if(vp56_rac_gets(c, 5) > 5) return AVERROR_INVALIDDATA; vp56_rac_gets(c, 2); if (vp56_rac_get(c)) { av_log(s->avctx, AV_LOG_ERROR, "interlacing not supported\n"); return AVERROR_PATCHWELCOME; } rows = vp56_rac_gets(c, 8); /* number of stored macroblock rows */ cols = vp56_rac_gets(c, 8); /* number of stored macroblock cols */ if (!rows || !cols) { av_log(s->avctx, AV_LOG_ERROR, "Invalid size %dx%d\n", cols << 4, rows << 4); return AVERROR_INVALIDDATA; } vp56_rac_gets(c, 8); /* number of displayed macroblock rows */ vp56_rac_gets(c, 8); /* number of displayed macroblock cols */ vp56_rac_gets(c, 2); if (!s->macroblocks || /* first frame */ 16*cols != s->avctx->coded_width || 16*rows != s->avctx->coded_height) { int ret = ff_set_dimensions(s->avctx, 16 * cols, 16 * rows); if (ret < 0) return ret; return VP56_SIZE_CHANGE; } } else if (!s->macroblocks) return AVERROR_INVALIDDATA; return 0; }

FFmpeg

55d7371fe0c44c025eb0e75215e0685870f31874

static int vp5_parse_header(VP56Context *s, const uint8_t *buf, int buf_size) { VP56RangeCoder *c = &s->c; int rows, cols; ff_vp56_init_range_decoder(&s->c, buf, buf_size); s->frames[VP56_FRAME_CURRENT]->key_frame = !vp56_rac_get(c); vp56_rac_get(c); ff_vp56_init_dequant(s, vp56_rac_gets(c, 6)); if (s->frames[VP56_FRAME_CURRENT]->key_frame) { vp56_rac_gets(c, 8); if(vp56_rac_gets(c, 5) > 5) return AVERROR_INVALIDDATA; vp56_rac_gets(c, 2); if (vp56_rac_get(c)) { av_log(s->avctx, AV_LOG_ERROR, "interlacing not supported\n"); return AVERROR_PATCHWELCOME; } rows = vp56_rac_gets(c, 8); cols = vp56_rac_gets(c, 8); if (!rows || !cols) { av_log(s->avctx, AV_LOG_ERROR, "Invalid size %dx%d\n", cols << 4, rows << 4); return AVERROR_INVALIDDATA; } vp56_rac_gets(c, 8); vp56_rac_gets(c, 8); vp56_rac_gets(c, 2); if (!s->macroblocks || 16*cols != s->avctx->coded_width || 16*rows != s->avctx->coded_height) { int ret = ff_set_dimensions(s->avctx, 16 * cols, 16 * rows); if (ret < 0) return ret; return VP56_SIZE_CHANGE; } } else if (!s->macroblocks) return AVERROR_INVALIDDATA; return 0; }

static int FUNC_0(VP56Context *VAR_0, const uint8_t *VAR_1, int VAR_2) { VP56RangeCoder *c = &VAR_0->c; int VAR_3, VAR_4; ff_vp56_init_range_decoder(&VAR_0->c, VAR_1, VAR_2); VAR_0->frames[VP56_FRAME_CURRENT]->key_frame = !vp56_rac_get(c); vp56_rac_get(c); ff_vp56_init_dequant(VAR_0, vp56_rac_gets(c, 6)); if (VAR_0->frames[VP56_FRAME_CURRENT]->key_frame) { vp56_rac_gets(c, 8); if(vp56_rac_gets(c, 5) > 5) return AVERROR_INVALIDDATA; vp56_rac_gets(c, 2); if (vp56_rac_get(c)) { av_log(VAR_0->avctx, AV_LOG_ERROR, "interlacing not supported\n"); return AVERROR_PATCHWELCOME; } VAR_3 = vp56_rac_gets(c, 8); VAR_4 = vp56_rac_gets(c, 8); if (!VAR_3 || !VAR_4) { av_log(VAR_0->avctx, AV_LOG_ERROR, "Invalid size %dx%d\n", VAR_4 << 4, VAR_3 << 4); return AVERROR_INVALIDDATA; } vp56_rac_gets(c, 8); vp56_rac_gets(c, 8); vp56_rac_gets(c, 2); if (!VAR_0->macroblocks || 16*VAR_4 != VAR_0->avctx->coded_width || 16*VAR_3 != VAR_0->avctx->coded_height) { int VAR_5 = ff_set_dimensions(VAR_0->avctx, 16 * VAR_4, 16 * VAR_3); if (VAR_5 < 0) return VAR_5; return VP56_SIZE_CHANGE; } } else if (!VAR_0->macroblocks) return AVERROR_INVALIDDATA; return 0; }

static inline int coeff_unpack_golomb(GetBitContext *gb, int qfactor, int qoffset) { int coeff = dirac_get_se_golomb(gb); const int sign = FFSIGN(coeff); if (coeff) coeff = sign*((sign * coeff * qfactor + qoffset) >> 2); return coeff; }

FFmpeg

92da23093c784b1d9f0db4db51d28ea80a59e759

static inline int coeff_unpack_golomb(GetBitContext *gb, int qfactor, int qoffset) { int coeff = dirac_get_se_golomb(gb); const int sign = FFSIGN(coeff); if (coeff) coeff = sign*((sign * coeff * qfactor + qoffset) >> 2); return coeff; }

static inline int FUNC_0(GetBitContext *VAR_0, int VAR_1, int VAR_2) { int VAR_3 = dirac_get_se_golomb(VAR_0); const int VAR_4 = FFSIGN(VAR_3); if (VAR_3) VAR_3 = VAR_4*((VAR_4 * VAR_3 * VAR_1 + VAR_2) >> 2); return VAR_3; }

int ff_h264_frame_start(H264Context *h) { Picture *pic; int i, ret; const int pixel_shift = h->pixel_shift; int c[4] = { 1<<(h->sps.bit_depth_luma-1), 1<<(h->sps.bit_depth_chroma-1), 1<<(h->sps.bit_depth_chroma-1), -1 }; if (!ff_thread_can_start_frame(h->avctx)) { av_log(h->avctx, AV_LOG_ERROR, "Attempt to start a frame outside SETUP state\n"); return -1; } release_unused_pictures(h, 1); h->cur_pic_ptr = NULL; i = find_unused_picture(h); if (i < 0) { av_log(h->avctx, AV_LOG_ERROR, "no frame buffer available\n"); return i; } pic = &h->DPB[i]; pic->f.reference = h->droppable ? 0 : h->picture_structure; pic->f.coded_picture_number = h->coded_picture_number++; pic->field_picture = h->picture_structure != PICT_FRAME; /* * Zero key_frame here; IDR markings per slice in frame or fields are ORed * in later. * See decode_nal_units(). */ pic->f.key_frame = 0; pic->sync = 0; pic->mmco_reset = 0; if ((ret = alloc_picture(h, pic)) < 0) return ret; if(!h->sync && !h->avctx->hwaccel) avpriv_color_frame(&pic->f, c); h->cur_pic_ptr = pic; h->cur_pic = *h->cur_pic_ptr; h->cur_pic.f.extended_data = h->cur_pic.f.data; ff_er_frame_start(&h->er); assert(h->linesize && h->uvlinesize); for (i = 0; i < 16; i++) { h->block_offset[i] = (4 * ((scan8[i] - scan8[0]) & 7) << pixel_shift) + 4 * h->linesize * ((scan8[i] - scan8[0]) >> 3); h->block_offset[48 + i] = (4 * ((scan8[i] - scan8[0]) & 7) << pixel_shift) + 8 * h->linesize * ((scan8[i] - scan8[0]) >> 3); } for (i = 0; i < 16; i++) { h->block_offset[16 + i] = h->block_offset[32 + i] = (4 * ((scan8[i] - scan8[0]) & 7) << pixel_shift) + 4 * h->uvlinesize * ((scan8[i] - scan8[0]) >> 3); h->block_offset[48 + 16 + i] = h->block_offset[48 + 32 + i] = (4 * ((scan8[i] - scan8[0]) & 7) << pixel_shift) + 8 * h->uvlinesize * ((scan8[i] - scan8[0]) >> 3); } /* can't be in alloc_tables because linesize isn't known there. * FIXME: redo bipred weight to not require extra buffer? */ for (i = 0; i < h->slice_context_count; i++) if (h->thread_context[i]) { ret = alloc_scratch_buffers(h->thread_context[i], h->linesize); if (ret < 0) return ret; } /* Some macroblocks can be accessed before they're available in case * of lost slices, MBAFF or threading. */ memset(h->slice_table, -1, (h->mb_height * h->mb_stride - 1) * sizeof(*h->slice_table)); // s->decode = (h->flags & CODEC_FLAG_PSNR) || !s->encoding || // h->cur_pic.f.reference /* || h->contains_intra */ || 1; /* We mark the current picture as non-reference after allocating it, so * that if we break out due to an error it can be released automatically * in the next ff_MPV_frame_start(). * SVQ3 as well as most other codecs have only last/next/current and thus * get released even with set reference, besides SVQ3 and others do not * mark frames as reference later "naturally". */ if (h->avctx->codec_id != AV_CODEC_ID_SVQ3) h->cur_pic_ptr->f.reference = 0; h->cur_pic_ptr->field_poc[0] = h->cur_pic_ptr->field_poc[1] = INT_MAX; h->next_output_pic = NULL; assert(h->cur_pic_ptr->long_ref == 0); return 0; }

FFmpeg

259603b9176701410d6edeedbcbde565c767f27b

int ff_h264_frame_start(H264Context *h) { Picture *pic; int i, ret; const int pixel_shift = h->pixel_shift; int c[4] = { 1<<(h->sps.bit_depth_luma-1), 1<<(h->sps.bit_depth_chroma-1), 1<<(h->sps.bit_depth_chroma-1), -1 }; if (!ff_thread_can_start_frame(h->avctx)) { av_log(h->avctx, AV_LOG_ERROR, "Attempt to start a frame outside SETUP state\n"); return -1; } release_unused_pictures(h, 1); h->cur_pic_ptr = NULL; i = find_unused_picture(h); if (i < 0) { av_log(h->avctx, AV_LOG_ERROR, "no frame buffer available\n"); return i; } pic = &h->DPB[i]; pic->f.reference = h->droppable ? 0 : h->picture_structure; pic->f.coded_picture_number = h->coded_picture_number++; pic->field_picture = h->picture_structure != PICT_FRAME; pic->f.key_frame = 0; pic->sync = 0; pic->mmco_reset = 0; if ((ret = alloc_picture(h, pic)) < 0) return ret; if(!h->sync && !h->avctx->hwaccel) avpriv_color_frame(&pic->f, c); h->cur_pic_ptr = pic; h->cur_pic = *h->cur_pic_ptr; h->cur_pic.f.extended_data = h->cur_pic.f.data; ff_er_frame_start(&h->er); assert(h->linesize && h->uvlinesize); for (i = 0; i < 16; i++) { h->block_offset[i] = (4 * ((scan8[i] - scan8[0]) & 7) << pixel_shift) + 4 * h->linesize * ((scan8[i] - scan8[0]) >> 3); h->block_offset[48 + i] = (4 * ((scan8[i] - scan8[0]) & 7) << pixel_shift) + 8 * h->linesize * ((scan8[i] - scan8[0]) >> 3); } for (i = 0; i < 16; i++) { h->block_offset[16 + i] = h->block_offset[32 + i] = (4 * ((scan8[i] - scan8[0]) & 7) << pixel_shift) + 4 * h->uvlinesize * ((scan8[i] - scan8[0]) >> 3); h->block_offset[48 + 16 + i] = h->block_offset[48 + 32 + i] = (4 * ((scan8[i] - scan8[0]) & 7) << pixel_shift) + 8 * h->uvlinesize * ((scan8[i] - scan8[0]) >> 3); } for (i = 0; i < h->slice_context_count; i++) if (h->thread_context[i]) { ret = alloc_scratch_buffers(h->thread_context[i], h->linesize); if (ret < 0) return ret; } memset(h->slice_table, -1, (h->mb_height * h->mb_stride - 1) * sizeof(*h->slice_table)); if (h->avctx->codec_id != AV_CODEC_ID_SVQ3) h->cur_pic_ptr->f.reference = 0; h->cur_pic_ptr->field_poc[0] = h->cur_pic_ptr->field_poc[1] = INT_MAX; h->next_output_pic = NULL; assert(h->cur_pic_ptr->long_ref == 0); return 0; }

int FUNC_0(H264Context *VAR_0) { Picture *pic; int VAR_1, VAR_2; const int VAR_3 = VAR_0->VAR_3; int VAR_4[4] = { 1<<(VAR_0->sps.bit_depth_luma-1), 1<<(VAR_0->sps.bit_depth_chroma-1), 1<<(VAR_0->sps.bit_depth_chroma-1), -1 }; if (!ff_thread_can_start_frame(VAR_0->avctx)) { av_log(VAR_0->avctx, AV_LOG_ERROR, "Attempt to start a frame outside SETUP state\n"); return -1; } release_unused_pictures(VAR_0, 1); VAR_0->cur_pic_ptr = NULL; VAR_1 = find_unused_picture(VAR_0); if (VAR_1 < 0) { av_log(VAR_0->avctx, AV_LOG_ERROR, "no frame buffer available\n"); return VAR_1; } pic = &VAR_0->DPB[VAR_1]; pic->f.reference = VAR_0->droppable ? 0 : VAR_0->picture_structure; pic->f.coded_picture_number = VAR_0->coded_picture_number++; pic->field_picture = VAR_0->picture_structure != PICT_FRAME; pic->f.key_frame = 0; pic->sync = 0; pic->mmco_reset = 0; if ((VAR_2 = alloc_picture(VAR_0, pic)) < 0) return VAR_2; if(!VAR_0->sync && !VAR_0->avctx->hwaccel) avpriv_color_frame(&pic->f, VAR_4); VAR_0->cur_pic_ptr = pic; VAR_0->cur_pic = *VAR_0->cur_pic_ptr; VAR_0->cur_pic.f.extended_data = VAR_0->cur_pic.f.data; ff_er_frame_start(&VAR_0->er); assert(VAR_0->linesize && VAR_0->uvlinesize); for (VAR_1 = 0; VAR_1 < 16; VAR_1++) { VAR_0->block_offset[VAR_1] = (4 * ((scan8[VAR_1] - scan8[0]) & 7) << VAR_3) + 4 * VAR_0->linesize * ((scan8[VAR_1] - scan8[0]) >> 3); VAR_0->block_offset[48 + VAR_1] = (4 * ((scan8[VAR_1] - scan8[0]) & 7) << VAR_3) + 8 * VAR_0->linesize * ((scan8[VAR_1] - scan8[0]) >> 3); } for (VAR_1 = 0; VAR_1 < 16; VAR_1++) { VAR_0->block_offset[16 + VAR_1] = VAR_0->block_offset[32 + VAR_1] = (4 * ((scan8[VAR_1] - scan8[0]) & 7) << VAR_3) + 4 * VAR_0->uvlinesize * ((scan8[VAR_1] - scan8[0]) >> 3); VAR_0->block_offset[48 + 16 + VAR_1] = VAR_0->block_offset[48 + 32 + VAR_1] = (4 * ((scan8[VAR_1] - scan8[0]) & 7) << VAR_3) + 8 * VAR_0->uvlinesize * ((scan8[VAR_1] - scan8[0]) >> 3); } for (VAR_1 = 0; VAR_1 < VAR_0->slice_context_count; VAR_1++) if (VAR_0->thread_context[VAR_1]) { VAR_2 = alloc_scratch_buffers(VAR_0->thread_context[VAR_1], VAR_0->linesize); if (VAR_2 < 0) return VAR_2; } memset(VAR_0->slice_table, -1, (VAR_0->mb_height * VAR_0->mb_stride - 1) * sizeof(*VAR_0->slice_table)); if (VAR_0->avctx->codec_id != AV_CODEC_ID_SVQ3) VAR_0->cur_pic_ptr->f.reference = 0; VAR_0->cur_pic_ptr->field_poc[0] = VAR_0->cur_pic_ptr->field_poc[1] = INT_MAX; VAR_0->next_output_pic = NULL; assert(VAR_0->cur_pic_ptr->long_ref == 0); return 0; }

static void gen_rfe(DisasContext *s, TCGv_i32 pc, TCGv_i32 cpsr) { gen_set_cpsr(cpsr, CPSR_ERET_MASK); tcg_temp_free_i32(cpsr); store_reg(s, 15, pc); s->is_jmp = DISAS_UPDATE; }

qemu

577bf808958d06497928c639efaa473bf8c5e099

static void gen_rfe(DisasContext *s, TCGv_i32 pc, TCGv_i32 cpsr) { gen_set_cpsr(cpsr, CPSR_ERET_MASK); tcg_temp_free_i32(cpsr); store_reg(s, 15, pc); s->is_jmp = DISAS_UPDATE; }

static void FUNC_0(DisasContext *VAR_0, TCGv_i32 VAR_1, TCGv_i32 VAR_2) { gen_set_cpsr(VAR_2, CPSR_ERET_MASK); tcg_temp_free_i32(VAR_2); store_reg(VAR_0, 15, VAR_1); VAR_0->is_jmp = DISAS_UPDATE; }

static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel) { const char *rn = "invalid"; if (sel != 0) check_insn(ctx, ISA_MIPS32); switch (reg) { case 0: switch (sel) { case 0: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Index)); rn = "Index"; break; case 1: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_helper_mfc0_mvpcontrol(arg, cpu_env); rn = "MVPControl"; break; case 2: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_helper_mfc0_mvpconf0(arg, cpu_env); rn = "MVPConf0"; break; case 3: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_helper_mfc0_mvpconf1(arg, cpu_env); rn = "MVPConf1"; break; case 4: CP0_CHECK(ctx->vp); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_VPControl)); rn = "VPControl"; break; default: goto cp0_unimplemented; } break; case 1: switch (sel) { case 0: CP0_CHECK(!(ctx->insn_flags & ISA_MIPS32R6)); gen_helper_mfc0_random(arg, cpu_env); rn = "Random"; break; case 1: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_VPEControl)); rn = "VPEControl"; break; case 2: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_VPEConf0)); rn = "VPEConf0"; break; case 3: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_VPEConf1)); rn = "VPEConf1"; break; case 4: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_mfc0_load64(arg, offsetof(CPUMIPSState, CP0_YQMask)); rn = "YQMask"; break; case 5: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_mfc0_load64(arg, offsetof(CPUMIPSState, CP0_VPESchedule)); rn = "VPESchedule"; break; case 6: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_mfc0_load64(arg, offsetof(CPUMIPSState, CP0_VPEScheFBack)); rn = "VPEScheFBack"; break; case 7: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_VPEOpt)); rn = "VPEOpt"; break; default: goto cp0_unimplemented; } break; case 2: switch (sel) { case 0: { TCGv_i64 tmp = tcg_temp_new_i64(); tcg_gen_ld_i64(tmp, cpu_env, offsetof(CPUMIPSState, CP0_EntryLo0)); #if defined(TARGET_MIPS64) if (ctx->rxi) { /* Move RI/XI fields to bits 31:30 */ tcg_gen_shri_tl(arg, tmp, CP0EnLo_XI); tcg_gen_deposit_tl(tmp, tmp, arg, 30, 2); } #endif gen_move_low32(arg, tmp); tcg_temp_free_i64(tmp); } rn = "EntryLo0"; break; case 1: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_helper_mfc0_tcstatus(arg, cpu_env); rn = "TCStatus"; break; case 2: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_helper_mfc0_tcbind(arg, cpu_env); rn = "TCBind"; break; case 3: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_helper_mfc0_tcrestart(arg, cpu_env); rn = "TCRestart"; break; case 4: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_helper_mfc0_tchalt(arg, cpu_env); rn = "TCHalt"; break; case 5: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_helper_mfc0_tccontext(arg, cpu_env); rn = "TCContext"; break; case 6: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_helper_mfc0_tcschedule(arg, cpu_env); rn = "TCSchedule"; break; case 7: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_helper_mfc0_tcschefback(arg, cpu_env); rn = "TCScheFBack"; break; default: goto cp0_unimplemented; } break; case 3: switch (sel) { case 0: { TCGv_i64 tmp = tcg_temp_new_i64(); tcg_gen_ld_i64(tmp, cpu_env, offsetof(CPUMIPSState, CP0_EntryLo1)); #if defined(TARGET_MIPS64) if (ctx->rxi) { /* Move RI/XI fields to bits 31:30 */ tcg_gen_shri_tl(arg, tmp, CP0EnLo_XI); tcg_gen_deposit_tl(tmp, tmp, arg, 30, 2); } #endif gen_move_low32(arg, tmp); tcg_temp_free_i64(tmp); } rn = "EntryLo1"; break; case 1: CP0_CHECK(ctx->vp); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_GlobalNumber)); rn = "GlobalNumber"; break; default: goto cp0_unimplemented; } break; case 4: switch (sel) { case 0: tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_Context)); tcg_gen_ext32s_tl(arg, arg); rn = "Context"; break; case 1: // gen_helper_mfc0_contextconfig(arg); /* SmartMIPS ASE */ rn = "ContextConfig"; goto cp0_unimplemented; case 2: CP0_CHECK(ctx->ulri); tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, active_tc.CP0_UserLocal)); tcg_gen_ext32s_tl(arg, arg); rn = "UserLocal"; break; default: goto cp0_unimplemented; } break; case 5: switch (sel) { case 0: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_PageMask)); rn = "PageMask"; break; case 1: check_insn(ctx, ISA_MIPS32R2); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_PageGrain)); rn = "PageGrain"; break; case 2: CP0_CHECK(ctx->sc); tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_SegCtl0)); tcg_gen_ext32s_tl(arg, arg); rn = "SegCtl0"; break; case 3: CP0_CHECK(ctx->sc); tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_SegCtl1)); tcg_gen_ext32s_tl(arg, arg); rn = "SegCtl1"; break; case 4: CP0_CHECK(ctx->sc); tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_SegCtl2)); tcg_gen_ext32s_tl(arg, arg); rn = "SegCtl2"; break; default: goto cp0_unimplemented; } break; case 6: switch (sel) { case 0: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Wired)); rn = "Wired"; break; case 1: check_insn(ctx, ISA_MIPS32R2); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSConf0)); rn = "SRSConf0"; break; case 2: check_insn(ctx, ISA_MIPS32R2); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSConf1)); rn = "SRSConf1"; break; case 3: check_insn(ctx, ISA_MIPS32R2); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSConf2)); rn = "SRSConf2"; break; case 4: check_insn(ctx, ISA_MIPS32R2); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSConf3)); rn = "SRSConf3"; break; case 5: check_insn(ctx, ISA_MIPS32R2); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSConf4)); rn = "SRSConf4"; break; default: goto cp0_unimplemented; } break; case 7: switch (sel) { case 0: check_insn(ctx, ISA_MIPS32R2); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_HWREna)); rn = "HWREna"; break; default: goto cp0_unimplemented; } break; case 8: switch (sel) { case 0: tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_BadVAddr)); tcg_gen_ext32s_tl(arg, arg); rn = "BadVAddr"; break; case 1: CP0_CHECK(ctx->bi); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstr)); rn = "BadInstr"; break; case 2: CP0_CHECK(ctx->bp); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrP)); rn = "BadInstrP"; break; default: goto cp0_unimplemented; } break; case 9: switch (sel) { case 0: /* Mark as an IO operation because we read the time. */ if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); } gen_helper_mfc0_count(arg, cpu_env); if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); } /* Break the TB to be able to take timer interrupts immediately after reading count. BS_STOP isn't sufficient, we need to ensure we break completely out of translated code. */ gen_save_pc(ctx->pc + 4); ctx->bstate = BS_EXCP; rn = "Count"; break; /* 6,7 are implementation dependent */ default: goto cp0_unimplemented; } break; case 10: switch (sel) { case 0: tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EntryHi)); tcg_gen_ext32s_tl(arg, arg); rn = "EntryHi"; break; default: goto cp0_unimplemented; } break; case 11: switch (sel) { case 0: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Compare)); rn = "Compare"; break; /* 6,7 are implementation dependent */ default: goto cp0_unimplemented; } break; case 12: switch (sel) { case 0: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Status)); rn = "Status"; break; case 1: check_insn(ctx, ISA_MIPS32R2); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_IntCtl)); rn = "IntCtl"; break; case 2: check_insn(ctx, ISA_MIPS32R2); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSCtl)); rn = "SRSCtl"; break; case 3: check_insn(ctx, ISA_MIPS32R2); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSMap)); rn = "SRSMap"; break; default: goto cp0_unimplemented; } break; case 13: switch (sel) { case 0: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Cause)); rn = "Cause"; break; default: goto cp0_unimplemented; } break; case 14: switch (sel) { case 0: tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EPC)); tcg_gen_ext32s_tl(arg, arg); rn = "EPC"; break; default: goto cp0_unimplemented; } break; case 15: switch (sel) { case 0: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_PRid)); rn = "PRid"; break; case 1: check_insn(ctx, ISA_MIPS32R2); tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EBase)); tcg_gen_ext32s_tl(arg, arg); rn = "EBase"; break; case 3: check_insn(ctx, ISA_MIPS32R2); CP0_CHECK(ctx->cmgcr); tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_CMGCRBase)); tcg_gen_ext32s_tl(arg, arg); rn = "CMGCRBase"; break; default: goto cp0_unimplemented; } break; case 16: switch (sel) { case 0: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config0)); rn = "Config"; break; case 1: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config1)); rn = "Config1"; break; case 2: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config2)); rn = "Config2"; break; case 3: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config3)); rn = "Config3"; break; case 4: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config4)); rn = "Config4"; break; case 5: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config5)); rn = "Config5"; break; /* 6,7 are implementation dependent */ case 6: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config6)); rn = "Config6"; break; case 7: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config7)); rn = "Config7"; break; default: goto cp0_unimplemented; } break; case 17: switch (sel) { case 0: gen_helper_mfc0_lladdr(arg, cpu_env); rn = "LLAddr"; break; case 1: CP0_CHECK(ctx->mrp); gen_helper_mfc0_maar(arg, cpu_env); rn = "MAAR"; break; case 2: CP0_CHECK(ctx->mrp); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_MAARI)); rn = "MAARI"; break; default: goto cp0_unimplemented; } break; case 18: switch (sel) { case 0 ... 7: gen_helper_1e0i(mfc0_watchlo, arg, sel); rn = "WatchLo"; break; default: goto cp0_unimplemented; } break; case 19: switch (sel) { case 0 ...7: gen_helper_1e0i(mfc0_watchhi, arg, sel); rn = "WatchHi"; break; default: goto cp0_unimplemented; } break; case 20: switch (sel) { case 0: #if defined(TARGET_MIPS64) check_insn(ctx, ISA_MIPS3); tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_XContext)); tcg_gen_ext32s_tl(arg, arg); rn = "XContext"; break; #endif default: goto cp0_unimplemented; } break; case 21: /* Officially reserved, but sel 0 is used for R1x000 framemask */ CP0_CHECK(!(ctx->insn_flags & ISA_MIPS32R6)); switch (sel) { case 0: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Framemask)); rn = "Framemask"; break; default: goto cp0_unimplemented; } break; case 22: tcg_gen_movi_tl(arg, 0); /* unimplemented */ rn = "'Diagnostic"; /* implementation dependent */ break; case 23: switch (sel) { case 0: gen_helper_mfc0_debug(arg, cpu_env); /* EJTAG support */ rn = "Debug"; break; case 1: // gen_helper_mfc0_tracecontrol(arg); /* PDtrace support */ rn = "TraceControl"; goto cp0_unimplemented; case 2: // gen_helper_mfc0_tracecontrol2(arg); /* PDtrace support */ rn = "TraceControl2"; goto cp0_unimplemented; case 3: // gen_helper_mfc0_usertracedata(arg); /* PDtrace support */ rn = "UserTraceData"; goto cp0_unimplemented; case 4: // gen_helper_mfc0_tracebpc(arg); /* PDtrace support */ rn = "TraceBPC"; goto cp0_unimplemented; default: goto cp0_unimplemented; } break; case 24: switch (sel) { case 0: /* EJTAG support */ tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_DEPC)); tcg_gen_ext32s_tl(arg, arg); rn = "DEPC"; break; default: goto cp0_unimplemented; } break; case 25: switch (sel) { case 0: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Performance0)); rn = "Performance0"; break; case 1: // gen_helper_mfc0_performance1(arg); rn = "Performance1"; goto cp0_unimplemented; case 2: // gen_helper_mfc0_performance2(arg); rn = "Performance2"; goto cp0_unimplemented; case 3: // gen_helper_mfc0_performance3(arg); rn = "Performance3"; goto cp0_unimplemented; case 4: // gen_helper_mfc0_performance4(arg); rn = "Performance4"; goto cp0_unimplemented; case 5: // gen_helper_mfc0_performance5(arg); rn = "Performance5"; goto cp0_unimplemented; case 6: // gen_helper_mfc0_performance6(arg); rn = "Performance6"; goto cp0_unimplemented; case 7: // gen_helper_mfc0_performance7(arg); rn = "Performance7"; goto cp0_unimplemented; default: goto cp0_unimplemented; } break; case 26: switch (sel) { case 0: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_ErrCtl)); rn = "ErrCtl"; break; default: goto cp0_unimplemented; } break; case 27: switch (sel) { case 0 ... 3: tcg_gen_movi_tl(arg, 0); /* unimplemented */ rn = "CacheErr"; break; default: goto cp0_unimplemented; } break; case 28: switch (sel) { case 0: case 2: case 4: case 6: { TCGv_i64 tmp = tcg_temp_new_i64(); tcg_gen_ld_i64(tmp, cpu_env, offsetof(CPUMIPSState, CP0_TagLo)); gen_move_low32(arg, tmp); tcg_temp_free_i64(tmp); } rn = "TagLo"; break; case 1: case 3: case 5: case 7: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_DataLo)); rn = "DataLo"; break; default: goto cp0_unimplemented; } break; case 29: switch (sel) { case 0: case 2: case 4: case 6: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_TagHi)); rn = "TagHi"; break; case 1: case 3: case 5: case 7: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_DataHi)); rn = "DataHi"; break; default: goto cp0_unimplemented; } break; case 30: switch (sel) { case 0: tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_ErrorEPC)); tcg_gen_ext32s_tl(arg, arg); rn = "ErrorEPC"; break; default: goto cp0_unimplemented; } break; case 31: switch (sel) { case 0: /* EJTAG support */ gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_DESAVE)); rn = "DESAVE"; break; case 2 ... 7: CP0_CHECK(ctx->kscrexist & (1 << sel)); tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_KScratch[sel-2])); tcg_gen_ext32s_tl(arg, arg); rn = "KScratch"; break; default: goto cp0_unimplemented; } break; default: goto cp0_unimplemented; } trace_mips_translate_c0("mfc0", rn, reg, sel); return; cp0_unimplemented: qemu_log_mask(LOG_UNIMP, "mfc0 %s (reg %d sel %d)\n", rn, reg, sel); gen_mfc0_unimplemented(ctx, arg); }

qemu

c5a49c63fa26e8825ad101dfe86339ae4c216539

static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel) { const char *rn = "invalid"; if (sel != 0) check_insn(ctx, ISA_MIPS32); switch (reg) { case 0: switch (sel) { case 0: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Index)); rn = "Index"; break; case 1: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_helper_mfc0_mvpcontrol(arg, cpu_env); rn = "MVPControl"; break; case 2: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_helper_mfc0_mvpconf0(arg, cpu_env); rn = "MVPConf0"; break; case 3: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_helper_mfc0_mvpconf1(arg, cpu_env); rn = "MVPConf1"; break; case 4: CP0_CHECK(ctx->vp); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_VPControl)); rn = "VPControl"; break; default: goto cp0_unimplemented; } break; case 1: switch (sel) { case 0: CP0_CHECK(!(ctx->insn_flags & ISA_MIPS32R6)); gen_helper_mfc0_random(arg, cpu_env); rn = "Random"; break; case 1: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_VPEControl)); rn = "VPEControl"; break; case 2: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_VPEConf0)); rn = "VPEConf0"; break; case 3: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_VPEConf1)); rn = "VPEConf1"; break; case 4: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_mfc0_load64(arg, offsetof(CPUMIPSState, CP0_YQMask)); rn = "YQMask"; break; case 5: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_mfc0_load64(arg, offsetof(CPUMIPSState, CP0_VPESchedule)); rn = "VPESchedule"; break; case 6: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_mfc0_load64(arg, offsetof(CPUMIPSState, CP0_VPEScheFBack)); rn = "VPEScheFBack"; break; case 7: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_VPEOpt)); rn = "VPEOpt"; break; default: goto cp0_unimplemented; } break; case 2: switch (sel) { case 0: { TCGv_i64 tmp = tcg_temp_new_i64(); tcg_gen_ld_i64(tmp, cpu_env, offsetof(CPUMIPSState, CP0_EntryLo0)); #if defined(TARGET_MIPS64) if (ctx->rxi) { tcg_gen_shri_tl(arg, tmp, CP0EnLo_XI); tcg_gen_deposit_tl(tmp, tmp, arg, 30, 2); } #endif gen_move_low32(arg, tmp); tcg_temp_free_i64(tmp); } rn = "EntryLo0"; break; case 1: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_helper_mfc0_tcstatus(arg, cpu_env); rn = "TCStatus"; break; case 2: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_helper_mfc0_tcbind(arg, cpu_env); rn = "TCBind"; break; case 3: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_helper_mfc0_tcrestart(arg, cpu_env); rn = "TCRestart"; break; case 4: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_helper_mfc0_tchalt(arg, cpu_env); rn = "TCHalt"; break; case 5: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_helper_mfc0_tccontext(arg, cpu_env); rn = "TCContext"; break; case 6: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_helper_mfc0_tcschedule(arg, cpu_env); rn = "TCSchedule"; break; case 7: CP0_CHECK(ctx->insn_flags & ASE_MT); gen_helper_mfc0_tcschefback(arg, cpu_env); rn = "TCScheFBack"; break; default: goto cp0_unimplemented; } break; case 3: switch (sel) { case 0: { TCGv_i64 tmp = tcg_temp_new_i64(); tcg_gen_ld_i64(tmp, cpu_env, offsetof(CPUMIPSState, CP0_EntryLo1)); #if defined(TARGET_MIPS64) if (ctx->rxi) { tcg_gen_shri_tl(arg, tmp, CP0EnLo_XI); tcg_gen_deposit_tl(tmp, tmp, arg, 30, 2); } #endif gen_move_low32(arg, tmp); tcg_temp_free_i64(tmp); } rn = "EntryLo1"; break; case 1: CP0_CHECK(ctx->vp); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_GlobalNumber)); rn = "GlobalNumber"; break; default: goto cp0_unimplemented; } break; case 4: switch (sel) { case 0: tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_Context)); tcg_gen_ext32s_tl(arg, arg); rn = "Context"; break; case 1: rn = "ContextConfig"; goto cp0_unimplemented; case 2: CP0_CHECK(ctx->ulri); tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, active_tc.CP0_UserLocal)); tcg_gen_ext32s_tl(arg, arg); rn = "UserLocal"; break; default: goto cp0_unimplemented; } break; case 5: switch (sel) { case 0: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_PageMask)); rn = "PageMask"; break; case 1: check_insn(ctx, ISA_MIPS32R2); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_PageGrain)); rn = "PageGrain"; break; case 2: CP0_CHECK(ctx->sc); tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_SegCtl0)); tcg_gen_ext32s_tl(arg, arg); rn = "SegCtl0"; break; case 3: CP0_CHECK(ctx->sc); tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_SegCtl1)); tcg_gen_ext32s_tl(arg, arg); rn = "SegCtl1"; break; case 4: CP0_CHECK(ctx->sc); tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_SegCtl2)); tcg_gen_ext32s_tl(arg, arg); rn = "SegCtl2"; break; default: goto cp0_unimplemented; } break; case 6: switch (sel) { case 0: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Wired)); rn = "Wired"; break; case 1: check_insn(ctx, ISA_MIPS32R2); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSConf0)); rn = "SRSConf0"; break; case 2: check_insn(ctx, ISA_MIPS32R2); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSConf1)); rn = "SRSConf1"; break; case 3: check_insn(ctx, ISA_MIPS32R2); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSConf2)); rn = "SRSConf2"; break; case 4: check_insn(ctx, ISA_MIPS32R2); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSConf3)); rn = "SRSConf3"; break; case 5: check_insn(ctx, ISA_MIPS32R2); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSConf4)); rn = "SRSConf4"; break; default: goto cp0_unimplemented; } break; case 7: switch (sel) { case 0: check_insn(ctx, ISA_MIPS32R2); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_HWREna)); rn = "HWREna"; break; default: goto cp0_unimplemented; } break; case 8: switch (sel) { case 0: tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_BadVAddr)); tcg_gen_ext32s_tl(arg, arg); rn = "BadVAddr"; break; case 1: CP0_CHECK(ctx->bi); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstr)); rn = "BadInstr"; break; case 2: CP0_CHECK(ctx->bp); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrP)); rn = "BadInstrP"; break; default: goto cp0_unimplemented; } break; case 9: switch (sel) { case 0: if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); } gen_helper_mfc0_count(arg, cpu_env); if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); } gen_save_pc(ctx->pc + 4); ctx->bstate = BS_EXCP; rn = "Count"; break; default: goto cp0_unimplemented; } break; case 10: switch (sel) { case 0: tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EntryHi)); tcg_gen_ext32s_tl(arg, arg); rn = "EntryHi"; break; default: goto cp0_unimplemented; } break; case 11: switch (sel) { case 0: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Compare)); rn = "Compare"; break; default: goto cp0_unimplemented; } break; case 12: switch (sel) { case 0: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Status)); rn = "Status"; break; case 1: check_insn(ctx, ISA_MIPS32R2); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_IntCtl)); rn = "IntCtl"; break; case 2: check_insn(ctx, ISA_MIPS32R2); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSCtl)); rn = "SRSCtl"; break; case 3: check_insn(ctx, ISA_MIPS32R2); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSMap)); rn = "SRSMap"; break; default: goto cp0_unimplemented; } break; case 13: switch (sel) { case 0: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Cause)); rn = "Cause"; break; default: goto cp0_unimplemented; } break; case 14: switch (sel) { case 0: tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EPC)); tcg_gen_ext32s_tl(arg, arg); rn = "EPC"; break; default: goto cp0_unimplemented; } break; case 15: switch (sel) { case 0: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_PRid)); rn = "PRid"; break; case 1: check_insn(ctx, ISA_MIPS32R2); tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EBase)); tcg_gen_ext32s_tl(arg, arg); rn = "EBase"; break; case 3: check_insn(ctx, ISA_MIPS32R2); CP0_CHECK(ctx->cmgcr); tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_CMGCRBase)); tcg_gen_ext32s_tl(arg, arg); rn = "CMGCRBase"; break; default: goto cp0_unimplemented; } break; case 16: switch (sel) { case 0: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config0)); rn = "Config"; break; case 1: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config1)); rn = "Config1"; break; case 2: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config2)); rn = "Config2"; break; case 3: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config3)); rn = "Config3"; break; case 4: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config4)); rn = "Config4"; break; case 5: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config5)); rn = "Config5"; break; case 6: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config6)); rn = "Config6"; break; case 7: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config7)); rn = "Config7"; break; default: goto cp0_unimplemented; } break; case 17: switch (sel) { case 0: gen_helper_mfc0_lladdr(arg, cpu_env); rn = "LLAddr"; break; case 1: CP0_CHECK(ctx->mrp); gen_helper_mfc0_maar(arg, cpu_env); rn = "MAAR"; break; case 2: CP0_CHECK(ctx->mrp); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_MAARI)); rn = "MAARI"; break; default: goto cp0_unimplemented; } break; case 18: switch (sel) { case 0 ... 7: gen_helper_1e0i(mfc0_watchlo, arg, sel); rn = "WatchLo"; break; default: goto cp0_unimplemented; } break; case 19: switch (sel) { case 0 ...7: gen_helper_1e0i(mfc0_watchhi, arg, sel); rn = "WatchHi"; break; default: goto cp0_unimplemented; } break; case 20: switch (sel) { case 0: #if defined(TARGET_MIPS64) check_insn(ctx, ISA_MIPS3); tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_XContext)); tcg_gen_ext32s_tl(arg, arg); rn = "XContext"; break; #endif default: goto cp0_unimplemented; } break; case 21: CP0_CHECK(!(ctx->insn_flags & ISA_MIPS32R6)); switch (sel) { case 0: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Framemask)); rn = "Framemask"; break; default: goto cp0_unimplemented; } break; case 22: tcg_gen_movi_tl(arg, 0); rn = "'Diagnostic"; break; case 23: switch (sel) { case 0: gen_helper_mfc0_debug(arg, cpu_env); rn = "Debug"; break; case 1: rn = "TraceControl"; goto cp0_unimplemented; case 2: rn = "TraceControl2"; goto cp0_unimplemented; case 3: rn = "UserTraceData"; goto cp0_unimplemented; case 4: rn = "TraceBPC"; goto cp0_unimplemented; default: goto cp0_unimplemented; } break; case 24: switch (sel) { case 0: tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_DEPC)); tcg_gen_ext32s_tl(arg, arg); rn = "DEPC"; break; default: goto cp0_unimplemented; } break; case 25: switch (sel) { case 0: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Performance0)); rn = "Performance0"; break; case 1: rn = "Performance1"; goto cp0_unimplemented; case 2: rn = "Performance2"; goto cp0_unimplemented; case 3: rn = "Performance3"; goto cp0_unimplemented; case 4: rn = "Performance4"; goto cp0_unimplemented; case 5: rn = "Performance5"; goto cp0_unimplemented; case 6: rn = "Performance6"; goto cp0_unimplemented; case 7: rn = "Performance7"; goto cp0_unimplemented; default: goto cp0_unimplemented; } break; case 26: switch (sel) { case 0: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_ErrCtl)); rn = "ErrCtl"; break; default: goto cp0_unimplemented; } break; case 27: switch (sel) { case 0 ... 3: tcg_gen_movi_tl(arg, 0); rn = "CacheErr"; break; default: goto cp0_unimplemented; } break; case 28: switch (sel) { case 0: case 2: case 4: case 6: { TCGv_i64 tmp = tcg_temp_new_i64(); tcg_gen_ld_i64(tmp, cpu_env, offsetof(CPUMIPSState, CP0_TagLo)); gen_move_low32(arg, tmp); tcg_temp_free_i64(tmp); } rn = "TagLo"; break; case 1: case 3: case 5: case 7: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_DataLo)); rn = "DataLo"; break; default: goto cp0_unimplemented; } break; case 29: switch (sel) { case 0: case 2: case 4: case 6: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_TagHi)); rn = "TagHi"; break; case 1: case 3: case 5: case 7: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_DataHi)); rn = "DataHi"; break; default: goto cp0_unimplemented; } break; case 30: switch (sel) { case 0: tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_ErrorEPC)); tcg_gen_ext32s_tl(arg, arg); rn = "ErrorEPC"; break; default: goto cp0_unimplemented; } break; case 31: switch (sel) { case 0: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_DESAVE)); rn = "DESAVE"; break; case 2 ... 7: CP0_CHECK(ctx->kscrexist & (1 << sel)); tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_KScratch[sel-2])); tcg_gen_ext32s_tl(arg, arg); rn = "KScratch"; break; default: goto cp0_unimplemented; } break; default: goto cp0_unimplemented; } trace_mips_translate_c0("mfc0", rn, reg, sel); return; cp0_unimplemented: qemu_log_mask(LOG_UNIMP, "mfc0 %s (reg %d sel %d)\n", rn, reg, sel); gen_mfc0_unimplemented(ctx, arg); }

static void FUNC_0(DisasContext *VAR_0, TCGv VAR_1, int VAR_2, int VAR_3) { const char *VAR_4 = "invalid"; if (VAR_3 != 0) check_insn(VAR_0, ISA_MIPS32); switch (VAR_2) { case 0: switch (VAR_3) { case 0: gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_Index)); VAR_4 = "Index"; break; case 1: CP0_CHECK(VAR_0->insn_flags & ASE_MT); gen_helper_mfc0_mvpcontrol(VAR_1, cpu_env); VAR_4 = "MVPControl"; break; case 2: CP0_CHECK(VAR_0->insn_flags & ASE_MT); gen_helper_mfc0_mvpconf0(VAR_1, cpu_env); VAR_4 = "MVPConf0"; break; case 3: CP0_CHECK(VAR_0->insn_flags & ASE_MT); gen_helper_mfc0_mvpconf1(VAR_1, cpu_env); VAR_4 = "MVPConf1"; break; case 4: CP0_CHECK(VAR_0->vp); gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_VPControl)); VAR_4 = "VPControl"; break; default: goto cp0_unimplemented; } break; case 1: switch (VAR_3) { case 0: CP0_CHECK(!(VAR_0->insn_flags & ISA_MIPS32R6)); gen_helper_mfc0_random(VAR_1, cpu_env); VAR_4 = "Random"; break; case 1: CP0_CHECK(VAR_0->insn_flags & ASE_MT); gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_VPEControl)); VAR_4 = "VPEControl"; break; case 2: CP0_CHECK(VAR_0->insn_flags & ASE_MT); gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_VPEConf0)); VAR_4 = "VPEConf0"; break; case 3: CP0_CHECK(VAR_0->insn_flags & ASE_MT); gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_VPEConf1)); VAR_4 = "VPEConf1"; break; case 4: CP0_CHECK(VAR_0->insn_flags & ASE_MT); gen_mfc0_load64(VAR_1, offsetof(CPUMIPSState, CP0_YQMask)); VAR_4 = "YQMask"; break; case 5: CP0_CHECK(VAR_0->insn_flags & ASE_MT); gen_mfc0_load64(VAR_1, offsetof(CPUMIPSState, CP0_VPESchedule)); VAR_4 = "VPESchedule"; break; case 6: CP0_CHECK(VAR_0->insn_flags & ASE_MT); gen_mfc0_load64(VAR_1, offsetof(CPUMIPSState, CP0_VPEScheFBack)); VAR_4 = "VPEScheFBack"; break; case 7: CP0_CHECK(VAR_0->insn_flags & ASE_MT); gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_VPEOpt)); VAR_4 = "VPEOpt"; break; default: goto cp0_unimplemented; } break; case 2: switch (VAR_3) { case 0: { TCGv_i64 tmp = tcg_temp_new_i64(); tcg_gen_ld_i64(tmp, cpu_env, offsetof(CPUMIPSState, CP0_EntryLo0)); #if defined(TARGET_MIPS64) if (VAR_0->rxi) { tcg_gen_shri_tl(VAR_1, tmp, CP0EnLo_XI); tcg_gen_deposit_tl(tmp, tmp, VAR_1, 30, 2); } #endif gen_move_low32(VAR_1, tmp); tcg_temp_free_i64(tmp); } VAR_4 = "EntryLo0"; break; case 1: CP0_CHECK(VAR_0->insn_flags & ASE_MT); gen_helper_mfc0_tcstatus(VAR_1, cpu_env); VAR_4 = "TCStatus"; break; case 2: CP0_CHECK(VAR_0->insn_flags & ASE_MT); gen_helper_mfc0_tcbind(VAR_1, cpu_env); VAR_4 = "TCBind"; break; case 3: CP0_CHECK(VAR_0->insn_flags & ASE_MT); gen_helper_mfc0_tcrestart(VAR_1, cpu_env); VAR_4 = "TCRestart"; break; case 4: CP0_CHECK(VAR_0->insn_flags & ASE_MT); gen_helper_mfc0_tchalt(VAR_1, cpu_env); VAR_4 = "TCHalt"; break; case 5: CP0_CHECK(VAR_0->insn_flags & ASE_MT); gen_helper_mfc0_tccontext(VAR_1, cpu_env); VAR_4 = "TCContext"; break; case 6: CP0_CHECK(VAR_0->insn_flags & ASE_MT); gen_helper_mfc0_tcschedule(VAR_1, cpu_env); VAR_4 = "TCSchedule"; break; case 7: CP0_CHECK(VAR_0->insn_flags & ASE_MT); gen_helper_mfc0_tcschefback(VAR_1, cpu_env); VAR_4 = "TCScheFBack"; break; default: goto cp0_unimplemented; } break; case 3: switch (VAR_3) { case 0: { TCGv_i64 tmp = tcg_temp_new_i64(); tcg_gen_ld_i64(tmp, cpu_env, offsetof(CPUMIPSState, CP0_EntryLo1)); #if defined(TARGET_MIPS64) if (VAR_0->rxi) { tcg_gen_shri_tl(VAR_1, tmp, CP0EnLo_XI); tcg_gen_deposit_tl(tmp, tmp, VAR_1, 30, 2); } #endif gen_move_low32(VAR_1, tmp); tcg_temp_free_i64(tmp); } VAR_4 = "EntryLo1"; break; case 1: CP0_CHECK(VAR_0->vp); gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_GlobalNumber)); VAR_4 = "GlobalNumber"; break; default: goto cp0_unimplemented; } break; case 4: switch (VAR_3) { case 0: tcg_gen_ld_tl(VAR_1, cpu_env, offsetof(CPUMIPSState, CP0_Context)); tcg_gen_ext32s_tl(VAR_1, VAR_1); VAR_4 = "Context"; break; case 1: VAR_4 = "ContextConfig"; goto cp0_unimplemented; case 2: CP0_CHECK(VAR_0->ulri); tcg_gen_ld_tl(VAR_1, cpu_env, offsetof(CPUMIPSState, active_tc.CP0_UserLocal)); tcg_gen_ext32s_tl(VAR_1, VAR_1); VAR_4 = "UserLocal"; break; default: goto cp0_unimplemented; } break; case 5: switch (VAR_3) { case 0: gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_PageMask)); VAR_4 = "PageMask"; break; case 1: check_insn(VAR_0, ISA_MIPS32R2); gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_PageGrain)); VAR_4 = "PageGrain"; break; case 2: CP0_CHECK(VAR_0->sc); tcg_gen_ld_tl(VAR_1, cpu_env, offsetof(CPUMIPSState, CP0_SegCtl0)); tcg_gen_ext32s_tl(VAR_1, VAR_1); VAR_4 = "SegCtl0"; break; case 3: CP0_CHECK(VAR_0->sc); tcg_gen_ld_tl(VAR_1, cpu_env, offsetof(CPUMIPSState, CP0_SegCtl1)); tcg_gen_ext32s_tl(VAR_1, VAR_1); VAR_4 = "SegCtl1"; break; case 4: CP0_CHECK(VAR_0->sc); tcg_gen_ld_tl(VAR_1, cpu_env, offsetof(CPUMIPSState, CP0_SegCtl2)); tcg_gen_ext32s_tl(VAR_1, VAR_1); VAR_4 = "SegCtl2"; break; default: goto cp0_unimplemented; } break; case 6: switch (VAR_3) { case 0: gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_Wired)); VAR_4 = "Wired"; break; case 1: check_insn(VAR_0, ISA_MIPS32R2); gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_SRSConf0)); VAR_4 = "SRSConf0"; break; case 2: check_insn(VAR_0, ISA_MIPS32R2); gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_SRSConf1)); VAR_4 = "SRSConf1"; break; case 3: check_insn(VAR_0, ISA_MIPS32R2); gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_SRSConf2)); VAR_4 = "SRSConf2"; break; case 4: check_insn(VAR_0, ISA_MIPS32R2); gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_SRSConf3)); VAR_4 = "SRSConf3"; break; case 5: check_insn(VAR_0, ISA_MIPS32R2); gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_SRSConf4)); VAR_4 = "SRSConf4"; break; default: goto cp0_unimplemented; } break; case 7: switch (VAR_3) { case 0: check_insn(VAR_0, ISA_MIPS32R2); gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_HWREna)); VAR_4 = "HWREna"; break; default: goto cp0_unimplemented; } break; case 8: switch (VAR_3) { case 0: tcg_gen_ld_tl(VAR_1, cpu_env, offsetof(CPUMIPSState, CP0_BadVAddr)); tcg_gen_ext32s_tl(VAR_1, VAR_1); VAR_4 = "BadVAddr"; break; case 1: CP0_CHECK(VAR_0->bi); gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_BadInstr)); VAR_4 = "BadInstr"; break; case 2: CP0_CHECK(VAR_0->bp); gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_BadInstrP)); VAR_4 = "BadInstrP"; break; default: goto cp0_unimplemented; } break; case 9: switch (VAR_3) { case 0: if (VAR_0->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); } gen_helper_mfc0_count(VAR_1, cpu_env); if (VAR_0->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); } gen_save_pc(VAR_0->pc + 4); VAR_0->bstate = BS_EXCP; VAR_4 = "Count"; break; default: goto cp0_unimplemented; } break; case 10: switch (VAR_3) { case 0: tcg_gen_ld_tl(VAR_1, cpu_env, offsetof(CPUMIPSState, CP0_EntryHi)); tcg_gen_ext32s_tl(VAR_1, VAR_1); VAR_4 = "EntryHi"; break; default: goto cp0_unimplemented; } break; case 11: switch (VAR_3) { case 0: gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_Compare)); VAR_4 = "Compare"; break; default: goto cp0_unimplemented; } break; case 12: switch (VAR_3) { case 0: gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_Status)); VAR_4 = "Status"; break; case 1: check_insn(VAR_0, ISA_MIPS32R2); gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_IntCtl)); VAR_4 = "IntCtl"; break; case 2: check_insn(VAR_0, ISA_MIPS32R2); gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_SRSCtl)); VAR_4 = "SRSCtl"; break; case 3: check_insn(VAR_0, ISA_MIPS32R2); gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_SRSMap)); VAR_4 = "SRSMap"; break; default: goto cp0_unimplemented; } break; case 13: switch (VAR_3) { case 0: gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_Cause)); VAR_4 = "Cause"; break; default: goto cp0_unimplemented; } break; case 14: switch (VAR_3) { case 0: tcg_gen_ld_tl(VAR_1, cpu_env, offsetof(CPUMIPSState, CP0_EPC)); tcg_gen_ext32s_tl(VAR_1, VAR_1); VAR_4 = "EPC"; break; default: goto cp0_unimplemented; } break; case 15: switch (VAR_3) { case 0: gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_PRid)); VAR_4 = "PRid"; break; case 1: check_insn(VAR_0, ISA_MIPS32R2); tcg_gen_ld_tl(VAR_1, cpu_env, offsetof(CPUMIPSState, CP0_EBase)); tcg_gen_ext32s_tl(VAR_1, VAR_1); VAR_4 = "EBase"; break; case 3: check_insn(VAR_0, ISA_MIPS32R2); CP0_CHECK(VAR_0->cmgcr); tcg_gen_ld_tl(VAR_1, cpu_env, offsetof(CPUMIPSState, CP0_CMGCRBase)); tcg_gen_ext32s_tl(VAR_1, VAR_1); VAR_4 = "CMGCRBase"; break; default: goto cp0_unimplemented; } break; case 16: switch (VAR_3) { case 0: gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_Config0)); VAR_4 = "Config"; break; case 1: gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_Config1)); VAR_4 = "Config1"; break; case 2: gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_Config2)); VAR_4 = "Config2"; break; case 3: gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_Config3)); VAR_4 = "Config3"; break; case 4: gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_Config4)); VAR_4 = "Config4"; break; case 5: gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_Config5)); VAR_4 = "Config5"; break; case 6: gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_Config6)); VAR_4 = "Config6"; break; case 7: gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_Config7)); VAR_4 = "Config7"; break; default: goto cp0_unimplemented; } break; case 17: switch (VAR_3) { case 0: gen_helper_mfc0_lladdr(VAR_1, cpu_env); VAR_4 = "LLAddr"; break; case 1: CP0_CHECK(VAR_0->mrp); gen_helper_mfc0_maar(VAR_1, cpu_env); VAR_4 = "MAAR"; break; case 2: CP0_CHECK(VAR_0->mrp); gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_MAARI)); VAR_4 = "MAARI"; break; default: goto cp0_unimplemented; } break; case 18: switch (VAR_3) { case 0 ... 7: gen_helper_1e0i(mfc0_watchlo, VAR_1, VAR_3); VAR_4 = "WatchLo"; break; default: goto cp0_unimplemented; } break; case 19: switch (VAR_3) { case 0 ...7: gen_helper_1e0i(mfc0_watchhi, VAR_1, VAR_3); VAR_4 = "WatchHi"; break; default: goto cp0_unimplemented; } break; case 20: switch (VAR_3) { case 0: #if defined(TARGET_MIPS64) check_insn(VAR_0, ISA_MIPS3); tcg_gen_ld_tl(VAR_1, cpu_env, offsetof(CPUMIPSState, CP0_XContext)); tcg_gen_ext32s_tl(VAR_1, VAR_1); VAR_4 = "XContext"; break; #endif default: goto cp0_unimplemented; } break; case 21: CP0_CHECK(!(VAR_0->insn_flags & ISA_MIPS32R6)); switch (VAR_3) { case 0: gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_Framemask)); VAR_4 = "Framemask"; break; default: goto cp0_unimplemented; } break; case 22: tcg_gen_movi_tl(VAR_1, 0); VAR_4 = "'Diagnostic"; break; case 23: switch (VAR_3) { case 0: gen_helper_mfc0_debug(VAR_1, cpu_env); VAR_4 = "Debug"; break; case 1: VAR_4 = "TraceControl"; goto cp0_unimplemented; case 2: VAR_4 = "TraceControl2"; goto cp0_unimplemented; case 3: VAR_4 = "UserTraceData"; goto cp0_unimplemented; case 4: VAR_4 = "TraceBPC"; goto cp0_unimplemented; default: goto cp0_unimplemented; } break; case 24: switch (VAR_3) { case 0: tcg_gen_ld_tl(VAR_1, cpu_env, offsetof(CPUMIPSState, CP0_DEPC)); tcg_gen_ext32s_tl(VAR_1, VAR_1); VAR_4 = "DEPC"; break; default: goto cp0_unimplemented; } break; case 25: switch (VAR_3) { case 0: gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_Performance0)); VAR_4 = "Performance0"; break; case 1: VAR_4 = "Performance1"; goto cp0_unimplemented; case 2: VAR_4 = "Performance2"; goto cp0_unimplemented; case 3: VAR_4 = "Performance3"; goto cp0_unimplemented; case 4: VAR_4 = "Performance4"; goto cp0_unimplemented; case 5: VAR_4 = "Performance5"; goto cp0_unimplemented; case 6: VAR_4 = "Performance6"; goto cp0_unimplemented; case 7: VAR_4 = "Performance7"; goto cp0_unimplemented; default: goto cp0_unimplemented; } break; case 26: switch (VAR_3) { case 0: gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_ErrCtl)); VAR_4 = "ErrCtl"; break; default: goto cp0_unimplemented; } break; case 27: switch (VAR_3) { case 0 ... 3: tcg_gen_movi_tl(VAR_1, 0); VAR_4 = "CacheErr"; break; default: goto cp0_unimplemented; } break; case 28: switch (VAR_3) { case 0: case 2: case 4: case 6: { TCGv_i64 tmp = tcg_temp_new_i64(); tcg_gen_ld_i64(tmp, cpu_env, offsetof(CPUMIPSState, CP0_TagLo)); gen_move_low32(VAR_1, tmp); tcg_temp_free_i64(tmp); } VAR_4 = "TagLo"; break; case 1: case 3: case 5: case 7: gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_DataLo)); VAR_4 = "DataLo"; break; default: goto cp0_unimplemented; } break; case 29: switch (VAR_3) { case 0: case 2: case 4: case 6: gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_TagHi)); VAR_4 = "TagHi"; break; case 1: case 3: case 5: case 7: gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_DataHi)); VAR_4 = "DataHi"; break; default: goto cp0_unimplemented; } break; case 30: switch (VAR_3) { case 0: tcg_gen_ld_tl(VAR_1, cpu_env, offsetof(CPUMIPSState, CP0_ErrorEPC)); tcg_gen_ext32s_tl(VAR_1, VAR_1); VAR_4 = "ErrorEPC"; break; default: goto cp0_unimplemented; } break; case 31: switch (VAR_3) { case 0: gen_mfc0_load32(VAR_1, offsetof(CPUMIPSState, CP0_DESAVE)); VAR_4 = "DESAVE"; break; case 2 ... 7: CP0_CHECK(VAR_0->kscrexist & (1 << VAR_3)); tcg_gen_ld_tl(VAR_1, cpu_env, offsetof(CPUMIPSState, CP0_KScratch[VAR_3-2])); tcg_gen_ext32s_tl(VAR_1, VAR_1); VAR_4 = "KScratch"; break; default: goto cp0_unimplemented; } break; default: goto cp0_unimplemented; } trace_mips_translate_c0("mfc0", VAR_4, VAR_2, VAR_3); return; cp0_unimplemented: qemu_log_mask(LOG_UNIMP, "mfc0 %s (VAR_2 %d VAR_3 %d)\n", VAR_4, VAR_2, VAR_3); gen_mfc0_unimplemented(VAR_0, VAR_1); }

static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf) { const char *p; int ch, reg_size, type; char buf[4096]; uint8_t mem_buf[4096]; uint32_t *registers; target_ulong addr, len; #ifdef DEBUG_GDB printf("command='%s'\n", line_buf); #endif p = line_buf; ch = *p++; switch(ch) { case '?': /* TODO: Make this return the correct value for user-mode. */ snprintf(buf, sizeof(buf), "S%02x", SIGTRAP); put_packet(s, buf); /* Remove all the breakpoints when this query is issued, * because gdb is doing and initial connect and the state * should be cleaned up. */ case 'c': if (*p != '\0') { addr = strtoull(p, (char **)&p, 16); #if defined(TARGET_I386) env->eip = addr; #elif defined (TARGET_PPC) env->nip = addr; #elif defined (TARGET_SPARC) env->pc = addr; env->npc = addr + 4; #elif defined (TARGET_ARM) env->regs[15] = addr; #elif defined (TARGET_SH4) env->pc = addr; #elif defined (TARGET_MIPS) env->PC[env->current_tc] = addr; #elif defined (TARGET_CRIS) env->pc = addr; #endif } return RS_IDLE; case 's': if (*p != '\0') { addr = strtoull(p, (char **)&p, 16); #if defined(TARGET_I386) env->eip = addr; #elif defined (TARGET_PPC) env->nip = addr; #elif defined (TARGET_SPARC) env->pc = addr; env->npc = addr + 4; #elif defined (TARGET_ARM) env->regs[15] = addr; #elif defined (TARGET_SH4) env->pc = addr; #elif defined (TARGET_MIPS) env->PC[env->current_tc] = addr; #elif defined (TARGET_CRIS) env->pc = addr; #endif } cpu_single_step(env, sstep_flags); return RS_IDLE; case 'F': { target_ulong ret; target_ulong err; ret = strtoull(p, (char **)&p, 16); if (*p == ',') { p++; err = strtoull(p, (char **)&p, 16); } else { err = 0; } if (*p == ',') p++; type = *p; if (gdb_current_syscall_cb) gdb_current_syscall_cb(s->env, ret, err); if (type == 'C') { put_packet(s, "T02"); } else { } } case 'g': reg_size = cpu_gdb_read_registers(env, mem_buf); memtohex(buf, mem_buf, reg_size); put_packet(s, buf); case 'G': registers = (void *)mem_buf; len = strlen(p) / 2; hextomem((uint8_t *)registers, p, len); cpu_gdb_write_registers(env, mem_buf, len); case 'm': addr = strtoull(p, (char **)&p, 16); if (*p == ',') p++; len = strtoull(p, NULL, 16); if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) { put_packet (s, "E14"); } else { memtohex(buf, mem_buf, len); put_packet(s, buf); } case 'M': addr = strtoull(p, (char **)&p, 16); if (*p == ',') p++; len = strtoull(p, (char **)&p, 16); if (*p == ':') p++; hextomem(mem_buf, p, len); if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0) put_packet(s, "E14"); else case 'Z': type = strtoul(p, (char **)&p, 16); if (*p == ',') p++; addr = strtoull(p, (char **)&p, 16); if (*p == ',') p++; len = strtoull(p, (char **)&p, 16); if (type == 0 || type == 1) { if (cpu_breakpoint_insert(env, addr) < 0) goto breakpoint_error; #ifndef CONFIG_USER_ONLY } else if (type == 2) { if (cpu_watchpoint_insert(env, addr) < 0) goto breakpoint_error; #endif } else { breakpoint_error: put_packet(s, "E22"); } case 'z': type = strtoul(p, (char **)&p, 16); if (*p == ',') p++; addr = strtoull(p, (char **)&p, 16); if (*p == ',') p++; len = strtoull(p, (char **)&p, 16); if (type == 0 || type == 1) { cpu_breakpoint_remove(env, addr); #ifndef CONFIG_USER_ONLY } else if (type == 2) { cpu_watchpoint_remove(env, addr); #endif } else { goto breakpoint_error; } case 'q': case 'Q': /* parse any 'q' packets here */ if (!strcmp(p,"qemu.sstepbits")) { /* Query Breakpoint bit definitions */ sprintf(buf,"ENABLE=%x,NOIRQ=%x,NOTIMER=%x", SSTEP_ENABLE, SSTEP_NOIRQ, SSTEP_NOTIMER); put_packet(s, buf); } else if (strncmp(p,"qemu.sstep",10) == 0) { /* Display or change the sstep_flags */ p += 10; if (*p != '=') { /* Display current setting */ sprintf(buf,"0x%x", sstep_flags); put_packet(s, buf); } p++; type = strtoul(p, (char **)&p, 16); sstep_flags = type; } #ifdef CONFIG_LINUX_USER else if (strncmp(p, "Offsets", 7) == 0) { TaskState *ts = env->opaque; sprintf(buf, "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx ";Bss=" TARGET_ABI_FMT_lx, ts->info->code_offset, ts->info->data_offset, ts->info->data_offset); put_packet(s, buf); } #endif /* Fall through. */ default: /* put empty packet */ buf[0] = '\0'; put_packet(s, buf); } return RS_IDLE; }

qemu

7d03f82f81e0e6c106ca0d2445a0fc49dc9ddc7b

static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf) { const char *p; int ch, reg_size, type; char buf[4096]; uint8_t mem_buf[4096]; uint32_t *registers; target_ulong addr, len; #ifdef DEBUG_GDB printf("command='%s'\n", line_buf); #endif p = line_buf; ch = *p++; switch(ch) { case '?': snprintf(buf, sizeof(buf), "S%02x", SIGTRAP); put_packet(s, buf); case 'c': if (*p != '\0') { addr = strtoull(p, (char **)&p, 16); #if defined(TARGET_I386) env->eip = addr; #elif defined (TARGET_PPC) env->nip = addr; #elif defined (TARGET_SPARC) env->pc = addr; env->npc = addr + 4; #elif defined (TARGET_ARM) env->regs[15] = addr; #elif defined (TARGET_SH4) env->pc = addr; #elif defined (TARGET_MIPS) env->PC[env->current_tc] = addr; #elif defined (TARGET_CRIS) env->pc = addr; #endif } return RS_IDLE; case 's': if (*p != '\0') { addr = strtoull(p, (char **)&p, 16); #if defined(TARGET_I386) env->eip = addr; #elif defined (TARGET_PPC) env->nip = addr; #elif defined (TARGET_SPARC) env->pc = addr; env->npc = addr + 4; #elif defined (TARGET_ARM) env->regs[15] = addr; #elif defined (TARGET_SH4) env->pc = addr; #elif defined (TARGET_MIPS) env->PC[env->current_tc] = addr; #elif defined (TARGET_CRIS) env->pc = addr; #endif } cpu_single_step(env, sstep_flags); return RS_IDLE; case 'F': { target_ulong ret; target_ulong err; ret = strtoull(p, (char **)&p, 16); if (*p == ',') { p++; err = strtoull(p, (char **)&p, 16); } else { err = 0; } if (*p == ',') p++; type = *p; if (gdb_current_syscall_cb) gdb_current_syscall_cb(s->env, ret, err); if (type == 'C') { put_packet(s, "T02"); } else { } } case 'g': reg_size = cpu_gdb_read_registers(env, mem_buf); memtohex(buf, mem_buf, reg_size); put_packet(s, buf); case 'G': registers = (void *)mem_buf; len = strlen(p) / 2; hextomem((uint8_t *)registers, p, len); cpu_gdb_write_registers(env, mem_buf, len); case 'm': addr = strtoull(p, (char **)&p, 16); if (*p == ',') p++; len = strtoull(p, NULL, 16); if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) { put_packet (s, "E14"); } else { memtohex(buf, mem_buf, len); put_packet(s, buf); } case 'M': addr = strtoull(p, (char **)&p, 16); if (*p == ',') p++; len = strtoull(p, (char **)&p, 16); if (*p == ':') p++; hextomem(mem_buf, p, len); if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0) put_packet(s, "E14"); else case 'Z': type = strtoul(p, (char **)&p, 16); if (*p == ',') p++; addr = strtoull(p, (char **)&p, 16); if (*p == ',') p++; len = strtoull(p, (char **)&p, 16); if (type == 0 || type == 1) { if (cpu_breakpoint_insert(env, addr) < 0) goto breakpoint_error; #ifndef CONFIG_USER_ONLY } else if (type == 2) { if (cpu_watchpoint_insert(env, addr) < 0) goto breakpoint_error; #endif } else { breakpoint_error: put_packet(s, "E22"); } case 'z': type = strtoul(p, (char **)&p, 16); if (*p == ',') p++; addr = strtoull(p, (char **)&p, 16); if (*p == ',') p++; len = strtoull(p, (char **)&p, 16); if (type == 0 || type == 1) { cpu_breakpoint_remove(env, addr); #ifndef CONFIG_USER_ONLY } else if (type == 2) { cpu_watchpoint_remove(env, addr); #endif } else { goto breakpoint_error; } case 'q': case 'Q': if (!strcmp(p,"qemu.sstepbits")) { sprintf(buf,"ENABLE=%x,NOIRQ=%x,NOTIMER=%x", SSTEP_ENABLE, SSTEP_NOIRQ, SSTEP_NOTIMER); put_packet(s, buf); } else if (strncmp(p,"qemu.sstep",10) == 0) { p += 10; if (*p != '=') { sprintf(buf,"0x%x", sstep_flags); put_packet(s, buf); } p++; type = strtoul(p, (char **)&p, 16); sstep_flags = type; } #ifdef CONFIG_LINUX_USER else if (strncmp(p, "Offsets", 7) == 0) { TaskState *ts = env->opaque; sprintf(buf, "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx ";Bss=" TARGET_ABI_FMT_lx, ts->info->code_offset, ts->info->data_offset, ts->info->data_offset); put_packet(s, buf); } #endif default: buf[0] = '\0'; put_packet(s, buf); } return RS_IDLE; }

static int FUNC_0(GDBState *VAR_0, CPUState *VAR_1, const char *VAR_2) { const char *VAR_3; int VAR_4, VAR_5, VAR_6; char VAR_7[4096]; uint8_t mem_buf[4096]; uint32_t *registers; target_ulong addr, len; #ifdef DEBUG_GDB printf("command='%VAR_0'\n", VAR_2); #endif VAR_3 = VAR_2; VAR_4 = *VAR_3++; switch(VAR_4) { case '?': snprintf(VAR_7, sizeof(VAR_7), "S%02x", SIGTRAP); put_packet(VAR_0, VAR_7); case 'c': if (*VAR_3 != '\0') { addr = strtoull(VAR_3, (char **)&VAR_3, 16); #if defined(TARGET_I386) VAR_1->eip = addr; #elif defined (TARGET_PPC) VAR_1->nip = addr; #elif defined (TARGET_SPARC) VAR_1->pc = addr; VAR_1->npc = addr + 4; #elif defined (TARGET_ARM) VAR_1->regs[15] = addr; #elif defined (TARGET_SH4) VAR_1->pc = addr; #elif defined (TARGET_MIPS) VAR_1->PC[VAR_1->current_tc] = addr; #elif defined (TARGET_CRIS) VAR_1->pc = addr; #endif } return RS_IDLE; case 'VAR_0': if (*VAR_3 != '\0') { addr = strtoull(VAR_3, (char **)&VAR_3, 16); #if defined(TARGET_I386) VAR_1->eip = addr; #elif defined (TARGET_PPC) VAR_1->nip = addr; #elif defined (TARGET_SPARC) VAR_1->pc = addr; VAR_1->npc = addr + 4; #elif defined (TARGET_ARM) VAR_1->regs[15] = addr; #elif defined (TARGET_SH4) VAR_1->pc = addr; #elif defined (TARGET_MIPS) VAR_1->PC[VAR_1->current_tc] = addr; #elif defined (TARGET_CRIS) VAR_1->pc = addr; #endif } cpu_single_step(VAR_1, sstep_flags); return RS_IDLE; case 'F': { target_ulong ret; target_ulong err; ret = strtoull(VAR_3, (char **)&VAR_3, 16); if (*VAR_3 == ',') { VAR_3++; err = strtoull(VAR_3, (char **)&VAR_3, 16); } else { err = 0; } if (*VAR_3 == ',') VAR_3++; VAR_6 = *VAR_3; if (gdb_current_syscall_cb) gdb_current_syscall_cb(VAR_0->VAR_1, ret, err); if (VAR_6 == 'C') { put_packet(VAR_0, "T02"); } else { } } case 'g': VAR_5 = cpu_gdb_read_registers(VAR_1, mem_buf); memtohex(VAR_7, mem_buf, VAR_5); put_packet(VAR_0, VAR_7); case 'G': registers = (void *)mem_buf; len = strlen(VAR_3) / 2; hextomem((uint8_t *)registers, VAR_3, len); cpu_gdb_write_registers(VAR_1, mem_buf, len); case 'm': addr = strtoull(VAR_3, (char **)&VAR_3, 16); if (*VAR_3 == ',') VAR_3++; len = strtoull(VAR_3, NULL, 16); if (cpu_memory_rw_debug(VAR_1, addr, mem_buf, len, 0) != 0) { put_packet (VAR_0, "E14"); } else { memtohex(VAR_7, mem_buf, len); put_packet(VAR_0, VAR_7); } case 'M': addr = strtoull(VAR_3, (char **)&VAR_3, 16); if (*VAR_3 == ',') VAR_3++; len = strtoull(VAR_3, (char **)&VAR_3, 16); if (*VAR_3 == ':') VAR_3++; hextomem(mem_buf, VAR_3, len); if (cpu_memory_rw_debug(VAR_1, addr, mem_buf, len, 1) != 0) put_packet(VAR_0, "E14"); else case 'Z': VAR_6 = strtoul(VAR_3, (char **)&VAR_3, 16); if (*VAR_3 == ',') VAR_3++; addr = strtoull(VAR_3, (char **)&VAR_3, 16); if (*VAR_3 == ',') VAR_3++; len = strtoull(VAR_3, (char **)&VAR_3, 16); if (VAR_6 == 0 || VAR_6 == 1) { if (cpu_breakpoint_insert(VAR_1, addr) < 0) goto breakpoint_error; #ifndef CONFIG_USER_ONLY } else if (VAR_6 == 2) { if (cpu_watchpoint_insert(VAR_1, addr) < 0) goto breakpoint_error; #endif } else { breakpoint_error: put_packet(VAR_0, "E22"); } case 'z': VAR_6 = strtoul(VAR_3, (char **)&VAR_3, 16); if (*VAR_3 == ',') VAR_3++; addr = strtoull(VAR_3, (char **)&VAR_3, 16); if (*VAR_3 == ',') VAR_3++; len = strtoull(VAR_3, (char **)&VAR_3, 16); if (VAR_6 == 0 || VAR_6 == 1) { cpu_breakpoint_remove(VAR_1, addr); #ifndef CONFIG_USER_ONLY } else if (VAR_6 == 2) { cpu_watchpoint_remove(VAR_1, addr); #endif } else { goto breakpoint_error; } case 'q': case 'Q': if (!strcmp(VAR_3,"qemu.sstepbits")) { sprintf(VAR_7,"ENABLE=%x,NOIRQ=%x,NOTIMER=%x", SSTEP_ENABLE, SSTEP_NOIRQ, SSTEP_NOTIMER); put_packet(VAR_0, VAR_7); } else if (strncmp(VAR_3,"qemu.sstep",10) == 0) { VAR_3 += 10; if (*VAR_3 != '=') { sprintf(VAR_7,"0x%x", sstep_flags); put_packet(VAR_0, VAR_7); } VAR_3++; VAR_6 = strtoul(VAR_3, (char **)&VAR_3, 16); sstep_flags = VAR_6; } #ifdef CONFIG_LINUX_USER else if (strncmp(VAR_3, "Offsets", 7) == 0) { TaskState *ts = VAR_1->opaque; sprintf(VAR_7, "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx ";Bss=" TARGET_ABI_FMT_lx, ts->info->code_offset, ts->info->data_offset, ts->info->data_offset); put_packet(VAR_0, VAR_7); } #endif default: VAR_7[0] = '\0'; put_packet(VAR_0, VAR_7); } return RS_IDLE; }

static void decode_ac_filter(WmallDecodeCtx *s) { int i; s->acfilter_order = get_bits(&s->gb, 4) + 1; s->acfilter_scaling = get_bits(&s->gb, 4); for(i = 0; i < s->acfilter_order; i++) { s->acfilter_coeffs[i] = get_bits(&s->gb, s->acfilter_scaling) + 1; } }

FFmpeg

dae7ff04160901a30a35af05f2f149b289c4f0b1

static void decode_ac_filter(WmallDecodeCtx *s) { int i; s->acfilter_order = get_bits(&s->gb, 4) + 1; s->acfilter_scaling = get_bits(&s->gb, 4); for(i = 0; i < s->acfilter_order; i++) { s->acfilter_coeffs[i] = get_bits(&s->gb, s->acfilter_scaling) + 1; } }

static void FUNC_0(WmallDecodeCtx *VAR_0) { int VAR_1; VAR_0->acfilter_order = get_bits(&VAR_0->gb, 4) + 1; VAR_0->acfilter_scaling = get_bits(&VAR_0->gb, 4); for(VAR_1 = 0; VAR_1 < VAR_0->acfilter_order; VAR_1++) { VAR_0->acfilter_coeffs[VAR_1] = get_bits(&VAR_0->gb, VAR_0->acfilter_scaling) + 1; } }

static void check_loopfilter(void) { LOCAL_ALIGNED_32(uint8_t, base0, [32 + 16 * 16 * 2]); LOCAL_ALIGNED_32(uint8_t, base1, [32 + 16 * 16 * 2]); VP9DSPContext dsp; int dir, wd, wd2, bit_depth; static const char *const dir_name[2] = { "h", "v" }; static const int E[2] = { 20, 28 }, I[2] = { 10, 16 }; static const int H[2] = { 7, 11 }, F[2] = { 1, 1 }; declare_func(void, uint8_t *dst, ptrdiff_t stride, int E, int I, int H); for (bit_depth = 8; bit_depth <= 12; bit_depth += 2) { ff_vp9dsp_init(&dsp, bit_depth, 0); for (dir = 0; dir < 2; dir++) { int midoff = (dir ? 8 * 8 : 8) * SIZEOF_PIXEL; int midoff_aligned = (dir ? 8 * 8 : 16) * SIZEOF_PIXEL; uint8_t *buf0 = base0 + midoff_aligned; uint8_t *buf1 = base1 + midoff_aligned; for (wd = 0; wd < 3; wd++) { // 4/8/16wd_8px if (check_func(dsp.loop_filter_8[wd][dir], "vp9_loop_filter_%s_%d_8_%dbpp", dir_name[dir], 4 << wd, bit_depth)) { randomize_buffers(0, 0, 8); memcpy(buf1 - midoff, buf0 - midoff, 16 * 8 * SIZEOF_PIXEL); call_ref(buf0, 16 * SIZEOF_PIXEL >> dir, E[0], I[0], H[0]); call_new(buf1, 16 * SIZEOF_PIXEL >> dir, E[0], I[0], H[0]); if (memcmp(buf0 - midoff, buf1 - midoff, 16 * 8 * SIZEOF_PIXEL)) fail(); bench_new(buf1, 16 * SIZEOF_PIXEL >> dir, E[0], I[0], H[0]); } } midoff = (dir ? 16 * 8 : 8) * SIZEOF_PIXEL; midoff_aligned = (dir ? 16 * 8 : 16) * SIZEOF_PIXEL; buf0 = base0 + midoff_aligned; buf1 = base1 + midoff_aligned; // 16wd_16px loopfilter if (check_func(dsp.loop_filter_16[dir], "vp9_loop_filter_%s_16_16_%dbpp", dir_name[dir], bit_depth)) { randomize_buffers(0, 0, 16); randomize_buffers(0, 8, 16); memcpy(buf1 - midoff, buf0 - midoff, 16 * 16 * SIZEOF_PIXEL); call_ref(buf0, 16 * SIZEOF_PIXEL, E[0], I[0], H[0]); call_new(buf1, 16 * SIZEOF_PIXEL, E[0], I[0], H[0]); if (memcmp(buf0 - midoff, buf1 - midoff, 16 * 16 * SIZEOF_PIXEL)) fail(); bench_new(buf1, 16 * SIZEOF_PIXEL, E[0], I[0], H[0]); } for (wd = 0; wd < 2; wd++) { for (wd2 = 0; wd2 < 2; wd2++) { // mix2 loopfilter if (check_func(dsp.loop_filter_mix2[wd][wd2][dir], "vp9_loop_filter_mix2_%s_%d%d_16_%dbpp", dir_name[dir], 4 << wd, 4 << wd2, bit_depth)) { randomize_buffers(0, 0, 16); randomize_buffers(1, 8, 16); memcpy(buf1 - midoff, buf0 - midoff, 16 * 16 * SIZEOF_PIXEL); #define M(a) (((a)[1] << 8) | (a)[0]) call_ref(buf0, 16 * SIZEOF_PIXEL, M(E), M(I), M(H)); call_new(buf1, 16 * SIZEOF_PIXEL, M(E), M(I), M(H)); if (memcmp(buf0 - midoff, buf1 - midoff, 16 * 16 * SIZEOF_PIXEL)) fail(); bench_new(buf1, 16 * SIZEOF_PIXEL, M(E), M(I), M(H)); #undef M } } } } } report("loopfilter"); }

FFmpeg

54a0a52be100d36291084f92b7d6aee1a4960acb

static void check_loopfilter(void) { LOCAL_ALIGNED_32(uint8_t, base0, [32 + 16 * 16 * 2]); LOCAL_ALIGNED_32(uint8_t, base1, [32 + 16 * 16 * 2]); VP9DSPContext dsp; int dir, wd, wd2, bit_depth; static const char *const dir_name[2] = { "h", "v" }; static const int E[2] = { 20, 28 }, I[2] = { 10, 16 }; static const int H[2] = { 7, 11 }, F[2] = { 1, 1 }; declare_func(void, uint8_t *dst, ptrdiff_t stride, int E, int I, int H); for (bit_depth = 8; bit_depth <= 12; bit_depth += 2) { ff_vp9dsp_init(&dsp, bit_depth, 0); for (dir = 0; dir < 2; dir++) { int midoff = (dir ? 8 * 8 : 8) * SIZEOF_PIXEL; int midoff_aligned = (dir ? 8 * 8 : 16) * SIZEOF_PIXEL; uint8_t *buf0 = base0 + midoff_aligned; uint8_t *buf1 = base1 + midoff_aligned; for (wd = 0; wd < 3; wd++) { if (check_func(dsp.loop_filter_8[wd][dir], "vp9_loop_filter_%s_%d_8_%dbpp", dir_name[dir], 4 << wd, bit_depth)) { randomize_buffers(0, 0, 8); memcpy(buf1 - midoff, buf0 - midoff, 16 * 8 * SIZEOF_PIXEL); call_ref(buf0, 16 * SIZEOF_PIXEL >> dir, E[0], I[0], H[0]); call_new(buf1, 16 * SIZEOF_PIXEL >> dir, E[0], I[0], H[0]); if (memcmp(buf0 - midoff, buf1 - midoff, 16 * 8 * SIZEOF_PIXEL)) fail(); bench_new(buf1, 16 * SIZEOF_PIXEL >> dir, E[0], I[0], H[0]); } } midoff = (dir ? 16 * 8 : 8) * SIZEOF_PIXEL; midoff_aligned = (dir ? 16 * 8 : 16) * SIZEOF_PIXEL; buf0 = base0 + midoff_aligned; buf1 = base1 + midoff_aligned; if (check_func(dsp.loop_filter_16[dir], "vp9_loop_filter_%s_16_16_%dbpp", dir_name[dir], bit_depth)) { randomize_buffers(0, 0, 16); randomize_buffers(0, 8, 16); memcpy(buf1 - midoff, buf0 - midoff, 16 * 16 * SIZEOF_PIXEL); call_ref(buf0, 16 * SIZEOF_PIXEL, E[0], I[0], H[0]); call_new(buf1, 16 * SIZEOF_PIXEL, E[0], I[0], H[0]); if (memcmp(buf0 - midoff, buf1 - midoff, 16 * 16 * SIZEOF_PIXEL)) fail(); bench_new(buf1, 16 * SIZEOF_PIXEL, E[0], I[0], H[0]); } for (wd = 0; wd < 2; wd++) { for (wd2 = 0; wd2 < 2; wd2++) { if (check_func(dsp.loop_filter_mix2[wd][wd2][dir], "vp9_loop_filter_mix2_%s_%d%d_16_%dbpp", dir_name[dir], 4 << wd, 4 << wd2, bit_depth)) { randomize_buffers(0, 0, 16); randomize_buffers(1, 8, 16); memcpy(buf1 - midoff, buf0 - midoff, 16 * 16 * SIZEOF_PIXEL); #define M(a) (((a)[1] << 8) | (a)[0]) call_ref(buf0, 16 * SIZEOF_PIXEL, M(E), M(I), M(H)); call_new(buf1, 16 * SIZEOF_PIXEL, M(E), M(I), M(H)); if (memcmp(buf0 - midoff, buf1 - midoff, 16 * 16 * SIZEOF_PIXEL)) fail(); bench_new(buf1, 16 * SIZEOF_PIXEL, M(E), M(I), M(H)); #undef M } } } } } report("loopfilter"); }

static void FUNC_0(void) { LOCAL_ALIGNED_32(uint8_t, base0, [32 + 16 * 16 * 2]); LOCAL_ALIGNED_32(uint8_t, base1, [32 + 16 * 16 * 2]); VP9DSPContext dsp; int VAR_0, VAR_1, VAR_2, VAR_3; static const char *const VAR_4[2] = { "h", "v" }; static const int VAR_5[2] = { 20, 28 }, VAR_6[2] = { 10, 16 }; static const int VAR_7[2] = { 7, 11 }, VAR_8[2] = { 1, 1 }; declare_func(void, uint8_t *dst, ptrdiff_t stride, int VAR_5, int VAR_6, int VAR_7); for (VAR_3 = 8; VAR_3 <= 12; VAR_3 += 2) { ff_vp9dsp_init(&dsp, VAR_3, 0); for (VAR_0 = 0; VAR_0 < 2; VAR_0++) { int VAR_9 = (VAR_0 ? 8 * 8 : 8) * SIZEOF_PIXEL; int VAR_10 = (VAR_0 ? 8 * 8 : 16) * SIZEOF_PIXEL; uint8_t *buf0 = base0 + VAR_10; uint8_t *buf1 = base1 + VAR_10; for (VAR_1 = 0; VAR_1 < 3; VAR_1++) { if (check_func(dsp.loop_filter_8[VAR_1][VAR_0], "vp9_loop_filter_%s_%d_8_%dbpp", VAR_4[VAR_0], 4 << VAR_1, VAR_3)) { randomize_buffers(0, 0, 8); memcpy(buf1 - VAR_9, buf0 - VAR_9, 16 * 8 * SIZEOF_PIXEL); call_ref(buf0, 16 * SIZEOF_PIXEL >> VAR_0, VAR_5[0], VAR_6[0], VAR_7[0]); call_new(buf1, 16 * SIZEOF_PIXEL >> VAR_0, VAR_5[0], VAR_6[0], VAR_7[0]); if (memcmp(buf0 - VAR_9, buf1 - VAR_9, 16 * 8 * SIZEOF_PIXEL)) fail(); bench_new(buf1, 16 * SIZEOF_PIXEL >> VAR_0, VAR_5[0], VAR_6[0], VAR_7[0]); } } VAR_9 = (VAR_0 ? 16 * 8 : 8) * SIZEOF_PIXEL; VAR_10 = (VAR_0 ? 16 * 8 : 16) * SIZEOF_PIXEL; buf0 = base0 + VAR_10; buf1 = base1 + VAR_10; if (check_func(dsp.loop_filter_16[VAR_0], "vp9_loop_filter_%s_16_16_%dbpp", VAR_4[VAR_0], VAR_3)) { randomize_buffers(0, 0, 16); randomize_buffers(0, 8, 16); memcpy(buf1 - VAR_9, buf0 - VAR_9, 16 * 16 * SIZEOF_PIXEL); call_ref(buf0, 16 * SIZEOF_PIXEL, VAR_5[0], VAR_6[0], VAR_7[0]); call_new(buf1, 16 * SIZEOF_PIXEL, VAR_5[0], VAR_6[0], VAR_7[0]); if (memcmp(buf0 - VAR_9, buf1 - VAR_9, 16 * 16 * SIZEOF_PIXEL)) fail(); bench_new(buf1, 16 * SIZEOF_PIXEL, VAR_5[0], VAR_6[0], VAR_7[0]); } for (VAR_1 = 0; VAR_1 < 2; VAR_1++) { for (VAR_2 = 0; VAR_2 < 2; VAR_2++) { if (check_func(dsp.loop_filter_mix2[VAR_1][VAR_2][VAR_0], "vp9_loop_filter_mix2_%s_%d%d_16_%dbpp", VAR_4[VAR_0], 4 << VAR_1, 4 << VAR_2, VAR_3)) { randomize_buffers(0, 0, 16); randomize_buffers(1, 8, 16); memcpy(buf1 - VAR_9, buf0 - VAR_9, 16 * 16 * SIZEOF_PIXEL); #define M(a) (((a)[1] << 8) | (a)[0]) call_ref(buf0, 16 * SIZEOF_PIXEL, M(VAR_5), M(VAR_6), M(VAR_7)); call_new(buf1, 16 * SIZEOF_PIXEL, M(VAR_5), M(VAR_6), M(VAR_7)); if (memcmp(buf0 - VAR_9, buf1 - VAR_9, 16 * 16 * SIZEOF_PIXEL)) fail(); bench_new(buf1, 16 * SIZEOF_PIXEL, M(VAR_5), M(VAR_6), M(VAR_7)); #undef M } } } } } report("loopfilter"); }

av_cold void ff_dsputil_init_x86(DSPContext *c, AVCodecContext *avctx) { int cpu_flags = av_get_cpu_flags(); #if HAVE_7REGS && HAVE_INLINE_ASM if (HAVE_MMX && cpu_flags & AV_CPU_FLAG_CMOV) c->add_hfyu_median_prediction = ff_add_hfyu_median_prediction_cmov; #endif if (X86_MMX(cpu_flags)) { #if HAVE_INLINE_ASM const int idct_algo = avctx->idct_algo; if (avctx->lowres == 0 && avctx->bits_per_raw_sample <= 8) { if (idct_algo == FF_IDCT_AUTO || idct_algo == FF_IDCT_SIMPLEMMX) { c->idct_put = ff_simple_idct_put_mmx; c->idct_add = ff_simple_idct_add_mmx; c->idct = ff_simple_idct_mmx; c->idct_permutation_type = FF_SIMPLE_IDCT_PERM; } else if (idct_algo == FF_IDCT_XVIDMMX) { if (cpu_flags & AV_CPU_FLAG_SSE2) { c->idct_put = ff_idct_xvid_sse2_put; c->idct_add = ff_idct_xvid_sse2_add; c->idct = ff_idct_xvid_sse2; c->idct_permutation_type = FF_SSE2_IDCT_PERM; } else if (cpu_flags & AV_CPU_FLAG_MMXEXT) { c->idct_put = ff_idct_xvid_mmxext_put; c->idct_add = ff_idct_xvid_mmxext_add; c->idct = ff_idct_xvid_mmxext; } else { c->idct_put = ff_idct_xvid_mmx_put; c->idct_add = ff_idct_xvid_mmx_add; c->idct = ff_idct_xvid_mmx; } } } #endif /* HAVE_INLINE_ASM */ dsputil_init_mmx(c, avctx, cpu_flags); } if (X86_MMXEXT(cpu_flags)) dsputil_init_mmxext(c, avctx, cpu_flags); if (X86_SSE(cpu_flags)) dsputil_init_sse(c, avctx, cpu_flags); if (X86_SSE2(cpu_flags)) dsputil_init_sse2(c, avctx, cpu_flags); if (EXTERNAL_SSSE3(cpu_flags)) dsputil_init_ssse3(c, avctx, cpu_flags); if (EXTERNAL_SSE4(cpu_flags)) dsputil_init_sse4(c, avctx, cpu_flags); if (CONFIG_ENCODERS) ff_dsputilenc_init_mmx(c, avctx); }

FFmpeg

1bf8fa75ee148f40938d47bb9aaf53ac3c1ae126

av_cold void ff_dsputil_init_x86(DSPContext *c, AVCodecContext *avctx) { int cpu_flags = av_get_cpu_flags(); #if HAVE_7REGS && HAVE_INLINE_ASM if (HAVE_MMX && cpu_flags & AV_CPU_FLAG_CMOV) c->add_hfyu_median_prediction = ff_add_hfyu_median_prediction_cmov; #endif if (X86_MMX(cpu_flags)) { #if HAVE_INLINE_ASM const int idct_algo = avctx->idct_algo; if (avctx->lowres == 0 && avctx->bits_per_raw_sample <= 8) { if (idct_algo == FF_IDCT_AUTO || idct_algo == FF_IDCT_SIMPLEMMX) { c->idct_put = ff_simple_idct_put_mmx; c->idct_add = ff_simple_idct_add_mmx; c->idct = ff_simple_idct_mmx; c->idct_permutation_type = FF_SIMPLE_IDCT_PERM; } else if (idct_algo == FF_IDCT_XVIDMMX) { if (cpu_flags & AV_CPU_FLAG_SSE2) { c->idct_put = ff_idct_xvid_sse2_put; c->idct_add = ff_idct_xvid_sse2_add; c->idct = ff_idct_xvid_sse2; c->idct_permutation_type = FF_SSE2_IDCT_PERM; } else if (cpu_flags & AV_CPU_FLAG_MMXEXT) { c->idct_put = ff_idct_xvid_mmxext_put; c->idct_add = ff_idct_xvid_mmxext_add; c->idct = ff_idct_xvid_mmxext; } else { c->idct_put = ff_idct_xvid_mmx_put; c->idct_add = ff_idct_xvid_mmx_add; c->idct = ff_idct_xvid_mmx; } } } #endif dsputil_init_mmx(c, avctx, cpu_flags); } if (X86_MMXEXT(cpu_flags)) dsputil_init_mmxext(c, avctx, cpu_flags); if (X86_SSE(cpu_flags)) dsputil_init_sse(c, avctx, cpu_flags); if (X86_SSE2(cpu_flags)) dsputil_init_sse2(c, avctx, cpu_flags); if (EXTERNAL_SSSE3(cpu_flags)) dsputil_init_ssse3(c, avctx, cpu_flags); if (EXTERNAL_SSE4(cpu_flags)) dsputil_init_sse4(c, avctx, cpu_flags); if (CONFIG_ENCODERS) ff_dsputilenc_init_mmx(c, avctx); }

av_cold void FUNC_0(DSPContext *c, AVCodecContext *avctx) { int VAR_0 = av_get_cpu_flags(); #if HAVE_7REGS && HAVE_INLINE_ASM if (HAVE_MMX && VAR_0 & AV_CPU_FLAG_CMOV) c->add_hfyu_median_prediction = ff_add_hfyu_median_prediction_cmov; #endif if (X86_MMX(VAR_0)) { #if HAVE_INLINE_ASM const int idct_algo = avctx->idct_algo; if (avctx->lowres == 0 && avctx->bits_per_raw_sample <= 8) { if (idct_algo == FF_IDCT_AUTO || idct_algo == FF_IDCT_SIMPLEMMX) { c->idct_put = ff_simple_idct_put_mmx; c->idct_add = ff_simple_idct_add_mmx; c->idct = ff_simple_idct_mmx; c->idct_permutation_type = FF_SIMPLE_IDCT_PERM; } else if (idct_algo == FF_IDCT_XVIDMMX) { if (VAR_0 & AV_CPU_FLAG_SSE2) { c->idct_put = ff_idct_xvid_sse2_put; c->idct_add = ff_idct_xvid_sse2_add; c->idct = ff_idct_xvid_sse2; c->idct_permutation_type = FF_SSE2_IDCT_PERM; } else if (VAR_0 & AV_CPU_FLAG_MMXEXT) { c->idct_put = ff_idct_xvid_mmxext_put; c->idct_add = ff_idct_xvid_mmxext_add; c->idct = ff_idct_xvid_mmxext; } else { c->idct_put = ff_idct_xvid_mmx_put; c->idct_add = ff_idct_xvid_mmx_add; c->idct = ff_idct_xvid_mmx; } } } #endif dsputil_init_mmx(c, avctx, VAR_0); } if (X86_MMXEXT(VAR_0)) dsputil_init_mmxext(c, avctx, VAR_0); if (X86_SSE(VAR_0)) dsputil_init_sse(c, avctx, VAR_0); if (X86_SSE2(VAR_0)) dsputil_init_sse2(c, avctx, VAR_0); if (EXTERNAL_SSSE3(VAR_0)) dsputil_init_ssse3(c, avctx, VAR_0); if (EXTERNAL_SSE4(VAR_0)) dsputil_init_sse4(c, avctx, VAR_0); if (CONFIG_ENCODERS) ff_dsputilenc_init_mmx(c, avctx); }

static void search_for_quantizers_anmr(AVCodecContext *avctx, AACEncContext *s, SingleChannelElement *sce, const float lambda) { int q, w, w2, g, start = 0; int i, j; int idx; TrellisPath paths[TRELLIS_STAGES][TRELLIS_STATES]; int bandaddr[TRELLIS_STAGES]; int minq; float mincost; float q0f = FLT_MAX, q1f = 0.0f, qnrgf = 0.0f; int q0, q1, qcnt = 0; for (i = 0; i < 1024; i++) { float t = fabsf(sce->coeffs[i]); if (t > 0.0f) { q0f = FFMIN(q0f, t); q1f = FFMAX(q1f, t); qnrgf += t*t; qcnt++; } } if (!qcnt) { memset(sce->sf_idx, 0, sizeof(sce->sf_idx)); memset(sce->zeroes, 1, sizeof(sce->zeroes)); return; } //minimum scalefactor index is when minimum nonzero coefficient after quantizing is not clipped q0 = coef2minsf(q0f); //maximum scalefactor index is when maximum coefficient after quantizing is still not zero q1 = coef2maxsf(q1f); if (q1 - q0 > 60) { int q0low = q0; int q1high = q1; //minimum scalefactor index is when maximum nonzero coefficient after quantizing is not clipped int qnrg = av_clip_uint8(log2f(sqrtf(qnrgf/qcnt))*4 - 31 + SCALE_ONE_POS - SCALE_DIV_512); q1 = qnrg + 30; q0 = qnrg - 30; if (q0 < q0low) { q1 += q0low - q0; q0 = q0low; } else if (q1 > q1high) { q0 -= q1 - q1high; q1 = q1high; } } for (i = 0; i < TRELLIS_STATES; i++) { paths[0][i].cost = 0.0f; paths[0][i].prev = -1; } for (j = 1; j < TRELLIS_STAGES; j++) { for (i = 0; i < TRELLIS_STATES; i++) { paths[j][i].cost = INFINITY; paths[j][i].prev = -2; } } idx = 1; abs_pow34_v(s->scoefs, sce->coeffs, 1024); for (w = 0; w < sce->ics.num_windows; w += sce->ics.group_len[w]) { start = w*128; for (g = 0; g < sce->ics.num_swb; g++) { const float *coefs = &sce->coeffs[start]; float qmin, qmax; int nz = 0; bandaddr[idx] = w * 16 + g; qmin = INT_MAX; qmax = 0.0f; for (w2 = 0; w2 < sce->ics.group_len[w]; w2++) { FFPsyBand *band = &s->psy.ch[s->cur_channel].psy_bands[(w+w2)*16+g]; if (band->energy <= band->threshold || band->threshold == 0.0f) { sce->zeroes[(w+w2)*16+g] = 1; continue; } sce->zeroes[(w+w2)*16+g] = 0; nz = 1; for (i = 0; i < sce->ics.swb_sizes[g]; i++) { float t = fabsf(coefs[w2*128+i]); if (t > 0.0f) qmin = FFMIN(qmin, t); qmax = FFMAX(qmax, t); } } if (nz) { int minscale, maxscale; float minrd = INFINITY; float maxval; //minimum scalefactor index is when minimum nonzero coefficient after quantizing is not clipped minscale = coef2minsf(qmin); //maximum scalefactor index is when maximum coefficient after quantizing is still not zero maxscale = coef2maxsf(qmax); minscale = av_clip(minscale - q0, 0, TRELLIS_STATES - 1); maxscale = av_clip(maxscale - q0, 0, TRELLIS_STATES); maxval = find_max_val(sce->ics.group_len[w], sce->ics.swb_sizes[g], s->scoefs+start); for (q = minscale; q < maxscale; q++) { float dist = 0; int cb = find_min_book(maxval, sce->sf_idx[w*16+g]); for (w2 = 0; w2 < sce->ics.group_len[w]; w2++) { FFPsyBand *band = &s->psy.ch[s->cur_channel].psy_bands[(w+w2)*16+g]; dist += quantize_band_cost(s, coefs + w2*128, s->scoefs + start + w2*128, sce->ics.swb_sizes[g], q + q0, cb, lambda / band->threshold, INFINITY, NULL, NULL, 0); } minrd = FFMIN(minrd, dist); for (i = 0; i < q1 - q0; i++) { float cost; cost = paths[idx - 1][i].cost + dist + ff_aac_scalefactor_bits[q - i + SCALE_DIFF_ZERO]; if (cost < paths[idx][q].cost) { paths[idx][q].cost = cost; paths[idx][q].prev = i; } } } } else { for (q = 0; q < q1 - q0; q++) { paths[idx][q].cost = paths[idx - 1][q].cost + 1; paths[idx][q].prev = q; } } sce->zeroes[w*16+g] = !nz; start += sce->ics.swb_sizes[g]; idx++; } } idx--; mincost = paths[idx][0].cost; minq = 0; for (i = 1; i < TRELLIS_STATES; i++) { if (paths[idx][i].cost < mincost) { mincost = paths[idx][i].cost; minq = i; } } while (idx) { sce->sf_idx[bandaddr[idx]] = minq + q0; minq = paths[idx][minq].prev; idx--; } //set the same quantizers inside window groups for (w = 0; w < sce->ics.num_windows; w += sce->ics.group_len[w]) for (g = 0; g < sce->ics.num_swb; g++) for (w2 = 1; w2 < sce->ics.group_len[w]; w2++) sce->sf_idx[(w+w2)*16+g] = sce->sf_idx[w*16+g]; }

FFmpeg

7a4652dd5da0502ff21c183b5ca7d76b1cfd6c51

static void search_for_quantizers_anmr(AVCodecContext *avctx, AACEncContext *s, SingleChannelElement *sce, const float lambda) { int q, w, w2, g, start = 0; int i, j; int idx; TrellisPath paths[TRELLIS_STAGES][TRELLIS_STATES]; int bandaddr[TRELLIS_STAGES]; int minq; float mincost; float q0f = FLT_MAX, q1f = 0.0f, qnrgf = 0.0f; int q0, q1, qcnt = 0; for (i = 0; i < 1024; i++) { float t = fabsf(sce->coeffs[i]); if (t > 0.0f) { q0f = FFMIN(q0f, t); q1f = FFMAX(q1f, t); qnrgf += t*t; qcnt++; } } if (!qcnt) { memset(sce->sf_idx, 0, sizeof(sce->sf_idx)); memset(sce->zeroes, 1, sizeof(sce->zeroes)); return; } q0 = coef2minsf(q0f); q1 = coef2maxsf(q1f); if (q1 - q0 > 60) { int q0low = q0; int q1high = q1; int qnrg = av_clip_uint8(log2f(sqrtf(qnrgf/qcnt))*4 - 31 + SCALE_ONE_POS - SCALE_DIV_512); q1 = qnrg + 30; q0 = qnrg - 30; if (q0 < q0low) { q1 += q0low - q0; q0 = q0low; } else if (q1 > q1high) { q0 -= q1 - q1high; q1 = q1high; } } for (i = 0; i < TRELLIS_STATES; i++) { paths[0][i].cost = 0.0f; paths[0][i].prev = -1; } for (j = 1; j < TRELLIS_STAGES; j++) { for (i = 0; i < TRELLIS_STATES; i++) { paths[j][i].cost = INFINITY; paths[j][i].prev = -2; } } idx = 1; abs_pow34_v(s->scoefs, sce->coeffs, 1024); for (w = 0; w < sce->ics.num_windows; w += sce->ics.group_len[w]) { start = w*128; for (g = 0; g < sce->ics.num_swb; g++) { const float *coefs = &sce->coeffs[start]; float qmin, qmax; int nz = 0; bandaddr[idx] = w * 16 + g; qmin = INT_MAX; qmax = 0.0f; for (w2 = 0; w2 < sce->ics.group_len[w]; w2++) { FFPsyBand *band = &s->psy.ch[s->cur_channel].psy_bands[(w+w2)*16+g]; if (band->energy <= band->threshold || band->threshold == 0.0f) { sce->zeroes[(w+w2)*16+g] = 1; continue; } sce->zeroes[(w+w2)*16+g] = 0; nz = 1; for (i = 0; i < sce->ics.swb_sizes[g]; i++) { float t = fabsf(coefs[w2*128+i]); if (t > 0.0f) qmin = FFMIN(qmin, t); qmax = FFMAX(qmax, t); } } if (nz) { int minscale, maxscale; float minrd = INFINITY; float maxval; minscale = coef2minsf(qmin); maxscale = coef2maxsf(qmax); minscale = av_clip(minscale - q0, 0, TRELLIS_STATES - 1); maxscale = av_clip(maxscale - q0, 0, TRELLIS_STATES); maxval = find_max_val(sce->ics.group_len[w], sce->ics.swb_sizes[g], s->scoefs+start); for (q = minscale; q < maxscale; q++) { float dist = 0; int cb = find_min_book(maxval, sce->sf_idx[w*16+g]); for (w2 = 0; w2 < sce->ics.group_len[w]; w2++) { FFPsyBand *band = &s->psy.ch[s->cur_channel].psy_bands[(w+w2)*16+g]; dist += quantize_band_cost(s, coefs + w2*128, s->scoefs + start + w2*128, sce->ics.swb_sizes[g], q + q0, cb, lambda / band->threshold, INFINITY, NULL, NULL, 0); } minrd = FFMIN(minrd, dist); for (i = 0; i < q1 - q0; i++) { float cost; cost = paths[idx - 1][i].cost + dist + ff_aac_scalefactor_bits[q - i + SCALE_DIFF_ZERO]; if (cost < paths[idx][q].cost) { paths[idx][q].cost = cost; paths[idx][q].prev = i; } } } } else { for (q = 0; q < q1 - q0; q++) { paths[idx][q].cost = paths[idx - 1][q].cost + 1; paths[idx][q].prev = q; } } sce->zeroes[w*16+g] = !nz; start += sce->ics.swb_sizes[g]; idx++; } } idx--; mincost = paths[idx][0].cost; minq = 0; for (i = 1; i < TRELLIS_STATES; i++) { if (paths[idx][i].cost < mincost) { mincost = paths[idx][i].cost; minq = i; } } while (idx) { sce->sf_idx[bandaddr[idx]] = minq + q0; minq = paths[idx][minq].prev; idx--; } for (w = 0; w < sce->ics.num_windows; w += sce->ics.group_len[w]) for (g = 0; g < sce->ics.num_swb; g++) for (w2 = 1; w2 < sce->ics.group_len[w]; w2++) sce->sf_idx[(w+w2)*16+g] = sce->sf_idx[w*16+g]; }

static void FUNC_0(AVCodecContext *VAR_0, AACEncContext *VAR_1, SingleChannelElement *VAR_2, const float VAR_3) { int VAR_4, VAR_5, VAR_6, VAR_7, VAR_8 = 0; int VAR_9, VAR_10; int VAR_11; TrellisPath paths[TRELLIS_STAGES][TRELLIS_STATES]; int VAR_12[TRELLIS_STAGES]; int VAR_13; float VAR_14; float VAR_15 = FLT_MAX, VAR_16 = 0.0f, VAR_17 = 0.0f; int VAR_18, VAR_19, VAR_20 = 0; for (VAR_9 = 0; VAR_9 < 1024; VAR_9++) { float VAR_21 = fabsf(VAR_2->coeffs[VAR_9]); if (VAR_21 > 0.0f) { VAR_15 = FFMIN(VAR_15, VAR_21); VAR_16 = FFMAX(VAR_16, VAR_21); VAR_17 += VAR_21*VAR_21; VAR_20++; } } if (!VAR_20) { memset(VAR_2->sf_idx, 0, sizeof(VAR_2->sf_idx)); memset(VAR_2->zeroes, 1, sizeof(VAR_2->zeroes)); return; } VAR_18 = coef2minsf(VAR_15); VAR_19 = coef2maxsf(VAR_16); if (VAR_19 - VAR_18 > 60) { int VAR_22 = VAR_18; int VAR_23 = VAR_19; int VAR_24 = av_clip_uint8(log2f(sqrtf(VAR_17/VAR_20))*4 - 31 + SCALE_ONE_POS - SCALE_DIV_512); VAR_19 = VAR_24 + 30; VAR_18 = VAR_24 - 30; if (VAR_18 < VAR_22) { VAR_19 += VAR_22 - VAR_18; VAR_18 = VAR_22; } else if (VAR_19 > VAR_23) { VAR_18 -= VAR_19 - VAR_23; VAR_19 = VAR_23; } } for (VAR_9 = 0; VAR_9 < TRELLIS_STATES; VAR_9++) { paths[0][VAR_9].cost = 0.0f; paths[0][VAR_9].prev = -1; } for (VAR_10 = 1; VAR_10 < TRELLIS_STAGES; VAR_10++) { for (VAR_9 = 0; VAR_9 < TRELLIS_STATES; VAR_9++) { paths[VAR_10][VAR_9].cost = INFINITY; paths[VAR_10][VAR_9].prev = -2; } } VAR_11 = 1; abs_pow34_v(VAR_1->scoefs, VAR_2->coeffs, 1024); for (VAR_5 = 0; VAR_5 < VAR_2->ics.num_windows; VAR_5 += VAR_2->ics.group_len[VAR_5]) { VAR_8 = VAR_5*128; for (VAR_7 = 0; VAR_7 < VAR_2->ics.num_swb; VAR_7++) { const float *coefs = &VAR_2->coeffs[VAR_8]; float qmin, qmax; int nz = 0; VAR_12[VAR_11] = VAR_5 * 16 + VAR_7; qmin = INT_MAX; qmax = 0.0f; for (VAR_6 = 0; VAR_6 < VAR_2->ics.group_len[VAR_5]; VAR_6++) { FFPsyBand *band = &VAR_1->psy.ch[VAR_1->cur_channel].psy_bands[(VAR_5+VAR_6)*16+VAR_7]; if (band->energy <= band->threshold || band->threshold == 0.0f) { VAR_2->zeroes[(VAR_5+VAR_6)*16+VAR_7] = 1; continue; } VAR_2->zeroes[(VAR_5+VAR_6)*16+VAR_7] = 0; nz = 1; for (VAR_9 = 0; VAR_9 < VAR_2->ics.swb_sizes[VAR_7]; VAR_9++) { float VAR_21 = fabsf(coefs[VAR_6*128+VAR_9]); if (VAR_21 > 0.0f) qmin = FFMIN(qmin, VAR_21); qmax = FFMAX(qmax, VAR_21); } } if (nz) { int minscale, maxscale; float minrd = INFINITY; float maxval; minscale = coef2minsf(qmin); maxscale = coef2maxsf(qmax); minscale = av_clip(minscale - VAR_18, 0, TRELLIS_STATES - 1); maxscale = av_clip(maxscale - VAR_18, 0, TRELLIS_STATES); maxval = find_max_val(VAR_2->ics.group_len[VAR_5], VAR_2->ics.swb_sizes[VAR_7], VAR_1->scoefs+VAR_8); for (VAR_4 = minscale; VAR_4 < maxscale; VAR_4++) { float dist = 0; int cb = find_min_book(maxval, VAR_2->sf_idx[VAR_5*16+VAR_7]); for (VAR_6 = 0; VAR_6 < VAR_2->ics.group_len[VAR_5]; VAR_6++) { FFPsyBand *band = &VAR_1->psy.ch[VAR_1->cur_channel].psy_bands[(VAR_5+VAR_6)*16+VAR_7]; dist += quantize_band_cost(VAR_1, coefs + VAR_6*128, VAR_1->scoefs + VAR_8 + VAR_6*128, VAR_2->ics.swb_sizes[VAR_7], VAR_4 + VAR_18, cb, VAR_3 / band->threshold, INFINITY, NULL, NULL, 0); } minrd = FFMIN(minrd, dist); for (VAR_9 = 0; VAR_9 < VAR_19 - VAR_18; VAR_9++) { float cost; cost = paths[VAR_11 - 1][VAR_9].cost + dist + ff_aac_scalefactor_bits[VAR_4 - VAR_9 + SCALE_DIFF_ZERO]; if (cost < paths[VAR_11][VAR_4].cost) { paths[VAR_11][VAR_4].cost = cost; paths[VAR_11][VAR_4].prev = VAR_9; } } } } else { for (VAR_4 = 0; VAR_4 < VAR_19 - VAR_18; VAR_4++) { paths[VAR_11][VAR_4].cost = paths[VAR_11 - 1][VAR_4].cost + 1; paths[VAR_11][VAR_4].prev = VAR_4; } } VAR_2->zeroes[VAR_5*16+VAR_7] = !nz; VAR_8 += VAR_2->ics.swb_sizes[VAR_7]; VAR_11++; } } VAR_11--; VAR_14 = paths[VAR_11][0].cost; VAR_13 = 0; for (VAR_9 = 1; VAR_9 < TRELLIS_STATES; VAR_9++) { if (paths[VAR_11][VAR_9].cost < VAR_14) { VAR_14 = paths[VAR_11][VAR_9].cost; VAR_13 = VAR_9; } } while (VAR_11) { VAR_2->sf_idx[VAR_12[VAR_11]] = VAR_13 + VAR_18; VAR_13 = paths[VAR_11][VAR_13].prev; VAR_11--; } for (VAR_5 = 0; VAR_5 < VAR_2->ics.num_windows; VAR_5 += VAR_2->ics.group_len[VAR_5]) for (VAR_7 = 0; VAR_7 < VAR_2->ics.num_swb; VAR_7++) for (VAR_6 = 1; VAR_6 < VAR_2->ics.group_len[VAR_5]; VAR_6++) VAR_2->sf_idx[(VAR_5+VAR_6)*16+VAR_7] = VAR_2->sf_idx[VAR_5*16+VAR_7]; }

QDict *qdict_get_qdict(const QDict *qdict, const char *key) { return qobject_to_qdict(qdict_get_obj(qdict, key, QTYPE_QDICT)); }

qemu

89cad9f3ec6b30d7550fb5704475fc9c3393a066

QDict *qdict_get_qdict(const QDict *qdict, const char *key) { return qobject_to_qdict(qdict_get_obj(qdict, key, QTYPE_QDICT)); }

QDict *FUNC_0(const QDict *qdict, const char *key) { return qobject_to_qdict(qdict_get_obj(qdict, key, QTYPE_QDICT)); }

static int guess_ni_flag(AVFormatContext *s){ int i; int64_t last_start=0; int64_t first_end= INT64_MAX; int64_t oldpos= avio_tell(s->pb); int *idx; int64_t min_pos, pos; for(i=0; i<s->nb_streams; i++){ AVStream *st = s->streams[i]; int n= st->nb_index_entries; unsigned int size; if(n <= 0) continue; if(n >= 2){ int64_t pos= st->index_entries[0].pos; avio_seek(s->pb, pos + 4, SEEK_SET); size= avio_rl32(s->pb); if(pos + size > st->index_entries[1].pos) last_start= INT64_MAX; } if(st->index_entries[0].pos > last_start) last_start= st->index_entries[0].pos; if(st->index_entries[n-1].pos < first_end) first_end= st->index_entries[n-1].pos; } avio_seek(s->pb, oldpos, SEEK_SET); if (last_start > first_end) return 1; idx= av_mallocz(sizeof(*idx) * s->nb_streams); for (min_pos=pos=0; min_pos!=INT64_MAX; pos= min_pos+1) { int64_t max_dts = INT64_MIN/2, min_dts= INT64_MAX/2; min_pos = INT64_MAX; for (i=0; i<s->nb_streams; i++) { AVStream *st = s->streams[i]; int n= st->nb_index_entries; while (idx[i]<n && st->index_entries[idx[i]].pos < pos) idx[i]++; if (idx[i] < n) { min_dts = FFMIN(min_dts, av_rescale_q(st->index_entries[idx[i]].timestamp, st->time_base, AV_TIME_BASE_Q)); min_pos = FFMIN(min_pos, st->index_entries[idx[i]].pos); } if (idx[i]) max_dts = FFMAX(max_dts, av_rescale_q(st->index_entries[idx[i]-1].timestamp, st->time_base, AV_TIME_BASE_Q)); } if(max_dts - min_dts > 2*AV_TIME_BASE) { av_free(idx); return 1; } } av_free(idx); return 0; }

FFmpeg

108957c661f9e2dc35dea8d55e5e5b1776f4a303

static int guess_ni_flag(AVFormatContext *s){ int i; int64_t last_start=0; int64_t first_end= INT64_MAX; int64_t oldpos= avio_tell(s->pb); int *idx; int64_t min_pos, pos; for(i=0; i<s->nb_streams; i++){ AVStream *st = s->streams[i]; int n= st->nb_index_entries; unsigned int size; if(n <= 0) continue; if(n >= 2){ int64_t pos= st->index_entries[0].pos; avio_seek(s->pb, pos + 4, SEEK_SET); size= avio_rl32(s->pb); if(pos + size > st->index_entries[1].pos) last_start= INT64_MAX; } if(st->index_entries[0].pos > last_start) last_start= st->index_entries[0].pos; if(st->index_entries[n-1].pos < first_end) first_end= st->index_entries[n-1].pos; } avio_seek(s->pb, oldpos, SEEK_SET); if (last_start > first_end) return 1; idx= av_mallocz(sizeof(*idx) * s->nb_streams); for (min_pos=pos=0; min_pos!=INT64_MAX; pos= min_pos+1) { int64_t max_dts = INT64_MIN/2, min_dts= INT64_MAX/2; min_pos = INT64_MAX; for (i=0; i<s->nb_streams; i++) { AVStream *st = s->streams[i]; int n= st->nb_index_entries; while (idx[i]<n && st->index_entries[idx[i]].pos < pos) idx[i]++; if (idx[i] < n) { min_dts = FFMIN(min_dts, av_rescale_q(st->index_entries[idx[i]].timestamp, st->time_base, AV_TIME_BASE_Q)); min_pos = FFMIN(min_pos, st->index_entries[idx[i]].pos); } if (idx[i]) max_dts = FFMAX(max_dts, av_rescale_q(st->index_entries[idx[i]-1].timestamp, st->time_base, AV_TIME_BASE_Q)); } if(max_dts - min_dts > 2*AV_TIME_BASE) { av_free(idx); return 1; } } av_free(idx); return 0; }

static int FUNC_0(AVFormatContext *VAR_0){ int VAR_1; int64_t last_start=0; int64_t first_end= INT64_MAX; int64_t oldpos= avio_tell(VAR_0->pb); int *VAR_2; int64_t min_pos, pos; for(VAR_1=0; VAR_1<VAR_0->nb_streams; VAR_1++){ AVStream *st = VAR_0->streams[VAR_1]; int n= st->nb_index_entries; unsigned int size; if(n <= 0) continue; if(n >= 2){ int64_t pos= st->index_entries[0].pos; avio_seek(VAR_0->pb, pos + 4, SEEK_SET); size= avio_rl32(VAR_0->pb); if(pos + size > st->index_entries[1].pos) last_start= INT64_MAX; } if(st->index_entries[0].pos > last_start) last_start= st->index_entries[0].pos; if(st->index_entries[n-1].pos < first_end) first_end= st->index_entries[n-1].pos; } avio_seek(VAR_0->pb, oldpos, SEEK_SET); if (last_start > first_end) return 1; VAR_2= av_mallocz(sizeof(*VAR_2) * VAR_0->nb_streams); for (min_pos=pos=0; min_pos!=INT64_MAX; pos= min_pos+1) { int64_t max_dts = INT64_MIN/2, min_dts= INT64_MAX/2; min_pos = INT64_MAX; for (VAR_1=0; VAR_1<VAR_0->nb_streams; VAR_1++) { AVStream *st = VAR_0->streams[VAR_1]; int n= st->nb_index_entries; while (VAR_2[VAR_1]<n && st->index_entries[VAR_2[VAR_1]].pos < pos) VAR_2[VAR_1]++; if (VAR_2[VAR_1] < n) { min_dts = FFMIN(min_dts, av_rescale_q(st->index_entries[VAR_2[VAR_1]].timestamp, st->time_base, AV_TIME_BASE_Q)); min_pos = FFMIN(min_pos, st->index_entries[VAR_2[VAR_1]].pos); } if (VAR_2[VAR_1]) max_dts = FFMAX(max_dts, av_rescale_q(st->index_entries[VAR_2[VAR_1]-1].timestamp, st->time_base, AV_TIME_BASE_Q)); } if(max_dts - min_dts > 2*AV_TIME_BASE) { av_free(VAR_2); return 1; } } av_free(VAR_2); return 0; }

static int nut_write_trailer(AVFormatContext *s) { NUTContext *nut = s->priv_data; AVIOContext *bc = s->pb, *dyn_bc; int i, ret; while (nut->header_count < 3) write_headers(s, bc); ret = avio_open_dyn_buf(&dyn_bc); if (ret >= 0 && nut->sp_count) { av_assert1(nut->write_index); write_index(nut, dyn_bc); put_packet(nut, bc, dyn_bc, 1, INDEX_STARTCODE); } ff_nut_free_sp(nut); for (i=0; i<s->nb_streams; i++) av_freep(&nut->stream[i].keyframe_pts); av_freep(&nut->stream); av_freep(&nut->chapter); av_freep(&nut->time_base); return 0; }

FFmpeg

56c182c4d716b8b72156ff57a0c8d72087db8549

static int nut_write_trailer(AVFormatContext *s) { NUTContext *nut = s->priv_data; AVIOContext *bc = s->pb, *dyn_bc; int i, ret; while (nut->header_count < 3) write_headers(s, bc); ret = avio_open_dyn_buf(&dyn_bc); if (ret >= 0 && nut->sp_count) { av_assert1(nut->write_index); write_index(nut, dyn_bc); put_packet(nut, bc, dyn_bc, 1, INDEX_STARTCODE); } ff_nut_free_sp(nut); for (i=0; i<s->nb_streams; i++) av_freep(&nut->stream[i].keyframe_pts); av_freep(&nut->stream); av_freep(&nut->chapter); av_freep(&nut->time_base); return 0; }

static int FUNC_0(AVFormatContext *VAR_0) { NUTContext *nut = VAR_0->priv_data; AVIOContext *bc = VAR_0->pb, *dyn_bc; int VAR_1, VAR_2; while (nut->header_count < 3) write_headers(VAR_0, bc); VAR_2 = avio_open_dyn_buf(&dyn_bc); if (VAR_2 >= 0 && nut->sp_count) { av_assert1(nut->write_index); write_index(nut, dyn_bc); put_packet(nut, bc, dyn_bc, 1, INDEX_STARTCODE); } ff_nut_free_sp(nut); for (VAR_1=0; VAR_1<VAR_0->nb_streams; VAR_1++) av_freep(&nut->stream[VAR_1].keyframe_pts); av_freep(&nut->stream); av_freep(&nut->chapter); av_freep(&nut->time_base); return 0; }

static uint32_t arm_ldl_ptw(CPUState *cs, hwaddr addr, bool is_secure, ARMMMUIdx mmu_idx, ARMMMUFaultInfo *fi) { ARMCPU *cpu = ARM_CPU(cs); CPUARMState *env = &cpu->env; MemTxAttrs attrs = {}; AddressSpace *as; attrs.secure = is_secure; as = arm_addressspace(cs, attrs); addr = S1_ptw_translate(env, mmu_idx, addr, attrs, fi); if (fi->s1ptw) { return 0; } if (regime_translation_big_endian(env, mmu_idx)) { return address_space_ldl_be(as, addr, attrs, NULL); } else { return address_space_ldl_le(as, addr, attrs, NULL); } }

qemu

3b39d734141a71296d08af3d4c32f872fafd782e

static uint32_t arm_ldl_ptw(CPUState *cs, hwaddr addr, bool is_secure, ARMMMUIdx mmu_idx, ARMMMUFaultInfo *fi) { ARMCPU *cpu = ARM_CPU(cs); CPUARMState *env = &cpu->env; MemTxAttrs attrs = {}; AddressSpace *as; attrs.secure = is_secure; as = arm_addressspace(cs, attrs); addr = S1_ptw_translate(env, mmu_idx, addr, attrs, fi); if (fi->s1ptw) { return 0; } if (regime_translation_big_endian(env, mmu_idx)) { return address_space_ldl_be(as, addr, attrs, NULL); } else { return address_space_ldl_le(as, addr, attrs, NULL); } }

static uint32_t FUNC_0(CPUState *cs, hwaddr addr, bool is_secure, ARMMMUIdx mmu_idx, ARMMMUFaultInfo *fi) { ARMCPU *cpu = ARM_CPU(cs); CPUARMState *env = &cpu->env; MemTxAttrs attrs = {}; AddressSpace *as; attrs.secure = is_secure; as = arm_addressspace(cs, attrs); addr = S1_ptw_translate(env, mmu_idx, addr, attrs, fi); if (fi->s1ptw) { return 0; } if (regime_translation_big_endian(env, mmu_idx)) { return address_space_ldl_be(as, addr, attrs, NULL); } else { return address_space_ldl_le(as, addr, attrs, NULL); } }

void aio_context_acquire(AioContext *ctx) { qemu_rec_mutex_lock(&ctx->lock); }

qemu

c2b38b277a7882a592f4f2ec955084b2b756daaa

void aio_context_acquire(AioContext *ctx) { qemu_rec_mutex_lock(&ctx->lock); }

void FUNC_0(AioContext *VAR_0) { qemu_rec_mutex_lock(&VAR_0->lock); }

static void qjson_finalizefn(Object *obj) { QJSON *json = QJSON(obj); qobject_decref(QOBJECT(json->str)); }

qemu

17b74b98676aee5bc470b173b1e528d2fce2cf18

static void qjson_finalizefn(Object *obj) { QJSON *json = QJSON(obj); qobject_decref(QOBJECT(json->str)); }

static void FUNC_0(Object *VAR_0) { QJSON *json = QJSON(VAR_0); qobject_decref(QOBJECT(json->str)); }

static void cchip_write(void *opaque, hwaddr addr, uint64_t v32, unsigned size) { TyphoonState *s = opaque; uint64_t val, oldval, newval; if (addr & 4) { val = v32 << 32 | s->latch_tmp; addr ^= 4; } else { s->latch_tmp = v32; return; } switch (addr) { case 0x0000: /* CSC: Cchip System Configuration Register. */ /* All sorts of data here; nothing relevant RW. */ break; case 0x0040: /* MTR: Memory Timing Register. */ /* All sorts of stuff related to real DRAM. */ break; case 0x0080: /* MISC: Miscellaneous Register. */ newval = oldval = s->cchip.misc; newval &= ~(val & 0x10000ff0); /* W1C fields */ if (val & 0x100000) { newval &= ~0xff0000ull; /* ACL clears ABT and ABW */ } else { newval |= val & 0x00f00000; /* ABT field is W1S */ if ((newval & 0xf0000) == 0) { newval |= val & 0xf0000; /* ABW field is W1S iff zero */ } } newval |= (val & 0xf000) >> 4; /* IPREQ field sets IPINTR. */ newval &= ~0xf0000000000ull; /* WO and RW fields */ newval |= val & 0xf0000000000ull; s->cchip.misc = newval; /* Pass on changes to IPI and ITI state. */ if ((newval ^ oldval) & 0xff0) { int i; for (i = 0; i < 4; ++i) { AlphaCPU *cpu = s->cchip.cpu[i]; if (cpu != NULL) { CPUState *cs = CPU(cpu); /* IPI can be either cleared or set by the write. */ if (newval & (1 << (i + 8))) { cpu_interrupt(cs, CPU_INTERRUPT_SMP); } else { cpu_reset_interrupt(cs, CPU_INTERRUPT_SMP); } /* ITI can only be cleared by the write. */ if ((newval & (1 << (i + 4))) == 0) { cpu_reset_interrupt(cs, CPU_INTERRUPT_TIMER); } } } } break; case 0x00c0: /* MPD: Memory Presence Detect Register. */ break; case 0x0100: /* AAR0 */ case 0x0140: /* AAR1 */ case 0x0180: /* AAR2 */ case 0x01c0: /* AAR3 */ /* AAR: Array Address Register. */ /* All sorts of information about DRAM. */ break; case 0x0200: /* DIM0 */ /* DIM: Device Interrupt Mask Register, CPU0. */ s->cchip.dim[0] = val; cpu_irq_change(s->cchip.cpu[0], val & s->cchip.drir); break; case 0x0240: /* DIM1 */ /* DIM: Device Interrupt Mask Register, CPU1. */ s->cchip.dim[0] = val; cpu_irq_change(s->cchip.cpu[1], val & s->cchip.drir); break; case 0x0280: /* DIR0 (RO) */ case 0x02c0: /* DIR1 (RO) */ case 0x0300: /* DRIR (RO) */ break; case 0x0340: /* PRBEN: Probe Enable Register. */ break; case 0x0380: /* IIC0 */ s->cchip.iic[0] = val & 0xffffff; break; case 0x03c0: /* IIC1 */ s->cchip.iic[1] = val & 0xffffff; break; case 0x0400: /* MPR0 */ case 0x0440: /* MPR1 */ case 0x0480: /* MPR2 */ case 0x04c0: /* MPR3 */ /* MPR: Memory Programming Register. */ break; case 0x0580: /* TTR: TIGbus Timing Register. */ /* All sorts of stuff related to interrupt delivery timings. */ break; case 0x05c0: /* TDR: TIGbug Device Timing Register. */ break; case 0x0600: /* DIM2: Device Interrupt Mask Register, CPU2. */ s->cchip.dim[2] = val; cpu_irq_change(s->cchip.cpu[2], val & s->cchip.drir); break; case 0x0640: /* DIM3: Device Interrupt Mask Register, CPU3. */ s->cchip.dim[3] = val; cpu_irq_change(s->cchip.cpu[3], val & s->cchip.drir); break; case 0x0680: /* DIR2 (RO) */ case 0x06c0: /* DIR3 (RO) */ break; case 0x0700: /* IIC2 */ s->cchip.iic[2] = val & 0xffffff; break; case 0x0740: /* IIC3 */ s->cchip.iic[3] = val & 0xffffff; break; case 0x0780: /* PWR: Power Management Control. */ break; case 0x0c00: /* CMONCTLA */ case 0x0c40: /* CMONCTLB */ case 0x0c80: /* CMONCNT01 */ case 0x0cc0: /* CMONCNT23 */ break; default: cpu_unassigned_access(current_cpu, addr, true, false, 0, size); return; } }

qemu

678421650dc166cd6cb35bb2bc0baf1b481b40ca

static void cchip_write(void *opaque, hwaddr addr, uint64_t v32, unsigned size) { TyphoonState *s = opaque; uint64_t val, oldval, newval; if (addr & 4) { val = v32 << 32 | s->latch_tmp; addr ^= 4; } else { s->latch_tmp = v32; return; } switch (addr) { case 0x0000: break; case 0x0040: break; case 0x0080: newval = oldval = s->cchip.misc; newval &= ~(val & 0x10000ff0); if (val & 0x100000) { newval &= ~0xff0000ull; } else { newval |= val & 0x00f00000; if ((newval & 0xf0000) == 0) { newval |= val & 0xf0000; } } newval |= (val & 0xf000) >> 4; newval &= ~0xf0000000000ull; newval |= val & 0xf0000000000ull; s->cchip.misc = newval; if ((newval ^ oldval) & 0xff0) { int i; for (i = 0; i < 4; ++i) { AlphaCPU *cpu = s->cchip.cpu[i]; if (cpu != NULL) { CPUState *cs = CPU(cpu); if (newval & (1 << (i + 8))) { cpu_interrupt(cs, CPU_INTERRUPT_SMP); } else { cpu_reset_interrupt(cs, CPU_INTERRUPT_SMP); } if ((newval & (1 << (i + 4))) == 0) { cpu_reset_interrupt(cs, CPU_INTERRUPT_TIMER); } } } } break; case 0x00c0: break; case 0x0100: case 0x0140: case 0x0180: case 0x01c0: break; case 0x0200: s->cchip.dim[0] = val; cpu_irq_change(s->cchip.cpu[0], val & s->cchip.drir); break; case 0x0240: s->cchip.dim[0] = val; cpu_irq_change(s->cchip.cpu[1], val & s->cchip.drir); break; case 0x0280: case 0x02c0: case 0x0300: break; case 0x0340: break; case 0x0380: s->cchip.iic[0] = val & 0xffffff; break; case 0x03c0: s->cchip.iic[1] = val & 0xffffff; break; case 0x0400: case 0x0440: case 0x0480: case 0x04c0: break; case 0x0580: break; case 0x05c0: break; case 0x0600: s->cchip.dim[2] = val; cpu_irq_change(s->cchip.cpu[2], val & s->cchip.drir); break; case 0x0640: s->cchip.dim[3] = val; cpu_irq_change(s->cchip.cpu[3], val & s->cchip.drir); break; case 0x0680: case 0x06c0: break; case 0x0700: s->cchip.iic[2] = val & 0xffffff; break; case 0x0740: s->cchip.iic[3] = val & 0xffffff; break; case 0x0780: break; case 0x0c00: case 0x0c40: case 0x0c80: case 0x0cc0: break; default: cpu_unassigned_access(current_cpu, addr, true, false, 0, size); return; } }

static void FUNC_0(void *VAR_0, hwaddr VAR_1, uint64_t VAR_2, unsigned VAR_3) { TyphoonState *s = VAR_0; uint64_t val, oldval, newval; if (VAR_1 & 4) { val = VAR_2 << 32 | s->latch_tmp; VAR_1 ^= 4; } else { s->latch_tmp = VAR_2; return; } switch (VAR_1) { case 0x0000: break; case 0x0040: break; case 0x0080: newval = oldval = s->cchip.misc; newval &= ~(val & 0x10000ff0); if (val & 0x100000) { newval &= ~0xff0000ull; } else { newval |= val & 0x00f00000; if ((newval & 0xf0000) == 0) { newval |= val & 0xf0000; } } newval |= (val & 0xf000) >> 4; newval &= ~0xf0000000000ull; newval |= val & 0xf0000000000ull; s->cchip.misc = newval; if ((newval ^ oldval) & 0xff0) { int VAR_4; for (VAR_4 = 0; VAR_4 < 4; ++VAR_4) { AlphaCPU *cpu = s->cchip.cpu[VAR_4]; if (cpu != NULL) { CPUState *cs = CPU(cpu); if (newval & (1 << (VAR_4 + 8))) { cpu_interrupt(cs, CPU_INTERRUPT_SMP); } else { cpu_reset_interrupt(cs, CPU_INTERRUPT_SMP); } if ((newval & (1 << (VAR_4 + 4))) == 0) { cpu_reset_interrupt(cs, CPU_INTERRUPT_TIMER); } } } } break; case 0x00c0: break; case 0x0100: case 0x0140: case 0x0180: case 0x01c0: break; case 0x0200: s->cchip.dim[0] = val; cpu_irq_change(s->cchip.cpu[0], val & s->cchip.drir); break; case 0x0240: s->cchip.dim[0] = val; cpu_irq_change(s->cchip.cpu[1], val & s->cchip.drir); break; case 0x0280: case 0x02c0: case 0x0300: break; case 0x0340: break; case 0x0380: s->cchip.iic[0] = val & 0xffffff; break; case 0x03c0: s->cchip.iic[1] = val & 0xffffff; break; case 0x0400: case 0x0440: case 0x0480: case 0x04c0: break; case 0x0580: break; case 0x05c0: break; case 0x0600: s->cchip.dim[2] = val; cpu_irq_change(s->cchip.cpu[2], val & s->cchip.drir); break; case 0x0640: s->cchip.dim[3] = val; cpu_irq_change(s->cchip.cpu[3], val & s->cchip.drir); break; case 0x0680: case 0x06c0: break; case 0x0700: s->cchip.iic[2] = val & 0xffffff; break; case 0x0740: s->cchip.iic[3] = val & 0xffffff; break; case 0x0780: break; case 0x0c00: case 0x0c40: case 0x0c80: case 0x0cc0: break; default: cpu_unassigned_access(current_cpu, VAR_1, true, false, 0, VAR_3); return; } }

static void visitor_output_setup(TestOutputVisitorData *data, const void *unused) { data->qov = qmp_output_visitor_new(); g_assert(data->qov != NULL); data->ov = qmp_output_get_visitor(data->qov); g_assert(data->ov != NULL); }

qemu

3b098d56979d2f7fd707c5be85555d114353a28d

static void visitor_output_setup(TestOutputVisitorData *data, const void *unused) { data->qov = qmp_output_visitor_new(); g_assert(data->qov != NULL); data->ov = qmp_output_get_visitor(data->qov); g_assert(data->ov != NULL); }

static void FUNC_0(TestOutputVisitorData *VAR_0, const void *VAR_1) { VAR_0->qov = qmp_output_visitor_new(); g_assert(VAR_0->qov != NULL); VAR_0->ov = qmp_output_get_visitor(VAR_0->qov); g_assert(VAR_0->ov != NULL); }

static void group_exponents(AC3EncodeContext *s) { int blk, ch, i; int group_size, nb_groups, bit_count; uint8_t *p; int delta0, delta1, delta2; int exp0, exp1; bit_count = 0; for (blk = 0; blk < AC3_MAX_BLOCKS; blk++) { AC3Block *block = &s->blocks[blk]; for (ch = 0; ch < s->channels; ch++) { if (s->exp_strategy[ch][blk] == EXP_REUSE) continue; group_size = s->exp_strategy[ch][blk] + (s->exp_strategy[ch][blk] == EXP_D45); nb_groups = exponent_group_tab[s->exp_strategy[ch][blk]-1][s->nb_coefs[ch]]; bit_count += 4 + (nb_groups * 7); p = block->exp[ch]; /* DC exponent */ exp1 = *p++; block->grouped_exp[ch][0] = exp1; /* remaining exponents are delta encoded */ for (i = 1; i <= nb_groups; i++) { /* merge three delta in one code */ exp0 = exp1; exp1 = p[0]; p += group_size; delta0 = exp1 - exp0 + 2; exp0 = exp1; exp1 = p[0]; p += group_size; delta1 = exp1 - exp0 + 2; exp0 = exp1; exp1 = p[0]; p += group_size; delta2 = exp1 - exp0 + 2; block->grouped_exp[ch][i] = ((delta0 * 5 + delta1) * 5) + delta2; } } } s->exponent_bits = bit_count; }

FFmpeg

4b90c35d74880b07c50b3392a338f0f00d10302f

static void group_exponents(AC3EncodeContext *s) { int blk, ch, i; int group_size, nb_groups, bit_count; uint8_t *p; int delta0, delta1, delta2; int exp0, exp1; bit_count = 0; for (blk = 0; blk < AC3_MAX_BLOCKS; blk++) { AC3Block *block = &s->blocks[blk]; for (ch = 0; ch < s->channels; ch++) { if (s->exp_strategy[ch][blk] == EXP_REUSE) continue; group_size = s->exp_strategy[ch][blk] + (s->exp_strategy[ch][blk] == EXP_D45); nb_groups = exponent_group_tab[s->exp_strategy[ch][blk]-1][s->nb_coefs[ch]]; bit_count += 4 + (nb_groups * 7); p = block->exp[ch]; exp1 = *p++; block->grouped_exp[ch][0] = exp1; for (i = 1; i <= nb_groups; i++) { exp0 = exp1; exp1 = p[0]; p += group_size; delta0 = exp1 - exp0 + 2; exp0 = exp1; exp1 = p[0]; p += group_size; delta1 = exp1 - exp0 + 2; exp0 = exp1; exp1 = p[0]; p += group_size; delta2 = exp1 - exp0 + 2; block->grouped_exp[ch][i] = ((delta0 * 5 + delta1) * 5) + delta2; } } } s->exponent_bits = bit_count; }

static void FUNC_0(AC3EncodeContext *VAR_0) { int VAR_1, VAR_2, VAR_3; int VAR_4, VAR_5, VAR_6; uint8_t *p; int VAR_7, VAR_8, VAR_9; int VAR_10, VAR_11; VAR_6 = 0; for (VAR_1 = 0; VAR_1 < AC3_MAX_BLOCKS; VAR_1++) { AC3Block *block = &VAR_0->blocks[VAR_1]; for (VAR_2 = 0; VAR_2 < VAR_0->channels; VAR_2++) { if (VAR_0->exp_strategy[VAR_2][VAR_1] == EXP_REUSE) continue; VAR_4 = VAR_0->exp_strategy[VAR_2][VAR_1] + (VAR_0->exp_strategy[VAR_2][VAR_1] == EXP_D45); VAR_5 = exponent_group_tab[VAR_0->exp_strategy[VAR_2][VAR_1]-1][VAR_0->nb_coefs[VAR_2]]; VAR_6 += 4 + (VAR_5 * 7); p = block->exp[VAR_2]; VAR_11 = *p++; block->grouped_exp[VAR_2][0] = VAR_11; for (VAR_3 = 1; VAR_3 <= VAR_5; VAR_3++) { VAR_10 = VAR_11; VAR_11 = p[0]; p += VAR_4; VAR_7 = VAR_11 - VAR_10 + 2; VAR_10 = VAR_11; VAR_11 = p[0]; p += VAR_4; VAR_8 = VAR_11 - VAR_10 + 2; VAR_10 = VAR_11; VAR_11 = p[0]; p += VAR_4; VAR_9 = VAR_11 - VAR_10 + 2; block->grouped_exp[VAR_2][VAR_3] = ((VAR_7 * 5 + VAR_8) * 5) + VAR_9; } } } VAR_0->exponent_bits = VAR_6; }

void sd_write_data(SDState *sd, uint8_t value) { int i; if (!sd->bdrv || !bdrv_is_inserted(sd->bdrv) || !sd->enable) return; if (sd->state != sd_receivingdata_state) { fprintf(stderr, "sd_write_data: not in Receiving-Data state\n"); return; } if (sd->card_status & (ADDRESS_ERROR | WP_VIOLATION)) return; switch (sd->current_cmd) { case 24: /* CMD24: WRITE_SINGLE_BLOCK */ sd->data[sd->data_offset ++] = value; if (sd->data_offset >= sd->blk_len) { /* TODO: Check CRC before committing */ sd->state = sd_programming_state; BLK_WRITE_BLOCK(sd->data_start, sd->data_offset); sd->blk_written ++; sd->csd[14] |= 0x40; /* Bzzzzzzztt .... Operation complete. */ sd->state = sd_transfer_state; } break; case 25: /* CMD25: WRITE_MULTIPLE_BLOCK */ if (sd->data_offset == 0) { /* Start of the block - let's check the address is valid */ if (sd->data_start + sd->blk_len > sd->size) { sd->card_status |= ADDRESS_ERROR; break; } if (sd_wp_addr(sd, sd->data_start)) { sd->card_status |= WP_VIOLATION; break; } } sd->data[sd->data_offset++] = value; if (sd->data_offset >= sd->blk_len) { /* TODO: Check CRC before committing */ sd->state = sd_programming_state; BLK_WRITE_BLOCK(sd->data_start, sd->data_offset); sd->blk_written++; sd->data_start += sd->blk_len; sd->data_offset = 0; sd->csd[14] |= 0x40; /* Bzzzzzzztt .... Operation complete. */ sd->state = sd_receivingdata_state; } break; case 26: /* CMD26: PROGRAM_CID */ sd->data[sd->data_offset ++] = value; if (sd->data_offset >= sizeof(sd->cid)) { /* TODO: Check CRC before committing */ sd->state = sd_programming_state; for (i = 0; i < sizeof(sd->cid); i ++) if ((sd->cid[i] | 0x00) != sd->data[i]) sd->card_status |= CID_CSD_OVERWRITE; if (!(sd->card_status & CID_CSD_OVERWRITE)) for (i = 0; i < sizeof(sd->cid); i ++) { sd->cid[i] |= 0x00; sd->cid[i] &= sd->data[i]; } /* Bzzzzzzztt .... Operation complete. */ sd->state = sd_transfer_state; } break; case 27: /* CMD27: PROGRAM_CSD */ sd->data[sd->data_offset ++] = value; if (sd->data_offset >= sizeof(sd->csd)) { /* TODO: Check CRC before committing */ sd->state = sd_programming_state; for (i = 0; i < sizeof(sd->csd); i ++) if ((sd->csd[i] | sd_csd_rw_mask[i]) != (sd->data[i] | sd_csd_rw_mask[i])) sd->card_status |= CID_CSD_OVERWRITE; /* Copy flag (OTP) & Permanent write protect */ if (sd->csd[14] & ~sd->data[14] & 0x60) sd->card_status |= CID_CSD_OVERWRITE; if (!(sd->card_status & CID_CSD_OVERWRITE)) for (i = 0; i < sizeof(sd->csd); i ++) { sd->csd[i] |= sd_csd_rw_mask[i]; sd->csd[i] &= sd->data[i]; } /* Bzzzzzzztt .... Operation complete. */ sd->state = sd_transfer_state; } break; case 42: /* CMD42: LOCK_UNLOCK */ sd->data[sd->data_offset ++] = value; if (sd->data_offset >= sd->blk_len) { /* TODO: Check CRC before committing */ sd->state = sd_programming_state; sd_lock_command(sd); /* Bzzzzzzztt .... Operation complete. */ sd->state = sd_transfer_state; } break; case 56: /* CMD56: GEN_CMD */ sd->data[sd->data_offset ++] = value; if (sd->data_offset >= sd->blk_len) { APP_WRITE_BLOCK(sd->data_start, sd->data_offset); sd->state = sd_transfer_state; } break; default: fprintf(stderr, "sd_write_data: unknown command\n"); break; } }

qemu

4be746345f13e99e468c60acbd3a355e8183e3ce

void sd_write_data(SDState *sd, uint8_t value) { int i; if (!sd->bdrv || !bdrv_is_inserted(sd->bdrv) || !sd->enable) return; if (sd->state != sd_receivingdata_state) { fprintf(stderr, "sd_write_data: not in Receiving-Data state\n"); return; } if (sd->card_status & (ADDRESS_ERROR | WP_VIOLATION)) return; switch (sd->current_cmd) { case 24: sd->data[sd->data_offset ++] = value; if (sd->data_offset >= sd->blk_len) { sd->state = sd_programming_state; BLK_WRITE_BLOCK(sd->data_start, sd->data_offset); sd->blk_written ++; sd->csd[14] |= 0x40; sd->state = sd_transfer_state; } break; case 25: if (sd->data_offset == 0) { if (sd->data_start + sd->blk_len > sd->size) { sd->card_status |= ADDRESS_ERROR; break; } if (sd_wp_addr(sd, sd->data_start)) { sd->card_status |= WP_VIOLATION; break; } } sd->data[sd->data_offset++] = value; if (sd->data_offset >= sd->blk_len) { sd->state = sd_programming_state; BLK_WRITE_BLOCK(sd->data_start, sd->data_offset); sd->blk_written++; sd->data_start += sd->blk_len; sd->data_offset = 0; sd->csd[14] |= 0x40; sd->state = sd_receivingdata_state; } break; case 26: sd->data[sd->data_offset ++] = value; if (sd->data_offset >= sizeof(sd->cid)) { sd->state = sd_programming_state; for (i = 0; i < sizeof(sd->cid); i ++) if ((sd->cid[i] | 0x00) != sd->data[i]) sd->card_status |= CID_CSD_OVERWRITE; if (!(sd->card_status & CID_CSD_OVERWRITE)) for (i = 0; i < sizeof(sd->cid); i ++) { sd->cid[i] |= 0x00; sd->cid[i] &= sd->data[i]; } sd->state = sd_transfer_state; } break; case 27: sd->data[sd->data_offset ++] = value; if (sd->data_offset >= sizeof(sd->csd)) { sd->state = sd_programming_state; for (i = 0; i < sizeof(sd->csd); i ++) if ((sd->csd[i] | sd_csd_rw_mask[i]) != (sd->data[i] | sd_csd_rw_mask[i])) sd->card_status |= CID_CSD_OVERWRITE; if (sd->csd[14] & ~sd->data[14] & 0x60) sd->card_status |= CID_CSD_OVERWRITE; if (!(sd->card_status & CID_CSD_OVERWRITE)) for (i = 0; i < sizeof(sd->csd); i ++) { sd->csd[i] |= sd_csd_rw_mask[i]; sd->csd[i] &= sd->data[i]; } sd->state = sd_transfer_state; } break; case 42: sd->data[sd->data_offset ++] = value; if (sd->data_offset >= sd->blk_len) { sd->state = sd_programming_state; sd_lock_command(sd); sd->state = sd_transfer_state; } break; case 56: sd->data[sd->data_offset ++] = value; if (sd->data_offset >= sd->blk_len) { APP_WRITE_BLOCK(sd->data_start, sd->data_offset); sd->state = sd_transfer_state; } break; default: fprintf(stderr, "sd_write_data: unknown command\n"); break; } }

void FUNC_0(SDState *VAR_0, uint8_t VAR_1) { int VAR_2; if (!VAR_0->bdrv || !bdrv_is_inserted(VAR_0->bdrv) || !VAR_0->enable) return; if (VAR_0->state != sd_receivingdata_state) { fprintf(stderr, "FUNC_0: not in Receiving-Data state\n"); return; } if (VAR_0->card_status & (ADDRESS_ERROR | WP_VIOLATION)) return; switch (VAR_0->current_cmd) { case 24: VAR_0->data[VAR_0->data_offset ++] = VAR_1; if (VAR_0->data_offset >= VAR_0->blk_len) { VAR_0->state = sd_programming_state; BLK_WRITE_BLOCK(VAR_0->data_start, VAR_0->data_offset); VAR_0->blk_written ++; VAR_0->csd[14] |= 0x40; VAR_0->state = sd_transfer_state; } break; case 25: if (VAR_0->data_offset == 0) { if (VAR_0->data_start + VAR_0->blk_len > VAR_0->size) { VAR_0->card_status |= ADDRESS_ERROR; break; } if (sd_wp_addr(VAR_0, VAR_0->data_start)) { VAR_0->card_status |= WP_VIOLATION; break; } } VAR_0->data[VAR_0->data_offset++] = VAR_1; if (VAR_0->data_offset >= VAR_0->blk_len) { VAR_0->state = sd_programming_state; BLK_WRITE_BLOCK(VAR_0->data_start, VAR_0->data_offset); VAR_0->blk_written++; VAR_0->data_start += VAR_0->blk_len; VAR_0->data_offset = 0; VAR_0->csd[14] |= 0x40; VAR_0->state = sd_receivingdata_state; } break; case 26: VAR_0->data[VAR_0->data_offset ++] = VAR_1; if (VAR_0->data_offset >= sizeof(VAR_0->cid)) { VAR_0->state = sd_programming_state; for (VAR_2 = 0; VAR_2 < sizeof(VAR_0->cid); VAR_2 ++) if ((VAR_0->cid[VAR_2] | 0x00) != VAR_0->data[VAR_2]) VAR_0->card_status |= CID_CSD_OVERWRITE; if (!(VAR_0->card_status & CID_CSD_OVERWRITE)) for (VAR_2 = 0; VAR_2 < sizeof(VAR_0->cid); VAR_2 ++) { VAR_0->cid[VAR_2] |= 0x00; VAR_0->cid[VAR_2] &= VAR_0->data[VAR_2]; } VAR_0->state = sd_transfer_state; } break; case 27: VAR_0->data[VAR_0->data_offset ++] = VAR_1; if (VAR_0->data_offset >= sizeof(VAR_0->csd)) { VAR_0->state = sd_programming_state; for (VAR_2 = 0; VAR_2 < sizeof(VAR_0->csd); VAR_2 ++) if ((VAR_0->csd[VAR_2] | sd_csd_rw_mask[VAR_2]) != (VAR_0->data[VAR_2] | sd_csd_rw_mask[VAR_2])) VAR_0->card_status |= CID_CSD_OVERWRITE; if (VAR_0->csd[14] & ~VAR_0->data[14] & 0x60) VAR_0->card_status |= CID_CSD_OVERWRITE; if (!(VAR_0->card_status & CID_CSD_OVERWRITE)) for (VAR_2 = 0; VAR_2 < sizeof(VAR_0->csd); VAR_2 ++) { VAR_0->csd[VAR_2] |= sd_csd_rw_mask[VAR_2]; VAR_0->csd[VAR_2] &= VAR_0->data[VAR_2]; } VAR_0->state = sd_transfer_state; } break; case 42: VAR_0->data[VAR_0->data_offset ++] = VAR_1; if (VAR_0->data_offset >= VAR_0->blk_len) { VAR_0->state = sd_programming_state; sd_lock_command(VAR_0); VAR_0->state = sd_transfer_state; } break; case 56: VAR_0->data[VAR_0->data_offset ++] = VAR_1; if (VAR_0->data_offset >= VAR_0->blk_len) { APP_WRITE_BLOCK(VAR_0->data_start, VAR_0->data_offset); VAR_0->state = sd_transfer_state; } break; default: fprintf(stderr, "FUNC_0: unknown command\n"); break; } }

int event_notifier_get_fd(EventNotifier *e) { return e->fd; }

qemu

d0cc2fbfa607678866475383c508be84818ceb64

int event_notifier_get_fd(EventNotifier *e) { return e->fd; }

int FUNC_0(EventNotifier *VAR_0) { return VAR_0->fd; }

opts_type_size(Visitor *v, const char *name, uint64_t *obj, Error **errp) { OptsVisitor *ov = to_ov(v); const QemuOpt *opt; int64_t val; opt = lookup_scalar(ov, name, errp); if (!opt) { return; } val = qemu_strtosz(opt->str ? opt->str : "", NULL); if (val < 0) { error_setg(errp, QERR_INVALID_PARAMETER_VALUE, opt->name, "a size value representible as a non-negative int64"); return; } *obj = val; processed(ov, name); }

qemu

f17fd4fdf0df3d2f3444399d04c38d22b9a3e1b7

opts_type_size(Visitor *v, const char *name, uint64_t *obj, Error **errp) { OptsVisitor *ov = to_ov(v); const QemuOpt *opt; int64_t val; opt = lookup_scalar(ov, name, errp); if (!opt) { return; } val = qemu_strtosz(opt->str ? opt->str : "", NULL); if (val < 0) { error_setg(errp, QERR_INVALID_PARAMETER_VALUE, opt->name, "a size value representible as a non-negative int64"); return; } *obj = val; processed(ov, name); }

FUNC_0(Visitor *VAR_0, const char *VAR_1, uint64_t *VAR_2, Error **VAR_3) { OptsVisitor *ov = to_ov(VAR_0); const QemuOpt *VAR_4; int64_t val; VAR_4 = lookup_scalar(ov, VAR_1, VAR_3); if (!VAR_4) { return; } val = qemu_strtosz(VAR_4->str ? VAR_4->str : "", NULL); if (val < 0) { error_setg(VAR_3, QERR_INVALID_PARAMETER_VALUE, VAR_4->VAR_1, "a size value representible as a non-negative int64"); return; } *VAR_2 = val; processed(ov, VAR_1); }

static void handle_mousemotion(SDL_Event *ev) { int max_x, max_y; struct sdl2_console *scon = get_scon_from_window(ev->key.windowID); if (qemu_input_is_absolute() || absolute_enabled) { int scr_w, scr_h; SDL_GetWindowSize(scon->real_window, &scr_w, &scr_h); max_x = scr_w - 1; max_y = scr_h - 1; if (gui_grab && (ev->motion.x == 0 || ev->motion.y == 0 || ev->motion.x == max_x || ev->motion.y == max_y)) { sdl_grab_end(scon); } if (!gui_grab && (ev->motion.x > 0 && ev->motion.x < max_x && ev->motion.y > 0 && ev->motion.y < max_y)) { sdl_grab_start(scon); } } if (gui_grab || qemu_input_is_absolute() || absolute_enabled) { sdl_send_mouse_event(scon, ev->motion.xrel, ev->motion.yrel, ev->motion.x, ev->motion.y, ev->motion.state); } }

qemu

24952847ad50f1b120287fdc4469b78108eef33c

static void handle_mousemotion(SDL_Event *ev) { int max_x, max_y; struct sdl2_console *scon = get_scon_from_window(ev->key.windowID); if (qemu_input_is_absolute() || absolute_enabled) { int scr_w, scr_h; SDL_GetWindowSize(scon->real_window, &scr_w, &scr_h); max_x = scr_w - 1; max_y = scr_h - 1; if (gui_grab && (ev->motion.x == 0 || ev->motion.y == 0 || ev->motion.x == max_x || ev->motion.y == max_y)) { sdl_grab_end(scon); } if (!gui_grab && (ev->motion.x > 0 && ev->motion.x < max_x && ev->motion.y > 0 && ev->motion.y < max_y)) { sdl_grab_start(scon); } } if (gui_grab || qemu_input_is_absolute() || absolute_enabled) { sdl_send_mouse_event(scon, ev->motion.xrel, ev->motion.yrel, ev->motion.x, ev->motion.y, ev->motion.state); } }

static void FUNC_0(SDL_Event *VAR_0) { int VAR_1, VAR_2; struct sdl2_console *VAR_3 = get_scon_from_window(VAR_0->key.windowID); if (qemu_input_is_absolute() || absolute_enabled) { int VAR_4, VAR_5; SDL_GetWindowSize(VAR_3->real_window, &VAR_4, &VAR_5); VAR_1 = VAR_4 - 1; VAR_2 = VAR_5 - 1; if (gui_grab && (VAR_0->motion.x == 0 || VAR_0->motion.y == 0 || VAR_0->motion.x == VAR_1 || VAR_0->motion.y == VAR_2)) { sdl_grab_end(VAR_3); } if (!gui_grab && (VAR_0->motion.x > 0 && VAR_0->motion.x < VAR_1 && VAR_0->motion.y > 0 && VAR_0->motion.y < VAR_2)) { sdl_grab_start(VAR_3); } } if (gui_grab || qemu_input_is_absolute() || absolute_enabled) { sdl_send_mouse_event(VAR_3, VAR_0->motion.xrel, VAR_0->motion.yrel, VAR_0->motion.x, VAR_0->motion.y, VAR_0->motion.state); } }

static int qemu_rdma_registration_stop(QEMUFile *f, void *opaque, uint64_t flags) { Error *local_err = NULL, **errp = &local_err; QEMUFileRDMA *rfile = opaque; RDMAContext *rdma = rfile->rdma; RDMAControlHeader head = { .len = 0, .repeat = 1 }; int ret = 0; CHECK_ERROR_STATE(); qemu_fflush(f); ret = qemu_rdma_drain_cq(f, rdma); if (ret < 0) { goto err; } if (flags == RAM_CONTROL_SETUP) { RDMAControlHeader resp = {.type = RDMA_CONTROL_RAM_BLOCKS_RESULT }; RDMALocalBlocks *local = &rdma->local_ram_blocks; int reg_result_idx, i, j, nb_remote_blocks; head.type = RDMA_CONTROL_RAM_BLOCKS_REQUEST; DPRINTF("Sending registration setup for ram blocks...\n"); /* * Make sure that we parallelize the pinning on both sides. * For very large guests, doing this serially takes a really * long time, so we have to 'interleave' the pinning locally * with the control messages by performing the pinning on this * side before we receive the control response from the other * side that the pinning has completed. */ ret = qemu_rdma_exchange_send(rdma, &head, NULL, &resp, &reg_result_idx, rdma->pin_all ? qemu_rdma_reg_whole_ram_blocks : NULL); if (ret < 0) { ERROR(errp, "receiving remote info!"); return ret; } qemu_rdma_move_header(rdma, reg_result_idx, &resp); memcpy(rdma->block, rdma->wr_data[reg_result_idx].control_curr, resp.len); nb_remote_blocks = resp.len / sizeof(RDMARemoteBlock); /* * The protocol uses two different sets of rkeys (mutually exclusive): * 1. One key to represent the virtual address of the entire ram block. * (dynamic chunk registration disabled - pin everything with one rkey.) * 2. One to represent individual chunks within a ram block. * (dynamic chunk registration enabled - pin individual chunks.) * * Once the capability is successfully negotiated, the destination transmits * the keys to use (or sends them later) including the virtual addresses * and then propagates the remote ram block descriptions to his local copy. */ if (local->nb_blocks != nb_remote_blocks) { ERROR(errp, "ram blocks mismatch #1! " "Your QEMU command line parameters are probably " "not identical on both the source and destination."); return -EINVAL; } for (i = 0; i < nb_remote_blocks; i++) { network_to_remote_block(&rdma->block[i]); /* search local ram blocks */ for (j = 0; j < local->nb_blocks; j++) { if (rdma->block[i].offset != local->block[j].offset) { continue; } if (rdma->block[i].length != local->block[j].length) { ERROR(errp, "ram blocks mismatch #2! " "Your QEMU command line parameters are probably " "not identical on both the source and destination."); return -EINVAL; } local->block[j].remote_host_addr = rdma->block[i].remote_host_addr; local->block[j].remote_rkey = rdma->block[i].remote_rkey; break; } if (j >= local->nb_blocks) { ERROR(errp, "ram blocks mismatch #3! " "Your QEMU command line parameters are probably " "not identical on both the source and destination."); return -EINVAL; } } } DDDPRINTF("Sending registration finish %" PRIu64 "...\n", flags); head.type = RDMA_CONTROL_REGISTER_FINISHED; ret = qemu_rdma_exchange_send(rdma, &head, NULL, NULL, NULL, NULL); if (ret < 0) { goto err; } return 0; err: rdma->error_state = ret; return ret; }

qemu

885e8f984ea846e79a39ddc4f066f4dd3d04b264

static int qemu_rdma_registration_stop(QEMUFile *f, void *opaque, uint64_t flags) { Error *local_err = NULL, **errp = &local_err; QEMUFileRDMA *rfile = opaque; RDMAContext *rdma = rfile->rdma; RDMAControlHeader head = { .len = 0, .repeat = 1 }; int ret = 0; CHECK_ERROR_STATE(); qemu_fflush(f); ret = qemu_rdma_drain_cq(f, rdma); if (ret < 0) { goto err; } if (flags == RAM_CONTROL_SETUP) { RDMAControlHeader resp = {.type = RDMA_CONTROL_RAM_BLOCKS_RESULT }; RDMALocalBlocks *local = &rdma->local_ram_blocks; int reg_result_idx, i, j, nb_remote_blocks; head.type = RDMA_CONTROL_RAM_BLOCKS_REQUEST; DPRINTF("Sending registration setup for ram blocks...\n"); ret = qemu_rdma_exchange_send(rdma, &head, NULL, &resp, &reg_result_idx, rdma->pin_all ? qemu_rdma_reg_whole_ram_blocks : NULL); if (ret < 0) { ERROR(errp, "receiving remote info!"); return ret; } qemu_rdma_move_header(rdma, reg_result_idx, &resp); memcpy(rdma->block, rdma->wr_data[reg_result_idx].control_curr, resp.len); nb_remote_blocks = resp.len / sizeof(RDMARemoteBlock); if (local->nb_blocks != nb_remote_blocks) { ERROR(errp, "ram blocks mismatch #1! " "Your QEMU command line parameters are probably " "not identical on both the source and destination."); return -EINVAL; } for (i = 0; i < nb_remote_blocks; i++) { network_to_remote_block(&rdma->block[i]); for (j = 0; j < local->nb_blocks; j++) { if (rdma->block[i].offset != local->block[j].offset) { continue; } if (rdma->block[i].length != local->block[j].length) { ERROR(errp, "ram blocks mismatch #2! " "Your QEMU command line parameters are probably " "not identical on both the source and destination."); return -EINVAL; } local->block[j].remote_host_addr = rdma->block[i].remote_host_addr; local->block[j].remote_rkey = rdma->block[i].remote_rkey; break; } if (j >= local->nb_blocks) { ERROR(errp, "ram blocks mismatch #3! " "Your QEMU command line parameters are probably " "not identical on both the source and destination."); return -EINVAL; } } } DDDPRINTF("Sending registration finish %" PRIu64 "...\n", flags); head.type = RDMA_CONTROL_REGISTER_FINISHED; ret = qemu_rdma_exchange_send(rdma, &head, NULL, NULL, NULL, NULL); if (ret < 0) { goto err; } return 0; err: rdma->error_state = ret; return ret; }

static int FUNC_0(QEMUFile *VAR_0, void *VAR_1, uint64_t VAR_2) { Error *local_err = NULL, **errp = &local_err; QEMUFileRDMA *rfile = VAR_1; RDMAContext *rdma = rfile->rdma; RDMAControlHeader head = { .len = 0, .repeat = 1 }; int VAR_3 = 0; CHECK_ERROR_STATE(); qemu_fflush(VAR_0); VAR_3 = qemu_rdma_drain_cq(VAR_0, rdma); if (VAR_3 < 0) { goto err; } if (VAR_2 == RAM_CONTROL_SETUP) { RDMAControlHeader resp = {.type = RDMA_CONTROL_RAM_BLOCKS_RESULT }; RDMALocalBlocks *local = &rdma->local_ram_blocks; int VAR_4, VAR_5, VAR_6, VAR_7; head.type = RDMA_CONTROL_RAM_BLOCKS_REQUEST; DPRINTF("Sending registration setup for ram blocks...\n"); VAR_3 = qemu_rdma_exchange_send(rdma, &head, NULL, &resp, &VAR_4, rdma->pin_all ? qemu_rdma_reg_whole_ram_blocks : NULL); if (VAR_3 < 0) { ERROR(errp, "receiving remote info!"); return VAR_3; } qemu_rdma_move_header(rdma, VAR_4, &resp); memcpy(rdma->block, rdma->wr_data[VAR_4].control_curr, resp.len); VAR_7 = resp.len / sizeof(RDMARemoteBlock); if (local->nb_blocks != VAR_7) { ERROR(errp, "ram blocks mismatch #1! " "Your QEMU command line parameters are probably " "not identical on both the source and destination."); return -EINVAL; } for (VAR_5 = 0; VAR_5 < VAR_7; VAR_5++) { network_to_remote_block(&rdma->block[VAR_5]); for (VAR_6 = 0; VAR_6 < local->nb_blocks; VAR_6++) { if (rdma->block[VAR_5].offset != local->block[VAR_6].offset) { continue; } if (rdma->block[VAR_5].length != local->block[VAR_6].length) { ERROR(errp, "ram blocks mismatch #2! " "Your QEMU command line parameters are probably " "not identical on both the source and destination."); return -EINVAL; } local->block[VAR_6].remote_host_addr = rdma->block[VAR_5].remote_host_addr; local->block[VAR_6].remote_rkey = rdma->block[VAR_5].remote_rkey; break; } if (VAR_6 >= local->nb_blocks) { ERROR(errp, "ram blocks mismatch #3! " "Your QEMU command line parameters are probably " "not identical on both the source and destination."); return -EINVAL; } } } DDDPRINTF("Sending registration finish %" PRIu64 "...\n", VAR_2); head.type = RDMA_CONTROL_REGISTER_FINISHED; VAR_3 = qemu_rdma_exchange_send(rdma, &head, NULL, NULL, NULL, NULL); if (VAR_3 < 0) { goto err; } return 0; err: rdma->error_state = VAR_3; return VAR_3; }

static void xen_platform_ioport_writeb(void *opaque, uint32_t addr, uint32_t val) { PCIXenPlatformState *s = opaque; addr &= 0xff; val &= 0xff; switch (addr) { case 0: /* Platform flags */ platform_fixed_ioport_writeb(opaque, XEN_PLATFORM_IOPORT, val); break; case 8: log_writeb(s, val); break; default: break; } }

qemu

de00982e9e14e2d6ba3d148f02c5a1e94deaa985

static void xen_platform_ioport_writeb(void *opaque, uint32_t addr, uint32_t val) { PCIXenPlatformState *s = opaque; addr &= 0xff; val &= 0xff; switch (addr) { case 0: platform_fixed_ioport_writeb(opaque, XEN_PLATFORM_IOPORT, val); break; case 8: log_writeb(s, val); break; default: break; } }

static void FUNC_0(void *VAR_0, uint32_t VAR_1, uint32_t VAR_2) { PCIXenPlatformState *s = VAR_0; VAR_1 &= 0xff; VAR_2 &= 0xff; switch (VAR_1) { case 0: platform_fixed_ioport_writeb(VAR_0, XEN_PLATFORM_IOPORT, VAR_2); break; case 8: log_writeb(s, VAR_2); break; default: break; } }

static uint32_t nabm_readb (void *opaque, uint32_t addr) { PCIAC97LinkState *d = opaque; AC97LinkState *s = &d->ac97; AC97BusMasterRegs *r = NULL; uint32_t index = addr - s->base[1]; uint32_t val = ~0U; switch (index) { case CAS: dolog ("CAS %d\n", s->cas); val = s->cas; s->cas = 1; break; case PI_CIV: case PO_CIV: case MC_CIV: r = &s->bm_regs[GET_BM (index)]; val = r->civ; dolog ("CIV[%d] -> %#x\n", GET_BM (index), val); break; case PI_LVI: case PO_LVI: case MC_LVI: r = &s->bm_regs[GET_BM (index)]; val = r->lvi; dolog ("LVI[%d] -> %#x\n", GET_BM (index), val); break; case PI_PIV: case PO_PIV: case MC_PIV: r = &s->bm_regs[GET_BM (index)]; val = r->piv; dolog ("PIV[%d] -> %#x\n", GET_BM (index), val); break; case PI_CR: case PO_CR: case MC_CR: r = &s->bm_regs[GET_BM (index)]; val = r->cr; dolog ("CR[%d] -> %#x\n", GET_BM (index), val); break; case PI_SR: case PO_SR: case MC_SR: r = &s->bm_regs[GET_BM (index)]; val = r->sr & 0xff; dolog ("SRb[%d] -> %#x\n", GET_BM (index), val); break; default: dolog ("U nabm readb %#x -> %#x\n", addr, val); break; } return val; }

qemu

10ee2aaa417d8d8978cdb2bbed55ebb152df5f6b

static uint32_t nabm_readb (void *opaque, uint32_t addr) { PCIAC97LinkState *d = opaque; AC97LinkState *s = &d->ac97; AC97BusMasterRegs *r = NULL; uint32_t index = addr - s->base[1]; uint32_t val = ~0U; switch (index) { case CAS: dolog ("CAS %d\n", s->cas); val = s->cas; s->cas = 1; break; case PI_CIV: case PO_CIV: case MC_CIV: r = &s->bm_regs[GET_BM (index)]; val = r->civ; dolog ("CIV[%d] -> %#x\n", GET_BM (index), val); break; case PI_LVI: case PO_LVI: case MC_LVI: r = &s->bm_regs[GET_BM (index)]; val = r->lvi; dolog ("LVI[%d] -> %#x\n", GET_BM (index), val); break; case PI_PIV: case PO_PIV: case MC_PIV: r = &s->bm_regs[GET_BM (index)]; val = r->piv; dolog ("PIV[%d] -> %#x\n", GET_BM (index), val); break; case PI_CR: case PO_CR: case MC_CR: r = &s->bm_regs[GET_BM (index)]; val = r->cr; dolog ("CR[%d] -> %#x\n", GET_BM (index), val); break; case PI_SR: case PO_SR: case MC_SR: r = &s->bm_regs[GET_BM (index)]; val = r->sr & 0xff; dolog ("SRb[%d] -> %#x\n", GET_BM (index), val); break; default: dolog ("U nabm readb %#x -> %#x\n", addr, val); break; } return val; }

static uint32_t FUNC_0 (void *opaque, uint32_t addr) { PCIAC97LinkState *d = opaque; AC97LinkState *s = &d->ac97; AC97BusMasterRegs *r = NULL; uint32_t index = addr - s->base[1]; uint32_t val = ~0U; switch (index) { case CAS: dolog ("CAS %d\n", s->cas); val = s->cas; s->cas = 1; break; case PI_CIV: case PO_CIV: case MC_CIV: r = &s->bm_regs[GET_BM (index)]; val = r->civ; dolog ("CIV[%d] -> %#x\n", GET_BM (index), val); break; case PI_LVI: case PO_LVI: case MC_LVI: r = &s->bm_regs[GET_BM (index)]; val = r->lvi; dolog ("LVI[%d] -> %#x\n", GET_BM (index), val); break; case PI_PIV: case PO_PIV: case MC_PIV: r = &s->bm_regs[GET_BM (index)]; val = r->piv; dolog ("PIV[%d] -> %#x\n", GET_BM (index), val); break; case PI_CR: case PO_CR: case MC_CR: r = &s->bm_regs[GET_BM (index)]; val = r->cr; dolog ("CR[%d] -> %#x\n", GET_BM (index), val); break; case PI_SR: case PO_SR: case MC_SR: r = &s->bm_regs[GET_BM (index)]; val = r->sr & 0xff; dolog ("SRb[%d] -> %#x\n", GET_BM (index), val); break; default: dolog ("U nabm readb %#x -> %#x\n", addr, val); break; } return val; }

static int ac3_encode_frame(AVCodecContext *avctx, unsigned char *frame, int buf_size, void *data) { AC3EncodeContext *s = avctx->priv_data; const int16_t *samples = data; int16_t planar_samples[AC3_MAX_CHANNELS][AC3_BLOCK_SIZE+AC3_FRAME_SIZE]; int32_t mdct_coef[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS][AC3_MAX_COEFS]; uint8_t exp[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS][AC3_MAX_COEFS]; uint8_t exp_strategy[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS]; uint8_t encoded_exp[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS][AC3_MAX_COEFS]; uint8_t num_exp_groups[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS]; uint8_t grouped_exp[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS][AC3_MAX_EXP_GROUPS]; uint8_t bap[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS][AC3_MAX_COEFS]; int8_t exp_shift[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS]; uint16_t qmant[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS][AC3_MAX_COEFS]; int frame_bits; if (s->bit_alloc.sr_code == 1) adjust_frame_size(s); deinterleave_input_samples(s, samples, planar_samples); apply_mdct(s, planar_samples, exp_shift, mdct_coef); frame_bits = process_exponents(s, mdct_coef, exp_shift, exp, exp_strategy, encoded_exp, num_exp_groups, grouped_exp); compute_bit_allocation(s, bap, encoded_exp, exp_strategy, frame_bits); quantize_mantissas(s, mdct_coef, exp_shift, encoded_exp, bap, qmant); output_frame(s, frame, exp_strategy, num_exp_groups, grouped_exp, bap, qmant); return s->frame_size; }

FFmpeg

dc0bc0f84ec3ecc475182c5c2934ca8ef5a45de2

static int ac3_encode_frame(AVCodecContext *avctx, unsigned char *frame, int buf_size, void *data) { AC3EncodeContext *s = avctx->priv_data; const int16_t *samples = data; int16_t planar_samples[AC3_MAX_CHANNELS][AC3_BLOCK_SIZE+AC3_FRAME_SIZE]; int32_t mdct_coef[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS][AC3_MAX_COEFS]; uint8_t exp[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS][AC3_MAX_COEFS]; uint8_t exp_strategy[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS]; uint8_t encoded_exp[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS][AC3_MAX_COEFS]; uint8_t num_exp_groups[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS]; uint8_t grouped_exp[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS][AC3_MAX_EXP_GROUPS]; uint8_t bap[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS][AC3_MAX_COEFS]; int8_t exp_shift[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS]; uint16_t qmant[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS][AC3_MAX_COEFS]; int frame_bits; if (s->bit_alloc.sr_code == 1) adjust_frame_size(s); deinterleave_input_samples(s, samples, planar_samples); apply_mdct(s, planar_samples, exp_shift, mdct_coef); frame_bits = process_exponents(s, mdct_coef, exp_shift, exp, exp_strategy, encoded_exp, num_exp_groups, grouped_exp); compute_bit_allocation(s, bap, encoded_exp, exp_strategy, frame_bits); quantize_mantissas(s, mdct_coef, exp_shift, encoded_exp, bap, qmant); output_frame(s, frame, exp_strategy, num_exp_groups, grouped_exp, bap, qmant); return s->frame_size; }

static int FUNC_0(AVCodecContext *VAR_0, unsigned char *VAR_1, int VAR_2, void *VAR_3) { AC3EncodeContext *s = VAR_0->priv_data; const int16_t *VAR_4 = VAR_3; int16_t planar_samples[AC3_MAX_CHANNELS][AC3_BLOCK_SIZE+AC3_FRAME_SIZE]; int32_t mdct_coef[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS][AC3_MAX_COEFS]; uint8_t exp[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS][AC3_MAX_COEFS]; uint8_t exp_strategy[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS]; uint8_t encoded_exp[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS][AC3_MAX_COEFS]; uint8_t num_exp_groups[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS]; uint8_t grouped_exp[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS][AC3_MAX_EXP_GROUPS]; uint8_t bap[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS][AC3_MAX_COEFS]; int8_t exp_shift[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS]; uint16_t qmant[AC3_MAX_BLOCKS][AC3_MAX_CHANNELS][AC3_MAX_COEFS]; int VAR_5; if (s->bit_alloc.sr_code == 1) adjust_frame_size(s); deinterleave_input_samples(s, VAR_4, planar_samples); apply_mdct(s, planar_samples, exp_shift, mdct_coef); VAR_5 = process_exponents(s, mdct_coef, exp_shift, exp, exp_strategy, encoded_exp, num_exp_groups, grouped_exp); compute_bit_allocation(s, bap, encoded_exp, exp_strategy, VAR_5); quantize_mantissas(s, mdct_coef, exp_shift, encoded_exp, bap, qmant); output_frame(s, VAR_1, exp_strategy, num_exp_groups, grouped_exp, bap, qmant); return s->frame_size; }

void cpu_physical_memory_write_rom(target_phys_addr_t addr, const uint8_t *buf, int len) { AddressSpaceDispatch *d = address_space_memory.dispatch; int l; uint8_t *ptr; target_phys_addr_t page; MemoryRegionSection *section; while (len > 0) { page = addr & TARGET_PAGE_MASK; l = (page + TARGET_PAGE_SIZE) - addr; if (l > len) l = len; section = phys_page_find(d, page >> TARGET_PAGE_BITS); if (!(memory_region_is_ram(section->mr) || memory_region_is_romd(section->mr))) { /* do nothing */ } else { unsigned long addr1; addr1 = memory_region_get_ram_addr(section->mr) + memory_region_section_addr(section, addr); /* ROM/RAM case */ ptr = qemu_get_ram_ptr(addr1); memcpy(ptr, buf, l); invalidate_and_set_dirty(addr1, l); qemu_put_ram_ptr(ptr); } len -= l; buf += l; addr += l; } }

qemu

a8170e5e97ad17ca169c64ba87ae2f53850dab4c

void cpu_physical_memory_write_rom(target_phys_addr_t addr, const uint8_t *buf, int len) { AddressSpaceDispatch *d = address_space_memory.dispatch; int l; uint8_t *ptr; target_phys_addr_t page; MemoryRegionSection *section; while (len > 0) { page = addr & TARGET_PAGE_MASK; l = (page + TARGET_PAGE_SIZE) - addr; if (l > len) l = len; section = phys_page_find(d, page >> TARGET_PAGE_BITS); if (!(memory_region_is_ram(section->mr) || memory_region_is_romd(section->mr))) { } else { unsigned long addr1; addr1 = memory_region_get_ram_addr(section->mr) + memory_region_section_addr(section, addr); ptr = qemu_get_ram_ptr(addr1); memcpy(ptr, buf, l); invalidate_and_set_dirty(addr1, l); qemu_put_ram_ptr(ptr); } len -= l; buf += l; addr += l; } }

void FUNC_0(target_phys_addr_t VAR_0, const uint8_t *VAR_1, int VAR_2) { AddressSpaceDispatch *d = address_space_memory.dispatch; int VAR_3; uint8_t *ptr; target_phys_addr_t page; MemoryRegionSection *section; while (VAR_2 > 0) { page = VAR_0 & TARGET_PAGE_MASK; VAR_3 = (page + TARGET_PAGE_SIZE) - VAR_0; if (VAR_3 > VAR_2) VAR_3 = VAR_2; section = phys_page_find(d, page >> TARGET_PAGE_BITS); if (!(memory_region_is_ram(section->mr) || memory_region_is_romd(section->mr))) { } else { unsigned long VAR_4; VAR_4 = memory_region_get_ram_addr(section->mr) + memory_region_section_addr(section, VAR_0); ptr = qemu_get_ram_ptr(VAR_4); memcpy(ptr, VAR_1, VAR_3); invalidate_and_set_dirty(VAR_4, VAR_3); qemu_put_ram_ptr(ptr); } VAR_2 -= VAR_3; VAR_1 += VAR_3; VAR_0 += VAR_3; } }

av_cold int ff_lpc_init(LPCContext *s, int blocksize, int max_order, enum FFLPCType lpc_type) { s->blocksize = blocksize; s->max_order = max_order; s->lpc_type = lpc_type; if (lpc_type == FF_LPC_TYPE_LEVINSON) { s->windowed_samples = av_mallocz((blocksize + max_order + 2) * sizeof(*s->windowed_samples)); if (!s->windowed_samples) return AVERROR(ENOMEM); } else { s->windowed_samples = NULL; } s->lpc_apply_welch_window = lpc_apply_welch_window_c; s->lpc_compute_autocorr = lpc_compute_autocorr_c; if (HAVE_MMX) ff_lpc_init_x86(s); return 0; }

FFmpeg

4b0e0f31bf0f618a634dcfdca45e72cdfb0b48b5

av_cold int ff_lpc_init(LPCContext *s, int blocksize, int max_order, enum FFLPCType lpc_type) { s->blocksize = blocksize; s->max_order = max_order; s->lpc_type = lpc_type; if (lpc_type == FF_LPC_TYPE_LEVINSON) { s->windowed_samples = av_mallocz((blocksize + max_order + 2) * sizeof(*s->windowed_samples)); if (!s->windowed_samples) return AVERROR(ENOMEM); } else { s->windowed_samples = NULL; } s->lpc_apply_welch_window = lpc_apply_welch_window_c; s->lpc_compute_autocorr = lpc_compute_autocorr_c; if (HAVE_MMX) ff_lpc_init_x86(s); return 0; }

av_cold int FUNC_0(LPCContext *s, int blocksize, int max_order, enum FFLPCType lpc_type) { s->blocksize = blocksize; s->max_order = max_order; s->lpc_type = lpc_type; if (lpc_type == FF_LPC_TYPE_LEVINSON) { s->windowed_samples = av_mallocz((blocksize + max_order + 2) * sizeof(*s->windowed_samples)); if (!s->windowed_samples) return AVERROR(ENOMEM); } else { s->windowed_samples = NULL; } s->lpc_apply_welch_window = lpc_apply_welch_window_c; s->lpc_compute_autocorr = lpc_compute_autocorr_c; if (HAVE_MMX) ff_lpc_init_x86(s); return 0; }

static int audio_decode_frame(VideoState *is, double *pts_ptr) { AVPacket *pkt_temp = &is->audio_pkt_temp; AVPacket *pkt = &is->audio_pkt; AVCodecContext *dec = is->audio_st->codec; int len1, len2, data_size, resampled_data_size; int64_t dec_channel_layout; int got_frame; double pts; int new_packet = 0; int flush_complete = 0; int wanted_nb_samples; for (;;) { /* NOTE: the audio packet can contain several frames */ while (pkt_temp->size > 0 || (!pkt_temp->data && new_packet)) { if (!is->frame) { if (!(is->frame = avcodec_alloc_frame())) return AVERROR(ENOMEM); } else avcodec_get_frame_defaults(is->frame); if (is->paused) return -1; if (flush_complete) break; new_packet = 0; len1 = avcodec_decode_audio4(dec, is->frame, &got_frame, pkt_temp); if (len1 < 0) { /* if error, we skip the frame */ pkt_temp->size = 0; break; } pkt_temp->data += len1; pkt_temp->size -= len1; if (!got_frame) { /* stop sending empty packets if the decoder is finished */ if (!pkt_temp->data && dec->codec->capabilities & CODEC_CAP_DELAY) flush_complete = 1; continue; } data_size = av_samples_get_buffer_size(NULL, dec->channels, is->frame->nb_samples, dec->sample_fmt, 1); dec_channel_layout = (dec->channel_layout && dec->channels == av_get_channel_layout_nb_channels(dec->channel_layout)) ? dec->channel_layout : av_get_default_channel_layout(dec->channels); wanted_nb_samples = synchronize_audio(is, is->frame->nb_samples); if (dec->sample_fmt != is->audio_src.fmt || dec_channel_layout != is->audio_src.channel_layout || dec->sample_rate != is->audio_src.freq || (wanted_nb_samples != is->frame->nb_samples && !is->swr_ctx)) { if (is->swr_ctx) swr_free(&is->swr_ctx); is->swr_ctx = swr_alloc_set_opts(NULL, is->audio_tgt.channel_layout, is->audio_tgt.fmt, is->audio_tgt.freq, dec_channel_layout, dec->sample_fmt, dec->sample_rate, 0, NULL); if (!is->swr_ctx || swr_init(is->swr_ctx) < 0) { fprintf(stderr, "Cannot create sample rate converter for conversion of %d Hz %s %d channels to %d Hz %s %d channels!\n", dec->sample_rate, av_get_sample_fmt_name(dec->sample_fmt), dec->channels, is->audio_tgt.freq, av_get_sample_fmt_name(is->audio_tgt.fmt), is->audio_tgt.channels); break; } is->audio_src.channel_layout = dec_channel_layout; is->audio_src.channels = dec->channels; is->audio_src.freq = dec->sample_rate; is->audio_src.fmt = dec->sample_fmt; } resampled_data_size = data_size; if (is->swr_ctx) { const uint8_t *in[] = { is->frame->data[0] }; uint8_t *out[] = {is->audio_buf2}; if (wanted_nb_samples != is->frame->nb_samples) { if (swr_set_compensation(is->swr_ctx, (wanted_nb_samples - is->frame->nb_samples) * is->audio_tgt.freq / dec->sample_rate, wanted_nb_samples * is->audio_tgt.freq / dec->sample_rate) < 0) { fprintf(stderr, "swr_set_compensation() failed\n"); break; } } len2 = swr_convert(is->swr_ctx, out, sizeof(is->audio_buf2) / is->audio_tgt.channels / av_get_bytes_per_sample(is->audio_tgt.fmt), in, is->frame->nb_samples); if (len2 < 0) { fprintf(stderr, "swr_convert() failed\n"); break; } if (len2 == sizeof(is->audio_buf2) / is->audio_tgt.channels / av_get_bytes_per_sample(is->audio_tgt.fmt)) { fprintf(stderr, "warning: audio buffer is probably too small\n"); swr_init(is->swr_ctx); } is->audio_buf = is->audio_buf2; resampled_data_size = len2 * is->audio_tgt.channels * av_get_bytes_per_sample(is->audio_tgt.fmt); } else { is->audio_buf = is->frame->data[0]; } /* if no pts, then compute it */ pts = is->audio_clock; *pts_ptr = pts; is->audio_clock += (double)data_size / (dec->channels * dec->sample_rate * av_get_bytes_per_sample(dec->sample_fmt)); #ifdef DEBUG { static double last_clock; printf("audio: delay=%0.3f clock=%0.3f pts=%0.3f\n", is->audio_clock - last_clock, is->audio_clock, pts); last_clock = is->audio_clock; } #endif return resampled_data_size; } /* free the current packet */ if (pkt->data) av_free_packet(pkt); memset(pkt_temp, 0, sizeof(*pkt_temp)); if (is->paused || is->audioq.abort_request) { return -1; } /* read next packet */ if ((new_packet = packet_queue_get(&is->audioq, pkt, 1)) < 0) return -1; if (pkt->data == flush_pkt.data) { avcodec_flush_buffers(dec); flush_complete = 0; } *pkt_temp = *pkt; /* if update the audio clock with the pts */ if (pkt->pts != AV_NOPTS_VALUE) { is->audio_clock = av_q2d(is->audio_st->time_base)*pkt->pts; } } }

FFmpeg

4fd07b9366fb2f74b6af0dea8092d6bafa38f131

static int audio_decode_frame(VideoState *is, double *pts_ptr) { AVPacket *pkt_temp = &is->audio_pkt_temp; AVPacket *pkt = &is->audio_pkt; AVCodecContext *dec = is->audio_st->codec; int len1, len2, data_size, resampled_data_size; int64_t dec_channel_layout; int got_frame; double pts; int new_packet = 0; int flush_complete = 0; int wanted_nb_samples; for (;;) { while (pkt_temp->size > 0 || (!pkt_temp->data && new_packet)) { if (!is->frame) { if (!(is->frame = avcodec_alloc_frame())) return AVERROR(ENOMEM); } else avcodec_get_frame_defaults(is->frame); if (is->paused) return -1; if (flush_complete) break; new_packet = 0; len1 = avcodec_decode_audio4(dec, is->frame, &got_frame, pkt_temp); if (len1 < 0) { pkt_temp->size = 0; break; } pkt_temp->data += len1; pkt_temp->size -= len1; if (!got_frame) { if (!pkt_temp->data && dec->codec->capabilities & CODEC_CAP_DELAY) flush_complete = 1; continue; } data_size = av_samples_get_buffer_size(NULL, dec->channels, is->frame->nb_samples, dec->sample_fmt, 1); dec_channel_layout = (dec->channel_layout && dec->channels == av_get_channel_layout_nb_channels(dec->channel_layout)) ? dec->channel_layout : av_get_default_channel_layout(dec->channels); wanted_nb_samples = synchronize_audio(is, is->frame->nb_samples); if (dec->sample_fmt != is->audio_src.fmt || dec_channel_layout != is->audio_src.channel_layout || dec->sample_rate != is->audio_src.freq || (wanted_nb_samples != is->frame->nb_samples && !is->swr_ctx)) { if (is->swr_ctx) swr_free(&is->swr_ctx); is->swr_ctx = swr_alloc_set_opts(NULL, is->audio_tgt.channel_layout, is->audio_tgt.fmt, is->audio_tgt.freq, dec_channel_layout, dec->sample_fmt, dec->sample_rate, 0, NULL); if (!is->swr_ctx || swr_init(is->swr_ctx) < 0) { fprintf(stderr, "Cannot create sample rate converter for conversion of %d Hz %s %d channels to %d Hz %s %d channels!\n", dec->sample_rate, av_get_sample_fmt_name(dec->sample_fmt), dec->channels, is->audio_tgt.freq, av_get_sample_fmt_name(is->audio_tgt.fmt), is->audio_tgt.channels); break; } is->audio_src.channel_layout = dec_channel_layout; is->audio_src.channels = dec->channels; is->audio_src.freq = dec->sample_rate; is->audio_src.fmt = dec->sample_fmt; } resampled_data_size = data_size; if (is->swr_ctx) { const uint8_t *in[] = { is->frame->data[0] }; uint8_t *out[] = {is->audio_buf2}; if (wanted_nb_samples != is->frame->nb_samples) { if (swr_set_compensation(is->swr_ctx, (wanted_nb_samples - is->frame->nb_samples) * is->audio_tgt.freq / dec->sample_rate, wanted_nb_samples * is->audio_tgt.freq / dec->sample_rate) < 0) { fprintf(stderr, "swr_set_compensation() failed\n"); break; } } len2 = swr_convert(is->swr_ctx, out, sizeof(is->audio_buf2) / is->audio_tgt.channels / av_get_bytes_per_sample(is->audio_tgt.fmt), in, is->frame->nb_samples); if (len2 < 0) { fprintf(stderr, "swr_convert() failed\n"); break; } if (len2 == sizeof(is->audio_buf2) / is->audio_tgt.channels / av_get_bytes_per_sample(is->audio_tgt.fmt)) { fprintf(stderr, "warning: audio buffer is probably too small\n"); swr_init(is->swr_ctx); } is->audio_buf = is->audio_buf2; resampled_data_size = len2 * is->audio_tgt.channels * av_get_bytes_per_sample(is->audio_tgt.fmt); } else { is->audio_buf = is->frame->data[0]; } pts = is->audio_clock; *pts_ptr = pts; is->audio_clock += (double)data_size / (dec->channels * dec->sample_rate * av_get_bytes_per_sample(dec->sample_fmt)); #ifdef DEBUG { static double last_clock; printf("audio: delay=%0.3f clock=%0.3f pts=%0.3f\n", is->audio_clock - last_clock, is->audio_clock, pts); last_clock = is->audio_clock; } #endif return resampled_data_size; } if (pkt->data) av_free_packet(pkt); memset(pkt_temp, 0, sizeof(*pkt_temp)); if (is->paused || is->audioq.abort_request) { return -1; } if ((new_packet = packet_queue_get(&is->audioq, pkt, 1)) < 0) return -1; if (pkt->data == flush_pkt.data) { avcodec_flush_buffers(dec); flush_complete = 0; } *pkt_temp = *pkt; if (pkt->pts != AV_NOPTS_VALUE) { is->audio_clock = av_q2d(is->audio_st->time_base)*pkt->pts; } } }

static int FUNC_0(VideoState *VAR_0, double *VAR_1) { AVPacket *pkt_temp = &VAR_0->audio_pkt_temp; AVPacket *pkt = &VAR_0->audio_pkt; AVCodecContext *dec = VAR_0->audio_st->codec; int VAR_2, VAR_3, VAR_4, VAR_5; int64_t dec_channel_layout; int VAR_6; double VAR_7; int VAR_8 = 0; int VAR_9 = 0; int VAR_10; for (;;) { while (pkt_temp->size > 0 || (!pkt_temp->data && VAR_8)) { if (!VAR_0->frame) { if (!(VAR_0->frame = avcodec_alloc_frame())) return AVERROR(ENOMEM); } else avcodec_get_frame_defaults(VAR_0->frame); if (VAR_0->paused) return -1; if (VAR_9) break; VAR_8 = 0; VAR_2 = avcodec_decode_audio4(dec, VAR_0->frame, &VAR_6, pkt_temp); if (VAR_2 < 0) { pkt_temp->size = 0; break; } pkt_temp->data += VAR_2; pkt_temp->size -= VAR_2; if (!VAR_6) { if (!pkt_temp->data && dec->codec->capabilities & CODEC_CAP_DELAY) VAR_9 = 1; continue; } VAR_4 = av_samples_get_buffer_size(NULL, dec->channels, VAR_0->frame->nb_samples, dec->sample_fmt, 1); dec_channel_layout = (dec->channel_layout && dec->channels == av_get_channel_layout_nb_channels(dec->channel_layout)) ? dec->channel_layout : av_get_default_channel_layout(dec->channels); VAR_10 = synchronize_audio(VAR_0, VAR_0->frame->nb_samples); if (dec->sample_fmt != VAR_0->audio_src.fmt || dec_channel_layout != VAR_0->audio_src.channel_layout || dec->sample_rate != VAR_0->audio_src.freq || (VAR_10 != VAR_0->frame->nb_samples && !VAR_0->swr_ctx)) { if (VAR_0->swr_ctx) swr_free(&VAR_0->swr_ctx); VAR_0->swr_ctx = swr_alloc_set_opts(NULL, VAR_0->audio_tgt.channel_layout, VAR_0->audio_tgt.fmt, VAR_0->audio_tgt.freq, dec_channel_layout, dec->sample_fmt, dec->sample_rate, 0, NULL); if (!VAR_0->swr_ctx || swr_init(VAR_0->swr_ctx) < 0) { fprintf(stderr, "Cannot create sample rate converter for conversion of %d Hz %s %d channels to %d Hz %s %d channels!\n", dec->sample_rate, av_get_sample_fmt_name(dec->sample_fmt), dec->channels, VAR_0->audio_tgt.freq, av_get_sample_fmt_name(VAR_0->audio_tgt.fmt), VAR_0->audio_tgt.channels); break; } VAR_0->audio_src.channel_layout = dec_channel_layout; VAR_0->audio_src.channels = dec->channels; VAR_0->audio_src.freq = dec->sample_rate; VAR_0->audio_src.fmt = dec->sample_fmt; } VAR_5 = VAR_4; if (VAR_0->swr_ctx) { const uint8_t *VAR_11[] = { VAR_0->frame->data[0] }; uint8_t *out[] = {VAR_0->audio_buf2}; if (VAR_10 != VAR_0->frame->nb_samples) { if (swr_set_compensation(VAR_0->swr_ctx, (VAR_10 - VAR_0->frame->nb_samples) * VAR_0->audio_tgt.freq / dec->sample_rate, VAR_10 * VAR_0->audio_tgt.freq / dec->sample_rate) < 0) { fprintf(stderr, "swr_set_compensation() failed\n"); break; } } VAR_3 = swr_convert(VAR_0->swr_ctx, out, sizeof(VAR_0->audio_buf2) / VAR_0->audio_tgt.channels / av_get_bytes_per_sample(VAR_0->audio_tgt.fmt), VAR_11, VAR_0->frame->nb_samples); if (VAR_3 < 0) { fprintf(stderr, "swr_convert() failed\n"); break; } if (VAR_3 == sizeof(VAR_0->audio_buf2) / VAR_0->audio_tgt.channels / av_get_bytes_per_sample(VAR_0->audio_tgt.fmt)) { fprintf(stderr, "warning: audio buffer VAR_0 probably too small\n"); swr_init(VAR_0->swr_ctx); } VAR_0->audio_buf = VAR_0->audio_buf2; VAR_5 = VAR_3 * VAR_0->audio_tgt.channels * av_get_bytes_per_sample(VAR_0->audio_tgt.fmt); } else { VAR_0->audio_buf = VAR_0->frame->data[0]; } VAR_7 = VAR_0->audio_clock; *VAR_1 = VAR_7; VAR_0->audio_clock += (double)VAR_4 / (dec->channels * dec->sample_rate * av_get_bytes_per_sample(dec->sample_fmt)); #ifdef DEBUG { static double last_clock; printf("audio: delay=%0.3f clock=%0.3f VAR_7=%0.3f\n", VAR_0->audio_clock - last_clock, VAR_0->audio_clock, VAR_7); last_clock = VAR_0->audio_clock; } #endif return VAR_5; } if (pkt->data) av_free_packet(pkt); memset(pkt_temp, 0, sizeof(*pkt_temp)); if (VAR_0->paused || VAR_0->audioq.abort_request) { return -1; } if ((VAR_8 = packet_queue_get(&VAR_0->audioq, pkt, 1)) < 0) return -1; if (pkt->data == flush_pkt.data) { avcodec_flush_buffers(dec); VAR_9 = 0; } *pkt_temp = *pkt; if (pkt->VAR_7 != AV_NOPTS_VALUE) { VAR_0->audio_clock = av_q2d(VAR_0->audio_st->time_base)*pkt->VAR_7; } } }

void YM3812UpdateOne(FM_OPL *OPL, INT16 *buffer, int length) { int i; int data; OPLSAMPLE *buf = buffer; UINT32 amsCnt = OPL->amsCnt; UINT32 vibCnt = OPL->vibCnt; UINT8 rythm = OPL->rythm&0x20; OPL_CH *CH,*R_CH; if( (void *)OPL != cur_chip ){ cur_chip = (void *)OPL; /* channel pointers */ S_CH = OPL->P_CH; E_CH = &S_CH[9]; /* rythm slot */ SLOT7_1 = &S_CH[7].SLOT[SLOT1]; SLOT7_2 = &S_CH[7].SLOT[SLOT2]; SLOT8_1 = &S_CH[8].SLOT[SLOT1]; SLOT8_2 = &S_CH[8].SLOT[SLOT2]; /* LFO state */ amsIncr = OPL->amsIncr; vibIncr = OPL->vibIncr; ams_table = OPL->ams_table; vib_table = OPL->vib_table; } R_CH = rythm ? &S_CH[6] : E_CH; for( i=0; i < length ; i++ ) { /* channel A channel B channel C */ /* LFO */ ams = ams_table[(amsCnt+=amsIncr)>>AMS_SHIFT]; vib = vib_table[(vibCnt+=vibIncr)>>VIB_SHIFT]; outd[0] = 0; /* FM part */ for(CH=S_CH ; CH < R_CH ; CH++) OPL_CALC_CH(CH); /* Rythn part */ if(rythm) OPL_CALC_RH(S_CH); /* limit check */ data = Limit( outd[0] , OPL_MAXOUT, OPL_MINOUT ); /* store to sound buffer */ buf[i] = data >> OPL_OUTSB; } OPL->amsCnt = amsCnt; OPL->vibCnt = vibCnt; #ifdef OPL_OUTPUT_LOG if(opl_dbg_fp) { for(opl_dbg_chip=0;opl_dbg_chip<opl_dbg_maxchip;opl_dbg_chip++) if( opl_dbg_opl[opl_dbg_chip] == OPL) break; fprintf(opl_dbg_fp,"%c%c%c",0x20+opl_dbg_chip,length&0xff,length/256); } #endif }

qemu

c11e80e299e57c64934c164b231fa0d4279db445

void YM3812UpdateOne(FM_OPL *OPL, INT16 *buffer, int length) { int i; int data; OPLSAMPLE *buf = buffer; UINT32 amsCnt = OPL->amsCnt; UINT32 vibCnt = OPL->vibCnt; UINT8 rythm = OPL->rythm&0x20; OPL_CH *CH,*R_CH; if( (void *)OPL != cur_chip ){ cur_chip = (void *)OPL; S_CH = OPL->P_CH; E_CH = &S_CH[9]; SLOT7_1 = &S_CH[7].SLOT[SLOT1]; SLOT7_2 = &S_CH[7].SLOT[SLOT2]; SLOT8_1 = &S_CH[8].SLOT[SLOT1]; SLOT8_2 = &S_CH[8].SLOT[SLOT2]; amsIncr = OPL->amsIncr; vibIncr = OPL->vibIncr; ams_table = OPL->ams_table; vib_table = OPL->vib_table; } R_CH = rythm ? &S_CH[6] : E_CH; for( i=0; i < length ; i++ ) { ams = ams_table[(amsCnt+=amsIncr)>>AMS_SHIFT]; vib = vib_table[(vibCnt+=vibIncr)>>VIB_SHIFT]; outd[0] = 0; for(CH=S_CH ; CH < R_CH ; CH++) OPL_CALC_CH(CH); if(rythm) OPL_CALC_RH(S_CH); data = Limit( outd[0] , OPL_MAXOUT, OPL_MINOUT ); buf[i] = data >> OPL_OUTSB; } OPL->amsCnt = amsCnt; OPL->vibCnt = vibCnt; #ifdef OPL_OUTPUT_LOG if(opl_dbg_fp) { for(opl_dbg_chip=0;opl_dbg_chip<opl_dbg_maxchip;opl_dbg_chip++) if( opl_dbg_opl[opl_dbg_chip] == OPL) break; fprintf(opl_dbg_fp,"%c%c%c",0x20+opl_dbg_chip,length&0xff,length/256); } #endif }

void FUNC_0(FM_OPL *VAR_0, INT16 *VAR_1, int VAR_2) { int VAR_3; int VAR_4; OPLSAMPLE *buf = VAR_1; UINT32 amsCnt = VAR_0->amsCnt; UINT32 vibCnt = VAR_0->vibCnt; UINT8 rythm = VAR_0->rythm&0x20; OPL_CH *CH,*R_CH; if( (void *)VAR_0 != cur_chip ){ cur_chip = (void *)VAR_0; S_CH = VAR_0->P_CH; E_CH = &S_CH[9]; SLOT7_1 = &S_CH[7].SLOT[SLOT1]; SLOT7_2 = &S_CH[7].SLOT[SLOT2]; SLOT8_1 = &S_CH[8].SLOT[SLOT1]; SLOT8_2 = &S_CH[8].SLOT[SLOT2]; amsIncr = VAR_0->amsIncr; vibIncr = VAR_0->vibIncr; ams_table = VAR_0->ams_table; vib_table = VAR_0->vib_table; } R_CH = rythm ? &S_CH[6] : E_CH; for( VAR_3=0; VAR_3 < VAR_2 ; VAR_3++ ) { ams = ams_table[(amsCnt+=amsIncr)>>AMS_SHIFT]; vib = vib_table[(vibCnt+=vibIncr)>>VIB_SHIFT]; outd[0] = 0; for(CH=S_CH ; CH < R_CH ; CH++) OPL_CALC_CH(CH); if(rythm) OPL_CALC_RH(S_CH); VAR_4 = Limit( outd[0] , OPL_MAXOUT, OPL_MINOUT ); buf[VAR_3] = VAR_4 >> OPL_OUTSB; } VAR_0->amsCnt = amsCnt; VAR_0->vibCnt = vibCnt; #ifdef OPL_OUTPUT_LOG if(opl_dbg_fp) { for(opl_dbg_chip=0;opl_dbg_chip<opl_dbg_maxchip;opl_dbg_chip++) if( opl_dbg_opl[opl_dbg_chip] == VAR_0) break; fprintf(opl_dbg_fp,"%c%c%c",0x20+opl_dbg_chip,VAR_2&0xff,VAR_2/256); } #endif }

static void omap_tipb_bridge_write(void *opaque, target_phys_addr_t addr, uint64_t value, unsigned size) { struct omap_tipb_bridge_s *s = (struct omap_tipb_bridge_s *) opaque; if (size < 2) { return omap_badwidth_write16(opaque, addr, value); } switch (addr) { case 0x00: /* TIPB_CNTL */ s->control = value & 0xffff; break; case 0x04: /* TIPB_BUS_ALLOC */ s->alloc = value & 0x003f; break; case 0x08: /* MPU_TIPB_CNTL */ s->buffer = value & 0x0003; break; case 0x0c: /* ENHANCED_TIPB_CNTL */ s->width_intr = !(value & 2); s->enh_control = value & 0x000f; break; case 0x10: /* ADDRESS_DBG */ case 0x14: /* DATA_DEBUG_LOW */ case 0x18: /* DATA_DEBUG_HIGH */ case 0x1c: /* DEBUG_CNTR_SIG */ OMAP_RO_REG(addr); break; default: OMAP_BAD_REG(addr); } }

qemu

a8170e5e97ad17ca169c64ba87ae2f53850dab4c

static void omap_tipb_bridge_write(void *opaque, target_phys_addr_t addr, uint64_t value, unsigned size) { struct omap_tipb_bridge_s *s = (struct omap_tipb_bridge_s *) opaque; if (size < 2) { return omap_badwidth_write16(opaque, addr, value); } switch (addr) { case 0x00: s->control = value & 0xffff; break; case 0x04: s->alloc = value & 0x003f; break; case 0x08: s->buffer = value & 0x0003; break; case 0x0c: s->width_intr = !(value & 2); s->enh_control = value & 0x000f; break; case 0x10: case 0x14: case 0x18: case 0x1c: OMAP_RO_REG(addr); break; default: OMAP_BAD_REG(addr); } }

static void FUNC_0(void *VAR_0, target_phys_addr_t VAR_1, uint64_t VAR_2, unsigned VAR_3) { struct omap_tipb_bridge_s *VAR_4 = (struct omap_tipb_bridge_s *) VAR_0; if (VAR_3 < 2) { return omap_badwidth_write16(VAR_0, VAR_1, VAR_2); } switch (VAR_1) { case 0x00: VAR_4->control = VAR_2 & 0xffff; break; case 0x04: VAR_4->alloc = VAR_2 & 0x003f; break; case 0x08: VAR_4->buffer = VAR_2 & 0x0003; break; case 0x0c: VAR_4->width_intr = !(VAR_2 & 2); VAR_4->enh_control = VAR_2 & 0x000f; break; case 0x10: case 0x14: case 0x18: case 0x1c: OMAP_RO_REG(VAR_1); break; default: OMAP_BAD_REG(VAR_1); } }

PCIDevice *pci_register_device(PCIBus *bus, const char *name, int instance_size, int devfn, PCIConfigReadFunc *config_read, PCIConfigWriteFunc *config_write) { PCIDevice *pci_dev; pci_dev = qemu_mallocz(instance_size); pci_dev = do_pci_register_device(pci_dev, bus, name, devfn, config_read, config_write); return pci_dev; }

qemu

fb23162885f7fd8cf7334bed22c25ac32c7d8b9d

PCIDevice *pci_register_device(PCIBus *bus, const char *name, int instance_size, int devfn, PCIConfigReadFunc *config_read, PCIConfigWriteFunc *config_write) { PCIDevice *pci_dev; pci_dev = qemu_mallocz(instance_size); pci_dev = do_pci_register_device(pci_dev, bus, name, devfn, config_read, config_write); return pci_dev; }

PCIDevice *FUNC_0(PCIBus *bus, const char *name, int instance_size, int devfn, PCIConfigReadFunc *config_read, PCIConfigWriteFunc *config_write) { PCIDevice *pci_dev; pci_dev = qemu_mallocz(instance_size); pci_dev = do_pci_register_device(pci_dev, bus, name, devfn, config_read, config_write); return pci_dev; }

int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; bits64 aSig; int64 z; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); aSign = extractFloat64Sign( a ); if ( aExp ) aSig |= LIT64( 0x0010000000000000 ); shiftCount = aExp - 0x433; if ( 0 <= shiftCount ) { if ( 0x43E <= aExp ) { if ( a != LIT64( 0xC3E0000000000000 ) ) { float_raise( float_flag_invalid STATUS_VAR); if ( ! aSign || ( ( aExp == 0x7FF ) && ( aSig != LIT64( 0x0010000000000000 ) ) ) ) { return LIT64( 0x7FFFFFFFFFFFFFFF ); } } return (sbits64) LIT64( 0x8000000000000000 ); } z = aSig<<shiftCount; } else { if ( aExp < 0x3FE ) { if ( aExp | aSig ) STATUS(float_exception_flags) |= float_flag_inexact; return 0; } z = aSig>>( - shiftCount ); if ( (bits64) ( aSig<<( shiftCount & 63 ) ) ) { STATUS(float_exception_flags) |= float_flag_inexact; } } if ( aSign ) z = - z; return z; }

qemu

f090c9d4ad5812fb92843d6470a1111c15190c4c

int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; bits64 aSig; int64 z; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); aSign = extractFloat64Sign( a ); if ( aExp ) aSig |= LIT64( 0x0010000000000000 ); shiftCount = aExp - 0x433; if ( 0 <= shiftCount ) { if ( 0x43E <= aExp ) { if ( a != LIT64( 0xC3E0000000000000 ) ) { float_raise( float_flag_invalid STATUS_VAR); if ( ! aSign || ( ( aExp == 0x7FF ) && ( aSig != LIT64( 0x0010000000000000 ) ) ) ) { return LIT64( 0x7FFFFFFFFFFFFFFF ); } } return (sbits64) LIT64( 0x8000000000000000 ); } z = aSig<<shiftCount; } else { if ( aExp < 0x3FE ) { if ( aExp | aSig ) STATUS(float_exception_flags) |= float_flag_inexact; return 0; } z = aSig>>( - shiftCount ); if ( (bits64) ( aSig<<( shiftCount & 63 ) ) ) { STATUS(float_exception_flags) |= float_flag_inexact; } } if ( aSign ) z = - z; return z; }

int64 FUNC_0( float64 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; bits64 aSig; int64 z; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); aSign = extractFloat64Sign( a ); if ( aExp ) aSig |= LIT64( 0x0010000000000000 ); shiftCount = aExp - 0x433; if ( 0 <= shiftCount ) { if ( 0x43E <= aExp ) { if ( a != LIT64( 0xC3E0000000000000 ) ) { float_raise( float_flag_invalid STATUS_VAR); if ( ! aSign || ( ( aExp == 0x7FF ) && ( aSig != LIT64( 0x0010000000000000 ) ) ) ) { return LIT64( 0x7FFFFFFFFFFFFFFF ); } } return (sbits64) LIT64( 0x8000000000000000 ); } z = aSig<<shiftCount; } else { if ( aExp < 0x3FE ) { if ( aExp | aSig ) STATUS(float_exception_flags) |= float_flag_inexact; return 0; } z = aSig>>( - shiftCount ); if ( (bits64) ( aSig<<( shiftCount & 63 ) ) ) { STATUS(float_exception_flags) |= float_flag_inexact; } } if ( aSign ) z = - z; return z; }

static void icount_warp_rt(void) { unsigned seq; int64_t warp_start; /* The icount_warp_timer is rescheduled soon after vm_clock_warp_start * changes from -1 to another value, so the race here is okay. */ do { seq = seqlock_read_begin(&timers_state.vm_clock_seqlock); warp_start = vm_clock_warp_start; } while (seqlock_read_retry(&timers_state.vm_clock_seqlock, seq)); if (warp_start == -1) { return; } seqlock_write_begin(&timers_state.vm_clock_seqlock); if (runstate_is_running()) { int64_t clock = REPLAY_CLOCK(REPLAY_CLOCK_VIRTUAL_RT, cpu_get_clock_locked()); int64_t warp_delta; warp_delta = clock - vm_clock_warp_start; if (use_icount == 2) { /* * In adaptive mode, do not let QEMU_CLOCK_VIRTUAL run too * far ahead of real time. */ int64_t cur_icount = cpu_get_icount_locked(); int64_t delta = clock - cur_icount; warp_delta = MIN(warp_delta, delta); } timers_state.qemu_icount_bias += warp_delta; } vm_clock_warp_start = -1; seqlock_write_end(&timers_state.vm_clock_seqlock); if (qemu_clock_expired(QEMU_CLOCK_VIRTUAL)) { qemu_clock_notify(QEMU_CLOCK_VIRTUAL); } }

qemu

b39e3f34c9de7ead6a11a74aa2de78baf41d81a7

static void icount_warp_rt(void) { unsigned seq; int64_t warp_start; do { seq = seqlock_read_begin(&timers_state.vm_clock_seqlock); warp_start = vm_clock_warp_start; } while (seqlock_read_retry(&timers_state.vm_clock_seqlock, seq)); if (warp_start == -1) { return; } seqlock_write_begin(&timers_state.vm_clock_seqlock); if (runstate_is_running()) { int64_t clock = REPLAY_CLOCK(REPLAY_CLOCK_VIRTUAL_RT, cpu_get_clock_locked()); int64_t warp_delta; warp_delta = clock - vm_clock_warp_start; if (use_icount == 2) { int64_t cur_icount = cpu_get_icount_locked(); int64_t delta = clock - cur_icount; warp_delta = MIN(warp_delta, delta); } timers_state.qemu_icount_bias += warp_delta; } vm_clock_warp_start = -1; seqlock_write_end(&timers_state.vm_clock_seqlock); if (qemu_clock_expired(QEMU_CLOCK_VIRTUAL)) { qemu_clock_notify(QEMU_CLOCK_VIRTUAL); } }

static void FUNC_0(void) { unsigned VAR_0; int64_t warp_start; do { VAR_0 = seqlock_read_begin(&timers_state.vm_clock_seqlock); warp_start = vm_clock_warp_start; } while (seqlock_read_retry(&timers_state.vm_clock_seqlock, VAR_0)); if (warp_start == -1) { return; } seqlock_write_begin(&timers_state.vm_clock_seqlock); if (runstate_is_running()) { int64_t clock = REPLAY_CLOCK(REPLAY_CLOCK_VIRTUAL_RT, cpu_get_clock_locked()); int64_t warp_delta; warp_delta = clock - vm_clock_warp_start; if (use_icount == 2) { int64_t cur_icount = cpu_get_icount_locked(); int64_t delta = clock - cur_icount; warp_delta = MIN(warp_delta, delta); } timers_state.qemu_icount_bias += warp_delta; } vm_clock_warp_start = -1; seqlock_write_end(&timers_state.vm_clock_seqlock); if (qemu_clock_expired(QEMU_CLOCK_VIRTUAL)) { qemu_clock_notify(QEMU_CLOCK_VIRTUAL); } }

void bdrv_aio_cancel(BlockAIOCB *acb) { qemu_aio_ref(acb); bdrv_aio_cancel_async(acb); while (acb->refcnt > 1) { if (acb->aiocb_info->get_aio_context) { aio_poll(acb->aiocb_info->get_aio_context(acb), true); } else if (acb->bs) { aio_poll(bdrv_get_aio_context(acb->bs), true); } else { abort(); } } qemu_aio_unref(acb); }

qemu

61007b316cd71ee7333ff7a0a749a8949527575f

void bdrv_aio_cancel(BlockAIOCB *acb) { qemu_aio_ref(acb); bdrv_aio_cancel_async(acb); while (acb->refcnt > 1) { if (acb->aiocb_info->get_aio_context) { aio_poll(acb->aiocb_info->get_aio_context(acb), true); } else if (acb->bs) { aio_poll(bdrv_get_aio_context(acb->bs), true); } else { abort(); } } qemu_aio_unref(acb); }

void FUNC_0(BlockAIOCB *VAR_0) { qemu_aio_ref(VAR_0); bdrv_aio_cancel_async(VAR_0); while (VAR_0->refcnt > 1) { if (VAR_0->aiocb_info->get_aio_context) { aio_poll(VAR_0->aiocb_info->get_aio_context(VAR_0), true); } else if (VAR_0->bs) { aio_poll(bdrv_get_aio_context(VAR_0->bs), true); } else { abort(); } } qemu_aio_unref(VAR_0); }

static void vnc_listen_read(void *opaque, bool websocket) { VncDisplay *vs = opaque; struct sockaddr_in addr; socklen_t addrlen = sizeof(addr); int csock; /* Catch-up */ graphic_hw_update(vs->dcl.con); #ifdef CONFIG_VNC_WS if (websocket) { csock = qemu_accept(vs->lwebsock, (struct sockaddr *)&addr, &addrlen); } else #endif /* CONFIG_VNC_WS */ { csock = qemu_accept(vs->lsock, (struct sockaddr *)&addr, &addrlen); } if (csock != -1) { socket_set_nodelay(csock); vnc_connect(vs, csock, false, websocket); } }

qemu

8e9b0d24fb986d4241ae3b77752eca5dab4cb486

static void vnc_listen_read(void *opaque, bool websocket) { VncDisplay *vs = opaque; struct sockaddr_in addr; socklen_t addrlen = sizeof(addr); int csock; graphic_hw_update(vs->dcl.con); #ifdef CONFIG_VNC_WS if (websocket) { csock = qemu_accept(vs->lwebsock, (struct sockaddr *)&addr, &addrlen); } else #endif { csock = qemu_accept(vs->lsock, (struct sockaddr *)&addr, &addrlen); } if (csock != -1) { socket_set_nodelay(csock); vnc_connect(vs, csock, false, websocket); } }

static void FUNC_0(void *VAR_0, bool VAR_1) { VncDisplay *vs = VAR_0; struct sockaddr_in VAR_2; socklen_t addrlen = sizeof(VAR_2); int VAR_3; graphic_hw_update(vs->dcl.con); #ifdef CONFIG_VNC_WS if (VAR_1) { VAR_3 = qemu_accept(vs->lwebsock, (struct sockaddr *)&VAR_2, &addrlen); } else #endif { VAR_3 = qemu_accept(vs->lsock, (struct sockaddr *)&VAR_2, &addrlen); } if (VAR_3 != -1) { socket_set_nodelay(VAR_3); vnc_connect(vs, VAR_3, false, VAR_1); } }

static void gen_sraq(DisasContext *ctx) { int l1 = gen_new_label(); int l2 = gen_new_label(); TCGv t0 = tcg_temp_new(); TCGv t1 = tcg_temp_local_new(); TCGv t2 = tcg_temp_local_new(); tcg_gen_andi_tl(t2, cpu_gpr[rB(ctx->opcode)], 0x1F); tcg_gen_shr_tl(t0, cpu_gpr[rS(ctx->opcode)], t2); tcg_gen_sar_tl(t1, cpu_gpr[rS(ctx->opcode)], t2); tcg_gen_subfi_tl(t2, 32, t2); tcg_gen_shl_tl(t2, cpu_gpr[rS(ctx->opcode)], t2); tcg_gen_or_tl(t0, t0, t2); gen_store_spr(SPR_MQ, t0); tcg_gen_andi_tl(t0, cpu_gpr[rB(ctx->opcode)], 0x20); tcg_gen_brcondi_tl(TCG_COND_EQ, t2, 0, l1); tcg_gen_mov_tl(t2, cpu_gpr[rS(ctx->opcode)]); tcg_gen_sari_tl(t1, cpu_gpr[rS(ctx->opcode)], 31); gen_set_label(l1); tcg_temp_free(t0); tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], t1); tcg_gen_movi_tl(cpu_ca, 0); tcg_gen_brcondi_tl(TCG_COND_GE, t1, 0, l2); tcg_gen_brcondi_tl(TCG_COND_EQ, t2, 0, l2); tcg_gen_movi_tl(cpu_ca, 1); gen_set_label(l2); tcg_temp_free(t1); tcg_temp_free(t2); if (unlikely(Rc(ctx->opcode) != 0)) gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); }

qemu

42a268c241183877192c376d03bd9b6d527407c7

static void gen_sraq(DisasContext *ctx) { int l1 = gen_new_label(); int l2 = gen_new_label(); TCGv t0 = tcg_temp_new(); TCGv t1 = tcg_temp_local_new(); TCGv t2 = tcg_temp_local_new(); tcg_gen_andi_tl(t2, cpu_gpr[rB(ctx->opcode)], 0x1F); tcg_gen_shr_tl(t0, cpu_gpr[rS(ctx->opcode)], t2); tcg_gen_sar_tl(t1, cpu_gpr[rS(ctx->opcode)], t2); tcg_gen_subfi_tl(t2, 32, t2); tcg_gen_shl_tl(t2, cpu_gpr[rS(ctx->opcode)], t2); tcg_gen_or_tl(t0, t0, t2); gen_store_spr(SPR_MQ, t0); tcg_gen_andi_tl(t0, cpu_gpr[rB(ctx->opcode)], 0x20); tcg_gen_brcondi_tl(TCG_COND_EQ, t2, 0, l1); tcg_gen_mov_tl(t2, cpu_gpr[rS(ctx->opcode)]); tcg_gen_sari_tl(t1, cpu_gpr[rS(ctx->opcode)], 31); gen_set_label(l1); tcg_temp_free(t0); tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], t1); tcg_gen_movi_tl(cpu_ca, 0); tcg_gen_brcondi_tl(TCG_COND_GE, t1, 0, l2); tcg_gen_brcondi_tl(TCG_COND_EQ, t2, 0, l2); tcg_gen_movi_tl(cpu_ca, 1); gen_set_label(l2); tcg_temp_free(t1); tcg_temp_free(t2); if (unlikely(Rc(ctx->opcode) != 0)) gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); }

static void FUNC_0(DisasContext *VAR_0) { int VAR_1 = gen_new_label(); int VAR_2 = gen_new_label(); TCGv t0 = tcg_temp_new(); TCGv t1 = tcg_temp_local_new(); TCGv t2 = tcg_temp_local_new(); tcg_gen_andi_tl(t2, cpu_gpr[rB(VAR_0->opcode)], 0x1F); tcg_gen_shr_tl(t0, cpu_gpr[rS(VAR_0->opcode)], t2); tcg_gen_sar_tl(t1, cpu_gpr[rS(VAR_0->opcode)], t2); tcg_gen_subfi_tl(t2, 32, t2); tcg_gen_shl_tl(t2, cpu_gpr[rS(VAR_0->opcode)], t2); tcg_gen_or_tl(t0, t0, t2); gen_store_spr(SPR_MQ, t0); tcg_gen_andi_tl(t0, cpu_gpr[rB(VAR_0->opcode)], 0x20); tcg_gen_brcondi_tl(TCG_COND_EQ, t2, 0, VAR_1); tcg_gen_mov_tl(t2, cpu_gpr[rS(VAR_0->opcode)]); tcg_gen_sari_tl(t1, cpu_gpr[rS(VAR_0->opcode)], 31); gen_set_label(VAR_1); tcg_temp_free(t0); tcg_gen_mov_tl(cpu_gpr[rA(VAR_0->opcode)], t1); tcg_gen_movi_tl(cpu_ca, 0); tcg_gen_brcondi_tl(TCG_COND_GE, t1, 0, VAR_2); tcg_gen_brcondi_tl(TCG_COND_EQ, t2, 0, VAR_2); tcg_gen_movi_tl(cpu_ca, 1); gen_set_label(VAR_2); tcg_temp_free(t1); tcg_temp_free(t2); if (unlikely(Rc(VAR_0->opcode) != 0)) gen_set_Rc0(VAR_0, cpu_gpr[rA(VAR_0->opcode)]); }

static void reverse_dc_prediction(Vp3DecodeContext *s, int first_fragment, int fragment_width, int fragment_height) { #define PUL 8 #define PU 4 #define PUR 2 #define PL 1 int x, y; int i = first_fragment; int predicted_dc; /* DC values for the left, up-left, up, and up-right fragments */ int vl, vul, vu, vur; /* indexes for the left, up-left, up, and up-right fragments */ int l, ul, u, ur; /* * The 6 fields mean: * 0: up-left multiplier * 1: up multiplier * 2: up-right multiplier * 3: left multiplier */ static const int predictor_transform[16][4] = { { 0, 0, 0, 0}, { 0, 0, 0,128}, // PL { 0, 0,128, 0}, // PUR { 0, 0, 53, 75}, // PUR|PL { 0,128, 0, 0}, // PU { 0, 64, 0, 64}, // PU|PL { 0,128, 0, 0}, // PU|PUR { 0, 0, 53, 75}, // PU|PUR|PL {128, 0, 0, 0}, // PUL { 0, 0, 0,128}, // PUL|PL { 64, 0, 64, 0}, // PUL|PUR { 0, 0, 53, 75}, // PUL|PUR|PL { 0,128, 0, 0}, // PUL|PU {-104,116, 0,116}, // PUL|PU|PL { 24, 80, 24, 0}, // PUL|PU|PUR {-104,116, 0,116} // PUL|PU|PUR|PL }; /* This table shows which types of blocks can use other blocks for * prediction. For example, INTRA is the only mode in this table to * have a frame number of 0. That means INTRA blocks can only predict * from other INTRA blocks. There are 2 golden frame coding types; * blocks encoding in these modes can only predict from other blocks * that were encoded with these 1 of these 2 modes. */ static const unsigned char compatible_frame[8] = { 1, /* MODE_INTER_NO_MV */ 0, /* MODE_INTRA */ 1, /* MODE_INTER_PLUS_MV */ 1, /* MODE_INTER_LAST_MV */ 1, /* MODE_INTER_PRIOR_MV */ 2, /* MODE_USING_GOLDEN */ 2, /* MODE_GOLDEN_MV */ 1 /* MODE_INTER_FOUR_MV */ }; int current_frame_type; /* there is a last DC predictor for each of the 3 frame types */ short last_dc[3]; int transform = 0; vul = vu = vur = vl = 0; last_dc[0] = last_dc[1] = last_dc[2] = 0; /* for each fragment row... */ for (y = 0; y < fragment_height; y++) { /* for each fragment in a row... */ for (x = 0; x < fragment_width; x++, i++) { /* reverse prediction if this block was coded */ if (s->all_fragments[i].coding_method != MODE_COPY) { current_frame_type = compatible_frame[s->all_fragments[i].coding_method]; transform= 0; if(x){ l= i-1; vl = DC_COEFF(l); if(FRAME_CODED(l) && COMPATIBLE_FRAME(l)) transform |= PL; } if(y){ u= i-fragment_width; vu = DC_COEFF(u); if(FRAME_CODED(u) && COMPATIBLE_FRAME(u)) transform |= PU; if(x){ ul= i-fragment_width-1; vul = DC_COEFF(ul); if(FRAME_CODED(ul) && COMPATIBLE_FRAME(ul)) transform |= PUL; } if(x + 1 < fragment_width){ ur= i-fragment_width+1; vur = DC_COEFF(ur); if(FRAME_CODED(ur) && COMPATIBLE_FRAME(ur)) transform |= PUR; } } if (transform == 0) { /* if there were no fragments to predict from, use last * DC saved */ predicted_dc = last_dc[current_frame_type]; } else { /* apply the appropriate predictor transform */ predicted_dc = (predictor_transform[transform][0] * vul) + (predictor_transform[transform][1] * vu) + (predictor_transform[transform][2] * vur) + (predictor_transform[transform][3] * vl); predicted_dc /= 128; /* check for outranging on the [ul u l] and * [ul u ur l] predictors */ if ((transform == 13) || (transform == 15)) { if (FFABS(predicted_dc - vu) > 128) predicted_dc = vu; else if (FFABS(predicted_dc - vl) > 128) predicted_dc = vl; else if (FFABS(predicted_dc - vul) > 128) predicted_dc = vul; } } /* at long last, apply the predictor */ if(s->coeffs[i].index){ *s->next_coeff= s->coeffs[i]; s->coeffs[i].index=0; s->coeffs[i].coeff=0; s->coeffs[i].next= s->next_coeff++; } s->coeffs[i].coeff += predicted_dc; /* save the DC */ last_dc[current_frame_type] = DC_COEFF(i); if(DC_COEFF(i) && !(s->coeff_counts[i]&127)){ s->coeff_counts[i]= 129; // s->all_fragments[i].next_coeff= s->next_coeff; s->coeffs[i].next= s->next_coeff; (s->next_coeff++)->next=NULL; } } } } }

FFmpeg

63c0b3d920fe637ec4d361f08108ca8d5ba70bbe

static void reverse_dc_prediction(Vp3DecodeContext *s, int first_fragment, int fragment_width, int fragment_height) { #define PUL 8 #define PU 4 #define PUR 2 #define PL 1 int x, y; int i = first_fragment; int predicted_dc; int vl, vul, vu, vur; int l, ul, u, ur; static const int predictor_transform[16][4] = { { 0, 0, 0, 0}, { 0, 0, 0,128}, { 0, 0,128, 0}, { 0, 0, 53, 75}, |PL { 0,128, 0, 0}, { 0, 64, 0, 64}, |PL { 0,128, 0, 0}, |PUR { 0, 0, 53, 75}, |PUR|PL {128, 0, 0, 0}, L { 0, 0, 0,128}, L|PL { 64, 0, 64, 0}, L|PUR { 0, 0, 53, 75}, L|PUR|PL { 0,128, 0, 0}, L|PU {-104,116, 0,116}, L|PU|PL { 24, 80, 24, 0}, L|PU|PUR {-104,116, 0,116} L|PU|PUR|PL }; static const unsigned char compatible_frame[8] = { 1, 0, 1, 1, 1, 2, 2, 1 }; int current_frame_type; short last_dc[3]; int transform = 0; vul = vu = vur = vl = 0; last_dc[0] = last_dc[1] = last_dc[2] = 0; for (y = 0; y < fragment_height; y++) { for (x = 0; x < fragment_width; x++, i++) { if (s->all_fragments[i].coding_method != MODE_COPY) { current_frame_type = compatible_frame[s->all_fragments[i].coding_method]; transform= 0; if(x){ l= i-1; vl = DC_COEFF(l); if(FRAME_CODED(l) && COMPATIBLE_FRAME(l)) transform |= PL; } if(y){ u= i-fragment_width; vu = DC_COEFF(u); if(FRAME_CODED(u) && COMPATIBLE_FRAME(u)) transform |= PU; if(x){ ul= i-fragment_width-1; vul = DC_COEFF(ul); if(FRAME_CODED(ul) && COMPATIBLE_FRAME(ul)) transform |= PUL; } if(x + 1 < fragment_width){ ur= i-fragment_width+1; vur = DC_COEFF(ur); if(FRAME_CODED(ur) && COMPATIBLE_FRAME(ur)) transform |= PUR; } } if (transform == 0) { predicted_dc = last_dc[current_frame_type]; } else { predicted_dc = (predictor_transform[transform][0] * vul) + (predictor_transform[transform][1] * vu) + (predictor_transform[transform][2] * vur) + (predictor_transform[transform][3] * vl); predicted_dc /= 128; if ((transform == 13) || (transform == 15)) { if (FFABS(predicted_dc - vu) > 128) predicted_dc = vu; else if (FFABS(predicted_dc - vl) > 128) predicted_dc = vl; else if (FFABS(predicted_dc - vul) > 128) predicted_dc = vul; } } if(s->coeffs[i].index){ *s->next_coeff= s->coeffs[i]; s->coeffs[i].index=0; s->coeffs[i].coeff=0; s->coeffs[i].next= s->next_coeff++; } s->coeffs[i].coeff += predicted_dc; last_dc[current_frame_type] = DC_COEFF(i); if(DC_COEFF(i) && !(s->coeff_counts[i]&127)){ s->coeff_counts[i]= 129; s->coeffs[i].next= s->next_coeff; (s->next_coeff++)->next=NULL; } } } } }

static void FUNC_0(Vp3DecodeContext *VAR_0, int VAR_1, int VAR_2, int VAR_3) { #define PUL 8 #define PU 4 #define PUR 2 #define PL 1 int VAR_4, VAR_5; int VAR_6 = VAR_1; int VAR_7; int VAR_8, VAR_9, VAR_10, VAR_11; int VAR_12, VAR_13, VAR_14, VAR_15; static const int VAR_16[16][4] = { { 0, 0, 0, 0}, { 0, 0, 0,128}, { 0, 0,128, 0}, { 0, 0, 53, 75}, |PL { 0,128, 0, 0}, { 0, 64, 0, 64}, |PL { 0,128, 0, 0}, |PUR { 0, 0, 53, 75}, |PUR|PL {128, 0, 0, 0}, L { 0, 0, 0,128}, L|PL { 64, 0, 64, 0}, L|PUR { 0, 0, 53, 75}, L|PUR|PL { 0,128, 0, 0}, L|PU {-104,116, 0,116}, L|PU|PL { 24, 80, 24, 0}, L|PU|PUR {-104,116, 0,116} L|PU|PUR|PL }; static const unsigned char VAR_17[8] = { 1, 0, 1, 1, 1, 2, 2, 1 }; int VAR_18; short VAR_19[3]; int VAR_20 = 0; VAR_9 = VAR_10 = VAR_11 = VAR_8 = 0; VAR_19[0] = VAR_19[1] = VAR_19[2] = 0; for (VAR_5 = 0; VAR_5 < VAR_3; VAR_5++) { for (VAR_4 = 0; VAR_4 < VAR_2; VAR_4++, VAR_6++) { if (VAR_0->all_fragments[VAR_6].coding_method != MODE_COPY) { VAR_18 = VAR_17[VAR_0->all_fragments[VAR_6].coding_method]; VAR_20= 0; if(VAR_4){ VAR_12= VAR_6-1; VAR_8 = DC_COEFF(VAR_12); if(FRAME_CODED(VAR_12) && COMPATIBLE_FRAME(VAR_12)) VAR_20 |= PL; } if(VAR_5){ VAR_14= VAR_6-VAR_2; VAR_10 = DC_COEFF(VAR_14); if(FRAME_CODED(VAR_14) && COMPATIBLE_FRAME(VAR_14)) VAR_20 |= PU; if(VAR_4){ VAR_13= VAR_6-VAR_2-1; VAR_9 = DC_COEFF(VAR_13); if(FRAME_CODED(VAR_13) && COMPATIBLE_FRAME(VAR_13)) VAR_20 |= PUL; } if(VAR_4 + 1 < VAR_2){ VAR_15= VAR_6-VAR_2+1; VAR_11 = DC_COEFF(VAR_15); if(FRAME_CODED(VAR_15) && COMPATIBLE_FRAME(VAR_15)) VAR_20 |= PUR; } } if (VAR_20 == 0) { VAR_7 = VAR_19[VAR_18]; } else { VAR_7 = (VAR_16[VAR_20][0] * VAR_9) + (VAR_16[VAR_20][1] * VAR_10) + (VAR_16[VAR_20][2] * VAR_11) + (VAR_16[VAR_20][3] * VAR_8); VAR_7 /= 128; if ((VAR_20 == 13) || (VAR_20 == 15)) { if (FFABS(VAR_7 - VAR_10) > 128) VAR_7 = VAR_10; else if (FFABS(VAR_7 - VAR_8) > 128) VAR_7 = VAR_8; else if (FFABS(VAR_7 - VAR_9) > 128) VAR_7 = VAR_9; } } if(VAR_0->coeffs[VAR_6].index){ *VAR_0->next_coeff= VAR_0->coeffs[VAR_6]; VAR_0->coeffs[VAR_6].index=0; VAR_0->coeffs[VAR_6].coeff=0; VAR_0->coeffs[VAR_6].next= VAR_0->next_coeff++; } VAR_0->coeffs[VAR_6].coeff += VAR_7; VAR_19[VAR_18] = DC_COEFF(VAR_6); if(DC_COEFF(VAR_6) && !(VAR_0->coeff_counts[VAR_6]&127)){ VAR_0->coeff_counts[VAR_6]= 129; VAR_0->coeffs[VAR_6].next= VAR_0->next_coeff; (VAR_0->next_coeff++)->next=NULL; } } } } }

static PhysPageDesc *phys_page_find_alloc(target_phys_addr_t index, int alloc) { void **lp, **p; p = (void **)l1_phys_map; #if TARGET_PHYS_ADDR_SPACE_BITS > 32 #if TARGET_PHYS_ADDR_SPACE_BITS > (32 + L1_BITS) #error unsupported TARGET_PHYS_ADDR_SPACE_BITS #endif lp = p + ((index >> (L1_BITS + L2_BITS)) & (L1_SIZE - 1)); p = *lp; if (!p) { /* allocate if not found */ if (!alloc) return NULL; p = qemu_vmalloc(sizeof(void *) * L1_SIZE); memset(p, 0, sizeof(void *) * L1_SIZE); *lp = p; } #endif lp = p + ((index >> L2_BITS) & (L1_SIZE - 1)); p = *lp; if (!p) { /* allocate if not found */ if (!alloc) return NULL; p = qemu_vmalloc(sizeof(PhysPageDesc) * L2_SIZE); memset(p, 0, sizeof(PhysPageDesc) * L2_SIZE); *lp = p; } return ((PhysPageDesc *)p) + (index & (L2_SIZE - 1)); }

qemu

e3f4e2a4b0df510e441badb85c9398516c27bd66

static PhysPageDesc *phys_page_find_alloc(target_phys_addr_t index, int alloc) { void **lp, **p; p = (void **)l1_phys_map; #if TARGET_PHYS_ADDR_SPACE_BITS > 32 #if TARGET_PHYS_ADDR_SPACE_BITS > (32 + L1_BITS) #error unsupported TARGET_PHYS_ADDR_SPACE_BITS #endif lp = p + ((index >> (L1_BITS + L2_BITS)) & (L1_SIZE - 1)); p = *lp; if (!p) { if (!alloc) return NULL; p = qemu_vmalloc(sizeof(void *) * L1_SIZE); memset(p, 0, sizeof(void *) * L1_SIZE); *lp = p; } #endif lp = p + ((index >> L2_BITS) & (L1_SIZE - 1)); p = *lp; if (!p) { if (!alloc) return NULL; p = qemu_vmalloc(sizeof(PhysPageDesc) * L2_SIZE); memset(p, 0, sizeof(PhysPageDesc) * L2_SIZE); *lp = p; } return ((PhysPageDesc *)p) + (index & (L2_SIZE - 1)); }

static PhysPageDesc *FUNC_0(target_phys_addr_t index, int alloc) { void **VAR_0, **VAR_1; VAR_1 = (void **)l1_phys_map; #if TARGET_PHYS_ADDR_SPACE_BITS > 32 #if TARGET_PHYS_ADDR_SPACE_BITS > (32 + L1_BITS) #error unsupported TARGET_PHYS_ADDR_SPACE_BITS #endif VAR_0 = VAR_1 + ((index >> (L1_BITS + L2_BITS)) & (L1_SIZE - 1)); VAR_1 = *VAR_0; if (!VAR_1) { if (!alloc) return NULL; VAR_1 = qemu_vmalloc(sizeof(void *) * L1_SIZE); memset(VAR_1, 0, sizeof(void *) * L1_SIZE); *VAR_0 = VAR_1; } #endif VAR_0 = VAR_1 + ((index >> L2_BITS) & (L1_SIZE - 1)); VAR_1 = *VAR_0; if (!VAR_1) { if (!alloc) return NULL; VAR_1 = qemu_vmalloc(sizeof(PhysPageDesc) * L2_SIZE); memset(VAR_1, 0, sizeof(PhysPageDesc) * L2_SIZE); *VAR_0 = VAR_1; } return ((PhysPageDesc *)VAR_1) + (index & (L2_SIZE - 1)); }

CPUState *cpu_mb_init (const char *cpu_model) { CPUState *env; static int tcg_initialized = 0; int i; env = qemu_mallocz(sizeof(CPUState)); cpu_exec_init(env); cpu_reset(env); env->pvr.regs[0] = PVR0_PVR_FULL_MASK \ | PVR0_USE_BARREL_MASK \ | PVR0_USE_DIV_MASK \ | PVR0_USE_HW_MUL_MASK \ | PVR0_USE_EXC_MASK \ | PVR0_USE_ICACHE_MASK \ | PVR0_USE_DCACHE_MASK \ | PVR0_USE_MMU \ | (0xb << 8); env->pvr.regs[2] = PVR2_D_OPB_MASK \ | PVR2_D_LMB_MASK \ | PVR2_I_OPB_MASK \ | PVR2_I_LMB_MASK \ | PVR2_USE_MSR_INSTR \ | PVR2_USE_PCMP_INSTR \ | PVR2_USE_BARREL_MASK \ | PVR2_USE_DIV_MASK \ | PVR2_USE_HW_MUL_MASK \ | PVR2_USE_MUL64_MASK \ | 0; env->pvr.regs[10] = 0x0c000000; /* Default to spartan 3a dsp family. */ env->pvr.regs[11] = PVR11_USE_MMU | (16 << 17); #if !defined(CONFIG_USER_ONLY) env->mmu.c_mmu = 3; env->mmu.c_mmu_tlb_access = 3; env->mmu.c_mmu_zones = 16; #endif if (tcg_initialized) return env; tcg_initialized = 1; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); env_debug = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, debug), "debug0"); env_iflags = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, iflags), "iflags"); env_imm = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, imm), "imm"); env_btarget = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, btarget), "btarget"); env_btaken = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, btaken), "btaken"); for (i = 0; i < ARRAY_SIZE(cpu_R); i++) { cpu_R[i] = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, regs[i]), regnames[i]); } for (i = 0; i < ARRAY_SIZE(cpu_SR); i++) { cpu_SR[i] = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, sregs[i]), special_regnames[i]); } #define GEN_HELPER 2 #include "helper.h" return env; }

qemu

4898427ec88821ff94571340c397d15e0bddb3e2

CPUState *cpu_mb_init (const char *cpu_model) { CPUState *env; static int tcg_initialized = 0; int i; env = qemu_mallocz(sizeof(CPUState)); cpu_exec_init(env); cpu_reset(env); env->pvr.regs[0] = PVR0_PVR_FULL_MASK \ | PVR0_USE_BARREL_MASK \ | PVR0_USE_DIV_MASK \ | PVR0_USE_HW_MUL_MASK \ | PVR0_USE_EXC_MASK \ | PVR0_USE_ICACHE_MASK \ | PVR0_USE_DCACHE_MASK \ | PVR0_USE_MMU \ | (0xb << 8); env->pvr.regs[2] = PVR2_D_OPB_MASK \ | PVR2_D_LMB_MASK \ | PVR2_I_OPB_MASK \ | PVR2_I_LMB_MASK \ | PVR2_USE_MSR_INSTR \ | PVR2_USE_PCMP_INSTR \ | PVR2_USE_BARREL_MASK \ | PVR2_USE_DIV_MASK \ | PVR2_USE_HW_MUL_MASK \ | PVR2_USE_MUL64_MASK \ | 0; env->pvr.regs[10] = 0x0c000000; env->pvr.regs[11] = PVR11_USE_MMU | (16 << 17); #if !defined(CONFIG_USER_ONLY) env->mmu.c_mmu = 3; env->mmu.c_mmu_tlb_access = 3; env->mmu.c_mmu_zones = 16; #endif if (tcg_initialized) return env; tcg_initialized = 1; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); env_debug = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, debug), "debug0"); env_iflags = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, iflags), "iflags"); env_imm = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, imm), "imm"); env_btarget = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, btarget), "btarget"); env_btaken = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, btaken), "btaken"); for (i = 0; i < ARRAY_SIZE(cpu_R); i++) { cpu_R[i] = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, regs[i]), regnames[i]); } for (i = 0; i < ARRAY_SIZE(cpu_SR); i++) { cpu_SR[i] = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, sregs[i]), special_regnames[i]); } #define GEN_HELPER 2 #include "helper.h" return env; }

CPUState *FUNC_0 (const char *cpu_model) { CPUState *env; static int VAR_0 = 0; int VAR_1; env = qemu_mallocz(sizeof(CPUState)); cpu_exec_init(env); cpu_reset(env); env->pvr.regs[0] = PVR0_PVR_FULL_MASK \ | PVR0_USE_BARREL_MASK \ | PVR0_USE_DIV_MASK \ | PVR0_USE_HW_MUL_MASK \ | PVR0_USE_EXC_MASK \ | PVR0_USE_ICACHE_MASK \ | PVR0_USE_DCACHE_MASK \ | PVR0_USE_MMU \ | (0xb << 8); env->pvr.regs[2] = PVR2_D_OPB_MASK \ | PVR2_D_LMB_MASK \ | PVR2_I_OPB_MASK \ | PVR2_I_LMB_MASK \ | PVR2_USE_MSR_INSTR \ | PVR2_USE_PCMP_INSTR \ | PVR2_USE_BARREL_MASK \ | PVR2_USE_DIV_MASK \ | PVR2_USE_HW_MUL_MASK \ | PVR2_USE_MUL64_MASK \ | 0; env->pvr.regs[10] = 0x0c000000; env->pvr.regs[11] = PVR11_USE_MMU | (16 << 17); #if !defined(CONFIG_USER_ONLY) env->mmu.c_mmu = 3; env->mmu.c_mmu_tlb_access = 3; env->mmu.c_mmu_zones = 16; #endif if (VAR_0) return env; VAR_0 = 1; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); env_debug = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, debug), "debug0"); env_iflags = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, iflags), "iflags"); env_imm = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, imm), "imm"); env_btarget = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, btarget), "btarget"); env_btaken = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, btaken), "btaken"); for (VAR_1 = 0; VAR_1 < ARRAY_SIZE(cpu_R); VAR_1++) { cpu_R[VAR_1] = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, regs[VAR_1]), regnames[VAR_1]); } for (VAR_1 = 0; VAR_1 < ARRAY_SIZE(cpu_SR); VAR_1++) { cpu_SR[VAR_1] = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, sregs[VAR_1]), special_regnames[VAR_1]); } #define GEN_HELPER 2 #include "helper.h" return env; }

int cpu_x86_exec(CPUX86State *env1) { int saved_T0, saved_T1, saved_A0; CPUX86State *saved_env; #ifdef reg_EAX int saved_EAX; #endif #ifdef reg_ECX int saved_ECX; #endif #ifdef reg_EDX int saved_EDX; #endif #ifdef reg_EBX int saved_EBX; #endif #ifdef reg_ESP int saved_ESP; #endif #ifdef reg_EBP int saved_EBP; #endif #ifdef reg_ESI int saved_ESI; #endif #ifdef reg_EDI int saved_EDI; #endif #ifdef __sparc__ int saved_i7, tmp_T0; #endif int code_gen_size, ret; void (*gen_func)(void); TranslationBlock *tb, **ptb; uint8_t *tc_ptr, *cs_base, *pc; unsigned int flags; /* first we save global registers */ saved_T0 = T0; saved_T1 = T1; saved_A0 = A0; saved_env = env; env = env1; #ifdef reg_EAX saved_EAX = EAX; EAX = env->regs[R_EAX]; #endif #ifdef reg_ECX saved_ECX = ECX; ECX = env->regs[R_ECX]; #endif #ifdef reg_EDX saved_EDX = EDX; EDX = env->regs[R_EDX]; #endif #ifdef reg_EBX saved_EBX = EBX; EBX = env->regs[R_EBX]; #endif #ifdef reg_ESP saved_ESP = ESP; ESP = env->regs[R_ESP]; #endif #ifdef reg_EBP saved_EBP = EBP; EBP = env->regs[R_EBP]; #endif #ifdef reg_ESI saved_ESI = ESI; ESI = env->regs[R_ESI]; #endif #ifdef reg_EDI saved_EDI = EDI; EDI = env->regs[R_EDI]; #endif #ifdef __sparc__ /* we also save i7 because longjmp may not restore it */ asm volatile ("mov %%i7, %0" : "=r" (saved_i7)); #endif /* put eflags in CPU temporary format */ CC_SRC = env->eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); DF = 1 - (2 * ((env->eflags >> 10) & 1)); CC_OP = CC_OP_EFLAGS; env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); env->interrupt_request = 0; /* prepare setjmp context for exception handling */ if (setjmp(env->jmp_env) == 0) { T0 = 0; /* force lookup of first TB */ for(;;) { #ifdef __sparc__ /* g1 can be modified by some libc? functions */ tmp_T0 = T0; #endif if (env->interrupt_request) { env->exception_index = EXCP_INTERRUPT; cpu_loop_exit(); } #ifdef DEBUG_EXEC if (loglevel) { /* XXX: save all volatile state in cpu state */ /* restore flags in standard format */ env->regs[R_EAX] = EAX; env->regs[R_EBX] = EBX; env->regs[R_ECX] = ECX; env->regs[R_EDX] = EDX; env->regs[R_ESI] = ESI; env->regs[R_EDI] = EDI; env->regs[R_EBP] = EBP; env->regs[R_ESP] = ESP; env->eflags = env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK); cpu_x86_dump_state(env, logfile, 0); env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); } #endif /* we compute the CPU state. We assume it will not change during the whole generated block. */ flags = env->seg_cache[R_CS].seg_32bit << GEN_FLAG_CODE32_SHIFT; flags |= env->seg_cache[R_SS].seg_32bit << GEN_FLAG_SS32_SHIFT; flags |= (((unsigned long)env->seg_cache[R_DS].base | (unsigned long)env->seg_cache[R_ES].base | (unsigned long)env->seg_cache[R_SS].base) != 0) << GEN_FLAG_ADDSEG_SHIFT; if (!(env->eflags & VM_MASK)) { flags |= (env->segs[R_CS] & 3) << GEN_FLAG_CPL_SHIFT; } else { /* NOTE: a dummy CPL is kept */ flags |= (1 << GEN_FLAG_VM_SHIFT); flags |= (3 << GEN_FLAG_CPL_SHIFT); } flags |= (env->eflags & (IOPL_MASK | TF_MASK)); cs_base = env->seg_cache[R_CS].base; pc = cs_base + env->eip; tb = tb_find(&ptb, (unsigned long)pc, (unsigned long)cs_base, flags); if (!tb) { spin_lock(&tb_lock); /* if no translated code available, then translate it now */ tb = tb_alloc((unsigned long)pc); if (!tb) { /* flush must be done */ tb_flush(); /* cannot fail at this point */ tb = tb_alloc((unsigned long)pc); /* don't forget to invalidate previous TB info */ ptb = &tb_hash[tb_hash_func((unsigned long)pc)]; T0 = 0; } tc_ptr = code_gen_ptr; tb->tc_ptr = tc_ptr; tb->cs_base = (unsigned long)cs_base; tb->flags = flags; ret = cpu_x86_gen_code(tb, CODE_GEN_MAX_SIZE, &code_gen_size); /* if invalid instruction, signal it */ if (ret != 0) { /* NOTE: the tb is allocated but not linked, so we can leave it */ spin_unlock(&tb_lock); raise_exception(EXCP06_ILLOP); } *ptb = tb; tb->hash_next = NULL; tb_link(tb); code_gen_ptr = (void *)(((unsigned long)code_gen_ptr + code_gen_size + CODE_GEN_ALIGN - 1) & ~(CODE_GEN_ALIGN - 1)); spin_unlock(&tb_lock); } #ifdef DEBUG_EXEC if (loglevel) { fprintf(logfile, "Trace 0x%08lx [0x%08lx] %s\n", (long)tb->tc_ptr, (long)tb->pc, lookup_symbol((void *)tb->pc)); } #endif #ifdef __sparc__ T0 = tmp_T0; #endif /* see if we can patch the calling TB */ if (T0 != 0 && !(env->eflags & TF_MASK)) { spin_lock(&tb_lock); tb_add_jump((TranslationBlock *)(T0 & ~3), T0 & 3, tb); spin_unlock(&tb_lock); } tc_ptr = tb->tc_ptr; /* execute the generated code */ gen_func = (void *)tc_ptr; #if defined(__sparc__) __asm__ __volatile__("call %0\n\t" "mov %%o7,%%i0" : /* no outputs */ : "r" (gen_func) : "i0", "i1", "i2", "i3", "i4", "i5"); #elif defined(__arm__) asm volatile ("mov pc, %0\n\t" ".global exec_loop\n\t" "exec_loop:\n\t" : /* no outputs */ : "r" (gen_func) : "r1", "r2", "r3", "r8", "r9", "r10", "r12", "r14"); #else gen_func(); #endif } } ret = env->exception_index; /* restore flags in standard format */ env->eflags = env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK); /* restore global registers */ #ifdef reg_EAX EAX = saved_EAX; #endif #ifdef reg_ECX ECX = saved_ECX; #endif #ifdef reg_EDX EDX = saved_EDX; #endif #ifdef reg_EBX EBX = saved_EBX; #endif #ifdef reg_ESP ESP = saved_ESP; #endif #ifdef reg_EBP EBP = saved_EBP; #endif #ifdef reg_ESI ESI = saved_ESI; #endif #ifdef reg_EDI EDI = saved_EDI; #endif #ifdef __sparc__ asm volatile ("mov %0, %%i7" : : "r" (saved_i7)); #endif T0 = saved_T0; T1 = saved_T1; A0 = saved_A0; env = saved_env; return ret; }

qemu

e4533c7a8cdcc79ccdf695f0aaa2e23a5b926ed0

int cpu_x86_exec(CPUX86State *env1) { int saved_T0, saved_T1, saved_A0; CPUX86State *saved_env; #ifdef reg_EAX int saved_EAX; #endif #ifdef reg_ECX int saved_ECX; #endif #ifdef reg_EDX int saved_EDX; #endif #ifdef reg_EBX int saved_EBX; #endif #ifdef reg_ESP int saved_ESP; #endif #ifdef reg_EBP int saved_EBP; #endif #ifdef reg_ESI int saved_ESI; #endif #ifdef reg_EDI int saved_EDI; #endif #ifdef __sparc__ int saved_i7, tmp_T0; #endif int code_gen_size, ret; void (*gen_func)(void); TranslationBlock *tb, **ptb; uint8_t *tc_ptr, *cs_base, *pc; unsigned int flags; saved_T0 = T0; saved_T1 = T1; saved_A0 = A0; saved_env = env; env = env1; #ifdef reg_EAX saved_EAX = EAX; EAX = env->regs[R_EAX]; #endif #ifdef reg_ECX saved_ECX = ECX; ECX = env->regs[R_ECX]; #endif #ifdef reg_EDX saved_EDX = EDX; EDX = env->regs[R_EDX]; #endif #ifdef reg_EBX saved_EBX = EBX; EBX = env->regs[R_EBX]; #endif #ifdef reg_ESP saved_ESP = ESP; ESP = env->regs[R_ESP]; #endif #ifdef reg_EBP saved_EBP = EBP; EBP = env->regs[R_EBP]; #endif #ifdef reg_ESI saved_ESI = ESI; ESI = env->regs[R_ESI]; #endif #ifdef reg_EDI saved_EDI = EDI; EDI = env->regs[R_EDI]; #endif #ifdef __sparc__ asm volatile ("mov %%i7, %0" : "=r" (saved_i7)); #endif CC_SRC = env->eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); DF = 1 - (2 * ((env->eflags >> 10) & 1)); CC_OP = CC_OP_EFLAGS; env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); env->interrupt_request = 0; if (setjmp(env->jmp_env) == 0) { T0 = 0; for(;;) { #ifdef __sparc__ tmp_T0 = T0; #endif if (env->interrupt_request) { env->exception_index = EXCP_INTERRUPT; cpu_loop_exit(); } #ifdef DEBUG_EXEC if (loglevel) { env->regs[R_EAX] = EAX; env->regs[R_EBX] = EBX; env->regs[R_ECX] = ECX; env->regs[R_EDX] = EDX; env->regs[R_ESI] = ESI; env->regs[R_EDI] = EDI; env->regs[R_EBP] = EBP; env->regs[R_ESP] = ESP; env->eflags = env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK); cpu_x86_dump_state(env, logfile, 0); env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); } #endif flags = env->seg_cache[R_CS].seg_32bit << GEN_FLAG_CODE32_SHIFT; flags |= env->seg_cache[R_SS].seg_32bit << GEN_FLAG_SS32_SHIFT; flags |= (((unsigned long)env->seg_cache[R_DS].base | (unsigned long)env->seg_cache[R_ES].base | (unsigned long)env->seg_cache[R_SS].base) != 0) << GEN_FLAG_ADDSEG_SHIFT; if (!(env->eflags & VM_MASK)) { flags |= (env->segs[R_CS] & 3) << GEN_FLAG_CPL_SHIFT; } else { flags |= (1 << GEN_FLAG_VM_SHIFT); flags |= (3 << GEN_FLAG_CPL_SHIFT); } flags |= (env->eflags & (IOPL_MASK | TF_MASK)); cs_base = env->seg_cache[R_CS].base; pc = cs_base + env->eip; tb = tb_find(&ptb, (unsigned long)pc, (unsigned long)cs_base, flags); if (!tb) { spin_lock(&tb_lock); tb = tb_alloc((unsigned long)pc); if (!tb) { tb_flush(); tb = tb_alloc((unsigned long)pc); ptb = &tb_hash[tb_hash_func((unsigned long)pc)]; T0 = 0; } tc_ptr = code_gen_ptr; tb->tc_ptr = tc_ptr; tb->cs_base = (unsigned long)cs_base; tb->flags = flags; ret = cpu_x86_gen_code(tb, CODE_GEN_MAX_SIZE, &code_gen_size); if (ret != 0) { spin_unlock(&tb_lock); raise_exception(EXCP06_ILLOP); } *ptb = tb; tb->hash_next = NULL; tb_link(tb); code_gen_ptr = (void *)(((unsigned long)code_gen_ptr + code_gen_size + CODE_GEN_ALIGN - 1) & ~(CODE_GEN_ALIGN - 1)); spin_unlock(&tb_lock); } #ifdef DEBUG_EXEC if (loglevel) { fprintf(logfile, "Trace 0x%08lx [0x%08lx] %s\n", (long)tb->tc_ptr, (long)tb->pc, lookup_symbol((void *)tb->pc)); } #endif #ifdef __sparc__ T0 = tmp_T0; #endif if (T0 != 0 && !(env->eflags & TF_MASK)) { spin_lock(&tb_lock); tb_add_jump((TranslationBlock *)(T0 & ~3), T0 & 3, tb); spin_unlock(&tb_lock); } tc_ptr = tb->tc_ptr; gen_func = (void *)tc_ptr; #if defined(__sparc__) __asm__ __volatile__("call %0\n\t" "mov %%o7,%%i0" : : "r" (gen_func) : "i0", "i1", "i2", "i3", "i4", "i5"); #elif defined(__arm__) asm volatile ("mov pc, %0\n\t" ".global exec_loop\n\t" "exec_loop:\n\t" : : "r" (gen_func) : "r1", "r2", "r3", "r8", "r9", "r10", "r12", "r14"); #else gen_func(); #endif } } ret = env->exception_index; env->eflags = env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK); #ifdef reg_EAX EAX = saved_EAX; #endif #ifdef reg_ECX ECX = saved_ECX; #endif #ifdef reg_EDX EDX = saved_EDX; #endif #ifdef reg_EBX EBX = saved_EBX; #endif #ifdef reg_ESP ESP = saved_ESP; #endif #ifdef reg_EBP EBP = saved_EBP; #endif #ifdef reg_ESI ESI = saved_ESI; #endif #ifdef reg_EDI EDI = saved_EDI; #endif #ifdef __sparc__ asm volatile ("mov %0, %%i7" : : "r" (saved_i7)); #endif T0 = saved_T0; T1 = saved_T1; A0 = saved_A0; env = saved_env; return ret; }

int FUNC_0(CPUX86State *VAR_0) { int VAR_1, VAR_2, VAR_3; CPUX86State *saved_env; #ifdef reg_EAX int saved_EAX; #endif #ifdef reg_ECX int saved_ECX; #endif #ifdef reg_EDX int saved_EDX; #endif #ifdef reg_EBX int saved_EBX; #endif #ifdef reg_ESP int saved_ESP; #endif #ifdef reg_EBP int saved_EBP; #endif #ifdef reg_ESI int saved_ESI; #endif #ifdef reg_EDI int saved_EDI; #endif #ifdef __sparc__ int saved_i7, tmp_T0; #endif int VAR_4, VAR_5; void (*VAR_6)(void); TranslationBlock *tb, **ptb; uint8_t *tc_ptr, *cs_base, *pc; unsigned int VAR_7; VAR_1 = T0; VAR_2 = T1; VAR_3 = A0; saved_env = env; env = VAR_0; #ifdef reg_EAX saved_EAX = EAX; EAX = env->regs[R_EAX]; #endif #ifdef reg_ECX saved_ECX = ECX; ECX = env->regs[R_ECX]; #endif #ifdef reg_EDX saved_EDX = EDX; EDX = env->regs[R_EDX]; #endif #ifdef reg_EBX saved_EBX = EBX; EBX = env->regs[R_EBX]; #endif #ifdef reg_ESP saved_ESP = ESP; ESP = env->regs[R_ESP]; #endif #ifdef reg_EBP saved_EBP = EBP; EBP = env->regs[R_EBP]; #endif #ifdef reg_ESI saved_ESI = ESI; ESI = env->regs[R_ESI]; #endif #ifdef reg_EDI saved_EDI = EDI; EDI = env->regs[R_EDI]; #endif #ifdef __sparc__ asm volatile ("mov %%i7, %0" : "=r" (saved_i7)); #endif CC_SRC = env->eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); DF = 1 - (2 * ((env->eflags >> 10) & 1)); CC_OP = CC_OP_EFLAGS; env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); env->interrupt_request = 0; if (setjmp(env->jmp_env) == 0) { T0 = 0; for(;;) { #ifdef __sparc__ tmp_T0 = T0; #endif if (env->interrupt_request) { env->exception_index = EXCP_INTERRUPT; cpu_loop_exit(); } #ifdef DEBUG_EXEC if (loglevel) { env->regs[R_EAX] = EAX; env->regs[R_EBX] = EBX; env->regs[R_ECX] = ECX; env->regs[R_EDX] = EDX; env->regs[R_ESI] = ESI; env->regs[R_EDI] = EDI; env->regs[R_EBP] = EBP; env->regs[R_ESP] = ESP; env->eflags = env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK); cpu_x86_dump_state(env, logfile, 0); env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); } #endif VAR_7 = env->seg_cache[R_CS].seg_32bit << GEN_FLAG_CODE32_SHIFT; VAR_7 |= env->seg_cache[R_SS].seg_32bit << GEN_FLAG_SS32_SHIFT; VAR_7 |= (((unsigned long)env->seg_cache[R_DS].base | (unsigned long)env->seg_cache[R_ES].base | (unsigned long)env->seg_cache[R_SS].base) != 0) << GEN_FLAG_ADDSEG_SHIFT; if (!(env->eflags & VM_MASK)) { VAR_7 |= (env->segs[R_CS] & 3) << GEN_FLAG_CPL_SHIFT; } else { VAR_7 |= (1 << GEN_FLAG_VM_SHIFT); VAR_7 |= (3 << GEN_FLAG_CPL_SHIFT); } VAR_7 |= (env->eflags & (IOPL_MASK | TF_MASK)); cs_base = env->seg_cache[R_CS].base; pc = cs_base + env->eip; tb = tb_find(&ptb, (unsigned long)pc, (unsigned long)cs_base, VAR_7); if (!tb) { spin_lock(&tb_lock); tb = tb_alloc((unsigned long)pc); if (!tb) { tb_flush(); tb = tb_alloc((unsigned long)pc); ptb = &tb_hash[tb_hash_func((unsigned long)pc)]; T0 = 0; } tc_ptr = code_gen_ptr; tb->tc_ptr = tc_ptr; tb->cs_base = (unsigned long)cs_base; tb->VAR_7 = VAR_7; VAR_5 = cpu_x86_gen_code(tb, CODE_GEN_MAX_SIZE, &VAR_4); if (VAR_5 != 0) { spin_unlock(&tb_lock); raise_exception(EXCP06_ILLOP); } *ptb = tb; tb->hash_next = NULL; tb_link(tb); code_gen_ptr = (void *)(((unsigned long)code_gen_ptr + VAR_4 + CODE_GEN_ALIGN - 1) & ~(CODE_GEN_ALIGN - 1)); spin_unlock(&tb_lock); } #ifdef DEBUG_EXEC if (loglevel) { fprintf(logfile, "Trace 0x%08lx [0x%08lx] %s\n", (long)tb->tc_ptr, (long)tb->pc, lookup_symbol((void *)tb->pc)); } #endif #ifdef __sparc__ T0 = tmp_T0; #endif if (T0 != 0 && !(env->eflags & TF_MASK)) { spin_lock(&tb_lock); tb_add_jump((TranslationBlock *)(T0 & ~3), T0 & 3, tb); spin_unlock(&tb_lock); } tc_ptr = tb->tc_ptr; VAR_6 = (void *)tc_ptr; #if defined(__sparc__) __asm__ __volatile__("call %0\n\t" "mov %%o7,%%i0" : : "r" (VAR_6) : "i0", "i1", "i2", "i3", "i4", "i5"); #elif defined(__arm__) asm volatile ("mov pc, %0\n\t" ".global exec_loop\n\t" "exec_loop:\n\t" : : "r" (VAR_6) : "r1", "r2", "r3", "r8", "r9", "r10", "r12", "r14"); #else VAR_6(); #endif } } VAR_5 = env->exception_index; env->eflags = env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK); #ifdef reg_EAX EAX = saved_EAX; #endif #ifdef reg_ECX ECX = saved_ECX; #endif #ifdef reg_EDX EDX = saved_EDX; #endif #ifdef reg_EBX EBX = saved_EBX; #endif #ifdef reg_ESP ESP = saved_ESP; #endif #ifdef reg_EBP EBP = saved_EBP; #endif #ifdef reg_ESI ESI = saved_ESI; #endif #ifdef reg_EDI EDI = saved_EDI; #endif #ifdef __sparc__ asm volatile ("mov %0, %%i7" : : "r" (saved_i7)); #endif T0 = VAR_1; T1 = VAR_2; A0 = VAR_3; env = saved_env; return VAR_5; }

void s390_pci_sclp_configure(SCCB *sccb) { PciCfgSccb *psccb = (PciCfgSccb *)sccb; S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(be32_to_cpu(psccb->aid)); uint16_t rc; if (be16_to_cpu(sccb->h.length) < 16) { rc = SCLP_RC_INSUFFICIENT_SCCB_LENGTH; goto out; } if (pbdev) { if (pbdev->configured) { rc = SCLP_RC_NO_ACTION_REQUIRED; } else { pbdev->configured = true; rc = SCLP_RC_NORMAL_COMPLETION; } } else { DPRINTF("sclp config no dev found\n"); rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED; } out: psccb->header.response_code = cpu_to_be16(rc); }

qemu

5d1abf234462d13bef3617cc2c55b6815703ddf2

void s390_pci_sclp_configure(SCCB *sccb) { PciCfgSccb *psccb = (PciCfgSccb *)sccb; S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(be32_to_cpu(psccb->aid)); uint16_t rc; if (be16_to_cpu(sccb->h.length) < 16) { rc = SCLP_RC_INSUFFICIENT_SCCB_LENGTH; goto out; } if (pbdev) { if (pbdev->configured) { rc = SCLP_RC_NO_ACTION_REQUIRED; } else { pbdev->configured = true; rc = SCLP_RC_NORMAL_COMPLETION; } } else { DPRINTF("sclp config no dev found\n"); rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED; } out: psccb->header.response_code = cpu_to_be16(rc); }

void FUNC_0(SCCB *VAR_0) { PciCfgSccb *psccb = (PciCfgSccb *)VAR_0; S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(be32_to_cpu(psccb->aid)); uint16_t rc; if (be16_to_cpu(VAR_0->h.length) < 16) { rc = SCLP_RC_INSUFFICIENT_SCCB_LENGTH; goto out; } if (pbdev) { if (pbdev->configured) { rc = SCLP_RC_NO_ACTION_REQUIRED; } else { pbdev->configured = true; rc = SCLP_RC_NORMAL_COMPLETION; } } else { DPRINTF("sclp config no dev found\n"); rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED; } out: psccb->header.response_code = cpu_to_be16(rc); }

static BlockJob *find_block_job(const char *device) { BlockDriverState *bs; bs = bdrv_find(device); if (!bs || !bs->job) { return NULL; } return bs->job; }

qemu

3d948cdf3760b52238038626a7ffa7d30913060b

static BlockJob *find_block_job(const char *device) { BlockDriverState *bs; bs = bdrv_find(device); if (!bs || !bs->job) { return NULL; } return bs->job; }

static BlockJob *FUNC_0(const char *device) { BlockDriverState *bs; bs = bdrv_find(device); if (!bs || !bs->job) { return NULL; } return bs->job; }

static void usb_host_realize(USBDevice *udev, Error **errp) { USBHostDevice *s = USB_HOST_DEVICE(udev); if (s->match.vendor_id > 0xffff) { error_setg(errp, "vendorid out of range"); return; } if (s->match.product_id > 0xffff) { error_setg(errp, "productid out of range"); return; } if (s->match.addr > 127) { error_setg(errp, "hostaddr out of range"); return; } loglevel = s->loglevel; udev->flags |= (1 << USB_DEV_FLAG_IS_HOST); udev->auto_attach = 0; QTAILQ_INIT(&s->requests); QTAILQ_INIT(&s->isorings); s->exit.notify = usb_host_exit_notifier; qemu_add_exit_notifier(&s->exit); QTAILQ_INSERT_TAIL(&hostdevs, s, next); usb_host_auto_check(NULL); }

qemu

e058fa2dd599ccc780d334558be9c1d155222b80

static void usb_host_realize(USBDevice *udev, Error **errp) { USBHostDevice *s = USB_HOST_DEVICE(udev); if (s->match.vendor_id > 0xffff) { error_setg(errp, "vendorid out of range"); return; } if (s->match.product_id > 0xffff) { error_setg(errp, "productid out of range"); return; } if (s->match.addr > 127) { error_setg(errp, "hostaddr out of range"); return; } loglevel = s->loglevel; udev->flags |= (1 << USB_DEV_FLAG_IS_HOST); udev->auto_attach = 0; QTAILQ_INIT(&s->requests); QTAILQ_INIT(&s->isorings); s->exit.notify = usb_host_exit_notifier; qemu_add_exit_notifier(&s->exit); QTAILQ_INSERT_TAIL(&hostdevs, s, next); usb_host_auto_check(NULL); }

static void FUNC_0(USBDevice *VAR_0, Error **VAR_1) { USBHostDevice *s = USB_HOST_DEVICE(VAR_0); if (s->match.vendor_id > 0xffff) { error_setg(VAR_1, "vendorid out of range"); return; } if (s->match.product_id > 0xffff) { error_setg(VAR_1, "productid out of range"); return; } if (s->match.addr > 127) { error_setg(VAR_1, "hostaddr out of range"); return; } loglevel = s->loglevel; VAR_0->flags |= (1 << USB_DEV_FLAG_IS_HOST); VAR_0->auto_attach = 0; QTAILQ_INIT(&s->requests); QTAILQ_INIT(&s->isorings); s->exit.notify = usb_host_exit_notifier; qemu_add_exit_notifier(&s->exit); QTAILQ_INSERT_TAIL(&hostdevs, s, next); usb_host_auto_check(NULL); }

static void rtas_int_off(sPAPREnvironment *spapr, uint32_t token, uint32_t nargs, target_ulong args, uint32_t nret, target_ulong rets) { struct ics_state *ics = spapr->icp->ics; uint32_t nr; if ((nargs != 1) || (nret != 1)) { rtas_st(rets, 0, -3); return; } nr = rtas_ld(args, 0); if (!ics_valid_irq(ics, nr)) { rtas_st(rets, 0, -3); return; } ics_write_xive(ics, nr, ics->irqs[nr - ics->offset].server, 0xff, ics->irqs[nr - ics->offset].priority); rtas_st(rets, 0, 0); /* Success */ }

qemu

210b580b106fa798149e28aa13c66b325a43204e

static void rtas_int_off(sPAPREnvironment *spapr, uint32_t token, uint32_t nargs, target_ulong args, uint32_t nret, target_ulong rets) { struct ics_state *ics = spapr->icp->ics; uint32_t nr; if ((nargs != 1) || (nret != 1)) { rtas_st(rets, 0, -3); return; } nr = rtas_ld(args, 0); if (!ics_valid_irq(ics, nr)) { rtas_st(rets, 0, -3); return; } ics_write_xive(ics, nr, ics->irqs[nr - ics->offset].server, 0xff, ics->irqs[nr - ics->offset].priority); rtas_st(rets, 0, 0); }

static void FUNC_0(sPAPREnvironment *VAR_0, uint32_t VAR_1, uint32_t VAR_2, target_ulong VAR_3, uint32_t VAR_4, target_ulong VAR_5) { struct ics_state *VAR_6 = VAR_0->icp->VAR_6; uint32_t nr; if ((VAR_2 != 1) || (VAR_4 != 1)) { rtas_st(VAR_5, 0, -3); return; } nr = rtas_ld(VAR_3, 0); if (!ics_valid_irq(VAR_6, nr)) { rtas_st(VAR_5, 0, -3); return; } ics_write_xive(VAR_6, nr, VAR_6->irqs[nr - VAR_6->offset].server, 0xff, VAR_6->irqs[nr - VAR_6->offset].priority); rtas_st(VAR_5, 0, 0); }

static void filter_mb_mbaff_edgecv( H264Context *h, uint8_t *pix, int stride, int16_t bS[7], int bsi, int qp ) { int index_a = qp + h->slice_alpha_c0_offset; int alpha = alpha_table[index_a]; int beta = beta_table[qp + h->slice_beta_offset]; if (alpha ==0 || beta == 0) return; if( bS[0] < 4 ) { int8_t tc[4]; tc[0] = tc0_table[index_a][bS[0*bsi]] + 1; tc[1] = tc0_table[index_a][bS[1*bsi]] + 1; tc[2] = tc0_table[index_a][bS[2*bsi]] + 1; tc[3] = tc0_table[index_a][bS[3*bsi]] + 1; h->h264dsp.h264_h_loop_filter_chroma_mbaff(pix, stride, alpha, beta, tc); } else { h->h264dsp.h264_h_loop_filter_chroma_mbaff_intra(pix, stride, alpha, beta); } }

FFmpeg

44ca80df3445a59bc065924d8c6110fa10367d01

static void filter_mb_mbaff_edgecv( H264Context *h, uint8_t *pix, int stride, int16_t bS[7], int bsi, int qp ) { int index_a = qp + h->slice_alpha_c0_offset; int alpha = alpha_table[index_a]; int beta = beta_table[qp + h->slice_beta_offset]; if (alpha ==0 || beta == 0) return; if( bS[0] < 4 ) { int8_t tc[4]; tc[0] = tc0_table[index_a][bS[0*bsi]] + 1; tc[1] = tc0_table[index_a][bS[1*bsi]] + 1; tc[2] = tc0_table[index_a][bS[2*bsi]] + 1; tc[3] = tc0_table[index_a][bS[3*bsi]] + 1; h->h264dsp.h264_h_loop_filter_chroma_mbaff(pix, stride, alpha, beta, tc); } else { h->h264dsp.h264_h_loop_filter_chroma_mbaff_intra(pix, stride, alpha, beta); } }

static void FUNC_0( H264Context *VAR_0, uint8_t *VAR_1, int VAR_2, int16_t VAR_3[7], int VAR_4, int VAR_5 ) { int VAR_6 = VAR_5 + VAR_0->slice_alpha_c0_offset; int VAR_7 = alpha_table[VAR_6]; int VAR_8 = beta_table[VAR_5 + VAR_0->slice_beta_offset]; if (VAR_7 ==0 || VAR_8 == 0) return; if( VAR_3[0] < 4 ) { int8_t tc[4]; tc[0] = tc0_table[VAR_6][VAR_3[0*VAR_4]] + 1; tc[1] = tc0_table[VAR_6][VAR_3[1*VAR_4]] + 1; tc[2] = tc0_table[VAR_6][VAR_3[2*VAR_4]] + 1; tc[3] = tc0_table[VAR_6][VAR_3[3*VAR_4]] + 1; VAR_0->h264dsp.h264_h_loop_filter_chroma_mbaff(VAR_1, VAR_2, VAR_7, VAR_8, tc); } else { VAR_0->h264dsp.h264_h_loop_filter_chroma_mbaff_intra(VAR_1, VAR_2, VAR_7, VAR_8); } }

static uint32_t gic_dist_readb(void *opaque, target_phys_addr_t offset) { GICState *s = (GICState *)opaque; uint32_t res; int irq; int i; int cpu; int cm; int mask; cpu = gic_get_current_cpu(s); cm = 1 << cpu; if (offset < 0x100) { if (offset == 0) return s->enabled; if (offset == 4) return ((s->num_irq / 32) - 1) | ((NUM_CPU(s) - 1) << 5); if (offset < 0x08) return 0; if (offset >= 0x80) { /* Interrupt Security , RAZ/WI */ return 0; } goto bad_reg; } else if (offset < 0x200) { /* Interrupt Set/Clear Enable. */ if (offset < 0x180) irq = (offset - 0x100) * 8; else irq = (offset - 0x180) * 8; irq += GIC_BASE_IRQ; if (irq >= s->num_irq) goto bad_reg; res = 0; for (i = 0; i < 8; i++) { if (GIC_TEST_ENABLED(irq + i, cm)) { res |= (1 << i); } } } else if (offset < 0x300) { /* Interrupt Set/Clear Pending. */ if (offset < 0x280) irq = (offset - 0x200) * 8; else irq = (offset - 0x280) * 8; irq += GIC_BASE_IRQ; if (irq >= s->num_irq) goto bad_reg; res = 0; mask = (irq < GIC_INTERNAL) ? cm : ALL_CPU_MASK; for (i = 0; i < 8; i++) { if (GIC_TEST_PENDING(irq + i, mask)) { res |= (1 << i); } } } else if (offset < 0x400) { /* Interrupt Active. */ irq = (offset - 0x300) * 8 + GIC_BASE_IRQ; if (irq >= s->num_irq) goto bad_reg; res = 0; mask = (irq < GIC_INTERNAL) ? cm : ALL_CPU_MASK; for (i = 0; i < 8; i++) { if (GIC_TEST_ACTIVE(irq + i, mask)) { res |= (1 << i); } } } else if (offset < 0x800) { /* Interrupt Priority. */ irq = (offset - 0x400) + GIC_BASE_IRQ; if (irq >= s->num_irq) goto bad_reg; res = GIC_GET_PRIORITY(irq, cpu); } else if (offset < 0xc00) { /* Interrupt CPU Target. */ if (s->num_cpu == 1 && s->revision != REV_11MPCORE) { /* For uniprocessor GICs these RAZ/WI */ res = 0; } else { irq = (offset - 0x800) + GIC_BASE_IRQ; if (irq >= s->num_irq) { goto bad_reg; } if (irq >= 29 && irq <= 31) { res = cm; } else { res = GIC_TARGET(irq); } } } else if (offset < 0xf00) { /* Interrupt Configuration. */ irq = (offset - 0xc00) * 2 + GIC_BASE_IRQ; if (irq >= s->num_irq) goto bad_reg; res = 0; for (i = 0; i < 4; i++) { if (GIC_TEST_MODEL(irq + i)) res |= (1 << (i * 2)); if (GIC_TEST_TRIGGER(irq + i)) res |= (2 << (i * 2)); } } else if (offset < 0xfe0) { goto bad_reg; } else /* offset >= 0xfe0 */ { if (offset & 3) { res = 0; } else { res = gic_id[(offset - 0xfe0) >> 2]; } } return res; bad_reg: hw_error("gic_dist_readb: Bad offset %x\n", (int)offset); return 0; }

qemu

a8170e5e97ad17ca169c64ba87ae2f53850dab4c

static uint32_t gic_dist_readb(void *opaque, target_phys_addr_t offset) { GICState *s = (GICState *)opaque; uint32_t res; int irq; int i; int cpu; int cm; int mask; cpu = gic_get_current_cpu(s); cm = 1 << cpu; if (offset < 0x100) { if (offset == 0) return s->enabled; if (offset == 4) return ((s->num_irq / 32) - 1) | ((NUM_CPU(s) - 1) << 5); if (offset < 0x08) return 0; if (offset >= 0x80) { return 0; } goto bad_reg; } else if (offset < 0x200) { if (offset < 0x180) irq = (offset - 0x100) * 8; else irq = (offset - 0x180) * 8; irq += GIC_BASE_IRQ; if (irq >= s->num_irq) goto bad_reg; res = 0; for (i = 0; i < 8; i++) { if (GIC_TEST_ENABLED(irq + i, cm)) { res |= (1 << i); } } } else if (offset < 0x300) { if (offset < 0x280) irq = (offset - 0x200) * 8; else irq = (offset - 0x280) * 8; irq += GIC_BASE_IRQ; if (irq >= s->num_irq) goto bad_reg; res = 0; mask = (irq < GIC_INTERNAL) ? cm : ALL_CPU_MASK; for (i = 0; i < 8; i++) { if (GIC_TEST_PENDING(irq + i, mask)) { res |= (1 << i); } } } else if (offset < 0x400) { irq = (offset - 0x300) * 8 + GIC_BASE_IRQ; if (irq >= s->num_irq) goto bad_reg; res = 0; mask = (irq < GIC_INTERNAL) ? cm : ALL_CPU_MASK; for (i = 0; i < 8; i++) { if (GIC_TEST_ACTIVE(irq + i, mask)) { res |= (1 << i); } } } else if (offset < 0x800) { irq = (offset - 0x400) + GIC_BASE_IRQ; if (irq >= s->num_irq) goto bad_reg; res = GIC_GET_PRIORITY(irq, cpu); } else if (offset < 0xc00) { if (s->num_cpu == 1 && s->revision != REV_11MPCORE) { res = 0; } else { irq = (offset - 0x800) + GIC_BASE_IRQ; if (irq >= s->num_irq) { goto bad_reg; } if (irq >= 29 && irq <= 31) { res = cm; } else { res = GIC_TARGET(irq); } } } else if (offset < 0xf00) { irq = (offset - 0xc00) * 2 + GIC_BASE_IRQ; if (irq >= s->num_irq) goto bad_reg; res = 0; for (i = 0; i < 4; i++) { if (GIC_TEST_MODEL(irq + i)) res |= (1 << (i * 2)); if (GIC_TEST_TRIGGER(irq + i)) res |= (2 << (i * 2)); } } else if (offset < 0xfe0) { goto bad_reg; } else { if (offset & 3) { res = 0; } else { res = gic_id[(offset - 0xfe0) >> 2]; } } return res; bad_reg: hw_error("gic_dist_readb: Bad offset %x\n", (int)offset); return 0; }

static uint32_t FUNC_0(void *opaque, target_phys_addr_t offset) { GICState *s = (GICState *)opaque; uint32_t res; int VAR_0; int VAR_1; int VAR_2; int VAR_3; int VAR_4; VAR_2 = gic_get_current_cpu(s); VAR_3 = 1 << VAR_2; if (offset < 0x100) { if (offset == 0) return s->enabled; if (offset == 4) return ((s->num_irq / 32) - 1) | ((NUM_CPU(s) - 1) << 5); if (offset < 0x08) return 0; if (offset >= 0x80) { return 0; } goto bad_reg; } else if (offset < 0x200) { if (offset < 0x180) VAR_0 = (offset - 0x100) * 8; else VAR_0 = (offset - 0x180) * 8; VAR_0 += GIC_BASE_IRQ; if (VAR_0 >= s->num_irq) goto bad_reg; res = 0; for (VAR_1 = 0; VAR_1 < 8; VAR_1++) { if (GIC_TEST_ENABLED(VAR_0 + VAR_1, VAR_3)) { res |= (1 << VAR_1); } } } else if (offset < 0x300) { if (offset < 0x280) VAR_0 = (offset - 0x200) * 8; else VAR_0 = (offset - 0x280) * 8; VAR_0 += GIC_BASE_IRQ; if (VAR_0 >= s->num_irq) goto bad_reg; res = 0; VAR_4 = (VAR_0 < GIC_INTERNAL) ? VAR_3 : ALL_CPU_MASK; for (VAR_1 = 0; VAR_1 < 8; VAR_1++) { if (GIC_TEST_PENDING(VAR_0 + VAR_1, VAR_4)) { res |= (1 << VAR_1); } } } else if (offset < 0x400) { VAR_0 = (offset - 0x300) * 8 + GIC_BASE_IRQ; if (VAR_0 >= s->num_irq) goto bad_reg; res = 0; VAR_4 = (VAR_0 < GIC_INTERNAL) ? VAR_3 : ALL_CPU_MASK; for (VAR_1 = 0; VAR_1 < 8; VAR_1++) { if (GIC_TEST_ACTIVE(VAR_0 + VAR_1, VAR_4)) { res |= (1 << VAR_1); } } } else if (offset < 0x800) { VAR_0 = (offset - 0x400) + GIC_BASE_IRQ; if (VAR_0 >= s->num_irq) goto bad_reg; res = GIC_GET_PRIORITY(VAR_0, VAR_2); } else if (offset < 0xc00) { if (s->num_cpu == 1 && s->revision != REV_11MPCORE) { res = 0; } else { VAR_0 = (offset - 0x800) + GIC_BASE_IRQ; if (VAR_0 >= s->num_irq) { goto bad_reg; } if (VAR_0 >= 29 && VAR_0 <= 31) { res = VAR_3; } else { res = GIC_TARGET(VAR_0); } } } else if (offset < 0xf00) { VAR_0 = (offset - 0xc00) * 2 + GIC_BASE_IRQ; if (VAR_0 >= s->num_irq) goto bad_reg; res = 0; for (VAR_1 = 0; VAR_1 < 4; VAR_1++) { if (GIC_TEST_MODEL(VAR_0 + VAR_1)) res |= (1 << (VAR_1 * 2)); if (GIC_TEST_TRIGGER(VAR_0 + VAR_1)) res |= (2 << (VAR_1 * 2)); } } else if (offset < 0xfe0) { goto bad_reg; } else { if (offset & 3) { res = 0; } else { res = gic_id[(offset - 0xfe0) >> 2]; } } return res; bad_reg: hw_error("FUNC_0: Bad offset %x\n", (int)offset); return 0; }

static void qmp_serialize(void *native_in, void **datap, VisitorFunc visit, Error **errp) { QmpSerializeData *d = g_malloc0(sizeof(*d)); d->qov = qmp_output_visitor_new(&d->obj); visit(d->qov, &native_in, errp); *datap = d; }

qemu

7d5e199ade76c53ec316ab6779800581bb47c50a

static void qmp_serialize(void *native_in, void **datap, VisitorFunc visit, Error **errp) { QmpSerializeData *d = g_malloc0(sizeof(*d)); d->qov = qmp_output_visitor_new(&d->obj); visit(d->qov, &native_in, errp); *datap = d; }

static void FUNC_0(void *VAR_0, void **VAR_1, VisitorFunc VAR_2, Error **VAR_3) { QmpSerializeData *d = g_malloc0(sizeof(*d)); d->qov = qmp_output_visitor_new(&d->obj); VAR_2(d->qov, &VAR_0, VAR_3); *VAR_1 = d; }

static void tcg_target_init(TCGContext *s) { tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff); tcg_regset_set32(tcg_target_call_clobber_regs, 0, (1 << TCG_REG_R0) | #ifdef _CALL_DARWIN (1 << TCG_REG_R2) | #endif (1 << TCG_REG_R3) | (1 << TCG_REG_R4) | (1 << TCG_REG_R5) | (1 << TCG_REG_R6) | (1 << TCG_REG_R7) | (1 << TCG_REG_R8) | (1 << TCG_REG_R9) | (1 << TCG_REG_R10) | (1 << TCG_REG_R11) | (1 << TCG_REG_R12) ); tcg_regset_clear(s->reserved_regs); tcg_regset_set_reg(s->reserved_regs, TCG_REG_R0); tcg_regset_set_reg(s->reserved_regs, TCG_REG_R1); #ifndef _CALL_DARWIN tcg_regset_set_reg(s->reserved_regs, TCG_REG_R2); #endif #ifdef _CALL_SYSV tcg_regset_set_reg(s->reserved_regs, TCG_REG_R13); #endif tcg_add_target_add_op_defs(ppc_op_defs); }

qemu

24f50d7ea5896a30b0e78f68884586bb8b40ff97

static void tcg_target_init(TCGContext *s) { tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff); tcg_regset_set32(tcg_target_call_clobber_regs, 0, (1 << TCG_REG_R0) | #ifdef _CALL_DARWIN (1 << TCG_REG_R2) | #endif (1 << TCG_REG_R3) | (1 << TCG_REG_R4) | (1 << TCG_REG_R5) | (1 << TCG_REG_R6) | (1 << TCG_REG_R7) | (1 << TCG_REG_R8) | (1 << TCG_REG_R9) | (1 << TCG_REG_R10) | (1 << TCG_REG_R11) | (1 << TCG_REG_R12) ); tcg_regset_clear(s->reserved_regs); tcg_regset_set_reg(s->reserved_regs, TCG_REG_R0); tcg_regset_set_reg(s->reserved_regs, TCG_REG_R1); #ifndef _CALL_DARWIN tcg_regset_set_reg(s->reserved_regs, TCG_REG_R2); #endif #ifdef _CALL_SYSV tcg_regset_set_reg(s->reserved_regs, TCG_REG_R13); #endif tcg_add_target_add_op_defs(ppc_op_defs); }

static void FUNC_0(TCGContext *VAR_0) { tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff); tcg_regset_set32(tcg_target_call_clobber_regs, 0, (1 << TCG_REG_R0) | #ifdef _CALL_DARWIN (1 << TCG_REG_R2) | #endif (1 << TCG_REG_R3) | (1 << TCG_REG_R4) | (1 << TCG_REG_R5) | (1 << TCG_REG_R6) | (1 << TCG_REG_R7) | (1 << TCG_REG_R8) | (1 << TCG_REG_R9) | (1 << TCG_REG_R10) | (1 << TCG_REG_R11) | (1 << TCG_REG_R12) ); tcg_regset_clear(VAR_0->reserved_regs); tcg_regset_set_reg(VAR_0->reserved_regs, TCG_REG_R0); tcg_regset_set_reg(VAR_0->reserved_regs, TCG_REG_R1); #ifndef _CALL_DARWIN tcg_regset_set_reg(VAR_0->reserved_regs, TCG_REG_R2); #endif #ifdef _CALL_SYSV tcg_regset_set_reg(VAR_0->reserved_regs, TCG_REG_R13); #endif tcg_add_target_add_op_defs(ppc_op_defs); }

static void emulate_spapr_hypercall(PPCVirtualHypervisor *vhyp, PowerPCCPU *cpu) { CPUPPCState *env = &cpu->env; if (msr_pr) { hcall_dprintf("Hypercall made with MSR[PR]=1\n"); env->gpr[3] = H_PRIVILEGE; } else { env->gpr[3] = spapr_hypercall(cpu, env->gpr[3], &env->gpr[4]); } }

qemu

8d04fb55dec381bc5105cb47f29d918e579e8cbd

static void emulate_spapr_hypercall(PPCVirtualHypervisor *vhyp, PowerPCCPU *cpu) { CPUPPCState *env = &cpu->env; if (msr_pr) { hcall_dprintf("Hypercall made with MSR[PR]=1\n"); env->gpr[3] = H_PRIVILEGE; } else { env->gpr[3] = spapr_hypercall(cpu, env->gpr[3], &env->gpr[4]); } }

static void FUNC_0(PPCVirtualHypervisor *VAR_0, PowerPCCPU *VAR_1) { CPUPPCState *env = &VAR_1->env; if (msr_pr) { hcall_dprintf("Hypercall made with MSR[PR]=1\n"); env->gpr[3] = H_PRIVILEGE; } else { env->gpr[3] = spapr_hypercall(VAR_1, env->gpr[3], &env->gpr[4]); } }

test_opts_range_unvisited(void) { intList *list = NULL; intList *tail; QemuOpts *opts; Visitor *v; opts = qemu_opts_parse(qemu_find_opts("userdef"), "ilist=0-2", false, &error_abort); v = opts_visitor_new(opts); visit_start_struct(v, NULL, NULL, 0, &error_abort); /* Would be simpler if the visitor genuinely supported virtual walks */ visit_start_list(v, "ilist", (GenericList **)&list, sizeof(*list), &error_abort); tail = list; visit_type_int(v, NULL, &tail->value, &error_abort); g_assert_cmpint(tail->value, ==, 0); tail = (intList *)visit_next_list(v, (GenericList *)tail, sizeof(*list)); g_assert(tail); visit_type_int(v, NULL, &tail->value, &error_abort); g_assert_cmpint(tail->value, ==, 1); tail = (intList *)visit_next_list(v, (GenericList *)tail, sizeof(*list)); g_assert(tail); visit_check_list(v, &error_abort); /* BUG: unvisited tail not reported */ visit_end_list(v, (void **)&list); visit_check_struct(v, &error_abort); visit_end_struct(v, NULL); qapi_free_intList(list); visit_free(v); qemu_opts_del(opts); }

qemu

21f88d021d0d2b4ecee8f6cd6ca63a943a3ce71d

test_opts_range_unvisited(void) { intList *list = NULL; intList *tail; QemuOpts *opts; Visitor *v; opts = qemu_opts_parse(qemu_find_opts("userdef"), "ilist=0-2", false, &error_abort); v = opts_visitor_new(opts); visit_start_struct(v, NULL, NULL, 0, &error_abort); visit_start_list(v, "ilist", (GenericList **)&list, sizeof(*list), &error_abort); tail = list; visit_type_int(v, NULL, &tail->value, &error_abort); g_assert_cmpint(tail->value, ==, 0); tail = (intList *)visit_next_list(v, (GenericList *)tail, sizeof(*list)); g_assert(tail); visit_type_int(v, NULL, &tail->value, &error_abort); g_assert_cmpint(tail->value, ==, 1); tail = (intList *)visit_next_list(v, (GenericList *)tail, sizeof(*list)); g_assert(tail); visit_check_list(v, &error_abort); visit_end_list(v, (void **)&list); visit_check_struct(v, &error_abort); visit_end_struct(v, NULL); qapi_free_intList(list); visit_free(v); qemu_opts_del(opts); }

FUNC_0(void) { intList *list = NULL; intList *tail; QemuOpts *opts; Visitor *v; opts = qemu_opts_parse(qemu_find_opts("userdef"), "ilist=0-2", false, &error_abort); v = opts_visitor_new(opts); visit_start_struct(v, NULL, NULL, 0, &error_abort); visit_start_list(v, "ilist", (GenericList **)&list, sizeof(*list), &error_abort); tail = list; visit_type_int(v, NULL, &tail->value, &error_abort); g_assert_cmpint(tail->value, ==, 0); tail = (intList *)visit_next_list(v, (GenericList *)tail, sizeof(*list)); g_assert(tail); visit_type_int(v, NULL, &tail->value, &error_abort); g_assert_cmpint(tail->value, ==, 1); tail = (intList *)visit_next_list(v, (GenericList *)tail, sizeof(*list)); g_assert(tail); visit_check_list(v, &error_abort); visit_end_list(v, (void **)&list); visit_check_struct(v, &error_abort); visit_end_struct(v, NULL); qapi_free_intList(list); visit_free(v); qemu_opts_del(opts); }

static int decode_subframe(WMAProDecodeCtx *s) { int offset = s->samples_per_frame; int subframe_len = s->samples_per_frame; int i; int total_samples = s->samples_per_frame * s->avctx->channels; int transmit_coeffs = 0; int cur_subwoofer_cutoff; s->subframe_offset = get_bits_count(&s->gb); /** reset channel context and find the next block offset and size == the next block of the channel with the smallest number of decoded samples */ for (i = 0; i < s->avctx->channels; i++) { s->channel[i].grouped = 0; if (offset > s->channel[i].decoded_samples) { offset = s->channel[i].decoded_samples; subframe_len = s->channel[i].subframe_len[s->channel[i].cur_subframe]; } } av_dlog(s->avctx, "processing subframe with offset %i len %i\n", offset, subframe_len); /** get a list of all channels that contain the estimated block */ s->channels_for_cur_subframe = 0; for (i = 0; i < s->avctx->channels; i++) { const int cur_subframe = s->channel[i].cur_subframe; /** subtract already processed samples */ total_samples -= s->channel[i].decoded_samples; /** and count if there are multiple subframes that match our profile */ if (offset == s->channel[i].decoded_samples && subframe_len == s->channel[i].subframe_len[cur_subframe]) { total_samples -= s->channel[i].subframe_len[cur_subframe]; s->channel[i].decoded_samples += s->channel[i].subframe_len[cur_subframe]; s->channel_indexes_for_cur_subframe[s->channels_for_cur_subframe] = i; ++s->channels_for_cur_subframe; } } /** check if the frame will be complete after processing the estimated block */ if (!total_samples) s->parsed_all_subframes = 1; av_dlog(s->avctx, "subframe is part of %i channels\n", s->channels_for_cur_subframe); /** calculate number of scale factor bands and their offsets */ s->table_idx = av_log2(s->samples_per_frame/subframe_len); s->num_bands = s->num_sfb[s->table_idx]; s->cur_sfb_offsets = s->sfb_offsets[s->table_idx]; cur_subwoofer_cutoff = s->subwoofer_cutoffs[s->table_idx]; /** configure the decoder for the current subframe */ for (i = 0; i < s->channels_for_cur_subframe; i++) { int c = s->channel_indexes_for_cur_subframe[i]; s->channel[c].coeffs = &s->channel[c].out[(s->samples_per_frame >> 1) + offset]; } s->subframe_len = subframe_len; s->esc_len = av_log2(s->subframe_len - 1) + 1; /** skip extended header if any */ if (get_bits1(&s->gb)) { int num_fill_bits; if (!(num_fill_bits = get_bits(&s->gb, 2))) { int len = get_bits(&s->gb, 4); num_fill_bits = get_bits(&s->gb, len) + 1; } if (num_fill_bits >= 0) { if (get_bits_count(&s->gb) + num_fill_bits > s->num_saved_bits) { av_log(s->avctx, AV_LOG_ERROR, "invalid number of fill bits\n"); return AVERROR_INVALIDDATA; } skip_bits_long(&s->gb, num_fill_bits); } } /** no idea for what the following bit is used */ if (get_bits1(&s->gb)) { avpriv_request_sample(s->avctx, "Reserved bit"); return AVERROR_PATCHWELCOME; } if (decode_channel_transform(s) < 0) return AVERROR_INVALIDDATA; for (i = 0; i < s->channels_for_cur_subframe; i++) { int c = s->channel_indexes_for_cur_subframe[i]; if ((s->channel[c].transmit_coefs = get_bits1(&s->gb))) transmit_coeffs = 1; } if (transmit_coeffs) { int step; int quant_step = 90 * s->bits_per_sample >> 4; /** decode number of vector coded coefficients */ if ((s->transmit_num_vec_coeffs = get_bits1(&s->gb))) { int num_bits = av_log2((s->subframe_len + 3)/4) + 1; for (i = 0; i < s->channels_for_cur_subframe; i++) { int c = s->channel_indexes_for_cur_subframe[i]; int num_vec_coeffs = get_bits(&s->gb, num_bits) << 2; if (num_vec_coeffs > WMAPRO_BLOCK_MAX_SIZE) { av_log(s->avctx, AV_LOG_ERROR, "num_vec_coeffs %d is too large\n", num_vec_coeffs); return AVERROR_INVALIDDATA; } s->channel[c].num_vec_coeffs = num_vec_coeffs; } } else { for (i = 0; i < s->channels_for_cur_subframe; i++) { int c = s->channel_indexes_for_cur_subframe[i]; s->channel[c].num_vec_coeffs = s->subframe_len; } } /** decode quantization step */ step = get_sbits(&s->gb, 6); quant_step += step; if (step == -32 || step == 31) { const int sign = (step == 31) - 1; int quant = 0; while (get_bits_count(&s->gb) + 5 < s->num_saved_bits && (step = get_bits(&s->gb, 5)) == 31) { quant += 31; } quant_step += ((quant + step) ^ sign) - sign; } if (quant_step < 0) { av_log(s->avctx, AV_LOG_DEBUG, "negative quant step\n"); } /** decode quantization step modifiers for every channel */ if (s->channels_for_cur_subframe == 1) { s->channel[s->channel_indexes_for_cur_subframe[0]].quant_step = quant_step; } else { int modifier_len = get_bits(&s->gb, 3); for (i = 0; i < s->channels_for_cur_subframe; i++) { int c = s->channel_indexes_for_cur_subframe[i]; s->channel[c].quant_step = quant_step; if (get_bits1(&s->gb)) { if (modifier_len) { s->channel[c].quant_step += get_bits(&s->gb, modifier_len) + 1; } else ++s->channel[c].quant_step; } } } /** decode scale factors */ if (decode_scale_factors(s) < 0) return AVERROR_INVALIDDATA; } av_dlog(s->avctx, "BITSTREAM: subframe header length was %i\n", get_bits_count(&s->gb) - s->subframe_offset); /** parse coefficients */ for (i = 0; i < s->channels_for_cur_subframe; i++) { int c = s->channel_indexes_for_cur_subframe[i]; if (s->channel[c].transmit_coefs && get_bits_count(&s->gb) < s->num_saved_bits) { decode_coeffs(s, c); } else memset(s->channel[c].coeffs, 0, sizeof(*s->channel[c].coeffs) * subframe_len); } av_dlog(s->avctx, "BITSTREAM: subframe length was %i\n", get_bits_count(&s->gb) - s->subframe_offset); if (transmit_coeffs) { FFTContext *mdct = &s->mdct_ctx[av_log2(subframe_len) - WMAPRO_BLOCK_MIN_BITS]; /** reconstruct the per channel data */ inverse_channel_transform(s); for (i = 0; i < s->channels_for_cur_subframe; i++) { int c = s->channel_indexes_for_cur_subframe[i]; const int* sf = s->channel[c].scale_factors; int b; if (c == s->lfe_channel) memset(&s->tmp[cur_subwoofer_cutoff], 0, sizeof(*s->tmp) * (subframe_len - cur_subwoofer_cutoff)); /** inverse quantization and rescaling */ for (b = 0; b < s->num_bands; b++) { const int end = FFMIN(s->cur_sfb_offsets[b+1], s->subframe_len); const int exp = s->channel[c].quant_step - (s->channel[c].max_scale_factor - *sf++) * s->channel[c].scale_factor_step; const float quant = pow(10.0, exp / 20.0); int start = s->cur_sfb_offsets[b]; s->fdsp.vector_fmul_scalar(s->tmp + start, s->channel[c].coeffs + start, quant, end - start); } /** apply imdct (imdct_half == DCTIV with reverse) */ mdct->imdct_half(mdct, s->channel[c].coeffs, s->tmp); } } /** window and overlapp-add */ wmapro_window(s); /** handled one subframe */ for (i = 0; i < s->channels_for_cur_subframe; i++) { int c = s->channel_indexes_for_cur_subframe[i]; if (s->channel[c].cur_subframe >= s->channel[c].num_subframes) { av_log(s->avctx, AV_LOG_ERROR, "broken subframe\n"); return AVERROR_INVALIDDATA; } ++s->channel[c].cur_subframe; } return 0; }

FFmpeg

38229362529ed1619d8ebcc81ecde85b23b45895

static int decode_subframe(WMAProDecodeCtx *s) { int offset = s->samples_per_frame; int subframe_len = s->samples_per_frame; int i; int total_samples = s->samples_per_frame * s->avctx->channels; int transmit_coeffs = 0; int cur_subwoofer_cutoff; s->subframe_offset = get_bits_count(&s->gb); for (i = 0; i < s->avctx->channels; i++) { s->channel[i].grouped = 0; if (offset > s->channel[i].decoded_samples) { offset = s->channel[i].decoded_samples; subframe_len = s->channel[i].subframe_len[s->channel[i].cur_subframe]; } } av_dlog(s->avctx, "processing subframe with offset %i len %i\n", offset, subframe_len); s->channels_for_cur_subframe = 0; for (i = 0; i < s->avctx->channels; i++) { const int cur_subframe = s->channel[i].cur_subframe; total_samples -= s->channel[i].decoded_samples; if (offset == s->channel[i].decoded_samples && subframe_len == s->channel[i].subframe_len[cur_subframe]) { total_samples -= s->channel[i].subframe_len[cur_subframe]; s->channel[i].decoded_samples += s->channel[i].subframe_len[cur_subframe]; s->channel_indexes_for_cur_subframe[s->channels_for_cur_subframe] = i; ++s->channels_for_cur_subframe; } } if (!total_samples) s->parsed_all_subframes = 1; av_dlog(s->avctx, "subframe is part of %i channels\n", s->channels_for_cur_subframe); s->table_idx = av_log2(s->samples_per_frame/subframe_len); s->num_bands = s->num_sfb[s->table_idx]; s->cur_sfb_offsets = s->sfb_offsets[s->table_idx]; cur_subwoofer_cutoff = s->subwoofer_cutoffs[s->table_idx]; for (i = 0; i < s->channels_for_cur_subframe; i++) { int c = s->channel_indexes_for_cur_subframe[i]; s->channel[c].coeffs = &s->channel[c].out[(s->samples_per_frame >> 1) + offset]; } s->subframe_len = subframe_len; s->esc_len = av_log2(s->subframe_len - 1) + 1; if (get_bits1(&s->gb)) { int num_fill_bits; if (!(num_fill_bits = get_bits(&s->gb, 2))) { int len = get_bits(&s->gb, 4); num_fill_bits = get_bits(&s->gb, len) + 1; } if (num_fill_bits >= 0) { if (get_bits_count(&s->gb) + num_fill_bits > s->num_saved_bits) { av_log(s->avctx, AV_LOG_ERROR, "invalid number of fill bits\n"); return AVERROR_INVALIDDATA; } skip_bits_long(&s->gb, num_fill_bits); } } if (get_bits1(&s->gb)) { avpriv_request_sample(s->avctx, "Reserved bit"); return AVERROR_PATCHWELCOME; } if (decode_channel_transform(s) < 0) return AVERROR_INVALIDDATA; for (i = 0; i < s->channels_for_cur_subframe; i++) { int c = s->channel_indexes_for_cur_subframe[i]; if ((s->channel[c].transmit_coefs = get_bits1(&s->gb))) transmit_coeffs = 1; } if (transmit_coeffs) { int step; int quant_step = 90 * s->bits_per_sample >> 4; if ((s->transmit_num_vec_coeffs = get_bits1(&s->gb))) { int num_bits = av_log2((s->subframe_len + 3)/4) + 1; for (i = 0; i < s->channels_for_cur_subframe; i++) { int c = s->channel_indexes_for_cur_subframe[i]; int num_vec_coeffs = get_bits(&s->gb, num_bits) << 2; if (num_vec_coeffs > WMAPRO_BLOCK_MAX_SIZE) { av_log(s->avctx, AV_LOG_ERROR, "num_vec_coeffs %d is too large\n", num_vec_coeffs); return AVERROR_INVALIDDATA; } s->channel[c].num_vec_coeffs = num_vec_coeffs; } } else { for (i = 0; i < s->channels_for_cur_subframe; i++) { int c = s->channel_indexes_for_cur_subframe[i]; s->channel[c].num_vec_coeffs = s->subframe_len; } } step = get_sbits(&s->gb, 6); quant_step += step; if (step == -32 || step == 31) { const int sign = (step == 31) - 1; int quant = 0; while (get_bits_count(&s->gb) + 5 < s->num_saved_bits && (step = get_bits(&s->gb, 5)) == 31) { quant += 31; } quant_step += ((quant + step) ^ sign) - sign; } if (quant_step < 0) { av_log(s->avctx, AV_LOG_DEBUG, "negative quant step\n"); } if (s->channels_for_cur_subframe == 1) { s->channel[s->channel_indexes_for_cur_subframe[0]].quant_step = quant_step; } else { int modifier_len = get_bits(&s->gb, 3); for (i = 0; i < s->channels_for_cur_subframe; i++) { int c = s->channel_indexes_for_cur_subframe[i]; s->channel[c].quant_step = quant_step; if (get_bits1(&s->gb)) { if (modifier_len) { s->channel[c].quant_step += get_bits(&s->gb, modifier_len) + 1; } else ++s->channel[c].quant_step; } } } if (decode_scale_factors(s) < 0) return AVERROR_INVALIDDATA; } av_dlog(s->avctx, "BITSTREAM: subframe header length was %i\n", get_bits_count(&s->gb) - s->subframe_offset); for (i = 0; i < s->channels_for_cur_subframe; i++) { int c = s->channel_indexes_for_cur_subframe[i]; if (s->channel[c].transmit_coefs && get_bits_count(&s->gb) < s->num_saved_bits) { decode_coeffs(s, c); } else memset(s->channel[c].coeffs, 0, sizeof(*s->channel[c].coeffs) * subframe_len); } av_dlog(s->avctx, "BITSTREAM: subframe length was %i\n", get_bits_count(&s->gb) - s->subframe_offset); if (transmit_coeffs) { FFTContext *mdct = &s->mdct_ctx[av_log2(subframe_len) - WMAPRO_BLOCK_MIN_BITS]; inverse_channel_transform(s); for (i = 0; i < s->channels_for_cur_subframe; i++) { int c = s->channel_indexes_for_cur_subframe[i]; const int* sf = s->channel[c].scale_factors; int b; if (c == s->lfe_channel) memset(&s->tmp[cur_subwoofer_cutoff], 0, sizeof(*s->tmp) * (subframe_len - cur_subwoofer_cutoff)); for (b = 0; b < s->num_bands; b++) { const int end = FFMIN(s->cur_sfb_offsets[b+1], s->subframe_len); const int exp = s->channel[c].quant_step - (s->channel[c].max_scale_factor - *sf++) * s->channel[c].scale_factor_step; const float quant = pow(10.0, exp / 20.0); int start = s->cur_sfb_offsets[b]; s->fdsp.vector_fmul_scalar(s->tmp + start, s->channel[c].coeffs + start, quant, end - start); } mdct->imdct_half(mdct, s->channel[c].coeffs, s->tmp); } } wmapro_window(s); for (i = 0; i < s->channels_for_cur_subframe; i++) { int c = s->channel_indexes_for_cur_subframe[i]; if (s->channel[c].cur_subframe >= s->channel[c].num_subframes) { av_log(s->avctx, AV_LOG_ERROR, "broken subframe\n"); return AVERROR_INVALIDDATA; } ++s->channel[c].cur_subframe; } return 0; }

static int FUNC_0(WMAProDecodeCtx *VAR_0) { int VAR_1 = VAR_0->samples_per_frame; int VAR_2 = VAR_0->samples_per_frame; int VAR_3; int VAR_4 = VAR_0->samples_per_frame * VAR_0->avctx->channels; int VAR_5 = 0; int VAR_6; VAR_0->subframe_offset = get_bits_count(&VAR_0->gb); for (VAR_3 = 0; VAR_3 < VAR_0->avctx->channels; VAR_3++) { VAR_0->channel[VAR_3].grouped = 0; if (VAR_1 > VAR_0->channel[VAR_3].decoded_samples) { VAR_1 = VAR_0->channel[VAR_3].decoded_samples; VAR_2 = VAR_0->channel[VAR_3].VAR_2[VAR_0->channel[VAR_3].cur_subframe]; } } av_dlog(VAR_0->avctx, "processing subframe with VAR_1 %VAR_3 VAR_8 %VAR_3\n", VAR_1, VAR_2); VAR_0->channels_for_cur_subframe = 0; for (VAR_3 = 0; VAR_3 < VAR_0->avctx->channels; VAR_3++) { const int cur_subframe = VAR_0->channel[VAR_3].cur_subframe; VAR_4 -= VAR_0->channel[VAR_3].decoded_samples; if (VAR_1 == VAR_0->channel[VAR_3].decoded_samples && VAR_2 == VAR_0->channel[VAR_3].VAR_2[cur_subframe]) { VAR_4 -= VAR_0->channel[VAR_3].VAR_2[cur_subframe]; VAR_0->channel[VAR_3].decoded_samples += VAR_0->channel[VAR_3].VAR_2[cur_subframe]; VAR_0->channel_indexes_for_cur_subframe[VAR_0->channels_for_cur_subframe] = VAR_3; ++VAR_0->channels_for_cur_subframe; } } if (!VAR_4) VAR_0->parsed_all_subframes = 1; av_dlog(VAR_0->avctx, "subframe is part of %VAR_3 channels\n", VAR_0->channels_for_cur_subframe); VAR_0->table_idx = av_log2(VAR_0->samples_per_frame/VAR_2); VAR_0->num_bands = VAR_0->num_sfb[VAR_0->table_idx]; VAR_0->cur_sfb_offsets = VAR_0->sfb_offsets[VAR_0->table_idx]; VAR_6 = VAR_0->subwoofer_cutoffs[VAR_0->table_idx]; for (VAR_3 = 0; VAR_3 < VAR_0->channels_for_cur_subframe; VAR_3++) { int c = VAR_0->channel_indexes_for_cur_subframe[VAR_3]; VAR_0->channel[c].coeffs = &VAR_0->channel[c].out[(VAR_0->samples_per_frame >> 1) + VAR_1]; } VAR_0->VAR_2 = VAR_2; VAR_0->esc_len = av_log2(VAR_0->VAR_2 - 1) + 1; if (get_bits1(&VAR_0->gb)) { int VAR_7; if (!(VAR_7 = get_bits(&VAR_0->gb, 2))) { int VAR_8 = get_bits(&VAR_0->gb, 4); VAR_7 = get_bits(&VAR_0->gb, VAR_8) + 1; } if (VAR_7 >= 0) { if (get_bits_count(&VAR_0->gb) + VAR_7 > VAR_0->num_saved_bits) { av_log(VAR_0->avctx, AV_LOG_ERROR, "invalid number of fill bits\n"); return AVERROR_INVALIDDATA; } skip_bits_long(&VAR_0->gb, VAR_7); } } if (get_bits1(&VAR_0->gb)) { avpriv_request_sample(VAR_0->avctx, "Reserved bit"); return AVERROR_PATCHWELCOME; } if (decode_channel_transform(VAR_0) < 0) return AVERROR_INVALIDDATA; for (VAR_3 = 0; VAR_3 < VAR_0->channels_for_cur_subframe; VAR_3++) { int c = VAR_0->channel_indexes_for_cur_subframe[VAR_3]; if ((VAR_0->channel[c].transmit_coefs = get_bits1(&VAR_0->gb))) VAR_5 = 1; } if (VAR_5) { int VAR_9; int VAR_10 = 90 * VAR_0->bits_per_sample >> 4; if ((VAR_0->transmit_num_vec_coeffs = get_bits1(&VAR_0->gb))) { int VAR_11 = av_log2((VAR_0->VAR_2 + 3)/4) + 1; for (VAR_3 = 0; VAR_3 < VAR_0->channels_for_cur_subframe; VAR_3++) { int c = VAR_0->channel_indexes_for_cur_subframe[VAR_3]; int num_vec_coeffs = get_bits(&VAR_0->gb, VAR_11) << 2; if (num_vec_coeffs > WMAPRO_BLOCK_MAX_SIZE) { av_log(VAR_0->avctx, AV_LOG_ERROR, "num_vec_coeffs %d is too large\n", num_vec_coeffs); return AVERROR_INVALIDDATA; } VAR_0->channel[c].num_vec_coeffs = num_vec_coeffs; } } else { for (VAR_3 = 0; VAR_3 < VAR_0->channels_for_cur_subframe; VAR_3++) { int c = VAR_0->channel_indexes_for_cur_subframe[VAR_3]; VAR_0->channel[c].num_vec_coeffs = VAR_0->VAR_2; } } VAR_9 = get_sbits(&VAR_0->gb, 6); VAR_10 += VAR_9; if (VAR_9 == -32 || VAR_9 == 31) { const int VAR_12 = (VAR_9 == 31) - 1; int VAR_13 = 0; while (get_bits_count(&VAR_0->gb) + 5 < VAR_0->num_saved_bits && (VAR_9 = get_bits(&VAR_0->gb, 5)) == 31) { VAR_13 += 31; } VAR_10 += ((VAR_13 + VAR_9) ^ VAR_12) - VAR_12; } if (VAR_10 < 0) { av_log(VAR_0->avctx, AV_LOG_DEBUG, "negative VAR_13 VAR_9\n"); } if (VAR_0->channels_for_cur_subframe == 1) { VAR_0->channel[VAR_0->channel_indexes_for_cur_subframe[0]].VAR_10 = VAR_10; } else { int VAR_14 = get_bits(&VAR_0->gb, 3); for (VAR_3 = 0; VAR_3 < VAR_0->channels_for_cur_subframe; VAR_3++) { int c = VAR_0->channel_indexes_for_cur_subframe[VAR_3]; VAR_0->channel[c].VAR_10 = VAR_10; if (get_bits1(&VAR_0->gb)) { if (VAR_14) { VAR_0->channel[c].VAR_10 += get_bits(&VAR_0->gb, VAR_14) + 1; } else ++VAR_0->channel[c].VAR_10; } } } if (decode_scale_factors(VAR_0) < 0) return AVERROR_INVALIDDATA; } av_dlog(VAR_0->avctx, "BITSTREAM: subframe header length was %VAR_3\n", get_bits_count(&VAR_0->gb) - VAR_0->subframe_offset); for (VAR_3 = 0; VAR_3 < VAR_0->channels_for_cur_subframe; VAR_3++) { int c = VAR_0->channel_indexes_for_cur_subframe[VAR_3]; if (VAR_0->channel[c].transmit_coefs && get_bits_count(&VAR_0->gb) < VAR_0->num_saved_bits) { decode_coeffs(VAR_0, c); } else memset(VAR_0->channel[c].coeffs, 0, sizeof(*VAR_0->channel[c].coeffs) * VAR_2); } av_dlog(VAR_0->avctx, "BITSTREAM: subframe length was %VAR_3\n", get_bits_count(&VAR_0->gb) - VAR_0->subframe_offset); if (VAR_5) { FFTContext *mdct = &VAR_0->mdct_ctx[av_log2(VAR_2) - WMAPRO_BLOCK_MIN_BITS]; inverse_channel_transform(VAR_0); for (VAR_3 = 0; VAR_3 < VAR_0->channels_for_cur_subframe; VAR_3++) { int c = VAR_0->channel_indexes_for_cur_subframe[VAR_3]; const int* sf = VAR_0->channel[c].scale_factors; int b; if (c == VAR_0->lfe_channel) memset(&VAR_0->tmp[VAR_6], 0, sizeof(*VAR_0->tmp) * (VAR_2 - VAR_6)); for (b = 0; b < VAR_0->num_bands; b++) { const int end = FFMIN(VAR_0->cur_sfb_offsets[b+1], VAR_0->VAR_2); const int exp = VAR_0->channel[c].VAR_10 - (VAR_0->channel[c].max_scale_factor - *sf++) * VAR_0->channel[c].scale_factor_step; const float VAR_13 = pow(10.0, exp / 20.0); int start = VAR_0->cur_sfb_offsets[b]; VAR_0->fdsp.vector_fmul_scalar(VAR_0->tmp + start, VAR_0->channel[c].coeffs + start, VAR_13, end - start); } mdct->imdct_half(mdct, VAR_0->channel[c].coeffs, VAR_0->tmp); } } wmapro_window(VAR_0); for (VAR_3 = 0; VAR_3 < VAR_0->channels_for_cur_subframe; VAR_3++) { int c = VAR_0->channel_indexes_for_cur_subframe[VAR_3]; if (VAR_0->channel[c].cur_subframe >= VAR_0->channel[c].num_subframes) { av_log(VAR_0->avctx, AV_LOG_ERROR, "broken subframe\n"); return AVERROR_INVALIDDATA; } ++VAR_0->channel[c].cur_subframe; } return 0; }

static int find_vdi_name(BDRVSheepdogState *s, char *filename, uint32_t snapid, char *tag, uint32_t *vid, int for_snapshot) { int ret, fd; SheepdogVdiReq hdr; SheepdogVdiRsp *rsp = (SheepdogVdiRsp *)&hdr; unsigned int wlen, rlen = 0; char buf[SD_MAX_VDI_LEN + SD_MAX_VDI_TAG_LEN]; fd = connect_to_sdog(s->addr, s->port); if (fd < 0) { return fd; } memset(buf, 0, sizeof(buf)); strncpy(buf, filename, SD_MAX_VDI_LEN); strncpy(buf + SD_MAX_VDI_LEN, tag, SD_MAX_VDI_TAG_LEN); memset(&hdr, 0, sizeof(hdr)); if (for_snapshot) { hdr.opcode = SD_OP_GET_VDI_INFO; } else { hdr.opcode = SD_OP_LOCK_VDI; } wlen = SD_MAX_VDI_LEN + SD_MAX_VDI_TAG_LEN; hdr.proto_ver = SD_PROTO_VER; hdr.data_length = wlen; hdr.snapid = snapid; hdr.flags = SD_FLAG_CMD_WRITE; ret = do_req(fd, (SheepdogReq *)&hdr, buf, &wlen, &rlen); if (ret) { goto out; } if (rsp->result != SD_RES_SUCCESS) { error_report("cannot get vdi info, %s, %s %d %s", sd_strerror(rsp->result), filename, snapid, tag); if (rsp->result == SD_RES_NO_VDI) { ret = -ENOENT; } else { ret = -EIO; } goto out; } *vid = rsp->vdi_id; ret = 0; out: closesocket(fd); return ret; }

qemu

3178e2755ec5a7fb1afe583fb6ac2622c2c42184

static int find_vdi_name(BDRVSheepdogState *s, char *filename, uint32_t snapid, char *tag, uint32_t *vid, int for_snapshot) { int ret, fd; SheepdogVdiReq hdr; SheepdogVdiRsp *rsp = (SheepdogVdiRsp *)&hdr; unsigned int wlen, rlen = 0; char buf[SD_MAX_VDI_LEN + SD_MAX_VDI_TAG_LEN]; fd = connect_to_sdog(s->addr, s->port); if (fd < 0) { return fd; } memset(buf, 0, sizeof(buf)); strncpy(buf, filename, SD_MAX_VDI_LEN); strncpy(buf + SD_MAX_VDI_LEN, tag, SD_MAX_VDI_TAG_LEN); memset(&hdr, 0, sizeof(hdr)); if (for_snapshot) { hdr.opcode = SD_OP_GET_VDI_INFO; } else { hdr.opcode = SD_OP_LOCK_VDI; } wlen = SD_MAX_VDI_LEN + SD_MAX_VDI_TAG_LEN; hdr.proto_ver = SD_PROTO_VER; hdr.data_length = wlen; hdr.snapid = snapid; hdr.flags = SD_FLAG_CMD_WRITE; ret = do_req(fd, (SheepdogReq *)&hdr, buf, &wlen, &rlen); if (ret) { goto out; } if (rsp->result != SD_RES_SUCCESS) { error_report("cannot get vdi info, %s, %s %d %s", sd_strerror(rsp->result), filename, snapid, tag); if (rsp->result == SD_RES_NO_VDI) { ret = -ENOENT; } else { ret = -EIO; } goto out; } *vid = rsp->vdi_id; ret = 0; out: closesocket(fd); return ret; }

static int FUNC_0(BDRVSheepdogState *VAR_0, char *VAR_1, uint32_t VAR_2, char *VAR_3, uint32_t *VAR_4, int VAR_5) { int VAR_6, VAR_7; SheepdogVdiReq hdr; SheepdogVdiRsp *rsp = (SheepdogVdiRsp *)&hdr; unsigned int VAR_8, VAR_9 = 0; char VAR_10[SD_MAX_VDI_LEN + SD_MAX_VDI_TAG_LEN]; VAR_7 = connect_to_sdog(VAR_0->addr, VAR_0->port); if (VAR_7 < 0) { return VAR_7; } memset(VAR_10, 0, sizeof(VAR_10)); strncpy(VAR_10, VAR_1, SD_MAX_VDI_LEN); strncpy(VAR_10 + SD_MAX_VDI_LEN, VAR_3, SD_MAX_VDI_TAG_LEN); memset(&hdr, 0, sizeof(hdr)); if (VAR_5) { hdr.opcode = SD_OP_GET_VDI_INFO; } else { hdr.opcode = SD_OP_LOCK_VDI; } VAR_8 = SD_MAX_VDI_LEN + SD_MAX_VDI_TAG_LEN; hdr.proto_ver = SD_PROTO_VER; hdr.data_length = VAR_8; hdr.VAR_2 = VAR_2; hdr.flags = SD_FLAG_CMD_WRITE; VAR_6 = do_req(VAR_7, (SheepdogReq *)&hdr, VAR_10, &VAR_8, &VAR_9); if (VAR_6) { goto out; } if (rsp->result != SD_RES_SUCCESS) { error_report("cannot get vdi info, %VAR_0, %VAR_0 %d %VAR_0", sd_strerror(rsp->result), VAR_1, VAR_2, VAR_3); if (rsp->result == SD_RES_NO_VDI) { VAR_6 = -ENOENT; } else { VAR_6 = -EIO; } goto out; } *VAR_4 = rsp->vdi_id; VAR_6 = 0; out: closesocket(VAR_7); return VAR_6; }

static void setup_frame(int sig, struct target_sigaction *ka, target_sigset_t *set, CPUX86State *env) { abi_ulong frame_addr; struct sigframe *frame; int i, err = 0; frame_addr = get_sigframe(ka, env, sizeof(*frame)); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) goto give_sigsegv; __put_user(current_exec_domain_sig(sig), &frame->sig); if (err) goto give_sigsegv; setup_sigcontext(&frame->sc, &frame->fpstate, env, set->sig[0], frame_addr + offsetof(struct sigframe, fpstate)); if (err) goto give_sigsegv; for(i = 1; i < TARGET_NSIG_WORDS; i++) { if (__put_user(set->sig[i], &frame->extramask[i - 1])) goto give_sigsegv; } /* Set up to return from userspace. If provided, use a stub already in userspace. */ if (ka->sa_flags & TARGET_SA_RESTORER) { __put_user(ka->sa_restorer, &frame->pretcode); } else { uint16_t val16; abi_ulong retcode_addr; retcode_addr = frame_addr + offsetof(struct sigframe, retcode); __put_user(retcode_addr, &frame->pretcode); /* This is popl %eax ; movl $,%eax ; int $0x80 */ val16 = 0xb858; __put_user(val16, (uint16_t *)(frame->retcode+0)); __put_user(TARGET_NR_sigreturn, (int *)(frame->retcode+2)); val16 = 0x80cd; __put_user(val16, (uint16_t *)(frame->retcode+6)); } if (err) goto give_sigsegv; /* Set up registers for signal handler */ env->regs[R_ESP] = frame_addr; env->eip = ka->_sa_handler; cpu_x86_load_seg(env, R_DS, __USER_DS); cpu_x86_load_seg(env, R_ES, __USER_DS); cpu_x86_load_seg(env, R_SS, __USER_DS); cpu_x86_load_seg(env, R_CS, __USER_CS); env->eflags &= ~TF_MASK; unlock_user_struct(frame, frame_addr, 1); return; give_sigsegv: unlock_user_struct(frame, frame_addr, 1); if (sig == TARGET_SIGSEGV) ka->_sa_handler = TARGET_SIG_DFL; force_sig(TARGET_SIGSEGV /* , current */); }

qemu

7df2fa3623dfe8a082bba54ae87750d5030814c1

static void setup_frame(int sig, struct target_sigaction *ka, target_sigset_t *set, CPUX86State *env) { abi_ulong frame_addr; struct sigframe *frame; int i, err = 0; frame_addr = get_sigframe(ka, env, sizeof(*frame)); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) goto give_sigsegv; __put_user(current_exec_domain_sig(sig), &frame->sig); if (err) goto give_sigsegv; setup_sigcontext(&frame->sc, &frame->fpstate, env, set->sig[0], frame_addr + offsetof(struct sigframe, fpstate)); if (err) goto give_sigsegv; for(i = 1; i < TARGET_NSIG_WORDS; i++) { if (__put_user(set->sig[i], &frame->extramask[i - 1])) goto give_sigsegv; } if (ka->sa_flags & TARGET_SA_RESTORER) { __put_user(ka->sa_restorer, &frame->pretcode); } else { uint16_t val16; abi_ulong retcode_addr; retcode_addr = frame_addr + offsetof(struct sigframe, retcode); __put_user(retcode_addr, &frame->pretcode); val16 = 0xb858; __put_user(val16, (uint16_t *)(frame->retcode+0)); __put_user(TARGET_NR_sigreturn, (int *)(frame->retcode+2)); val16 = 0x80cd; __put_user(val16, (uint16_t *)(frame->retcode+6)); } if (err) goto give_sigsegv; env->regs[R_ESP] = frame_addr; env->eip = ka->_sa_handler; cpu_x86_load_seg(env, R_DS, __USER_DS); cpu_x86_load_seg(env, R_ES, __USER_DS); cpu_x86_load_seg(env, R_SS, __USER_DS); cpu_x86_load_seg(env, R_CS, __USER_CS); env->eflags &= ~TF_MASK; unlock_user_struct(frame, frame_addr, 1); return; give_sigsegv: unlock_user_struct(frame, frame_addr, 1); if (sig == TARGET_SIGSEGV) ka->_sa_handler = TARGET_SIG_DFL; force_sig(TARGET_SIGSEGV ); }

static void FUNC_0(int VAR_0, struct target_sigaction *VAR_1, target_sigset_t *VAR_2, CPUX86State *VAR_3) { abi_ulong frame_addr; struct sigframe *VAR_4; int VAR_5, VAR_6 = 0; frame_addr = get_sigframe(VAR_1, VAR_3, sizeof(*VAR_4)); if (!lock_user_struct(VERIFY_WRITE, VAR_4, frame_addr, 0)) goto give_sigsegv; __put_user(current_exec_domain_sig(VAR_0), &VAR_4->VAR_0); if (VAR_6) goto give_sigsegv; setup_sigcontext(&VAR_4->sc, &VAR_4->fpstate, VAR_3, VAR_2->VAR_0[0], frame_addr + offsetof(struct sigframe, fpstate)); if (VAR_6) goto give_sigsegv; for(VAR_5 = 1; VAR_5 < TARGET_NSIG_WORDS; VAR_5++) { if (__put_user(VAR_2->VAR_0[VAR_5], &VAR_4->extramask[VAR_5 - 1])) goto give_sigsegv; } if (VAR_1->sa_flags & TARGET_SA_RESTORER) { __put_user(VAR_1->sa_restorer, &VAR_4->pretcode); } else { uint16_t val16; abi_ulong retcode_addr; retcode_addr = frame_addr + offsetof(struct sigframe, retcode); __put_user(retcode_addr, &VAR_4->pretcode); val16 = 0xb858; __put_user(val16, (uint16_t *)(VAR_4->retcode+0)); __put_user(TARGET_NR_sigreturn, (int *)(VAR_4->retcode+2)); val16 = 0x80cd; __put_user(val16, (uint16_t *)(VAR_4->retcode+6)); } if (VAR_6) goto give_sigsegv; VAR_3->regs[R_ESP] = frame_addr; VAR_3->eip = VAR_1->_sa_handler; cpu_x86_load_seg(VAR_3, R_DS, __USER_DS); cpu_x86_load_seg(VAR_3, R_ES, __USER_DS); cpu_x86_load_seg(VAR_3, R_SS, __USER_DS); cpu_x86_load_seg(VAR_3, R_CS, __USER_CS); VAR_3->eflags &= ~TF_MASK; unlock_user_struct(VAR_4, frame_addr, 1); return; give_sigsegv: unlock_user_struct(VAR_4, frame_addr, 1); if (VAR_0 == TARGET_SIGSEGV) VAR_1->_sa_handler = TARGET_SIG_DFL; force_sig(TARGET_SIGSEGV ); }

static void ahci_pci_enable(AHCIQState *ahci) { uint8_t reg; start_ahci_device(ahci); switch (ahci->fingerprint) { case AHCI_INTEL_ICH9: /* ICH9 has a register at PCI 0x92 that * acts as a master port enabler mask. */ reg = qpci_config_readb(ahci->dev, 0x92); reg |= 0x3F; qpci_config_writeb(ahci->dev, 0x92, reg); /* 0...0111111b -- bit significant, ports 0-5 enabled. */ ASSERT_BIT_SET(qpci_config_readb(ahci->dev, 0x92), 0x3F); break; } }

qemu

9a75b0a037e3a8030992244353f17b62f6daf2ab

static void ahci_pci_enable(AHCIQState *ahci) { uint8_t reg; start_ahci_device(ahci); switch (ahci->fingerprint) { case AHCI_INTEL_ICH9: reg = qpci_config_readb(ahci->dev, 0x92); reg |= 0x3F; qpci_config_writeb(ahci->dev, 0x92, reg); ASSERT_BIT_SET(qpci_config_readb(ahci->dev, 0x92), 0x3F); break; } }

static void FUNC_0(AHCIQState *VAR_0) { uint8_t reg; start_ahci_device(VAR_0); switch (VAR_0->fingerprint) { case AHCI_INTEL_ICH9: reg = qpci_config_readb(VAR_0->dev, 0x92); reg |= 0x3F; qpci_config_writeb(VAR_0->dev, 0x92, reg); ASSERT_BIT_SET(qpci_config_readb(VAR_0->dev, 0x92), 0x3F); break; } }

main( int argc, char *argv[] ) { GMainLoop *loop; GIOChannel *channel_stdin; char *qemu_host; char *qemu_port; VSCMsgHeader mhHeader; VCardEmulOptions *command_line_options = NULL; char *cert_names[MAX_CERTS]; char *emul_args = NULL; int cert_count = 0; int c, sock; if (socket_init() != 0) return 1; while ((c = getopt(argc, argv, "c:e:pd:")) != -1) { switch (c) { case 'c': if (cert_count >= MAX_CERTS) { printf("too many certificates (max = %d)\n", MAX_CERTS); exit(5); } cert_names[cert_count++] = optarg; break; case 'e': emul_args = optarg; break; case 'p': print_usage(); exit(4); break; case 'd': verbose = get_id_from_string(optarg, 1); break; } } if (argc - optind != 2) { print_usage(); exit(4); } if (cert_count > 0) { char *new_args; int len, i; /* if we've given some -c options, we clearly we want do so some * software emulation. add that emulation now. this is NSS Emulator * specific */ if (emul_args == NULL) { emul_args = (char *)"db=\"/etc/pki/nssdb\""; } #define SOFT_STRING ",soft=(,Virtual Reader,CAC,," /* 2 == close paren & null */ len = strlen(emul_args) + strlen(SOFT_STRING) + 2; for (i = 0; i < cert_count; i++) { len += strlen(cert_names[i])+1; /* 1 == comma */ } new_args = g_malloc(len); strcpy(new_args, emul_args); strcat(new_args, SOFT_STRING); for (i = 0; i < cert_count; i++) { strcat(new_args, cert_names[i]); strcat(new_args, ","); } strcat(new_args, ")"); emul_args = new_args; } if (emul_args) { command_line_options = vcard_emul_options(emul_args); } qemu_host = g_strdup(argv[argc - 2]); qemu_port = g_strdup(argv[argc - 1]); sock = connect_to_qemu(qemu_host, qemu_port); if (sock == -1) { fprintf(stderr, "error opening socket, exiting.\n"); exit(5); } socket_to_send = g_byte_array_new(); qemu_mutex_init(&socket_to_send_lock); qemu_mutex_init(&pending_reader_lock); qemu_cond_init(&pending_reader_condition); vcard_emul_init(command_line_options); loop = g_main_loop_new(NULL, true); printf("> "); fflush(stdout); #ifdef _WIN32 channel_stdin = g_io_channel_win32_new_fd(STDIN_FILENO); #else channel_stdin = g_io_channel_unix_new(STDIN_FILENO); #endif g_io_add_watch(channel_stdin, G_IO_IN, do_command, NULL); #ifdef _WIN32 channel_socket = g_io_channel_win32_new_socket(sock); #else channel_socket = g_io_channel_unix_new(sock); #endif g_io_channel_set_encoding(channel_socket, NULL, NULL); /* we buffer ourself for thread safety reasons */ g_io_channel_set_buffered(channel_socket, FALSE); /* Send init message, Host responds (and then we send reader attachments) */ VSCMsgInit init = { .version = htonl(VSCARD_VERSION), .magic = VSCARD_MAGIC, .capabilities = {0} }; send_msg(VSC_Init, mhHeader.reader_id, &init, sizeof(init)); g_main_loop_run(loop); g_main_loop_unref(loop); g_io_channel_unref(channel_stdin); g_io_channel_unref(channel_socket); g_byte_array_unref(socket_to_send); closesocket(sock); return 0; }

qemu

69fded480e335ecfe877e2c37de0eff265fced12

main( int argc, char *argv[] ) { GMainLoop *loop; GIOChannel *channel_stdin; char *qemu_host; char *qemu_port; VSCMsgHeader mhHeader; VCardEmulOptions *command_line_options = NULL; char *cert_names[MAX_CERTS]; char *emul_args = NULL; int cert_count = 0; int c, sock; if (socket_init() != 0) return 1; while ((c = getopt(argc, argv, "c:e:pd:")) != -1) { switch (c) { case 'c': if (cert_count >= MAX_CERTS) { printf("too many certificates (max = %d)\n", MAX_CERTS); exit(5); } cert_names[cert_count++] = optarg; break; case 'e': emul_args = optarg; break; case 'p': print_usage(); exit(4); break; case 'd': verbose = get_id_from_string(optarg, 1); break; } } if (argc - optind != 2) { print_usage(); exit(4); } if (cert_count > 0) { char *new_args; int len, i; if (emul_args == NULL) { emul_args = (char *)"db=\"/etc/pki/nssdb\""; } #define SOFT_STRING ",soft=(,Virtual Reader,CAC,," len = strlen(emul_args) + strlen(SOFT_STRING) + 2; for (i = 0; i < cert_count; i++) { len += strlen(cert_names[i])+1; } new_args = g_malloc(len); strcpy(new_args, emul_args); strcat(new_args, SOFT_STRING); for (i = 0; i < cert_count; i++) { strcat(new_args, cert_names[i]); strcat(new_args, ","); } strcat(new_args, ")"); emul_args = new_args; } if (emul_args) { command_line_options = vcard_emul_options(emul_args); } qemu_host = g_strdup(argv[argc - 2]); qemu_port = g_strdup(argv[argc - 1]); sock = connect_to_qemu(qemu_host, qemu_port); if (sock == -1) { fprintf(stderr, "error opening socket, exiting.\n"); exit(5); } socket_to_send = g_byte_array_new(); qemu_mutex_init(&socket_to_send_lock); qemu_mutex_init(&pending_reader_lock); qemu_cond_init(&pending_reader_condition); vcard_emul_init(command_line_options); loop = g_main_loop_new(NULL, true); printf("> "); fflush(stdout); #ifdef _WIN32 channel_stdin = g_io_channel_win32_new_fd(STDIN_FILENO); #else channel_stdin = g_io_channel_unix_new(STDIN_FILENO); #endif g_io_add_watch(channel_stdin, G_IO_IN, do_command, NULL); #ifdef _WIN32 channel_socket = g_io_channel_win32_new_socket(sock); #else channel_socket = g_io_channel_unix_new(sock); #endif g_io_channel_set_encoding(channel_socket, NULL, NULL); g_io_channel_set_buffered(channel_socket, FALSE); VSCMsgInit init = { .version = htonl(VSCARD_VERSION), .magic = VSCARD_MAGIC, .capabilities = {0} }; send_msg(VSC_Init, mhHeader.reader_id, &init, sizeof(init)); g_main_loop_run(loop); g_main_loop_unref(loop); g_io_channel_unref(channel_stdin); g_io_channel_unref(channel_socket); g_byte_array_unref(socket_to_send); closesocket(sock); return 0; }

FUNC_0( int VAR_0, char *VAR_1[] ) { GMainLoop *loop; GIOChannel *channel_stdin; char *VAR_2; char *VAR_3; VSCMsgHeader mhHeader; VCardEmulOptions *command_line_options = NULL; char *VAR_4[MAX_CERTS]; char *VAR_5 = NULL; int VAR_6 = 0; int VAR_7, VAR_8; if (socket_init() != 0) return 1; while ((VAR_7 = getopt(VAR_0, VAR_1, "VAR_7:e:pd:")) != -1) { switch (VAR_7) { case 'VAR_7': if (VAR_6 >= MAX_CERTS) { printf("too many certificates (max = %d)\n", MAX_CERTS); exit(5); } VAR_4[VAR_6++] = optarg; break; case 'e': VAR_5 = optarg; break; case 'p': print_usage(); exit(4); break; case 'd': verbose = get_id_from_string(optarg, 1); break; } } if (VAR_0 - optind != 2) { print_usage(); exit(4); } if (VAR_6 > 0) { char *VAR_9; int VAR_10, VAR_11; if (VAR_5 == NULL) { VAR_5 = (char *)"db=\"/etc/pki/nssdb\""; } #define SOFT_STRING ",soft=(,Virtual Reader,CAC,," VAR_10 = strlen(VAR_5) + strlen(SOFT_STRING) + 2; for (VAR_11 = 0; VAR_11 < VAR_6; VAR_11++) { VAR_10 += strlen(VAR_4[VAR_11])+1; } VAR_9 = g_malloc(VAR_10); strcpy(VAR_9, VAR_5); strcat(VAR_9, SOFT_STRING); for (VAR_11 = 0; VAR_11 < VAR_6; VAR_11++) { strcat(VAR_9, VAR_4[VAR_11]); strcat(VAR_9, ","); } strcat(VAR_9, ")"); VAR_5 = VAR_9; } if (VAR_5) { command_line_options = vcard_emul_options(VAR_5); } VAR_2 = g_strdup(VAR_1[VAR_0 - 2]); VAR_3 = g_strdup(VAR_1[VAR_0 - 1]); VAR_8 = connect_to_qemu(VAR_2, VAR_3); if (VAR_8 == -1) { fprintf(stderr, "error opening socket, exiting.\n"); exit(5); } socket_to_send = g_byte_array_new(); qemu_mutex_init(&socket_to_send_lock); qemu_mutex_init(&pending_reader_lock); qemu_cond_init(&pending_reader_condition); vcard_emul_init(command_line_options); loop = g_main_loop_new(NULL, true); printf("> "); fflush(stdout); #ifdef _WIN32 channel_stdin = g_io_channel_win32_new_fd(STDIN_FILENO); #else channel_stdin = g_io_channel_unix_new(STDIN_FILENO); #endif g_io_add_watch(channel_stdin, G_IO_IN, do_command, NULL); #ifdef _WIN32 channel_socket = g_io_channel_win32_new_socket(VAR_8); #else channel_socket = g_io_channel_unix_new(VAR_8); #endif g_io_channel_set_encoding(channel_socket, NULL, NULL); g_io_channel_set_buffered(channel_socket, FALSE); VSCMsgInit init = { .version = htonl(VSCARD_VERSION), .magic = VSCARD_MAGIC, .capabilities = {0} }; send_msg(VSC_Init, mhHeader.reader_id, &init, sizeof(init)); g_main_loop_run(loop); g_main_loop_unref(loop); g_io_channel_unref(channel_stdin); g_io_channel_unref(channel_socket); g_byte_array_unref(socket_to_send); closesocket(VAR_8); return 0; }

static VFIOINTp *vfio_init_intp(VFIODevice *vbasedev, struct vfio_irq_info info) { int ret; VFIOPlatformDevice *vdev = container_of(vbasedev, VFIOPlatformDevice, vbasedev); SysBusDevice *sbdev = SYS_BUS_DEVICE(vdev); VFIOINTp *intp; intp = g_malloc0(sizeof(*intp)); intp->vdev = vdev; intp->pin = info.index; intp->flags = info.flags; intp->state = VFIO_IRQ_INACTIVE; intp->kvm_accel = false; sysbus_init_irq(sbdev, &intp->qemuirq); /* Get an eventfd for trigger */ intp->interrupt = g_malloc0(sizeof(EventNotifier)); ret = event_notifier_init(intp->interrupt, 0); if (ret) { g_free(intp->interrupt); g_free(intp); error_report("vfio: Error: trigger event_notifier_init failed "); return NULL; } /* Get an eventfd for resample/unmask */ intp->unmask = g_malloc0(sizeof(EventNotifier)); ret = event_notifier_init(intp->unmask, 0); if (ret) { g_free(intp->interrupt); g_free(intp->unmask); g_free(intp); error_report("vfio: Error: resamplefd event_notifier_init failed"); return NULL; } QLIST_INSERT_HEAD(&vdev->intp_list, intp, next); return intp; }

qemu

a5b39cd3f647eaaaef5b648beda5cb2f387418c0

static VFIOINTp *vfio_init_intp(VFIODevice *vbasedev, struct vfio_irq_info info) { int ret; VFIOPlatformDevice *vdev = container_of(vbasedev, VFIOPlatformDevice, vbasedev); SysBusDevice *sbdev = SYS_BUS_DEVICE(vdev); VFIOINTp *intp; intp = g_malloc0(sizeof(*intp)); intp->vdev = vdev; intp->pin = info.index; intp->flags = info.flags; intp->state = VFIO_IRQ_INACTIVE; intp->kvm_accel = false; sysbus_init_irq(sbdev, &intp->qemuirq); intp->interrupt = g_malloc0(sizeof(EventNotifier)); ret = event_notifier_init(intp->interrupt, 0); if (ret) { g_free(intp->interrupt); g_free(intp); error_report("vfio: Error: trigger event_notifier_init failed "); return NULL; } intp->unmask = g_malloc0(sizeof(EventNotifier)); ret = event_notifier_init(intp->unmask, 0); if (ret) { g_free(intp->interrupt); g_free(intp->unmask); g_free(intp); error_report("vfio: Error: resamplefd event_notifier_init failed"); return NULL; } QLIST_INSERT_HEAD(&vdev->intp_list, intp, next); return intp; }

static VFIOINTp *FUNC_0(VFIODevice *vbasedev, struct vfio_irq_info info) { int VAR_0; VFIOPlatformDevice *vdev = container_of(vbasedev, VFIOPlatformDevice, vbasedev); SysBusDevice *sbdev = SYS_BUS_DEVICE(vdev); VFIOINTp *intp; intp = g_malloc0(sizeof(*intp)); intp->vdev = vdev; intp->pin = info.index; intp->flags = info.flags; intp->state = VFIO_IRQ_INACTIVE; intp->kvm_accel = false; sysbus_init_irq(sbdev, &intp->qemuirq); intp->interrupt = g_malloc0(sizeof(EventNotifier)); VAR_0 = event_notifier_init(intp->interrupt, 0); if (VAR_0) { g_free(intp->interrupt); g_free(intp); error_report("vfio: Error: trigger event_notifier_init failed "); return NULL; } intp->unmask = g_malloc0(sizeof(EventNotifier)); VAR_0 = event_notifier_init(intp->unmask, 0); if (VAR_0) { g_free(intp->interrupt); g_free(intp->unmask); g_free(intp); error_report("vfio: Error: resamplefd event_notifier_init failed"); return NULL; } QLIST_INSERT_HEAD(&vdev->intp_list, intp, next); return intp; }

void OPPROTO op_udivx_T1_T0(void) { T0 /= T1; FORCE_RET();

qemu

14a1120e5c8c4c29441141b4657f91e04d10fac0

void OPPROTO op_udivx_T1_T0(void) { T0 /= T1; FORCE_RET();

void VAR_0 op_udivx_T1_T0(void) { T0 /= T1; FORCE_RET();

void address_space_init(AddressSpace *as, MemoryRegion *root) { memory_region_transaction_begin(); as->root = root; as->current_map = g_new(FlatView, 1); flatview_init(as->current_map); QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link); as->name = NULL; memory_region_transaction_commit(); address_space_init_dispatch(as); }

qemu

4c19eb721a5929f2277d33a98bb59963c58c2e3b

void address_space_init(AddressSpace *as, MemoryRegion *root) { memory_region_transaction_begin(); as->root = root; as->current_map = g_new(FlatView, 1); flatview_init(as->current_map); QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link); as->name = NULL; memory_region_transaction_commit(); address_space_init_dispatch(as); }

void FUNC_0(AddressSpace *VAR_0, MemoryRegion *VAR_1) { memory_region_transaction_begin(); VAR_0->VAR_1 = VAR_1; VAR_0->current_map = g_new(FlatView, 1); flatview_init(VAR_0->current_map); QTAILQ_INSERT_TAIL(&address_spaces, VAR_0, address_spaces_link); VAR_0->name = NULL; memory_region_transaction_commit(); address_space_init_dispatch(VAR_0); }

ebml_read_ascii (MatroskaDemuxContext *matroska, uint32_t *id, char **str) { ByteIOContext *pb = matroska->ctx->pb; int size, res; uint64_t rlength; if ((res = ebml_read_element_id(matroska, id, NULL)) < 0 || (res = ebml_read_element_length(matroska, &rlength)) < 0) return res; size = rlength; /* ebml strings are usually not 0-terminated, so we allocate one * byte more, read the string and NULL-terminate it ourselves. */ if (size < 0 || !(*str = av_malloc(size + 1))) { av_log(matroska->ctx, AV_LOG_ERROR, "Memory allocation failed\n"); return AVERROR(ENOMEM); } if (get_buffer(pb, (uint8_t *) *str, size) != size) { offset_t pos = url_ftell(pb); av_log(matroska->ctx, AV_LOG_ERROR, "Read error at pos. %"PRIu64" (0x%"PRIx64")\n", pos, pos); return AVERROR(EIO); } (*str)[size] = '\0'; return 0; }

FFmpeg

ff2c222c379645cb7825b8ddc222142dcaea1677

ebml_read_ascii (MatroskaDemuxContext *matroska, uint32_t *id, char **str) { ByteIOContext *pb = matroska->ctx->pb; int size, res; uint64_t rlength; if ((res = ebml_read_element_id(matroska, id, NULL)) < 0 || (res = ebml_read_element_length(matroska, &rlength)) < 0) return res; size = rlength; if (size < 0 || !(*str = av_malloc(size + 1))) { av_log(matroska->ctx, AV_LOG_ERROR, "Memory allocation failed\n"); return AVERROR(ENOMEM); } if (get_buffer(pb, (uint8_t *) *str, size) != size) { offset_t pos = url_ftell(pb); av_log(matroska->ctx, AV_LOG_ERROR, "Read error at pos. %"PRIu64" (0x%"PRIx64")\n", pos, pos); return AVERROR(EIO); } (*str)[size] = '\0'; return 0; }

FUNC_0 (MatroskaDemuxContext *VAR_0, uint32_t *VAR_1, char **VAR_2) { ByteIOContext *pb = VAR_0->ctx->pb; int VAR_3, VAR_4; uint64_t rlength; if ((VAR_4 = ebml_read_element_id(VAR_0, VAR_1, NULL)) < 0 || (VAR_4 = ebml_read_element_length(VAR_0, &rlength)) < 0) return VAR_4; VAR_3 = rlength; if (VAR_3 < 0 || !(*VAR_2 = av_malloc(VAR_3 + 1))) { av_log(VAR_0->ctx, AV_LOG_ERROR, "Memory allocation failed\n"); return AVERROR(ENOMEM); } if (get_buffer(pb, (uint8_t *) *VAR_2, VAR_3) != VAR_3) { offset_t pos = url_ftell(pb); av_log(VAR_0->ctx, AV_LOG_ERROR, "Read error at pos. %"PRIu64" (0x%"PRIx64")\n", pos, pos); return AVERROR(EIO); } (*VAR_2)[VAR_3] = '\0'; return 0; }

static void memory_dump(Monitor *mon, int count, int format, int wsize, target_phys_addr_t addr, int is_physical) { CPUState *env; int l, line_size, i, max_digits, len; uint8_t buf[16]; uint64_t v; if (format == 'i') { int flags; flags = 0; env = mon_get_cpu(); if (!env && !is_physical) return; #ifdef TARGET_I386 if (wsize == 2) { flags = 1; } else if (wsize == 4) { flags = 0; } else { /* as default we use the current CS size */ flags = 0; if (env) { #ifdef TARGET_X86_64 if ((env->efer & MSR_EFER_LMA) && (env->segs[R_CS].flags & DESC_L_MASK)) flags = 2; else #endif if (!(env->segs[R_CS].flags & DESC_B_MASK)) flags = 1; } } #endif monitor_disas(mon, env, addr, count, is_physical, flags); return; } len = wsize * count; if (wsize == 1) line_size = 8; else line_size = 16; max_digits = 0; switch(format) { case 'o': max_digits = (wsize * 8 + 2) / 3; break; default: case 'x': max_digits = (wsize * 8) / 4; break; case 'u': case 'd': max_digits = (wsize * 8 * 10 + 32) / 33; break; case 'c': wsize = 1; break; } while (len > 0) { if (is_physical) monitor_printf(mon, TARGET_FMT_plx ":", addr); else monitor_printf(mon, TARGET_FMT_lx ":", (target_ulong)addr); l = len; if (l > line_size) l = line_size; if (is_physical) { cpu_physical_memory_rw(addr, buf, l, 0); } else { env = mon_get_cpu(); if (!env) break; if (cpu_memory_rw_debug(env, addr, buf, l, 0) < 0) { monitor_printf(mon, " Cannot access memory\n"); break; } } i = 0; while (i < l) { switch(wsize) { default: case 1: v = ldub_raw(buf + i); break; case 2: v = lduw_raw(buf + i); break; case 4: v = (uint32_t)ldl_raw(buf + i); break; case 8: v = ldq_raw(buf + i); break; } monitor_printf(mon, " "); switch(format) { case 'o': monitor_printf(mon, "%#*" PRIo64, max_digits, v); break; case 'x': monitor_printf(mon, "0x%0*" PRIx64, max_digits, v); break; case 'u': monitor_printf(mon, "%*" PRIu64, max_digits, v); break; case 'd': monitor_printf(mon, "%*" PRId64, max_digits, v); break; case 'c': monitor_printc(mon, v); break; } i += wsize; } monitor_printf(mon, "\n"); addr += l; len -= l; } }

qemu

09b9418c6d085a0728372aa760ebd10128a020b1

static void memory_dump(Monitor *mon, int count, int format, int wsize, target_phys_addr_t addr, int is_physical) { CPUState *env; int l, line_size, i, max_digits, len; uint8_t buf[16]; uint64_t v; if (format == 'i') { int flags; flags = 0; env = mon_get_cpu(); if (!env && !is_physical) return; #ifdef TARGET_I386 if (wsize == 2) { flags = 1; } else if (wsize == 4) { flags = 0; } else { flags = 0; if (env) { #ifdef TARGET_X86_64 if ((env->efer & MSR_EFER_LMA) && (env->segs[R_CS].flags & DESC_L_MASK)) flags = 2; else #endif if (!(env->segs[R_CS].flags & DESC_B_MASK)) flags = 1; } } #endif monitor_disas(mon, env, addr, count, is_physical, flags); return; } len = wsize * count; if (wsize == 1) line_size = 8; else line_size = 16; max_digits = 0; switch(format) { case 'o': max_digits = (wsize * 8 + 2) / 3; break; default: case 'x': max_digits = (wsize * 8) / 4; break; case 'u': case 'd': max_digits = (wsize * 8 * 10 + 32) / 33; break; case 'c': wsize = 1; break; } while (len > 0) { if (is_physical) monitor_printf(mon, TARGET_FMT_plx ":", addr); else monitor_printf(mon, TARGET_FMT_lx ":", (target_ulong)addr); l = len; if (l > line_size) l = line_size; if (is_physical) { cpu_physical_memory_rw(addr, buf, l, 0); } else { env = mon_get_cpu(); if (!env) break; if (cpu_memory_rw_debug(env, addr, buf, l, 0) < 0) { monitor_printf(mon, " Cannot access memory\n"); break; } } i = 0; while (i < l) { switch(wsize) { default: case 1: v = ldub_raw(buf + i); break; case 2: v = lduw_raw(buf + i); break; case 4: v = (uint32_t)ldl_raw(buf + i); break; case 8: v = ldq_raw(buf + i); break; } monitor_printf(mon, " "); switch(format) { case 'o': monitor_printf(mon, "%#*" PRIo64, max_digits, v); break; case 'x': monitor_printf(mon, "0x%0*" PRIx64, max_digits, v); break; case 'u': monitor_printf(mon, "%*" PRIu64, max_digits, v); break; case 'd': monitor_printf(mon, "%*" PRId64, max_digits, v); break; case 'c': monitor_printc(mon, v); break; } i += wsize; } monitor_printf(mon, "\n"); addr += l; len -= l; } }

static void FUNC_0(Monitor *VAR_0, int VAR_1, int VAR_2, int VAR_3, target_phys_addr_t VAR_4, int VAR_5) { CPUState *env; int VAR_6, VAR_7, VAR_8, VAR_9, VAR_10; uint8_t buf[16]; uint64_t v; if (VAR_2 == 'VAR_8') { int VAR_11; VAR_11 = 0; env = mon_get_cpu(); if (!env && !VAR_5) return; #ifdef TARGET_I386 if (VAR_3 == 2) { VAR_11 = 1; } else if (VAR_3 == 4) { VAR_11 = 0; } else { VAR_11 = 0; if (env) { #ifdef TARGET_X86_64 if ((env->efer & MSR_EFER_LMA) && (env->segs[R_CS].VAR_11 & DESC_L_MASK)) VAR_11 = 2; else #endif if (!(env->segs[R_CS].VAR_11 & DESC_B_MASK)) VAR_11 = 1; } } #endif monitor_disas(VAR_0, env, VAR_4, VAR_1, VAR_5, VAR_11); return; } VAR_10 = VAR_3 * VAR_1; if (VAR_3 == 1) VAR_7 = 8; else VAR_7 = 16; VAR_9 = 0; switch(VAR_2) { case 'o': VAR_9 = (VAR_3 * 8 + 2) / 3; break; default: case 'x': VAR_9 = (VAR_3 * 8) / 4; break; case 'u': case 'd': VAR_9 = (VAR_3 * 8 * 10 + 32) / 33; break; case 'c': VAR_3 = 1; break; } while (VAR_10 > 0) { if (VAR_5) monitor_printf(VAR_0, TARGET_FMT_plx ":", VAR_4); else monitor_printf(VAR_0, TARGET_FMT_lx ":", (target_ulong)VAR_4); VAR_6 = VAR_10; if (VAR_6 > VAR_7) VAR_6 = VAR_7; if (VAR_5) { cpu_physical_memory_rw(VAR_4, buf, VAR_6, 0); } else { env = mon_get_cpu(); if (!env) break; if (cpu_memory_rw_debug(env, VAR_4, buf, VAR_6, 0) < 0) { monitor_printf(VAR_0, " Cannot access memory\n"); break; } } VAR_8 = 0; while (VAR_8 < VAR_6) { switch(VAR_3) { default: case 1: v = ldub_raw(buf + VAR_8); break; case 2: v = lduw_raw(buf + VAR_8); break; case 4: v = (uint32_t)ldl_raw(buf + VAR_8); break; case 8: v = ldq_raw(buf + VAR_8); break; } monitor_printf(VAR_0, " "); switch(VAR_2) { case 'o': monitor_printf(VAR_0, "%#*" PRIo64, VAR_9, v); break; case 'x': monitor_printf(VAR_0, "0x%0*" PRIx64, VAR_9, v); break; case 'u': monitor_printf(VAR_0, "%*" PRIu64, VAR_9, v); break; case 'd': monitor_printf(VAR_0, "%*" PRId64, VAR_9, v); break; case 'c': monitor_printc(VAR_0, v); break; } VAR_8 += VAR_3; } monitor_printf(VAR_0, "\n"); VAR_4 += VAR_6; VAR_10 -= VAR_6; } }

RGB_FUNCTIONS(rgba32) #undef RGB_IN #undef RGB_OUT #undef BPP static void rgb24_to_rgb565(AVPicture *dst, AVPicture *src, int width, int height) { const unsigned char *p; unsigned char *q; int r, g, b, dst_wrap, src_wrap; int x, y; p = src->data[0]; src_wrap = src->linesize[0] - 3 * width; q = dst->data[0]; dst_wrap = dst->linesize[0] - 2 * width; for(y=0;y<height;y++) { for(x=0;x<width;x++) { r = p[0]; g = p[1]; b = p[2]; ((unsigned short *)q)[0] = ((r >> 3) << 11) | ((g >> 2) << 5) | (b >> 3); q += 2; p += 3; } p += src_wrap; q += dst_wrap; } }

FFmpeg

7e7e59409294af9caa63808e56c5cc824c98b4fc

RGB_FUNCTIONS(rgba32) #undef RGB_IN #undef RGB_OUT #undef BPP static void rgb24_to_rgb565(AVPicture *dst, AVPicture *src, int width, int height) { const unsigned char *p; unsigned char *q; int r, g, b, dst_wrap, src_wrap; int x, y; p = src->data[0]; src_wrap = src->linesize[0] - 3 * width; q = dst->data[0]; dst_wrap = dst->linesize[0] - 2 * width; for(y=0;y<height;y++) { for(x=0;x<width;x++) { r = p[0]; g = p[1]; b = p[2]; ((unsigned short *)q)[0] = ((r >> 3) << 11) | ((g >> 2) << 5) | (b >> 3); q += 2; p += 3; } p += src_wrap; q += dst_wrap; } }

FUNC_0(VAR_0) #undef RGB_IN #undef RGB_OUT #undef BPP static void rgb24_to_rgb565(AVPicture *dst, AVPicture *src, int width, int height) { const unsigned char *VAR_1; unsigned char *VAR_2; int VAR_3, VAR_4, VAR_5, VAR_6, VAR_7; int VAR_8, VAR_9; VAR_1 = src->data[0]; VAR_7 = src->linesize[0] - 3 * width; VAR_2 = dst->data[0]; VAR_6 = dst->linesize[0] - 2 * width; for(VAR_9=0;VAR_9<height;VAR_9++) { for(VAR_8=0;VAR_8<width;VAR_8++) { VAR_3 = VAR_1[0]; VAR_4 = VAR_1[1]; VAR_5 = VAR_1[2]; ((unsigned short *)VAR_2)[0] = ((VAR_3 >> 3) << 11) | ((VAR_4 >> 2) << 5) | (VAR_5 >> 3); VAR_2 += 2; VAR_1 += 3; } VAR_1 += VAR_7; VAR_2 += VAR_6; } }

static void avc_luma_mid_and_aver_dst_16x16_msa(const uint8_t *src, int32_t src_stride, uint8_t *dst, int32_t dst_stride) { avc_luma_mid_and_aver_dst_8w_msa(src, src_stride, dst, dst_stride, 16); avc_luma_mid_and_aver_dst_8w_msa(src + 8, src_stride, dst + 8, dst_stride, 16); }

FFmpeg

1181d93231e9b807965724587d363c1cfd5a1d0d

static void avc_luma_mid_and_aver_dst_16x16_msa(const uint8_t *src, int32_t src_stride, uint8_t *dst, int32_t dst_stride) { avc_luma_mid_and_aver_dst_8w_msa(src, src_stride, dst, dst_stride, 16); avc_luma_mid_and_aver_dst_8w_msa(src + 8, src_stride, dst + 8, dst_stride, 16); }

static void FUNC_0(const uint8_t *VAR_0, int32_t VAR_1, uint8_t *VAR_2, int32_t VAR_3) { avc_luma_mid_and_aver_dst_8w_msa(VAR_0, VAR_1, VAR_2, VAR_3, 16); avc_luma_mid_and_aver_dst_8w_msa(VAR_0 + 8, VAR_1, VAR_2 + 8, VAR_3, 16); }

void MPV_common_init_armv4l(MpegEncContext *s) { int i; const int idct_algo= s->avctx->idct_algo; ff_put_pixels_clamped = s->avctx->dsp.put_pixels_clamped; ff_add_pixels_clamped = s->avctx->dsp.put_pixels_clamped; if(idct_algo==FF_IDCT_AUTO || idct_algo==FF_IDCT_ARM){ s->idct_put= arm_idct_put; s->idct_add= arm_idct_add; s->idct_permutation_type= FF_NO_IDCT_PERM; } }

FFmpeg

594026277250fecf0ba34c9e1498921936c6bfed

void MPV_common_init_armv4l(MpegEncContext *s) { int i; const int idct_algo= s->avctx->idct_algo; ff_put_pixels_clamped = s->avctx->dsp.put_pixels_clamped; ff_add_pixels_clamped = s->avctx->dsp.put_pixels_clamped; if(idct_algo==FF_IDCT_AUTO || idct_algo==FF_IDCT_ARM){ s->idct_put= arm_idct_put; s->idct_add= arm_idct_add; s->idct_permutation_type= FF_NO_IDCT_PERM; } }

void FUNC_0(MpegEncContext *VAR_0) { int VAR_1; const int VAR_2= VAR_0->avctx->VAR_2; ff_put_pixels_clamped = VAR_0->avctx->dsp.put_pixels_clamped; ff_add_pixels_clamped = VAR_0->avctx->dsp.put_pixels_clamped; if(VAR_2==FF_IDCT_AUTO || VAR_2==FF_IDCT_ARM){ VAR_0->idct_put= arm_idct_put; VAR_0->idct_add= arm_idct_add; VAR_0->idct_permutation_type= FF_NO_IDCT_PERM; } }

static int sbr_hf_calc_npatches(AACContext *ac, SpectralBandReplication *sbr) { int i, k, sb = 0; int msb = sbr->k[0]; int usb = sbr->kx[1]; int goal_sb = ((1000 << 11) + (sbr->sample_rate >> 1)) / sbr->sample_rate; sbr->num_patches = 0; if (goal_sb < sbr->kx[1] + sbr->m[1]) { for (k = 0; sbr->f_master[k] < goal_sb; k++) ; } else k = sbr->n_master; do { int odd = 0; for (i = k; i == k || sb > (sbr->k[0] - 1 + msb - odd); i--) { sb = sbr->f_master[i]; odd = (sb + sbr->k[0]) & 1; } // Requirements (14496-3 sp04 p205) sets the maximum number of patches to 5. // After this check the final number of patches can still be six which is // illegal however the Coding Technologies decoder check stream has a final // count of 6 patches if (sbr->num_patches > 5) { av_log(ac->avctx, AV_LOG_ERROR, "Too many patches: %d\n", sbr->num_patches); return -1; } sbr->patch_num_subbands[sbr->num_patches] = FFMAX(sb - usb, 0); sbr->patch_start_subband[sbr->num_patches] = sbr->k[0] - odd - sbr->patch_num_subbands[sbr->num_patches]; if (sbr->patch_num_subbands[sbr->num_patches] > 0) { usb = sb; msb = sb; sbr->num_patches++; } else msb = sbr->kx[1]; if (sbr->f_master[k] - sb < 3) k = sbr->n_master; } while (sb != sbr->kx[1] + sbr->m[1]); if (sbr->patch_num_subbands[sbr->num_patches-1] < 3 && sbr->num_patches > 1) sbr->num_patches--; return 0; }

FFmpeg

c2340831b8e9032716acb0aab4893d3cc500213a

static int sbr_hf_calc_npatches(AACContext *ac, SpectralBandReplication *sbr) { int i, k, sb = 0; int msb = sbr->k[0]; int usb = sbr->kx[1]; int goal_sb = ((1000 << 11) + (sbr->sample_rate >> 1)) / sbr->sample_rate; sbr->num_patches = 0; if (goal_sb < sbr->kx[1] + sbr->m[1]) { for (k = 0; sbr->f_master[k] < goal_sb; k++) ; } else k = sbr->n_master; do { int odd = 0; for (i = k; i == k || sb > (sbr->k[0] - 1 + msb - odd); i--) { sb = sbr->f_master[i]; odd = (sb + sbr->k[0]) & 1; } if (sbr->num_patches > 5) { av_log(ac->avctx, AV_LOG_ERROR, "Too many patches: %d\n", sbr->num_patches); return -1; } sbr->patch_num_subbands[sbr->num_patches] = FFMAX(sb - usb, 0); sbr->patch_start_subband[sbr->num_patches] = sbr->k[0] - odd - sbr->patch_num_subbands[sbr->num_patches]; if (sbr->patch_num_subbands[sbr->num_patches] > 0) { usb = sb; msb = sb; sbr->num_patches++; } else msb = sbr->kx[1]; if (sbr->f_master[k] - sb < 3) k = sbr->n_master; } while (sb != sbr->kx[1] + sbr->m[1]); if (sbr->patch_num_subbands[sbr->num_patches-1] < 3 && sbr->num_patches > 1) sbr->num_patches--; return 0; }

static int FUNC_0(AACContext *VAR_0, SpectralBandReplication *VAR_1) { int VAR_2, VAR_3, VAR_4 = 0; int VAR_5 = VAR_1->VAR_3[0]; int VAR_6 = VAR_1->kx[1]; int VAR_7 = ((1000 << 11) + (VAR_1->sample_rate >> 1)) / VAR_1->sample_rate; VAR_1->num_patches = 0; if (VAR_7 < VAR_1->kx[1] + VAR_1->m[1]) { for (VAR_3 = 0; VAR_1->f_master[VAR_3] < VAR_7; VAR_3++) ; } else VAR_3 = VAR_1->n_master; do { int VAR_8 = 0; for (VAR_2 = VAR_3; VAR_2 == VAR_3 || VAR_4 > (VAR_1->VAR_3[0] - 1 + VAR_5 - VAR_8); VAR_2--) { VAR_4 = VAR_1->f_master[VAR_2]; VAR_8 = (VAR_4 + VAR_1->VAR_3[0]) & 1; } if (VAR_1->num_patches > 5) { av_log(VAR_0->avctx, AV_LOG_ERROR, "Too many patches: %d\n", VAR_1->num_patches); return -1; } VAR_1->patch_num_subbands[VAR_1->num_patches] = FFMAX(VAR_4 - VAR_6, 0); VAR_1->patch_start_subband[VAR_1->num_patches] = VAR_1->VAR_3[0] - VAR_8 - VAR_1->patch_num_subbands[VAR_1->num_patches]; if (VAR_1->patch_num_subbands[VAR_1->num_patches] > 0) { VAR_6 = VAR_4; VAR_5 = VAR_4; VAR_1->num_patches++; } else VAR_5 = VAR_1->kx[1]; if (VAR_1->f_master[VAR_3] - VAR_4 < 3) VAR_3 = VAR_1->n_master; } while (VAR_4 != VAR_1->kx[1] + VAR_1->m[1]); if (VAR_1->patch_num_subbands[VAR_1->num_patches-1] < 3 && VAR_1->num_patches > 1) VAR_1->num_patches--; return 0; }

static void qdm2_fft_decode_tones (QDM2Context *q, int duration, GetBitContext *gb, int b) { int channel, stereo, phase, exp; int local_int_4, local_int_8, stereo_phase, local_int_10; int local_int_14, stereo_exp, local_int_20, local_int_28; int n, offset; local_int_4 = 0; local_int_28 = 0; local_int_20 = 2; local_int_8 = (4 - duration); local_int_10 = 1 << (q->group_order - duration - 1); offset = 1; while (1) { if (q->superblocktype_2_3) { while ((n = qdm2_get_vlc(gb, &vlc_tab_fft_tone_offset[local_int_8], 1, 2)) < 2) { offset = 1; if (n == 0) { local_int_4 += local_int_10; local_int_28 += (1 << local_int_8); } else { local_int_4 += 8*local_int_10; local_int_28 += (8 << local_int_8); } } offset += (n - 2); } else { offset += qdm2_get_vlc(gb, &vlc_tab_fft_tone_offset[local_int_8], 1, 2); while (offset >= (local_int_10 - 1)) { offset += (1 - (local_int_10 - 1)); local_int_4 += local_int_10; local_int_28 += (1 << local_int_8); } } if (local_int_4 >= q->group_size) return; local_int_14 = (offset >> local_int_8); if (local_int_14 >= FF_ARRAY_ELEMS(fft_level_index_table)) return; if (q->nb_channels > 1) { channel = get_bits1(gb); stereo = get_bits1(gb); } else { channel = 0; stereo = 0; } exp = qdm2_get_vlc(gb, (b ? &fft_level_exp_vlc : &fft_level_exp_alt_vlc), 0, 2); exp += q->fft_level_exp[fft_level_index_table[local_int_14]]; exp = (exp < 0) ? 0 : exp; phase = get_bits(gb, 3); stereo_exp = 0; stereo_phase = 0; if (stereo) { stereo_exp = (exp - qdm2_get_vlc(gb, &fft_stereo_exp_vlc, 0, 1)); stereo_phase = (phase - qdm2_get_vlc(gb, &fft_stereo_phase_vlc, 0, 1)); if (stereo_phase < 0) stereo_phase += 8; } if (q->frequency_range > (local_int_14 + 1)) { int sub_packet = (local_int_20 + local_int_28); qdm2_fft_init_coefficient(q, sub_packet, offset, duration, channel, exp, phase); if (stereo) qdm2_fft_init_coefficient(q, sub_packet, offset, duration, (1 - channel), stereo_exp, stereo_phase); } offset++; } }

FFmpeg

14db3af4f26dad8e6ddf2147e96ccc710952ad4d

static void qdm2_fft_decode_tones (QDM2Context *q, int duration, GetBitContext *gb, int b) { int channel, stereo, phase, exp; int local_int_4, local_int_8, stereo_phase, local_int_10; int local_int_14, stereo_exp, local_int_20, local_int_28; int n, offset; local_int_4 = 0; local_int_28 = 0; local_int_20 = 2; local_int_8 = (4 - duration); local_int_10 = 1 << (q->group_order - duration - 1); offset = 1; while (1) { if (q->superblocktype_2_3) { while ((n = qdm2_get_vlc(gb, &vlc_tab_fft_tone_offset[local_int_8], 1, 2)) < 2) { offset = 1; if (n == 0) { local_int_4 += local_int_10; local_int_28 += (1 << local_int_8); } else { local_int_4 += 8*local_int_10; local_int_28 += (8 << local_int_8); } } offset += (n - 2); } else { offset += qdm2_get_vlc(gb, &vlc_tab_fft_tone_offset[local_int_8], 1, 2); while (offset >= (local_int_10 - 1)) { offset += (1 - (local_int_10 - 1)); local_int_4 += local_int_10; local_int_28 += (1 << local_int_8); } } if (local_int_4 >= q->group_size) return; local_int_14 = (offset >> local_int_8); if (local_int_14 >= FF_ARRAY_ELEMS(fft_level_index_table)) return; if (q->nb_channels > 1) { channel = get_bits1(gb); stereo = get_bits1(gb); } else { channel = 0; stereo = 0; } exp = qdm2_get_vlc(gb, (b ? &fft_level_exp_vlc : &fft_level_exp_alt_vlc), 0, 2); exp += q->fft_level_exp[fft_level_index_table[local_int_14]]; exp = (exp < 0) ? 0 : exp; phase = get_bits(gb, 3); stereo_exp = 0; stereo_phase = 0; if (stereo) { stereo_exp = (exp - qdm2_get_vlc(gb, &fft_stereo_exp_vlc, 0, 1)); stereo_phase = (phase - qdm2_get_vlc(gb, &fft_stereo_phase_vlc, 0, 1)); if (stereo_phase < 0) stereo_phase += 8; } if (q->frequency_range > (local_int_14 + 1)) { int sub_packet = (local_int_20 + local_int_28); qdm2_fft_init_coefficient(q, sub_packet, offset, duration, channel, exp, phase); if (stereo) qdm2_fft_init_coefficient(q, sub_packet, offset, duration, (1 - channel), stereo_exp, stereo_phase); } offset++; } }

static void FUNC_0 (QDM2Context *VAR_0, int VAR_1, GetBitContext *VAR_2, int VAR_3) { int VAR_4, VAR_5, VAR_6, VAR_7; int VAR_8, VAR_9, VAR_10, VAR_11; int VAR_12, VAR_13, VAR_14, VAR_15; int VAR_16, VAR_17; VAR_8 = 0; VAR_15 = 0; VAR_14 = 2; VAR_9 = (4 - VAR_1); VAR_11 = 1 << (VAR_0->group_order - VAR_1 - 1); VAR_17 = 1; while (1) { if (VAR_0->superblocktype_2_3) { while ((VAR_16 = qdm2_get_vlc(VAR_2, &vlc_tab_fft_tone_offset[VAR_9], 1, 2)) < 2) { VAR_17 = 1; if (VAR_16 == 0) { VAR_8 += VAR_11; VAR_15 += (1 << VAR_9); } else { VAR_8 += 8*VAR_11; VAR_15 += (8 << VAR_9); } } VAR_17 += (VAR_16 - 2); } else { VAR_17 += qdm2_get_vlc(VAR_2, &vlc_tab_fft_tone_offset[VAR_9], 1, 2); while (VAR_17 >= (VAR_11 - 1)) { VAR_17 += (1 - (VAR_11 - 1)); VAR_8 += VAR_11; VAR_15 += (1 << VAR_9); } } if (VAR_8 >= VAR_0->group_size) return; VAR_12 = (VAR_17 >> VAR_9); if (VAR_12 >= FF_ARRAY_ELEMS(fft_level_index_table)) return; if (VAR_0->nb_channels > 1) { VAR_4 = get_bits1(VAR_2); VAR_5 = get_bits1(VAR_2); } else { VAR_4 = 0; VAR_5 = 0; } VAR_7 = qdm2_get_vlc(VAR_2, (VAR_3 ? &fft_level_exp_vlc : &fft_level_exp_alt_vlc), 0, 2); VAR_7 += VAR_0->fft_level_exp[fft_level_index_table[VAR_12]]; VAR_7 = (VAR_7 < 0) ? 0 : VAR_7; VAR_6 = get_bits(VAR_2, 3); VAR_13 = 0; VAR_10 = 0; if (VAR_5) { VAR_13 = (VAR_7 - qdm2_get_vlc(VAR_2, &fft_stereo_exp_vlc, 0, 1)); VAR_10 = (VAR_6 - qdm2_get_vlc(VAR_2, &fft_stereo_phase_vlc, 0, 1)); if (VAR_10 < 0) VAR_10 += 8; } if (VAR_0->frequency_range > (VAR_12 + 1)) { int VAR_18 = (VAR_14 + VAR_15); qdm2_fft_init_coefficient(VAR_0, VAR_18, VAR_17, VAR_1, VAR_4, VAR_7, VAR_6); if (VAR_5) qdm2_fft_init_coefficient(VAR_0, VAR_18, VAR_17, VAR_1, (1 - VAR_4), VAR_13, VAR_10); } VAR_17++; } }

void ff_rtp_send_h263(AVFormatContext *s1, const uint8_t *buf1, int size) { RTPMuxContext *s = s1->priv_data; int len, max_packet_size; uint8_t *q; max_packet_size = s->max_payload_size; while (size > 0) { q = s->buf; if ((buf1[0] == 0) && (buf1[1] == 0)) { *q++ = 0x04; buf1 += 2; size -= 2; } else { *q++ = 0; } *q++ = 0; len = FFMIN(max_packet_size - 2, size); /* Look for a better place to split the frame into packets. */ if (len < size) { const uint8_t *end = find_resync_marker_reverse(buf1, buf1 + len); len = end - buf1; } memcpy(q, buf1, len); q += len; /* 90 KHz time stamp */ s->timestamp = s->cur_timestamp; ff_rtp_send_data(s1, s->buf, q - s->buf, (len == size)); buf1 += len; size -= len; } }

FFmpeg

34056cbba55f0131e8d2698717ab9e86e2da5178

void ff_rtp_send_h263(AVFormatContext *s1, const uint8_t *buf1, int size) { RTPMuxContext *s = s1->priv_data; int len, max_packet_size; uint8_t *q; max_packet_size = s->max_payload_size; while (size > 0) { q = s->buf; if ((buf1[0] == 0) && (buf1[1] == 0)) { *q++ = 0x04; buf1 += 2; size -= 2; } else { *q++ = 0; } *q++ = 0; len = FFMIN(max_packet_size - 2, size); if (len < size) { const uint8_t *end = find_resync_marker_reverse(buf1, buf1 + len); len = end - buf1; } memcpy(q, buf1, len); q += len; s->timestamp = s->cur_timestamp; ff_rtp_send_data(s1, s->buf, q - s->buf, (len == size)); buf1 += len; size -= len; } }

void FUNC_0(AVFormatContext *VAR_0, const uint8_t *VAR_1, int VAR_2) { RTPMuxContext *s = VAR_0->priv_data; int VAR_3, VAR_4; uint8_t *q; VAR_4 = s->max_payload_size; while (VAR_2 > 0) { q = s->buf; if ((VAR_1[0] == 0) && (VAR_1[1] == 0)) { *q++ = 0x04; VAR_1 += 2; VAR_2 -= 2; } else { *q++ = 0; } *q++ = 0; VAR_3 = FFMIN(VAR_4 - 2, VAR_2); if (VAR_3 < VAR_2) { const uint8_t *VAR_5 = find_resync_marker_reverse(VAR_1, VAR_1 + VAR_3); VAR_3 = VAR_5 - VAR_1; } memcpy(q, VAR_1, VAR_3); q += VAR_3; s->timestamp = s->cur_timestamp; ff_rtp_send_data(VAR_0, s->buf, q - s->buf, (VAR_3 == VAR_2)); VAR_1 += VAR_3; VAR_2 -= VAR_3; } }

void tcg_gen_callN(void *func, TCGTemp *ret, int nargs, TCGTemp **args) { TCGContext *s = tcg_ctx; int i, real_args, nb_rets, pi; unsigned sizemask, flags; TCGHelperInfo *info; TCGOp *op; info = g_hash_table_lookup(helper_table, (gpointer)func); flags = info->flags; sizemask = info->sizemask; #if defined(__sparc__) && !defined(__arch64__) \ && !defined(CONFIG_TCG_INTERPRETER) /* We have 64-bit values in one register, but need to pass as two separate parameters. Split them. */ int orig_sizemask = sizemask; int orig_nargs = nargs; TCGv_i64 retl, reth; TCGTemp *split_args[MAX_OPC_PARAM]; retl = NULL; reth = NULL; if (sizemask != 0) { for (i = real_args = 0; i < nargs; ++i) { int is_64bit = sizemask & (1 << (i+1)*2); if (is_64bit) { TCGv_i64 orig = temp_tcgv_i64(args[i]); TCGv_i32 h = tcg_temp_new_i32(); TCGv_i32 l = tcg_temp_new_i32(); tcg_gen_extr_i64_i32(l, h, orig); split_args[real_args++] = tcgv_i32_temp(h); split_args[real_args++] = tcgv_i32_temp(l); } else { split_args[real_args++] = args[i]; } } nargs = real_args; args = split_args; sizemask = 0; } #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64 for (i = 0; i < nargs; ++i) { int is_64bit = sizemask & (1 << (i+1)*2); int is_signed = sizemask & (2 << (i+1)*2); if (!is_64bit) { TCGv_i64 temp = tcg_temp_new_i64(); TCGv_i64 orig = temp_tcgv_i64(args[i]); if (is_signed) { tcg_gen_ext32s_i64(temp, orig); } else { tcg_gen_ext32u_i64(temp, orig); } args[i] = tcgv_i64_temp(temp); } } #endif /* TCG_TARGET_EXTEND_ARGS */ i = s->gen_next_op_idx; tcg_debug_assert(i < OPC_BUF_SIZE); s->gen_op_buf[0].prev = i; s->gen_next_op_idx = i + 1; op = &s->gen_op_buf[i]; /* Set links for sequential allocation during translation. */ memset(op, 0, offsetof(TCGOp, args)); op->opc = INDEX_op_call; op->prev = i - 1; op->next = i + 1; pi = 0; if (ret != NULL) { #if defined(__sparc__) && !defined(__arch64__) \ && !defined(CONFIG_TCG_INTERPRETER) if (orig_sizemask & 1) { /* The 32-bit ABI is going to return the 64-bit value in the %o0/%o1 register pair. Prepare for this by using two return temporaries, and reassemble below. */ retl = tcg_temp_new_i64(); reth = tcg_temp_new_i64(); op->args[pi++] = tcgv_i64_arg(reth); op->args[pi++] = tcgv_i64_arg(retl); nb_rets = 2; } else { op->args[pi++] = temp_arg(ret); nb_rets = 1; } #else if (TCG_TARGET_REG_BITS < 64 && (sizemask & 1)) { #ifdef HOST_WORDS_BIGENDIAN op->args[pi++] = temp_arg(ret + 1); op->args[pi++] = temp_arg(ret); #else op->args[pi++] = temp_arg(ret); op->args[pi++] = temp_arg(ret + 1); #endif nb_rets = 2; } else { op->args[pi++] = temp_arg(ret); nb_rets = 1; } #endif } else { nb_rets = 0; } op->callo = nb_rets; real_args = 0; for (i = 0; i < nargs; i++) { int is_64bit = sizemask & (1 << (i+1)*2); if (TCG_TARGET_REG_BITS < 64 && is_64bit) { #ifdef TCG_TARGET_CALL_ALIGN_ARGS /* some targets want aligned 64 bit args */ if (real_args & 1) { op->args[pi++] = TCG_CALL_DUMMY_ARG; real_args++; } #endif /* If stack grows up, then we will be placing successive arguments at lower addresses, which means we need to reverse the order compared to how we would normally treat either big or little-endian. For those arguments that will wind up in registers, this still works for HPPA (the only current STACK_GROWSUP target) since the argument registers are *also* allocated in decreasing order. If another such target is added, this logic may have to get more complicated to differentiate between stack arguments and register arguments. */ #if defined(HOST_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP) op->args[pi++] = temp_arg(args[i] + 1); op->args[pi++] = temp_arg(args[i]); #else op->args[pi++] = temp_arg(args[i]); op->args[pi++] = temp_arg(args[i] + 1); #endif real_args += 2; continue; } op->args[pi++] = temp_arg(args[i]); real_args++; } op->args[pi++] = (uintptr_t)func; op->args[pi++] = flags; op->calli = real_args; /* Make sure the fields didn't overflow. */ tcg_debug_assert(op->calli == real_args); tcg_debug_assert(pi <= ARRAY_SIZE(op->args)); #if defined(__sparc__) && !defined(__arch64__) \ && !defined(CONFIG_TCG_INTERPRETER) /* Free all of the parts we allocated above. */ for (i = real_args = 0; i < orig_nargs; ++i) { int is_64bit = orig_sizemask & (1 << (i+1)*2); if (is_64bit) { tcg_temp_free_internal(args[real_args++]); tcg_temp_free_internal(args[real_args++]); } else { real_args++; } } if (orig_sizemask & 1) { /* The 32-bit ABI returned two 32-bit pieces. Re-assemble them. Note that describing these as TCGv_i64 eliminates an unnecessary zero-extension that tcg_gen_concat_i32_i64 would create. */ tcg_gen_concat32_i64(temp_tcgv_i64(ret), retl, reth); tcg_temp_free_i64(retl); tcg_temp_free_i64(reth); } #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64 for (i = 0; i < nargs; ++i) { int is_64bit = sizemask & (1 << (i+1)*2); if (!is_64bit) { tcg_temp_free_internal(args[i]); } } #endif /* TCG_TARGET_EXTEND_ARGS */ }

qemu

15fa08f8451babc88d733bd411d4c94976f9d0f8

void tcg_gen_callN(void *func, TCGTemp *ret, int nargs, TCGTemp **args) { TCGContext *s = tcg_ctx; int i, real_args, nb_rets, pi; unsigned sizemask, flags; TCGHelperInfo *info; TCGOp *op; info = g_hash_table_lookup(helper_table, (gpointer)func); flags = info->flags; sizemask = info->sizemask; #if defined(__sparc__) && !defined(__arch64__) \ && !defined(CONFIG_TCG_INTERPRETER) int orig_sizemask = sizemask; int orig_nargs = nargs; TCGv_i64 retl, reth; TCGTemp *split_args[MAX_OPC_PARAM]; retl = NULL; reth = NULL; if (sizemask != 0) { for (i = real_args = 0; i < nargs; ++i) { int is_64bit = sizemask & (1 << (i+1)*2); if (is_64bit) { TCGv_i64 orig = temp_tcgv_i64(args[i]); TCGv_i32 h = tcg_temp_new_i32(); TCGv_i32 l = tcg_temp_new_i32(); tcg_gen_extr_i64_i32(l, h, orig); split_args[real_args++] = tcgv_i32_temp(h); split_args[real_args++] = tcgv_i32_temp(l); } else { split_args[real_args++] = args[i]; } } nargs = real_args; args = split_args; sizemask = 0; } #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64 for (i = 0; i < nargs; ++i) { int is_64bit = sizemask & (1 << (i+1)*2); int is_signed = sizemask & (2 << (i+1)*2); if (!is_64bit) { TCGv_i64 temp = tcg_temp_new_i64(); TCGv_i64 orig = temp_tcgv_i64(args[i]); if (is_signed) { tcg_gen_ext32s_i64(temp, orig); } else { tcg_gen_ext32u_i64(temp, orig); } args[i] = tcgv_i64_temp(temp); } } #endif i = s->gen_next_op_idx; tcg_debug_assert(i < OPC_BUF_SIZE); s->gen_op_buf[0].prev = i; s->gen_next_op_idx = i + 1; op = &s->gen_op_buf[i]; memset(op, 0, offsetof(TCGOp, args)); op->opc = INDEX_op_call; op->prev = i - 1; op->next = i + 1; pi = 0; if (ret != NULL) { #if defined(__sparc__) && !defined(__arch64__) \ && !defined(CONFIG_TCG_INTERPRETER) if (orig_sizemask & 1) { retl = tcg_temp_new_i64(); reth = tcg_temp_new_i64(); op->args[pi++] = tcgv_i64_arg(reth); op->args[pi++] = tcgv_i64_arg(retl); nb_rets = 2; } else { op->args[pi++] = temp_arg(ret); nb_rets = 1; } #else if (TCG_TARGET_REG_BITS < 64 && (sizemask & 1)) { #ifdef HOST_WORDS_BIGENDIAN op->args[pi++] = temp_arg(ret + 1); op->args[pi++] = temp_arg(ret); #else op->args[pi++] = temp_arg(ret); op->args[pi++] = temp_arg(ret + 1); #endif nb_rets = 2; } else { op->args[pi++] = temp_arg(ret); nb_rets = 1; } #endif } else { nb_rets = 0; } op->callo = nb_rets; real_args = 0; for (i = 0; i < nargs; i++) { int is_64bit = sizemask & (1 << (i+1)*2); if (TCG_TARGET_REG_BITS < 64 && is_64bit) { #ifdef TCG_TARGET_CALL_ALIGN_ARGS if (real_args & 1) { op->args[pi++] = TCG_CALL_DUMMY_ARG; real_args++; } #endif #if defined(HOST_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP) op->args[pi++] = temp_arg(args[i] + 1); op->args[pi++] = temp_arg(args[i]); #else op->args[pi++] = temp_arg(args[i]); op->args[pi++] = temp_arg(args[i] + 1); #endif real_args += 2; continue; } op->args[pi++] = temp_arg(args[i]); real_args++; } op->args[pi++] = (uintptr_t)func; op->args[pi++] = flags; op->calli = real_args; tcg_debug_assert(op->calli == real_args); tcg_debug_assert(pi <= ARRAY_SIZE(op->args)); #if defined(__sparc__) && !defined(__arch64__) \ && !defined(CONFIG_TCG_INTERPRETER) for (i = real_args = 0; i < orig_nargs; ++i) { int is_64bit = orig_sizemask & (1 << (i+1)*2); if (is_64bit) { tcg_temp_free_internal(args[real_args++]); tcg_temp_free_internal(args[real_args++]); } else { real_args++; } } if (orig_sizemask & 1) { tcg_gen_concat32_i64(temp_tcgv_i64(ret), retl, reth); tcg_temp_free_i64(retl); tcg_temp_free_i64(reth); } #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64 for (i = 0; i < nargs; ++i) { int is_64bit = sizemask & (1 << (i+1)*2); if (!is_64bit) { tcg_temp_free_internal(args[i]); } } #endif }

void FUNC_0(void *VAR_0, TCGTemp *VAR_1, int VAR_2, TCGTemp **VAR_3) { TCGContext *s = tcg_ctx; int VAR_4, VAR_5, VAR_6, VAR_7; unsigned VAR_8, VAR_9; TCGHelperInfo *info; TCGOp *op; info = g_hash_table_lookup(helper_table, (gpointer)VAR_0); VAR_9 = info->VAR_9; VAR_8 = info->VAR_8; #if defined(__sparc__) && !defined(__arch64__) \ && !defined(CONFIG_TCG_INTERPRETER) int orig_sizemask = VAR_8; int orig_nargs = VAR_2; TCGv_i64 retl, reth; TCGTemp *split_args[MAX_OPC_PARAM]; retl = NULL; reth = NULL; if (VAR_8 != 0) { for (VAR_4 = VAR_5 = 0; VAR_4 < VAR_2; ++VAR_4) { int VAR_10 = VAR_8 & (1 << (VAR_4+1)*2); if (VAR_10) { TCGv_i64 orig = temp_tcgv_i64(VAR_3[VAR_4]); TCGv_i32 h = tcg_temp_new_i32(); TCGv_i32 l = tcg_temp_new_i32(); tcg_gen_extr_i64_i32(l, h, orig); split_args[VAR_5++] = tcgv_i32_temp(h); split_args[VAR_5++] = tcgv_i32_temp(l); } else { split_args[VAR_5++] = VAR_3[VAR_4]; } } VAR_2 = VAR_5; VAR_3 = split_args; VAR_8 = 0; } #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64 for (VAR_4 = 0; VAR_4 < VAR_2; ++VAR_4) { int VAR_10 = VAR_8 & (1 << (VAR_4+1)*2); int is_signed = VAR_8 & (2 << (VAR_4+1)*2); if (!VAR_10) { TCGv_i64 temp = tcg_temp_new_i64(); TCGv_i64 orig = temp_tcgv_i64(VAR_3[VAR_4]); if (is_signed) { tcg_gen_ext32s_i64(temp, orig); } else { tcg_gen_ext32u_i64(temp, orig); } VAR_3[VAR_4] = tcgv_i64_temp(temp); } } #endif VAR_4 = s->gen_next_op_idx; tcg_debug_assert(VAR_4 < OPC_BUF_SIZE); s->gen_op_buf[0].prev = VAR_4; s->gen_next_op_idx = VAR_4 + 1; op = &s->gen_op_buf[VAR_4]; memset(op, 0, offsetof(TCGOp, VAR_3)); op->opc = INDEX_op_call; op->prev = VAR_4 - 1; op->next = VAR_4 + 1; VAR_7 = 0; if (VAR_1 != NULL) { #if defined(__sparc__) && !defined(__arch64__) \ && !defined(CONFIG_TCG_INTERPRETER) if (orig_sizemask & 1) { retl = tcg_temp_new_i64(); reth = tcg_temp_new_i64(); op->VAR_3[VAR_7++] = tcgv_i64_arg(reth); op->VAR_3[VAR_7++] = tcgv_i64_arg(retl); VAR_6 = 2; } else { op->VAR_3[VAR_7++] = temp_arg(VAR_1); VAR_6 = 1; } #else if (TCG_TARGET_REG_BITS < 64 && (VAR_8 & 1)) { #ifdef HOST_WORDS_BIGENDIAN op->VAR_3[VAR_7++] = temp_arg(VAR_1 + 1); op->VAR_3[VAR_7++] = temp_arg(VAR_1); #else op->VAR_3[VAR_7++] = temp_arg(VAR_1); op->VAR_3[VAR_7++] = temp_arg(VAR_1 + 1); #endif VAR_6 = 2; } else { op->VAR_3[VAR_7++] = temp_arg(VAR_1); VAR_6 = 1; } #endif } else { VAR_6 = 0; } op->callo = VAR_6; VAR_5 = 0; for (VAR_4 = 0; VAR_4 < VAR_2; VAR_4++) { int VAR_10 = VAR_8 & (1 << (VAR_4+1)*2); if (TCG_TARGET_REG_BITS < 64 && VAR_10) { #ifdef TCG_TARGET_CALL_ALIGN_ARGS if (VAR_5 & 1) { op->VAR_3[VAR_7++] = TCG_CALL_DUMMY_ARG; VAR_5++; } #endif #if defined(HOST_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP) op->VAR_3[VAR_7++] = temp_arg(VAR_3[VAR_4] + 1); op->VAR_3[VAR_7++] = temp_arg(VAR_3[VAR_4]); #else op->VAR_3[VAR_7++] = temp_arg(VAR_3[VAR_4]); op->VAR_3[VAR_7++] = temp_arg(VAR_3[VAR_4] + 1); #endif VAR_5 += 2; continue; } op->VAR_3[VAR_7++] = temp_arg(VAR_3[VAR_4]); VAR_5++; } op->VAR_3[VAR_7++] = (uintptr_t)VAR_0; op->VAR_3[VAR_7++] = VAR_9; op->calli = VAR_5; tcg_debug_assert(op->calli == VAR_5); tcg_debug_assert(VAR_7 <= ARRAY_SIZE(op->VAR_3)); #if defined(__sparc__) && !defined(__arch64__) \ && !defined(CONFIG_TCG_INTERPRETER) for (VAR_4 = VAR_5 = 0; VAR_4 < orig_nargs; ++VAR_4) { int VAR_10 = orig_sizemask & (1 << (VAR_4+1)*2); if (VAR_10) { tcg_temp_free_internal(VAR_3[VAR_5++]); tcg_temp_free_internal(VAR_3[VAR_5++]); } else { VAR_5++; } } if (orig_sizemask & 1) { tcg_gen_concat32_i64(temp_tcgv_i64(VAR_1), retl, reth); tcg_temp_free_i64(retl); tcg_temp_free_i64(reth); } #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64 for (VAR_4 = 0; VAR_4 < VAR_2; ++VAR_4) { int VAR_10 = VAR_8 & (1 << (VAR_4+1)*2); if (!VAR_10) { tcg_temp_free_internal(VAR_3[VAR_4]); } } #endif }

void block_job_enter(BlockJob *job) { if (!block_job_started(job)) { return; } if (job->deferred_to_main_loop) { return; } if (!job->busy) { bdrv_coroutine_enter(blk_bs(job->blk), job->co); } }

qemu

356f59b8757f47c0aca3e2e4e51d6010f64cade1

void block_job_enter(BlockJob *job) { if (!block_job_started(job)) { return; } if (job->deferred_to_main_loop) { return; } if (!job->busy) { bdrv_coroutine_enter(blk_bs(job->blk), job->co); } }

void FUNC_0(BlockJob *VAR_0) { if (!block_job_started(VAR_0)) { return; } if (VAR_0->deferred_to_main_loop) { return; } if (!VAR_0->busy) { bdrv_coroutine_enter(blk_bs(VAR_0->blk), VAR_0->co); } }

static int vorbis_decode_frame(AVCodecContext *avccontext, void *data, int *data_size, AVPacket *avpkt) { const uint8_t *buf = avpkt->data; int buf_size = avpkt->size; vorbis_context *vc = avccontext->priv_data ; GetBitContext *gb = &(vc->gb); const float *channel_ptrs[255]; int i, len; if (!buf_size) return 0; av_dlog(NULL, "packet length %d \n", buf_size); init_get_bits(gb, buf, buf_size*8); len = vorbis_parse_audio_packet(vc); if (len <= 0) { *data_size = 0; return buf_size; } if (!vc->first_frame) { vc->first_frame = 1; *data_size = 0; return buf_size ; } av_dlog(NULL, "parsed %d bytes %d bits, returned %d samples (*ch*bits) \n", get_bits_count(gb) / 8, get_bits_count(gb) % 8, len); if (vc->audio_channels > 8) { for (i = 0; i < vc->audio_channels; i++) channel_ptrs[i] = vc->channel_floors + i * len; } else { for (i = 0; i < vc->audio_channels; i++) channel_ptrs[i] = vc->channel_floors + len * ff_vorbis_channel_layout_offsets[vc->audio_channels - 1][i]; } if (avccontext->sample_fmt == AV_SAMPLE_FMT_FLT) vc->fmt_conv.float_interleave(data, channel_ptrs, len, vc->audio_channels); else vc->fmt_conv.float_to_int16_interleave(data, channel_ptrs, len, vc->audio_channels); *data_size = len * vc->audio_channels * av_get_bytes_per_sample(avccontext->sample_fmt); return buf_size ; }

FFmpeg

60aa1a358d9c1c8f891e72246d5dcd897857eca8

static int vorbis_decode_frame(AVCodecContext *avccontext, void *data, int *data_size, AVPacket *avpkt) { const uint8_t *buf = avpkt->data; int buf_size = avpkt->size; vorbis_context *vc = avccontext->priv_data ; GetBitContext *gb = &(vc->gb); const float *channel_ptrs[255]; int i, len; if (!buf_size) return 0; av_dlog(NULL, "packet length %d \n", buf_size); init_get_bits(gb, buf, buf_size*8); len = vorbis_parse_audio_packet(vc); if (len <= 0) { *data_size = 0; return buf_size; } if (!vc->first_frame) { vc->first_frame = 1; *data_size = 0; return buf_size ; } av_dlog(NULL, "parsed %d bytes %d bits, returned %d samples (*ch*bits) \n", get_bits_count(gb) / 8, get_bits_count(gb) % 8, len); if (vc->audio_channels > 8) { for (i = 0; i < vc->audio_channels; i++) channel_ptrs[i] = vc->channel_floors + i * len; } else { for (i = 0; i < vc->audio_channels; i++) channel_ptrs[i] = vc->channel_floors + len * ff_vorbis_channel_layout_offsets[vc->audio_channels - 1][i]; } if (avccontext->sample_fmt == AV_SAMPLE_FMT_FLT) vc->fmt_conv.float_interleave(data, channel_ptrs, len, vc->audio_channels); else vc->fmt_conv.float_to_int16_interleave(data, channel_ptrs, len, vc->audio_channels); *data_size = len * vc->audio_channels * av_get_bytes_per_sample(avccontext->sample_fmt); return buf_size ; }

static int FUNC_0(AVCodecContext *VAR_0, void *VAR_1, int *VAR_2, AVPacket *VAR_3) { const uint8_t *VAR_4 = VAR_3->VAR_1; int VAR_5 = VAR_3->size; vorbis_context *vc = VAR_0->priv_data ; GetBitContext *gb = &(vc->gb); const float *VAR_6[255]; int VAR_7, VAR_8; if (!VAR_5) return 0; av_dlog(NULL, "packet length %d \n", VAR_5); init_get_bits(gb, VAR_4, VAR_5*8); VAR_8 = vorbis_parse_audio_packet(vc); if (VAR_8 <= 0) { *VAR_2 = 0; return VAR_5; } if (!vc->first_frame) { vc->first_frame = 1; *VAR_2 = 0; return VAR_5 ; } av_dlog(NULL, "parsed %d bytes %d bits, returned %d samples (*ch*bits) \n", get_bits_count(gb) / 8, get_bits_count(gb) % 8, VAR_8); if (vc->audio_channels > 8) { for (VAR_7 = 0; VAR_7 < vc->audio_channels; VAR_7++) VAR_6[VAR_7] = vc->channel_floors + VAR_7 * VAR_8; } else { for (VAR_7 = 0; VAR_7 < vc->audio_channels; VAR_7++) VAR_6[VAR_7] = vc->channel_floors + VAR_8 * ff_vorbis_channel_layout_offsets[vc->audio_channels - 1][VAR_7]; } if (VAR_0->sample_fmt == AV_SAMPLE_FMT_FLT) vc->fmt_conv.float_interleave(VAR_1, VAR_6, VAR_8, vc->audio_channels); else vc->fmt_conv.float_to_int16_interleave(VAR_1, VAR_6, VAR_8, vc->audio_channels); *VAR_2 = VAR_8 * vc->audio_channels * av_get_bytes_per_sample(VAR_0->sample_fmt); return VAR_5 ; }

void qmp_guest_shutdown(bool has_mode, const char *mode, Error **err) { UINT shutdown_flag = EWX_FORCE; slog("guest-shutdown called, mode: %s", mode); if (!has_mode || strcmp(mode, "powerdown") == 0) { shutdown_flag |= EWX_POWEROFF; } else if (strcmp(mode, "halt") == 0) { shutdown_flag |= EWX_SHUTDOWN; } else if (strcmp(mode, "reboot") == 0) { shutdown_flag |= EWX_REBOOT; } else { error_set(err, QERR_INVALID_PARAMETER_VALUE, "mode", "halt|powerdown|reboot"); return; } /* Request a shutdown privilege, but try to shut down the system anyway. */ acquire_privilege(SE_SHUTDOWN_NAME, err); if (error_is_set(err)) { return; } if (!ExitWindowsEx(shutdown_flag, SHTDN_REASON_FLAG_PLANNED)) { slog("guest-shutdown failed: %d", GetLastError()); error_set(err, QERR_UNDEFINED_ERROR); } }

qemu

16f4e8fa737b58b7b0461b33581e43ac06991110

void qmp_guest_shutdown(bool has_mode, const char *mode, Error **err) { UINT shutdown_flag = EWX_FORCE; slog("guest-shutdown called, mode: %s", mode); if (!has_mode || strcmp(mode, "powerdown") == 0) { shutdown_flag |= EWX_POWEROFF; } else if (strcmp(mode, "halt") == 0) { shutdown_flag |= EWX_SHUTDOWN; } else if (strcmp(mode, "reboot") == 0) { shutdown_flag |= EWX_REBOOT; } else { error_set(err, QERR_INVALID_PARAMETER_VALUE, "mode", "halt|powerdown|reboot"); return; } acquire_privilege(SE_SHUTDOWN_NAME, err); if (error_is_set(err)) { return; } if (!ExitWindowsEx(shutdown_flag, SHTDN_REASON_FLAG_PLANNED)) { slog("guest-shutdown failed: %d", GetLastError()); error_set(err, QERR_UNDEFINED_ERROR); } }

void FUNC_0(bool VAR_0, const char *VAR_1, Error **VAR_2) { UINT shutdown_flag = EWX_FORCE; slog("guest-shutdown called, VAR_1: %s", VAR_1); if (!VAR_0 || strcmp(VAR_1, "powerdown") == 0) { shutdown_flag |= EWX_POWEROFF; } else if (strcmp(VAR_1, "halt") == 0) { shutdown_flag |= EWX_SHUTDOWN; } else if (strcmp(VAR_1, "reboot") == 0) { shutdown_flag |= EWX_REBOOT; } else { error_set(VAR_2, QERR_INVALID_PARAMETER_VALUE, "VAR_1", "halt|powerdown|reboot"); return; } acquire_privilege(SE_SHUTDOWN_NAME, VAR_2); if (error_is_set(VAR_2)) { return; } if (!ExitWindowsEx(shutdown_flag, SHTDN_REASON_FLAG_PLANNED)) { slog("guest-shutdown failed: %d", GetLastError()); error_set(VAR_2, QERR_UNDEFINED_ERROR); } }

void helper_rdmsr(void) { uint64_t val; helper_svm_check_intercept_param(SVM_EXIT_MSR, 0); switch((uint32_t)ECX) { case MSR_IA32_SYSENTER_CS: val = env->sysenter_cs; case MSR_IA32_SYSENTER_ESP: val = env->sysenter_esp; case MSR_IA32_SYSENTER_EIP: val = env->sysenter_eip; case MSR_IA32_APICBASE: val = cpu_get_apic_base(env); case MSR_EFER: val = env->efer; case MSR_STAR: val = env->star; case MSR_PAT: val = env->pat; case MSR_VM_HSAVE_PA: val = env->vm_hsave; case MSR_IA32_PERF_STATUS: /* tsc_increment_by_tick */ val = 1000ULL; /* CPU multiplier */ val |= (((uint64_t)4ULL) << 40); #ifdef TARGET_X86_64 case MSR_LSTAR: val = env->lstar; case MSR_CSTAR: val = env->cstar; case MSR_FMASK: val = env->fmask; case MSR_FSBASE: val = env->segs[R_FS].base; case MSR_GSBASE: val = env->segs[R_GS].base; case MSR_KERNELGSBASE: val = env->kernelgsbase; #endif #ifdef USE_KQEMU case MSR_QPI_COMMBASE: if (env->kqemu_enabled) { val = kqemu_comm_base; } else { val = 0; } #endif default: /* XXX: exception ? */ val = 0; } EAX = (uint32_t)(val); EDX = (uint32_t)(val >> 32); }

qemu

165d9b82eb8c877ee691a7b7bde5930bc2d07037

void helper_rdmsr(void) { uint64_t val; helper_svm_check_intercept_param(SVM_EXIT_MSR, 0); switch((uint32_t)ECX) { case MSR_IA32_SYSENTER_CS: val = env->sysenter_cs; case MSR_IA32_SYSENTER_ESP: val = env->sysenter_esp; case MSR_IA32_SYSENTER_EIP: val = env->sysenter_eip; case MSR_IA32_APICBASE: val = cpu_get_apic_base(env); case MSR_EFER: val = env->efer; case MSR_STAR: val = env->star; case MSR_PAT: val = env->pat; case MSR_VM_HSAVE_PA: val = env->vm_hsave; case MSR_IA32_PERF_STATUS: val = 1000ULL; val |= (((uint64_t)4ULL) << 40); #ifdef TARGET_X86_64 case MSR_LSTAR: val = env->lstar; case MSR_CSTAR: val = env->cstar; case MSR_FMASK: val = env->fmask; case MSR_FSBASE: val = env->segs[R_FS].base; case MSR_GSBASE: val = env->segs[R_GS].base; case MSR_KERNELGSBASE: val = env->kernelgsbase; #endif #ifdef USE_KQEMU case MSR_QPI_COMMBASE: if (env->kqemu_enabled) { val = kqemu_comm_base; } else { val = 0; } #endif default: val = 0; } EAX = (uint32_t)(val); EDX = (uint32_t)(val >> 32); }

void FUNC_0(void) { uint64_t val; helper_svm_check_intercept_param(SVM_EXIT_MSR, 0); switch((uint32_t)ECX) { case MSR_IA32_SYSENTER_CS: val = env->sysenter_cs; case MSR_IA32_SYSENTER_ESP: val = env->sysenter_esp; case MSR_IA32_SYSENTER_EIP: val = env->sysenter_eip; case MSR_IA32_APICBASE: val = cpu_get_apic_base(env); case MSR_EFER: val = env->efer; case MSR_STAR: val = env->star; case MSR_PAT: val = env->pat; case MSR_VM_HSAVE_PA: val = env->vm_hsave; case MSR_IA32_PERF_STATUS: val = 1000ULL; val |= (((uint64_t)4ULL) << 40); #ifdef TARGET_X86_64 case MSR_LSTAR: val = env->lstar; case MSR_CSTAR: val = env->cstar; case MSR_FMASK: val = env->fmask; case MSR_FSBASE: val = env->segs[R_FS].base; case MSR_GSBASE: val = env->segs[R_GS].base; case MSR_KERNELGSBASE: val = env->kernelgsbase; #endif #ifdef USE_KQEMU case MSR_QPI_COMMBASE: if (env->kqemu_enabled) { val = kqemu_comm_base; } else { val = 0; } #endif default: val = 0; } EAX = (uint32_t)(val); EDX = (uint32_t)(val >> 32); }

BlockJobInfoList *qmp_query_block_jobs(Error **errp) { BlockJobInfoList *head = NULL, **p_next = &head; BlockDriverState *bs; BdrvNextIterator *it = NULL; while ((it = bdrv_next(it, &bs))) { AioContext *aio_context = bdrv_get_aio_context(bs); aio_context_acquire(aio_context); if (bs->job) { BlockJobInfoList *elem = g_new0(BlockJobInfoList, 1); elem->value = block_job_query(bs->job); *p_next = elem; p_next = &elem->next; } aio_context_release(aio_context); } return head; }

qemu

88be7b4be4aa17c88247e162bdd7577ea79db94f

BlockJobInfoList *qmp_query_block_jobs(Error **errp) { BlockJobInfoList *head = NULL, **p_next = &head; BlockDriverState *bs; BdrvNextIterator *it = NULL; while ((it = bdrv_next(it, &bs))) { AioContext *aio_context = bdrv_get_aio_context(bs); aio_context_acquire(aio_context); if (bs->job) { BlockJobInfoList *elem = g_new0(BlockJobInfoList, 1); elem->value = block_job_query(bs->job); *p_next = elem; p_next = &elem->next; } aio_context_release(aio_context); } return head; }

BlockJobInfoList *FUNC_0(Error **errp) { BlockJobInfoList *head = NULL, **p_next = &head; BlockDriverState *bs; BdrvNextIterator *it = NULL; while ((it = bdrv_next(it, &bs))) { AioContext *aio_context = bdrv_get_aio_context(bs); aio_context_acquire(aio_context); if (bs->job) { BlockJobInfoList *elem = g_new0(BlockJobInfoList, 1); elem->value = block_job_query(bs->job); *p_next = elem; p_next = &elem->next; } aio_context_release(aio_context); } return head; }

DeviceState *ssi_create_slave(SSIBus *bus, const char *name) { DeviceState *dev; dev = qdev_create(&bus->qbus, name); qdev_init(dev); return dev; }

qemu

e23a1b33b53d25510320b26d9f154e19c6c99725

DeviceState *ssi_create_slave(SSIBus *bus, const char *name) { DeviceState *dev; dev = qdev_create(&bus->qbus, name); qdev_init(dev); return dev; }

DeviceState *FUNC_0(SSIBus *bus, const char *name) { DeviceState *dev; dev = qdev_create(&bus->qbus, name); qdev_init(dev); return dev; }

int ff_mjpeg_decode_sos(MJpegDecodeContext *s, const uint8_t *mb_bitmask, const AVFrame *reference) { int len, nb_components, i, h, v, predictor, point_transform; int index, id, ret; const int block_size = s->lossless ? 1 : 8; int ilv, prev_shift; if (!s->got_picture) { av_log(s->avctx, AV_LOG_WARNING, "Can not process SOS before SOF, skipping\n"); return -1; } av_assert0(s->picture_ptr->data[0]); /* XXX: verify len field validity */ len = get_bits(&s->gb, 16); nb_components = get_bits(&s->gb, 8); if (nb_components == 0 || nb_components > MAX_COMPONENTS) { av_log(s->avctx, AV_LOG_ERROR, "decode_sos: nb_components (%d) unsupported\n", nb_components); return AVERROR_PATCHWELCOME; } if (len != 6 + 2 * nb_components) { av_log(s->avctx, AV_LOG_ERROR, "decode_sos: invalid len (%d)\n", len); return AVERROR_INVALIDDATA; } for (i = 0; i < nb_components; i++) { id = get_bits(&s->gb, 8) - 1; av_log(s->avctx, AV_LOG_DEBUG, "component: %d\n", id); /* find component index */ for (index = 0; index < s->nb_components; index++) if (id == s->component_id[index]) break; if (index == s->nb_components) { av_log(s->avctx, AV_LOG_ERROR, "decode_sos: index(%d) out of components\n", index); return AVERROR_INVALIDDATA; } /* Metasoft MJPEG codec has Cb and Cr swapped */ if (s->avctx->codec_tag == MKTAG('M', 'T', 'S', 'J') && nb_components == 3 && s->nb_components == 3 && i) index = 3 - i; s->quant_sindex[i] = s->quant_index[index]; s->nb_blocks[i] = s->h_count[index] * s->v_count[index]; s->h_scount[i] = s->h_count[index]; s->v_scount[i] = s->v_count[index]; if(nb_components == 3 && s->nb_components == 3 && s->avctx->pix_fmt == AV_PIX_FMT_GBR24P) index = (i+2)%3; if(nb_components == 1 && s->nb_components == 3 && s->avctx->pix_fmt == AV_PIX_FMT_GBR24P) index = (index+2)%3; s->comp_index[i] = index; s->dc_index[i] = get_bits(&s->gb, 4); s->ac_index[i] = get_bits(&s->gb, 4); if (s->dc_index[i] < 0 || s->ac_index[i] < 0 || s->dc_index[i] >= 4 || s->ac_index[i] >= 4) goto out_of_range; if (!s->vlcs[0][s->dc_index[i]].table || !(s->progressive ? s->vlcs[2][s->ac_index[0]].table : s->vlcs[1][s->ac_index[i]].table)) goto out_of_range; } predictor = get_bits(&s->gb, 8); /* JPEG Ss / lossless JPEG predictor /JPEG-LS NEAR */ ilv = get_bits(&s->gb, 8); /* JPEG Se / JPEG-LS ILV */ if(s->avctx->codec_tag != AV_RL32("CJPG")){ prev_shift = get_bits(&s->gb, 4); /* Ah */ point_transform = get_bits(&s->gb, 4); /* Al */ }else prev_shift = point_transform = 0; if (nb_components > 1) { /* interleaved stream */ s->mb_width = (s->width + s->h_max * block_size - 1) / (s->h_max * block_size); s->mb_height = (s->height + s->v_max * block_size - 1) / (s->v_max * block_size); } else if (!s->ls) { /* skip this for JPEG-LS */ h = s->h_max / s->h_scount[0]; v = s->v_max / s->v_scount[0]; s->mb_width = (s->width + h * block_size - 1) / (h * block_size); s->mb_height = (s->height + v * block_size - 1) / (v * block_size); s->nb_blocks[0] = 1; s->h_scount[0] = 1; s->v_scount[0] = 1; } if (s->avctx->debug & FF_DEBUG_PICT_INFO) av_log(s->avctx, AV_LOG_DEBUG, "%s %s p:%d >>:%d ilv:%d bits:%d skip:%d %s comp:%d\n", s->lossless ? "lossless" : "sequential DCT", s->rgb ? "RGB" : "", predictor, point_transform, ilv, s->bits, s->mjpb_skiptosod, s->pegasus_rct ? "PRCT" : (s->rct ? "RCT" : ""), nb_components); /* mjpeg-b can have padding bytes between sos and image data, skip them */ for (i = s->mjpb_skiptosod; i > 0; i--) skip_bits(&s->gb, 8); next_field: for (i = 0; i < nb_components; i++) s->last_dc[i] = (4 << s->bits); if (s->lossless) { av_assert0(s->picture_ptr == s->picture); if (CONFIG_JPEGLS_DECODER && s->ls) { // for () { // reset_ls_coding_parameters(s, 0); if ((ret = ff_jpegls_decode_picture(s, predictor, point_transform, ilv)) < 0) return ret; } else { if (s->rgb) { if ((ret = ljpeg_decode_rgb_scan(s, nb_components, predictor, point_transform)) < 0) return ret; } else { if ((ret = ljpeg_decode_yuv_scan(s, predictor, point_transform, nb_components)) < 0) return ret; } } } else { if (s->progressive && predictor) { av_assert0(s->picture_ptr == s->picture); if ((ret = mjpeg_decode_scan_progressive_ac(s, predictor, ilv, prev_shift, point_transform)) < 0) return ret; } else { if ((ret = mjpeg_decode_scan(s, nb_components, prev_shift, point_transform, mb_bitmask, reference)) < 0) return ret; } } if (s->interlaced && get_bits_left(&s->gb) > 32 && show_bits(&s->gb, 8) == 0xFF) { GetBitContext bak = s->gb; align_get_bits(&bak); if (show_bits(&bak, 16) == 0xFFD1) { av_log(s->avctx, AV_LOG_DEBUG, "AVRn interlaced picture marker found\n"); s->gb = bak; skip_bits(&s->gb, 16); s->bottom_field ^= 1; goto next_field; } } emms_c(); return 0; out_of_range: av_log(s->avctx, AV_LOG_ERROR, "decode_sos: ac/dc index out of range\n"); return AVERROR_INVALIDDATA; }

FFmpeg

2884688bd51a808ccda3c0e13367619cd79e0579

int ff_mjpeg_decode_sos(MJpegDecodeContext *s, const uint8_t *mb_bitmask, const AVFrame *reference) { int len, nb_components, i, h, v, predictor, point_transform; int index, id, ret; const int block_size = s->lossless ? 1 : 8; int ilv, prev_shift; if (!s->got_picture) { av_log(s->avctx, AV_LOG_WARNING, "Can not process SOS before SOF, skipping\n"); return -1; } av_assert0(s->picture_ptr->data[0]); len = get_bits(&s->gb, 16); nb_components = get_bits(&s->gb, 8); if (nb_components == 0 || nb_components > MAX_COMPONENTS) { av_log(s->avctx, AV_LOG_ERROR, "decode_sos: nb_components (%d) unsupported\n", nb_components); return AVERROR_PATCHWELCOME; } if (len != 6 + 2 * nb_components) { av_log(s->avctx, AV_LOG_ERROR, "decode_sos: invalid len (%d)\n", len); return AVERROR_INVALIDDATA; } for (i = 0; i < nb_components; i++) { id = get_bits(&s->gb, 8) - 1; av_log(s->avctx, AV_LOG_DEBUG, "component: %d\n", id); for (index = 0; index < s->nb_components; index++) if (id == s->component_id[index]) break; if (index == s->nb_components) { av_log(s->avctx, AV_LOG_ERROR, "decode_sos: index(%d) out of components\n", index); return AVERROR_INVALIDDATA; } if (s->avctx->codec_tag == MKTAG('M', 'T', 'S', 'J') && nb_components == 3 && s->nb_components == 3 && i) index = 3 - i; s->quant_sindex[i] = s->quant_index[index]; s->nb_blocks[i] = s->h_count[index] * s->v_count[index]; s->h_scount[i] = s->h_count[index]; s->v_scount[i] = s->v_count[index]; if(nb_components == 3 && s->nb_components == 3 && s->avctx->pix_fmt == AV_PIX_FMT_GBR24P) index = (i+2)%3; if(nb_components == 1 && s->nb_components == 3 && s->avctx->pix_fmt == AV_PIX_FMT_GBR24P) index = (index+2)%3; s->comp_index[i] = index; s->dc_index[i] = get_bits(&s->gb, 4); s->ac_index[i] = get_bits(&s->gb, 4); if (s->dc_index[i] < 0 || s->ac_index[i] < 0 || s->dc_index[i] >= 4 || s->ac_index[i] >= 4) goto out_of_range; if (!s->vlcs[0][s->dc_index[i]].table || !(s->progressive ? s->vlcs[2][s->ac_index[0]].table : s->vlcs[1][s->ac_index[i]].table)) goto out_of_range; } predictor = get_bits(&s->gb, 8); ilv = get_bits(&s->gb, 8); if(s->avctx->codec_tag != AV_RL32("CJPG")){ prev_shift = get_bits(&s->gb, 4); point_transform = get_bits(&s->gb, 4); }else prev_shift = point_transform = 0; if (nb_components > 1) { s->mb_width = (s->width + s->h_max * block_size - 1) / (s->h_max * block_size); s->mb_height = (s->height + s->v_max * block_size - 1) / (s->v_max * block_size); } else if (!s->ls) { h = s->h_max / s->h_scount[0]; v = s->v_max / s->v_scount[0]; s->mb_width = (s->width + h * block_size - 1) / (h * block_size); s->mb_height = (s->height + v * block_size - 1) / (v * block_size); s->nb_blocks[0] = 1; s->h_scount[0] = 1; s->v_scount[0] = 1; } if (s->avctx->debug & FF_DEBUG_PICT_INFO) av_log(s->avctx, AV_LOG_DEBUG, "%s %s p:%d >>:%d ilv:%d bits:%d skip:%d %s comp:%d\n", s->lossless ? "lossless" : "sequential DCT", s->rgb ? "RGB" : "", predictor, point_transform, ilv, s->bits, s->mjpb_skiptosod, s->pegasus_rct ? "PRCT" : (s->rct ? "RCT" : ""), nb_components); for (i = s->mjpb_skiptosod; i > 0; i--) skip_bits(&s->gb, 8); next_field: for (i = 0; i < nb_components; i++) s->last_dc[i] = (4 << s->bits); if (s->lossless) { av_assert0(s->picture_ptr == s->picture); if (CONFIG_JPEGLS_DECODER && s->ls) { if ((ret = ff_jpegls_decode_picture(s, predictor, point_transform, ilv)) < 0) return ret; } else { if (s->rgb) { if ((ret = ljpeg_decode_rgb_scan(s, nb_components, predictor, point_transform)) < 0) return ret; } else { if ((ret = ljpeg_decode_yuv_scan(s, predictor, point_transform, nb_components)) < 0) return ret; } } } else { if (s->progressive && predictor) { av_assert0(s->picture_ptr == s->picture); if ((ret = mjpeg_decode_scan_progressive_ac(s, predictor, ilv, prev_shift, point_transform)) < 0) return ret; } else { if ((ret = mjpeg_decode_scan(s, nb_components, prev_shift, point_transform, mb_bitmask, reference)) < 0) return ret; } } if (s->interlaced && get_bits_left(&s->gb) > 32 && show_bits(&s->gb, 8) == 0xFF) { GetBitContext bak = s->gb; align_get_bits(&bak); if (show_bits(&bak, 16) == 0xFFD1) { av_log(s->avctx, AV_LOG_DEBUG, "AVRn interlaced picture marker found\n"); s->gb = bak; skip_bits(&s->gb, 16); s->bottom_field ^= 1; goto next_field; } } emms_c(); return 0; out_of_range: av_log(s->avctx, AV_LOG_ERROR, "decode_sos: ac/dc index out of range\n"); return AVERROR_INVALIDDATA; }

int FUNC_0(MJpegDecodeContext *VAR_0, const uint8_t *VAR_1, const AVFrame *VAR_2) { int VAR_3, VAR_4, VAR_5, VAR_6, VAR_7, VAR_8, VAR_9; int VAR_10, VAR_11, VAR_12; const int VAR_13 = VAR_0->lossless ? 1 : 8; int VAR_14, VAR_15; if (!VAR_0->got_picture) { av_log(VAR_0->avctx, AV_LOG_WARNING, "Can not process SOS before SOF, skipping\n"); return -1; } av_assert0(VAR_0->picture_ptr->data[0]); VAR_3 = get_bits(&VAR_0->gb, 16); VAR_4 = get_bits(&VAR_0->gb, 8); if (VAR_4 == 0 || VAR_4 > MAX_COMPONENTS) { av_log(VAR_0->avctx, AV_LOG_ERROR, "decode_sos: VAR_4 (%d) unsupported\n", VAR_4); return AVERROR_PATCHWELCOME; } if (VAR_3 != 6 + 2 * VAR_4) { av_log(VAR_0->avctx, AV_LOG_ERROR, "decode_sos: invalid VAR_3 (%d)\n", VAR_3); return AVERROR_INVALIDDATA; } for (VAR_5 = 0; VAR_5 < VAR_4; VAR_5++) { VAR_11 = get_bits(&VAR_0->gb, 8) - 1; av_log(VAR_0->avctx, AV_LOG_DEBUG, "component: %d\n", VAR_11); for (VAR_10 = 0; VAR_10 < VAR_0->VAR_4; VAR_10++) if (VAR_11 == VAR_0->component_id[VAR_10]) break; if (VAR_10 == VAR_0->VAR_4) { av_log(VAR_0->avctx, AV_LOG_ERROR, "decode_sos: VAR_10(%d) out of components\n", VAR_10); return AVERROR_INVALIDDATA; } if (VAR_0->avctx->codec_tag == MKTAG('M', 'T', 'S', 'J') && VAR_4 == 3 && VAR_0->VAR_4 == 3 && VAR_5) VAR_10 = 3 - VAR_5; VAR_0->quant_sindex[VAR_5] = VAR_0->quant_index[VAR_10]; VAR_0->nb_blocks[VAR_5] = VAR_0->h_count[VAR_10] * VAR_0->v_count[VAR_10]; VAR_0->h_scount[VAR_5] = VAR_0->h_count[VAR_10]; VAR_0->v_scount[VAR_5] = VAR_0->v_count[VAR_10]; if(VAR_4 == 3 && VAR_0->VAR_4 == 3 && VAR_0->avctx->pix_fmt == AV_PIX_FMT_GBR24P) VAR_10 = (VAR_5+2)%3; if(VAR_4 == 1 && VAR_0->VAR_4 == 3 && VAR_0->avctx->pix_fmt == AV_PIX_FMT_GBR24P) VAR_10 = (VAR_10+2)%3; VAR_0->comp_index[VAR_5] = VAR_10; VAR_0->dc_index[VAR_5] = get_bits(&VAR_0->gb, 4); VAR_0->ac_index[VAR_5] = get_bits(&VAR_0->gb, 4); if (VAR_0->dc_index[VAR_5] < 0 || VAR_0->ac_index[VAR_5] < 0 || VAR_0->dc_index[VAR_5] >= 4 || VAR_0->ac_index[VAR_5] >= 4) goto out_of_range; if (!VAR_0->vlcs[0][VAR_0->dc_index[VAR_5]].table || !(VAR_0->progressive ? VAR_0->vlcs[2][VAR_0->ac_index[0]].table : VAR_0->vlcs[1][VAR_0->ac_index[VAR_5]].table)) goto out_of_range; } VAR_8 = get_bits(&VAR_0->gb, 8); VAR_14 = get_bits(&VAR_0->gb, 8); if(VAR_0->avctx->codec_tag != AV_RL32("CJPG")){ VAR_15 = get_bits(&VAR_0->gb, 4); VAR_9 = get_bits(&VAR_0->gb, 4); }else VAR_15 = VAR_9 = 0; if (VAR_4 > 1) { VAR_0->mb_width = (VAR_0->width + VAR_0->h_max * VAR_13 - 1) / (VAR_0->h_max * VAR_13); VAR_0->mb_height = (VAR_0->height + VAR_0->v_max * VAR_13 - 1) / (VAR_0->v_max * VAR_13); } else if (!VAR_0->ls) { VAR_6 = VAR_0->h_max / VAR_0->h_scount[0]; VAR_7 = VAR_0->v_max / VAR_0->v_scount[0]; VAR_0->mb_width = (VAR_0->width + VAR_6 * VAR_13 - 1) / (VAR_6 * VAR_13); VAR_0->mb_height = (VAR_0->height + VAR_7 * VAR_13 - 1) / (VAR_7 * VAR_13); VAR_0->nb_blocks[0] = 1; VAR_0->h_scount[0] = 1; VAR_0->v_scount[0] = 1; } if (VAR_0->avctx->debug & FF_DEBUG_PICT_INFO) av_log(VAR_0->avctx, AV_LOG_DEBUG, "%VAR_0 %VAR_0 p:%d >>:%d VAR_14:%d bits:%d skip:%d %VAR_0 comp:%d\n", VAR_0->lossless ? "lossless" : "sequential DCT", VAR_0->rgb ? "RGB" : "", VAR_8, VAR_9, VAR_14, VAR_0->bits, VAR_0->mjpb_skiptosod, VAR_0->pegasus_rct ? "PRCT" : (VAR_0->rct ? "RCT" : ""), VAR_4); for (VAR_5 = VAR_0->mjpb_skiptosod; VAR_5 > 0; VAR_5--) skip_bits(&VAR_0->gb, 8); next_field: for (VAR_5 = 0; VAR_5 < VAR_4; VAR_5++) VAR_0->last_dc[VAR_5] = (4 << VAR_0->bits); if (VAR_0->lossless) { av_assert0(VAR_0->picture_ptr == VAR_0->picture); if (CONFIG_JPEGLS_DECODER && VAR_0->ls) { if ((VAR_12 = ff_jpegls_decode_picture(VAR_0, VAR_8, VAR_9, VAR_14)) < 0) return VAR_12; } else { if (VAR_0->rgb) { if ((VAR_12 = ljpeg_decode_rgb_scan(VAR_0, VAR_4, VAR_8, VAR_9)) < 0) return VAR_12; } else { if ((VAR_12 = ljpeg_decode_yuv_scan(VAR_0, VAR_8, VAR_9, VAR_4)) < 0) return VAR_12; } } } else { if (VAR_0->progressive && VAR_8) { av_assert0(VAR_0->picture_ptr == VAR_0->picture); if ((VAR_12 = mjpeg_decode_scan_progressive_ac(VAR_0, VAR_8, VAR_14, VAR_15, VAR_9)) < 0) return VAR_12; } else { if ((VAR_12 = mjpeg_decode_scan(VAR_0, VAR_4, VAR_15, VAR_9, VAR_1, VAR_2)) < 0) return VAR_12; } } if (VAR_0->interlaced && get_bits_left(&VAR_0->gb) > 32 && show_bits(&VAR_0->gb, 8) == 0xFF) { GetBitContext bak = VAR_0->gb; align_get_bits(&bak); if (show_bits(&bak, 16) == 0xFFD1) { av_log(VAR_0->avctx, AV_LOG_DEBUG, "AVRn interlaced picture marker found\n"); VAR_0->gb = bak; skip_bits(&VAR_0->gb, 16); VAR_0->bottom_field ^= 1; goto next_field; } } emms_c(); return 0; out_of_range: av_log(VAR_0->avctx, AV_LOG_ERROR, "decode_sos: ac/dc VAR_10 out of range\n"); return AVERROR_INVALIDDATA; }

static void v9fs_renameat(void *opaque) { ssize_t err = 0; size_t offset = 7; V9fsPDU *pdu = opaque; V9fsState *s = pdu->s; int32_t olddirfid, newdirfid; V9fsString old_name, new_name; v9fs_string_init(&old_name); v9fs_string_init(&new_name); err = pdu_unmarshal(pdu, offset, "dsds", &olddirfid, &old_name, &newdirfid, &new_name); if (err < 0) { if (name_is_illegal(old_name.data) || name_is_illegal(new_name.data)) { err = -ENOENT; v9fs_path_write_lock(s); err = v9fs_complete_renameat(pdu, olddirfid, &old_name, newdirfid, &new_name); v9fs_path_unlock(s); if (!err) { err = offset; out_err: pdu_complete(pdu, err); v9fs_string_free(&old_name); v9fs_string_free(&new_name);

qemu

805b5d98c649d26fc44d2d7755a97f18e62b438a

static void v9fs_renameat(void *opaque) { ssize_t err = 0; size_t offset = 7; V9fsPDU *pdu = opaque; V9fsState *s = pdu->s; int32_t olddirfid, newdirfid; V9fsString old_name, new_name; v9fs_string_init(&old_name); v9fs_string_init(&new_name); err = pdu_unmarshal(pdu, offset, "dsds", &olddirfid, &old_name, &newdirfid, &new_name); if (err < 0) { if (name_is_illegal(old_name.data) || name_is_illegal(new_name.data)) { err = -ENOENT; v9fs_path_write_lock(s); err = v9fs_complete_renameat(pdu, olddirfid, &old_name, newdirfid, &new_name); v9fs_path_unlock(s); if (!err) { err = offset; out_err: pdu_complete(pdu, err); v9fs_string_free(&old_name); v9fs_string_free(&new_name);

static void FUNC_0(void *VAR_0) { ssize_t err = 0; size_t offset = 7; V9fsPDU *pdu = VAR_0; V9fsState *s = pdu->s; int32_t olddirfid, newdirfid; V9fsString old_name, new_name; v9fs_string_init(&old_name); v9fs_string_init(&new_name); err = pdu_unmarshal(pdu, offset, "dsds", &olddirfid, &old_name, &newdirfid, &new_name); if (err < 0) { if (name_is_illegal(old_name.data) || name_is_illegal(new_name.data)) { err = -ENOENT; v9fs_path_write_lock(s); err = v9fs_complete_renameat(pdu, olddirfid, &old_name, newdirfid, &new_name); v9fs_path_unlock(s); if (!err) { err = offset; out_err: pdu_complete(pdu, err); v9fs_string_free(&old_name); v9fs_string_free(&new_name);

if_start(void) { struct mbuf *ifm, *ifqt; DEBUG_CALL("if_start"); if (if_queued == 0) return; /* Nothing to do */ again: /* check if we can really output */ if (!slirp_can_output()) return; /* * See which queue to get next packet from * If there's something in the fastq, select it immediately */ if (if_fastq.ifq_next != &if_fastq) { ifm = if_fastq.ifq_next; } else { /* Nothing on fastq, see if next_m is valid */ if (next_m != &if_batchq) ifm = next_m; else ifm = if_batchq.ifq_next; /* Set which packet to send on next iteration */ next_m = ifm->ifq_next; } /* Remove it from the queue */ ifqt = ifm->ifq_prev; remque(ifm); --if_queued; /* If there are more packets for this session, re-queue them */ if (ifm->ifs_next != /* ifm->ifs_prev != */ ifm) { insque(ifm->ifs_next, ifqt); ifs_remque(ifm); } /* Update so_queued */ if (ifm->ifq_so) { if (--ifm->ifq_so->so_queued == 0) /* If there's no more queued, reset nqueued */ ifm->ifq_so->so_nqueued = 0; } /* Encapsulate the packet for sending */ if_encap(ifm->m_data, ifm->m_len); if (if_queued) goto again; }

qemu

c9a621176e479b8106056ed992fddf34d9d0d206

if_start(void) { struct mbuf *ifm, *ifqt; DEBUG_CALL("if_start"); if (if_queued == 0) return; again: if (!slirp_can_output()) return; if (if_fastq.ifq_next != &if_fastq) { ifm = if_fastq.ifq_next; } else { if (next_m != &if_batchq) ifm = next_m; else ifm = if_batchq.ifq_next; next_m = ifm->ifq_next; } ifqt = ifm->ifq_prev; remque(ifm); --if_queued; if (ifm->ifs_next != ifm) { insque(ifm->ifs_next, ifqt); ifs_remque(ifm); } if (ifm->ifq_so) { if (--ifm->ifq_so->so_queued == 0) ifm->ifq_so->so_nqueued = 0; } if_encap(ifm->m_data, ifm->m_len); if (if_queued) goto again; }

FUNC_0(void) { struct mbuf *VAR_0, *VAR_1; DEBUG_CALL("FUNC_0"); if (if_queued == 0) return; again: if (!slirp_can_output()) return; if (if_fastq.ifq_next != &if_fastq) { VAR_0 = if_fastq.ifq_next; } else { if (next_m != &if_batchq) VAR_0 = next_m; else VAR_0 = if_batchq.ifq_next; next_m = VAR_0->ifq_next; } VAR_1 = VAR_0->ifq_prev; remque(VAR_0); --if_queued; if (VAR_0->ifs_next != VAR_0) { insque(VAR_0->ifs_next, VAR_1); ifs_remque(VAR_0); } if (VAR_0->ifq_so) { if (--VAR_0->ifq_so->so_queued == 0) VAR_0->ifq_so->so_nqueued = 0; } if_encap(VAR_0->m_data, VAR_0->m_len); if (if_queued) goto again; }

static void mips_cpu_realizefn(DeviceState *dev, Error **errp) { MIPSCPU *cpu = MIPS_CPU(dev); MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(dev); cpu_reset(CPU(cpu)); mcc->parent_realize(dev, errp); }

qemu

14a10fc39923b3af07c8c46d22cb20843bee3a72

static void mips_cpu_realizefn(DeviceState *dev, Error **errp) { MIPSCPU *cpu = MIPS_CPU(dev); MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(dev); cpu_reset(CPU(cpu)); mcc->parent_realize(dev, errp); }

static void FUNC_0(DeviceState *VAR_0, Error **VAR_1) { MIPSCPU *cpu = MIPS_CPU(VAR_0); MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(VAR_0); cpu_reset(CPU(cpu)); mcc->parent_realize(VAR_0, VAR_1); }

int ff_wms_parse_sdp_a_line(AVFormatContext *s, const char *p) { int ret = 0; if (av_strstart(p, "pgmpu:data:application/vnd.ms.wms-hdr.asfv1;base64,", &p)) { AVIOContext pb; RTSPState *rt = s->priv_data; AVDictionary *opts = NULL; int len = strlen(p) * 6 / 8; char *buf = av_mallocz(len); av_base64_decode(buf, p, len); if (rtp_asf_fix_header(buf, len) < 0) av_log(s, AV_LOG_ERROR, "Failed to fix invalid RTSP-MS/ASF min_pktsize\n"); init_packetizer(&pb, buf, len); if (rt->asf_ctx) { avformat_close_input(&rt->asf_ctx); } if (!(rt->asf_ctx = avformat_alloc_context())) return AVERROR(ENOMEM); rt->asf_ctx->pb = &pb; av_dict_set(&opts, "no_resync_search", "1", 0); ret = avformat_open_input(&rt->asf_ctx, "", &ff_asf_demuxer, &opts); av_dict_free(&opts); if (ret < 0) return ret; av_dict_copy(&s->metadata, rt->asf_ctx->metadata, 0); rt->asf_pb_pos = avio_tell(&pb); av_free(buf); rt->asf_ctx->pb = NULL; } return ret; }

FFmpeg

4733a12dd17a91d606e0079ff9bb48b9f419cbef

int ff_wms_parse_sdp_a_line(AVFormatContext *s, const char *p) { int ret = 0; if (av_strstart(p, "pgmpu:data:application/vnd.ms.wms-hdr.asfv1;base64,", &p)) { AVIOContext pb; RTSPState *rt = s->priv_data; AVDictionary *opts = NULL; int len = strlen(p) * 6 / 8; char *buf = av_mallocz(len); av_base64_decode(buf, p, len); if (rtp_asf_fix_header(buf, len) < 0) av_log(s, AV_LOG_ERROR, "Failed to fix invalid RTSP-MS/ASF min_pktsize\n"); init_packetizer(&pb, buf, len); if (rt->asf_ctx) { avformat_close_input(&rt->asf_ctx); } if (!(rt->asf_ctx = avformat_alloc_context())) return AVERROR(ENOMEM); rt->asf_ctx->pb = &pb; av_dict_set(&opts, "no_resync_search", "1", 0); ret = avformat_open_input(&rt->asf_ctx, "", &ff_asf_demuxer, &opts); av_dict_free(&opts); if (ret < 0) return ret; av_dict_copy(&s->metadata, rt->asf_ctx->metadata, 0); rt->asf_pb_pos = avio_tell(&pb); av_free(buf); rt->asf_ctx->pb = NULL; } return ret; }

int FUNC_0(AVFormatContext *VAR_0, const char *VAR_1) { int VAR_2 = 0; if (av_strstart(VAR_1, "pgmpu:data:application/vnd.ms.wms-hdr.asfv1;base64,", &VAR_1)) { AVIOContext pb; RTSPState *rt = VAR_0->priv_data; AVDictionary *opts = NULL; int VAR_3 = strlen(VAR_1) * 6 / 8; char *VAR_4 = av_mallocz(VAR_3); av_base64_decode(VAR_4, VAR_1, VAR_3); if (rtp_asf_fix_header(VAR_4, VAR_3) < 0) av_log(VAR_0, AV_LOG_ERROR, "Failed to fix invalid RTSP-MS/ASF min_pktsize\n"); init_packetizer(&pb, VAR_4, VAR_3); if (rt->asf_ctx) { avformat_close_input(&rt->asf_ctx); } if (!(rt->asf_ctx = avformat_alloc_context())) return AVERROR(ENOMEM); rt->asf_ctx->pb = &pb; av_dict_set(&opts, "no_resync_search", "1", 0); VAR_2 = avformat_open_input(&rt->asf_ctx, "", &ff_asf_demuxer, &opts); av_dict_free(&opts); if (VAR_2 < 0) return VAR_2; av_dict_copy(&VAR_0->metadata, rt->asf_ctx->metadata, 0); rt->asf_pb_pos = avio_tell(&pb); av_free(VAR_4); rt->asf_ctx->pb = NULL; } return VAR_2; }

static void alloc_picture(VideoState *is) { VideoPicture *vp; int64_t bufferdiff; vp = &is->pictq[is->pictq_windex]; if (vp->bmp) SDL_FreeYUVOverlay(vp->bmp); video_open(is, 0, vp); vp->bmp = SDL_CreateYUVOverlay(vp->width, vp->height, SDL_YV12_OVERLAY, screen); bufferdiff = vp->bmp ? FFMAX(vp->bmp->pixels[0], vp->bmp->pixels[1]) - FFMIN(vp->bmp->pixels[0], vp->bmp->pixels[1]) : 0; if (!vp->bmp || vp->bmp->pitches[0] < vp->width || bufferdiff < vp->height * vp->bmp->pitches[0]) { /* SDL allocates a buffer smaller than requested if the video * overlay hardware is unable to support the requested size. */ av_log(NULL, AV_LOG_FATAL, "Error: the video system does not support an image\n" "size of %dx%d pixels. Try using -lowres or -vf \"scale=w:h\"\n" "to reduce the image size.\n", vp->width, vp->height ); do_exit(is); } SDL_LockMutex(is->pictq_mutex); vp->allocated = 1; SDL_CondSignal(is->pictq_cond); SDL_UnlockMutex(is->pictq_mutex); }

FFmpeg

f73d6d2af7a2b30a647d945b590962a2ab54ff3b

static void alloc_picture(VideoState *is) { VideoPicture *vp; int64_t bufferdiff; vp = &is->pictq[is->pictq_windex]; if (vp->bmp) SDL_FreeYUVOverlay(vp->bmp); video_open(is, 0, vp); vp->bmp = SDL_CreateYUVOverlay(vp->width, vp->height, SDL_YV12_OVERLAY, screen); bufferdiff = vp->bmp ? FFMAX(vp->bmp->pixels[0], vp->bmp->pixels[1]) - FFMIN(vp->bmp->pixels[0], vp->bmp->pixels[1]) : 0; if (!vp->bmp || vp->bmp->pitches[0] < vp->width || bufferdiff < vp->height * vp->bmp->pitches[0]) { av_log(NULL, AV_LOG_FATAL, "Error: the video system does not support an image\n" "size of %dx%d pixels. Try using -lowres or -vf \"scale=w:h\"\n" "to reduce the image size.\n", vp->width, vp->height ); do_exit(is); } SDL_LockMutex(is->pictq_mutex); vp->allocated = 1; SDL_CondSignal(is->pictq_cond); SDL_UnlockMutex(is->pictq_mutex); }

static void FUNC_0(VideoState *VAR_0) { VideoPicture *vp; int64_t bufferdiff; vp = &VAR_0->pictq[VAR_0->pictq_windex]; if (vp->bmp) SDL_FreeYUVOverlay(vp->bmp); video_open(VAR_0, 0, vp); vp->bmp = SDL_CreateYUVOverlay(vp->width, vp->height, SDL_YV12_OVERLAY, screen); bufferdiff = vp->bmp ? FFMAX(vp->bmp->pixels[0], vp->bmp->pixels[1]) - FFMIN(vp->bmp->pixels[0], vp->bmp->pixels[1]) : 0; if (!vp->bmp || vp->bmp->pitches[0] < vp->width || bufferdiff < vp->height * vp->bmp->pitches[0]) { av_log(NULL, AV_LOG_FATAL, "Error: the video system does not support an image\n" "size of %dx%d pixels. Try using -lowres or -vf \"scale=w:h\"\n" "to reduce the image size.\n", vp->width, vp->height ); do_exit(VAR_0); } SDL_LockMutex(VAR_0->pictq_mutex); vp->allocated = 1; SDL_CondSignal(VAR_0->pictq_cond); SDL_UnlockMutex(VAR_0->pictq_mutex); }

void virtqueue_discard(VirtQueue *vq, const VirtQueueElement *elem, unsigned int len) { vq->last_avail_idx--; virtqueue_unmap_sg(vq, elem, len); }

qemu

58a83c61496eeb0d31571a07a51bc1947e3379ac

void virtqueue_discard(VirtQueue *vq, const VirtQueueElement *elem, unsigned int len) { vq->last_avail_idx--; virtqueue_unmap_sg(vq, elem, len); }

void FUNC_0(VirtQueue *VAR_0, const VirtQueueElement *VAR_1, unsigned int VAR_2) { VAR_0->last_avail_idx--; virtqueue_unmap_sg(VAR_0, VAR_1, VAR_2); }

static void arm_gic_common_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); dc->reset = arm_gic_common_reset; dc->realize = arm_gic_common_realize; dc->props = arm_gic_common_properties; dc->vmsd = &vmstate_gic; dc->no_user = 1; }

qemu

efec3dd631d94160288392721a5f9c39e50fb2bc

static void arm_gic_common_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); dc->reset = arm_gic_common_reset; dc->realize = arm_gic_common_realize; dc->props = arm_gic_common_properties; dc->vmsd = &vmstate_gic; dc->no_user = 1; }

static void FUNC_0(ObjectClass *VAR_0, void *VAR_1) { DeviceClass *dc = DEVICE_CLASS(VAR_0); dc->reset = arm_gic_common_reset; dc->realize = arm_gic_common_realize; dc->props = arm_gic_common_properties; dc->vmsd = &vmstate_gic; dc->no_user = 1; }

static CharDriverState *qemu_chr_open_tty(QemuOpts *opts) { const char *filename = qemu_opt_get(opts, "path"); CharDriverState *chr; int fd; TFR(fd = open(filename, O_RDWR | O_NONBLOCK)); if (fd < 0) { return NULL; } tty_serial_init(fd, 115200, 'N', 8, 1); chr = qemu_chr_open_fd(fd, fd); if (!chr) { close(fd); return NULL; } chr->chr_ioctl = tty_serial_ioctl; chr->chr_close = qemu_chr_close_tty; return chr; }

qemu

b181e04777da67acbc7448f87e4ae9f1518e08b2

static CharDriverState *qemu_chr_open_tty(QemuOpts *opts) { const char *filename = qemu_opt_get(opts, "path"); CharDriverState *chr; int fd; TFR(fd = open(filename, O_RDWR | O_NONBLOCK)); if (fd < 0) { return NULL; } tty_serial_init(fd, 115200, 'N', 8, 1); chr = qemu_chr_open_fd(fd, fd); if (!chr) { close(fd); return NULL; } chr->chr_ioctl = tty_serial_ioctl; chr->chr_close = qemu_chr_close_tty; return chr; }

static CharDriverState *FUNC_0(QemuOpts *opts) { const char *VAR_0 = qemu_opt_get(opts, "path"); CharDriverState *chr; int VAR_1; TFR(VAR_1 = open(VAR_0, O_RDWR | O_NONBLOCK)); if (VAR_1 < 0) { return NULL; } tty_serial_init(VAR_1, 115200, 'N', 8, 1); chr = qemu_chr_open_fd(VAR_1, VAR_1); if (!chr) { close(VAR_1); return NULL; } chr->chr_ioctl = tty_serial_ioctl; chr->chr_close = qemu_chr_close_tty; return chr; }

void object_property_set_qobject(Object *obj, QObject *value, const char *name, Error **errp) { Visitor *v; /* TODO: Should we reject, rather than ignore, excess input? */ v = qobject_input_visitor_new(value, false); object_property_set(obj, v, name, errp); visit_free(v); }

qemu

05601ed2de60df0e344d6b783a6bc0c1ff2b5d1f

void object_property_set_qobject(Object *obj, QObject *value, const char *name, Error **errp) { Visitor *v; v = qobject_input_visitor_new(value, false); object_property_set(obj, v, name, errp); visit_free(v); }

void FUNC_0(Object *VAR_0, QObject *VAR_1, const char *VAR_2, Error **VAR_3) { Visitor *v; v = qobject_input_visitor_new(VAR_1, false); object_property_set(VAR_0, v, VAR_2, VAR_3); visit_free(v); }