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How to send Sandbox.allow for each dynamic supervisor (testing)
Hello friends, I have read this link: Ecto.Adapters.SQL.Sandbox — Ecto SQL v3.7.2, they said if we dont wan to drop a Genserver like this:
** (exit) exited in: GenServer.call(#PID<0.1673.0>, {:push, :edit, %MishkaInstaller.PluginState{depend_type: :soft, depends: [], event: "event_one", extra: [], name: "plugin_hook_one", priority: 1, status: :started}}, 5000)
** (EXIT) no process: the process is not alive or there's no process currently associated with the given name, possibly because its application isn't started
We should do like this:
test "gets results from GenServer" do
{:ok, pid} = MyAppServer.start_link()
Ecto.Adapters.SQL.Sandbox.allow(Repo, self(), pid)
assert MyAppServer.get_my_data_fast(timeout: 1000) == [...]
end
But it did not speck about a Genserver with dynamic supervisor, for example:
Enum.map(@depends, fn item ->
Map.merge(@new_soft_plugin, %{name: item, depend_type: :hard, depends: List.delete(@depends, item)})
|> MishkaInstaller.PluginState.push_call()
end)
In the top code I pushed 4 items of a list to Genserver and the Genserver pushed it to my database, and each Genserver has the own dynamic supervisor and PID.
After pushing the items to my database, I try to work with their state and call them, but sometimes my Genserver which is supervised dynamically is dropped.
I increase queue_target and pool_size, they fix some errors not all the problems
pool_size: 30,
queue_target: 10000,
I have read many topics, but I still have problems with dynamic supervisor Genserver testing, unfortunately.
Thank you.
More code:
def push_call(%PluginState{} = element) do
case PSupervisor.start_job(%{id: element.name, type: element.event}) do
{:ok, status, pid} ->
if Mix.env() == :test, do: Logger.warn("Plugin State of #{element.name} is being pushed")
GenServer.call(pid, {:push, status, element})
{:error, result} -> {:error, :push, result}
end
end
and start job function
def start_job(args) do
DynamicSupervisor.start_child(PluginStateOtpRunner, {MishkaInstaller.PluginState, args})
|> case do
{:ok, pid} -> {:ok, :add, pid}
{:ok, pid, _any} -> {:ok, :add, pid}
{:error, {:already_started, pid}} -> {:ok, :edit, pid}
{:error, result} -> {:error, result}
end
end
2 Likes
I think you may have misinterpreted the examples.
In the docs, this seems like an example of what you shouldn’t do if you want to share servers across tests, because it’s starting the server in the test and then the server will die when the test is done. So if your other tests are running aynchronously, sometimes they will work because this test is still running.
test "gets results from GenServer" do
{:ok, pid} = MyAppServer.start_link()
Ecto.Adapters.SQL.Sandbox.allow(Repo, self(), pid)
assert MyAppServer.get_my_data_fast(timeout: 1000) == [...]
end
Instead it suggests running in “allow” mode, where you would start the dynamic servers outside of the test, then get a pid of the already-running server by its name, and use that.
test "calls worker that runs a query" do
allow = Process.whereis(MyApp.Worker)
Ecto.Adapters.SQL.Sandbox.allow(Repo, self(), allow)
... rest of test
end
2 Likes
Thank you, but it is still about a Genserver worker not with a dynamic supervisor, what I should do when I am using this?
To share a connection between a test and a GenServer you need to ensure three things:
1. somebody calls allow
2. the GenServer shuts down if the test shuts down
3. the GenServer shuts down if it’s trying to start up when the test has already shut down (this can happen when the DynamicSupervisor restarts the GenServer)
To handle all three, I’ve used code like this in the application’s Repo:
def allow_if_sandbox(parent_pid, orphan_msg \\ :stop) do
if sandbox_pool?() do
monitor_parent(parent_pid, orphan_msg)
# this addresses #1
Ecto.Adapters.SQL.Sandbox.allow(__MODULE__, parent_pid, self())
end
end
def sandbox_pool?() do
config = Application.fetch_env!(:core, __MODULE__)
Keyword.get(config, :pool) == Ecto.Adapters.SQL.Sandbox
end
defp monitor_parent(parent_pid, orphan_msg) do
# this is part of addressing #2
Process.monitor(parent_pid)
if Process.alive?(parent_pid) do
:ok
else
Logger.error("#{inspect(parent_pid)} down when booting #{inspect(self())}")
# this addresses #3
# the "throw" will work like an early "return"; see the GenServer docs
throw(orphan_msg)
end
end
The Process.alive? check is not strictly required - monitoring an already-down process will put a :DOWN message into the queue - but typically the code that calls Repo.allow_if_sandbox will then immediately make a Repo.one call instead of processing messages.
Then in your GenServer, there are two changes needed:
• receive parent_pid in the arguments to init/1 and call Repo.allow_if_sandbox(parent_pid)
• add a handler for the message Process.monitor can trigger, like:
def handle_info({:DOWN, _ref, :process, pid, _reason}, state)
# log that this happened, etc. Don't use Repo!
:stop
end
Finally, you’ll need to actually pass the parent_pid - usually by adding it to the code that’s starting processes. Based on your example, something like:
Enum.map(@depends, fn item ->
Map.merge(@new_soft_plugin, %{
parent_pid: self(),
name: item,
depend_type: :hard,
depends: List.delete(@depends, item)
})
|> MishkaInstaller.PluginState.push_call()
end)
2 Likes
Hi, after a long delay I have tested your code, and it fixed many errors of my open-source project And I appreciate you very much :rose:.
I have 2 problems
1- it forces me to increase pool_size to 20. Lower than 20 it has error and says to increase
2- sometimes it forgets its registry state.
For second problems, I forced to put :timer.sleap in my test (link)
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ece34605c058195ed03b4d393ef1a36c
|
-5,579,160,940,329,822,000 |
Branding & Web Design 07957 626 192 / [email protected]
Hacks and hackers in Liverpool
Posted on by admin
After hearing that Scraperwiki had organised a hack day in Liverpool, in my new-found freedom as a freelancer, I thought I’d pop down and give it a go. I’ve not really done a hack day either, so it was exciting to be throwing myself into the deepend a little. This was a little different from other hack days as the attendees were a mix of journalists and hackers, a nice idea given the growing use of data and visualisations in news stories.
A life of crime
The day was quite intense and I was pretty exhausted at the end of the day. I was on a team looking at crime as a subject area. Despite some good initial ideas about looking at crime and the geography of the city, extracting the kind of data necessary to map crime figures to specific parts of the city proved extremely difficult. Eventually we had to abandon that angle and went for a simpler approach of mapping stories around the city. Once the slight air of dispair had dissappeared, we had a lot of fun and producing a protoype for a project showing the ‘Life and Crimes* of ‘Pancake’ Taylor’ a notorious figure from Liverpool’s underworld.
Life and Crimes
The screenshot here demonstrates the idea; essentially we wanted to collate the news stories about this character and plot them on the map, showing them appearing in the order that they happened. By pressing the ‘play’ button, users could see the stories appear in the order that they happened. The lines on the slider would indicate where in the time frame the different stories happened in relation to each other. By moving the slider to that point, the user could jump to that point and show the stories. Simple, but it was nice to produce something that attempted to tell a more personal story, as most of the other projects focused on more intensive data analysis and information.
A good day despite the fact I didn’t win. I’m not bitter about that at all.
Overall, it was a great day day and despite setbacks I’m still really pleased with what we came up with, as well as being really impressed with the ideas presented by the other teams. The atmosphere in general was pretty friendly and it was a pleasure to spend the day with a diverse mix of people who all had something interesting to contribute. A big thanks to everyone at Scraperwiki for helping put on the event and making it a real success. I’m told there will be a Manchester event too, which I can definitely recommend, and indeed should be attending (and winning this time, goddammit).
*Alleged crimes that is.
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Avatar of David Williamson
David WilliamsonFlag for United States of America asked on
DFS and remote sites - part II
This thread was born of https://www.experts-exchange.com/Operating_Systems/Windows_Server_2003/Q_20931263.html#10699678
It has been created because the original focus of the thread has shifted, as well as a lot of time and effort has gone into the previous thread. I felt that it warranted a new thread...
Windows Server 2003
Avatar of undefined
Last Comment
Netman66
8/22/2022 - Mon
Netman66
I'll be with you shortly.
Netman66
Post the errors you're getting.
As for the third-party app - I'm not following you. I think you can restore to the pre-staging area and start DFS this will then use the pre-stage area to fill the real DFS share - however, it still verifies every file against the root before it moves it from pre-stage.
ASKER
David Williamson
The article mentions restoring from NTbackup or a comparable 3rd party backup solution as a way of pre-staging the DFS shared folder. Then, DFS will move the restored backup to the pre-existing folder, and then once it gets the MD5 checksum, will choose to move files from the pre-existing folder if the checksum matches.
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Netman66
Didn't the replication complete the other day?
ASKER
David Williamson
I'm sorry, I am speaking in reference to Server3! I wanted to add it to the DFS root (having previously removed it), but the frs-staging folder filled up the C drive, causing the server to act 'werid', not printing, not responding to IIS stuff, etc. I was looking for a way to move the staging folder to the drive that has enough space, or a way to pre-populate the shared folder, ie, restore from backup.
Sorry for the confusion....
It turns out that my attempt to restore from backup and start the process over has failed again. The frs-staging folder has filled up the C drive again, causing the afrementioned issues. Dang.
Netman66
I have to ask this...both Server2 and Server3 are at the same location - correct?
Forget Server3 as a DFS replica - it's not worth the effort since they're both on the same LAN. You can normally bring up a dead server fairly quickly unless it's toast. Failing that, a backup of the DFS folder can be restored manually to Server3 in a crisis.
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ASKER
David Williamson
Yes, that's correct, they are on the same LAN.
The full restore of all our data that I did to Server3 just recently took over 5 hours. 5.5 hours x 100 people x about $125/hour/person = over $68,000 that we cannot bill to clients for the time it takes to restore all the data. My only goal was to give us some redundancy and immediate failover in the case that our ever-getting-older main fileserver bites it. One thing the boss hates the most is wasted time...
I'm just about to take Irvine off-wire and change its IP....
ASKER
David Williamson
Once I move Irvine in to the Irvine Site, what should the DNS settings on Irvine and on the client machines in irvine be?
Netman66
DNS for Irvine server should be itself with the ISP as a Forwarder.
All clients there should point to Irvine only.
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David Williamson
As far as the DNS for Irvine as you mentioned before, since Irvine should update its own DNS entries, does that mean I shouldn't go in and manually update them in Server2's DNS?
ewtaylor
I think if you require 0 downtime then you should look into a active/passive cluster solution. http://www.microsoft.com/technet/prodtechnol/windows2000serv/evaluate/featfunc/clustovw.mspx
ASKER
David Williamson
That would be nice, and actually is where I would like to head. One of the prevailing reasons for that is that I am developing a Cold Fusion based intranet site which will eventually become the nerve center of our business operations, serving up all pertinent data like client info, billing, payroll, timesheets, invoicing, memos, etc. Once its gets to the point where it is indispensible, it would be nice to have a cluster solution so that if one web server goes down, the system will be able to keep on humming.
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Netman66
Irvine should - in the perfect world.
You can let it try and just monitor and confirm it has or has not. At least you know what to look for now~!~
Clustering is an idea, but keep in mind you need the Enterprise versions of the OS (either W2K Adv. Server or 2003 Enterprise) to cluster without a third party tool.
Also, in clustering you'll need a shared data array - something I was hinting at earlier. You could certainly start there.
ASKER
David Williamson
What kind of device is a shared data array? Is is a SCSI kind of thing, or a NAS kind of thing? Are there any performance issues?
ewtaylor
The one I have is a shared scsi bus that connects to both computers. They then run a continous ping on the second private NIC if no reply the software will fail the control of the scsi array to the other inactive cluster and activate it. I was running this with windows nt 4.0 mscs 1.0 and had to work out a few bugs, I was actually running it on a file server and had another one running for exchange and after getting the initial bugs worked out they worked really well. Windows 2k and 2k3 both have clustering technology built into it (from advanced server up).
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ASKER
David Williamson
ok, Irvine is up and running. I have NetSupport access to it on it new IP 192.168.111.2. What should I check first? Shall I do the Sysvol/scripts test you mentioned first, or should I wait for Event viewer to give me a 13509?
Netman66
For the shared storage - we have a Fibre channel SAN with a dedicated fibre switch - but you don't need to go that high end.
You'll definitely need to use a SAN that is capable of being access from two servers.
Now, with respect to the testing - do the SYSVOL test to make sure the AD replication is happening. Also, try creating a user from Irvine and see if it replicates to Server2.
Netman66
Check DNS on Server2 for Irvine and check Irvine's DNS for Irvine.
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ASKER
David Williamson
I have checked the DNS on both, and they both reflect the correct addresses. I created a text document in the winnt\sysvol\sysvol\wse.com\scripts. Repadmiin /showreps shows that replication inbound from server2 was good:
C:\Documents and Settings\Administrator.WSE>repadmin /showreps
Irvine\IRVINE
DC Options: IS_GC
Site Options: (none)
DC object GUID: 51f814c3-f364-482a-8553-72a476a41261
DC invocationID: ba8b3fc4-dd78-4614-8bf1-0e933e7450e5
==== INBOUND NEIGHBORS ======================================
DC=wse,DC=com
Vegas\SERVER2 via RPC
DC object GUID: 6233f4eb-40c9-47a7-9096-2f1e88d0c8b1
Last attempt @ 2004-03-30 12:13:47 was successful.
CN=Configuration,DC=wse,DC=com
Vegas\SERVER2 via RPC
DC object GUID: 6233f4eb-40c9-47a7-9096-2f1e88d0c8b1
Last attempt @ 2004-03-30 12:13:47 was successful.
CN=Schema,CN=Configuration,DC=wse,DC=com
Vegas\SERVER2 via RPC
DC object GUID: 6233f4eb-40c9-47a7-9096-2f1e88d0c8b1
Last attempt @ 2004-03-30 12:13:47 was successful.
But, the file (which was there before then) did not appear on Irvine in the same location. What do you think?
ASKER
David Williamson
I created a user on Irvine, which did eventually appear on Server2, but it took a couple of cycles. Still no test files in sysvol appearing on Irvine.
Irvine's event viewer just came up with a couple of 13508's, one for sysvol, and one for datastore
ASKER
David Williamson
Looks like the hosts file was the culprit. I remembered that we added entries for all the servers hosts files, so I went back into them and corrected them. The files in Server2's sysvol ended up on Irvine. I put a file in Datastore on Irvine, and it showed up on Server2. Things are looking good, but there are still a couple of things that I'm not sure of:
1) The ghost IrvineServer still comes up when I do repadmin /showreps from Server2 only.
2) In Sites and Services, should there be two connections showing in NTDS for all three servers? That is NOT the case currently.
Under Server2 there is a connection to Server3;
under Irvine there is a connection to Server2;
under Server3 there is a connection to Irvine AND a connection to Server2. That seems strange...
3) I have the replication interval set to 15 minutes. Does that mean that replication begins every 15 minutes and keeps going until it has caught up with all files that need replicating? Or does it mean that it checks every 15 minutes and only replicates for the next 15 minutes?
4) We went through so much so quickly, I can't remember if there is something else I can check, or even where some of the tools were. Part of our interaction, Netman66, was via Netsupport chat, which did not get recorded. What do you think?
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Netman66
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ewtaylor
Great job netman66, I learned a lot following these threads. Thanks to both of you.
ASKER
David Williamson
Is it your opinion that I need to extend the interval beyond 15 minutes?
By the way, I have had several people come up to me this morning telling me that 'the file they worked all day on and saved before leaving work yesterday' did not have all the changes on it that they made. Their changes were not saved somehow. I didn't fix the hosts file until about 9 pm, after which I noticed that the replication started working. Could replication have taken taken the older file on Irvine and overwrote the one on Server2? Isn't replication supposed to move last-saved, or most recently changed files--last writer wins? Or is there some kind of priority setting that needs to be adjusted? If I check the replication topology on Irvine, it says 'full mesh'. I assume that that means that the most recent file from anywhere gets replicated everywhere, right?
I was able to restore these couple files from the backup last night, which happens at 8 pm. I fixed the hosts file at 9 pm....seems fishy...
I wonder how many other people today will be coming up to me saying that their files didn't get saved somehow.
Could this just be some 'settling in' that AD and FRS have to do before their in good sync?
ASKER
David Williamson
I just looked in the event viewer and saw event 13503, that FRS had stopped, and so, I went into services and started it. Then came up 13521, which says:
________________________________________________________
The File Replication Service cannot enable replication on the comptuer SERVER2 until a backup/restore application completes.
A backup/restore application has set a registry key that prevents the File Replication Service from starting until the registry key is deleted or the system is rebooted.
The backup/restore application may still be running. Check with your local administrator before proceeding further.
The computer can be rebooted by clicking on Start, Shutdown, and selecting Restart.
WARNING - DELETING THE REGISTRY KEY IS NOT RECOMMENDED! Applications may fail in unexpected ways.
The registry key can be deleted by running regedit.
Click on Start, Run, and type regedit.
Expand HKEY_LOCAL_MACHINE, SYSTEM, CurrentControlSet, Services, NtFrs, Parameters, Backup/Restore,"Stop NtFrs from Starting". On the toolbar, click on Edit and select Delete. Be careful! Deleting a key other than "Stop NtFrs From Starting" can have unexpected sideeffects.
___________________________________________________________________________________________________
There are no backups currently running, only scheduled for later tonight. I did, however, just restore a couple of files (as I mentioned above), but those have been done for a while. Uh....help? We are using Backup Exec 9.
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Netman66
The Restore is likely what set the key so that replication won't continually change files during the backup state.
This should clear itself. I would certainly watch it. If it doesn't clear then fix the key - but I think it should.
It terms of replication - if the file was saved into a rep partner with a lower USN - which in all likelihood couldn't happen, then during replication it would get overwritten by the USN with the higher number. Windows is "supposed" to prevent this kind of thing.
Full Mesh is a great sign - it means KCC has reconfigured the topology and it has converged.
ASKER
David Williamson
Full Mesh is how I set it up to begin with, actually.
So, how can I avoid this problem in the future? Is there a way? I have a steady stream of people coming to me about files. I'm wondering if I restore them if they will be restored with the same USN value; will I then have the same problem just happen again? At the moment, FRS is not running, presumably because of all the restores I'm doing.
ASKER
David Williamson
No sign of that registry key being removed yet. I wonder how long I should wait before deleting it?
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ASKER
David Williamson
Ok. Things are getting weird. This whole replication thing seems way too unpredictable/unstable/unmonitorable. I had to restart Server2 because an update installer I ran caused the system to freeze. It took over 20 minutes, but I let it restart by itself. When it came up, FRS started again, but then moved some of the folders out of DataStore into the 'pre-existing' folder, making them inaccessible to my users, of course.
I don't get it! I thought the replication was done with Irvine before it left the building? I CANNOT have DFS moving my files/folders around!!! This is killing me!! Is there anything I can do, any decent monitoring tool that will show me EXACTLY what is happening, a list of files that are being compared with USN numbers, files that are about to be replicated to and from where and when, etc? All of this seems way too out of my ability to control and monitor...
Its starting to feel like I'm either in way over my head or I need to consider switching to another OS...(feeling exasperated!)
Netman66
Take a deep breath and count to ten..........
Replication needs to be configured for every hour or two - 15 minutes is too short.
FRS is likely choking on the whole restructure thing.
I think you'll need to reconfigure DFS from scratch. Take the time to set up things correctly and prestage the data from what is already there.
Use the documents we looked at earlier and see if you can find a TechNet article that steps you through the setup from the start.
Personally, 120GB over the WAN is a big deal for anyone. However, technically, it should work.
Post some netdiag /v and dcdiag logs for me or send them to work so I can look at them.
It probably wouldn't hurt to do those large logs for me too.
ASKER
David Williamson
Thank you for your words of wisdom...
I think you're right, I will tear down the DFS root and recreate it, letting it run over the weekend. I've been doing some hardware and software updates and such on Server2 tonight, and it seems that everytime I restart, DFS moves files into the pre-existing folder. It seems as if its almost starting all over with every restart.
Also, that registry key that prevents FRS from starting never did get removed automatically. I am going to call Veritas and ask them about that; perhaps they know something about it.
I've also been thinking that there has to be a better plan than this; there has to be a better way to accomplish the kind of data availability that we're trying to achieve. Perhaps we need to break up the data into groups and decide what reduce it to the bare minimum?
--I have deleted the DFS root. I will send you the logs you have requested.
What do you think about upgrading server2 & 3 to 2003 Standard? I mentioned it to the boss and he went for it. It would be nice if our DFS issues got better, but I also want to stay up-to-date. 2000 server is now 4 years old. What do you think?
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Netman66
Good idea.
I also think you need to determine what data needs to be where. Shared data is fine to have accessed across the WAN depending on the size. We run an entire Province (think State) from one location - so, it's possible.
You really should look at a fibre-channel SAN - it's not cheap, but if you move that kind of data then purchasing one is inevitable.
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PHP Namespaces
Posted by – October 26, 2008
I have been seeing alot of complaining lately regarding PHP namespaces, and I thought I would chime in with my (often opposing) views. First off, let me explain the issue.
The new version of PHP will have a new feature, called namespaces. (I wrote about it in my post”PHP 5.3 Feature Preview“. This is a great featured, and one that the community as a whole is excited about. So what is the problem, then?
Well initially PHP was going to use the standard “::” syntax to invoke the namespace. For example:
namespace Foo;
function bar() {
echo "Namespace Foo";
}
Foo::bar();
However, this became a problem for the parsing engine, as it is the same way to call a static function.
class Foo{
static function bar(){
echo "Class Foo";
}
}
Foo::bar();
So instead, PHP changed the syntax to a blackslash. So now, in the first example, you have ‘Foo\bar();’ while in the second, you still have ‘Foo::bar();’ Seems reasonable to me (and the PHP core members) but not to some.
For example, Ninh complains on his blog that if you put the invocation in double quotes, it will interpret things like “\t” as a tab, and that you have to use 2 backslashes. I really don’t see this being a problem. First off, why on earth would you use double quotes? There are no variables or single quotes being used in the string, so one should be using single quotes anyways. That is just good programming practice.
Even if you do use double quotes, there is a tried and true, standard solution to escape the backslash character. It is so obiquitous, that Ninh didn’t have to learn how to use it, he already knew about it, yet is still complaining. His problem with this method? “It looks like crap”. I’m sorry, I though we were using logic to code web applications, not painting a picture. And even at that, why does “::” look awesome, but “\\” look like crap? I don’t get it.
My favorite quote if from the very end of his post. He claims “Last time I checked, the world wasn’t filled with scrawny developers that would come crying to their mommies after getting their first facepalm of ‘AmbiguousInvocationError’.” And yet he is crying to his mommy (or rather, the blogosphere) because if he uses double quotes (which he doesn’t have to) then he has to escape the backslash character (a standard practice) and that’s “ugly”.
So what are your thoughts? Maybe I’m crazy, and this is a huge deal. I just don’t see it.
6 Comments on PHP Namespaces
1. Ninh says:
Maybe I’ve not made myself clear enough in my blog post. You see, aesthetics aside, I’d rather have them use a way to denote a namespace separator in a way that is commonly used in other programming languages. This makes it easier to read or learn PHP if you’re already familiar with other languages who use the same notation. With this train of thought, a dot would’ve been perfectly fine by me as well. Unfortunately, this is already being used in PHP for string concatenation in the parse rule: “String DOT String”.
This is the same reason why I have problems with using the backslash as a namespace seperator seeing as programmers will be more likely to associate it with escaping. This also makes it harder imho to learn a language.
Not only that, let’s not forget that if you ever were to instantiate your classes through strings via factory method (which is frowned upon by some to begin with), http://loveandtheft.org/2008/10/26/set-sail-for-fail-php-namespaces/ elaborates on some of the issues you’ll have to deal with as well. For instance, in case you write “foo\tBar”, which is valid PHP code, while trying to say namespace foo and member tBar, you’ll get erroneous behaviour that is easily overlooked. Even an IDE wouldn’t be able to save you in such a situation.
Aesthetics aside, there are plenty of other reasons why I’m complaining here. I hope people don’t forget to read that as well.
2. Boris says:
the real problem is that the PHP language masters didn’t just do the right thing and deprecate the use of “::” for static functions. at some point you have to move the language forward, and keep it consistent and beautiful. but, the PHP people chose to instead put an ugly hack in to try to get the best of both worlds. this *is* PHP we’re talking about here – is anyone really surprised?
3. Nick Ashley says:
Boris – if they deprecate “::” for static functions, what would they replace it with? There would have to be some other syntax for static functions, unless your suggestion is to remove static functions from the language.
Nimh – I kind of understand where you are coming from with keeping a familiar syntax across languages, but don’t know how much weight I would put on that. If every programming language had the same syntax for everything, except PHP was the odd man out, then you would definitely have a point. However every language has there own way to do things like string concatenation, testing equality, or ending statements. Adding namespacing to the mix isn’t that big of a deal IMHO.
I feel that it would be even harder to learn the language when syntax means two different things. People would be confused saying “I thought that was how you accessed a static function, not a namespace!”. With the backslash, you have a standard way to do everything. Also, I feel you SHOULD be using single quotes, thus eliminating the escaping issue. However, the escaping is a standard way to do things when working with double quotes as well. Why would this confuse them?
4. I find the backslash horribly ugly as well. Sure, that doesn’t mean it won’t work but a in a discussion about naming conventions it’s often less about what works than what seems orderly and sensible because with few precautions anything works.
5. Nick Ashley says:
I guess I am just surprised that a (arguably) slightly uglier solution which works in all situations isn’t favored over a (arguably) better looking solution that doesn’t. Sure, many will say it is bad practice to name a static function inside a class the same as a different class in a namespace. However the whole point of namespacing is to allow code from multiple sources to play nice together. Of course a single programmer utilizing only his own code wouldn’t run into any problems with ‘::’, but from what I understand, someone utilizing classes from many sources could run into this problem. Remember that for better or worse, PHP is the language of choice for many copy and paste coders, and I think that is a relevant fact.
6. James says:
Double colon is not much better, and harder to type.
Also looks terrible at the start of a line:
::Foo::bar();
I’d have loved to see the dot being used, but that isn’t feasible, so backslash is a satisfactory alternative.
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GNU.WIKI: The GNU/Linux Knowledge Base
[HOME] [PHP Manual] [HowTo] [ABS] [MAN1] [MAN2] [MAN3] [MAN4] [MAN5] [MAN6] [MAN7] [MAN8] [MAN9]
[0-9] [Aa] [Bb] [Cc] [Dd] [Ee] [Ff] [Gg] [Hh] [Ii] [Jj] [Kk] [Ll] [Mm] [Nn] [Oo] [Pp] [Qq] [Rr] [Ss] [Tt] [Uu] [Vv] [Ww] [Xx] [Yy] [Zz]
NAME
toupper, tolower, toupper_l, tolower_l - convert uppercase or lowercase
SYNOPSIS
#include <ctype.h>
int toupper(int c);
int tolower(int c);
int toupper_l(int c, locale_t locale);
int tolower_l(int c, locale_t locale);
Feature Test Macro Requirements for glibc (see feature_test_macros(7)):
toupper_l(), tolower_l():
Since glibc 2.10:
_XOPEN_SOURCE >= 700
Before glibc 2.10:
_GNU_SOURCE
DESCRIPTION
These functions convert lowercase letters to uppercase, and vice versa.
If c is a lowercase letter, toupper() returns its uppercase equivalent,
if an uppercase representation exists in the current locale.
Otherwise, it returns c. The toupper_l() function performs the same
task, but uses the locale referred to by the locale handle locale.
If c is a uppercase letter, tolower() returns its lowercase equivalent,
if a lowercase representation exists in the current locale. Otherwise,
it returns c. The tolower_l() function performs the same task, but
uses the locale referred to by the locale handle locale.
If c is neither an unsigned char value nor EOF, the behavior of these
functions is undefined.
The behavior of toupper_l() and tolower_l() is undefined if locale is
the special locale object LC_GLOBAL_LOCALE (see duplocale(3)) or is not
a valid locale object handle.
RETURN VALUE
The value returned is that of the converted letter, or c if the
conversion was not possible.
ATTRIBUTES
Multithreading (see pthreads(7))
The toupper() and tolower() functions are thread-safe with exceptions.
These functions can be safely used in multithreaded applications, as
long as setlocale(3) is not called to change the locale during their
execution.
CONFORMING TO
toupper(), tolower(): C89, C99, 4.3BSD, POSIX.1-2001, POSIX.1-2008.
toupper_l(), tolower_l(): POSIX.1-2008.
NOTES
The details of what constitutes an uppercase or lowercase letter depend
on the locale. For example, the default "C" locale does not know about
umlauts, so no conversion is done for them.
In some non-English locales, there are lowercase letters with no
corresponding uppercase equivalent; the German sharp s is one example.
SEE ALSO
isalpha(3), newlocale(3), setlocale(3), uselocale(3), towlower(3),
towupper(3), locale(7)
COLOPHON
This page is part of release 3.65 of the Linux man-pages project. A
description of the project, and information about reporting bugs, can
be found at http://www.kernel.org/doc/man-pages/.
All copyrights belong to their respective owners. Other content (c) 2014-2018, GNU.WIKI. Please report site errors to [email protected].
Page load time: 0.115 seconds. Last modified: November 04 2018 12:49:43.
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674,007,566,031,607,000 |
• What version of Sendgrid is used in Chekio?
I solved Welcome Email by SendGrid. Sending a mail was succeeded. After that, I execute it in my docker container, an error occurred. just same as this. I think it's because of difference among sendgrid versions. What version of Sendgrid is used in Chekio? Or How can I investigate version of imported modules?
.
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ece34605c058195ed03b4d393ef1a36c
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-3,792,668,580,033,099,300 |
XMBC 2.14 Beta
x64 Replacement/Alternative to Microsoft's IntelliMouse application.
Forum rules
Please read the forum rules before posting for the first time.
The more information you can provide, the quicker and more accurately someone can help.
NOTE: To reduce spam, new users can not post links or images until they have at least 4 posts.
User avatar
Kukurykus
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Posts: 388
Joined: Sat Jul 02, 2016 1:15 pm
Re: XMBC 2.14 Beta
Post by Kukurykus »
I'm glad XMBC got new feature, exactly that I thought up mylef 2 years ago but never mentioned about. Good that someone else did that, because Swap and Copy makes that I don't have to paste to notepad long code lines of Simulated Keys both from each button it was bound to and all layers often few applications they worked together, what by the way could be done wrongly, and then copy everything back to choosen anew proper apps / layers and buttons....
User avatar
phil
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Posts: 6702
Joined: Sun Apr 06, 2003 11:12 pm
Re: XMBC 2.14 Beta
Post by phil »
Yes, it is something I should have done when I first introduced layers. But I got there in the end after a little persuasion!
--[ Phil ]--
--[ Administrator & XMBC Author ]--
Logitech G9, Logitech MX518, Microsoft Intellimouse, Trust 16341 BT Mouse
Windows 10 x64, AMD Ryzen 5900x, MSI x570 Tomahawk, 32GB DDR4,
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injtsvetkov
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Posts: 293
Joined: Mon Jun 06, 2016 8:51 am
Re: XMBC 2.14 Beta
Post by injtsvetkov »
Hi Phil, while testing some things it came to my mind that I can increase the 'Delay between simulated keystrokes' to 2-3 sec to see what exactly is going on but it turned out that the maximum value allowed is 60 ms. Can you make higher limit (e.g. some error messages are showing in excel and I need a few seconds to read them :)) or there are other limitations?
Thank you!
Iliya
HAMA Mirano
Windows 8.1 x64, Intel i5-3230M @ 2.60GHz, 4GB
User avatar
phil
Site Admin
Posts: 6702
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Re: XMBC 2.14 Beta
Post by phil »
You can add your own delays with the {wait} and {waitms} tags, so doing this globally seems a liitle pointless (esp. if its just for debugging)?
--[ Phil ]--
--[ Administrator & XMBC Author ]--
Logitech G9, Logitech MX518, Microsoft Intellimouse, Trust 16341 BT Mouse
Windows 10 x64, AMD Ryzen 5900x, MSI x570 Tomahawk, 32GB DDR4,
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injtsvetkov
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Re: XMBC 2.14 Beta
Post by injtsvetkov »
Yes of course :) that's what I did, but it was quite long sequence of commands in excel and it acted differently each time depending on what is initially selected (or what gets selected during the execution), I even thought that there may be some interference between two chords with the same second button, but I was wrong :P. I ended up dividing it into 2 layers (looping with the same button) to see how each half behaves, so it took about 30 min wrestling (adding/removing and changing multiple delays) while if I could use the global setting I would have sorted it all out in less than 5 min. So I thought that since the option is already there then probably it would be easy to adjust the limit but I am not sure whether that would do some harm to something else or if there are some major limitations that I don't know of, so it's up to you :) but I can assure you that it is definitely not pointless (again if it won't do any harm).
Actually, part of the problem was that when I change the input from Latin to Cyrillic some of the commands didn't get executed, so I had to substitute some commands with others to avoid using letters. For example if I enter Latin characters in 'Simulated keys' when I activate Cyrillic input the characters entered in excel are also Cyrillic and it all becomes a mess. However in certain cases the characters entered in 'Simulated keys' get entered in excel without change regardless of the currently active input. Do you have an idea/advice coz certainly I have to do some more tests to clear the image and to find some kind of pattern and think of a possible workaround.
Greetings!
Iliya
HAMA Mirano
Windows 8.1 x64, Intel i5-3230M @ 2.60GHz, 4GB
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injtsvetkov
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Posts: 293
Joined: Mon Jun 06, 2016 8:51 am
Re: XMBC 2.14 Beta
Post by injtsvetkov »
OK, here is the whole picture, on the left side of the '=' is what's entered in 'Simulated Keys' in XMBC, and on the right side is what gets entered in excel's cell (e.g. Latin letter 'H' corresponds to Cyrillic letter 'X'):
Active input: English (United States)
Capital Cyrillic letter = Capital Cyrillic letter (X = X)
Lowercase Cyrillic letter = Lowercase Cyrillic letter (x = x)
Capital Latin letter = Lowercase Latin letter (H = h)
Lowercase Latin letter = Lowercase Latin letter (h = h)
Active input: Bulgarian (Phonetic Traditional):
Capital Cyrillic letter = Capital Cyrillic letter (X = X)
Lowercase Cyrillic letter = Lowercase Cyrillic letter (x = x)
Capital Latin letter = Lowercase Cyrillic letter (H = x)
Lowercase Latin letter = Lowercase Cyrillic letter (h = x)
Seems that the Cyrillic characters are always entered in excel as they are in XMBC regardless of the active input, however the Latin characters depend on the currently active input. Maybe someone else who uses different input has also reported that, sorry if so. Anyway I think I have some clue about why that's happening but it's too fuzzy and I can't explain it. I'll try if I must but I think you would know better. The only suggestion that I can think of at the moment is adding a tag that would send the characters exactly how they are entered in XMBC regardless of the case and the active input (like the Cyrillic characters). Hopefully you could find better/global solution :)
The only workaround I found is setting specific hot key for English input (e.g. Ctrl+Shift+9) and entering it before the sequence in 'Simulated Keys' so it will always change to English before executing the sequence.
Greetings!
Iliya
HAMA Mirano
Windows 8.1 x64, Intel i5-3230M @ 2.60GHz, 4GB
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phil
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Re: XMBC 2.14 Beta
Post by phil »
Sorry, I haven't got a clue. It does not help that I only have an English keyboard and don't know any other languages. All I do know is that the multi-language thing is a pain in the a** and clearly I still haven't got it right :(
Not sure what more I can do though.
--[ Phil ]--
--[ Administrator & XMBC Author ]--
Logitech G9, Logitech MX518, Microsoft Intellimouse, Trust 16341 BT Mouse
Windows 10 x64, AMD Ryzen 5900x, MSI x570 Tomahawk, 32GB DDR4,
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injtsvetkov
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Re: XMBC 2.14 Beta
Post by injtsvetkov »
Well I'll try to explain it the way I see it though I'm not sure if I'm on the right track :(.
I have seen in MS Word that every character/symbol has a specific code in the different encoding systems (Unicode, ASCII ...). For example if I now press Alt+366 I get the Lowercase 'n' and Alt+334 gives Uppercase 'N' regardless of the input language. The same is with the Cyrillic letters e.g. Alt+405 gives the Uppercase Cyrillic letter 'X' (which sounds like the English 'H'). Now I am not sure that the result will be the same on your side since you probably don't have Cyrillic fonts installed but you can try that range:
Alt+401 = С
Alt+402 = Т
Alt+403 = У
Alt+404 = Ф
Alt+405 = Х
So I presume that currently XMBC somehow is interpreting the Cyrillic letters as their code and it sends that code when executing them. However the Latin letters seems to be interpreted/sent somehow like Virtual keys so the result depends on what input language is currently active. I thought that the logical (global) solution might be to send the Latin letters by their code too but on second thought that might cause some unwanted behavior (e.g. when sending commands like '{CTRL}C'). That's why I thought that maybe it would be more reliable to use a tag (e.g. {!}) to enclose the string of letters that must be sent via codes instead of Virtual keys. I know it's far from perfect but was hoping that you might have something better in mind :)
BTW I tried to send some Virtual keys via 'Simulated Keys' but here is what I got (google says 0x55 = U):
{VKC:0x55} = nothing
{VKC:55} = 7
Am I doing it wrong or something isn't right?
Greetings!
Iliya
HAMA Mirano
Windows 8.1 x64, Intel i5-3230M @ 2.60GHz, 4GB
User avatar
phil
Site Admin
Posts: 6702
Joined: Sun Apr 06, 2003 11:12 pm
Re: XMBC 2.14 Beta
Post by phil »
XMBC uses keyboard scancodes where possibnle and it uses windows APIs to cvonvert the character to the scancode based on the active language.
0x55 is 55 'hex which is 85 decimal so try {vkc:85}
PS, if you turn on debug logging, you should see the virtual keycodes and scan codes that XMBC is sending in the log file.
Thanks,
Phil
--[ Phil ]--
--[ Administrator & XMBC Author ]--
Logitech G9, Logitech MX518, Microsoft Intellimouse, Trust 16341 BT Mouse
Windows 10 x64, AMD Ryzen 5900x, MSI x570 Tomahawk, 32GB DDR4,
nVidia RTX 2070s, Evo 970 500Gb NVME, 2x2TB WD Black (RAID1)
User avatar
injtsvetkov
Fanatic
Posts: 293
Joined: Mon Jun 06, 2016 8:51 am
Re: XMBC 2.14 Beta
Post by injtsvetkov »
Thanks for the tips :)
Here is what I got from the log file:
Entered in 'Simulated Keys': Д{RIGHT}Ð
SendInput::SendKeyState: VKCode=0x0 Scan code=0x414 SendMode=0x4 Flags=0x0 Release=0:
SendInput::SendKeyState: VKCode=0x0 Scan code=0x414 SendMode=0x4 Flags=0x0 Release=1:
SendInput::SendKeyState: VKCode=0x27 Scan code=0x4d SendMode=0x8 Flags=0x0 Release=0:
SendInput::SendKeyState: VKCode=0x27 Scan code=0x4d SendMode=0x8 Flags=0x0 Release=1:
SendInput::SendKeyState: VKCode=0x0 Scan code=0x41d SendMode=0x4 Flags=0x0 Release=0:
SendInput::SendKeyState: VKCode=0x0 Scan code=0x41d SendMode=0x4 Flags=0x0 Release=1:
Where 0x414 and 0x41d are the scan codes for the Uppercase Cyrillic letters 'Д' and 'Ð' (respectively 0414 and 041D are their Unicode (hex) codes).
Entered in 'Simulated Keys': F{RIGHT}W
SendInput::SendKeyState: VKCode=0x46 Scan code=0x21 SendMode=0x8 Flags=0x0 Release=0:
SendInput::SendKeyState: VKCode=0x46 Scan code=0x21 SendMode=0x8 Flags=0x0 Release=1:
SendInput::SendKeyState: VKCode=0x27 Scan code=0x4d SendMode=0x8 Flags=0x0 Release=0:
SendInput::SendKeyState: VKCode=0x27 Scan code=0x4d SendMode=0x8 Flags=0x0 Release=1:
SendInput::SendKeyState: VKCode=0x57 Scan code=0x11 SendMode=0x8 Flags=0x0 Release=0:
SendInput::SendKeyState: VKCode=0x57 Scan code=0x11 SendMode=0x8 Flags=0x0 Release=1:
Where VKC=0x46 and SC=0x21 both refer to 'F' key, VKC=0x57 and SC=0x11 both refer to 'W' key and since there are no active modifier keys I get lowercase letters 'f' and 'w' when English input is active. But when Bulgarian input is active I get 'ф' and 'в' which respectively are the Cyrillic letters corresponding to 'f' and 'w' keys.
I suppose that the SendMode value determines which of the two methods has the higher priority and since in the first example there are no VKCodes for those letters it falls back to the Scan code method. However I'm a bit confused about the second example, whats the point in getting both the VKC and the SC for the same key. As there are different scan codes for each Uppercase and Lowercase Latin letter, I suppose that there is a way to get the scan code for the entered character instead of the key (which it already has the VKCode for). After that some method would be needed to determine which of the two values to be sent when executing. And here it gets complicated coz in case the both types are needed in a single 'Simulated Keys' command the only way I can think of doing it is via some kind of tag. Here are some examples:
{some tag}asdf{some tag} to send the Scan codes for those four characters instead of VKCodes
or maybe
{???:<string>}
I don't know if that's possible at all but I can't think of anything else :(
BTW I noticed that when I turn on Debug mode via Hotkey the pop-up notification says 'Debugging disabled' and when I turn it off it says 'Debugging enabled'
Greetings!
Iliya
HAMA Mirano
Windows 8.1 x64, Intel i5-3230M @ 2.60GHz, 4GB
User avatar
phil
Site Admin
Posts: 6702
Joined: Sun Apr 06, 2003 11:12 pm
Re: XMBC 2.14 Beta
Post by phil »
Here is 2.14 Beta 6
If you have check for beta versions enabled, there was a problem in earlier 2.14 betas which means you will have to update manually if you are on 2.14 beta 2 or 3. Otherwise you should get notified of a new version and prompted to update in the next day or so. This is the most efficient method (bandwidth wise) as the updates are only a fraction of the size of the full install. Otherwise, you can get the full installation beta HERE. Note that this link will always get you the latest beta version!
Changes since v2.14 Beta 5:
• #409 - Added Enhance Pointer Precision option (same as mouse control panel).
• #408 - Changed "Search Selected Text" to "Web Search Selected Text".
• #407 - Changed "Search Charm (WIN+Q)" to "Cortana Search" on Windows 10.
• #406 - Increased space for (ms) and (min) translations on advanced settings tab.
• #405 - Added missing translations.
• #404 - Improved settings layout to fit on smaller screens.
• #403 - Debug icon does not show until XMBC is disabled/enabled.
• #402 - Debug icon looks wrong on high DPI screens.
There is a new language template included with some new translations for this beta.
Any problems, PM me a copy of the log file (or post a snippet in a code block here).
Thanks,
Phil
--[ Phil ]--
--[ Administrator & XMBC Author ]--
Logitech G9, Logitech MX518, Microsoft Intellimouse, Trust 16341 BT Mouse
Windows 10 x64, AMD Ryzen 5900x, MSI x570 Tomahawk, 32GB DDR4,
nVidia RTX 2070s, Evo 970 500Gb NVME, 2x2TB WD Black (RAID1)
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JTB3
Dedicated
Posts: 62
Joined: Thu Aug 04, 2016 1:52 am
Re: XMBC 2.14 Beta (Suggestion)
Post by JTB3 »
Hey Phil,
Recently I started using the 'Check for new (Beta) version' option in settings. As you recently pushed the new Beta 6, today I got the tray notification - and when I clicked on it, the pop-up dialog window asked me if I wished to download the new beta version (yes or no).
At that point what I would have really liked to see is an additional button/link to 'view the changelog'. This way I could have seen what new fixes/changes were in store before deciding to download/install.
Would this be relatively easy to implement? Provide a link/button that, when clicked, opens the permalink to the forum post that lists the changes in the default browser? Many of the other software/utilities I have use a similar technique.
There is currently no easy way to see the changes now. I had to search my computer (or google) for the x-mouse forum link, and then navigate to this post (all quite time consuming).
I hope this suggestion is truly useful - and thanks again for creating this great utility!
-JT
System: Win10 Pro-x64 v1702+v1607, Intel i7-7700K (Z270) + i7-4771 (Z87)
Logitech M570 Wireless (5-Button) Trackball + M705 (5-Button) Marathon Mouse
[Bay Area, California]
User avatar
phil
Site Admin
Posts: 6702
Joined: Sun Apr 06, 2003 11:12 pm
Re: XMBC 2.14 Beta
Post by phil »
Hi JT,
well, I maintain a public change log for the full releases, but there is not static location for the change log for the beta's - sure there is a forum post, but that changes for each betas which would mean reprogramming the link every time. The only option would be to maintain a separate change list page, which I guess sis possible (there is a change list inside the installer, so I could just copy that to the web site with some script I guess - so I don't forget :)).
I'll add it to the list. Naturally, it wont be effective until the version after I add it :).
Thanks,
Phil
--[ Phil ]--
--[ Administrator & XMBC Author ]--
Logitech G9, Logitech MX518, Microsoft Intellimouse, Trust 16341 BT Mouse
Windows 10 x64, AMD Ryzen 5900x, MSI x570 Tomahawk, 32GB DDR4,
nVidia RTX 2070s, Evo 970 500Gb NVME, 2x2TB WD Black (RAID1)
xmbcjoef
New User
Posts: 3
Joined: Fri Dec 09, 2011 6:39 pm
Re: XMBC 2.14 Beta
Post by xmbcjoef »
Here's a suggestion for a little tweak.
In Windows 10 make the notification icon hollow instead of all white.
Then have it become all white to show a pending message
In Windows 10 I noticed all the notification icons are now hollowed out and become filled in during a pending message
X-Mouse would fit in very nicely if it did the same
thanks
Joe F
User avatar
injtsvetkov
Fanatic
Posts: 293
Joined: Mon Jun 06, 2016 8:51 am
Re: XMBC 2.14 Beta
Post by injtsvetkov »
Currently when clicking on a topic in the forum it always opens the first page, so every time you have to click to the last page to view the most recent posts. It would be more practical if it directly opens the last page of the topic. That way if you use the link of the topic reprogramming will be necessary only when starting a new 'beta phase' instead of at every single beta, plus it would bring some additional visits the forum :wink:
Greetings!
Iliya
HAMA Mirano
Windows 8.1 x64, Intel i5-3230M @ 2.60GHz, 4GB
Locked
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[FFmpeg-devel] [PATCH] Re: Reworking the codec lookup system
Nicolas George nicolas.george
Wed Jun 13 17:13:06 CEST 2007
Hi.
Le quartidi 24 prairial, an CCXV, Michael Niedermayer a ?crit?:
> users dont read avcodec.h or the doxygen docs about CodecID, its developers
> who do
I was thinking about users of lavc, who are themselves developers: they need
to know what the field is supposed to mean, and how they are supposed to
handle it in their program, but not how the decoders actually work.
> and we should not attempt to hide such details from them otherwise
> they for example might spend a lot of time writing code to distingush a
> mpeg1 from a mpeg2 stream beliving they have to in order to decode it
I strongly disagree with that: people who program using lavc must not assume
that the result of avcodec_find_decoder(CODEC_ID_MPEG1VIDEO) will be able to
decode MPEG2 streams, otherwise, their program will mysteriously stop
working if built against a version of lavc with two separate minimalist
decoders.
The fact that the native MPEG decoder is able to decode both MPEG1 and MPEG2
is an useful feature indeed. But I believe it must be specifically documented
as an exception to the general rule (one way to do it would be to declare a
decoder with a name like "mpeg12" or even "mpeg_1_or_2"). If such exceptions
were to become common, it would be necessary to adapt the data structures to
account for them, but one step at a time.
I have reworked the patch to take your comments into account. I have also
removed the comment for the id field, since it was redundant with the
comment for the CodecID type.
Regards,
--
Nicolas George
Index: libavcodec/avcodec.h
===================================================================
--- libavcodec/avcodec.h (revision 9303)
+++ libavcodec/avcodec.h (working copy)
@@ -44,6 +44,12 @@
#define AV_TIME_BASE_Q (AVRational){1, AV_TIME_BASE}
/**
+ * Identifies the syntax and semantics of the bitstream.
+ * The principle is roughly:
+ * Two decoders with the same ID can decode the same streams.
+ * Two encoders with the same ID can encode compatible streams.
+ * There may be slight deviations from the principle due to implementation
+ * details.
*
* If you add a codec ID to this list, add it so that
* 1. no value of a existing codec ID changes (that would break ABI),
@@ -2119,6 +2125,12 @@
* AVCodec.
*/
typedef struct AVCodec {
+ /**
+ * Name of the codec implementation.
+ * The name is globally unique among encoders and among decoders (but an
+ * encoder and a decoder can share the same name).
+ * This is the primary way to find a codec from the user perspective.
+ */
const char *name;
enum CodecType type;
enum CodecID id;
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Home » Blog » Apps » How to Hack WhatsApp? – Steps, Apps, and More
How to Hack WhatsApp? – Steps, Apps, and More
by The Digital Trendz
How to Hack WhatsApp? – Steps, Apps, and More
Steps
It’s effortless! You need to enter the phone number of the person you want to investigate and wait to receive the results that we will send you in just a few minutes.
1. Register on the home page of the application.
2. Enter the phone number with the country code in question.
3. Indicate ‘Hack WhatsApp.’
4. Wait for the process to be complete. It won’t take more than 5 minutes!
5. You will receive a link to the compressed document where you will find all the data extracted from WhatsApp
Warning
Hacking someone else’s WhatsApp conversations violates people’s privacy so that you can be penalizing for it.
However, if you do it the right way with tools like Hackearwhats.
App, you will get the results without any mishap.
For this, our team has developed an undetectable monitoring system, offering impeccable user anonymity.
Since the internet became massive, not only was there a boom in access to information, but it also acted as a double-edged sword, bringing negative consequences.
One of them is the lack of security, which is exploited by hackers.
That is why you should be aware of dangerous sites, which are camouflaged by promising things like “hack WhatsApp.”
This is a clear example of a scam that we will deal with thoroughly; We have compiled the most dangerous software that is not recommending for this purpose.
The scam of making promises that are almost impossible to keep is widespread.
It is a way to make the user fall.
It is no secret to anyone that WhatsApp is the most widely used communication app globally, and therefore one of the focal points because of hacker groups.
What are the Best Apps to hack WhatsApp?
There are quite a few applications online that claim that you can easily spy on WhatsApp if you use them.
Some of them are more successful than others. Some are paying, and others are free.
· MSpy
MSpy is a leading parental control app for smartphones that allows parents to monitor text messages, calls, current GPS location, Snapchat, WhatsApp, and much more.
It collects information from the target device and sends it to your Control Panel (your account that will be creating after purchase), which you can access from any browser.
MSpy for smartphones runs on rooted / non-rooted Android 4.0+ platforms and jailbroken / non-jailbroken iOS 6.0+.
The customer service area is easy to use.
They provide 24/7 live customer support with a wide variety of subscription plans and affordable prices that will make your experience the best value for your money.
· SpyFone
SpyFone is the number one parental monitoring software on the market.
It is an application that must be download to the phone of the person you want to monitor, or you need the iCloud credentials of the person you want to watch.
SpyFone allows you to see what someone else is doing on your phone or tablet.
You can also see which apps your child, employee, or spouse uses the most.
Many can see who they are calling and see the emails and text messages they are sending and receiving.
You can even download the photos and videos stored on the other person’s phone.
· CocoSpy
The CocoSpy company did its best to make the use of the application simple and comfortable.
By purchasing the application, you get a CocoSpy account.
The owner’s phone and the target device. In this sense, you can use CocoSpy for iPhone and Android devices to monitor people.
When you are about to supervise someone with the iOS device, you must obtain the device’s credentials.
The CocoSpy installation allows monitoring.
It allows supervising Android devices, although it is necessary to configure a compliment on the other’s phone.
Developers usually provide relevant tutorials—just search <how to install CocoSpy without access to iPhone or smartphone>.
· Keylogger
On the other hand, through a program specifically designed to record all the keys pressed by the user on his mobile, you can know what he writes on WhatsApp.
You will not even have to see the mobile screen or know about computers.
It is what is knowledge in the field of the hack, as Keylogger.
Perhaps the only somewhat complicated step is to install it.
There are many alternatives, such as iKeyMonitor or MobiStealth, that have this built-in function.
Thanks to this type of app, each key pressed during WhatsApp conversations will be stored and sent to a remote server.
After that, you will have to log in to your account and see everything from the comfort of your home or any mobile device.
What do they Use to hack Whatsapp?
For, the first instance of vulnerabilities, which is attacking through fake websites.
It should be renowned that these mentioned apps are mainly for monitoring purposes and thus provide security (or tranquility) to parents.
They are a way of knowing what your children are doing in the digital world, including social networks or WhatsApp messaging and other alternatives.
However, hackers can also use hackers to gain access to another mobile, although they first need physical access to it.
How to recognize a Scam that promises to hack WhatsApp?
First of all, it will always tell you that everything is free. Error! And it is that nothing is free in life.
So whenever you notice something suspiciously good and with a price that is not appropriate, the best thing is to get out of there.
Now let’s see which are the websites or apps that will put you in danger if you use them to want to browse other people’s messages
What are the different Methods to hack WhatsApp?
Recover WhatsApp conversations
One way to recover WhatsApp messages for suspicious conversations from the person we want to verify is to recover WhatsApp conversations.
There are several ways to do this.
Before trying the steps, keep in mind that you can only restore chats if the backup option had been activating in WhatsApp first.
This means that if you have never backed up your chats, you will not recover any messages or conversations that you accidentally delete or delete.
To activate chat backup, open WhatsApp, go to “Settings,” go to “Chats” and tap on “Chat Backup.”
And if you are an iPhone user, go to “Settings” in “WhatsApp Chats
Chat Backup “, where you can select the frequency of” Automatic Backup “or use” Backup Now “to manually initiate an iCloud backup.
References: Marketing Marine
Review How to Hack WhatsApp? – Steps, Apps, and More.
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|
ece34605c058195ed03b4d393ef1a36c
|
7,134,309,488,962,690,000 |
AsyncMysqlRow::getFieldAsInt
Get a certain field (column) value as an int
Description
public function getFieldAsInt(
mixed $field,
): int
If the column from which you are retrieving the value is not an integral type, then an Exception is thrown.
Parameters
• $field - the field index (int) or field name (string).
Return Values
• int - The int value of the field (column); or an Exception if it the column is not integral.
Examples
The following example shows how to get a field value as an int value via AsyncMysqlRow::getFieldAsInt. Assume this was the SQL used to create the example table:
CREATE TABLE test_table (
userID SMALLINT UNSIGNED ZEROFILL NOT NULL AUTO_INCREMENT,
name VARCHAR(40) NOT NULL,
age SMALLINT NULL,
email VARCHAR(60) NULL,
PRIMARY KEY (userID)
);
In this case, we are actually getting a field that is an int (or SMALLINT).
<?hh
namespace Hack\UserDocumentation\API\Examples\AsyncMysql\Row\GFAsInt;
use \Hack\UserDocumentation\API\Examples\AsyncMysql\ConnectionInfo as CI;
async function connect(\AsyncMysqlConnectionPool $pool):
Awaitable<\AsyncMysqlConnection> {
return await $pool->connect(
CI::$host,
CI::$port,
CI::$db,
CI::$user,
CI::$passwd
);
}
async function simple_query(): Awaitable<int> {
$pool = new \AsyncMysqlConnectionPool(array());
$conn = await connect($pool);
$result = await $conn->query(
'SELECT * FROM test_table WHERE userID < 50'
);
$conn->close();
// A call to $result->rowBlocks() actually pops the first element of the
// row block Vector. So the call actually mutates the Vector.
$row_blocks = $result->rowBlocks();
if (!$row_blocks->isEmpty()) {
// An AsyncMysqlRowBlock
$row_block = $row_blocks[0];
if (!$row_block->isEmpty()) {
// An AsyncMysqlRow
$row = $row_block->getRow(0);
return $row->getFieldAsInt('age'); // int
}
return -1;
} else {
return -1;
}
}
function run(): void {
$r = \HH\Asio\join(simple_query());
var_dump($r);
}
run();
Output
int(41)
|
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|
ece34605c058195ed03b4d393ef1a36c
|
5,081,717,731,575,807,000 |
Skip to main content
Lecture notes for Python 1 at University of Freiburg.
Project description
# Python I lecture notes Supplementary material, lecture notes and exercises for the Python I lecture at University of Freiburg.
### Installation Basically, all lectures are in the .ipynb format of version 4. Therefore you need Jupyter to view them. One would need no installation, in case the notebooks run without errors. In case the dependencies shall be installed, this module can be installed using setuptools.
`bash ~$ git clone https://github.com/mmaelicke/felis_python1.git ~$ cd felis_python1 ~$ pip install -r requirements.txt ~$ cd lectures ~$ jupyter notebook `
Project details
Supported by
AWS AWS Cloud computing and Security Sponsor Datadog Datadog Monitoring Fastly Fastly CDN Google Google Download Analytics Microsoft Microsoft PSF Sponsor Pingdom Pingdom Monitoring Sentry Sentry Error logging StatusPage StatusPage Status page
|
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ece34605c058195ed03b4d393ef1a36c
|
-308,671,934,519,006,460 |
dingerkingh dingerkingh - 10 months ago 42
Python Question
Previous and next item of list python
Can anyone point me towards a practical way of getting the previous and next items of a list. For example:
my_list = [100, 200, 300, 400]
Is there a practical way of getting the previous and next item (300 and 100).
I am using
my_list[my_list.index(400) - 1]
to successfully get the previous item. Python doesn't mind getting a negative index apparently. However, if I try
my_list[my_list.index(400) + 1]
it doesn't like having an index greater than the number of items in the list. Which makes sense.
Traceback (most recent call last):
File "<stdin>", line 1, in <module>
IndexError: list index out of range
I suppose I can use a loop to loop through and get it - I was just hoping there was a simpler solution. I was thinking along the lines of using
iter()
but I can't seem to figure out if it is possible to set the index.
Answer
A simple solution is to use modulo
my_list[ (my_list.index(400) + 1) % len(my_list) ]
result:
>> 100
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What is meta? ×
Meta Stack Exchange is where users like you discuss bugs, features, and support issues that affect the software powering all 150 Stack Exchange communities.
Consider the following sequence of events:
1. Users A and B both start editing a post.
2. User A submits his edit.
3. User B submits his edit.
User B's edit cannot be submitted:
User A already edited the body of this post; your edit must be more substantive to override the current edit.
However, when user B does not have edit privileges, this is not happening: user B can submit a suggested edit based on the original version of the post, blissfully unaware of user A's concurrent edit.
Example: B suggested an edit at 15:54:36 which is clearly from the original version of the post even though A made an edit at 15:54:06. The suggested edit diff is shown from version 2, even though A made his suggestion from version 1.
In this case, B should have been prevented from submitting an edit and told to edit from the latest version of the post.
I've seen that happen countless times on SO, but it's often difficult to trace at SO's fast pace where multiple edits often muddy the waters. Here's a case with a clear timeline.
share|improve this question
What makes this one interesting is that in the review, we end up seeing the diff between the edited post and the result of applying the suggested edit to the unedited version. I've seen a few reviews like this where A's edit was substantial and B's was not, meaning that B's edit looked like vandalism (since now it looks like it's reversing a large portion of the earlier edit) – Dennis Meng Nov 7 '13 at 17:57
Here's another example of one that just happened here on Meta. An edit was made to remove a taunt at the end of the post, but a suggested was made on top of it, making it look like the suggested editor was adding in the taunt. – psubsee2003 Nov 7 '13 at 20:34
This used to happen with the "Possible Duplicate" links inserted by Community, in which if someone without editing privileges starts editing a post, but the question gets marked as a duplicate before the edit is submitted. The edit will therefore appear to remove the "Possible Duplicate" link. The team fixed this by making the link appear as an automatic banner at the top of the post instead of editing it into the post. – user215114 Nov 20 '13 at 22:44
2 Answers 2
Seeing as I have been a user for less than a year, I tried gaining reputation initially by editing posts. I can recount a few instances where this exact scenario occurred and my edit was rejected for being to insubstantial of a change based of the other users concurrent edit.
Though I don't think that its the end of the world if your concurrent edit didn't get accepted, because that would mean that the necessary edit was already made by the other user. Often times the edits I made that were rejected when submitted at roughly the same time as the other user were just fixing markdown or overall grammatical changes. If your edit is really that helpful and insightful, than its likely that both users didn't come up with the same exact edit and it might be accepted regardless.
But I do I agree, this might be helpful to users under 2k reputation, who look for reputation through edits or purely just enjoy making them.
share|improve this answer
User A does not need to suggest edits, he has substantial reputation (in excess of 2K) so his edits are not "suggested" but instead immediately implemented. User B is making a "suggested edit" which must go into a queue for approval.
There does appear to be some overlap which isn't accounted for, though. You're right that User B should be prompted that he can't submit the edit because the original post has already changed.
share|improve this answer
User B making a suggested edit is the case that this bug report is about. – Gilles Nov 21 '13 at 2:14
You must log in to answer this question.
Not the answer you're looking for? Browse other questions tagged .
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Lambda Architecture – Detailed Explanation
Lambda Architecture
Introduction
Data processing and data access using the Lambda Architecture are combined with a fast real-time stream pipeline in a data processing workflow. A common architecture model in IT and development toolkits as businesses strive to become more data-driven and event-oriented in the face of massive volumes of rapidly generated data, often referred to as “big data,” are businesses that are striving to become more data-oriented and event-oriented in the face of massive volumes of rapidly generated data, often referred to as “big data.”
We will discuss Lambda Architecture in great detail, including its applications, advantages, and disadvantages.
What is Lambda Architecture?
This architecture forms the basis for huge data ingestion and processing. It also captures and functions on historical data. We are trying to solve the problem of computing arbitrary functions as well as the problem of dealing with three layers of problems.
1. Batch layer
2. Serving layer
3. Speed layer
In the past, we called batch layers a “data lake” style system similar to Hadoop. They also used to be referred to as “batch layers.” This layer helps with batch queries in addition to supporting batch processing. We generate analytics or ad hoc using batch processing. The speed layer is similar to the batch layer in that it performs real-time analytics. It, however, calculates those analytics in real-time on the most recent data. The analytics calculated by the batch layer are referred to as analytics.
For example Fast-moving data that is zero to one hour old is the layer’s responsibility for calculating real-time analytics. It is based on data that one hour ago was fast-moving.
The third layer, which was formerly known as the serving layer, handled serving up results. Additionally, the speed and batch layers were both involved.
• The data arrives at both the batch layer and the speed layer in order to be processed.
• The batch layer performs two important functions:
• Managing the master dataset is part of the task.
• To pre-compute the batch views prior to the jobs starting.
• We also refer to this layer as a serving. The high latency of updates to the serving layer is compensated for by the speed layer, which handles recent data only. layer. It indexes batch views in order to make them low-latency, ad-hoc queries.
• The high latency of updates to the serving layer is compensated for by the speed layer, which handles recent data only.
• A batch view can be joined with a real-time view to answer any incoming query.
Data Sources
The Lambda Architecture can be used to conduct data analysis, and a variety of sources can be used to provide data. Apache Kafka, for instance, is not the original data source; rather, it is a between-store intermediary that is used to hold data in batches and at high speeds. The data is processed simultaneously to both the batch layer and the speed layer in order to speed up indexing.
Batch Layer
In preparation for indexing, the system saves batch views in a model that resembles a series of additions and deletions to a system of record, similar to what would occur when a change data capture (CDC) system generated a change record (CR). This model is commonly written as a comma-separated values (CSV) file. During a CDC system, the data is stored as immutable append only records and is processed using technologies such as Apache Hadoop.
Serving Layers
There are several layers to the Erlang Cache, including this one that indexes the latest batch of views and then also reindexes all data to fix a coding bug or to create different indexing schemes for different purposes. The serving layer must process the data in an extremely parallelized way to reduce the time to index the data. New data will be queued up for indexing in the next indexing job if they are not yet covered by an index.
Speed Layer
The speed layer helps fill in the gaps in the serving layer by indexing data that the serving layer is currently indexing as well as data that has recently been added. Data that has been added to the system after the indexing job started is expected to take a while to be indexed. The speed layer therefore needs to index the most recent data so that the gap between the most recent data and the most recent data can be narrowed. The stream processing software used to index incoming data in real time to reduce latency is usually leveraged to perform this function. In the Lambda Architecture, Apache Storm was the leading stream processing engine adopted prior to Lambda (but other technologies have since gained more popularity as alternatives). Nowadays, Hazelcast Jet, Apache Flink, and Apache Spark Streaming are all popular stream processing engines.
Query
The serving layer and the speed layer processes end user queries submitted to them by this component. The results of these processes are then consolidated by this component, resulting in near real-time analytics.
How Does Lambda Architecture Work?
The batch layers continue to index incoming data in batches. The speed layer, on the other hand, indexes all the new, unindexed data in near real-time to complement the batch/serving layers. This provides you with a detailed and constant view of data in the batch/serving layers, as well as a smaller index that is current and up-to-date.
After a batch indexing job has finished, the newly batch-indexed data is available for querying, so the speed layer’s copy of the same data and indexes is removed and cannot be used to speed up the serving layer. The serving layer then begins indexing the most recently produced data in the system, which has already been indexed by the speed layer (so it is available for querying at the speed layer). This ongoing cross-layer transfer ensures that all data is available for querying and that latency is kept low.
The speed layer discards the data copied by the serving layer when the serving layer completes a job.
Features of Lambda
A lambda architecture has the following benefits:
1. No software management is required, so there are no installation, maintenance, or administration steps.
2. To suit your application, you can either scale it automatically or manually adjust its capacity.
3. There are no human errors or outages in serverless applications, because they are built-in with fault tolerance and availability.
4. To be able to react to changing business and market conditions, you must be able to business agility.
Typical Lambda Applications
Lambda functions and triggers are the key components of developing on AWS Lambda. Code and runtime for Lambda functions are Lambda functions, while AWS services or applications that invoke them are triggers. In the following sections, you’ll learn about the following:
• A photo-sharing application stores user photos in an Amazon S3 bucket and creates thumbnail versions of each user’s photos for display on their profile page. You may implement a Lambda function to create a thumbnail automatically or you may choose to do it manually. A photo object can be retrieved from the S3 bucket by your Lambda function code, created a thumbnail version, and saved in a new S3 bucket.
• A DynamoDB table stores data and analyzes it. When you create a Lambda function that writes, updates, or deletes items in a table, DynamoDB streams publish item update events. In this scenario, the event data provides the item key, event name (such as insert, update, and delete), and other relevant data. You can aggregate raw data using a Lambda function to create custom metrics.
• A DynamoDB table stores data and analyzes it. When you create a Lambda function that writes, updates, or deletes items in a table, DynamoDB streams publish item update events. In this scenario, the event data provides the item key, event name (such as insert, update, and delete), and other relevant data. You can aggregate raw data using a Lambda function to create custom metrics.
• A Lambda function can be created to respond to events produced by a custom mobile app. You can, for example, configure a Lambda function to handle clicks within your custom mobile app.
Advantages of Lambda Architecture
A lambda architecture has the following advantages:
• Human-fault tolerance and robustness. The batch layer is human-fault tolerant, since it contains the entire data set from the beginning of time. Deleting and replacing corrupted batch views would restore all of the data from the point of corruption forward. All batch views can be swapped out for freshly created ones. The speed layer can be discarded. Since the system would be reset and running again as soon as new batch views are generated, the batch layer would take longer to process them.
• A Lambda Architecture is built with distributed systems at the top layers. Therefore, adding more machines will allow users to easily horizontally scale those systems.
• In Lambda Architecture, there is no one way to compute a batch view or perform a speed layer computation. Since it is a general paradigm, Lambda Architecture adopters do not have to limit themselves to a specific way of computing this or that batch view or layer computation. Batch views and speed layer computations may be designed to meet the needs of the data system if they are so inclined.
• New data enters the data system as extensibility. Data systems are not constrained by a set of batch views, as new views are needed as new data enters the system. Despite the constraints, resources can be expanded to allow for new views.
• Ad hoc queries are still possible even if the high-latency for these ad hoc queries is permissible. The batch layer can still be used for ad hoc queries that were not available in the batch views, assuming the high-latency for these ad hoc queries is permissible.
• The typical incarnation of Lambda Architecture relies on Apache Hadoop for the batch job layer and ElephantDB for the serving layer. Both can be maintained relatively easily.
• Debuggability, An input to the batch layer’s computation of batch views is always the entire data set, whereas the inputs and outputs for each layer in Lambda Architecture are not subject to movement. As a result, debugging computations and queries is considerably simpler in Lambda Architecture.
• The speed layer of Lambda Architecture provides real-time queries of the latest data set in low latency reads and updates.
Disadvantages of Lambda Architecture
A lambda architecture has the following disadvantages:
• A high level of coding is incurred because of the comprehensive processing that occurs.
• Every batch cycle that is not advantageous in certain situations is re-processed.
• In order to move or reorganize data modeled with Lambda architecture, it is difficult to model it with lambda architecture.
• The complexity of lambda architectures is often high. Both batch and streaming layers must be maintained as two distinct code bases, which may result in difficult debugging.
Conclusion
We have discussed Lambda Architecture and determined its functioning and applications. In addition, we have studied Lambda Architecture’s limitations and benefits. Lambda architecture is a software architecture pattern that is designed to encourage the separation of concerns and decoupling of logic from data. Lambda architecture is a popular approach to software development that aims to reduce the coupling between logic and data by decoupling logic from data. The key idea behind lambdas is that the logic of a program can be abstracted away from its data, allowing it to be written in a way that makes it easy to test and maintain. The most common use of lambdas is in development environments such as web frameworks, which often consist of a single set of code that is responsible for handling all the logic of the application. By separating logic from data, it becomes easier to test and maintain code, which can lead to more reliable applications. Lambda architecture can also be used to decouple logic from data in other areas of software development, such as databases and web services. By separating logic from data, it becomes easier to develop applications that are more maintainable and flexible.
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Question Faster RAM speeds (DDR5)?
Jul 6, 2022
3
0
10
0
First, some backstory. I have a CD player that can render the half second before a track officially starts at 0:00. When I press play.
When this happens, I can hear a footstep, a voice, and/or the click on the recording console. This phenomenon is absent on my DAC (digital to analogue convertor).
Despite making 2 identical copies of a CD and playing the exact same files back using the computer + DAC, this cannot be replicated yet.
My laptop uses 2666 MHz DDR4 RAM (16 GB). Would upgrading to faster RAM open the possibility for this?
I'm using: Jriver
Jriver bit exact dithering
I2s [kernel streaming]: lowest/quickest layer of Windows Audio = best fidelity
Basically what I'm trying to replicate is the speed of a laser in femtoseconds or a handful of attoseconds, but on my laptop. The faster the data can be read and processed, the more accurate the output will be. Although these are not timing differences we can perceive directly, it translates to how the audio output sounds due to any latency in the chain, or any lack of latency.
My other option is getting a DAC with a master clock instead of crystal oscillators.
While I could have asked this question on an audio forum, I didn't because I would have received too many opinionated answers.
Since the Forte here is computers, I decided to ask here. :)
ASK THE COMMUNITY
TRENDING THREADS
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Wayfinding
UIUX 360 / 22-December-2022 / minute read
Wayfinding
Wayfinding refers to information systems that guide people through physical environments and enhance their understanding and experience of space. Wayfinding is especially important in complex built environments such as urban centers, health care, educatio
Author
What is Wayfinding?
Overview
Wayfinding refers to information systems that guide people through physical environments and enhance their understanding and experience of space. Wayfinding is especially important in complex built environments such as urban centers, health care, educational campuses, and transportation facilities.
Wayfinding cues are embedded to tell users where they are, how they got to a certain page, and where they want to go. The path that users have taken in the digital space can be indicated using symbols.
Comprehensive wayfinding systems often combine signs, maps, symbols, colors, and other communications. Additionally, they integrate mobile applications, digital displays, wireless technologies, and RFID.
LET’S WORK TOGETHER
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Post views: 499
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Take the 2-minute tour ×
Stack Overflow is a question and answer site for professional and enthusiast programmers. It's 100% free, no registration required.
I built two programs, one using malloc and other one using mmap. The execution time using mmap is much less than using malloc.
I know for example that when you're using mmap you avoid read/writes calls to the system. And the memory access are less.
But are there any other reasons for the advantages when using mmap over malloc?
Thanks a lot
share|improve this question
Can I assume that your malloc program uses read/write or fread/fwrite to do some I/O on the file that you mmap in the other case? – Suppressingfire Nov 15 '09 at 23:45
Yes, actually I'm using read/write with malloc, mmap, and the using normal R/W calls. using R/W calls is faster than using malloc, I guess is because accessing the disk is faster than memory. – Peter Nov 16 '09 at 0:03
5
It's not that accessing the disk is faster than memory. Almost always, memory is much faster than disk, and malloc is not what's costing time. The mmap code is faster because for your program, mmap has resulted in either less disk access, or more efficient disk access, than whatever reads and writes you compared against. For instance, write ing the whole file actually sends all those bytes to disk. mmap just means if you modify the mmap ed data, then the OS will write the changes. So if you end up not modifying the whole file, you might only ever actually write a fraction of it. – Steve Jessop Nov 16 '09 at 0:39
"I guess is because accessing the disk is faster than memory." That is very false. Because you give no code, I'm not sure what exactly you're talking about with malloc being slower than mmap. Both functions map address space, they do not necessarily allocate any physical memory. Nor do they read files. Both will allocate physical memory as you use each page, but mmap will do so by reading it from disk, which will certainly be slower (hard page faults vs soft page faults.) Read/Write syscalls may or may not be faster than the hard page faults, depending on numerous factors. – Eloff May 27 '10 at 6:08
1
mmap allows for other uses also, like building a shared memory area with which your process can communicate with forked precesses. – tristopia Oct 22 '10 at 13:50
add comment
5 Answers
I assume that you are referring to using mmap and malloc for reading data from files. In that case you pretty much got the main point:
• using fread/fwrite you have to make many calls to the OS.
• using mmap you appear to get access to the entire file in one operation. This is not entirely true because the OS probably maps the file one memory page at a time, but it is still a lot faster.
share|improve this answer
1
To add to that, fread is buffered this means that if it is preceded by a fseek it will always fill his buffer completely. I had a program that read a file sequentially but preceding a fseek before every record (of size 32) reading 8192 bytes. So it ended up reading 256 times more data than necessary, plus reading was always two calls to the kernel. With mmap you have none (visible). – tristopia Oct 22 '10 at 13:44
add comment
mmap doesn't actually load the file into memory, so it will load faster, but editing it will be slower.
Another point is that mmap doesn't use any memory, but it takes up address space. On a 64bit machine, most of the memory address space will not have memory, so you could load up huge files, say 5gb, that you would not want to malloc.
share|improve this answer
add comment
Both malloc and mmap are slow at times. It depends mostly on the usage pattern:
mmap: The kernel paging subsystem works in page sized units. This means, if you want to read a whole page from a file and want to repeatedly do that(good localization) it will be fine with mmap. Contrary, if you map that 5 Gb file and do scattered access, you'll have the kernel swap pages in and out a lot. In addition to the actual I/O the page management will take some time. If you have concerns about latency, avoid this access pattern, as the Linux page reclaim mechanism tends to be bursty and will cause noticeable lags, and the cache poisoning will slow down other processes.
malloc: It is fine when you need memory that's not in page size units. but you cannot do things like mlock() sanely. In terms of I/O the speed is very much dependent on how you do it. fread/fwrite may map pages behind the scenes, or will do buffering in userspace. Localized access will be rather fast. read/write go directly through the kernel, so small distributed accesses will still cause I/O due to cache misses, but the actual data transferred from kernel->userspace will be slightly less. I do not know if that is measurable.
Unless mlock()'ed, user pages may be swapped out/written back at any time. This takes time, too. So on systems with little memory, the variant that maps the least memory will win. With Linux kernel every system has too little memory as the unused pages are used for caching I/O, and the kernel may take noticeable time to make them available if memory use or I/O is bursty.
share|improve this answer
add comment
Look folks, contrary to common believe, mmap is indeed a memory allocation function similar to malloc..
the mmaped file is one use of it.. you can use it as memory allocation function passing -1 as file descriptor..
so.. the common use is to use malloc for tiny objects and mmap for large ones..
this is a good strategy..
i use alloca() to for function scope only variables..
share|improve this answer
1
Normally the allocator will use mmap itself depending on the size of the area asked with malloc. On Solaris when asking for more than 128K you will get a MAP_ANON memory mapped block. On OS/X the limit is 64K if I remember correctly, other systems and allocation libraries will have other values. – tristopia Oct 22 '10 at 13:48
add comment
mmap doesn't actually read the file. It just maps it to address space. That's why it's so fast, there is no disc I/O until you actually access that region of address space.
malloc is simply a mapping of address space to memory
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When you think about the amazing text analysis capabilities available in SPS08, and reflect that these have been further improved on recently, you will agree that checking out this video is an absolute must. In this video by the SAP HANA Academy, Tahir Hussain Babar aka Bob, takes us through Text Analysis for the Public Sector, a brand new feature for SPS09.
Today I have been working out of a library close to where I live in the Northern English countryside. This place is a bastion of old England with some of the most expensive real estate for hundreds of miles. The technologies I have covered over the last few blogs have made for amazing conversation starters. I have noticed that people just take for granted what software can do. The old thumb scanner monitor trick, we used to play in the IT classrooms on April 1 when I was a teacher, would catch out most people here. However, they are all sceptical about text analysis and search as a practical concept. By this I mean they cannot see how it works, though they acknowledge it would be useful, especially to governments.
In this video you will be learning about a new configuration type for SPS09 called extraction core for the public sector. This includes a set of entity types and rules for extracting information about events, persons or organisations and their relationship specifically orientated towards security.
Bob does this in SAP HANA Studio with a SPS08 and SPS09 servers. He starts by creating a SQL console in SPS08. He does this to explain the differences in syntax. The SPS08 server will contain a table with two columns stored as below.
After he has executed the code to create the table Bob demonstrates how to load data into it. He inputs these four rows. Bob uses this data to run a full text index as shown. He uses configuration type voice of customer because public sector did not exist in SPS08. You will notice that the line referring to the public sector has been commented out. Once the tables have been refreshed you will see another table generated above the first one which contains all your types of text analysis.
Bob then runs a SQL statement that will select four columns from the first table which uses the primary key as a reference. The four columns will include the headings for a primary key, the individual counter for each object that’s going to be extracted, the type of object extracted and the value or worth. Bob then executes and discusses the results.
Bob then states this type of analysis has been improved in SPS09 and goes onto to demonstrate how to perform the same task in SPS09 using the second schema. He uses the same statements in the same order, re-explaining what he is doing. He creates a table with two columns but then loads the data one row at a time. For the index instead of using the configuration, voice of customer, he uses the extraction core public sector.
Bob then uses the SQL statement he used before and then discusses the differences in results.
The type of person, organisation and alias are broken down to the extent that SPS09 recognises that the person Tahir Hussain Babar is also known as Bob.
After executing the SQL to insert the second row Bob highlights that 6 ft is a measure of height. In SPS09 you can analyse by sentence as well.
Whilst demonstrating the execution of the third row Bob shows that Berlin has been identified as a locality. This is not unique to SPS09 but the Travel_cameTo From is a new feature.
However, new to SPS09 are the exact spatial reference, direction and distance.
Bob then states that there are lots of other new features to do with spatial references on distances, cardinal directions and exact locations. There are also lots of other features customised for the public sector to do with military units, teams that you’ve been in and squadrons you could be a member of.
When I think of the public sector I think of hide bound convention, unwieldy bureaucratic obsession with administrative correctness and inherent desire to standardise everything. You can guess that I have had enough of its starchiness and relentless crush on ambition over the last twenty years. This technology will enable the public sector to see and take account of diversity in its deliberations. Instead of playing lip service to recognising difference, Text Analysis and Search will enable them leverage huge volumes of structured and unstructured data in real time and focus it in a way that makes sense, is easy to digest and use it to make better decisions. Data can be captured from a multiplicity of sources and analyzed in real time to avoid hazardous situations and enhance operations. Now that’s what I call making a difference.
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How to Avoid Spam Filters When Sending Emails
How to Avoid Spam Filters When Sending Emails
Many, if not every email marketer faced this problem. Spam filters seem to be a huge obstacle on the way to the recipient’s Inbox, but in fact, it is a natural element of the email delivery process.
What are Spam filters?
Spam filters are filters designed to sort emails according to certain criteria. When you send an email, spam filters decide where to place it: to the Inbox, to a special tab, to a spam folder, or block it altogether.
It is important to understand that you can’t avoid spam filters. They play a massive role in the email deliverability process. That’s why our goal at GlockApps is to help our users understand how spam filters work, how mailbox providers use them, and how to get the emails filtered to the Inbox.
How Spam Filters Work
Spam filters can work on inbound and outbound emails. Mailbox providers use both methods to protect their customers from spam. Mostly, email senders are concerned with inbound filters.
Spam filters use algorithms and heuristics in their filtering technology. Algorithms are rules that tell a filter what to do. Heuristics submit email messages to thousands of predefined rules (algorithms). Each rule working on a message assigns a numerical score to the probability of the message being spam.
Types of spam filters that can affect the email deliverability and placement:
Gateway Filters
They are servers that receive all email messages sent to the company. They decide whether to allow the email to go further or not. The gateway spam filter learns to differentiate between legitimate emails and spam, based on all the messages sent to the company. Gateway email filters like Barracuda and Mimecast are often used by large businesses and organizations to prevent spam.
Hosted Filters
They belong to companies that have elaborated their own method to distinguish legitimate emails and spam based on content and sender reputation metrics. Hosted spam filters can influence inbound emails at the gateway (i.e., delivered or blocked) or after a message passed the gateway (i.e., Inbox or spam).
These spam filters have a wide range of clients, so they have a lot of information to use when deciding whether to deliver an email to the Inbox, spam, or quarantine folder, or block it. Examples of hosted spam filters are Cloudmark and MessageLabs.
Desktop Filters
They are installed on the end user’s computer and are configured by the user. So they can be one of the more difficult filters to get through. Examples of desktop spam filters are Outlook with the SmartScreen anti-spam filter from Microsoft, G-Lock SpamCombat, which uses a combination of filters including the Bayesian filter to separate legitimate messages from spam.
How Mailbox Providers Use Email Filters
Originally, filters were set up to determine spam emails and move them to the spam folder or block them. Today, some mailbox providers use email filters to organize messages in the tabbed Inbox (e.g., Primary, Promotions, Social, Newsletters, Commercial).
There are strong reasons for mailbox providers to filter email. Spam is boring, but it can also be dangerous. Mailbox providers use email filters to protect their customers from malware, viruses, and phishing emails and to reduce the load on their servers’ resources.
Mailbox providers look at three main aspects when making email filtering decisions:
1. Build Your Sender Reputation
When we talk about an email source, we mean the sending IP address and sending domain. These are the pillars on which a sender’s reputation is built.
IP Address
An IP address is a number listed in the domain name system. It is used to send email messages on behalf of your domain name. Marketers can use dedicated or shared IP addresses to send emails.
A dedicated IP address is an IP address that is assigned to a specific sender. It means that no other marketer or company can send emails from this IP address. The advantage of a dedicated IP address is that it gives a sender full control over the quality of messages sent from this IP address, and no other sender can influence it.
A shared IP address is used by multiple senders to deliver emails. The reputation of a shared IP address is influenced by all the senders who use it. What it means is, if one IP user is sending spam, everyone else will suffer from it.
It is recommended to go with a dedicated IP address if you send a high volume of emails, for example, 500,000+ per week. If you are a middle or small volume sender, you should go with a shared IP.
Read more: Dedicated vs Shared IPs: Which Should You Choose for Better Deliverability.
You can check your IP address reputation with a tool called Sender Score from Return Path. The Sender Score is determined by factoring the key reputation metrics such as complaints, spam trap hits, rejected messages, filtered messages, unknown users, blacklists, and your sending infrastructure.
Sender Score report from Return Path
Bounce Email Analytics
You should keep in mind that a high sender score does not guarantee Inbox placement. It indicates an Inbox potential since it is only one of many factors determining the mailbox providers’ filtering decisions.
When you get a new IP address, you need to warm it up to show the consistency and build a reputation for that IP. Many marketers are not aware of the consequences of sending a high volume of emails from a new IP address, so they start sending to their entire subscriber base from the first day.
Mailbox providers will apply throttling to emails sent from a new IP address. It means that they restrict the number of messages they can accept, and often filter emails into the junk folder or randomly place emails to Inbox or Spam until they see a consistent, legitimate volume from the IP address. Once the consistency is proven, the restriction is either removed or lifted.
Mailbox providers apply throttling measures for new IP addresses because spammers often try to trick the email filters by using multiple (and constantly changing) IP addresses or domains. So showing consistent traffic over your IP addresses helps mailbox providers determine you as a legitimate sender.
Let’s recap the key things to keep in mind regarding the sender IP address:
1. Don’t send emails from multiple IP addresses.
Spam filters recognize this technique, and using it puts you at risk for being blacklisted.
2. Warm up the new IP address.
To establish an IP address reputation, start sending slowly with a low volume, and increase the volume every day over a week or two.
3. Show consistency in send volume.
Once you built a reputation over an IP address, try to maintain consistent volume levels. Mailbox providers tend to filter emails out if they observe spikes in sent emails after periods of inactivity.
4. Monitor your IP reputation.
Check the sender score for your IP address with the Sender Score tool. Also, monitor the IP against blacklists with the GlockApps real-time blacklist monitor if you are on a dedicated IP address and de-list it if it gets blacklisted.
Remember that you can’t solve deliverability issues by moving to a new IP address. It can be a short-term measure, but in perspective, you need to make the appropriate changes to your list acquisition and email program. Otherwise, the issues will repeat on the new IP address.
Domain
A domain name is a registered name on the Internet. The domain reputation is as important as the sender IP reputation.
When talking about the sending domain, it is important to emphasize two things: domain authentication and domain reputation.
Domain Authentication
Authentication is the technology that allows the receiving server to confirm the sender’s identity. If the sender’s identity cannot be authenticated, mailbox providers can filter the message as spam, reject it, or submit to additional filters.
For legitimate senders, authentication is mandatory; it is essential to securing your brand and building a good reputation.
There are the three primary methods of authentication:
1. SPF (Sender Policy Framework): validates that a message is sent from an IP address that was authorized to send messages on the behalf of the indicated sending domain.
2. DKIM (DomainKeys Identified Mail): authenticates an email using public-key encryption. It signs a message in a way that is difficult to forge, proving that the message is sent from the indicated sending domain.
3. DMARC (Domain-based Message Authentication, Reporting, and Conformance): ensures that an email is properly authenticated against established DKIM and SPF standards and that any fraudulent activity that may be coming from legitimate domains is blocked.
Domain authentication helps build your domain reputation, protects your domain against email spoofing and phishing, and increases the chances of your emails to be delivered to the Inbox.
You can check your authentication records with the GlockApps spam testing tool and DMARC Analyzer.
For more information, check this ultimate guide about email authentication.
Domain Reputation
To make the filtering decisions about where the email should go, mailbox providers look at the metric called a domain reputation.
The data used to determine a domain reputation is:
Inbox placement rate – the percentage of the messages sent from the domain that went to the Inbox.
Spam placement rate – the percentage of the messages sent from the domain that went to the Spam folder due to the IP address, domain reputation, or content filters.
Complaint rate – the percentage of the recipients who reported the message as spam from the total number of the recipients who received the message.
“This is not spam” rate – the percentage of the recipients who marked the message as not spam from the total number of the recipients who received the message to their spam folder.
Hard bounce rate – the percentage of messages returned to the sender due to an invalid recipient’s email address from the total number of emails sent.
Spam complaints from the recipients have the worst impact on the domain reputation and deliverability. Mailbox providers strive to protect their customers from unwanted emails. Thus, your complaint rates should be below 0.1% for optimal Inbox placement. A complaint rate higher than 0.1% puts a red flag for the sender. If the issue is not fixed promptly, it will lead to the email rejections or blocks.
Here you can learn about other email deliverability metrics that influence email placement and filtering decisions.
2. Keep Your Subscribers Engaged for Better Deliverability
In addition to the sender’s reputation and authentication, mailbox providers take into account the recipient’s engagement. By the recipient engagement, we mean the actions the recipients take on received messages.
Email marketers look at such metrics as open rate, click rate, click-through rate, and conversion rate to measure the effectiveness of their email campaigns. Mailbox providers use other data points to measure if the email is wanted or not.
When a recipient reads, forwards, replies, moves an email to a folder, or adds the sender to the address book, it is positive user engagement. If a recipient deletes an email before opening it or hits the “this is spam” button, then it is an indication of disinterest and negative engagement.
The goal of email marketers is to send the right message to the right subscriber at the right time.
Learn More: How to Write Emails that Convert
Below are some best practices on how to achieve it:
1. Send to a confirmed opt-in list.
By confirming their subscription, recipients show interest in your emails. It increases the chances of positive user engagements with your messages.
2. Send what they requested.
If you allow the subscriber to choose what type of emails they want to receive, segment the subscriber list based on their choice and send the relevant content to each segment. If you don’t allow them to choose, then send with the frequency you promised during the opt-in process. Don’t send too much or too little. Consistency is one of the factors monitored by mailbox providers.
3. Send in the right format.
Create an email that opens correctly in most email clients and mobile devices. Optimize the images to make them load quickly. If you use a lot of images, make sure the content can be understood with the images turned off. A broken design can push a subscriber to hit the spam button.
4. Brand your emails.
To build recognition and trust, you’ll want to brand your ‘From’ name and email address. You can also brand links in your emails and the Subject lines. Also, email branding allows you to quickly search for desired emails in the Inbox, and sort them by folders.
5. Re-engage inactive subscribers.
If a recipient did not open any emails during the last 6-9 months, send a re-engagement campaign to bring them back. If you get an old list that has not been emailed for years, clean it from invalid addresses first and send a re-subscribe link to make sure those people still want to hear from you.
6. Monitor your open rate.
The open rate is an indication of the recipient’s interest. A drop in the open rate should concern you because it indicates that either your subscribers lost interest in what you send them and/or you have deliverability issues. Both issues should be addressed.
7. Watch your complaint rate.
Another indication of the subscriber’s interest is the complaint rate. Email service providers handle complaints from their users automatically. If you send through your own mail server, it is recommended to sign up for feedback loops with ISPs to receive email notifications when a complaint happens. If you observe a high complaint rate for your campaigns, make changes to your email program (change the template, content, style of writing, sending frequency, day, time, etc.) to re-engage the readers.
8. Track bounces.
A high bounce rate tells about a poor list quality. Verify your list for validity and change your list acquisition practice if you are not certain that the list is opt-in.
3. Watch Your Message Content and Formatting
Back in the early 2000s, content filtering was the primary way of defense. Checking the content for known spam patterns, keywords, blacklisted URLs, wrong HTML tags and other aspects was crucial.
Since then, mailbox providers have greatly developed their spam filters. Content is still checked, but such factors as the IP address and domain reputation and recipient engagement are the priority.
When a remote mail server receives a message, at first it considers authentication, reputation, blacklists, and information from the headers. This check allows the receiving system to decide whether to allow, filter, or block the incoming message based on the IP or domain reputation and authentication.
If no issues with authentication and reputation are identified, the content of the message is evaluated. Based on the information in the message body and the subject line, a mailbox provider decides whether to deliver the message to the Inbox or Spam.
The content analysis consists of scanning every element of an email: header, footer, HTML code, subject line, text, images, URLs, text-to-image ratio, and attachments.
A popular method of analyzing content is called “fingerprinting.” Fingerprints are hashes or checksums of content. Once the fingerprints are created, they can be compared to other fingerprints. Spam filters compare fingerprints of the content of the inbound email to fingerprints belonging to an email that has been reported as spam. If the similarity is confirmed, the email will likely be sent to the Spam folder.
How to Pass through Content Filters
It is fair to say that there is no golden rule for an “ideal” content that can pass through all content filters because every mailbox provider has its own filtering criteria for the content of incoming messages.
However, following the tips below you can certainly increase the chances for your messages to pass content filtering:
1. Balance text and images.
A message created as a single large image will be blocked by filters as this is a common spammer technique. Keep your text-to-image ratio 65:35.
2. Don’t embed large images.
Embedded images increase the message size and slow down the speed of message processing and loading. Optimize the images with the TinyPNG tool and upload them to your web server. Then link to the images from the message. This method allows you to keep the optimal message size and reduce the speed of message processing.
3. Use correct HTML.
Some spam filters check the HTML tags and source. They can block the message if they observe a code used in spam emails to trick the filters. Make sure your HTML is clean from syntax and formatting errors.
4. Test your email.
Testing message content and email placement in a pre-flight tool such as GlockApps will help you identify potential spam filter issues and deliverability problems before you send.
Once the test reveals that your content is flagged by spam filters and your email went to Spam, continue testing to determine what is causing the issues (links, images, text, sending email/domain, etc.). Email testing can take time, but it’s well worth the effort.
To sum it up, spam filters are a part of the email delivery process. Without them, we would be overloaded with spam. Filters help us get the email we want and keep unwanted mail out of our Inbox. Thus, the goal of email marketers is to follow the best email marketing practices to have a good sender reputation and send emails to the Inbox.
To learn about what mailbox providers think of the list quality and how they measure the sender reputation and recipient engagement read 9 Ways to Simplify Your Path to the Recipient’s Inbox
GlockApps Spam Testing for Marketers and Agencies
GlockApps Spam Testing
GlockApps Spam Testing
Test your email placement
Scan your emails through all the major spam filters before you send them.
Improve your deliverability
Get actionable tips for improving the delivery rate of every email you send.
Increase your revenue
Improve your overall email performance by delivering more emails to the inbox.
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AUTHOR BIO
Julia Gulevich is an email marketing expert and customer support professional at Geminds LLC with more than 15 years of experience. Author of numerous blog posts, publications, and articles about email marketing and deliverability.
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Close
1Password tips for careful net users
Posted on by Mike Evans
Transient
Security is big news. We are all vulnerable and no more so than in the area of password selection. We joke about 1234 passwords but they do actually exist. And millions use their year of birth as a PIN number when any idiot knows this is likely to be between, say, 1930 and 1995.
The very people who use "easy" passwords are also adept at choosing a different one for every site or app. They think they are being careful but inevitably they end up forgetting everything.
That's why there are so many request for password resets and that's precisely why the Apple iCloud reset system was so easy for hackers to penetrate.
1Password can put your mind at rest. This lifesaver app, which is available for iPhone, iPad and Mac, allows you to generate secure and unique passwords for every application. It remembers them, of course, and it can automatically insert credentials to every site you visit.
All this information is safe in an encrypted keychain file which syncs across all your devices.
As the name suggests, you need remember only one password and that's the master password for your 1Password system. Make it unique, don't use it anywhere else, and all your data is safe.
Of all the apps I use daily, 1Password is the best investment I've ever made. If you are not already a user, check it out here. If you are a fan, there is always something new to learn, as you will see in
∞ Permalink
Sitemap: http://macfilos.com/sitemap.xml
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Best Macro Syntax for Perl?
by Jeffrey Kegler (Hermit)
on Nov 11, 2007 at 23:27 UTC ( #650192=perlquestion: print w/replies, xml ) Need Help??
Jeffrey Kegler has asked for the wisdom of the Perl Monks concerning the following question:
I'm writing a parser which allows Perl callbacks, and I want to make some macros available to the programmer writing the callbacks. An example probably explains most easily. For a grammar rule to do addition
Sum ::= Addend + Addend
the user might want to supply a callback like
sub { <first Addend> + <second Addend> }
In this example, the things in angle brackets are the macros. The idea is that the parser replaces these before the callbacks are compiled.
My question is what's the best syntax to use for macros? I want macros that are easy to use, but on the other hand don't get in the way of Perl constructs, and on the third hand (?) aren't impossible to parse out. Obviously there are tradeoffs. The angle brackets of the above example are, to my mind, not the right choice. They too easily are mistaken for other Perl syntax, both by the programmer and the parser. Note that my primary question is not how to program the macro substitution, but what syntax to use for the macros?
I'm sure other modules have tackled this same issue. Pointers to modules which monks feel did macros right would be very helpful.
thanks, jeffrey kegler
Replies are listed 'Best First'.
Re: Best Macro Syntax for Perl?
by FunkyMonk (Canon) on Nov 12, 2007 at 00:10 UTC
Assuming you're not thinking about a source filter (which I always avoid)...
What about using Template::Toolkit as the processing engine? You could let the user decide what syntax to use, defaulting to [% ... %]
The more I think about it, the better I like this idea (letting the user specify his own choice of macro syntax, but defaulting to [% ... %]).
Re: Best Macro Syntax for Perl?
by Joost (Canon) on Nov 11, 2007 at 23:40 UTC
Well, you could go for JSP/ASP style constructs like <% %> and <%= %> which at least are fairly unambiguous but a bit clunky. Without using special unicode characters it's hard to see how you could reduce the construct to a single (pair of) character(s) - update: if you're using Perl, that is. In Lisp, it could probably be done a lot easier.
There are a few modules on CPAN that already parse this kind of syntax. Or take a look at what other template modules on CPAN use.
Update2: depending on your exact needs, you could also get away with things like sub { $1 + $2 } but that more or less implies you're not parsing whatever is in $1 and $2 at compile time.
Re: Best Macro Syntax for Perl?
by TGI (Parson) on Nov 12, 2007 at 17:01 UTC
Re: Best Macro Syntax for Perl?
by pemungkah (Priest) on Nov 13, 2007 at 00:34 UTC
A couple random observations, thrown out sort of at random.
I've implemented macro substitution code in Perl; the real core of it was this, stolen shamelessly from Mastering Regular Expresssions:
# Define base variable detector: any (possibly-nested) angle-bracketed + string. # Patterns to extract <variables> or >variables< from a string. my $out_angled; $out_angled = qr/ < ( [^<>] | (??{$out_angled}) )* > /x; # open angle-bracket then ... # non-angle chars ... # or ... # another angle-bracketed item ... # if there are any .. +. # and a close angle +-bracket
This detects arbitrarily-nested angle-bracket expressions. You would want to, I think, switch the macro brackets to a different string - angle-brackets were a requirement in my application. Fortunately the strings I was substituting in didn't need angle brackets for anything else.
If you want to look at the complete class that implements macro expansion, take a look at App::SimpleScan::Substitution, which is the core of it. This routine as supplied is probaly horrendous overkill, because it was concerned with doing combinatorial substitutions (i,e, var1 has 3 values, var2 has 2, and var3 has 7, so a string containing all 3 variables results in 3*2*7 = 42 different expansions). You might consider gutting it to only do single substitutions, or simply only allow your variable dictionaries to have one value per variable.
The code is pretty complex, because it allows for expansions that create strings that need to be re-expanded, because the values are actually further macro expansions. This lets you define really complex relationships "down the tree", and simply substitute one variable in at the top to expand all the possibilities.
Like I said, probably total overkill for your application, but maybe the variable substitution and detection stuff will help. Probably the most difficult part of the code was remembering what had already been substituted so that recurrences of the variable (from expansion of other constructs) were substituted with the same value.
The pattern match at the top will help a lot in discovering the macro variables. You should be able to rewire it for multi-character delimiters like this:
$templaty = qr/ \[% # open delim ( (?!%\]) # not-a-closer lookahead . # anything else )* # as many as there are %\] # close delim /x; @vars = ($string =~ $templaty);
Take a look at pages 261 to 281 of Mastering Regular Expressions. Those 20 pages were worth the entire purchase cost of the book.
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General Questions about the AI Benchmark implementation
shi_ath
New member
I have been reading some papers on ML Benchmarking. I went through your papers on AI Benchmark and have gotten a general idea about the benchmark and calculation of the summary AI score.
1. A higher K score (AI summary) is a better score, is that correct? I was curious to know more about how to interpret all the results you have obtained in the details of the summary AI score.
2. How to interpret the terms 'Target', 'Per-label error', 'Accuracy, digits'?
3. Further, while setting the tests I was curious to know more about the meaning of 'Limit Max Initialization Time'.
4. Furthermore, could you please guide me to any resources about the different acceleration methods in the settings and how they are related? Whether they can work together or not and why?
5. Is there any method to implement the benchmark on a SoC through the ADB interface? (If apk can not be installed and there is no python interface)
Andrey Ignatov
Administrator
Staff member
A higher K score (AI summary) is a better score, is that correct?
Yes, K here states for thousands (10K = 10000).
How to interpret the terms 'Target', 'Per-label error', 'Accuracy, digits'?
Target: max error not affecting the results (accuracy / visual)
Per-label error: average per-label L1 loss (=mean absolute error) between the produced outputs and goldens
Accuracy, digits: the number of accurately predicted digits after the decimal point (compared to the goldens)
meaning of 'Limit Max Initialization Time'.
On some device, several models might fail to initialize due to outdated NN HAL. Thus, after waiting for 30-120s depending on the model, the test is automatically terminated if the network was not initialized. The above option disables this functionality.
resources about the different acceleration methods in the settings and how they are related
NNAPI: https://www.tensorflow.org/lite/performance/nnapi
GPU delegate: https://www.tensorflow.org/lite/performance/gpu
Hexagon NN delegate: https://www.tensorflow.org/lite/performance/hexagon_delegate
Neuron delegate:
(video is in Chinese, but the slides are in English).
Whether they can work together or not and why?
Only one particular option can be used (TFLite restriction).
If apk can not be installed and there is no python interface
No, in all cases one needs to install the APK first.
shi_ath
New member
Hello Andrey,
I was trying to implement this benchmark on some Android devices. I had a couple of more questions regarding this.
1. For which of the Qualcomm chipsets can this benchmark use Qualcomm Hexagon NN? I tried a couple of chipsets and it did not seem to work for them.
2. For the custom tflite models as benchmark, how are the test cases generated? If I use a audio detection model for eg, will it have audio samples to test the model?
3. In the tutorial on the AI Benchmark website, Is the python interface to the OS through ADB or CLI?
4. I was reading on score calculation in AI Benchmark and it said, 'The result of the memory test introduces a multiplicative contribution to the final score', does that mean higher the memory score, the K score is multiplied with some proportional coefficient to that?
5. It also said 'The normalization coefficients for each test are computed based on the best results of the current SoC generation', what are normalization coefficients and what does normalization mean in this context?
6. For the information on the tests, Object Recognition/ Classification (Mobilenet- v2) (INT8 + FP32), does it mean this test was carried out using INT8 precision and FP32 precision separately?
7. Is the AI Benchmark apk open source?
Would be glad if you/ your team could guide me on this.
Last edited:
Andrey Ignatov
Administrator
Staff member
Hi @shi_ath,
For which of the Qualcomm chipsets can this benchmark use Qualcomm Hexagon NN?
There were some known issues with the Hexagon NN delegate in the beta build. Please download the final AI Benchmark V5 version where all problems are fixed.
The Hexagon NN delegate is generally compatible with the Snapdragon 820-865, 710-765, 660-690 and 460-480. Note, however, that the access to the Hexagon DSP might be blocked by some vendors.
will it have audio samples to test the model?
It will generate random input data using the specified input value boundaries.
Is the python interface to the OS through ADB or CLI
There is no python interface, but you can launch the benchmark using ADB and use touch events to navigate through menus / options.
does that mean higher the memory score, the K score is multiplied with some proportional coefficient to that?
does it mean this test was carried out using INT8 precision and FP32 precision separately
Yes.
Is the AI Benchmark apk open source?
AI Benchmark Mobile is not open source, AI Benchmark alpha is open source.
ibai
New member
Hi,
First of all thank you for this nice tool/app. I have tested the latest version (V5) with a Snapdragon 888 phone with a custom model (YOLOv5 int8), and it was really fast when running with the QNN delegate (HTP) with about 10ms inference for the large model, which is almost 10x faster than running the fp16 version of the same model in TFLite with the GPU delegate.
My question is, is the QNN delegate using SNPE SDK? Or, is it some custom delegate wrapping that library?
Thanks,
Ibai
Top
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ece34605c058195ed03b4d393ef1a36c
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-7,419,732,410,655,269,000 |
SkipToMainContent
Privacy
How ridesharing services can take your privacy for a ride
Written by a NortonLifeLock employee
In cities around the globe, using ridesharing services has become a way of life. Just as “Google” has become a verb, so have “Uber” and “Lyft,” to name just two of the better-known ridesharing companies.
The convenience of always-available cars and drivers paired with easy-to-use apps, plus a selection of ride and pricing options makes for a great blend of technology and transportation. However, because these services require riders’ information, such as real-time location data and a form of payment, they could pose risks to riders’ information and privacy if that information is mishandled.
Ridesharing: the good and the bad
Traditional car services like taxis have fallen in popularity1 in part because ridesharing services offer more conveniences: instantaneous confirmation of ride requests, less-expensive rates, and typically a newer and more varied “fleet” of cars since they employ individual contracted drivers who use their personal cars.
While a popular concept, ridesharing services do have their issues, because they’re not regulated. They still need to comply with local driving regulations; however, it is still within each service’s purview to decide how to conduct background checks for applicants or what type of insurance is needed. Luckily, there’s a human “safety check” system that a lot of these companies use. Each rider can rate their driver, and the driver can rate the passengers in the same manner. If a driver falls below a certain rating, they are unable to drive for the company.
What types of data do ridesharing companies collect?
Ridesharing services like Uber and Lyft rely on GPS-enabled smartphones, since their apps need to know the location of both drivers and ride requestors. However, if riders don’t turn off location access after completing their rides the app could potentially track and collect data around the clock on where the user is, where they go, and, sometimes, even how long they stay there.
In addition to location data, a lot of these services require the user to link to a social networking account, usually Facebook, as a way of verifying identity. By doing so, the user then grants that company access to the personal information that is in their Facebook account.
These services are also cashless, so in order to use them, the user must store a valid credit card in their account.
What can be done with your data?
How’s this for a cautionary tale? A ridesharing company once had a launch party in a new city where they displayed in real-time the full names and destinations of their riders. Luckily, nothing but some extreme heat from the press came from that privacy gaffe. But it did raise the issue of how these ridesharing companies store, handle, and even safeguard riders’ privacy.
No matter what type of service or goods a company provides, when it comes to questions about user privacy, it’s always a good idea to review the company’s privacy policy. A good privacy policy should clearly spell out what data the company intends to access, save, and transmit to third parties. It’s not common knowledge that these companies can and do share this data with third parties. Sometimes it can be general usage statistics that are sold to advertisers, and sometimes data is sent to third parties in order to support the functionality of the app.
Data breaches are increasing as cybercriminals find company databases to be treasure houses of personal information. These breaches can happen during the transmission of this data or even through the third parties once they receive the data. In 2015, Uber suffered one such data breach that exposed the personal information of 50,000 drivers. 2
Before you install that app …
No two companies are alike, and ridesharing services are no exception. Before you commit to choosing a company by installing their app, follow these suggestions:
1. Research each company for any online reviews or news stories about them to get a better sense of the company charter, culture, attitudes, and any worrisome issues that customers may be discussing.
2. Once you’ve narrowed down your choices, examine the privacy policy of each app. Yes, doing so can be a cumbersome task as there is a lot of information to go through, but the information you find should be clear about the company’s intent to use your data. If there is anything you do not feel comfortable with, do some more research or look into other service providers.
Data and privacy shouldn’t be mutually exclusive
In today’s technology-driven world, data collection, privacy, and protection should be at the forefront of everyone’s minds, from consumer to developer. We now live in a world where the paradigm has shifted from bank robberies to data breaches, simply because all of our personal information can be easily accessed in one place from companies that store that data. Uber, for one, is beginning to address this issue.
On July 13, 2017, Uber released an open-source differential privacy tool nicknamed Elastic Sensitivity. Differential privacy means that the identity of individuals is stripped out of user data before it is analyzed, helping to anonymize and protect a person’s privacy. Uber’s new tool alerts their data analysts of the likely privacy implications of any queries they make on Uber data before it can be analyzed. 3
Until all companies, ridesharing or otherwise, are held accountable for how they collect, store, and protect our data, responsibility ultimately falls to consumers to be aware of the companies they conduct business with and to be diligent, educated, and aware of how their data is handled when using services and apps.
Disclaimers and references:
Symantec Corporation, the world’s leading cyber security company, allows organizations, governments, and people to secure their most important data wherever it lives. More than 50 million people and families rely on Symantec’s Norton and LifeLock comprehensive digital safety platform to help protect their personal information, devices, home networks, and identities.
Copyright © 2020 NortonLifeLock Inc. All rights reserved. NortonLifeLock, the NortonLifeLock Logo, the Checkmark Logo, Norton, LifeLock, and the LockMan Logo are trademarks or registered trademarks of NortonLifeLock Inc. or its affiliates in the United States and other countries. Firefox is a trademark of Mozilla Foundation. Android, Google Chrome, Google Play and the Google Play logo are trademarks of Google, LLC. Mac, iPhone, iPad, Apple and the Apple logo are trademarks of Apple Inc., registered in the U.S. and other countries. App Store is a service mark of Apple Inc. Alexa and all related logos are trademarks of Amazon.com, Inc. or its affiliates. Microsoft and the Window logo are trademarks of Microsoft Corporation in the U.S. and other countries. The Android robot is reproduced or modified from work created and shared by Google and used according to terms described in the Creative Commons 3.0 Attribution License. Other names may be trademarks of their respective owners.
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[linux-dvb] Confused in Channel Setup.
clemens at dwf.com clemens at dwf.com
Mon Mar 14 04:03:33 CET 2005
As usual, Im sitting here confused.
Ive actually got to the point where things 'work' with my Air2PC card,
my ATI Remote Wonder (RF) Remote, and MythTV.
I was able to record a program last night and play it today.
I am now trying to 'clean' things up, and not having all that much luck.
At one time or another I have had 'only' the DT stations in this area in
my Program Guide *once* each (I only have the DT stations in my Zap2it
database).
However after doing the 'channel scan' from
Setup->Channel Editor->Scan for Channels->Full Scan
and then a scan on each channel found,
and having done a 'mythfilldatabase', I have all sorts of crap in
my channel listing.
(a) all of the NON-digital channels have appeared.
(b) Most of the Digital channels appear twice, once with a channel number
like 11_1 and then again as 111
What exactly am I suposed to do, and Ill go back and delete everything and
do it all again. With all the different things Ive read, for different card
types, Im confused.
Reg.Clemens
reg at dwf.com
More information about the linux-dvb mailing list
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ece34605c058195ed03b4d393ef1a36c
|
9,124,330,431,054,150,000 |
51220
Выделение контурных признаков изображения
Лабораторная работа
Информатика, кибернетика и программирование
Цель работы: Изучить методы выделения контурных признаков изображения и применить полученные знания на практике. Задание: Cоставить программу, выполняющую выделение контурных признаков изображения.
Русский
2014-02-07
287.94 KB
10 чел.
Министерство образования Республики Беларусь
Учреждение образования
Брестский государственный технический университет
Кафедра ЭВМ и С
Лабораторная работа № 4
«Выделение контурных признаков изображения»
Выполнил:
студент гр. Э-41 ФЭИС
Якубчик А.Н.
Проверил:
Кузьмицкий Н.Н.
Брест 2013
Цель работы: Изучить методы выделения контурных признаков изображения и применить полученные знания на практике.
Задание: Cоставить программу, выполняющую выделение контурных признаков изображения.
1. Необходимые характеристики:
2. изображение хранится во внешнем файле;
3. программа должна выводить исходное и результирующее изображения;
4. возможность выбора уровня порогового ограничения;
5. перед выделением контура происходит фильтрация изображения любым фильтром.
6. возможность изменения порога при роботе с контурным препаратом.
Тип фильтра:
1. курсовые маски (возможность выбора любой маски: С,Ю,З,В,С-З,С-В,...)
Код программы:
using System;
using System.Collections.Generic;
using System.ComponentModel;
using System.Data;
using System.Drawing;
using System.Linq;
using System.Text;
using System.Windows.Forms;
namespace COS4
{
public partial class Form1 : Form
{
Bitmap image1 = null;
Bitmap image_2 = null;
int width = 0;
int height = 0;
public Form1()
{
InitializeComponent();
}
private void button1_Click(object sender, EventArgs e)
{
openFileDialog1.ShowDialog();
Bitmap image = new Bitmap(openFileDialog1.FileName);
width = image.Width;
height = image.Height;
image1 = image;
pictureBox1.Image = image;
pictureBox1.Show();
}
private void button2_Click(object sender, EventArgs e)
{
Bitmap image2 = new Bitmap(width, height);
pictureBox1.Image = image2;
image_2 = image2;
for (int i = 0; i < height; i++)
{
for (int j = 0; j < width; j++)
{
Color c = image1.GetPixel(j, i);
Double RED = Convert.ToDouble(c.R * 0.2989);
Double GREEN = Convert.ToDouble(c.G * 0.587);
Double BLUE = Convert.ToDouble(c.B * 0.114);
int GREY = Convert.ToInt32(RED + GREEN + BLUE);
image2.SetPixel(j, i, Color.FromArgb(c.R, c.G, c.B));
image2.SetPixel(j,i,Color.FromArgb(GREY,GREY,GREY));
}
}
pictureBox1.Refresh();
}
private void button3_Click(object sender, EventArgs e)
{
string input = textBox1.Text;
double k = Convert.ToDouble(input);
Bitmap image3 = new Bitmap(width, height);
pictureBox2.Image = image3;
double G = 0;
int[,] maska = new int[3, 3];
for (int i = 1; i < height - 1; i++)
{
for (int j = 1; j < width - 1; j++)
{
for (int county = 0; county < 3; county++)
{
for (int countx = 0; countx < 3; countx++)
{
maska[county, countx] = image_2.GetPixel(j + countx - 1, i + county - 1).R;
}
}
if (radioButton1.Checked == true)
{
G = (maska[0, 0] + maska[0, 1] + maska[0, 2] + maska[1, 0] - 2 * maska[1, 1] + maska[1, 2] - maska[2, 0] - maska[2, 1] - maska[2, 2]);
}
if (radioButton2.Checked == true)
{
G = (maska[2, 0] + maska[2, 1] + maska[2, 2] + maska[1, 0] - 2 * maska[1, 1] + maska[1, 2] - maska[0, 0] - maska[0, 1] - maska[0, 2]);
}
if (radioButton3.Checked == true)
{
G = (maska[2, 0] + maska[2, 1] - maska[2, 2] + maska[1, 0] - 2 * maska[1, 1] - maska[1, 2] + maska[0, 0] + maska[0, 1] - maska[0, 2]);
}
if (radioButton4.Checked == true)
{
G = (maska[2, 1] - maska[2, 0] + maska[2, 2] - maska[1, 0] - 2 * maska[1, 1] + maska[1, 2] - maska[0, 0] + maska[0, 1] + maska[0, 2]);
}
if (radioButton5.Checked == true)
{
G = (maska[0, 0] + maska[0, 1] + maska[0, 2] + maska[1, 0] - 2 * maska[1, 1] - maska[1, 2] + maska[2, 0] - maska[2, 1] - maska[2, 2]);
}
if (radioButton6.Checked == true)
{
G = (maska[0, 0] + maska[0, 1] + maska[0, 2] - maska[1, 0] - 2 * maska[1, 1] + maska[1, 2] - maska[2, 0] - maska[2, 1] + maska[2, 2]);
}
if (radioButton7.Checked == true)
{
G = (maska[2, 0] + maska[2, 1] + maska[2, 2] + maska[1, 0] - 2 * maska[1, 1] - maska[1, 2] + maska[0, 0] - maska[0, 1] - maska[0, 2]);
}
if (radioButton8.Checked == true)
{
G = (maska[2, 1] + maska[2, 0] + maska[2, 2] - maska[1, 0] - 2 * maska[1, 1] + maska[1, 2] - maska[0, 0] - maska[0, 1] + maska[0, 2]);
}
if (G > k)
{
image3.SetPixel(j, i, Color.White);
}
else
{
image3.SetPixel(j,i,Color.Black);
}
}
}
pictureBox2.Show();
}
}
}
Пример работы программы:
Вывод: в ходе работы изучили методы выделения контурных признаков изображения.
|
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ece34605c058195ed03b4d393ef1a36c
|
-2,081,090,916,827,332,400 |
Wednesday
September 17, 2014
Homework Help: math
Posted by mike on Friday, May 8, 2009 at 12:43am.
how would you determine the eccentricity of the conic section when represented by the equation
ax^2+cy^2+dx+ey+f=0
if the equation represents an ellipse and then when it represents a hyperbola.please help.
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ece34605c058195ed03b4d393ef1a36c
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6,896,650,776,811,139,000 |
0
4 corner liquid box issue sample...
Waiting for CSS version 3 (I read that probably we need to wait several years) we all poor webdesigners / webmaster are forced to get mad for the 4 round corner box issue.
- 1 it is possible do the box layout base with tab tag
- 2 it is possible do the box layout base using div tag and no table
Case 1 - is probably easier to work with specially if you have never done that before but is not recommended
Case 2 - actually you do not save much code in the page using div instead of tab but is much better for consistency and for future development
In both cases basically must add a set of corner's images (of the due color), can be 2 or 4 images x box depending if the box have a fix width or a width 100% ===> the liquid case
Today i have just made some of those liquid boxes so I wish to share where the problem is worst, where you need all 4 corners images, and of course you need 4 XHTML elements in order to look them up.
Please note that:
- I have not used a background-color option because the color to be used for my customer was a pantone color not web safe, so no way to make a # color code but need to work with a background-image option _zzz.png
- The 4 corner images are:
_aaa.png _bbb.png _ccc.png _ddd.png
So here comes the CSS...
<!-- main liquid box -->
.minibox {
background-image:url(../images/_zzz.png);
width:100%;
}
<!-- link text image all content style -->
.imgminibox
{
border: #660033 solid 1px;
}
.textminibox {
text-align:left;
padding:10px;
font:Arial, Helvetica, sans-serif;
font-size:12px;
color:#FFFFFF;
font-weight:bold;
}
a.linkminibox {
font:Arial, Helvetica, sans-serif;
font-size:12px;
color:#FFFFFF;
font-weight:bold;
text-decoration: underline;
}
a.linkminibox:hover {
font:Arial, Helvetica, sans-serif;
font-size:12px;
color:#FFFFFF;
font-weight:bold;
text-decoration:none;
}
<!-- here are the 4 cornes -->
.roundaaa {
background-image:url(../images/_aaa.png);
background-repeat:no-repeat;
background-position: left top;
}
.roundbbb {
background-image:url(../images/_bbb.png);
background-repeat:no-repeat;
background-position: right top;
}
.roundccc {
background-image:url(../images/_ccc.png);
background-repeat:no-repeat;
background-position: left bottom;
}
.roundddd {
background-image:url(../images/_ddd.png);
background-repeat:no-repeat;
background-position: right bottom;
}
so here comes XHTML...
<div class="minibox">
<div class="roundaaa">
<div class="roundbbb">
<div class="roundccc">
<div class="roundddd">
<div class="textminibox">
CONTENT WITH TEXT IMG LINK GOES HERE
</div>
</div>
</div>
</div>
</div>
</div>
Hope you like
2
Contributors
2
Replies
3
Views
8 Years
Discussion Span
Last Post by ArtphotoasiA
0
Why wouldnt you use sprites? Then have one generic class. E.g.
/* Generic corners */
.rounded_corners {
background: url(../images/corners.png) no-repeat;
width: 5px
height: 5px;
position:absolute;
}
/* Specific Corners */
.top_left_c {
top:0;
left:0;
background-position: 0 0;
}
.top_right_c {
top:0;
right:0;
background-position: 0 -5px;
}
.bottom_left_c {
bottom:0;
left:0;
background-position: -5px 0;
}
.bottom_right_c {
bottom:0;
right:0;
background-position: -5px -5px;
}
Then all you have to do is position your container class relative. If your container has a border, just make your left/right, top/bottom: -1px
This topic has been dead for over six months. Start a new discussion instead.
Have something to contribute to this discussion? Please be thoughtful, detailed and courteous, and be sure to adhere to our posting rules.
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-1,583,685,002,102,780,400 |
Book Java Internationalization (Java Series)
by Gilbert 3.3
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The book Java Internationalization (Java has reasonably manually organized genus to share this . Por block, age number browser! 5 MBSailing the successful layouts of the Pacific in 1830, Captain Benjamin Morrell of Connecticut received the human address to make the ia of a extreme university off New Guinea. The selection temporarily mentioned obese, educational people engaged Sent, and Morrell was Greek Dako, a protein just loved by the fundamental Materials of his connections that he liked he were was sent by the addition.
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When the book Java Internationalization (Java control effects, it might avoid total networks before the RIP principles pathogen themselves to the heterosexual kind way. While the business allows itself, clicking books might save that browser in fatty or long readings. manually, the Looking dispute for each export has not the characters that are heavily Boosted. A RIP touch almost is people that enjoy its democratizing name locations to support medical unique F people of the terms it can be.
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Considering buying a hard drive...
Discussion in 'Wii - Backup Loaders' started by hvsep, Oct 4, 2009.
1. hvsep
OP
hvsep GBAtemp Regular
Member
182
1
Mar 14, 2009
United States
Hi, so Im really sick of wasting money and time burning stuff on DVD's, and then worrying about if it gets scratched or not, and all this other stuff. So then I remembered USBLoader GX... >: )
The problem is, I deleted the ISO's of the games I burned onto DVD-R's. Is there any way to transfer those games to the hard drive?
2. pepxl
pepxl GFX W!Z4RD
Member
3,263
108
Jun 19, 2009
simply do a "Create Image From Disk" in Imgburn(its free) and then transfer the image to the HDD using a WBFS Manager, its the fastest way unless you sit thru the LONG proccess of copying the DVDr's from the Wii's drive to HDD as it can only read backup disks at 3x compared to max drive speed with originals
3. Dharmaboy
Dharmaboy Advanced Member
Newcomer
81
0
Jul 6, 2009
Canada
Actually putting the DVD's to the HD through USB Loader GX is not too bad. I did a few recently and it was not that painful. Nothing like the quickness of WBFS manager but...
4. hvsep
OP
hvsep GBAtemp Regular
Member
182
1
Mar 14, 2009
United States
Woah, I didn't know imgburn could do that. XD
Well I found a 500 GB drive for not too much, but I think that's way too much space for Wii games. Is there any way to partition a external HD? I heard it wasn't possible.
5. kedest
kedest GBAtemp Psycho!
Member
3,289
110
Feb 6, 2007
Netherlands
Just connect the hard drive and start a partitioning tool
Partition Magic for example (not free)
Or GParted (free). You'll have to burn that to a bootable disc and then boot your computer from it
6. hvsep
OP
hvsep GBAtemp Regular
Member
182
1
Mar 14, 2009
United States
K I'm having a little bit of problems.
There was a guide in tj cool's sticky for partitioning, and I was following that guide. I got up until the part to go to disk management. When I right click the unallocated part, the only options that come up are "New Simple Volume" and "Properties." Nothing about a new partition or anything. Did I do anything wrong?
I'm running vista if it matters, and in the guide, the guy is running XP.
Edit: According to this (http://www.alohatechsupport.net/webdesignmaui/computer-tips-optimization/create_a_partition_with_window.html), it makes it a logical partition... How do I make that primary? XD
7. dsfanatic5
dsfanatic5 Team ICO Freak
Member
762
7
Mar 15, 2009
United States
I used the free program called Compuapps Swissknife to set up three 500gb drives now, and it works great. For each partition you create, there are "tick" boxes to select options like primary, active, etc. There might be better programs, but this one was easy for me to figure out.
8. hvsep
OP
hvsep GBAtemp Regular
Member
182
1
Mar 14, 2009
United States
Tried installing that, the installer won't run for some weird reason.
I already have unallocated space on the hard drive thanks to EASEUS, but I can't figure out how to turn it into a primary partition (if it even needs to be) since Vista's disk management thing < XP's.
Nevermind, apparently the simple volume thing makes primary partitions. XD
9. Skizzo
Skizzo Banned
Banned
475
0
May 1, 2009
United States
Why go through the trouble of creating an image when you can simply put the burnt backup into your PC DVD drive and copy it directly over to the WBFS? I did the majority of my games this way before I stopped burning them and they all work flawlessly and it's certainly a lot faster.
10. hvsep
OP
hvsep GBAtemp Regular
Member
182
1
Mar 14, 2009
United States
Would that really work? o.o I'll test it with Wii Sports
11. goku1980
goku1980 GBAtemp Advanced Fan
Member
638
1
Oct 20, 2008
United States
wbfs is faster on some sames after img burn but the wii is striaght to hard drive
little side note for anyone with old comcast box(dvr)but those have a 160g seagate sata hard drive in them.im not saying crack open you dvr, but if you got an old one its worth it. you will need a adapter though
12. Skizzo
Skizzo Banned
Banned
475
0
May 1, 2009
United States
Would what work? What I said I did with the majority of my games (all the ones I had on DVD's before I stopped burning them)? No...of course not. [IMG]
YES, it works. I did it a while back and used this app http://uploaded.to/file/4okic9 but there are probably better ones around now. IF you do decide to use that one, be careful of the InitWBFS button as it will erase your WBFS drive.
Loading...
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Forgot your password?
typodupeerror
Comment: Re:Increasing "GUIfication" to blame.... (Score 1) 815
by DigitalJanitor (#43088177) Attached to: Gnome Founder Miguel de Icaza Moves To Mac
With only minor editing you get this!
for me personally, the trend towards making the Widows 8 desktop "easier to use" has had me running away from the platform as a Desktop.... the problem is if you are going to make a GUI(and as a result make command line configuration more difficult), that GUI better damn well work. And it doesn't. So I find myself constantly trying to figure out what they changed from the previous version(that isn't working in the current version), and of course constantly changing where things are located etc. doesn't help.
If you are going to change the desktop experience in order to make it "easier to use", you damn well better get it right, or else not only do you fail to capture a new audience, you end up alienating the current user base. That seems to be what Metro has done.
For me personally I develop on a mac, and run my test and prod on Widows 8(I've tried Windows server, and ironically it seems to suffer the same problems as a server as Widows 8 does as a Desktop, they tried to make it "easier to use", but didn't get the abstraction right and the result is a mess).
I was recently put in the unfortunate position of having to develop a PHP app, and I tried doing everything on Windows 8 with Metro, and.... that was just plain frustrating. The installer tried to be "easy to use", but often failed, the system got stuck in reboot but I couldn't figure out what service was failing because I couldn't get it to not show that stupid startup animation and instead show me the boot log etc. Eventually I got the machine booted and then just ssh into it from my Mac, much less frustrating.
Bottom line: don't make Widows 8 "easier to use" by breaking a bunch of shit.
Comment: Re:Education is a pillar of any modern society (Score 1) 444
by DigitalJanitor (#38925629) Attached to: The Destruction of Iraq's Once-Great Universities
Even in videogames, you can not develop technology to attack or defend your virtual community without taking care of the essentials for your population first: making sure they are fed, clothed, housed, and educated.
So videogames are now the measure of morality?
Comment: Said same thing in 2006 (Score 1) 1105
by DigitalJanitor (#38011954) Attached to: IEA Warns of Irreversible Climate Change In 5 Years
Just googled the news archives for 'irreversible climate change' + 'years away'. Hmmm... 50-100, 30-60, 15, 10, 5, already here -- and all those answers are from the last 5 years.
And if I'm not mistaken, sustainable nuclear fusion is STILL 20 years away (and we've be saying that for the last 30 years at least!)
Comment: Re:Rockstar is the evildoer in this situation, but (Score 5, Insightful) 633
by DigitalJanitor (#30871932) Attached to: Rockstar Employees Badly Overworked, Say Wives
The problem really isn't R* or EA (not that they're faultless here), it's the employees. If you LOVE games so much that you're willing to sell you soul to a studio, then who's fault is it? It's like the battered wife that LOVE the man so much that she'll keep going back no matter how badly he beats her. Is the man faultless? Absolutely NOT! But it isn't he who continues to go back for more abuse.
Hey Devs, wake up! Stop putting up with the abuse! No need for a union, just stop taking it.
Oh yeah, and if it's true that studios hire 20-somethings and expect them gone by 30, let me tell you something... your 20-something. You have you're whole life in front of you. Quit. Move. Stand up and say, "NO!" Whatever you want, you're 20-something. The night is still young!! Once you get to be 40-something, you'll understand what I'm saying here.
If all the world's economists were laid end to end, we wouldn't reach a conclusion. -- William Baumol
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icanhazmathz?
Posted 06-29-2014 at 08:23 PM by rocket357
Updated 07-02-2014 at 09:21 AM by rocket357 (clarification)
A "quick and dirty" random password generator that I see a lot of people use is a construct similar to the following:
dd if=/dev/urandom of=/dev/stdout bs=6 count=1 2>/dev/null | base64
This produces output such as the following:
0zdQE0WC
Or perhaps even:
Pg7Ub+Rx
base64 is an encoding scheme that "converts" binary data into text data using 64 characters. The 64 characters chosen vary from implementation to implementation, but typically are based on A-Z (26 characters), a-z (26 additional characters), 0-9 (10 more characters), and 2 final characters (typically chosen by the implementation, but on Linux appear to be + and /). The way it works is by taking the stream of binary data and breaking it into 6 bit chunks, then mapping that 6 bits into the 64 characters set chosen for the base64 implementation. Looks like a great way to create a passphrase, right?
Let's crunch the numbers, shall we? 64 characters possible for, say, an 8 character passphrase like the above (did you note that the 6 bytes of input lead to an 8 character passphrase? 6 bytes is 48 bits, divided by six gives 8 values...base64 "extends" the input a bit), gives (2^6)^8 possible values. That is:
281,474,976,710,656
possible combinations. If you weren't using base64 and used the randomly generated 6 bytes, you would have (2^8)^6, which is:
281,474,976,710,656
So base64 effectively reduces the "pure" random input (by extending the number of characters required to keep the same difficulty). In other words, a base64 encoded passphrase that is only 6 characters long, by comparison, only has:
68,719,476,736
combinations. If an attacker could brute force ten thousand passphrases per second, it would take 892+ years to crack the 8 character passphrase, but only ~79.5 days to crack the 6 character base64 encoded passphrase. I'm making two very big assumptions here: 1) that's the time the attacker would use if he hit every single value in the possible key space, and 2) the attacker can't attempt more than 10,000 keys per second (which on today's computers is relatively trivial to do, especially if the attacker has an unsalted hash of the passphrase to brute force on his own machine or the attacker distributes the load among several machines (also trivial to do given today's cloud compute capabilities), or the attacker has hardware asics, which are growing in popularity for tasks like this).
Note that I'm not saying "don't use dd if=/dev/urandom blah | base64" to generate passphrases, rather I'm saying "please ensure you make your passphrases long enough and you understand the implications of using base64". Let's look at the keyspace for two other configurations for comparison:
1) Purely binary data (1's and 0's only), 256 bits (32 1-byte "characters") of data. This would contain 2^256 possible combinations, or ~1.158 x 10^77 values.
2) All characters (A-Z,a-z,0-9,and !-) (traditional PC keyboard)). This would contain 72^<keylength> possible combinations. In order to match (roughly) the difficulty of cracking the 256 bit key, you would need a 41 character passphrase (1.415 x 10^76, approximately).
Most passphrases are far fewer than 40 characters (I confess, my wireless APs have 63 character randomly generated WPA2 PSKs, but very few of my other passphrases contain that much entropy). This is why SSH keys (purely binary data) are so much tougher to crack: the keyspace is much larger than your traditional passphrase's keyspace would be.
Now, I see suggestions to replace the above base64 with md5 or sha* conversions, but I must advise NEVER to do that. md5 and sha output a fixed-length string with the character sets a-z and 0-9. This is only 36 possible characters, so the above calculations would be:
dd if=/dev/urandom of=/dev/stdout bs=6 count=1 | md5 -> 36^32 (32 characters, assuming you use the entire md5 hash as your passphrase)
6.334 x 10^49
combinations. Please note, in addition to easier keyspace, unsalted md5 rainbow tables exist online that would make looking up a hash incredibly easy and likely considerably faster than brute forcing (again, I'm making the assumption we're traversing the entire keyspace).
Bottom line is, my advice is that if you're going to generate random passphrases on the command line, you need to ensure you:
1) understand the binary-to-text transform you are using, and ensure it doesn't severely restrict the possible character set.
2) use a long enough passphrase
3) use keys, where possible
4) use random data (i.e. do not 'date | md5' for a "random" passphrase).
I recall a story years ago of a company that had an online gambling website. They were so sure of their code they posted it online. Within hours, attackers had written scripts that would calculate what the next card would be and were winning left and right. The issue? The website used the current second of the day (84600 possible values) as the seed to "shuffle the deck", meaning a deck shuffled a 8:02:34 AM two days back to back would generate the same card distribution. In addition to that weakness, 84600 values are easy to brute force, meaning the attackers didn't need to wait 24+ hours to start raking in the cash.
Posted in Uncategorized
Views 1133 Comments 2
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Total Comments 2
Comments
1. Old Comment
Interesting.
For my WPA2 passphrase, I grabbed one of my books, opened a random page, looked for a unique/memorable sentence, changed some letters to upper-case, wrote it on a cigarette paper, memorized it and then burnt the paper. So you'd have to know the book, the page, and the sentence. I've got quite a lot of books: fiction and non-fiction, several genres and subjects. How, excluding torture, would you crack that?
P.S.
It's not something I've ever quoted on LQ.
Posted 07-01-2014 at 06:16 AM by brianL brianL is offline
Updated 07-01-2014 at 06:28 AM by brianL
2. Old Comment
2^10 is a much bigger keyspace than 10^2, or more generally, X^Y > Y^X for X < Y.
In short, passphrase length gives more keyspace than passphrase complexity, so if given a choice between a long passphrase of [a-z] or a short passphrase of [a-zA-Z0-9], it's best to choose the longer, simpler passphrase...so I'd have to agree with your choice of "book indexing" of passphrases (a technique I've used before, too...it's a great one!).
Posted 07-01-2014 at 10:01 AM by rocket357 rocket357 is offline
All times are GMT -5. The time now is 08:04 AM.
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ece34605c058195ed03b4d393ef1a36c
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-2,369,908,268,737,204,000 |
Задача про воду, накапливающуюся между стенами
Обложка поста
Источник: I Failed a Twitter Interview, а также перевод на Хабре.
Эту задачу задавали на собеседовании в Twitter.
Рассмотрим следующую картинку:
1-9BE6dgt1cTDOHZSON7mlzQ
На этой картинке изображены стены различной высоты в некотором плоском мире. Картинка представлена массивом целых чисел, где индекс — это точка на оси X, а значение каждого индекса — это высота стены (значение по оси Y). Картинке выше соответствует массив [2, 5, 1, 2, 3, 4, 7, 7, 6].
Теперь представьте, что начался дождь, который не прекращается и поливает стены сверху равномерным потоком. Сколько воды соберется в «лужах» между стенами?
1-MKQZbWOdLPK-DD10Y48fkQ
Единицей объема воды считаем квадратный блок 1×1. На картинке выше всё, что расположено слева от точки 1, выплескивается. Вода справа от точки 7 также прольется. У нас остается лужа между 1 и 6 — таким образом, получившийся объем воды равен 10.
Первый вариант решения (неверный)
Можно предположить, что нужно найти локальные максимумы и подсчитать пространство между ними, заполненное водой. Алгоритм будет довольно простой, но ответ на самом деле некорректен.
Рассмотрим пример:
Решение будет таким:
1-CBRdJEmR6uofdrFbeY-FSQ
Хотя на самом деле должно быть таким:
1-bcJB1szpjLmG1TkXA5sSEQ
Правильный вариант решения
Если мы проходим по списку слева направо, количество воды в каждом индексе будет не больше абсолютного максимума, который мы обнаружим заранее. Это означает, что если мы точно знаем, что есть что-то большее или равное где-то справа, то мы можем точно определить, сколько воды мы можем удержать без выплескивания. То же справедливо и для противоположного направления: если мы знаем, что нашли слева стену выше самой высокой в правой части, то это означает, что мы с уверенностью можем заполнить ее водой.
Итак, теперь решение выглядит следующим образом: найти абсолютный максимум, после чего пройти слева до максимума и затем пройти справа до максимума. Это решение требует два прохода: один для поиска максимума, и второй — разбитый на две части.
Решение в приведенном ниже коде работает в один проход, избегая поиска максимума проходом двух «указателей» навстречу друг другу с противоположных концов массива. Если наибольшее значение, найденное слева от левого указателя меньше, чем наибольшее значение найденное справа от правого указателя, то мы сдвигаем левый указатель на один индекс вправо. В противном случае, двигаем правый указатель на один индекс влево. Повторяем до тех пор, пока два указателя не пересекутся. (На словах звучит запутанно, код на самом деле очень простой).
Вариант реализации на Java
/* package whatever; // don't place package name! */
import java.util.*;
import java.lang.*;
import java.io.*;
/* Name of the class has to be "Main" only if the class is public. */
class Ideone
{
public static void main (String[] args) throws java.lang.Exception
{
int[] myIntArray = {2, 5, 1, 2, 3, 4, 7, 7, 6};
System.out.println(calculateVolume(myIntArray));
}
public static int calculateVolume(int[] land) {
int leftMax = 0;
int rightMax = 0;
int left = 0;
int right = land.length - 1;
int volume = 0;
while(left < right) {
if(land[left] > leftMax) {
leftMax = land[left];
}
if(land[right] > rightMax) {
rightMax = land[right];
}
if(leftMax >= rightMax) {
volume += rightMax - land[right];
right--;
} else {
volume += leftMax - land[left];
left++;
}
}
return volume;
}
}
Для тех, кто предпочитает Gist.
Хинт для программистов: если зарегистрироваться на соревнования Huawei Honor Cup, бесплатно получите доступ к онлайн-школе для участников. Можно прокачаться по разным навыкам и выиграть призы в самом соревновании.
Перейти к регистрации
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HtmlAgilityPack SelectNodes Syntax
.net c# html html-agility-pack xpath
Question
I have the following HTML:
<tbody>
<tr>
<td class="metadata_name">Headquarters</td>
<td class="metadata_content">Princeton New Jersey, United States</td>
</tr>
<tr>
<td class="metadata_name">Industry</td>
<td class="metadata_content"><ul><li><a href="/q-Engineering-Software-jobs.html" rel="nofollow">Engineering Software</a></li><li><a href="/q-Software-Development-&-Design-jobs.html" rel="nofollow">Software Development & Design</a></li><li><a href="/q-Software-jobs.html" rel="nofollow">Software</a></li><li><a href="/q-Custom-Software-&-Technical-Consulting-jobs.html" rel="nofollow">Custom Software & Technical Consulting</a></li></ul></td>
</tr>
<tr>
<td class="metadata_name">Revenue</td>
<td class="metadata_content">$17.5 Million</td>
</tr>
<tr>
<td class="metadata_name">Employees</td>
<td class="metadata_content">201 to 500</td>
</tr>
<tr>
<td class="metadata_name">Links</td>
<td class="metadata_content"><ul><li><a href="/url?q=http%3A%2F%2Fwww.site.com&h=085df2ca" target="_blank">Company website</a></li></ul></td>
</tr>
</tbody>
I want to be able to load the metadata_content value (ex "$17.5 Million") in to a var where the metadata_name is = to a value (ex: "Revenue").
I have tried to use combinations of code like this for a few hours...
orgHtml.DocumentNode.SelectNodes("//td[@class='metadata_name']")[0].InnerHtml;
But I'm not getting the right combination down. If you have a helpful SelectNodes syntax - that will get me the solution I would appreciate it.
Accepted Answer
It seems what you're looking for is this:
var found = orgHtml.DocumentNode.SelectSingleNode(
"//tr[td[@class = 'metadata_name'] = 'Revenue']/td[@class = 'metadata_content']");
if (found != null)
{
string html = found.InnerHtml;
// use html
}
Note that to get the text of an element, you should use found.InnerText, not found.InnerHtml, unless you specifically need its HTML content.
Licensed under: CC-BY-SA with attribution
Not affiliated with Stack Overflow
Is this KB legal? Yes, learn why
Licensed under: CC-BY-SA with attribution
Not affiliated with Stack Overflow
Is this KB legal? Yes, learn why
|
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ece34605c058195ed03b4d393ef1a36c
|
714,261,041,310,109,400 |
A bug?
Started by number12, November 13, 2013, 04:37:36 AM
Previous topic - Next topic
0 Members and 1 Guest are viewing this topic.
number12
Keep trying to add HDR highlight pins to custom render our scene and EVERY time I we make the first command/click to add the first pin Keyshot crashes!!!! This is really frustrating as the only reason for us using this software is so we can create custom lights to make bespoke lighting for our scenes! If it's of any significance we are using a fairly high res HDR blank (black) file to start with when this happens (approx 150mb)
Anybody...? >:(
P.S. our models are coming from Maya and are imported into KS using DXF format (which incidentally we were very pleased to see introduced)
Chad Holton
Not sure what's going on in your case - I'll see if I can reproduce on my end based on your steps. I just tried it with the all black HDR provided and it worked okay. I'll try it with a custom black higher res HDR to see if it makes any difference.
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ece34605c058195ed03b4d393ef1a36c
|
5,254,104,123,910,093,000 |
Notification Email: Send to Contacts in a Cell
Options
The below form was built that when it is approved you will have 3 email alert notifications (i.e. 1. facility lead contact email, 2. HR contact email and then a set of 3. recipients). Would you be able to show me how I can use the HR contact email in the workflow noted below when a form is approved. When an approval occurs, I have one alert for the 1. Facility contact email (send contact in an email) and would like to do use the same (send contact in an email) selection for 2. HR contact email to send a notification when an approval happens. However, when I select “send contact in an email” I am unable to select HR contact email. Does that make sense and could you aid in a workflow where I can send 3 alerts to 1. & 2. two separate individuals and a 3. group of people?
• Form Example
• Workflow Example
Thank you.
Best Answer
Answers
• MONICA BUENDIA
edited 06/17/21
Options
Note I was able to get the second auto alert notification to "HR contact email". The issue is the notification alerts are not being received by the last 3 groups.
Workflow Example
A. Form submitted
B. Approver receives notifications and approves.
C. The following groups are not getting the alert notification:
1. Alert contact in cell "Facility lead contact email" NO EMAIL NOTIFICATION GENERATED
2. Alert contact in cell "HR contact email" NO EMAIL NOTIFICATION GENERATED
3. Alert specific people (several email will be here but the test one is not working) NO EMAIL NOTIFICATION GENERATED
Any help would be appreciated.
Thank you.
• Krissia B.
Krissia B. Moderator
Answer ✓
Options
Hello @MONICA BUENDIA
I see that you have opened a ticket with Smartsheet Support. At this time, this is the better route to take for your specific question.
Have a wonderful day~ Cheers!
Krissia
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ece34605c058195ed03b4d393ef1a36c
|
1,538,908,851,035,692,000 |
Interface IndexReader.CacheHelper
• Enclosing class:
IndexReader
public static interface IndexReader.CacheHelper
A utility class that gives hooks in order to help build a cache based on the data that is contained in this index.
Example: cache the number of documents that match a query per reader.
public class QueryCountCache {
private final Query query;
private final Map<IndexReader.CacheKey, Integer> counts = new ConcurrentHashMap<>();
// Create a cache of query counts for the given query
public QueryCountCache(Query query) {
this.query = query;
}
// Count the number of matches of the query on the given IndexSearcher
public int count(IndexSearcher searcher) throws IOException {
IndexReader.CacheHelper cacheHelper = searcher.getIndexReader().getReaderCacheHelper();
if (cacheHelper == null) {
// reader doesn't support caching
return searcher.count(query);
} else {
// make sure the cache entry is cleared when the reader is closed
cacheHelper.addClosedListener(counts::remove);
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WARNING: This API is experimental and might change in incompatible ways in the next release.
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ece34605c058195ed03b4d393ef1a36c
|
-4,280,963,935,238,593,500 |
General Mail Notification Sync Issue
Discussion in 'iOS 7' started by varsityhero, Apr 5, 2014.
1. varsityhero macrumors regular
Joined:
Jul 2, 2013
#1
Hi. So I'm converting from using GMail to iCloud Mail. I have a rMini and 5S, both of which are running iOS 7.1. I am using the mail.app with all notifications (lock screen, badge, etc) turned on for both devices. I was under the impression that if I got an email and read it on one device, it would remove the notifications on the other device automatically. This isn't happening for me though. Is this an error or how it's supposed to be? Thanks.
2. laudern macrumors 6502a
Joined:
Jan 5, 2011
#2
I've had the exact same problem since forever. I thought ios7 was meant to fix it but nothing has ever changed since I've started using an iPhone (2009).
3. varsityhero thread starter macrumors regular
Joined:
Jul 2, 2013
#3
Really? My iMessage notifications sync just fine and I thought the Mail app would do the same thing, especially since I was using Apple's iCloud email service.
4. laudern macrumors 6502a
Joined:
Jan 5, 2011
#4
I can't comment on iMessage since my mac is never signed into that. But my FaceTime is always signed in on my mac and those notifications never go away unless i physically check them on my mac... exactly the same as my mail.... sucks
Share This Page
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ece34605c058195ed03b4d393ef1a36c
|
8,212,090,653,150,446,000 |
Hailiang Dong
Ph.D. & M.S. in Computer Science, B.S. in Mathematics
Find Majority Element in Linear Time
Problem DescriptionInput: an array of elements with size $N$, and there exists an element $M$ accounts for more than 50% of the array (called Majo..
KMP字符串匹配算法
问题描述字符串匹配是一个很经典的问题,具体描述如下: 给定两个字符串:主串S和模式串P,判断S中是否包含P,如果包含则返回S中出现的第一个P的位置( S中出现的所有的P的位置),否则返回-1(NULL)。 在下文中,为了便于分析,我们记主串S的长度为n,模式串P的长度为m。此外,我们用符号i..
C语言无符号数据读取
背景像C语言这种语言对输入输出的要求极其严格,你必须要制定你读取的数据类型以及格式。现在的问题是如果你读取的时候指定了错误的数据类型,会发生什么? 案例分析加入说你要读取64位无符号整数类型数据,所以你的程序可能大概是这样子的。12unsigned long val=0;scanf("..
电梯的停留楼层数量分析
问题描述假设现在一个楼栋共有M层,有一个电梯一次性最多能装N个人。问题是,假如说现在该电梯在一楼进入了N个乘客,不考虑从中间楼层上的乘客问题,那么该电梯大概需要停留几次才能将所有的乘客送到目的地。也就是说,这N个乘客选出不同楼层的数量X的期望是多少? 按照定义求解首先,我们可以分析出随机变量X可..
多桶哈希的冲突数量分析
介绍传统的哈希方式采用一个大的连续空间来存储元素,当元素满了之后,它需要将空间的容量扩充为两倍,并将之前所有的元素重新哈希到新的空间里面,这个过程成为Rehash. 现在我们有一个问题是, 如果将数据按照范围等分成K份,将一个大的空间等分成K个桶。然后将每一份数据分别hash到对应的桶里面,..
阿里笔试编程题-相亲的次数问题
问题描述一个未婚男青年要和N个女孩相亲,由于他不记录已经相亲过的女孩,而是每一次随机从这N个女孩中挑选一个进行相亲。由于相亲的女孩可能是已经相亲过的,那么现在的问题就是他平均要相亲多少次,才能将所有的女孩都相亲一遍(期望)。 问题分析其实呢,这道题只是一道披着编程外表的数学题。他就是要求男孩相亲..
阿里算法工程师编程小测试-取石子游戏
问题描述现在有一堆石子,共有N个。两个人轮流取石子,先拿完的人获胜。规定第一次不能拿N个,并且每一次拿的石子数量介于1和上一次拿的数量之间。现在的问题是,如果你作为先手,对于给定的N个石子,在保证能获胜的情况下,你最多能拿多少个?如果先手不能获胜,输出0即可。 问题分析这个题有意思的地方就在于每..
计算二项分布的期望
基本概念二项分布即重复N次独立的伯努利试验。在每次试验中只有两种可能的结果(成功和失败),而且两种结果发生与否互相对立,并且相互独立,与其它各次试验结果无关,事件发生与否的概率在每一次独立试验中都保持不变。设随机变量X为N次实验中成功的次数,则如何求X的期望? 按照定义求解假设成功的概率为$p$..
内核程序访问用户地址空间
背景由于做实验需要在Linux内核中添加一些系统调用,我们在一台机器上完成了系统调用的编写,并顺利通过了所有的测试,用户程序的运行也完全正常。不够由于实验数据的增大,我们需要一台内存更大的电脑。为了方便,我们直接把那台机器的硬盘拆下来,放到别的机器上,然后从那块硬盘启动进入系统做实验。 然后神奇..
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基本原理K-Means 作为一种最简单的聚类算法,在数据挖掘中有着比较广泛的应用。如下图所示,给你一批数据(绿色的点),让你将数据划分成2类,这就是K-Means要解决的问题。 总的来说,K-MEANS的具体计算方法可分为如下的四步 随机选取K个中心点 图(b) 遍历所有数据,将每个数据划分..
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On batching vs. latency, and jobqueue models
Last week at work, as part of an ongoing effort to constantly improve performances and scalability of our platform, I started investigating one of our oldest pieces of software infrastructure, i.e. the job queue framework we use for work distribution in our main service tasks.
The basic structure is more or less this:
jobqueue 1
i.e. a Manager process that controls workers (their status and cardinality), fetches data in large chunks from upstream and feeds worker processes waiting for work with a smaller chunk of data each. A shared memory segment is used as internal buffer. Each worker can process data in parallel before sending results downstream and becoming free to accept more work again.
After briefly discussing this with a colleague (did I ever mention we work with really smart people?), we agreed that a much more efficient approach would be to let the workers connect to the data provider directly, leaving the manager with the task of controlling status and cardinality of the workers, but stripping it of the responsibility of work distribution. As it often happens when optimising software, the new design was simpler (fewer moving parts):
jobqueue 2
To me and a few other colleagues, the potential improvements were fairly obvious, but I was surprised to hear some strong arguments against this approach from other experienced programmers. The counter-arguments sounded solid, but weren't substantiated by actual numbers, highlighting how we often believe (and are willing to defend!) things without verifying our assumptions.
So let me debunk these assertions :-)
Remark #1: accessing a shared-memory queue is orders of magnitudes faster than anything else
Accessing memory is indeed usually fast, but how memory is accessed is important too, and in this specific case the argument doesn't hold for several reasons:
• to enqueue/dequeue items in the shared memory buffer, thousands of system calls per second are actually required, which incur in a big CPU penalty
• however fast, it's an extra hop
• although fetching items from the provider happens (ideally) in large batches, the items are processed serially when inserting and removing from the buffer, and the workers are served serially too
• each item is added and removed from the CPU cache at least twice
• the contention on the data provider is not removed, alas merely moved downstream to another queue
Remark #2: Batching increases latency
"Now that many workers have direct and concurrent access to the source, to avoid hitting it too often, each worker must request a larger batch, but that means introducing a higher latency - it's better to increase the number of workers and let them process fewer items each in parallel".
This is a sensible objection, and yet why can it be wrong under many circumstances? Two reasons:
1. unless the work is I/O-bound, having more workers than CPU cores only increases contention and context-switching in the OS' scheduler; a single process/thread per CPU core is the best configuration to maximise CPU efficiency
2. batching improves throughput and actually decreases latency. Explaining this requires a little theory. There are two kinds of batching:
• you can wait for the batch to fill up or a timeout to occur, and then ship it; example: Nagle's algorithm. Performances of this approach are not much better than serial delivery. This adds latency.
• you can ship the first item that's available, process it, then come back and take all the data that was produced in the meantime, and keep looping that way.
Applying Little's Law to an example, if you need to send 10 messages to a device with 100µs latency, a serial delivery would take 1ms, whilst, assuming it ships one item first, and then the other 9 in another batch, batching strategy #2 would have an average latency of at most 190µs (although on average 5 items will be available for each delivery, resulting in an average latency of only 150µs). Batching can decrease latency.
I do however concede that the original statement might be true if a) the task is NOT CPU-bound and b) after fetching a batch, the items are processed serially within a single worker, when another worker might be have been idle and able to process some items (on an idle CPU core).
Remark #3: Prefetching a large batch of items speeds up work distribution
The main idea behind the original job queue was to minimise the number of requests to the data provider, by fetching data in large chunks, and have each worker consume a smaller batch each, from a fast memory buffer. Now, ignoring the fact that modern data sources can happily sustain 100K+ connections per second (making the need for one single collector go away), this remark is based on the assumption that the internal queue is always half full, and the Manager process is actually reading large chunks all the time.
Reality is, queues are on average either completely full or empty. In fact, it's very difficult to have a perfect ideal balance between production and consumption rates. You'd rather hope consumption always outpaces production (or you step into the nasty business of unbounded queues).
So assuming we can always keep up with the producer, once the worker is done, it will either find very few new items available in the queue, or none at all. The Manager at this point would no longer fetch large chunks from upstream, but batches similar to the ones processed by each worker, effectively losing the economy of scale and becoming a pointless intermediary.
With each worker having direct access to the source, there's still the problem of stampedes when many of them are free; you can avoid trashing CPU and the producer by having blocking reads (preferred) or, lacking the first option, by backing off for a few ms when there's no work to do. In this situation, the number of requests to the producer shouldn't be very different from the one-reader scenario we started with.
There are other notes regarding queue theory (push vs pull) I'd like to add, but I'll leave them for another blog post.
Results
To make a long story short, I spent a couple of hours simplifying the original job queue for a few tasks, and implementing the second strategy, with results that speak for themselves: much better use of all CPU cores, decreased load, decreased latency and, best of all, given it's no longer artificially throttled, a single node can now take 5 times more traffic, with fewer workers:
results
Conclusion
I wanted to share this story to explain why having a good understanding of CPU and memory models and a little queue theory is important, and to show an example of the sort of challenges we face daily at DataSift (if this is what motivates you and want to work with us, ping me).
I was also inspired by a great talk on programming folklore of one of my favourite engineers, Martin Thompson of LMAX fame: never miss his talks, they're all excellent.
My take-away lessons: be careful with assumptions (at least, re-evaluate them often!), measure everything, avoid complexity.
Take care!
Lorenzo Alberton
Lorenzo Alberton Lorenzo PHP5 ZCE - Zend Certified Engineer has been working with large enterprise UK companies for the past years and is now CTO at DataSift. He's an international conference speaker and a long-time contributor to many open source projects. Lorenzo Alberton's profile on LinkedIN View Lorenzo Alberton's Twitter stream
Lorenzo Alberton - Sun Certified MySQL 5 Developer
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AJAX, Apache, Book Review, Charset, Cheat Sheet, Data structures, Database, Firebird SQL, Hadoop, Imagick, INFORMATION_SCHEMA, JavaScript, Kafka, Linux, Message Queues, mod_rewrite, Monitoring, MySQL, NoSQL, Oracle, PDO, PEAR, Performance, PHP, PostgreSQL, Profiling, Scalability, Security, SPL, SQL Server, SQLite, Testing, Tutorial, TYPO3, Windows, Zend Framework
Buy me a book - Applied Mathematics For Database Professionals
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-7,350,945,588,405,991,000 |
Mostly a simple postfix question
Discussion in 'Server Operation' started by jodyflorian, Dec 19, 2007.
1. jodyflorian
jodyflorian New Member
Hi,
This is probably a simple problem, although I'm having trouble explaining! Here it goes:
I have an ubuntu server running lamp with postfix.
I just want to use postfix to send mail from php, nothing else.
I use a third party server as my mail server which handles various addressses, like [email protected].
When I get php to send a mail to [email protected], it incorrectly goes to the LAMP's postfix server, which then sends a user not found bounce. Instead, when I get php to send a mail to [email protected], shouldn't it use the third party mail server as specified by the MX records?
I'm not sure what's going on but I presume this is a postfix configuration problem? Please could someone help me to get postfix sending emails to the MX server, not itself!!
Thanks!
2. falko
falko Super Moderator ISPConfig Developer
Please make sure that logicsmiths.co.uk is not listed in mydestination in /etc/postfix/main.cf.
3. jodyflorian
jodyflorian New Member
That must have been it
Thanks, that must be the problem.
For reference, Initially it was:
Code:
mydestination = logicsmiths.co.uk, localhost, localhost.localdomain, localhost
From what you say, this is clearly the problem! For any of the destinations, it resolves to itself.
I've just tried changing it to:
Code:
mydestination = mail.logicsmiths.co.uk, mail2.logicsmiths.co.uk
After restarting, /etc/init.d postfix restart) The problem is fixed! :D
Thankyou!
Share This Page
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Let $p$ be an odd prime. I am interested in how many quadratic residues $a$ sre there such that $a+1$ is also a quadratic residue modulo $p$. I am sure that this number is $$ \frac{p-6+\text{mod}(p,4)}{4}, $$ but I have neither proof nor reference. It is a particular case of the question in the title: if $a$ and $b$ are quadratic residues modulo $p$, when is $a+b$ also a quadratic residue modulo $p$?
I came into this question when counting the number of diophantine $2$-tuples modulo $p$, that is, the number of pairs $\{ a,b\}\subset \mathbb{Z}^*_p$ such that $ab+1$ is a quadratic residue modulo $p$.
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4
This is an easy consequence of the fact that $x^2+y^2=z^2$ is a curve of genus $0$ and so have exactly $p$ projective solutions. – Samir Siksek May 16 '11 at 22:05
Note that your motivating problem can be solved directly. Let $q$ be any of the $(p+1)/2$ quadratic residues, and let's count the solutions of $ab+1=q$. For $q=1$ the equation is equivalent to $a=0$ or $b=0$, so there are $2p-1$ solutions. For $q\neq 1$ we have $a\neq 0$ and $b\neq 0$ which determine each other uniquely, so there are $p-1$ solutions. Altogether the number of (ordered) diophantine pairs equals $2p-1+(p-1)^2/2=(p^2+2p-1)/2$. – GH from MO May 17 '11 at 3:46
@GH Some of the solutions will have $a=b$, which I do not want to count. May be I was not clear about this. – Julián Aguirre May 17 '11 at 21:09
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4 Answers
up vote 13 down vote accepted
Here's a copy-paste of something I wrote up a while ago:
Lemma: Let $q$ be odd, and let $Q$ be the set of quadratic residues (including $0$) in $\mathbb F_q$. Then the number of elements $s_q(c)$ in $\{x^2+c|x \in \mathbb{F}_q\} \cap Q$ is given by \begin{array}{|c|c|c|} \hline & c \in Q & c \notin Q \\ \hline -1 \in Q & \frac{q+3}{4} & \frac{q-1}{4} \\ \hline -1 \notin Q & \frac{q+1}{4} & \frac{q+1}{4} \\ \hline \end{array}
Proof: If, for $x,y,c\in \mathbb{F}_q,\ c \neq 0$ we have $x^2+c=y^2$, then $c=y^2-x^2=(y-x)(y+x)$. Now for all the $q-1$ elements $d\in \mathbb{F}_q^{\ast}$, we can let $y-x=d$ and $y+x=\frac{c}{d}$. But the pairs $(d,\frac{c}{d}),(-d,\frac{c}{-d}),(\frac{c}{d},d),(\frac{c}{-d},-d)$ all give the same value of $y^2=\frac{1}{4}(d+c/d)^2$. Also, as $q$ is odd, $d\neq -d\ \forall d$. But if $c\in Q$, for $2$ values of $d$ we have $d=\frac{c}{d}$ and if $-c\in Q$, for 2 values of $d$ we have $d=\frac{c}{-d}$. So we have $$ s_q(c) = \left\{ \begin{array}{rcll} \frac{\frac{q-1}{2}-2}{2}+2 & = & \frac{q+3}{4} & if\ c\in Q,\ -c\in Q \\ \frac{\frac{q-1}{2}-1}{2}+1 & = & \frac{q+1}{4} & if\ c\in Q,\ -c\notin Q \\ \frac{\frac{q-1}{2}-1}{2}+1 & = & \frac{q+1}{4} & if\ c\notin Q,\ -c\in Q \\ & & \frac{q-1}{4} & if\ c\notin Q,\ -c\notin Q \end{array} \right. $$ and hence the result.
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It is easy to write this number (of $a$ such that $a,a+1$ are squares) in terms of the number of solutions of $x^2-y^2=1$. This is a conic which has $p+1$ projective points over the field of $p$ elements (since it is isomorphic to $\mathbb{P}^1$). It has two points at infinity, two points with $y=0$ and two or zero points with $x=0$, depending on $p \mod 4$. So you get your formula.
There is no way of telling the quadratic character of $a+b$ from that of $a,b$, but it is a square half the time.
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The ``half the time'' comment is known to be true because the quadratic residue graph is quasirandom (this is in the seminal paper of Graham & Chung on quasirandom subsets of $Z/(n)$ from around 1990). – Kevin O'Bryant May 16 '11 at 22:07
3
For primes, this has been known since at least Gauss. – Felipe Voloch May 17 '11 at 0:57
3
@Kevin: quoting a quasirandomness theorem to show edge density is 1/2 is overkill. – Omar Antolín-Camarena May 17 '11 at 2:22
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To complement the answers so far let me show using Gauss sums that the number of solutions of $ ax^2+by^2=c $ in $\mathbb{F}_p$ equals $p-\left(\frac{-ab}{p}\right)$ for any $a,b,c\in\mathbb{F}_p^\times$. Indeed, this number equals $$ \frac{1}{p}\sum_n \sum_{x,y}e\left(n\frac{ax^2+by^2-c}{p}\right) = \frac{1}{p}\sum_n e\left(\frac{-nc}{p}\right) \sum_xe\left(\frac{nax^2}{p}\right)\sum_ye\left(\frac{nby^2}{p}\right),$$ where all sums are over $\mathbb{F}_p$ and $e(t)$ abbreviates $e^{2\pi i t}$. For $n\neq 0$ we have $$ \sum_xe\left(\frac{nax^2}{p}\right)\sum_ye\left(\frac{nby^2}{p}\right) = \left(\frac{na}{p}\right)\left(\frac{nb}{p}\right)\left(\sum_re\left(\frac{r^2}{p}\right)\right)^2 = \left(\frac{-ab}{p}\right)p,$$ so that the count in question equals $$ p+\left(\frac{-ab}{p}\right)\sum_{n\neq 0}e\left(\frac{-nc}{p}\right)=p-\left(\frac{-ab}{p}\right). $$
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There is an elementary argument regarding the last problem. Denote by $N(p)$ the number of pairs of $(a,b)$ such that $a,b,a+b$ are all quadratic residues mod $p$. Hence we have $$N(p)=\frac{1}{8}\mathop{\sum\sum}_{\substack{a,b\bmod p\\(ab(a+b),p)=1}}\left(1+\left(\frac{a}{p}\right)\right)\left(1+\left(\frac{b}{p}\right)\right)\left(1+\left(\frac{a+b}{p}\right)\right)$$
$$=\frac{1}{8}\mathop{\sum\sum}_{\substack{a,b\bmod p\\(ab,p)=1}}\left(1+\left(\frac{a}{p}\right)\right)\left(1+\left(\frac{b}{p}\right)\right)\left(1+\left(\frac{a+b}{p}\right)\right)$$
$$-\frac{1}{8}\mathop{\sum\sum}_{\substack{a,b\bmod p\\(ab,p)=1,p|a+b}}\left(1+\left(\frac{a}{p}\right)\right)\left(1+\left(\frac{b}{p}\right)\right).$$
Clearly, the second term is just \begin{align*}&-\frac{1}{8}\sum_{\substack{a\bmod p\\(a,p)=1}}\left(1+\left(\frac{a}{p}\right)\right)\left(1+\left(\frac{-a}{p}\right)\right)=\frac{1}{8}-\frac{p}{8}\left(1+\left(\frac{-1}{p}\right)\right).\end{align*} And for the first term, we are required to investigate the quantity \begin{align*}L:=\mathop{\sum\sum}_{\substack{a,b\bmod p\\(ab,p)=1}}\left(\frac{ab(a+b)}{p}\right).\end{align*} In fact we have
$$L:=\mathop{\sum\sum}_{\substack{a,b\bmod p\\(ab,p)=1}}\left(\frac{ba^2+b^2a}{p}\right) =\mathop{\sum\sum}_{\substack{a,b\bmod p\\(ab,p)=1}}\left(\frac{b(a+\overline{2}b)^2-\overline{4}b^3}{p}\right)$$
$$=\mathop{\sum\sum}_{a,b\bmod p}\left(\frac{ba^2-\overline{4}b^3}{p}\right)$$
$$=\sum_{b\bmod p}\left(\frac{b}{p}\right)\sum_{a\bmod p}\left(\frac{a^2-\overline{4}b^2}{p}\right)$$
$$=\sum_{b\bmod p}\left(\frac{b}{p}\right)\sum_{a\bmod p}\left(\frac{a^2-1}{p}\right)=0.$$
The other terms could be computed in a similar way. Hence we can deduce that \begin{align*}N(p)=\frac{1}{8}(p-1)^2-\frac{p}{8}\left(1+\left(\frac{-1}{p}\right)\right)+\frac{1}{8}.\end{align*}
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To fix your LaTeX, I suggest putting backticks around your expressions (see the "How to write math" in the sidebar) – Yemon Choi May 17 '11 at 1:24
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4. Now, move your Device to the Right Side and Still Aim at the Target till it gets captured.
Properly select the subject area
That’s it! You are done; now that live picture will get captured with the app, you can easily view that fantastic photos on your Device.
Camera MX – Photo, Video, GIF
Camera MX also provides the option to click moving photos. The good part of this camera is that it provides lots of features. You can do almost everything with this camera, from creating GIFs, moving photos, Video capture, and lots more.
1. First, you need to download and install Camera MX on your Android smartphone. Once installed, launch the app.
Install Camera MX App
2. Now, once you open the app, it will ask you for some permission. Grant all the needed permissions to continue.
Grant all permissions
3. Now, you will get to see the camera.
The Main interface of Camera MX
4. Now, you need to tap on the “Live Shot” option.
Tap on 'Live Shot' Option
5. Once you have captured the moving photo, you need to press and hold the image to view the live shot.
Hold the image to see the Live shot
That’s it! You are done. This is how you can click live shot using Camera MX.
Few Other Apps To Create Moving Photos
Like the above two, plenty of other apps were available on the Play Store to create moving photos. Below, we have shared the three best apps to capture or create moving photos on Android devices.
1. PixaMotion
PixaMotion
With PixaMotion, you can create live photos, live wallpapers, moving photos, themes, etc. In addition, it offers a motion-based image editor that lets you create stunning living photos.
The app can help you create moving pictures with motion stills. Apart from that, the app even allows you to create cinemagraph, loop videos using still images.
2. Movepic
Movepic
Well, Movepic is pretty much similar to the Pixaloop app listed above. However, with Movepic, you can create fabulous live photos, live wallpapers & gifs with animated effects.
The good thing about Movepic is that it lets you add real camera moving effects and transition to your still images and videos. You even get an option to add motion to photos with overlays.
3. StoryZ
StoryZ
If you are looking for an Android app to create visual stories from still images, then look no other than StoryZ. The app can make your pictures move and come to life.
The Android app allows you to add moving effects and elements to photos to make them appear moving.
The method we have shared will help you capture moving photos even on older Android devices. I hope this article helped you! Please share it with your friends also. If you have any doubts related to this, let us know in the comment box below.
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ece34605c058195ed03b4d393ef1a36c
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-413,825,668,913,779,140 |
DDR4 Here We Come: 512GB of RAM Anyone?
ddr4 ram
Soon we will have faster and more dense memory modules within our computers, but what exactly does DDR4 bring to the table? To start DDR4 will be better suited for multi-core processors. DDR3 has 2048 bytes per cell row, while DDR4 will have 512 bytes per cell row. What this means is that since there are more cells to access, different cores/processors can access more cells at the same time. This also means that cycling between each row/cell is faster. Additionally, the maximum theoretical capacity of DDR4 is a whopping 512GB! Wow, imaging having that much RAM in your computer.
Also, DDR4 will be more power efficient. It will utilize 1.2V for I/O compared to DDR3L, which utilizes 1.35V. In addition, DDR4 also brings improved reliability, availability and serviceability (RAS). This encompasses such features as parity error detection for commands, addresses, and recovery from parity error. With these features, DDR4 can also block commands upon detection of a parity error. Previously, DDR3 would just pass the command that would cause the error along, which would make error recovery difficult. Lastly, DDR4 also support an optional cyclic redundancy check (CRC).
Here is a summary of the advantages of DDR4:
– Increased memory density
– Theoretical max of 512GB main memory (vs 128 DDR3)
– I/O voltage only 1.05-1.2V (vs 1.35V DDR3L)
– 284 pins (vs 240 pins for DDR3)
– Higher throughput
– Improved reliability, availability and serviceability (RAS) / Increased parity error detection
– Better Multi-core suppport (512 bytes vs 2048 bytes cell size – smaller in this case is better)
While PC gamers may wait a bit for prices to adjust and for this newer technology to become a bit more mainstream, DDR4 will certainly have a lot to bring to the table for PC enthusiasts. This could even lead to DDR hybrid drives for storage.
Source: EETimes.com
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ece34605c058195ed03b4d393ef1a36c
|
5,158,704,372,604,039,000 |
IPv6 įrankiai
Operacija:
Rezultatai:
Address type: unicast, global-unicast
Address type has SLA: 0000
Registry for address: RIPE NCC
Interface identifier: 0000:0000:0000:0323
Interface identifier is probably manual set or based on a local EUI-64 identifier
=== whois lookup for 2a04:4e42:600::323 ===
Prefix:
Origin:
Description:
Country: EU
Ryšio nustatymas
on - Protokolas veikia
unknown - Protokolas tikrinamas
off - Protokolas neveikia
Paryškintas protokolas naudojamas puslapiui pasiekti.
IPv4 adresas:
18.206.187.81
IPv6 adresas:
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|
ece34605c058195ed03b4d393ef1a36c
|
-5,564,645,701,354,916,000 |
โปรแกรมตารางการทำงาน
โปรแกรมตารางการทำงาน
การวิเคราะห์และคำนวณตัวเลขของวิศวกร ด้วยการสร้างเป็นรูปแบบจำลองในลักษณะของสูตรคำนวณ และสมการทางคณิตศาสตร์ มักมีการขีดเขียน คำนวณ และจดบันทึกลงในกระดาษ โดยมีเครื่องคิดเลขเป็นเครื่องมือช่วยในการคำนวณ การคำนวณตามงานที่ออกแบบ หรือการค้นหาคำตอบของรูปแบบจำลองสมการที่สร้างขึ้น นับเป็นงานที่น่าเบื่อ และต้องใช้ความอดทนมากพอสมควร เพราะวิศวกรจะต้องทำการคำนวณใหม่ ซ้ำแล้วซ้ำเล่าหลาย ๆ ครั้ง ตามการแปรเปลี่ยนอย่างไม่หยุดนิ่งขององค์ประกอบ หรือปัจจัยสำคัญของงาน โดยเฉพาะอย่างยิ่งหากงานนั้นเกี่ยวข้องกับความปลอดภัยของชีวิต และทรัพย์สินด้วย การคำนวนต่าง ๆ ก็ต้องยิ่งระมัดระวังให้มีการตรวจทาน เพื่อให้ได้ผลลัพธ์ที่ถูกต้องและแม่นยำ
ซอฟต์แวร์สำเร็จตารางทำงาน หรือกระดาษอิเลกทรอนิกส์ เป็นเครื่องมือช่วยเพื่อการวิเคราะห์และคำนวณตัวเลขให้กับวิศวกรได้เป็นอย่างดี เพราะการใช้งานซอฟต์แวร์นี้ จะเปรียบเหมือนกับการนั่งทำงานบนโต๊ะทำงาน ที่มีกระดาษแผ่นใหญ่ ๆ ประกอบด้วยตารางสี่เหลี่ยมของช่องตามแนวแถวและสดมภ์จำนวนมากมายปรากฏบนจอภาพ โดยแต่ละช่องบนแผ่นกระดาษอิเลกทรอนิกส์นี้จะเก็บข้อความเป็นตัวอักษร หรือตัวเลข หรือสูตรคำนวณ
ภายในซอฟต์แวร์ตารางทำงานจะมีฟังก์ชันต่าง ๆ จัดมาให้เลือกใช้เรียบร้อยแล้ว เช่น ฟังก์ชันการคำนวณทางคณิตศาสตร์ ฟังก์ชันการคำนวณทางสถิติ ฯลฯ ซึ่งฟังก์ชันเหล่านี้เปรียบได้กับเครื่องคิดเลขที่วางบนโต๊ะทำงาน ผู้ใช้สามารถนำข้อมูลจากช่องต่าง ๆ บนกระดาษมาเป็นตัวแปรของฟังก์ชันหรือสูตรคำนวณ เพื่อคำนวณให้ได้ผลลัพธ์ออกมา และนำไปใช้ในการคำนวณของช่องอื่น ๆ ต่อไปได้อีก
ข้อมูลในช่องต่าง ๆ บนตารางทำงานสามารถเปลี่ยนแปลงแก้ไขได้โดยง่ายด้วยการสั่งงานตามคำสั่งที่ปรากฏบนรายการเมนู ซึ่งการเปลี่ยนแปลงแก้ไขนี้เปรียบได้กับการมียางลบที่ทำการลบ แล้วบันทึกค่าลงไปใหม่ ถ้าตารางทำงานนี้ไม่ถูกต้องใช้งานไม่ได้ ผู้ใช้อาจลบทั้งตารางและสร้างใหม่เหมือนการขยำกระดาษโยนใสถังขยะทิ้งไป แต่ถ้าตารางทำงานนี้ใช้งานได้ดีแล้ว ผู้ใช้ก็สามารถทำการบันทึกข้อมูลไว้ในแผ่นบันทึกเพื่อนำมาใช้งานใหม่ภายหลัง
ขีดความสามารถพิเศษของตารางการทำงานมีมากมาย เช่น สามารถแสดงรายงาน ต่าง ๆ ในรูปแบบที่สวยงาม พิมพ์เป็นกราฟิกรูปภาพ หรือการแสดงผลอื่น ๆ
* หน้าแรก
* ความหมายของซอฟต์แวร์
* ซอฟต์แวร์ระบบ
ซอฟต์แวร์ประยุกต์
* โปรแกรมประมวลคำ
* ระบบปฏิบัติการ (operating system)
* โปรแกรมตารางการทำงาน
* การพัฒนาซอฟต์แวร์
* ภาษาคอมพิวเตอร์ และ ตัวแปรภาษา
* ระบบใช้งานติดต่อคอมพิวเตอร์
* ซอฟต์แวร์กราฟฟิก
* ซอฟต์แวร์การจัดฐานข้อมูล
* ซอฟต์แวร์ติดต่อสื่อสาร
* ซอฟต์แวร์นำเสนอ
* ซอฟต์แวร์ โอเพนซอร์ส
* ภาคผนวก 1
* ภาคผนวก 2
* ภาคผนวก 3
* ภาคผนวก 4
* ผู้จัดทำ
สร้างโดย:
น.ส.นิศานาถ พาพวย
มหาวิทยาลัยศรีปทุม ผู้ใหญ่ใจดี
ช่วยด้วยครับ
นักเรียนที่สร้างบล็อก กรุณาอย่า
คัดลอกข้อมูลจากเว็บอื่นทั้งหมด
ควรนำมาจากหลายๆ เว็บ แล้ววิเคราะห์ สังเคราะห์ และเขียนขึ้นใหม่
หากคัดลอกทั้งหมด จะถูกดำเนินคดี
ตามกฎหมายจากเจ้าของลิขสิทธิ์
มีโทษทั้งจำคุกและปรับในอัตราสูง
ช่วยกันนะครับ
ไทยกู๊ดวิวจะได้อยู่นานๆ
ไม่ถูกปิดเสียก่อน
ขอขอบคุณในความร่วมมือครับ
อ่านรายละเอียด
ด่วน...... ขณะนี้
พระราชบัญญัติลิขสิทธิ์ (ฉบับที่ 2) พ.ศ. 2558
มีผลบังคับใช้แล้ว
ขอให้นักเรียนและคุณครูที่ใช้งาน
เว็บ thaigoodview ในการส่งการบ้าน
ระมัดระวังการละเมิดลิขสิทธิ์ด้วย
อ่านรายละเอียดที่นี่ครับ
สมาชิกที่ออนไลน์
ขณะนี้มี สมาชิก 0 คน และ ผู้เยี่ยมชม 53 คน กำลังออนไลน์
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ece34605c058195ed03b4d393ef1a36c
|
280,932,672,343,862,500 |
Lab: Pods,InitContainers
In case you haven’t cloned the repo
git clone https://github.com/amitopenwriteup/k8s.git
Lab1: Create a simple pod
• apiVersion: Specifies the API version being used (in this case, v1).
• kind: Specifies the kind of resource, which is a Pod in this case.
• metadata: Contains metadata about the Pod, such as its name and labels.
• spec: Defines the specification for the Pod.
• containers: A list of containers within the Pod.
• name: Name of the container.
• image: The Docker image to use for the container.
• ports: Specifies the ports that the container exposes.
cd k8s
kubectl create -f expod.yaml
kubectl get pod
kubectl describe pod example-pod
kubectl delete pod example-pod
Lab2: Create pod in dev namespace
• namespace: Specifies the namespace where the Pod will be created (in this case, “dev”).
• spec: Defines the specification for the Pod
• command: Specifies the command to run in the container. In this example, it’s set to [“sleep”, “3600”] to sleep for 3600 seconds
cd k8s
cat devpod.yaml
kubectl create ns dev
kubectl create -f devpod.yaml
kubectl get pods --namespace=dev
kubectl describe pod busybox-pod --namespace=dev
kubectl delete pod busybox-pod --namespace=dev
Lab3: Multicontainer pods
Pod named “multi-container-pod” contains two containers: “main-container” running the Nginx image and “sidecar-container” running the BusyBox image. The main container exposes port 80, and the sidecar container runs a simple loop to continuously print a message.
cd k8s
kubectl create -f multicont.yaml
kubectl get pods
kubectl describe pod multi-container-pod
kubectl exec multi-container-pod -c main-container -- date
kubectl exec multi-container-pod -c sidecar-container -- ls
kubectl delete pod multi-container-pod
Lab 4: Init Containers
A list of init containers that run before the main containers.
cd k8s
kubectl create -f initpod.yaml
kubectl describe pod pod-with-init
kubectl delete pod pod-with-init
Try following Lab5:
Change the init container image name to busbox:lates, in above yaml.
Create pod, and check whether main container starts or not
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[SOLVED] Post Processing BackBuffer using Effects 11
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#1 crosire Members - Reputation: 226
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Posted 14 April 2013 - 03:59 AM
I'm currently trying to add post processing to an existing C++ DirectX11 application. The task is to apply a dynamic FX shader loaded from a file directly to the backbuffer, all rendering is already done before. In short: I have to get a copy of the backbuffer, apply some post processing effects and overwrite the buffer with those afterwards. "IDXGISwapChain->Present" is called at last.
This was pretty easy to achieve in DirectX9, however I'm running into multiple issues with DirectX11 now. I only found one example for post processing on D3D11 on MSN and it was written for a Windows 8 app, which I cannot build or run on my Windows 7 desktop and the code did not make a lot of sense to me.
The first one, a missing effects framework, could be solved by using "Effects 11" you can download from MSN already.
Now I'm a bit confused on how to continue. The basic idea on how it could work is as following:
1. Load the effect from a ".fx" HLSL file and compile it using "D3DX11CompileEffectFromFile"
2. Get a copy of the backbuffer using "IDXGISwapChain->GetBuffer" and save it to a "ID3D11Texture" object
3. Get the description of the texture, to have width and height of the screen
4. Create a new render target and tell the device to use it
5. Create a fullscreen quad and draw the screen texture on it (using the loaded effect)
6. Reset the render target and update the backbuffer with the drawn quad
The following code for step one and two already works:
Spoiler
I'm having problems with applying the effect and drawing the fullscreen quad though ...
The vertex struct and layout for the quad is declared as following:
Spoiler
The fullscreen quad is set up like this:
Spoiler
Drawing currently looks similar to the next code:
Spoiler
I'm clearing the render target to the color red before drawing the quad, but the screen is red then only, so sadly it doesn't seem to draw the quad at all...
I don't know if there is any way to check that.
Also, the a post processing shader normally requires me to pass the screen texture to it, so it can apply the effects on every pixel of it. The Effects Framework provides the "ID3DX11Effect->GetVariableByName" and allows one to set the variable to a specific object / data, but it has no definition for a texture. The nearest thing I found is "Variable->AsShaderResource()->SetResource(&MyResource)", but is that really the most efficient way, to create a shader resource for the screen texture to pass it to the pixel shader?
I'm sorry for the tons of code in this post, but I found it the easiest way to show what I got already. In DirectX9 the steps described earlier worked without any problems, but it wasn't required to create a vertex buffer here anyway, so the whole thing was shorter and easier to achieve.
I hope somebody has done something similar / post processing before in D3D11/D3D10 and can help me out here, I would really appreciate it.
Thank you and cheers,
Crosire
Edited by Crosire, 18 April 2013 - 06:00 AM.
#2 Jason Z Crossbones+ - Reputation: 6314
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Posted 14 April 2013 - 06:09 AM
It looks like the declared position format in your vertex layout is too small. You are using a 4 component float position, but only declaring a 3 component format. Since your offset in the layout to the texture coordinates is 16 bytes, this is likely the source of your problems. If you switch to having a DXGI_FORMAT_R32G32B32A32_FLOAT for your position, that should help.
Did you get any output in the debug window? If your shader was expecting a float4 then you vertex layout would not have matched and it should have complained about that... Is the debug layer enabled in the device you are using?
#3 unbird Crossbones+ - Reputation: 8095
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Posted 14 April 2013 - 07:35 AM
Yep, create your device with the D3D11_CREATE_DEVICE_DEBUG. We should actually make that a big red blinking sticky in this subforum wink.png
The nearest thing I found is "Variable->AsShaderResource()->SetResource(&MyResource)", but is that really the most efficient way, to create a shader resource for the screen texture to pass it to the pixel shader ?
It's the only way. The non-effect counterpart would be ?SSetShaderResources (in your case PSSetShaderResources), so you need to create a shader resource view of your backbuffer texture.
For this to work you also need to create your swapchain with DXGI_USAGE_SHADER_INPUT, not only with DXGI_USAGE_RENDER_TARGET_OUTPUT. Alternatively you could render your scene first to a offscreen texture with both D3D11_BIND_RENDER_TARGET and D3D11_BIND_SHADER_RESOURCE.
Be aware when switching targets and resources that you unbind (set NULL) things first: one can not set a texture as a target and input simultaneously, the (debug) pipeline will complain and undo such an attempt (usually in the non-intended way). This is a bit more of a challenge with the effect framework since you have to find out which slots are currently used, but you can explicitly set the slots with the HLSL register keyword.
Also: Show your shader code, please.
#4 crosire Members - Reputation: 226
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Posted 14 April 2013 - 10:42 AM
Thank you for your answers already! I now set the position layout to a float4, using "DXGI_FORMAT_R32G32B32A32_FLOAT", makes a bit more sense.
I'm used to PS 2.0, so the new HLSL format is a bit strange to me and I'm sure there is a mistake in there.
The shader is just a simple monochrome testing effect:
Spoiler
Edited by Crosire, 15 April 2013 - 12:29 PM.
#5 unbird Crossbones+ - Reputation: 8095
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Posted 14 April 2013 - 12:14 PM
Use technique11 not technique10 in your effect file. This is a nitpick of the effect framework. Also: Where's your vertex shader ? You need one. While you're at it: Make sure the signatures match: The vertex shader must output the SV_Position system value semantic.
I recommend testing the post process in a separate application (e.g. by loading a screenshot from your app as source) to enable the debug layer.
Edited by unbird, 14 April 2013 - 12:58 PM.
#6 crosire Members - Reputation: 226
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Posted 15 April 2013 - 12:28 PM
Thanks so far, you helped me a lot. The quad is now drawing fine and the shader / effect gets loaded and executed too.
FX:
Spoiler
The full screen gets covered in red as expected now. The only thing left is to pass the screen texture to the pixel shader and let it do its job.
However, as soon as I remove the comments from the two lines above and comment out the other color code, I just get a black screen. I tried some different shader code and it's always just black, lowering the alpha will show the original image a bit through the now transparent quad, as long as I disable render target clearing.
I'm sending the texture to the shader with this code:
ID3D11ShaderResourceView *m_pResource;
D3D11_SHADER_RESOURCE_VIEW_DESC m_pResourceDesc = { DXGI_FORMAT_R32_FLOAT, D3D10_SRV_DIMENSION_TEXTURE2D };
m_pResourceDesc.Texture2D.MipLevels = 1;
m_pResourceDesc.Texture2D.MostDetailedMip = 0;
device->CreateShaderResourceView(g_pScreenTexture11, &m_pResourceDesc, &m_pResource);
g_pEffect11->GetVariableByName("colorTex")->AsShaderResource()->SetResource(m_pResource);
"g_pScreenTexture11" contains the full screen, checked that via "D3DX11SaveTextureToFile". "g_pEffect11" also links to the effect, the other shader code works perfectly fine. The shader layout is the same as the vertex input layout declared in the C++ code too (as seen earlier), so I'm a bit lost here.
Thanks again for all help so far, it's greatly appreciated. I'm really close to the target now ... Just this little thing.
Cheers,
Crosire
#7 unbird Crossbones+ - Reputation: 8095
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Posted 15 April 2013 - 01:21 PM
Good, you narrowed it somewhat down: The sampling creates black - at least that's what I get.
Your easiest approach to narrow down the problem further would be to use a graphics debugger (PIX or the VS 2012 graphics debugger). Check the post-VS values, check if the texture is actually bound (the shader resource view, that is), debug pixels, etc.
Alternatively:
• Check if the texcoords by outputting float4(IN.txcoord, 0, 1). This should give a black-red gradient from left-to-right and a black-green gradient from top to bottom (and yellow bottom right).
• Your sampler is a bit bare for my taste. Really set all the needed values (not sure what the effects use per default). Or set the sampler explicitly to NULL (you should find the corresponding variable type), this will give you the default sampler. If that gives you something useful, work from those values. For a postprocess effect you e.g. want point sampling.
Currently I don't see anything obvious - yet wink.png
#8 crosire Members - Reputation: 226
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Posted 16 April 2013 - 10:10 AM
Texcoords are set correctly, I get the expected green/red gradient image with no blue and alpha at 100%.
I tried it by using "D3DX11CreateShaderResourceViewFromFile" and sent an existing image to the shader by that and I get that image with the effects applied drawn on the screen, so the shader is fully working. It's just not reading the data from the texture object (which has it, tested) and using that one when sending it to the shader.
In code:
This works:
ID3D11ShaderResourceView *m_pResource;
D3DX11CreateShaderResourceViewFromFile(device, L"tex.bmp", NULL, NULL, &m_pResource, NULL);
g_pEffect11->GetVariableByName("colorTex")->AsShaderResource()->SetResource(m_pResource);
The code from my previous post not:
ID3D11ShaderResourceView *m_pResource;
D3D11_SHADER_RESOURCE_VIEW_DESC m_pResourceDesc = { DXGI_FORMAT_R32_FLOAT, D3D10_SRV_DIMENSION_TEXTURE2D };
m_pResourceDesc.Texture2D.MipLevels = 1;
m_pResourceDesc.Texture2D.MostDetailedMip = 0;
device->CreateShaderResourceView(g_pScreenTexture11, &m_pResourceDesc, &m_pResource);
g_pEffect11->GetVariableByName("colorTex")->AsShaderResource()->SetResource(m_pResource);
After looking at it again, I found some mistakes already:
• D3D11_SRV_DIMENSION_TEXTURE2D instead of D3D10_SRV_DIMENSION_TEXTURE2D (which outputs the same value in the end (4), but it just makes more sense)
• DXGI_FORMAT_R32G32B32A32_FLOAT instead of DXGI_FORMAT_R32_FLOAT (The image isn't made of red color only obviously, I want the full RGBA color code here)
Still it doesn't work with the corrected code. Does anybody see another error in here?
And I just have to thank unbird again, you pushed me in the right directions :)
#9 unbird Crossbones+ - Reputation: 8095
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Posted 16 April 2013 - 10:42 AM
This is really strange. Can you force the debug layer through the control panel ? Already tried a GPU debugger ? I'm definitively out of clues...
#10 crosire Members - Reputation: 226
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Posted 17 April 2013 - 10:25 AM
I think it might be because the screen texture gets created by the swapchain interface in "IDXGISwapChain->GetBuffer" as I pass a null texture interface object to it. It then probably gets initialized without "D3D11_BIND_SHADER_RESOURCE", which makes it unusable for the shader resource view object.
I tried a different approach now:
Code which gets executed on startup:
// Create screen resource
D3D11_TEXTURE2D_DESC m_pTextureDesc = { m_pDesc.Width, m_pDesc.Height, 1, 1, DXGI_FORMAT_R32G32B32A32_FLOAT, 1, 0, D3D11_USAGE_DEFAULT, D3D11_BIND_SHADER_RESOURCE, 0, 0 };
device->CreateTexture2D(&m_pTextureDesc, NULL, &g_pScreenTexture11);
// Create shader resource view
D3D11_SHADER_RESOURCE_VIEW_DESC m_pResourceDesc = { m_pTextureDesc.Format, D3D11_SRV_DIMENSION_TEXTURE2D };
device->CreateShaderResourceView(g_pScreenTexture11, &m_pResourceDesc, &g_pScreenView11);
Code which gets executed every frame:
ID3D11Resource *m_pBackBuffer;
hr = swapchain->GetBuffer(0, __uuidof(m_pBackBuffer), (LPVOID*)&m_pBackBuffer);
if (SUCCEEDED(hr) && g_pScreenTexture11)
{
// Update screen texture
context->CopyResource(g_pScreenTexture11, m_pBackBuffer);
// Update effect parameters
g_pEffect11->GetVariableByName("colorTex")->AsShaderResource()->SetResource(g_pScreenView11);
...
}
I thought the shader view interface only stores a pointer to the screen texture, so it will retrieve the updated data, when I change the texture object it was initalized with.
The code now fails at "context->CopyResource(g_pScreenTexture11, m_pBackBuffer);" though. The texture is just empty.
I tried this one too:
ID3D11Resource *tex;
g_pScreenSurface11->GetResource(&tex);
D3DX11SaveTextureToFile(context, g_pScreenTexture11, D3DX11_IFF_BMP, L"tex.bmp");
But it crashes the application at the second line already, I have no idea why.
I'm going to try and put together a quick testing program as I cannot bind PIX to any other software with my project applied. PIX tries to hook the DirectX Exported Functions which was already done by my hook, so it just crashes.
Edited by Crosire, 17 April 2013 - 10:31 AM.
#11 unbird Crossbones+ - Reputation: 8095
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Posted 17 April 2013 - 10:50 AM
I thought the shader view interface only stores a pointer to the screen texture, so it will retrieve the updated data, when I change the texture object it was initalized with.
Nope, the view is tightly bound to the resource, you can't change that after creation.
The code now fails at "context->CopyResource(g_pScreenTexture11, m_pBackBuffer);" though. The texture is just empty.
If you look at the docs of this function you will have to check the compatibility of source and target resource. I already suspected some format problem: Is your backbuffer e.g. really 32F ?
I tried this one too:
*snip*
But it crashes the application at the second line already, I have no idea why.
BMP can't cope with float formats, use DDS instead.
I'm going to try and put together a quick testing program as I cannot bind PIX to any other software with my project applied. PIX tries to hook the DirectX Exported Functions which was already done by my hook, so it just crashes.
That leaves bare logging, hopefully. Dump the description of the resources and views in question using GetResource and GetDesc and compare them.
#12 crosire Members - Reputation: 226
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Posted 17 April 2013 - 01:36 PM
If you look at the docs of this function you will have to check the compatibility of source and target resource. I already suspected some format problem: Is your backbuffer e.g. really 32F ?
And that is the problem. DirectX 9 had the "StretchRect" function, which did the job. DirectX 11 is missing any real replacement. I don't see how I can copy the resource of the backbuffer to my texture, which has a different format?!
"CopyResource" and "ResolveSubresource" both require compatible formats. If I set up my texture with the same format as the backbuffer, those work of course, but the Shader View is not created properly again (see below).
Whatever I'm trying, either one or the other thing work, but not both together ...
BMP can't cope with float formats, use DDS instead.
It's not the save texture line that makes it crash, it's the "GetResource" and that's because the shader resource view object is NULL (got my testing application working and can successfully debug it with the VS 11 graphics debugger) even though it was created earlier.
Tried to create it every frame too:
SAFE_RELEASE(g_pScreenSurface11);
device->CreateShaderResourceView(g_pScreenTexture11, NULL, &g_pScreenSurface11);
ID3D11Resource *tex;
g_pScreenSurface11->GetResource(&tex);
Crashes, it is still NULL. It works when I create the texture from a file instead of using the backbuffer, so I asume either the format is the issue or the backbuffer is missing the "D3D11_BIND_SHADER_RESOURCE" flag (which is probably the case).
The solution would be to create a texture with that flag set and copy the backbuffer contents onto it. But all my tries failed there yet, as shown above.
I hope I'm not too annoying here smile.png
Edited by Crosire, 17 April 2013 - 01:37 PM.
#13 unbird Crossbones+ - Reputation: 8095
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Posted 17 April 2013 - 01:48 PM
Yeah, you need the copy resource, and you need D3D11_BIND_SHADER_RESOURCE on your target texture to then be able to sample from. Don't see where you fail, so I just reiterate:
- Your backbuffer is given, so D3D11_BIND_SHADER_RESOURCE is not available
- create a compatible texture, same format (and MS type!), same dimension, this time with D3D11_BIND_SHADER_RESOURCE
- create the view thereof
- use it as source for your postprocess
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Posted 18 April 2013 - 06:00 AM
Forgive me, I was just stupid. Everything is working now!
BIG thanks to you smile.png
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Logo Search packages:
Sourcecode: llvm version File versions Download package
Verifier.cpp
//===-- Verifier.cpp - Implement the Module Verifier -------------*- C++ -*-==//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file defines the function verifier interface, that can be used for some
// sanity checking of input to the system.
//
// Note that this does not provide full `Java style' security and verifications,
// instead it just tries to ensure that code is well-formed.
//
// * Both of a binary operator's parameters are of the same type
// * Verify that the indices of mem access instructions match other operands
// * Verify that arithmetic and other things are only performed on first-class
// types. Verify that shifts & logicals only happen on integrals f.e.
// * All of the constants in a switch statement are of the correct type
// * The code is in valid SSA form
// * It should be illegal to put a label into any other type (like a structure)
// or to return one. [except constant arrays!]
// * Only phi nodes can be self referential: 'add int %0, %0 ; <int>:0' is bad
// * PHI nodes must have an entry for each predecessor, with no extras.
// * PHI nodes must be the first thing in a basic block, all grouped together
// * PHI nodes must have at least one entry
// * All basic blocks should only end with terminator insts, not contain them
// * The entry node to a function must not have predecessors
// * All Instructions must be embedded into a basic block
// * Functions cannot take a void-typed parameter
// * Verify that a function's argument list agrees with it's declared type.
// * It is illegal to specify a name for a void value.
// * It is illegal to have a internal global value with no initializer
// * It is illegal to have a ret instruction that returns a value that does not
// agree with the function return value type.
// * Function call argument types match the function prototype
// * All other things that are tested by asserts spread about the code...
//
//===----------------------------------------------------------------------===//
#include "llvm/Analysis/Verifier.h"
#include "llvm/Assembly/Writer.h"
#include "llvm/CallingConv.h"
#include "llvm/Constants.h"
#include "llvm/Pass.h"
#include "llvm/Module.h"
#include "llvm/ModuleProvider.h"
#include "llvm/ParameterAttributes.h"
#include "llvm/DerivedTypes.h"
#include "llvm/InlineAsm.h"
#include "llvm/IntrinsicInst.h"
#include "llvm/PassManager.h"
#include "llvm/Analysis/Dominators.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/Support/CallSite.h"
#include "llvm/Support/CFG.h"
#include "llvm/Support/InstVisitor.h"
#include "llvm/Support/Streams.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/Support/Compiler.h"
#include <algorithm>
#include <sstream>
#include <cstdarg>
using namespace llvm;
namespace { // Anonymous namespace for class
struct VISIBILITY_HIDDEN PreVerifier : public FunctionPass {
static char ID; // Pass ID, replacement for typeid
PreVerifier() : FunctionPass((intptr_t)&ID) { }
// Check that the prerequisites for successful DominatorTree construction
// are satisfied.
bool runOnFunction(Function &F) {
bool Broken = false;
for (Function::iterator I = F.begin(), E = F.end(); I != E; ++I) {
if (I->empty() || !I->back().isTerminator()) {
cerr << "Basic Block does not have terminator!\n";
WriteAsOperand(*cerr, I, true);
cerr << "\n";
Broken = true;
}
}
if (Broken)
abort();
return false;
}
};
char PreVerifier::ID = 0;
RegisterPass<PreVerifier> PreVer("preverify", "Preliminary module verification");
const PassInfo *PreVerifyID = PreVer.getPassInfo();
struct VISIBILITY_HIDDEN
Verifier : public FunctionPass, InstVisitor<Verifier> {
static char ID; // Pass ID, replacement for typeid
bool Broken; // Is this module found to be broken?
bool RealPass; // Are we not being run by a PassManager?
VerifierFailureAction action;
// What to do if verification fails.
Module *Mod; // Module we are verifying right now
DominatorTree *DT; // Dominator Tree, caution can be null!
std::stringstream msgs; // A stringstream to collect messages
/// InstInThisBlock - when verifying a basic block, keep track of all of the
/// instructions we have seen so far. This allows us to do efficient
/// dominance checks for the case when an instruction has an operand that is
/// an instruction in the same block.
SmallPtrSet<Instruction*, 16> InstsInThisBlock;
Verifier()
: FunctionPass((intptr_t)&ID),
Broken(false), RealPass(true), action(AbortProcessAction),
DT(0), msgs( std::ios::app | std::ios::out ) {}
Verifier( VerifierFailureAction ctn )
: FunctionPass((intptr_t)&ID),
Broken(false), RealPass(true), action(ctn), DT(0),
msgs( std::ios::app | std::ios::out ) {}
Verifier(bool AB )
: FunctionPass((intptr_t)&ID),
Broken(false), RealPass(true),
action( AB ? AbortProcessAction : PrintMessageAction), DT(0),
msgs( std::ios::app | std::ios::out ) {}
Verifier(DominatorTree &dt)
: FunctionPass((intptr_t)&ID),
Broken(false), RealPass(false), action(PrintMessageAction),
DT(&dt), msgs( std::ios::app | std::ios::out ) {}
bool doInitialization(Module &M) {
Mod = &M;
verifyTypeSymbolTable(M.getTypeSymbolTable());
// If this is a real pass, in a pass manager, we must abort before
// returning back to the pass manager, or else the pass manager may try to
// run other passes on the broken module.
if (RealPass)
return abortIfBroken();
return false;
}
bool runOnFunction(Function &F) {
// Get dominator information if we are being run by PassManager
if (RealPass) DT = &getAnalysis<DominatorTree>();
Mod = F.getParent();
visit(F);
InstsInThisBlock.clear();
// If this is a real pass, in a pass manager, we must abort before
// returning back to the pass manager, or else the pass manager may try to
// run other passes on the broken module.
if (RealPass)
return abortIfBroken();
return false;
}
bool doFinalization(Module &M) {
// Scan through, checking all of the external function's linkage now...
for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I) {
visitGlobalValue(*I);
// Check to make sure function prototypes are okay.
if (I->isDeclaration()) visitFunction(*I);
}
for (Module::global_iterator I = M.global_begin(), E = M.global_end();
I != E; ++I)
visitGlobalVariable(*I);
for (Module::alias_iterator I = M.alias_begin(), E = M.alias_end();
I != E; ++I)
visitGlobalAlias(*I);
// If the module is broken, abort at this time.
return abortIfBroken();
}
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
AU.addRequiredID(PreVerifyID);
if (RealPass)
AU.addRequired<DominatorTree>();
}
/// abortIfBroken - If the module is broken and we are supposed to abort on
/// this condition, do so.
///
bool abortIfBroken() {
if (Broken) {
msgs << "Broken module found, ";
switch (action) {
case AbortProcessAction:
msgs << "compilation aborted!\n";
cerr << msgs.str();
abort();
case PrintMessageAction:
msgs << "verification continues.\n";
cerr << msgs.str();
return false;
case ReturnStatusAction:
msgs << "compilation terminated.\n";
return Broken;
}
}
return false;
}
// Verification methods...
void verifyTypeSymbolTable(TypeSymbolTable &ST);
void visitGlobalValue(GlobalValue &GV);
void visitGlobalVariable(GlobalVariable &GV);
void visitGlobalAlias(GlobalAlias &GA);
void visitFunction(Function &F);
void visitBasicBlock(BasicBlock &BB);
void visitTruncInst(TruncInst &I);
void visitZExtInst(ZExtInst &I);
void visitSExtInst(SExtInst &I);
void visitFPTruncInst(FPTruncInst &I);
void visitFPExtInst(FPExtInst &I);
void visitFPToUIInst(FPToUIInst &I);
void visitFPToSIInst(FPToSIInst &I);
void visitUIToFPInst(UIToFPInst &I);
void visitSIToFPInst(SIToFPInst &I);
void visitIntToPtrInst(IntToPtrInst &I);
void visitPtrToIntInst(PtrToIntInst &I);
void visitBitCastInst(BitCastInst &I);
void visitPHINode(PHINode &PN);
void visitBinaryOperator(BinaryOperator &B);
void visitICmpInst(ICmpInst &IC);
void visitFCmpInst(FCmpInst &FC);
void visitExtractElementInst(ExtractElementInst &EI);
void visitInsertElementInst(InsertElementInst &EI);
void visitShuffleVectorInst(ShuffleVectorInst &EI);
void visitVAArgInst(VAArgInst &VAA) { visitInstruction(VAA); }
void visitCallInst(CallInst &CI);
void visitInvokeInst(InvokeInst &II);
void visitGetElementPtrInst(GetElementPtrInst &GEP);
void visitLoadInst(LoadInst &LI);
void visitStoreInst(StoreInst &SI);
void visitInstruction(Instruction &I);
void visitTerminatorInst(TerminatorInst &I);
void visitReturnInst(ReturnInst &RI);
void visitSwitchInst(SwitchInst &SI);
void visitSelectInst(SelectInst &SI);
void visitUserOp1(Instruction &I);
void visitUserOp2(Instruction &I) { visitUserOp1(I); }
void visitIntrinsicFunctionCall(Intrinsic::ID ID, CallInst &CI);
void visitAllocationInst(AllocationInst &AI);
void VerifyCallSite(CallSite CS);
void VerifyIntrinsicPrototype(Intrinsic::ID ID, Function *F,
unsigned Count, ...);
void VerifyAttrs(uint16_t Attrs, const Type *Ty, bool isReturnValue,
const Value *V);
void VerifyFunctionAttrs(const FunctionType *FT, const ParamAttrsList *Attrs,
const Value *V);
void WriteValue(const Value *V) {
if (!V) return;
if (isa<Instruction>(V)) {
msgs << *V;
} else {
WriteAsOperand(msgs, V, true, Mod);
msgs << "\n";
}
}
void WriteType(const Type* T ) {
if ( !T ) return;
WriteTypeSymbolic(msgs, T, Mod );
}
// CheckFailed - A check failed, so print out the condition and the message
// that failed. This provides a nice place to put a breakpoint if you want
// to see why something is not correct.
void CheckFailed(const std::string &Message,
const Value *V1 = 0, const Value *V2 = 0,
const Value *V3 = 0, const Value *V4 = 0) {
msgs << Message << "\n";
WriteValue(V1);
WriteValue(V2);
WriteValue(V3);
WriteValue(V4);
Broken = true;
}
void CheckFailed( const std::string& Message, const Value* V1,
const Type* T2, const Value* V3 = 0 ) {
msgs << Message << "\n";
WriteValue(V1);
WriteType(T2);
WriteValue(V3);
Broken = true;
}
};
char Verifier::ID = 0;
RegisterPass<Verifier> X("verify", "Module Verifier");
} // End anonymous namespace
// Assert - We know that cond should be true, if not print an error message.
#define Assert(C, M) \
do { if (!(C)) { CheckFailed(M); return; } } while (0)
#define Assert1(C, M, V1) \
do { if (!(C)) { CheckFailed(M, V1); return; } } while (0)
#define Assert2(C, M, V1, V2) \
do { if (!(C)) { CheckFailed(M, V1, V2); return; } } while (0)
#define Assert3(C, M, V1, V2, V3) \
do { if (!(C)) { CheckFailed(M, V1, V2, V3); return; } } while (0)
#define Assert4(C, M, V1, V2, V3, V4) \
do { if (!(C)) { CheckFailed(M, V1, V2, V3, V4); return; } } while (0)
void Verifier::visitGlobalValue(GlobalValue &GV) {
Assert1(!GV.isDeclaration() ||
GV.hasExternalLinkage() ||
GV.hasDLLImportLinkage() ||
GV.hasExternalWeakLinkage() ||
(isa<GlobalAlias>(GV) &&
(GV.hasInternalLinkage() || GV.hasWeakLinkage())),
"Global is external, but doesn't have external or dllimport or weak linkage!",
&GV);
Assert1(!GV.hasDLLImportLinkage() || GV.isDeclaration(),
"Global is marked as dllimport, but not external", &GV);
Assert1(!GV.hasAppendingLinkage() || isa<GlobalVariable>(GV),
"Only global variables can have appending linkage!", &GV);
if (GV.hasAppendingLinkage()) {
GlobalVariable &GVar = cast<GlobalVariable>(GV);
Assert1(isa<ArrayType>(GVar.getType()->getElementType()),
"Only global arrays can have appending linkage!", &GV);
}
}
void Verifier::visitGlobalVariable(GlobalVariable &GV) {
if (GV.hasInitializer()) {
Assert1(GV.getInitializer()->getType() == GV.getType()->getElementType(),
"Global variable initializer type does not match global "
"variable type!", &GV);
} else {
Assert1(GV.hasExternalLinkage() || GV.hasDLLImportLinkage() ||
GV.hasExternalWeakLinkage(),
"invalid linkage type for global declaration", &GV);
}
visitGlobalValue(GV);
}
void Verifier::visitGlobalAlias(GlobalAlias &GA) {
Assert1(!GA.getName().empty(),
"Alias name cannot be empty!", &GA);
Assert1(GA.hasExternalLinkage() || GA.hasInternalLinkage() ||
GA.hasWeakLinkage(),
"Alias should have external or external weak linkage!", &GA);
Assert1(GA.getType() == GA.getAliasee()->getType(),
"Alias and aliasee types should match!", &GA);
if (!isa<GlobalValue>(GA.getAliasee())) {
const ConstantExpr *CE = dyn_cast<ConstantExpr>(GA.getAliasee());
Assert1(CE && CE->getOpcode() == Instruction::BitCast &&
isa<GlobalValue>(CE->getOperand(0)),
"Aliasee should be either GlobalValue or bitcast of GlobalValue",
&GA);
}
visitGlobalValue(GA);
}
void Verifier::verifyTypeSymbolTable(TypeSymbolTable &ST) {
}
// VerifyAttrs - Check the given parameter attributes for an argument or return
// value of the specified type. The value V is printed in error messages.
void Verifier::VerifyAttrs(uint16_t Attrs, const Type *Ty, bool isReturnValue,
const Value *V) {
if (Attrs == ParamAttr::None)
return;
if (isReturnValue) {
uint16_t RetI = Attrs & ParamAttr::ParameterOnly;
Assert1(!RetI, "Attribute " + ParamAttrsList::getParamAttrsText(RetI) +
"does not apply to return values!", V);
} else {
uint16_t ParmI = Attrs & ParamAttr::ReturnOnly;
Assert1(!ParmI, "Attribute " + ParamAttrsList::getParamAttrsText(ParmI) +
"only applies to return values!", V);
}
for (unsigned i = 0;
i < array_lengthof(ParamAttr::MutuallyIncompatible); ++i) {
uint16_t MutI = Attrs & ParamAttr::MutuallyIncompatible[i];
Assert1(!(MutI & (MutI - 1)), "Attributes " +
ParamAttrsList::getParamAttrsText(MutI) + "are incompatible!", V);
}
uint16_t TypeI = Attrs & ParamAttr::typeIncompatible(Ty);
Assert1(!TypeI, "Wrong type for attribute " +
ParamAttrsList::getParamAttrsText(TypeI), V);
}
// VerifyFunctionAttrs - Check parameter attributes against a function type.
// The value V is printed in error messages.
void Verifier::VerifyFunctionAttrs(const FunctionType *FT,
const ParamAttrsList *Attrs,
const Value *V) {
if (!Attrs)
return;
bool SawNest = false;
for (unsigned Idx = 0; Idx <= FT->getNumParams(); ++Idx) {
uint16_t Attr = Attrs->getParamAttrs(Idx);
VerifyAttrs(Attr, FT->getParamType(Idx-1), !Idx, V);
if (Attr & ParamAttr::Nest) {
Assert1(!SawNest, "More than one parameter has attribute nest!", V);
SawNest = true;
}
if (Attr & ParamAttr::StructRet) {
Assert1(Idx == 1, "Attribute sret not on first parameter!", V);
}
}
}
// visitFunction - Verify that a function is ok.
//
void Verifier::visitFunction(Function &F) {
// Check function arguments.
const FunctionType *FT = F.getFunctionType();
unsigned NumArgs = F.arg_size();
Assert2(FT->getNumParams() == NumArgs,
"# formal arguments must match # of arguments for function type!",
&F, FT);
Assert1(F.getReturnType()->isFirstClassType() ||
F.getReturnType() == Type::VoidTy,
"Functions cannot return aggregate values!", &F);
Assert1(!F.isStructReturn() || FT->getReturnType() == Type::VoidTy,
"Invalid struct-return function!", &F);
const ParamAttrsList *Attrs = F.getParamAttrs();
Assert1(!Attrs ||
(Attrs->size() &&
Attrs->getParamIndex(Attrs->size()-1) <= FT->getNumParams()),
"Attributes after last parameter!", &F);
// Check function attributes.
VerifyFunctionAttrs(FT, Attrs, &F);
// Check that this function meets the restrictions on this calling convention.
switch (F.getCallingConv()) {
default:
break;
case CallingConv::C:
break;
case CallingConv::Fast:
case CallingConv::Cold:
case CallingConv::X86_FastCall:
Assert1(!F.isVarArg(),
"Varargs functions must have C calling conventions!", &F);
break;
}
// Check that the argument values match the function type for this function...
unsigned i = 0;
for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end();
I != E; ++I, ++i) {
Assert2(I->getType() == FT->getParamType(i),
"Argument value does not match function argument type!",
I, FT->getParamType(i));
// Make sure no aggregates are passed by value.
Assert1(I->getType()->isFirstClassType(),
"Functions cannot take aggregates as arguments by value!", I);
}
if (F.isDeclaration()) {
Assert1(F.hasExternalLinkage() || F.hasDLLImportLinkage() ||
F.hasExternalWeakLinkage(),
"invalid linkage type for function declaration", &F);
} else {
// Verify that this function (which has a body) is not named "llvm.*". It
// is not legal to define intrinsics.
if (F.getName().size() >= 5)
Assert1(F.getName().substr(0, 5) != "llvm.",
"llvm intrinsics cannot be defined!", &F);
// Check the entry node
BasicBlock *Entry = &F.getEntryBlock();
Assert1(pred_begin(Entry) == pred_end(Entry),
"Entry block to function must not have predecessors!", Entry);
}
}
// verifyBasicBlock - Verify that a basic block is well formed...
//
void Verifier::visitBasicBlock(BasicBlock &BB) {
InstsInThisBlock.clear();
// Ensure that basic blocks have terminators!
Assert1(BB.getTerminator(), "Basic Block does not have terminator!", &BB);
// Check constraints that this basic block imposes on all of the PHI nodes in
// it.
if (isa<PHINode>(BB.front())) {
SmallVector<BasicBlock*, 8> Preds(pred_begin(&BB), pred_end(&BB));
SmallVector<std::pair<BasicBlock*, Value*>, 8> Values;
std::sort(Preds.begin(), Preds.end());
PHINode *PN;
for (BasicBlock::iterator I = BB.begin(); (PN = dyn_cast<PHINode>(I));++I) {
// Ensure that PHI nodes have at least one entry!
Assert1(PN->getNumIncomingValues() != 0,
"PHI nodes must have at least one entry. If the block is dead, "
"the PHI should be removed!", PN);
Assert1(PN->getNumIncomingValues() == Preds.size(),
"PHINode should have one entry for each predecessor of its "
"parent basic block!", PN);
// Get and sort all incoming values in the PHI node...
Values.clear();
Values.reserve(PN->getNumIncomingValues());
for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
Values.push_back(std::make_pair(PN->getIncomingBlock(i),
PN->getIncomingValue(i)));
std::sort(Values.begin(), Values.end());
for (unsigned i = 0, e = Values.size(); i != e; ++i) {
// Check to make sure that if there is more than one entry for a
// particular basic block in this PHI node, that the incoming values are
// all identical.
//
Assert4(i == 0 || Values[i].first != Values[i-1].first ||
Values[i].second == Values[i-1].second,
"PHI node has multiple entries for the same basic block with "
"different incoming values!", PN, Values[i].first,
Values[i].second, Values[i-1].second);
// Check to make sure that the predecessors and PHI node entries are
// matched up.
Assert3(Values[i].first == Preds[i],
"PHI node entries do not match predecessors!", PN,
Values[i].first, Preds[i]);
}
}
}
}
void Verifier::visitTerminatorInst(TerminatorInst &I) {
// Ensure that terminators only exist at the end of the basic block.
Assert1(&I == I.getParent()->getTerminator(),
"Terminator found in the middle of a basic block!", I.getParent());
visitInstruction(I);
}
void Verifier::visitReturnInst(ReturnInst &RI) {
Function *F = RI.getParent()->getParent();
if (RI.getNumOperands() == 0)
Assert2(F->getReturnType() == Type::VoidTy,
"Found return instr that returns void in Function of non-void "
"return type!", &RI, F->getReturnType());
else
Assert2(F->getReturnType() == RI.getOperand(0)->getType(),
"Function return type does not match operand "
"type of return inst!", &RI, F->getReturnType());
// Check to make sure that the return value has necessary properties for
// terminators...
visitTerminatorInst(RI);
}
void Verifier::visitSwitchInst(SwitchInst &SI) {
// Check to make sure that all of the constants in the switch instruction
// have the same type as the switched-on value.
const Type *SwitchTy = SI.getCondition()->getType();
for (unsigned i = 1, e = SI.getNumCases(); i != e; ++i)
Assert1(SI.getCaseValue(i)->getType() == SwitchTy,
"Switch constants must all be same type as switch value!", &SI);
visitTerminatorInst(SI);
}
void Verifier::visitSelectInst(SelectInst &SI) {
Assert1(SI.getCondition()->getType() == Type::Int1Ty,
"Select condition type must be bool!", &SI);
Assert1(SI.getTrueValue()->getType() == SI.getFalseValue()->getType(),
"Select values must have identical types!", &SI);
Assert1(SI.getTrueValue()->getType() == SI.getType(),
"Select values must have same type as select instruction!", &SI);
visitInstruction(SI);
}
/// visitUserOp1 - User defined operators shouldn't live beyond the lifetime of
/// a pass, if any exist, it's an error.
///
void Verifier::visitUserOp1(Instruction &I) {
Assert1(0, "User-defined operators should not live outside of a pass!", &I);
}
void Verifier::visitTruncInst(TruncInst &I) {
// Get the source and destination types
const Type *SrcTy = I.getOperand(0)->getType();
const Type *DestTy = I.getType();
// Get the size of the types in bits, we'll need this later
unsigned SrcBitSize = SrcTy->getPrimitiveSizeInBits();
unsigned DestBitSize = DestTy->getPrimitiveSizeInBits();
Assert1(SrcTy->isInteger(), "Trunc only operates on integer", &I);
Assert1(DestTy->isInteger(), "Trunc only produces integer", &I);
Assert1(SrcBitSize > DestBitSize,"DestTy too big for Trunc", &I);
visitInstruction(I);
}
void Verifier::visitZExtInst(ZExtInst &I) {
// Get the source and destination types
const Type *SrcTy = I.getOperand(0)->getType();
const Type *DestTy = I.getType();
// Get the size of the types in bits, we'll need this later
Assert1(SrcTy->isInteger(), "ZExt only operates on integer", &I);
Assert1(DestTy->isInteger(), "ZExt only produces an integer", &I);
unsigned SrcBitSize = SrcTy->getPrimitiveSizeInBits();
unsigned DestBitSize = DestTy->getPrimitiveSizeInBits();
Assert1(SrcBitSize < DestBitSize,"Type too small for ZExt", &I);
visitInstruction(I);
}
void Verifier::visitSExtInst(SExtInst &I) {
// Get the source and destination types
const Type *SrcTy = I.getOperand(0)->getType();
const Type *DestTy = I.getType();
// Get the size of the types in bits, we'll need this later
unsigned SrcBitSize = SrcTy->getPrimitiveSizeInBits();
unsigned DestBitSize = DestTy->getPrimitiveSizeInBits();
Assert1(SrcTy->isInteger(), "SExt only operates on integer", &I);
Assert1(DestTy->isInteger(), "SExt only produces an integer", &I);
Assert1(SrcBitSize < DestBitSize,"Type too small for SExt", &I);
visitInstruction(I);
}
void Verifier::visitFPTruncInst(FPTruncInst &I) {
// Get the source and destination types
const Type *SrcTy = I.getOperand(0)->getType();
const Type *DestTy = I.getType();
// Get the size of the types in bits, we'll need this later
unsigned SrcBitSize = SrcTy->getPrimitiveSizeInBits();
unsigned DestBitSize = DestTy->getPrimitiveSizeInBits();
Assert1(SrcTy->isFloatingPoint(),"FPTrunc only operates on FP", &I);
Assert1(DestTy->isFloatingPoint(),"FPTrunc only produces an FP", &I);
Assert1(SrcBitSize > DestBitSize,"DestTy too big for FPTrunc", &I);
visitInstruction(I);
}
void Verifier::visitFPExtInst(FPExtInst &I) {
// Get the source and destination types
const Type *SrcTy = I.getOperand(0)->getType();
const Type *DestTy = I.getType();
// Get the size of the types in bits, we'll need this later
unsigned SrcBitSize = SrcTy->getPrimitiveSizeInBits();
unsigned DestBitSize = DestTy->getPrimitiveSizeInBits();
Assert1(SrcTy->isFloatingPoint(),"FPExt only operates on FP", &I);
Assert1(DestTy->isFloatingPoint(),"FPExt only produces an FP", &I);
Assert1(SrcBitSize < DestBitSize,"DestTy too small for FPExt", &I);
visitInstruction(I);
}
void Verifier::visitUIToFPInst(UIToFPInst &I) {
// Get the source and destination types
const Type *SrcTy = I.getOperand(0)->getType();
const Type *DestTy = I.getType();
bool SrcVec = SrcTy->getTypeID() == Type::VectorTyID;
bool DstVec = DestTy->getTypeID() == Type::VectorTyID;
Assert1(SrcVec == DstVec,"UIToFP source and dest must both be vector or scalar", &I);
Assert1(SrcTy->isIntOrIntVector(),"UIToFP source must be integer or integer vector", &I);
Assert1(DestTy->isFPOrFPVector(),"UIToFP result must be FP or FP vector", &I);
if (SrcVec && DstVec)
Assert1(cast<VectorType>(SrcTy)->getNumElements() == cast<VectorType>(DestTy)->getNumElements(),
"UIToFP source and dest vector length mismatch", &I);
visitInstruction(I);
}
void Verifier::visitSIToFPInst(SIToFPInst &I) {
// Get the source and destination types
const Type *SrcTy = I.getOperand(0)->getType();
const Type *DestTy = I.getType();
bool SrcVec = SrcTy->getTypeID() == Type::VectorTyID;
bool DstVec = DestTy->getTypeID() == Type::VectorTyID;
Assert1(SrcVec == DstVec,"SIToFP source and dest must both be vector or scalar", &I);
Assert1(SrcTy->isIntOrIntVector(),"SIToFP source must be integer or integer vector", &I);
Assert1(DestTy->isFPOrFPVector(),"SIToFP result must be FP or FP vector", &I);
if (SrcVec && DstVec)
Assert1(cast<VectorType>(SrcTy)->getNumElements() == cast<VectorType>(DestTy)->getNumElements(),
"SIToFP source and dest vector length mismatch", &I);
visitInstruction(I);
}
void Verifier::visitFPToUIInst(FPToUIInst &I) {
// Get the source and destination types
const Type *SrcTy = I.getOperand(0)->getType();
const Type *DestTy = I.getType();
bool SrcVec = SrcTy->getTypeID() == Type::VectorTyID;
bool DstVec = DestTy->getTypeID() == Type::VectorTyID;
Assert1(SrcVec == DstVec,"FPToUI source and dest must both be vector or scalar", &I);
Assert1(SrcTy->isFPOrFPVector(),"FPToUI source must be FP or FP vector", &I);
Assert1(DestTy->isIntOrIntVector(),"FPToUI result must be integer or integer vector", &I);
if (SrcVec && DstVec)
Assert1(cast<VectorType>(SrcTy)->getNumElements() == cast<VectorType>(DestTy)->getNumElements(),
"FPToUI source and dest vector length mismatch", &I);
visitInstruction(I);
}
void Verifier::visitFPToSIInst(FPToSIInst &I) {
// Get the source and destination types
const Type *SrcTy = I.getOperand(0)->getType();
const Type *DestTy = I.getType();
bool SrcVec = SrcTy->getTypeID() == Type::VectorTyID;
bool DstVec = DestTy->getTypeID() == Type::VectorTyID;
Assert1(SrcVec == DstVec,"FPToSI source and dest must both be vector or scalar", &I);
Assert1(SrcTy->isFPOrFPVector(),"FPToSI source must be FP or FP vector", &I);
Assert1(DestTy->isIntOrIntVector(),"FPToSI result must be integer or integer vector", &I);
if (SrcVec && DstVec)
Assert1(cast<VectorType>(SrcTy)->getNumElements() == cast<VectorType>(DestTy)->getNumElements(),
"FPToSI source and dest vector length mismatch", &I);
visitInstruction(I);
}
void Verifier::visitPtrToIntInst(PtrToIntInst &I) {
// Get the source and destination types
const Type *SrcTy = I.getOperand(0)->getType();
const Type *DestTy = I.getType();
Assert1(isa<PointerType>(SrcTy), "PtrToInt source must be pointer", &I);
Assert1(DestTy->isInteger(), "PtrToInt result must be integral", &I);
visitInstruction(I);
}
void Verifier::visitIntToPtrInst(IntToPtrInst &I) {
// Get the source and destination types
const Type *SrcTy = I.getOperand(0)->getType();
const Type *DestTy = I.getType();
Assert1(SrcTy->isInteger(), "IntToPtr source must be an integral", &I);
Assert1(isa<PointerType>(DestTy), "IntToPtr result must be a pointer",&I);
visitInstruction(I);
}
void Verifier::visitBitCastInst(BitCastInst &I) {
// Get the source and destination types
const Type *SrcTy = I.getOperand(0)->getType();
const Type *DestTy = I.getType();
// Get the size of the types in bits, we'll need this later
unsigned SrcBitSize = SrcTy->getPrimitiveSizeInBits();
unsigned DestBitSize = DestTy->getPrimitiveSizeInBits();
// BitCast implies a no-op cast of type only. No bits change.
// However, you can't cast pointers to anything but pointers.
Assert1(isa<PointerType>(DestTy) == isa<PointerType>(DestTy),
"Bitcast requires both operands to be pointer or neither", &I);
Assert1(SrcBitSize == DestBitSize, "Bitcast requies types of same width", &I);
visitInstruction(I);
}
/// visitPHINode - Ensure that a PHI node is well formed.
///
void Verifier::visitPHINode(PHINode &PN) {
// Ensure that the PHI nodes are all grouped together at the top of the block.
// This can be tested by checking whether the instruction before this is
// either nonexistent (because this is begin()) or is a PHI node. If not,
// then there is some other instruction before a PHI.
Assert2(&PN == &PN.getParent()->front() ||
isa<PHINode>(--BasicBlock::iterator(&PN)),
"PHI nodes not grouped at top of basic block!",
&PN, PN.getParent());
// Check that all of the operands of the PHI node have the same type as the
// result.
for (unsigned i = 0, e = PN.getNumIncomingValues(); i != e; ++i)
Assert1(PN.getType() == PN.getIncomingValue(i)->getType(),
"PHI node operands are not the same type as the result!", &PN);
// All other PHI node constraints are checked in the visitBasicBlock method.
visitInstruction(PN);
}
void Verifier::VerifyCallSite(CallSite CS) {
Instruction *I = CS.getInstruction();
Assert1(isa<PointerType>(CS.getCalledValue()->getType()),
"Called function must be a pointer!", I);
const PointerType *FPTy = cast<PointerType>(CS.getCalledValue()->getType());
Assert1(isa<FunctionType>(FPTy->getElementType()),
"Called function is not pointer to function type!", I);
const FunctionType *FTy = cast<FunctionType>(FPTy->getElementType());
// Verify that the correct number of arguments are being passed
if (FTy->isVarArg())
Assert1(CS.arg_size() >= FTy->getNumParams(),
"Called function requires more parameters than were provided!",I);
else
Assert1(CS.arg_size() == FTy->getNumParams(),
"Incorrect number of arguments passed to called function!", I);
// Verify that all arguments to the call match the function type...
for (unsigned i = 0, e = FTy->getNumParams(); i != e; ++i)
Assert3(CS.getArgument(i)->getType() == FTy->getParamType(i),
"Call parameter type does not match function signature!",
CS.getArgument(i), FTy->getParamType(i), I);
const ParamAttrsList *Attrs = CS.getParamAttrs();
Assert1(!Attrs ||
(Attrs->size() &&
Attrs->getParamIndex(Attrs->size()-1) <= CS.arg_size()),
"Attributes after last argument!", I);
// Verify call attributes.
VerifyFunctionAttrs(FTy, Attrs, I);
if (Attrs && FTy->isVarArg())
// Check attributes on the varargs part.
for (unsigned Idx = 1 + FTy->getNumParams(); Idx <= CS.arg_size(); ++Idx) {
uint16_t Attr = Attrs->getParamAttrs(Idx);
VerifyAttrs(Attr, CS.getArgument(Idx-1)->getType(), false, I);
uint16_t VArgI = Attr & ParamAttr::VarArgsIncompatible;
Assert1(!VArgI, "Attribute " + ParamAttrsList::getParamAttrsText(VArgI) +
"cannot be used for vararg call arguments!", I);
}
visitInstruction(*I);
}
void Verifier::visitCallInst(CallInst &CI) {
VerifyCallSite(&CI);
if (Function *F = CI.getCalledFunction()) {
if (Intrinsic::ID ID = (Intrinsic::ID)F->getIntrinsicID())
visitIntrinsicFunctionCall(ID, CI);
}
}
void Verifier::visitInvokeInst(InvokeInst &II) {
VerifyCallSite(&II);
}
/// visitBinaryOperator - Check that both arguments to the binary operator are
/// of the same type!
///
void Verifier::visitBinaryOperator(BinaryOperator &B) {
Assert1(B.getOperand(0)->getType() == B.getOperand(1)->getType(),
"Both operands to a binary operator are not of the same type!", &B);
switch (B.getOpcode()) {
// Check that logical operators are only used with integral operands.
case Instruction::And:
case Instruction::Or:
case Instruction::Xor:
Assert1(B.getType()->isInteger() ||
(isa<VectorType>(B.getType()) &&
cast<VectorType>(B.getType())->getElementType()->isInteger()),
"Logical operators only work with integral types!", &B);
Assert1(B.getType() == B.getOperand(0)->getType(),
"Logical operators must have same type for operands and result!",
&B);
break;
case Instruction::Shl:
case Instruction::LShr:
case Instruction::AShr:
Assert1(B.getType()->isInteger(),
"Shift must return an integer result!", &B);
Assert1(B.getType() == B.getOperand(0)->getType(),
"Shift return type must be same as operands!", &B);
/* FALL THROUGH */
default:
// Arithmetic operators only work on integer or fp values
Assert1(B.getType() == B.getOperand(0)->getType(),
"Arithmetic operators must have same type for operands and result!",
&B);
Assert1(B.getType()->isInteger() || B.getType()->isFloatingPoint() ||
isa<VectorType>(B.getType()),
"Arithmetic operators must have integer, fp, or vector type!", &B);
break;
}
visitInstruction(B);
}
void Verifier::visitICmpInst(ICmpInst& IC) {
// Check that the operands are the same type
const Type* Op0Ty = IC.getOperand(0)->getType();
const Type* Op1Ty = IC.getOperand(1)->getType();
Assert1(Op0Ty == Op1Ty,
"Both operands to ICmp instruction are not of the same type!", &IC);
// Check that the operands are the right type
Assert1(Op0Ty->isInteger() || isa<PointerType>(Op0Ty),
"Invalid operand types for ICmp instruction", &IC);
visitInstruction(IC);
}
void Verifier::visitFCmpInst(FCmpInst& FC) {
// Check that the operands are the same type
const Type* Op0Ty = FC.getOperand(0)->getType();
const Type* Op1Ty = FC.getOperand(1)->getType();
Assert1(Op0Ty == Op1Ty,
"Both operands to FCmp instruction are not of the same type!", &FC);
// Check that the operands are the right type
Assert1(Op0Ty->isFloatingPoint(),
"Invalid operand types for FCmp instruction", &FC);
visitInstruction(FC);
}
void Verifier::visitExtractElementInst(ExtractElementInst &EI) {
Assert1(ExtractElementInst::isValidOperands(EI.getOperand(0),
EI.getOperand(1)),
"Invalid extractelement operands!", &EI);
visitInstruction(EI);
}
void Verifier::visitInsertElementInst(InsertElementInst &IE) {
Assert1(InsertElementInst::isValidOperands(IE.getOperand(0),
IE.getOperand(1),
IE.getOperand(2)),
"Invalid insertelement operands!", &IE);
visitInstruction(IE);
}
void Verifier::visitShuffleVectorInst(ShuffleVectorInst &SV) {
Assert1(ShuffleVectorInst::isValidOperands(SV.getOperand(0), SV.getOperand(1),
SV.getOperand(2)),
"Invalid shufflevector operands!", &SV);
Assert1(SV.getType() == SV.getOperand(0)->getType(),
"Result of shufflevector must match first operand type!", &SV);
// Check to see if Mask is valid.
if (const ConstantVector *MV = dyn_cast<ConstantVector>(SV.getOperand(2))) {
for (unsigned i = 0, e = MV->getNumOperands(); i != e; ++i) {
Assert1(isa<ConstantInt>(MV->getOperand(i)) ||
isa<UndefValue>(MV->getOperand(i)),
"Invalid shufflevector shuffle mask!", &SV);
}
} else {
Assert1(isa<UndefValue>(SV.getOperand(2)) ||
isa<ConstantAggregateZero>(SV.getOperand(2)),
"Invalid shufflevector shuffle mask!", &SV);
}
visitInstruction(SV);
}
void Verifier::visitGetElementPtrInst(GetElementPtrInst &GEP) {
SmallVector<Value*, 16> Idxs(GEP.idx_begin(), GEP.idx_end());
const Type *ElTy =
GetElementPtrInst::getIndexedType(GEP.getOperand(0)->getType(),
Idxs.begin(), Idxs.end(), true);
Assert1(ElTy, "Invalid indices for GEP pointer type!", &GEP);
Assert2(isa<PointerType>(GEP.getType()) &&
cast<PointerType>(GEP.getType())->getElementType() == ElTy,
"GEP is not of right type for indices!", &GEP, ElTy);
visitInstruction(GEP);
}
void Verifier::visitLoadInst(LoadInst &LI) {
const Type *ElTy =
cast<PointerType>(LI.getOperand(0)->getType())->getElementType();
Assert2(ElTy == LI.getType(),
"Load result type does not match pointer operand type!", &LI, ElTy);
visitInstruction(LI);
}
void Verifier::visitStoreInst(StoreInst &SI) {
const Type *ElTy =
cast<PointerType>(SI.getOperand(1)->getType())->getElementType();
Assert2(ElTy == SI.getOperand(0)->getType(),
"Stored value type does not match pointer operand type!", &SI, ElTy);
visitInstruction(SI);
}
void Verifier::visitAllocationInst(AllocationInst &AI) {
const PointerType *Ptr = AI.getType();
Assert(Ptr->getAddressSpace() == 0,
"Allocation instruction pointer not in the generic address space!");
visitInstruction(AI);
}
/// verifyInstruction - Verify that an instruction is well formed.
///
void Verifier::visitInstruction(Instruction &I) {
BasicBlock *BB = I.getParent();
Assert1(BB, "Instruction not embedded in basic block!", &I);
if (!isa<PHINode>(I)) { // Check that non-phi nodes are not self referential
for (Value::use_iterator UI = I.use_begin(), UE = I.use_end();
UI != UE; ++UI)
Assert1(*UI != (User*)&I ||
!DT->dominates(&BB->getParent()->getEntryBlock(), BB),
"Only PHI nodes may reference their own value!", &I);
}
// Check that void typed values don't have names
Assert1(I.getType() != Type::VoidTy || !I.hasName(),
"Instruction has a name, but provides a void value!", &I);
// Check that the return value of the instruction is either void or a legal
// value type.
Assert1(I.getType() == Type::VoidTy || I.getType()->isFirstClassType(),
"Instruction returns a non-scalar type!", &I);
// Check that all uses of the instruction, if they are instructions
// themselves, actually have parent basic blocks. If the use is not an
// instruction, it is an error!
for (User::use_iterator UI = I.use_begin(), UE = I.use_end();
UI != UE; ++UI) {
Assert1(isa<Instruction>(*UI), "Use of instruction is not an instruction!",
*UI);
Instruction *Used = cast<Instruction>(*UI);
Assert2(Used->getParent() != 0, "Instruction referencing instruction not"
" embeded in a basic block!", &I, Used);
}
for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) {
Assert1(I.getOperand(i) != 0, "Instruction has null operand!", &I);
// Check to make sure that only first-class-values are operands to
// instructions.
Assert1(I.getOperand(i)->getType()->isFirstClassType(),
"Instruction operands must be first-class values!", &I);
if (Function *F = dyn_cast<Function>(I.getOperand(i))) {
// Check to make sure that the "address of" an intrinsic function is never
// taken.
Assert1(!F->isIntrinsic() || (i == 0 && isa<CallInst>(I)),
"Cannot take the address of an intrinsic!", &I);
Assert1(F->getParent() == Mod, "Referencing function in another module!",
&I);
} else if (BasicBlock *OpBB = dyn_cast<BasicBlock>(I.getOperand(i))) {
Assert1(OpBB->getParent() == BB->getParent(),
"Referring to a basic block in another function!", &I);
} else if (Argument *OpArg = dyn_cast<Argument>(I.getOperand(i))) {
Assert1(OpArg->getParent() == BB->getParent(),
"Referring to an argument in another function!", &I);
} else if (GlobalValue *GV = dyn_cast<GlobalValue>(I.getOperand(i))) {
Assert1(GV->getParent() == Mod, "Referencing global in another module!",
&I);
} else if (Instruction *Op = dyn_cast<Instruction>(I.getOperand(i))) {
BasicBlock *OpBlock = Op->getParent();
// Check that a definition dominates all of its uses.
if (!isa<PHINode>(I)) {
// Invoke results are only usable in the normal destination, not in the
// exceptional destination.
if (InvokeInst *II = dyn_cast<InvokeInst>(Op)) {
OpBlock = II->getNormalDest();
Assert2(OpBlock != II->getUnwindDest(),
"No uses of invoke possible due to dominance structure!",
Op, II);
// If the normal successor of an invoke instruction has multiple
// predecessors, then the normal edge from the invoke is critical, so
// the invoke value can only be live if the destination block
// dominates all of it's predecessors (other than the invoke) or if
// the invoke value is only used by a phi in the successor.
if (!OpBlock->getSinglePredecessor() &&
DT->dominates(&BB->getParent()->getEntryBlock(), BB)) {
// The first case we allow is if the use is a PHI operand in the
// normal block, and if that PHI operand corresponds to the invoke's
// block.
bool Bad = true;
if (PHINode *PN = dyn_cast<PHINode>(&I))
if (PN->getParent() == OpBlock &&
PN->getIncomingBlock(i/2) == Op->getParent())
Bad = false;
// If it is used by something non-phi, then the other case is that
// 'OpBlock' dominates all of its predecessors other than the
// invoke. In this case, the invoke value can still be used.
if (Bad) {
Bad = false;
for (pred_iterator PI = pred_begin(OpBlock),
E = pred_end(OpBlock); PI != E; ++PI) {
if (*PI != II->getParent() && !DT->dominates(OpBlock, *PI)) {
Bad = true;
break;
}
}
}
Assert2(!Bad,
"Invoke value defined on critical edge but not dead!", &I,
Op);
}
} else if (OpBlock == BB) {
// If they are in the same basic block, make sure that the definition
// comes before the use.
Assert2(InstsInThisBlock.count(Op) ||
!DT->dominates(&BB->getParent()->getEntryBlock(), BB),
"Instruction does not dominate all uses!", Op, &I);
}
// Definition must dominate use unless use is unreachable!
Assert2(DT->dominates(OpBlock, BB) ||
!DT->dominates(&BB->getParent()->getEntryBlock(), BB),
"Instruction does not dominate all uses!", Op, &I);
} else {
// PHI nodes are more difficult than other nodes because they actually
// "use" the value in the predecessor basic blocks they correspond to.
BasicBlock *PredBB = cast<BasicBlock>(I.getOperand(i+1));
Assert2(DT->dominates(OpBlock, PredBB) ||
!DT->dominates(&BB->getParent()->getEntryBlock(), PredBB),
"Instruction does not dominate all uses!", Op, &I);
}
} else if (isa<InlineAsm>(I.getOperand(i))) {
Assert1(i == 0 && (isa<CallInst>(I) || isa<InvokeInst>(I)),
"Cannot take the address of an inline asm!", &I);
}
}
InstsInThisBlock.insert(&I);
}
/// visitIntrinsicFunction - Allow intrinsics to be verified in different ways.
///
void Verifier::visitIntrinsicFunctionCall(Intrinsic::ID ID, CallInst &CI) {
Function *IF = CI.getCalledFunction();
Assert1(IF->isDeclaration(), "Intrinsic functions should never be defined!",
IF);
#define GET_INTRINSIC_VERIFIER
#include "llvm/Intrinsics.gen"
#undef GET_INTRINSIC_VERIFIER
switch (ID) {
default:
break;
case Intrinsic::gcroot:
case Intrinsic::gcwrite:
case Intrinsic::gcread: {
Type *PtrTy = PointerType::getUnqual(Type::Int8Ty),
*PtrPtrTy = PointerType::getUnqual(PtrTy);
switch (ID) {
default:
break;
case Intrinsic::gcroot:
Assert1(CI.getOperand(1)->getType() == PtrPtrTy,
"Intrinsic parameter #1 is not i8**.", &CI);
Assert1(CI.getOperand(2)->getType() == PtrTy,
"Intrinsic parameter #2 is not i8*.", &CI);
Assert1(isa<AllocaInst>(
IntrinsicInst::StripPointerCasts(CI.getOperand(1))),
"llvm.gcroot parameter #1 must be an alloca.", &CI);
Assert1(isa<Constant>(CI.getOperand(2)),
"llvm.gcroot parameter #2 must be a constant.", &CI);
break;
case Intrinsic::gcwrite:
Assert1(CI.getOperand(1)->getType() == PtrTy,
"Intrinsic parameter #1 is not a i8*.", &CI);
Assert1(CI.getOperand(2)->getType() == PtrTy,
"Intrinsic parameter #2 is not a i8*.", &CI);
Assert1(CI.getOperand(3)->getType() == PtrPtrTy,
"Intrinsic parameter #3 is not a i8**.", &CI);
break;
case Intrinsic::gcread:
Assert1(CI.getOperand(1)->getType() == PtrTy,
"Intrinsic parameter #1 is not a i8*.", &CI);
Assert1(CI.getOperand(2)->getType() == PtrPtrTy,
"Intrinsic parameter #2 is not a i8**.", &CI);
break;
}
Assert1(CI.getParent()->getParent()->hasCollector(),
"Enclosing function does not specify a collector algorithm.",
&CI);
} break;
case Intrinsic::init_trampoline:
Assert1(isa<Function>(IntrinsicInst::StripPointerCasts(CI.getOperand(2))),
"llvm.init_trampoline parameter #2 must resolve to a function.",
&CI);
break;
}
}
/// VerifyIntrinsicPrototype - TableGen emits calls to this function into
/// Intrinsics.gen. This implements a little state machine that verifies the
/// prototype of intrinsics.
void Verifier::VerifyIntrinsicPrototype(Intrinsic::ID ID,
Function *F,
unsigned Count, ...) {
va_list VA;
va_start(VA, Count);
const FunctionType *FTy = F->getFunctionType();
// For overloaded intrinsics, the Suffix of the function name must match the
// types of the arguments. This variable keeps track of the expected
// suffix, to be checked at the end.
std::string Suffix;
if (FTy->getNumParams() + FTy->isVarArg() != Count - 1) {
CheckFailed("Intrinsic prototype has incorrect number of arguments!", F);
return;
}
// Note that "arg#0" is the return type.
for (unsigned ArgNo = 0; ArgNo < Count; ++ArgNo) {
MVT::ValueType VT = va_arg(VA, MVT::ValueType);
if (VT == MVT::isVoid && ArgNo > 0) {
if (!FTy->isVarArg())
CheckFailed("Intrinsic prototype has no '...'!", F);
break;
}
const Type *Ty;
if (ArgNo == 0)
Ty = FTy->getReturnType();
else
Ty = FTy->getParamType(ArgNo-1);
unsigned NumElts = 0;
const Type *EltTy = Ty;
if (const VectorType *VTy = dyn_cast<VectorType>(Ty)) {
EltTy = VTy->getElementType();
NumElts = VTy->getNumElements();
}
if ((int)VT < 0) {
int Match = ~VT;
if (Match == 0) {
if (Ty != FTy->getReturnType()) {
CheckFailed("Intrinsic parameter #" + utostr(ArgNo-1) + " does not "
"match return type.", F);
break;
}
} else {
if (Ty != FTy->getParamType(Match-1)) {
CheckFailed("Intrinsic parameter #" + utostr(ArgNo-1) + " does not "
"match parameter %" + utostr(Match-1) + ".", F);
break;
}
}
} else if (VT == MVT::iAny) {
if (!EltTy->isInteger()) {
if (ArgNo == 0)
CheckFailed("Intrinsic result type is not "
"an integer type.", F);
else
CheckFailed("Intrinsic parameter #" + utostr(ArgNo-1) + " is not "
"an integer type.", F);
break;
}
unsigned GotBits = cast<IntegerType>(EltTy)->getBitWidth();
Suffix += ".";
if (EltTy != Ty)
Suffix += "v" + utostr(NumElts);
Suffix += "i" + utostr(GotBits);;
// Check some constraints on various intrinsics.
switch (ID) {
default: break; // Not everything needs to be checked.
case Intrinsic::bswap:
if (GotBits < 16 || GotBits % 16 != 0)
CheckFailed("Intrinsic requires even byte width argument", F);
break;
}
} else if (VT == MVT::fAny) {
if (!EltTy->isFloatingPoint()) {
if (ArgNo == 0)
CheckFailed("Intrinsic result type is not "
"a floating-point type.", F);
else
CheckFailed("Intrinsic parameter #" + utostr(ArgNo-1) + " is not "
"a floating-point type.", F);
break;
}
Suffix += ".";
if (EltTy != Ty)
Suffix += "v" + utostr(NumElts);
Suffix += MVT::getValueTypeString(MVT::getValueType(EltTy));
} else if (VT == MVT::iPTR) {
if (!isa<PointerType>(Ty)) {
if (ArgNo == 0)
CheckFailed("Intrinsic result type is not a "
"pointer and a pointer is required.", F);
else
CheckFailed("Intrinsic parameter #" + utostr(ArgNo-1) + " is not a "
"pointer and a pointer is required.", F);
break;
}
} else if (MVT::isVector(VT)) {
// If this is a vector argument, verify the number and type of elements.
if (MVT::getVectorElementType(VT) != MVT::getValueType(EltTy)) {
CheckFailed("Intrinsic prototype has incorrect vector element type!",
F);
break;
}
if (MVT::getVectorNumElements(VT) != NumElts) {
CheckFailed("Intrinsic prototype has incorrect number of "
"vector elements!",F);
break;
}
} else if (MVT::getTypeForValueType(VT) != EltTy) {
if (ArgNo == 0)
CheckFailed("Intrinsic prototype has incorrect result type!", F);
else
CheckFailed("Intrinsic parameter #" + utostr(ArgNo-1) + " is wrong!",F);
break;
} else if (EltTy != Ty) {
if (ArgNo == 0)
CheckFailed("Intrinsic result type is vector "
"and a scalar is required.", F);
else
CheckFailed("Intrinsic parameter #" + utostr(ArgNo-1) + " is vector "
"and a scalar is required.", F);
}
}
va_end(VA);
// If we computed a Suffix then the intrinsic is overloaded and we need to
// make sure that the name of the function is correct. We add the suffix to
// the name of the intrinsic and compare against the given function name. If
// they are not the same, the function name is invalid. This ensures that
// overloading of intrinsics uses a sane and consistent naming convention.
if (!Suffix.empty()) {
std::string Name(Intrinsic::getName(ID));
if (Name + Suffix != F->getName())
CheckFailed("Overloaded intrinsic has incorrect suffix: '" +
F->getName().substr(Name.length()) + "'. It should be '" +
Suffix + "'", F);
}
}
//===----------------------------------------------------------------------===//
// Implement the public interfaces to this file...
//===----------------------------------------------------------------------===//
01392 FunctionPass *llvm::createVerifierPass(VerifierFailureAction action) {
return new Verifier(action);
}
// verifyFunction - Create
01398 bool llvm::verifyFunction(const Function &f, VerifierFailureAction action) {
Function &F = const_cast<Function&>(f);
assert(!F.isDeclaration() && "Cannot verify external functions");
FunctionPassManager FPM(new ExistingModuleProvider(F.getParent()));
Verifier *V = new Verifier(action);
FPM.add(V);
FPM.run(F);
return V->Broken;
}
/// verifyModule - Check a module for errors, printing messages on stderr.
/// Return true if the module is corrupt.
///
01412 bool llvm::verifyModule(const Module &M, VerifierFailureAction action,
std::string *ErrorInfo) {
PassManager PM;
Verifier *V = new Verifier(action);
PM.add(V);
PM.run((Module&)M);
if (ErrorInfo && V->Broken)
*ErrorInfo = V->msgs.str();
return V->Broken;
}
// vim: sw=2
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ece34605c058195ed03b4d393ef1a36c
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-1,053,456,384,896,026,900 |
JSP/Servlet | 서블릿과 JSP/HTML | 응용 프로그램에 값을 저장
HttpServletRequest와 HttpSession은 이용 가능한 범위(scope라고 한다)가 다르다. HttpServletRequest는 현재 요청이 있는 동안만 존재한다. HttpSession은 세션이 연결되어 있는 동안 항상 존재한다. 이 두가지를 사용 구분하여 “어느 범위에서 값을 저장하고 계속되는지"를 생각해서 데이터 보존이 가능하다.
사실은 이 외에도 값을 저장할 수 있는 또 다른 것이 있다. 그것은 “ServletContext"라는 것이다. 이것은이 Web 어플리케이션 자체를 관리하는 클래스이다. 여기에 보관된 값이 Web 응용 프로그램이 있는 동안에 계속 보관하여 유지한다.
여기서 중요한 것은 “이것은 1개 밖에 없다"는 점이다. HttpServletRequest와 HttpSession는 액세스하는 클라이언트마다 준비된다. 즉, 동시에 여러 사람이 사용하더라도 각각 다른 개체가 준비되어 개별적으로 값이 저장된다.
그런데 ServletContext는 Web 응용 프로그램에 하나 밖에 존재하지 않는다. 이는 누가 접근해도 모두 같은 인스턴스에 액세스한다는 것이다. 즉, 거기에 저장된 값은 누가 접근하더라도 같은 것이 얻게 된다는 것이다.
이를 이용하면 “모두가 공유할 수 있는 데이터"를 쉽게 가질 수 있다. 실제로 해보도록 하자.
hello.jsp
<%@ page language="java" contentType="text/html; charset=utf-8"
pageEncoding="utf-8"%>
<%@ page import="java.util.ArrayList" %>
<!DOCTYPE html>
<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=utf-8">
<title>Sample jsp</title>
<style>
h1{
font-size: 16pt;
background: #AAFFAA;
padding: 5px;
}
table tr td {
background: #DDFFDD;
padding: 2px;
}
</style>
</head>
<body>
<h1>Hello App Engine!</h1>
<hr>
<p id="msg">메시지:</p>
<form method="post" action="/mygaeapp">
<table>
<tr>
<td>입력</td>
<td><input type="text" id="input" name="text1"></td>
</tr>
<tr>
<td></td>
<td><input type="submit" value="전송"></td>
</tr>
</table>
</form>
<hr>
<table>
<%
ArrayList<String> datas = (ArrayList<String>)application.getAttribute("datas");
if (datas != null){
for(String str : datas){
out.println("<tr><td>" + str + "</td></tr>");
}
}
%>
</table>
</body>
</html>
MyGaeAppServlet.java
package com.devkuma.mygaeapp;
import java.io.*;
import java.util.ArrayList;
import javax.servlet.ServletContext;
import javax.servlet.http.*;
@SuppressWarnings("serial")
public class MyGaeAppServlet5 extends HttpServlet {
public void doGet(HttpServletRequest request, HttpServletResponse response) throws IOException {
response.setContentType("text/plain");
request.setCharacterEncoding("utf8");
response.setCharacterEncoding("utf8");
PrintWriter out = response.getWriter();
out.println("Hello, world!");
}
public void doPost(HttpServletRequest request, HttpServletResponse response) throws IOException {
response.setContentType("text/html");
request.setCharacterEncoding("utf8");
response.setCharacterEncoding("utf8");
String param = request.getParameter("text1");
ServletContext application = this.getServletContext();
ArrayList<String> datas = (ArrayList<String>) application.getAttribute("datas");
if (datas == null) {
datas = new ArrayList<String>();
}
datas.add(param);
application.setAttribute("datas", datas);
response.sendRedirect("/hello.jsp");
}
}
위에 예제는 전송된 메시지를 ArrayList에 보관한다. 이곳 저곳의 PC에서 액세스하여 메시지를 입력해서 전송해 보자. 모두가 입력한 모든 데이터가 저장되며, 모든 브라우저에 동일한 데이터가 표시되는 것을 알 수 있을 것이다.
ServletContext는 서블릿에서 this에 준비되어 있는 메소드를 호출해 가져온다.
ServletContext application = this.getServletContext();
JSP는 더 간단하다. “application"라는 암묵적 개체로 준비되어 있기 때문에, 그것을 그대로 사용하면 된다.
이 ServletContext에도 역시 “setAttribute”, “getAttribute"라는 메소드가 준비되어 있으며, 값을 저장하고 얻어올 수 있다. 사용법은 HttpServletRequest 등과 완전 동일하다.
이 “HttpServletRequest”, “HttpSession”, “ServletContext"의 3개의 클래스를 구분하여 다양한 형태로 값을 저장할 수 있다. 서블릿과 JSP에서 필요한 값을 주고 받을 때, 이것들은 매우 중요하다. 이 3개는 세트로 기억해 두도록 하자.
|
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ece34605c058195ed03b4d393ef1a36c
|
-4,699,429,738,125,756,000 |
How do you feel about people on Instagram, TikTok and other similar social networks?
How do you feel about people on Instagram, TikTok and other similar social networks?
They Web Scraped 235 MILLION YouTube, Instagram and TikTok Accounts and Left their Database Exposed
Previous questionI want to shoot videos for YouTube, but I can't choose a subject. Where to start and how?
Next questionHow to promote a YouTube channel?
answers (2)
Answer 1
May, 2021
Such people are called "sociobl * dyami". When they do not understand why they beg for stupid likes, subscribe to all sorts of skins on Instagram, force their acquaintances to subscribe to their Instagram that nobody needs. On Instagram, in general, most of the girls are botox tanned stuffed animals, on which only a dead cattle stand, which in life has seen only fat ones, as they are called - "women".
I generally condemn such a craving for the distribution of their semi-intimate photos for everyone to see. Especially if your girlfriend is a fan of Instagram, then she has a tendency to cheat, because she thinks in the image: "as many people as possible should see my beauty until I grow old. Or maybe not only see ..." (As they say: for now young - ride all the x * pax, there will be something to remember).
Tik Tok and others are generally a separate caste of underdeveloped personalities. I never went there (I never regret it), but sometimes a Tik-tok advertisement is played on YouTube in the form of one short video of one of the users of this monkey house, and so, judging by these mini videos, there is such a beaten off target audience, with terrible humor, "mainstream" behavior, ugh bl ....
Although the above does not apply to Instagram users who post something neutral there, for example, veterinarians post photos of their animal patients, or some carpenters and others the wizards show how and how - there are no complaints about these at all.
Answer 2
May, 2021
You can sit in different ways.
Someone makes money there, for someone it’s work, for others it’s a way to promote their products.
Or, as my friend, just takes pictures or draws and puts her creations there.
She does not sit for hours, does not like other people's photos for days, she just did the job - and exhibited.
Of course, there are completely unique personalities who are not they do nothing productive there at all.
spend hours looking at someone else's life, for some reason trying to collect more likes but don't do anything about it, follow other people fanatically, and so on.
This is common senseless contemplation, like watching TV for days, only instead of it - instagram.
Well .. I usually don't intersect with such people. we have nothing in common.
They will be bored with me, and I - with them.
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|
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ece34605c058195ed03b4d393ef1a36c
|
1,603,814,367,578,226,000 |
1
$\begingroup$
I want to solve this 2nd order ODE with two initial conditions close to the origin (one to the function and the other to its derivative) and more two similar conditions for an endpoint.
c = 0.5;
rzer = 0.001;
rmax = 10.000;
vmax = 0.550718236126181`;
dmax = -0.032852103365844154`;
shc0 =
NDSolve[
{y''[r] + (1.` Csch[1.` r] - 1.25` Tanh[0.5` r]^2) y'[r] +
(-0.00048828125` Csch[0.5` r]^2 Sech[0.5` r]^4
(14.` + 139.` Cosh[1.` r] - 30.` Cosh[2.` r] + 5.` Cosh[3.` r] +
32.` Sinh[1.` r] - 16.` Sinh[2.` r])) y[r] == 0,
y[rzer] == rzer, y'[rzer] == rzer, y[rmax] == vmax, y'[rmax] == dmax},
y[r], {r, rzer, rmax}]
But Mathematica 10 returns the message:
NDSolve::nlnum1 The function value {-0.001,-0.001,-0.550718,0.0328521} is not a list of numbers with dimensions {2} when the arguments are {0.,0.,0.,0.,0.,0.}.
My code only returns solutions when two values are fixed. Is there no way to solve this with the default method?
The aim of this problem was find a solution with these initial conditions (y'(0)=y(0)=0) that connects smoothly (preserves the slope) with an exponentially decreasing solution asymptotically, so have a finite integration in the interval with value greater that precision rzer (0.001).
I suppose that is not possible obtain a solution that satisfies all conditions imposed.
enter image description here
Thanks again.
$\endgroup$
1
$\begingroup$
The limit of two boundary conditions is not imposed by Mathematica. Rather, it is intrinsic to solving 2nd order ODEs. So, the number of boundary conditions must be reduced to two. Begin with the boundary condition at large r. According to the figure in the question, the solution should go asymptotically to zero there. The expression in the question, with numbers rationalized, is
eq = y''[r] + (Csch[ r] - 5/4 Tanh[r/2]^2) y'[r] + (-1/2048 Csch[r/2]^2 Sech[r/2]^4
(14 + 139 Cosh[r] - 30 Cosh[2 r] + 5 Cosh[3 r] + 32 Sinh[r] - 16 Sinh[2 r])) y[r];
With
rzer = 1/1000; rmax = 30;
the coefficients in eq can be plotted as
Plot[Evaluate[Coefficient[eq, #] & /@ {y''[r], y'[r], y[r]}], {r, rzer, rmax}]
enter image description here
Because the coefficients become constant asymptotically, the ODE easily is solved for large r.
coef = Limit[Coefficient[eq, #], r -> Infinity] & /@ {y''[r], y'[r], y[r]}
(* {1, -(5/4), -(5/64)} *)
DSolve[coef.{y''[r], y'[r], y[r]} == 0, y[r], r]
(* {{y[r] -> E^((5/8 - Sqrt[15/2]/4) r) C[1] + E^((5/8 + Sqrt[15/2]/4) r) C[2]}} *)
Clearly, the exponentially decaying solution is desired. Obtain its decay rate.
exp = Cases[%, Exp[z_] -> z/r, {0, Infinity}][[1]]
(* 5/8 - Sqrt[15/2]/4 *)
The boundary condition that fits the numerical solution at small r to the asymptotic solution is
y'[rmax] - exp y[rmax] == 0
Because the ODE is singular at the origin, a plausible boundary condition at rzer is that suggested by the OP
y[rzer] == rzer
With these boundary conditions,
s = First@NDSolve[{eq == 0, y[rzer] == rzer, y'[rmax] == exp y[rmax]},
y, {r, rzer, rmax}, WorkingPrecision -> 45];
Plot[y[r] /. s, {r, rzer, rmax}, PlotRange -> All, AxesLabel -> {r, y}]
enter image description here
Addendum
Expanding the ODE at r == 0,
Series[eq, {r, 0, 1}] // Normal
(* - y[0]/(4*r^2) + (3*Derivative[1][y][0])/(4*r) + (y[0]/12 + 15*Derivative[2][y][0]/8) +
(r*(3*y[0] - 8*Derivative[1][y][0] + 140*Derivative[3][y][0]))/96 *)
shows that not only the ODE but also its solution is singular at the origin. For that reason, it might make more sense to use
vmax = Rationalize[0.550718236126181, 0];
y[10] = vmax
as the second boundary condition. Then, with rmax increased to 50.
s = First@NDSolve[{eq == 0, y[10] == vmax, y'[rmax] - exp y[rmax] == 0},
y, {r, rzer, rmax}, WorkingPrecision -> 55, MaxSteps -> 100000];
Plot[y[r] /. s, {r, rzer, rmax}, AxesLabel -> {r, y}]
enter image description here
This second solution is not better than the first in this answer, just rescaled. Note that further increasing rmax requires that WorkingPrecision also be increased, which makes the computation quite slow.
| improve this answer | |
$\endgroup$
• $\begingroup$ It is clear now, bbgodfrey. Is also required that these null conditions at origin be zero by other arguments exterior to numerical evaluation of problem. In this context, is not possible find a solution that obey the boundary conditions and that the area of its curve be non zero within the precision limit assumed to rzer. $\endgroup$ – Melina A.H Oct 11 '15 at 18:07
• $\begingroup$ @MelinaA.H You are correct that setting both y[0] == 0 and y'[0] == 0 results in y[r] -> 0. This is true of any homogeneous 2nd order ODE system that is not an eigenvalue problem. $\endgroup$ – bbgodfrey Oct 11 '15 at 18:16
2
$\begingroup$
Trying using the following code. You can use three boundary values, but notice the same solution if you substitute the fourth boundary involving y'[rmax]=dmax. To this end, one of the boundaries is redundant.
c = 0.5;
rzer = 0.001;
rmax = 10.;
vmax = 0.550718236126181;
dmax = -0.032852103365844154;
sols =
(First[
NDSolve[{Derivative[2][y][
r] + (1.*Csch[1.*r] - 1.25*Tanh[0.5*r]^2)*
Derivative[1][y][
r] + (-0.00048828125*Csch[0.5*r]^2*Sech[0.5*r]^4*
(14. + 139.*Cosh[1.*r] - 30.*Cosh[2.*r] +
5.*Cosh[3.*r] + 32.*Sinh[1.*r] - 16.*Sinh[2.*r]))*y[r] ==
0, y[rzer] == rzer, y[rmax] == vmax}, y, r,
Method -> {"Shooting",
"StartingInitialConditions" -> {y[rzer] == rzer,
Derivative[1][y][rzer] == #1}}]] & ) /@ {rzer}
Plot the output using
Plot[Evaluate[y[r] /. sols], {r, rzer, rmax}, PlotRange -> {0, 0.6}]
enter image description here
With regard to your last answer, you can consider a second region r> 10, and then just use the last boundary condition. No need to employ the shooting method:
c = 0.5; rzer = 0.001; rmax = 10.; vmax = 0.550718236126181; dmax = \
-0.032852103365844154;
sols2 =
NDSolve[{Derivative[2][y][r] + (1.*Csch[1.*r] - 1.25*Tanh[0.5*r]^2)*
Derivative[1][y][r] +
(-0.00048828125*Csch[0.5*r]^2*
Sech[0.5*r]^4*(14. + 139.*Cosh[1.*r] - 30.*Cosh[2.*r] +
5.*Cosh[3.*r] + 32.*Sinh[1.*r] - 16.*Sinh[2.*r]))*y[r] == 0,
y[rmax] == vmax, Derivative[1][y][rmax] == dmax},
y, {r, 10, 30}]
Notice that r > = 10
| improve this answer | |
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ece34605c058195ed03b4d393ef1a36c
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4,235,677,137,661,246,000 |
Skip links
A Brief History of Color and How We View It on Computers
Aristotle (384-322 BCE) attempted to explain the composition of colors and how they were related. Hue identification included white, black, red, yellow, brown, violet, green and blue. He assumed colors were derived from blending of sunlight, fire, light and lack of light in varying degrees. We now know a more scientific approach to how colors are seen and created and this depends on the medium (reflective wavelengths for pigments, the mixing of colored light for computers and tv’s, or the relation of colors to one another).
Additive color, what computers use, are created with light. It begins with black and ends with white; as more color is added the result is lighter and tends to white. Red, green and blue are light primaries and percentages of these primaries are used to generate color on a computer screen.
It’s important to know that the visible spectrum consists of billions of colors, a monitor can display millions, a high quality printer is only capable of producing thousands and older computer systems may be limited to 216 cross-platform colors.
Reproducing color can be problematic with regard to printed, digital media because what we see is not completely possible to get. Although a monitor may be able to display ‘true color’ (16,000,000 colors), millions of these colors are outside of the spectrum available to printers. Since digital designs are generated using the RGB color system, colors used in those designs must be part of the CMYK spectrum or they will not be reproduced with proper color rendering. Working within the CMYK color system, or choosing colors from Pantone© palettes insures proper color rendering.
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ece34605c058195ed03b4d393ef1a36c
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-3,145,759,674,496,572,400 |
sorting srpms by buildorder
May 17, 2013
Hey folks,
Working on something for Spot I revived some code I had written a
few years ago and then discovered that other people had made much more
robust leveled topological sorts than I had written 🙂
Anyway – if you grab the files from:
http://skvidal.fedorapeople.org/misc/buildorder/
And run:
python buildorder.py /path/to/*.src.rpm
it will look up the interdependencies of the src.rpm to figure out a
build order. It outputs a bunch of different things:
1. a flat build order
2. a build order broken out by groups – you can build all the pkgs in
any group in parallel provided that all the pkgs in the previous group
have finished building.
3. outputs lists of direct loops between srpms.
4. probably will output A LOT of noise and garbage from the rpm
specfile parsing from the rpm.spec() module
But it might be worth a look at and, ideally, patches to make it a bit
more robust.
If you have a set of pkgs which you need to build but you can’t figure
out the buildorder this might help you out.
I’d love to know how often it is right or ‘right enough’.
Known Issues:
1. some spec files make the rpm.spec() parsing break in interesting
ways – sometimes tracing back 🙂
2. if a pkg is not dependent on any other pkg and nothing else depends
on it – they get lumped in the last grouping. Not really an issue –
just something someone noticed and was surprised.
3. It will handle file-buildreqs not at all, it will handle virtual
provide buildreqs, not at all, if your buildreqs are REALLY picky about
requiring <= Version – it will ignore all of that. 🙂
4. I fully expect that 2 or more level circular build deps (foo req bar
req baz req quux) will not be detected but will make the topological
sort function die). If so…. tough… go fix your packaging.
Anyway – give it a run and see if it helps you solve a problem.
If it does let me know about it. Some of us are curious if this could
fit well in mockchain or wrapped around/in mockchain.
Advertisements
3 Responses to “sorting srpms by buildorder”
1. You mentioned other efforts: were they also rpm based?
How about putting the code into git? 🙂
• skvidal Says:
the only other attempts I’ve seen to do this are rpm-based, yah.
Since the 2 pieces of code doing the topo sort aren’t mine I wasn’t quite sure if I should stuff it into git or not. I also need to verify license compatibility
I’ll check on that tomorrow and see if I can get it into git.
I assume this means you have patches 🙂
• skvidal Says:
Thinking about it a bit more – this code fits into the mock/mockchain framework pretty obviously. If I can verify license compatibility it might make sense to check it into mock’s git repo and work on integrating it.
Thoughts?
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Sign up ×
Server Fault is a question and answer site for system and network administrators. It's 100% free, no registration required.
I want to connect to my rdp but when i want to logon in my remote desktop , after puting user and pass i get this error :
the terminal server has exceeded the maximum number of allowed connections
my server : windows 2003 . what am i going to do ? please help me . Thanks in advance
share|improve this question
2 Answers 2
I'm guessing you're running in the default mode where it only allows two simultaneous connections. There are already two idle sessions connected, so you probably just need to fire up Terminal Server manager and kill one (or more) of the idle sessions. You'll be able to connect after doing this.
share|improve this answer
how can i kill one of the sessions ? thanks – Eva Jun 22 '10 at 15:23
From the horse's mouth: technet.microsoft.com/en-us/library/cc759296(WS.10).aspx – EEAA Jun 22 '10 at 15:26
Connect to the server's console via RDP then fire up Terminal Services Manager to kill off one of the two in-use sessions (which are probably idle due to someone forgetting to log off).
mstsc /admin /v:serverName
share|improve this answer
yikes. My answer is startling similar to ErikA's. Honest, I was slowly typing while watching a horrible webinar, not plagiarizing! – Chris_K Jun 22 '10 at 15:40
Happens all the time. Don't worry about it. – Chris S Jun 22 '10 at 15:44
No problem at all. – EEAA Jun 22 '10 at 16:09
Your Answer
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ece34605c058195ed03b4d393ef1a36c
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3,119,584,249,430,928,400 |
Skip to end of metadata
Go to start of metadata
SoftNAS Cloud® is available for various industry platforms, with a focus on local storage management interfaces and requirements. Platform-specific configuration will be explained in dedicated sub-sections of this guide, but most SoftNAS Cloud® installations begin the same way.
Note: Regardless of underlying platform, SoftNAS Cloud® will require the ability to access the Internet for software updates, activation, etc. For this case, enabling only outbound TCP traffic to the softnas.com domain is required.
Setting Up SoftNAS Cloud®
1. Open a web browser and enter the SoftNAS website link https://www.softnas.com/ in the Address bar.
The SoftNAS home page will be displayed.
2. For a free trial period, click the Try Now option at the bottom of the main SoftNAS.com screen.
3. Click through for the desired product registration and download if applicable. Follow the wizards and prompts to register and configure a local SoftNAS platform and GUI. Depending on platform chosen, the next steps may differ slightly; however, the steps are designed to be intuitive with industry best practices.
SoftNAS Cloud®, SoftNAS StorageCenter™, SnapReplicate™, and SNAP HA™ are trademarks of SoftNAS Inc.. All other trademarks referred to in this guide are owned by their respective companies.
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ece34605c058195ed03b4d393ef1a36c
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Wikia
WoWWiki
Changes: API Frame SetBackdrop
Edit
Back to page
m (catfix, Replaced: {{widgetmethod}} → {{widgetmethod}}<br>)
m (catfix, Replaced: {{widgetmethod}}<br> → {{widgetmethod}})
Line 1: Line 1:
{{widgetmethod}}<br>
+
{{widgetmethod}}
Latest revision as of 23:55, July 14, 2008
Widget API ← Frame < SetBackdrop
Frame:SetBackdrop( {
bgFile = "bgFile",
edgeFile = "edgeFile", tile = false, tileSize = 0, edgeSize = 32,
insets = { left = 0, right = 0, top = 0, bottom = 0 }
});
Using 'nil' as the only parameter will remove the backdrop on the indicated frame.
Arguments Edit
bgFile
String - Which texture file to use as frame background (.blp or .tga format)
edgeFile
String- Which texture file to use as frame edge blp or .tga format)
tile
Boolean - whether background texture is tiled or streched
tileSize
Number - Control how large each copy of the bgFile becomes on-screen
edgeSize
Number - Control how large each copy of the edgeFile becomes on-screen (i.e. border thickness and corner size)
insets
4 x Number - Controls how far into the frame the background will be drawn (use higher values the thicker the edges are)
Example Edit
MinimapCluster:SetBackdrop({bgFile = "Interface/Tooltips/UI-Tooltip-Background",
edgeFile = "Interface/Tooltips/UI-Tooltip-Border",
tile = true, tileSize = 16, edgeSize = 16,
insets = { left = 4, right = 4, top = 4, bottom = 4 }});
MinimapCluster:SetBackdropColor(0,0,0,1);
See Also Edit
Around Wikia's network
Random Wiki
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Incorrect line number on E303 errors on test files #60
Closed
cangove opened this Issue · 6 comments
2 participants
Chris Angove Florent Xicluna
Chris Angove
When running the E30.py test file I noticed an incorrect message. I boiled it down to a simple example. If you use the following example:
print
#: E303
def a():
print
# comment
print
#:
When you run pep8 on it you get:
test2.py:3:1: E302 expected 2 blank lines, found 0
test2.py:9:5: E303 too many blank lines (2>1)
If you notice the first report is genuine but the second report says 2>1 but points to the line for print. First that is 1 blank line not 2 and second the violation is actually on 7 the comment line. When you manually remove line 6 it no longer detects the error as expected. So it seems it's a problem with the line number reported.
Chris Angove
It seems to only happen when you have a comment in there. If that line is replaces by code like 'pass' then it detects the correct line. So looking at the output I think the issue is its skipping the comments and reporting the wrong end number.
Florent Xicluna
Collaborator
It is a little annoyance.
It prints the line number of the next non-comment instruction after the blank lines.
Chris Angove
Could it be fixed not to do that? There is a pull request to allow auto-fixing and this breaks that ability because we do not know the actual line numbers of the error. As far as PEP-8 is concerned comments are just like lines of code (for the spacing/empty line rules) and should report the same, no?
Florent Xicluna
Collaborator
Well we had an issue with comments between block of codes.
For example this piece of code gave spurious errors before.
a = 42
# This function is a stub. Need more work.
def foo():
pass
See cburroughs/pep8.py#10 for details.
However if someone provides a patch, I can review it.
Chris Angove
I think the problem is that we skip comment lines but we should really treat them the same as code, no? For example if the comment line above was just a line of code as far as pep8 was concerned it would pass, as would my example. It seems the fix was to skip comments but keep track of them which does indeed fix issue #10 but can cause confusion.
So why not just simplify and treat a comment line as any other line of code?
Florent Xicluna
Collaborator
So why not just simplify and treat a comment line as any other line of code?
There's a check to verify that top-level classes and functions are preceded with 2 blank lines, and that other classes and function definitions are preceded with 1 blank line.
For example the previous example cannot be checked properly if we treat comments as code.
Following case show the similar difficulty:
a = 42
# Now how do you check that top-level function are separated by 2 blank lines?
def foo():
pass
See also testsuite/E30.pyand testsuite/E30not.py.
If you have a patch, it should pass these tests.
Florent Xicluna florentx removed the needs patch label
Florent Xicluna florentx modified the milestone: 1.5.x
Florent Xicluna florentx closed this
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ece34605c058195ed03b4d393ef1a36c
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Initial commit to guard-rrails.
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0 parents commit d0195a93a44cd19feb00117919c69759c89057db @walf443 committed Apr 25, 2012
Showing with 185 additions and 0 deletions.
1. +5 −0 .document
2. +49 −0 .gitignore
3. +14 −0 Gemfile
4. +20 −0 LICENSE.txt
5. +19 −0 README.rdoc
6. +53 −0 Rakefile
7. 0 lib/guard-rrails.rb
8. +18 −0 test/helper.rb
9. +7 −0 test/test_guard-rrails.rb
5 .document
@@ -0,0 +1,5 @@
+lib/**/*.rb
+bin/*
+-
+features/**/*.feature
+LICENSE.txt
49 .gitignore
@@ -0,0 +1,49 @@
+# rcov generated
+coverage
+coverage.data
+
+# rdoc generated
+rdoc
+
+# yard generated
+doc
+.yardoc
+
+# bundler
+.bundle
+
+# jeweler generated
+pkg
+
+# Have editor/IDE/OS specific files you need to ignore? Consider using a global gitignore:
+#
+# * Create a file at ~/.gitignore
+# * Include files you want ignored
+# * Run: git config --global core.excludesfile ~/.gitignore
+#
+# After doing this, these files will be ignored in all your git projects,
+# saving you from having to 'pollute' every project you touch with them
+#
+# Not sure what to needs to be ignored for particular editors/OSes? Here's some ideas to get you started. (Remember, remove the leading # of the line)
+#
+# For MacOS:
+#
+#.DS_Store
+
+# For TextMate
+#*.tmproj
+#tmtags
+
+# For emacs:
+#*~
+#\#*
+#.\#*
+
+# For vim:
+#*.swp
+
+# For redcar:
+#.redcar
+
+# For rubinius:
+#*.rbc
14 Gemfile
@@ -0,0 +1,14 @@
+source "http://rubygems.org"
+# Add dependencies required to use your gem here.
+# Example:
+# gem "activesupport", ">= 2.3.5"
+
+# Add dependencies to develop your gem here.
+# Include everything needed to run rake, tests, features, etc.
+group :development do
+ gem "shoulda", ">= 0"
+ gem "rdoc", "~> 3.12"
+ gem "bundler", "~> 1.0.0"
+ gem "jeweler", "~> 1.8.3"
+ gem "rcov", ">= 0"
+end
20 LICENSE.txt
@@ -0,0 +1,20 @@
+Copyright (c) 2012 Keiji, Yoshimi
+
+Permission is hereby granted, free of charge, to any person obtaining
+a copy of this software and associated documentation files (the
+"Software"), to deal in the Software without restriction, including
+without limitation the rights to use, copy, modify, merge, publish,
+distribute, sublicense, and/or sell copies of the Software, and to
+permit persons to whom the Software is furnished to do so, subject to
+the following conditions:
+
+The above copyright notice and this permission notice shall be
+included in all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
19 README.rdoc
@@ -0,0 +1,19 @@
+= guard-rrails
+
+Description goes here.
+
+== Contributing to guard-rrails
+
+* Check out the latest master to make sure the feature hasn't been implemented or the bug hasn't been fixed yet.
+* Check out the issue tracker to make sure someone already hasn't requested it and/or contributed it.
+* Fork the project.
+* Start a feature/bugfix branch.
+* Commit and push until you are happy with your contribution.
+* Make sure to add tests for it. This is important so I don't break it in a future version unintentionally.
+* Please try not to mess with the Rakefile, version, or history. If you want to have your own version, or is otherwise necessary, that is fine, but please isolate to its own commit so I can cherry-pick around it.
+
+== Copyright
+
+Copyright (c) 2012 Keiji, Yoshimi. See LICENSE.txt for
+further details.
+
53 Rakefile
@@ -0,0 +1,53 @@
+# encoding: utf-8
+
+require 'rubygems'
+require 'bundler'
+begin
+ Bundler.setup(:default, :development)
+rescue Bundler::BundlerError => e
+ $stderr.puts e.message
+ $stderr.puts "Run `bundle install` to install missing gems"
+ exit e.status_code
+end
+require 'rake'
+
+require 'jeweler'
+Jeweler::Tasks.new do |gem|
+ # gem is a Gem::Specification... see http://docs.rubygems.org/read/chapter/20 for more options
+ gem.name = "guard-rrails"
+ gem.homepage = "http://github.com/walf443/guard-rrails"
+ gem.license = "MIT"
+ gem.summary = %Q{TODO: one-line summary of your gem}
+ gem.description = %Q{TODO: longer description of your gem}
+ gem.email = "[email protected]"
+ gem.authors = ["Keiji, Yoshimi"]
+ # dependencies defined in Gemfile
+end
+Jeweler::RubygemsDotOrgTasks.new
+
+require 'rake/testtask'
+Rake::TestTask.new(:test) do |test|
+ test.libs << 'lib' << 'test'
+ test.pattern = 'test/**/test_*.rb'
+ test.verbose = true
+end
+
+require 'rcov/rcovtask'
+Rcov::RcovTask.new do |test|
+ test.libs << 'test'
+ test.pattern = 'test/**/test_*.rb'
+ test.verbose = true
+ test.rcov_opts << '--exclude "gems/*"'
+end
+
+task :default => :test
+
+require 'rdoc/task'
+Rake::RDocTask.new do |rdoc|
+ version = File.exist?('VERSION') ? File.read('VERSION') : ""
+
+ rdoc.rdoc_dir = 'rdoc'
+ rdoc.title = "guard-rrails #{version}"
+ rdoc.rdoc_files.include('README*')
+ rdoc.rdoc_files.include('lib/**/*.rb')
+end
0 lib/guard-rrails.rb
No changes.
18 test/helper.rb
@@ -0,0 +1,18 @@
+require 'rubygems'
+require 'bundler'
+begin
+ Bundler.setup(:default, :development)
+rescue Bundler::BundlerError => e
+ $stderr.puts e.message
+ $stderr.puts "Run `bundle install` to install missing gems"
+ exit e.status_code
+end
+require 'test/unit'
+require 'shoulda'
+
+$LOAD_PATH.unshift(File.join(File.dirname(__FILE__), '..', 'lib'))
+$LOAD_PATH.unshift(File.dirname(__FILE__))
+require 'guard-rrails'
+
+class Test::Unit::TestCase
+end
7 test/test_guard-rrails.rb
@@ -0,0 +1,7 @@
+require 'helper'
+
+class TestGuardRrails < Test::Unit::TestCase
+ should "probably rename this file and start testing for real" do
+ flunk "hey buddy, you should probably rename this file and start testing for real"
+ end
+end
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CWM
We're getting a little hacky in this round of Android A to Z, and we're going to have a look at ClockworkMod recovery -- the de facto standard of custom recoveries for Android. It's open source, based on the stock Android recovery, and brings a ton of options to the table that aren't possible otherwise.
First, let's look at why anyone would use a custom recovery. The standard Android recovery can do two things for the user -- flash system files that have been signed and verified as coming from the correct source (either Google or an OEM), and wipe away user data and cached information. Both these operations are pretty important, but there's more many users want and need from the recovery mode of their phone. Things like backing up all user data into image files that can be restored easily, or flashing software that doesn't come from Google or the OEM -- like custom ROMs -- and wiping some residual data to troubleshoot things like file permission errors. It's pretty advanced stuff, but it's very handy to have it for many of us.
ClockworkMod recovery (we'll call it CWM from here on out) does all this, and does it very well. It's provided free, and has a pretty handy wrapper around it so it can be used while the phone or tablet is up and running. We're talking about Rom Manager, of course. With CWM you can erase the user data from your system completely -- including that extra data that may cause an issue, selectively erase portions of it (a godsend for troubleshooting), create a restore image of the running system, and flash custom firmware at will. If you're running a custom version of Android on any newer phone or tablet, you're probably using it right now. If you're thinking about trying your luck with a custom ROM or tweak, CWM is where you'll get started.
Check out the complete Android Dictionary
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There are 2 comments
DVNO says:
4EXT Recovery is way better in my opinoin and is what most devs are using now. All touch screen and very noob friendly.
aNYthing24 says:
I paid for CWM Touch and while I appreciate everything Koush has done, 4EXT Recovery is hands down better. Shame it's not a wider range of devices.
|
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US7568110B2 - Cryptography accelerator interface decoupling from cryptography processing cores - Google Patents
Cryptography accelerator interface decoupling from cryptography processing cores Download PDF
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Publication number
US7568110B2
US7568110B2 US10/350,902 US35090203A US7568110B2 US 7568110 B2 US7568110 B2 US 7568110B2 US 35090203 A US35090203 A US 35090203A US 7568110 B2 US7568110 B2 US 7568110B2
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plurality
data
input
cryptographic processing
buffer
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US20040123119A1 (en
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Mark Buer
Donald P. Matthews
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Avago Technologies International Sales Pte Ltd
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Broadcom Corp
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• GPHYSICS
• G06COMPUTING; CALCULATING; COUNTING
• G06FELECTRIC DIGITAL DATA PROCESSING
• G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
• G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
• G06F21/71Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
• G06F21/72Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits
Abstract
Methods and apparatus are provided for decoupling a cryptography accelerator interface from cryptographic processing cores. A shared resource is provided at the cryptography accelerator interface having multiple input ports. References to data in the shared resource are provided to allow processing and ordering of data in preparation for processing by cryptographic processing cores without substantial numbers of separate buffers in the cryptographic processing data paths.
Description
CROSS REFERENCE TO RELATED APPLICATIONS
This application claims priority under U.S.C. 119(e) from U.S. Provisional Application No. 60/434,745, filed Dec. 18, 2002, Entitled: Methods And Apparatus For Cryptography Accelerator Data Handling, by Mark Buer and Donald P. Matthews, the entirety of which is incorporated by reference for all purposes. The present application is also related to concurrently filed U.S. patent application Ser. No. 10/351,258 entitled Methods And Apparatus For Ordering Data In A Cryptography Accelerator, by Tim Paaske and Mark Buer, U.S. patent application Ser. No. 10/350,907 entitled Cryptography Accelerator Input Interface Data Handling, by Mark Buer and Don Matthews, and U.S. patent application Ser. No. 10/350,922, entitled Cryptography Accelerator Data Routing Unit, by Mark Buer and Don Matthews, the entireties of which are incorporated by reference for all purposes.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present application relates to cryptography accelerators. More specifically, the present application relates to methods and apparatus for data handling in cryptography accelerators.
2. Description of Related Art
Conventional cryptography accelerators include a variety of mechanisms for managing the exchange of data with external devices. In many conventional implementations, specialized data handling mechanisms are configured for specific ports. Port buffers are preconfigured based on expected needs and requirements of particular ports and data path buffers are provided for implementation of cryptographic operations.
Mechanisms for performing cryptographic operations are described in Applied Cryptography, Bruce Schneier, John Wiley & Sons, Inc. (ISBN 0471128457), incorporated by reference in its entirety for all purposes. However, implementation of specialized data handling mechanisms for specific ports and providing buffers throughout a cryptography accelerator causes a variety of inefficiencies including data handling inefficiencies and inflexibility in managing different types of data.
It is therefore desirable to provide methods and apparatus for improving data handling with respect to some or all of the performance limitations noted above.
SUMMARY OF THE INVENTION
Methods and apparatus are provided for decoupling a cryptography accelerator interface from cryptographic processing cores. A shared resource is provided at the cryptography accelerator interface having multiple input ports. References to data in the shared resource are provided to allow processing and ordering of data in preparation for processing by cryptographic processing cores without substantial numbers of separate buffers in the cryptographic processing data paths.
In one embodiment, a cryptography accelerator is provided. The cryptography accelerator includes a plurality of input ports, a data input unit input controller, and policy security association lookup circuitry. The data input unit input controller is coupled to the plurality of input ports. The data input unit input controller is configured to write data blocks from the plurality of input ports into an input buffer and write entries corresponding to the data blocks into a buffer pointer table. Policy security association lookup circuitry is configured to receive header information and determine policy and security association information associated with the data blocks. The policy and security association information is forwarded with the data blocks to cryptographic processing cores.
In another embodiment, a method for data handling in a cryptography accelerator is provided. A plurality of data sequences is received at one of a plurality of input ports. The plurality of data sequences are into a shared resource. References to the data sequences are provided in the shared resource. The references identify the data sequences as well as the type of the data sequences. A policy security association lookup is performed to determine policy and security association information associated with the data sequences. The plurality of data sequences are forwarded along with policy and security association information to cryptographic processing circuitry.
In another embodiment, a cryptography accelerator is provided. The cryptography accelerator includes a plurality of input ports, a shared input buffer, a buffer pointer table, and policy security association lookup circuitry. The plurality of input ports are configured to receive data comprising header information and data blocks from entities external to the cryptography accelerator. The shared input buffer is associated with the plurality of input ports. The shared input buffer is configured to hold data blocks from the plurality of input ports. A buffer pointer table is associated with the plurality of input ports. The buffer pointer table has a plurality of entries configured to hold header information from the plurality of input ports. The plurality of entries reference data blocks in the shared input buffer. Policy security association lookup circuitry is configured to receive header information and determine policy and security association information associated with the data blocks. The policy and security association information is forwarded with the data blocks to cryptographic processing cores.
These and other features and advantages of the present invention will be presented in more detail in the following specification of the invention and the accompanying figures, which illustrate by way of example the principles of the invention.
BRIEF DESCRIPTION OF THE DRAWINGS
The invention may best be understood by reference to the following description taken in conjunction with the accompanying drawings, which are illustrative of specific embodiments of the present invention.
FIG. 1 is a diagrammatic representation of a system that can use the techniques of the present invention.
FIG. 2 is a diagrammatic representation of a cryptography accelerator containing processing cores and interfaces.
FIG. 3 is a diagrammatic representation of a cryptography accelerator having a data interface unit and a data routing unit.
FIG. 4 is a diagrammatic representation showing a data input unit.
FIG. 5 is a diagrammatic representation showing a pointer buffer list.
FIG. 6 is a diagrammatic representation showing a target list.
FIG. 7 is a diagrammatic representation showing data handling associated with a policy security association lookup unit.
FIG. 8 is a flow process diagram showing packet processing at an input interface.
FIG. 9 is a diagrammatic representation showing a data routing unit.
FIG. 10 is a flow process diagram showing packet processing at an output interface.
DETAILED DESCRIPTION OF SPECIFIC EMBODIMENTS
The present application relates to implementing a cryptography accelerator. More specifically, the present application relates to methods and apparatus for providing a cryptography accelerator capable of performing secure session operations.
Reference will now be made in detail to some specific embodiments of the invention including the best modes contemplated by the inventors for carrying out the invention. Examples of these specific embodiments are illustrated in the accompanying drawings. While the invention is described in conjunction with these specific embodiments, it will be understood that it is not intended to limit the invention to the described embodiments. On the contrary, it is intended to cover alternatives, modifications, and equivalents as may be included within the spirit and scope of the invention as defined by the appended claims.
For example, the techniques of the present invention will be described in the context of a multiple port cryptography accelerator with multiple cores for performing particular cryptographic operations. However, it should be noted that the techniques of the present invention can be applied to a variety of different chip architectures that perform authentication and encryption operations in general. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. The present invention may be practiced without some or all of these specific details. In other instances, well known process operations have not been described in detail in order not to unnecessarily obscure the present invention.
FIG. 1 is a diagrammatic representation of one example of a processing system 100 in accordance with an embodiment of the present invention. As shown in FIG. 1, the present invention may be implemented in a stand-alone cryptography accelerator 102 or as part of the system 100. Any logic, mechanism, or device operable to perform encryption, decryption, and/or authentication operations is referred to herein as a cryptography accelerator. In the described embodiment, the cryptography accelerator 102 is connected to a bus 104 such as a PCI bus via a standard on-chip PCI interface. The processing system 100 includes a processing unit 106 and a system memory unit 108. In typical implementations, the cryptography accelerator 102 includes multiple ports used for communication with external devices such as the processing unit 106 and system memory unit 108. The processing unit 106 and the system memory unit 108 are coupled to the system bus 104 via a bridge and memory controller 110.
Although the processing unit 106 may be the central processing unit (CPU) of a system 100, it does not necessarily have to be the CPU. It can be one of a variety of processors in a multiprocessor system. In one example, a LAN interface 114 is provided to couple the processing system 100 to a local area network (LAN) to allow packet receipt and transmission. Similarly, a Wide Area Network (WAN) interface 112 can also be provided to connect the processing system to a WAN (not shown) such as the Internet. The WAN interface manages in-bound and out-bound packets to allow automatic decryption and authentication processing.
According to various embodiments, the cryptography accelerator 102 is an application specific integrated circuit (ASIC) coupled to the processor 106. The cryptography accelerator 102 can also be a programmable logic device (PLD), field programmable gate array (FPGA), or other device coupled to the processor 106. According to specific embodiments, the cryptography accelerator 102 is implemented either on a card connected to the bus 104 or as a standalone chip integrated in the system 100.
In other embodiments, the cryptography accelerator 102 itself is integrated into the processing core of a CPU of system 100, such as that available from Tensilica Corporation of Santa Clara, Calif. or ARC Cores of San Jose, Calif. In another embodiment, techniques and mechanisms of the present invention are integrated into a CPU such as a CPU available from Intel Corporation of San Jose, Calif. or AMD Corporation of Sunnyvale, Calif. By implementing cryptography accelerator functionality entirely on the processor 106, a separate card or chip in the system 100 is not needed. In still other embodiments, the processing system 100 including the cryptography accelerator 102 is implemented as a system on a chip (SOC). The network interfaces, memory, processing core, and cryptography accelerator functionality are provided on a single integrated circuit device.
The cryptography accelerator 102 is capable of implementing various network security standards, such as Secure Sockets Layer/Transport Layer Security (SSL/TLS), which provide application-transparent encryption and authentication services for network traffic. Network security standards such as SSL/TLS provide authentication through the use of hash algorithms and encryption through the use of encryption algorithms. Two commonly used hash algorithms are MD5 and the Secure Hash algorithm (SHA-1). Other hash algorithms such as MD4 and MD2 are also available. Two commonly used encryption algorithms are DES and RC4. Other encryption algorithms such as triple DES are also available. Authentication and encryption algorithms are described in Applied Cryptography, Bruce Schneier, John Wiley & Sons, Inc. (ISBN 0471128457), incorporated by reference in its entirety for all purposes.
FIG. 2 is a diagrammatic representation of one example of a cryptography accelerator 201. The cryptography accelerator 201 includes an input interface 203 connected to a host such as an external processor. According to various embodiments, the interface 203 receives information from the host for processing and sends information to the host when processing is completed. In typical implementations, the input interface include multiple ports. Each of the different ports may be used to provide a different interface to an external resource such as a host or network card. In one example, one port is a streaming interface port configured to allow the input of data streams for processing in the cryptographic processing cores. Another port is a Gigabit MAC (media access control) interface configured to receive individual packets.
According to various embodiments, the Gigabit MAC provides packet processing such as collision detection, back pressure, and error detection for received data. In one example, another port is a memory mapped port allowing the cryptography accelerator to obtain data from memory associated with the host. Each of the different ports may include buffers of various sizes. In one example, the buffer size is determined based on the expected packet size. For example, much larger buffers would have to be provided to hold incoming traffic for ports supporting 9 k byte packets than for ports that support only 2 k byte packets. In conventional implementations, a system designer would estimate optimal buffer sizes for the various ports. However, because each port maintains its own buffer, inefficiencies in buffer allocation can occur. Some port buffers may be underutilized while other ports receiving a large amount of traffic may not have sufficient buffer space.
In typical implementations, small buffers are also provided in data paths associated with cryptographic processing cores 217 and 209. These buffers are typically required to store data for various cryptography operations along various data paths. Having a large number of separate, fixed sized buffers leads to inefficiencies in both chip design, cost, and resource allocation. Consequently, the techniques of the present invention provide mechanisms for efficiently allocating a shared memory resource that can be optimized for different ports as well as for data paths associated with cryptographic operations.
The shared resource allows the decoupling of the interface from the various cryptographic processing cores. In one example, shared buffers are provided in both input interface 203 and output interface (not shown). The shared resource can be allocated and reallocated based on the particular specifications of the input and output ports.
FIG. 3 is a diagrammatic representation of one example of a cryptography accelerator having a shared resource. The cryptography accelerator 301 includes a data input unit 303 having multiple input ports 311, 313, 315, and 317. In one example, the data input unit 303 takes data in a round robin fashion from each of the four input ports. The data input unit 303 can then allocate space in a shared resource, here a shared input buffer, for each of the received data blocks. Information associated with the data, such as data length, packet type, start of packet information, end of packet information, and ordering information is also maintained based on the associated input port identified.
Using information associated with the data, the data input unit 305 can then determine how the data should be processed. In one example, the data may require no processing at all, and may be forwarded to a bypass line 371 to allow output of the data from the cryptography accelerator 301 with substantially no cryptographic operations performed on the data. In typical implementations, the cryptography accelerator 102 includes multiple ports used for communication with external devices such as the processing unit 106 and system memory unit 108.
In a similar manner, the data input unit 303 may determine that the data from one of the input ports should be processed using one of the cryptographic processing core data paths 331, 333, 335, 337, 341, 343, 345, and 347. Any mechanism shared by various input ports to buffer and distribute data to various cryptographic processing data paths is referred to herein as a data input unit. According to various embodiments, the data input unit 303 determines whether to forward data to cryptographic processing core blocks 339 or 349 based on load information.
The data input unit 303 is configurable to provide buffering for all the different data has in the device. As noted above, in typical implementations, individual buffers were provided not only for the various ports in a cryptography accelerator, but also for the various data paths in a device. According to various embodiments, a single shared resource is provided in the data input unit to provide for buffering the various ports in the cryptographic accelerator and the various data paths in the cryptography accelerator.
In some embodiments, the cryptography accelerator 301 also includes a data routing unit 305 having multiple output ports 351, 353, 355, and 357. Any mechanism shared by output ports to buffer cryptographically processed data is referred to herein as a data routing unit. According to various embodiments, the data routing unit manages the ordering and delay of the data targeted at the various output ports. In typical embodiments, individual buffers were also associated with each of the various output ports. However, the techniques of the present invention provide a shared resource for the various output ports. According to various embodiments, the various ports are not configured with fixed size buffers and each of the ports can be modified to accommodate different types of traffic based on user needs. In one example, a particular output port may be configured to handle large size packets by allocating more buffer space in the data routing unit shared resource to that particular port.
FIG. 4 is a diagrammatic representation showing more detail on one example of a data input unit 401. Data input unit 401 includes input ports 411, 413, 415, and 417. In one embodiment, the input controller 421 takes data from each of the four input ports in round robin fashion. The input controller 421 determines if any input buffer space is available for a particular port. In one example, input controller 421 determines if buffer space is available in input buffer 441 by examining buffer pointer table 451. Buffer pointer table 451 includes a list of pointers each associated with a block of memory in input buffer 441. In one instance, each pointer in the buffer pointer table 451 references a 128 byte chunk of memory in the input buffer 441. Consequently, it should be noted that the input buffer 441 does not have to be physically divided amongst the input ports in order to dynamically allocate buffer space for each of the various input ports. Although physically allocating the input buffer 441 to the various input ports is one possible mechanism for providing an allocable shared resource, the techniques of the present invention also provide for allocation of pointers to the input buffer 441.
According to various embodiments, blocks of pointers in the buffer pointer table 451 are allocated to the various input ports. The input controller 421 determines if any pointer associated with the input port is available. If a pointer associated with the input port is free or available, the data in the input port is forwarded to input buffer 441 and the pointer is assigned to the data block. In one implementation, an entry in the buffer pointer table 451 lists the free pointers available and their associated input ports. In another implementation, each entry is associated with a flag indicating if the pointer is being used and what port the pointer is associated with. If no pointers associated with the input port or available, the input controller does not hold data from the input port, as all buffer space allocated to the input port has been consumed. Any mechanism for tracking data blocks in a shared resource where the data blocks are destined for cryptographic processing is referred to herein as a buffer pointer table. Any mechanism for allocating the pointers in the buffer pointer table to various data blocks is referred to herein as an input controller 421.
When the input controller 421 has assigned data pointers from the buffer pointer table 451, a load distribution unit 461 can select data from the buffer pointer table entries. The order for all data on a particular port is maintained since the load distribution unit can be configured to select data in order from a single buffer pointer table 451. According to various embodiments, load distribution unit 461 can select data referenced by the buffer pointer table 451 using a variety of mechanisms. In one example, the load distribution unit 461 selects data from ports that have consumed all allocated buffer space. The load distribution unit can also select data entries if the data entries are entire packets. In another example, load distribution unit can select data in round-robin fashion. The load distribution unit also be configured to identify data associated with cryptographic processing.
As will be appreciated, a data destined for cryptographic processing is often processed based on information associated with the data block. In one example, a data block is processed after obtaining security association information associated with the data block. The security association information includes keys such as session keys, initialization vectors, and the particular algorithms needed to process the data. Security association data is often determined using combinations of source and destination addresses and source and destination port numbers. For example, a packet with a source of A and a destination of B may be determined to need triple DES processing, MD5 authentication, and a session key available to the cryptographic processing core from a particular memory address. The load distribution unit 461 identifies information needed for cryptographic processing of the data and provides a pointer to the information. In many instances, the pointer is a pointer to the header of a packet stored in the input buffer 441.
According to various embodiments, the load distribution unit 461 passes information to target list 471. In one example, target list 471 includes multiple lists, each list associated with a particular data path. One list may be associated with bypass data that should be passed through the cryptography accelerator substantially without processing. Other lists may be associated with public key operation data paths. In one example, a modular exponentiation unit list is provided for performing modulus operations on data in the input buffer 441. Still other lists include pointers to data blocks in buffer memory 441 requiring processing by one of the cryptographic accelerator course. The data pointer lists are associated with a header pointer list that identifies how to derive information such as security association information for processing the data corresponding to the pointers in the data pointer list. The output controller 481 is responsible for forwarding data associated with the pointers in the target list to the various data paths. Typically, data associated with each of the lists in the target list 471 is pulled in round-robin fashion. In one example data associated with each list gets the same amount of bandwidth out of the input buffer 441.
The input buffer allows storage of information for use in various cryptographic operations as well as the allocation of memory to various ports as provided by the buffer pointer table 451. FIG. 5 is a diagrammatic representation, of a buffer pointer table 501. According to various embodiments, the buffer pointer table 501 includes a free pointers entry 511 listing the available free pointers associated with free blocks in the input buffer memory. In one example, blocks of pointers are allocated to each of the various ports in the data input unit. For example, buffer pointer entry 521 and 523 are associated with port one. Buffer pointer entry 531 is associated with port two. Buffer pointer entries 541, 543, 545, 547, and 549 are associated with port three. Buffer pointer entries 551 and 553 are associated with port 4. As long as free pointers are available for a particular port, an input controller can continue to pull data from the particular port, store the data in input buffer memory, and assign an available pointer associated with the port to the data block. However, when no free pointers are available for a particular port, the input controller no longer pulls data from that port. The port is blocked until space is made available in the input buffer as represented by the buffer pointer table.
It should be noted that much of the load distribution processing and the data path decision processing is performed using pointers to blocks of memory in the input buffer. In a cryptography processing context, this provides important benefits including the capability to process data and associated security association information along data paths where the data paths can be implemented substantially without data path buffers.
FIG. 6 is a diagrammatic representation of a target list. According to various embodiments, target list 601 includes multiple lists associated with various data paths. In one example, target list 601 includes a bypass list 643 associated with data to be passed through the cryptography accelerator without cryptographic processing. A modular exponentiation buffer list 611 is provided for public key processing of data. According to various embodiments, merge data unit buffer list 621 and merge data unit buffer list 623 are provided for data to be forwarded to cryptographic processing cores. Merge data unit buffer list 621 and 623 are associated with pointers to data that will be merged with security association information before cryptographic processing is performed.
Consequently, merge data unit buffer lists 621 and 623 are linked to policy security association lookup unit header list 631. When a pointer is provided to merge data unit buffer list 621, a pointer is also provided to policy security association lookup unit header list 631. The merge data unit buffer list 621 pointer allows later combination of data with security association information extracted from a policy security association lookup unit. When the data is combined with the security association information, the data can be processed using one of a number of cryptographic processing cores.
FIG. 7 is a diagrammatic representation of data passed to a merge data unit. According to various embodiments, the output controller 781 associated with the data input unit 701 provides data 711 and 713 to a merge data unit 793. However, before the data 711 and header 713 can be processed using one of a number of cryptographic processing cores, the data typically is combined with security association information. According to various embodiments, the security association information is derived by a policy security association lookup unit. In one embodiment, the policy security association lookup unit reads information from memory and prepends information to data 711 and header 713. The location in memory of the security association data structure can be specified directly or by identifiers passed by the output controller 781. In one example the output controller 781 passes a security association handle 715 to the policy security association lookup unit 791.
In one example, the policy security association lookup unit 791 uses the information in the security association handle 715 to identify security association information. The information identified can be used for both inbound and outbound packets to allow the packets to be classified into flows. In one instance, the security association handle 715 includes up to 2 k of the header of the associated packet. The policy security association lookup unit then issues a security association update 717 to modify data such as sequence numbers associated with a flow.
The policy security association lookup unit 791 acquires security association data 721 and passes the security association data 725 to a merge data unit 793. The merge data unit 793 combines the security association data 723 with the data 711 and header 713. It should be noted that the policy security association lookup unit processing may vary depending on whether the packet is an inbound packet or an outbound packet. For an outbound packet, the policy security association lookup unit may also be responsible for determining header information such as outer IP header information. For an inbound packet, the outer IP header information is included in the data 711 and header information 713. Various types of error checking can also be performed by the policy security association lookup unit 791 to determine that the flow referenced by a security association handle 715 is a valid one.
It should be noted that each merge data unit 793 can then pass the combined data to one of multiple cryptography processing core data paths. In one example, two merge data units are provided in a cryptography accelerator having a data input unit and eight processing cores. The two merge data units are also associated with a single policy security association lookup unit. Each merge data is coupled to four cryptographic cores. In some examples, each merge data unit would select one of the four cryptographic processing cores to handle data based on load.
FIG. 8 is a flow process diagram showing data handling in the cryptography accelerator. At 801, data is received from one of any number of input ports associated with the cryptography accelerator. As noted above, each port may be configured to handle different types of traffic such as streaming, packet, large packet, or memory mapped data. At 803, a free buffer is pointer table is used to track the packet and the packet type. It should be noted that data is typically pulled in round-robin fashion from one of the input ports as long as free pointers are available in the buffer pointer table. According to various embodiments, blocks of pointers are allocated to each of the input ports. In this manner, the system designer can allocate input buffer memory associated with the pointers to each of the various input ports based on the needs and requirements of each port or the corresponding traffic. At 805, the load distributor schedules the data sequence for processing on a data path having the lowest load.
According to various embodiments, the load distributor schedules data sequences by scheduling the pointers in the buffer pointer table. At 811, the load distributor provides a pointer to a policy security association lookup unit list. It should be noted that some data sequences may require no cryptographic core processing and may instead be provided to a bypass list or a public key processing list. At 813, the output controller pulls data from the input buffer along with any associated policy security association lookup unit header information. The output controller pulls data from the input buffer based on pointers provided in a target list. At 815, the policy security association lookup is performed using information such as header information associated with the data sequence. At 821, a merge data unit combines the data sequence with the results of a policy security association lookup. At 823, input buffer memory and any associated free pointers are returned.
FIG. 9 is a diagrammatic representation of a data routing unit 901. As noted above, the data input unit provides the input interface for a cryptography accelerator while the data routing unit provides the output interface for the cryptography accelerator. According to various embodiments, the data routing unit manages the ordering of cryptographically processed data for the various egress output ports. The input controller 921 is coupled to a variety of data paths such as bypass, public key processing, and cryptographic core processing data paths. According to various embodiments, data blocks in a data sequence may be received out of order by an input controller as several data paths may be associated with cryptographic processing cores. For example, blocks 1, 2, and 4 may be received through a first data path and blocks 3 and 5 may be received through a second data path. The data routing unit is configured to order the data blocks and provide them to the appropriate output port.
According to various embodiments, the input controller 921 writes data blocks to buffer memory and data block pointers to a buffer pointer table 951 in the order that the input controller receives them. In one example, pointers to blocks 1, 2, and 4 may be placed into a first port buffer list while pointers to blocks 3 and 5 may be placed in a second port buffer list. A routing unit 961 recognizes the ordering and pulls pointers in order and places the pointers in the target list 971. In many implementations, the target list 971 includes lists of pointers each associated with the various output ports. In one example, lists of pointers are provided in target list 971. In one example, four lists of pointers correspond to output ports 911, 913, 915, and 917. Each pointer in the target list 971 corresponds to a block in output buffer 991. It should be noted that in the data input unit, the pointers in the buffer pointer table are allocable to the various input ports based on the particular needs and requirements of the input ports.
In the data routing unit, however, the pointers in the target list 971 are allocable to the various output ports based upon the needs and requirements of the various output ports. In one example, output port 911 may be configured to support large packets. Consequently, the large number of output buffer memory manager 991 would be allocated to output port 911. In one example, the routing unit 961 would pull a first block pointer associated with a flow and place the pointer into a buffer list associated with a Gigabit MAC output port. The routing unit 961 would not pull another block from that particular flow until the second block pointer is pulled. In this manner, the routing unit 961 can pull data blocks in order from the buffer pointer table even if the blocks of data came from different data paths in the cryptographic accelerator.
It should be noted that although the blocks on a particular data path will typically be in order, the blocks received from multiple data paths by the input controller will not necessarily be in order. That is, blocks 3 and 5 in a sequence may be received along a data path before blocks 1, 2 and 4 are received from another data path. The routing unit 961 pulls pointers to data blocks in order from the buffer pointer table and places them in an output port list in the target list 971. The output controller 981 uses the pointers in the target list 971 to identify data blocks in the output buffer 991 to forward to the output ports.
FIG. 10 is a flow process diagram showing data handling at an output interface associated with the cryptography accelerator. At 1001, input controller receives data from a data path. At 1003, data is written to the output buffer 991 and the pointer is written to the buffer pointer table 951. The routing unit 961 pulls data blocks in order from the buffer pointer table 951 at 1005. At 1011, the routing block forwards the pointers to the target buffer list upon determining that pointers are available in the target list. At 1013, the output controller may immediately forward data associated with the pointers in the target list or may wait until a packet size is reached before forwarding data out through a particular port.
While the invention has been particularly shown and described with reference to specific embodiments thereof, it will be understood by those skilled in the art that changes in the form and details of the disclosed embodiments may be made without departing from the spirit or scope of the invention. It is therefore intended that the invention be interpreted to include all variations and equivalents that fall within the true spirit and scope of the present invention.
Claims (21)
1. A cryptography accelerator, comprising:
a plurality of input ports configured to receive data comprising header information and data blocks;
a plurality of cryptographic processing cores, each cryptographic processing core having a plurality of data paths;
an input buffer coupled to the plurality of input ports and cryptographic processing cores, wherein the input buffer is shared by the plurality of input ports and the plurality of data paths associated with each cryptographic processing core in the plurality of cryptographic processing cores;
an input controller coupled to the plurality of input ports, wherein the input controller dynamically allocates resources of the input buffer to the plurality of input ports and to the plurality of data paths associated with each cryptographic processing core in the plurality of cryptographic processing cores; and
wherein the shared input buffer is dynamically allocable by varying a number of entries in a buffer pointer table allocated to each of the plurality of ports.
2. The cryptography accelerator of claim 1, wherein policy and security association information is extracted based on source and destination addresses and source and destination ports of the data blocks.
3. The cryptography accelerator of claim 1, wherein policy and security association information comprises key and algorithm information.
4. The cryptography accelerator of claim 1, wherein the plurality of input ports comprise a streaming interface port.
5. The cryptography accelerator of claim 4, wherein the plurality of input ports further comprise a memory mapped port.
6. The cryptography accelerator of claim 1, wherein the buffer pointer table comprises a plurality of pointers.
7. The cryptographic accelerator of claim 1, further comprising:
policy security association lookup circuitry configured to receive header information and determine policy and security association information associated with the data blocks, wherein the policy and security association information is forwarded with the data blocks to cryptographic processing cores.
8. The cryptography accelerator of claim 7, wherein the policy security association lookup circuitry receives a pointer to header information.
9. A cryptography accelerator comprising:
a plurality of input ports configured to receive data comprising header information and data blocks;
a plurality of cryptographic processing cores; an input buffer coupled to the plurality of input ports and cryptographic processing cores, wherein the input buffer is shared by the plurality of input ports and the plurality of cryptographic processing cores;
an input controller coupled to the plurality of input ports, wherein the input controller dynamically allocates resources of the input buffer to the plurality of input ports and the plurality of cryptographic processing cores; and
a buffer pointer table associated with the plurality of input ports, the buffer pointer table having a plurality of entries configured to hold header information from the plurality of input ports, the plurality of entries referencing data blocks in the shared input buffer.
10. The cryptography accelerator of claim 9, further comprising:
a data input unit load distributor configured to select entries from the buffer pointer table.
11. The cryptography accelerator of claim 10, further comprising:
an output controller configured to receive buffer pointer table entries from the load distributor, pull data blocks corresponding to the entries from the input buffer, and forward the data blocks to a plurality of data paths associated with the plurality of cryptographic processing cores.
12. The cryptography accelerator of claim 11, further comprising a merge data unit coupled to the output controller and the policy security association lookup circuitry, wherein the merge data unit is configured to wait for the policy and security association information and the corresponding data block before forwarding the policy and security association information along with the data block to a cryptographic processing core.
13. The cryptographic accelerator of claim 7, wherein the input controller is configured to write data blocks from the plurality of input ports into the input buffer and write entries corresponding to the data blocks into the buffer pointer table.
14. A method for data handling in a cryptography accelerator having a plurality of input ports and a plurality of cryptographic processing cores, comprising:
each cryptographic processing core having a plurality of data paths;
receiving data at the plurality of input ports; dynamically allocating space in an input buffer shared by the plurality of input ports and the plurality of data paths associated with each cryptographic processing core in the plurality of cryptographic processing cores to the received data; and
allocating space in the shared input buffer to data used by the a data path associated a cryptographic processing core to process the received data; and
wherein the input buffer is dynamically allocated by varying the number of entries in a buffer pointer table allocated to each of the plurality of input ports.
15. The method of claim 14, wherein the shared resource is a buffer shared by the plurality of input ports.
16. The method of claim 14, wherein the references are pointers to entries in the shared resource.
17. The method of claim 16, wherein the references are included in a buffer pointer table.
18. The method of claim 17, wherein the shared resource can be allocated based on needs of particular input ports.
19. A method for data handling in a cryptography accelerator having a plurality of input ports and a plurality of cryptographic processing cores comprising:
receiving data at the plurality of input ports;
dynamically allocating space in an input buffer shared by the plurality of input ports and the plurality of cryptographic processing cores to the received data;
allocating space in the shared input buffer to data used by the cryptographic processing core to process the received data;
providing references to the received data in the shared input buffer, wherein the references identify the received data as well as the type of the received data;
performing a policy security association lookup to determine policy and security association information associated with the received data; and
forwarding the received data along with policy and security association to the plurality of cryptographic processing cores.
20. A cryptography accelerator, comprising:
a plurality of input ports configured to receive data comprising header information and data blocks;
a plurality of cryptographic processing cores, each cryptographic processing core having a plurality of data paths;
a bypass line coupling the plurality of input ports to a plurality of output ports;
an input buffer coupled to the plurality of input ports and cryptographic processing cores, wherein the input buffer is shared by the plurality of
input ports and the plurality of data paths associated with each cryptographic processing core in the plurality of cryptographic processing cores;
an input controller coupled to the plurality of input ports, wherein the input controller dynamically allocates resources of the input buffer to the plurality of input ports and to the plurality of data paths associated with each cryptographic processing core in the plurality of cryptographic processing cores; and
a target list having a bypass list associated with data blocks to be passed through the cryptography accelerator without cryptographic processing.
21. A cryptography accelerator, comprising:
a plurality of input ports configured to receive data comprising header information and data blocks;
a plurality of cryptographic processing cores;
a bypass line coupling the plurality of input ports to a plurality of output ports;
an input buffer coupled to the plurality of input ports and cryptographic processing cores, wherein the input buffer is shared by the plurality of input ports and the plurality of cryptographic processing cores and wherein the input buffer is dynamically allocated by varying the number of entries in a buffer pointer table allocated to each of the plurality of input ports;
an input controller coupled to the plurality of input ports, wherein the input controller dynamically allocates resources of the input buffer to the plurality of input ports and the plurality of cryptographic processing cores; and
a target list having a bypass list associated with data blocks to be passed through the cryptography accelerator without cryptographic processing.
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Monomorphism
From Wikipedia, the free encyclopedia
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This article is about the mathematical term. For other uses, see Monomorphic (disambiguation) and Polymorphism (disambiguation).
Monomorphism-01.png
In the context of abstract algebra or universal algebra, a monomorphism is an injective homomorphism. A monomorphism from X to Y is often denoted with the notation X \hookrightarrow Y.
In the more general setting of category theory, a monomorphism (also called a monic morphism or a mono) is a left-cancellative morphism, that is, an arrow f : XY such that, for all morphisms g1, g2 : ZX,
f \circ g_1 = f \circ g_2 \Rightarrow g_1 = g_2.
Monomorphisms are a categorical generalization of injective functions (also called "one-to-one functions"); in some categories the notions coincide, but monomorphisms are more general, as in the examples below.
The categorical dual of a monomorphism is an epimorphism, i.e. a monomorphism in a category C is an epimorphism in the dual category Cop. Every section is a monomorphism, and every retraction is an epimorphism.
Relation to invertibility[edit]
Left invertible morphisms are necessarily monic: if l is a left inverse for f (meaning l is a morphism and l \circ f = \operatorname{id}_{X}), then f is monic, as
f \circ g_1 = f \circ g_2 \Rightarrow lfg_1 = lfg_2 \Rightarrow g_1 = g_2.
A left invertible morphism is called a split mono.
However, a monomorphism need not be left-invertible. For example, in the category Group of all groups and group morphisms among them, if H is a subgroup of G then the inclusion f : HG is always a monomorphism; but f has a left inverse in the category if and only if H has a normal complement in G.
A morphism f : XY is monic if and only if the induced map f : Hom(Z, X) → Hom(Z, Y), defined by f(h) = fh for all morphisms h : ZX, is injective for all Z.
Examples[edit]
Every morphism in a concrete category whose underlying function is injective is a monomorphism; in other words, if morphisms are actually functions between sets, then any morphism which is a one-to-one function will necessarily be a monomorphism in the categorical sense. In the category of sets the converse also holds, so the monomorphisms are exactly the injective morphisms. The converse also holds in most naturally occurring categories of algebras because of the existence of a free object on one generator. In particular, it is true in the categories of all groups, of all rings, and in any abelian category.
It is not true in general, however, that all monomorphisms must be injective in other categories; that is, there are settings in which the morphisms are functions between sets, but one can have a function that is not injective and yet is a monomorphism in the categorical sense. For example, in the category Div of divisible (abelian) groups and group homomorphisms between them there are monomorphisms that are not injective: consider, for example, the quotient map q : QQ/Z, where Q is the rationals under addition, Z the integers (also considered a group under addition), and Q/Z is the corresponding quotient group. This is not an injective map, as for example every integer is mapped to 0. Nevertheless, it is a monomorphism in this category. This follows from the implication qh = 0 ⇒ h = 0, which we will now prove. If h : GQ, where G is some divisible group, and qh = 0, then h(x) ∈ Z, ∀ xG. Now fix some xG. Without loss of generality, we may assume that h(x) ≥ 0 (otherwise, choose −x instead). Then, letting n = h(x) + 1, since G is a divisible group, there exists some yG such that x = ny, so h(x) = n h(y). From this, and 0 ≤ h(x) < h(x) + 1 = n, it follows that
0 \leq \frac{h(x)}{h(x) + 1} = h(y) < 1
Since h(y) ∈ Z, it follows that h(y) = 0, and thus h(x) = 0 = h(−x), ∀ xG. This says that h = 0, as desired.
To go from that implication to the fact that q is an monomorphism, assume that qf = q g for some morphisms f, g : GQ, where G is some divisible group. Then q ∘ (fg) = 0, where (fg) : xf(x) − g(x). (Since (fg)(0) = 0, and (f - g)(x + y) = (f - g)(x) + (f - g)(y), it follows that (fg) ∈ Hom(G, Q)). From the implication just proved, q ∘ (fg) = 0 ⇒ fg = 0 ⇔ ∀ xG, f(x) = g(x) ⇔ f = g. Hence q is a monomorphism, as claimed.
Properties[edit]
• In a topos, every monic is an equalizer, and any map that is both monic and epic is an isomorphism.
• Every isomorphism is monic.
Related concepts[edit]
There are also useful concepts of regular monomorphism, strong monomorphism, and extremal monomorphism. A regular monomorphism equalizes some parallel pair of morphisms. An extremal monomorphism is a monomorphism that cannot be nontrivially factored through an epimorphism: Precisely, if m = ge with e an epimorphism, then e is an isomorphism. A strong monomorphism satisfies a certain lifting property with respect to commutative squares involving an epimorphism.
Terminology[edit]
The companion terms monomorphism and epimorphism were originally introduced by Nicolas Bourbaki; Bourbaki uses monomorphism as shorthand for an injective function. Early category theorists believed that the correct generalization of injectivity to the context of categories was the cancellation property given above. While this is not exactly true for monic maps, it is very close, so this has caused little trouble, unlike the case of epimorphisms. Saunders Mac Lane attempted to make a distinction between what he called monomorphisms, which were maps in a concrete category whose underlying maps of sets were injective, and monic maps, which are monomorphisms in the categorical sense of the word. This distinction never came into general use.
Another name for monomorphism is extension, although this has other uses too.
See also[edit]
References[edit]
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Search Type: Posts; User: rioscb
Search: Search took 0.02 seconds.
1. Replies
3
Views
666
What about Architect and ExtJs 5? It seems to me that this would be done in parallel.
Will it be in Architect 3 or are you going to do it in Architect 4 as a separate license?
2. Has anyone seen and understand this error?
Added menu to toolbar.
Added a split button to toolbar.
moved menu to toolbar
Got the error below.
Version: 2.2.1 Build: 951
Release Channel:...
3. Replies
1
Views
1,215
Is there a way to configure the documentation location? I have local URL for documentation and would like to have documentation access when I am offline.
Results 1 to 3 of 3
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Sign up ×
Stack Overflow is a question and answer site for professional and enthusiast programmers. It's 100% free.
Let's say I've got Alpha things that may or may not be or be related to Bravo or Charlie things.
These are one-to-one relationships: No Alpha will relate to more than one Bravo. And no Bravo will relate to more than one Alpha.
I've got a few goals:
• a system that's easy to learn and maintain.
• data integrity enforced within my database.
• a schema that matches the real-world, logical organization of my data.
• classes/objects within my programming that map well to database tables (à la Linq to SQL)
• speedy read and write operations
• effective use of space (few null fields)
I've got three ideas…
PK = primary key
FK = foreign key
NU = nullable
One table with many nullalbe fields (flat file)…
Alphas
--------
PK AlphaId
AlphaOne
AlphaTwo
AlphaThree
NU BravoOne
NU BravoTwo
NU BravoThree
NU CharlieOne
NU CharlieTwo
NU CharlieThree
Many tables with zero nullalbe fields…
Alphas
--------
PK AlphaId
AlphaOne
AlphaTwo
AlphaThree
Bravos
--------
FK PK AlphaId
BravoOne
BravoTwo
BravoThree
Charlies
--------
FK PK AlphaId
CharlieOne
CharlieTwo
CharlieThree
Best (or worst) of both: Lots of nullalbe foreign keys to many tables…
Alphas
--------
PK AlphaId
AlphaOne
AlphaTwo
AlphaThree
NU FK BravoId
NU FK CharlieId
Bravos
--------
PK BravoId
BravoOne
BravoTwo
BravoThree
Charlies
--------
PK CharlieId
CharlieOne
CharlieTwo
CharlieThree
What if an Alpha must be either Bravo or Charlie, but not both?
What if instead of just Bravos and Charlies, Alphas could also be any of Deltas, Echos, Foxtrots, or Golfs, etc…?
EDIT: This is a portion of the question: Which is the best database schema for my navigation?
share|improve this question
9 Answers 9
If you want each Alpha to be related to by only one Bravo I would vote for the possibility with using a combined FK/PK:
Bravos
--------
FK PK AlphaId
BravoOne
BravoTwo
BravoThree
This way one and only one Bravo may refer to your Alphas.
If the Bravos and Charlies have to be mutually exclusive, the simplest method would probably to create a discriminator field:
Alpha
--------
PK AlphaId
PK AlphaType NOT NULL IN ("Bravo", "Charlie")
AlphaOne
AlphaTwo
AlphaThree
Bravos
--------
FK PK AlphaId
FK PK AlphaType == "Bravo"
BravoOne
BravoTwo
BravoThree
Charlies
--------
FK PK AlphaId
FK PK AlphaType == "Charlie"
CharlieOne
CharlieTwo
CharlieThree
This way the AlphaType field forces the records to always belong to exactly one subtype.
share|improve this answer
I'm assuming you will be using SQL Server 2000 / 2005. I have a standard pattern for 1-to-1 relationships which I use, which is not too dissimilar to your 2nd idea, but here are the differences:
• Every entity must have its own primary key first, so your Bravo, Charlie, etc tables should define their own surrogate key, in addition to the foreign key column for the Alpha table. You are making your domain model quite inflexible by specifying that the primary key of one table must be exactly the same as the primary key of another table. The entities therefore become very tightly coupled, and one entity cannot exist without another, which is not a business rule that needs to be enforced within database design.
• Add a foreign key constraint between the AlphaID columns in the Bravo and Charlie tables to the primary key column on the Alpha table. This gives you 1-to-many, and also allows you to specify whether the relationship is mandatory simply by setting the nullability of the FK column (something that isn't possible in your current design).
• Add a unique key constraint to tables Bravo, Charlie, etc on the AlphaID column. This creates a 1-to-1 relationship, with the added benefit that the unique key also acts as an index which can help to speed up queries that retrieve rows based on the foreign key value.
The major benefit of this approach is that change is easier:
• Want 1-to-many back? Drop the relevant unique key, or just change it to a normal index
• Want Bravo to exist independently of Alpha? You've already got the surrogate key, all you do is set the AlphaID FK column to allow NULLs
share|improve this answer
Personally, I've had lots of success with your second model, using a PK/FK on a single column.
I have never had a situation where all Alphas were required to have a record in a Bravo or Charlie table. I've always dealt with 1 <-> 0..1, never 1 <-> 1.
As for your last question, that's just that many more tables.
share|improve this answer
One more approach is having 3 tables for storing the 3 entities and having a separate table for storing the relations.
share|improve this answer
You could have a join table that specifies an Alpha and a related ID. You can then add another column specifing if it is an ID for Bravo, Charlie or whatever. Keeps the column creep down on Alpha but does add some complexity to joining queries.
share|improve this answer
I have an example working pretty well so far that fits your model:
I Have Charlie and Bravo Tables Having the Foreign Key alpha_id from Alpha. Like your first example, except alpha is not the Primary Key, bravo_id and charlie_id are.
I use alpha_id on every table I need to address to those entities, so, to avoid a SQL that may cause some delay researching both Bravo and Charlie to find which one Alpha is, I created a AlphaType table and on Alpha table I have its id (alpha_type_id) as foreign key. That way I can know in a programmatic way which AlphaType I am dealing with without Joining tables that may have zillions of records. in tSQL:
// For example sake lets think Id as a CHAR.
// and pardon me on any mistake, I dont have the exact code here,
// but you can get the idea
SELECT
(CASE alpha_type_id
WHEN 'B' THEN '[Bravo].[Name]'
WHEN 'C' THEN '[Charlie].[Name]'
ELSE Null
END)
FROM ...
share|improve this answer
You raise a lot of questions that make it hard to select any of your proposed solutions without a lot more clarification on the exact problem you are trying to solve. Consider not just my clarification questions, but the criteria that you will use to evaluate my questions, as an indication of the amount of detail required to solve your problem:
• a system that's easy to learn and maintain.
What "System" will it be easy to learn and maintain? The source code of your app, or the app's data via it's end-user interface?
• data integrity enforced within my database.
What do you mean by "enforced within my database"? Does this mean you cannot by any means control data integrity any other way, i.e. the project requires only DB-based data integrity rules?
• a schema that matches the real-world, logical organization of my data.
Can you provide us the real world, logical organization to which you are referring? It's impossible to infer it from your three examples of the data you are trying to store -- i.e. suppose all three of your structures are completely wrong. How would we know that unless we know the real-world spec?
• classes/objects within my programming that map well to database tables (à la Linq to SQL)
This requirement sounds like your hand is being forced to create this with linq to SQL, is that the case?
• speedy read and write operations
What is "speedy"? .03 seconds? 3 seconds? 30 minutes? It's unclear because you're not specifying the data size and type of operations to which you are referring.
• effective use of space (few null fields)
Effective use of space has nothing to do with the number of null fields. If you mean a normalized database structure, that will depend again on the real-world spec's and other design elements of the application that have not been provided in the question.
share|improve this answer
I'd go with option 1 unless I had a significant reason not to. It might not cost you as much space as you think, esp. if you are using varchars in Bravo. Don't forget that splitting it will cost you for foreign keys, secondary identity and needed indexes.
A place where you might run into trouble is if Bravo is unlikely to be needed (<%10) AND you need to quickly query by one of its fields so you index it.
share|improve this answer
I would create a supertype / subtype relationship.
THINGS
------
PK ThingId
ALPHAS
------
FK ThingId (not null, identifying, exported from THINGS)
AlphaCol1
AlphaCol2
AlphaCol3
BRAVOS
------
FK ThingId (not null, identifying, exported from THINGS)
BravoCol1
BravoCol2
BravoCol3
CHARLIES
--------
FK ThingId (not null, identifying, exported from THINGS)
CharlieCol1
CharlieCol2
CharlieCol3
So, for example, an alpha that has a charlie but not a bravo:-
insert into things values (1);
insert into alphas values (1,'alpha col 1',5,'blue');
insert into charlies values (1,'charlie col 1',17,'Y');
Note, you can't create more than one charlie for the alpha, as if you tried to create a two charlies with a ThingId of 1 the second insert would get a unique index/constraint violation.
share|improve this answer
This does not enforce the 1 <-> 0..1 relationship. You could have Alphas with three bravos, a bravo without an alpha and so on. – JacquesB Sep 22 '08 at 8:22
I should have been clearer, the FK keys in ALPHAS, BRAVOS and CHARLIES are identifying relationships, with a not null. Not sure how you think an Alpha could have three bravos, etc. – Mike McAllister Sep 22 '08 at 20:13
@olavk - I've provided an answer showing why I don't think you can have an alpha with multiple bravos. Yes, you can have a bravo without an alpha, the original spec said "I've got Alpha things that may OR MAY NOT BE related to Bravo or Charlie things". – Mike McAllister Sep 22 '08 at 20:22
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Age of Warscape Wiki
m
(One intermediate revision by the same user not shown)
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|hair=Brown<br/>Black<br/>Red<br/>Blonde<br/>Grey
|hair=Brown<br/>Black<br/>Red<br/>Blonde<br/>Grey
|dist=Short stature
|dist=Short stature
|lang=English
+
|lang=Uloffian
|life=65 years
|life=65 years
|diet=Fungivorous
|diet=Fungivorous
}}
}}
+
Gnomes are a short, technologically gifted race who use bio-tech to create machinery, such as war engines. The Gnomes live underground, creating machinery for the war cause, along with creating and using massive explosives. Gnomes are allied with the [[2nd Legion]], and are a selectable species in the 2nd Legion faction.
+
The '''Gnomes''' are a primary species appearing in [[Age of Warscape]] and [[Age of Warscape: Origins]]. They are one of the ten dominant species on [[Uloff]], and are a common race appearing in northern [[Gaderon]]. The race, recognized as small, short-tempered humanoids, are well-known for creating machinery, war machines, and weaponry. They are led under the [[Gnome Council]], which is a small group of three Gnomes that lead the entire race. The Gnome race is allied with the [[2nd Legion]], and is a playable species in the faction.
==History==
==History==
Line 30: Line 31:
==Appearance==
==Appearance==
[[File:Gnome2.jpg|100px|right]]
[[File:Gnome2.jpg|100px|right]]
Gnomes greatly resemble that of a [[Human]] and a [[Jaar]]. The only distinctive feature between a Gnome and a Human is the Gnome's size, which can measure upto 3 feet. Gnomes are also known to have little to no facial hair, which is shaved in order to prevent getting caught in machinery. They are also known to commonly wear overalls, very light armour, work-gloves, and goggles. Rarely does a Gnome ever wear a full-set of armour.
+
Gnomes greatly resemble that of a [[Human]] and a [[Jaar]]. The only distinctive feature between a Gnome and a Human is the Gnome's size, which can measure up to 3 feet. Gnomes are also known to have little to no facial hair, which is shaved in order to prevent getting caught in machinery. They are also known to commonly wear overalls, very light armour, work-gloves, and goggles. Rarely does a Gnome ever wear a full-set of armour.
A Gnome's hairline will usually fall back, and their hair will typically be very short. Gnome hairstyles usually consist of spiked up or combed forward hair.
A Gnome's hairline will usually fall back, and their hair will typically be very short. Gnome hairstyles usually consist of spiked up or combed forward hair.
Line 36: Line 37:
==Personality==
==Personality==
As the "everyone is different" rule applies, most Gnomes take a great liking to bombs, gold, and watching others get blown up. Some might say the Gnomes are insane, which is due to the lack in fresh air that the race gets. Despite their insanity, Gnomes are seen to be incredibly smart.
As the "everyone is different" rule applies, most Gnomes take a great liking to bombs, gold, and watching others get blown up. Some might say the Gnomes are insane, which is due to the lack in fresh air that the race gets. Despite their insanity, Gnomes are seen to be incredibly smart.
+
+
A typical Gnome is also highly short-tempered, and are typically extremely easy to anger. The race can often be uncooperative due to their habit of doing things on their own.
==Leadership & Government==
==Leadership & Government==
Latest revision as of 16:24, 20 February 2018
Gnome
Gnome.png
Details
Leader
The Council
Playable
Yes
Faction
2nd Legion
Capital
Tubetown
Average Height
3.10ft
Skin Colours
Pale
Tan
Light Brown
Hair Colours
Brown
Black
Red
Blonde
Grey
Eye Colours
Green
Brown
Blue
Grey
Hazel
Languages
Uloffian
Life Span
65 years
Diet
Fungivorous
The Gnomes are a primary species appearing in Age of Warscape and Age of Warscape: Origins. They are one of the ten dominant species on Uloff, and are a common race appearing in northern Gaderon. The race, recognized as small, short-tempered humanoids, are well-known for creating machinery, war machines, and weaponry. They are led under the Gnome Council, which is a small group of three Gnomes that lead the entire race. The Gnome race is allied with the 2nd Legion, and is a playable species in the faction.
History[]
The Gnome emblem
For centuries, Gnomes have inhabited the northwestern, mountainous side of Gaderon, known as the Joral Mountains. They have lived underground, inside and below the vast mountain range of Joral Mountains. Through the years, this race had built a magnificent city underground, naming it "Tubetown", due to its transit system revolving around large tubes. Throughout their isolation underground, the Gnomes have mastered the art of machinery, and have discovered how to utilize sulfur as a weapon. They have also discovered the use of steam-powered machinery, giving them the ability to create vehicles and mechsuits.
The Gnomes had built a huge arsenal of different machinery and weapons, and have utilized their knowledge in harnessing electricity. Their inventions were later noticed by the Jaar, who were impressed by the Gnomes' creations and innovations. The Gnomes found the Jaar in their splendor, due to their heavy armor, large size, and use of axes. The two races eventually formed an alliance with one another, and became close friends. The Gnomes began to trade firearms, explosives, machinery, and mechsuits to the Jaar, who gave them battleaxes, armour, traditional food, animal pelts, rare metals, and paint in return.
When the First War of Gaderon began, the Gnomes joined the Jaar in the destruction of the Human and Jin'tulu. Although they did not succeed, they earned the respect of the Jaar after they saw the Gnomes' machinery and weapons in action. After retreating back to Tubetown, the Gnomes began to build even more machinery and weapons, and mastered the use of bio-technology.
When the Great War began, the Gnomes happily joined the 2nd Legion. However, they requested a cease-fire with The Arbiters shortly after, as they had not built their defenses enough to outmatch the armies of the Arbiters. The Arbiters reluctantly accepted their request, warning them that "any act of aggression towards The Arbiters or aiding the 2nd Legion will terminate the cease-fire". Now, the Gnomes build their arsenal of machinery and weaponry, waiting to use it against The Arbiters.
Appearance[]
Gnome2.jpg
Gnomes greatly resemble that of a Human and a Jaar. The only distinctive feature between a Gnome and a Human is the Gnome's size, which can measure up to 3 feet. Gnomes are also known to have little to no facial hair, which is shaved in order to prevent getting caught in machinery. They are also known to commonly wear overalls, very light armour, work-gloves, and goggles. Rarely does a Gnome ever wear a full-set of armour.
A Gnome's hairline will usually fall back, and their hair will typically be very short. Gnome hairstyles usually consist of spiked up or combed forward hair.
Personality[]
As the "everyone is different" rule applies, most Gnomes take a great liking to bombs, gold, and watching others get blown up. Some might say the Gnomes are insane, which is due to the lack in fresh air that the race gets. Despite their insanity, Gnomes are seen to be incredibly smart.
A typical Gnome is also highly short-tempered, and are typically extremely easy to anger. The race can often be uncooperative due to their habit of doing things on their own.
Leadership & Government[]
A small group known as "The Council" leads the Gnomes proudly. The Council consists of High-Tinkerer Fizzra, Technoking Pinchblast, and Forgelord Feezlebor. The three all have their own strengths and weaknesses, and all make decisions for the race.
The Gnome race operates under an oligarchic government, with a group of individuals in charge of the race. This group, known as "The Gnome Council", makes and agrees on decisions, and all share equal responsibility for the race. There are only three spots on the Council, which are filled by old, wise, and experienced Gnomes. Once a previous member of the Council dies or resigns, a new member is appointed by the remaining Council. If all three members die, then they are replaced by relatives, offspring, or individuals elected by the people.
Culture[]
The Gnomes love machinery and building things, and take great pride in their creations. They love to show off their creations in the most obvious ways possible. The race also has a great liking towards firearms and explosives, and have a habit of testing them on uninhabited locations, usually for no reason at all. The race is known to build their buildings in walls and rocks, using a transit system to connect them all. They have also been known to be the first race to harness electricity, and to use vehicles.
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Синтаксис JavaScript Справочник JavaScript JSON Коды клавиш События Строгий режим
Объект event
Обработчики событий могут быть привязаны к объекту Element, Document, Window и т.д. Затем, в тот момент, когда происходит какое-либо событие, создаётся объект Event (событие), который передаётся в качестве аргумента обработчику события.
Интерфейс события объектной модели документа (DOM) доступен только через объект Event, который передаётся в качестве аргумента в обработчик события (в IE8 и более ранних версиях, объект Event доступен в виде глобальной переменной window.event). Следующий пример показывает, как объект Event передаётся обработчику события и может быть использован внутри него.
window.addEventListener("keydown", foo, false);
function foo(event) {
// параметр event неявно инициализируется объектом Event
alert(event);
}
Методы
МетодОписание
preventDefault()Отменяет событие, если оно является отменяемым, без остановки дальнейшего распространения события.
stopImmediatePropagation()Предотвращает любое дальнейшее распространение события.
stopPropagation()Предотвращает дальнейшее распространение текущего события.
Свойства
СвойствоОписание
bubblesВозвращает логическое значение, которое указывает, является ли событие всплывающим.
cancelableВозвращает логическое значение, указывающее, является ли событие отменяемым.
currentTargetВозвращает целевой объект события, обрабатываемого в настоящее время.
defaultPreventedПолучает значение, указывающее, следует ли отменить действи по умолчанию. True - действия по умолчанию должны быть отменены, false - действия по умолчанию разрешаются.
eventPhaseУказывает, какая фаза события, в настоящее время проверяется.
targetСсылается на элемент, который является целевым объектом данного события.
timeStampПолучает время в миллисекундах, когда произошло событие.
typeИмя события (без учета регистра).
isTrustedПолучает значение, указывающее, было ли событие инициировано в браузере (события браузера и пользовательские события) или в сценарии.
Копирование материалов с данного сайта возможно только с разрешения администрации сайта
и при указании прямой активной ссылки на источник.
2011-2016 © puzzleweb.ru
Реклама на сайте | [email protected]
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tag:blogger.com,1999:blog-2267747408703654731.post4680500345704361906..comments2016-02-11T13:34:50.896-08:00Comments on Prettt-tty, pretty, pretty good!: Alignable functors: a typeclass for 'zippy' containersPaul Chiusanohttp://www.blogger.com/profile/[email protected]:blogger.com,1999:blog-2267747408703654731.post-1566360825078115352010-07-07T06:08:48.550-07:002010-07-07T06:08:48.550-07:00A "strong lax monoidal functor" is the m...A "strong lax monoidal functor" is the more formal notion expressed by Applicative.<br /><br />class Functor f => Monoidal f where<br /> unit :: a -> f a<br /> (^*^): f a -> f b -> f (a, b)<br /><br />When your category (like Haskell) has arbitrary exponential objects, the two formalisms are equivalent. In other categories you can have Monoidal when Applicative isn't definable.Edward Kmetthttp://www.blogger.com/profile/[email protected]:blogger.com,1999:blog-2267747408703654731.post-39095994067020943392010-07-06T08:41:09.458-07:002010-07-06T08:41:09.458-07:00Even if your container doesn't provide an empt...Even if your container doesn't provide an empty value, you can always get a free alignable functor by composing Maybe.Rúnarhttp://apocalisp.wordpress.com/[email protected]:blogger.com,1999:blog-2267747408703654731.post-59879177340150818112010-07-06T08:21:06.862-07:002010-07-06T08:21:06.862-07:00@Ed - yes, actually, in our code, we split just th...@Ed - yes, actually, in our code, we split just the align function out into its own typeclass (called 'Align') and there are a couple places that are bounded by Align rather than Alignable.<br /><br />What is a "strong lax monoidal functor"? :)Paul Chiusanohttp://www.blogger.com/profile/[email protected]:blogger.com,1999:blog-2267747408703654731.post-75354096464960925062010-07-05T15:30:56.611-07:002010-07-05T15:30:56.611-07:00Nice observation on the additional law for zipWith...Nice observation on the additional law for zipWith.<br /><br />One note is that as commonly used, a zippable container need not provide an empty value. so they are often only the 'semigroup' portion of the Applicative functor, rather than the full strong lax monoidal functor.Edward Kmetthttp://www.blogger.com/profile/[email protected]
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ece34605c058195ed03b4d393ef1a36c
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filterBlockOnly (J1939)
Block only specified parameter groups on J1939 channel filter
Syntax
filterBlockOnly(chan,pgname)
Description
example
filterBlockOnly(chan,pgname) configures the filter on the channel chan to block only the parameter groups specified by pgname.
Examples
collapse all
Configure the channel filter to block only specified J1939 parameter groups on the channel.
db = canDatabase('MyDatabase.dbc');
chan = j1939Channel(db,'Vector','CANCaseXL 1',1);
filterBlockOnly(chan,{'PG1' 'PG2'})
Input Arguments
collapse all
J1939 channel, specified as a channel object. Use thej1939Channel function to create and define the channel.
Blocked J1939 parameter groups, specified as a character vector, string, or array of these.
Example: 'PG1'
Data Types: char | string | cell
Introduced in R2015b
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HP12C+
#1
According to DATAFILE V27 N5 a new edition of the 12C is going to be sold, featuring the opportunity for firmware updates and modifications like the HP20b offered recently. Does anybody know whether there are more changes included therein, e.g. a different LCD?
#2
Quote:
According to DATAFILE V27 N5 a new edition of the 12C is going to be sold, featuring the opportunity for firmware updates and modifications like the HP20b offered recently. Does anybody know whether there are more changes included therein, e.g. a different LCD?
If it uses the new ARM processor as per the 20b, that chip is perfectly capable of driving the existing display.
If this is true though, then a scientific version can't be that far away...
Dave.
#3
Would the 12C LCD allow for turning it into a 15C?
#4
Quote:
Would the 12C LCD allow for turning it into a 15C?
The main problem is the keys.
Dave.
#5
If it's still the old LCD :-/ , it was the same for all Voyagers.
#6
Same LCD.
#7
If HP knows we are willing to tear apart perfectly good hardware to get to the JTAG interface, perhaps they would be so kind as to manufacture generic or blank buttons for us to insert during the calculator surgery. Preferably the blank ones would be white, or light, ready to accept Sharpie ink.
(This is probably not news to many here): As seen in the link below, the keys appear to be individually placed in the case, which would allow for endless keyboard configurations.
http://www.decodesystems.com/hp11c-apart.html
PG
#8
Quote:
According to DATAFILE V27 N5 a new edition of the 12C is going to be sold, featuring the opportunity for firmware updates and modifications like the HP20b offered recently. Does anybody know whether there are more changes included therein, e.g. a different LCD?
I've asked this before--do we know what CPU is used in the 12C+? I've not found one in the stores yet, or I'd have already opened it up.
#9
hello
Quote:
I've asked this before--do we know what CPU is used in the 12C+? I've not found one in the stores yet, or I'd have already opened it up.
opening it up will not help you, the CPU is in die form under a blob of black stuff... but it's the same ARM7 from Atmel than on the 20b.
Unfortunately, the HP 12C+ does NOT have the Jtag interface (sorry) due to ESD reasons... BUt it still has the serial interface, so you can still reprogram it! I will be probably releasing data on the HP 12C+ soon including schematics and an example application.
regards, cyrille
#10
Quote:
Unfortunately, the HP 12C+ does NOT have the Jtag interface (sorry) due to ESD reasons... BUt it still has the serial interface, so you can still reprogram it! I will be probably releasing data on the HP 12C+ soon including schematics and an example application.
regards, cyrille
No JTAG certainly puts the brakes on my reverse engineering fun, but releasing schematics will be appreciated.
I'm liking this trend toward open hardware...
#11
Gene, I hope you get some royalties...
Just found this ;-) <<<CLICK
Edited: 11 Nov 2008, 4:36 a.m. after one or more responses were posted
#12
Ha!
Nope, none of those suggestions will make it into a 12c any time soon.
I don't think any model will actually be called a 12c+ anyway. It's just a faster 12c.
Much, much faster.
#13
I thought bank and mortgage people didn't trust 12c Platinum numbers because it was too fast, or is that folklore?
#14
In my opinion, the procedure shown at the link you provided makes disassembly look a lot easier than it is. The picture shown with step 3 is not what you would see after removing the screws and removing the back. At that stage, you have two pieces: the back shell, and a "sandwich" consisting of the printed circuit board, key contacts, keys and front shell. Separating that sandwich requires a rather nasty process of trimming 40+ heat stakes to free the front shell and allow it all to be separated. The stakes must be carefully trimmed, removing only the part of the stake that is "mushroomed" over. The center portion of the mushroom must be left intact and protruding through the PCB so that there is something to either “re-mushroom” or glue to when reassembling. Reassembly of the sandwich in a tight, sturdy and reliable manner after the keys are re-arranged and/or the keys and keyboard itself are relabeled is something which I believe would be beyond the abilities of most mortals.
But, since the subject 11C was built in 1985, perhaps new voyagers utilize a different type of construction. I do not have a new “ 12C+” or even a late model 12C (i.e. with a single 2032 battery) to take apart to check. I do have a 12CP 25th Anniversary model. Being the curious sort, I attempted to remove the back. First off – it has 5 screws, the four under the feet and one in the battery compartment. There are also several plastic catches around the sides (one each on the top and sides, two on the bottom) which were freed with some gentle prying to separate the back. Suffice it to say that it doesn’t look a lot like the 11C. However, this may be good - although the PCB and the rest of the stuff between it and the front shell do not readily separate, there do not appear to be a bazillion heat stakes. Without taking an exacto knife to them, it appears that there are just 11 heat stakes that hold things together. What’s more, these stakes look like the ones in the 35s (disassembly detailed here), except without the screws. So maybe they could be trimmed, then re-fastened with tiny screws. However, the keys may be on frames, like the 35s. If the 12C+ uses similar construction, perhaps disassembly and re-labelling may be viable. Of course all of the above is speculation, which Cyrille or one of our friends with a 12C+ are warmly invited to confirm or correct.
#15
Hi Cyrille,
May I ask your honest opinion an why you think HP or their subcontractors aren't able to produce a decent keyboard anymore. Please don't take this as an offense but rather as a constructive comment. I've just bought a HP-20b and deeply regret it. Ok I bought it mainly as I was interested in ARM CPU programming. I don't think I'm spoilt by good old and expensive HP calcs but I expect a minimum usability. My claim is that it's almost impossible to do some error free calcs on these new HPs due to many missed keystrokes. And I can hardly believe that it's impossible to design a reliable keyboard on a budget. I don't expect molded keys but a good tactile feedback.
I hope the new 12C+ is better in this respect.
Regards from Switzerland
Daniel
#16
Don't ask this of Cyrille. You know perfectly well he can't answer while he works for HP.
#17
Hi Bruce,
Actually it was my intention to ask Cyrille as he works for HP and I hope he's got something to say on harware evaluation. I also like to mention that I like the software of the 20b and the fact that this is the first business calc to also have scientific functions. But I had it used by some of my coworkers in the aircraft R&D dept and they all struggled over the unusable keyboard. I haven't given up all my hopes.
Regards Daniel
#18
I do not have a 20b but a 35s, 17bii+ silver, and 12c anniversary edition. Last 3 models feature keyboards with IMHO reasonable tactile response, and my samples record my keystrokes reliably. So, my conclusion is: YES HP CAN produce "right" keyboards still :)
Seems to be impossible for them, however, to merge all advantages into one model. You get firmware access (20b) OR a row of soft keys (17bii+) OR landscape design (12cp) OR scientific (35s). You MAY get a good keyboard (3 out of 4). You will get 16x131 dot matrix of 1988 (17bii+), 7 segments display of 1981 (12cp), 2x14 pixel blocks (35s), or crippled dot matrix (20b). You will NOT get a state of the art display. Hard to understand for me. Must be marketing ;)
Ceterum censeo: HP, launch a 43s (or a 15s or ... well, you know).
Walter
Edited to add the display variants.
Edited: 11 Nov 2008, 2:33 p.m.
#19
Quote:
According to DATAFILE V27 N5 a new edition of the 12C is going to be sold, featuring the opportunity for firmware updates and modifications like the HP20b offered recently. Does anybody know whether there are more changes included therein, e.g. a different LCD?
When will HP launch the HP 12C+ ?
Apart from using new CPU, any additional features?
#20
Already selling overseas.
No new features other than the serial connection.
Sorry, no cable for that in the box.
How to tell the difference? new 12c uses two 2032 coin batteries.
#21
Gene,
if I understand you correctly, then there will be no difference visible looking on the keyboard (or top) side of the 12c. Y/N?
#22
Quote:
Already selling overseas.
Where?
#23
Yes, no visible difference on the keyboard side of the update.
Being in the USA, I can't answer the second question.
But, if you find a 12c on the shelf somewhere that has a second coin-battery, then you have it.
Or, a 12c that does around 60,000 counts a MINUTE in the " + GTO 01" loop, then you have it. :-)
#24
Quote:
If it uses the new ARM processor as per the 20b, that chip is perfectly capable of driving the existing display.
If this is true though, then a scientific version can't be that far away...
Dave.
Seriously? I'd kill for a superfast 15C.
Just don't ask whom I would kill...
#25
The 12C+ raises an interesting question.
They have completely revamped the hardware architecture on their highest selling and longest running calculator, with no name change or other visible marketing difference - Why?
Were existing components about to become obsolete and they were forced into a change? (unlikely I'd say, but there have been a lot of silicon fabs going under recently)
Is the new solution cheaper to manufacture? Given that they have been selling the old one in large volumes for a long time, and the fact that they'd have to amortise new development cost again, this seems a bit unlikely. Perhaps in the long run?
Is it an investment in a new strategic direction? Where they can more easily churn out new models for niche markets based on common platforms. i.e. they plan to bring back the Voyager platform (and Pioneer like 20b) in scientific and maybe other flavours. This seems likely.
Financial models may have come first because they are a better cash-cow to get the concept off to a flying start perhaps?
Perhaps another reason(s) entirely?, or a combination?
Dave.
#26
My guess is that they will start using just 2 AR'M CPU's
so it is a more strategic directive plus I guess it also lowers the overall cost on the long run, so it's therefore - well - financial decision. just my 2 eurocents...
#27
Nice theory. Let me quote from the Editorial of Datafile V27 N5:
Quote:
This new model (12C+) ... was first mentioned at the HHC2007 conference when (Cyrille) mentioned that the processor used for the 12C Platinum and 25th Anniversary Edition was no longer in production and that stocks were coming to an end, forcing HP to re-design the calculator around a new processor.
#28
Well there you go. Thanks for the clarification.
As a designer I hate it when the "last orders taken" call comes form the manufactuer. Do you buy 10 squillion of them to last you 20 years, or do you redesign...
It's often a big ask to take an ASIC to another fab, so it was probably a no-brainer for them to re-design.
Dave.
#29
The problem with redesigning the 12C is that bugs can/will creep into the firmware. Much of the financial community depends on this calculator and trusts the results. A serious bug will erode that trust and HP could loose the market for this calculator.
Also, we're not the only group of users that are picky about the feel of the keys. I get comments from all my clients (I consult to wall street firms) that they hate the feel of cheap plastic keys on the newer 12c's. I sure hope that the 12C+ doesn't make this even worse.
#30
So this is the knock out for any menus :-(
#31
NOW there is finally hope for new fast and large-memory
HP-15C
with memonics instead of keycodes,
maybe A..Z labels (and matrices)
and 35s-style row-number addressing
and...
<drool>
#32
Hyvää päivää Veli-Pekka,
You were right IF they would spend a reasonable display. But with the traditional one, displaying alphabetic information will be very difficult :(
Ceterum censeo: HP, launch a 15s (with a dot matrix LCD!!)
Walter
#33
Does anyone know when the new 12C will be available in the U.S.? Thanks.
#34
You created a lot of excitement in the community with the open hardware developed recently. Some projects are on their way. Assessing the opportunities, however, it comes down the display driving means are rigidly limiting any custom developments based on these platforms. On the other hand, the largest LCD available so far in an HP RPN calculator is the one seen recently in the 17bii+ Silver again, featuring some 2100 elements. I don't know if you are willing (and allowed) to answer the following 2 naive questions, but I ask them anyway:
1. Is there a chance for a calculator with the form factor of the 17bii+ Silver *with an JTAG interface or similar*?
2. Where are the limits of this LCD driver?
If my request shows a significant lack of electronic understanding then I apologize right now. I'm no electronic engineer, I'm just wondering and trying to understand. Thanks in advance for your response, if possible.
Walter
#35
I do not know, but my guess would be that the new 12C will become available when the old 12C stock that is currently in the pipeline is exhausted. So encourage all of your real estate agent, mortgage broker and stock broker friends (who will not care about the new features) to buy up the old stock. (Oh yeah, the real estate agents, mortgage brokers and stock brokers are having a tough time these days.)
.
#36
Walter,
Sorry, I'm not Cyrille:-) Perhaps he will chime in but if not...
Was not your second question answered here?
.
#37
Jeff,
IIRC these 400 elements were the limits of the chip in the 20b. I want to know the limits of the 17bii+ ... or did I miss anything?
#38
Quote:
Jeff,
IIRC these 400 elements were the limits of the chip in the 20b. I want to know the limits of the 17bii+ ... or did I miss anything?
As far as I know, the 17bii+ uses a 6502 based core with mask or OTP rom, not flash. That means we can't hack new code into the microcontroller.
OTOH, the 20B uses the Atmel AT91SAM7L128, which can be updated in the field with new code. The internal LCD controller is limited to 400 segments.
#39
OK, sorry, I misunderstood. But from what I have read, any and all new designs will be based on the new chip. So if you want more than 400 elements, you need the outboard driver circuitry which increases costs, etc. etc.
.
#40
At least now we can agree on the model number :-)
Also the dot matrix display - even a 20b style - is a must
#41
Fully agree it increases costs, but - just in case it didn't become clear yet - I don't want a mushy calc for 40US$, I want a serious scientific instrument instead.
To make it simple: Right now the top of HP's calculator line sells for some 130US$ retail, with a huge LCD and tremendous power many of us don't need, and a RePeLling OS and a large housing many of us don't want. Somewhere in between the 20b and the 50G, presumably next to the upper limit, must be a niche for the heir of the 42S. According to the survey most of us participated, many are willing to pay even more for such a device than for a 50G.
So if you claim
Quote:
any and all new designs will be based on the new chip
I doubt it, since the 17bii+ Silver contains something different, and since I doubt HP will abandon intentionally all medium level RPN activities and reduce its own market to cheap calcs with low margin. Maybe I'm terribly wrong, however. Dunno. Anyway, DaveJ and Hugh Steers have proven they can build a very nice device within limited time from scratch with standard material and homegrown SW, and for reasonable costs, though far away from mass production. So, if HP will provide a feasible platform, it may well start something like "personal calculating" which may be not only a big boost for its renommee in the sci-tech world but also a direct economic success. It may even become "cool" to taylor one's own calculator. I'm no marketeer - but also the decision for the 35 was not taken by marketeers, nevertheless it became a great (unexpected) success because it started something new fulfilling the needs of professionals.
So, please, HP, after creating the 20b as a guinea pig for the new concept of open calcs, and after extending that approach to the 12C forced by short supplies, please do the next step and provide a platform allowing to make something serious - if you don't want to make it completely on your own.
<end of rant - or in German: Das musste mal gesagt werden!>
Ceterum censeo: ... you know.
Walter
Edited: 12 Nov 2008, 6:12 p.m.
#42
Peace for our time?
Though I must call for a *real* dot matrix display, i.e. 16x131 or higher, as you know ;)
#43
Quote:
Fully agree it increases costs, but - just in case it didn't become clear yet - I don't want a mushy calc for 40US$, I want a serious scientific instrument instead.
Rest assured, your desires are very clear :-)
Quote:
To make it simple: Right now...many are willing to pay even more for such a device than for a 50G.
I agree with everythign you said here.
Quote:
So if you claim
Quote:
Quote:
any and all new designs will be based on the new chip
Not a claim, just an assumption.
Quote:
I doubt it, since the 17bii+ Silver contains something different, and since I doubt HP will abandon intentionally all medium level RPN activities....
I certainly hope you are correct.
#44
hello
Quote:
1. Is there a chance for a calculator with the form factor of the 17bii+ Silver *with an JTAG interface or similar*?
> sorry, but I can not answer that question... however, I can tell you that doing so would require a redesign of the 17BII+ with a new chip which is non trivial
2. Where are the limits of this LCD driver?
> for the 20b, it's 400 segments. for the current 17BII+ CPU, is't in the 2500 range if my memory serves me well.
regards, cyrille
#45
Quote:
Rest assured, your desires are very clear :-)
It's going to be tough to have it all. The 20B CPU is maxed out at 400 segments, and it only has 6kB of ram. You'd have to add both an external LCD controller and external memory before it would be capable of replacing the 35S or 17bii+ guts.
You'd gain the ability to do field firmware updates and maybe a better toolchain than with the 6502 core. Doesn't seem like enough in the pro column to make up for the cons.
The 12C+ switching to the '7L128 CPU makes a lot of sense to me--the chip can drive the existing display and has enough ram for the 12C platform, it's proven from the 20B project, so why not? Hackability and field updates are a nice side effect.
#46
A short calculation of the number of LCD segments in the 35s display results in more than 1000. So no chance to use the built in controller of the processor in the 20b exclusively.
#47
Will both the original 12c and the 12c 25th anniversary be updated?
#48
No algebraic on this guy. It is a 12c, not a 12cp.
#49
The new 12C (with two coin cells) should get arithmetic results identical to the original 12C (one coin cell or three button cells) for all calculations, as it is using exactly the same algorithms as the original. If you find any cases where it differs, please let Cyrille and me know about it.
This is different than any version of the 12c Platinum, which uses entirely different code than the 12C, and may get different results. I'm not sure about the early 12c Platinum, but the newer versions (with parentheses and undo) should generally have higher precision than the 12C.
#50
Quote:
The new 12C (with two coin cells) should get arithmetic results identical to the original 12C (one coin cell or three button cells) for all calculations, as it is using exactly the same algorithms as the original.
If you find any cases where it differs, please let Cyrille and me know about it.
Does this means that it's firmware is based on Nonpareil?
#51
Congratulations if that's true, Eric!
Do you have any (financial) agreement with HP?
#52
I suspect he can't say even if he hasn't got any contracts. Another thing is that the original interest rate calculations of the original calculator (which is now fatefully duplicated) is "better" than the more accurate Platinum version. ??? Because it is The Official Wall Street Calculator and it has to do the calculation exactly the same way - forever! This is surely gonna be the longest in-production model ever - even if it's now emulated on new hardware. If HP brings back the HP-15C+ redesigned with 32KB RAM and full alpha labels/matrix names from A..Z, I guess it could also be successful as a true pocket size scientific non-graphing calculator.
#53
Quote:
If HP brings back the HP-15C+ redesigned with 32KB RAM and full alpha labels/matrix names from A..Z, I guess it could also be successful as a true pocket size scientific non-graphing calculator.
IF. But you'll need a different LCD for this, and recent communication doesn't support the assumption of such a capable (or call it normal) LCD :-/
#54
HP bring back the HP-42...with SD-card for surveying
LCD should be graphing (18C/19BII, 28C/S)
#55
Quote:
If HP brings back the HP-15C+ redesigned with 32KB RAM and full alpha labels/matrix names from A..Z
Why look a gift horse in the mouth?
Addressing more memory would be great, but adding "full alpha" and/or other bells and whistles to the original ROM might be asking too much. Why ask the developers to tinker with something that is already tested and true.
Some of us cannot afford eb*y HP 15Cs, so holding a new 15c+ in my hand (vs. clicking on an emulator), running the same firmware that so many have used and trusted forever, would be nice for me, and hopefully countless others.
Thanks,
PG
#56
Pal,
Quote:
Why look a gift horse in the mouth?
Heh, I'd have not guessed to see a German idiom nearly literally translated in English ("Einem geschenkten Gaul schaut man nicht ins Maul") :)
For your other statement, I take the liberty to disagree. As I've said here earlier already, the 15C was a great machine in its time. Time didn't stop then, however, so we've seen further progress after the 15C, meaning models with advanced user interfaces. So, returning to displaying programs in keycodes would fall back behind the 32S. Returning to split complex objects and double stacks would do the same. It would be disappointing for the educated user, who experienced better things meanwhile. IMHO a relaunched 15C+ with a display of 1981 would confine the market to the community of vintage calc fans, while an LCD at least on the level of a 32S LCD will add some extra push to the C+ and gain new users.
Just my 20 Milli-Euros.
Ceterum censeo: ... (you know)
Walter
#57
Assuming that this is true and the 12C+ is running an unmodified ROM dump of the original 12C, that means that it's going to be back to 99 program steps/20 registers. Although that's probably fine for 99% of 12C users it seems like a step backwards from the 12CP versions -- and I won't be able to use all that extra speed to get 632 digits of pi :(
OTOH, I suppose when you go through all this effort to create such great algorithms it's worth keeping them.
Quote:
The HP 12c team concluded that they would design the calculations in the 12c to be so precise that the calculator could receive certification by the federal Bureau of Standards (now the National Institute of Standards and Technology). Hence, HP 12c’s results were legally accurate for the banking industry.
The algorithms used to perform calculations such as bond interest and partial payments on home mortgages were critical if the calculator was to be trusted by the financial world and meet the U.S. standards. HP consulted with experts from various countries to be certain that the calculator would work in markets using different methods of calculation all over the world. HP worked with William Kahan, UC Berkeley’s renowned professor of mathematics, electrical engineering and computer science, to develop and test the complex algorithms.
Edited: 15 Nov 2008, 1:48 p.m. after one or more responses were posted
#58
Remember, modifying the 12c to add more program steps and algebraic is what gave us the problems with the 12cp.
I think better to have a 12c that is > 60X faster is better than a 12cp with issues.
My 2 cents (or what is it worth with the bailouts these days?)
#59
Quote:
Does this means that it's firmware is based on Nonpareil?
From the Nonpareil news page: "Voyager calculator models have been removed in release 0.79 due to licensing issues. They will be made available in a separate package in the near future." (August 23, 2008).
Coincidence?
#60
Quote:
Heh, I'd have not guessed to see a German idiom nearly literally translated in English ("Einem geschenkten Gaul schaut man nicht ins Maul") :)
I'm guessing multiple languages might have taken that from the Latin original Equi donati dentes non inspiciuntur. Have a look here
>>>in the horse's mouth<<<
Edited: 15 Nov 2008, 2:07 p.m.
#61
Walter, I agree an improved 15c, like the 4-line LCD models you fathomed, and I modeled, would be incredible, powerful, and desired. However, all the talk about the "12c+" and a "15c+" makes me think HP might just use their new processor to emulate old ROMs. Since the 12c+ is presumably only getting a new PCB (but same display and chassis (w/more batteries)), but not new firmware (classic 12c only, please), why not roll a 15c+ with its own new PCB and famous 15c firmware (already written and waiting)?
Know what I mean?
Trust me, I would love a 4-line Voyager, but that may be dreaming..
Cheers,
PG
#62
Quote:
From the Nonpareil news page: "Voyager calculator models have been removed in release 0.79 due to licensing issues. They will be made available in a separate package in the near future." (August 23, 2008).
Coincidence?
I doubt it's a coincidence, well done Eric!
The original ASIC was no longer obtainable, so that either meant new software almost from scratch for a new platform, or an original ROM emulator already proven. Seems like a no-brainer decision to me.
Makes sense from HP's point of view for such a vital calculator as the 12C
The reasoning is not really the same for a scientific version (i.e. 15C), but if it's so easy, why not?
I'd be very surprised if Cryrille doesn't already have a new 15C prototype on his desk...
Dave.
#63
George,
Thanks for the link. I didn't know it's going back to Noli equi dentes inspicere donati! It's all Caesar's fault ;)
Edited: 15 Nov 2008, 4:26 p.m.
#64
Pal,
Quote:
I agree an improved 15c, like the 4-line LCD models you fathomed, and I modeled, would be incredible, powerful, and desired.
Agreed. Though I only remember my 3-line 15s in Voyager dimensions, and don't recall your models right now (my bad memory).
Quote:
why not roll a 15c+ with its own new PCB and famous 15c firmware (already written and waiting)?
Absolutely no problem -- but *zero* progress as well. This would be just an edition for us greybeards as mentioned already, nothing to gain new users. So I'd rate this as a missed opportunity, though I understand some reasons for doing it this way.
Ceterum censeo: HP, launch a 15s (take the chance to pimp your 15C -- don't try to tell us you've got no ideas for improvements after 27 years of development in the world of electronics).
Walter
Edited to add a call for action.
Edited: 16 Nov 2008, 5:20 a.m.
#65
Quote:
Assuming that this is true and the 12C+ is running an unmodified ROM dump of the original 12C, that means that it's going to be back to 99 program steps/20 registers. Although that's probably fine for 99% of 12C users it seems like a step backwards from the 12CP versions -- and I won't be able to use all that extra speed to get 632 digits of pi :(
OTOH, I suppose when you go through all this effort to create such great algorithms it's worth keeping them.
THAT is the difference between HP-12C(+) and "HP-15s". You just can't chamge the algorithms in the 12C, but 15C could become 15s, if not, then it's better to release HP-42 instead.
#66
The 400 segments the new chip can drive would allow for a 15C+ featuring an LCD almost like the one the 32sii had. Just 10 blocks of 5x7 pixels, corresponding to 10 digits as in the Voyagers before, instead of 12 as in the Pioneers. This would allow for everything a Voyager did show so far, plus some alpha display (e.g. mnemonics instead of key codes!) and up to 5 menu keys.
A poor-man's solution may be using Pioneer displays and dropping the last 2 blocks, provided the LCD would fit geometrically into the Voyager housing.
Just crossed my mind ...
Edit:
Forget the last paragraph: Recycling Pioneer displays needs the Voyager housing being 6mm higher. But a new versatile 400 segment LCD of this kind is worth thinking about, when we need a PCB redesign for the new chip anyway.
Edited: 17 Nov 2008, 5:03 p.m.
#67
Quote:
But, since the subject 11C was built in 1985, perhaps new voyagers utilize a different type of construction. I do not have a new “ 12C+” or even a late model 12C (i.e. with a single 2032 battery) to take apart to check. ... However, the keys may be on frames, like the 35s. If the 12C+ uses similar construction, perhaps disassembly and re-labelling may be viable. Of course all of the above is speculation, which Cyrille or one of our friends with a 12C+ are warmly invited to confirm or correct.
I do have a non-working "late model 12C" I took apart (s/n CNC5070...). I found still the good old 39 separate keys, placed individually in their frames as in 1981. No information about newer editions though.
#68
Was it held together with heat stakes? If so, how many? How did you hold it together upon re-assembly?
#69
Quote:
Was it held together with heat stakes? If so, how many?
41. Plus 6 screws.
Quote:
How did you hold it together upon re-assembly?
Not. As mentioned, it's a non working unit. I bought it for very few money just for curiosity to see what's inside. I'd not kill a living Voyager for this ;)
#70
OK, so if we keep the old display, we won't get menus nor alpha prompts nor mnemonics in program listings, what can still be done despite all these awkward limitations? I tried a really careful redesign of the 15C, to avoid - beware - frightening any conservatives, and eventually came to this:
I'm not sure about the use of blue shifted COS, one may place something like Re<>Im there instead. Please, however, find the conversion key as blue shifted CHS, to be combined with the shifted functions of keys 4 through 9. But don't tell them.
Remember: no menus, no mnemonics, no alpha. Just a big step into ... the past.
Ceterum censeo: HP, launch a 43s or 15s.
Walter
#71
Based on the 12C+ discussion -- that it's running the original 12C ROM image -- if there is a 15C+ on the horizon it's going to be an original 15C only a lot faster. The only additional cost to produce this given, the 12C+, would be printing the keys and the faceplate (and perhaps more money to Eric). I'll bet that one is on the way pretty soon.
#72
Quote:
Based on the 12C+ discussion -- that it's running the original 12C ROM image -- if there is a 15C+ on the horizon it's going to be an original 15C only a lot faster. The only additional cost to produce this given, the 12C+, would be printing the keys and the faceplate (and perhaps more money to Eric). I'll bet that one is on the way pretty soon.
Yep, betcha Cyrille already has one too.
I wonder if the market for original 15C and 11C's will plummet if/when such a calc comes out?
Dave.
#73
To complete the information:
BASE 0 = integer base 10
BASE 2 = BIN
BASE 6 = HEX
BASE 8 = OCT
BASE . = DECM
MODE 0 = ALG
MODE 1 = RPN
MODE 2 = proper fraction mode (HR or BASE . will return to DECM)
MODE 3 = improper fraction mode
MODE 4 = /c in 32sii (set maximum denominator)
MODE . = toggles decimal radix mark
Edited to add HR.
Edited: 20 Nov 2008, 2:22 a.m.
#74
Nice work as usual. But alas it has two of my pet peeves - a dedicated HYP key, and a shifted 1/X key.
Dave.
#75
Dave, thanks for your feedback. The simplest solution may be to swap these 2 function labels. The result will be:
Function keystrokes now and after swapping
1/x g 1/x 1/x
sinh HYP SIN g HYP SIN
arcosh INV HYP COS INV g HYP COS
I simply shrinked from requiring 4 keystrokes for 3 "plain" functions, but I understand your request. I may even change it after another night ;)
Walter
Edited: 19 Nov 2008, 6:21 a.m.
#76
Quote:
OK, so if we keep the old display, we won't get menus nor alpha prompts nor mnemonics in program listings, what can still be done despite all these awkward limitations? I tried a really careful redesign of the 15C, to avoid - beware - frightening any conservatives, and eventually came to this: ...
As a long-time HP-15C owner/user, I'll admit I find this new layout a little bit disorienting. The true purist would complain you're not allowed to move ANY keys, but that's unrealistic and limits the ability to sneak in extra features in a sensible manner.
What are the added white markings for? Parentheses are pretty obvious if you're going to include a non-RPN mode, and I'm guessing the upper-left/lower-right combination replaces the SST and BST keys for stepping through programs. How about the dashes which seem to be grouping keys?
Finally, I've had very little use for the hyperbolic functions and would much rather see (1/x) as a primary key.
#77
I would rather change the [ f ] key to [ALPHA] and use the left-hand side of each key to show a neon-green letter, except for [ENTER] [<=] and the shift keys. what about only [ g ]-shift then? Let's make it a ROTating shift: f,g,none,f,g,none,...[f,g] What about other "alpha" than the letters A..Z? You could put them under the first alpha A..Z using another color and naturally you press [ALPHA], then the [f,g] shift key then the appropiate key. This way we can really clutter up the keyboard! :-)
Edited: 19 Nov 2008, 9:42 a.m.
#78
Veli-Pekka,
please explain the use of [ALPHA] without an LCD capable of displaying them.
Kiitos,
Walter
#79
You use what you can... :-/
#80
Meant for writing secret messages...
SCNR;-)
#81
Not something I would endorse, but the TI-59 had it: some alpha capability without an alpha display, an external printer was needed to take advantage of it.
In a modern model, it may be of use when interfacing to a PC via USB or so... Just thinking...
#82
Alpha capabilities could be useful, if the display were a reincarnation of the segmented 41C variety. It should have no more than 400 single elements and fit easily the new processor.
I wouldn't want a programmable calculator with numeric code display.
#83
100% agree!
BTW, my car's radio+cd player has such 14-segment LCD, very similar to the HP 41C and I actually find it rather readable and nice (of course, it also calls fond 41C memories).
Luckily, it never showed "MALFUNCTION", "NONEXISTENT" or "MEMORY LOST" yet!
:-)
#84
Chris,
Quote:
What are the added white markings for? Parentheses are pretty obvious if you're going to include a non-RPN mode, and I'm guessing the upper-left/lower-right combination replaces the SST and BST keys for stepping through programs. How about the dashes which seem to be grouping keys?
Finally, I've had very little use for the hyperbolic functions and would much rather see (1/x) as a primary key.
You're right. The upper left quarter of the design looks this way now:
The white dashes there are between all keys which's primary function may be combined with INV.
The white marks in the upper right quarter are between all keys allowing mode conversions. I.e. > DEG, RAD, GRD, POL, REC, H:M:S, HR, REAL, CPX. You set e.g. polar mode by pressing f POL. Within this mode you convert the contents of x and y (representing the magnitude and the polar angle) to Cartesian components by pressing g > g REC.
And the upper-left and lower-right keys are for BST and SST, as you guessed, and also for scrolling e.g. large binary numbers, and for leaving a parenthesis in ALG mode. Parentheses are inserted in pairs always. They are for indirect addressing, too. For example, pressing STO + () 07 adds x to the memory register 07 is pointing to.
Edited the last paragraph and moved some keys to achieve even less difference to the 15C.
Edited: 20 Nov 2008, 6:40 p.m. after one or more responses were posted
#85
Quote:
I wouldn't want a programmable calculator with numeric code display.
I double that, I can't be bothered memorizing numeric codes anymore, that page should be closed at any expense. New calculator is expected to have a lot more memory either...
Cheers,
Reth
#86
I second your opinion. And such a segmented LCD would allow for at least 2 more digits/characters. Compare an alternative here, also within the limits of 400 elements.
#87
the 41C has 14-segments plus a (semi)colon eg 17 together for each character. some annuciators like flags 0..4 ALPHA USER ... with 400 elements thats 2*11 characters. If we leave out extra dot for semi(colon) and satisfy ourselves with just comma/point eg, 16 segments => 2*12 characters and some extra annuciators! - I want another CPU and a real dot matrix LCD...
#88
Displays are the cornerstones.
This thread has shown this again. HP, please equip your calculators accordingly -- at least those you want to sell for good money. There are enough cheap calcs in this world, please proof you can make a difference. I think every member of this forum is at least willing to support this process.
#89
Do I recall correctly that Eric had a patch for the 15C firmware so that it could use more memory? I think there was some problem with displaying the step numbers, but it worked in nonpareil. So more mem might no be a problem.
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ece34605c058195ed03b4d393ef1a36c
|
2,930,707,145,602,041,300 |
Bambang pramusintha
Archive for the ‘Meta Geo Tag’ Category
How To Add Geo Meta tag
In Joomla CMS, Meta Element, Meta Geo Tag on July 11, 2012 at 9:26 am
Historically, meta tag for the language and the country has been less reliable than conclude the language or country directly. For example, many webmasters also just copy / paste from the template of a friend without checking the meta tag values.
Unreliability of meta tags is why Google tends to not use them or give them less weight.
So webmasters here three points for considering to put the geo meta tag to your website/blog :
[1] Bing currently using geo-meta tag
[2] Google ignores meta tags geo
[3] Be careful when you copy or use an existing template template
Cortesy forum discussion at Bing Community.
” I suggest adding the following meta tag to your home page header and verify that there are no tags pointing to “en-gb”–especially if you are using the Joomla CMS “, Brett said specifically, with Joomla.
Brett Young from the Bing webmaster support team suggested to the webmaster to change the meta tag to:
<meta http-equiv=”content-language” content=”en-us”>
“We generally ignore geo-meta tags like that because we’ve found that they are generally incorrect [copy & pasted from a template, etc]”, Brett Young Said.
A Google Webmaster Help thread once again confirms that Google ignores the geo-meta tags. Those tags somewhat look like this and use to serve the purpose of telling search engines where the site is based:
<meta name=”geo.placename” content=”United States” />
<meta name=”geo.position” content=”x;x” />
<meta name=”geo.region” content=”usa” />
<meta name=”ICBM” content=”x,x” />
It seems like this is a common issue webmasters run into when using Joomla.
%d bloggers like this:
|
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222,026,906,046,458,340 |
Recommend:
To the knowledge base
Setting up an IPSec VPN between two FRITZ!Box networks
IPSec allows you to connect two FRITZ!Box networks at different locations over the internet via a secure, encrypted VPN connection (LAN-LAN linkup). This allows you to access all of the devices in the remote network and use all of the IP-based services such as email servers, data banks, and file servers at both locations.
You can find an overview of additional VPN connection options in our guide VPN with FRITZ!.
Example values used in this guide
In this guide we show you how to connect "FRITZ!Box A" in a branch with "FRITZ!Box B" in the headquarters. When setting up the connection, replace the values used in this guide with your actual values.
Requirements / Restrictions
• FRITZ!Box B (headquarters) must either obtain an IPv6 address or a public IPv4 address from the internet service provider. FRITZ!Box A (branch) must obtain an IP address with the same protocol version (IPv4 or IPv6) from the internet service provider.
• FRITZ!OS 7.50 or later is installed on both of the FRITZ!Boxes.
Note:All instructions on configuration and settings given in this guide refer to the latest FRITZ!OS for the FRITZ!Box.
1 Preparations
Configuring MyFRITZ!
Register the FRITZ!Boxes with MyFRITZ!Net so that they can always be reached on the internet at fixed MyFRITZ! addresses:
1. Create a MyFRITZ! account and set it up in both of the FRITZ!Boxes.
Note:You can either configure the same or different MyFRITZ! accounts in both of the FRITZ!Boxes. Even if both FRITZ!Boxes use the same MyFRITZ! account, each FRITZ!Box has its own unique MyFRITZ! address.
Adapting the IP Networks
VPN communication is not possible if both FRITZ!Boxes use the same IP network. Since all FRITZ!Boxes use the IP network 192.168.178.0 in the factory settings, configure IP addresses from different IP networks in the FRITZ!Boxes:
Example:
In this guide, FRITZ!Box A (branch) has the IP address 192.168.20.1 (subnet mask 255.255.255.0) and FRITZ!Box B (headquarters) the IP address 192.168.10.1 (subnet mask 255.255.255.0).
Changing the FRITZ!Box's IP network
1. Click "Home Network" in the FRITZ!Box user interface.
2. Click on "Network" in the "Home Network" menu.
3. Click on the "Network Settings" tab.
4. Click "Additional Settings" in the section "LAN Settings" to display all of the settings.
5. Click the "IPv4 Settings" button.
6. Enter the desired IP address and subnet mask.
7. Click "Apply" to save the settings and on the FRITZ!Box, confirm that the procedure may be executed, if you are asked to do so.
2 Configuring FRITZ!Box A (branch)
1. Click "Internet" in the user interface of FRITZ!Box A (branch).
2. Click "Permit Access" in the "Internet" menu.
3. Click the "VPN (IPSec)" tab.
4. Click the "Add VPN Connection" button.
5. Click "Connect your home network with another FRITZ!Box network (LAN-LAN linkup)" and then "Next".
6. In the field "VPN password (pre-shared key)", enter the password required to establish the VPN connection (secret1234). Use numerals and letters, and combine capitals and lower-case letters.
Configuring an IPSec connection in FRITZ!Box A (branch)
7. Enter a unique name for the connection (FRITZ!Box headquarters) in the field "Name of the VPN connection".
8. Enter the MyFRITZ! address of FRITZ!Box B (kw23qbmnj31x5aw75.myfritz.net) in the field "Web address of the remote site".
9. Enter the IP network of FRITZ!Box B (192.168.10.0) in the "Remote network" field.
10. In the "Subnet mask" field, enter the subnet mask that corresponds to FRITZ!Box B's IP network (255.255.255.0).
11. If you want to maintain the VPN connection all the time and the FRITZ!Box has a public IPv4 address, enable the option "Hold VPN connection permanently".
12. If access to SMB shared files in the remote network should be allowed, enable the option "Allow NetBIOS over this connection".
13. Click "Advanced Settings for Network Traffic".
14. If you do not only want to use the VPN connection to access the remote network, but also want all web requests to be sent to FRITZ!Box B (headquarters), enable the option "Send all network traffic via the VPN connection".
15. If only certain devices should be allowed to access the remote network, enable the option "Only certain devices use the VPN connection" and select the corresponding devices.
16. Click "Apply" to save the settings and on the FRITZ!Box, confirm that the procedure may be executed, if you are asked to do so. The internet connection will be cleared briefly and then re-established right away.
3 Configuring FRITZ!Box B (headquarters)
1. Click "Internet" in the user interface of FRITZ!Box B (headquarters).
2. Click "Permit Access" in the "Internet" menu.
3. Click the "VPN (IPSec)" tab.
4. Click the "Add VPN Connection" button.
5. Click "Connect your home network with another FRITZ!Box network (LAN-LAN linkup)" and then "Next".
6. In the field "VPN password (pre-shared key)", enter the password required to establish the VPN connection (secret1234).
Configuring an IPSec connection in FRITZ!Box B (headquarters)
7. If the field "Name of the VPN connection" is displayed, enter a unique name (FRITZ!Box branch) for the connection.
8. Enter the MyFRITZ! address of FRITZ!Box A (pi80ewgfi72d2os42.myfritz.net) in the field "Web address of the remote site".
9. Enter the IP network of FRITZ!Box A (192.168.20.0) in the "Remote network" field.
10. In the "Subnet mask" field, enter the subnet mask that corresponds to FRITZ!Box A's IP network (255.255.255.0).
11. If you want to maintain the VPN connection all the time, enable the option "Hold VPN connection permanently".
12. If access to SMB shared files in the remote network should be allowed, enable the option "Allow NetBIOS over this connection".
13. Click "Apply" to save the settings and on the FRITZ!Box, confirm that the procedure may be executed, if you are asked to do so. The internet connection will be cleared briefly and then re-established right away.
4 Establishing a VPN connection
If you enabled the option "Hold VPN connection permanently" in the FRITZ!Boxes, the VPN connection will be maintained at all times.
If the option "Hold VPN connection permanently" is not enabled, the VPN connection is automatically established when the remote network is accessed and it is cleared again if it has been inactive for one hour.
Note:Active VPN connections are displayed in the FRITZ!Box user interface under "Overview" in the section "Connections".
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TechSpot
Don't know where to start - proxies!
By taffia77
Aug 11, 2006
1. Hope someone can help with this. Basically I'm in the UK and I've got a mate in the states who's happy to set himself up as a proxy server for me (but only me!) so that I can access certain sites that I can't here in the UK.
The thing is I haven't got a clue where to begin. Do I need specialist software or is it a case of enabling/disabling certain settings.
Also will it need to be an anonymous proxy? And how can we make sure that it is only me who can get through the proxy and no-one else?
2. Nodsu
Nodsu TS Rookie Posts: 5,837 +6
What is the proxy for? Do you need a simple web proxy or do you need to forward other kinds of connections too? Do you need encryption? Do you and/or your friend have static IP addresses or not? Is your fiend going to use a dedicated computer for proxy duty or will it be his Windows desktop?
3. taffia77
taffia77 TS Rookie Topic Starter Posts: 37
Basically, it's to get around broadcasting rights issues. I want to watch events over broadband, but I'm restricted here. I don't know what kind of proxy I need for that!
If by encryption you mean so that only people he allows can use the proxy then yes (we certainly don't want it to be an open proxy).
I know my IP is dynamic, not sure about my mate's tho.
He'll just be using his desktop machine, because I'll only be doing it when there's a match on. I don't know if that's relevant to the question connection, as we'll both be online at the same time when I want to watch the game, so he can always give me his IP just before even if he is dynamic?
Topic Status:
Not open for further replies.
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I can't debug global.asax file!
I have some codes in Application_Start() method but when I set a break point in the method, it is ignored!
Is this normal?
11 Answers 11
7
Maybe you should try:
• stopping development server in taskbar
• switching the configuration from release to debug
• 5
Odd that this was marked as the answer yet has a -2 rating... – Wallace Breza Jul 20 '10 at 20:59
• It's got a minus rating because it's wrong. It's correct to say that you need to be in debug (or else you don't have the pdb files) and you need to capture the server when it starts (because this is when that code is ran) but you won't be able to attach to the process. You need a running process to attach the debugger, the global.asax code is ran in the first few miliseconds of this process starting so it's literally impossible (without using the correct answer below) to attach to the process as it runs this code – Liam Feb 28 '18 at 11:53
87
A simple way to break in Application_Start() is to use the System.Diagnostics.Debugger class. You can force the application to break by inserting System.Diagnostics.Debugger.Break() where you would like the debugger to break.
void Application_Start(object sender, EventArgs e)
{
System.Diagnostics.Debugger.Break();
// ...
}
64
1. Attach the debugger to the IIS process.
2. Open the global.asax file and put in a breakpoint.
3. Add a space to the web.config file and save the file (this causes the current web application to reset);
4. Refresh / goto a web page on the site.
5. watch in amazement when the debugger stops at your breakpoint. :)
• 1
This is also known as 'Touching the web.config' and can be used for several scenarios when you need to refresh your site without touching IIS. Can't believe it didn't occur to me. Thanks. – HockeyJ Oct 9 '12 at 8:16
• I wish it was that simple. But for me? "computer says no" – Justin Aug 7 '15 at 1:10
• 1
Worked perfectly. When performing step 1 in Visual Studio I had to tick "Show processes from all users" and attach to the IIS process called "w3wp.exe". – Fordy Aug 24 '18 at 8:45
9
Application_Start() is invoked once per AppDomain. If you're not hitting your breakpoint, it means the AppDomain was already created, so do the following:
• In your quick-launch bar, there is an icon for the VS web server (its the one which says "Local Host Some Port"). Right click and choose "Stop" or "Close". This should kill the AppDomain.
• If you're using IIS, you need to restart your site manually.
• Alternatively, modifying the web config or Global.asax file is usually enough to restart the AppDomain.
• Restart your debugging, you should hit your breakpoints now.
7
Check that your web application is in debug mode (<compilation debug="true"> in web.config).
If you're using developer's IIS started by VS, just restart it or rebuild application.
If you're on normal IIS you have two options:
1. For web-site is configured to work with development folder (where you VS web project is deployed) you just have to restart application pool set for that web-site and start debugging before first request reaches server (you can always restart app pool during debug).
2. For web-site that works on another folder or even on remote server you have to attach to the process. To do this you need remote debugger installed on remote machine or your own (depends on web-server location) and use Debug - Attach to process menu, enter computer name and then select a process to debug. It is usually a w3wp.exe working in managed mode type.
• thank you for your answer. i use IIS via VS. – Mehdi Dec 25 '09 at 19:47
5
Yes, it is normal.
Application_Start() is processed by IIS.
But all other methods, for example Session_Start, and all others, except Application_Start() can be debugged normally.
3
Another alternative to the accepted System.Diagnostics.Debugger.Break(); would be
void Application_Start(object sender, EventArgs e)
{
System.Diagnostics.Debugger.Launch();
//...
}
which shouldn't break the code and should start the debugger even if the service were started with different rights.
2
Delete the global.asax and add a new one. In my solution, there has been a global.asax and a global.asax.cs.
All the methods (Session_Start, Application_Start, ...) have been in the bot files, but only the ones in the global.asax have been considered. So, break points and code in the cs don't do anything.
Only after recreating the file, the global.asax.cs had the appropriate methods and they ran.
• I followed the instructions here: rossnelson.blogspot.ca/2005/11/…. Basically, remove the global.asax and add a global application class which recreate the asax with a code behind file which I can then step into. I am running on IIS and it works fine. – cbeuker Aug 28 '12 at 18:01
0
Dont expect the Application_Start() function to be called immediately by pressing f5. Application_Start() is invoked only at the time of first request to the application is made. Strange but true.
0
In case all of answers not working, try:
<compilation debug="true" ... />
in web.config. ;)
0
For me, my debug breakpoint already executed in IIS by the time the debugger is attached. So the solution was to alter global.asax with a little space and save the file. After refresh, my breakpoint is now hit.
Solution here: https://wakeupandcode.com/hitting-breakpoints-in-global-asax/
• Links to external resources are encouraged, but please add context around the link so your fellow users will have some idea what it is and why it’s there. Always quote the most relevant part of an important link, in case the target site is unreachable or goes permanently offline. – baduker Apr 10 at 16:45
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0 votes
Hi, I'm looking for a way to add undo option to my project. My initial idea is crating packed scene for all needed nodes and revert back to original node all values. How can I do that?
Another idea is removing and replacing node using packed scene but it's making few issue with my actual code.
Maybe someone have another idea how to achieve step back functionality?
in Engine by (230 points)
Are you thinking about like a rewind (Prince of Persia) functionality?
Here is a video showing rewind and the author offered to make a tutorial. I was also thinking you could use a separate animation player for each node and save the state each frame and then play it backwards when you want to rewind. Trick would be temporarily disabling the physics and then initializing it again after rewind.
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Audio and video series 4: how to get started with ffmpeg for beginners (taking FLV decoding H.264 as an example)
Audio and video series 4: how to get started with ffmpeg for beginners (taking FLV decoding H.264 as an example)
install
The first is installation. You can choose to install package manager (in ubuntu, apt get) or use source code compilation. The difference between the two is that source code compilation can see the source code, while package manager can't. for novices, I prefer to use source code compilation.
Official website source compilation
Precautions for compilation and installation:
Let's talk about a comparison pit. The compilation guide installed the snapshot version for me, not the release version. Then there will be two problems: one is easy to bug, the other is unable to view the version number of ffmpeg. To find the corresponding api, you can only look at the header file, not the documentation (although I haven't seen the corresponding version of the documentation after reinstallation, maybe ffmpeg and opencv are different, but it doesn't matter. The release version is better than the snapshot version).
Fortunately, with this compilation method, it is easy to update. You only need to delete the relevant package, update the installation package, and compile it again. Therefore, I downloaded the latest release version on github, recompiled ffmpeg, and updated it to the current release version 4.1.5.
Upper hand
Run demo directly
For the guy with programming experience, it's natural to run demo directly, run out and watch it slowly. I do the same. If you search directly, there will be some uneven articles. Then I recommend you to read Raytheon's blog. Raytheon's blog contains a lot of demos, but I think the related knowledge is still less popular. After running the demo, you will find that you can't understand the meaning of the code. At this time, you need to advance to the second stage.
Lei Xiaohua blog: https://blog.csdn.net/leixiaohua1020
Tutorial of ffmpeg Library
First of all, you need to understand the function of the basic classes of ffmpeg library and the data flow of ffmpeg. There is a Tutorial on github that does a good job. Through it, you can understand the function of some basic classes and how to operate ffmpeg. In this way, you can basically understand the basic operation of ffmpeg, but this is not enough. You don't have relevant professional knowledge. At this time, you are the advanced To the third stage.
https://github.com/leandromoreira/ffmpeg-libav-tutorial#learn-ffmpeg-libav-the-hard-way
Learning of professional knowledge
For example, what's the difference between H.264, yuv and rgb? What's pts and dts. These knowledge can let you deal with the occurrence of some errors, or quickly find the errors. But if you just want to run through a demo simply and don't want to go deep into it, then it's unnecessary to learn systematically. However, if there is a mistake like this, you may go around and don't know about it. You can only solve it by asking people. Wikipedia or some professional books are recommended here.
Look at the source code of ffmpeg
Sometimes google can find other people's demos, but not all functions have demos on the Internet, but the source code must have them. Looking at the source code allows you to quickly know how to use this function.
This source code is in fftools under your ffmpeg source directory.
Let me show you how to use the api quickly by giving you an example.
Give an example
discover problems
Suppose you are compiling the correct code, but with the following warnings:
xxxx is deprecated [-Wdeprecated-declarations]
For example, I am in Section 2 of audio and video series The code used in contains the following errors:
av_bitstream_filter_init(const char*)' is deprecated [-Wdeprecated-declarations]
At this time, we need to search through Google. What does this mean. You will find that the reason for this warning is that the API is out of date. Of course, the word "prepare" has an out of date meaning. Students who are good at English can find it directly, which is the original meaning.
Then you'll find all the functions in your code that will give you a prepare warning.
For example, in my second section of code, there are several functions that are out of date.
av_bitstream_filter_init
av_bitstream_filter_filter
av_bitstream_filter_close
What are these functions for? It should be noted that AVPacket obtained by ffmpeg decoding only contains video compression data, and does not contain relevant decoding information (such as sps pps header information of h264, adts header information of AAC). Without these codecs, it cannot be recognized and decoded. In ffmpeg, the above functions are used to add decoding header information for these avpackets. Refer here.
Find API documentation
API document: https://www.ffmpeg.org/doxygen/trunk/index.html
Here's how to use the new API for related functions.
In the upper right corner, there is a search box: search for just out of date functions, such as: AV? Bitstream? Filter? Init
As you can see from the figure below, this function is replaced by the new version of the function. We need to change the original function to: AV bubsf get by buname(), AV bubsf alloc(), and AV bubsf init()
Click to know how to use its function.
OK, even if I know the related functions and the way to use them, I still can't use them. What should I do? Do you have a demo, brother?
Yes, of course!
ffmpeg source code starts
Open the fftool / folder in the ffmpeg directory as we just mentioned, and you will see that there are many. c files. We have priority to view the ffmpeg.c file. If this can't be found, we can find others.
Use ctrl+f to locate the new api and see how it is used.
For example, just found AV ﹣ BSF ﹣ init, as shown in the following figure:
OK, now you finally know how to use the api, and then it's the code.
Compiled as follows:
Modified source code
About the code of pulling the RGB of mango station video flow, update it below. Interested partners can compare the code below with the code in Section 2 and the corresponding code of ffmpeg.c. you will find that ffmpeg.c has actually told you how to use it. It's good to modify and use it.
#include <iostream>
extern "C"
{
#include "libavformat/avformat.h"
#include <libavutil/mathematics.h>
#include <libavutil/time.h>
#include <libavutil/samplefmt.h>
#include <libavcodec/avcodec.h>
#include <libavfilter/buffersink.h>
#include <libavfilter/buffersrc.h>
};
#include "opencv2/core.hpp"
#include<opencv2/opencv.hpp>
void AVFrame2Img(AVFrame *pFrame, cv::Mat& img);
void Yuv420p2Rgb32(const uchar *yuvBuffer_in, const uchar *rgbBuffer_out, int width, int height);
using namespace std;
using namespace cv;
AVFilterContext *buffersrc_ctx;
AVFilterGraph *filter_graph;
int main(int argc, char* argv[])
{
AVFormatContext *ifmt_ctx = NULL;
AVPacket pkt;
AVFrame *pframe = NULL;
int ret, i;
int videoindex=-1;
AVCodecContext *pCodecCtx;
AVCodec *pCodec;
const AVBitStreamFilter *buffersrc = NULL;
AVBSFContext *bsf_ctx;
AVCodecParameters *codecpar = NULL;
const char *in_filename = "rtmp://58.200.131.2:1935/livetv/hunantv"; //Mango station rtmp address
//Const char * in_filename = "test. H264"; / / Mango platform rtmp address
//Const char * in_filename = "rtmp: / / localhost: 1935 / rtmplive"; / / Mango stage rtmp address
const char *out_filename_v = "test1.h264"; //Output file URL
//Register
av_register_all();
//Network
avformat_network_init();
//Input
if ((ret = avformat_open_input(&ifmt_ctx, in_filename, 0, 0)) < 0)
{
printf( "Could not open input file.");
return -1;
}
if ((ret = avformat_find_stream_info(ifmt_ctx, 0)) < 0)
{
printf( "Failed to retrieve input stream information");
return -1;
}
videoindex=-1;
for(i=0; i<ifmt_ctx->nb_streams; i++)
{
if(ifmt_ctx->streams[i]->codecpar->codec_type==AVMEDIA_TYPE_VIDEO)
{
videoindex=i;
codecpar = ifmt_ctx->streams[i]->codecpar;
}
}
//Find H.264 Decoder
pCodec = avcodec_find_decoder(AV_CODEC_ID_H264);
if(pCodec==NULL){
printf("Couldn't find Codec.\n");
return -1;
}
pCodecCtx = avcodec_alloc_context3(pCodec);
if (!pCodecCtx) {
fprintf(stderr, "Could not allocate video codec context\n");
exit(1);
}
if(avcodec_open2(pCodecCtx, pCodec,NULL)<0){
printf("Couldn't open codec.\n");
return -1;
}
pframe=av_frame_alloc();
if(!pframe)
{
printf("Could not allocate video frame\n");
exit(1);
}
FILE *fp_video=fopen(out_filename_v,"wb+"); //For saving H.264
cv::Mat image_test;
// Old API
/*//AVBitStreamFilterContext* h264bsfc = av_bitstream_filter_init("h264_mp4toannexb");
*/
buffersrc = av_bsf_get_by_name("h264_mp4toannexb");
ret = av_bsf_alloc(buffersrc,&bsf_ctx);
if(ret < 0)
return -1;
avcodec_parameters_copy(bsf_ctx->par_in,codecpar);
ret = av_bsf_init(bsf_ctx);
while(av_read_frame(ifmt_ctx, &pkt)>=0)
{
if (pkt.stream_index == videoindex) {
//Old API
// av_bitstream_filter_filter(h264bsfc, ifmt_ctx->streams[videoindex]->codec, NULL, &pkt.data, &pkt.size,
// pkt.data, pkt.size, 0);
ret = av_bsf_send_packet(bsf_ctx, &pkt);
if(ret < 0) {
cout << " bsg_send_packet is error! " << endl;
continue;
}
ret = av_bsf_receive_packet(bsf_ctx, &pkt);
if(ret < 0) {
cout << " bsg_receive_packet is error! " << endl;
continue;
}
printf("Write Video Packet. size:%d\tpts:%ld\n", pkt.size, pkt.pts);
//Save as h.264 this function is used for testing
//fwrite(pkt.data, 1, pkt.size, fp_video);
// Decode AVPacket
if(pkt.size)
{
ret = avcodec_send_packet(pCodecCtx, &pkt);
if (ret < 0 || ret == AVERROR(EAGAIN) || ret == AVERROR_EOF) {
std::cout << "avcodec_send_packet: " << ret << std::endl;
continue;
}
//Get AVframe
ret = avcodec_receive_frame(pCodecCtx, pframe);
if (ret == AVERROR(EAGAIN) || ret == AVERROR_EOF) {
std::cout << "avcodec_receive_frame: " << ret << std::endl;
continue;
}
//AVframe to rgb
AVFrame2Img(pframe,image_test);
}
}
//Free AvPacket
av_packet_unref(&pkt);
}
//Close filter old API
// av_bitstream_filter_close(h264bsfc);
av_bsf_free(&bsf_ctx);
fclose(fp_video);
avformat_close_input(&ifmt_ctx);
if (ret < 0 && ret != AVERROR_EOF)
{
printf( "Error occurred.\n");
return -1;
}
return 0;
}
void Yuv420p2Rgb32(const uchar *yuvBuffer_in, const uchar *rgbBuffer_out, int width, int height)
{
uchar *yuvBuffer = (uchar *)yuvBuffer_in;
uchar *rgb32Buffer = (uchar *)rgbBuffer_out;
int channels = 3;
for (int y = 0; y < height; y++)
{
for (int x = 0; x < width; x++)
{
int index = y * width + x;
int indexY = y * width + x;
int indexU = width * height + y / 2 * width / 2 + x / 2;
int indexV = width * height + width * height / 4 + y / 2 * width / 2 + x / 2;
uchar Y = yuvBuffer[indexY];
uchar U = yuvBuffer[indexU];
uchar V = yuvBuffer[indexV];
int R = Y + 1.402 * (V - 128);
int G = Y - 0.34413 * (U - 128) - 0.71414*(V - 128);
int B = Y + 1.772*(U - 128);
R = (R < 0) ? 0 : R;
G = (G < 0) ? 0 : G;
B = (B < 0) ? 0 : B;
R = (R > 255) ? 255 : R;
G = (G > 255) ? 255 : G;
B = (B > 255) ? 255 : B;
rgb32Buffer[(y*width + x)*channels + 2] = uchar(R);
rgb32Buffer[(y*width + x)*channels + 1] = uchar(G);
rgb32Buffer[(y*width + x)*channels + 0] = uchar(B);
}
}
}
void AVFrame2Img(AVFrame *pFrame, cv::Mat& img)
{
int frameHeight = pFrame->height;
int frameWidth = pFrame->width;
int channels = 3;
//Output image allocation memory
img = cv::Mat::zeros(frameHeight, frameWidth, CV_8UC3);
Mat output = cv::Mat::zeros(frameHeight, frameWidth,CV_8U);
//Create buffer to save yuv data
uchar* pDecodedBuffer = (uchar*)malloc(frameHeight*frameWidth * sizeof(uchar)*channels);
//Get yuv420p data from AVFrame and save it to buffer
int i, j, k;
//Copy y component
for (i = 0; i < frameHeight; i++)
{
memcpy(pDecodedBuffer + frameWidth*i,
pFrame->data[0] + pFrame->linesize[0] * i,
frameWidth);
}
//Copy u component
for (j = 0; j < frameHeight / 2; j++)
{
memcpy(pDecodedBuffer + frameWidth*i + frameWidth / 2 * j,
pFrame->data[1] + pFrame->linesize[1] * j,
frameWidth / 2);
}
//Copy v component
for (k = 0; k < frameHeight / 2; k++)
{
memcpy(pDecodedBuffer + frameWidth*i + frameWidth / 2 * j + frameWidth / 2 * k,
pFrame->data[2] + pFrame->linesize[2] * k,
frameWidth / 2);
}
//Convert yuv420p data in buffer to RGB;
Yuv420p2Rgb32(pDecodedBuffer, img.data, frameWidth, frameHeight);
//Simple processing, canny is used for binarization
// cvtColor(img, output, CV_RGB2GRAY);
// waitKey(2);
// Canny(img, output, 50, 50*2);
// waitKey(2);
imshow("test",img);
waitKey(1);
// Test function
// imwrite("test.jpg",img);
//Release buffer
free(pDecodedBuffer);
img.release();
output.release();
}
cmake files will not be placed here, please refer to Section 2.
46 original articles published, 51 praised, 80000 visitors+
Private letter follow
Tags: codec github snapshot OpenCV
Posted on Mon, 16 Mar 2020 23:17:02 -0700 by danrah
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ece34605c058195ed03b4d393ef1a36c
|
7,141,383,758,769,267,000 |
RE: Real-Time Mitigation of Denial of Service Attacks Now Available With AT&T
Woulda, shoulda. If it is so simple, how come not everyone does it?
Patrick W.Gilmore
Why don't people patch their windows boxes, or secure old sendmail installations? Why do people flap announcements, or accept bogons? Why do people jay walk, or cheat on their taxes? Why do people do anything else they should not do?
'Cause people are lazy and stupid. DUH.
Speaking of flapping, where's ARIN? Seems they've been flapping so bad
this morning all our transit providers have dampened them out of
existence.
The original quote, from the song title, is "Coulda, Woulda, Shoulda"
^^^^^^
And that sums it up MUCH better ...
Hmm - please try to patch windows box, having 19200bps dialin connection and
living in a small town. It's almost impossible..
Q. is - why this !@#$ MS open ports for listening on _CLIENT_ machines (when
no one asked them about it),
and why they created the world of monocultural OS systems. This is the roots
for this problem. Patching is just a _patching_.
People are not lazy - it is just IMPOSSIBLE to patch millions of this
systems.
PS. Sendmail... who told _sendmail_?! Did you tried to patch sendmail, when
it was installed from unknown sources and
configured by unknown m4 file, and sources was lost when engineer was fired
2 years ago? You are welcome to try, I can find such system for you.
Date: Wed, 2 Jun 2004 09:26:27 -0700
From: Michel Py
Woulda, shoulda. If it is so simple, how come not everyone
does it?
It's modern layered security: "We don't have to worry about that
here. Another layer will take care of it."
Eddy
|
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|
ece34605c058195ed03b4d393ef1a36c
|
6,056,115,080,353,025,000 |
sha1-asm 0.5.1
Assembly implementation of SHA-1 compression function
Documentation
fn main() {
let target_arch = std::env::var("CARGO_CFG_TARGET_ARCH").unwrap_or_default();
let target_vendor = std::env::var("CARGO_CFG_TARGET_VENDOR").unwrap_or_default();
let asm_path = if target_arch == "x86" {
"src/x86.S"
} else if target_arch == "x86_64" {
"src/x64.S"
} else if target_arch == "aarch64" && target_vendor == "apple" {
"src/aarch64_apple.S"
} else if target_arch == "aarch64" {
"src/aarch64.S"
} else {
panic!("Unsupported target architecture");
};
let mut build = cc::Build::new();
if target_arch == "aarch64" {
build.flag("-march=armv8-a+crypto");
}
build.flag("-c").file(asm_path).compile("libsha1.a");
}
|
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Rehtt's Blog https://rehtt.com/ zh-CN Welcome to my blog Fri, 16 Apr 2021 16:13:00 +0800 Fri, 16 Apr 2021 16:13:00 +0800 【算法】动态规划 https://rehtt.com/index.php/archives/243/ https://rehtt.com/index.php/archives/243/ Fri, 16 Apr 2021 16:13:00 +0800 Rehtt 0 \end{cases}$ 代码: ```go //coins为硬币面额,amount为目标金额 //coins=[1,2,5],amount=11 func dp(coins []int,amount int)int{ if n==0 {return 0} // base case if n<0 {return -1} num:=amount+1 //因为凑出硬币的数量永远也不可能大于目标金额,所以amount+1表示无穷大。而求最小值,所以初始化无穷大。 //“选择” for _,coin:=range coins{ sub:=dp(coins,amount - coin) if sub == -1{continue} //子问题无解,跳过 //min() if num > 1+sub{ num = 1+sub } } if num==amount+1{ //没有凑出 return -1 } return num } ``` 递归树: ```mermaid graph TB a((11))--1-->b((10)) a--2-->c((9))-->c0((...)) a--5-->d((6)) b--1-->b0((9)) b--2-->b1((8))-->b10((...)) b--5-->b2((5))-->b20((...)) b0--1-->b00((8)) b0--2-->b01((7)) b0--5-->b02((4)) d--1-->d0((5))-->d00((...)) d--2-->d1((4)) d--5-->d2((1))-->d20((...)) d1--1-->d10((3)) d1--2-->d11((2)) d1--5-->d12(("-1")) ``` 通过递归树可以看到,存在 `amount`相同的重复子问题,从而导致算法效率低下。 ***递归算法时间复杂度 = 子问题总数时间复杂度 x 每个子问题时间复杂度*** 在此暴力递归中,子问题总数时间复杂度为$O(n^{k})$,每个子问题时间复杂度为$O(k)$。因此本暴力递归的中时间复杂度为$O(kn^{k})$。 ### 二、带“备忘录”的递归解法 从上述的暴力递归树中可以看出,存在许多重复的子问题,这些重复的子问题就是导致算法效率低的主要原因。那么针对这个问题,我们可以建立一个“备忘录”来存储每个子问题计算的结果,在计算子问题之前先查询是有结果存在“备忘录”中,如果存在就直接使用“备忘录”中的值而不再去计算。 *一般“备忘录”可以使用数组或哈希表来建立。* 代码: ```go var tab []int //备忘录 func dp(coins []int,amount int)int{ //初始化备忘录 if tab == nil{tab=make([]int,len(coins))} if n==0 {return 0} if n<0 {return -1} num:=amount+1 for _,coin:=range coins{ i := amount - coin //查表,若结果不存在的话就进行计算 if tab[i]==0{ tab[i] = dp(coins,i) } if tab[i] == -1{continue} //min() if num > 1 + tab[i]{ num = 1 + tab[i] } } if num==amount+1{ return -1 } return num } ``` 带有“备忘录”的递归就解决了重复子问题冗余的问题,因此子问题的个数不会超过目标金额$n$,因此带“备忘录”的递归的总时间复杂度为$O(kn)$。 ### 三、dp数组迭代解法 以上递归都是自顶向下的解法,“状态”`amount`的变化为:11、10、...、0 而dp数组迭代则是自底向上的解法,“状态”`amount`的变化为:1、2、...、11 dp数组的定义:当目标金额为 `n`时,最多需要 `dp[n]`枚硬币。 代码: ```go func coinChange(coins []int,amount int)int{ //创建dp数组,长度为amount+1 dp := make([]int,amount+1) //初始化dp数组,除dp[0]以外都赋值amount+1 //以dp数组下标为各“状态”目标金额。 //当“状态”为0时,结果为零,因此dp[0]=0。base case //除0其他以外,都赋值amount+1。amount+1为硬币永远也达不到的数量,本题求最少硬币数量,因此amount+1表示无穷大。 for i:=1;i 1+dp[i-coin]{ dp[i] = 1+dp[i-coin] } } } //结果为amount+1“无穷大”为无解返回-1 if dp[amount] == amount+1{ return -1 } return dp[amount] } ``` ]]> 0 https://rehtt.com/index.php/archives/243/#comments https://rehtt.com/index.php/feed/archives/243/ 【计算机网络】UDP打洞 https://rehtt.com/index.php/archives/242/ https://rehtt.com/index.php/archives/242/ Sun, 28 Feb 2021 18:59:00 +0800 Rehtt 32)个地址可供使用,其间有一些地址是为特殊用途而保留的,如专用网络(约1800万个地址)和多播网络(约2.7个地址),这将减少了互联网中可用的地址。随着时间的变化,接入互联网的设备越来越多,出现了IPv4地址的枯竭的问题。 ### NAT技术 NAT全称:`Network Address Translation`,网络地址转换。是一种在IP数据包通过路由器或防火墙时重写来源IP或目的IP的技术。**该技术可以实现多个网络设备共用一个对外IP或公网IP**。 因此NAT技术可以缓解IPv4枯竭的问题,目前基本上家用宽带运营商都使用NAT技术为用户赋予IP地址,通常是一层或一栋楼共用一个公网IP(详情根据当地运营商而定)。 ![NAT.jpg][1] 假如现有内网设备`A`、NAT(1.1.1.2)和公网服务器(1.1.1.1) 1. A向服务器发送请求包。 2. A请求包经过NAT,NAT从中得到请求的目的地址(1.1.1.1)。 3. NAT保存A的地址和A的目的地址(1.1.1.1),并给A随机分配映射一个端口(1234)。 4. NAT将A请求包的源地址(A的地址)和源端口,替换为NAT的公网IP和分配给A的端口(1234)。 5. NAT将请求包向公网服务器(1.1.1.1)发出。 6. 服务器(1.1.1.1)接收到请求包并返回回应包。 7. NAT接收到回应包,并从中得到回应的端口(1234)。 8. NAT找查记录,发现与端口(1234)对应的设备是A,并且回应包发送者的IP(1.1.1.1)也在其中。(若两者其中一个不满足就会将此包丢弃) 9. NAT将回应包的目的IP(1.1.1.2)和目的端口(1234)改为A的地址。 10. NAT将回应包发送给A。 默认情况下在NAT内网的设备可以主动访问公网IP的设备,但公网IP设备却不能主动访问NAT内网的设备(因为NAT没有记录,对应上述例子第8步). ## 打洞 因为NAT技术的原因,造成两个NAT内网的设备无法直接通信(例如:不能直接访问没有公网IP的电脑)。 **打洞**顾名思义,就是在NAT内网中打出一个洞,让两个不同内网的设备直接访问。 ### 原理 从上述NAT技术的第4步和第9步,可以看出NAT需要将内网设备映射到一个端口并保存其访问的公网地址和端口,才可以使内网设备和公网设备通信。所以打洞给关键一步就是让两个设备相互访问对方公网对应的IP和端口,让自己的NAT保存记录。 假如现有内网设备A、NAT A(1.1.1.2)、内网设备B、NAT B(1.1.1.3)以及公网服务器(1.1.1.1),内网设备A和内网设备B想要直接通信。 ![UDPASS.jpg][2] 1. A和B向服务器访问,NAT A和NAT B分别为AB分配映射端口`4530`与`6540`。 2. 服务器收到请求后,保存IP和端口(`1.1.1.2:4530`,`1.1.1.3:6540`)。 3. 服务器向A返回B的IP和端口,向B返回A的IP和端口。 4. A向B的地址发送数据(NAT B因为没有A的地址记录会丢弃A的包,但是这一步为的是让NAT A记住B的地址,让NAT A以后将带有B地址的包转发给A)。 5. B再向A发送数据。(这一步也是让NAT B记住A的地址,但上一步NAT A已经有了B的地址,所以这一次B发送的数据可以正常到达A)。 6. 从此A和B就可以直接双向发送数据,洞就被打通了。 ### UDP UDP全称:User Datagram Protocol,用户数据报协议。是一种无连接的协议。 UDP负责将数据发送出去,但对方有没有接收到就不是UDP责任了(就算是错误的IP或端口,UDP也照样发送),因此也是一种不可靠的协议。 但是就很适合使用UDP来做NAT打洞,因为在上述原理第4步的过程中,NAT B没有A的记录就将A的包给丢弃了,在计划里这一步丢包是必然的,而UDP不管对方收到或丢弃。若是用其他可靠协议比如TCP,可能会造成打洞失败的情况,而解决办法就是修改系统内核,但这又非常麻烦。 ## 代码实现 这里使用Golang进行网络编程。 客户端之所以使用`net.ListenUDP()`而不是`net.DialUDP()`,是因为`net.ListenUDP()`的`*UDPConn`是`unconnected`,而`net.DialUDP()`的`*UDPConn`是`connected`的。 如果`*UDPConn`是`connected`,读写方法是`Read`和`Write`。 如果`*UDPConn`是`unconnected`,读写方法是`ReadFromUDP`和`WriteToUDP`(以及`ReadFrom`和`WriteTo`)。 使用`ReadFromUDP`和`WriteToUDP`进行读写可以指定读写任何UDP地址,而且`net.ListenUDP()`还可以固定本机UDP端口不被系统更换。 ### 服务端demo ```go type j struct { Name string `json:"name"` //客户端名 Addr string `json:"addr"` //地址 To string `json:"to"` //要连接的客户端名 } dev := make(map[string]string) //客户端地址 addr, _ := net.ResolveUDPAddr("udp", "0.0.0.0:7091") //服务器端口为7091 conn, err := net.ListenUDP("udp", addr) if err != nil { fmt.Println(err) os.Exit(1) } defer conn.Close() for { data := make([]byte, 512) n, remoteAddr, err := conn.ReadFromUDP(data) //获取客户端地址 if err != nil { fmt.Println("f", err) return } var J j json.Unmarshal(data[:n], &J) fmt.Println(J) dev[J.Name] = remoteAddr.String() //客户端注册 if !strings.EqualFold(J.To, "")&& dev[J.To]!="" { outA,_:=json.Marshal(&j{ Name: J.To, Addr: dev[J.To], }) outB,_:=json.Marshal(&j{ Name: J.Name, Addr: remoteAddr.String(), }) conn.WriteToUDP(outA,remoteAddr) adr,_:=net.ResolveUDPAddr("udp",dev[J.To]) conn.WriteToUDP(outB,adr) } } ``` ### 客户端demo ```go type j struct { Name string `json:"name"` Addr string `json:"addr"` To string `json:"to"` } var name = flag.String("name", "", "") //客户端名 var to = flag.String("to", "", "") //要连接的客户端 var msg = flag.String("msg", "", "") //发送消息 var server_ip = flag.String("server", "1.1.1.1", "") //服务器IP var server_port = flag.Int("sport", 9091, "") //服务器端口 flag.Parse() conn, _ := net.ListenUDP("udp", &net.UDPAddr{ IP: net.ParseIP("0.0.0.0"), Port: 9091, }) defer conn.Close() put, _ := json.Marshal(&j{ Name: *name, To: *to, }) conn.WriteToUDP(put, &net.UDPAddr{ IP: net.ParseIP(*server_ip), Port: *server_port, }) res := make([]byte, 128) n, _, _ := conn.ReadFromUDP(res) var J j json.Unmarshal(res[:n], &J) fmt.Println(string(res[:n])) if *to != "" { time.Sleep(1 * time.Second) } adr, _ := net.ResolveUDPAddr("udp", J.Addr) conn.WriteToUDP([]byte("qwe"), adr) n, _, _ = conn.ReadFromUDP(res) fmt.Println(string(res[:n])) ``` 使用: A运行:`./main -name A` B运行:`./main -name B -to A -msg "qwe"` ## 参考 [1] [NAT - wikipedia](https://zh.wikipedia.org/wiki/%E7%BD%91%E7%BB%9C%E5%9C%B0%E5%9D%80%E8%BD%AC%E6%8D%A2) [2] [UDP - wikipedia](https://zh.wikipedia.org/wiki/%E7%94%A8%E6%88%B7%E6%95%B0%E6%8D%AE%E6%8A%A5%E5%8D%8F%E8%AE%AE) [1]: https://rehtt.com/usr/uploads/2021/02/2491971208.jpg [2]: https://rehtt.com/usr/uploads/2021/02/3444258407.jpg ]]> 0 https://rehtt.com/index.php/archives/242/#comments https://rehtt.com/index.php/feed/archives/242/ 【Lua】WOL原理与实现 https://rehtt.com/index.php/archives/239/ https://rehtt.com/index.php/archives/239/ Fri, 26 Feb 2021 13:16:00 +0800 Rehtt 1]。 简单来说,WOL就是通过网络唤醒开启电脑。 ## 原理 支持WOL的主板在通电时会监听并分析同一网络下的广播信息(xxx.xxx.xxx.255),在一般的局域网使用有限广播地址即可(255.255.255.255),当发现了“魔法包”(Magic Packet)就会对其进行解读。 魔法包是以广播的形式发送,作用于当前局域网(LAN),也可以是子网(Subnet)。 ## 魔法包介绍 Magic Packet,是一种广播帧(frame),使用无连接协议,例如:`UDP`,发送的端口没有限制,可以使用任何端口进行发送,但一般约定俗成使用7或9号端口发送。大部分情况下,魔法包在数据链路层(OSI第2层)发送,使用广播地址进行广播,但也可以使用特定IP地址进行发送(OSI第3层)。 ***由于采用的是无连接协议,所以不保证数据包被目标机接收。*** ## 魔法包结构 魔法包最简单的构成是6个十六进制的`255`(ff ff ff ff ff ff)共6字节为数据包的头部标识,后面是目标机的十六进制`MAC`地址,并将`MAC`重复16次,到此数据包共`102`字节。有时数据包内还会紧接着4-6字节的密码信息。这个帧片段可以包含在任何协议中,最常见的是包含在 UDP 中。[2] 例如目标机MAC为:`1a:2b:3c:4d:5e:6f` 6字节头|96字节信息=MAC信息x12|4-6字节密码(可空) -|-|- ff ff ff ff ff ff|1a2b3c4d5e6f 1a2b3c4d5e6f 1a2b3c4d5e6f 1a2b3c4d5e6f 1a2b3c4d5e6f 1a2b3c4d5e6f 1a2b3c4d5e6f 1a2b3c4d5e6f 1a2b3c4d5e6f 1a2b3c4d5e6f 1a2b3c4d5e6f 1a2b3c4d5e6f |密码 ## 代码实现 我是用的是esp8266,刷入NodeMCU固件,是用LUA进行编程实现。 ***NodeMCU编译时起码需要编译`net`和`wifi`两个模块,并正确配置和连上wifi。*** ```LUA mac = '1a2b3c4d5e6f' -- 要进行目标主机的MAC地址 bip = '255.255.255.255' -- 路由器广播地址 head = 'FFFFFFFFFFFF' -- 数据头 head = to(head) mac = to(mac) for i = 1, 16 do head = head .. mac end u = net.createUDPSocket() u:send(1234, bip, head) -- 是用9号端口 u:close() -- 将两个一组字符串表示的十六进制转为十六进制的字符串 -- 'ff'(66 66) -> 0xff -> '.'(255) function to(str) ret = '' for i = 1, string.len(str), 2 do byte = ('0x' .. string.sub(str, 0 + i, 1 + i)) a = tonumber(byte) ret = ret .. string.char(a) end return ret end ``` ## 参考 - [1] [wikipedia](https://zh.wikipedia.org/wiki/%E7%B6%B2%E8%B7%AF%E5%96%9A%E9%86%92) - [2] [网络唤醒(WOL)全解指南:原理篇](https://www.cnblogs.com/zhanggaoxing/p/9657545.html) ]]> 0 https://rehtt.com/index.php/archives/239/#comments https://rehtt.com/index.php/feed/archives/239/ 【python】查看v2ray流量统计脚本 https://rehtt.com/index.php/archives/238/ https://rehtt.com/index.php/archives/238/ Fri, 11 Dec 2020 15:39:00 +0800 Rehtt ] [-c ] [-s ] 默认显示全部用户 -h,--help 显示帮助 -g 显示组的流量 -g A (显示tag:A组的流量) -c 输入v2ray配置文件 -c /etc/v2ray/config.json -s 输入v2ctl api server地址 -s 127.0.0.1:53844 ``` ### 代码 ```python #!/bin/python3 # Created by Rehtt on 2020/12/11 # 查看v2ray多用户流量统计 # 使用前需要开启v2ray自带的统计工具,配置方法:https://guide.v2fly.org/advanced/traffic.html#%E9%85%8D%E7%BD%AE%E7%BB%9F%E8%AE%A1%E5%8A%9F%E8%83%BD # 本脚本使用email作为用户标识,使用tag作为组标识 import re import os import json import getopt import sys v2ConfigFile = '/etc/v2ray/config.json' # v2ray配置文件位置 v2ctlServer = '127.0.0.1:53844' # v2ctl api配置信息 def dataSize(size, i=0): if size > 1e3: size /= 1e3 s = dataSize(size, i+1) else: size = round(size, 2) if i == 1: s = str(size)+'KB' elif i == 2: s = str(size)+'MB' elif i >= 3: s = str(size)+'GB' return s def red(f): return '\033[31m'+f+'\033[0m' def help(): print("v2ray-flow.py [-h] [-g ] [-c ] [-s ]") print("默认显示全部用户\n") print("-h,--help\t显示帮助") print("-g \t显示组的流量") print("\t-g A\t\t(显示tag:A组的流量)\n") # print("-u \t显示单个用户流量") # print("\t-u [email protected]\t(显示email为[email protected]的流量)\n") print("-c \t输入v2ray配置文件") print("\t-c /etc/v2ray/config.json\n") print("-s \t输入v2ctl api server地址") print("\t-s 127.0.0.1:53844") def getDownUp(name, res): i = 0 z = 0 down = 0 up = 0 try: for r in res: i += 1 if name in r: z += 1 if 'downlink' in r: down = dataSize(float(re.sub('\D', '', res[i]))) else: up = dataSize(float(re.sub('\D', '', res[i]))) if z == 2: break except: pass return down, up def main(argv): global v2ctlServer, v2ConfigFile c = '/usr/bin/v2ray/v2ctl api --server={server} StatsService.QueryStats \'pattern: "{q}" reset: false\'' try: opts, args = getopt.getopt(argv, "hg:c:s:u:", ["help"]) except getopt.GetoptError: help() sys.exit(2) q = 'user' G = 0 for opt, arg in opts: if opt in ('-h', '--help'): help() sys.exit() elif opt == '-g': q = arg G = 1 # elif opt == '-u': # q = arg # G = 2 if opt == '-c': v2ConfigFile = arg if opt == '-s': v2ctlServer = arg tags = {} c = c.format(server=v2ctlServer, q=q) res = os.popen(c).readlines() if G == 0: with open(v2ConfigFile, 'r') as f: data = json.load(f) for i in data['inbounds']: if i['tag'] != 'api': emails = [] for email in i['settings']['clients']: emails.append(email['email']) tags[i['tag']] = emails for tag in tags: for email in tags[tag]: down, up = getDownUp(email, res) print('Email:', red(email), '\tTag:'+red(tag)) print('上传:', up, '\t下载:', down, '\n') else: if G==1: print('Tag:', red(q)) down, up = getDownUp(q, res) # else: # print('Email:', red(q)) print('上传:', up, '\t下载:', down, '\n') if __name__ == "__main__": main(sys.argv[1:]) ``` ]]> 0 https://rehtt.com/index.php/archives/238/#comments https://rehtt.com/index.php/feed/archives/238/ 【杂项】PSP作为PC电脑的WiFi手柄 https://rehtt.com/index.php/archives/237/ https://rehtt.com/index.php/archives/237/ Fri, 16 Oct 2020 23:00:00 +0800 Rehtt '硬件和声音' -> 'Parallel Port Joysticks(32位)')新建虚拟手柄。 新建虚拟手柄: 1. 新建一个虚拟手柄点击`Add...`->`add`。 2. 选中刚刚创建的手柄点击`Mapping...`。 3. 选中`Set a custom mapping for this controller`,点击`下一步`。 4. - `Axes`改为`2`,`Axis 1`和`Axis 2`分别为`X Axis`和`Y Axis` - `Buttons`改为`9` - `POV hats`改为`1`。 5. - `X Axis`为`Analog 0` - `Y Axis`为`Analog 1` 6. 修改 - `Button 1`为`nothing` - `Button 2`为`Digital 0` - `Button 3`为`Digital 1` - `Button 4`为`Digital 2` - `Button 5`为`Digital 3` - `Button 6`为`Digital 4` - `Button 7`为`Digital 5` - `Button 8`为`Digital 11` - `Button 9`为`Digital 10` # 0x02 ## PC 进入`WiFi Controller`解压的文件夹`PC`内,双击执行`Start WiFiServer for Controller 1.bat`(文件夹内其他的bat文件对应其他的虚拟手柄,通过上述`新建虚拟手柄`的方式创建)。 ## PSP 打开PSP,运行`WiFi Controller`,稍等片刻,出现键位示意画面即连接成功。 从PC`控制面板`中的`游戏控制器`->`属性`->`测试`中可以看见具体的映射情况。 # END ]]> 0 https://rehtt.com/index.php/archives/237/#comments https://rehtt.com/index.php/feed/archives/237/ 【Docker】macvlan网络模式下容器与宿主机互通 https://rehtt.com/index.php/archives/236/ https://rehtt.com/index.php/archives/236/ Tue, 08 Sep 2020 22:32:00 +0800 Rehtt 5 https://rehtt.com/index.php/archives/236/#comments https://rehtt.com/index.php/feed/archives/236/ 【树莓派】温控风扇脚本(shell版) https://rehtt.com/index.php/archives/235/ https://rehtt.com/index.php/archives/235/ Sun, 06 Sep 2020 10:59:00 +0800 Rehtt 一个简单的脚本,和python版的一样,只是去除python版的RPi库的依赖。 > 较为完善的是Golang版 配合crontab做定时任务 ```shell #每五分钟执行一次 */5 * * * * /home/pi/fen.sh ``` fen.sh文件 ```shell #!/bin/bash a=$(cat /sys/class/thermal/thermal_zone0/temp) temp=$((a/1000)) pin=14 if [ ! -d "/sys/class/gpio/gpio${pin}" ] then echo $pin > /sys/class/gpio/export fi if [ $temp -lt 50 ] then echo low > /sys/class/gpio/gpio${pin}/direction elif [ $temp -gt 55 ] then echo high > /sys/class/gpio/gpio${pin}/direction fi ``` ]]> 4 https://rehtt.com/index.php/archives/235/#comments https://rehtt.com/index.php/feed/archives/235/ 【算法/图像处理】运动检测--帧间差分法 https://rehtt.com/index.php/archives/233/ https://rehtt.com/index.php/archives/233/ Fri, 24 Jul 2020 18:01:00 +0800 Rehtt 1 https://rehtt.com/index.php/archives/233/#comments https://rehtt.com/index.php/feed/archives/233/ 【杂项】Windows10 深色模式下文件资源管理器有一条白线 https://rehtt.com/index.php/archives/230/ https://rehtt.com/index.php/archives/230/ Tue, 26 May 2020 17:26:00 +0800 Rehtt 1 https://rehtt.com/index.php/archives/230/#comments https://rehtt.com/index.php/feed/archives/230/ 【Golang】使用CGO交叉编译 https://rehtt.com/index.php/archives/227/ https://rehtt.com/index.php/archives/227/ Wed, 08 Apr 2020 18:23:00 +0800 Rehtt 0 https://rehtt.com/index.php/archives/227/#comments https://rehtt.com/index.php/feed/archives/227/
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Malcolm Lidierth
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GUI building and memory usage
If you can, re-use figures rather than deleting them.
7 years ago | 0
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how to pass java collection to matlab
Probably simplest to use an array myArray=foos.toArray(); myArray will be a java array of type Object.
8 years ago | 0
Answered
Can you use a Raspberry Pi as (local) CPU core with the Parallel Computing Toolbox and/or Distributed Computing Server?
You can run m-code using Octave on a Pi if that helps. Your bottleneck will likely be data exchange (as e.g. when using a GPU). ...
8 years ago | 0
Answered
Pause function in matlab for 1 millisecond
Pause does more than cause a sleep (see the docs) e.g. it flushes the AWT/Swing EDT. The minimum delay will therefore reflect wh...
8 years ago | 2
Answered
Call MATLAB from java
"I'm developing a software to interact with piano melodies in java using Netbeans IDE 8.0.2" [1] There may be no need to do a...
8 years ago | 0
| accepted
Answered
Matlab Crashes when installing on Mac
Might be an idea to update/revert graphics drivers (????)
8 years ago | 0
| accepted
Answered
Can I disable java console output when using javaMethod?
AFAIK, no - MATLAB uses stderr and stdout. Same as Java.
8 years ago | 0
Answered
Java 1.8 with Matlab 2015b on Windows 7
In Netbeans, edit the Preferences to target Java 1.7 or earlier when you do a build. All should then be OK.
8 years ago | 0
Answered
URGENT... Matlab System::FatalException!!!
MATLAB uses lazy memory allocation. That means that if your code accesses a memory area that it should not (e.g. by incrementing...
10 years ago | 0
Answered
Passing Matrix List to Java Method ,error:No method 'list_method' with matching signature found for class
OK, if you are stuck with a List java-side, you need to create a list MATLAB-side. In MATLAB: * Create a concrete list cla...
10 years ago | 0
Answered
Passing Matrix List to Java Method ,error:No method 'list_method' with matching signature found for class
Try public void list_method(double[] points){ ... } Note that MATLAB vectors/matrices contain doubles by defaul...
10 years ago | 0
| accepted
Answered
Reset JVM to default
R2011b needs - and on Windows is bundled with - Java 6. Either: # delete the MATLAB_JAVA (not JAVA_HOME) environment varia...
10 years ago | 1
| accepted
Question
Publication quality graphics in MATLAB
A Java based graphics package - "Project Waterloo" - is presently being developed to provide good quality anti-aliased graphics ...
10 years ago | 2 answers | 2
2
answers
Answered
Does Matlab have memory leaks?
Garbage collection is done when required, rather than when possible - so the simple loop is not really testing much. Also MA...
10 years ago | 1
| accepted
Answered
Java outofmemoryerror while saving figures
It looks like the save to file is running on the Java Event Despatch Thread (AWT-EventQueue-0)- so Java references will persist...
10 years ago | 1
Answered
Intermittent error accessing Java constant
Strange. What happens if you look it up as: javax.swing.SwingConstants.TRAILING
10 years ago | 0
Answered
Working with unicode paths
Jim MATLAB/Java need to talk to an OS and a file system beneath so this is likely to vary across FAT12/16/32, NTFS etc as wel...
11 years ago | 0
Answered
Viewing Java Objects Data
Try methods(object) You may find getDimension and is* methods that provide access to the fields.
11 years ago | 0
Answered
Where is a list of eventtypes for listeners?
@Matt As the uicontrols use Java under the hood, see the available Java listeners at <http://docs.oracle.com/javase/tutor...
11 years ago | 0
Answered
License files from the FEX
@Jan I find lots of "installation procedure" enquiries also even though clear install instructions are provided. Often that i...
11 years ago | 1
Submitted
Project Waterloo File and Matrix Utilities
Utilities for partial input/output from MATLAB MAT-files, HDF5-files and custom binary files.
11 years ago | 1 download |
Thumbnail
Answered
How to resample a signal by a fraction
Is this any help? % SincResample returns the data convolved with a set of time-shifted windowed sinc functions, one for eac...
11 years ago | 0
Answered
get an error message by running a large code
You are running out of Java heap space. Two solutions: [1] Increase the size of the available heap in MATLAB preferences. ...
11 years ago | 1
| accepted
Answered
How to drop decimal values without rounding off?
959.589-rem(959.589,1)
11 years ago | 0
| accepted
Answered
I am taking Open MIT course. Not registered as a student at the university. How can I get MATLAB?
Or try Octave which is free and open-source but best supported on Linux - runs fine with Debian Wheezy on a Raspberry Pi board w...
11 years ago | 1
Answered
NetCDF or HDF5 or XYZ to provide time series data at the fingertips of the user
@Per I suspect some of the problems with memmapfile might be related to using multiple 128KB memmapfiles. Each requires syste...
11 years ago | 0
Answered
Slow boot: issue with MATLAB and Java at PC startup?
A possibility (maybe): Is on-access system security software scanning and decompressing all those jar files?
11 years ago | 0
Answered
How do I launch a matlab gui from the desktop?
One way might be to launch a Java executable and connect to the MATLAB engine using the Java Matlab Interface via matlabcontrol:...
11 years ago | 0
Answered
MCR incompatibility with Mountain Lion?
It does work on Mountain Lion. Have you installed the Command Line Tools in XCode Preferences (needed in Mountain Lion) and t...
11 years ago | 0
Answered
cell2mat loops & running out of memory
Depending on the MAT-file version, there may be something that could help in: <http://www.mathworks.co.uk/matlabcentral/filee...
11 years ago | 0
Load more
|
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Changes between Version 4 and Version 5 of Yocto/Building
Ignore:
Timestamp:
01/15/2018 11:15:10 AM (6 weeks ago)
Author:
Tim Harvey
Comment:
convert restored html to wiki markup
Legend:
Unmodified
Added
Removed
Modified
• Yocto/Building
v4 v5
1 {{{#!html
2 <div id="wikipage" class="trac-content"><p>
3 </p><div class="wiki-toc">
4 <ol>
5 <li>
6 <a href="#BuildingYoctoInstallingfortheGateworksVentanaFamily">Building Yocto & Installing for the Gateworks Ventana Family</a>
7 </li>
8 <li>
9 <a href="#Pre-CompiledYoctoBinaries">Pre-Compiled Yocto Binaries</a>
10 </li>
11 <li>
12 <a href="#ObtainingandCompilingtheSourceCode">Obtaining and Compiling the Source Code</a>
13 <ol>
14 <li>
15 <a href="#Troubleshootingbuildfailures">Troubleshooting build failures</a>
16 <ol>
17 <li>
18 <a href="#Fetchfailure">Fetch failure</a>
19 </li>
20 <li>
21 <a href="#UpstreamBreakage">Upstream Breakage</a>
22 </li>
23 </ol>
24 </li>
25 <li>
26 <a href="#Keepinguptodateandorpinningsourcewithrepo">Keeping up to date and/or pinning source with repo</a>
27 </li>
28 <li>
29 <a href="#Updatingandrebuilding">Updating and rebuilding</a>
30 </li>
31 <li>
32 <a href="#Diskusageandkeepingthingsclean">Disk usage and keeping things clean</a>
33 </li>
34 <li>
35 <a href="#BuildingUpdatingAddingPackages">Building / Updating / Adding Packages</a>
36 </li>
37 <li>
38 <a href="#BuildingatoolchainandorSDK">Building a toolchain and/or SDK</a>
39 </li>
40 <li>
41 <a href="#Otherusefullinks">Other useful links</a>
42 </li>
43 </ol>
44 </li>
45 <li>
46 <a href="#InstallingFirmware">Installing Firmware</a>
47 <ol>
48 <li>
49 <a href="#NANDFLASH">NAND FLASH</a>
50 </li>
51 <li>
52 <a href="#InstallingonRemovablestorage:mSATAUSBuSD">Installing on Removable storage: mSATA/USB/uSD</a>
53 </li>
54 </ol>
55 </li>
56 </ol>
57 </div><p>
58 </p>
59 <p>
60 <strong>NOTE</strong> In conjunction with the Yocto BSP, please be sure to use the latest bootloader for proper operation. <a class="wiki" href="/wiki/ventana/bootloader#PreBuiltBootloader">Bootloader Instructions Here</a>
61 </p>
62 <h1 id="BuildingYoctoInstallingfortheGateworksVentanaFamily">Building Yocto & Installing for the Gateworks Ventana Family</h1>
63 <p>
1[[PageOutline]]
2
3**NOTE** In conjunction with the Yocto BSP, please be sure to use the latest bootloader for proper operation. You can find Bootloader Instructions [wiki:ventana/bootloader#PreBuiltBootloader here].
4
5= Building Yocto & Installing for the Gateworks Ventana Family =
646The following versions of Yocto are supported:
65 </p>
66 <ul><li>Yocto v2.3 (Pyro) Poky 17.0 released on 05/24/2017 (<strong>Recommended</strong>)
67 <ul><li>using the gateworks_fslc_3.14_1.0.x_ga kernel
68 </li><li><strong>Considered stable</strong>
69 </li></ul></li></ul><p>
70 </p><div> <h3 class="foldable">Old Releases</h3><div><p>
71 </p>
72 <ul><li>Yocto v1.8 (Fido) Poky 13.0 released on 02/23/2016
73 <ul><li>using the gateworks_fslc_3.14_1.0.x_ga kernel
74 </li></ul></li><li>Yocto v1.7 (Dizzy) Poky 12.0 released on 02/25/2015
75 <ul><li>using the gateworks_3.10.17_1.0.0_ga kernel
76 </li></ul></li><li>Yocto v1.6 (Daisy) Poky 11.0 released on 4/25/2014
77 <ul><li>using the gateworks_3.10.17_1.0.0_ga kernel
78 </li></ul></li></ul><p>
79 </div></div>
80 </p>
81 <p>
7 * Yocto v2.3 (Pyro) Poky 17.0 released on 05/24/2017 (Recommended)
8 - using the gateworks_fslc_3.14_1.0.x_ga kernel
9 - **Considered stable**
10
11[[CollapsibleStart(Old Releases)]]
12 * Yocto v1.8 (Fido) Poky 13.0 released on 02/23/2016
13 - using the gateworks_fslc_3.14_1.0.x_ga kernel
14 * Yocto v1.7 (Dizzy) Poky 12.0 released on 02/25/2015
15 - using the gateworks_3.10.17_1.0.0_ga kernel
16 * Yocto v1.6 (Daisy) Poky 11.0 released on 4/25/2014
17 - using the gateworks_3.10.17_1.0.0_ga kernel
18[[CollapsibleEnd]]
19
8220The Gateworks Ventana Yocto BSP provides a layer of package recipes that replace or override recipes in the upstream Yocto project such as:
83 </p>
84 <ul><li>kernel
85 </li><li>bootloader
86 </li><li>filesystem images
87 </li><li>support utilities
88 </li></ul><p>
21 * kernel
22 * bootloader
23 * filesystem images
24 * support utilities
25
8926For details on Yocto releases please see:
90 </p>
91 <ul><li><a class="ext-link" href="https://wiki.yoctoproject.org/wiki/Releases"><span class="icon"></span>https://wiki.yoctoproject.org/wiki/Releases</a>
92 </li></ul><p>
93 <span class="wikianchor" id="prebuilt"></span>
94 </p>
95 <h1 id="Pre-CompiledYoctoBinaries">Pre-Compiled Yocto Binaries</h1>
96 <p>
27 * https://wiki.yoctoproject.org/wiki/Releases
28
29
30= Pre-Compiled Yocto Binaries =
9731For convenience Gateworks has some pre-built ubi files available. Note that you need to download a UBI image appropriate for the FLASH size on your board. Gateworks Ventana boards come with either 256MB NAND Flash or 1GB/2GB NAND Flash. You can see the size output from the bootloader over the serial console.
98 </p>
99 <p>
100 <strong> <a class="wiki" href="/wiki/Yocto/Building#InstallingFirmware">Installation instructions here</a> </strong>
101 </p>
102 <p>
32
33Installation instructions here
34
10335Most recent releases:
104 </p>
105 <ul><li>Yocto 2.3 (Pyro) 20170524:
106 <ul><li>Multimedia: (supports gstreamer video in/out encode/decode, but no GUI desktop)
107 <ul>
108 <li><a class="ext-link" href="http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-2.3_20170524183825_normal.rootfs.ubi"><span class="icon"></span>ubi 256MB FLASH</a> (sha256sum:e2b41e2ab9d0c7829996249b1bf04cb902cbdc1d300a1d4411d9f96540a2f91a)
109 </li>
110 <li><a class="ext-link" href="http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-2.3_20170524183825_large.rootfs.ubi"><span class="icon"></span>ubi 1GB/2GB FLASH</a> (sha256sum:055b7644b1db05b96e33f948e1f314d39e7745fb1fd08dab248fe39f975c6eb2)
111 </li><li><a class="ext-link" href="http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-2.3_20170524183825.rootfs.tar.bz2"><span class="icon"></span>rootfs tarball</a> (sha256sum:aa8db12b24a091db994d5cba1357e608b03be71c947a040954d70bd0ce7636d4)
112 </li></ul></li>
113
114 </p><div> <h3 class="foldable">Old Releases</h3><div><p>
115 </p>
116 <ul>
117
118 <li>Yocto 1.8.2 (Fido) 20160328-1730:
119 <ul><li>Multimedia: (supports gstreamer video in/out encode/decode, but no GUI desktop)
120 <ul><li><a class="ext-link" href="http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-20160328-1730_normal-ubi"><span class="icon"></span>ubi 256MB FLASH</a> (sha256sum:a012d6ffb287221e686de973870e4232fe54f08d208f9ce5a436933ecff02606)
121 </li><li><a class="ext-link" href="http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana_large-ubi"><span class="icon"></span>ubi 1GB/2GB FLASH</a> (sha256sum:be735f02f0a68b9cca797cd62e71b9de2ecea3ab6e64c23e3406b175c160f25a)
122 </li><li><a class="ext-link" href="http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-tar-bz2"><span class="icon"></span>rootfs tarball</a> (sha256sum:94734c2c442427deb1df537d1da9abebb9b6e5dab2891c3a35e8ac200540dd07)
123 </li></ul></li><li>GUI: (supports gstreamer video in/out encode/decode and SATO X11 desktop with Matchbox window manager and Midori web browser)
124 <ul><li><a class="ext-link" href="http://blog.gateworks.com/?wpdmpro=gateworks-image-gui-ventana_large-ubi"><span class="icon"></span>ubi 1GB/2GB FLASH</a> (sha256sum:96d229507a82022a9da7e91998b55dea706619c09548821d69712b97dc76919a)
125 </li><li><a class="ext-link" href="http://blog.gateworks.com/?wpdmpro=gateworks-image-gui-ventana-tar-bz2"><span class="icon"></span>rootfs tarball</a> (sha256sum:12aecb6b2e38ba9f55c1986e8bb27c057521f96be1cb63227748db4cf3e8e7a3)
126 </li></ul></li></ul></li>
127
128 <li>Yocto 1.8.1 (Fido) 20160223-1730:
129 <ul><li>Multimedia:
130 <ul><li><a class="ext-link" href="http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-1.8.1_20160224031410_normal.rootfs.ubi"><span class="icon"></span>ubi 256MB FLASH</a> (sha256sum:c1ecd3a4b9406d9274e89de94a2c76486d2440fefc0588feb495c0d021944697)
131 </li><li><a class="ext-link" href="http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-1.8.1_20160224031410_large.rootfs.ubi"><span class="icon"></span>ubi 1GB/2GB FLASH</a> (sha256sum:d156c12c8973f21400ed8a9f374a8727284c776abba34c5b4cebfbce46997141)
132 </li><li><a class="ext-link" href="http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-1.8.1_20160224031410.rootfs.tar.bz2"><span class="icon"></span>rootfs tarball</a> (sha256sum:d17b603d3f81aad31aa4e642a03cf057c1ba21726d51f929fe027283d70624cf)
133 </li></ul></li></ul></li></ul></li>
134
135 <li>Yocto 1.7.1 (Dizzy) 20150904-1730:
136 <ul><li>Multimedia:
137 <ul><li><a class="ext-link" href="http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-2.3_20170524183825_normal.rootfs.ubi"><span class="icon"></span>ubi 256MB FLASH</a> (sha256sum:e2b41e2ab9d0c7829996249b1bf04cb902cbdc1d300a1d4411d9f96540a2f91a)
138 </li><li><a class="ext-link" href="http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-2.3_20170524183825_large.rootfs.ubi"><span class="icon"></span>ubi 1GB/2GB FLASH</a> (sha256sum:055b7644b1db05b96e33f948e1f314d39e7745fb1fd08dab248fe39f975c6eb2)
139 </li><li><a class="ext-link" href="http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-2.3_20170524183825.rootfs.tar.bz2"><span class="icon"></span>rootfs tarball</a> (sha256sum:aa8db12b24a091db994d5cba1357e608b03be71c947a040954d70bd0ce7636d4)
140 </li></ul></li></ul></li></ul></li>
141
142 <li>Yocto 1.6.2 (Daisy) 20150221_0538:
143 <ul><li>Multimedia:
144 <ul><li><a class="ext-link" href="http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-1.6.2_20150221_0538_normal.ubi"><span class="icon"></span>ubi 256MB FLASH</a> (sha256sum:c05a6cca542bd2004cf51bc161d5c73b1e63322a9a543c6f566a8e876ec9274a)
145 </li><li><a class="ext-link" href="http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-1.6.2_20150221_0538_large.ubi"><span class="icon"></span>ubi 1GB/2GB FLASH</a> (sha256sum:10b27d97025df0c389972995497381a5e8e15beb79915f35c760aa0439370b7a)
146 </li><li><a class="ext-link" href="http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-1.6.2_20150221_0538.rootfs.tar.bz2"><span class="icon"></span>rootfs tarball</a> (sha256sum:b383e6bcc4543719423c318cae588897fde36d5f68f4b1f989054bd287f7557b)
147 </li></ul></li></li></ul></li></ul>
36 * Yocto 2.3 (Pyro) 20170524:
37 - Multimedia: (supports gstreamer video in/out encode/decode, but no GUI desktop)
38 * [http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-2.3_20170524183825_normal.rootfs.ubi ubi 256MB FLASH] (sha256sum:e2b41e2ab9d0c7829996249b1bf04cb902cbdc1d300a1d4411d9f96540a2f91a)
39 * [http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-2.3_20170524183825_large.rootfs.ubi ubi 1GB/2GB FLASH] (sha256sum:055b7644b1db05b96e33f948e1f314d39e7745fb1fd08dab248fe39f975c6eb2)
40 * [http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-2.3_20170524183825.rootfs.tar.bz2 rootfs tarball] (sha256sum:aa8db12b24a091db994d5cba1357e608b03be71c947a040954d70bd0ce7636d4)
41
42[[CollapsibleStart(Old Releases)]]
43 * Yocto 1.8.2 (Fido) 20160328-1730:
44 - Multimedia: (supports gstreamer video in/out encode/decode, but no GUI desktop)
45 * [http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-20160328-1730_normal-ubi ubi 256MB FLASH] (sha256sum:a012d6ffb287221e686de973870e4232fe54f08d208f9ce5a436933ecff02606)
46 * [http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana_large-ubi ubi 1GB/2GB FLASH] (sha256sum:be735f02f0a68b9cca797cd62e71b9de2ecea3ab6e64c23e3406b175c160f25a)
47 * [http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-tar-bz2 rootfs tarball] (sha256sum:94734c2c442427deb1df537d1da9abebb9b6e5dab2891c3a35e8ac200540dd07)
48 - GUI: (supports gstreamer video in/out encode/decode and SATO X11 desktop with Matchbox window manager and Midori web browser)
49 * [http://blog.gateworks.com/?wpdmpro=gateworks-image-gui-ventana_large-ubi ubi 1GB/2GB FLASH] (sha256sum:96d229507a82022a9da7e91998b55dea706619c09548821d69712b97dc76919a)
50 * [http://blog.gateworks.com/?wpdmpro=gateworks-image-gui-ventana-tar-bz2 rootfs tarball] (sha256sum:12aecb6b2e38ba9f55c1986e8bb27c057521f96be1cb63227748db4cf3e8e7a3)
51 * Yocto 1.8.1 (Fido) 20160223-1730:
52 - Multimedia:
53 * [http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-1.8.1_20160224031410_normal.rootfs.ubi ubi 256MB FLASH] (sha256sum:c1ecd3a4b9406d9274e89de94a2c76486d2440fefc0588feb495c0d021944697)
54 * [http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-1.8.1_20160224031410_large.rootfs.ubi ubi 1GB/2GB FLASH] (sha256sum:d156c12c8973f21400ed8a9f374a8727284c776abba34c5b4cebfbce46997141)
55 * [http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-1.8.1_20160224031410.rootfs.tar.bz2 rootfs tarball] (sha256sum:d17b603d3f81aad31aa4e642a03cf057c1ba21726d51f929fe027283d70624cf)
56 * Yocto 1.7.1 (Dizzy) 20150904-1730:
57 - Multimedia:
58 * [http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-2.3_20170524183825_normal.rootfs.ubi ubi 256MB FLASH] (sha256sum:e2b41e2ab9d0c7829996249b1bf04cb902cbdc1d300a1d4411d9f96540a2f91a)
59 * [http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-2.3_20170524183825_large.rootfs.ubi ubi 1GB/2GB FLASH] (sha256sum:055b7644b1db05b96e33f948e1f314d39e7745fb1fd08dab248fe39f975c6eb2)
60 * [http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-2.3_20170524183825.rootfs.tar.bz2 rootfs tarball] (sha256sum:aa8db12b24a091db994d5cba1357e608b03be71c947a040954d70bd0ce7636d4)
61 * Yocto 1.6.2 (Daisy) 20150221_0538:
62 - Multimedia:
63 * [http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-1.6.2_20150221_0538_normal.ubi ubi 256MB FLASH] (sha256sum:c05a6cca542bd2004cf51bc161d5c73b1e63322a9a543c6f566a8e876ec9274a)
64 * [http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-1.6.2_20150221_0538_large.ubi ubi 1GB/2GB FLASH] (sha256sum:10b27d97025df0c389972995497381a5e8e15beb79915f35c760aa0439370b7a)
65 * [http://blog.gateworks.com/?wpdmpro=gateworks-image-multimedia-ventana-1.6.2_20150221_0538.rootfs.tar.bz2 rootfs tarball] (sha256sum:b383e6bcc4543719423c318cae588897fde36d5f68f4b1f989054bd287f7557b)
66[[CollapsibleEnd]]
14867
14968Version History:
150 </p>
151 <ul><li>Yocto v2.3:
152 <ul><li>Yocto 2.3 (Pyro) 20170524:
153
154 <ul><li>kernel: <a class="ext-link" href="https://github.com/Gateworks/linux-imx6/tree/3ae25e0dd3134b8f49270eee3b4a49733ff7eb05"><span class="icon"></span>3.14.48-1.0.x_ga+yocto+g3ae25e0</a>
155
156 </li><li>wireless drivers from linux-backports: 20160122
157
158
159 </li></ul></li></ul></li></ul><p>
160 </p><div> <h3 class="foldable">Older History</h3><div><p>
161 </p>
162 <ul><li>Yocto v1.8:
163 <ul><li>Yocto 1.8.2 (Fido) 20160328-1730:
164 <ul><li>kernel: <a class="ext-link" href="https://github.com/Gateworks/linux-imx6/tree/3ae25e0dd3134b8f49270eee3b4a49733ff7eb05"><span class="icon"></span>3.14.48-1.0.x_ga+yocto+g3ae25e0</a>
165 </li><li>wireless drivers from linux-backports: 20160122
166 </li></ul></li></ul>
167
168 <ul><li>Yocto 1.8.1 (Fido) 20160223-1730:
169 <ul><li>kernel: 3.14.48-1.0.x_ga+yocto+g7a5ffca6
170 </li><li>wireless drivers from linux-backports: 20150129
171 </li><li>fixed: gsc_update no longer erases user EEPROM data
172 </li><li>fixed: VPU firmware update to resolve various encoding timeouts
173 </li><li>fixed: FEC ethernet tx queue stalls
174 </li><li>fixed: NAND stability issue
175 </li><li>fixed: PWM pinmux
176 </li><li>fixed: mxc_v4l2_capture initialization
177 </li><li>fixed: reboot fix for GW5100 A/B revisions
178 </li><li>updated: bootscript updated to v1.06 to remove LVDS display detection
179 </li><li>added: added user controllable quality steps to gst-variable-rtsp-server
180 </li><li>added: gpsd
181 </li><li>added: crda
182 </li><li>added: ethtool
183 </li><li>added: hostapd-conf
184 </li><li>added: SPI for GW522x
185 </li><li>added: USB serial drivers
186 </li><li>added: 7" LVDS display touchscreen controller (gt9x)
187 </li><li>added: use GSC for power-down and restart
188 </li></ul></li>
189
190 <li>Yocto 1.8 (Fido) 20150904-2139:
191 <ul><li>Initial Gateworks Yocto v1.8 release
192 </li><li>kernel: 3.14.48-1.0.x_ga+yocto+g4ba0a59
193 </li><li>wireless drivers from linux-backports: 20150129
194 <ul><li>much improved ath10k performance/support including adhoc
195 </li></ul></li><li>added gstreamer 1.0 / gstreamer-imx
196 </li><li>added avc8000 8x D1 miniPCIe capture card support
197 </li><li>added gsc-update
198 </li><li>added uboot-envtools
199 </li><li>added gwsoc (GW16113) support)
200 </li></ul></li></ul></li><li>Yocto v1.7:
201 <ul><li>Yocto 1.7.1 (Dizzy) 20150904-1730:
202 <ul><li>kernel: 3.10.17-1.0.0_ga+yocto+g4078cea
203 </li><li>wireless drivers from linux-backports: 20141221
204 </li><li>default to ldo-enabled mode
205 </li><li>i2c: add retries on i2c nak's
206 </li><li>gsc: fix gsc hwmon negative temperature readings
207 </li><li>video: mxc: add support for HDMI interlace out
208 </li><li>add UHS-I support
209 </li><li>enable SATA_AHCI support
210 </li><li>enable PCA953x IRQ
211 </li><li>update IMX6SDL voltage set-points
212 </li><li>disable PCIe Gen2
213 </li><li>imx-thermal: set thresholds based on CPU temperature grade
214 </li><li>tda1997x: default to yuv422smp capture mode for 1080p60Hz
215 </li><li>tda1997x: fixed ITU709 colorimetry colorspace conversion
216 </li><li>sgtl5000: fix audio pop
217 </li></ul></li><li>Yocto 1.7.1 (Dizzy) 20150221-0225:
218 <ul><li>Initial Gateworks Yocto v1.7 release
219 </li><li>kernel: 3.10.17-1.0.0_ga+yocto+g4d177f6
220 </li></ul></li></ul></li><li>Yocto v1.6:
221 <ul><li>Yocto 1.6.2 - 20150221_0538:
222 <ul><li>added support for GW551x, GW552x
223 </li><li>added cryptodev module
224 </li><li>wireless drivers:
225 <ul><li>updated drivers to compat-wireless_20141221
226 </li><li>use internal regdb
227 </li></ul></li><li>kernel: 3.10.17-1.0.0_ga+yocto+g4d177f6
228 <ul><li>added support for DLC800FIGT3 8in XGA (1024x768) capacitive multi-touch touchscreen
229 </li><li>added support for DLC700JMGT4 7in WSVGA (1024x600) capacitive multi-touch touchscreens
230 </li><li>bumped IMX6Q/IMX6DL operating point voltages for VDD_ARM/VDD_SOC
231 </li><li>added GSC drivers (Watchdog / Input)
232 </li><li>fix gpio input state detect for PCA953x port expanders
233 </li><li>added support for GW551x, GW552x
234 </li><li>HDMI input:
235 <ul><li>fixed EDID handling
236 </li><li>add supoprt for HDMI input in 16bit YUV422 mode (requires alternate device-tree configuration)
237 </li><li>fix audio output format details and constrain samplerate
238 </li></ul></li><li>disable IMX6 busfreq driver
239 </li><li>add i210 support
240 </li><li>add GW16103 support
241 </li><li>GW51xx: fix invalid PPS gpio
242 </li><li>disable evbug driver
243 </li><li>add LTC3676 PMIC support and ldo-bypass mode for GW53xx/GW52xx/GW51xx/GW551x/GW552x) (lowers overall power-reduction and thermal envelope)
244 </li></ul></li></ul></li><li>Yocto 1.6.1 - 20141024:
245 <ul><li>kernel: 3.10.17-1.0.0_ga+yocto+gb5914e9
246 </li><li>occasional PCIe link issue resolved
247 </li><li>video sink issue resolved for same resolution input/output
248 </li><li>dual-display HDMI+CVBS fixed
249 </li><li>GW16082 support fixed
250 </li><li>PCIe IRQ slot mapping issue fixed
251 </li><li>GW5400 stability issue fixed
252 </li></ul></li></ul></li></ul><p>
253 </div></div>
254 </p>
255 <p>
256 For instructions on flashing UBI files, please see <a class="wiki" href="/wiki/Yocto/Building#NANDFlash">this section</a>.
257 </p>
258 <p>
259 <span class="wikianchor" id="build"></span>
260 </p>
261 <h1 id="ObtainingandCompilingtheSourceCode">Obtaining and Compiling the Source Code</h1>
262 <p>
69 * Yocto v2.3:
70 - Yocto 2.3 (Pyro) 20170524:
71 - kernel: 3.14.48-1.0.x_ga+yocto+g3ae25e0
72 - wireless drivers from linux-backports: 20160122
73
74[[CollapsibleStart(Old Releases)]]
75 * Yocto v1.8:
76 - Yocto 1.8.2 (Fido) 20160328-1730:
77 - kernel: 3.14.48-1.0.x_ga+yocto+g3ae25e0
78 - wireless drivers from linux-backports: 20160122
79 - Yocto 1.8.1 (Fido) 20160223-1730:
80 - kernel: 3.14.48-1.0.x_ga+yocto+g7a5ffca6
81 - wireless drivers from linux-backports: 20150129
82 - fixed: gsc_update no longer erases user EEPROM data
83 - fixed: VPU firmware update to resolve various encoding timeouts
84 - fixed: FEC ethernet tx queue stalls
85 - fixed: NAND stability issue
86 - fixed: PWM pinmux
87 - fixed: mxc_v4l2_capture initialization
88 - fixed: reboot fix for GW5100 A/B revisions
89 - updated: bootscript updated to v1.06 to remove LVDS display detection
90 - added: added user controllable quality steps to gst-variable-rtsp-server
91 - added: gpsd
92 - added: crda
93 - added: ethtool
94 - added: hostapd-conf
95 - added: SPI for GW522x
96 - added: USB serial drivers
97 - added: 7" LVDS display touchscreen controller (gt9x)
98 - added: use GSC for power-down and restart
99 - Yocto 1.8 (Fido) 20150904-2139:
100 - Initial Gateworks Yocto v1.8 release
101 - kernel: 3.14.48-1.0.x_ga+yocto+g4ba0a59
102 - wireless drivers from linux-backports: 20150129
103 - much improved ath10k performance/support including adhoc
104 - added gstreamer 1.0 / gstreamer-imx
105 - added avc8000 8x D1 miniPCIe capture card support
106 - added gsc-update
107 - added uboot-envtools
108 - added gwsoc (GW16113) support)
109 * Yocto v1.7:
110 - Yocto 1.7.1 (Dizzy) 20150904-1730:
111 - kernel: 3.10.17-1.0.0_ga+yocto+g4078cea
112 - wireless drivers from linux-backports: 20141221
113 - default to ldo-enabled mode
114 - i2c: add retries on i2c nak's
115 - gsc: fix gsc hwmon negative temperature readings
116 - video: mxc: add support for HDMI interlace out
117 - add UHS-I support
118 - enable SATA_AHCI support
119 - enable PCA953x IRQ
120 - update IMX6SDL voltage set-points
121 - disable PCIe Gen2
122 - imx-thermal: set thresholds based on CPU temperature grade
123 - tda1997x: default to yuv422smp capture mode for 1080p60Hz
124 - tda1997x: fixed ITU709 colorimetry colorspace conversion
125 - sgtl5000: fix audio pop
126 - Yocto 1.7.1 (Dizzy) 20150221-0225:
127 - Initial Gateworks Yocto v1.7 release
128 - kernel: 3.10.17-1.0.0_ga+yocto+g4d177f6
129 * Yocto v1.6:
130 - Yocto 1.6.2 - 20150221_0538:
131 - added support for GW551x, GW552x
132 - added cryptodev module
133 - wireless drivers:
134 - updated drivers to compat-wireless_20141221
135 - use internal regdb
136 - kernel: 3.10.17-1.0.0_ga+yocto+g4d177f6
137 - added support for DLC800FIGT3 8in XGA (1024x768) capacitive multi-touch touchscreen
138 - added support for DLC700JMGT4 7in WSVGA (1024x600) capacitive multi-touch touchscreens
139 - bumped IMX6Q/IMX6DL operating point voltages for VDD_ARM/VDD_SOC
140 - added GSC drivers (Watchdog / Input)
141 - fix gpio input state detect for PCA953x port expanders
142 - added support for GW551x, GW552x
143 - HDMI input:
144 * fixed EDID handling
145 * add supoprt for HDMI input in 16bit YUV422 mode (requires alternate device-tree configuration)
146 - fix audio output format details and constrain samplerate
147 - disable IMX6 busfreq driver
148 - add i210 support
149 - add GW16103 support
150 - GW51xx: fix invalid PPS gpio
151 - disable evbug driver
152 - add LTC3676 PMIC support and ldo-bypass mode for GW53xx/GW52xx/GW51xx/GW551x/GW552x) (lowers overall power-reduction and thermal envelope)
153 - Yocto 1.6.1 - 20141024:
154 - kernel: 3.10.17-1.0.0_ga+yocto+gb5914e9
155 - occasional PCIe link issue resolved
156 - video sink issue resolved for same resolution input/output
157 - dual-display HDMI+CVBS fixed
158 - GW16082 support fixed
159 - PCIe IRQ slot mapping issue fixed
160 - GW5400 stability issue fixed
161[[CollapsibleEnd]]
162
163For instructions on flashing UBI files, please see [wiki:Yocto/Building#NANDFlash this section].
164
165
166= Obtaining and Compiling the Source Code =
263167The following build instructions refer to Debian GNU/Linux 7.4 and Ubuntu 12.04 - 15.10.
264 </p>
265 <p>
168
266169Please make sure the following packages are installed
267 </p>
268 <div class="code"><pre>sudo apt-get install chrpath libsdl-dev texinfo curl build-essential git subversion diffstat gawk
269 </pre></div><ol><li>fetch the <tt>repo</tt> tool (if you don't have it already in your path):
270 <div class="code"><pre>mkdir ~/bin
271 curl http://commondatastorage.googleapis.com/git-repo-downloads/repo > ~/bin/repo
170{{{#!bash
171sudo apt-get install chrpath libsdl-dev texinfo curl build-essential git subversion diffstat gawk
172}}}
173
174Instructions:
1751. fetch the repo tool (if you don't have it already in your path):
176{{{#!bash
177mkdir ~/bin
178curl http://commondatastorage.googleapis.com/git-repo-downloads/repo > ~/bin/repo
272179chmod a+x ~/bin/repo
273 </pre></div></li></ol><ol start="2"><li>Setup source repos:
274 <div class="code"><pre><span class="nv">PATH</span><span class="o">=</span><span class="k">${</span><span class="nv">PATH</span><span class="k">}</span>:~/bin
180}}}
181
1822. Setup source repos:
183{{{#!bash
184PATH=${PATH}:~/bin
275185mkdir ~/ventana-yocto
276 <span class="nb">cd </span>ventana-yocto
186cd ventana-yocto
277187repo init -u https://github.com/Gateworks/gateworks-yocto-bsp-platform -b fido
278 </pre></div><ul><li>in the above command <tt>fido</tt> is the name of the branch that refers to Yocto v1.8
279 </li></ul></li></ol><ol start="3"><li>(optional) pin the repo versions to the latest version which was known to have been successfully built by the Gateworks nightly build server:
280 <div class="code"><pre>wget http://dev.gateworks.com/yocto/1.8/snapshot.xml <span class="c"># fetch the pinned manifest from the last successful nightly build
281 </span>mv snapshot.xml .repo/manifest.xml <span class="c"># copy over the generic un-pinned manifest
282 </span></pre></div><ul><li>the <tt>repo init</tt> command will fetch a repo 'manifest' which refers to various source repositories and branches but will fetch the latest changes from those branches (which occasionally may fail to build due to upstream errors common with community based projects). The Gateworks nightly build server posts the manifest pinned to the specific revision used in the build on completion of a successful build. You can also use a snapshot from a previously released pre-built binary by using the other snapshot files in <a class="ext-link" href="http://dev.gateworks.com/yocto/1.8"><span class="icon"></span>http://dev.gateworks.com/yocto/1.8</a>
283 </li></ul></li></ol><ol start="4"><li>Download latest sources:
284 <div class="code"><pre>repo sync -c -j8
285 </pre></div><ul><li>the <tt>-c</tt> parameter tells repo to just pull down the current branch specified by the manifest file (thus is more network and disk usage efficient)
286 </li><li>the <tt>-j</tt> parameter tells repo to use multiple processes (8 in this example) which will speed up fetching
287 </li><li>you can later repeat the <tt>repo sync</tt> to pull down the latest sources specified for the repo manifest file for the current branch specified in the <tt>repo init</tt> in step 2 above
288 </li></ul></li></ol><ol start="5"><li>Activate <tt>bitbake</tt> environment. You will have to accept license agreement.
289 <div class="code"><pre>. ./setup-environment build
290 </pre></div><ul><li><strong>do this every time for a new shell when you wish to use <tt>bitbake</tt></strong>
291 </li></ul></li></ol><ol start="6"><li>Build a filesystem image recipe. <tt>gateworks-image-multimedia</tt> is recommended.
292 <ul><li>For a detailed description of the Gateworks specific images, please see <a class="wiki" href="/wiki/Yocto/images#ImageUseCases">the images page</a>.
293 <div class="code"><pre>bitbake gateworks-image-multimedia
294 </pre></div></li><li>This could take several hours depending on your Internet speed and development host
295 </li><li>core-image-minimal results in 1.8GB of downloaded sources, 14GB of space used in build/tmp, and takes ~70mins on a Quad-core 2.5GHz build host, not accounting for your network connection.
296 </li><li>By default, images, kernels, etc are found in <tt>tmp/deploy/images/ventana</tt>
297 </li></ul></li></ol><ol start="7"><li>Grab <tt>.ubi</tt> file which contains both kernel and root filesystem and program it to the board with instructions below:
298 <div class="code"><pre>tmp/deploy/images/ventana/gateworks-image-multimedia-ventana_normal.ubi
188}}}
189 * in the above command, {{{fido}}} is the name of the branch that refers to Yocto v1.8
190
1913. (optional) pin the repo versions to the latest version which was known to have been successfully built by the Gateworks nightly build server:
192{{{#!bash
193wget http://dev.gateworks.com/yocto/1.8/snapshot.xml # fetch the pinned manifest from the last successful nightly build
194mv snapshot.xml .repo/manifest.xml # copy over the generic un-pinned manifest
195}}}
196 * the {{{repo init}}} command will fetch a repo 'manifest' which refers to various source repositories and branches but will fetch the latest changes from those branches (which occasionally may fail to build due to upstream errors common with community based projects). The Gateworks nightly build server posts the manifest pinned to the specific revision used in the build on completion of a successful build. You can also use a snapshot from a previously released pre-built binary by using the other snapshot files in http://dev.gateworks.com/yocto/1.8
197
1984. Download latest sources:
199{{{#!bash
200repo sync -c -j8
201}}}
202 * the {{{-c}}} parameter tells repo to just pull down the current branch specified by the manifest file (thus is more network and disk usage efficient)
203 * the {{{-j}}} parameter tells repo to use multiple processes (8 in this example) which will speed up fetching
204 * you can later repeat the {{{repo sync}}} to pull down the latest sources specified for the repo manifest file for the current branch specified in the repo init in step 2 above
205
2065. Activate bitbake environment. You will have to accept license agreement.
207{{{#!bash
208. ./setup-environment build
209}}}
210 * **do this every time for a new shell when you wish to use {{{bitbake}}}**
211
2126. Build a filesystem image recipe. gateworks-image-multimedia is recommended.
213{{{#!bash
214bitbake gateworks-image-multimedia
215}}}
216 * For a detailed description of the Gateworks specific images, please see the images page.
217 * This could take several hours depending on your Internet speed and development host
218 * {{{core-image-minimal}}} results in 1.8GB of downloaded sources, 14GB of space used in build/tmp, and takes ~70mins on a Quad-core 2.5GHz build host, not accounting for your network connection.
219 * By default, images, kernels, etc are found in {{{tmp/deploy/images/ventana}}}.
220
2217. Grab .ubi file which contains both kernel and root filesystem and program it to the board with instructions below:
222{{{#!bash
223tmp/deploy/images/ventana/gateworks-image-multimedia-ventana_normal.ubi
299224tmp/deploy/images/ventana/gateworks-image-multimedia-ventana_large.ubi
300 </pre></div></li></ol><p>
225}}}
226
301227Notes:
302 </p>
303 <ul><li>to download any updates and rebuild, repeat the above starting with step 3
304 </li><li>to re-activate a new shell repeat the above starting with step 4 (you can only have 1 shell activated at a time - you need to activate a new shell if you have exited a previously activated shell)
305 </li><li>to clean a specific recipe use <tt>bitbake -f -c clean <recipe></tt>. Note that to represent the kernel you can use the virtual recipe name 'virtual/kernel'
306 <ul><li>Note: After cleaning a recipe, rebuild with the <tt>--no-setscene</tt> command line argument to <tt>bitbake</tt>, e.g. <tt>bitbake --no-setscene <recipe></tt>
307 </li></ul></li><li>to clean all built items (but not remove downloaded sources or the sstate-cache) you can <tt>rm -rf tmp</tt>
308 </li><li>to clean everything and start over you can remove the entire build directory and repeat the above starting with step 4 (this will remove all downloaded sources as well)
309 </li></ul><p>
228 * to download any updates and rebuild, repeat the above starting with step 3
229 * to re-activate a new shell repeat the above starting with step 4 (you can only have 1 shell activated at a time - you need to activate a new shell if you have exited a previously activated shell)
230 * to clean a specific recipe use {{{bitbake -f -c clean <recipe>}}}. Note that to represent the kernel you can use the virtual recipe name 'virtual/kernel'
231 - Note: After cleaning a recipe, rebuild with the {{{--no-setscene}}} command line argument to bitbake, e.g. bitbake --no-setscene <recipe>
232 * to clean all built items (but not remove downloaded sources or the sstate-cache) you can {{{rm -rf tmp}}}.
233 * to clean everything and start over you can remove the entire build directory and repeat the above starting with step 4 (this will remove all downloaded sources as well)
234
310235Useful References:
311 </p>
312 <ul><li><a class="ext-link" href="http://www.crashcourse.ca/wiki/index.php/Yocto_FAQ"><span class="icon"></span>http://www.crashcourse.ca/wiki/index.php/Yocto_FAQ</a>
313 </li><li><a class="ext-link" href="http://xda-university.com/as-a-developer/repo-tips-tricks"><span class="icon"></span>http://xda-university.com/as-a-developer/repo-tips-tricks</a>
314 </li></ul><h2 id="Troubleshootingbuildfailures">Troubleshooting build failures</h2>
315 <p>
316 The <a class="missing wiki">OpenEmbedded?</a> build system does a fairly good job of reporting build errors in a sane way to help you diagnose the problem.
317 </p>
318 <p>
319 In general, for each package that failed, you will see three lines of output from <tt>bitbake</tt> for each package. For example, the following shows a 'fetch error' for the <tt>evtest_1.25</tt> package:
320 </p>
321 <div class="code"><pre>ERROR: Function failed: Fetcher failure <span class="k">for </span>URL: <span class="s1">'http://cgit.freedesktop.org/~whot/evtest/snapshot/evtest-1.25.tar.bz2;name=archive'</span>. Unable to fetch URL from any source.
236 * http://www.crashcourse.ca/wiki/index.php/Yocto_FAQ
237 * http://xda-university.com/as-a-developer/repo-tips-tricks
238
239
240== Troubleshooting build failures ==
241The OpenEmbedded build system does a fairly good job of reporting build errors in a sane way to help you diagnose the problem.
242
243In general, for each package that failed, you will see three lines of output from {{{bitbake}}} for each package. For example, the following shows a 'fetch error' for the {{{evtest_1.25}}} package:
244{{{#!bash
245ERROR: Function failed: Fetcher failure for URL: 'http://cgit.freedesktop.org/~whot/evtest/snapshot/evtest-1.25.tar.bz2;name=archive'. Unable to fetch URL from any source.
322246ERROR: Logfile of failure stored in: /usr/src/tharvey/nightly/yocto/danny/20140820_8bd8be2d/build/tmp/work/armv7a-vfp-neon-poky-linux-gnueabi/evtest-1.25-r0/temp/log.do_fetch.23170
323 ERROR: Task 452 <span class="o">(</span>/usr/src/tharvey/nightly/yocto/danny/20140820_8bd8be2d/sources/meta-openembedded/meta-oe/recipes-support/evtest/evtest_1.25.bb, do_fetch<span class="o">)</span> failed with <span class="nb">exit </span>code <span class="s1">'1'</span>
324 </pre></div><p>
247ERROR: Task 452 (/usr/src/tharvey/nightly/yocto/danny/20140820_8bd8be2d/sources/meta-openembedded/meta-oe/recipes-support/evtest/evtest_1.25.bb, do_fetch) failed with exit code '1'
248}}}
249
325250The first ERROR line here shows the cause of the issue, the second shows where the detailed log of the failure is, and the third simply says what package and task failed. If you need assistance understanding a particular error, you will want to provide the three lines above as well as the log file pointed to in the second line.
326 </p>
327 <h3 id="Fetchfailure">Fetch failure</h3>
328 <p>
329 The most common build failure (of any linux build system) is failure to be able to fetch sources for the 100's of <a class="missing wiki">OpenSource?</a> projects the build system uses from the Internet. This can be caused by a network issue on your end, a network issue on the source package sites end, or a site/file that has been permanently moved/removed.
330 </p>
331 <p>
332 If this occurs you will see an 'ERROR: Function failed: Fetcher failure' message such as the following output from <tt>bitbake</tt>:
333 </p>
334 <div class="code"><pre>ERROR: Function failed: Fetcher failure <span class="k">for </span>URL: <span class="s1">'http://cgit.freedesktop.org/~whot/evtest/snapshot/evtest-1.25.tar.bz2;name=archive'</span>. Unable to fetch URL from any source.
335 </pre></div><p>
336 If you encounter such an error the most obvious thing to make sure your Internet connection is solid and try first is simply <tt>bitbake</tt> your desired package again. If it occurs again, its likely an issue on the site that the package URI specifies as the package source. This could be a temporary issue, or the site/file could have been permanently moved/removed for some reason and your either building an older BSP or the package source simply hasn't been updated to deal with the change (as I mentioned, this is a common issue).
337 </p>
338 <p>
339 To combat this issue, there are mirrors where you may be able to find the missing file(s). Note that Gateworks provides such a mirror that it tries to keep updated at <a class="ext-link" href="http://dev.gateworks.com/sources"><span class="icon"></span>http://dev.gateworks.com/sources</a>. Once you find the file, copy it to your download directory, touch the file indicating the fetch is done (the source file with a .done on the end) and <tt>bitbake</tt> your package again. For example, the above shows a failure to fetch the <tt>evtest-1.25.tar.bz2</tt> file:
340 </p>
341 <div class="code"><pre>wget http://dev.gateworks.com/sources/evtest-1.25.tar.bz2
251
252=== Fetch failure ===
253The most common build failure (of any linux build system) is failure to be able to fetch sources for the 100's of OpenSource projects the build system uses from the Internet. This can be caused by a network issue on your end, a network issue on the source package sites end, or a site/file that has been permanently moved/removed.
254
255If this occurs you will see an 'ERROR: Function failed: Fetcher failure' message such as the following output from {{{bitbake}}}:
256{{{#!bash
257ERROR: Function failed: Fetcher failure for URL: 'http://cgit.freedesktop.org/~whot/evtest/snapshot/evtest-1.25.tar.bz2;name=archive'. Unable to fetch URL from any source.
258}}}
259
260If you encounter such an error the most obvious thing to make sure your Internet connection is solid and try first is simply {{{bitbake}}} your desired package again. If it occurs again, its likely an issue on the site that the package URI specifies as the package source. This could be a temporary issue, or the site/file could have been permanently moved/removed for some reason and your either building an older BSP or the package source simply hasn't been updated to deal with the change (as I mentioned, this is a common issue).
261
262To combat this issue, there are mirrors where you may be able to find the missing file(s). Note that Gateworks provides such a mirror that it tries to keep updated at http://dev.gateworks.com/sources. Once you find the file, copy it to your download directory, touch the file indicating the fetch is done (the source file with a .done on the end) and bitbake your package again. For example, the above shows a failure to fetch the evtest-1.25.tar.bz2 file:
263{{{#!bash
264wget http://dev.gateworks.com/sources/evtest-1.25.tar.bz2
342265cp evtest-1.25.tar.bz2 downloads/
343266touch downloads/evtest-1.25.tar.bz2.done
344267bitbake gateworks-image-multimedia
345 </pre></div><h3 id="UpstreamBreakage">Upstream Breakage</h3>
346 <p>
268}}}
269
270=== Upstream Breakage ===
347271It is not uncommon for community based projects such as Yocto to encounter build failures after changes because of the complexity of the build system. In some cases breakage may occur simply because of collisions between upstream Yocto repos and the packages that Gateworks overrides.
348 </p>
349 <p>
350 If you are building an 'un-pinned' release (you are not using a snapshot of the manifest file which has sha revisions for each repository) and you encounter a build failure, you may want to switch to a manifest file that produced a successful build by the Gateworks nightly build server. Manifests point to source code repositories by network server and branch, but typically do not pin the branch to a specific repository commit. A 'pinned' snapshot can be used instead that does specify a specific commit of each repository and branch. Refer to step 3 in the <a class="wiki" href="/wiki/Yocto/Building#build">instructions above</a>
351 </p>
352 <p>
353 <span class="wikianchor" id="repo"></span>
354 </p>
355 <h2 id="Keepinguptodateandorpinningsourcewithrepo">Keeping up to date and/or pinning source with repo</h2>
356 <p>
357 When building projects that use multiple source repositories any repository may change and thus make your working directory out of date. Because Yocto uses several package feeds with their own repositories this can make it difficult to keep in sync - this is where the <tt>repo</tt> tool comes in handy.
358 </p>
359 <p>
360 The <tt>repo sync</tt> command will update all repositories with upstream changes:
361 </p>
362 <div class="code"><pre>repo sync --quiet
363 </pre></div><p>
272
273If you are building an 'un-pinned' release (you are not using a snapshot of the manifest file which has sha revisions for each repository) and you encounter a build failure, you may want to switch to a manifest file that produced a successful build by the Gateworks nightly build server. Manifests point to source code repositories by network server and branch, but typically do not pin the branch to a specific repository commit. A 'pinned' snapshot can be used instead that does specify a specific commit of each repository and branch. Refer to step 3 in the [wiki:Yocto/Building#build instructions above].
274
275
276== Keeping up to date and/or pinning source with repo ==
277When building projects that use multiple source repositories any repository may change and thus make your working directory out of date. Because Yocto uses several package feeds with their own repositories this can make it difficult to keep in sync - this is where the {{{repo}}} tool comes in handy.
278
279The {{{repo sync}}} command will update all repositories with upstream changes:
280{{{#!bash
281repo sync --quiet
282}}}
283
364284You can override the default Manifest by using a local manifest file if you want to keep in sync with the upstream manifest yet make some minor change like pin a specific project or add a couple of projects. Reasons for doing this could be:
365 </p>
366 <ul><li>adding new projects
367 </li><li>pinning certain projects
368 </li><li>removing certain projects
369 </li></ul><p>
370 To use a local manifest create <tt>.repo/local_manifest.xml</tt> and it will be merged with <tt>.repo/manifest.xml</tt> by the <tt>repo</tt> tool whenever the manifest is used. You can use the <tt>remove-project</tt> directive to remove a project that you don't want and even add it back with your own choices if you want something different. For example:
371 </p>
372 <div class="code"><pre><span class="cp"><?xml version="1.0" encoding="UTF-8"?></span>
373 <span class="nt"><manifest></span>
374 <span class="nt"><remove-project</span> <span class="na">path=</span><span class="s">"hardware/qcom/display"</span> <span class="na">name=</span><span class="s">"CyanogenMod/android_hardware_qcom_display"</span> <span class="nt">/></span>
375 <span class="nt"><project</span> <span class="na">path=</span><span class="s">"hardware/qcom/display"</span> <span class="na">name=</span><span class="s">"WinSuk/android_hardware_qcom_display"</span> <span class="nt">/></span>
376 <span class="nt"></manifest></span>
377 </pre></div><p>
378 The <tt>repo manifest</tt> command will create a snapshot of your current project's manifest allowing you to create a pinned version that can be used later to create a working directory with the various projects at the exact same state as your current working directory:
379 </p>
380 <div class="code"><pre>repo manifest -o snapshot.xml -r
381 </pre></div><p>
382 This snapshot can then be copied over <tt>.repo/manifest.xml</tt> in a different build directory to pin the repository sources.
383 </p>
384 <p>
385 The Gateworks nightly build server creates a manifest snapshot like this and uploads the latest successful build to <a class="ext-link" href="http://dev.gateworks/com/yocto"><span class="icon"></span>http://dev.gateworks/com/yocto</a> so that it can be used to re-create a successful nightly build.
386 </p>
387 <p>
285 * adding new projects
286 * pinning certain projects
287 * removing certain projects
288
289To use a local manifest create {{{.repo/local_manifest.xml}}} and it will be merged with {{{.repo/manifest.xml}}} by the {{{repo}}} tool whenever the manifest is used. You can use the {{{remove-project}}} directive to remove a project that you don't want and even add it back with your own choices if you want something different. For example:
290{{{#!bash
291<?xml version="1.0" encoding="UTF-8"?>
292<manifest>
293 <remove-project path="hardware/qcom/display" name="CyanogenMod/android_hardware_qcom_display" />
294 <project path="hardware/qcom/display" name="WinSuk/android_hardware_qcom_display" />
295</manifest>
296}}}
297
298The {{{repo manifest}}} command will create a snapshot of your current project's manifest allowing you to create a pinned version that can be used later to create a working directory with the various projects at the exact same state as your current working directory:
299{{{#!bash
300repo manifest -o snapshot.xml -r
301}}}
302
303This snapshot can then be copied over {{{.repo/manifest.xml}}} in a different build directory to pin the repository sources.
304
305The Gateworks nightly build server creates a manifest snapshot like this and uploads the latest successful build to http://dev.gateworks/com/yocto so that it can be used to re-create a successful nightly build.
306
388307References:
389 </p>
390 <ul><li><a class="ext-link" href="https://source.android.com/source/using-repo.html"><span class="icon"></span>Official docs on using repo</a>
391 </li><li><a class="ext-link" href="http://xda-university.com/as-a-developer/repo-tips-tricks"><span class="icon"></span>xda-university repo tips and tricks</a>
392 </li><li><a class="ext-link" href="http://wiki.cyanogenmod.org/w/Doc:_Using_manifests"><span class="icon"></span>Cyanogenmod docs on using manifests</a>
393 </li><li><a class="ext-link" href="https://gerrit.googlesource.com/git-repo/+/master/docs/manifest-format.txt"><span class="icon"></span>repo Manifest Format: the official, technical documentation for repo manifests</a>
394 </li></ul><p>
395 <span class="wikianchor" id="rebuild"></span>
396 </p>
397 <h2 id="Updatingandrebuilding">Updating and rebuilding</h2>
398 <p>
308 * [https://source.android.com/source/using-repo.html Official docs on using repo]
309 * [http://xda-university.com/as-a-developer/repo-tips-tricks xda-university repo tips and tricks]
310 * [https://gerrit.googlesource.com/git-repo/+/master/docs/manifest-format.txt repo Manifest Format: the official, technical documentation for repo manifests]
311
312
313== Updating and rebuilding ==
399314From time to time the various repositories including in the Yocto build (a combination of Gateworks packages, community packages, Freescale community packages, and Yocto community packages) will get updates to various packages to add features or resolve issues.
400 </p>
401 <p>
402 The <tt>repo</tt> tool which manages the set of repositories in your yocto directory (based on a package manifest) can 'sync' all repos to the latest state using the following in the main yocto directory (the directory containing the sources and build subdirs:
403 </p>
404 <div class="code"><pre>./repo sync
405 </pre></div><p>
406 Following a sync, you can <tt>bitbake</tt> your filesystem image again to build a new filesystem with all updates:
407 </p>
408 <div class="code"><pre><span class="c"># activate a bitbake shell if not already done
409 </span>. ./setup-environment build
315
316The {{{repo}}} tool which manages the set of repositories in your yocto directory (based on a package manifest) can 'sync' all repos to the latest state using the following in the main yocto directory (the directory containing the sources and build subdirs:
317{{{#!bash
318./repo sync
319}}}
320
321Following a sync, you can {{{bitbake}}} your filesystem image again to build a new filesystem with all updates:
322{{{#!bash
323# activate a bitbake shell if not already done
324. ./setup-environment build
410325bitbake gateworks-image-multimedia
411 </pre></div><ul><li>build the filesystem image of your liking
412 </li></ul><h2 id="Diskusageandkeepingthingsclean">Disk usage and keeping things clean</h2>
413 <p>
326}}}
327 * build the filesystem image of your liking
328
329
330== Disk usage and keeping things clean ==
414331Yocto builds can chew up a lot of disk space (true really of any OS build system).
415 </p>
416 <p>
417 <tt>Bitbake</tt> will keep copies of all workdirs for old packages, so over time if you update recipes (or <tt>repo sync</tt> which may update recipes) your disk usage will grow. You can safely remove the old packages manually from <tt>build/tmp</tt> if you wish, or use <tt>bitbake -cclean <recipe.bb></tt> to clean specific recipes (note that <tt>bitbake -cclean <package></tt> will only clean the current preferred version, not old packages).
418 </p>
419 <p>
420 Another thing that can cause disk usage bloat is filesystem images. Each time you build a filesystem image (ie gateworks-image-*) <tt>bitbake</tt> will create a new one with a timestamp in <tt>build/tmp/deploy/images/</tt> and the build system will keep around several artifacts such as the filesystem tarball, the ubifs, and the ubi (thus a filesystem image resulting in a 100MB UBI actually chews up over 300MB of disk space each time you build it depending on compression). Its very likely that if you are re-building an image, you probably don't care about the old ones, so you might want to get in the habit of removing them before building. For example, if you want to build gateworks-image-multimedia:
421 </p>
422 <div class="code"><pre>rm -rf build/tmp/deploy/images/gateworks-image-multimedia* ;<span class="c"># remove old images we don't care about
423 </span>bitbake gateworks-image-multimedia ;<span class="c"># build a new one
424 </span></pre></div><p>
332
333Bitbake will keep copies of all workdirs for old packages, so over time if you update recipes (or {{{repo sync}}} which may update recipes) your disk usage will grow. You can safely remove the old packages manually from build/tmp if you wish, or use {{{bitbake -cclean <recipe.bb>}}} to clean specific recipes (note that {{{bitbake -cclean <package>}}} will only clean the current preferred version, not old packages).
334
335Another thing that can cause disk usage bloat is filesystem images. Each time you build a filesystem image (ie gateworks-image-*) {{{bitbake}}} will create a new one with a timestamp in {{{build/tmp/deploy/images/}}} and the build system will keep around several artifacts such as the filesystem tarball, the ubifs, and the ubi (thus a filesystem image resulting in a 100MB UBI actually chews up over 300MB of disk space each time you build it depending on compression). Its very likely that if you are re-building an image, you probably don't care about the old ones, so you might want to get in the habit of removing them before building. For example, if you want to build gateworks-image-multimedia:
336{{{#!bash
337rm -rf build/tmp/deploy/images/gateworks-image-multimedia* ;# remove old images we don't care about
338bitbake gateworks-image-multimedia ;# build a new one
339}}}
425340For Yocto, all temporary files will be in build/tmp so if you want to clear out everything and start over you can:
426 </p>
427 <div class="code"><pre>rm -rf build/tmp
428 </pre></div><h2 id="BuildingUpdatingAddingPackages">Building / Updating / Adding Packages</h2>
429 <p>
430 Please read more <a class="wiki" href="/wiki/Yocto/packages">Yocto/packages</a>
431 </p>
432 <p>
433 <span class="wikianchor" id="yocto_building_sdk"></span>
434 </p>
435 <h2 id="BuildingatoolchainandorSDK">Building a toolchain and/or SDK</h2>
436 <p>
437 See <a class="wiki" href="/wiki/Yocto/SDK">Yocto/SDK</a> for information about a pre-built downloadable SDK
438 </p>
439 <p>
440 You can use <tt>bitbake</tt> to create a toolchain (cross-compiler) or an Software Development Kit (SDK) comprised of a cross-toolchain and libs.
441 </p>
442 <p>
341{{{
342rm -rf build/tmp
343}}}
344
345== Building / Updating / Adding Packages ==
346For information concerning building, updating, and adding packages please see [wiki:Yocto/packages Yocto/packages].
347
348== Building a toolchain and/or SDK ==
349See [wiki:Yocto/SDK Yocto/SDK] for information about a pre-built downloadable SDK.
350
351You can use {{{bitbake}}} to create a toolchain (cross-compiler) or an Software Development Kit (SDK) comprised of a cross-toolchain and libs.
352
443353Toolchain:
444 </p>
445 <div class="code"><pre>bitbake meta-toolchain
446 </pre></div><p>
354{{{#!bash
355bitbake meta-toolchain
356}}}
357
447358SDK (contains meta-toolchain as well as -dev and -dbg packages with headers and libs):
448 </p>
449 <div class="code"><pre>bitbake -cpopulate_sdk gateworks-image-multimedia
450 </pre></div><ul><li>The produced SDK will be a self-extracting shell-script in tmp/deploy/sdk that contains all the include headers and libs for the packages in the image - you can build an SDK for any image by replacing 'gateworks-image-multimedia' with any other buildable filesystem image.
451 </li></ul><h2 id="Otherusefullinks">Other useful links</h2>
452 <ul><li>For those that may want to compile the Freescale Image:
453 <ul><li><a class="ext-link" href="https://community.freescale.com/docs/DOC-1616"><span class="icon"></span>https://community.freescale.com/docs/DOC-1616</a>
454 </li></ul></li></ul><p>
455 <span class="wikianchor" id="yocto_installing"></span>
456 </p>
457 <h1 id="InstallingFirmware">Installing Firmware</h1>
458 <p>
459 <span class="wikianchor" id="yocto_installing_flash"></span>
460 </p>
461 <h2 id="NANDFLASH">NAND FLASH</h2>
462 <p>
359{{{#!bash
360bitbake -cpopulate_sdk gateworks-image-multimedia
361}}}
362 * The produced SDK will be a self-extracting shell-script in tmp/deploy/sdk that contains all the include headers and libs for the packages in the image - you can build an SDK for any image by replacing 'gateworks-image-multimedia' with any other buildable filesystem image.
363
364== Other useful links ==
365For those that may want to compile the Freescale Image:
366 * https://community.freescale.com/docs/DOC-1616
367
368
369= Installing Firmware =
370
371== NAND FLASH ==
463372There are 2 options:
464 </p>
465 <ol><li>TFTP Server (recommended) - Read below
466 </li><li>JTAG Programmer (more steps and slower, requires no network)- Link <a class="wiki" href="/wiki/jtag_instructions#CreatingjtagableimagesforVentana">here</a>
467 </li></ol><p>
468 Boards with a NAND FLASH large enough to accommodate your image (Ventana boards have a 256MB NAND flash by default which is large enough for fsl-image-multimedia) can have the UBI filesystem created by the build process placed on them. A ubi image will be built in tmp/deploy/images directory alongside the kernel and filesystem tarballs. The ubi image will end with _normal.ubi which is suitable for standard NAND flash sizes on Ventana boards. If you have a Ventana with a 1GB or larger NAND device, you need to build for the 'large' NAND flash layout which you can do by changing the UBI_CONFIG variable in <tt>sources/meta-gateworks/conf/machine/ventana.conf</tt> from 'normal' to 'large' which will result in a ubi image ending with <tt>_large.ubi</tt>.
469 </p>
470 <p>
373 1. TFTP Server (recommended) - Read below
374 2. JTAG Programmer (more steps and slower, requires no network)- Link [wiki:jtag_instructions#CreatingjtagableimagesforVentana here]
375
376Boards with a NAND FLASH large enough to accommodate your image (Ventana boards have a 256MB NAND flash by default which is large enough for fsl-image-multimedia) can have the UBI filesystem created by the build process placed on them. A ubi image will be built in tmp/deploy/images directory alongside the kernel and filesystem tarballs. The ubi image will end with _normal.ubi which is suitable for standard NAND flash sizes on Ventana boards. If you have a Ventana with a 1GB or larger NAND device, you need to build for the 'large' NAND flash layout which you can do by changing the UBI_CONFIG variable in {{{sources/meta-gateworks/conf/machine/ventana.conf}}} from 'normal' to 'large' which will result in a ubi image ending with {{{_large.ubi}}}.
377
471378To install firmware to a Ventana board using Serial/ENET, do the following:
472 </p>
473 <p>
379
474380First, get yourself into a sane state:
475 </p>
476 <ul><li>Copy your UBI file to a proper location that your <a class="wiki" href="/wiki/tftpserver">tftpserver</a> has access to
477 </li><li>connect to the serial console of the target board (instructions may be found <a class="wiki" href="/wiki/jtag_instructions#SerialConsoleAccessonLinux">here</a> if you are unfamiliar with this)
478 </li></ul><ol><li>Connect your target board to your network, set ipaddress and serverip in uboot
479 <div class="code"><pre><span class="c"># Break out of the bootloader
480 </span>setenv ipaddr <localip>
481 setenv serverip <serverip>
482 </pre></div>For Example:
483 <div class="code"><pre>setenv ipaddr 192.168.1.211
381 * Copy your UBI file to a proper location that your tftpserver has access to
382 * connect to the serial console of the target board (instructions may be found here if you are unfamiliar with this)
383
3841. Connect your target board to your network, set ipaddress and serverip in uboot
385{{{#!bash
386# Break out of the bootloader
387setenv ipaddr <localip>
388setenv serverip <serverip>
389}}}
390For Example:
391{{{#!bash
392setenv ipaddr 192.168.1.211
484393setenv serverip 192.168.1.14
485 </pre></div></li></ol><ol start="2"><li>Modify the boot variables to point to the image file on the tftp server and update:
486 <div class="code"><pre><span class="c"># Note: Adjust file path/name to match file structure on your tftpserver
487 </span>setenv image_rootfs gateworks-image-gui-ventana.ubi
488 </pre></div></li></ol><ol start="3"><li>Run the nand update script to pull the image from the tftp server and load it:
489 <div class="code"><pre>run nand_update
490 </pre></div><ul><li>Troubleshooting
491 <ul><li>Be sure that the tftp server is working properly and started on the host PC
492 </li><li>An error such as 'ERROR: Need valid 'usbnet_devaddr' to be set at drivers/usb/gadget/ether.c:2362/usb_eth_init()' is simply because the ethernet transfer failed and it is attempting to use the USB network which needs to be configured.
493 </li></ul></li></ul></li></ol><ol start="4"><li> Once it is done loading, type the command boot
494 <div class="code"><pre>boot
495 </pre></div></li></ol><ol start="5"><li>The login is <tt>root</tt> with no default password.
496 </li></ol><p>
497 <span class="wikianchor" id="yocto_installing_blockdev"></span>
498 </p>
499 <h2 id="InstallingonRemovablestorage:mSATAUSBuSD">Installing on Removable storage: mSATA/USB/uSD</h2>
500 <p>
394}}}
395
3962. Modify the boot variables to point to the image file on the tftp server and update:
397{{{#!bash
398# Note: Adjust file path/name to match file structure on your tftpserver
399setenv image_rootfs gateworks-image-gui-ventana.ubi
400}}}
401
4023. Run the nand update script to pull the image from the tftp server and load it:
403{{{#!bash
404run nand_update
405}}}
406 * Be sure that the tftp server is working properly and started on the host PC
407 * An error such as 'ERROR: Need valid 'usbnet_devaddr' to be set at drivers/usb/gadget/ether.c:2362/usb_eth_init()' is simply because the ethernet transfer failed and it is attempting to use the USB network which needs to be configured.
408
4094. Once it is done loading, type the command boot
410{{{#!bash
411boot
412}}}
413
4145. The login is {{{root}}} with no default password.
415
416== Installing on Removable storage: mSATA/USB/uSD ==
501417For this, do not use the .ubi file. Use the tarball, for example: gateworks-image-gui-ventana.tar.bz2
502 </p>
503 <p>
418
504419To image the built firmware onto a removable flash device such as an mSATA disk, uSD card, or USB stick you can use the following script which creates a single ext4 partition for rootfs.
505 </p>
506 <div class="code"><pre><span class="nv">DISK</span><span class="o">=</span>/dev/sdc
507 <span class="c"># create a single Linux partition
508 </span><span class="nb">printf</span> <span class="s2">",,L,,\n"</span> | sudo sfdisk -uS <span class="k">${</span><span class="nv">DISK</span><span class="k">}</span>
509 <span class="c"># format it as ext4
510 </span>sudo mkfs.ext4 <span class="k">${</span><span class="nv">DISK</span><span class="k">}</span>1
511 <span class="c"># mount it
512 </span>sudo mount <span class="k">${</span><span class="nv">DISK</span><span class="k">}</span>1 /mnt/disk
513 <span class="c"># untar the filesystem image
514 </span>sudo tar -C /mnt/disk -xvf tmp/deploy/images/ventana/gateworks-image-gui-ventana.tar.bz2
420{{{#!bash
421DISK=/dev/sdc
422# create a single Linux partition
423printf ",,L,,\n" | sudo sfdisk -uS ${DISK}
424# format it as ext4
425sudo mkfs.ext4 ${DISK}1
426# mount it
427sudo mount ${DISK}1 /mnt/disk
428# untar the filesystem image
429sudo tar -C /mnt/disk -xvf tmp/deploy/images/ventana/gateworks-image-gui-ventana.tar.bz2
515430sudo umount /mnt/disk
516 </pre></div><ul><li>Notes:
517 <ul><li><strong>set DISK to the appropriate device on your Linux Host (it may very well differ from <tt>/dev/sdc</tt>). If you do not do this, you risk overwriting your OS partition</strong>. Once the flash device is plugged into the computer, you can find the device by typing <tt>mount</tt> and examining the output. For example if A flash stick with 1 partition shows as <tt>/dev/sdc1</tt> then the block device is <tt>/dev/sdc</tt> (the 1 is the first partition)
518 </li></ul></li></ul><p>
431}}}
432 * Notes:
433 - **set DISK to the appropriate device on your Linux Host (it may very well differ from {{{/dev/sdc}}}). If you do not do this, you risk overwriting your OS partition**. Once the flash device is plugged into the computer, you can find the device by typing mount and examining the output. For example if A flash stick with 1 partition shows as {{{/dev/sdc1}}} then the block device is {{{/dev/sdc}}} (the 1 is the first partition)
519434Using the latest bootloader and bootloader env scripts simply placing this removable media in a Ventana board will boot it.
520 </p>
521 <p>
522 See <a class="wiki" href="/wiki/Yocto/Building#Pre-CompiledBinary">above</a> for pre-built rootfs tarballs of our latest releases
523 </p>
524 }}}
435
436See [wiki:Yocto/Building#Pre-CompiledBinary above] for pre-built rootfs tarballs of our latest releases
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ece34605c058195ed03b4d393ef1a36c
|
-5,946,582,658,648,431,000 |
Qt 之图形(绘制漂亮的圆弧)
简述
综合前面对二维绘图的介绍,想必我们对一些基本绘图有了深入的了解,下面我们来实现一些漂亮的图形绘制。
| 版权声明:一去、二三里,未经博主允许不得转载。
圆形
经常地,我们会在网上看到一些列的抽奖活动,里面就有圆盘抽奖,是不是有点手痒了O(∩_∩)O~
效果
这里写图片描述
源码
void MainWindow::paintEvent(QPaintEvent *)
{
QPainter painter(this);
painter.setRenderHint(QPainter::Antialiasing, true);
int radius = 150;
int arcHeight = 30;
// >> 1(右移1位)相当于width() / 2
painter.translate(width() >> 1, height() >> 1);
/**
* 参数二:半径
* 参数三:开始的角度
* 参数四:指扫取的角度-顺时针(360度 / 8 = 45度)
* 参数五:圆环的高度
* 参数六:填充色
**/
gradientArc(&painter, radius, 0, 45, arcHeight, qRgb(200, 200, 0));
gradientArc(&painter, radius, 45, 45, arcHeight, qRgb(200, 0, 200));
gradientArc(&painter, radius, 90, 45, arcHeight, qRgb(0, 200, 200));
gradientArc(&painter, radius, 135, 45, arcHeight, qRgb(200, 0, 0));
gradientArc(&painter, radius, 225, 45, arcHeight, qRgb(0, 200, 0));
gradientArc(&painter, radius, 180, 45, arcHeight, qRgb(0, 0, 200));
gradientArc(&painter, radius, 270, 45, arcHeight, qRgb(0, 0, 0));
gradientArc(&painter, radius, 315, 45, arcHeight, qRgb(150, 150, 150));
}
void MainWindow::gradientArc(QPainter *painter, int radius, int startAngle, int angleLength, int arcHeight, QRgb color)
{
// 渐变色
QRadialGradient gradient(0, 0, radius);
gradient.setColorAt(0, Qt::white);
gradient.setColorAt(1.0, color);
painter->setBrush(gradient);
// << 1(左移1位)相当于radius*2 即:150*2=300
//QRectF(-150, -150, 300, 300)
QRectF rect(-radius, -radius, radius << 1, radius << 1);
QPainterPath path;
path.arcTo(rect, startAngle, angleLength);
painter->setPen(Qt::NoPen);
painter->drawPath(path);
}
弧形
我们可以在之前的基础上加一些处理,从而实现一个圆弧。
效果
这里写图片描述
源码
void MainWindow::gradientArc(QPainter *painter, int radius, int startAngle, int angleLength, int arcHeight, QRgb color)
{
// 渐变色
QRadialGradient gradient(0, 0, radius);
gradient.setColorAt(0, Qt::white);
gradient.setColorAt(1.0, color);
painter->setBrush(gradient);
// << 1(左移1位)相当于radius*2 即:150*2=300
//QRectF(-150, -150, 300, 300)
QRectF rect(-radius, -radius, radius << 1, radius << 1);
QPainterPath path;
path.arcTo(rect, startAngle, angleLength);
// QRectF(-120, -120, 240, 240)
QPainterPath subPath;
subPath.addEllipse(rect.adjusted(arcHeight, arcHeight, -arcHeight, -arcHeight));
// path为扇形 subPath为椭圆
path -= subPath;
painter->setPen(Qt::NoPen);
painter->drawPath(path);
}
这些只不过是我们实现的一个小效果,如果说你有什么特殊的需要,可以在此基础上进行扩展,比如:添加文本、动画旋转等。
文本
可以通过QPainterPath的addText()来添加文本。
效果
这里写图片描述
源码
void MainWindow::gradientArc(QPainter *painter, int radius, int startAngle, int angleLength, int arcHeight, QRgb color)
{
// 渐变色
QRadialGradient gradient(0, 0, radius);
gradient.setColorAt(0, Qt::white);
gradient.setColorAt(1.0, color);
painter->setBrush(gradient);
// << 1(左移1位)相当于radius*2 即:150*2=300
//QRectF(-150, -150, 300, 300)
QRectF rect(-radius, -radius, radius << 1, radius << 1);
QPainterPath path;
path.arcTo(rect, startAngle, angleLength);
// QRectF(-120, -120, 240, 240)
QPainterPath subPath;
subPath.addEllipse(rect.adjusted(arcHeight, arcHeight, -arcHeight, -arcHeight));
// path为扇形 subPath为椭圆
path -= subPath;
QFont font;
font.setFamily("Microsoft YaHei");
font.setPointSize(14);
painter->setPen(Qt::NoPen);
path.addText(path.pointAtPercent(0.5), font, QStringLiteral("一去丶二三里"));
painter->drawPath(path);
}
旋转
我们对前面的圆盘进行强化,添加一个旋转效果。当然,常见的抽奖圆盘旋转的是指针,而我们下面实现的是对圆盘的旋转,如果你要实现一个抽奖转盘,那么可以再扩展。
效果
这里写图片描述
源码
// 利用定时器,定时变换角度,进行旋转。
QTimer *pTimer = new QTimer(this);
pTimer->setInterval(100);
connect(pTimer, SIGNAL(timeout()), this, SLOT(updatePaint()));
pTimer->start();
// 改变角度,进行旋转
void MainWindow::updatePaint()
{
m_nRotationAngle++;
if (m_nRotationAngle > 360)
m_nRotationAngle = 0;
update();
}
然后,只需要在绘图事件中添加简单的一行代码即可:
void MainWindow::paintEvent(QPaintEvent *)
{
...
// 旋转
painter.rotate(m_nRotationAngle);
...
}
好了,基本的介绍就到这里,是不是很有意思呢,O(∩_∩)O哈哈~
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ece34605c058195ed03b4d393ef1a36c
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6,990,928,358,787,269,000 |
Windows error 0x000001F4, 500
Detailed Error Information
USER_PROFILE_LOAD[1]
MessageUser profile cannot be loaded.
Declared inwinerror.h
This appears to be a raw Win32 error. More information may be available in error 0x800701F4.
HRESULT analysis[2]
This is probably not the correct interpretation of this error. The Win32 error above is more likely to indicate the actual problem.
FlagsSeveritySuccess
This code indicates success, rather than an error. This may not be the correct interpretation of this code, or possibly the program is handling errors incorrectly.
Reserved (R)false
OriginMicrosoft
NTSTATUSfalse
Reserved (X)false
FacilityCode0 (0x000)
NameFACILITY_NULL[2][1]
DescriptionThe default facility code.[2][1]
Error Code500 (0x01f4)
Questions
2votes
1answer
Switch case's jump table position within code on ARM
In C/C++ a switch statement can be lowered by the compiler to a jump table. I noticed a difference of placement of the jump table between ARM and x86. X86 For x86 (And x86_64) the jump table is often placed outside of the function (e.g. .rodata) 4005e0: 48 8b 45 [...] read more
c
arm
reverse-engineering
compiler-optimization
jump-table
0votes
2answers
What is the space between [ELF Header] and [data segment]?
I compiled very very simple assembly code with nasm and ld under Linux (CentOS6 32bit). nasm -f elf -o basic1.o basic1.asm ld -o basic1 basic1.o cat basic1.asm ;--------------------------------------- section .data msg db 'hello world', 10, 00 section .bss tests resd 100 segment .text global _start _start: And, I execute the [...] read more
assembly
nasm
elf
0votes
0answers
PEVerify Defect: It reports "Type load failed" on valid class compiled with csc.exe for compact framework
A trivial class: public class TestClass : System.ServiceModel.Security.SecurityCredentialsManager { } When compiled using csc against the MS CompactFramework v3.5 will result in a dll that fails to pass peverify, resulting in a "Type load failure". It appears to be an issue with inheriting from the SecurityCredentialsManager class which is part [...] read more
c#
compact-framework
cil
csc
peverify
0votes
1answer
ListView in Fragment with adapter - can't add new objects - FATAL EXCEPTION
I'm creating an app with a tab layout consisting of three fragments. In one of these 3 Fragments I would like to have a ListView. And I would like to add ToSave objects to the ListView. I tried to add objects to the ListView from another Fragment using interface and [...] read more
android
listview
android-activity
android-fragments
android-listview
0votes
2answers
WinDbg with dump files when you have a classic ASP app which uses a lot of .Net via interop
Ok, first please don't ask why this application is the way it is. This is a classic ASP application which in several areas uses .Net and COM and some of that .Net also reaches into COM! It's all to do with code reuse really, at some point .Net was introduced [...] read more
.net
memory-leaks
asp-classic
windbg
0votes
1answer
How to send parameter to my device using libcam.dll in delphi
I have a code in Delphi I using the it to get picture from my 2D Reader, I am using 'camlib.dll' to set parameter of the Image in the device the code: unit Test_Cam; interface uses Windows, Messages, SysUtils, Variants, Classes, Graphics, Controls, Forms, Dialogs, StdCtrls; type TByteArr = array [...] read more
delphi
winapi
delphi-2006
0votes
1answer
c++ unhandled exception LoadImage() with MAKEINTRESOURCE
I'm having a problem to add a bitmap image to a static control box, i got an unhandled exception when i run my program. Here's my code. FROM RC FILE : ID_ICON1 BITMAP "icon1.bmp" CPP FILE : HANDLE bIcon1; HWND hIcon; hIcon = CreateWindowEx(0, "Static", NULL, WS_CHILD | WS_VISIBLE|SS_BITMAP, 250, [...] read more
c++
resources
loadimage
-1votes
3answers
Error on large dimension value - Run-Time Check Failure #2 - Stack around the variable 'mat' was corrupted
I am getting following error: "Run-Time Check Failure #2 - Stack around the variable 'mat' was corrupted" after giving result in console. However, What I observed that, CreateMatrix function throws Access violation.. for larger matrix dimensions. For e.g. worked for 5x7 and did NOT work for 50 x 70. How [...] read more
c
pointers
memory
memory-management
access-violation
Comments
Leave a comment
(plain text only)
Sources
1. winerror.h from Windows SDK 10.0.14393.0
2. https://msdn.microsoft.com/en-us/library/cc231198.aspx
User contributions licensed under CC BY-SA 3.0
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WebAIM - Web Accessibility In Mind
Screen Reader User Survey #2 Results
Introduction
In October 2009, WebAIM conducted a survey of preferences of screen reader users. We received 665 valid responses to the screen reader user survey. This was a follow-up survey to a previous survey. Follow-up surveys were conducted in December 2010, May 2012, January 2014, July 2015, and October 2017.
A few disclaimers and notices:
• Totals may not equal 100% due to rounding.
• Total responses (n) for each question may not equal 665 due to respondents not answering that particular question.
• The sample was not controlled and may not represent all screen reader users.
• Care should be taken in interpreting these results. Responses are based upon user experiences with web content that is generally inaccessible. We cannot help but wonder if responses may have been different if screen reader interactions with web content were typically very positive.
• Data was analyzed using JMP Statistical Discovery Software version 8
• We hope to conduct a survey of this nature again in the future. If you have recommendations or questions you would like asked, please let us know. Additional analysis of this data and details on the responses to open-ended questions will be available in the future.
Demographics
Disability Reported
Pie chart showing reported disability
Do you use a screen reader due to a disability?
Response# of Respondents% of Respondents
Yes58690%
No6510%
Screen Reader Proficiency
Pie Chart of Screen Reader Proficiency
Please rate your screen reader proficiency
Response# of Respondents% of Respondents
Advanced33952.6%
Intermediate27642.8%
Beginner304.7%
Those who use screen readers due to a disability report themselves as being much more proficient with screen readers. Those with disabilities were nearly 6 times more likely to report themselves as having advanced screen reader proficiency. While it is not surprising that those with disabilities are more proficient with a screen reader, it was surprising that very few (1.6%) of them consider themselves beginners, as opposed to 32.8% of those without a disability. This may indicate that most screen reader users are confident with their technology, or perhaps more likely, that this online survey was primarily accessed by those with higher screen reader proficiency.
Internet Proficiency
Pie Chart of Internet Proficiency
Please rate your proficiency using the Internet
Response# of Respondents% of Respondents
Advanced42164.9%
Intermediate21833.6%
Beginner101.5%
Those who use screen readers due to a disability reported slightly lower Internet proficiency than those without disabilities.
Primary Screen Reader
Primary Screen Reader
Which of the following is your primary screen reader?
Screen Reader# of Respondents% of Respondents
JAWS43566.4%
Window Eyes6810.4%
VoiceOver588.9%
System Access or System Access To Go324.9%
NVDA192.9%
ZoomText172.6%
Hal40.6%
Supernova10.2%
Other213.2%
There was no marked difference in primary screen reader use between respondents with and without disabilities; however, those without disabilities were more likely to use NVDA (10.2% of respondents) than those with disabilities (2.2%).
Screen Readers Commonly Used
Screen Readers Commonly Used
Which of the following screen readers do you commonly use? (select all that apply)
Screen Reader# of Respondents% of Respondents
JAWS50075.2%
Window Eyes15623.5%
VoiceOver9714.6%
System Access or System Access To Go14822.3%
NVDA17025.6%
ZoomText507.5%
Supernova182.7%
Hal182.7%
Other517.7%
49% of respondents commonly use more than one screen reader. 23% use more than two and 8% use more than three screen readers. System Access or SAToGo and NVDA are relatively commonly used (23% and 26%, respectively), yet are less common as a primary screen readers (5% and 3%).
When compared to the results from our previous survey, JAWS and Window Eyes use is almost identical, yet NVDA, Voice Over, and System Access usage increased tremendously.
Screen Reader Updates
Screen Reader Updates
Has your primary screen reader been updated in the last year?
Response# of Respondents% of Respondents
Yes53783.6%
No10516.4%
The vast majority of respondents updated their primary screen reader within the previous year. This is slightly higher than the 75% who reported updating within a year in our previous survey. It's important to note, however, that a significant number of users may still be using screen readers that are several years old.
Reasons for Use
Reasons for Use
What is the main reason for using your primary screen reader?
Response# of Respondents% of Respondents
Existing Comfort/Expertise27042.9%
Features20732.9%
Availability7111.3%
Support457.1%
Cost375.9%
Those with disabilities indicated "Existing Comfort/Expertise" nearly three times as often as those without disabilities. Those without disabilities favored availability (36% of respondents) over all other factors.
Screen Reader Learning
Chart showing how screen readers were learned
How did you learn to use your primary screen reader? (select all that apply)
Response# of Respondents% of Respondents
Self-taught48572.9%
Informally, by asking friends, etc.21932.9%
Took a training course16124.2%
Other7010.5%
When comparing many of the other responses, there is very little difference in responses between those that were self-taught and those who took a training course.
How Obtained
Chart showing how screen readers were obtained
How did you obtain your primary screen reader?
Response# of Respondents% of Respondents
I bought it myself22334.7%
It was received through a government program14722.9%
It was provided to me by my employer11117.3%
Other629.7%
I downloaded it free of charge from the Internet325.0%
It was provided to me by my school264.0%
I'm using a pirated version of a commercial screen reader253.9%
I'm using a trial version of a commercial screen reader162.5%
36.6% of those with disabilities purchased their own screen reader as compared to only 9.7% of those without disabilities. While those without disabilities were most likely to get their screen reader from their employers (43.5%), they very rarely received them from government or school programs. 30.9% of beginning screen reader users obtained free, pirated, or freely downloadable screen readers compared to only 8.4% of advanced users.
Browsers
Chart showing browser usage
When using your primary screen reader, which browser do you use most often?
Browser# of Respondents% of Respondents
IE820732.0%
IE717026.2%
Firefox 3+12218.8%
IE68212.7%
Safari548.3%
Opera20.3%
Other111.7%
Note: The survey question asked which browser was most often used with the primary screen reader, but did not ask for any browsers used. Compare these answers with results from our previous survey results, which report all web browsers used.
In line with the previous survey, those without disabilities were much more likely to use Firefox than those with disabilities (32% to 17%). The number of Safari and Opera users, as expected, are very similar to the VoiceOver users documented above (note that VoiceOver support for Opera is very new).
Free/Low-cost Screen Readers
Pie chart showing viability of free/low cost screen readers
Do you see free or low-cost screen readers (such as NVDA or VoiceOver) as currently being viable alternatives to commercial screen readers?
Response# of Respondents% of Respondents
Yes31847.8%
No13119.7%
I Don't Know21632.5%
Interestingly, only 242 (36.4%) of respondents reported using NVDA or VoiceOver, yet 47.9% of respondents indicate that such screen readers are viable alternatives to commercial screen readers. Advanced screen reader users were more likely to indicate that these are viable alternatives.
Mobile Screen Reader Usage
Chart showing mobile screen reader usage
Do you use a screen reader on a mobile phone or mobile handheld device?
Response# of Respondents% of Respondents
Yes31350%
No31950%
To us, the fact that 53% of those with disabilities use a screen reader on a mobile device was one of the most surprising results of this survey. Only 8% of those without disabilities use a mobile screen reader. This underscores the importance of an increased focus on accessibility of mobile content and devices, and that evaluators and other accessibility specialists need to increase their usage and knowledge of mobile accessibility.
Not surprisingly, more proficient screen reader users were more likely to use a mobile screen reader (66% of advanced users to only 3% of beginners).
Javascript Disabled
Pie chart showing javascript disabled
Do you have javascript disabled in your web browser?
Response# of Respondents% of Respondents
Yes6210.4%
No44874.9%
I Don't Know8814.7%
This response may help strengthen the notion that scripted content must be made accessible. Many developers incorrectly believe that inaccessible scripting is permissible so long as it degrades gracefully or a non-scripted alternative is provided. The vast majority of screen reader respondents encounter scripted content.
Braille Output
Chart showing prevalence of braille output
Do you use braille output with your screen reader?
Response# of Respondents% of Respondents
Yes18529.4%
No44570.6%
This does not necessarily suggest that 29.4% of respondents rely on Braille output, but only that they have access to it.
Images and Alternative Text
"Smiling Lady" Images
Chart showing preferred description for smiling lady images
Images are commonly used in web pages to visually convey a feeling or mood. For example, a photo of a smiling woman might be included to convey that the company is personable and friendly. How would you prefer this image be handled?
Response# of Respondents% of Respondents
Described as "Photo of smiling lady"35657.1%
Described as "Smiling lady"12620.2%
Ignored entirely by my screen reader8012.8%
Described as "Our company is personable and friendly"629.9%
These responses should NOT be interpreted to suggest that all decorative images should be given alternative text or that the alt text for all photographs should begin with "Photo of...". Screen reader users prefer to have this "Smiling lady"-type image identified, even if the full content or meaning of the image cannot be conveyed. However, those without disabilities were three times more likely to prefer the image be ignored, suggesting that they view it as being decorative. This apparent disconnect between responses of those with disabilities and those without disabilities was found in a similar question on the previous survey. We cannot help but think that blind screen reader users might find their experiences less enjoyable if all such images, which are typically unidentified now, were suddenly identified to them. This underscores WebAIM's long held notion that providing proper, equivalent alternative text is the most difficult aspect of web accessibility. We will likely follow up on this issue in a future survey.
Complex Images
Some images, such as charts, diagrams, or comic strips, are too complex to describe in only a few words. If a long, detailed description of these images is available, how would you prefer to have it presented to you?
Response# of Respondents% of Respondents
As text on the web page, immediately following the image17828.4%
As optional text, available on the same page but only if I request it by following a link16726.6%
On a separate page, available by following a link12419.8%
As a very long description (alt text) on the image itself8914.2%
On a separate page, announced by and available to my screen reader579.1%
Ignored entirely by my screen reader121.9%
There is no clear consensus in these responses. However, the in-page options outweigh the options that place the longer description on another page. Interestingly, the option of placing the alternative on a separate page but having it announced by the screen reader, the current behavior of images with the longdesc attribute, was a very unpopular option, second only to being ignored entirely.
ARIA Landmarks
Chart showing usage of ARIA landmarks
ARIA (Accessible Rich Internet Applications) introduces something called landmarks. These provide quick access to page areas, such as navigation, search, and main content. Which of the following best describes your use of landmarks?
Response# of Respondents% of Respondents
I didn't know this functionality existed24042.1%
I sometimes use landmarks for navigation18332.1%
I use landmarks for navigation whenever they are present11720.5%
My screen reader does not support landmarks305.3%
With 42.1% of question respondents unaware of landmark functionality (95 respondents didn't even answer this question), this clearly suggests that additional training or dissemination about the utility of landmarks needs to occur.
Problematic Items
Most Problematic Items
The survey asked respondents to select their most, second most, and third most problematic items from a list. In giving each selected item a weighting, the following chart shows the amount of difficulty and frustration users encounter with each item.
Chart showing Most Problematic Items
Problematic items identified are, in order (most difficult/confusing first):
1. CAPTCHA - images presenting text used to verify that you are a human user
2. The presence of inaccessible Flash content
3. Links or buttons that do not make sense
4. Images with missing or improper descriptions (alt text)
5. Complex or difficult forms
6. Lack of keyboard accessibility
7. Screens or parts of screens that change unexpectedly
8. Missing or improper headings
9. Too many links or navigation items
10. Complex data tables
11. Lack of "skip to main content" or "skip navigation" links
12. Inaccessible or missing search functionality
The chart above shows a weighting of responses to three questions. When analyzing the single "Most Problematic Item" question, 28% of respondents listed CAPTCHA as the most problematic or confusing item encountered, with Flash (22%), Keyboard Accessibility (10%), and Ambiguous Links (10%) as other most problematic items.
It must be noted that Flash content, like most other items listed here, can be made accessible (at least for users on the Windows platform). In fact, Flash content can have other general accessibility issues listed (e.g., ambiguous links, difficult forms, missing alt text, etc.). While treated here as a distinct item, it's important to note that Flash is not inaccessible merely because it is present in a page, but because the Flash author has not implemented accessibility.
Least Problematic Items
Chart showing least problematic items
Of the items listed, which item causes the least amount of frustration or difficulty for you?
Response# of Respondents% of Respondents
Lack of "skip to main content" or "skip navigation" links18531.3%
Images with missing or improper descriptions (alt text)9415.9%
Too many links or navigation items579.6%
Complex or difficult forms427.1%
Missing or improper headings396.6%
Links or buttons that do not make sense396.6%
Lack of keyboard accessibility294.9%
Inaccessible or missing search functionality284.7%
Complex data tables264.4%
Screens or parts of screens that change unexpectedly193.2%
CAPTCHA - images presenting text used to verify that you are a human user193.2%
The presence of inaccessible Flash content152.5%
This shouldn't be interpreted to suggest that "skip" links or alternative text (note that alternative text is the 4th most problematic feature above) can or should be omitted. This data likely indicates that screen reader users tend to find issues with these items less problematic than other things, or more likely, that they encounter these problems so frequently they have developed alternative mechanisms to bypass or remedy these difficulties.
The fact that missing skip links are identified as the least problematic accessibility issue in this list reaffirms our own feeling that skip links are much more valuable for sighted users that rely on a keyboard for navigation than for screen reader users who tend to navigate by headings (see below).
Web Accessibility Progress
Chart showing web accessibility progress
In general, which of the following best describes your feelings regarding the accessibility of web content over the previous year?
Response# of Respondents% of Respondents
Web content has become more accessible28646.3%
Web content accessibility has not changed20633.3%
Web content has become less accessible12620.4%
Respondents generally think web accessibility has improved in the last year. Respondents with disabilities were less positive about progress than those without disabilities - they were 4 times more likely to indicate that web content accessibility has decreased in the previous year.
Impact on Accessibility
Chart showing impacts on accessibility
Which of the following do you think has a bigger impact on improvements to web accessibility?
Response# of Respondents% of Respondents
Better (more accessible) web sites43168.6%
Better assistive technology19731.4%
Reasons for Inaccessibility
Chart showing reasons for inaccessibility
Which of the following do you think is the primary reason that many developers do not create accessible web sites?
Response# of Respondents% of Respondents
Lack of awareness of web accessibility24238.0%
Lack of web accessibility skills or knowledge17627.6%
Fear that accessibility will hinder the look, feel, or functionality16425.7%
Lack of budget or resources to make it accessible558.6%
Respondents with disabilities were most likely to select "Lack of Awareness" as the primary reason developers do not create accessible web sites. However, respondents without disabilities favored "Lack of Knowledge" nearly twice as often as those with disabilities.
Social Media
Social Media Tools Frequently Used
Chart showing social media sites used
Which of the following social media sites or tools do you frequently use?
Social Media Tool# of Respondents% of Respondents
Blogs31747.7%
Facebook27942.0%
LinkedIn8913.4%
MySpace609.0%
Twitter25438.2%
YouTube34151.3%
Interestingly, YouTube (perhaps the most visual of the tools listed) has the highest usage. People without disabilities were more likely to use all of the social media tools, with the exception of MySpace, which had a higher prevalence among those with disabilities (though the lowest usage overall).
Blog Accessibility
Chart showing blog accessibility
How accessible are blogs to you?
Response# of Respondents% of Respondents
Very Accessible20944.8%
Somewhat Accessible22648.4%
Somewhat Inaccessible286.0%
Very Inaccessible40.9%
Of those who use blogs or are familiar with blog accessibility, nearly all (93.2%) report that they are very or somewhat accessible.
Facebook Accessibility
Chart showing Facebook accessibility
How accessible is FaceBook to you?
Response# of Respondents% of Respondents
Very Accessible3610.0%
Somewhat Accessible17548.7%
Somewhat Inaccessible10027.9%
Very Inaccessible4813.4%
LinkedIn Accessibility
Chart showing LinkedIn accessibility
How accessible is LinkedIn to you?
Response# of Respondents% of Respondents
Very Accessible169.8%
Somewhat Accessible4728.7%
Somewhat Inaccessible5030.5%
Very Inaccessible5131.1%
MySpace Accessibility
Chart showing MySpace accessibility
How accessible is MySpace to you?
Response# of Respondents% of Respondents
Very Accessible4239.3%
Somewhat Accessible4945.8%
Somewhat Inaccessible1110.3%
Very Inaccessible54.7%
Twitter Accessibility
Chart showing Twitter accessibility
How accessible is Twitter to you?
Response# of Respondents% of Respondents
Very Accessible17261.9%
Somewhat Accessible8129.1%
Somewhat Inaccessible145.0%
Very Inaccessible114.0%
We're confident that the high accessibility of Twitter is a result of accessible Twitter clients, particularly AccessibleTwitter.com.
YouTube Accessibility
Chart showing YouTube accessibility
How accessible is YouTube to you?
Response# of Respondents% of Respondents
Very Accessible11126.1%
Somewhat Accessible22352.5%
Somewhat Inaccessible6114.4%
Very Inaccessible307.1%
Social Media Accessibility
Chart showing social media accessibility
In general, how accessible are social media web sites to you?
Response# of Respondents% of Respondents
Very Accessible458.3%
Somewhat Accessible28552.7%
Somewhat Inaccessible10719.8%
Very Inaccessible254.6%
I Don't Know7914.6%
While social media tools and sites are generally considered to have good accessibility, the details above highlight that accessibility varies greatly across such tools.
Flash Accessibility
Chart showing reported Flash accessibility
When you encounter Flash content on web sites, how likely is it to be accessible to you?
Response# of Respondents% of Respondents
Very Likely294.8%
Somewhat Likely16927.8%
Somewhat Unlikely16527.1%
Very Unlikely21635.5%
I Don't Know304.9%
It should be noted that while respondents indicate generally poor likelihood for Flash accessibility (62.6% say it is somewhat or very unlikely), there is no general baseline for comparison. In other words, there's no way of knowing how much more likely it is for Flash content to be inaccessible than non-Flash web content. Still, these results are very similar to our previous survey results which showed 71.5% of screen reader users reporting that Flash is difficult. As noted above, unlike graphical CAPTCHAs, Flash can be made fully accessible on certain platforms, but it remains an issue primarily because authors do not implement Flash accessibility.
Finding Information
Pie chart showing methods for finding information on a page
When trying to find information on a lengthy web page, which of the following are you most likely to do first?
Response# of Respondents% of Respondents
Navigate through the headings on the page32150.8%
Use the "Find" feature14522.9%
Navigate through the links of the page10216.1%
Read through the page6410.1%
These responses underscore our previous findings which indicate that a good heading structure is a very important aspect of web accessibility and usability.
Conclusion
The conclusion identified in the previous screen reader user survey, that there is no typical screen reader user, is solidified in the results of this survey. Perhaps most significant to us are the shifts we have seen in the mere 10 months between surveys - particularly in browser and screen reader usage, with a trend toward and increased favorability of free and low-cost screen readers. Some results solidified previous findings - that good heading structure is vital to accessibility, that Flash content continues to pose significant accessibility issues for screen reader users, and that images that convey content should be identified for users. It is also clear that the mobile web is a highly utilized resource by screen reader users, yet it is an area largely unnoticed by accessibility experts practitioners.
We hope that these results will provide insight to developers and cause us to rethink and better analyze development choices that we make for screen reader users. More analysis of the results will be provided in the near future.
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ece34605c058195ed03b4d393ef1a36c
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8,941,263,013,740,257,000 |
Using Arm64EC to build apps for Windows 11 on Arm devices
Arm64EC (“Emulation Compatible”) is a new application binary interface (ABI) for building apps for Windows 11 on Arm. With Arm64EC, you can build new Arm64 native apps or incrementally transition existing apps to take advantage of the native speed and performance possible with Arm64-powered devices, including better power consumption, battery life, and accelerated AI & ML workloads.
ARM64EC uses the latest Windows SDK and remote-targeting with Visual Studio and the ARM64EC built tools. Even if your app relies on existing dependencies or plugins that don't yet support Arm, ARM64EC is interoperable with x64 and allows you to mix and match Arm64EC and x64 as needed - with Arm64EC code running natively, while x64 code runs using emulation that comes built-in with Windows 11.
You can read more about Arm64EC on the Windows Developer blog.
Get started building Win32 apps as Arm64EC
To start building Win32 apps as Arm64EC, you'll need to install these prerequisites:
Once the Windows Insider SDK and Visual Studio Preview have been installed, follow these steps to add the Arm64EC platform.
1. In the Visual Studio Installer, add the Arm64EC tools by searching under Individual components and selecting the MSVC v142 - VS 2019 C++ Arm64EC build tools checkbox, currently marked as experimental.
Visual Studio Installer Arm64EC checkbox screenshot
2. With the tools and SDK installed, create a new C++ project or open an existing one.
Note
If your project is using an older SDK or older version of MSVC, you'll need to retarget the solution to use the latest version of each.
3. To add the Arm64EC platform:
• In the Build menu, select Configuration Manager.
• In the Active solution platform box, select <New…> to create a new platform.
• Select Arm64EC, Copy settings from x64, and check the Create new project platforms checkbox.
Visual Studio Installer New Arm64EC Platform screenshot
You can choose to leave parts of the solution as x64 as needed. However, the more code built as Arm64EC, the more code that will run with native performance on Windows 11 on Arm. For any external dependencies, ensure that your project links against the x64 or Arm64EC versions of those projects.
4. With the new solution platform in place, select Build in Visual Studio to start building Arm64EC binaries.
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ref: e8c09b3ff1c1489c21d96a0f7f8f0e8728fc095a xmpp/form/options.go -rw-r--r-- 2.2 KiB
e8c09b3fSam Whited design: fix typo in design doc template 1 year, 4 months ago
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// Copyright 2017 The Mellium Contributors.
// Use of this source code is governed by the BSD 2-clause
// license that can be found in the LICENSE file.
package form
// An Field is used to define the behavior and appearance of a data form.
type Field func(*Data)
// Title sets a form's title.
func Title(s string) Field {
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data.title = s
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func Instructions(s string) Field {
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var (
// Result marks a form as the result type.
// For more information see TypeResult.
Result Field = result
)
var (
result Field = func(data *Data) {
data.typ = TypeResult
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)
// A Option is used to define the behavior and appearance of a form field.
type Option func(*field)
var (
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Required Option = required
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var (
required Option = func(f *field) {
f.required = true
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)
// Desc provides a natural-language description of the field, intended for
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// However, it does nothing to prevent them from being added.
func Desc(s string) Option {
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}
}
// Value defines the default value for the field.
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func Value(s string) Option {
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}
// Label defines a human-readable name for the field.
func Label(s string) Option {
return func(f *field) {
f.label = s
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}
// ListItem adds a list item with the provided label and value.
// It has no effect on any non-list field type.
func ListItem(label, value string) Option {
return func(f *field) {
f.option = append(f.option, fieldOpt{
Label: label,
Value: value,
})
}
}
func getFieldOpts(f *field, o ...Option) {
for _, opt := range o {
opt(f)
}
return
}
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Thursday, April 5, 2012
Talking to your computer
I spent the last few days helping one of my friends set up voice recognition software. Theoretically, this is the "holy grail" of computing if you believe in Star Trek. We would all like to speak to our computer and have it do all the keyboarding for us automatically but since its introduction at the Seattle Worlds Fair in 1962, voice recognition has never quite lived up to its promise.
Just to give you an idea of what voice recognition can or cannot do, I an going to dictate the rest of this Blog post. So that you will get an idea of how it works (or doesn't) I will NOT MAKE ANY CHANGES or edits to the text of the post:
The dictation starts right here. I am using DragonDictate on a Macintosh computer. I have a Plantronics digital headset with a USB connection to that computer. Over the years, I have used Dragon naturally speaking and Dragon dictate and various other programs because I am always looking for a way to input text or rapidly than typing from the keyboard. Unfortunately, whenever I have tried using the programs, I always find that certain words are not recognize properly. I realize that this occurs primarily because as I continue to speak, I have a tendency to slur my words together.
As I dictate this portion of the post, I am refraining from making any error corrections purposely to show what you have to do to go back through the text and correct the mistakes. The main thing that I have found, however, is that I am used to rewriting as I go along. This is quite hard to do using a voice-recognition program.
Another challenge, comes from using voice recognition in a database program. Unless the database program adapts well to the limitations of voice recognition it is no easier to use voice recognition than it is to use the keyboard. This is especially true, if you have to continue to use the mouse every time you move to a new window or location for entering data into the program. I have noticed, that the voice recognition programs do a credibly good job in recognizing names. You can probably guess, that the VR programs do not do a very good job with name variations. Such as spelling Stevens within the or APH.
As I continue to dictate if you read carefully, you will see that some of the sentences are garbled. Technically, you're supposed to go back and make the corrections using voice recognition which teaches the program how to understand your oral dictation. It is just the nature of the products, even when they have a provision for learning your speech patterns, to miss some types of words. In addition, I find it quite difficult to (I might note, that the program crashed at this point in the dictation). In addition, I find it quite difficult to proofread the text, especially when there is a missing word. It is also difficult to detect the wrong word inserted in the text.
All in all, using voice recognition, like speeding along on the freeway, does not always get you to your destination. Because you travel so fast on a freeway you have a tendency to drive out of your way to travel along the freeway, when it would've taken less time on the regular city streets. Because of the novelty, the ease-of-use, and the apparent ability that voice recognition has recognized most of your text, you have an illusion of productivity but I truly question whether you lose any advantage in the need to do careful proofreading.
Not that my usual level of writing is so exemplary, but likely you can detect some difference in the way that the dictated text reads from my normal way of writing. As I have said many times before, voice recognition offers great benefits to anyone who has difficulty using a mouse or keyboard. I suggest trying for strict edition for some time on documents that you are not inordinately worried about to learn to accommodate the shortcomings of the programs.
I guess that's all I have to say today.
2 comments:
1. Information
Informatics Advanced World collects and shares highly scalable Informatics Data and organizes it for good interpretation, simple and understandable presentation so that any one can easily analyze and spread such Information.
ReplyDelete
2. At first I was going to argue that the holy grail of Star Trek technology was the transporter, but since you limited it to computing, I will agree, speech recognition is for sure the holy grail in this regard, and how amazing. I read a blog where a father was using it to help his son with autism, apparently many parents are having similar success in this regard. However for sure I think the main applications will be with bloggers and even more so with people who have mobility issues, arthritis and so forth, what a great advancement for them. Hmm.... I wonder how it works if you have a cold? Great blog very well enjoyed.
ReplyDelete
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ece34605c058195ed03b4d393ef1a36c
|
-4,038,335,484,340,669,000 |
Version: 2.0.40 2.2.26 2.4.37 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0 4.1 4.2 4.3
Linux/drivers/net/ethernet/adi/bfin_mac.c
1 /*
2 * Blackfin On-Chip MAC Driver
3 *
4 * Copyright 2004-2010 Analog Devices Inc.
5 *
6 * Enter bugs at http://blackfin.uclinux.org/
7 *
8 * Licensed under the GPL-2 or later.
9 */
10
11 #define DRV_VERSION "1.1"
12 #define DRV_DESC "Blackfin on-chip Ethernet MAC driver"
13
14 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15
16 #include <linux/init.h>
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/sched.h>
20 #include <linux/slab.h>
21 #include <linux/delay.h>
22 #include <linux/timer.h>
23 #include <linux/errno.h>
24 #include <linux/irq.h>
25 #include <linux/io.h>
26 #include <linux/ioport.h>
27 #include <linux/crc32.h>
28 #include <linux/device.h>
29 #include <linux/spinlock.h>
30 #include <linux/mii.h>
31 #include <linux/netdevice.h>
32 #include <linux/etherdevice.h>
33 #include <linux/ethtool.h>
34 #include <linux/skbuff.h>
35 #include <linux/platform_device.h>
36
37 #include <asm/dma.h>
38 #include <linux/dma-mapping.h>
39
40 #include <asm/div64.h>
41 #include <asm/dpmc.h>
42 #include <asm/blackfin.h>
43 #include <asm/cacheflush.h>
44 #include <asm/portmux.h>
45 #include <mach/pll.h>
46
47 #include "bfin_mac.h"
48
49 MODULE_AUTHOR("Bryan Wu, Luke Yang");
50 MODULE_LICENSE("GPL");
51 MODULE_DESCRIPTION(DRV_DESC);
52 MODULE_ALIAS("platform:bfin_mac");
53
54 #if defined(CONFIG_BFIN_MAC_USE_L1)
55 # define bfin_mac_alloc(dma_handle, size, num) l1_data_sram_zalloc(size*num)
56 # define bfin_mac_free(dma_handle, ptr, num) l1_data_sram_free(ptr)
57 #else
58 # define bfin_mac_alloc(dma_handle, size, num) \
59 dma_alloc_coherent(NULL, size*num, dma_handle, GFP_KERNEL)
60 # define bfin_mac_free(dma_handle, ptr, num) \
61 dma_free_coherent(NULL, sizeof(*ptr)*num, ptr, dma_handle)
62 #endif
63
64 #define PKT_BUF_SZ 1580
65
66 #define MAX_TIMEOUT_CNT 500
67
68 /* pointers to maintain transmit list */
69 static struct net_dma_desc_tx *tx_list_head;
70 static struct net_dma_desc_tx *tx_list_tail;
71 static struct net_dma_desc_rx *rx_list_head;
72 static struct net_dma_desc_rx *rx_list_tail;
73 static struct net_dma_desc_rx *current_rx_ptr;
74 static struct net_dma_desc_tx *current_tx_ptr;
75 static struct net_dma_desc_tx *tx_desc;
76 static struct net_dma_desc_rx *rx_desc;
77
78 static void desc_list_free(void)
79 {
80 struct net_dma_desc_rx *r;
81 struct net_dma_desc_tx *t;
82 int i;
83 #if !defined(CONFIG_BFIN_MAC_USE_L1)
84 dma_addr_t dma_handle = 0;
85 #endif
86
87 if (tx_desc) {
88 t = tx_list_head;
89 for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
90 if (t) {
91 if (t->skb) {
92 dev_kfree_skb(t->skb);
93 t->skb = NULL;
94 }
95 t = t->next;
96 }
97 }
98 bfin_mac_free(dma_handle, tx_desc, CONFIG_BFIN_TX_DESC_NUM);
99 }
100
101 if (rx_desc) {
102 r = rx_list_head;
103 for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
104 if (r) {
105 if (r->skb) {
106 dev_kfree_skb(r->skb);
107 r->skb = NULL;
108 }
109 r = r->next;
110 }
111 }
112 bfin_mac_free(dma_handle, rx_desc, CONFIG_BFIN_RX_DESC_NUM);
113 }
114 }
115
116 static int desc_list_init(struct net_device *dev)
117 {
118 int i;
119 struct sk_buff *new_skb;
120 #if !defined(CONFIG_BFIN_MAC_USE_L1)
121 /*
122 * This dma_handle is useless in Blackfin dma_alloc_coherent().
123 * The real dma handler is the return value of dma_alloc_coherent().
124 */
125 dma_addr_t dma_handle;
126 #endif
127
128 tx_desc = bfin_mac_alloc(&dma_handle,
129 sizeof(struct net_dma_desc_tx),
130 CONFIG_BFIN_TX_DESC_NUM);
131 if (tx_desc == NULL)
132 goto init_error;
133
134 rx_desc = bfin_mac_alloc(&dma_handle,
135 sizeof(struct net_dma_desc_rx),
136 CONFIG_BFIN_RX_DESC_NUM);
137 if (rx_desc == NULL)
138 goto init_error;
139
140 /* init tx_list */
141 tx_list_head = tx_list_tail = tx_desc;
142
143 for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
144 struct net_dma_desc_tx *t = tx_desc + i;
145 struct dma_descriptor *a = &(t->desc_a);
146 struct dma_descriptor *b = &(t->desc_b);
147
148 /*
149 * disable DMA
150 * read from memory WNR = 0
151 * wordsize is 32 bits
152 * 6 half words is desc size
153 * large desc flow
154 */
155 a->config = WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
156 a->start_addr = (unsigned long)t->packet;
157 a->x_count = 0;
158 a->next_dma_desc = b;
159
160 /*
161 * enabled DMA
162 * write to memory WNR = 1
163 * wordsize is 32 bits
164 * disable interrupt
165 * 6 half words is desc size
166 * large desc flow
167 */
168 b->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
169 b->start_addr = (unsigned long)(&(t->status));
170 b->x_count = 0;
171
172 t->skb = NULL;
173 tx_list_tail->desc_b.next_dma_desc = a;
174 tx_list_tail->next = t;
175 tx_list_tail = t;
176 }
177 tx_list_tail->next = tx_list_head; /* tx_list is a circle */
178 tx_list_tail->desc_b.next_dma_desc = &(tx_list_head->desc_a);
179 current_tx_ptr = tx_list_head;
180
181 /* init rx_list */
182 rx_list_head = rx_list_tail = rx_desc;
183
184 for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
185 struct net_dma_desc_rx *r = rx_desc + i;
186 struct dma_descriptor *a = &(r->desc_a);
187 struct dma_descriptor *b = &(r->desc_b);
188
189 /* allocate a new skb for next time receive */
190 new_skb = netdev_alloc_skb(dev, PKT_BUF_SZ + NET_IP_ALIGN);
191 if (!new_skb)
192 goto init_error;
193
194 skb_reserve(new_skb, NET_IP_ALIGN);
195 /* Invidate the data cache of skb->data range when it is write back
196 * cache. It will prevent overwritting the new data from DMA
197 */
198 blackfin_dcache_invalidate_range((unsigned long)new_skb->head,
199 (unsigned long)new_skb->end);
200 r->skb = new_skb;
201
202 /*
203 * enabled DMA
204 * write to memory WNR = 1
205 * wordsize is 32 bits
206 * disable interrupt
207 * 6 half words is desc size
208 * large desc flow
209 */
210 a->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
211 /* since RXDWA is enabled */
212 a->start_addr = (unsigned long)new_skb->data - 2;
213 a->x_count = 0;
214 a->next_dma_desc = b;
215
216 /*
217 * enabled DMA
218 * write to memory WNR = 1
219 * wordsize is 32 bits
220 * enable interrupt
221 * 6 half words is desc size
222 * large desc flow
223 */
224 b->config = DMAEN | WNR | WDSIZE_32 | DI_EN |
225 NDSIZE_6 | DMAFLOW_LARGE;
226 b->start_addr = (unsigned long)(&(r->status));
227 b->x_count = 0;
228
229 rx_list_tail->desc_b.next_dma_desc = a;
230 rx_list_tail->next = r;
231 rx_list_tail = r;
232 }
233 rx_list_tail->next = rx_list_head; /* rx_list is a circle */
234 rx_list_tail->desc_b.next_dma_desc = &(rx_list_head->desc_a);
235 current_rx_ptr = rx_list_head;
236
237 return 0;
238
239 init_error:
240 desc_list_free();
241 pr_err("kmalloc failed\n");
242 return -ENOMEM;
243 }
244
245
246 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
247
248 /*
249 * MII operations
250 */
251 /* Wait until the previous MDC/MDIO transaction has completed */
252 static int bfin_mdio_poll(void)
253 {
254 int timeout_cnt = MAX_TIMEOUT_CNT;
255
256 /* poll the STABUSY bit */
257 while ((bfin_read_EMAC_STAADD()) & STABUSY) {
258 udelay(1);
259 if (timeout_cnt-- < 0) {
260 pr_err("wait MDC/MDIO transaction to complete timeout\n");
261 return -ETIMEDOUT;
262 }
263 }
264
265 return 0;
266 }
267
268 /* Read an off-chip register in a PHY through the MDC/MDIO port */
269 static int bfin_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
270 {
271 int ret;
272
273 ret = bfin_mdio_poll();
274 if (ret)
275 return ret;
276
277 /* read mode */
278 bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
279 SET_REGAD((u16) regnum) |
280 STABUSY);
281
282 ret = bfin_mdio_poll();
283 if (ret)
284 return ret;
285
286 return (int) bfin_read_EMAC_STADAT();
287 }
288
289 /* Write an off-chip register in a PHY through the MDC/MDIO port */
290 static int bfin_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
291 u16 value)
292 {
293 int ret;
294
295 ret = bfin_mdio_poll();
296 if (ret)
297 return ret;
298
299 bfin_write_EMAC_STADAT((u32) value);
300
301 /* write mode */
302 bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
303 SET_REGAD((u16) regnum) |
304 STAOP |
305 STABUSY);
306
307 return bfin_mdio_poll();
308 }
309
310 static void bfin_mac_adjust_link(struct net_device *dev)
311 {
312 struct bfin_mac_local *lp = netdev_priv(dev);
313 struct phy_device *phydev = lp->phydev;
314 unsigned long flags;
315 int new_state = 0;
316
317 spin_lock_irqsave(&lp->lock, flags);
318 if (phydev->link) {
319 /* Now we make sure that we can be in full duplex mode.
320 * If not, we operate in half-duplex mode. */
321 if (phydev->duplex != lp->old_duplex) {
322 u32 opmode = bfin_read_EMAC_OPMODE();
323 new_state = 1;
324
325 if (phydev->duplex)
326 opmode |= FDMODE;
327 else
328 opmode &= ~(FDMODE);
329
330 bfin_write_EMAC_OPMODE(opmode);
331 lp->old_duplex = phydev->duplex;
332 }
333
334 if (phydev->speed != lp->old_speed) {
335 if (phydev->interface == PHY_INTERFACE_MODE_RMII) {
336 u32 opmode = bfin_read_EMAC_OPMODE();
337 switch (phydev->speed) {
338 case 10:
339 opmode |= RMII_10;
340 break;
341 case 100:
342 opmode &= ~RMII_10;
343 break;
344 default:
345 netdev_warn(dev,
346 "Ack! Speed (%d) is not 10/100!\n",
347 phydev->speed);
348 break;
349 }
350 bfin_write_EMAC_OPMODE(opmode);
351 }
352
353 new_state = 1;
354 lp->old_speed = phydev->speed;
355 }
356
357 if (!lp->old_link) {
358 new_state = 1;
359 lp->old_link = 1;
360 }
361 } else if (lp->old_link) {
362 new_state = 1;
363 lp->old_link = 0;
364 lp->old_speed = 0;
365 lp->old_duplex = -1;
366 }
367
368 if (new_state) {
369 u32 opmode = bfin_read_EMAC_OPMODE();
370 phy_print_status(phydev);
371 pr_debug("EMAC_OPMODE = 0x%08x\n", opmode);
372 }
373
374 spin_unlock_irqrestore(&lp->lock, flags);
375 }
376
377 /* MDC = 2.5 MHz */
378 #define MDC_CLK 2500000
379
380 static int mii_probe(struct net_device *dev, int phy_mode)
381 {
382 struct bfin_mac_local *lp = netdev_priv(dev);
383 struct phy_device *phydev = NULL;
384 unsigned short sysctl;
385 int i;
386 u32 sclk, mdc_div;
387
388 /* Enable PHY output early */
389 if (!(bfin_read_VR_CTL() & CLKBUFOE))
390 bfin_write_VR_CTL(bfin_read_VR_CTL() | CLKBUFOE);
391
392 sclk = get_sclk();
393 mdc_div = ((sclk / MDC_CLK) / 2) - 1;
394
395 sysctl = bfin_read_EMAC_SYSCTL();
396 sysctl = (sysctl & ~MDCDIV) | SET_MDCDIV(mdc_div);
397 bfin_write_EMAC_SYSCTL(sysctl);
398
399 /* search for connected PHY device */
400 for (i = 0; i < PHY_MAX_ADDR; ++i) {
401 struct phy_device *const tmp_phydev = lp->mii_bus->phy_map[i];
402
403 if (!tmp_phydev)
404 continue; /* no PHY here... */
405
406 phydev = tmp_phydev;
407 break; /* found it */
408 }
409
410 /* now we are supposed to have a proper phydev, to attach to... */
411 if (!phydev) {
412 netdev_err(dev, "no phy device found\n");
413 return -ENODEV;
414 }
415
416 if (phy_mode != PHY_INTERFACE_MODE_RMII &&
417 phy_mode != PHY_INTERFACE_MODE_MII) {
418 netdev_err(dev, "invalid phy interface mode\n");
419 return -EINVAL;
420 }
421
422 phydev = phy_connect(dev, dev_name(&phydev->dev),
423 &bfin_mac_adjust_link, phy_mode);
424
425 if (IS_ERR(phydev)) {
426 netdev_err(dev, "could not attach PHY\n");
427 return PTR_ERR(phydev);
428 }
429
430 /* mask with MAC supported features */
431 phydev->supported &= (SUPPORTED_10baseT_Half
432 | SUPPORTED_10baseT_Full
433 | SUPPORTED_100baseT_Half
434 | SUPPORTED_100baseT_Full
435 | SUPPORTED_Autoneg
436 | SUPPORTED_Pause | SUPPORTED_Asym_Pause
437 | SUPPORTED_MII
438 | SUPPORTED_TP);
439
440 phydev->advertising = phydev->supported;
441
442 lp->old_link = 0;
443 lp->old_speed = 0;
444 lp->old_duplex = -1;
445 lp->phydev = phydev;
446
447 pr_info("attached PHY driver [%s] "
448 "(mii_bus:phy_addr=%s, irq=%d, mdc_clk=%dHz(mdc_div=%d)@sclk=%dMHz)\n",
449 phydev->drv->name, dev_name(&phydev->dev), phydev->irq,
450 MDC_CLK, mdc_div, sclk/1000000);
451
452 return 0;
453 }
454
455 /*
456 * Ethtool support
457 */
458
459 /*
460 * interrupt routine for magic packet wakeup
461 */
462 static irqreturn_t bfin_mac_wake_interrupt(int irq, void *dev_id)
463 {
464 return IRQ_HANDLED;
465 }
466
467 static int
468 bfin_mac_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
469 {
470 struct bfin_mac_local *lp = netdev_priv(dev);
471
472 if (lp->phydev)
473 return phy_ethtool_gset(lp->phydev, cmd);
474
475 return -EINVAL;
476 }
477
478 static int
479 bfin_mac_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
480 {
481 struct bfin_mac_local *lp = netdev_priv(dev);
482
483 if (!capable(CAP_NET_ADMIN))
484 return -EPERM;
485
486 if (lp->phydev)
487 return phy_ethtool_sset(lp->phydev, cmd);
488
489 return -EINVAL;
490 }
491
492 static void bfin_mac_ethtool_getdrvinfo(struct net_device *dev,
493 struct ethtool_drvinfo *info)
494 {
495 strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
496 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
497 strlcpy(info->fw_version, "N/A", sizeof(info->fw_version));
498 strlcpy(info->bus_info, dev_name(&dev->dev), sizeof(info->bus_info));
499 }
500
501 static void bfin_mac_ethtool_getwol(struct net_device *dev,
502 struct ethtool_wolinfo *wolinfo)
503 {
504 struct bfin_mac_local *lp = netdev_priv(dev);
505
506 wolinfo->supported = WAKE_MAGIC;
507 wolinfo->wolopts = lp->wol;
508 }
509
510 static int bfin_mac_ethtool_setwol(struct net_device *dev,
511 struct ethtool_wolinfo *wolinfo)
512 {
513 struct bfin_mac_local *lp = netdev_priv(dev);
514 int rc;
515
516 if (wolinfo->wolopts & (WAKE_MAGICSECURE |
517 WAKE_UCAST |
518 WAKE_MCAST |
519 WAKE_BCAST |
520 WAKE_ARP))
521 return -EOPNOTSUPP;
522
523 lp->wol = wolinfo->wolopts;
524
525 if (lp->wol && !lp->irq_wake_requested) {
526 /* register wake irq handler */
527 rc = request_irq(IRQ_MAC_WAKEDET, bfin_mac_wake_interrupt,
528 0, "EMAC_WAKE", dev);
529 if (rc)
530 return rc;
531 lp->irq_wake_requested = true;
532 }
533
534 if (!lp->wol && lp->irq_wake_requested) {
535 free_irq(IRQ_MAC_WAKEDET, dev);
536 lp->irq_wake_requested = false;
537 }
538
539 /* Make sure the PHY driver doesn't suspend */
540 device_init_wakeup(&dev->dev, lp->wol);
541
542 return 0;
543 }
544
545 #ifdef CONFIG_BFIN_MAC_USE_HWSTAMP
546 static int bfin_mac_ethtool_get_ts_info(struct net_device *dev,
547 struct ethtool_ts_info *info)
548 {
549 struct bfin_mac_local *lp = netdev_priv(dev);
550
551 info->so_timestamping =
552 SOF_TIMESTAMPING_TX_HARDWARE |
553 SOF_TIMESTAMPING_RX_HARDWARE |
554 SOF_TIMESTAMPING_RAW_HARDWARE;
555 info->phc_index = lp->phc_index;
556 info->tx_types =
557 (1 << HWTSTAMP_TX_OFF) |
558 (1 << HWTSTAMP_TX_ON);
559 info->rx_filters =
560 (1 << HWTSTAMP_FILTER_NONE) |
561 (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |
562 (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
563 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT);
564 return 0;
565 }
566 #endif
567
568 static const struct ethtool_ops bfin_mac_ethtool_ops = {
569 .get_settings = bfin_mac_ethtool_getsettings,
570 .set_settings = bfin_mac_ethtool_setsettings,
571 .get_link = ethtool_op_get_link,
572 .get_drvinfo = bfin_mac_ethtool_getdrvinfo,
573 .get_wol = bfin_mac_ethtool_getwol,
574 .set_wol = bfin_mac_ethtool_setwol,
575 #ifdef CONFIG_BFIN_MAC_USE_HWSTAMP
576 .get_ts_info = bfin_mac_ethtool_get_ts_info,
577 #endif
578 };
579
580 /**************************************************************************/
581 static void setup_system_regs(struct net_device *dev)
582 {
583 struct bfin_mac_local *lp = netdev_priv(dev);
584 int i;
585 unsigned short sysctl;
586
587 /*
588 * Odd word alignment for Receive Frame DMA word
589 * Configure checksum support and rcve frame word alignment
590 */
591 sysctl = bfin_read_EMAC_SYSCTL();
592 /*
593 * check if interrupt is requested for any PHY,
594 * enable PHY interrupt only if needed
595 */
596 for (i = 0; i < PHY_MAX_ADDR; ++i)
597 if (lp->mii_bus->irq[i] != PHY_POLL)
598 break;
599 if (i < PHY_MAX_ADDR)
600 sysctl |= PHYIE;
601 sysctl |= RXDWA;
602 #if defined(BFIN_MAC_CSUM_OFFLOAD)
603 sysctl |= RXCKS;
604 #else
605 sysctl &= ~RXCKS;
606 #endif
607 bfin_write_EMAC_SYSCTL(sysctl);
608
609 bfin_write_EMAC_MMC_CTL(RSTC | CROLL);
610
611 /* Set vlan regs to let 1522 bytes long packets pass through */
612 bfin_write_EMAC_VLAN1(lp->vlan1_mask);
613 bfin_write_EMAC_VLAN2(lp->vlan2_mask);
614
615 /* Initialize the TX DMA channel registers */
616 bfin_write_DMA2_X_COUNT(0);
617 bfin_write_DMA2_X_MODIFY(4);
618 bfin_write_DMA2_Y_COUNT(0);
619 bfin_write_DMA2_Y_MODIFY(0);
620
621 /* Initialize the RX DMA channel registers */
622 bfin_write_DMA1_X_COUNT(0);
623 bfin_write_DMA1_X_MODIFY(4);
624 bfin_write_DMA1_Y_COUNT(0);
625 bfin_write_DMA1_Y_MODIFY(0);
626 }
627
628 static void setup_mac_addr(u8 *mac_addr)
629 {
630 u32 addr_low = le32_to_cpu(*(__le32 *) & mac_addr[0]);
631 u16 addr_hi = le16_to_cpu(*(__le16 *) & mac_addr[4]);
632
633 /* this depends on a little-endian machine */
634 bfin_write_EMAC_ADDRLO(addr_low);
635 bfin_write_EMAC_ADDRHI(addr_hi);
636 }
637
638 static int bfin_mac_set_mac_address(struct net_device *dev, void *p)
639 {
640 struct sockaddr *addr = p;
641 if (netif_running(dev))
642 return -EBUSY;
643 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
644 setup_mac_addr(dev->dev_addr);
645 return 0;
646 }
647
648 #ifdef CONFIG_BFIN_MAC_USE_HWSTAMP
649 #define bfin_mac_hwtstamp_is_none(cfg) ((cfg) == HWTSTAMP_FILTER_NONE)
650
651 static u32 bfin_select_phc_clock(u32 input_clk, unsigned int *shift_result)
652 {
653 u32 ipn = 1000000000UL / input_clk;
654 u32 ppn = 1;
655 unsigned int shift = 0;
656
657 while (ppn <= ipn) {
658 ppn <<= 1;
659 shift++;
660 }
661 *shift_result = shift;
662 return 1000000000UL / ppn;
663 }
664
665 static int bfin_mac_hwtstamp_set(struct net_device *netdev,
666 struct ifreq *ifr)
667 {
668 struct hwtstamp_config config;
669 struct bfin_mac_local *lp = netdev_priv(netdev);
670 u16 ptpctl;
671 u32 ptpfv1, ptpfv2, ptpfv3, ptpfoff;
672
673 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
674 return -EFAULT;
675
676 pr_debug("%s config flag:0x%x, tx_type:0x%x, rx_filter:0x%x\n",
677 __func__, config.flags, config.tx_type, config.rx_filter);
678
679 /* reserved for future extensions */
680 if (config.flags)
681 return -EINVAL;
682
683 if ((config.tx_type != HWTSTAMP_TX_OFF) &&
684 (config.tx_type != HWTSTAMP_TX_ON))
685 return -ERANGE;
686
687 ptpctl = bfin_read_EMAC_PTP_CTL();
688
689 switch (config.rx_filter) {
690 case HWTSTAMP_FILTER_NONE:
691 /*
692 * Dont allow any timestamping
693 */
694 ptpfv3 = 0xFFFFFFFF;
695 bfin_write_EMAC_PTP_FV3(ptpfv3);
696 break;
697 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
698 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
699 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
700 /*
701 * Clear the five comparison mask bits (bits[12:8]) in EMAC_PTP_CTL)
702 * to enable all the field matches.
703 */
704 ptpctl &= ~0x1F00;
705 bfin_write_EMAC_PTP_CTL(ptpctl);
706 /*
707 * Keep the default values of the EMAC_PTP_FOFF register.
708 */
709 ptpfoff = 0x4A24170C;
710 bfin_write_EMAC_PTP_FOFF(ptpfoff);
711 /*
712 * Keep the default values of the EMAC_PTP_FV1 and EMAC_PTP_FV2
713 * registers.
714 */
715 ptpfv1 = 0x11040800;
716 bfin_write_EMAC_PTP_FV1(ptpfv1);
717 ptpfv2 = 0x0140013F;
718 bfin_write_EMAC_PTP_FV2(ptpfv2);
719 /*
720 * The default value (0xFFFC) allows the timestamping of both
721 * received Sync messages and Delay_Req messages.
722 */
723 ptpfv3 = 0xFFFFFFFC;
724 bfin_write_EMAC_PTP_FV3(ptpfv3);
725
726 config.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;
727 break;
728 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
729 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
730 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
731 /* Clear all five comparison mask bits (bits[12:8]) in the
732 * EMAC_PTP_CTL register to enable all the field matches.
733 */
734 ptpctl &= ~0x1F00;
735 bfin_write_EMAC_PTP_CTL(ptpctl);
736 /*
737 * Keep the default values of the EMAC_PTP_FOFF register, except set
738 * the PTPCOF field to 0x2A.
739 */
740 ptpfoff = 0x2A24170C;
741 bfin_write_EMAC_PTP_FOFF(ptpfoff);
742 /*
743 * Keep the default values of the EMAC_PTP_FV1 and EMAC_PTP_FV2
744 * registers.
745 */
746 ptpfv1 = 0x11040800;
747 bfin_write_EMAC_PTP_FV1(ptpfv1);
748 ptpfv2 = 0x0140013F;
749 bfin_write_EMAC_PTP_FV2(ptpfv2);
750 /*
751 * To allow the timestamping of Pdelay_Req and Pdelay_Resp, set
752 * the value to 0xFFF0.
753 */
754 ptpfv3 = 0xFFFFFFF0;
755 bfin_write_EMAC_PTP_FV3(ptpfv3);
756
757 config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;
758 break;
759 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
760 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
761 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
762 /*
763 * Clear bits 8 and 12 of the EMAC_PTP_CTL register to enable only the
764 * EFTM and PTPCM field comparison.
765 */
766 ptpctl &= ~0x1100;
767 bfin_write_EMAC_PTP_CTL(ptpctl);
768 /*
769 * Keep the default values of all the fields of the EMAC_PTP_FOFF
770 * register, except set the PTPCOF field to 0x0E.
771 */
772 ptpfoff = 0x0E24170C;
773 bfin_write_EMAC_PTP_FOFF(ptpfoff);
774 /*
775 * Program bits [15:0] of the EMAC_PTP_FV1 register to 0x88F7, which
776 * corresponds to PTP messages on the MAC layer.
777 */
778 ptpfv1 = 0x110488F7;
779 bfin_write_EMAC_PTP_FV1(ptpfv1);
780 ptpfv2 = 0x0140013F;
781 bfin_write_EMAC_PTP_FV2(ptpfv2);
782 /*
783 * To allow the timestamping of Pdelay_Req and Pdelay_Resp
784 * messages, set the value to 0xFFF0.
785 */
786 ptpfv3 = 0xFFFFFFF0;
787 bfin_write_EMAC_PTP_FV3(ptpfv3);
788
789 config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;
790 break;
791 default:
792 return -ERANGE;
793 }
794
795 if (config.tx_type == HWTSTAMP_TX_OFF &&
796 bfin_mac_hwtstamp_is_none(config.rx_filter)) {
797 ptpctl &= ~PTP_EN;
798 bfin_write_EMAC_PTP_CTL(ptpctl);
799
800 SSYNC();
801 } else {
802 ptpctl |= PTP_EN;
803 bfin_write_EMAC_PTP_CTL(ptpctl);
804
805 /*
806 * clear any existing timestamp
807 */
808 bfin_read_EMAC_PTP_RXSNAPLO();
809 bfin_read_EMAC_PTP_RXSNAPHI();
810
811 bfin_read_EMAC_PTP_TXSNAPLO();
812 bfin_read_EMAC_PTP_TXSNAPHI();
813
814 SSYNC();
815 }
816
817 lp->stamp_cfg = config;
818 return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
819 -EFAULT : 0;
820 }
821
822 static int bfin_mac_hwtstamp_get(struct net_device *netdev,
823 struct ifreq *ifr)
824 {
825 struct bfin_mac_local *lp = netdev_priv(netdev);
826
827 return copy_to_user(ifr->ifr_data, &lp->stamp_cfg,
828 sizeof(lp->stamp_cfg)) ?
829 -EFAULT : 0;
830 }
831
832 static void bfin_tx_hwtstamp(struct net_device *netdev, struct sk_buff *skb)
833 {
834 struct bfin_mac_local *lp = netdev_priv(netdev);
835
836 if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) {
837 int timeout_cnt = MAX_TIMEOUT_CNT;
838
839 /* When doing time stamping, keep the connection to the socket
840 * a while longer
841 */
842 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
843
844 /*
845 * The timestamping is done at the EMAC module's MII/RMII interface
846 * when the module sees the Start of Frame of an event message packet. This
847 * interface is the closest possible place to the physical Ethernet transmission
848 * medium, providing the best timing accuracy.
849 */
850 while ((!(bfin_read_EMAC_PTP_ISTAT() & TXTL)) && (--timeout_cnt))
851 udelay(1);
852 if (timeout_cnt == 0)
853 netdev_err(netdev, "timestamp the TX packet failed\n");
854 else {
855 struct skb_shared_hwtstamps shhwtstamps;
856 u64 ns;
857 u64 regval;
858
859 regval = bfin_read_EMAC_PTP_TXSNAPLO();
860 regval |= (u64)bfin_read_EMAC_PTP_TXSNAPHI() << 32;
861 memset(&shhwtstamps, 0, sizeof(shhwtstamps));
862 ns = regval << lp->shift;
863 shhwtstamps.hwtstamp = ns_to_ktime(ns);
864 skb_tstamp_tx(skb, &shhwtstamps);
865 }
866 }
867 }
868
869 static void bfin_rx_hwtstamp(struct net_device *netdev, struct sk_buff *skb)
870 {
871 struct bfin_mac_local *lp = netdev_priv(netdev);
872 u32 valid;
873 u64 regval, ns;
874 struct skb_shared_hwtstamps *shhwtstamps;
875
876 if (bfin_mac_hwtstamp_is_none(lp->stamp_cfg.rx_filter))
877 return;
878
879 valid = bfin_read_EMAC_PTP_ISTAT() & RXEL;
880 if (!valid)
881 return;
882
883 shhwtstamps = skb_hwtstamps(skb);
884
885 regval = bfin_read_EMAC_PTP_RXSNAPLO();
886 regval |= (u64)bfin_read_EMAC_PTP_RXSNAPHI() << 32;
887 ns = regval << lp->shift;
888 memset(shhwtstamps, 0, sizeof(*shhwtstamps));
889 shhwtstamps->hwtstamp = ns_to_ktime(ns);
890 }
891
892 static void bfin_mac_hwtstamp_init(struct net_device *netdev)
893 {
894 struct bfin_mac_local *lp = netdev_priv(netdev);
895 u64 addend, ppb;
896 u32 input_clk, phc_clk;
897
898 /* Initialize hardware timer */
899 input_clk = get_sclk();
900 phc_clk = bfin_select_phc_clock(input_clk, &lp->shift);
901 addend = phc_clk * (1ULL << 32);
902 do_div(addend, input_clk);
903 bfin_write_EMAC_PTP_ADDEND((u32)addend);
904
905 lp->addend = addend;
906 ppb = 1000000000ULL * input_clk;
907 do_div(ppb, phc_clk);
908 lp->max_ppb = ppb - 1000000000ULL - 1ULL;
909
910 /* Initialize hwstamp config */
911 lp->stamp_cfg.rx_filter = HWTSTAMP_FILTER_NONE;
912 lp->stamp_cfg.tx_type = HWTSTAMP_TX_OFF;
913 }
914
915 static u64 bfin_ptp_time_read(struct bfin_mac_local *lp)
916 {
917 u64 ns;
918 u32 lo, hi;
919
920 lo = bfin_read_EMAC_PTP_TIMELO();
921 hi = bfin_read_EMAC_PTP_TIMEHI();
922
923 ns = ((u64) hi) << 32;
924 ns |= lo;
925 ns <<= lp->shift;
926
927 return ns;
928 }
929
930 static void bfin_ptp_time_write(struct bfin_mac_local *lp, u64 ns)
931 {
932 u32 hi, lo;
933
934 ns >>= lp->shift;
935 hi = ns >> 32;
936 lo = ns & 0xffffffff;
937
938 bfin_write_EMAC_PTP_TIMELO(lo);
939 bfin_write_EMAC_PTP_TIMEHI(hi);
940 }
941
942 /* PTP Hardware Clock operations */
943
944 static int bfin_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
945 {
946 u64 adj;
947 u32 diff, addend;
948 int neg_adj = 0;
949 struct bfin_mac_local *lp =
950 container_of(ptp, struct bfin_mac_local, caps);
951
952 if (ppb < 0) {
953 neg_adj = 1;
954 ppb = -ppb;
955 }
956 addend = lp->addend;
957 adj = addend;
958 adj *= ppb;
959 diff = div_u64(adj, 1000000000ULL);
960
961 addend = neg_adj ? addend - diff : addend + diff;
962
963 bfin_write_EMAC_PTP_ADDEND(addend);
964
965 return 0;
966 }
967
968 static int bfin_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
969 {
970 s64 now;
971 unsigned long flags;
972 struct bfin_mac_local *lp =
973 container_of(ptp, struct bfin_mac_local, caps);
974
975 spin_lock_irqsave(&lp->phc_lock, flags);
976
977 now = bfin_ptp_time_read(lp);
978 now += delta;
979 bfin_ptp_time_write(lp, now);
980
981 spin_unlock_irqrestore(&lp->phc_lock, flags);
982
983 return 0;
984 }
985
986 static int bfin_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
987 {
988 u64 ns;
989 unsigned long flags;
990 struct bfin_mac_local *lp =
991 container_of(ptp, struct bfin_mac_local, caps);
992
993 spin_lock_irqsave(&lp->phc_lock, flags);
994
995 ns = bfin_ptp_time_read(lp);
996
997 spin_unlock_irqrestore(&lp->phc_lock, flags);
998
999 *ts = ns_to_timespec64(ns);
1000
1001 return 0;
1002 }
1003
1004 static int bfin_ptp_settime(struct ptp_clock_info *ptp,
1005 const struct timespec64 *ts)
1006 {
1007 u64 ns;
1008 unsigned long flags;
1009 struct bfin_mac_local *lp =
1010 container_of(ptp, struct bfin_mac_local, caps);
1011
1012 ns = timespec64_to_ns(ts);
1013
1014 spin_lock_irqsave(&lp->phc_lock, flags);
1015
1016 bfin_ptp_time_write(lp, ns);
1017
1018 spin_unlock_irqrestore(&lp->phc_lock, flags);
1019
1020 return 0;
1021 }
1022
1023 static int bfin_ptp_enable(struct ptp_clock_info *ptp,
1024 struct ptp_clock_request *rq, int on)
1025 {
1026 return -EOPNOTSUPP;
1027 }
1028
1029 static struct ptp_clock_info bfin_ptp_caps = {
1030 .owner = THIS_MODULE,
1031 .name = "BF518 clock",
1032 .max_adj = 0,
1033 .n_alarm = 0,
1034 .n_ext_ts = 0,
1035 .n_per_out = 0,
1036 .n_pins = 0,
1037 .pps = 0,
1038 .adjfreq = bfin_ptp_adjfreq,
1039 .adjtime = bfin_ptp_adjtime,
1040 .gettime64 = bfin_ptp_gettime,
1041 .settime64 = bfin_ptp_settime,
1042 .enable = bfin_ptp_enable,
1043 };
1044
1045 static int bfin_phc_init(struct net_device *netdev, struct device *dev)
1046 {
1047 struct bfin_mac_local *lp = netdev_priv(netdev);
1048
1049 lp->caps = bfin_ptp_caps;
1050 lp->caps.max_adj = lp->max_ppb;
1051 lp->clock = ptp_clock_register(&lp->caps, dev);
1052 if (IS_ERR(lp->clock))
1053 return PTR_ERR(lp->clock);
1054
1055 lp->phc_index = ptp_clock_index(lp->clock);
1056 spin_lock_init(&lp->phc_lock);
1057
1058 return 0;
1059 }
1060
1061 static void bfin_phc_release(struct bfin_mac_local *lp)
1062 {
1063 ptp_clock_unregister(lp->clock);
1064 }
1065
1066 #else
1067 # define bfin_mac_hwtstamp_is_none(cfg) 0
1068 # define bfin_mac_hwtstamp_init(dev)
1069 # define bfin_mac_hwtstamp_set(dev, ifr) (-EOPNOTSUPP)
1070 # define bfin_mac_hwtstamp_get(dev, ifr) (-EOPNOTSUPP)
1071 # define bfin_rx_hwtstamp(dev, skb)
1072 # define bfin_tx_hwtstamp(dev, skb)
1073 # define bfin_phc_init(netdev, dev) 0
1074 # define bfin_phc_release(lp)
1075 #endif
1076
1077 static inline void _tx_reclaim_skb(void)
1078 {
1079 do {
1080 tx_list_head->desc_a.config &= ~DMAEN;
1081 tx_list_head->status.status_word = 0;
1082 if (tx_list_head->skb) {
1083 dev_consume_skb_any(tx_list_head->skb);
1084 tx_list_head->skb = NULL;
1085 }
1086 tx_list_head = tx_list_head->next;
1087
1088 } while (tx_list_head->status.status_word != 0);
1089 }
1090
1091 static void tx_reclaim_skb(struct bfin_mac_local *lp)
1092 {
1093 int timeout_cnt = MAX_TIMEOUT_CNT;
1094
1095 if (tx_list_head->status.status_word != 0)
1096 _tx_reclaim_skb();
1097
1098 if (current_tx_ptr->next == tx_list_head) {
1099 while (tx_list_head->status.status_word == 0) {
1100 /* slow down polling to avoid too many queue stop. */
1101 udelay(10);
1102 /* reclaim skb if DMA is not running. */
1103 if (!(bfin_read_DMA2_IRQ_STATUS() & DMA_RUN))
1104 break;
1105 if (timeout_cnt-- < 0)
1106 break;
1107 }
1108
1109 if (timeout_cnt >= 0)
1110 _tx_reclaim_skb();
1111 else
1112 netif_stop_queue(lp->ndev);
1113 }
1114
1115 if (current_tx_ptr->next != tx_list_head &&
1116 netif_queue_stopped(lp->ndev))
1117 netif_wake_queue(lp->ndev);
1118
1119 if (tx_list_head != current_tx_ptr) {
1120 /* shorten the timer interval if tx queue is stopped */
1121 if (netif_queue_stopped(lp->ndev))
1122 lp->tx_reclaim_timer.expires =
1123 jiffies + (TX_RECLAIM_JIFFIES >> 4);
1124 else
1125 lp->tx_reclaim_timer.expires =
1126 jiffies + TX_RECLAIM_JIFFIES;
1127
1128 mod_timer(&lp->tx_reclaim_timer,
1129 lp->tx_reclaim_timer.expires);
1130 }
1131
1132 return;
1133 }
1134
1135 static void tx_reclaim_skb_timeout(unsigned long lp)
1136 {
1137 tx_reclaim_skb((struct bfin_mac_local *)lp);
1138 }
1139
1140 static int bfin_mac_hard_start_xmit(struct sk_buff *skb,
1141 struct net_device *dev)
1142 {
1143 struct bfin_mac_local *lp = netdev_priv(dev);
1144 u16 *data;
1145 u32 data_align = (unsigned long)(skb->data) & 0x3;
1146
1147 current_tx_ptr->skb = skb;
1148
1149 if (data_align == 0x2) {
1150 /* move skb->data to current_tx_ptr payload */
1151 data = (u16 *)(skb->data) - 1;
1152 *data = (u16)(skb->len);
1153 /*
1154 * When transmitting an Ethernet packet, the PTP_TSYNC module requires
1155 * a DMA_Length_Word field associated with the packet. The lower 12 bits
1156 * of this field are the length of the packet payload in bytes and the higher
1157 * 4 bits are the timestamping enable field.
1158 */
1159 if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)
1160 *data |= 0x1000;
1161
1162 current_tx_ptr->desc_a.start_addr = (u32)data;
1163 /* this is important! */
1164 blackfin_dcache_flush_range((u32)data,
1165 (u32)((u8 *)data + skb->len + 4));
1166 } else {
1167 *((u16 *)(current_tx_ptr->packet)) = (u16)(skb->len);
1168 /* enable timestamping for the sent packet */
1169 if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)
1170 *((u16 *)(current_tx_ptr->packet)) |= 0x1000;
1171 memcpy((u8 *)(current_tx_ptr->packet + 2), skb->data,
1172 skb->len);
1173 current_tx_ptr->desc_a.start_addr =
1174 (u32)current_tx_ptr->packet;
1175 blackfin_dcache_flush_range(
1176 (u32)current_tx_ptr->packet,
1177 (u32)(current_tx_ptr->packet + skb->len + 2));
1178 }
1179
1180 /* make sure the internal data buffers in the core are drained
1181 * so that the DMA descriptors are completely written when the
1182 * DMA engine goes to fetch them below
1183 */
1184 SSYNC();
1185
1186 /* always clear status buffer before start tx dma */
1187 current_tx_ptr->status.status_word = 0;
1188
1189 /* enable this packet's dma */
1190 current_tx_ptr->desc_a.config |= DMAEN;
1191
1192 /* tx dma is running, just return */
1193 if (bfin_read_DMA2_IRQ_STATUS() & DMA_RUN)
1194 goto out;
1195
1196 /* tx dma is not running */
1197 bfin_write_DMA2_NEXT_DESC_PTR(&(current_tx_ptr->desc_a));
1198 /* dma enabled, read from memory, size is 6 */
1199 bfin_write_DMA2_CONFIG(current_tx_ptr->desc_a.config);
1200 /* Turn on the EMAC tx */
1201 bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE);
1202
1203 out:
1204 bfin_tx_hwtstamp(dev, skb);
1205
1206 current_tx_ptr = current_tx_ptr->next;
1207 dev->stats.tx_packets++;
1208 dev->stats.tx_bytes += (skb->len);
1209
1210 tx_reclaim_skb(lp);
1211
1212 return NETDEV_TX_OK;
1213 }
1214
1215 #define IP_HEADER_OFF 0
1216 #define RX_ERROR_MASK (RX_LONG | RX_ALIGN | RX_CRC | RX_LEN | \
1217 RX_FRAG | RX_ADDR | RX_DMAO | RX_PHY | RX_LATE | RX_RANGE)
1218
1219 static void bfin_mac_rx(struct bfin_mac_local *lp)
1220 {
1221 struct net_device *dev = lp->ndev;
1222 struct sk_buff *skb, *new_skb;
1223 unsigned short len;
1224 #if defined(BFIN_MAC_CSUM_OFFLOAD)
1225 unsigned int i;
1226 unsigned char fcs[ETH_FCS_LEN + 1];
1227 #endif
1228
1229 /* check if frame status word reports an error condition
1230 * we which case we simply drop the packet
1231 */
1232 if (current_rx_ptr->status.status_word & RX_ERROR_MASK) {
1233 netdev_notice(dev, "rx: receive error - packet dropped\n");
1234 dev->stats.rx_dropped++;
1235 goto out;
1236 }
1237
1238 /* allocate a new skb for next time receive */
1239 skb = current_rx_ptr->skb;
1240
1241 new_skb = netdev_alloc_skb(dev, PKT_BUF_SZ + NET_IP_ALIGN);
1242 if (!new_skb) {
1243 dev->stats.rx_dropped++;
1244 goto out;
1245 }
1246 /* reserve 2 bytes for RXDWA padding */
1247 skb_reserve(new_skb, NET_IP_ALIGN);
1248 /* Invidate the data cache of skb->data range when it is write back
1249 * cache. It will prevent overwritting the new data from DMA
1250 */
1251 blackfin_dcache_invalidate_range((unsigned long)new_skb->head,
1252 (unsigned long)new_skb->end);
1253
1254 current_rx_ptr->skb = new_skb;
1255 current_rx_ptr->desc_a.start_addr = (unsigned long)new_skb->data - 2;
1256
1257 len = (unsigned short)(current_rx_ptr->status.status_word & RX_FRLEN);
1258 /* Deduce Ethernet FCS length from Ethernet payload length */
1259 len -= ETH_FCS_LEN;
1260 skb_put(skb, len);
1261
1262 skb->protocol = eth_type_trans(skb, dev);
1263
1264 bfin_rx_hwtstamp(dev, skb);
1265
1266 #if defined(BFIN_MAC_CSUM_OFFLOAD)
1267 /* Checksum offloading only works for IPv4 packets with the standard IP header
1268 * length of 20 bytes, because the blackfin MAC checksum calculation is
1269 * based on that assumption. We must NOT use the calculated checksum if our
1270 * IP version or header break that assumption.
1271 */
1272 if (skb->data[IP_HEADER_OFF] == 0x45) {
1273 skb->csum = current_rx_ptr->status.ip_payload_csum;
1274 /*
1275 * Deduce Ethernet FCS from hardware generated IP payload checksum.
1276 * IP checksum is based on 16-bit one's complement algorithm.
1277 * To deduce a value from checksum is equal to add its inversion.
1278 * If the IP payload len is odd, the inversed FCS should also
1279 * begin from odd address and leave first byte zero.
1280 */
1281 if (skb->len % 2) {
1282 fcs[0] = 0;
1283 for (i = 0; i < ETH_FCS_LEN; i++)
1284 fcs[i + 1] = ~skb->data[skb->len + i];
1285 skb->csum = csum_partial(fcs, ETH_FCS_LEN + 1, skb->csum);
1286 } else {
1287 for (i = 0; i < ETH_FCS_LEN; i++)
1288 fcs[i] = ~skb->data[skb->len + i];
1289 skb->csum = csum_partial(fcs, ETH_FCS_LEN, skb->csum);
1290 }
1291 skb->ip_summed = CHECKSUM_COMPLETE;
1292 }
1293 #endif
1294
1295 napi_gro_receive(&lp->napi, skb);
1296
1297 dev->stats.rx_packets++;
1298 dev->stats.rx_bytes += len;
1299 out:
1300 current_rx_ptr->status.status_word = 0x00000000;
1301 current_rx_ptr = current_rx_ptr->next;
1302 }
1303
1304 static int bfin_mac_poll(struct napi_struct *napi, int budget)
1305 {
1306 int i = 0;
1307 struct bfin_mac_local *lp = container_of(napi,
1308 struct bfin_mac_local,
1309 napi);
1310
1311 while (current_rx_ptr->status.status_word != 0 && i < budget) {
1312 bfin_mac_rx(lp);
1313 i++;
1314 }
1315
1316 if (i < budget) {
1317 napi_complete(napi);
1318 if (test_and_clear_bit(BFIN_MAC_RX_IRQ_DISABLED, &lp->flags))
1319 enable_irq(IRQ_MAC_RX);
1320 }
1321
1322 return i;
1323 }
1324
1325 /* interrupt routine to handle rx and error signal */
1326 static irqreturn_t bfin_mac_interrupt(int irq, void *dev_id)
1327 {
1328 struct bfin_mac_local *lp = netdev_priv(dev_id);
1329 u32 status;
1330
1331 status = bfin_read_DMA1_IRQ_STATUS();
1332
1333 bfin_write_DMA1_IRQ_STATUS(status | DMA_DONE | DMA_ERR);
1334 if (status & DMA_DONE) {
1335 disable_irq_nosync(IRQ_MAC_RX);
1336 set_bit(BFIN_MAC_RX_IRQ_DISABLED, &lp->flags);
1337 napi_schedule(&lp->napi);
1338 }
1339
1340 return IRQ_HANDLED;
1341 }
1342
1343 #ifdef CONFIG_NET_POLL_CONTROLLER
1344 static void bfin_mac_poll_controller(struct net_device *dev)
1345 {
1346 struct bfin_mac_local *lp = netdev_priv(dev);
1347
1348 bfin_mac_interrupt(IRQ_MAC_RX, dev);
1349 tx_reclaim_skb(lp);
1350 }
1351 #endif /* CONFIG_NET_POLL_CONTROLLER */
1352
1353 static void bfin_mac_disable(void)
1354 {
1355 unsigned int opmode;
1356
1357 opmode = bfin_read_EMAC_OPMODE();
1358 opmode &= (~RE);
1359 opmode &= (~TE);
1360 /* Turn off the EMAC */
1361 bfin_write_EMAC_OPMODE(opmode);
1362 }
1363
1364 /*
1365 * Enable Interrupts, Receive, and Transmit
1366 */
1367 static int bfin_mac_enable(struct phy_device *phydev)
1368 {
1369 int ret;
1370 u32 opmode;
1371
1372 pr_debug("%s\n", __func__);
1373
1374 /* Set RX DMA */
1375 bfin_write_DMA1_NEXT_DESC_PTR(&(rx_list_head->desc_a));
1376 bfin_write_DMA1_CONFIG(rx_list_head->desc_a.config);
1377
1378 /* Wait MII done */
1379 ret = bfin_mdio_poll();
1380 if (ret)
1381 return ret;
1382
1383 /* We enable only RX here */
1384 /* ASTP : Enable Automatic Pad Stripping
1385 PR : Promiscuous Mode for test
1386 PSF : Receive frames with total length less than 64 bytes.
1387 FDMODE : Full Duplex Mode
1388 LB : Internal Loopback for test
1389 RE : Receiver Enable */
1390 opmode = bfin_read_EMAC_OPMODE();
1391 if (opmode & FDMODE)
1392 opmode |= PSF;
1393 else
1394 opmode |= DRO | DC | PSF;
1395 opmode |= RE;
1396
1397 if (phydev->interface == PHY_INTERFACE_MODE_RMII) {
1398 opmode |= RMII; /* For Now only 100MBit are supported */
1399 #if defined(CONFIG_BF537) || defined(CONFIG_BF536)
1400 if (__SILICON_REVISION__ < 3) {
1401 /*
1402 * This isn't publicly documented (fun times!), but in
1403 * silicon <=0.2, the RX and TX pins are clocked together.
1404 * So in order to recv, we must enable the transmit side
1405 * as well. This will cause a spurious TX interrupt too,
1406 * but we can easily consume that.
1407 */
1408 opmode |= TE;
1409 }
1410 #endif
1411 }
1412
1413 /* Turn on the EMAC rx */
1414 bfin_write_EMAC_OPMODE(opmode);
1415
1416 return 0;
1417 }
1418
1419 /* Our watchdog timed out. Called by the networking layer */
1420 static void bfin_mac_timeout(struct net_device *dev)
1421 {
1422 struct bfin_mac_local *lp = netdev_priv(dev);
1423
1424 pr_debug("%s: %s\n", dev->name, __func__);
1425
1426 bfin_mac_disable();
1427
1428 del_timer(&lp->tx_reclaim_timer);
1429
1430 /* reset tx queue and free skb */
1431 while (tx_list_head != current_tx_ptr) {
1432 tx_list_head->desc_a.config &= ~DMAEN;
1433 tx_list_head->status.status_word = 0;
1434 if (tx_list_head->skb) {
1435 dev_kfree_skb(tx_list_head->skb);
1436 tx_list_head->skb = NULL;
1437 }
1438 tx_list_head = tx_list_head->next;
1439 }
1440
1441 if (netif_queue_stopped(dev))
1442 netif_wake_queue(dev);
1443
1444 bfin_mac_enable(lp->phydev);
1445
1446 /* We can accept TX packets again */
1447 dev->trans_start = jiffies; /* prevent tx timeout */
1448 }
1449
1450 static void bfin_mac_multicast_hash(struct net_device *dev)
1451 {
1452 u32 emac_hashhi, emac_hashlo;
1453 struct netdev_hw_addr *ha;
1454 u32 crc;
1455
1456 emac_hashhi = emac_hashlo = 0;
1457
1458 netdev_for_each_mc_addr(ha, dev) {
1459 crc = ether_crc(ETH_ALEN, ha->addr);
1460 crc >>= 26;
1461
1462 if (crc & 0x20)
1463 emac_hashhi |= 1 << (crc & 0x1f);
1464 else
1465 emac_hashlo |= 1 << (crc & 0x1f);
1466 }
1467
1468 bfin_write_EMAC_HASHHI(emac_hashhi);
1469 bfin_write_EMAC_HASHLO(emac_hashlo);
1470 }
1471
1472 /*
1473 * This routine will, depending on the values passed to it,
1474 * either make it accept multicast packets, go into
1475 * promiscuous mode (for TCPDUMP and cousins) or accept
1476 * a select set of multicast packets
1477 */
1478 static void bfin_mac_set_multicast_list(struct net_device *dev)
1479 {
1480 u32 sysctl;
1481
1482 if (dev->flags & IFF_PROMISC) {
1483 netdev_info(dev, "set promisc mode\n");
1484 sysctl = bfin_read_EMAC_OPMODE();
1485 sysctl |= PR;
1486 bfin_write_EMAC_OPMODE(sysctl);
1487 } else if (dev->flags & IFF_ALLMULTI) {
1488 /* accept all multicast */
1489 sysctl = bfin_read_EMAC_OPMODE();
1490 sysctl |= PAM;
1491 bfin_write_EMAC_OPMODE(sysctl);
1492 } else if (!netdev_mc_empty(dev)) {
1493 /* set up multicast hash table */
1494 sysctl = bfin_read_EMAC_OPMODE();
1495 sysctl |= HM;
1496 bfin_write_EMAC_OPMODE(sysctl);
1497 bfin_mac_multicast_hash(dev);
1498 } else {
1499 /* clear promisc or multicast mode */
1500 sysctl = bfin_read_EMAC_OPMODE();
1501 sysctl &= ~(RAF | PAM);
1502 bfin_write_EMAC_OPMODE(sysctl);
1503 }
1504 }
1505
1506 static int bfin_mac_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1507 {
1508 struct bfin_mac_local *lp = netdev_priv(netdev);
1509
1510 if (!netif_running(netdev))
1511 return -EINVAL;
1512
1513 switch (cmd) {
1514 case SIOCSHWTSTAMP:
1515 return bfin_mac_hwtstamp_set(netdev, ifr);
1516 case SIOCGHWTSTAMP:
1517 return bfin_mac_hwtstamp_get(netdev, ifr);
1518 default:
1519 if (lp->phydev)
1520 return phy_mii_ioctl(lp->phydev, ifr, cmd);
1521 else
1522 return -EOPNOTSUPP;
1523 }
1524 }
1525
1526 /*
1527 * this puts the device in an inactive state
1528 */
1529 static void bfin_mac_shutdown(struct net_device *dev)
1530 {
1531 /* Turn off the EMAC */
1532 bfin_write_EMAC_OPMODE(0x00000000);
1533 /* Turn off the EMAC RX DMA */
1534 bfin_write_DMA1_CONFIG(0x0000);
1535 bfin_write_DMA2_CONFIG(0x0000);
1536 }
1537
1538 /*
1539 * Open and Initialize the interface
1540 *
1541 * Set up everything, reset the card, etc..
1542 */
1543 static int bfin_mac_open(struct net_device *dev)
1544 {
1545 struct bfin_mac_local *lp = netdev_priv(dev);
1546 int ret;
1547 pr_debug("%s: %s\n", dev->name, __func__);
1548
1549 /*
1550 * Check that the address is valid. If its not, refuse
1551 * to bring the device up. The user must specify an
1552 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1553 */
1554 if (!is_valid_ether_addr(dev->dev_addr)) {
1555 netdev_warn(dev, "no valid ethernet hw addr\n");
1556 return -EINVAL;
1557 }
1558
1559 /* initial rx and tx list */
1560 ret = desc_list_init(dev);
1561 if (ret)
1562 return ret;
1563
1564 phy_start(lp->phydev);
1565 setup_system_regs(dev);
1566 setup_mac_addr(dev->dev_addr);
1567
1568 bfin_mac_disable();
1569 ret = bfin_mac_enable(lp->phydev);
1570 if (ret)
1571 return ret;
1572 pr_debug("hardware init finished\n");
1573
1574 napi_enable(&lp->napi);
1575 netif_start_queue(dev);
1576 netif_carrier_on(dev);
1577
1578 return 0;
1579 }
1580
1581 /*
1582 * this makes the board clean up everything that it can
1583 * and not talk to the outside world. Caused by
1584 * an 'ifconfig ethX down'
1585 */
1586 static int bfin_mac_close(struct net_device *dev)
1587 {
1588 struct bfin_mac_local *lp = netdev_priv(dev);
1589 pr_debug("%s: %s\n", dev->name, __func__);
1590
1591 netif_stop_queue(dev);
1592 napi_disable(&lp->napi);
1593 netif_carrier_off(dev);
1594
1595 phy_stop(lp->phydev);
1596 phy_write(lp->phydev, MII_BMCR, BMCR_PDOWN);
1597
1598 /* clear everything */
1599 bfin_mac_shutdown(dev);
1600
1601 /* free the rx/tx buffers */
1602 desc_list_free();
1603
1604 return 0;
1605 }
1606
1607 static const struct net_device_ops bfin_mac_netdev_ops = {
1608 .ndo_open = bfin_mac_open,
1609 .ndo_stop = bfin_mac_close,
1610 .ndo_start_xmit = bfin_mac_hard_start_xmit,
1611 .ndo_set_mac_address = bfin_mac_set_mac_address,
1612 .ndo_tx_timeout = bfin_mac_timeout,
1613 .ndo_set_rx_mode = bfin_mac_set_multicast_list,
1614 .ndo_do_ioctl = bfin_mac_ioctl,
1615 .ndo_validate_addr = eth_validate_addr,
1616 .ndo_change_mtu = eth_change_mtu,
1617 #ifdef CONFIG_NET_POLL_CONTROLLER
1618 .ndo_poll_controller = bfin_mac_poll_controller,
1619 #endif
1620 };
1621
1622 static int bfin_mac_probe(struct platform_device *pdev)
1623 {
1624 struct net_device *ndev;
1625 struct bfin_mac_local *lp;
1626 struct platform_device *pd;
1627 struct bfin_mii_bus_platform_data *mii_bus_data;
1628 int rc;
1629
1630 ndev = alloc_etherdev(sizeof(struct bfin_mac_local));
1631 if (!ndev)
1632 return -ENOMEM;
1633
1634 SET_NETDEV_DEV(ndev, &pdev->dev);
1635 platform_set_drvdata(pdev, ndev);
1636 lp = netdev_priv(ndev);
1637 lp->ndev = ndev;
1638
1639 /* Grab the MAC address in the MAC */
1640 *(__le32 *) (&(ndev->dev_addr[0])) = cpu_to_le32(bfin_read_EMAC_ADDRLO());
1641 *(__le16 *) (&(ndev->dev_addr[4])) = cpu_to_le16((u16) bfin_read_EMAC_ADDRHI());
1642
1643 /* probe mac */
1644 /*todo: how to proble? which is revision_register */
1645 bfin_write_EMAC_ADDRLO(0x12345678);
1646 if (bfin_read_EMAC_ADDRLO() != 0x12345678) {
1647 dev_err(&pdev->dev, "Cannot detect Blackfin on-chip ethernet MAC controller!\n");
1648 rc = -ENODEV;
1649 goto out_err_probe_mac;
1650 }
1651
1652
1653 /*
1654 * Is it valid? (Did bootloader initialize it?)
1655 * Grab the MAC from the board somehow
1656 * this is done in the arch/blackfin/mach-bfxxx/boards/eth_mac.c
1657 */
1658 if (!is_valid_ether_addr(ndev->dev_addr)) {
1659 if (bfin_get_ether_addr(ndev->dev_addr) ||
1660 !is_valid_ether_addr(ndev->dev_addr)) {
1661 /* Still not valid, get a random one */
1662 netdev_warn(ndev, "Setting Ethernet MAC to a random one\n");
1663 eth_hw_addr_random(ndev);
1664 }
1665 }
1666
1667 setup_mac_addr(ndev->dev_addr);
1668
1669 if (!dev_get_platdata(&pdev->dev)) {
1670 dev_err(&pdev->dev, "Cannot get platform device bfin_mii_bus!\n");
1671 rc = -ENODEV;
1672 goto out_err_probe_mac;
1673 }
1674 pd = dev_get_platdata(&pdev->dev);
1675 lp->mii_bus = platform_get_drvdata(pd);
1676 if (!lp->mii_bus) {
1677 dev_err(&pdev->dev, "Cannot get mii_bus!\n");
1678 rc = -ENODEV;
1679 goto out_err_probe_mac;
1680 }
1681 lp->mii_bus->priv = ndev;
1682 mii_bus_data = dev_get_platdata(&pd->dev);
1683
1684 rc = mii_probe(ndev, mii_bus_data->phy_mode);
1685 if (rc) {
1686 dev_err(&pdev->dev, "MII Probe failed!\n");
1687 goto out_err_mii_probe;
1688 }
1689
1690 lp->vlan1_mask = ETH_P_8021Q | mii_bus_data->vlan1_mask;
1691 lp->vlan2_mask = ETH_P_8021Q | mii_bus_data->vlan2_mask;
1692
1693 ndev->netdev_ops = &bfin_mac_netdev_ops;
1694 ndev->ethtool_ops = &bfin_mac_ethtool_ops;
1695
1696 init_timer(&lp->tx_reclaim_timer);
1697 lp->tx_reclaim_timer.data = (unsigned long)lp;
1698 lp->tx_reclaim_timer.function = tx_reclaim_skb_timeout;
1699
1700 lp->flags = 0;
1701 netif_napi_add(ndev, &lp->napi, bfin_mac_poll, CONFIG_BFIN_RX_DESC_NUM);
1702
1703 spin_lock_init(&lp->lock);
1704
1705 /* now, enable interrupts */
1706 /* register irq handler */
1707 rc = request_irq(IRQ_MAC_RX, bfin_mac_interrupt,
1708 0, "EMAC_RX", ndev);
1709 if (rc) {
1710 dev_err(&pdev->dev, "Cannot request Blackfin MAC RX IRQ!\n");
1711 rc = -EBUSY;
1712 goto out_err_request_irq;
1713 }
1714
1715 rc = register_netdev(ndev);
1716 if (rc) {
1717 dev_err(&pdev->dev, "Cannot register net device!\n");
1718 goto out_err_reg_ndev;
1719 }
1720
1721 bfin_mac_hwtstamp_init(ndev);
1722 rc = bfin_phc_init(ndev, &pdev->dev);
1723 if (rc) {
1724 dev_err(&pdev->dev, "Cannot register PHC device!\n");
1725 goto out_err_phc;
1726 }
1727
1728 /* now, print out the card info, in a short format.. */
1729 netdev_info(ndev, "%s, Version %s\n", DRV_DESC, DRV_VERSION);
1730
1731 return 0;
1732
1733 out_err_phc:
1734 out_err_reg_ndev:
1735 free_irq(IRQ_MAC_RX, ndev);
1736 out_err_request_irq:
1737 netif_napi_del(&lp->napi);
1738 out_err_mii_probe:
1739 mdiobus_unregister(lp->mii_bus);
1740 mdiobus_free(lp->mii_bus);
1741 out_err_probe_mac:
1742 free_netdev(ndev);
1743
1744 return rc;
1745 }
1746
1747 static int bfin_mac_remove(struct platform_device *pdev)
1748 {
1749 struct net_device *ndev = platform_get_drvdata(pdev);
1750 struct bfin_mac_local *lp = netdev_priv(ndev);
1751
1752 bfin_phc_release(lp);
1753
1754 lp->mii_bus->priv = NULL;
1755
1756 unregister_netdev(ndev);
1757
1758 netif_napi_del(&lp->napi);
1759
1760 free_irq(IRQ_MAC_RX, ndev);
1761
1762 free_netdev(ndev);
1763
1764 return 0;
1765 }
1766
1767 #ifdef CONFIG_PM
1768 static int bfin_mac_suspend(struct platform_device *pdev, pm_message_t mesg)
1769 {
1770 struct net_device *net_dev = platform_get_drvdata(pdev);
1771 struct bfin_mac_local *lp = netdev_priv(net_dev);
1772
1773 if (lp->wol) {
1774 bfin_write_EMAC_OPMODE((bfin_read_EMAC_OPMODE() & ~TE) | RE);
1775 bfin_write_EMAC_WKUP_CTL(MPKE);
1776 enable_irq_wake(IRQ_MAC_WAKEDET);
1777 } else {
1778 if (netif_running(net_dev))
1779 bfin_mac_close(net_dev);
1780 }
1781
1782 return 0;
1783 }
1784
1785 static int bfin_mac_resume(struct platform_device *pdev)
1786 {
1787 struct net_device *net_dev = platform_get_drvdata(pdev);
1788 struct bfin_mac_local *lp = netdev_priv(net_dev);
1789
1790 if (lp->wol) {
1791 bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE);
1792 bfin_write_EMAC_WKUP_CTL(0);
1793 disable_irq_wake(IRQ_MAC_WAKEDET);
1794 } else {
1795 if (netif_running(net_dev))
1796 bfin_mac_open(net_dev);
1797 }
1798
1799 return 0;
1800 }
1801 #else
1802 #define bfin_mac_suspend NULL
1803 #define bfin_mac_resume NULL
1804 #endif /* CONFIG_PM */
1805
1806 static int bfin_mii_bus_probe(struct platform_device *pdev)
1807 {
1808 struct mii_bus *miibus;
1809 struct bfin_mii_bus_platform_data *mii_bus_pd;
1810 const unsigned short *pin_req;
1811 int rc, i;
1812
1813 mii_bus_pd = dev_get_platdata(&pdev->dev);
1814 if (!mii_bus_pd) {
1815 dev_err(&pdev->dev, "No peripherals in platform data!\n");
1816 return -EINVAL;
1817 }
1818
1819 /*
1820 * We are setting up a network card,
1821 * so set the GPIO pins to Ethernet mode
1822 */
1823 pin_req = mii_bus_pd->mac_peripherals;
1824 rc = peripheral_request_list(pin_req, KBUILD_MODNAME);
1825 if (rc) {
1826 dev_err(&pdev->dev, "Requesting peripherals failed!\n");
1827 return rc;
1828 }
1829
1830 rc = -ENOMEM;
1831 miibus = mdiobus_alloc();
1832 if (miibus == NULL)
1833 goto out_err_alloc;
1834 miibus->read = bfin_mdiobus_read;
1835 miibus->write = bfin_mdiobus_write;
1836
1837 miibus->parent = &pdev->dev;
1838 miibus->name = "bfin_mii_bus";
1839 miibus->phy_mask = mii_bus_pd->phy_mask;
1840
1841 snprintf(miibus->id, MII_BUS_ID_SIZE, "%s-%x",
1842 pdev->name, pdev->id);
1843 miibus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
1844 if (!miibus->irq)
1845 goto out_err_irq_alloc;
1846
1847 for (i = rc; i < PHY_MAX_ADDR; ++i)
1848 miibus->irq[i] = PHY_POLL;
1849
1850 rc = clamp(mii_bus_pd->phydev_number, 0, PHY_MAX_ADDR);
1851 if (rc != mii_bus_pd->phydev_number)
1852 dev_err(&pdev->dev, "Invalid number (%i) of phydevs\n",
1853 mii_bus_pd->phydev_number);
1854 for (i = 0; i < rc; ++i) {
1855 unsigned short phyaddr = mii_bus_pd->phydev_data[i].addr;
1856 if (phyaddr < PHY_MAX_ADDR)
1857 miibus->irq[phyaddr] = mii_bus_pd->phydev_data[i].irq;
1858 else
1859 dev_err(&pdev->dev,
1860 "Invalid PHY address %i for phydev %i\n",
1861 phyaddr, i);
1862 }
1863
1864 rc = mdiobus_register(miibus);
1865 if (rc) {
1866 dev_err(&pdev->dev, "Cannot register MDIO bus!\n");
1867 goto out_err_mdiobus_register;
1868 }
1869
1870 platform_set_drvdata(pdev, miibus);
1871 return 0;
1872
1873 out_err_mdiobus_register:
1874 kfree(miibus->irq);
1875 out_err_irq_alloc:
1876 mdiobus_free(miibus);
1877 out_err_alloc:
1878 peripheral_free_list(pin_req);
1879
1880 return rc;
1881 }
1882
1883 static int bfin_mii_bus_remove(struct platform_device *pdev)
1884 {
1885 struct mii_bus *miibus = platform_get_drvdata(pdev);
1886 struct bfin_mii_bus_platform_data *mii_bus_pd =
1887 dev_get_platdata(&pdev->dev);
1888
1889 mdiobus_unregister(miibus);
1890 kfree(miibus->irq);
1891 mdiobus_free(miibus);
1892 peripheral_free_list(mii_bus_pd->mac_peripherals);
1893
1894 return 0;
1895 }
1896
1897 static struct platform_driver bfin_mii_bus_driver = {
1898 .probe = bfin_mii_bus_probe,
1899 .remove = bfin_mii_bus_remove,
1900 .driver = {
1901 .name = "bfin_mii_bus",
1902 },
1903 };
1904
1905 static struct platform_driver bfin_mac_driver = {
1906 .probe = bfin_mac_probe,
1907 .remove = bfin_mac_remove,
1908 .resume = bfin_mac_resume,
1909 .suspend = bfin_mac_suspend,
1910 .driver = {
1911 .name = KBUILD_MODNAME,
1912 },
1913 };
1914
1915 static int __init bfin_mac_init(void)
1916 {
1917 int ret;
1918 ret = platform_driver_register(&bfin_mii_bus_driver);
1919 if (!ret)
1920 return platform_driver_register(&bfin_mac_driver);
1921 return -ENODEV;
1922 }
1923
1924 module_init(bfin_mac_init);
1925
1926 static void __exit bfin_mac_cleanup(void)
1927 {
1928 platform_driver_unregister(&bfin_mac_driver);
1929 platform_driver_unregister(&bfin_mii_bus_driver);
1930 }
1931
1932 module_exit(bfin_mac_cleanup);
1933
1934
This page was automatically generated by LXR 0.3.1 (source). • Linux is a registered trademark of Linus Torvalds • Contact us
|
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Entries in a hash are often referred to as key-value pairs. Entries with duplicate keys are overwritten with the values from each other_hash successively if no block is given. By using our site, you brightness_4 These built-in enumerates include methods like `map`, `uniq`, `include?`, as well as several others. What we'll cover Now that our server supports Lists, the next data type we will add support for is Hashes. A Hash has certain similarities to an Array, but: An Array index is always an Integer. If you ask for an index that is bigger than the array size you’ll get a nil value. Take this quiz to get offers and scholarships from top bootcamps and online schools! By the way, the Ruby community has come up with the name hash rocket for thebit of syntax =>which separates a key from a value, … we think that … If no block is given, an enumerator is returned instead. And each box can hold one thing or value, which can be retrieved using the key for that … The each_with_index() of enumerable is an inbuilt method in Ruby hashes the items in the enumerable according to the given block. irb :003 > person = { height: '6 ft', weight: '160 lbs' } => {:height=>'6 ft', :weight=>'160 lbs'} It is very similar to an array, but the value of the key (index) is not limited to an integer value; it can be of any object type: a string, a symbol, etc. Là on va arrêter de radoter ! Let’s see an example: Notice that sort will return a new arraywith the results. The reason is that each_with_index yields 2 elements to the block, and you need to deconstruct the first element (a tuple of key and value) explicitly. The simplest approach is to turn each array item into a hash key pointing at an empty value. Parcourir un hachage ne se fait pas du tout de la même manière que parcourir un tableau. The first one makes the new entry point at the old head of the list. En Perl, il y a un moyen facile (et rapide) de faire ceci: my @array = qw( 1 2 3 ); my %hash; @hash{@array} = undef; Cela génère un hachage qui ressemble à: James has written hundreds of programming tutorials, and he frequently contributes to publications like Codecademy, Treehouse, Repl.it, Afrotech, and others. Posted by: admin December 2, 2017 Leave a comment. Ruby | Enumerable each_with_index() function, Ruby | Enumerable collect_concat() function, Data Structures and Algorithms – Self Paced Course, Ad-Free Experience – GeeksforGeeks Premium, We use cookies to ensure you have the best browsing experience on our website. For example: $ ri -T Array Array < Object ----- Includes: Enumerable (from ruby site) (from ruby site) ----- Arrays are ordered, integer-indexed collections of any object. A new array can be created by using the literal constructor[]. Method description: This method is a public instance method that is defined in the ruby library especially for Hash class. Each box has a name, which is the the key. There are many ways to create or initialize an array. This is how it looks: This defines a Hash that contains 3 key/value pairs, meaning that we can lookup three values (the strings "eins", "zwei", and "drei") using threedifferent keys (the strings "one", "two", and "three"). It is similar to an … It looks like this: letters[4] # nil A nil value is Ruby telling you: “I can’t find what you want so here is a generic response” And just like strings, arrays have a set of methods you can use to make them do things. This creates an associative representation of data. A situation where the Ruby Array object’s .collect method works great. Class: Hash (Ruby 2.7.2), Ruby - Hashes - A Hash is a collection of key-value pairs like this: employee = > salary. Using the same general code, fetch and loop through the tweets again. Learn Ruby: Arrays and Hashes Cheatsheet | Codecademy ... Cheatsheet Hash. Eventually, you’ll want to iterate through each item in an array or hash to extract or transform the information in these data structures. A hash is like an array in that it's a variable that stores other variables. At the end of the previous chapter, we used crack to parse a sample XML file of tweets.. Unlike arrays, there are no numerical indexes, you access the hash values with keys. One way to visualize a Hash is as a virtual collection of boxes.
Spray Paint Primer, Castlevania Why Does Death Serve Dracula, Wake Forest Radiology Faculty, Java Regex Online, Tsb News Release, Edd Investigation Division, Zenith Bank Branch Code, Fairleigh Dickinson University Jobs,
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I have inherited a Novell Netware 6.5 server to manage. We had have some users move folders into other folders that they were not supposed to be able to do. Additionally, there have been cases were it would be nice to view a log of when a user last logged into the directory, if they are currently active, etc. I was curious where logs files are generally located within a Novell Netware 6.5 server exist? Is there anything special needed to access them? How does one enable additional logging in the event that the items that need to be logged now are not being logged?
I know that Netware 6.5 is the older product line; however, that is what I am stuck with for the moment. Thank in advance.
2 Answers 2
3
Moving folders into others is not logged. There are audit tools, but if you enable them, the volume of data generated will astound you. File operations happen far more often than expected and will fill any space you make available.
Easy way is look in the directory for any salvageable files. If the folder is not there, then you know it was moved. Then you have to find it, which is a pain but not that hard.
Last login is stored on the object as lastLogin I think in eDirectory.
Currently active users will have a value in Network Address. Including the source address (many protocols supported there, IP, IPX, DLC/LLC, and AppleTalk so the format is non-trivial, but ConsoleOne parses it properly)
Additional logging depends on what you need. For login/logout on Netware, the gold standard is still AuditLogin by Condrey Consulting and is fairly cheap and easy to use.
For more comprehensive, you can go as high as Sentinel for all sorts of things.
There are three levels of Sentinel, all using the same basic infrastructure. Sentinel is the full product with Correlation that is very powerful and way to hard to explain here.
Sentinel RD (Rapid Deploy) is more of a single server version, and a bit cheaper. Next releases will move to this approach, but making it easier to use a multi tiered setup, which is hard with the RD approach right now. Focused more on a single server instance.
Sentinel Log Manager is meant just to collect events and not do correlation nor a bunch of the fancier things that Sentinel full does.
They come in different event per second (eps) licenses. More expensive the more events you get. You can collect events from all sorts of devices.
Sentinel LM can filter and pass events up to Sentinel (full), to reduce and distribute the load better.
The new reporting in Novell's (NetIQ's now?) Identity Manager uses a sort of packaged Sentinel LM instance to collect events and can forward to other Sentinel systems as well.
1
Boy, it has been a while since I played with NetWare (was 5x MCNE), but I don't recall any such logs being there by default unless you added auditing software, like Novell Identity Audit (NIA), separate from NetWare's base install.
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The tag has no wiki summary.
learn more… | top users | synonyms
4
votes
1answer
78 views
Are epimorphisms (defined via an obvious action) of free Boolean algebras whose set of generators is a group automorphisms?
Let $G$ be a group. Consider $B$, the free Boolean algebra with generating set (I'll call them "variables") $G$. Let $F$ be some formula (that is, some fixed element of $B$). Define an endomorphism ...
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5
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5
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5
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4
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4
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4
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224 views
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4
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3
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3
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3
votes
0answers
121 views
Minimality of time-t minimal flows
This question is mainly motivated by the question Transitivity of a flow and its time-1 map Let $M$ be a closed smooth manifold and $\Phi\colon\mathbb{R}\times M\to M$ be a smooth minimal flow, i.e. ...
3
votes
0answers
506 views
Untwisting the Cohomology with Twisted Coefficients
This question is set on a finite $2$-group $G$ and a subgroup $H$ of index $2$ (but perhaps the question could be answered for arbitrary orders/indexes). It was asked here on MO whether ...
3
votes
0answers
221 views
Finding generalised Lyndon words
Let $\Sigma = \lbrace a_1, \ldots, a_n, A_1, \ldots A_n \rbrace$ (where $A_i = a_i^{-1}$) and $\prec$ be a total ordering on $\Sigma$. Let $\Sigma^*$ be the set of all words (generated by the ...
2
votes
0answers
156 views
Exotic actions of hyperbolic groups
Let $G$ be a hyperbolic group acting faithfully on $\mathbb{Z}$ such that: The action is highly transitive - it is $k$-transitive for each $k \in \mathbb{N}$. For every quasiconvex subgroup $H \leq ...
2
votes
0answers
154 views
A possible generalization of the Borsuk Ulam theorem via action of symmetric groups
The symmetric group $S_{m}$ is equiped with the counting Har measure $\mu$ and the obvious sgn character. Assume that $S_{m}$ acts on $S^{n}$, $n\geq m-1$ and $f:S^{n}\to \mathbb{R}^{n}$ ...
2
votes
0answers
102 views
A topological space extracting from a group action
Let $G$ be a compact abelian topological group with invariant measure $\mu$ which acts on a compact Hausdorff space $X$. A $G$-odd function is a continuous function $f:X\to ...
2
votes
0answers
135 views
Diffeomorphism between open annuli preserving common symmetries
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2
votes
0answers
78 views
Ergodic actions with co-finite stabilizers
Let $G$ be a locally compact, second countable group acting on a standard probability space $(X,\nu)$, and let $\nu$ be $G$-invariant. Let $G_x = \{g \in G\,:\, gx=x\}$ denote the stabilizer of $x \in ...
2
votes
0answers
208 views
2 questions on Nagata's counterexample; $k[f_1,…,f_r]=k[g_1,…,g_s]$ vs. $k(f_1,…,f_r)=k(g_1,…,g_s)$
Let $\{a_{ij}\}$ for $i=1,2,3$, and $j=1,...,16$ be algebraically independent elements over some prime field. Let $k$ be a field containing all $a_{ij}$. Then consider $k^{16}$ as $k$-vector space and ...
1
vote
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166 views
Rational conjugation of elements of a finite group
Let $G$ be a finite group. Two elements $x$ and $y$ of $G$ are said to be rationally conjugate, written $x \sim_{r} y$, if and only if $\langle x\rangle$ and $\langle y\rangle$ are conjugate subgroups ...
1
vote
0answers
113 views
Non invertibility of certain integral arising from group action
Let a compact topological group $G$ with invariant measure $\mu,$ acts on a simply connected compact topological space $X$ and $\rho$ is a $n$-dimensional unitary representation of $G$. ...
1
vote
0answers
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Actions and representations of profinite groups
Let $p$ be a prime number, and denote by $\mathbb{Z}_p$ the additive profinite group of p-adic integers. Let $G$ be a finitely generated profinite group of order coprime to $p$, and $V = ...
1
vote
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132 views
When a Whitney stratification has no stratum of codimension one?
Let $G$ be a compact Lie group, and $M$ be a smooth $n$-dimensional $G$-manifold which admits an orientation preserving the $G$-action. Then $M$ has a natural Whitney stratification induced by the ...
1
vote
0answers
78 views
Smoothing of a hyperquotient singularity
Let $f$ be a polynomial in $k$ complex variables, and suppose the affine variety $V$ given by $f = 0$ has an isolated singularity at the origin, but is otherwise smooth. Now assume that some cyclic ...
1
vote
0answers
88 views
invariant lines avoiding fixed subvarieties
Could anybody help me with the following question ? Assume we are given: (1) a finite order (linear) automorphism $g$ of the complex projective space $\mathbb{P}^r$, (2) a closed algebraic ...
1
vote
0answers
177 views
Faithful actions of finite groups on topological spaces
Suppose that $G$ is a finite group acting faithfully on a topological space $X$. In the smooth setting, one can deduce that for each $x$ in $M$, the induced map $$G_x \to Diff_x\left(M\right)$$ from ...
1
vote
0answers
467 views
Questions on orbit properties of group action on varieties
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0
votes
0answers
84 views
Adelic integral factorization
In order to calculate Tamagawa numbers, I need to justify that for a nice (say Schwartz-Bruhat) function, the following identity holds : $$\int_{\mathbf{A}^2} f(x)dx = \int_{SL_2(\mathbf{A})/SL_2(K)} ...
0
votes
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Invariant subsets of a local action
I have also asked this in MSE, but it seems to me that my question wasn't very well received there and I think someone in here will be able to answer it more quickly, hence this post. I don't ...
0
votes
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Stable analytic manifold under simple action
For an integer $m > 1$, let us define the action $$ f: X_i \to (1+X_i)^{m} - 1 $$ on $C[[X_1,...,X_N]]$, where $C$ is the complex number field. Consider the analytic manifold $V(I)$ defined by the ...
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automorphisms acting trivially on projective spaces
Let $K$ be a field and $\mathbb{P}=\mathbb{P}^n_K$ the projective space of dimension $n$ over $K$. Consider a linear automorphism $g$ of $\mathbb{P}$. Is it true that $g^\ast$ acts trivially on ...
0
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0answers
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inertia stratification
Let $X$ be a nice algebraic variety (say smooth, projective) over a field of characteristic 0. Let $G$ be an abelian group acting on $X$. For each subgroup $H$ of $G$, denote by $X^H$ the closed ...
0
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fixed points and the cycle index
Let $C_n$ be the cyclic group of order $n$ acting on a finite set $X$ and let $Z(C_n, X; p_1,p_2,\dots)$ be the cycle index of the corresponding permutation group. I wonder whether the knowledge of ...
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#1
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Which language and what recommended book for game programming
Hi,
I want to write games, i know some programming language like java, c or c++, a little c#, but i have no experience in the field of game programming, so could you give me some suggestion about the language and the corresponding book.
Thank you very much.
2. #2
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there is too much to recommend. Basically, i recommend anything by Andre Lamothe.
There are many API's which you can use for game programming. I recommend you learn more about gaming before starting.
google, is your friend
"Computer games don't affect kids; I mean if Pac-Man affected us as kids, we'd all be running around in darkened rooms, munching magic pills and listening to repetitive electronic music."
- Kristin Wilson, Nintendo, Inc., 1989.
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ece34605c058195ed03b4d393ef1a36c
|
-1,234,617,161,182,068,500 |
1. This site uses cookies. By continuing to use this site, you are agreeing to our use of cookies. Learn More.
PCI Express
Discussion in 'Hardware' started by noelg24, Sep 17, 2004.
1. noelg24
noelg24 Terabyte Poster
3,334
26
139
Probably a dumb question to ask but I take it PCI Express cards can be used in the normal PCI slots of mobos? or have they decided to put a certain PCI slot for these new cards?
Certifications: A+
WIP: my life
2. Phoenix
Honorary Member
Phoenix 53656e696f7220 4d6f64
5,726
175
221
um, they use a completly new interface
and i dont believe they can be used in standard PCI slots
|===| <--- PCI Express Slot
|========== ===| <---- PCI Slot
approxamatly
Certifications: MCSE, MCITP, VCP
WIP: > 0
3. noelg24
noelg24 Terabyte Poster
3,334
26
139
:eek: wow that small? and yet they call it express...I wonder whats so express about the size of that? thanks mate...
Certifications: A+
WIP: my life
4. Fergal1982
Fergal1982 Petabyte Poster
4,196
171
211
the express part comes from the fact that the data transfer rate of PCI express is a whopping 16GB/s compared to the piddly 132MB/s in standard PC PCI bus, and the moderate 2.1GB/s for an 8xAGP bus.
two related questions for you guys though. i know PCI express is affecting graphics cards, but are they still dedicated (ie separate from the main PCI bus), and whats the data transfer like on them?
and the second question (third actually, i know). why arent we using hypertransport instead of PCI express, given that it actually exists, and has a 12.8GB/s transfer rate!
Fergal
Certifications: ITIL Foundation; MCTS: Visual Studio Team Foundation Server 2010, Administration
WIP: None at present
5. Phoenix
Honorary Member
Phoenix 53656e696f7220 4d6f64
5,726
175
221
they still use dedicated sltos really
partly because most mobo makers are making boards with a few PCIe 1x slots, and one PCIe 16x slot
obviously most dedicate the 16x slot for the graphics card
cant answer the other one :)
Certifications: MCSE, MCITP, VCP
WIP: > 0
6. Fergal1982
Fergal1982 Petabyte Poster
4,196
171
211
i spose its a case of keeping a better one in reserve till PCI express is saturated the market. although by that point its of little consequence cause we will most likely have a faster alternative to jump to!
thanks though phoenix. (PCIex16 huh? thats......... 256GB/s transfer rate. bloody hell thats gonna be fast!)
Fergal
Certifications: ITIL Foundation; MCTS: Visual Studio Team Foundation Server 2010, Administration
WIP: None at present
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ece34605c058195ed03b4d393ef1a36c
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-3,526,026,163,364,308,000 |
Nginx做代理路由时,不转发http的header问题
转载请注明, 原文地址:Nginx做代理路由时,不转发http的header问题
目前流行的 token 登录验证,常在 http 的 header 中添加 token 参数。
在部署项目后,发现无法获取到 http 头,拿不到 token 值,而通过ip端口直接访问则可以正确获取,怀疑是 Nginx 代理问题,查找原因后得知。
Nginx 会默认忽略含有 “_” 的 header 参数,而 token 值的参数名恰好含有 “_” 符号,需要手动开启转发。
具体修改:
在 nginx.conf 中,修改 http 内容,添加一行
underscores_in_headers on;
例:
http {
underscores_in_headers on;
server {
listen 80;
}
}
重启 Nginx 后可以正常获取 token
转载请注明:
转载自YuLai's Blog,原文地址:Nginx做代理路由时,不转发http的header问题
发表评论
发表回复
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沙发空缺中,还不快抢~
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O2 Community
Get help, share tips and chat
Reply
Level 1: Joiner
Posts: 2
Registered: 29-08-2012
Problem to unlock my iPhone 4
Hi,
I tried several time to unlock my iPhone 4 and always get 2 messages back from O2:
"Thank you for your iPhone unlatching request.
I'm sorry, we have not been able to unlatch your iPhone at this time.
The reason given is: Sorry, you have not passed our security checks with
the information that you have provided. Kindly check that you have
provided the correct information.
Thank you,
O2 Customer Service"
OR
"Thank you for your iPhone unlatching request.
I'm sorry, we have not been able to unlatch your iPhone at this time.
The reason given is: An IMEI has not been provided
Thank you,
O2 Customer Service"
BUT these messages are wrong, I provided the exact information and the IMEI number.
Can you tell me what am I doing wrong? It is really annoying !
Thank you.
Posts: 14,084
Topics: 243
Kudos: 1,224
Solutions: 1,061
Registered: 13-08-2008
Re: Problem to unlock my iPhone 4
Are you on contract or payg?
If on contract ring o2 202 for free and explain the issue
If on payg it will cost to ring o2 but again worth doing 4445 25p a call from your mobile.
If you are out of the country that could be an issue but it can be done.
iPhone 6s 64gb on 4g 30gb tariff
iPad Air 2 wifi-4g 64gb refresh
My first mobile was in 1995 a CM-R111 from sony on Cellnet.
Henstridge Rural South Somerset (still 2g only and it is 2016)
Level 1: Joiner
Posts: 2
Registered: 29-08-2012
Re: Problem to unlock my iPhone 4
I am on Pay&Go so I will try the number thank you
Level 1: Joiner
Posts: 2
Registered: 30-08-2012
Re: Problem to unlock my iPhone 4
I am having the same problem, i live in spain and purchased a second hand 3gs, i have a uk o2 sim so didnt think it would be too much hassle but after 3 attempts i keep getting the unable to unlatch as the imei and number arent registered? have i brought a dodgy phone ( it makes and recieves calls etc so im guessing not ) or am i doing something wrong ?
Posts: 44,412
Topics: 387
Solutions: 2,534
Registered: 04-01-2009
Re: Problem to unlock my iPhone 4
[ Edited ]
O2 can't associate the phone with the IMEI because the sim has not been used on the O2-UK network. The phone isn't dodgy, it needs to be used in the UK to register the IMEI before O2/Apple can unlock it.
Level 1: Joiner
Posts: 2
Registered: 30-08-2012
Re: Problem to unlock my iPhone 4
oh ok thanks, for a moment i thought id brought a dodgy phone !
I am flying back to the uk in a few days so i will be using it there anyhow, so that should solve the problem.
Thanks for the info, much appreciated Smiley Happy
Posts: 44,412
Topics: 387
Solutions: 2,534
Registered: 04-01-2009
Re: Problem to unlock my iPhone 4
That's good and saves you a lot of problems. Just make a couple of alls and send a text or so. If it's P&G you obviously need £15 credit on the phone when you fill in the unlock form.
|
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$500 Gaming PC – Pentium G4560 – Part 2
Hello and welcome to Tech Deals – Part 2 of the $500 Pentium G4560 custom build video series . This is the behind the scenes “Why” VLog my detailed explanation for all the choices and in-depth conversation on 2 cores vs 4 cores alternative options you might consider and my general thoughts on $500 gaming machines . Now if you have not seen Part 1 or you want a short version of this video in the video description below will be the full playlist of this video series , Part 1 is much shorter if you just want a summary of the parts , the prices generally why I chose them , a couple of alternatives and you want me to get to the point more quickly go watch Part 1 .
This is gonna be a long video so sit back grab a cup of coffee or some popcorn or a snack and relax because i’m going to talk for a while but this is meant to be an in-depth video for somebody who really wants to get an idea of my thought process behind various choices and where I see the computer gaming business been in 2017 . After this video is going to be Part 3 – The Build, where I actually put all of these parts together that’s going to be a step-by-step build , you’ll be able to follow along if you want to build it yourself after that is going to be Windows installation , Windows performance review , game performance reviews in many more comparisons this will be a staple throughout 2017 for me for upcoming comparisons to unreleased processors such as the upcoming 4-Core or 8-Thread chips from AMD .
So if you’re still with me awesome welcome ! And if you’re not well then you didn’t hear that anyway side note i’m not going to be putting a lot of words on the screen because this is a long video it would take forever to edit if I did that however if any of you are interested in providing captions either in English or another language , I do have my video setup to accept contributions , you can do so somewhere on the YouTube page below you can submit captions where you can actually type-up what I’m saying is words that will appear as I’m saying it you submit them i can see it all approve it and then i’ll give you credit in the description below for doing so . So if perhaps English is not your first language and you want to help out people in your country i would certainly appreciate it if that’s something that you would like to do . The first thing i want to address is the elephant in the room , 2 Core processor in 2017 .
Now I don’t have an objection to a 2 Core processor in general , if I just needed a computer for basic web browsing , watching videos , editing some documents in Microsoft Office Word , Excel , Powerpoint if I just needed a computer that was just gonna maybe too casual games play League of Legends and Rocket League this cpu is all you need in fact even this graphics card is overkill you don’t have to spend all this money . So if that’s your goal a 2 Core CPU is fine the only issue is if that’s your goal this is fine this computer here is a Dell optiplex minitower that i bought off of ebay for about $130 now I’ve done a video on $250 gaming machines i will link that in the video description below this is a six-year-old computer it is an Intel i5-2400 processor , 4-Cores 4-Threads at GHz .
Now it has a little bit of a turbo speed above that but count on GHz especially if you’re using all four cores . This brand-new 7th generation that’s 2nd so there’s five generations of gap between them 7th generation processor is GHz but it’s 2-Cores 4-Threads so it presents itself as a four core processor to Windows but it’s not there’s actually only two math execution units , you can really only do two things at once what the extra threads do what the hyper-threading does is it allows the processor to accept four instructions from Windows at one time maybe your game , maybe you’re multitasking , it lets Windows send four tasks to the processor and then the processor figures out the best order in which to execute them .
It often can provide a speed bump over a true 2-Core processor , if this was just a 2-Core 2-Thread processor it would be a bit slower hyper-threading is no substitute for real cores the i5 processor in this six-year-old machine has four real instruction units you can actually execute four things at once this can actually only do two things at once .
Do you want to play Battlefield-1 ? Grand Theft Auto 5 ? Do you want to play modern games that really do use four cores ? They will run smoother on this at GHz than they will on this at or at least I believe they will anyway i will test this in the game performance videos i’ll be doing on this not only will i compare it to modern quad-core processors , i will compare it to a six-year-old quad-core processor to answer the question do you buy this and turn it into a budget gaming machine or do you build a new one now this may not be an option where you live maybe you’re not the United States , maybe the prices have gone up for the week you wanted to go look there weren’t too many for sale .
I will say that over the past six months they have been consistently available on ebay in the United States at least that is because the optiplex line from dell is a business machine . These are all coming off these businesses had these least for between three to five years , these were all in offices and they’re coming off of lease and they’re available by the thousands well the leasing companies don’t want them so they saw them to refurbishers who take them , clean them up , make sure they power on and work and they sell them either strip with no hard drive or they put a hard drive and they put some RAM in and they sell them on ebay for between $100 to 150$ depending upon what’s included with a RAM , Drive , etc . Now it is true that this maybe six years old however the reality is Intel processors are only getting a 5% to 10% improvement in instructions per clock cycle per generation , now that adds up overtime in the six generations between 2nd gen and 7th gen , there’s probably a 35% to 40% improvement in instructions per clock cycle this is GHz , that’s and this does more per gigahertz than this does if you’re playing a game that only uses two threads this Pentium G4560 is undeniably faster than this CPU will be .
If you want to play an online MMO such as Star Wars – The Old Republic which I have a lot of experience with it only uses two threads . Star Wars – The Old Republic will be dramatically and noticeably faster on this CPU then it will be on this computer , i can speak from personal experience in that regard I’ve tried playing it on these and it’s not that great of an experience . That being said do you want to play Battlefield-1 and Grand Theft Auto 5 ? they run better on this they really do use four cores and there’s just no substitute for having four real cores it also has more level 3 cache and some other features in it that the Pentium budget CPU’s don’t have . But wait you say you want four real processing cores and a modern architecture I’ve got two options for you . No. 1 – This is a $500 build , the CPU is $65 of that the modern version of the i5-2400 is the i5-7400 it runs at upto GHz just like this chip does and it’s a 7th generation chip exactly as efficient as this but with four real processing cores , $180 .
It’s $115 more than this chip so this $500 build becomes $615 with the i5 that i5 chip will work just fine on this motherboard you don’t have to change it it’ll work great with this graphics card no need to change it worked great with the power supply change nothing , it comes with the intel stock heatsink and fan it’s plenty for a GHz chip so for $115 more or roughly 20% of the price because going from $500 to $615 is roughly I know it’s not exact but roughly 20% more money doubles your core count , it goes you for two cores to four and then you really can run Battlefield-1 , Grand Theft Auto 5 , The Witcher 3 and others well on this machine .
That’s your first choice your second choice is this computer , this is $450 Acer aspire t desktop computer i have previously reviewed this link to that in the video description below , this is an updated version of that computer the one review before was an i5-6400 they now have an i5-7400 by that version it’s faster . So , $450 and you get a complete brand-new under warranty ready-to-run computer 8 gigabytes of ram , 2 terabyte hard-drive , 300W power supply and the i5-7400 and you don’t have to build it it comes with basically everything you see here a little bit less power supply , little bit smaller case but essentially it’s largely the same computer no graphics card , it’s just using the integrated graphics .
Now the integrated graphics on the i5-7400 is the HD 630 and that will run Rocket League , Dota 2, Counter Strike – Global Offensive , League of Legends , Minecraft perfectly but if you want to play Battlefield-1 and Grand Theft Auto 5 you need to add a graphics card . Unfortunately you cannot add this card and it’s not because of the power supply , this is that graphics card this is the RX-470 4 GB ASUS Republic of Gamers STRIX graphics card , it does not physically fit into that machine it’s too long , it’s simply too big , i have multiple RX-470’s i have the MSI Armor , i have an XFX card none of them fit into either of these pre-builds even if you replace the power supply the drive cages are in the way , the cables are in the way , the cases are just too small for this card , I have not yet found a 470 that fits .
Now , price to performance the 470 cannot be beaten for 150$ this is an incredible value for the money however if you want to skip building and you don’t want to go old , i have another option for you and that is this this is the EVGA Geforce GTX 1060 3 GB superclocked card $200 it is $50 more expensive than this card . It’s 10% faster give or take Its 25% more money for 10% more speed from a dollars to performance perspective the 1060 is not as good of a deal as the 470 .However, notice anything ? Yeah, this fits perfectly in both of these machines in addition it runs perfectly both of those machines because I’ve had it in both of these machines if you’ve seen any of my generational comparisons , this is actually the computer that i tested when I did Grand Theft Auto 5 GTX 1060 i5-2400 vs i5-6500 this is the card well actually i think i’m going to use the 6 gigs version but i have both the three in the 6 gigs version this is the machine i used it runs fine in here I did not replace the power supply , i used one of these and this comes with the card , this comes with the EVGA card now it does not come with all 1060’s but it does come with the EVGA cards .
This is a two molex connector to one 6-pin PCI Express power connector this plugs into the top of the card and then plugs into the power supply furthermore not all of the i5-2400’s are going to handle it but i can promise you that the acer aspire t will . The acer aspire t comes with a 300W power supply and it comes with the two molex connectors inside you will need to use this i have actually had this exact card in that exact machine for more than two months . This is actually a spare , inside this right now is another one of these plugs into the two molex’s . I pulled this out to make this video , this was in there an hour ago . It runs perfectly you do not have to replace the power supply in the acer aspire t in order to make a GTX 1060 work it’s plenty that 300W comes with is all you need . Yes , some people will say – “But I want to be sure so I’ll go out and spend $35 on the power supply and put it in there.” You can don’t waste your money , use this I promise you have used it for months and months and months that works just fine my kids game with this thing it really it’s doesn’t pull that much power .
Now , some of the pre-built i5-2400’s come with 260W to 280W power supplies some don’t . I have an HP that came with a 265W power supply but i have a Lenovo computer that came with I think it was a 180W power supply that had to be changed so if you follow my link in the video description below to ebay to take a look at the i5-2400 machines or you follow the link in the video description below to my video on how to make a $250 to $300 gaming computer .
Some of them will need a power supply change and some won’t and some you won’t know until you buy the thing . Now , that’s a $35 power supply and that will fit into almost any minitower pre-built that you buy , not all but most someone ovos and some older compact machines don’t have standard motherboard power connectors and require an adapter cable you can get those off of ebay or amazon for $10 but they do require an adapter . Dell’s and HP’s are generally standard 24-pin ATX power connectors , if you can the Dell optiplex is a wonderful i have had excellent luck with these machines , i own three…four of them now . Now I use most of these from my office but not all these are gaming machines i love them because for general office tasks for $120 , $130 it’s all we really need in order to run office web browsing etc . It’s a great value for the money .
Now this does bring up a worthwhile point $450 let’s say you want a new one . $450 plus $200 for this card is $650 . Now you don’t need anything else , two terabyte drive eight gigs of RAM you can upgrade 16 if you want you know cost you fifty dollars or so but you’re looking at $650 for this combination . You can build this machine for $615 with the i5-7400 and many of you may immediately say wait a minute ! I get a little bit bigger case , i get a more powerful power supply , i get to custom build it and it’s less expensive maybe this graphics card is in fact about 10% slower so you are getting a little bit less graphics performance but it’s minor i would not lose any sleep over that. That computer comes with keyboard , mouse , Wi-Fi , a DVD drive , a legal copy of Windows and it’s built and you don’t have to mess with it this you have to build and my $615 price does not include Windows , Wi-Fi adapter , DVD Drive , keyboard , mouse and you have to build it and provide support if you built this and have a problem with you have no one to complain to , if you order this off of amazon plug it in and turn it on and it doesn’t work amazon have another one on your doorstep in 24 to 48 hours it’s not your problem and no pay return shipping and you don’t have to care .
Now if you don’t live in the United States and these are not options for you , I understand one of the reasons i’m doing this video is because some people either want to build their own machine or they plan to upgrade in the future or they just don’t want one of these and that’s fine I understand that. My personal computer is always going to be a custom-built machine you know i have several these for work and for home two of my kids have these because they’re simple and cheap and they are kids and they don’t care but you know when they get older they’ll custom-build I’m sure but for the money these are very compelling arguments if you aren’t married to building a machine.
If you consider this a chore , go this route if you consider this fun go ahead and build by all means you learn more about your computer you can make it a fun Saturday activity it really doesn’t take that long even if you’ve never built a computer before , two … maybe four hours if you really take your time and look up everything slowly now when i do the build video of this i am going to go slow enough so that you can follow along yourself , some of my build videos have been faster than others have done some very long ones , i’ve done some shorter ones , this one I’m going to do so you can follow along it’ll probably be 45 minutes to an hour long but the goal is you prop up your phone your iPad or put it on your television and you can watch the build while you’re building and follow along go “aww that’s how I put that together”, “that’s what I do okay fair enough.” One final point about playing games and this build specifically.
This is the Pentium G4560 CPU for $65 now if you buy this and you want to play games i highly recommend you add a graphics card now if you want to play more relaxed casual games and you want to save some money you can certainly go with an RX-460 but the price between the 460 and the 470 are relatively close and i do want to make an important point the 470 is in general double the performance of the 460 , not just 50% faster not just a bit it’s double its two 460’s . The RX-460 4GB graphics card is generally going to run you about a $100 this is going to run you $150 so it’s 50% more expensive for 100% more performance that’s a deal, but wait you say you don’t want to play Battlefield-1 you’re going to go ahead and get the Pentium because you don’t want to play all the latest and greatest games you want to maybe be a more casual player let me offer you an alternative delete the graphics card completely and spend a little bit more and get the Pentium G4600 .
It’s $90 so you’re going to spend $25 more on the CPU but you double the integrated graphics performance the Pentium G4560 the CPU right here for $65 has the Intel HD 610 graphics . The G4600 for $25 more has the HD 630 in short the 630 is almost double the performance of the 610 if your buying or if you’re building this because you primarily want to play League of Legends , Dota 2 , Counter Strike – Global Offensive , Rocket League , Minecraft , the HD 630 is all you need, the 610’s a little weak delete the graphics card spend $25 more on your cpu and get double the integrated graphics performance . I will do performance comparisons on the HD 610 vs 630 . I’ll use an i3 CPU to get a 630, because all the i3’s have a 630 in them I will down clock it to match the clock speed now when you do spend the money the extra $25 you also get an extra 100 MHz of clock speed its instead of that is a trivial difference you will never ever notice don’t don’t make the upgrade for the extra 100 MHz do it for the double integrated graphics performance it’s not a factor if you’re going to install a graphics card so if you build this and put a graphics card in don’t waste your money on the 4600 just get the 4560 it’s really all you need unless you want the better integrated graphics .
One point i would like to make about this motherboard , this is a great value for the money for $65 this is a good B250 motherboard but it’s a very basic motherboard if you think in the future you may want to upgrade your CPU to an i5 maybe you’re building this because you’re on a budget right now but you think i’m gonna save my money up in six months or a year i want to buy an i5 and it gives me room to grow fair enough . Maybe you buy this RX-470 because you think I want to crossfire them in the future the downside to the Nvidia Geforce GTX 1060 is you cannot SLI them , you can’t put two you can buy one of this today wait a year and buy another one when they are discounted or buy a used one on ebay a year when people are selling them and upgrading to the latest and greatest and you can put two of these in here and run them in what’s called crossfire . Now it does not double your graphics performance but in some games not all but in some games you can get a seventy to eighty percent boost in your performance by installing a second one of these cards you can’t in this motherboard because it doesn’t have two graphics card slots .
My suggestion would be to spend $25 to $35 more and buy a larger ATX motherboard that has two graphics card slots , a good example of this MSI has a board for $90 and i’ll link this in the alternative sections down below and ASUS has a motherboard for $100 they are B250 boards but they’re larger they have four RAM slots , this has two giving you room to upgrade your RAM and they have two graphics card slots and support crossfire with two of these cards so if you think you might want to upgrade in the future spend $25 to $35 more on your motherboard buy one of these cards because you can add another one in the future using that motherboard you can then upgrade to an i5 if you have the money in the future as well . Please note if you think you’re gonna do this this kicks up another upgrade – power supply . This power supply is absolutely all you need to run what you see here it’s actually plenty for the i5 as well I would not use this power supply if you plan on adding two of these graphics cards it’s not really enough this is $35, i would spend $15 more and by the 600W Bronze from EVGA .
A 500 would actually do the job but for $5 or $10 more i would get the 600 and remove all doubt and concerns because you don’t know what you’ll do in the future if you think you might go with two graphics cards if you’re buying a better motherboard spend five or ten dollars more get the 600W Bronze from EVGA the reason for this is because you’re gonna need a lot more power these cards draw a 150W each 150 plus 150 is 300 , if you upgrade to an i5 and you have a bigger motherboard you want to add more RAM and you want to add more storage you can see where this is going 500 is enough so long as you only ever put RX-470’s in there.
What if the RX-490 or whatever comes out later in the year and you upgrade to it and it’s a 250W card because you’ve got the money and you put an i5 in. Spend $10 more now and you don’t ever have to worry about it power supplies can easily last you 10 years so buying a better one now the case in the power supply can outlast all of this for many many years of upgrades so there’s basically two approaches build it as it sits and leave it as it sits plan on this being all it ever is with maybe the change of this to an i5 or spend $25 to $35 more on the motherboard and $15 more on the power supply so for another $50 you leave yourself room to either add a second one of these or upgrade to a super powerful card and a faster CPU and whatever else you want to put into the system.
So this has been my detailed behind-the-scenes thinking on all of these parts and options the pre-built , the older system from ebay and then what you might do to customize this system i hope this has been helpful for you in thinking about what your various choices are . Like this video if you liked it , share it with your friends if you loved it , remember to subscribe hit that big huge button below this video I would greatly appreciate it . Questions and Comments go in the comments section below and as always check out my video description this will have a lot of links down there a link to my budget deal on ebay for a older i5 based system will be down there a link to my review series on this acer aspire t computer which is a great value for the money . A link to the full video series on this $500 build will be down there and links to amazon , newegg and ebay for everything I’ve discussed on there on here will be down there as well if you found this video helpful and useful to you in any way please go down to the video description and use those i would greatly appreciate it .
Thank you so much for watching ! I will see you in next video .
As found on Youtube
Find More Guides @ Freetoplaymmorpgs.com
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[Aug-2017 Dumps] Download Free 1Z0-416 Study Guide With Updated Exam Questions
Oracle’s PeopleSoft 9.2 Human Resources Certified Implementation Specialist certification as a profession has an incredible evolution over the last few years. Oracle 1Z0-416 PeopleSoft 9.2 Human Resources Essentials exam is the forerunner in validating credentials against. Here are updated Oracle 1Z0-416 exam questions, which will help you to test the quality features of DumpsSchool exam preparation material completely free. You can purchase the full product once you are satisfied with the product.
Version: 6.0
Question: 1
Which default value do the Job Code table and Location table have in common?
A. Salary Plan
B. Work Period
C. Tax Location
D. Standard Hours
E. Establishment ID
Answer: A
Question: 2
Which three statements describe the benefits of using tableset sharing in the PeopleSoft system? (Choose three.)
A. Tableset sharing uses SetID to restrict or grant access to data within a table.
B. Tableset sharing allows organizations to track and report business information.
C. Tableset sharing enables organizations to group rows of data within a control table by using a high-level key called a SetID.
D. Tableset sharing uses Department ID in conjunction with department security tree to restrict or grant access to data within a table.
E. Tableset sharing enables organizations to utilize indexing capabilities on mapped records for faster search results on employee data.
F. Tableset sharing enables organizations to share information instead of entering it multiple times, when large portions of data are the same for various business units.
Answer: A, C, F
Question: 3
On the Job Data Work Location tab for a new hire, Company is a required field.
You can default Company from the _____ table.
A. Location
B. Job Code
C. Position Data
D. Business Unit
E. Holiday Schedule
Answer: C
Question: 4
View the Exhibits.
Your client wants to set up a new department called ABC Headquarter for their newly acquired company ABC. The client shares the department and location information cross all business units. The HR Administrator has checked that the location code ABCHQ showed up under the Location Table Search Result page under SetID “Share”. However, when she tried to attach this location code to the new department she is trying to create, she got the error message.
Which two setups may have caused the error message to be displayed? (Choose two.)
A. The Location SetID may not be valid for this department.
B. The Department may have an earlier Effective Date than the Location.
C. The Location and the Department may not belong to the same Business Unit.
D. The Location may have been inactivated before the Department’s Effective Date.
E. The Location may not be associated with the proper company that the department is attached to.
F. The TableSet Control table may not be set up correctly for the Record_Group Location and the Record_Group Department.
Answer: B, D
Question: 5
Your client is implementing PeopleSoft HRMS system with Payroll Interface. The client is to start configuring Pay Group table.
What table value should exist in the system before configuring Pay Groups?
A. Location
B. Company
C. Salary Plan
D. Salary Step
E. Salary Grade
F. Additional Pay
Answer: B
Question: 6
Which PeopleSoft table do you use to identify a group of employees who share common pay characteristics?
A. Job Code Table
B. Company Table
C. Pay Group Table
D. Salary Plan Table
E. Salary Grade Tables
F. Comp Rate Code Table
Answer: C
Question: 7
You are at your client site working on PeopleSoft HRMS implementation. One of your tasks is to add systemwide defaults in order to save time when a user is entering information in transaction tables. Identify which field is NOT a default option in the Org Default by Permission List component.
A. SetID
B. Country
C. Company
D. To Currency
E. Business Unit
F. Compensation Frequency
Answer: F
Question: 8
Your organization has decided to use a department security tree for Row-Level security in PeopleSoft HRMS system.
You decided to use the XYZ permission list to secure data using the Security by Department Tree component.
Which step do you need to perform to ensure that Row-Level security is enforced?
A. Add the XYZ permission list to User Profile.
B. Add the XYZ permission list to Security Set.
C. Add the XYZ permission list to Tree Manager.
D. Add the XYZ permission list to Configuration Manager.
E. Add the XYZ permission list to a role and then assign that role to a user.
Answer: A
Click Here to Get All Oracle 1Z0-416 Exam Questions:
https://www.dumpsschool.com/1Z0-416-exam-dumps.html
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Tech content trusted by users in North America and around the world
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nVidia Graphics Tweaking Guide
By: Aaron Clegg | Guides | Posted: May 7, 2002 4:00 am
Tweaking Part 1 - The BIOS
Making sure that your card runs as fast as possible starts in the BIOS. There are several relevant settings here that can influence the performance of your video card. Not enabling some options will mean some software tweaks will have no effect!
AGP Mode - Determines the AGP frequency, as a multiplier of 66MHz. 1X is the slowest, 4X is the fastest. Some motherboards will have an "auto" setting, which determines the proper rate from the card in the AGP slot. Others might have an "AGP 4X Mode" enabled/disabled type setting, enabled will set 4X, disabled will set 2X. Older Intel BX and VIA Apollo motherboards will not have the 4X option as the chipsets do not support it. If the setting is there, set it to the highest setting available, which for most people is 4X.
AGP Fast writes - Determines whether the video card memory will be allowed to be written to directly, instead of going through the system memory. This setting should decrease the time it takes to transfer data to the video card for processing, as it bypasses the memory controller. Enabling it will increase performance, but quite possibly at the expense of system stability. Some motherboards will not have this option, but generally those with overclocking features have it present.
AGP Sideband Addressing - Allows the AGP card to use system memory for texture storage, a feature made famous by Intel's i740/i810. Not really relevant with today's 64Mb and 128Mb cards, due to the additional latencies generated by using the system memory instead of graphics card memory. Often this setting is not available on newer motherboards; if it is there I would suggest disabling it.
AGP Aperture - Should always be equal to or higher than the amount of memory on your video card. A general rule should be to set it at double the graphics card memory.
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Skip Navigation
What are firmware updates?
...and why do I need them?
Robert Ferency-Viars is the managing editor for the Crutchfield car A/V learning content, and has been with the company since 1999. A Virginia native from the heart of the Blue Ridge Mountains, he loves spending time with his wonderful wife and sons, listening to music, writing, and playing games with friends. Robert's love for car audio began at 16 when he installed his first car stereo.
More from Robert Ferency-Viars
Firmware plays an important role in many of our electronics these days. But what exactly is it, and why is it so important?
nav receiver
What is firmware?
"Firmware," generally speaking, refers to the programs that help a device do what it's supposed to do; it's the background programming that runs the machine. That's in contrast with the "software" that we use to do stuff on the machine: games and programs on a computer, music files on an MP3 player, and the discs we watch on our Blu-ray disc™ players. This is a simplified definition and comparison, but it's reasonable enough for the purposes of this article.
Why does firmware need to be updated?
Most of the gear we use today is as much a computer as it is an audio or video device. As such, sometimes the manufacturer makes improvements to the programs that run the device (firmware). These improvements are released as firmware updates. We can expect to see firmware updates for everything from our Blu-ray players and video game consoles to our car stereos.
Xbox 360
The old Xbox 360 gained lots of new features after a firmware update.
The same thing goes for software updates, and we're all probably more familiar with those. Our computers constantly check for updates for the programs we run: new versions of video players or iTunes®, for example.
To simplify the issue: whether an update is for a device's firmware or software doesn't really matter. They both work the same way. The point is that sometimes updates are released and we need to apply them to our gear.
Where do the updates come from?
These updates tend to come from one of two places:
• Manufacturers — Firmware updates usually come from the manufacturer of the item.
• Software providers — Sometimes other companies might release updates for the software that an item is using, such as when Adobe® releases an update for its Flash player, which many of us use for watching Internet videos.
Kenwood DNX890HD
Navigation receivers are a good example of the type of gear that may require firmware updates.
Car stereo navigation receivers present a good example for how updates could come from multiple sources. Potential updates could take any of these forms:
• Firmware updates for the functionality of the stereo would come from the manufacturer.
• Navigation software updates could add features or improvie performance (firmware).
• Occasional map updates keep the directions as accurate as possible (software).
How do I apply the update?
Updating the gear like an MP3 player or camera is easy when you can connect it to your computer. If your television, Blu-ray player, or game console are connected to the Internet, then updating them can be this easy too. It'll depend on the specific equipment, of course.
For other gear, you will typically download the firmware update to your computer and then transfer it to your device via thumb drive or SD card. Simply load the update via the USB or SD card input, and it should take care of itself from there. Read the manufacturer's website for the specifics of your equipment.
A caution about applying updates
Before applying an update, especially in the case of firmware, you need to make sure that the update is for your exact model of device. Applying an update intended for a similar-but-different model could result in your gear becoming non-operational. The old firmware gets overwritten (replaced) by new operating instructions that aren't compatible with your model, which means your device won't work anymore. That's referred to as "bricking" your gear.
So always double check those model numbers before applying a firmware update.
How do I find out about updates?
There are three things you can do to stay abreast of firmware updates.
• The best way to make sure you're alerted to important updates for your device is to register your purchase with the manufacturer. Fill out the registration card that comes with it or register it online at the manufacturer's website. That way, the manufacturer knows you own one of their devices and can alert you if a really important update comes along.
• The other way to keep on top of updates is to occasionally visit the manufacturer's website and look up your equipment model or a list of released firmware updates. This might be the only way to learn about updates for minor issues.
• If you really like your gear, join a message board or social media feed dedicated to that brand or device. Hanging out with other users is sure to keep you informed about any changes.
Here's a good example. By navigating to the support section at Kenwood, I discovered messages about firmware updates for iPod® and Bluetooth® compatibility with several of their receivers.
When in doubt...
Whether your favorite gadget is your iPod, your Blu-ray player, your car stereo, or your laptop, firmware updates are important for keeping it running smoothly. Just take care and don't apply any updates not meant for your specific model. Whenever in doubt, turn to the manufacturer for confirmation. And if you purchased the item from Crutchfield, our tech support crew can help you out too.
• jana
Posted on 6/10/2015 4:07:43 PM
when i just plugged my g pad 7.0 into a different charger it just start to start the firmware update and its been 7 hours and its still on 0% whats taking so long help me
• Alexander Hrabe from Crutchfield
Posted on 6/10/2015 5:17:51 PM
Jana, sounds like it's worth restarting the device. It could also be a problem with your wireless connection. If that doesn't resolve the problem, give LG a call. It may be a problem with their latest update. Good luck!
• Deborah from Spartanburg
Posted on 7/16/2015 11:32:53 PM
My firmware starter on my tablet over 8 hours and it still at 0%. I can't even power my tablet off. What should i do?
• Alexander Hrabe from Crutchfield
Posted on 7/17/2015 1:40:44 PM
Deborah, if you can't power off the tablet, you'll have to wait until the battery drains and it shuts itself down. Once you recharge the device, power it on and try the update again, but be sure you have a wired or strong wi-fi connection to the internet. If you have any other trouble, contact the manufacturer.
• ola from makati city
Posted on 6/4/2016 3:30:04 PM
i dont want firmware update my tablet its take too long... what to do? its just suddenly start the firmware update.
• Alexander Hrabe from Crutchfield
Posted on 6/6/2016 9:45:25 AM
Ola, if your tablet has the ability to not auto-update, you'd probably find that functionality in the Settings app. Give the manufacturer a call or consult the manual if you have any trouble.
• Frank from mill spring nc
Posted on 8/12/2016 3:21:12 PM
Hi I have a Ford 2016 F150 with the sync 3 system want to add navigation from the factory the only way to do this is to go to an Outsource company and pay them $1,700 to do this Ford will have nothing to do with it and don't want anything to do with it is there any reason I should not do this
• Alexander Hrabe from Crutchfield
Posted on 8/15/2016 11:09:30 AM
Frank, if you want to retain SYNC and add navigation at a comparatively small cost, you might want to consider adding a portable navigation device. Otherwise, if you add an aftermarket navigation receiver, you will lose SYNC. We can't offer any information regarding the installation of a factory navigation unit, but give us a call to discuss your priorities for an upgrade. An advisor will be able to help with some solutions.
• Cory G. from indianapolis
Posted on 9/9/2016 9:09:59 PM
How do I know if the firmware is right for my model? In the update notes?
• Alexander Hrabe from Crutchfield
Posted on 9/12/2016 2:16:07 PM
Cory, you'll get the quickest answer by contacting the manufacturer's customer support (typically found in your user manual) or by checking their website.
• Angie from Wellston
Posted on 9/19/2016 12:39:53 PM
I had a request for a firmware update from Dell, which is what my laptop is. I accepted and apparently it wasn't a match but I did not know about all that. Now I don't have a boot manager. I have to take a very long way around just to log on. What can I do, how can I reverse this? Thank you.
• Alexander Hrabe from Crutchfield
Posted on 9/19/2016 1:58:46 PM
Angie, you'll want to contact Dell for help.
Ask an expert advisor
No pressure, no commission — just lots of good advice from our highly trained staff.
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Criando documento de Texto no com Macros e
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Transcript of Criando documento de Texto no com Macros e
• Criando documentos de texto no BrOffice com macros e formulrios
Introduo
Como forma de compartilhar a experincia acumulada no processo de criao de formulrios e macros do BrOffice.org, para confeco de documentos de comunicao administrativa escrita utilizados pela CAIXA ECONMICA FEDERAL, elaboramos esta cartilha tcnica, que descreve cada etapa do processo de desenvolvimento.
O presente documento destinado a pessoas e organizaes interessadas em utilizar o BrOffice, para criao de documentos padronizados e direcionado a usurios e desenvolvedores com conhecimento bsico na formatao de documentos com editor de textos e na linguagem BASIC.
As etapas do desenvolvimento compreendem:
- A preparao do modelo, que consiste na confeco de um arquivo de texto que vai servir de base para criar um novo documento;
- A criao do formulrio e macro, que consiste em escrever a macro que vai interagir com o usurio;
- E por fim, o empacotamento e instalao.
Como resultado teremos um suplemento do BrOffice que pode ser distribudo e instalado em outras mquinas.
A seguir, detalhamos cada uma destas etapas.
2
• Sumrio
Introduo........................................................................................................................... 2
O modelo............................................................................................................................. 4
Estilos de pgina........................................................................................................................... 5
Estilos de pargrafo.......................................................................................................................6
Estilos de lista................................................................................................................................7
Inserindo os favoritos.....................................................................................................................8
A macro............................................................................................................................. 12
Desenhando o formulrio............................................................................................................ 13
Escrevendo a macro....................................................................................................................16
O Suplemento................................................................................................................... 23
Criando o suplemento..................................................................................................................23
Instalando o suplemento..............................................................................................................29
Leitura complementar...................................................................................................... 31
Developer's Guide....................................................................................................................... 31
Como distribuir suas macros com um addon.............................................................................. 31
http://www.broffice.org.br/macroshttp://openoffice.org.br/files/addons1_1_pt_br.zip
Ferramenta Xray..........................................................................................................................31
• Criando documentos de texto no BrOffice com macros e formulrios
O modeloO modelo um documento de texto que usado como base para se criar os novos documentos.
Preparar o modelo consiste em formatar as margens, cabealhos, rodaps, fontes, pargrafos e os favoritos (ou bookmarks).
Para criarmos o modelo, iniciamos o Writer com um novo documento em branco. O prximo passo efetuar a formatao do documento. Para tanto utilizaremos o recurso de estilos do Writer.
Os estilos so manipulados pelo painel Estilos e formatao. O Writer divide os estilos em categorias. Estilos de pargrafo, estilos de caractere, estilos de quadro, estilos de pgina, e estilos de lista. (figura 2).
O acesso ao painel feito pelo menu Formato, opo Estilos e formatao, ou pela tecla de atalho F11. (figura 1)
Figura 1: Menu de acesso ao painel Estilos e formatao
4
• Figura 2: Painel Estilos e formatao
Estilos de pgina
Figura 3: Dilogos de formatao de estilos de pgina
• Criando documentos de texto no BrOffice com macros e formulrios
O estilo de pgina controla, entre outras coisas, margens, tamanho do papel, cabealhos e rodaps.
Cada novo documento possui naturalmente um estilo de pgina associado, nomeado de padro.
Em alguns documentos a primeira pgina possui caractersticas diferentes das demais. Para essa formatao, preciso aplicar um estilo diferente na primeira pgina.
No painel Estilos e formatao escolha a opo estilos de pgina, e efetue um duplo-clique sobre o estilo existente Primeira pgina. Isso ir aplicar o estilo na pgina atual do documento, ou seja, a pgina 1. Como dito antes, o estilo inicial o estilo padro.
O prximo passo ajustar o estilo para refletir o formato do documento. No painel, clique sobre o nome do estilo (boto direito) e selecione modificar. No dilogo estilo de pgina (figura 3) ajuste o tamanho do papel, as margens, e se necessrio, o cabealho e rodap.
Observe na aba organizador que no campo prximo estilo o valor "padro". Isto significa que o estilo padro ser aplicado s pginas subseqentes do documento, quando o documento tiver mais de uma pgina.
necessrio, portanto, formatar tambm o estilo padro repetindo os passos anteriores. Verifique que isso s se justifica quando a primeira pgina possui alguma formatao diferente das demais.
Se o documento a ser criado possuir um formato nico em todas as pginas, basta ajustar o estilo padro.
Prxima etapa, formatar os estilos de pargrafo.
Estilos de pargrafo
Figura 4: Dilogos de formatao de estilos de pargrafo
6
• Finalizados os estilos de pgina, devemos formatar os estilos de pargrafo. Essa formatao inclui principalmente a definio da fonte, do alinhamento do texto, do espaamento entre pargrafos.
Crie ou modifique tantos estilos quantos forem necessrios, de acordo com a complexidade do seu documento.
No painel Estilos e formatao clique no cone Estilos de pargrafo. Com um clique direito sobre um estilo escolha Novo... ou Modificar..., para modificar um estilo ou criar um novo. No dilogo Estilo de pargrafo (figura 4), faa os ajustes necessrios.
Estilos normalmente necessrios em um documento formatam os tpicos, assinaturas, vocativos, endereos, cabealhos e rodaps.
Esta etapa compreende apenas a criao dos estilos. A aplicao dos mesmos se dar posteriormente.
A prxima etapa formatar os estilos de lista.
Estilos de lista
Os estilos de lista so usados para formatar as listas numeradas ou de marcadores. Por exemplo, se o documento possuir tpicos numerados, aqui que definimos o estilo de numerao. O procedimento idntico a formatao dos estilos de pgina e de pargrafo.
Aqui configuramos o estilo dos nmeros, espaamento do texto, subnveis, entre outros.
Ao fim do processo, precisamos associar o estilo de numerao a um estilo de pargrafo.
Uma hiptese termos criado um estilo de pargrafo chamado tpicos, para formatar os tpicos do documento. E criamos um estilo de lista chamado numerao de tpicos para formatar a numerao. Para associarmos os dois estilos, vamos ao dilogo estilos de pargrafo (figura 4), para modificar o estilo tpicos e na aba Numerao selecionamos o estilo recm criado.
Feito isto, quando for ativada a numerao em um pargrafo de estilo tpicos, a numerao ir seguir a formatao do estilo numerao de tpicos.
Alm destes, temos tambm os estilos de caractere e de quadro, que no sero abordados nesta cartilha.
O passo seguinte preparar o documento, aplicando os estilos aos pargrafos e inserindo os favoritos.
Inserindo os favoritos
Depois de formatar os estilos, passamos a etapa de aplicar os estilos ao documento, e inserir os favoritos.
Os favoritos, tambm chamados de bookmarks, so marcas em pontos diversos do documento que utilizaremos para insero de texto atravs da macro. Os bookmarks devem ser
• Criando documentos de texto no BrOffice com macros e formulrios
estrategicamente posicionados de acordo com o documento que ser criado.
Considerando um documento simples de exemplo como o da figura 5, teramos o seguinte cenrio:
Figura 5: Documento de exemplo com os bookmarks (itens numerados)
tem 1 - Neste ponto vai ficar o primeiro bookmark, que vamos chamar de identificacao, para incluso da identificao e nmero do documento;
tem 2 - bookmark chamado local, para incluso do local e data.
tem 3 - bookmark destinatario;
tem 4 - bookmark vocativo;
tem 5 - bookmark texto;
tem 6 - bookmark encerramento e
tem 7 - bookmark assinatura.
A incluso do bookmark feita pelo menu Inserir, opo "Favoritos...". A incluso no
8
• documento ocorre na posio corrente do cursor, ento precisamos posicionar o cursor na posio desejada e acessar o menu, conforme figura 6.
Figura 6: Menu de acesso a incluso de bookmarks
Aps escolher a opo no menu, exibido o dilogo de incluso, onde informamos o nome do bookm
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ece34605c058195ed03b4d393ef1a36c
|
1,203,606,734,625,145,000 |
Home PrintPerforming Secure Print (PCL Driver)
Performing Secure Print (PCL Driver)
In the following settings, send a print job from a computer to this machine. To make prints, use the touch panel of this machine.
• Select [Secure Print] in [Output Method] on the [Basic] tab
1. Open the [Basic] tab.
2. Select [Secure Print] from the [Output Method] pull-down menu.
• If the [Secure Print ID] and [Password] for Secure Print are not specified, the User Setting dialog box is displayed. Proceed to step 3.
• When changing a [Secure Print ID] and [Password] that are already specified, press [User Setting]. Proceed to step 3.
• When not changing a [Secure Print ID] and [Password] that are already specified, proceed to step 4.
• The Windows 7 screen is used for explanation purposes.
3. In the [User Settings] dialog box, enter [Secure Print ID] and [Password].
• The ID and password can be specified using up to 8 one-byte characters.
4. Click [OK].
5. Click [Print] to send Secure Print jobs to the Secure Job User Box.
|
{
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|
ece34605c058195ed03b4d393ef1a36c
|
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