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ekoeppen/STM32_Generic_Ada_Drivers | Ada | 13,327 | ads | -- This spec has been automatically generated from STM32L0x1.svd
pragma Restrictions (No_Elaboration_Code);
pragma Ada_2012;
pragma Style_Checks (Off);
with System;
package STM32_SVD.GPIO is
pragma Preelaborate;
---------------
-- Registers --
---------------
-- MODER_MODE array
type MODER_MODE_Field_Array is array (0 .. 15) of STM32_SVD.UInt2
with Component_Size => 2, Size => 32;
-- GPIO port mode register
type MODER_Register
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
-- MODE as a value
Val : STM32_SVD.UInt32;
when True =>
-- MODE as an array
Arr : MODER_MODE_Field_Array;
end case;
end record
with Unchecked_Union, Size => 32, Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for MODER_Register use record
Val at 0 range 0 .. 31;
Arr at 0 range 0 .. 31;
end record;
-- OTYPER_OT array
type OTYPER_OT_Field_Array is array (0 .. 15) of STM32_SVD.Bit
with Component_Size => 1, Size => 16;
-- Type definition for OTYPER_OT
type OTYPER_OT_Field
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
-- OT as a value
Val : STM32_SVD.UInt16;
when True =>
-- OT as an array
Arr : OTYPER_OT_Field_Array;
end case;
end record
with Unchecked_Union, Size => 16;
for OTYPER_OT_Field use record
Val at 0 range 0 .. 15;
Arr at 0 range 0 .. 15;
end record;
-- GPIO port output type register
type OTYPER_Register is record
-- Port x configuration bits (y = 0..15)
OT : OTYPER_OT_Field;
-- unspecified
Reserved_16_31 : STM32_SVD.UInt16;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for OTYPER_Register use record
OT at 0 range 0 .. 15;
Reserved_16_31 at 0 range 16 .. 31;
end record;
-- OSPEEDR_OSPEED array
type OSPEEDR_OSPEED_Field_Array is array (0 .. 15) of STM32_SVD.UInt2
with Component_Size => 2, Size => 32;
-- GPIO port output speed register
type OSPEEDR_Register
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
-- OSPEED as a value
Val : STM32_SVD.UInt32;
when True =>
-- OSPEED as an array
Arr : OSPEEDR_OSPEED_Field_Array;
end case;
end record
with Unchecked_Union, Size => 32, Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for OSPEEDR_Register use record
Val at 0 range 0 .. 31;
Arr at 0 range 0 .. 31;
end record;
-- PUPDR_PUPD array
type PUPDR_PUPD_Field_Array is array (0 .. 15) of STM32_SVD.UInt2
with Component_Size => 2, Size => 32;
-- GPIO port pull-up/pull-down register
type PUPDR_Register
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
-- PUPD as a value
Val : STM32_SVD.UInt32;
when True =>
-- PUPD as an array
Arr : PUPDR_PUPD_Field_Array;
end case;
end record
with Unchecked_Union, Size => 32, Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for PUPDR_Register use record
Val at 0 range 0 .. 31;
Arr at 0 range 0 .. 31;
end record;
-- IDR_ID array
type IDR_ID_Field_Array is array (0 .. 15) of STM32_SVD.Bit
with Component_Size => 1, Size => 16;
-- Type definition for IDR_ID
type IDR_ID_Field
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
-- ID as a value
Val : STM32_SVD.UInt16;
when True =>
-- ID as an array
Arr : IDR_ID_Field_Array;
end case;
end record
with Unchecked_Union, Size => 16;
for IDR_ID_Field use record
Val at 0 range 0 .. 15;
Arr at 0 range 0 .. 15;
end record;
-- GPIO port input data register
type IDR_Register is record
-- Read-only. Port input data bit (y = 0..15)
ID : IDR_ID_Field;
-- unspecified
Reserved_16_31 : STM32_SVD.UInt16;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for IDR_Register use record
ID at 0 range 0 .. 15;
Reserved_16_31 at 0 range 16 .. 31;
end record;
-- ODR_OD array
type ODR_OD_Field_Array is array (0 .. 15) of STM32_SVD.Bit
with Component_Size => 1, Size => 16;
-- Type definition for ODR_OD
type ODR_OD_Field
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
-- OD as a value
Val : STM32_SVD.UInt16;
when True =>
-- OD as an array
Arr : ODR_OD_Field_Array;
end case;
end record
with Unchecked_Union, Size => 16;
for ODR_OD_Field use record
Val at 0 range 0 .. 15;
Arr at 0 range 0 .. 15;
end record;
-- GPIO port output data register
type ODR_Register is record
-- Port output data bit (y = 0..15)
OD : ODR_OD_Field;
-- unspecified
Reserved_16_31 : STM32_SVD.UInt16;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for ODR_Register use record
OD at 0 range 0 .. 15;
Reserved_16_31 at 0 range 16 .. 31;
end record;
-- BSRR_BS array
type BSRR_BS_Field_Array is array (0 .. 15) of STM32_SVD.Bit
with Component_Size => 1, Size => 16;
-- Type definition for BSRR_BS
type BSRR_BS_Field
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
-- BS as a value
Val : STM32_SVD.UInt16;
when True =>
-- BS as an array
Arr : BSRR_BS_Field_Array;
end case;
end record
with Unchecked_Union, Size => 16;
for BSRR_BS_Field use record
Val at 0 range 0 .. 15;
Arr at 0 range 0 .. 15;
end record;
-- BSRR_BR array
type BSRR_BR_Field_Array is array (0 .. 15) of STM32_SVD.Bit
with Component_Size => 1, Size => 16;
-- Type definition for BSRR_BR
type BSRR_BR_Field
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
-- BR as a value
Val : STM32_SVD.UInt16;
when True =>
-- BR as an array
Arr : BSRR_BR_Field_Array;
end case;
end record
with Unchecked_Union, Size => 16;
for BSRR_BR_Field use record
Val at 0 range 0 .. 15;
Arr at 0 range 0 .. 15;
end record;
-- GPIO port bit set/reset register
type BSRR_Register is record
-- Write-only. Port x set bit y (y= 0..15)
BS : BSRR_BS_Field;
-- Write-only. Port x reset bit y (y = 0..15)
BR : BSRR_BR_Field;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for BSRR_Register use record
BS at 0 range 0 .. 15;
BR at 0 range 16 .. 31;
end record;
-- LCKR_LCK array
type LCKR_LCK_Field_Array is array (0 .. 15) of STM32_SVD.Bit
with Component_Size => 1, Size => 16;
-- Type definition for LCKR_LCK
type LCKR_LCK_Field
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
-- LCK as a value
Val : STM32_SVD.UInt16;
when True =>
-- LCK as an array
Arr : LCKR_LCK_Field_Array;
end case;
end record
with Unchecked_Union, Size => 16;
for LCKR_LCK_Field use record
Val at 0 range 0 .. 15;
Arr at 0 range 0 .. 15;
end record;
-- GPIO port configuration lock register
type LCKR_Register is record
-- Port x lock bit y (y= 0..15)
LCK : LCKR_LCK_Field;
-- Port x lock bit y (y= 0..15)
LCKK : STM32_SVD.Bit;
-- unspecified
Reserved_17_31 : STM32_SVD.UInt15;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for LCKR_Register use record
LCK at 0 range 0 .. 15;
LCKK at 0 range 16 .. 16;
Reserved_17_31 at 0 range 17 .. 31;
end record;
-- AFRL_AFSEL array
type AFRL_AFSEL_Field_Array is array (0 .. 7) of STM32_SVD.UInt4
with Component_Size => 4, Size => 32;
-- GPIO alternate function low register
type AFRL_Register
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
-- AFSEL as a value
Val : STM32_SVD.UInt32;
when True =>
-- AFSEL as an array
Arr : AFRL_AFSEL_Field_Array;
end case;
end record
with Unchecked_Union, Size => 32, Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for AFRL_Register use record
Val at 0 range 0 .. 31;
Arr at 0 range 0 .. 31;
end record;
-- AFRH_AFSEL array
type AFRH_AFSEL_Field_Array is array (8 .. 15) of STM32_SVD.UInt4
with Component_Size => 4, Size => 32;
-- GPIO alternate function high register
type AFRH_Register
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
-- AFSEL as a value
Val : STM32_SVD.UInt32;
when True =>
-- AFSEL as an array
Arr : AFRH_AFSEL_Field_Array;
end case;
end record
with Unchecked_Union, Size => 32, Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for AFRH_Register use record
Val at 0 range 0 .. 31;
Arr at 0 range 0 .. 31;
end record;
-- BRR_BR array
type BRR_BR_Field_Array is array (0 .. 15) of STM32_SVD.Bit
with Component_Size => 1, Size => 16;
-- Type definition for BRR_BR
type BRR_BR_Field
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
-- BR as a value
Val : STM32_SVD.UInt16;
when True =>
-- BR as an array
Arr : BRR_BR_Field_Array;
end case;
end record
with Unchecked_Union, Size => 16;
for BRR_BR_Field use record
Val at 0 range 0 .. 15;
Arr at 0 range 0 .. 15;
end record;
-- GPIO port bit reset register
type BRR_Register is record
-- Write-only. Port x Reset bit y (y= 0 .. 15)
BR : BRR_BR_Field;
-- unspecified
Reserved_16_31 : STM32_SVD.UInt16;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for BRR_Register use record
BR at 0 range 0 .. 15;
Reserved_16_31 at 0 range 16 .. 31;
end record;
-----------------
-- Peripherals --
-----------------
-- General-purpose I/Os
type GPIO_Peripheral is record
-- GPIO port mode register
MODER : aliased MODER_Register;
-- GPIO port output type register
OTYPER : aliased OTYPER_Register;
-- GPIO port output speed register
OSPEEDR : aliased OSPEEDR_Register;
-- GPIO port pull-up/pull-down register
PUPDR : aliased PUPDR_Register;
-- GPIO port input data register
IDR : aliased IDR_Register;
-- GPIO port output data register
ODR : aliased ODR_Register;
-- GPIO port bit set/reset register
BSRR : aliased BSRR_Register;
-- GPIO port configuration lock register
LCKR : aliased LCKR_Register;
-- GPIO alternate function low register
AFRL : aliased AFRL_Register;
-- GPIO alternate function high register
AFRH : aliased AFRH_Register;
-- GPIO port bit reset register
BRR : aliased BRR_Register;
end record
with Volatile;
for GPIO_Peripheral use record
MODER at 16#0# range 0 .. 31;
OTYPER at 16#4# range 0 .. 31;
OSPEEDR at 16#8# range 0 .. 31;
PUPDR at 16#C# range 0 .. 31;
IDR at 16#10# range 0 .. 31;
ODR at 16#14# range 0 .. 31;
BSRR at 16#18# range 0 .. 31;
LCKR at 16#1C# range 0 .. 31;
AFRL at 16#20# range 0 .. 31;
AFRH at 16#24# range 0 .. 31;
BRR at 16#28# range 0 .. 31;
end record;
-- General-purpose I/Os
GPIOA_Periph : aliased GPIO_Peripheral
with Import, Address => GPIOA_Base;
GPIOB_Periph : aliased GPIO_Peripheral
with Import, Address => GPIOB_Base;
-- General-purpose I/Os
GPIOC_Periph : aliased GPIO_Peripheral
with Import, Address => GPIOC_Base;
-- General-purpose I/Os
GPIOD_Periph : aliased GPIO_Peripheral
with Import, Address => GPIOD_Base;
-- General-purpose I/Os
GPIOE_Periph : aliased GPIO_Peripheral
with Import, Address => GPIOE_Base;
-- General-purpose I/Os
GPIOH_Periph : aliased GPIO_Peripheral
with Import, Address => GPIOH_Base;
end STM32_SVD.GPIO;
|
sungyeon/drake | Ada | 307 | ads | pragma License (Unrestricted);
-- implementation unit
package Ada.Strings.Naked_Maps.Case_Mapping is
pragma Preelaborate;
function Lower_Case_Map return not null Character_Mapping_Access;
function Upper_Case_Map return not null Character_Mapping_Access;
end Ada.Strings.Naked_Maps.Case_Mapping;
|
tum-ei-rcs/StratoX | Ada | 14,513 | adb | ------------------------------------------------------------------------------
-- --
-- Copyright (C) 2015-2016, AdaCore --
-- --
-- Redistribution and use in source and binary forms, with or without --
-- modification, are permitted provided that the following conditions are --
-- met: --
-- 1. Redistributions of source code must retain the above copyright --
-- notice, this list of conditions and the following disclaimer. --
-- 2. Redistributions in binary form must reproduce the above copyright --
-- notice, this list of conditions and the following disclaimer in --
-- the documentation and/or other materials provided with the --
-- distribution. --
-- 3. Neither the name of STMicroelectronics nor the names of its --
-- contributors may be used to endorse or promote products derived --
-- from this software without specific prior written permission. --
-- --
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS --
-- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT --
-- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR --
-- A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT --
-- HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, --
-- SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT --
-- LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, --
-- DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY --
-- THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT --
-- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --
-- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --
-- --
------------------------------------------------------------------------------
-- with STM32.RCC; use STM32.RCC;
with STM32_SVD.DMA2D; use STM32_SVD.DMA2D;
with STM32_SVD.RCC; use STM32_SVD.RCC;
package body STM32.DMA2D is
function To_Word is new Ada.Unchecked_Conversion (System.Address, Word);
function Offset (Buffer : DMA2D_Buffer;
X, Y : Integer) return Word with Inline_Always;
DMA2D_Wait_Transfer_Int : DMA2D_Sync_Procedure := null;
DMA2D_Init_Transfer_Int : DMA2D_Sync_Procedure := null;
------------------
-- DMA2D_DeInit --
------------------
procedure DMA2D_DeInit is
begin
RCC_Periph.AHB1ENR.DMA2DEN := False;
DMA2D_Init_Transfer_Int := null;
DMA2D_Wait_Transfer_Int := null;
end DMA2D_DeInit;
----------------
-- DMA2D_Init --
----------------
procedure DMA2D_Init
(Init : DMA2D_Sync_Procedure;
Wait : DMA2D_Sync_Procedure)
is
begin
if DMA2D_Init_Transfer_Int = Init then
return;
end if;
DMA2D_DeInit;
DMA2D_Init_Transfer_Int := Init;
DMA2D_Wait_Transfer_Int := Wait;
RCC_Periph.AHB1ENR.DMA2DEN := True;
RCC_Periph.AHB1RSTR.DMA2DRST := True;
RCC_Periph.AHB1RSTR.DMA2DRST := False;
end DMA2D_Init;
------------
-- Offset --
------------
function Offset (Buffer : DMA2D_Buffer;
X, Y : Integer) return Word
is
Off : constant Word := Word (X + Buffer.Width * Y);
begin
case Buffer.Color_Mode is
when ARGB8888 =>
return 4 * Off;
when RGB888 =>
return 3 * Off;
when ARGB1555 | ARGB4444 | RGB565 | AL88 =>
return 2 * Off;
when L8 | AL44 | A8 =>
return Off;
when L4 | A4 =>
return Off / 2;
end case;
end Offset;
----------------
-- DMA2D_Fill --
----------------
procedure DMA2D_Fill
(Buffer : DMA2D_Buffer;
Color : Word;
Synchronous : Boolean := False)
is
function Conv is new Ada.Unchecked_Conversion (Word, OCOLR_Register);
begin
DMA2D_Wait_Transfer_Int.all;
DMA2D_Periph.CR.MODE := DMA2D_MODE'Enum_Rep (R2M);
DMA2D_Periph.OPFCCR.CM := As_UInt3 (Buffer.Color_Mode);
DMA2D_Periph.OCOLR := Conv (Color);
DMA2D_Periph.OMAR := To_Word (Buffer.Addr);
DMA2D_Periph.OOR := (LO => 0, others => <>);
DMA2D_Periph.NLR := (NL => Short (Buffer.Height),
PL => UInt14 (Buffer.Width),
others => <>);
DMA2D_Init_Transfer_Int.all;
if Synchronous then
DMA2D_Wait_Transfer_Int.all;
end if;
end DMA2D_Fill;
---------------------
-- DMA2D_Fill_Rect --
---------------------
procedure DMA2D_Fill_Rect
(Buffer : DMA2D_Buffer;
Color : Word;
X : Integer;
Y : Integer;
Width : Integer;
Height : Integer;
Synchronous : Boolean := False)
is
function Conv is new Ada.Unchecked_Conversion (Word, OCOLR_Register);
Off : constant Word := Offset (Buffer, X, Y);
begin
DMA2D_Wait_Transfer_Int.all;
DMA2D_Periph.CR.MODE := DMA2D_MODE'Enum_Rep (R2M);
DMA2D_Periph.OPFCCR :=
(CM => DMA2D_Color_Mode'Enum_Rep (Buffer.Color_Mode),
others => <>);
DMA2D_Periph.OCOLR := Conv (Color);
DMA2D_Periph.OMAR := To_Word (Buffer.Addr) + Off;
DMA2D_Periph.OOR.LO := UInt14 (Buffer.Width - Width);
DMA2D_Periph.NLR :=
(NL => Short (Height), PL => UInt14 (Width), others => <>);
DMA2D_Init_Transfer_Int.all;
if Synchronous then
DMA2D_Wait_Transfer_Int.all;
end if;
end DMA2D_Fill_Rect;
---------------------
-- DMA2D_Draw_Rect --
---------------------
procedure DMA2D_Draw_Rect
(Buffer : DMA2D_Buffer;
Color : Word;
X : Integer;
Y : Integer;
Width : Integer;
Height : Integer)
is
begin
DMA2D_Draw_Horizontal_Line (Buffer, Color, X, Y, Width);
DMA2D_Draw_Horizontal_Line (Buffer, Color, X, Y + Height - 1, Width);
DMA2D_Draw_Vertical_Line (Buffer, Color, X, Y, Height);
DMA2D_Draw_Vertical_Line (Buffer, Color, X + Width - 1, Y, Height);
end DMA2D_Draw_Rect;
---------------------
-- DMA2D_Copy_Rect --
---------------------
procedure DMA2D_Copy_Rect
(Src_Buffer : DMA2D_Buffer;
X_Src : Natural;
Y_Src : Natural;
Dst_Buffer : DMA2D_Buffer;
X_Dst : Natural;
Y_Dst : Natural;
Bg_Buffer : DMA2D_Buffer;
X_Bg : Natural;
Y_Bg : Natural;
Width : Natural;
Height : Natural;
Synchronous : Boolean := False)
is
Src_Off : constant Word := Offset (Src_Buffer, X_Src, Y_Src);
Dst_Off : constant Word := Offset (Dst_Buffer, X_Dst, Y_Dst);
begin
DMA2D_Wait_Transfer_Int.all;
if Bg_Buffer /= Null_Buffer then
-- PFC and blending
DMA2D_Periph.CR.MODE := DMA2D_MODE'Enum_Rep (M2M_BLEND);
elsif Src_Buffer.Color_Mode = Dst_Buffer.Color_Mode then
-- Direct memory transfer
DMA2D_Periph.CR.MODE := DMA2D_MODE'Enum_Rep (M2M);
else
-- Requires color conversion
-- ??? TODO
DMA2D_Periph.CR.MODE := DMA2D_MODE'Enum_Rep (M2M_PFC);
end if;
-- SOURCE CONFIGURATION
DMA2D_Periph.FGPFCCR :=
(CM => DMA2D_Color_Mode'Enum_Rep (Src_Buffer.Color_Mode),
AM => DMA2D_AM'Enum_Rep (NO_MODIF),
ALPHA => 255,
others => <>);
DMA2D_Periph.FGOR := (LO => UInt14 (Src_Buffer.Width - Width),
others => <>);
DMA2D_Periph.FGMAR := To_Word (Src_Buffer.Addr) + Src_Off;
if Bg_Buffer /= Null_Buffer then
declare
Bg_Off : constant Word := Offset (Bg_Buffer, X_Bg, Y_Bg);
begin
DMA2D_Periph.BGPFCCR.CM :=
DMA2D_Color_Mode'Enum_Rep (Bg_Buffer.Color_Mode);
DMA2D_Periph.BGMAR := To_Word (Bg_Buffer.Addr) + Bg_Off;
DMA2D_Periph.BGPFCCR.CS := 0;
DMA2D_Periph.BGPFCCR.START := False;
DMA2D_Periph.BGOR :=
(LO => UInt14 (Bg_Buffer.Width - Width), others => <>);
DMA2D_Periph.BGPFCCR.CCM := False; -- Disable CLUT color mode
end;
end if;
-- DST CONFIGURATION
DMA2D_Periph.OPFCCR.CM :=
DMA2D_Color_Mode'Enum_Rep (Dst_Buffer.Color_Mode);
DMA2D_Periph.OMAR := To_Word (Dst_Buffer.Addr) + Dst_Off;
DMA2D_Periph.OOR := (LO => UInt14 (Dst_Buffer.Width - Width),
others => <>);
DMA2D_Periph.NLR := (NL => Short (Height),
PL => UInt14 (Width),
others => <>);
DMA2D_Init_Transfer_Int.all;
if Synchronous then
DMA2D_Wait_Transfer_Int.all;
end if;
end DMA2D_Copy_Rect;
------------------------------
-- DMA2D_Draw_Vertical_Line --
------------------------------
procedure DMA2D_Draw_Vertical_Line
(Buffer : DMA2D_Buffer;
Color : Word;
X : Integer;
Y : Integer;
Height : Integer;
Synchronous : Boolean := False)
is
NY, NH : Integer;
begin
if Y >= Buffer.Height
or else X not in 0 .. Buffer.Width - 1
then
return;
end if;
if Y < 0 then
NY := 0;
NH := Height + Y;
else
NY := Y;
NH := Height;
end if;
NH := Integer'Min (NH, Buffer.Height - NY - 1);
DMA2D_Fill_Rect (Buffer, Color, X, NY, 1, NH, Synchronous);
end DMA2D_Draw_Vertical_Line;
--------------------------------
-- DMA2D_Draw_Horizontal_Line --
--------------------------------
procedure DMA2D_Draw_Horizontal_Line
(Buffer : DMA2D_Buffer;
Color : Word;
X : Integer;
Y : Integer;
Width : Integer;
Synchronous : Boolean := False)
is
NX, NW : Integer;
begin
if X >= Buffer.Width
or else Y not in 0 .. Buffer.Height - 1
then
return;
end if;
if X < 0 then
NX := 0;
NW := Width + X;
else
NX := X;
NW := Width;
end if;
NW := Integer'Min (NW, Buffer.Width - NX - 1);
DMA2D_Fill_Rect (Buffer, Color, NX, Y, NW, 1, Synchronous);
end DMA2D_Draw_Horizontal_Line;
---------------------
-- DMA2D_Set_Pixel --
---------------------
procedure DMA2D_Set_Pixel
(Buffer : DMA2D_Buffer;
X, Y : Integer;
Color : Word;
Synchronous : Boolean := False)
is
function Conv is new Ada.Unchecked_Conversion (Word, OCOLR_Register);
Off : constant Word := Offset (Buffer, X, Y);
Dead : Boolean := False with Unreferenced;
begin
if X < 0 or else Y < 0
or else X >= Buffer.Width or else Y >= Buffer.Height
then
return;
end if;
DMA2D_Wait_Transfer_Int.all;
DMA2D_Periph.CR.MODE := DMA2D_MODE'Enum_Rep (R2M);
DMA2D_Periph.OPFCCR.CM := As_UInt3 (Buffer.Color_Mode);
DMA2D_Periph.OCOLR := Conv (Color);
DMA2D_Periph.OMAR := To_Word (Buffer.Addr) + Off;
DMA2D_Periph.OOR := (LO => 1, others => <>);
DMA2D_Periph.NLR := (NL => 1, PL => 1, others => <>);
DMA2D_Init_Transfer_Int.all;
if Synchronous then
DMA2D_Wait_Transfer_Int.all;
end if;
end DMA2D_Set_Pixel;
---------------------------
-- DMA2D_Set_Pixel_Blend --
---------------------------
procedure DMA2D_Set_Pixel_Blend
(Buffer : DMA2D_Buffer;
X, Y : Integer;
Color : DMA2D_Color;
Synchronous : Boolean := False)
is
Off : constant Word := Offset (Buffer, X, Y);
Dead : Boolean := False with Unreferenced;
begin
if X < 0 or else Y < 0
or else X >= Buffer.Width or else Y >= Buffer.Height
then
return;
end if;
DMA2D_Wait_Transfer_Int.all;
-- PFC and blending
DMA2D_Periph.CR.MODE := DMA2D_MODE'Enum_Rep (M2M_BLEND);
-- SOURCE CONFIGURATION
DMA2D_Periph.FGPFCCR.CM := ARGB8888'Enum_Rep;
DMA2D_Periph.FGMAR := To_Word (Color'Address);
DMA2D_Periph.FGPFCCR.AM := DMA2D_AM'Enum_Rep (NO_MODIF);
DMA2D_Periph.FGPFCCR.ALPHA := 255;
DMA2D_Periph.FGPFCCR.CS := 0;
DMA2D_Periph.FGPFCCR.START := False;
DMA2D_Periph.FGOR := (LO => 0, others => <>);
DMA2D_Periph.FGPFCCR.CCM := False; -- Disable CLUT color mode
-- Setup the Background buffer to the destination buffer
DMA2D_Periph.BGPFCCR.CM :=
DMA2D_Color_Mode'Enum_Rep (Buffer.Color_Mode);
DMA2D_Periph.BGMAR := To_Word (Buffer.Addr) + Off;
DMA2D_Periph.BGPFCCR.CS := 0;
DMA2D_Periph.BGPFCCR.START := False;
DMA2D_Periph.BGOR := (LO => UInt14 (Buffer.Width - 1),
others => <>);
DMA2D_Periph.BGPFCCR.CCM := False; -- Disable CLUT color mode
-- DST CONFIGURATION
DMA2D_Periph.OPFCCR.CM :=
DMA2D_Color_Mode'Enum_Rep (Buffer.Color_Mode);
DMA2D_Periph.OMAR := To_Word (Buffer.Addr) + Off;
DMA2D_Periph.OOR := (LO => UInt14 (Buffer.Width - 1),
others => <>);
DMA2D_Periph.NLR := (NL => 1,
PL => 1,
others => <>);
DMA2D_Init_Transfer_Int.all;
if Synchronous then
DMA2D_Wait_Transfer_Int.all;
end if;
end DMA2D_Set_Pixel_Blend;
-------------------------
-- DMA2D_Wait_Transfer --
-------------------------
procedure DMA2D_Wait_Transfer is
begin
DMA2D_Wait_Transfer_Int.all;
end DMA2D_Wait_Transfer;
end STM32.DMA2D;
|
reznikmm/matreshka | Ada | 3,960 | adb | ------------------------------------------------------------------------------
-- --
-- Matreshka Project --
-- --
-- XML Processor --
-- --
-- Testsuite Component --
-- --
------------------------------------------------------------------------------
-- --
-- Copyright © 2014, Vadim Godunko <[email protected]> --
-- All rights reserved. --
-- --
-- Redistribution and use in source and binary forms, with or without --
-- modification, are permitted provided that the following conditions --
-- are met: --
-- --
-- * Redistributions of source code must retain the above copyright --
-- notice, this list of conditions and the following disclaimer. --
-- --
-- * Redistributions in binary form must reproduce the above copyright --
-- notice, this list of conditions and the following disclaimer in the --
-- documentation and/or other materials provided with the distribution. --
-- --
-- * Neither the name of the Vadim Godunko, IE nor the names of its --
-- contributors may be used to endorse or promote products derived from --
-- this software without specific prior written permission. --
-- --
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS --
-- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT --
-- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR --
-- A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT --
-- HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, --
-- SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED --
-- TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR --
-- PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF --
-- LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING --
-- NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS --
-- SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --
-- --
------------------------------------------------------------------------------
-- $Revision$ $Date$
------------------------------------------------------------------------------
with League.Application;
with XML.SAX.Constants;
with XML.SAX.File_Input_Sources;
with XML.SAX.Simple_Readers;
with DOMConf.Test_Parsers;
procedure DOMConf.Driver is
Input : aliased XML.SAX.File_Input_Sources.File_Input_Source;
Parser : aliased DOMConf.Test_Parsers.Test_Parser;
Reader : aliased XML.SAX.Simple_Readers.Simple_Reader;
begin
Input.Open_By_File_Name (League.Application.Arguments.Element (1));
Reader.Set_Feature (XML.SAX.Constants.Load_External_DTD_Feature, False);
Reader.Set_Content_Handler (Parser'Unchecked_Access);
Reader.Parse (Input'Unchecked_Access);
end DOMConf.Driver;
|
persan/protobuf-ada | Ada | 2,176 | ads | pragma Ada_2012;
with Interfaces;
package Protocol_Buffers.Wire_Format is
-- These are temporary types that should be replaced
-- with something more portable. ???
type TMP_STRING is new String;
type TMP_STRING_ACCESS is access all TMP_STRING;
subtype TMP_UNSIGNED_BYTE is Interfaces.Unsigned_8;
subtype TMP_UNSIGNED_INTEGER is Interfaces.Unsigned_32;
subtype TMP_UNSIGNED_LONG is Interfaces.Unsigned_64;
type TMP_DOUBLE is new Interfaces.IEEE_Float_64;
type TMP_FLOAT is new Interfaces.IEEE_Float_32;
type TMP_BOOLEAN is new Boolean;
type TMP_INTEGER is new Long_Integer;
type TMP_LONG is new Long_Long_Integer;
type TMP_FIELD_TYPE is new Interfaces.Unsigned_32;
type TMP_WIRE_TYPE is (VARINT, FIXED_64, LENGTH_DELIMITED, START_GROUP, END_GROUP, FIXED_32);
type TMP_OBJECT_SIZE is new Natural;
-- Change return type ???
function Make_Tag (Field_Number : in TMP_FIELD_TYPE; Wire_Type : in TMP_WIRE_TYPE) return TMP_UNSIGNED_INTEGER;
function Get_Tag_Wire_Type (Tag : in TMP_UNSIGNED_INTEGER) return TMP_WIRE_TYPE;
function Get_Tag_Field_Number (Tag : in TMP_UNSIGNED_INTEGER) return TMP_FIELD_TYPE;
function Shift_Left (Value : in Interfaces.Unsigned_8; Amount : in Natural) return Interfaces.Unsigned_8 renames Interfaces.Shift_Left;
function Shift_Left (Value : in Interfaces.Unsigned_32; Amount : in Natural) return Interfaces.Unsigned_32 renames Interfaces.Shift_Left;
function Shift_Left (Value : in Interfaces.Unsigned_64; Amount : in Natural) return Interfaces.Unsigned_64 renames Interfaces.Shift_Left;
function Shift_Right (Value : in Interfaces.Unsigned_8; Amount : in Natural) return Interfaces.Unsigned_8 renames Interfaces.Shift_Right;
function Shift_Right (Value : in Interfaces.Unsigned_32; Amount : in Natural) return Interfaces.Unsigned_32 renames Interfaces.Shift_Right;
function Shift_Right (Value : in Interfaces.Unsigned_64; Amount : in Natural) return Interfaces.Unsigned_64 renames Interfaces.Shift_Right;
TAG_TYPE_BITS : constant := 3;
TAG_TYPE_MASK : TMP_UNSIGNED_INTEGER := Interfaces."-"(Shift_Left (1, TAG_TYPE_BITS) , 1);
end Protocol_Buffers.Wire_Format;
|
NCommander/dnscatcher | Ada | 5,551 | ads | -- Copyright 2019 Michael Casadevall <[email protected]>
--
-- Permission is hereby granted, free of charge, to any person obtaining a copy
-- of this software and associated documentation files (the "Software"), to
-- deal in the Software without restriction, including without limitation the
-- rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
-- sell copies of the Software, and to permit persons to whom the Software is
-- furnished to do so, subject to the following conditions:
--
-- The above copyright notice and this permission notice shall be included in
-- all copies or substantial portions of the Software.
--
-- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
-- THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-- FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
-- DEALINGS IN THE SOFTWARE.
with Ada.Strings.Unbounded; use Ada.Strings.Unbounded;
with Ada.Containers.Vectors; use Ada.Containers;
with Ada.Containers.Hashed_Maps;
with Interfaces.C.Extensions; use Interfaces.C.Extensions;
with GNAT.Sockets; use GNAT.Sockets;
with DNSCatcher.Datasets; use DNSCatcher.Datasets;
with DNSCatcher.Types; use DNSCatcher.Types;
-- @summary
-- The Transaction Manager keeps state of DNS connections and ensures that each
-- individual client gets the correct DNS request without crossrouting them
--
-- @description
-- The Transaction Manager keeps track of the state of DNS handshakes and
-- requests. This is required due to the connectionless nature of UDP, and to
-- a lesser extent with TCP/IP, DoH/DoT. This is handled on a per network layer
-- level, so UDP v4 and v6 have seperate transaction managers to handle result
-- management.
--
package DNSCatcher.DNS.Transaction_Manager is
-- Collection of stored packets for processing or delivery
package Stored_Packets_Vector is new Vectors (Natural,
Raw_Packet_Record_Ptr);
-- DNS Transaction Task
--
-- Handles transaction management as a many procedures, one (or more)
-- consumers.
task type DNS_Transaction_Manager_Task is
-- Starts the Transaction Manager
entry Start;
-- Sets the packet queue vector for a given network interface
--
-- @value Queue
-- The raw packet queue to use
entry Set_Packet_Queue (Queue : DNS_Raw_Packet_Queue_Ptr);
-- Inbound client packets come here
--
-- @value Packet
-- The raw packet as generated by the network interface
--
-- @value Local
-- Is this packet generated by the internal DNS client?
entry From_Client_Resolver_Packet
(Packet : Raw_Packet_Record_Ptr;
Local : Boolean);
-- Inbound server packets are loaded here
--
-- @value Packet
-- Raw DNS packet generated by the network interface code
--
entry From_Upstream_Resolver_Packet (Packet : Raw_Packet_Record_Ptr);
-- DNS Transaction Manager shutdown
entry Stop;
end DNS_Transaction_Manager_Task;
type DNS_Transaction_Manager_Task_Ptr is
access DNS_Transaction_Manager_Task;
private
-- Record of a DNS Transaction
--
-- @value Client_Resolver_Address
-- The downstream client making a request to DNSCatcher's internal DNS
-- server (or relay)
--
-- @value Client_Resolver_Port
--
-- The port used for communicating with; due to the way UDP sockets work,
-- this can be a high level port that's dynamically allocated and not port
-- 53 as may be expected
--
-- @value Server_Resolver_Address
--
-- The upstream server that is handling this result. May be the Catcher
-- instance itself.
--
-- @value Server_Resolver_Port
--
-- The port used to communicate with the upstream server location
--
-- @value DNS_Transaction_Id
--
-- The 16-bit integer sent by the client to isolate individual DNS
-- transactions from a given client.
--
-- @value Local_Request
-- The internal DNS Client made this request
--
-- @value From_Client_Resolver_Packet The client's packet allocated on the
-- heap ready for processing
--
-- @value From_Upstream_Resolver_Packet The upstream server's packet ready
-- for delivery to the client
--
type DNS_Transaction is record
Client_Resolver_Address : Unbounded_String;
Client_Resolver_Port : Port_Type;
Server_Resolver_Address : Unbounded_String;
Server_Resolver_Port : Port_Type;
DNS_Transaction_Id : Unsigned_16;
Local_Request : Boolean;
From_Client_Resolver_Packet : Raw_Packet_Record_Ptr;
From_Upstream_Resolver_Packet : Raw_Packet_Record_Ptr;
end record;
type DNS_Transaction_Ptr is access DNS_Transaction;
type IP_Transaction_Key is new Unbounded_String;
function IP_Transaction_Key_HashID
(id : IP_Transaction_Key)
return Hash_Type;
package DNS_Transaction_Maps is new Hashed_Maps
(Key_Type => IP_Transaction_Key, Element_Type => DNS_Transaction_Ptr,
Hash => IP_Transaction_Key_HashID, Equivalent_Keys => "=");
use DNS_Transaction_Maps;
procedure Free_Hash_Map_Entry (c : DNS_Transaction_Maps.Cursor);
end DNSCatcher.DNS.Transaction_Manager;
|
stcarrez/sql-benchmark | Ada | 9,156 | adb | -- --
-- package Copyright (c) Dmitry A. Kazakov --
-- IEEE_754.Generic_Double_Precision Luebeck --
-- Implementation Summer, 2008 --
-- --
-- Last revision : 09:27 06 Nov 2016 --
-- --
-- This library is free software; you can redistribute it and/or --
-- modify it under the terms of the GNU General Public License as --
-- published by the Free Software Foundation; either version 2 of --
-- the License, or (at your option) any later version. This library --
-- is distributed in the hope that it will be useful, but WITHOUT --
-- ANY WARRANTY; without even the implied warranty of --
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU --
-- General Public License for more details. You should have --
-- received a copy of the GNU General Public License along with --
-- this library; if not, write to the Free Software Foundation, --
-- Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. --
-- --
-- As a special exception, if other files instantiate generics from --
-- this unit, or you link this unit with other files to produce an --
-- executable, this unit does not by itself cause the resulting --
-- executable to be covered by the GNU General Public License. This --
-- exception does not however invalidate any other reasons why the --
-- executable file might be covered by the GNU Public License. --
--____________________________________________________________________--
package body IEEE_754.Generic_Double_Precision is
Exponent_Bias : constant := 2**10 - 1;
Exponent_First : constant := -51;
Exponent_Last : constant := 2**11 - 1;
Fraction_Bits : constant := 52;
Mantissa_Bits : constant := 53;
function Exponent (Value : Float_64) return Integer is
pragma Inline (Exponent);
begin
return
Integer
( Shift_Left (Unsigned_16 (Value (1)) and 16#7F#, 4)
or Shift_Right (Unsigned_16 (Value (2)), 4)
);
end Exponent;
function Mantissa (Value : Float_64) return Unsigned_64 is
pragma Inline (Mantissa);
begin
return
( Unsigned_64 (Value (8))
or Shift_Left (Unsigned_64 (Value (7)), 8 )
or Shift_Left (Unsigned_64 (Value (6)), 2*8)
or Shift_Left (Unsigned_64 (Value (5)), 3*8)
or Shift_Left (Unsigned_64 (Value (4)), 4*8)
or Shift_Left (Unsigned_64 (Value (3)), 5*8)
or Shift_Left (Unsigned_64 (Value (2)) and 16#0F#, 6*8)
or 2 ** Fraction_Bits
);
end Mantissa;
procedure Normalize
( Value : Number;
Mantissa : out Unsigned_64;
Exponent : out Integer
) is
begin
if Number'Machine_Radix = 2 then
--
-- The machine radix is binary. We can use the hardware
-- representation attributes in order to get the exponent and
-- the fraction.
--
Exponent := Number'Exponent (Value) - Mantissa_Bits;
Mantissa := Unsigned_64 (Number'Scaling (Value, -Exponent));
else
--
-- OK, this gets more tricky. The number is normalized to be in
-- the range 2**53 > X >= 2**52, by multiplying to the powers
-- of two. Some optimization is made to factor out the powers
-- 2**(2**n)). Though we do not use powers bigger than 30.
--
declare
Accum : Number := Value;
Shift : Integer;
begin
Exponent := 0;
if Accum < 2.0**Fraction_Bits then
Shift := 24;
while Shift > 0 loop
if Accum < 2.0**(Mantissa_Bits - Shift) then
Accum := Accum * 2.0**Shift;
Exponent := Exponent - Shift;
else
Shift := Shift / 2;
end if;
end loop;
elsif Accum >= 2.0**Mantissa_Bits then
Shift := 8;
while Shift > 0 loop
if Accum >= 2.0**(Fraction_Bits + Shift) then
Accum := Accum / 2.0**Shift;
Exponent := Exponent + Shift;
else
Shift := Shift / 2;
end if;
end loop;
end if;
Mantissa := Unsigned_64 (Accum);
end;
end if;
end Normalize;
function From_IEEE (Value : Float_64) return Number is
begin
if 0 = (Value (1) and 16#7F#)
and then
Value (2) = 0
and then
Value (3) = 0
and then
Value (4) = 0
and then
Value (5) = 0
and then
Value (6) = 0
and then
Value (7) = 0
and then
Value (8) = 0
then
return 0.0;
end if;
declare
Power : Integer := Exponent (Value);
Fraction : Unsigned_64 := Mantissa (Value);
Result : Number;
begin
if Power = Exponent_Last then
if Fraction /= 2#1000_0000_0000# then
raise Not_A_Number_Error;
elsif Value (1) > 127 then
raise Negative_Overflow_Error;
else
raise Positive_Overflow_Error;
end if;
elsif Power = 0 then -- Denormalized number
Fraction := Fraction and 16#0F_FF_FF_FF_FF_FF_FF_FF#;
Power := Exponent_First - Exponent_Bias;
if Number'Machine_Radix = 2 then
Result := Number'Scaling (Number (Fraction), Power);
else
Result := Number (Fraction) * 2.0 ** Power;
end if;
else -- Normalized number
Power := Power - Exponent_Bias - Fraction_Bits;
if Number'Machine_Radix = 2 then
Result := Number'Scaling (Number (Fraction), Power);
else
Result := Number (Fraction) * 2.0 ** Power;
end if;
end if;
if Value (1) > 127 then
return -Result;
else
return Result;
end if;
exception
when Constraint_Error =>
if Value (1) > 127 then
raise Negative_Overflow_Error;
else
raise Positive_Overflow_Error;
end if;
end;
end From_IEEE;
function Is_NaN (Value : Float_64) return Boolean is
begin
return
( Exponent (Value) = Exponent_Last
and then
Mantissa (Value) /= 2 ** Fraction_Bits
);
end Is_NaN;
function Is_Negative (Value : Float_64) return Boolean is
begin
return Value (1) > 127;
end Is_Negative;
function Is_Real (Value : Float_64) return Boolean is
begin
return Exponent (Value) < Exponent_Last;
end Is_Real;
function To_IEEE (Value : Number) return Float_64 is
begin
if Value = 0.0 then
return (others => 0);
end if;
declare
Exponent : Integer;
Fraction : Unsigned_64;
Sign : Byte := 0;
begin
if Value > 0.0 then
Normalize (Value, Fraction, Exponent);
else
Normalize (-Value, Fraction, Exponent);
Sign := 2**7;
end if;
Exponent := Exponent + Exponent_Bias + Fraction_Bits;
if Exponent < Exponent_First then
-- Underflow, resuls in zero
return (others => 0);
elsif Exponent >= Exponent_Last then
-- Overflow, results in infinities
if Sign = 0 then
return Positive_Infinity;
else
return Negative_Infinity;
end if;
elsif Exponent <= 0 then -- Denormalized
Fraction := Shift_Right (Fraction, 1 - Exponent);
Exponent := 0;
end if;
return
( Sign or Byte (Exponent / 2**4),
( Byte (Shift_Right (Fraction, 8*6) and 16#0F#)
or Shift_Left (Byte (Exponent mod 2**4), 4)
),
Byte (Shift_Right (Fraction, 8*5) and 16#FF#),
Byte (Shift_Right (Fraction, 8*4) and 16#FF#),
Byte (Shift_Right (Fraction, 8*3) and 16#FF#),
Byte (Shift_Right (Fraction, 8*2) and 16#FF#),
Byte (Shift_Right (Fraction, 8 ) and 16#FF#),
Byte (Fraction and 16#FF#)
);
end;
end To_IEEE;
end IEEE_754.Generic_Double_Precision;
|
ekoeppen/STM32_Generic_Ada_Drivers | Ada | 14,359 | ads | -- This spec has been automatically generated from STM32F103.svd
pragma Restrictions (No_Elaboration_Code);
pragma Ada_2012;
pragma Style_Checks (Off);
with System;
package STM32_SVD.DAC is
pragma Preelaborate;
---------------
-- Registers --
---------------
subtype CR_EN1_Field is STM32_SVD.Bit;
subtype CR_BOFF1_Field is STM32_SVD.Bit;
subtype CR_TEN1_Field is STM32_SVD.Bit;
subtype CR_TSEL1_Field is STM32_SVD.UInt3;
subtype CR_WAVE1_Field is STM32_SVD.UInt2;
subtype CR_MAMP1_Field is STM32_SVD.UInt4;
subtype CR_DMAEN1_Field is STM32_SVD.Bit;
subtype CR_EN2_Field is STM32_SVD.Bit;
subtype CR_BOFF2_Field is STM32_SVD.Bit;
subtype CR_TEN2_Field is STM32_SVD.Bit;
subtype CR_TSEL2_Field is STM32_SVD.UInt3;
subtype CR_WAVE2_Field is STM32_SVD.UInt2;
subtype CR_MAMP2_Field is STM32_SVD.UInt4;
subtype CR_DMAEN2_Field is STM32_SVD.Bit;
-- Control register (DAC_CR)
type CR_Register is record
-- DAC channel1 enable
EN1 : CR_EN1_Field := 16#0#;
-- DAC channel1 output buffer disable
BOFF1 : CR_BOFF1_Field := 16#0#;
-- DAC channel1 trigger enable
TEN1 : CR_TEN1_Field := 16#0#;
-- DAC channel1 trigger selection
TSEL1 : CR_TSEL1_Field := 16#0#;
-- DAC channel1 noise/triangle wave generation enable
WAVE1 : CR_WAVE1_Field := 16#0#;
-- DAC channel1 mask/amplitude selector
MAMP1 : CR_MAMP1_Field := 16#0#;
-- DAC channel1 DMA enable
DMAEN1 : CR_DMAEN1_Field := 16#0#;
-- unspecified
Reserved_13_15 : STM32_SVD.UInt3 := 16#0#;
-- DAC channel2 enable
EN2 : CR_EN2_Field := 16#0#;
-- DAC channel2 output buffer disable
BOFF2 : CR_BOFF2_Field := 16#0#;
-- DAC channel2 trigger enable
TEN2 : CR_TEN2_Field := 16#0#;
-- DAC channel2 trigger selection
TSEL2 : CR_TSEL2_Field := 16#0#;
-- DAC channel2 noise/triangle wave generation enable
WAVE2 : CR_WAVE2_Field := 16#0#;
-- DAC channel2 mask/amplitude selector
MAMP2 : CR_MAMP2_Field := 16#0#;
-- DAC channel2 DMA enable
DMAEN2 : CR_DMAEN2_Field := 16#0#;
-- unspecified
Reserved_29_31 : STM32_SVD.UInt3 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for CR_Register use record
EN1 at 0 range 0 .. 0;
BOFF1 at 0 range 1 .. 1;
TEN1 at 0 range 2 .. 2;
TSEL1 at 0 range 3 .. 5;
WAVE1 at 0 range 6 .. 7;
MAMP1 at 0 range 8 .. 11;
DMAEN1 at 0 range 12 .. 12;
Reserved_13_15 at 0 range 13 .. 15;
EN2 at 0 range 16 .. 16;
BOFF2 at 0 range 17 .. 17;
TEN2 at 0 range 18 .. 18;
TSEL2 at 0 range 19 .. 21;
WAVE2 at 0 range 22 .. 23;
MAMP2 at 0 range 24 .. 27;
DMAEN2 at 0 range 28 .. 28;
Reserved_29_31 at 0 range 29 .. 31;
end record;
-- SWTRIGR_SWTRIG array element
subtype SWTRIGR_SWTRIG_Element is STM32_SVD.Bit;
-- SWTRIGR_SWTRIG array
type SWTRIGR_SWTRIG_Field_Array is array (1 .. 2)
of SWTRIGR_SWTRIG_Element
with Component_Size => 1, Size => 2;
-- Type definition for SWTRIGR_SWTRIG
type SWTRIGR_SWTRIG_Field
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
-- SWTRIG as a value
Val : STM32_SVD.UInt2;
when True =>
-- SWTRIG as an array
Arr : SWTRIGR_SWTRIG_Field_Array;
end case;
end record
with Unchecked_Union, Size => 2;
for SWTRIGR_SWTRIG_Field use record
Val at 0 range 0 .. 1;
Arr at 0 range 0 .. 1;
end record;
-- DAC software trigger register (DAC_SWTRIGR)
type SWTRIGR_Register is record
-- Write-only. DAC channel1 software trigger
SWTRIG : SWTRIGR_SWTRIG_Field :=
(As_Array => False, Val => 16#0#);
-- unspecified
Reserved_2_31 : STM32_SVD.UInt30 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for SWTRIGR_Register use record
SWTRIG at 0 range 0 .. 1;
Reserved_2_31 at 0 range 2 .. 31;
end record;
subtype DHR12R1_DACC1DHR_Field is STM32_SVD.UInt12;
-- DAC channel1 12-bit right-aligned data holding register(DAC_DHR12R1)
type DHR12R1_Register is record
-- DAC channel1 12-bit right-aligned data
DACC1DHR : DHR12R1_DACC1DHR_Field := 16#0#;
-- unspecified
Reserved_12_31 : STM32_SVD.UInt20 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for DHR12R1_Register use record
DACC1DHR at 0 range 0 .. 11;
Reserved_12_31 at 0 range 12 .. 31;
end record;
subtype DHR12L1_DACC1DHR_Field is STM32_SVD.UInt12;
-- DAC channel1 12-bit left aligned data holding register (DAC_DHR12L1)
type DHR12L1_Register is record
-- unspecified
Reserved_0_3 : STM32_SVD.UInt4 := 16#0#;
-- DAC channel1 12-bit left-aligned data
DACC1DHR : DHR12L1_DACC1DHR_Field := 16#0#;
-- unspecified
Reserved_16_31 : STM32_SVD.UInt16 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for DHR12L1_Register use record
Reserved_0_3 at 0 range 0 .. 3;
DACC1DHR at 0 range 4 .. 15;
Reserved_16_31 at 0 range 16 .. 31;
end record;
subtype DHR8R1_DACC1DHR_Field is STM32_SVD.Byte;
-- DAC channel1 8-bit right aligned data holding register (DAC_DHR8R1)
type DHR8R1_Register is record
-- DAC channel1 8-bit right-aligned data
DACC1DHR : DHR8R1_DACC1DHR_Field := 16#0#;
-- unspecified
Reserved_8_31 : STM32_SVD.UInt24 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for DHR8R1_Register use record
DACC1DHR at 0 range 0 .. 7;
Reserved_8_31 at 0 range 8 .. 31;
end record;
subtype DHR12R2_DACC2DHR_Field is STM32_SVD.UInt12;
-- DAC channel2 12-bit right aligned data holding register (DAC_DHR12R2)
type DHR12R2_Register is record
-- DAC channel2 12-bit right-aligned data
DACC2DHR : DHR12R2_DACC2DHR_Field := 16#0#;
-- unspecified
Reserved_12_31 : STM32_SVD.UInt20 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for DHR12R2_Register use record
DACC2DHR at 0 range 0 .. 11;
Reserved_12_31 at 0 range 12 .. 31;
end record;
subtype DHR12L2_DACC2DHR_Field is STM32_SVD.UInt12;
-- DAC channel2 12-bit left aligned data holding register (DAC_DHR12L2)
type DHR12L2_Register is record
-- unspecified
Reserved_0_3 : STM32_SVD.UInt4 := 16#0#;
-- DAC channel2 12-bit left-aligned data
DACC2DHR : DHR12L2_DACC2DHR_Field := 16#0#;
-- unspecified
Reserved_16_31 : STM32_SVD.UInt16 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for DHR12L2_Register use record
Reserved_0_3 at 0 range 0 .. 3;
DACC2DHR at 0 range 4 .. 15;
Reserved_16_31 at 0 range 16 .. 31;
end record;
subtype DHR8R2_DACC2DHR_Field is STM32_SVD.Byte;
-- DAC channel2 8-bit right-aligned data holding register (DAC_DHR8R2)
type DHR8R2_Register is record
-- DAC channel2 8-bit right-aligned data
DACC2DHR : DHR8R2_DACC2DHR_Field := 16#0#;
-- unspecified
Reserved_8_31 : STM32_SVD.UInt24 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for DHR8R2_Register use record
DACC2DHR at 0 range 0 .. 7;
Reserved_8_31 at 0 range 8 .. 31;
end record;
subtype DHR12RD_DACC1DHR_Field is STM32_SVD.UInt12;
subtype DHR12RD_DACC2DHR_Field is STM32_SVD.UInt12;
-- Dual DAC 12-bit right-aligned data holding register (DAC_DHR12RD), Bits
-- 31:28 Reserved, Bits 15:12 Reserved
type DHR12RD_Register is record
-- DAC channel1 12-bit right-aligned data
DACC1DHR : DHR12RD_DACC1DHR_Field := 16#0#;
-- unspecified
Reserved_12_15 : STM32_SVD.UInt4 := 16#0#;
-- DAC channel2 12-bit right-aligned data
DACC2DHR : DHR12RD_DACC2DHR_Field := 16#0#;
-- unspecified
Reserved_28_31 : STM32_SVD.UInt4 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for DHR12RD_Register use record
DACC1DHR at 0 range 0 .. 11;
Reserved_12_15 at 0 range 12 .. 15;
DACC2DHR at 0 range 16 .. 27;
Reserved_28_31 at 0 range 28 .. 31;
end record;
subtype DHR12LD_DACC1DHR_Field is STM32_SVD.UInt12;
subtype DHR12LD_DACC2DHR_Field is STM32_SVD.UInt12;
-- DUAL DAC 12-bit left aligned data holding register (DAC_DHR12LD), Bits
-- 19:16 Reserved, Bits 3:0 Reserved
type DHR12LD_Register is record
-- unspecified
Reserved_0_3 : STM32_SVD.UInt4 := 16#0#;
-- DAC channel1 12-bit left-aligned data
DACC1DHR : DHR12LD_DACC1DHR_Field := 16#0#;
-- unspecified
Reserved_16_19 : STM32_SVD.UInt4 := 16#0#;
-- DAC channel2 12-bit right-aligned data
DACC2DHR : DHR12LD_DACC2DHR_Field := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for DHR12LD_Register use record
Reserved_0_3 at 0 range 0 .. 3;
DACC1DHR at 0 range 4 .. 15;
Reserved_16_19 at 0 range 16 .. 19;
DACC2DHR at 0 range 20 .. 31;
end record;
subtype DHR8RD_DACC1DHR_Field is STM32_SVD.Byte;
subtype DHR8RD_DACC2DHR_Field is STM32_SVD.Byte;
-- DUAL DAC 8-bit right aligned data holding register (DAC_DHR8RD), Bits
-- 31:16 Reserved
type DHR8RD_Register is record
-- DAC channel1 8-bit right-aligned data
DACC1DHR : DHR8RD_DACC1DHR_Field := 16#0#;
-- DAC channel2 8-bit right-aligned data
DACC2DHR : DHR8RD_DACC2DHR_Field := 16#0#;
-- unspecified
Reserved_16_31 : STM32_SVD.UInt16 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for DHR8RD_Register use record
DACC1DHR at 0 range 0 .. 7;
DACC2DHR at 0 range 8 .. 15;
Reserved_16_31 at 0 range 16 .. 31;
end record;
subtype DOR1_DACC1DOR_Field is STM32_SVD.UInt12;
-- DAC channel1 data output register (DAC_DOR1)
type DOR1_Register is record
-- Read-only. DAC channel1 data output
DACC1DOR : DOR1_DACC1DOR_Field;
-- unspecified
Reserved_12_31 : STM32_SVD.UInt20;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for DOR1_Register use record
DACC1DOR at 0 range 0 .. 11;
Reserved_12_31 at 0 range 12 .. 31;
end record;
subtype DOR2_DACC2DOR_Field is STM32_SVD.UInt12;
-- DAC channel2 data output register (DAC_DOR2)
type DOR2_Register is record
-- Read-only. DAC channel2 data output
DACC2DOR : DOR2_DACC2DOR_Field;
-- unspecified
Reserved_12_31 : STM32_SVD.UInt20;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for DOR2_Register use record
DACC2DOR at 0 range 0 .. 11;
Reserved_12_31 at 0 range 12 .. 31;
end record;
-----------------
-- Peripherals --
-----------------
-- Digital to analog converter
type DAC_Peripheral is record
-- Control register (DAC_CR)
CR : aliased CR_Register;
-- DAC software trigger register (DAC_SWTRIGR)
SWTRIGR : aliased SWTRIGR_Register;
-- DAC channel1 12-bit right-aligned data holding register(DAC_DHR12R1)
DHR12R1 : aliased DHR12R1_Register;
-- DAC channel1 12-bit left aligned data holding register (DAC_DHR12L1)
DHR12L1 : aliased DHR12L1_Register;
-- DAC channel1 8-bit right aligned data holding register (DAC_DHR8R1)
DHR8R1 : aliased DHR8R1_Register;
-- DAC channel2 12-bit right aligned data holding register (DAC_DHR12R2)
DHR12R2 : aliased DHR12R2_Register;
-- DAC channel2 12-bit left aligned data holding register (DAC_DHR12L2)
DHR12L2 : aliased DHR12L2_Register;
-- DAC channel2 8-bit right-aligned data holding register (DAC_DHR8R2)
DHR8R2 : aliased DHR8R2_Register;
-- Dual DAC 12-bit right-aligned data holding register (DAC_DHR12RD),
-- Bits 31:28 Reserved, Bits 15:12 Reserved
DHR12RD : aliased DHR12RD_Register;
-- DUAL DAC 12-bit left aligned data holding register (DAC_DHR12LD),
-- Bits 19:16 Reserved, Bits 3:0 Reserved
DHR12LD : aliased DHR12LD_Register;
-- DUAL DAC 8-bit right aligned data holding register (DAC_DHR8RD), Bits
-- 31:16 Reserved
DHR8RD : aliased DHR8RD_Register;
-- DAC channel1 data output register (DAC_DOR1)
DOR1 : aliased DOR1_Register;
-- DAC channel2 data output register (DAC_DOR2)
DOR2 : aliased DOR2_Register;
end record
with Volatile;
for DAC_Peripheral use record
CR at 16#0# range 0 .. 31;
SWTRIGR at 16#4# range 0 .. 31;
DHR12R1 at 16#8# range 0 .. 31;
DHR12L1 at 16#C# range 0 .. 31;
DHR8R1 at 16#10# range 0 .. 31;
DHR12R2 at 16#14# range 0 .. 31;
DHR12L2 at 16#18# range 0 .. 31;
DHR8R2 at 16#1C# range 0 .. 31;
DHR12RD at 16#20# range 0 .. 31;
DHR12LD at 16#24# range 0 .. 31;
DHR8RD at 16#28# range 0 .. 31;
DOR1 at 16#2C# range 0 .. 31;
DOR2 at 16#30# range 0 .. 31;
end record;
-- Digital to analog converter
DAC_Periph : aliased DAC_Peripheral
with Import, Address => System'To_Address (16#40007400#);
end STM32_SVD.DAC;
|
onox/orka | Ada | 2,518 | ads | -- SPDX-License-Identifier: Apache-2.0
--
-- Copyright (c) 2020 onox <[email protected]>
--
-- Licensed under the Apache License, Version 2.0 (the "License");
-- you may not use this file except in compliance with the License.
-- You may obtain a copy of the License at
--
-- http://www.apache.org/licenses/LICENSE-2.0
--
-- Unless required by applicable law or agreed to in writing, software
-- distributed under the License is distributed on an "AS IS" BASIS,
-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-- See the License for the specific language governing permissions and
-- limitations under the License.
limited with EGL.Objects.Displays;
package EGL.Objects.Devices is
pragma Preelaborate;
type Device is new EGL_Object with private;
function Extensions (Object : Device) return String_List;
-- Return a list of EGL device extensions
--
-- Requires EGL_EXT_device_query extension
function Name (Object : Device) return String;
-- Return the name of a device, or empty string if device has
-- no name
--
-- Requires EGL_EXT_device_drm extension for DRM devices.
function In_Use (Object : Device) return Boolean;
-- Return True if the device was retrieved from a display, False otherwise
No_Device : constant Device;
type Device_List is array (Natural range <>) of aliased Device;
function Devices return Device_List;
-- Return a list of devices
--
-- Requires EGL_EXT_device_enumeration extension
function Get_Device (Subject : Displays.Display) return Device
with Post => Get_Device'Result.In_Use;
-- Return the device of a display
--
-- Requires EGL_EXT_device_query extension.
private
type Fake_Display is new EGL_Object with null record;
-- Contains the Reference of a real Display when a Device is
-- retrieved via function Get_Device
No_Display : constant Fake_Display := (EGL_Object with null record);
type Device is new EGL_Object with record
Display : Fake_Display := No_Display;
-- Since a device is a property of a display, the display must
-- not get finalized while the device is still allocated. Otherwise
-- any further use will give undefined results.
--
-- See EGL_EXT_device_query extension.
end record;
No_Device : constant Device := (EGL_Object with Display => <>);
function In_Use (Object : Device) return Boolean is (Object.Display /= No_Display);
end EGL.Objects.Devices;
|
Subsets and Splits