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b90c39baea847f8c69585adc0091405a0faaf979 | a47aa19815683df16782909a5e761fc1718a09ed | /fs2_open-unstable/code/model/modelanim.h | 1fdeb98ae0a6da4abdc4b6ef6d641ff214b33776 | [] | no_license | PubFork/FS2Open_Trunk | 1e30bd97712b7a7bc2b8302784e8f61c9239fd6f | f1d7904e74141b21ecf691a393d730bb8ba0e134 | refs/heads/master | 2023-03-15T21:57:32.800167 | 2015-01-27T08:02:21 | 2015-01-27T08:02:21 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 4,765 | h | /*
* Copyright (C) Volition, Inc. 1999. All rights reserved.
*
* All source code herein is the property of Volition, Inc. You may not sell
* or otherwise commercially exploit the source or things you created based on the
* source.
*
*/
/*
* $Logfile: /Freespace2/code/model/modelanim.h $
* $Revision: 1.1.2.1 $
* $Date: 2006-10-27 21:41:22 $
* $Author: taylor $
*
* header file for information about polygon models
*
* $Log: not supported by cvs2svn $
*
* $NoKeywords: $
*/
#ifndef _MODELANIM_H
#define _MODELANIM_H
#define MAX_TRIGGERED_ANIMATIONS 15
// WMC: Steps to adding a triggered animation
// 1 - add TRIGGER_TYPE define
// 2 - increment MAX_TRIGGER_ANIMATION_TYPES
// 3 - add name to animation_type_names array
// 4 - add start trigger (model_anim_start_type)
// 5 - add stop trigger (model_anim_start_type)
#define TRIGGER_TYPE_NONE -1 //no animation
#define TRIGGER_TYPE_INITIAL 0 //this is just the position the subobject should be placed in
#define TRIGGER_TYPE_DOCKING 1 //before you dock
#define TRIGGER_TYPE_DOCKED 2 //after you have docked
#define TRIGGER_TYPE_PRIMARY_BANK 3 //primary banks
#define TRIGGER_TYPE_SECONDARY_BANK 4 //secondary banks
#define TRIGGER_TYPE_DOCK_BAY_DOOR 5 //fighter bays
#define TRIGGER_TYPE_AFTERBURNER 6 //Afterburner -C
#define TRIGGER_TYPE_TURRET_FIRING 7 //Turret shooting -C
#define TRIGGER_TYPE_SCRIPTEDturret_animation_position 8 //Triggered exclusively by scripting...maybe SEXPs? -C
#define MAX_TRIGGER_ANIMATION_TYPES 9
// Model Animation Position settings
#define MA_POS_NOT_SET 0 // not yet setup
#define MA_POS_SET 1 // set, but is moving
#define MA_POS_READY 2 // set, done with move
#define ANIMATION_SUBTYPE_ALL -1
// this is an object responsable for storeing the animation information assosiated with
// a specific triggered animation, one subobject can have many triggered animations
struct queued_animation {
queued_animation();
void correct();
vec3d angle;
vec3d vel;
vec3d accel;
int start;
int start_time;
int end;
int end_time;
int reverse_start;
bool absolute;
int type;
int subtype;
int instance;
int real_end_time;
int start_sound;
int loop_sound;
int end_sound;
float snd_rad;
};
/*
struct trigger_instance{
int type;
int sub_type;
queued_animation properties;
void corect();
};
*/
// this is the triggered animation object, it is responcable for controleing how the current triggered animation works
// rot_accel is the accelleration for starting to move and stopping, so figure it in twice
class triggered_rotation
{
private:
vec3d snd_pnt;
int start_sound;
int loop_sound;
int end_sound;
int current_snd;
int current_snd_index;
float snd_rad;
int obj_num;
int n_queue;
queued_animation queue[MAX_TRIGGERED_ANIMATIONS];
queued_animation queue_tmp[MAX_TRIGGERED_ANIMATIONS];
public:
triggered_rotation();
~triggered_rotation();
void start(queued_animation *q);
void set_to_end(queued_animation *q);
void add_queue(queued_animation *new_queue, int direction);
void process_queue();
vec3d current_ang;
vec3d current_vel;
vec3d rot_accel; // rotational accelleration, 0 means instant
vec3d rot_vel; // radians per second, hold this speed when rot_accel has pushed it to this
vec3d slow_angle; // angle that we should start to slow down
vec3d end_angle; // lock it in
vec3d direction;
int instance; // which animation this is (for reversals)
bool has_started; // animation has started playing
int end_time; // time that we should stop
int start_time; // the time the current animation started
};
// functions...
struct model_subsystem;
struct ship_subsys;
struct ship;
struct ship_info;
void model_anim_submodel_trigger_rotate(model_subsystem *psub, ship_subsys *ss);
void model_anim_set_initial_states(ship *shipp);
void model_anim_fix_reverse_times(ship_info *sip);
// gets animation type index from string name
int model_anim_match_type(char *p);
// starts an animation of a certan type that may be assosiated with a submodel of a ship (returns true if an animation was started)
bool model_anim_start_type(ship_subsys *pss, int animation_type, int subtype, int direction); // for a specific subsystem
bool model_anim_start_type(ship *shipp, int animation_type, int subtype, int direction); // for all valid subsystems
// how long until the animation is done
int model_anim_get_time_type(ship_subsys *pss, int animation_type, int subtype); // for a specific subsystem
int model_anim_get_time_type(ship *shipp, int animation_type, int subtype); // for all valid subsystems
// this is for handling multiplayer-safe, client-side, animations
void model_anim_handle_multiplayer(ship *shipp);
#endif // _MODELANIM_H
| [
"taylor@387891d4-d844-0410-90c0-e4c51a9137d3"
] | taylor@387891d4-d844-0410-90c0-e4c51a9137d3 |
dddae6a020d06b5f92cc163408d45f4a9e7d063b | 745f4ab36df82211cdda98cf3240116f99d72648 | /CalculateAreaPerimeter.cpp | 7e55a858150e1f99c188200207c2235929867368 | [] | no_license | GhulamMustafaGM/ILoveProgramming | c270ac73c42d0e72384043d2769cc4960681a391 | 516fd9cc113d0edadc6fda0e0d545fa08e34e209 | refs/heads/master | 2023-01-02T01:32:47.158055 | 2020-10-26T14:30:18 | 2020-10-26T14:30:18 | 216,835,476 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 490 | cpp | // Calcualte area and perimeter Circle
#include<iostream>
using namespace std;
int main()
{
const double PI = 3.14159;
double r;
double p;
double a;
/* r = radius;
p = perimeter;
a = area;
*/
cout << "Enter the radious of the circle: ";
cin >> r;
p = 2 * PI * r;
a = PI * PI * r;
cout << "The radius is: " << r << endl;
cout << "The perimeter is: " << p << endl;
cout << "The are is: " << a << endl;
return 0;
} | [
"[email protected]"
] | |
28aa8ee0dc1df0242d9e26201ca0922b2de753f0 | 55ff90bde10ddeae56538c39ba7eca328f767089 | /660~669/662/4.cpp | dd4fc0f2621e1efdd09d904359479710403c83b0 | [] | no_license | Pluto-Jin/fromZero2GrandMaster | 74325a8fab73e54f8bf91fcfc6ce22981fb2d234 | cc666bdcf5b277db07b211693e20e505151b9848 | refs/heads/master | 2023-07-08T22:49:39.919961 | 2021-08-13T16:17:39 | 2021-08-13T16:17:39 | 302,216,409 | 1 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,370 | cpp | #include "bits/stdc++.h"
using namespace std;
#define fi first
#define se second
#define endl '\n'
#define pb push_back
#define ppf pop_front
#define ppb pop_back
#define mp make_pair
typedef long long ll;
typedef pair<int,int> pii;
typedef pair<ll,ll> pll;
typedef vector<int> vi;
typedef vector<pii> vii;
typedef vector<vi> vvi;
int ar[2002][2002],cnt[4][2002][2002];
int main()
{
ios::sync_with_stdio(false);
cin.tie(NULL);
int n,m; cin>>n>>m;
for (int i=1;i<=n;i++) {
string s; cin>>s;
for (int j=1;j<=m;j++) {
ar[i][j]=s[j-1];
for (int k=0;k<4;k++) cnt[k][i][j]=1;
}
}
for (int i=1;i<=n;i++) for (int j=1;j<=m;j++) if (ar[i][j]==ar[i-1][j] and ar[i][j]==ar[i][j-1])
cnt[0][i][j]=min(cnt[0][i-1][j],cnt[0][i][j-1])+1;
for (int i=n;i>=1;i--) for (int j=m;j>=1;j--) if (ar[i][j]==ar[i+1][j] and ar[i][j]==ar[i][j+1])
cnt[1][i][j]=min(cnt[1][i+1][j],cnt[1][i][j+1])+1;
for (int i=1;i<=n;i++) for (int j=m;j>=1;j--) if (ar[i][j]==ar[i-1][j] and ar[i][j]==ar[i][j+1])
cnt[2][i][j]=min(cnt[2][i-1][j],cnt[2][i][j+1])+1;
for (int i=n;i>=1;i--) for (int j=1;j<=m;j++) if (ar[i][j]==ar[i+1][j] and ar[i][j]==ar[i][j-1])
cnt[3][i][j]=min(cnt[3][i+1][j],cnt[3][i][j-1])+1;
ll ans=0;
for (int i=1;i<=n;i++) for (int j=1;j<=m;j++) {
int cur=1e9;
for (int k=0;k<4;k++) cur=min(cnt[k][i][j],cur);
ans+=cur;
}
cout<<ans<<endl;
}
| [
"[email protected]"
] | |
c44798aec674643548f978bab674534cfde98036 | 7956e58b06832c449e6af7baafe45334fecc7737 | /include/alu.hpp | a506a795f3ffb95c0d7a7ea79ae8e52ff13516c5 | [] | no_license | Miliox/gg | 61ac570a07fb7c46491645b35ae8cb4edf734a57 | 690b0b847f2a7575cd05641d45d8491f98afd406 | refs/heads/master | 2020-03-19T00:35:23.938071 | 2018-06-11T18:08:32 | 2018-06-11T18:08:32 | 135,491,660 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,558 | hpp | /*
* apu.h
* Copyright (C) 2018 Emiliano Firmino <[email protected]>
*
* Distributed under terms of the MIT license.
*/
#ifndef ALU_H
#define ALU_H
#include "common.h"
namespace alu {
// flags
extern const u8 kFZ; // Flag Zero
extern const u8 kFN; // Flag Negative
extern const u8 kFH; // Flag Half Carry
extern const u8 kFC; // Flag Carry
// move operations
void ld8(u8& dst, u8 src);
void ld16(u16& dst, u16 src);
// arithmetic operations
void add8(u8& flags, u8& acc, u8 arg);
void adc8(u8& flags, u8& acc, u8 arg);
void sub8(u8& flags, u8& acc, u8 arg);
void sbc8(u8& flags, u8& acc, u8 arg);
void inc8(u8& flags, u8& acc);
void dec8(u8& flags, u8& acc);
void add16(u8& flags, u16& acc, u16 arg);
void sub16(u8& flags, u16& acc, u16 arg);
void inc16(u8& flags, u16& acc);
void dec16(u8& flags, u16& acc);
// logical operation
void land(u8& flags, u8& acc, u8 arg);
void lxor(u8& flags, u8& acc, u8 arg);
void lor( u8& flags, u8& acc, u8 arg);
void lcp( u8& flags, u8& acc, u8 arg);
// bit manipulation
void bit(u8& flags, u8& acc, u8 arg);
void set(u8& flags, u8& acc, u8 arg);
void res(u8& flags, u8& acc, u8 arg);
void cpl(u8& flags, u8& acc);
// bit rotation and shifts
void rl( u8& flags, u8& acc);
void rr( u8& flags, u8& acc);
void rlc( u8& flags, u8& acc);
void rrc( u8& flags, u8& acc);
void sla(u8& flags, u8& acc);
void sra(u8& flags, u8& acc);
void srl(u8& flags, u8& acc);
// misc
void ccf(u8& flags);
void scf(u8& flags);
void daa(u8& flags, u8& acc);
void swap(u8& flags, u8& acc);
}
#endif /* !ALU_H */
| [
"[email protected]"
] | |
9da39edd3a07c9e1b4a83445306a2b009509c301 | 1bf8b46afad5402fe6fa74293b464e1ca5ee5fd7 | /SDK/ABP_MiniGame_SupportNPC_functions.cpp | de1aefb37eb09511be9718ae5d26620bf08e435d | [] | no_license | LemonHaze420/ShenmueIIISDK | a4857eebefc7e66dba9f667efa43301c5efcdb62 | 47a433b5e94f171bbf5256e3ff4471dcec2c7d7e | refs/heads/master | 2021-06-30T17:33:06.034662 | 2021-01-19T20:33:33 | 2021-01-19T20:33:33 | 214,824,713 | 4 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 15,340 | cpp |
#include "../SDK.h"
// Name: Shenmue3SDK, Version: 1.4.1
#ifdef _MSC_VER
#pragma pack(push, 0x8)
#endif
namespace SDK
{
//---------------------------------------------------------------------------
// Functions
//---------------------------------------------------------------------------
// Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.SetBlockAction
// (Public, BlueprintCallable, BlueprintEvent)
// Parameters:
// bool bBlockAction (BlueprintVisible, BlueprintReadOnly, Parm, ZeroConstructor, IsPlainOldData)
void UABP_MiniGame_SupportNPC_C::SetBlockAction(bool bBlockAction)
{
static auto fn = UObject::FindObject<UFunction>("Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.SetBlockAction");
UABP_MiniGame_SupportNPC_C_SetBlockAction_Params params;
params.bBlockAction = bBlockAction;
auto flags = fn->FunctionFlags;
UObject::ProcessEvent(fn, ¶ms);
fn->FunctionFlags = flags;
}
// Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.IsBlockAction
// (Public, HasOutParms, BlueprintCallable, BlueprintEvent, BlueprintPure)
// Parameters:
// bool IsAction (Parm, OutParm, ZeroConstructor, IsPlainOldData)
void UABP_MiniGame_SupportNPC_C::IsBlockAction(bool* IsAction)
{
static auto fn = UObject::FindObject<UFunction>("Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.IsBlockAction");
UABP_MiniGame_SupportNPC_C_IsBlockAction_Params params;
auto flags = fn->FunctionFlags;
UObject::ProcessEvent(fn, ¶ms);
fn->FunctionFlags = flags;
if (IsAction != nullptr)
*IsAction = params.IsAction;
}
// Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.ChangeAnim
// (Public, HasOutParms, BlueprintCallable, BlueprintEvent)
// Parameters:
// class UAnimSequenceBase* Anim (ConstParm, BlueprintVisible, BlueprintReadOnly, Parm, OutParm, ZeroConstructor, ReferenceParm, IsPlainOldData)
void UABP_MiniGame_SupportNPC_C::ChangeAnim(class UAnimSequenceBase* Anim)
{
static auto fn = UObject::FindObject<UFunction>("Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.ChangeAnim");
UABP_MiniGame_SupportNPC_C_ChangeAnim_Params params;
params.Anim = Anim;
auto flags = fn->FunctionFlags;
UObject::ProcessEvent(fn, ¶ms);
fn->FunctionFlags = flags;
}
// Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.SetLookAtLocation
// (Public, BlueprintCallable, BlueprintEvent)
// Parameters:
// struct FVector LookAtLocation (BlueprintVisible, BlueprintReadOnly, Parm, IsPlainOldData)
void UABP_MiniGame_SupportNPC_C::SetLookAtLocation(const struct FVector& LookAtLocation)
{
static auto fn = UObject::FindObject<UFunction>("Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.SetLookAtLocation");
UABP_MiniGame_SupportNPC_C_SetLookAtLocation_Params params;
params.LookAtLocation = LookAtLocation;
auto flags = fn->FunctionFlags;
UObject::ProcessEvent(fn, ¶ms);
fn->FunctionFlags = flags;
}
// Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.Finalize
// (Public, BlueprintCallable, BlueprintEvent)
void UABP_MiniGame_SupportNPC_C::Finalize()
{
static auto fn = UObject::FindObject<UFunction>("Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.Finalize");
UABP_MiniGame_SupportNPC_C_Finalize_Params params;
auto flags = fn->FunctionFlags;
UObject::ProcessEvent(fn, ¶ms);
fn->FunctionFlags = flags;
}
// Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.Initialize
// (Public, BlueprintCallable, BlueprintEvent)
// Parameters:
// class UAnimSequenceBase* AnimIdle (BlueprintVisible, BlueprintReadOnly, Parm, ZeroConstructor, IsPlainOldData)
void UABP_MiniGame_SupportNPC_C::Initialize(class UAnimSequenceBase* AnimIdle)
{
static auto fn = UObject::FindObject<UFunction>("Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.Initialize");
UABP_MiniGame_SupportNPC_C_Initialize_Params params;
params.AnimIdle = AnimIdle;
auto flags = fn->FunctionFlags;
UObject::ProcessEvent(fn, ¶ms);
fn->FunctionFlags = flags;
}
// Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_SequencePlayer_494534884C266C388A80F3B7BFCE5829
// (BlueprintEvent)
void UABP_MiniGame_SupportNPC_C::EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_SequencePlayer_494534884C266C388A80F3B7BFCE5829()
{
static auto fn = UObject::FindObject<UFunction>("Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_SequencePlayer_494534884C266C388A80F3B7BFCE5829");
UABP_MiniGame_SupportNPC_C_EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_SequencePlayer_494534884C266C388A80F3B7BFCE5829_Params params;
auto flags = fn->FunctionFlags;
UObject::ProcessEvent(fn, ¶ms);
fn->FunctionFlags = flags;
}
// Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_BlendListByInt_BA32322944E76EDA95F923A3E0FEA094
// (BlueprintEvent)
void UABP_MiniGame_SupportNPC_C::EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_BlendListByInt_BA32322944E76EDA95F923A3E0FEA094()
{
static auto fn = UObject::FindObject<UFunction>("Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_BlendListByInt_BA32322944E76EDA95F923A3E0FEA094");
UABP_MiniGame_SupportNPC_C_EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_BlendListByInt_BA32322944E76EDA95F923A3E0FEA094_Params params;
auto flags = fn->FunctionFlags;
UObject::ProcessEvent(fn, ¶ms);
fn->FunctionFlags = flags;
}
// Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_SequencePlayer_99AEF4FC4870A13BA2259F9BE265EC01
// (BlueprintEvent)
void UABP_MiniGame_SupportNPC_C::EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_SequencePlayer_99AEF4FC4870A13BA2259F9BE265EC01()
{
static auto fn = UObject::FindObject<UFunction>("Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_SequencePlayer_99AEF4FC4870A13BA2259F9BE265EC01");
UABP_MiniGame_SupportNPC_C_EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_SequencePlayer_99AEF4FC4870A13BA2259F9BE265EC01_Params params;
auto flags = fn->FunctionFlags;
UObject::ProcessEvent(fn, ¶ms);
fn->FunctionFlags = flags;
}
// Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_SequencePlayer_6396293C4212A647DB5E98BE4BDF7D90
// (BlueprintEvent)
void UABP_MiniGame_SupportNPC_C::EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_SequencePlayer_6396293C4212A647DB5E98BE4BDF7D90()
{
static auto fn = UObject::FindObject<UFunction>("Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_SequencePlayer_6396293C4212A647DB5E98BE4BDF7D90");
UABP_MiniGame_SupportNPC_C_EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_SequencePlayer_6396293C4212A647DB5E98BE4BDF7D90_Params params;
auto flags = fn->FunctionFlags;
UObject::ProcessEvent(fn, ¶ms);
fn->FunctionFlags = flags;
}
// Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_SequencePlayer_FE78588F42E05D1601917A85D5EF0E00
// (BlueprintEvent)
void UABP_MiniGame_SupportNPC_C::EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_SequencePlayer_FE78588F42E05D1601917A85D5EF0E00()
{
static auto fn = UObject::FindObject<UFunction>("Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_SequencePlayer_FE78588F42E05D1601917A85D5EF0E00");
UABP_MiniGame_SupportNPC_C_EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_SequencePlayer_FE78588F42E05D1601917A85D5EF0E00_Params params;
auto flags = fn->FunctionFlags;
UObject::ProcessEvent(fn, ¶ms);
fn->FunctionFlags = flags;
}
// Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_TransitionResult_0C943C0E467DD3B6B51E038DBCFD50DC
// (BlueprintEvent)
void UABP_MiniGame_SupportNPC_C::EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_TransitionResult_0C943C0E467DD3B6B51E038DBCFD50DC()
{
static auto fn = UObject::FindObject<UFunction>("Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_TransitionResult_0C943C0E467DD3B6B51E038DBCFD50DC");
UABP_MiniGame_SupportNPC_C_EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_TransitionResult_0C943C0E467DD3B6B51E038DBCFD50DC_Params params;
auto flags = fn->FunctionFlags;
UObject::ProcessEvent(fn, ¶ms);
fn->FunctionFlags = flags;
}
// Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_LookAt_F9516E7D4BA35AECDBAA789D688B23AF
// (BlueprintEvent)
void UABP_MiniGame_SupportNPC_C::EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_LookAt_F9516E7D4BA35AECDBAA789D688B23AF()
{
static auto fn = UObject::FindObject<UFunction>("Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_LookAt_F9516E7D4BA35AECDBAA789D688B23AF");
UABP_MiniGame_SupportNPC_C_EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_LookAt_F9516E7D4BA35AECDBAA789D688B23AF_Params params;
auto flags = fn->FunctionFlags;
UObject::ProcessEvent(fn, ¶ms);
fn->FunctionFlags = flags;
}
// Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_LookAt_35C3E4AB45E86A307EDA428B25391388
// (BlueprintEvent)
void UABP_MiniGame_SupportNPC_C::EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_LookAt_35C3E4AB45E86A307EDA428B25391388()
{
static auto fn = UObject::FindObject<UFunction>("Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_LookAt_35C3E4AB45E86A307EDA428B25391388");
UABP_MiniGame_SupportNPC_C_EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_LookAt_35C3E4AB45E86A307EDA428B25391388_Params params;
auto flags = fn->FunctionFlags;
UObject::ProcessEvent(fn, ¶ms);
fn->FunctionFlags = flags;
}
// Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_TransitionResult_3FC9E51644D08B3E760BD281AB3E13F5
// (BlueprintEvent)
void UABP_MiniGame_SupportNPC_C::EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_TransitionResult_3FC9E51644D08B3E760BD281AB3E13F5()
{
static auto fn = UObject::FindObject<UFunction>("Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_TransitionResult_3FC9E51644D08B3E760BD281AB3E13F5");
UABP_MiniGame_SupportNPC_C_EvaluateGraphExposedInputs_ExecuteUbergraph_ABP_MiniGame_SupportNPC_AnimGraphNode_TransitionResult_3FC9E51644D08B3E760BD281AB3E13F5_Params params;
auto flags = fn->FunctionFlags;
UObject::ProcessEvent(fn, ¶ms);
fn->FunctionFlags = flags;
}
// Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.BlueprintUpdateAnimation
// (Event, Public, BlueprintEvent)
// Parameters:
// float DeltaTimeX (BlueprintVisible, BlueprintReadOnly, Parm, ZeroConstructor, IsPlainOldData)
void UABP_MiniGame_SupportNPC_C::BlueprintUpdateAnimation(float DeltaTimeX)
{
static auto fn = UObject::FindObject<UFunction>("Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.BlueprintUpdateAnimation");
UABP_MiniGame_SupportNPC_C_BlueprintUpdateAnimation_Params params;
params.DeltaTimeX = DeltaTimeX;
auto flags = fn->FunctionFlags;
UObject::ProcessEvent(fn, ¶ms);
fn->FunctionFlags = flags;
}
// Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.AnimNotify_StartTransitionIdlle
// (BlueprintCallable, BlueprintEvent)
void UABP_MiniGame_SupportNPC_C::AnimNotify_StartTransitionIdlle()
{
static auto fn = UObject::FindObject<UFunction>("Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.AnimNotify_StartTransitionIdlle");
UABP_MiniGame_SupportNPC_C_AnimNotify_StartTransitionIdlle_Params params;
auto flags = fn->FunctionFlags;
UObject::ProcessEvent(fn, ¶ms);
fn->FunctionFlags = flags;
}
// Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.AnimNotify_EndTransitionIdle
// (BlueprintCallable, BlueprintEvent)
void UABP_MiniGame_SupportNPC_C::AnimNotify_EndTransitionIdle()
{
static auto fn = UObject::FindObject<UFunction>("Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.AnimNotify_EndTransitionIdle");
UABP_MiniGame_SupportNPC_C_AnimNotify_EndTransitionIdle_Params params;
auto flags = fn->FunctionFlags;
UObject::ProcessEvent(fn, ¶ms);
fn->FunctionFlags = flags;
}
// Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.AnimNotify_StartTransitionActionToIdle
// (BlueprintCallable, BlueprintEvent)
void UABP_MiniGame_SupportNPC_C::AnimNotify_StartTransitionActionToIdle()
{
static auto fn = UObject::FindObject<UFunction>("Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.AnimNotify_StartTransitionActionToIdle");
UABP_MiniGame_SupportNPC_C_AnimNotify_StartTransitionActionToIdle_Params params;
auto flags = fn->FunctionFlags;
UObject::ProcessEvent(fn, ¶ms);
fn->FunctionFlags = flags;
}
// Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.ExecuteUbergraph_ABP_MiniGame_SupportNPC
// (HasDefaults)
// Parameters:
// int EntryPoint (BlueprintVisible, BlueprintReadOnly, Parm, ZeroConstructor, IsPlainOldData)
void UABP_MiniGame_SupportNPC_C::ExecuteUbergraph_ABP_MiniGame_SupportNPC(int EntryPoint)
{
static auto fn = UObject::FindObject<UFunction>("Function ABP_MiniGame_SupportNPC.ABP_MiniGame_SupportNPC_C.ExecuteUbergraph_ABP_MiniGame_SupportNPC");
UABP_MiniGame_SupportNPC_C_ExecuteUbergraph_ABP_MiniGame_SupportNPC_Params params;
params.EntryPoint = EntryPoint;
auto flags = fn->FunctionFlags;
UObject::ProcessEvent(fn, ¶ms);
fn->FunctionFlags = flags;
}
}
#ifdef _MSC_VER
#pragma pack(pop)
#endif
| [
"[email protected]"
] | |
08269f53f7518446207ce0db320179b7306e007e | 1d60f9d6edc4e5c97896738f106f93f5d71ab872 | /Space shooter/Enemy.h | 8dee92a0abf1cf01e42eb08f43497afa6910da47 | [] | no_license | JoanaFAMendes/Space-Shooter | 3815bfc1697d6817a2a6d4c8b69fedc5d6a2da76 | 4d0b7e3bce5ea7be3ab628fae4106d4313e2cd9a | refs/heads/main | 2022-12-28T11:12:06.714256 | 2020-10-02T22:28:18 | 2020-10-02T22:28:18 | 300,714,811 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 573 | h | #ifndef SPACE_SHOOTER_ENEMY
#define SPACE_SHOOTER_ENEMY
#include <SFML/Graphics.hpp>
#include <SFML/System.hpp>
#include <iostream>
class Enemy
{
private:
sf::Sprite shape;
float speed;
int hp;
int hpMax;
int damage;
int points;
//Private functions
void initVariables();
public:
//Constructors and destructors
Enemy();
Enemy(sf::Texture* texture, float pos_x, float pos_y, float movement_speed);
virtual ~Enemy();
//Accessors
const sf::FloatRect getBounds() const;
//Public functions
void update();
void render(sf::RenderTarget* target);
};
#endif
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] | |
1b4bb5a4f7236d3fda917f10759bc5122f98f7eb | 6923f79f1eaaba0ab28b25337ba6cb56be97d32d | /NumericalRecipes3/fred_singular.h | bbaafcf746d3fcbdc016ab1e8840662a25b88617 | [] | no_license | burakbayramli/books | 9fe7ba0cabf06e113eb125d62fe16d4946f4a4f0 | 5e9a0e03aa7ddf5e5ddf89943ccc68d94b539e95 | refs/heads/master | 2023-08-17T05:31:08.885134 | 2023-08-14T10:05:37 | 2023-08-14T10:05:37 | 72,460,321 | 223 | 174 | null | 2022-10-24T12:15:06 | 2016-10-31T17:24:00 | Jupyter Notebook | UTF-8 | C++ | false | false | 2,935 | h | template <class Q>
struct Wwghts {
Doub h;
Int n;
Q &quad;
VecDoub wghts;
Wwghts(Doub hh, Int nn, Q &q) : h(hh), n(nn), quad(q), wghts(n) {}
VecDoub weights()
{
Int k;
Doub fac;
Doub hi=1.0/h;
for (Int j=0;j<n;j++)
wghts[j]=0.0;
if (n >= 4) {
VecDoub wold(4),wnew(4),w(4);
wold=quad.kermom(0.0);
Doub b=0.0;
for (Int j=0;j<n-3;j++) {
Doub c=j;
Doub a=b;
b=a+h;
if (j == n-4) b=(n-1)*h;
wnew=quad.kermom(b);
for (fac=1.0,k=0;k<4;k++,fac*=hi)
w[k]=(wnew[k]-wold[k])*fac;
wghts[j] += (((c+1.0)*(c+2.0)*(c+3.0)*w[0]
-(11.0+c*(12.0+c*3.0))*w[1]+3.0*(c+2.0)*w[2]-w[3])/6.0);
wghts[j+1] += ((-c*(c+2.0)*(c+3.0)*w[0]
+(6.0+c*(10.0+c*3.0))*w[1]-(3.0*c+5.0)*w[2]+w[3])*0.5);
wghts[j+2] += ((c*(c+1.0)*(c+3.0)*w[0]
-(3.0+c*(8.0+c*3.0))*w[1]+(3.0*c+4.0)*w[2]-w[3])*0.5);
wghts[j+3] += ((-c*(c+1.0)*(c+2.0)*w[0]
+(2.0+c*(6.0+c*3.0))*w[1]-3.0*(c+1.0)*w[2]+w[3])/6.0);
for (k=0;k<4;k++) wold[k]=wnew[k];
}
} else if (n == 3) {
VecDoub wold(3),wnew(3),w(3);
wold=quad.kermom(0.0);
wnew=quad.kermom(h+h);
w[0]=wnew[0]-wold[0];
w[1]=hi*(wnew[1]-wold[1]);
w[2]=hi*hi*(wnew[2]-wold[2]);
wghts[0]=w[0]-1.5*w[1]+0.5*w[2];
wghts[1]=2.0*w[1]-w[2];
wghts[2]=0.5*(w[2]-w[1]);
} else if (n == 2) {
VecDoub wold(2),wnew(2),w(2);
wold=quad.kermom(0.0);
wnew=quad.kermom(h);
wghts[0]=wnew[0]-wold[0]-(wghts[1]=hi*(wnew[1]-wold[1]));
}
return wghts;
}
};
struct Quad_matrix {
Int n;
Doub x;
Quad_matrix(MatDoub_O &a) : n(a.nrows())
{
const Doub PI=3.14159263589793238;
VecDoub wt(n);
Doub h=PI/(n-1);
Wwghts<Quad_matrix> w(h,n,*this);
for (Int j=0;j<n;j++) {
x=j*h;
wt=w.weights();
Doub cx=cos(x);
for (Int k=0;k<n;k++)
a[j][k]=wt[k]*cx*cos(k*h);
++a[j][j];
}
}
VecDoub kermom(const Doub y)
{
Doub d,df,clog,x2,x3,x4,y2;
VecDoub w(4);
if (y >= x) {
d=y-x;
df=2.0*sqrt(d)*d;
w[0]=df/3.0;
w[1]=df*(x/3.0+d/5.0);
w[2]=df*((x/3.0 + 0.4*d)*x + d*d/7.0);
w[3]=df*(((x/3.0 + 0.6*d)*x + 3.0*d*d/7.0)*x+d*d*d/9.0);
} else {
x3=(x2=x*x)*x;
x4=x2*x2;
y2=y*y;
d=x-y;
w[0]=d*((clog=log(d))-1.0);
w[1] = -0.25*(3.0*x+y-2.0*clog*(x+y))*d;
w[2]=(-11.0*x3+y*(6.0*x2+y*(3.0*x+2.0*y))
+6.0*clog*(x3-y*y2))/18.0;
w[3]=(-25.0*x4+y*(12.0*x3+y*(6.0*x2+y*
(4.0*x+3.0*y)))+12.0*clog*(x4-(y2*y2)))/48.0;
}
return w;
}
};
Int main_fredex(void)
{
const Int N=40;
const Doub PI=3.141592653589793238;
VecDoub g(N);
MatDoub a(N,N);
Quad_matrix qmx(a);
LUdcmp alu(a);
for (Int j=0;j<N;j++)
g[j]=sin(j*PI/(N-1));
alu.solve(g,g);
for (Int j=0;j<N;j++) {
Doub x=j*PI/(N-1);
cout << fixed << setprecision(2) << setw(6) << (j+1);
cout << setprecision(6) << setw(13) << x << setw(13) << g[j] << endl;
}
return 0;
}
| [
"[email protected]"
] | |
e6ef8cf2657bd042eb60ec84c6a6b13e152ea882 | 1cfea07739622816c28b93e8bf65642952a18375 | /paddle/fluid/operators/lookup_table_v2_op.cc | 511f50a83d58292fa08fb603dc616dc7f7e5a626 | [
"Apache-2.0"
] | permissive | JepsonWong/Paddle | f069a71c51d78885d202e4fbd8369a648f4d5076 | 48a774c713b2d5bd6dc4cb71dd79a4006538367f | refs/heads/develop | 2020-06-18T07:11:27.241596 | 2019-10-18T16:54:24 | 2019-10-18T16:54:24 | 196,207,433 | 0 | 2 | Apache-2.0 | 2019-12-13T09:38:42 | 2019-07-10T13:09:20 | C++ | UTF-8 | C++ | false | false | 7,461 | cc | /* Copyright (c) 2019 PaddlePaddle Authors. All Rights Reserved.
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License. */
#include "paddle/fluid/operators/lookup_table_v2_op.h"
#include <memory>
#include "paddle/fluid/framework/no_need_buffer_vars_inference.h"
#include "paddle/fluid/framework/var_type_inference.h"
namespace paddle {
namespace operators {
class LookupTableV2Op : public framework::OperatorWithKernel {
public:
using framework::OperatorWithKernel::OperatorWithKernel;
void InferShape(framework::InferShapeContext* ctx) const override {
PADDLE_ENFORCE_EQ(ctx->HasInput("W"), true,
"Input(W) of LookupTableV2Op should not be null.");
PADDLE_ENFORCE_EQ(ctx->HasInput("Ids"), true,
"Input(Ids) of LookupTableV2Op should not be null.");
PADDLE_ENFORCE_EQ(ctx->HasOutput("Out"), true,
"Output(Out) of LookupTableV2Op should not be null.");
auto table_dims = ctx->GetInputDim("W");
auto ids_dims = ctx->GetInputDim("Ids");
int ids_rank = ids_dims.size();
VLOG(5) << "ids rank is " << ids_rank << std::endl;
PADDLE_ENFORCE_EQ(
table_dims.size(), 2,
"ShapeError: The dimensions of the 'lookup table' must be 2. "
"But received lookup table's dimensions = %d, "
"lookup table's shape = [%s].",
table_dims.size(), table_dims);
auto output_dims = framework::vectorize(ids_dims);
output_dims.push_back(table_dims[1]);
ctx->SetOutputDim("Out", framework::make_ddim(output_dims));
if (ctx->GetOutputsVarType("Out")[0] ==
framework::proto::VarType::LOD_TENSOR) {
ctx->ShareLoD("Ids", /*->*/ "Out");
}
}
protected:
framework::OpKernelType GetExpectedKernelType(
const framework::ExecutionContext& ctx) const override {
auto data_type = framework::GetDataTypeOfVar(ctx.InputVar("W"));
return framework::OpKernelType(data_type, ctx.device_context());
}
};
class LookupTableV2OpMaker : public framework::OpProtoAndCheckerMaker {
public:
void Make() override {
AddInput("W",
"(Tensor) The input represents embedding tensors, "
"which is a learnable parameter.");
AddInput("Ids",
"An input with type int64 "
"contains the ids to be looked up in W. "
"The last dimension size must be 1.");
AddOutput("Out", "The lookup results, which have the same type as W.");
AddAttr<bool>("is_sparse",
"(boolean, default false) "
"Sparse update.")
.SetDefault(false);
AddAttr<bool>("is_distributed",
"(boolean, default false) distributed lookup table.")
.SetDefault(false);
AddAttr<int64_t>("padding_idx",
"(int64, default -1) "
"If the value is -1, it makes no effect to lookup. "
"Otherwise the given value indicates padding the output "
"with zeros whenever lookup encounters it in Ids.")
.SetDefault(kNoPadding);
// for parameter prefetch
AddAttr<bool>("remote_prefetch", "").SetDefault(false);
AddAttr<int>("trainer_id", "trainer id from 0 ~ worker_num.").SetDefault(0);
AddAttr<std::vector<int64_t>>("height_sections",
"Height for each output SelectedRows.")
.SetDefault(std::vector<int64_t>({}));
AddAttr<std::vector<std::string>>(
"epmap",
"(string vector, default 127.0.0.1:6164)"
"Server endpoints in the order of input variables for mapping")
.SetDefault({});
AddAttr<std::vector<std::string>>(
"table_names",
"(string vector, the splited table names that will be fetched from "
"parameter server)"
"in the order of input variables for mapping")
.SetDefault({});
AddComment(R"DOC(
Lookup Table V2 Operator.
This operator is used to perform lookups on the parameter W,
then concatenated into a dense tensor.
The input Ids can carry the LoD (Level of Details) information,
or not. And the output only shares the LoD information with input Ids.
)DOC");
}
};
DECLARE_NO_NEED_BUFFER_VARS_INFERENCE(LookupTableV2GradOpNoBuffer, "W");
class LookupTableV2GradOpDescMaker : public framework::SingleGradOpDescMaker {
public:
using framework::SingleGradOpDescMaker::SingleGradOpDescMaker;
protected:
std::unique_ptr<framework::OpDesc> Apply() const override {
std::unique_ptr<framework::OpDesc> op(new framework::OpDesc());
op->SetType("lookup_table_v2_grad");
op->SetInput("W", Input("W"));
op->SetInput("Ids", Input("Ids"));
op->SetInput(framework::GradVarName("Out"), OutputGrad("Out"));
op->SetOutput(framework::GradVarName("W"), InputGrad("W"));
op->SetAttrMap(Attrs());
return op;
}
};
class LookupTableV2OpGrad : public framework::OperatorWithKernel {
public:
using framework::OperatorWithKernel::OperatorWithKernel;
void InferShape(framework::InferShapeContext* ctx) const override {
auto table_dims = ctx->GetInputDim("W");
ctx->SetOutputDim(framework::GradVarName("W"), table_dims);
}
protected:
framework::OpKernelType GetExpectedKernelType(
const framework::ExecutionContext& ctx) const override {
auto data_type = framework::GetDataTypeOfVar(
ctx.InputVar(framework::GradVarName("Out")));
return framework::OpKernelType(data_type, ctx.device_context());
}
};
class LookupTableV2OpGradVarTypeInference : public framework::VarTypeInference {
public:
void operator()(framework::InferVarTypeContext* ctx) const override {
auto out_var_name = ctx->Output(framework::GradVarName("W")).front();
auto attr = ctx->GetAttr("is_sparse");
bool is_sparse = boost::get<bool>(attr);
if (is_sparse) {
VLOG(3) << "lookup_table_v2_grad op " << framework::GradVarName("W")
<< " is set to SelectedRows";
ctx->SetType(out_var_name, framework::proto::VarType::SELECTED_ROWS);
} else {
VLOG(3) << "lookup_table_v2_grad op " << framework::GradVarName("W")
<< " is set to LoDTensor";
ctx->SetType(out_var_name, framework::proto::VarType::LOD_TENSOR);
}
ctx->SetDataType(out_var_name, ctx->GetDataType(ctx->Input("W")[0]));
}
};
} // namespace operators
} // namespace paddle
namespace ops = paddle::operators;
REGISTER_OPERATOR(lookup_table_v2, ops::LookupTableV2Op,
ops::LookupTableV2OpMaker, ops::LookupTableV2GradOpDescMaker);
REGISTER_OPERATOR(lookup_table_v2_grad, ops::LookupTableV2OpGrad,
ops::LookupTableV2GradOpNoBuffer,
ops::LookupTableV2OpGradVarTypeInference);
REGISTER_OP_CPU_KERNEL(lookup_table_v2, ops::LookupTableV2Kernel<float>,
ops::LookupTableV2Kernel<double>);
REGISTER_OP_CPU_KERNEL(lookup_table_v2_grad,
ops::LookupTableV2GradKernel<float>,
ops::LookupTableV2GradKernel<double>);
| [
"[email protected]"
] | |
9da193da74e57158eb89787cd0a632d3abf6de38 | fe3d7da03dad0238c90274283b39d0a72fa6d7f6 | /DirectShowFilters/MPAudioRenderer/AE_mixer/AERemap.cpp | 9a82e2b0d210da70a14e4a62ec4b2393adf824a7 | [] | no_license | morpheusxx/MediaPortal-1 | d39f55ea833f2e236d409698f46c1e2c7f8c8b54 | 91418996e35b76f08b5885246a84f131fff0c731 | refs/heads/EXP-TVE3.5-MP1-MP2 | 2023-08-03T12:07:08.853789 | 2014-07-20T08:48:57 | 2014-07-20T08:48:57 | 11,057,754 | 1 | 4 | null | 2023-06-04T11:10:11 | 2013-06-29T19:00:10 | C# | UTF-8 | C++ | false | false | 12,809 | cpp | /*
* Copyright (C) 2010-2012 Team XBMC
* http://xbmc.org
*
* This Program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2, or (at your option)
* any later version.
*
* This Program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with XBMC; see the file COPYING. If not, write to
* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
* http://www.gnu.org/copyleft/gpl.html
*
*/
#include "..\source\stdafx.h"
#include <math.h>
#include <sstream>
#include <string>
#include "AERemap.h"
#include "..\source\Globals.h"
#include "..\..\alloctracing.h"
using namespace std;
CAERemap::CAERemap()
{
}
CAERemap::~CAERemap()
{
}
bool CAERemap::Initialize(CAEChannelInfo input, CAEChannelInfo output, bool finalStage, bool forceNormalize/* = false */, enum AEStdChLayout stdChLayout/* = AE_CH_LAYOUT_INVALID */)
{
if (!input.Count() || !output.Count())
return false;
/* build the downmix matrix */
memset(m_mixInfo, 0, sizeof(m_mixInfo));
m_output = output;
/* figure which channels we have */
for (unsigned int o = 0; o < output.Count(); ++o)
m_mixInfo[output[o]].in_dst = true;
/* flag invalid channels for forced downmix */
if (stdChLayout != AE_CH_LAYOUT_INVALID)
{
CAEChannelInfo layout = stdChLayout;
for (unsigned int o = 0; o < output.Count(); ++o)
if (!layout.HasChannel(output[o]))
m_mixInfo[output[o]].in_dst = false;
}
m_outChannels = output.Count();
/* lookup the channels that exist in the output */
for (unsigned int i = 0; i < input.Count(); ++i)
{
AEMixInfo *info = &m_mixInfo[input[i]];
AEMixLevel *lvl = &info->srcIndex[info->srcCount++];
info->in_src = true;
lvl->index = i;
lvl->level = 1.0f;
if (!info->in_dst)
{
for (unsigned int o = 0; o < output.Count(); ++o)
{
if (input[i] == output[o])
{
info->outIndex = o;
break;
}
}
}
m_inChannels = i;
}
++m_inChannels;
/* the final stage does not need any down/upmix */
if (finalStage)
return true;
/* downmix from the specified channel to the specified list of channels */
#define RM(from, ...) \
static AEChannel downmix_##from[] = {__VA_ARGS__, AE_CH_NULL}; \
ResolveMix(from, CAEChannelInfo(downmix_##from));
/*
the order of this is important as we can not mix channels
into ones that have already been resolved... eg
TBR -> BR
TBC -> TBL & TBR
TBR will get resolved to BR, and then TBC will get
resolved to TBL, but since TBR has been resolved it will
never make it to the output. The order has to be reversed
as the TBC center depends on the TBR downmix... eg
TBC -> TBL & TBR
TBR -> BR
if for any reason out of order mapping becomes required
looping this list should resolve the channels.
*/
RM(AE_CH_TBC , AE_CH_TBL, AE_CH_TBR);
RM(AE_CH_TBR , AE_CH_BR);
RM(AE_CH_TBL , AE_CH_BL);
RM(AE_CH_TC , AE_CH_TFL, AE_CH_TFR);
RM(AE_CH_TFC , AE_CH_TFL, AE_CH_TFR);
RM(AE_CH_TFR , AE_CH_FR);
RM(AE_CH_TFL , AE_CH_FL);
RM(AE_CH_SR , AE_CH_BR, AE_CH_FR);
RM(AE_CH_SL , AE_CH_BL, AE_CH_FL);
RM(AE_CH_BC , AE_CH_BL, AE_CH_BR);
RM(AE_CH_FROC, AE_CH_FR, AE_CH_FC);
RM(AE_CH_FLOC, AE_CH_FL, AE_CH_FC);
RM(AE_CH_BL , AE_CH_FL);
RM(AE_CH_BR , AE_CH_FR);
RM(AE_CH_LFE , AE_CH_FL, AE_CH_FR);
RM(AE_CH_FL , AE_CH_FC);
RM(AE_CH_FR , AE_CH_FC);
RM(AE_CH_BROC, AE_CH_BR, AE_CH_BC);
RM(AE_CH_BLOC, AE_CH_BL, AE_CH_BC);
/* since everything eventually mixes down to FC we need special handling for it */
if (m_mixInfo[AE_CH_FC].in_src)
{
/* if there is no output FC channel, try to mix it the best possible way */
if (!m_mixInfo[AE_CH_FC].in_dst)
{
/* if we have TFC & FL & FR */
if (m_mixInfo[AE_CH_TFC].in_dst && m_mixInfo[AE_CH_FL].in_dst && m_mixInfo[AE_CH_FR].in_dst)
{
RM(AE_CH_FC, AE_CH_TFC, AE_CH_FL, AE_CH_FR);
}
/* if we have TFC */
else if (m_mixInfo[AE_CH_TFC].in_dst)
{
RM(AE_CH_FC, AE_CH_TFC);
}
/* if we have FLOC & FROC */
else if (m_mixInfo[AE_CH_FLOC].in_dst && m_mixInfo[AE_CH_FROC].in_dst)
{
RM(AE_CH_FC, AE_CH_FLOC, AE_CH_FROC);
}
/* if we have TC & FL & FR */
else if (m_mixInfo[AE_CH_TC].in_dst && m_mixInfo[AE_CH_FL].in_dst && m_mixInfo[AE_CH_FR].in_dst)
{
RM(AE_CH_FC, AE_CH_TC, AE_CH_FL, AE_CH_FR);
}
/* if we have FL & FR */
else if (m_mixInfo[AE_CH_FL].in_dst && m_mixInfo[AE_CH_FR].in_dst)
{
RM(AE_CH_FC, AE_CH_FL, AE_CH_FR);
}
/* if we have TFL & TFR */
else if (m_mixInfo[AE_CH_TFL].in_dst && m_mixInfo[AE_CH_TFR].in_dst)
{
RM(AE_CH_FC, AE_CH_TFL, AE_CH_TFR);
}
/* we dont have enough speakers to emulate FC */
else
return false;
}
else
{
/* if there is only one channel in the source and it is the FC and we have FL & FR, upmix to dual mono */
if (m_inChannels == 1 && m_mixInfo[AE_CH_FL].in_dst && m_mixInfo[AE_CH_FR].in_dst)
{
RM(AE_CH_FC, AE_CH_FL, AE_CH_FR);
}
}
}
#undef RM
/*
if (g_guiSettings.GetBool("audiooutput.stereoupmix"))
BuildUpmixMatrix(input, output);
*/
/* normalize the values */
bool normalize = false;
if (forceNormalize)
normalize = true;
else
{
// dontnormalize = g_guiSettings.GetBool("audiooutput.dontnormalizelevels");
// CLog::Log(LOGDEBUG, "AERemap: Downmix normalization is %s", (dontnormalize ? "disabled" : "enabled"));
}
if (normalize)
{
float max = 0;
for (unsigned int o = 0; o < output.Count(); ++o)
{
AEMixInfo *info = &m_mixInfo[output[o]];
float sum = 0;
for (int i = 0; i < info->srcCount; ++i)
sum += info->srcIndex[i].level;
if (sum > max)
max = sum;
}
float scale = 1.0f / max;
for (unsigned int o = 0; o < output.Count(); ++o)
{
AEMixInfo *info = &m_mixInfo[output[o]];
for (int i = 0; i < info->srcCount; ++i)
info->srcIndex[i].level *= scale;
}
}
#if 1
/* dump the matrix */
Log("==[Downmix Matrix]==");
for (unsigned int o = 0; o < output.Count(); ++o)
{
AEMixInfo *info = &m_mixInfo[output[o]];
if (info->srcCount == 0)
continue;
std::stringstream s;
s << CAEChannelInfo::GetChName(output[o]) << " =";
for (int i = 0; i < info->srcCount; ++i)
s << " " << CAEChannelInfo::GetChName(input[info->srcIndex[i].index]) << "(" << info->srcIndex[i].level << ")";
Log("%s", s.str().c_str());
}
Log("====================\n");
#endif
return true;
}
void CAERemap::ResolveMix(const AEChannel from, CAEChannelInfo to)
{
AEMixInfo *fromInfo = &m_mixInfo[from];
if (fromInfo->in_dst || !fromInfo->in_src)
return;
for (unsigned int i = 0; i < to.Count(); ++i)
{
AEMixInfo *toInfo = &m_mixInfo[to[i]];
toInfo->in_src = true;
for (int o = 0; o < fromInfo->srcCount; ++o)
{
AEMixLevel *fromLvl = &fromInfo->srcIndex[o];
AEMixLevel *toLvl = NULL;
/* if its already in the output, then we need to combine the levels */
for (int l = 0; l < toInfo->srcCount; ++l)
if (toInfo->srcIndex[l].index == fromLvl->index)
{
toLvl = &toInfo->srcIndex[l];
toLvl->level = (fromLvl->level + toLvl->level) / sqrt((float)to.Count() + 1.0f);
break;
}
if (toLvl)
continue;
toLvl = &toInfo->srcIndex[toInfo->srcCount++];
toLvl->index = fromLvl->index;
toLvl->level = fromLvl->level / sqrt((float)to.Count());
}
}
fromInfo->srcCount = 0;
fromInfo->in_src = false;
}
/* This method has unrolled loop for higher performance */
void CAERemap::Remap(float * const in, float * const out, const unsigned int frames) const
{
const unsigned int frameBlocks = frames & ~0x3;
for (int o = 0; o < m_outChannels; ++o)
{
const AEMixInfo *info = &m_mixInfo[m_output[o]];
if (!info->in_dst)
{
unsigned int f = 0;
unsigned int odx = 0;
for(; f < frameBlocks; f += 4)
{
out[odx + o] = 0.0f, odx += m_outChannels;
out[odx + o] = 0.0f, odx += m_outChannels;
out[odx + o] = 0.0f, odx += m_outChannels;
out[odx + o] = 0.0f, odx += m_outChannels;
}
switch (frames & 0x3)
{
case 3: out[odx + o] = 0.0f, odx += m_outChannels;
case 2: out[odx + o] = 0.0f, odx += m_outChannels;
case 1: out[odx + o] = 0.0f;
}
continue;
}
/* if there is only 1 source, just copy it so we dont break DPL */
if (info->srcCount == 1)
{
unsigned int f = 0;
unsigned int idx = 0;
unsigned int odx = 0;
unsigned int srcIndex = info->srcIndex[0].index;
/* the compiler has a better chance of optimizing this if it is done in parallel */
for (; f < frameBlocks; f += 4)
{
out[odx + o] = in[idx + srcIndex], idx += m_inChannels, odx += m_outChannels;
out[odx + o] = in[idx + srcIndex], idx += m_inChannels, odx += m_outChannels;
out[odx + o] = in[idx + srcIndex], idx += m_inChannels, odx += m_outChannels;
out[odx + o] = in[idx + srcIndex], idx += m_inChannels, odx += m_outChannels;
}
switch (frames & 0x3)
{
case 3: out[odx + o] = in[idx + srcIndex], idx += m_inChannels, odx += m_outChannels;
case 2: out[odx + o] = in[idx + srcIndex], idx += m_inChannels, odx += m_outChannels;
case 1: out[odx + o] = in[idx + srcIndex];
}
}
else
{
for (unsigned int f = 0; f < frames; ++f)
{
float *outOffset = out + (f * m_outChannels) + o;
float *inOffset = in + (f * m_inChannels);
*outOffset = 0.0f;
int blocks = info->srcCount & ~0x3;
/* the compiler has a better chance of optimizing this if it is done in parallel */
int i = 0;
for (; i < blocks; i += 4)
{
*outOffset += inOffset[info->srcIndex[i].index] * info->srcIndex[i].level, i++;
*outOffset += inOffset[info->srcIndex[i].index] * info->srcIndex[i].level, i++;
*outOffset += inOffset[info->srcIndex[i].index] * info->srcIndex[i].level, i++;
*outOffset += inOffset[info->srcIndex[i].index] * info->srcIndex[i].level, i++;
}
/* unrolled loop for higher performance */
switch (info->srcCount & 0x3)
{
case 3: *outOffset += inOffset[info->srcIndex[i].index] * info->srcIndex[i].level, i++;
case 2: *outOffset += inOffset[info->srcIndex[i].index] * info->srcIndex[i].level, i++;
case 1: *outOffset += inOffset[info->srcIndex[i].index] * info->srcIndex[i].level;
}
}
}
}
}
inline void CAERemap::BuildUpmixMatrix(const CAEChannelInfo& input, const CAEChannelInfo& output)
{
#define UM(from, to) \
if (!m_mixInfo[to].in_src && m_mixInfo[to].in_dst) \
{ \
AEMixInfo *toInfo = &m_mixInfo[to ]; \
AEMixInfo *fromInfo = &m_mixInfo[from]; \
toInfo->srcIndex[toInfo->srcCount].level = 1.0f; \
toInfo->srcIndex[toInfo->srcCount].index = fromInfo->srcIndex[0].index; \
toInfo ->srcCount++; \
fromInfo->cpyCount++; \
}
if (m_mixInfo[AE_CH_FL].in_src)
{
UM(AE_CH_FL, AE_CH_BL );
UM(AE_CH_FL, AE_CH_SL );
UM(AE_CH_FL, AE_CH_FC );
UM(AE_CH_FL, AE_CH_LFE);
}
if (m_mixInfo[AE_CH_FR].in_src)
{
UM(AE_CH_FR, AE_CH_BR );
UM(AE_CH_FR, AE_CH_SR );
UM(AE_CH_FR, AE_CH_FC );
UM(AE_CH_FR, AE_CH_LFE);
}
/* fix the levels of anything we added */
for (unsigned int i = 0; i < output.Count(); ++i)
{
AEMixInfo *outputInfo = &m_mixInfo[output[i]];
if (!outputInfo->in_src && outputInfo->srcCount > 0)
for (int src = 0; src < outputInfo->srcCount; ++src)
{
AEChannel srcChannel = input[outputInfo->srcIndex[src].index];
AEMixInfo *inputInfo = &m_mixInfo[srcChannel];
outputInfo->srcIndex[src].level /= sqrt((float)(inputInfo->cpyCount + 1));
}
}
/* fix the source levels also */
for (unsigned int i = 0; i < input.Count(); ++i)
{
AEMixInfo *inputInfo = &m_mixInfo[input[i]];
if (!inputInfo->in_dst || inputInfo->cpyCount == 0)
continue;
inputInfo->srcIndex[0].level /= sqrt((float)(inputInfo->cpyCount + 1));
}
}
| [
"[email protected]"
] | |
b19e93faabaaa785b6423c1c4ace570919d609f8 | 600df3590cce1fe49b9a96e9ca5b5242884a2a70 | /v8/src/inspector/search-util.cc | a6fba06c115b724f3c74cb00a2df80ac2a4d7d3f | [
"BSD-3-Clause",
"SunPro",
"bzip2-1.0.6"
] | permissive | metux/chromium-suckless | efd087ba4f4070a6caac5bfbfb0f7a4e2f3c438a | 72a05af97787001756bae2511b7985e61498c965 | refs/heads/orig | 2022-12-04T23:53:58.681218 | 2017-04-30T10:59:06 | 2017-04-30T23:35:58 | 89,884,931 | 5 | 3 | BSD-3-Clause | 2022-11-23T20:52:53 | 2017-05-01T00:09:08 | null | UTF-8 | C++ | false | false | 5,539 | cc | // Copyright 2016 the V8 project authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
#include "src/inspector/search-util.h"
#include "src/inspector/protocol/Protocol.h"
#include "src/inspector/v8-inspector-impl.h"
#include "src/inspector/v8-inspector-session-impl.h"
#include "src/inspector/v8-regex.h"
namespace v8_inspector {
namespace {
String16 findMagicComment(const String16& content, const String16& name,
bool multiline) {
DCHECK(name.find("=") == String16::kNotFound);
size_t length = content.length();
size_t nameLength = name.length();
size_t pos = length;
size_t equalSignPos = 0;
size_t closingCommentPos = 0;
while (true) {
pos = content.reverseFind(name, pos);
if (pos == String16::kNotFound) return String16();
// Check for a /\/[\/*][@#][ \t]/ regexp (length of 4) before found name.
if (pos < 4) return String16();
pos -= 4;
if (content[pos] != '/') continue;
if ((content[pos + 1] != '/' || multiline) &&
(content[pos + 1] != '*' || !multiline))
continue;
if (content[pos + 2] != '#' && content[pos + 2] != '@') continue;
if (content[pos + 3] != ' ' && content[pos + 3] != '\t') continue;
equalSignPos = pos + 4 + nameLength;
if (equalSignPos < length && content[equalSignPos] != '=') continue;
if (multiline) {
closingCommentPos = content.find("*/", equalSignPos + 1);
if (closingCommentPos == String16::kNotFound) return String16();
}
break;
}
DCHECK(equalSignPos);
DCHECK(!multiline || closingCommentPos);
size_t urlPos = equalSignPos + 1;
String16 match = multiline
? content.substring(urlPos, closingCommentPos - urlPos)
: content.substring(urlPos);
size_t newLine = match.find("\n");
if (newLine != String16::kNotFound) match = match.substring(0, newLine);
match = match.stripWhiteSpace();
for (size_t i = 0; i < match.length(); ++i) {
UChar c = match[i];
if (c == '"' || c == '\'' || c == ' ' || c == '\t') return "";
}
return match;
}
String16 createSearchRegexSource(const String16& text) {
String16Builder result;
for (size_t i = 0; i < text.length(); i++) {
UChar c = text[i];
if (c == '[' || c == ']' || c == '(' || c == ')' || c == '{' || c == '}' ||
c == '+' || c == '-' || c == '*' || c == '.' || c == ',' || c == '?' ||
c == '\\' || c == '^' || c == '$' || c == '|') {
result.append('\\');
}
result.append(c);
}
return result.toString();
}
std::unique_ptr<std::vector<size_t>> lineEndings(const String16& text) {
std::unique_ptr<std::vector<size_t>> result(new std::vector<size_t>());
const String16 lineEndString = "\n";
size_t start = 0;
while (start < text.length()) {
size_t lineEnd = text.find(lineEndString, start);
if (lineEnd == String16::kNotFound) break;
result->push_back(lineEnd);
start = lineEnd + 1;
}
result->push_back(text.length());
return result;
}
std::vector<std::pair<int, String16>> scriptRegexpMatchesByLines(
const V8Regex& regex, const String16& text) {
std::vector<std::pair<int, String16>> result;
if (text.isEmpty()) return result;
std::unique_ptr<std::vector<size_t>> endings(lineEndings(text));
size_t size = endings->size();
size_t start = 0;
for (size_t lineNumber = 0; lineNumber < size; ++lineNumber) {
size_t lineEnd = endings->at(lineNumber);
String16 line = text.substring(start, lineEnd - start);
if (line.length() && line[line.length() - 1] == '\r')
line = line.substring(0, line.length() - 1);
int matchLength;
if (regex.match(line, 0, &matchLength) != -1)
result.push_back(std::pair<int, String16>(lineNumber, line));
start = lineEnd + 1;
}
return result;
}
std::unique_ptr<protocol::Debugger::SearchMatch> buildObjectForSearchMatch(
int lineNumber, const String16& lineContent) {
return protocol::Debugger::SearchMatch::create()
.setLineNumber(lineNumber)
.setLineContent(lineContent)
.build();
}
std::unique_ptr<V8Regex> createSearchRegex(V8InspectorImpl* inspector,
const String16& query,
bool caseSensitive, bool isRegex) {
String16 regexSource = isRegex ? query : createSearchRegexSource(query);
return wrapUnique(new V8Regex(inspector, regexSource, caseSensitive));
}
} // namespace
std::vector<std::unique_ptr<protocol::Debugger::SearchMatch>>
searchInTextByLinesImpl(V8InspectorSession* session, const String16& text,
const String16& query, const bool caseSensitive,
const bool isRegex) {
std::unique_ptr<V8Regex> regex = createSearchRegex(
static_cast<V8InspectorSessionImpl*>(session)->inspector(), query,
caseSensitive, isRegex);
std::vector<std::pair<int, String16>> matches =
scriptRegexpMatchesByLines(*regex.get(), text);
std::vector<std::unique_ptr<protocol::Debugger::SearchMatch>> result;
for (const auto& match : matches)
result.push_back(buildObjectForSearchMatch(match.first, match.second));
return result;
}
String16 findSourceURL(const String16& content, bool multiline) {
return findMagicComment(content, "sourceURL", multiline);
}
String16 findSourceMapURL(const String16& content, bool multiline) {
return findMagicComment(content, "sourceMappingURL", multiline);
}
} // namespace v8_inspector
| [
"[email protected]"
] | |
637cc97ffda8f36fe61557e900998035690055a6 | 3fa05bd3be30fe7d8b7b7df08e49bbb87403c30b | /apps/tests/testbed/testbed.cpp | 44562686c41b1e068a10be8ec504a6bccfbabfa8 | [] | no_license | joebradly/kMC | e50aaa3a4183e88c1600c59b9780040c6bd077c5 | 3e7b138fc07bb36c6242cde1059bb1fa6f96743c | refs/heads/master | 2020-12-26T18:47:19.358359 | 2014-03-24T19:12:55 | 2014-03-24T19:12:55 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 44,471 | cpp | #include "testbed.h"
#include "../snapshot/snapshot.h"
#include <unittest++/UnitTest++.h>
#include <iostream>
void testBed::makeSolver()
{
solver = new KMCSolver();
solver->setRNGSeed();
DiffusionReaction::setPotentialParameters(1.0, 0.5, false);
Site::setInitialBoundaries(Boundary::Periodic);
Site::setInitialNNeighborsLimit(2);
Reaction::setBeta(0.5);
solver->setBoxSize({10, 10, 10});
}
void testBed::testTotalParticleStateCounters()
{
Site::resetBoundariesTo(Boundary::Periodic);
CHECK_EQUAL(0, Site::totalActiveParticles(ParticleStates::surface));
CHECK_EQUAL(0, accu(Site::totalActiveParticlesVector()));
CHECK_EQUAL(NX()*NY()*NZ(), accu(Site::totalDeactiveParticlesVector()));
CHECK_EQUAL(NX()*NY()*NZ(), Site::totalDeactiveParticles(ParticleStates::solution));
initSimpleSystemParameters();
activateAllSites();
CHECK_EQUAL(0, Site::totalActiveParticles(ParticleStates::surface));
CHECK_EQUAL(0, accu(Site::totalDeactiveParticlesVector()));
CHECK_EQUAL(NX()*NY()*NZ(), accu(Site::totalActiveParticlesVector()));
CHECK_EQUAL(NX()*NY()*NZ(), Site::totalActiveParticles(ParticleStates::solution));
Site * boxCenter = solver->getSite(NX()/2, NY()/2, NZ()/2);
boxCenter->deactivate();
boxCenter->spawnAsFixedCrystal();
CHECK_EQUAL(0, Site::totalActiveParticles(ParticleStates::surface));
CHECK_EQUAL(0, accu(Site::totalDeactiveParticlesVector()));
CHECK_EQUAL(NX()*NY()*NZ(), accu(Site::totalActiveParticlesVector()));
CHECK_EQUAL(NX()*NY()*NZ() - 1, Site::totalActiveParticles(ParticleStates::crystal));
boxCenter->deactivate();
boxCenter->activate();
CHECK_EQUAL(0, Site::totalActiveParticles(ParticleStates::surface));
CHECK_EQUAL(0, accu(Site::totalDeactiveParticlesVector()));
CHECK_EQUAL(NX()*NY()*NZ(), accu(Site::totalActiveParticlesVector()));
CHECK_EQUAL(NX()*NY()*NZ(), Site::totalActiveParticles(ParticleStates::crystal));
deactivateAllSites();
CHECK_EQUAL(0, Site::totalActiveParticles(ParticleStates::surface));
CHECK_EQUAL(0, accu(Site::totalActiveParticlesVector()));
CHECK_EQUAL(NX()*NY()*NZ(), accu(Site::totalDeactiveParticlesVector()));
CHECK_EQUAL(NX()*NY()*NZ(), Site::totalDeactiveParticles(ParticleStates::solution));
boxCenter->spawnAsFixedCrystal();
CHECK_EQUAL(0, Site::totalActiveParticles(ParticleStates::surface));
CHECK_EQUAL(1, accu(Site::totalActiveParticlesVector()));
CHECK_EQUAL(1, Site::totalActiveParticles(ParticleStates::fixedCrystal));
CHECK_EQUAL(pow(DiffusionReaction::separation()*2 + 1, 3) - 1, Site::totalDeactiveParticles(ParticleStates::surface));
solver->reset();
CHECK_EQUAL(0, Site::totalActiveParticles(ParticleStates::surface));
CHECK_EQUAL(0, accu(Site::totalActiveParticlesVector()));
CHECK_EQUAL(NX()*NY()*NZ(), accu(Site::totalDeactiveParticlesVector()));
CHECK_EQUAL(NX()*NY()*NZ(), Site::totalDeactiveParticles(ParticleStates::solution));
uint C0 = NX()*NY()*NZ();
uint C1 = 0;
solver->forEachSiteDo([&C0, &C1] (Site * currentSite)
{
CHECK_EQUAL(C0, accu(Site::totalDeactiveParticlesVector()));
CHECK_EQUAL(C0, Site::totalDeactiveParticles(ParticleStates::solution));
CHECK_EQUAL(C1, accu(Site::totalActiveParticlesVector()));
CHECK_EQUAL(C1, Site::totalActiveParticles(ParticleStates::solution));
currentSite->activate();
C0--;
C1++;
});
deactivateAllSites();
CHECK_EQUAL(0, Site::totalActiveParticles(ParticleStates::surface));
CHECK_EQUAL(0, accu(Site::totalActiveParticlesVector()));
CHECK_EQUAL(NX()*NY()*NZ(), accu(Site::totalDeactiveParticlesVector()));
CHECK_EQUAL(NX()*NY()*NZ(), Site::totalDeactiveParticles(ParticleStates::solution));
solver->setBoxSize({10, 10, 10});
boxCenter = solver->getSite(NX()/2, NY()/2, NZ()/2);
for (uint sep = 0; sep <= 3 ; ++sep)
{
Site::resetNNeighborsLimitTo(sep + 1);
DiffusionReaction::resetSeparationTo(sep);
boxCenter->spawnAsFixedCrystal();
CHECK_EQUAL(pow(2*sep + 1, 3) - 1, Site::totalDeactiveParticles(ParticleStates::surface));
boxCenter->deactivate();
}
DiffusionReaction::resetSeparationTo(3);
solver->getSite(0, 0, 0)->spawnAsFixedCrystal();
solver->forEachSiteDo_sendIndices([] (Site * site, uint x, uint y, uint z)
{
if ((x%2 == 0) && (y%2 == 0) && (z%2 == 0) && (!(x == 0 && y == 0 && z == 0)))
{
site->spawnAsFixedCrystal();
}
});
solver->dumpXYZ();
CHECK_EQUAL(NX()*NY()*NZ()/8, Site::totalActiveParticles(ParticleStates::fixedCrystal));
CHECK_EQUAL(7*NX()*NY()*NZ()/8, Site::totalDeactiveParticles(ParticleStates::surface));
}
void testBed::testDistanceTo()
{
int dx, dy, dz, dx2, dy2, dz2;
uint adx, ady, adz;
solver->setBoxSize({6, 6, 6}, false);
Site::resetNNeighborsLimitTo(2);
solver->forEachSiteDo([&] (Site * startSite)
{
solver->forEachSiteDo_sendIndices([&] (Site * endSite, uint endx, uint endy, uint endz)
{
Boundary::setupCurrentBoundaries(endx, endy, endz);
endSite->distanceTo(startSite, dx, dy, dz, true);
adx = dx;
ady = dy;
adz = dz;
endSite->distanceTo(startSite, dx, dy, dz);
CHECK_EQUAL(adx, abs(dx));
CHECK_EQUAL(ady, abs(dy));
CHECK_EQUAL(adz, abs(dz));
startSite->distanceTo(endSite, dx2, dy2, dz2);
if (adx != NX()/2)
{
CHECK_EQUAL(dx, -dx2);
}
else
{
CHECK_EQUAL(adx, abs(dx2));
}
if (ady != NY()/2)
{
CHECK_EQUAL(dy, -dy2);
}
else
{
CHECK_EQUAL(ady, abs(dy2));
}
if (adz != NZ()/2)
{
CHECK_EQUAL(dz, -dz2);
}
else
{
CHECK_EQUAL(adz, abs(dz2));
}
CHECK_EQUAL(startSite->x(), Boundary::currentBoundaries(0)->transformCoordinate(endSite->x() + dx));
CHECK_EQUAL(startSite->y(), Boundary::currentBoundaries(1)->transformCoordinate(endSite->y() + dy));
CHECK_EQUAL(startSite->z(), Boundary::currentBoundaries(2)->transformCoordinate(endSite->z() + dz));
if (Site::boundaryTypes(0) == Boundary::Periodic)
{
int X = (int)startSite->x() - (int)endSite->x();
if (X < -(int)NX()/2)
{
X += NX();
}
else if (X > (int)NX()/2)
{
X -= NX();
}
if (abs(X) == (int)NX()/2)
{
CHECK_EQUAL(abs(X), adx);
}
else
{
CHECK_EQUAL(dx, X);
}
}
if (Site::boundaryTypes(1) == Boundary::Periodic)
{
int Y = (int)startSite->y() - (int)endSite->y();
if (Y < -(int)NY()/2)
{
Y += NY();
}
else if (Y > (int)NY()/2)
{
Y -= NY();
}
if (abs(Y) == (int)NY()/2)
{
CHECK_EQUAL(abs(Y), ady);
}
else
{
CHECK_EQUAL(dy, Y);
}
}
if (Site::boundaryTypes(2) == Boundary::Periodic)
{
int Z = (int)startSite->z() - (int)endSite->z();
if (Z < -(int)NZ()/2)
{
Z += NZ();
}
else if (Z > (int)NZ()/2)
{
Z -= NZ();
}
if (abs(Z) == (int)NZ()/2)
{
CHECK_EQUAL(abs(Z), adz);
}
else
{
CHECK_EQUAL(dz, Z);
}
}
});
});
}
void testBed::testDeactivateSurface()
{
solver->setBoxSize({10, 10, 10}, false);
Site::resetNNeighborsToCrystallizeTo(1);
Site * orig = solver->getSite(NX()/2, NY()/2, NZ()/2);
Site * origNeighbor = solver->getSite(NX()/2+1, NY()/2, NZ()/2);
Site * origNextNeighbor;
Site * inBetweenSite;
orig->spawnAsFixedCrystal();
CHECK_EQUAL(ParticleStates::fixedCrystal, orig->particleState());
CHECK_EQUAL(ParticleStates::surface, origNeighbor->particleState());
uvec separations = {1, 2, 3};
for (uint sep: separations)
{
Site::resetNNeighborsLimitTo(sep + 1);
DiffusionReaction::resetSeparationTo(sep);
orig->deactivate();
orig->spawnAsFixedCrystal();
CHECK_EQUAL(ParticleStates::fixedCrystal, orig->particleState());
CHECK_EQUAL(ParticleStates::surface, origNeighbor->particleState());
origNeighbor->activate();
CHECK_EQUAL(ParticleStates::crystal, origNeighbor->particleState());
origNextNeighbor = solver->getSite(NX()/2 + 1 + DiffusionReaction::separation(), NY()/2, NZ()/2);
CHECK_EQUAL(ParticleStates::surface, origNextNeighbor->particleState());
origNextNeighbor->activate();
for (uint i = 1; i < DiffusionReaction::separation(); ++i)
{
inBetweenSite = solver->getSite(NX()/2 + 1 + i, NY()/2, NZ()/2);
inBetweenSite->activate();
}
CHECK_EQUAL(ParticleStates::crystal, origNextNeighbor->particleState());
for (uint i = 1; i < DiffusionReaction::separation(); ++i)
{
inBetweenSite = solver->getSite(NX()/2 + 1 + i, NY()/2, NZ()/2);
inBetweenSite->deactivate();
}
origNeighbor->deactivate();
CHECK_EQUAL(ParticleStates::fixedCrystal, orig->particleState());
CHECK_EQUAL(ParticleStates::surface, origNeighbor->particleState());
CHECK_EQUAL(false, origNextNeighbor->hasNeighboring(ParticleStates::crystal, DiffusionReaction::separation()));
CHECK_EQUAL(ParticleStates::solution, origNextNeighbor->particleState());
origNextNeighbor->deactivate();
}
}
void testBed::testDiffusionSiteMatrixSetup()
{
DiffusionReaction * currentDiffReaction;
int i, j, k;
solver->forEachSiteDo_sendIndices([&] (Site * site, uint x, uint y, uint z)
{
const Site & currentSite = *site;
Boundary::setupCurrentBoundaries(x, y, z);
for (Reaction * r : currentSite.reactions())
{
currentDiffReaction = (DiffusionReaction*)r;
const Site & site = *(currentDiffReaction->getReactionSite());
const Site & dest = *(currentDiffReaction->destinationSite());
CHECK_EQUAL(currentSite, site);
site.distanceTo(&dest, i, j, k);
uint xt = Boundary::currentBoundaries(0)->transformCoordinate(x + i);
uint yt = Boundary::currentBoundaries(1)->transformCoordinate(y + j);
uint zt = Boundary::currentBoundaries(2)->transformCoordinate(z + k);
const Site & dest2 = *(solver->getSite(xt, yt, zt));
CHECK_EQUAL(dest, dest2);
}
});
}
void testBed::testNeighbors()
{
int dx, dy, dz;
solver->forEachSiteDo([&] (Site * currentSite)
{
currentSite->forEachNeighborDo_sendIndices([&] (Site * neighbor, uint i, uint j, uint k)
{
currentSite->distanceTo(neighbor, dx, dy, dz);
CHECK_EQUAL(Site::originTransformVector(i), dx);
CHECK_EQUAL(Site::originTransformVector(j), dy);
CHECK_EQUAL(Site::originTransformVector(k), dz);
});
});
}
void testBed::testPropertyCalculations()
{
initSimpleSystemParameters();
CHECK_EQUAL(0, Site::nSurfaces());
CHECK_EQUAL(0, Site::nCrystals());
CHECK_EQUAL(0, Site::nSolutionParticles());
CHECK_EQUAL(0, Site::getCurrentSolutionDensity());
Site * center = getBoxCenter();
center->spawnAsFixedCrystal();
CHECK_EQUAL(26, Site::nSurfaces());
CHECK_EQUAL(1, Site::nCrystals());
CHECK_EQUAL(0, Site::nSolutionParticles());
CHECK_EQUAL(0, Site::getCurrentSolutionDensity());
CHECK_EQUAL(1.0, 125*Site::getCurrentRelativeCrystalOccupancy());
umat boxTop = Site::getCurrentCrystalBoxTopology();
CHECK_EQUAL(NX()/2, boxTop(0, 0));
CHECK_EQUAL(NY()/2, boxTop(1, 0));
CHECK_EQUAL(NZ()/2, boxTop(2, 0));
CHECK_EQUAL(NX()/2, boxTop(0, 1));
CHECK_EQUAL(NY()/2, boxTop(1, 1));
CHECK_EQUAL(NZ()/2, boxTop(2, 1));
solver->getSite(0, 0, 0)->activate();
solver->getSite(1, 0, 0)->activate();
solver->getSite(0, 1, 0)->activate();
CHECK_EQUAL(3, Site::nSolutionParticles());
CHECK_EQUAL(3.0/124, Site::getCurrentSolutionDensity());
activateAllSites();
CHECK_EQUAL(0, Site::nSurfaces());
CHECK_EQUAL(125, Site::nCrystals());
CHECK_EQUAL(0, Site::nSolutionParticles());
CHECK_EQUAL(0, Site::getCurrentSolutionDensity());
CHECK_EQUAL(1.0, Site::getCurrentRelativeCrystalOccupancy());
boxTop = Site::getCurrentCrystalBoxTopology();
CHECK_EQUAL(0, boxTop(0, 0));
CHECK_EQUAL(0, boxTop(1, 0));
CHECK_EQUAL(0, boxTop(2, 0));
CHECK_EQUAL(NX()-1, boxTop(0, 1));
CHECK_EQUAL(NY()-1, boxTop(1, 1));
CHECK_EQUAL(NZ()-1, boxTop(2, 1));
CHECK_EQUAL(0, Site::getCurrentSolutionDensity());
deactivateAllSites();
center->spawnAsFixedCrystal();
solver->getSite(2, 2, 3)->activate();
solver->getSite(2, 2, 4)->activate();
solver->getSite(2, 1, 1)->activate();
solver->getSite(2, 1, 2)->activate();
solver->getSite(2, 1, 3)->activate();
solver->getSite(2, 3, 3)->activate();
/*
* x x x
* x x x
* x
*
*/
boxTop = Site::getCurrentCrystalBoxTopology();
CHECK_EQUAL(2, boxTop(0, 0));
CHECK_EQUAL(1, boxTop(1, 0));
CHECK_EQUAL(1, boxTop(2, 0));
CHECK_EQUAL(2, boxTop(0, 1));
CHECK_EQUAL(3, boxTop(1, 1));
CHECK_EQUAL(4, boxTop(2, 1));
}
void testBed::testRNG()
{
double U = 0;
double U2 = 0;
double N = 0;
double N2 = 0;
double Ui;
double Ni;
uint COUNT = 1000000;
for (uint i = 0; i < COUNT; ++i)
{
Ui = KMC_RNG_UNIFORM();
Ni = KMC_RNG_NORMAL();
U += Ui;
U2 += Ui*Ui;
N += Ni;
N2 += Ni*Ni;
}
double stdU;
double stdN;
U /= COUNT;
U2 /= COUNT;
N /= COUNT;
N2 /= COUNT;
stdU = sqrt(U2 - U*U);
stdN = sqrt(N2 - N*N);
CHECK_CLOSE(0.5, U, 0.01);
CHECK_CLOSE(1.0/sqrt(12), stdU, 0.01);
CHECK_CLOSE(0, N, 0.01);
CHECK_CLOSE(1, stdN, 0.01);
vector<double> setn;
vector<double> setu;
solver->setRNGSeed(Seed::specific, Seed::initialSeed);
for (uint i = 0; i < 1000000; ++i)
{
setu.push_back(KMC_RNG_UNIFORM());
setn.push_back(KMC_RNG_NORMAL());
}
solver->setRNGSeed(Seed::specific, Seed::initialSeed);
for (uint i = 0; i < 1000000; ++i)
{
CHECK_EQUAL(KMC_RNG_UNIFORM(), setu.at(i));
CHECK_EQUAL(KMC_RNG_NORMAL(), setn.at(i));
}
}
void testBed::testBinarySearchChoise()
{
uint choice;
uint secondChoice;
double R;
solver->initializeCrystal(0.3);
solver->getRateVariables();
uint N = 10;
uint n = 0;
while(n != N)
{
R = solver->kTot()*KMC_RNG_UNIFORM();
choice = solver->getReactionChoice(R);
secondChoice = 0;
while (solver->accuAllRates().at(secondChoice) <= R)
{
secondChoice++;
}
CHECK_EQUAL(secondChoice, choice);
n++;
}
}
void testBed::testReactionChoise()
{
uint choice, count, count2;
double kTot, r_pre;
Reaction* reaction;
uint N = 3;
uint n = 0;
solver->initializeCrystal(0.3);
solver->getRateVariables();
while(n != N)
{
r_pre = 0;
count2 = 0;
for (double r_i : solver->accuAllRates())
{
double R = (r_i + r_pre)/2;
choice = solver->getReactionChoice(R);
kTot = 0;
count = 0;
for (uint i = 0; i < NX(); ++i)
{
for (uint j = 0; j < NY(); ++j)
{
for (uint k = 0; k < NZ(); ++k)
{
bool notSet = true;
solver->getSite(i, j, k)->forEachActiveReactionDo([&] (Reaction * r)
{
if (!notSet)
{
return;
}
CHECK_EQUAL(r, solver->allReactions().at(count));
kTot += r->rate();
CHECK_EQUAL(kTot, solver->accuAllRates().at(count));
//if by adding this reaction we surpass the limit, we
//are done searching.
if (kTot > R)
{
reaction = r;
i = NX();
j = NY();
k = NZ();
notSet = false;
}
if (notSet)
{
count++;
}
});
}
}
}
CHECK_EQUAL(solver->allReactions().at(choice), reaction);
CHECK_EQUAL(choice, count);
CHECK_EQUAL(count, count2);
count2++;
r_pre = r_i;
}
n++;
}
}
void testBed::testRateCalculation()
{
double E, Esp;
solver->initializeCrystal(0.3);
solver->getRateVariables();
solver->forEachSiteDo([&] (Site * site)
{
site->forEachActiveReactionDo([&] (Reaction * r)
{
E = ((DiffusionReaction*)r)->lastUsedEnergy();
Esp = ((DiffusionReaction*)r)->lastUsedEsp();
r->forceUpdateFlag(Reaction::defaultUpdateFlag);
r->calcRate();
CHECK_EQUAL(E, ((DiffusionReaction*)r)->lastUsedEnergy());
CHECK_EQUAL(Esp, ((DiffusionReaction*)r)->lastUsedEsp());
});
});
}
void testBed::testEnergyAndNeighborSetup()
{
int dx, dy, dz;
uint ldx, ldy, ldz;
double E;
uint C;
solver->initializeCrystal(0.3);
uvec nn(Site::nNeighborsLimit());
solver->forEachSiteDo([&] (Site * currentSite)
{
E = 0;
C = 0;
nn.zeros();
solver->forEachSiteDo([&] (Site * otherSite)
{
currentSite->distanceTo(otherSite, dx, dy, dz);
ldx = abs(dx);
if (ldx <= Site::nNeighborsLimit())
{
ldy = abs(dy);
if (ldy <= Site::nNeighborsLimit())
{
ldz = abs(dz);
if (ldz <= Site::nNeighborsLimit())
{
if (currentSite != otherSite)
{
if (otherSite->isActive())
{
nn(Site::getLevel(ldx, ldy, ldz))++;
E += DiffusionReaction::potential(Site::nNeighborsLimit() + ldx,
Site::nNeighborsLimit() + ldy,
Site::nNeighborsLimit() + ldz);
}
C++;
}
CHECK_EQUAL(otherSite, currentSite->neighborhood(Site::nNeighborsLimit() + dx,
Site::nNeighborsLimit() + dy,
Site::nNeighborsLimit() + dz));
CHECK_EQUAL(currentSite, otherSite->neighborhood(Site::nNeighborsLimit() - dx,
Site::nNeighborsLimit() - dy,
Site::nNeighborsLimit() - dz));
}
}
}
});
uint nNeighbors = 0;
currentSite->forEachNeighborDo([&nNeighbors] (Site * neighbor)
{
(void) neighbor;
nNeighbors++;
});
CHECK_EQUAL(nNeighbors, C);
for (uint K = 0; K < Site::nNeighborsLimit(); ++K)
{
CHECK_EQUAL(nn(K), currentSite->nNeighbors(K));
}
CHECK_CLOSE(E, currentSite->energy(), 0.00001);
});
}
void testBed::testUpdateNeigbors()
{
activateAllSites();
double eMax = accu(DiffusionReaction::potentialBox());
double blockedE;
uvec nBlocked(Site::nNeighborsLimit());
double accuBlockedE = 0;
solver->forEachSiteDo([&] (Site * currentSite)
{
blockedE = 0;
nBlocked.zeros();
for (uint ni = 0; ni < Site::neighborhoodLength(); ++ni)
{
for (uint nj = 0; nj < Site::neighborhoodLength(); ++nj)
{
for (uint nk = 0; nk < Site::neighborhoodLength(); ++nk)
{
if (currentSite->neighborhood(ni, nj, nk) == NULL)
{
nBlocked(Site::levelMatrix(ni, nj, nk))++;
blockedE += DiffusionReaction::potential(ni, nj, nk);
}
}
}
}
for (uint K = 0; K < Site::nNeighborsLimit(); ++K)
{
CHECK_EQUAL(2*(12*(K+1)*(K+1) + 1), currentSite->nNeighbors(K) + nBlocked(K));
}
CHECK_CLOSE(eMax, currentSite->energy() + blockedE, 0.001);
accuBlockedE += blockedE;
});
CHECK_EQUAL(NX()*NY()*NZ(), Site::totalActiveSites());
CHECK_CLOSE(NX()*NY()*NZ()*eMax, Site::totalEnergy() + accuBlockedE, 0.001);
deactivateAllSites();
solver->forEachSiteDo([&] (Site * site)
{
for (uint K = 0; K < Site::nNeighborsLimit(); ++K)
{
CHECK_EQUAL(0, site->nNeighbors(K));
}
CHECK_CLOSE(0, site->energy(), 0.001);
});
CHECK_EQUAL(0, Site::totalActiveSites());
CHECK_CLOSE(0, Site::totalEnergy(), 0.001);
}
void testBed::testHasCrystalNeighbor()
{
Site::resetNNeighborsLimitTo(2, false);
solver->setBoxSize({10, 10, 10});
Site::resetBoundariesTo(Boundary::Edge);
DiffusionReaction::resetSeparationTo(1);
Site::resetNNeighborsToCrystallizeTo(1);
//Spawn a seed in the middle of the box.
solver->getSite(NX()/2, NY()/2, NZ()/2)->spawnAsFixedCrystal();
Site* initCrystal = solver->getSite(NX()/2, NY()/2, NZ()/2);
Site *neighbor;
uint level;
//First we build a shell around the seed a distance 3 away which is all filled with particles.
for (int i = -3; i < 4; ++i)
{
for (int j = -3; j < 4; ++j)
{
for (int k = -3; k < 4; ++k)
{
if (Site::getLevel(abs(i), abs(j), abs(k)) == 2)
{
solver->getSite(NX()/2 + i, NY()/2 + j, NZ()/2 + k)->activate();
CHECK_EQUAL(ParticleStates::solution, solver->getSite(NX()/2 + i, NY()/2 + j, NZ()/2 + k)->particleState());
}
}
}
}
uint nReactions = 8; //eight corners are free to move.
for (int i = -2; i < 3; ++i)
{
for (int j = -2; j < 3; ++j)
{
for (int k = -2; k < 3; ++k)
{
uint level = Site::getLevel(abs(i), abs(j), abs(k));
if (level == 1)
{
nReactions += solver->getSite(NX()/2 + i, NY()/2 + j, NZ()/2 + k)->nNeighbors();
}
}
}
}
for (uint i = 0; i < Site::neighborhoodLength(); ++i)
{
for (uint j = 0; j < Site::neighborhoodLength(); ++j)
{
for (uint k = 0; k < Site::neighborhoodLength(); ++k)
{
neighbor = initCrystal->neighborhood(i, j, k);
//Then we check weather the middle is actually a crystal
if (neighbor == initCrystal)
{
assert(i == j && j == k && k == Site::nNeighborsLimit());
CHECK_EQUAL(ParticleStates::fixedCrystal, neighbor->particleState());
//it should not have any crystal neighbors
CHECK_EQUAL(false, neighbor->hasNeighboring(ParticleStates::crystal, DiffusionReaction::separation()));
continue;
}
level = Site::levelMatrix(i, j, k);
//The first layer should now be a surface, which should be unblocked with a crystal neighbor.
if (level == 0)
{
CHECK_EQUAL(ParticleStates::surface, neighbor->particleState());
CHECK_EQUAL(true, neighbor->hasNeighboring(ParticleStates::crystal, DiffusionReaction::separation()));
}
//The second layer should be blocked because of the shell at distance 3, should be standard solution particles
//without a crystal neighbor.
else if (level == 1)
{
CHECK_EQUAL(ParticleStates::solution, neighbor->particleState());
CHECK_EQUAL(false, neighbor->hasNeighboring(ParticleStates::crystal, DiffusionReaction::separation()));
}
}
}
}
//deactivating the seed should bring everything to solutions except init seed which is surface.
initCrystal->deactivate();
//we now activate all neighbors. This should not make anything crystals.
for (uint i = 0; i < 3; ++i)
{
for (uint j = 0; j < 3; ++j)
{
for (uint k = 0; k < 3; ++k)
{
neighbor = initCrystal->neighborhood(Site::nNeighborsLimit() - 1 + i,
Site::nNeighborsLimit() - 1 + j,
Site::nNeighborsLimit() - 1 + k);
if (neighbor != initCrystal)
{
neighbor->activate();
}
}
}
}
for (uint i = 0; i < 3; ++i)
{
for (uint j = 0; j < 3; ++j)
{
for (uint k = 0; k < 3; ++k)
{
neighbor = initCrystal->neighborhood(Site::nNeighborsLimit() - 1 + i,
Site::nNeighborsLimit() - 1 + j,
Site::nNeighborsLimit() - 1 + k);
CHECK_EQUAL(ParticleStates::solution, neighbor->particleState());
}
}
}
//activating the seed. Should make closest neighbors crystals.
initCrystal->spawnAsFixedCrystal();
Site::updateAffectedSites();
uint nActives = 0;
for (int i = -3; i < 4; ++i)
{
for (int j = -3; j < 4; ++j)
{
for (int k = -3; k < 4; ++k)
{
if (Site::getLevel(abs(i), abs(j), abs(k)) == 0)
{
CHECK_EQUAL(ParticleStates::crystal, solver->getSite(NX()/2 + i, NY()/2 + j, NZ()/2 + k)->particleState());
}
else if (Site::getLevel(abs(i), abs(j), abs(k)) == 1)
{
CHECK_EQUAL(ParticleStates::surface, solver->getSite(NX()/2 + i, NY()/2 + j, NZ()/2 + k)->particleState());
}
else if (Site::getLevel(abs(i), abs(j), abs(k)) == 2)
{
CHECK_EQUAL(ParticleStates::solution, solver->getSite(NX()/2 + i, NY()/2 + j, NZ()/2 + k)->particleState());
solver->getSite(NX()/2 + i, NY()/2 + j, NZ()/2 + k)->forEachActiveReactionDo([&nActives] (Reaction * r)
{
(void) r;
nActives++;
});
}
}
}
}
//The number of possible reactions on the level=2 rim should be 1310
CHECK_EQUAL(nReactions, nActives);
}
void testBed::testInitializationOfCrystal()
{
solver->initializeCrystal(0.3);
solver->forEachSiteDo([&] (Site * currentSite)
{
switch (currentSite->particleState())
{
case ParticleStates::solution:
//After initialization, a solution particle should not be blocked in any direction.
if (currentSite->isActive())
{
CHECK_EQUAL(0, currentSite->nNeighbors());
}
break;
case ParticleStates::surface:
CHECK_EQUAL(true, !currentSite->isActive());
CHECK_EQUAL(true, currentSite->hasNeighboring(ParticleStates::crystal, DiffusionReaction::separation()));
CHECK_EQUAL(true, currentSite->nNeighbors() > 0);
break;
case ParticleStates::crystal:
CHECK_EQUAL(true, currentSite->isActive());
default:
break;
}
});
}
void testBed::testInitialReactionSetup()
{
KMCDebugger_Init();
Site * neighbor;
uint nBlocked;
solver->forEachSiteDo([&] (Site * currentSite)
{
if (currentSite->isActive())
{
CHECK_EQUAL(ParticleStates::fixedCrystal, currentSite->particleState());
CHECK_EQUAL(0, currentSite->reactions().size());
}
else
{
nBlocked = 0;
for (uint x = 0; x < 3; ++x)
{
for (uint y = 0; y < 3; ++y)
{
for (uint z = 0; z < 3; ++z)
{
neighbor = currentSite->neighborhood(Site::nNeighborsLimit() - 1 + x,
Site::nNeighborsLimit() - 1 + y,
Site::nNeighborsLimit() - 1 + z);
if (neighbor == NULL)
{
nBlocked++;
}
}
}
}
CHECK_EQUAL(26, currentSite->reactions().size() + nBlocked);
}
});
solver->initializeCrystal(0.3);
Site::updateAffectedSites();
std::vector<Reaction*> oldReactions;
double totRate1 = 0;
solver->forEachSiteDo([&] (Site * currentSite)
{
currentSite->forEachActiveReactionDo([&] (Reaction * r)
{
KMCDebugger_AssertBool(currentSite->isActive(),
"DEACTIVE SITE SHOULD HAVE NO REACTIONS",
currentSite->info());
KMCDebugger_AssertBool(r->isAllowed(),
"REACTION NOT DEACTIVATED PROPERLY:",
r->info());
oldReactions.push_back(r);
totRate1 += r->rate();
});
});
solver->forEachSiteDo([] (Site * currentSite)
{
currentSite->forEachActiveReactionDo([] (Reaction * r)
{
r->forceUpdateFlag(Reaction::defaultUpdateFlag);
});
currentSite->calculateRates();
});
std::vector<Reaction*> reactions;
double totRate2 = 0;
solver->forEachSiteDo([&] (Site * currentSite)
{
currentSite->forEachActiveReactionDo([&] (Reaction * r)
{
reactions.push_back(r);
totRate2 += r->rate();
});
});
CHECK_CLOSE(totRate1, totRate2, 0.000000001);
CHECK_EQUAL(oldReactions.size(), reactions.size());
for (uint i = 0; i < oldReactions.size(); ++i)
{
CHECK_EQUAL(reactions.at(i), oldReactions.at(i));
}
}
void testBed::testSequential()
{
initBoundaryTestParameters();
solver->reset();
const SnapShot s0(solver);
const SnapShot & s1 = *testSequentialCore();
solver->reset();
const SnapShot & s2 = *testSequentialCore();
//ConcWall is not reset properly.
CHECK_EQUAL(s1, s2);
delete solver;
makeSolver();
initBoundaryTestParameters();
const SnapShot s00(solver);
const SnapShot & s3 = *testSequentialCore();
delete solver;
makeSolver();
initBoundaryTestParameters();
const SnapShot & s4 = *testSequentialCore();
CHECK_EQUAL(s3, s4);
CHECK_EQUAL(s0, s00);
CHECK_EQUAL(s2, s3);
}
const SnapShot * testBed::testSequentialCore()
{
uint nc = 1000;
solver->setNumberOfCycles(nc);
solver->setCyclesPerOutput(nc + 1);
solver->initializeCrystal(0.2);
solver->mainloop();
return new SnapShot(solver);
}
void testBed::initBoundaryTestParameters()
{
solver->setBoxSize({10, 10, 10}, false);
Site::resetBoundariesTo(lastBoundaries);
Site::resetNNeighborsLimitTo(3);
DiffusionReaction::resetSeparationTo(1);
Site::resetNNeighborsToCrystallizeTo(1);
solver->setRNGSeed(Seed::specific, baseSeed);
}
void testBed::initSimpleSystemParameters()
{
solver->setBoxSize({5, 5, 5}, false);
DiffusionReaction::resetSeparationTo(1);
Site::resetNNeighborsLimitTo(1);
Site::resetNNeighborsToCrystallizeTo(1);
Site::resetBoundariesTo(Boundary::Periodic);
}
void testBed::activateAllSites()
{
solver->forEachSiteDo([] (Site * currentSite)
{
if (!currentSite->isActive())
{
currentSite->activate();
}
});
}
void testBed::deactivateAllSites()
{
solver->forEachSiteDo([] (Site * currentSite)
{
if (currentSite->isActive())
{
currentSite->deactivate();
}
});
}
Site *testBed::getBoxCenter()
{
return solver->getSite(NX()/2, NY()/2, NZ()/2);
}
void testBed::testKnownCase()
{
delete solver;
Config cfg;
cfg.readFile("infiles/knowncase.cfg");
const Setting & root = cfg.getRoot();
solver = new KMCSolver(root);
Site::resetBoundariesTo(lastBoundaries);
ConcentrationWall::setMaxEventsPrCycle(15*15);
solver->initializeCrystal(getSetting<double>(root, {"Initialization", "RelativeSeedSize"}));
bool make = false;
ifstream o;
ofstream o2;
stringstream fullName;
fullName << "knowncase" << lastBoundariesName << ".txt";
if (make)
{
o2.open(fullName.str());
}
else
{
o.open("infiles/" + fullName.str());
if (!o.good())
{
cout << "NO KNOWNCASE FILE EXIST:" << "infiles/" + fullName.str() << endl;
return;
}
}
solver->mainloop();
string line;
stringstream s;
uint equal = 0;
solver->forEachSiteDo([&] (Site * site)
{
if (make)
{
o2 << site->isActive() << endl;
}
else
{
getline(o,line);
s << site->isActive();
if(s.str().compare(line) == 0)
{
equal++;
}
s.str(string());
}
});
if(make)
{
o2.close();
cout << "FILE MADE SUCCESSFULLY" << endl;
}
else
{
o.close();
CHECK_EQUAL(NX()*NY()*NZ(), equal);
}
//if we dont reset to default solver, next time sequential test is called,
//it will have mismatch in parameters such as
//temperature and saturation.
delete solver;
makeSolver();
ConcentrationWall::setMaxEventsPrCycle(3);
}
void testBed::testBoxSizes()
{
uvec N = {6, 10, 15};
Site::resetNNeighborsLimitTo(2, false);
uvec3 boxSize;
set<Site*> allSites;
uint nBlocked;
for (uint i = 0; i < N.n_elem; ++i)
{
for (uint j = 0; j < N.n_elem; ++j)
{
for (uint k = 0; k < N.n_elem; ++k)
{
uint nx = N(i);
uint ny = N(j);
uint nz = N(k);
allSites.clear();
boxSize = {nx, ny, nz};
solver->setBoxSize(boxSize);
CHECK_EQUAL(nx, NX());
CHECK_EQUAL(ny, NY());
CHECK_EQUAL(nz, NZ());
CHECK_EQUAL(nx, Boundary::NX());
CHECK_EQUAL(ny, Boundary::NY());
CHECK_EQUAL(nz, Boundary::NZ());
CHECK_EQUAL(nx, Site::NX());
CHECK_EQUAL(ny, Site::NY());
CHECK_EQUAL(nz, Site::NZ());
CHECK_EQUAL(nx, Reaction::NX());
CHECK_EQUAL(ny, Reaction::NY());
CHECK_EQUAL(nz, Reaction::NZ());
solver->forEachSiteDo([&] (Site * currentSite)
{
nBlocked = 0;
for (uint X = 0; X < Site::neighborhoodLength(); ++X)
{
for (uint Y = 0; Y < Site::neighborhoodLength(); ++Y)
{
for (uint Z = 0; Z < Site::neighborhoodLength(); ++Z)
{
if (currentSite->neighborhood(X, Y, Z) == NULL)
{
nBlocked++;
}
}
}
}
uint nNeighbors = 0;
currentSite->forEachNeighborDo([&nNeighbors] (Site * neighbor)
{
(void) neighbor;
nNeighbors++;
});
CHECK_EQUAL(pow(Site::neighborhoodLength(), 3) - 1, nNeighbors + nBlocked);
currentSite->forEachNeighborDo([&allSites] (Site * neighbor)
{
allSites.insert(neighbor);
});
});
CHECK_EQUAL(nx*ny*nz, allSites.size());
}
}
}
}
void testBed::testnNeiborsLimit()
{
set<Site*> allSites;
uvec nNlims = {1, 2, 3};
uvec3 boxSize = {10, 10, 10};
Site::resetBoundariesTo(Boundary::Periodic);
solver->setBoxSize(boxSize, false);
for (uint nNlim : nNlims)
{
allSites.clear();
Site::resetNNeighborsLimitTo(nNlim, false);
solver->forEachSiteDo([&] (Site * currentSite)
{
currentSite->forEachNeighborDo([&allSites] (Site * neighbor)
{
allSites.insert(neighbor);
});
uint nNeighbors = 0;
currentSite->forEachNeighborDo([&nNeighbors] (Site * neighbor)
{
(void) neighbor;
nNeighbors++;
});
CHECK_EQUAL(pow(2*nNlim + 1, 3) - 1, nNeighbors);
});
CHECK_EQUAL(NX()*NY()*NZ(), allSites.size());
}
}
void testBed::testnNeighborsToCrystallize()
{
uvec nntcs = {1, 2, 3, 4, 5, 6, 7};
Site * crystallizingSite;
Site * initialSeedSite = solver->getSite(NX()/2, NY()/2, NZ()/2);
Site * trialSite = solver->getSite(NX()/2 + 2, NY()/2, NZ()/2);
uint totCrystalNeighbors;
DiffusionReaction::resetSeparationTo(1);
initialSeedSite->spawnAsFixedCrystal();
trialSite->activate();
for (uint nnts : nntcs)
{
Site::resetNNeighborsToCrystallizeTo(nnts);
totCrystalNeighbors = 0;
//Fill a 3x3 surface with crystals.
for (int i = -1; i <= 1; ++i)
{
for (int j = -1; j <= 1; ++j)
{
crystallizingSite = solver->getSite(NX()/2 + 1, NY()/2 + i, NZ()/2 + j);
crystallizingSite->activate();
totCrystalNeighbors++;
CHECK_EQUAL(ParticleStates::crystal, crystallizingSite->particleState());
if (totCrystalNeighbors >= nnts)
{
CHECK_EQUAL(ParticleStates::crystal, trialSite->particleState());
}
else
{
CHECK_EQUAL(ParticleStates::solution, trialSite->particleState());
}
}
}
for (int i = -1; i <= 1; ++i)
{
for (int j = -1; j <= 1; ++j)
{
crystallizingSite = solver->getSite(NX()/2 + 1, NY()/2 + i, NZ()/2 + j);
crystallizingSite->deactivate();
totCrystalNeighbors--;
CHECK_EQUAL(ParticleStates::surface, crystallizingSite->particleState());
if (totCrystalNeighbors >= nnts)
{
CHECK_EQUAL(ParticleStates::crystal, trialSite->particleState());
}
else
{
CHECK_EQUAL(ParticleStates::solution, trialSite->particleState());
}
}
}
}
}
void testBed::testDiffusionSeparation()
{
solver->setBoxSize({15, 15, 15}, false);
Site * neighbor;
Site * destination;
Site * origin = solver->getSite(NX()/2, NY()/2, NZ()/2);
origin->activate();
uvec separations = {0, 1, 2, 3, 4, 5};
for (uint sep : separations)
{
Site::resetNNeighborsLimitTo(sep + 1);
DiffusionReaction::resetSeparationTo(sep);
for (uint i = 1; i <= sep + 2; ++i)
{
neighbor = solver->getSite(NX()/2 + i, NY()/2, NZ()/2);
bool allowed = neighbor->isLegalToSpawn();
//sites only allowed to spawn if no reactions are blocked.
//reaction blocked for up to sep + 1
CHECK_EQUAL(!allowed, i <= sep + 1);
if (i == sep + 2)
{
neighbor->activate();
CHECK_EQUAL(neighbor->nActiveReactions(), neighbor->reactions().size());
neighbor->deactivate();
destination = solver->getSite(NX()/2 + sep + 1, NY()/2, NZ()/2);
destination->activate();
if (sep == 0)
{
CHECK_EQUAL(25, destination->nActiveReactions());
}
else
{
CHECK_EQUAL(17, destination->nActiveReactions());
destination->deactivate();
destination = solver->getSite(NX()/2 + sep, NY()/2, NZ()/2);
destination->activate();
CHECK_EQUAL(9, destination->nActiveReactions());
if (sep > 1)
{
destination->deactivate();
destination = solver->getSite(NX()/2 + sep - 1, NY()/2, NZ()/2);
destination->activate();
CHECK_EQUAL(0, destination->nActiveReactions());
}
}
destination->deactivate();
}
}
}
DiffusionReaction::resetSeparationTo(1);
}
void testBed::initBoundarySuite(const umat & boundaries)
{
uint sum = accu(boundaries);
string name = "";
switch (sum)
{
case 6*Boundary::Periodic:
name = "Periodic";
break;
case 6*Boundary::Edge:
name = "Edge";
break;
case 6*Boundary::Surface:
name = "Surface";
break;
case 6*Boundary::ConcentrationWall:
name = "ConcentrationWall";
break;
default:
name = "Mixed";
break;
}
baseSeed = Seed::initialSeed;
lastBoundaries = boundaries;
lastBoundariesName = name;
initBoundaryTestParameters();
}
KMCSolver * testBed::solver;
wall_clock testBed::timer;
seed_type testBed::baseSeed;
string testBed::lastBoundariesName;
umat testBed::lastBoundaries;
| [
"[email protected]"
] | |
918cf91b919199aefc6db8159938b5ac1b4e1480 | 7d511ac84d7b3ad588e93dfac7623161fd5e5b87 | /Lab.9/Vector.Processing/Vector.Processing/Temp.holding/main.cpp | 4c00dcf9f133076c06ac917df22e730078c28e58 | [] | no_license | Doom4535/CPTR.124.W14.Labs | b9b0ff2004ea7c0376d878b8974e39cb3f055b42 | 5fbb29c9d3b32cc515be123b895c35c6f093577d | refs/heads/master | 2021-01-21T11:45:29.258583 | 2014-04-27T03:24:39 | 2014-04-27T03:24:39 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 287 | cpp | //
// main.cpp
// Vector.Processing
//
// Created by Aaron Covrig on 3/26/14.
// Copyright (c) 2014 Aaron Covrig. All rights reserved.
//
#include <iostream>
int main(int argc, const char * argv[])
{
// insert code here...
std::cout << "Hello, World!\n";
return 0;
}
| [
"[email protected]"
] | |
f7b869a3fc4f5d1b7246c6657583168d27897ec7 | ac45b07ce1f5564e1ee5adef3fa2caefdbd34ebe | /testCode/Sensors/DeadReckoning/NavX.h | 2dd7a1cf11dadf85abcff63bb5aa0cc1e9cb084a | [
"MIT"
] | permissive | GOFIRST-Robotics/NASA-RMC-2018 | 2f8efd5f4a0f518fbb9bbe24c09b06b5aa69a4fc | b86b1a2f30b18c5ff87910d96f1cd3e83ddef0ee | refs/heads/master | 2021-09-27T04:22:50.748424 | 2018-05-16T20:35:37 | 2018-05-16T20:35:37 | 124,420,312 | 0 | 1 | null | null | null | null | UTF-8 | C++ | false | false | 3,307 | h | #ifndef NAVX_H
#define NAVX_H
//NavX.h
//VERSION 1.0.0
/*
NavX is used to bring together the useful aspects of the AHRS library for NASA
RMC.
NOTE: NO functions use magnetometer functionality
*/
#include "AHRS.h"
// Define either MADGWICK or MAHONY as IMU filters
#define MADGWICK
class NavX {
public:
NavX(std::string serial_port_id);
NavX(std::string serial_port_id, AHRS::SerialDataType data_type, uint8_t update_rate_hz);
//State
//detects X,Y accel; returns true
bool IsMoving();
//detects Yaw; returns true
bool IsRotating();
//detects recent communication between the computer and sensor;
//returns true
bool IsConnected();
//Closes the connection from navX to computer
void Close();
//Returns sensor timestamp according to the last recieved sample
//from the sensor (Only works with SPI, I2C not TTL, UART, USB)
long GetLastSensorTimestamp();
/*---Linear Functions---*/
//Velocities
//(m/s), data may be unreliable
float GetVelocityX();
float GetVelocityY();
float GetVelocityZ();
//Displacements
//(m), may be unreliable
float GetDisplacementX();
float GetDisplacementY();
float GetDisplacementZ();
//Accelerations
float GetWorldLinearAccelX();
float GetWorldLinearAccelY();
float GetWorldLinearAccelZ();
/*---Rotational Functions---*/
//Yaw, Pitch & Roll
//Gives Yaw angle from -180 to 180 (deg)
float GetYaw();
float GetPitch();
float GetRoll();
//Quaternions
//Imaginary Component W
float GetQuaternionW();
//Real Components X, Y, Z
float GetQuaternionX();
float GetQuaternionY();
float GetQuaternionZ();
//Accumulated Yaw (deg)
double GetAngle();
//Rate of Yaw (deg/s)
double GetRate();
//Resets the axis to zero (Recalibration)
void Reset();
//resets displacement variables to zero
void ResetDisplacement();
//function to be invoked each time new lin accel values received
//(may not be needed)
void UpdateDisplacement( float accel_x_g, float accel_y_g,
int update_rate_hz, bool is_moving );
//Troubleshooting
//Returns number of bytes sent from sensor
//Combined withGetUpdateCount() if UpdateCount isnt rising with ByteCount
//Connectivity Issues are likely
double GetByteCount();
//Returns number of valid updates recieved by sensor
double GetUpdateCount();
/*---Native Functions That Are Not Implemented---*/
//Why? Because the above functions are processed
//Raw values are unprocessed aka gravity isnt
//accounted for and hasnt been rotated to match
//the startup calibration; in G's
float GetRawAccelX();
float GetRawAccelY();
float GetRawAccelZ();
//Raw values are unprocessed and have not been smoothed by calibration
//and integration techniques; in (deg/s)
float GetRawGyroX();
float GetRawGyroY();
float GetRawGyroZ();
//Returns true if the navX is calibrating its virtual world
bool IsCalibrating();
//Sets the offset to be subtracted from GetYaw()
//Function "Reset()" simply calls this function
void ZeroYaw();
};
#endif
| [
"[email protected]"
] | |
bbe60ae8d3c04153289d4b0832d38a05facd7d1d | 7eb3c9c9be98c9bb39e0edbc96c80dff194d0e46 | /src/jumpgame.cpp | 35b2aa19d92a1cb771ce176493afb10462dd009a | [] | no_license | zhounan354/wechat_jump | f6fe689d5ab5feffb0e03b66b2c3aeab2d384a5c | 6fa3c97ee0071b2c45a462284486782e584eaea5 | refs/heads/master | 2022-11-04T23:43:59.742856 | 2020-06-17T11:16:04 | 2020-06-17T11:16:04 | 116,106,905 | 1 | 0 | null | null | null | null | GB18030 | C++ | false | false | 9,680 | cpp | #include "jumpgame.h"
jumpgame::jumpgame(QWidget *parent)
: QMainWindow(parent)
{
ui.setupUi(this);
resize(QSize(300, 200));
QSize szMin(20, 20);
QSize szMid(60, 25);
ui.mainToolBar->setVisible(false);
setWindowIcon(QIcon(":/jumpgame/jump"));
setWindowTitle("jump");
m_layoutOption = new QVBoxLayout();
m_layoutParam = new QVBoxLayout();
//窗体设置
m_layoutWinPos = new QHBoxLayout();
m_buttonWinPos = new QPushButton(QStringLiteral("设置窗体"));
m_buttonWinPos->setFixedSize(szMid);
for (int i = 0; i < 4; i++)
{
m_labelWinPos[i] = new QLabel();
m_editWinPos[i] = new QLineEdit();
m_layoutWinPos->addWidget(m_labelWinPos[i]);
m_layoutWinPos->addWidget(m_editWinPos[i]);
}
m_labelWinPos[0]->setText("L-x:");
m_labelWinPos[1]->setText("L-y:");
m_labelWinPos[2]->setText("R-x:");
m_labelWinPos[3]->setText("R-y:");
m_layoutOption->addWidget(m_buttonWinPos);
m_layoutParam->addItem(m_layoutWinPos);
//步长设置
m_editStep = new QLineEdit();
m_editStep->setMaximumWidth(100);
m_labelStep = new QLabel(QStringLiteral("设置步长"));
//阈值变化设置
m_layoutGate = new QHBoxLayout();
m_editGate = new QLineEdit();
m_buttonGate = new QPushButton(QStringLiteral("设置阈值"));
m_buttonGate->setFixedSize(szMid);
m_buttonGateAdd = new QPushButton("+");
m_buttonGateReduce = new QPushButton("-");
m_buttonGateReduce->setFixedSize(szMin);
m_buttonGateAdd->setFixedSize(szMin);
m_layoutOption->addWidget(m_buttonGate);
m_layoutGate->addWidget(m_buttonGateAdd);
m_layoutGate->addWidget(m_buttonGateReduce);
m_layoutGate->addWidget(m_editGate);
m_layoutGate->addWidget(m_labelStep);
m_layoutGate->addWidget(m_editStep);
m_layoutParam->addItem(m_layoutGate);
//设置时间因子
m_layoutFactor = new QHBoxLayout();
m_editFactor = new QLineEdit();
m_buttonFactor = new QPushButton(QStringLiteral("设置距离"));
m_buttonFactor->setFixedSize(szMid);
m_buttonFactorAdd = new QPushButton("+");
m_buttonFactorReduce = new QPushButton("-");
m_buttonFactorReduce->setFixedSize(szMin);
m_buttonFactorAdd->setFixedSize(szMin);
m_layoutOption->addWidget(m_buttonFactor);
m_layoutFactor->addWidget(m_buttonFactorAdd);
m_layoutFactor->addWidget(m_buttonFactorReduce);
m_layoutFactor->addWidget(m_editFactor);
m_layoutParam->addItem(m_layoutFactor);
//设置游戏速度
m_layoutSpeed = new QHBoxLayout();
m_editSpeed = new QLineEdit();
m_buttonSpeed = new QPushButton(QStringLiteral("设置速度"));
m_buttonSpeed->setFixedSize(szMid);
m_buttonSpeedAdd = new QPushButton("+");
m_buttonSpeedReduce = new QPushButton("-");
m_buttonSpeedReduce->setFixedSize(szMin);
m_buttonSpeedAdd->setFixedSize(szMin);
m_layoutOption->addWidget(m_buttonSpeed);
m_layoutSpeed->addWidget(m_buttonSpeedAdd);
m_layoutSpeed->addWidget(m_buttonSpeedReduce);
m_layoutSpeed->addWidget(m_editSpeed);
m_layoutParam->addItem(m_layoutSpeed);
//控制按钮
m_layoutControl = new QHBoxLayout();
m_buttonStart = new QPushButton(QStringLiteral("开始"));
m_buttonStop = new QPushButton(QStringLiteral("停止"));
m_buttonDebug = new QPushButton(QStringLiteral("调试"));
m_buttonStart->setFixedSize(QSize(60, 30));
m_buttonStop->setFixedSize(QSize(60, 30));
m_buttonDebug->setFixedSize(QSize(60, 30));
m_layoutControl->addWidget(m_buttonStart);
m_layoutControl->addWidget(m_buttonStop);
m_layoutControl->addWidget(m_buttonDebug);
//主布局
m_layoutContent = new QHBoxLayout();
m_layoutContent->addItem(m_layoutOption);
m_layoutContent->addItem(m_layoutParam);
mainLayout = new QVBoxLayout();
mainLayout->addItem(m_layoutContent);
mainLayout->addItem(m_layoutControl);
ui.centralWidget->setLayout(mainLayout);
m_layoutOption->setMargin(10);
m_layoutOption->setSpacing(10);
m_layoutParam->setMargin(10);
m_layoutContent->setMargin(10);
m_layoutParam->setSpacing(10);
jumpManger = new CJumpManger();
initInfo();
connect(m_buttonWinPos, &QPushButton::clicked, this, &jumpgame::setWindow);
connect(m_buttonDebug, &QPushButton::clicked, this, &jumpgame::changeMod);
connect(m_buttonFactor, &QPushButton::clicked, this, &jumpgame::modTimeFactor);
connect(m_buttonFactorAdd, &QPushButton::clicked, this, [this]{
int iFactor = m_editFactor->text().toInt();
iFactor++;
m_editFactor->setText(QString("%1").arg(iFactor));
modTimeFactor();
});
connect(m_buttonFactorReduce, &QPushButton::clicked, this, [this]{
int iFactor = m_editFactor->text().toInt();
iFactor--;
m_editFactor->setText(QString("%1").arg(iFactor));
modTimeFactor();
});
connect(m_buttonGate, &QPushButton::clicked, this, &jumpgame::modSrcRecGate);
connect(m_buttonGateAdd, &QPushButton::clicked, this, [this]{
m_iStep = m_editStep->text().toInt();
int iGate = m_editGate->text().toInt();
iGate += m_iStep;
m_editGate->setText(QString("%1").arg(iGate));
modSrcRecGate();
});
connect(m_buttonGateReduce, &QPushButton::clicked, this, [this]{
m_iStep = m_editStep->text().toInt();
int iGate = m_editGate->text().toInt();
iGate -= m_iStep;
m_editGate->setText(QString("%1").arg(iGate));
modSrcRecGate();
});
connect(m_buttonSpeed, &QPushButton::clicked, this, &jumpgame::setRestTime);
connect(m_buttonSpeedAdd, &QPushButton::clicked, this, [this]{
int iSleepTime = m_editSpeed->text().toInt();
iSleepTime++;
m_editSpeed->setText(QString("%1").arg(iSleepTime));
setRestTime();
});
connect(m_buttonSpeedReduce, &QPushButton::clicked, this, [this]{
int iSleepTime = m_editSpeed->text().toInt();
iSleepTime--;
m_editSpeed->setText(QString("%1").arg(iSleepTime));
setRestTime();
});
connect(m_buttonStart, &QPushButton::clicked, this, &jumpgame::workStart);
connect(m_buttonStop, &QPushButton::clicked, this, &jumpgame::workStop);
}
jumpgame::~jumpgame()
{
}
void jumpgame::getTime()
{
jumpManger->SetTime();
}
void jumpgame::setWindow()
{
xTop = m_editWinPos[0]->text().toInt();
yTop = m_editWinPos[1]->text().toInt();
xBottom = m_editWinPos[2]->text().toInt();
yBottom = m_editWinPos[3]->text().toInt();
jumpManger->setPicWindow(xTop, yTop, xBottom, yBottom);
saveInfo();
}
void jumpgame::initInfo()
{
//初始状态不运行
m_workFlag = true;
fstream file;
string strTemp;
file.open("para.ini");
while (!file.is_open())
{
file.open("para.ini", ios::out);
file << "20 150 300 400 52 5 157 34" << endl;
file.close();
file.open("para.ini");
}
vector<string> vecParam;
getline(file, strTemp);
split(strTemp.c_str(), ' ', vecParam);
m_editWinPos[0]->setText(vecParam[0].c_str());
m_editWinPos[1]->setText(vecParam[1].c_str());
m_editWinPos[2]->setText(vecParam[2].c_str());
m_editWinPos[3]->setText(vecParam[3].c_str());
m_editGate->setText(vecParam[4].c_str());
m_editStep->setText(vecParam[5].c_str());
m_editFactor->setText(vecParam[6].c_str());
m_editSpeed->setText(vecParam[7].c_str());
file.close();
m_iSleepTime = m_editSpeed->text().toInt();
m_iStep = m_editStep->text().toInt();
setWindow();
setRestTime();
modSrcRecGate();
modTimeFactor();
}
void jumpgame::saveInfo()
{
vector<string> vecParam;
vecParam.push_back(m_editWinPos[0]->text().toStdString());
vecParam.push_back(m_editWinPos[1]->text().toStdString());
vecParam.push_back(m_editWinPos[2]->text().toStdString());
vecParam.push_back(m_editWinPos[3]->text().toStdString());
vecParam.push_back(m_editGate->text().toStdString());
vecParam.push_back(m_editStep->text().toStdString());
vecParam.push_back(m_editFactor->text().toStdString());
vecParam.push_back(m_editSpeed->text().toStdString());
fstream file;
file.open("para.ini", ios::out);
for (int i = 0; i < vecParam.size(); i++)
{
file << vecParam[i] << " ";
}
file << endl;
file.close();
}
void jumpgame::split(const char* srclist, const char spl, vector<string> &vecDes)
{
int p = 0;
int q = 0;
char id[300] = { 0 };
string strTemp;
if (strlen(srclist) == 0)
{
// printf("functionlist is empty!\n");
vecDes.push_back("");
return;
}
while (srclist[p] != '\0')
{
if (srclist[p] != spl)
{
id[q] = srclist[p];
q++;
}
else
{
id[q] = '\0';
q = 0;
strTemp = id;
vecDes.push_back(strTemp);
}
p++;
}
if (q != 0)
{
id[q] = '\0';
strTemp = id;
vecDes.push_back(strTemp);
}
}
void jumpgame::changeMod()
{
jumpManger->ChangeDebugMode();
if (jumpManger->GetDegubMode())
m_buttonDebug->setText(QStringLiteral("调试"));
else
m_buttonDebug->setText("go");
}
void jumpgame::modTimeFactor()
{
int iFactor = m_editFactor->text().toInt();
jumpManger->setFactor(iFactor);
saveInfo();
}
void jumpgame::modSrcRecGate()
{
int iGate = m_editGate->text().toInt();
jumpManger->setSrcGate(iGate);
saveInfo();
}
void jumpgame::setRestTime()
{
m_iSleepTime = m_editSpeed->text().toInt();
saveInfo();
}
void jumpgame::workThread()
{
int iClickTime;
POINT pt1;
POINT pt2;
while (true)
{
pt1.x = xTop / 2 + xBottom / 2;
pt1.y = yTop / 2 + yBottom / 2;
iClickTime = jumpManger->SetTime();
if (iClickTime ==0)
continue;
//cout << "test" << endl;
GetCursorPos(&pt2);
ShowCursor(false);
SetCursorPos(pt1.x, pt1.y);
mouse_event(MOUSEEVENTF_ABSOLUTE | MOUSEEVENTF_LEFTDOWN, 200, 500, 0, 0);
SetCursorPos(pt2.x, pt2.y);
ShowCursor(true);
Sleep(iClickTime);
GetCursorPos(&pt2);
ShowCursor(false);
SetCursorPos(pt1.x, pt1.y);
mouse_event(MOUSEEVENTF_ABSOLUTE | MOUSEEVENTF_LEFTUP, 200, 500, 0, 0);
SetCursorPos(pt2.x, pt2.y);
ShowCursor(true);
Sleep(m_iSleepTime*100);
if (!m_workFlag)
return;
}
}
void jumpgame::workStart()
{
m_workFlag = true;
m_tid = new std::thread(&jumpgame::workThread, this);
//m_tid->join();
}
void jumpgame::workStop()
{
m_workFlag = false;
}
| [
"[email protected]"
] | |
985a654c79c9b7c2a6f0973a2a85e4e83ce8eb6f | 67f988dedfd8ae049d982d1a8213bb83233d90de | /external/chromium/chrome/browser/safe_browsing/safe_browsing_test.cc | cad82627a22671b0288330a633cc8130d67fa330 | [
"BSD-3-Clause"
] | permissive | opensourceyouthprogramming/h5vcc | 94a668a9384cc3096a365396b5e4d1d3e02aacc4 | d55d074539ba4555e69e9b9a41e5deb9b9d26c5b | refs/heads/master | 2020-04-20T04:57:47.419922 | 2019-02-12T00:56:14 | 2019-02-12T00:56:14 | 168,643,719 | 1 | 1 | null | 2019-02-12T00:49:49 | 2019-02-01T04:47:32 | C++ | UTF-8 | C++ | false | false | 19,320 | cc | // Copyright (c) 2012 The Chromium Authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
//
// This test uses the safebrowsing test server published at
// http://code.google.com/p/google-safe-browsing/ to test the safebrowsing
// protocol implemetation. Details of the safebrowsing testing flow is
// documented at
// http://code.google.com/p/google-safe-browsing/wiki/ProtocolTesting
//
// This test launches safebrowsing test server and issues several update
// requests against that server. Each update would get different data and after
// each update, the test will get a list of URLs from the test server to verify
// its repository. The test will succeed only if all updates are performed and
// URLs match what the server expected.
#include <vector>
#include "base/bind.h"
#include "base/command_line.h"
#include "base/environment.h"
#include "base/path_service.h"
#include "base/process_util.h"
#include "base/string_number_conversions.h"
#include "base/string_split.h"
#include "base/stringprintf.h"
#include "base/synchronization/lock.h"
#include "base/test/test_timeouts.h"
#include "base/threading/platform_thread.h"
#include "base/threading/thread.h"
#include "base/time.h"
#include "base/utf_string_conversions.h"
#include "chrome/browser/browser_process.h"
#include "chrome/browser/profiles/profile.h"
#include "chrome/browser/safe_browsing/database_manager.h"
#include "chrome/browser/safe_browsing/local_safebrowsing_test_server.h"
#include "chrome/browser/safe_browsing/protocol_manager.h"
#include "chrome/browser/safe_browsing/safe_browsing_service.h"
#include "chrome/browser/ui/browser.h"
#include "chrome/common/chrome_notification_types.h"
#include "chrome/common/chrome_switches.h"
#include "chrome/common/url_constants.h"
#include "chrome/test/base/in_process_browser_test.h"
#include "chrome/test/base/ui_test_utils.h"
#include "content/public/browser/browser_context.h"
#include "content/public/test/test_browser_thread.h"
#include "net/base/host_resolver.h"
#include "net/base/load_flags.h"
#include "net/base/net_log.h"
#include "net/test/python_utils.h"
#include "net/url_request/url_fetcher.h"
#include "net/url_request/url_fetcher_delegate.h"
#include "net/url_request/url_request_status.h"
#include "testing/gtest/include/gtest/gtest.h"
using content::BrowserThread;
namespace {
const FilePath::CharType kDataFile[] =
FILE_PATH_LITERAL("testing_input_nomac.dat");
const char kUrlVerifyPath[] = "safebrowsing/verify_urls";
const char kDBVerifyPath[] = "safebrowsing/verify_database";
const char kTestCompletePath[] = "test_complete";
struct PhishingUrl {
std::string url;
std::string list_name;
bool is_phishing;
};
// Parses server response for verify_urls. The expected format is:
//
// first.random.url.com/ internal-test-shavar yes
// second.random.url.com/ internal-test-shavar yes
// ...
bool ParsePhishingUrls(const std::string& data,
std::vector<PhishingUrl>* phishing_urls) {
if (data.empty())
return false;
std::vector<std::string> urls;
base::SplitString(data, '\n', &urls);
for (size_t i = 0; i < urls.size(); ++i) {
if (urls[i].empty())
continue;
PhishingUrl phishing_url;
std::vector<std::string> record_parts;
base::SplitString(urls[i], '\t', &record_parts);
if (record_parts.size() != 3) {
LOG(ERROR) << "Unexpected URL format in phishing URL list: "
<< urls[i];
return false;
}
phishing_url.url = std::string(chrome::kHttpScheme) +
"://" + record_parts[0];
phishing_url.list_name = record_parts[1];
if (record_parts[2] == "yes") {
phishing_url.is_phishing = true;
} else if (record_parts[2] == "no") {
phishing_url.is_phishing = false;
} else {
LOG(ERROR) << "Unrecognized expectation in " << urls[i]
<< ": " << record_parts[2];
return false;
}
phishing_urls->push_back(phishing_url);
}
return true;
}
} // namespace
// This starts the browser and keeps status of states related to SafeBrowsing.
class SafeBrowsingServerTest : public InProcessBrowserTest {
public:
SafeBrowsingServerTest()
: safe_browsing_service_(NULL),
is_database_ready_(true),
is_update_scheduled_(false),
is_checked_url_in_db_(false),
is_checked_url_safe_(false) {
}
virtual ~SafeBrowsingServerTest() {
}
void UpdateSafeBrowsingStatus() {
ASSERT_TRUE(safe_browsing_service_);
base::AutoLock lock(update_status_mutex_);
last_update_ = safe_browsing_service_->protocol_manager_->last_update();
is_update_scheduled_ =
safe_browsing_service_->protocol_manager_->update_timer_.IsRunning();
}
void ForceUpdate() {
content::WindowedNotificationObserver observer(
chrome::NOTIFICATION_SAFE_BROWSING_UPDATE_COMPLETE,
content::Source<SafeBrowsingDatabaseManager>(database_manager()));
BrowserThread::PostTask(BrowserThread::IO, FROM_HERE,
base::Bind(&SafeBrowsingServerTest::ForceUpdateOnIOThread,
this));
observer.Wait();
}
void ForceUpdateOnIOThread() {
EXPECT_TRUE(BrowserThread::CurrentlyOn(BrowserThread::IO));
ASSERT_TRUE(safe_browsing_service_);
safe_browsing_service_->protocol_manager_->ForceScheduleNextUpdate(
base::TimeDelta::FromSeconds(0));
}
void CheckIsDatabaseReady() {
base::AutoLock lock(update_status_mutex_);
is_database_ready_ = !database_manager()->database_update_in_progress_;
}
void CheckUrl(SafeBrowsingDatabaseManager::Client* helper, const GURL& url) {
ASSERT_TRUE(safe_browsing_service_);
base::AutoLock lock(update_status_mutex_);
if (database_manager()->CheckBrowseUrl(url, helper)) {
is_checked_url_in_db_ = false;
is_checked_url_safe_ = true;
} else {
// In this case, Safebrowsing service will fetch the full hash
// from the server and examine that. Once it is done,
// set_is_checked_url_safe() will be called via callback.
is_checked_url_in_db_ = true;
}
}
SafeBrowsingDatabaseManager* database_manager() {
return safe_browsing_service_->database_manager();
}
bool is_checked_url_in_db() {
base::AutoLock l(update_status_mutex_);
return is_checked_url_in_db_;
}
void set_is_checked_url_safe(bool safe) {
base::AutoLock l(update_status_mutex_);
is_checked_url_safe_ = safe;
}
bool is_checked_url_safe() {
base::AutoLock l(update_status_mutex_);
return is_checked_url_safe_;
}
bool is_database_ready() {
base::AutoLock l(update_status_mutex_);
return is_database_ready_;
}
base::Time last_update() {
base::AutoLock l(update_status_mutex_);
return last_update_;
}
bool is_update_scheduled() {
base::AutoLock l(update_status_mutex_);
return is_update_scheduled_;
}
MessageLoop* SafeBrowsingMessageLoop() {
return database_manager()->safe_browsing_thread_->message_loop();
}
const net::TestServer& test_server() const {
return *test_server_;
}
protected:
bool InitSafeBrowsingService() {
safe_browsing_service_ = g_browser_process->safe_browsing_service();
return safe_browsing_service_ != NULL;
}
virtual void SetUpCommandLine(CommandLine* command_line) OVERRIDE {
FilePath datafile_path;
ASSERT_TRUE(PathService::Get(base::DIR_SOURCE_ROOT, &datafile_path));
datafile_path = datafile_path.Append(FILE_PATH_LITERAL("third_party"))
.Append(FILE_PATH_LITERAL("safe_browsing"))
.Append(FILE_PATH_LITERAL("testing"))
.Append(kDataFile);
test_server_.reset(new LocalSafeBrowsingTestServer(datafile_path));
ASSERT_TRUE(test_server_->Start());
LOG(INFO) << "server is " << test_server_->host_port_pair().ToString();
// Makes sure the auto update is not triggered. This test will force the
// update when needed.
command_line->AppendSwitch(switches::kSbDisableAutoUpdate);
// This test uses loopback. No need to use IPv6 especially it makes
// local requests slow on Windows trybot when ipv6 local address [::1]
// is not setup.
command_line->AppendSwitch(switches::kDisableIPv6);
// TODO(lzheng): The test server does not understand download related
// requests. We need to fix the server.
command_line->AppendSwitch(switches::kSbDisableDownloadProtection);
// TODO(gcasto): Generate new testing data that includes the
// client-side phishing whitelist.
command_line->AppendSwitch(
switches::kDisableClientSidePhishingDetection);
// Point to the testing server for all SafeBrowsing requests.
std::string url_prefix = test_server_->GetURL("safebrowsing").spec();
command_line->AppendSwitchASCII(switches::kSbURLPrefix, url_prefix);
}
void SetTestStep(int step) {
std::string test_step = base::StringPrintf("test_step=%d", step);
safe_browsing_service_->protocol_manager_->set_additional_query(test_step);
}
private:
SafeBrowsingService* safe_browsing_service_;
scoped_ptr<net::TestServer> test_server_;
// Protects all variables below since they are read on UI thread
// but updated on IO thread or safebrowsing thread.
base::Lock update_status_mutex_;
// States associated with safebrowsing service updates.
bool is_database_ready_;
base::Time last_update_;
bool is_update_scheduled_;
// Indicates if there is a match between a URL's prefix and safebrowsing
// database (thus potentially it is a phishing URL).
bool is_checked_url_in_db_;
// True if last verified URL is not a phishing URL and thus it is safe.
bool is_checked_url_safe_;
DISALLOW_COPY_AND_ASSIGN(SafeBrowsingServerTest);
};
// A ref counted helper class that handles callbacks between IO thread and UI
// thread.
class SafeBrowsingServerTestHelper
: public base::RefCountedThreadSafe<SafeBrowsingServerTestHelper>,
public SafeBrowsingDatabaseManager::Client,
public net::URLFetcherDelegate {
public:
SafeBrowsingServerTestHelper(SafeBrowsingServerTest* safe_browsing_test,
net::URLRequestContextGetter* request_context)
: safe_browsing_test_(safe_browsing_test),
response_status_(net::URLRequestStatus::FAILED),
request_context_(request_context) {
}
// Callbacks for SafeBrowsingDatabaseManager::Client.
virtual void OnCheckBrowseUrlResult(const GURL& url,
SBThreatType threat_type) OVERRIDE {
EXPECT_TRUE(BrowserThread::CurrentlyOn(BrowserThread::IO));
EXPECT_TRUE(safe_browsing_test_->is_checked_url_in_db());
safe_browsing_test_->set_is_checked_url_safe(
threat_type == SB_THREAT_TYPE_SAFE);
BrowserThread::PostTask(BrowserThread::UI, FROM_HERE,
base::Bind(&SafeBrowsingServerTestHelper::OnCheckUrlDone, this));
}
virtual void OnBlockingPageComplete(bool proceed) {
NOTREACHED() << "Not implemented.";
}
// Functions and callbacks related to CheckUrl. These are used to verify
// phishing URLs.
void CheckUrl(const GURL& url) {
BrowserThread::PostTask(BrowserThread::IO, FROM_HERE,
base::Bind(&SafeBrowsingServerTestHelper::CheckUrlOnIOThread,
this, url));
content::RunMessageLoop();
}
void CheckUrlOnIOThread(const GURL& url) {
EXPECT_TRUE(BrowserThread::CurrentlyOn(BrowserThread::IO));
safe_browsing_test_->CheckUrl(this, url);
if (!safe_browsing_test_->is_checked_url_in_db()) {
// Ends the checking since this URL's prefix is not in database.
BrowserThread::PostTask(BrowserThread::UI, FROM_HERE,
base::Bind(&SafeBrowsingServerTestHelper::OnCheckUrlDone, this));
}
// Otherwise, OnCheckUrlDone is called in OnUrlCheckResult since
// safebrowsing service further fetches hashes from safebrowsing server.
}
void OnCheckUrlDone() {
StopUILoop();
}
// Updates status from IO Thread.
void CheckStatusOnIOThread() {
EXPECT_TRUE(BrowserThread::CurrentlyOn(BrowserThread::IO));
safe_browsing_test_->UpdateSafeBrowsingStatus();
safe_browsing_test_->SafeBrowsingMessageLoop()->PostTask(FROM_HERE,
base::Bind(&SafeBrowsingServerTestHelper::CheckIsDatabaseReady, this));
}
// Checks status in SafeBrowsing Thread.
void CheckIsDatabaseReady() {
EXPECT_EQ(MessageLoop::current(),
safe_browsing_test_->SafeBrowsingMessageLoop());
safe_browsing_test_->CheckIsDatabaseReady();
BrowserThread::PostTask(BrowserThread::UI, FROM_HERE,
base::Bind(&SafeBrowsingServerTestHelper::OnWaitForStatusUpdateDone,
this));
}
void OnWaitForStatusUpdateDone() {
StopUILoop();
}
// Update safebrowsing status.
void UpdateStatus() {
BrowserThread::PostTask(
BrowserThread::IO,
FROM_HERE,
base::Bind(&SafeBrowsingServerTestHelper::CheckStatusOnIOThread, this));
// Will continue after OnWaitForStatusUpdateDone().
content::RunMessageLoop();
}
// Calls test server to fetch database for verification.
net::URLRequestStatus::Status FetchDBToVerify(
const net::TestServer& test_server,
int test_step) {
// TODO(lzheng): Remove chunk_type=add once it is not needed by the server.
std::string path = base::StringPrintf(
"%s?client=chromium&appver=1.0&pver=2.2&test_step=%d&chunk_type=add",
kDBVerifyPath, test_step);
return FetchUrl(test_server.GetURL(path));
}
// Calls test server to fetch URLs for verification.
net::URLRequestStatus::Status FetchUrlsToVerify(
const net::TestServer& test_server,
int test_step) {
std::string path = base::StringPrintf(
"%s?client=chromium&appver=1.0&pver=2.2&test_step=%d",
kUrlVerifyPath, test_step);
return FetchUrl(test_server.GetURL(path));
}
// Calls test server to check if test data is done. E.g.: if there is a
// bad URL that server expects test to fetch full hash but the test didn't,
// this verification will fail.
net::URLRequestStatus::Status VerifyTestComplete(
const net::TestServer& test_server,
int test_step) {
std::string path = base::StringPrintf(
"%s?test_step=%d", kTestCompletePath, test_step);
return FetchUrl(test_server.GetURL(path));
}
// Callback for URLFetcher.
virtual void OnURLFetchComplete(const net::URLFetcher* source) {
source->GetResponseAsString(&response_data_);
response_status_ = source->GetStatus().status();
StopUILoop();
}
const std::string& response_data() {
return response_data_;
}
private:
friend class base::RefCountedThreadSafe<SafeBrowsingServerTestHelper>;
virtual ~SafeBrowsingServerTestHelper() {}
// Stops UI loop after desired status is updated.
void StopUILoop() {
EXPECT_TRUE(BrowserThread::CurrentlyOn(BrowserThread::UI));
MessageLoopForUI::current()->Quit();
}
// Fetch a URL. If message_loop_started is true, starts the message loop
// so the caller could wait till OnURLFetchComplete is called.
net::URLRequestStatus::Status FetchUrl(const GURL& url) {
url_fetcher_.reset(net::URLFetcher::Create(
url, net::URLFetcher::GET, this));
url_fetcher_->SetLoadFlags(net::LOAD_DISABLE_CACHE);
url_fetcher_->SetRequestContext(request_context_);
url_fetcher_->Start();
content::RunMessageLoop();
return response_status_;
}
base::OneShotTimer<SafeBrowsingServerTestHelper> check_update_timer_;
SafeBrowsingServerTest* safe_browsing_test_;
scoped_ptr<net::URLFetcher> url_fetcher_;
std::string response_data_;
net::URLRequestStatus::Status response_status_;
net::URLRequestContextGetter* request_context_;
DISALLOW_COPY_AND_ASSIGN(SafeBrowsingServerTestHelper);
};
IN_PROC_BROWSER_TEST_F(SafeBrowsingServerTest,
SafeBrowsingServerTest) {
LOG(INFO) << "Start test";
ASSERT_TRUE(InitSafeBrowsingService());
net::URLRequestContextGetter* request_context =
browser()->profile()->GetRequestContext();
scoped_refptr<SafeBrowsingServerTestHelper> safe_browsing_helper(
new SafeBrowsingServerTestHelper(this, request_context));
int last_step = 0;
// Waits and makes sure safebrowsing update is not happening.
// The wait will stop once OnWaitForStatusUpdateDone in
// safe_browsing_helper is called and status from safe_browsing_service_
// is checked.
safe_browsing_helper->UpdateStatus();
EXPECT_TRUE(is_database_ready());
EXPECT_FALSE(is_update_scheduled());
EXPECT_TRUE(last_update().is_null());
// Starts updates. After each update, the test will fetch a list of URLs with
// expected results to verify with safebrowsing service. If there is no error,
// the test moves on to the next step to get more update chunks.
// This repeats till there is no update data.
for (int step = 1;; step++) {
// Every step should be a fresh start.
SCOPED_TRACE(base::StringPrintf("step=%d", step));
EXPECT_TRUE(is_database_ready());
EXPECT_FALSE(is_update_scheduled());
// Starts safebrowsing update on IO thread. Waits till scheduled
// update finishes.
base::Time now = base::Time::Now();
SetTestStep(step);
ForceUpdate();
safe_browsing_helper->UpdateStatus();
EXPECT_TRUE(is_database_ready());
EXPECT_FALSE(is_update_scheduled());
EXPECT_FALSE(last_update().is_null());
if (last_update() < now) {
// This means no data available anymore.
break;
}
// Fetches URLs to verify and waits till server responses with data.
EXPECT_EQ(net::URLRequestStatus::SUCCESS,
safe_browsing_helper->FetchUrlsToVerify(test_server(), step));
std::vector<PhishingUrl> phishing_urls;
EXPECT_TRUE(ParsePhishingUrls(safe_browsing_helper->response_data(),
&phishing_urls));
EXPECT_GT(phishing_urls.size(), 0U);
for (size_t j = 0; j < phishing_urls.size(); ++j) {
// Verifes with server if a URL is a phishing URL and waits till server
// responses.
safe_browsing_helper->CheckUrl(GURL(phishing_urls[j].url));
if (phishing_urls[j].is_phishing) {
EXPECT_TRUE(is_checked_url_in_db())
<< phishing_urls[j].url
<< " is_phishing: " << phishing_urls[j].is_phishing
<< " test step: " << step;
EXPECT_FALSE(is_checked_url_safe())
<< phishing_urls[j].url
<< " is_phishing: " << phishing_urls[j].is_phishing
<< " test step: " << step;
} else {
EXPECT_TRUE(is_checked_url_safe())
<< phishing_urls[j].url
<< " is_phishing: " << phishing_urls[j].is_phishing
<< " test step: " << step;
}
}
// TODO(lzheng): We should verify the fetched database with local
// database to make sure they match.
EXPECT_EQ(net::URLRequestStatus::SUCCESS,
safe_browsing_helper->FetchDBToVerify(test_server(), step));
EXPECT_GT(safe_browsing_helper->response_data().size(), 0U);
last_step = step;
}
// Verifies with server if test is done and waits till server responses.
EXPECT_EQ(net::URLRequestStatus::SUCCESS,
safe_browsing_helper->VerifyTestComplete(test_server(), last_step));
EXPECT_EQ("yes", safe_browsing_helper->response_data());
}
| [
"[email protected]"
] | |
882d6228454055fe0bc3e534c037372802f0bfb8 | 27046ecc4b9a8e8d15890691f552440957d25fb6 | /Classes/objs/Towers.cpp | b39939485e8c3c0d457dfe80a0fd80c2609afa7a | [] | no_license | pototao/DefenseTest | def94db1960f2618b5bc2439df5b67148c91180b | 289406d1e9e63fc47ca71593751ce213cb56de78 | refs/heads/master | 2021-01-18T14:10:26.311985 | 2013-05-15T02:09:47 | 2013-05-15T02:09:47 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 3,121 | cpp | #include "Towers.h"
#include "Creeps.h"
#include "objs/Bullet.h"
#include "cgw/DataModel.h"
#include "data/Consts.h"
#include "data/Info.h"
#include "data/GameData.h"
USING_NS_CC;
Towers::Towers(){}
Towers::~Towers(){}
void Towers::checkTarget() {
// if(_target){
double curDistance = ccpDistance(getPosition(), _target->getPosition());
if (_target->getHp()<= 0 || curDistance>_range){
_target =getClosestTarget();
}
// }
}
Creeps *Towers::getClosestTarget()
{
Creeps *closestCreep = NULL;
double maxDistant = 99999;
DataModel *m = DataModel::getModel();
for (int i=0;i<m->getTargets()->count();i++) {
Creeps *creep=(Creeps *)m->getTargets()->objectAtIndex(i);
double curDistance = ccpDistance(getPosition(), creep->getPosition());
if (curDistance < maxDistant) {
closestCreep = creep;
maxDistant = curDistance;
}
}
if (maxDistant < _range)
return closestCreep;
return NULL;
}
void Towers::init(const char* xmlName,int rID,Short1DArray info){
Role::init(xmlName,rID,info);
setRange(200);
prefix="t";
bulletTag=info->value[2];
CCLog("Tower init bulletTag %d ",bulletTag);
schedule(schedule_selector(Towers::towerLogic),0.2);
changeState(STAND,STAND);
}
Towers* Towers::create(const char* xmlName,int rID,Short1DArray info) {
Towers *tower = new Towers();
tower->init(xmlName,rID,info);
tower->autorelease();
return tower;
}
void Towers::creepMoveFinished(CCNode* sender) {
DataModel * m = DataModel::getModel();
CCSprite *sprite =(CCSprite*)sender;
this->getParent()->removeChild(sprite,true);
m->getProjectiles()->removeObject(sprite);
}
void Towers::finishFiring() {
if (!_target) {
return;
}
DataModel *m = DataModel::getModel();
setNextBullet(Bullet::create(BULLET_NAME[bulletTag].c_str(),bulletTag,Info::getInfo()->bulletInfo->value[bulletTag]));
getNextBullet()->setPosition(getPosition());
this->getParent()->addChild(getNextBullet(),1);
m->getProjectiles()->addObject(getNextBullet());
float delta = 1.0;
CCPoint shootVector = ccpSub(_target->getPosition(),getPosition());
CCPoint normalizedShootVector = ccpNormalize(shootVector);
CCPoint overshotVector = ccpMult(normalizedShootVector, 320);
CCPoint offscreenPoint = ccpAdd(getPosition(), overshotVector);
getNextBullet()->runAction(CCSequence::create(CCMoveTo::create(delta,offscreenPoint),
CCCallFuncN::create(this,callfuncN_selector( Towers::creepMoveFinished)),NULL));
getNextBullet()->setTag(bulletTag);
setNextBullet(NULL);
}
void Towers::towerLogic(float dt) {
// if(_target==NULL){
_target = getClosestTarget();
// }
if (_target != NULL) {
//rotate the tower to face the nearest creep
CCPoint shootVector = ccpSub(_target->getPosition(), getPosition());
float shootAngle = ccpToAngle(shootVector);
float cocosAngle = CC_RADIANS_TO_DEGREES(-1 * shootAngle);
float rotateSpeed = 0.5 / M_PI; // 1/2 second to roate 180 degrees
float rotateDuration = fabs(shootAngle * rotateSpeed);
runAction(CCSequence::create(CCRotateTo::create(rotateDuration,cocosAngle),
CCCallFunc::create(this,callfunc_selector(Towers::finishFiring)),NULL));
}
} | [
"[email protected]"
] | |
1b919eb37e43c556a4fbc4568e053f9dfa876f5c | 77ff0d5fe2ec8057f465a3dd874d36c31e20b889 | /problems/JOI/Icicles.cpp | 3a7e769f08a2bbcf58676bc73c20fd6849e6a57c | [] | no_license | kei1107/algorithm | cc4ff5fe6bc52ccb037966fae5af00c789b217cc | ddf5911d6678d8b110d42957f15852bcd8fef30c | refs/heads/master | 2021-11-23T08:34:48.672024 | 2021-11-06T13:33:29 | 2021-11-06T13:33:29 | 105,986,370 | 2 | 1 | null | null | null | null | UTF-8 | C++ | false | false | 2,216 | cpp | #include "bits/stdc++.h"
using namespace std;
typedef long long ll;
typedef pair<int, int> pii;
typedef pair<ll, ll> pll;
#define INF 1<<30
#define LINF 1LL<<60
/*
<url:https://www.ioi-jp.org/joi/2009/2010-ho-prob_and_sol/2010-ho.pdf>
問題文============================================================
あるN(2<=N<=10^5)個のつららの長さが与えられる。
i個目のつららは最初長さがai(>=1)であり、両端(i-1個目及びi+1個目）のつららよりも
長さが長い時、1時間あたり1cm伸びる
つららは長さがL(2<=L<=50000)に達した瞬間に根元から折れ、長さが0となる。
全てのつららが折れるまでにかかる時間を求める(最初の段階では隣り合うつららの長さは異なる)
=================================================================
解説=============================================================
dp
dp[i] := i番目のつららが解けるまでの時間
各つららを降順に並べ替え、長さが大きい順に見ていく
そのつららの両端のつららを見て,値の更新が行われていなかったら（:= 自分よりも短い）
dp[i] = L - a[idx]
値の更新が行われていたら、大きい方の値を見て
dp[i] = dp[large_len] + L - a[idx]
================================================================
*/
ll N,L;
vector<pll> a;
int main(void) {
cin.tie(0); ios::sync_with_stdio(false);
cin >> N >> L;
a.resize(N);
for(int i = 0; i < N;i++){
ll l; cin >> l;
a[i] = {l,i+1};
}
sort(a.begin(),a.end());
reverse(a.begin(),a.end());
vector<ll> dp(N+2,0);
for(int i = 0; i < N;i++){
ll idx = a[i].second;
if(dp[idx - 1] == 0 && dp[idx + 1] == 0){
dp[idx] += L - a[i].first;
continue;
}
if(dp[idx - 1] > dp[idx + 1]){
dp[idx] += dp[idx - 1] + L - a[i].first;
continue;
}
if(dp[idx + 1] > dp[idx - 1]){
dp[idx] += dp[idx + 1] + L - a[i].first;
continue;
}
}
ll res = 0;
for(auto v:dp){
res = max(res,v);
}
cout << res << endl;
return 0;
}
| [
"[email protected]"
] | |
d273272426303814246b1bf8fc5372adddb4e023 | 5705f6a02239ffb7aa53e138c479eb92292f7b11 | /src/coreclr/debug/createdump/threadinfo.cpp | 7304fc506c51e378f50c06e99611712d9e6a8da5 | [
"MIT"
] | permissive | YohDeadfall/runtime | efe7bbb2a3b1fc74ac7d398693bad2ef086d7c45 | a07188777ffa92adc8a00ca974bd1c63156d19f1 | refs/heads/main | 2022-11-06T01:23:50.134417 | 2022-10-14T19:48:13 | 2022-10-14T19:48:13 | 226,664,572 | 0 | 1 | MIT | 2023-09-10T00:14:20 | 2019-12-08T12:32:27 | C# | UTF-8 | C++ | false | false | 14,757 | cpp | // Licensed to the .NET Foundation under one or more agreements.
// The .NET Foundation licenses this file to you under the MIT license.
#include "createdump.h"
#ifndef THUMB_CODE
#define THUMB_CODE 1
#endif
#ifndef __GLIBC__
typedef int __ptrace_request;
#endif
extern CrashInfo* g_crashInfo;
// Helper for UnwindNativeFrames
static void
GetFrameLocation(CONTEXT* pContext, uint64_t* ip, uint64_t* sp)
{
#if defined(__x86_64__)
*ip = pContext->Rip;
*sp = pContext->Rsp;
#elif defined(__i386__)
*ip = pContext->Eip;
*sp = pContext->Esp;
#elif defined(__aarch64__)
*ip = pContext->Pc;
*sp = pContext->Sp;
#elif defined(__arm__)
*ip = pContext->Pc & ~THUMB_CODE;
*sp = pContext->Sp;
#endif
}
// Helper for UnwindNativeFrames
static BOOL
ReadMemoryAdapter(PVOID address, PVOID buffer, SIZE_T size)
{
return g_crashInfo->ReadMemory(address, buffer, size);
}
void
ThreadInfo::UnwindNativeFrames(CONTEXT* pContext)
{
uint64_t previousSp = 0;
uint64_t previousIp = 0;
int ipMatchCount = 0;
// For each native frame, add a page around the IP and any unwind info not already
// added in VisitProgramHeader (Linux) and VisitSection (MacOS) to the dump.
while (true)
{
uint64_t ip = 0, sp = 0;
GetFrameLocation(pContext, &ip, &sp);
#if defined(__aarch64__)
// ARM64 can have frames with the same SP but different IPs. Increment sp so it gets added to the stack
// frames in the correct order and to prevent the below loop termination on non-increasing sp. Since stack
// pointers are always 8 byte align, this increase is masked off in StackFrame::StackPointer() to get the
// original stack pointer.
if (sp == previousSp && ip != previousIp)
{
sp++;
}
#endif
if (ip == 0 || sp <= previousSp) {
TRACE_VERBOSE("Unwind: sp not increasing or ip == 0 sp %p ip %p\n", (void*)sp, (void*)ip);
break;
}
// Break out of the endless loop if the IP matches over a 1000 times. This is a fallback
// behavior of libunwind when the module the IP is in doesn't have unwind info and for
// simple stack overflows. The stack memory is added to the dump in GetThreadStack and
// it isn't necessary to add the same IP page over and over again. The only place this
// check won't catch is the stack overflow case that repeats a sequence of IPs over and
// over.
if (ip == previousIp)
{
if (ipMatchCount++ > 1000)
{
TRACE("Unwind: same ip %p over 1000 times\n", (void*)ip);
break;
}
}
else
{
ipMatchCount = 0;
}
// Add two pages around the instruction pointer to the core dump
m_crashInfo.InsertMemoryRegion(ip - PAGE_SIZE, PAGE_SIZE * 2);
// Look up the ip address to get the module base address
uint64_t baseAddress = m_crashInfo.GetBaseAddressFromAddress(ip);
if (baseAddress == 0) {
TRACE_VERBOSE("Unwind: module base not found ip %p\n", (void*)ip);
break;
}
// Unwind the native frame adding all the memory accessed to the core dump via the read memory adapter.
ULONG64 functionStart;
if (!PAL_VirtualUnwindOutOfProc(pContext, nullptr, &functionStart, baseAddress, ReadMemoryAdapter)) {
TRACE("Unwind: PAL_VirtualUnwindOutOfProc returned false\n");
break;
}
if (m_crashInfo.GatherFrames())
{
// Add stack frame for the crash report. The function start returned by the unwinder is for
// "ip" and not for the new context returned in pContext.
StackFrame frame(baseAddress, ip, sp, ip - functionStart);
AddStackFrame(frame);
}
previousSp = sp;
previousIp = ip;
}
}
bool
ThreadInfo::UnwindThread(IXCLRDataProcess* pClrDataProcess, ISOSDacInterface* pSos)
{
TRACE("Unwind: thread %04x\n", Tid());
// Get starting native context for the thread
CONTEXT context;
GetThreadContext(CONTEXT_ALL, &context);
// Unwind the native frames at the top of the stack
UnwindNativeFrames(&context);
if (pClrDataProcess != nullptr)
{
ReleaseHolder<IXCLRDataTask> pTask;
ReleaseHolder<IXCLRDataStackWalk> pStackwalk;
// Get the managed stack walker for this thread
if (SUCCEEDED(pClrDataProcess->GetTaskByOSThreadID(Tid(), &pTask)))
{
pTask->CreateStackWalk(
CLRDATA_SIMPFRAME_UNRECOGNIZED |
CLRDATA_SIMPFRAME_MANAGED_METHOD |
CLRDATA_SIMPFRAME_RUNTIME_MANAGED_CODE |
CLRDATA_SIMPFRAME_RUNTIME_UNMANAGED_CODE,
&pStackwalk);
}
// For each managed frame (if any)
if (pStackwalk != nullptr)
{
TRACE("Unwind: managed frames\n");
m_managed = true;
ReleaseHolder<IXCLRDataExceptionState> pException;
HRESULT hr = pTask->GetCurrentExceptionState(&pException);
if (FAILED(hr))
{
hr = pTask->GetLastExceptionState(&pException);
}
if (SUCCEEDED(hr))
{
TRACE("Unwind: found managed exception\n");
ReleaseHolder<IXCLRDataValue> pExceptionValue;
if (SUCCEEDED(pException->GetManagedObject(&pExceptionValue)))
{
CLRDATA_ADDRESS exceptionObject;
if (SUCCEEDED(pExceptionValue->GetAddress(&exceptionObject)))
{
m_exceptionObject = exceptionObject;
if (pSos != nullptr)
{
DacpExceptionObjectData exceptionData;
if (SUCCEEDED(exceptionData.Request(pSos, exceptionObject)))
{
m_exceptionHResult = exceptionData.HResult;
}
}
TRACE("Unwind: exception object %p exception hresult %08x\n", (void*)m_exceptionObject, m_exceptionHResult);
}
ReleaseHolder<IXCLRDataTypeInstance> pExceptionType;
if (SUCCEEDED(pExceptionValue->GetType(&pExceptionType)))
{
ArrayHolder<WCHAR> typeName = new WCHAR[MAX_LONGPATH + 1];
if (SUCCEEDED(pExceptionType->GetName(0, MAX_LONGPATH, nullptr, typeName.GetPtr())))
{
m_exceptionType = FormatString("%S", typeName.GetPtr());
TRACE("Unwind: exception type %s\n", m_exceptionType.c_str());
}
}
}
}
// For each managed stack frame
do
{
// Get the managed stack frame context
if (pStackwalk->GetContext(CONTEXT_ALL, sizeof(context), nullptr, (BYTE *)&context) != S_OK) {
TRACE("Unwind: stack walker GetContext FAILED\n");
break;
}
// Get and save more detail information for the crash report if enabled
if (m_crashInfo.GatherFrames())
{
GatherStackFrames(&context, pStackwalk);
}
// Unwind all the native frames after the managed frame
UnwindNativeFrames(&context);
} while (pStackwalk->Next() == S_OK);
}
}
return true;
}
void
ThreadInfo::GatherStackFrames(CONTEXT* pContext, IXCLRDataStackWalk* pStackwalk)
{
uint64_t ip = 0, sp = 0;
GetFrameLocation(pContext, &ip, &sp);
uint64_t moduleAddress = 0;
mdMethodDef token = 0;
uint32_t nativeOffset = 0;
uint32_t ilOffset = 0;
ReleaseHolder<IXCLRDataMethodInstance> pMethod;
ReleaseHolder<IXCLRDataFrame> pFrame;
if (SUCCEEDED(pStackwalk->GetFrame(&pFrame)))
{
CLRDataSimpleFrameType simpleType;
CLRDataDetailedFrameType detailedType;
pFrame->GetFrameType(&simpleType, &detailedType);
if ((simpleType & (CLRDATA_SIMPFRAME_MANAGED_METHOD | CLRDATA_SIMPFRAME_RUNTIME_MANAGED_CODE)) != 0)
{
if (SUCCEEDED(pFrame->GetMethodInstance(&pMethod)))
{
ReleaseHolder<IXCLRDataModule> pModule;
if (SUCCEEDED(pMethod->GetTokenAndScope(&token, &pModule)))
{
DacpGetModuleData moduleData;
if (SUCCEEDED(moduleData.Request(pModule)))
{
moduleAddress = moduleData.LoadedPEAddress;
}
else
{
TRACE("Unwind: DacpGetModuleData.Request sp %p ip %p FAILED\n", (void*)sp, (void*)ip);
}
}
else
{
TRACE("Unwind: GetTokenAndScope sp %p ip %p FAILED\n", (void*)sp, (void*)ip);
}
if (FAILED(pMethod->GetILOffsetsByAddress(ip, 1, NULL, &ilOffset)))
{
TRACE("Unwind: GetILOffsetsByAddress sp %p ip %p FAILED\n", (void*)sp, (void*)ip);
}
CLRDATA_ADDRESS startAddress;
if (SUCCEEDED(pMethod->GetRepresentativeEntryAddress(&startAddress)))
{
nativeOffset = ip - startAddress;
}
else
{
TRACE("Unwind: GetRepresentativeEntryAddress sp %p ip %p FAILED\n", (void*)sp, (void*)ip);
}
}
else
{
TRACE("Unwind: GetMethodInstance sp %p ip %p FAILED\n", (void*)sp, (void*)ip);
}
}
else
{
TRACE("Unwind: simpleType %08x detailedType %08x\n", simpleType, detailedType);
}
}
// Add managed stack frame for the crash info notes
StackFrame frame(moduleAddress, ip, sp, pMethod.Detach(), nativeOffset, token, ilOffset);
AddStackFrame(frame);
}
// This function deals with two types of frames: duplicate stack frames (SP is equal) and repeated frames (IP is
// equal) because of a stack overflow.
//
// The list of constraints:
//
// 1) The StackFrame is immutable i.e. can't add some kind of repeat count to the frame. Making it mutable is big hassle.
// 2) The native unwinding can repeat the same frame SP/IP. These frames are not counted as repeated stack overflow ones.
// 3) Only add the repeated stack overflow frames once to frames set. This saves time and memory.
void
ThreadInfo::AddStackFrame(const StackFrame& frame)
{
// This filters out the duplicate stack frames that are the result the native
// unwinding happening between each managed frame. If the SP matches a frame
// already in the set, skip it.
const std::set<StackFrame>::iterator& found = m_frames.find(frame);
if (found == m_frames.end())
{
// Aggregated the repeated stack frames only for stack overflow exceptions
if (m_exceptionHResult == STACK_OVERFLOW_EXCEPTION)
{
// Check for repeats through all the stack frames so far until we find one
if (m_beginRepeat == m_frames.end())
{
for (auto iterator = m_frames.cbegin(); iterator != m_frames.cend(); ++iterator)
{
if (frame.InstructionPointer() == iterator->InstructionPointer())
{
m_repeatedFrames++;
m_beginRepeat = iterator;
TRACE("Unwind: begin repeat sp %p ip %p\n", (void*)frame.StackPointer(), (void*)frame.InstructionPointer());
return;
}
}
}
// Check for repeats until we stop find them
if (m_endRepeat == m_frames.end())
{
for (auto iterator = m_beginRepeat; iterator != m_endRepeat; ++iterator)
{
if (frame.InstructionPointer() == iterator->InstructionPointer())
{
m_repeatedFrames++;
return;
}
}
}
}
// Add the non-duplicate and (if stack overflow) non-repeating frames to set
std::pair<std::set<StackFrame>::iterator, bool> result = m_frames.insert(frame);
assert(result.second);
TRACE("Unwind: sp %p ip %p off %08x mod %p%c\n",
(void*)frame.StackPointer(), (void*)frame.InstructionPointer(), frame.NativeOffset(), (void*)frame.ModuleAddress(), frame.IsManaged() ? '*' : ' ');
// Don't start tracking the end of the repeated frames until there is a start
if (m_beginRepeat != m_frames.end() && m_endRepeat == m_frames.end())
{
TRACE("Unwind: end repeat sp %p ip %p\n", (void*)frame.StackPointer(), (void*)frame.InstructionPointer());
m_endRepeat = result.first;
// Count the number of frames in the repeating sequence and calculate how many times the sequence was repeated
int framesRepeated = 0;
for (auto iterator = m_beginRepeat; iterator != m_endRepeat; ++iterator)
{
framesRepeated++;
}
// The total number of individually repeated frames has to be greater than the number of frames in the repeating sequence
m_repeatedFrames = framesRepeated > 0 && m_repeatedFrames >= framesRepeated ? (m_repeatedFrames / framesRepeated) + 1 : 0;
}
}
}
void
ThreadInfo::GetThreadStack()
{
uint64_t startAddress = GetStackPointer() & PAGE_MASK;
size_t size = 4 * PAGE_SIZE;
if (startAddress != 0)
{
MemoryRegion search(0, startAddress, startAddress + PAGE_SIZE);
const MemoryRegion* region = CrashInfo::SearchMemoryRegions(m_crashInfo.OtherMappings(), search);
if (region != nullptr)
{
// Use the mapping found for the size of the thread's stack
size = region->EndAddress() - startAddress;
if (g_diagnostics)
{
TRACE("Thread %04x stack found in other mapping (size %08zx): ", m_tid, size);
region->Trace();
}
}
m_crashInfo.InsertMemoryRegion(startAddress, size);
}
else
{
TRACE("Thread %04x null stack pointer\n", m_tid);
}
}
| [
"[email protected]"
] | |
36c7101749d9141114b58c711f85d90892ad2d09 | 82f3274ac81f9a804e87af05b8d08bbad9ec022d | /materials/bilateralfilter.cpp | 57bb5e64ce4ec3eb34e6da417179e03cef8326c8 | [] | no_license | purvigoel/final224UIfinal | 2318b49035f9a58f8e9e4886c3d6176d0b949416 | a26b484597bd3015aac14fdffb89d59d63037edb | refs/heads/master | 2020-05-24T10:32:09.680746 | 2019-05-17T14:20:26 | 2019-05-17T14:20:26 | 187,229,223 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 5,054 | cpp | #include "bilateralfilter.h"
#include "imagereader.h"
#include <QColor>
#include <math.h>
#include <iostream>
BilateralFilter::BilateralFilter()
{
m_kernelRows = 5;
m_kernelCols = 5;
m_kernelRadius = int(floor(float(m_kernelRows) / 2));
std::cout << m_kernelRadius << std::endl;
// sigmac = 100.0f;
// sigmar = 2500.0f;
}
QImage BilateralFilter::convolve(ImageReader im, float sigmac, float sigmar){
int rows = im.getImageHeight();
int cols = im.getImageWidth();
QImage output(cols, rows, QImage::Format_RGB32);
QRgb *imOut = reinterpret_cast<QRgb *>(output.bits());
int counter = 0;
for(int row = 0; row < rows; row++){
#pragma omp parallel for
for(int col = 0; col < cols; col++){
if(row - m_kernelRadius < 0 || col - m_kernelRadius < 0){
QColor black = QColor(0,0,0);
imOut[counter] = black.rgb();
} else if(row + m_kernelRadius >= rows || col + m_kernelRadius >= cols){
QColor black = QColor(0,0,0);
imOut[counter] = black.rgb();
} else {
imOut[counter] = applyBilateralFilter(row, col, im, sigmac, sigmar);
}
counter += 1;
}
}
//std::cout << "done" << std::endl;
return output;
}
std::vector<float> BilateralFilter::convolve(ImageReader im, std::vector<float> luminances, float sigmac, float sigmar){
int rows = im.getImageHeight();
int cols = im.getImageWidth();
std::vector<float> imOut;
for(int row = 0; row < rows; row++){
// std::cout << row << std::endl;
#pragma omp parallel for
for(int col = 0; col < cols; col++){
if(row - m_kernelRadius < 0 || col - m_kernelRadius < 0){
imOut.push_back(0.0f);
} else if(row + m_kernelRadius >= rows || col + m_kernelRadius >= cols){
imOut.push_back(0.0f);
} else {
imOut.push_back(applyBilateralFilter(row, col, im, luminances, sigmac, sigmar));
}
}
}
std::cout << "done" << std::endl;
return imOut;
}
QRgb BilateralFilter::applyBilateralFilter(int row, int col, ImageReader im, float sigmac, float sigmar){
QRgb centerRgb = im.pixelAt(row, col);
QColor centerColor = QColor(centerRgb);
float colorAcc = 0.0f;
float weightAcc = 0.0f;
for(int i = 0; i < m_kernelRows; i++){
for(int j = 0; j < m_kernelCols; j++){
int y = row - (m_kernelRadius - i);
int x = col - (m_kernelRadius - j);
QRgb neighborRgb = im.pixelAt(y, x);
QColor neighborColor = QColor(neighborRgb);
float redDistance = (float(centerColor.red()) - float(neighborColor.red()));
float colorDistance = redDistance * redDistance;
float xf = float(m_kernelRadius - j);
float yf = float(m_kernelRadius - i);
float pixelDistance = xf * xf + yf * yf;
float wColor = exp(-0.5f * colorDistance / (sigmac * sigmac));
float wDistance = exp( -0.5f * (pixelDistance) / (sigmar * sigmar) );
colorAcc += (wDistance * wColor) * float(neighborColor.red());
weightAcc += (wDistance * wColor);
}
}
if(weightAcc == 0.0f){
weightAcc = 0.001f;
}
colorAcc /= weightAcc;
if(colorAcc > 255.0f){
colorAcc = 255.0f;
} else if(colorAcc < 0.0f){
colorAcc = 0.0f;
}
QColor colorOut = QColor(floor(colorAcc ),floor(colorAcc ),floor(colorAcc));
return colorOut.rgb();
}
float BilateralFilter::applyBilateralFilter(int row, int col, ImageReader im, std::vector<float> luminances, float sigmaSpatial, float sigmaL){
float centerColor = luminances[im.indexAt(row, col)];
float colorAcc = 0.0f;
float weightAcc = 0.0f;
for(int i = 0; i < m_kernelRows; i++){
for(int j = 0; j < m_kernelCols; j++){
int y = row - (m_kernelRadius - i);
int x = col - (m_kernelRadius - j);
float neighborColor = luminances[im.indexAt(y, x)];
float luminanceDistance = pow(float(centerColor) - float(neighborColor), 2.0f);
float xf = float(m_kernelRadius - j);
float yf = float(m_kernelRadius - i);
float pixelDistance = xf * xf + yf * yf;
float wColor = exp(-0.5f * luminanceDistance / (sigmaL * sigmaL));
float wDistance = exp( -0.5f * (pixelDistance) / (sigmaSpatial * sigmaSpatial) );
colorAcc += (wDistance * wColor) * float(neighborColor);
weightAcc += (wDistance * wColor);
}
}
if(weightAcc == 0.0f){
weightAcc = 0.001f;
}
colorAcc /= weightAcc;
if(colorAcc > 1.0f){
colorAcc = 1.0f;
} else if(colorAcc < 0.0f){
colorAcc = 0.0f;
}
return colorAcc;
}
float BilateralFilter::euclideanDistance(int row1, int col1, int row2, int col2){
return float( (row1 - row2) * (row1 - row2) + (col1 - col2) * (col1-col2));
}
| [
"[email protected]"
] | |
c2ecf3ef4f877e1c11e175a1d2490905456e50b0 | 7e59fd6933090b3c02dd7fb815ca6b255f8625de | /codes/codeforces/codeforces_249/1.cpp | 6ca356d05cf0eef20ea30a32d4035cafea1efbc9 | [] | no_license | jitengoyal/coding | 83cc9b5ac1d1d3daad38aac85ad4a1dcd193fbb6 | 7d68654cdfa7e6c1712610dfe43afeffb5cd47a1 | refs/heads/master | 2020-07-05T08:23:29.441196 | 2014-09-03T23:02:30 | 2014-09-03T23:02:30 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,444 | cpp | #include<stdio.h>
#include<iostream>
#include<stack>
#include<queue>
#include<vector>
#include<set>
#include<math.h>
#include<algorithm>
#include<string.h>
#include<map>
#include<list>
using namespace std;
#define S(n) scanf("%d",&n)
#define SS(s) scanf("%s",s)
#define PS(s) printf("%s\n",s)
#define P(n) printf("%d\n",n)
#define sortv(v) sort(v.begin(),v.end())
#define rep(i,n) for(i=0;i<n;i++)
#define rep1(i,n) for(i=1;i<n;i++)
#define rep2(i,a,b) for(i=a;i<b;i++)
#define MP make_pair
#define PB push_back
#define pii pair<int,int>
#define vi vector<int>
#define si set<int>
#define Si size()
#define mod 1000000007
//for gcd use __gcd(); // inbuilt function
#define sieve(a) ({int b=ceil(sqrt(a));vector<int> d(a,0);vector<int> e;int f=2;e.push_back(2);e.push_back(3);for(int x=1;x<b+1;x++){for(int y=1;y<b+1;y++){int n=(4*x*x)+(y*y);if(n<=a&&(n%12==1||n%12==5)){d[n]^=1;}n=(3*x*x)+(y*y);if(n<=a&&n%12==7){d[n]^=1;}n=(3*x*x)-(y*y);if(x>y&&n<=a&&n%12==11){d[n]^=1;}}}for(int r=5;r<b+1;r++){if(d[r]){for(int i=r*r;i<a;i+=(r*r)){d[i]=0;}}}for(int c=5;c<a;c++){if(d[c]){e.push_back(c);}}e;})
int main()
{
int x,y,z,i,j,k,n,num,T,m,ans,count,counter,result;
S(n);
S(m);
int arr[n];
rep(i,n)
S(arr[i]);
count=0,counter=0;
for(i=0;i<n;i++)
{
counter+=arr[i];
if(counter==m)
{
count++;
counter=0;
}
if(counter>m)
{
i=i-1;
count++;
counter=0;
}
}
if(counter!=0)
count++;
P(count);
return 0;
}
| [
"[email protected]"
] | |
218f5b663bbe8a76eff436d9cdcaf8678003e023 | d425cf21f2066a0cce2d6e804bf3efbf6dd00c00 | /Tactical/XML_EnemyItemChoice.cpp | ef2331f40fceb091d4ba797af11a1af0c38fc3f7 | [] | no_license | infernuslord/ja2 | d5ac783931044e9b9311fc61629eb671f376d064 | 91f88d470e48e60ebfdb584c23cc9814f620ccee | refs/heads/master | 2021-01-02T23:07:58.941216 | 2011-10-18T09:22:53 | 2011-10-18T09:22:53 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 15,653 | cpp | #ifdef PRECOMPILEDHEADERS
#include "Tactical All.h"
#else
#include "sgp.h"
#include "overhead.h"
#include "weapons.h"
#include "Debug Control.h"
#include "expat.h"
#include "XML.h"
#include "Inventory Choosing.h"
#endif
struct
{
PARSE_STAGE curElement;
CHAR8 szCharData[MAX_CHAR_DATA_LENGTH+1];
ARMY_GUN_CHOICE_TYPE curArmyItemChoices;
ARMY_GUN_CHOICE_TYPE * curArray;
UINT32 maxArraySize;
UINT32 currentDepth;
UINT32 maxReadDepth;
}
typedef armyitemchoicesParseData;
static void XMLCALL
armyitemchoicesStartElementHandle(void *userData, const XML_Char *name, const XML_Char **atts)
{
armyitemchoicesParseData * pData = (armyitemchoicesParseData *)userData;
if(pData->currentDepth <= pData->maxReadDepth) //are we reading this element?
{
if(strcmp(name, "ENEMYITEMCHOICESLIST") == 0 && pData->curElement == ELEMENT_NONE)
{
pData->curElement = ELEMENT_LIST;
memset(pData->curArray,0,sizeof(ARMY_GUN_CHOICE_TYPE)*pData->maxArraySize);
pData->maxReadDepth++; //we are not skipping this element
}
else if(strcmp(name, "ENEMYITEMCHOICES") == 0 && pData->curElement == ELEMENT_LIST)
{
pData->curElement = ELEMENT;
memset(&pData->curArmyItemChoices,0,sizeof(ARMY_GUN_CHOICE_TYPE));
pData->maxReadDepth++; //we are not skipping this element
}
else if(pData->curElement == ELEMENT &&
(strcmp(name, "uiIndex") == 0 ||
strcmp(name, "ubChoices") == 0 ||
strcmp(name, "bItemNo1") == 0 ||
strcmp(name, "bItemNo2") == 0 ||
strcmp(name, "bItemNo3") == 0 ||
strcmp(name, "bItemNo4") == 0 ||
strcmp(name, "bItemNo5") == 0 ||
strcmp(name, "bItemNo6") == 0 ||
strcmp(name, "bItemNo7") == 0 ||
strcmp(name, "bItemNo8") == 0 ||
strcmp(name, "bItemNo9") == 0 ||
strcmp(name, "bItemNo10") == 0 ||
strcmp(name, "bItemNo11") == 0 ||
strcmp(name, "bItemNo12") == 0 ||
strcmp(name, "bItemNo13") == 0 ||
strcmp(name, "bItemNo14") == 0 ||
strcmp(name, "bItemNo15") == 0 ||
strcmp(name, "bItemNo16") == 0 ||
strcmp(name, "bItemNo17") == 0 ||
strcmp(name, "bItemNo18") == 0 ||
strcmp(name, "bItemNo19") == 0 ||
strcmp(name, "bItemNo20") == 0 ||
strcmp(name, "bItemNo21") == 0 ||
strcmp(name, "bItemNo22") == 0 ||
strcmp(name, "bItemNo23") == 0 ||
strcmp(name, "bItemNo24") == 0 ||
strcmp(name, "bItemNo25") == 0 ||
strcmp(name, "bItemNo26") == 0 ||
strcmp(name, "bItemNo27") == 0 ||
strcmp(name, "bItemNo28") == 0 ||
strcmp(name, "bItemNo29") == 0 ||
strcmp(name, "bItemNo30") == 0 ||
strcmp(name, "bItemNo31") == 0 ||
strcmp(name, "bItemNo32") == 0 ||
strcmp(name, "bItemNo33") == 0 ||
strcmp(name, "bItemNo34") == 0 ||
strcmp(name, "bItemNo35") == 0 ||
strcmp(name, "bItemNo36") == 0 ||
strcmp(name, "bItemNo37") == 0 ||
strcmp(name, "bItemNo38") == 0 ||
strcmp(name, "bItemNo39") == 0 ||
strcmp(name, "bItemNo40") == 0 ||
strcmp(name, "bItemNo41") == 0 ||
strcmp(name, "bItemNo42") == 0 ||
strcmp(name, "bItemNo43") == 0 ||
strcmp(name, "bItemNo44") == 0 ||
strcmp(name, "bItemNo45") == 0 ||
strcmp(name, "bItemNo46") == 0 ||
strcmp(name, "bItemNo47") == 0 ||
strcmp(name, "bItemNo48") == 0 ||
strcmp(name, "bItemNo49") == 0 ||
strcmp(name, "bItemNo50") == 0 ))
{
pData->curElement = ELEMENT_PROPERTY;
pData->maxReadDepth++; //we are not skipping this element
}
pData->szCharData[0] = '\0';
}
pData->currentDepth++;
}
static void XMLCALL
armyitemchoicesCharacterDataHandle(void *userData, const XML_Char *str, int len)
{
armyitemchoicesParseData * pData = (armyitemchoicesParseData *)userData;
if( (pData->currentDepth <= pData->maxReadDepth) &&
(strlen(pData->szCharData) < MAX_CHAR_DATA_LENGTH)
){
strncat(pData->szCharData,str,__min((unsigned int)len,MAX_CHAR_DATA_LENGTH-strlen(pData->szCharData)));
}
}
static void XMLCALL
armyitemchoicesEndElementHandle(void *userData, const XML_Char *name)
{
armyitemchoicesParseData * pData = (armyitemchoicesParseData *)userData;
if(pData->currentDepth <= pData->maxReadDepth) //we're at the end of an element that we've been reading
{
if(strcmp(name, "ENEMYITEMCHOICESLIST") == 0)
{
pData->curElement = ELEMENT_NONE;
}
else if(strcmp(name, "ENEMYITEMCHOICES") == 0)
{
pData->curElement = ELEMENT_LIST;
if(pData->curArmyItemChoices.uiIndex < pData->maxArraySize)
{
pData->curArray[pData->curArmyItemChoices.uiIndex] = pData->curArmyItemChoices; //write the armyitemchoices into the table
}
}
else if(strcmp(name, "uiIndex") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.uiIndex = (UINT32) atol(pData->szCharData);
}
else if(strcmp(name, "ubChoices") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.ubChoices = (UINT8) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo1") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[0] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo2") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[1] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo3") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[2] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo4") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[3] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo5") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[4] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo6") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[5] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo7") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[6] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo8") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[7] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo9") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[8] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo10") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[9] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo11") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[10] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo12") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[11] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo13") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[12] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo14") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[13] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo15") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[14] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo16") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[15] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo17") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[16] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo18") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[17] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo19") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[18] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo20") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[19] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo21") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[20] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo22") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[21] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo23") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[22] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo24") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[23] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo25") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[24] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo26") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[25] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo27") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[26] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo28") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[27] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo29") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[28] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo30") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[29] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo31") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[30] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo32") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[31] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo33") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[32] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo34") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[33] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo35") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[34] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo36") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[35] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo37") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[36] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo38") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[37] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo39") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[38] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo40") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[39] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo41") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[40] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo42") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[41] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo43") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[42] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo44") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[43] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo45") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[44] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo46") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[45] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo47") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[46] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo48") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[47] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo49") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[48] = (INT16) atol(pData->szCharData);
}
else if(strcmp(name, "bItemNo50") == 0)
{
pData->curElement = ELEMENT;
pData->curArmyItemChoices.bItemNo[49] = (INT16) atol(pData->szCharData);
}
pData->maxReadDepth--;
}
pData->currentDepth--;
}
BOOLEAN ReadInArmyItemChoicesStats(STR fileName)
{
HWFILE hFile;
UINT32 uiBytesRead;
UINT32 uiFSize;
CHAR8 * lpcBuffer;
XML_Parser parser = XML_ParserCreate(NULL);
armyitemchoicesParseData pData;
DebugMsg(TOPIC_JA2, DBG_LEVEL_3, "Loading EnemyItemChoicess.xml" );
// Open armyitemchoices file
hFile = FileOpen( fileName, FILE_ACCESS_READ, FALSE );
if ( !hFile )
return( FALSE );
uiFSize = FileGetSize(hFile);
lpcBuffer = (CHAR8 *) MemAlloc(uiFSize+1);
//Read in block
if ( !FileRead( hFile, lpcBuffer, uiFSize, &uiBytesRead ) )
{
MemFree(lpcBuffer);
return( FALSE );
}
lpcBuffer[uiFSize] = 0; //add a null terminator
FileClose( hFile );
XML_SetElementHandler(parser, armyitemchoicesStartElementHandle, armyitemchoicesEndElementHandle);
XML_SetCharacterDataHandler(parser, armyitemchoicesCharacterDataHandle);
memset(&pData,0,sizeof(pData));
pData.curArray = gArmyItemChoices;
pData.maxArraySize = MAX_ITEM_TYPES;
XML_SetUserData(parser, &pData);
if(!XML_Parse(parser, lpcBuffer, uiFSize, TRUE))
{
CHAR8 errorBuf[511];
sprintf(errorBuf, "XML Parser Error in EnemyItemChoicess.xml: %s at line %d", XML_ErrorString(XML_GetErrorCode(parser)), XML_GetCurrentLineNumber(parser));
LiveMessage(errorBuf);
MemFree(lpcBuffer);
return FALSE;
}
MemFree(lpcBuffer);
XML_ParserFree(parser);
return( TRUE );
}
BOOLEAN WriteArmyItemChoicesStats()
{
//DebugMsg (TOPIC_JA2,DBG_LEVEL_3,"writearmyitemchoicesstats");
HWFILE hFile;
//Debug code; make sure that what we got from the file is the same as what's there
// Open a new file
hFile = FileOpen( "TABLEDATA\\EnemyItemChoices out.xml", FILE_ACCESS_WRITE | FILE_CREATE_ALWAYS, FALSE );
if ( !hFile )
return( FALSE );
{
UINT32 cnt;
FilePrintf(hFile,"<ENEMYITEMCHOICESLIST>\r\n");
for(cnt = 0;cnt < ARMY_GUN_LEVELS;cnt++)
{
FilePrintf(hFile,"\t<ENEMYITEMCHOICES>\r\n");
FilePrintf(hFile,"\t\t<uiIndex>%d</uiIndex>\r\n", cnt );
FilePrintf(hFile,"\t\t<ubChoices>%d</ubChoices>\r\n", gArmyItemChoices[cnt].ubChoices );
for (int i=0;i<50;i++)
FilePrintf(hFile,"\t\t<bItemNo%d>%d</bItemNo%d>\r\n",i+1,gArmyItemChoices[cnt].bItemNo[i],i+1 );
FilePrintf(hFile,"\t</ENEMYITEMCHOICES>\r\n");
}
FilePrintf(hFile,"</ENEMYITEMCHOICESLIST>\r\n");
}
FileClose( hFile );
return( TRUE );
}
| [
"jazz_ja@b41f55df-6250-4c49-8e33-4aa727ad62a1"
] | jazz_ja@b41f55df-6250-4c49-8e33-4aa727ad62a1 |
dd9590696bcbbe32541bb5aad98246b33c48e3db | b2b9e4d616a6d1909f845e15b6eaa878faa9605a | /POJ/poj3619.cpp | 4706c27e63ac33f1798b5a83b939c7611dc4c549 | [] | no_license | JinbaoWeb/ACM | db2a852816d2f4e395086b2b7f2fdebbb4b56837 | 021b0c8d9c96c1bc6e10374ea98d0706d7b509e1 | refs/heads/master | 2021-01-18T22:32:50.894840 | 2016-06-14T07:07:51 | 2016-06-14T07:07:51 | 55,882,694 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 281 | cpp | #include <iostream>
using namespace std;
int main(){
int n,k,s,t,r;
cin>>n>>k;
for (int i=0;i<k;i++){
cin>>s>>t>>r;
int page=n;
int time=0;
while (page>s*t){
time=time+t+r;
page-=s*t;
}
time+=page/s;
if (page%s)
time++;
cout<<time<<endl;
}
return 0;
} | [
"[email protected]"
] | |
a46a1af300504254558f0da7f0c25cbc53f0a47c | e34ee045bb718a08858b5e2fac080cf2707480eb | /QtOpenGL/src/moc_mainwindow.cpp | c4f952dc7330b919d5fa943226358c762ade71e8 | [] | no_license | imac2018/project | f70ac37fb8be92420f9e975cd6d6507fe77c418b | c5cf41e662a4f1f169a6452411f509d6ec84fa43 | refs/heads/master | 2021-01-11T01:04:48.479860 | 2017-03-19T14:38:23 | 2017-03-19T14:38:23 | 70,843,759 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 3,621 | cpp | /****************************************************************************
** Meta object code from reading C++ file 'mainwindow.h'
**
** Created by: The Qt Meta Object Compiler version 67 (Qt 5.4.1)
**
** WARNING! All changes made in this file will be lost!
*****************************************************************************/
#include "mainwindow.h"
#include <QtCore/qbytearray.h>
#include <QtCore/qmetatype.h>
#if !defined(Q_MOC_OUTPUT_REVISION)
#error "The header file 'mainwindow.h' doesn't include <QObject>."
#elif Q_MOC_OUTPUT_REVISION != 67
#error "This file was generated using the moc from 5.4.1. It"
#error "cannot be used with the include files from this version of Qt."
#error "(The moc has changed too much.)"
#endif
QT_BEGIN_MOC_NAMESPACE
struct qt_meta_stringdata_MainWindow_t {
QByteArrayData data[5];
char stringdata[43];
};
#define QT_MOC_LITERAL(idx, ofs, len) \
Q_STATIC_BYTE_ARRAY_DATA_HEADER_INITIALIZER_WITH_OFFSET(len, \
qptrdiff(offsetof(qt_meta_stringdata_MainWindow_t, stringdata) + ofs \
- idx * sizeof(QByteArrayData)) \
)
static const qt_meta_stringdata_MainWindow_t qt_meta_stringdata_MainWindow = {
{
QT_MOC_LITERAL(0, 0, 10), // "MainWindow"
QT_MOC_LITERAL(1, 11, 10), // "showNormal"
QT_MOC_LITERAL(2, 22, 0), // ""
QT_MOC_LITERAL(3, 23, 14), // "showFullScreen"
QT_MOC_LITERAL(4, 38, 4) // "show"
},
"MainWindow\0showNormal\0\0showFullScreen\0"
"show"
};
#undef QT_MOC_LITERAL
static const uint qt_meta_data_MainWindow[] = {
// content:
7, // revision
0, // classname
0, 0, // classinfo
3, 14, // methods
0, 0, // properties
0, 0, // enums/sets
0, 0, // constructors
0, // flags
0, // signalCount
// slots: name, argc, parameters, tag, flags
1, 0, 29, 2, 0x0a /* Public */,
3, 0, 30, 2, 0x0a /* Public */,
4, 0, 31, 2, 0x0a /* Public */,
// slots: parameters
QMetaType::Void,
QMetaType::Void,
QMetaType::Void,
0 // eod
};
void MainWindow::qt_static_metacall(QObject *_o, QMetaObject::Call _c, int _id, void **_a)
{
if (_c == QMetaObject::InvokeMetaMethod) {
MainWindow *_t = static_cast<MainWindow *>(_o);
switch (_id) {
case 0: _t->showNormal(); break;
case 1: _t->showFullScreen(); break;
case 2: _t->show(); break;
default: ;
}
}
Q_UNUSED(_a);
}
const QMetaObject MainWindow::staticMetaObject = {
{ &QMainWindow::staticMetaObject, qt_meta_stringdata_MainWindow.data,
qt_meta_data_MainWindow, qt_static_metacall, Q_NULLPTR, Q_NULLPTR}
};
const QMetaObject *MainWindow::metaObject() const
{
return QObject::d_ptr->metaObject ? QObject::d_ptr->dynamicMetaObject() : &staticMetaObject;
}
void *MainWindow::qt_metacast(const char *_clname)
{
if (!_clname) return Q_NULLPTR;
if (!strcmp(_clname, qt_meta_stringdata_MainWindow.stringdata))
return static_cast<void*>(const_cast< MainWindow*>(this));
return QMainWindow::qt_metacast(_clname);
}
int MainWindow::qt_metacall(QMetaObject::Call _c, int _id, void **_a)
{
_id = QMainWindow::qt_metacall(_c, _id, _a);
if (_id < 0)
return _id;
if (_c == QMetaObject::InvokeMetaMethod) {
if (_id < 3)
qt_static_metacall(this, _c, _id, _a);
_id -= 3;
} else if (_c == QMetaObject::RegisterMethodArgumentMetaType) {
if (_id < 3)
*reinterpret_cast<int*>(_a[0]) = -1;
_id -= 3;
}
return _id;
}
QT_END_MOC_NAMESPACE
| [
"[email protected]"
] | |
deedbdfa157cda28663d5ecd24b3bc4a3c9ff81e | 983557eb9e806e16d193a0f50a9cd9f80bdfb964 | /sprout/functional/hash/hash.hpp | 28b8117751f899c87c9813a087ccf9cb2294049c | [
"BSL-1.0"
] | permissive | filthy-faith/Sprout | 0675e10ed784dfb9aa430e0837f7d13fbd932eea | 9b9956f81098d0c6296710452c7812af26fd48e6 | refs/heads/master | 2020-04-09T01:55:04.608298 | 2012-10-13T13:11:32 | 2012-10-13T13:11:32 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 9,953 | hpp | #ifndef SPROUT_FUNCTIONAL_HASH_HASH_HPP
#define SPROUT_FUNCTIONAL_HASH_HASH_HPP
#include <cstddef>
#include <limits>
#include <type_traits>
#include <sprout/config.hpp>
#include <sprout/iterator/operation.hpp>
#include <sprout/functional/hash/hash_fwd.hpp>
#include <sprout/type_traits/enabler_if.hpp>
namespace sprout {
//
// hash_value
//
inline SPROUT_CONSTEXPR std::size_t hash_value(bool v);
inline SPROUT_CONSTEXPR std::size_t hash_value(char v);
inline SPROUT_CONSTEXPR std::size_t hash_value(unsigned char v);
inline SPROUT_CONSTEXPR std::size_t hash_value(signed char v);
inline SPROUT_CONSTEXPR std::size_t hash_value(char16_t v);
inline SPROUT_CONSTEXPR std::size_t hash_value(char32_t v);
inline SPROUT_CONSTEXPR std::size_t hash_value(wchar_t v);
inline SPROUT_CONSTEXPR std::size_t hash_value(short v);
inline SPROUT_CONSTEXPR std::size_t hash_value(unsigned short v);
inline SPROUT_CONSTEXPR std::size_t hash_value(int v);
inline SPROUT_CONSTEXPR std::size_t hash_value(unsigned int v);
inline SPROUT_CONSTEXPR std::size_t hash_value(long v);
inline SPROUT_CONSTEXPR std::size_t hash_value(unsigned long v);
inline SPROUT_CONSTEXPR std::size_t hash_value(long long v);
inline SPROUT_CONSTEXPR std::size_t hash_value(unsigned long long v);
//inline SPROUT_CONSTEXPR std::size_t hash_value(float v);
//inline SPROUT_CONSTEXPR std::size_t hash_value(double v);
//inline SPROUT_CONSTEXPR std::size_t hash_value(long double v);
template<
typename T,
typename sprout::enabler_if<std::is_pointer<typename std::remove_reference<T>::type>::value>::type
>
inline SPROUT_CONSTEXPR std::size_t hash_value(T&& v);
template<typename T, std::size_t N>
inline SPROUT_CONSTEXPR std::size_t hash_value(T const (&v)[N]);
namespace hash_detail {
template<typename T>
inline SPROUT_CONSTEXPR std::size_t
hash_value_signed_2(T val, int length, std::size_t seed, T positive, std::size_t i) {
return i > 0
? hash_value_signed_2(
val,
length,
seed ^ static_cast<std::size_t>((positive >> i) + (seed << 6) + (seed >> 2)),
positive,
i - std::numeric_limits<std::size_t>::digits
)
: seed ^ static_cast<std::size_t>(val + (seed << 6) + (seed >> 2))
;
}
template<typename T>
inline SPROUT_CONSTEXPR std::size_t
hash_value_signed_1(T val, int length, std::size_t seed, T positive) {
return hash_value_signed_2(val, length, seed, positive, length * std::numeric_limits<std::size_t>::digits);
}
template<typename T>
inline SPROUT_CONSTEXPR std::size_t
hash_value_signed(T val) {
return sprout::hash_detail::hash_value_signed_1(
val,
(std::numeric_limits<T>::digits - 1) / std::numeric_limits<std::size_t>::digits,
0,
val < 0 ? -1 - val : val
);
}
template<typename T>
inline SPROUT_CONSTEXPR std::size_t
hash_value_unsigned_2(T val, int length, std::size_t seed, std::size_t i) {
return i > 0
? hash_value_unsigned_2(
val,
length,
seed ^ static_cast<std::size_t>((val >> i) + (seed << 6) + (seed >> 2)),
i - std::numeric_limits<std::size_t>::digits
)
: seed ^ static_cast<std::size_t>(val + (seed << 6) + (seed >> 2))
;
}
template<typename T>
inline SPROUT_CONSTEXPR std::size_t
hash_value_unsigned_1(T val, int length, std::size_t seed) {
return hash_value_unsigned_2(val, length, seed, length * std::numeric_limits<std::size_t>::digits);
}
template<typename T>
inline SPROUT_CONSTEXPR std::size_t
hash_value_unsigned(T val) {
return sprout::hash_detail::hash_value_unsigned_1(
val,
(std::numeric_limits<T>::digits - 1) / std::numeric_limits<std::size_t>::digits,
0
);
}
inline std::size_t
hash_value_pointer_1(std::size_t x) {
return x + (x >> 3);
}
template<typename T>
std::size_t
hash_value_pointer(T const* v) {
return sprout::hash_detail::hash_value_pointer_1(static_cast<std::size_t>(reinterpret_cast<std::ptrdiff_t>(v)));
}
} // namespace hash_detail
//
// hash_value
//
inline SPROUT_CONSTEXPR std::size_t
hash_value(bool v) {
return static_cast<std::size_t>(v);
}
inline SPROUT_CONSTEXPR std::size_t
hash_value(char v) {
return static_cast<std::size_t>(v);
}
inline SPROUT_CONSTEXPR std::size_t
hash_value(unsigned char v) {
return static_cast<std::size_t>(v);
}
inline SPROUT_CONSTEXPR std::size_t
hash_value(signed char v) {
return static_cast<std::size_t>(v);
}
inline SPROUT_CONSTEXPR std::size_t
hash_value(char16_t v) {
return static_cast<std::size_t>(v);
}
inline SPROUT_CONSTEXPR std::size_t
hash_value(char32_t v) {
return static_cast<std::size_t>(v);
}
inline SPROUT_CONSTEXPR std::size_t
hash_value(wchar_t v) {
return static_cast<std::size_t>(v);
}
inline SPROUT_CONSTEXPR std::size_t
hash_value(short v) {
return static_cast<std::size_t>(v);
}
inline SPROUT_CONSTEXPR std::size_t
hash_value(unsigned short v) {
return static_cast<std::size_t>(v);
}
inline SPROUT_CONSTEXPR std::size_t
hash_value(int v) {
return static_cast<std::size_t>(v);
}
inline SPROUT_CONSTEXPR std::size_t
hash_value(unsigned int v) {
return static_cast<std::size_t>(v);
}
inline SPROUT_CONSTEXPR std::size_t
hash_value(long v) {
return static_cast<std::size_t>(v);
}
inline SPROUT_CONSTEXPR std::size_t
hash_value(unsigned long v) {
return static_cast<std::size_t>(v);
}
inline SPROUT_CONSTEXPR std::size_t
hash_value(long long v) {
return sprout::hash_detail::hash_value_signed(v);
}
inline SPROUT_CONSTEXPR std::size_t
hash_value(unsigned long long v) {
return sprout::hash_detail::hash_value_unsigned(v);
}
template<
typename T,
typename sprout::enabler_if<std::is_pointer<typename std::remove_reference<T>::type>::value>::type = sprout::enabler
>
inline SPROUT_CONSTEXPR std::size_t
hash_value(T&& v) {
return sprout::hash_detail::hash_value_pointer(v);
}
template<typename T, std::size_t N>
inline SPROUT_CONSTEXPR std::size_t
hash_value(T const (&v)[N]) {
return sprout::hash_range(&v[0], &v[0] + N);
}
//
// to_hash
//
template<typename T>
inline SPROUT_CONSTEXPR std::size_t
to_hash(T const& v) {
using sprout::hash_value;
return hash_value(v);
}
//
// hash_combine
//
template<typename T>
inline SPROUT_CONSTEXPR std::size_t
hash_combine(std::size_t seed, T const& v) {
return seed ^ (sprout::to_hash(v) + 0x9e3779b9 + (seed << 6) + (seed >> 2));
}
//
// hash_range
//
template<typename Iterator>
inline SPROUT_CONSTEXPR std::size_t
hash_range(std::size_t seed, Iterator first, Iterator last) {
return first != last
? sprout::hash_range(sprout::hash_combine(seed, *first), sprout::next(first), last)
: seed
;
}
template<typename Iterator>
inline SPROUT_CONSTEXPR std::size_t
hash_range(Iterator first, Iterator last) {
return sprout::hash_range(0, first, last);
}
namespace detail {
template<typename T>
inline SPROUT_CONSTEXPR std::size_t
hash_values_combine_impl(std::size_t seed, T const& v) {
return sprout::hash_combine(seed, v);
}
template<typename Head, typename... Tail>
inline SPROUT_CONSTEXPR std::size_t
hash_values_combine_impl(std::size_t seed, Head const& head, Tail const&... tail) {
return sprout::detail::hash_values_combine_impl(sprout::hash_combine(seed, head), tail...);
}
} // namespace detail
//
// hash_values_combine
//
template<typename... Args>
inline SPROUT_CONSTEXPR std::size_t
hash_values_combine(std::size_t seed, Args const&... args) {
return sprout::detail::hash_values_combine_impl(seed, args...);
}
//
// hash_values
//
template<typename... Args>
inline SPROUT_CONSTEXPR std::size_t
hash_values(Args const&... args) {
return sprout::hash_values_combine(0, args...);
}
//
// hash
//
template<typename T>
struct hash {
public:
typedef T argument_type;
typedef std::size_t result_type;
public:
SPROUT_CONSTEXPR std::size_t operator()(T const& v) const {
return sprout::to_hash(v);
}
};
template<typename T>
struct hash<T const>
: public sprout::hash<T>
{};
template<typename T>
struct hash<T volatile>
: public sprout::hash<T>
{};
template<typename T>
struct hash<T const volatile>
: public sprout::hash<T>
{};
#define SPROUT_HASH_SPECIALIZE(type) \
template<> \
struct hash<type> { \
public: \
typedef type argument_type; \
typedef std::size_t result_type; \
public: \
SPROUT_CONSTEXPR std::size_t operator()(type v) const { \
return sprout::to_hash(v); \
} \
}
#define SPROUT_HASH_SPECIALIZE_REF(type) \
template<> \
struct hash<type> { \
public: \
typedef type argument_type; \
typedef std::size_t result_type; \
public: \
SPROUT_CONSTEXPR std::size_t operator()(type const& v) const { \
return sprout::to_hash(v); \
} \
}
SPROUT_HASH_SPECIALIZE(bool);
SPROUT_HASH_SPECIALIZE(char);
SPROUT_HASH_SPECIALIZE(signed char);
SPROUT_HASH_SPECIALIZE(unsigned char);
SPROUT_HASH_SPECIALIZE(char16_t);
SPROUT_HASH_SPECIALIZE(char32_t);
SPROUT_HASH_SPECIALIZE(wchar_t);
SPROUT_HASH_SPECIALIZE(short);
SPROUT_HASH_SPECIALIZE(unsigned short);
SPROUT_HASH_SPECIALIZE(int);
SPROUT_HASH_SPECIALIZE(unsigned int);
SPROUT_HASH_SPECIALIZE(long);
SPROUT_HASH_SPECIALIZE(unsigned long);
SPROUT_HASH_SPECIALIZE(long long);
SPROUT_HASH_SPECIALIZE(unsigned long long);
#undef SPROUT_HASH_SPECIALIZE
#undef SPROUT_HASH_SPECIALIZE_REF
template<typename T>
struct hash<T*> {
public:
typedef T* argument_type;
typedef std::size_t result_type;
public:
std::size_t operator()(T* v) const {
return sprout::to_hash(v);
}
};
} //namespace sprout
#endif // #ifndef SPROUT_FUNCTIONAL_HASH_HASH_HPP
| [
"[email protected]"
] | |
1b0bd2b3748dfc5780cfe3842ec4d2acf152f3b2 | aff83fe12ab65a91f15949d22b604eb6a061e82f | /Graph Theory/Telephone Lines/main.cpp | 0972bc9f2e8dfad75cb1acc2a540ae5b1653df61 | [] | no_license | RayLee234/Competitive-Programming-Stuff | e08f0c4f5fe5ecc8b1fb526dac786103cea1875d | 716a9b43095acc979f9e8c9507ee72d3dc19c01f | refs/heads/main | 2023-01-30T00:16:25.458041 | 2020-12-12T20:03:30 | 2020-12-12T20:03:30 | 320,911,144 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,624 | cpp | //
// main.cpp
// Telephone Lines POJ3662
//
// Created by Ruining Li on 2020/8/8.
// Copyright © 2020 Ruining Li. All rights reserved.
//
#include <iostream>
#include <vector>
#include <cstring>
#include <cstdio>
#include <queue>
using namespace std;
int n, p, k, u[10010], v[10010], len[10010], f[10010], ans = 1e6+1;
vector < pair<int,int> > g[1001];
int main() {
scanf("%d %d %d", &n, &p, &k);
for(int i=1;i<=p;++i) scanf("%d %d %d", &u[i], &v[i], &len[i]);
int l = 0, r = 1e6;
while(l <= r) {
int mid = (l+r) >> 1;
for(int i=1;i<=n;++i) g[i].clear();
for(int i=1;i<=p;++i)
if(len[i] > mid) {
g[u[i]].push_back(make_pair(v[i], 1));
g[v[i]].push_back(make_pair(u[i], 1));
}
else {
g[u[i]].push_back(make_pair(v[i], 0));
g[v[i]].push_back(make_pair(u[i], 0));
}
// Calculate shortest path:
deque <int> q;
memset(f, 15, sizeof(f)); f[1] = 0;
q.push_front(1);
while(!q.empty()) {
int now = q.front(); q.pop_front();
for(int i=0;i<g[now].size();++i)
if(f[g[now][i].first] > f[now] + g[now][i].second) {
f[g[now][i].first] = f[now] + g[now][i].second;
if(g[now][i].second == 0) q.push_front(g[now][i].first);
else q.push_back(g[now][i].first);
}
}
if(f[n] <= k) { ans = mid; r = mid-1; }
else l = mid + 1;
}
if(ans > 1e6) puts("-1");
else printf("%d\n", ans);
return 0;
}
| [
"[email protected]"
] | |
e51c7c6bb47d869d06a4c5471d693ae378ca6f12 | fc363ae5bd493763e0870f7005154d93e6f04b42 | /src/chrono_models/vehicle/man/MAN_10t.h | f444687f3500e6759b42011545d21600b5190ec8 | [
"BSD-3-Clause"
] | permissive | aluaces/chrono | 8a148c56c4421a2413fae910fbfa3ab99611286b | 675ff6c1105814973dd7f844bd19385d9760f90c | refs/heads/develop | 2021-12-04T08:15:38.891002 | 2021-11-20T16:43:59 | 2021-11-20T16:43:59 | 46,860,998 | 0 | 0 | null | 2015-11-25T12:43:23 | 2015-11-25T12:43:23 | null | UTF-8 | C++ | false | false | 4,815 | h | // =============================================================================
// PROJECT CHRONO - http://projectchrono.org
//
// Copyright (c) 2014 projectchrono.org
// All right reserved.
//
// Use of this source code is governed by a BSD-style license that can be found
// in the LICENSE file at the top level of the distribution and at
// http://projectchrono.org/license-chrono.txt.
//
// =============================================================================
// Authors: Radu Serban, Asher Elmquist, Evan Hoerl, Shuo He, Rainer Gericke
// =============================================================================
//
// Wrapper classes for modeling an entire MAN 5t vehicle assembly
// (including the vehicle itself, the powertrain, and the tires).
//
// The MAN Kat 1 truck family has been designed for offroad service.
// The development stems from the 60s, the begin of servce was ca. 1976
//
// The model data come from publicly available sources, fora of private Kat 1
// users and the book:
//
// P. Ocker: "MAN - Die Allrad-Alleskönner", Heel Verlag, 1999, ISBN 3-89365-705-3
//
// The 10t (load capacity) version has four driven rigid axles. The model is unloaded.
//
// =============================================================================
#ifndef MAN10T_H
#define MAN10T_H
#include <array>
#include <string>
#include "chrono_models/ChApiModels.h"
#include "chrono_models/vehicle/man/MAN_10t_Vehicle.h"
#include "chrono_models/vehicle/man/MAN_7t_SimpleMapPowertrain.h"
#include "chrono_models/vehicle/man/MAN_7t_SimpleCVTPowertrain.h"
#include "chrono_models/vehicle/man/MAN_5t_TMeasyTire.h"
namespace chrono {
namespace vehicle {
namespace man {
/// @addtogroup vehicle_models_man
/// @{
/// Wrapper class for modeling an entire MAN 10t vehicle assembly
/// (including the vehicle itself, the powertrain, and the tires).
class CH_MODELS_API MAN_10t {
public:
MAN_10t();
MAN_10t(ChSystem* system);
~MAN_10t();
void SetContactMethod(ChContactMethod val) { m_contactMethod = val; }
void SetChassisFixed(bool val) { m_fixed = val; }
void SetChassisCollisionType(CollisionType val) { m_chassisCollisionType = val; }
void SetDriveline8WD(bool val) { m_use_8WD_drivetrain = val; }
void SetPowertrainType(PowertrainModelType val) { m_powertrainType = val; }
void SetBrakeType(BrakeType brake_type) { m_brake_type = brake_type; }
void SetTireType(TireModelType val) { m_tireType = val; }
void SetInitPosition(const ChCoordsys<>& pos) { m_initPos = pos; }
void SetInitFwdVel(double fwdVel) { m_initFwdVel = fwdVel; }
void SetInitWheelAngVel(const std::vector<double>& omega) { m_initOmega = omega; }
void SetTireStepSize(double step_size) { m_tire_step_size = step_size; }
void EnableBrakeLocking(bool lock) { m_brake_locking = lock; }
ChSystem* GetSystem() const { return m_vehicle->GetSystem(); }
ChWheeledVehicle& GetVehicle() const { return *m_vehicle; }
std::shared_ptr<ChChassis> GetChassis() const { return m_vehicle->GetChassis(); }
std::shared_ptr<ChBodyAuxRef> GetChassisBody() const { return m_vehicle->GetChassisBody(); }
std::shared_ptr<ChPowertrain> GetPowertrain() const { return m_vehicle->GetPowertrain(); }
double GetTotalMass() const;
void Initialize();
void SetAerodynamicDrag(double Cd, double area, double air_density);
void SetChassisVisualizationType(VisualizationType vis) { m_vehicle->SetChassisVisualizationType(vis); }
void SetSuspensionVisualizationType(VisualizationType vis) { m_vehicle->SetSuspensionVisualizationType(vis); }
void SetSteeringVisualizationType(VisualizationType vis) { m_vehicle->SetSteeringVisualizationType(vis); }
void SetWheelVisualizationType(VisualizationType vis) { m_vehicle->SetWheelVisualizationType(vis); }
void SetTireVisualizationType(VisualizationType vis);
void Synchronize(double time, const ChDriver::Inputs& driver_inputs, const ChTerrain& terrain);
void Advance(double step);
void LogHardpointLocations() { m_vehicle->LogHardpointLocations(); }
void DebugLog(int what) { m_vehicle->DebugLog(what); }
protected:
ChContactMethod m_contactMethod;
CollisionType m_chassisCollisionType;
bool m_fixed;
bool m_brake_locking;
PowertrainModelType m_powertrainType;
BrakeType m_brake_type;
TireModelType m_tireType;
bool m_use_8WD_drivetrain;
double m_tire_step_size;
ChCoordsys<> m_initPos;
double m_initFwdVel;
std::vector<double> m_initOmega;
bool m_apply_drag;
double m_Cd;
double m_area;
double m_air_density;
ChSystem* m_system;
MAN_10t_Vehicle* m_vehicle;
double m_tire_mass;
};
/// @} vehicle_models_man
} // namespace man
} // end namespace vehicle
} // end namespace chrono
#endif
| [
"[email protected]"
] | |
736be6f9aac0b35bd8e5eac78d32496cf3e624a4 | c7ccfd9de1692aafaa5ee576980e7381e52cb346 | /sourceCode/2.2/Samples and Benchmarks/Server Wizard/Server Wizard/Templates/1033/stdafx.h | e6d118272499313c48fceb54f62807d27af4b624 | [] | no_license | chenzuo/PushFramework | c3f98eac2dad75dca5da1e13382627b3bff35285 | a1a2a63cdc7517499e165dde68373bccca6e24d3 | refs/heads/master | 2020-03-23T18:18:22.176058 | 2018-09-06T05:52:26 | 2018-09-06T05:52:26 | 141,900,087 | 2 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,070 | h | // stdafx.h : include file for standard system include files,
// or project specific include files that are used frequently, but
// are changed infrequently
//
#pragma once
#include "Plateform.h"
#ifdef Plateform_Windows
#include "targetver.h"
#include <Windows.h>
#endif
#include <stdio.h>
#include <ctype.h>
#include <iostream>
#include <fstream>
#include <string.h>
#include <string>
#include <map>
#include <vector>
#include <set>
using namespace std;
#include <PushFrameworkInc.h>
using namespace PushFramework;
#include <google/protobuf/stubs/common.h>
#include <google/protobuf/generated_message_util.h>
#include <google/protobuf/repeated_field.h>
#include <google/protobuf/extension_set.h>
#include <google/protobuf/generated_message_reflection.h>
using namespace google;
#include "generated/messages.pb.h"
using namespace messages;
bool BroadcastPacket(protobuf::Message* pMessage, BROADCASTQUEUE_NAME channelName);
bool BroadcastPacket(protobuf::Message* pMessage, BROADCASTQUEUE_NAME channelName, BROADCASTPACKET_KEY killKey, int objectCategory);
| [
"[email protected]"
] | |
e095bd8f1c53811377c326a0538f4085b198f777 | 3fde0e2c26ae7e0a4cd4c57013ba0daeddc43097 | /1 Cruise/Cruise.cydsn/codegentemp/cydevicerv_trm.inc | fecb8c593601fb97430379420dac72913f2beb00 | [] | no_license | jiayuebao/Intelligent-Robot-Design | 155d908db78fd72deee0dc1e0ba1bbfac3386c30 | dac97baaa78867750e3a40774c7490f5cbf77d35 | refs/heads/master | 2020-04-17T21:28:55.783719 | 2019-01-23T16:36:35 | 2019-01-23T16:36:35 | 166,951,707 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 642,915 | inc | ;
; File Name: cydevicerv_trm.inc
;
; PSoC Creator 3.3 CP1
;
; Description:
; This file provides all of the address values for the entire PSoC device.
;
;-------------------------------------------------------------------------------
; Copyright (c) 2007-2015 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.
;-------------------------------------------------------------------------------
IF :LNOT::DEF:CYDEV_FLASH_BASE
CYDEV_FLASH_BASE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYDEV_FLASH_SIZE
CYDEV_FLASH_SIZE EQU 0x00008000
ENDIF
IF :LNOT::DEF:CYREG_FLASH_DATA_MBASE
CYREG_FLASH_DATA_MBASE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYREG_FLASH_DATA_MSIZE
CYREG_FLASH_DATA_MSIZE EQU 0x00008000
ENDIF
IF :LNOT::DEF:CYDEV_SFLASH_BASE
CYDEV_SFLASH_BASE EQU 0x0ffff000
ENDIF
IF :LNOT::DEF:CYDEV_SFLASH_SIZE
CYDEV_SFLASH_SIZE EQU 0x00000200
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW00
CYREG_SFLASH_PROT_ROW00 EQU 0x0ffff000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_DATA8__OFFSET
CYFLD_SFLASH_DATA8__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_DATA8__SIZE
CYFLD_SFLASH_DATA8__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW01
CYREG_SFLASH_PROT_ROW01 EQU 0x0ffff001
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW02
CYREG_SFLASH_PROT_ROW02 EQU 0x0ffff002
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW03
CYREG_SFLASH_PROT_ROW03 EQU 0x0ffff003
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW04
CYREG_SFLASH_PROT_ROW04 EQU 0x0ffff004
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW05
CYREG_SFLASH_PROT_ROW05 EQU 0x0ffff005
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW06
CYREG_SFLASH_PROT_ROW06 EQU 0x0ffff006
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW07
CYREG_SFLASH_PROT_ROW07 EQU 0x0ffff007
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW08
CYREG_SFLASH_PROT_ROW08 EQU 0x0ffff008
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW09
CYREG_SFLASH_PROT_ROW09 EQU 0x0ffff009
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW10
CYREG_SFLASH_PROT_ROW10 EQU 0x0ffff00a
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW11
CYREG_SFLASH_PROT_ROW11 EQU 0x0ffff00b
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW12
CYREG_SFLASH_PROT_ROW12 EQU 0x0ffff00c
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW13
CYREG_SFLASH_PROT_ROW13 EQU 0x0ffff00d
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW14
CYREG_SFLASH_PROT_ROW14 EQU 0x0ffff00e
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW15
CYREG_SFLASH_PROT_ROW15 EQU 0x0ffff00f
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW16
CYREG_SFLASH_PROT_ROW16 EQU 0x0ffff010
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW17
CYREG_SFLASH_PROT_ROW17 EQU 0x0ffff011
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW18
CYREG_SFLASH_PROT_ROW18 EQU 0x0ffff012
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW19
CYREG_SFLASH_PROT_ROW19 EQU 0x0ffff013
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW20
CYREG_SFLASH_PROT_ROW20 EQU 0x0ffff014
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW21
CYREG_SFLASH_PROT_ROW21 EQU 0x0ffff015
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW22
CYREG_SFLASH_PROT_ROW22 EQU 0x0ffff016
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW23
CYREG_SFLASH_PROT_ROW23 EQU 0x0ffff017
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW24
CYREG_SFLASH_PROT_ROW24 EQU 0x0ffff018
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW25
CYREG_SFLASH_PROT_ROW25 EQU 0x0ffff019
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW26
CYREG_SFLASH_PROT_ROW26 EQU 0x0ffff01a
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW27
CYREG_SFLASH_PROT_ROW27 EQU 0x0ffff01b
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW28
CYREG_SFLASH_PROT_ROW28 EQU 0x0ffff01c
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW29
CYREG_SFLASH_PROT_ROW29 EQU 0x0ffff01d
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW30
CYREG_SFLASH_PROT_ROW30 EQU 0x0ffff01e
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW31
CYREG_SFLASH_PROT_ROW31 EQU 0x0ffff01f
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW32
CYREG_SFLASH_PROT_ROW32 EQU 0x0ffff020
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW33
CYREG_SFLASH_PROT_ROW33 EQU 0x0ffff021
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW34
CYREG_SFLASH_PROT_ROW34 EQU 0x0ffff022
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW35
CYREG_SFLASH_PROT_ROW35 EQU 0x0ffff023
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW36
CYREG_SFLASH_PROT_ROW36 EQU 0x0ffff024
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW37
CYREG_SFLASH_PROT_ROW37 EQU 0x0ffff025
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW38
CYREG_SFLASH_PROT_ROW38 EQU 0x0ffff026
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW39
CYREG_SFLASH_PROT_ROW39 EQU 0x0ffff027
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW40
CYREG_SFLASH_PROT_ROW40 EQU 0x0ffff028
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW41
CYREG_SFLASH_PROT_ROW41 EQU 0x0ffff029
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW42
CYREG_SFLASH_PROT_ROW42 EQU 0x0ffff02a
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW43
CYREG_SFLASH_PROT_ROW43 EQU 0x0ffff02b
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW44
CYREG_SFLASH_PROT_ROW44 EQU 0x0ffff02c
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW45
CYREG_SFLASH_PROT_ROW45 EQU 0x0ffff02d
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW46
CYREG_SFLASH_PROT_ROW46 EQU 0x0ffff02e
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW47
CYREG_SFLASH_PROT_ROW47 EQU 0x0ffff02f
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW48
CYREG_SFLASH_PROT_ROW48 EQU 0x0ffff030
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW49
CYREG_SFLASH_PROT_ROW49 EQU 0x0ffff031
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW50
CYREG_SFLASH_PROT_ROW50 EQU 0x0ffff032
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW51
CYREG_SFLASH_PROT_ROW51 EQU 0x0ffff033
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW52
CYREG_SFLASH_PROT_ROW52 EQU 0x0ffff034
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW53
CYREG_SFLASH_PROT_ROW53 EQU 0x0ffff035
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW54
CYREG_SFLASH_PROT_ROW54 EQU 0x0ffff036
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW55
CYREG_SFLASH_PROT_ROW55 EQU 0x0ffff037
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW56
CYREG_SFLASH_PROT_ROW56 EQU 0x0ffff038
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW57
CYREG_SFLASH_PROT_ROW57 EQU 0x0ffff039
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW58
CYREG_SFLASH_PROT_ROW58 EQU 0x0ffff03a
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW59
CYREG_SFLASH_PROT_ROW59 EQU 0x0ffff03b
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW60
CYREG_SFLASH_PROT_ROW60 EQU 0x0ffff03c
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW61
CYREG_SFLASH_PROT_ROW61 EQU 0x0ffff03d
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW62
CYREG_SFLASH_PROT_ROW62 EQU 0x0ffff03e
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW63
CYREG_SFLASH_PROT_ROW63 EQU 0x0ffff03f
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_PROTECTION
CYREG_SFLASH_PROT_PROTECTION EQU 0x0ffff07f
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_PROT_LEVEL__OFFSET
CYFLD_SFLASH_PROT_LEVEL__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_PROT_LEVEL__SIZE
CYFLD_SFLASH_PROT_LEVEL__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_SFLASH_PROT_LEVEL_VIRGIN
CYVAL_SFLASH_PROT_LEVEL_VIRGIN EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_SFLASH_PROT_LEVEL_OPEN
CYVAL_SFLASH_PROT_LEVEL_OPEN EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_SFLASH_PROT_LEVEL_PROTECTED
CYVAL_SFLASH_PROT_LEVEL_PROTECTED EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_SFLASH_PROT_LEVEL_KILL
CYVAL_SFLASH_PROT_LEVEL_KILL EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B000
CYREG_SFLASH_AV_PAIRS_8B000 EQU 0x0ffff080
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B001
CYREG_SFLASH_AV_PAIRS_8B001 EQU 0x0ffff081
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B002
CYREG_SFLASH_AV_PAIRS_8B002 EQU 0x0ffff082
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B003
CYREG_SFLASH_AV_PAIRS_8B003 EQU 0x0ffff083
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B004
CYREG_SFLASH_AV_PAIRS_8B004 EQU 0x0ffff084
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B005
CYREG_SFLASH_AV_PAIRS_8B005 EQU 0x0ffff085
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B006
CYREG_SFLASH_AV_PAIRS_8B006 EQU 0x0ffff086
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B007
CYREG_SFLASH_AV_PAIRS_8B007 EQU 0x0ffff087
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B008
CYREG_SFLASH_AV_PAIRS_8B008 EQU 0x0ffff088
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B009
CYREG_SFLASH_AV_PAIRS_8B009 EQU 0x0ffff089
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B010
CYREG_SFLASH_AV_PAIRS_8B010 EQU 0x0ffff08a
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B011
CYREG_SFLASH_AV_PAIRS_8B011 EQU 0x0ffff08b
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B012
CYREG_SFLASH_AV_PAIRS_8B012 EQU 0x0ffff08c
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B013
CYREG_SFLASH_AV_PAIRS_8B013 EQU 0x0ffff08d
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B014
CYREG_SFLASH_AV_PAIRS_8B014 EQU 0x0ffff08e
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B015
CYREG_SFLASH_AV_PAIRS_8B015 EQU 0x0ffff08f
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B016
CYREG_SFLASH_AV_PAIRS_8B016 EQU 0x0ffff090
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B017
CYREG_SFLASH_AV_PAIRS_8B017 EQU 0x0ffff091
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B018
CYREG_SFLASH_AV_PAIRS_8B018 EQU 0x0ffff092
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B019
CYREG_SFLASH_AV_PAIRS_8B019 EQU 0x0ffff093
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B020
CYREG_SFLASH_AV_PAIRS_8B020 EQU 0x0ffff094
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B021
CYREG_SFLASH_AV_PAIRS_8B021 EQU 0x0ffff095
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B022
CYREG_SFLASH_AV_PAIRS_8B022 EQU 0x0ffff096
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B023
CYREG_SFLASH_AV_PAIRS_8B023 EQU 0x0ffff097
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B024
CYREG_SFLASH_AV_PAIRS_8B024 EQU 0x0ffff098
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B025
CYREG_SFLASH_AV_PAIRS_8B025 EQU 0x0ffff099
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B026
CYREG_SFLASH_AV_PAIRS_8B026 EQU 0x0ffff09a
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B027
CYREG_SFLASH_AV_PAIRS_8B027 EQU 0x0ffff09b
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B028
CYREG_SFLASH_AV_PAIRS_8B028 EQU 0x0ffff09c
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B029
CYREG_SFLASH_AV_PAIRS_8B029 EQU 0x0ffff09d
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B030
CYREG_SFLASH_AV_PAIRS_8B030 EQU 0x0ffff09e
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B031
CYREG_SFLASH_AV_PAIRS_8B031 EQU 0x0ffff09f
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B032
CYREG_SFLASH_AV_PAIRS_8B032 EQU 0x0ffff0a0
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B033
CYREG_SFLASH_AV_PAIRS_8B033 EQU 0x0ffff0a1
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B034
CYREG_SFLASH_AV_PAIRS_8B034 EQU 0x0ffff0a2
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B035
CYREG_SFLASH_AV_PAIRS_8B035 EQU 0x0ffff0a3
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B036
CYREG_SFLASH_AV_PAIRS_8B036 EQU 0x0ffff0a4
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B037
CYREG_SFLASH_AV_PAIRS_8B037 EQU 0x0ffff0a5
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B038
CYREG_SFLASH_AV_PAIRS_8B038 EQU 0x0ffff0a6
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B039
CYREG_SFLASH_AV_PAIRS_8B039 EQU 0x0ffff0a7
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B040
CYREG_SFLASH_AV_PAIRS_8B040 EQU 0x0ffff0a8
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B041
CYREG_SFLASH_AV_PAIRS_8B041 EQU 0x0ffff0a9
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B042
CYREG_SFLASH_AV_PAIRS_8B042 EQU 0x0ffff0aa
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B043
CYREG_SFLASH_AV_PAIRS_8B043 EQU 0x0ffff0ab
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B044
CYREG_SFLASH_AV_PAIRS_8B044 EQU 0x0ffff0ac
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B045
CYREG_SFLASH_AV_PAIRS_8B045 EQU 0x0ffff0ad
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B046
CYREG_SFLASH_AV_PAIRS_8B046 EQU 0x0ffff0ae
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B047
CYREG_SFLASH_AV_PAIRS_8B047 EQU 0x0ffff0af
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B048
CYREG_SFLASH_AV_PAIRS_8B048 EQU 0x0ffff0b0
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B049
CYREG_SFLASH_AV_PAIRS_8B049 EQU 0x0ffff0b1
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B050
CYREG_SFLASH_AV_PAIRS_8B050 EQU 0x0ffff0b2
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B051
CYREG_SFLASH_AV_PAIRS_8B051 EQU 0x0ffff0b3
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B052
CYREG_SFLASH_AV_PAIRS_8B052 EQU 0x0ffff0b4
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B053
CYREG_SFLASH_AV_PAIRS_8B053 EQU 0x0ffff0b5
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B054
CYREG_SFLASH_AV_PAIRS_8B054 EQU 0x0ffff0b6
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B055
CYREG_SFLASH_AV_PAIRS_8B055 EQU 0x0ffff0b7
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B056
CYREG_SFLASH_AV_PAIRS_8B056 EQU 0x0ffff0b8
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B057
CYREG_SFLASH_AV_PAIRS_8B057 EQU 0x0ffff0b9
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B058
CYREG_SFLASH_AV_PAIRS_8B058 EQU 0x0ffff0ba
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B059
CYREG_SFLASH_AV_PAIRS_8B059 EQU 0x0ffff0bb
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B060
CYREG_SFLASH_AV_PAIRS_8B060 EQU 0x0ffff0bc
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B061
CYREG_SFLASH_AV_PAIRS_8B061 EQU 0x0ffff0bd
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B062
CYREG_SFLASH_AV_PAIRS_8B062 EQU 0x0ffff0be
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B063
CYREG_SFLASH_AV_PAIRS_8B063 EQU 0x0ffff0bf
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B064
CYREG_SFLASH_AV_PAIRS_8B064 EQU 0x0ffff0c0
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B065
CYREG_SFLASH_AV_PAIRS_8B065 EQU 0x0ffff0c1
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B066
CYREG_SFLASH_AV_PAIRS_8B066 EQU 0x0ffff0c2
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B067
CYREG_SFLASH_AV_PAIRS_8B067 EQU 0x0ffff0c3
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B068
CYREG_SFLASH_AV_PAIRS_8B068 EQU 0x0ffff0c4
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B069
CYREG_SFLASH_AV_PAIRS_8B069 EQU 0x0ffff0c5
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B070
CYREG_SFLASH_AV_PAIRS_8B070 EQU 0x0ffff0c6
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B071
CYREG_SFLASH_AV_PAIRS_8B071 EQU 0x0ffff0c7
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B072
CYREG_SFLASH_AV_PAIRS_8B072 EQU 0x0ffff0c8
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B073
CYREG_SFLASH_AV_PAIRS_8B073 EQU 0x0ffff0c9
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B074
CYREG_SFLASH_AV_PAIRS_8B074 EQU 0x0ffff0ca
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B075
CYREG_SFLASH_AV_PAIRS_8B075 EQU 0x0ffff0cb
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B076
CYREG_SFLASH_AV_PAIRS_8B076 EQU 0x0ffff0cc
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B077
CYREG_SFLASH_AV_PAIRS_8B077 EQU 0x0ffff0cd
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B078
CYREG_SFLASH_AV_PAIRS_8B078 EQU 0x0ffff0ce
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B079
CYREG_SFLASH_AV_PAIRS_8B079 EQU 0x0ffff0cf
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B080
CYREG_SFLASH_AV_PAIRS_8B080 EQU 0x0ffff0d0
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B081
CYREG_SFLASH_AV_PAIRS_8B081 EQU 0x0ffff0d1
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B082
CYREG_SFLASH_AV_PAIRS_8B082 EQU 0x0ffff0d2
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B083
CYREG_SFLASH_AV_PAIRS_8B083 EQU 0x0ffff0d3
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B084
CYREG_SFLASH_AV_PAIRS_8B084 EQU 0x0ffff0d4
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B085
CYREG_SFLASH_AV_PAIRS_8B085 EQU 0x0ffff0d5
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B086
CYREG_SFLASH_AV_PAIRS_8B086 EQU 0x0ffff0d6
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B087
CYREG_SFLASH_AV_PAIRS_8B087 EQU 0x0ffff0d7
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B088
CYREG_SFLASH_AV_PAIRS_8B088 EQU 0x0ffff0d8
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B089
CYREG_SFLASH_AV_PAIRS_8B089 EQU 0x0ffff0d9
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B090
CYREG_SFLASH_AV_PAIRS_8B090 EQU 0x0ffff0da
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B091
CYREG_SFLASH_AV_PAIRS_8B091 EQU 0x0ffff0db
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B092
CYREG_SFLASH_AV_PAIRS_8B092 EQU 0x0ffff0dc
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B093
CYREG_SFLASH_AV_PAIRS_8B093 EQU 0x0ffff0dd
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B094
CYREG_SFLASH_AV_PAIRS_8B094 EQU 0x0ffff0de
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B095
CYREG_SFLASH_AV_PAIRS_8B095 EQU 0x0ffff0df
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B096
CYREG_SFLASH_AV_PAIRS_8B096 EQU 0x0ffff0e0
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B097
CYREG_SFLASH_AV_PAIRS_8B097 EQU 0x0ffff0e1
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B098
CYREG_SFLASH_AV_PAIRS_8B098 EQU 0x0ffff0e2
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B099
CYREG_SFLASH_AV_PAIRS_8B099 EQU 0x0ffff0e3
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B100
CYREG_SFLASH_AV_PAIRS_8B100 EQU 0x0ffff0e4
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B101
CYREG_SFLASH_AV_PAIRS_8B101 EQU 0x0ffff0e5
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B102
CYREG_SFLASH_AV_PAIRS_8B102 EQU 0x0ffff0e6
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B103
CYREG_SFLASH_AV_PAIRS_8B103 EQU 0x0ffff0e7
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B104
CYREG_SFLASH_AV_PAIRS_8B104 EQU 0x0ffff0e8
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B105
CYREG_SFLASH_AV_PAIRS_8B105 EQU 0x0ffff0e9
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B106
CYREG_SFLASH_AV_PAIRS_8B106 EQU 0x0ffff0ea
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B107
CYREG_SFLASH_AV_PAIRS_8B107 EQU 0x0ffff0eb
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B108
CYREG_SFLASH_AV_PAIRS_8B108 EQU 0x0ffff0ec
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B109
CYREG_SFLASH_AV_PAIRS_8B109 EQU 0x0ffff0ed
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B110
CYREG_SFLASH_AV_PAIRS_8B110 EQU 0x0ffff0ee
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B111
CYREG_SFLASH_AV_PAIRS_8B111 EQU 0x0ffff0ef
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B112
CYREG_SFLASH_AV_PAIRS_8B112 EQU 0x0ffff0f0
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B113
CYREG_SFLASH_AV_PAIRS_8B113 EQU 0x0ffff0f1
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B114
CYREG_SFLASH_AV_PAIRS_8B114 EQU 0x0ffff0f2
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B115
CYREG_SFLASH_AV_PAIRS_8B115 EQU 0x0ffff0f3
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B116
CYREG_SFLASH_AV_PAIRS_8B116 EQU 0x0ffff0f4
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B117
CYREG_SFLASH_AV_PAIRS_8B117 EQU 0x0ffff0f5
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B118
CYREG_SFLASH_AV_PAIRS_8B118 EQU 0x0ffff0f6
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B119
CYREG_SFLASH_AV_PAIRS_8B119 EQU 0x0ffff0f7
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B120
CYREG_SFLASH_AV_PAIRS_8B120 EQU 0x0ffff0f8
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B121
CYREG_SFLASH_AV_PAIRS_8B121 EQU 0x0ffff0f9
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B122
CYREG_SFLASH_AV_PAIRS_8B122 EQU 0x0ffff0fa
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B123
CYREG_SFLASH_AV_PAIRS_8B123 EQU 0x0ffff0fb
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B124
CYREG_SFLASH_AV_PAIRS_8B124 EQU 0x0ffff0fc
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B125
CYREG_SFLASH_AV_PAIRS_8B125 EQU 0x0ffff0fd
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B126
CYREG_SFLASH_AV_PAIRS_8B126 EQU 0x0ffff0fe
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B127
CYREG_SFLASH_AV_PAIRS_8B127 EQU 0x0ffff0ff
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B00
CYREG_SFLASH_AV_PAIRS_32B00 EQU 0x0ffff100
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_DATA32__OFFSET
CYFLD_SFLASH_DATA32__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_DATA32__SIZE
CYFLD_SFLASH_DATA32__SIZE EQU 0x00000020
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B01
CYREG_SFLASH_AV_PAIRS_32B01 EQU 0x0ffff104
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B02
CYREG_SFLASH_AV_PAIRS_32B02 EQU 0x0ffff108
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B03
CYREG_SFLASH_AV_PAIRS_32B03 EQU 0x0ffff10c
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B04
CYREG_SFLASH_AV_PAIRS_32B04 EQU 0x0ffff110
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B05
CYREG_SFLASH_AV_PAIRS_32B05 EQU 0x0ffff114
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B06
CYREG_SFLASH_AV_PAIRS_32B06 EQU 0x0ffff118
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B07
CYREG_SFLASH_AV_PAIRS_32B07 EQU 0x0ffff11c
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B08
CYREG_SFLASH_AV_PAIRS_32B08 EQU 0x0ffff120
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B09
CYREG_SFLASH_AV_PAIRS_32B09 EQU 0x0ffff124
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B10
CYREG_SFLASH_AV_PAIRS_32B10 EQU 0x0ffff128
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B11
CYREG_SFLASH_AV_PAIRS_32B11 EQU 0x0ffff12c
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B12
CYREG_SFLASH_AV_PAIRS_32B12 EQU 0x0ffff130
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B13
CYREG_SFLASH_AV_PAIRS_32B13 EQU 0x0ffff134
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B14
CYREG_SFLASH_AV_PAIRS_32B14 EQU 0x0ffff138
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B15
CYREG_SFLASH_AV_PAIRS_32B15 EQU 0x0ffff13c
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_CPUSS_WOUNDING
CYREG_SFLASH_CPUSS_WOUNDING EQU 0x0ffff140
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_SILICON_ID
CYREG_SFLASH_SILICON_ID EQU 0x0ffff144
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_ID__OFFSET
CYFLD_SFLASH_ID__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_ID__SIZE
CYFLD_SFLASH_ID__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_CPUSS_PRIV_RAM
CYREG_SFLASH_CPUSS_PRIV_RAM EQU 0x0ffff148
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_CPUSS_PRIV_FLASH
CYREG_SFLASH_CPUSS_PRIV_FLASH EQU 0x0ffff14c
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_HIB_KEY_DELAY
CYREG_SFLASH_HIB_KEY_DELAY EQU 0x0ffff150
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_WAKEUP_HOLDOFF__OFFSET
CYFLD_SFLASH_WAKEUP_HOLDOFF__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_WAKEUP_HOLDOFF__SIZE
CYFLD_SFLASH_WAKEUP_HOLDOFF__SIZE EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_DPSLP_KEY_DELAY
CYREG_SFLASH_DPSLP_KEY_DELAY EQU 0x0ffff152
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_SWD_CONFIG
CYREG_SFLASH_SWD_CONFIG EQU 0x0ffff154
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_SWD_SELECT__OFFSET
CYFLD_SFLASH_SWD_SELECT__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_SWD_SELECT__SIZE
CYFLD_SFLASH_SWD_SELECT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_SWD_LISTEN
CYREG_SFLASH_SWD_LISTEN EQU 0x0ffff158
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_CYCLES__OFFSET
CYFLD_SFLASH_CYCLES__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_CYCLES__SIZE
CYFLD_SFLASH_CYCLES__SIZE EQU 0x00000020
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_FLASH_START
CYREG_SFLASH_FLASH_START EQU 0x0ffff15c
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_ADDRESS__OFFSET
CYFLD_SFLASH_ADDRESS__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_ADDRESS__SIZE
CYFLD_SFLASH_ADDRESS__SIZE EQU 0x00000020
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_CSD_TRIM1_HVIDAC
CYREG_SFLASH_CSD_TRIM1_HVIDAC EQU 0x0ffff160
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_TRIM8__OFFSET
CYFLD_SFLASH_TRIM8__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_TRIM8__SIZE
CYFLD_SFLASH_TRIM8__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_CSD_TRIM2_HVIDAC
CYREG_SFLASH_CSD_TRIM2_HVIDAC EQU 0x0ffff161
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_CSD_TRIM1_CSD
CYREG_SFLASH_CSD_TRIM1_CSD EQU 0x0ffff162
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_CSD_TRIM2_CSD
CYREG_SFLASH_CSD_TRIM2_CSD EQU 0x0ffff163
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_SAR_TEMP_MULTIPLIER
CYREG_SFLASH_SAR_TEMP_MULTIPLIER EQU 0x0ffff164
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_TEMP_MULTIPLIER__OFFSET
CYFLD_SFLASH_TEMP_MULTIPLIER__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_TEMP_MULTIPLIER__SIZE
CYFLD_SFLASH_TEMP_MULTIPLIER__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_SAR_TEMP_OFFSET
CYREG_SFLASH_SAR_TEMP_OFFSET EQU 0x0ffff166
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_TEMP_OFFSET__OFFSET
CYFLD_SFLASH_TEMP_OFFSET__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_TEMP_OFFSET__SIZE
CYFLD_SFLASH_TEMP_OFFSET__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_SKIP_CHECKSUM
CYREG_SFLASH_SKIP_CHECKSUM EQU 0x0ffff169
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_SKIP__OFFSET
CYFLD_SFLASH_SKIP__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_SKIP__SIZE
CYFLD_SFLASH_SKIP__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_VIRGINKEY0
CYREG_SFLASH_PROT_VIRGINKEY0 EQU 0x0ffff170
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_KEY8__OFFSET
CYFLD_SFLASH_KEY8__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_KEY8__SIZE
CYFLD_SFLASH_KEY8__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_VIRGINKEY1
CYREG_SFLASH_PROT_VIRGINKEY1 EQU 0x0ffff171
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_VIRGINKEY2
CYREG_SFLASH_PROT_VIRGINKEY2 EQU 0x0ffff172
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_VIRGINKEY3
CYREG_SFLASH_PROT_VIRGINKEY3 EQU 0x0ffff173
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_VIRGINKEY4
CYREG_SFLASH_PROT_VIRGINKEY4 EQU 0x0ffff174
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_VIRGINKEY5
CYREG_SFLASH_PROT_VIRGINKEY5 EQU 0x0ffff175
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_VIRGINKEY6
CYREG_SFLASH_PROT_VIRGINKEY6 EQU 0x0ffff176
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PROT_VIRGINKEY7
CYREG_SFLASH_PROT_VIRGINKEY7 EQU 0x0ffff177
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_DIE_LOT0
CYREG_SFLASH_DIE_LOT0 EQU 0x0ffff178
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_LOT__OFFSET
CYFLD_SFLASH_LOT__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_LOT__SIZE
CYFLD_SFLASH_LOT__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_DIE_LOT1
CYREG_SFLASH_DIE_LOT1 EQU 0x0ffff179
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_DIE_LOT2
CYREG_SFLASH_DIE_LOT2 EQU 0x0ffff17a
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_DIE_WAFER
CYREG_SFLASH_DIE_WAFER EQU 0x0ffff17b
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_WAFER__OFFSET
CYFLD_SFLASH_WAFER__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_WAFER__SIZE
CYFLD_SFLASH_WAFER__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_DIE_X
CYREG_SFLASH_DIE_X EQU 0x0ffff17c
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_X__OFFSET
CYFLD_SFLASH_X__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_X__SIZE
CYFLD_SFLASH_X__SIZE EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_CRI_PASS__OFFSET
CYFLD_SFLASH_CRI_PASS__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_CRI_PASS__SIZE
CYFLD_SFLASH_CRI_PASS__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_DIE_Y
CYREG_SFLASH_DIE_Y EQU 0x0ffff17d
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_Y__OFFSET
CYFLD_SFLASH_Y__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_Y__SIZE
CYFLD_SFLASH_Y__SIZE EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_CHI_PASS__OFFSET
CYFLD_SFLASH_CHI_PASS__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_CHI_PASS__SIZE
CYFLD_SFLASH_CHI_PASS__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_DIE_SORT
CYREG_SFLASH_DIE_SORT EQU 0x0ffff17e
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_S1_PASS__OFFSET
CYFLD_SFLASH_S1_PASS__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_S1_PASS__SIZE
CYFLD_SFLASH_S1_PASS__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_S2_PASS__OFFSET
CYFLD_SFLASH_S2_PASS__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_S2_PASS__SIZE
CYFLD_SFLASH_S2_PASS__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_S3_PASS__OFFSET
CYFLD_SFLASH_S3_PASS__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_S3_PASS__SIZE
CYFLD_SFLASH_S3_PASS__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_DIE_MINOR
CYREG_SFLASH_DIE_MINOR EQU 0x0ffff17f
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_MINOR__OFFSET
CYFLD_SFLASH_MINOR__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_MINOR__SIZE
CYFLD_SFLASH_MINOR__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA00
CYREG_SFLASH_PE_TE_DATA00 EQU 0x0ffff180
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA01
CYREG_SFLASH_PE_TE_DATA01 EQU 0x0ffff181
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA02
CYREG_SFLASH_PE_TE_DATA02 EQU 0x0ffff182
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA03
CYREG_SFLASH_PE_TE_DATA03 EQU 0x0ffff183
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA04
CYREG_SFLASH_PE_TE_DATA04 EQU 0x0ffff184
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA05
CYREG_SFLASH_PE_TE_DATA05 EQU 0x0ffff185
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA06
CYREG_SFLASH_PE_TE_DATA06 EQU 0x0ffff186
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA07
CYREG_SFLASH_PE_TE_DATA07 EQU 0x0ffff187
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA08
CYREG_SFLASH_PE_TE_DATA08 EQU 0x0ffff188
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA09
CYREG_SFLASH_PE_TE_DATA09 EQU 0x0ffff189
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA10
CYREG_SFLASH_PE_TE_DATA10 EQU 0x0ffff18a
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA11
CYREG_SFLASH_PE_TE_DATA11 EQU 0x0ffff18b
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA12
CYREG_SFLASH_PE_TE_DATA12 EQU 0x0ffff18c
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA13
CYREG_SFLASH_PE_TE_DATA13 EQU 0x0ffff18d
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA14
CYREG_SFLASH_PE_TE_DATA14 EQU 0x0ffff18e
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA15
CYREG_SFLASH_PE_TE_DATA15 EQU 0x0ffff18f
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA16
CYREG_SFLASH_PE_TE_DATA16 EQU 0x0ffff190
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA17
CYREG_SFLASH_PE_TE_DATA17 EQU 0x0ffff191
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA18
CYREG_SFLASH_PE_TE_DATA18 EQU 0x0ffff192
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA19
CYREG_SFLASH_PE_TE_DATA19 EQU 0x0ffff193
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA20
CYREG_SFLASH_PE_TE_DATA20 EQU 0x0ffff194
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA21
CYREG_SFLASH_PE_TE_DATA21 EQU 0x0ffff195
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA22
CYREG_SFLASH_PE_TE_DATA22 EQU 0x0ffff196
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA23
CYREG_SFLASH_PE_TE_DATA23 EQU 0x0ffff197
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA24
CYREG_SFLASH_PE_TE_DATA24 EQU 0x0ffff198
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA25
CYREG_SFLASH_PE_TE_DATA25 EQU 0x0ffff199
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA26
CYREG_SFLASH_PE_TE_DATA26 EQU 0x0ffff19a
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA27
CYREG_SFLASH_PE_TE_DATA27 EQU 0x0ffff19b
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA28
CYREG_SFLASH_PE_TE_DATA28 EQU 0x0ffff19c
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA29
CYREG_SFLASH_PE_TE_DATA29 EQU 0x0ffff19d
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA30
CYREG_SFLASH_PE_TE_DATA30 EQU 0x0ffff19e
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA31
CYREG_SFLASH_PE_TE_DATA31 EQU 0x0ffff19f
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_PP
CYREG_SFLASH_PP EQU 0x0ffff1a0
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_PERIOD__OFFSET
CYFLD_SFLASH_PERIOD__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_PERIOD__SIZE
CYFLD_SFLASH_PERIOD__SIZE EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_PDAC__OFFSET
CYFLD_SFLASH_PDAC__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_PDAC__SIZE
CYFLD_SFLASH_PDAC__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_NDAC__OFFSET
CYFLD_SFLASH_NDAC__OFFSET EQU 0x0000001c
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_NDAC__SIZE
CYFLD_SFLASH_NDAC__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_E
CYREG_SFLASH_E EQU 0x0ffff1a4
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_P
CYREG_SFLASH_P EQU 0x0ffff1a8
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_EA_E
CYREG_SFLASH_EA_E EQU 0x0ffff1ac
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_EA_P
CYREG_SFLASH_EA_P EQU 0x0ffff1b0
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_ES_E
CYREG_SFLASH_ES_E EQU 0x0ffff1b4
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_ES_P_EO
CYREG_SFLASH_ES_P_EO EQU 0x0ffff1b8
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_E_VCTAT
CYREG_SFLASH_E_VCTAT EQU 0x0ffff1bc
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_VCTAT_SLOPE__OFFSET
CYFLD_SFLASH_VCTAT_SLOPE__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_VCTAT_SLOPE__SIZE
CYFLD_SFLASH_VCTAT_SLOPE__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_VCTAT_VOLTAGE__OFFSET
CYFLD_SFLASH_VCTAT_VOLTAGE__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_VCTAT_VOLTAGE__SIZE
CYFLD_SFLASH_VCTAT_VOLTAGE__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_VCTAT_ENABLE__OFFSET
CYFLD_SFLASH_VCTAT_ENABLE__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_VCTAT_ENABLE__SIZE
CYFLD_SFLASH_VCTAT_ENABLE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_P_VCTAT
CYREG_SFLASH_P_VCTAT EQU 0x0ffff1bd
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_MARGIN
CYREG_SFLASH_MARGIN EQU 0x0ffff1be
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_MDAC__OFFSET
CYFLD_SFLASH_MDAC__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_MDAC__SIZE
CYFLD_SFLASH_MDAC__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_SPCIF_TRIM1
CYREG_SFLASH_SPCIF_TRIM1 EQU 0x0ffff1bf
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_BDAC__OFFSET
CYFLD_SFLASH_BDAC__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_BDAC__SIZE
CYFLD_SFLASH_BDAC__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_MAXF0
CYREG_SFLASH_IMO_MAXF0 EQU 0x0ffff1c0
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_MAXFREQ__OFFSET
CYFLD_SFLASH_MAXFREQ__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_MAXFREQ__SIZE
CYFLD_SFLASH_MAXFREQ__SIZE EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_ABS0
CYREG_SFLASH_IMO_ABS0 EQU 0x0ffff1c1
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_ABS_TRIM_IMO__OFFSET
CYFLD_SFLASH_ABS_TRIM_IMO__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_ABS_TRIM_IMO__SIZE
CYFLD_SFLASH_ABS_TRIM_IMO__SIZE EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TMPCO0
CYREG_SFLASH_IMO_TMPCO0 EQU 0x0ffff1c2
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_TMPCO_TRIM_IMO__OFFSET
CYFLD_SFLASH_TMPCO_TRIM_IMO__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_TMPCO_TRIM_IMO__SIZE
CYFLD_SFLASH_TMPCO_TRIM_IMO__SIZE EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_MAXF1
CYREG_SFLASH_IMO_MAXF1 EQU 0x0ffff1c3
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_ABS1
CYREG_SFLASH_IMO_ABS1 EQU 0x0ffff1c4
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TMPCO1
CYREG_SFLASH_IMO_TMPCO1 EQU 0x0ffff1c5
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_MAXF2
CYREG_SFLASH_IMO_MAXF2 EQU 0x0ffff1c6
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_ABS2
CYREG_SFLASH_IMO_ABS2 EQU 0x0ffff1c7
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TMPCO2
CYREG_SFLASH_IMO_TMPCO2 EQU 0x0ffff1c8
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_MAXF3
CYREG_SFLASH_IMO_MAXF3 EQU 0x0ffff1c9
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_ABS3
CYREG_SFLASH_IMO_ABS3 EQU 0x0ffff1ca
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TMPCO3
CYREG_SFLASH_IMO_TMPCO3 EQU 0x0ffff1cb
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_ABS4
CYREG_SFLASH_IMO_ABS4 EQU 0x0ffff1cc
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TMPCO4
CYREG_SFLASH_IMO_TMPCO4 EQU 0x0ffff1cd
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM00
CYREG_SFLASH_IMO_TRIM00 EQU 0x0ffff1d0
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_OFFSET__OFFSET
CYFLD_SFLASH_OFFSET__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_OFFSET__SIZE
CYFLD_SFLASH_OFFSET__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM01
CYREG_SFLASH_IMO_TRIM01 EQU 0x0ffff1d1
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM02
CYREG_SFLASH_IMO_TRIM02 EQU 0x0ffff1d2
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM03
CYREG_SFLASH_IMO_TRIM03 EQU 0x0ffff1d3
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM04
CYREG_SFLASH_IMO_TRIM04 EQU 0x0ffff1d4
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM05
CYREG_SFLASH_IMO_TRIM05 EQU 0x0ffff1d5
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM06
CYREG_SFLASH_IMO_TRIM06 EQU 0x0ffff1d6
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM07
CYREG_SFLASH_IMO_TRIM07 EQU 0x0ffff1d7
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM08
CYREG_SFLASH_IMO_TRIM08 EQU 0x0ffff1d8
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM09
CYREG_SFLASH_IMO_TRIM09 EQU 0x0ffff1d9
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM10
CYREG_SFLASH_IMO_TRIM10 EQU 0x0ffff1da
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM11
CYREG_SFLASH_IMO_TRIM11 EQU 0x0ffff1db
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM12
CYREG_SFLASH_IMO_TRIM12 EQU 0x0ffff1dc
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM13
CYREG_SFLASH_IMO_TRIM13 EQU 0x0ffff1dd
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM14
CYREG_SFLASH_IMO_TRIM14 EQU 0x0ffff1de
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM15
CYREG_SFLASH_IMO_TRIM15 EQU 0x0ffff1df
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM16
CYREG_SFLASH_IMO_TRIM16 EQU 0x0ffff1e0
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM17
CYREG_SFLASH_IMO_TRIM17 EQU 0x0ffff1e1
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM18
CYREG_SFLASH_IMO_TRIM18 EQU 0x0ffff1e2
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM19
CYREG_SFLASH_IMO_TRIM19 EQU 0x0ffff1e3
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM20
CYREG_SFLASH_IMO_TRIM20 EQU 0x0ffff1e4
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM21
CYREG_SFLASH_IMO_TRIM21 EQU 0x0ffff1e5
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM22
CYREG_SFLASH_IMO_TRIM22 EQU 0x0ffff1e6
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM23
CYREG_SFLASH_IMO_TRIM23 EQU 0x0ffff1e7
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM24
CYREG_SFLASH_IMO_TRIM24 EQU 0x0ffff1e8
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM25
CYREG_SFLASH_IMO_TRIM25 EQU 0x0ffff1e9
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM26
CYREG_SFLASH_IMO_TRIM26 EQU 0x0ffff1ea
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM27
CYREG_SFLASH_IMO_TRIM27 EQU 0x0ffff1eb
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM28
CYREG_SFLASH_IMO_TRIM28 EQU 0x0ffff1ec
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM29
CYREG_SFLASH_IMO_TRIM29 EQU 0x0ffff1ed
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM30
CYREG_SFLASH_IMO_TRIM30 EQU 0x0ffff1ee
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM31
CYREG_SFLASH_IMO_TRIM31 EQU 0x0ffff1ef
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM32
CYREG_SFLASH_IMO_TRIM32 EQU 0x0ffff1f0
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM33
CYREG_SFLASH_IMO_TRIM33 EQU 0x0ffff1f1
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM34
CYREG_SFLASH_IMO_TRIM34 EQU 0x0ffff1f2
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM35
CYREG_SFLASH_IMO_TRIM35 EQU 0x0ffff1f3
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM36
CYREG_SFLASH_IMO_TRIM36 EQU 0x0ffff1f4
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM37
CYREG_SFLASH_IMO_TRIM37 EQU 0x0ffff1f5
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM38
CYREG_SFLASH_IMO_TRIM38 EQU 0x0ffff1f6
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM39
CYREG_SFLASH_IMO_TRIM39 EQU 0x0ffff1f7
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM40
CYREG_SFLASH_IMO_TRIM40 EQU 0x0ffff1f8
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM41
CYREG_SFLASH_IMO_TRIM41 EQU 0x0ffff1f9
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM42
CYREG_SFLASH_IMO_TRIM42 EQU 0x0ffff1fa
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM43
CYREG_SFLASH_IMO_TRIM43 EQU 0x0ffff1fb
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM44
CYREG_SFLASH_IMO_TRIM44 EQU 0x0ffff1fc
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM45
CYREG_SFLASH_IMO_TRIM45 EQU 0x0ffff1fd
ENDIF
IF :LNOT::DEF:CYREG_SFLASH_CHECKSUM
CYREG_SFLASH_CHECKSUM EQU 0x0ffff1fe
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_CHECKSUM__OFFSET
CYFLD_SFLASH_CHECKSUM__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SFLASH_CHECKSUM__SIZE
CYFLD_SFLASH_CHECKSUM__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYDEV_SROM_BASE
CYDEV_SROM_BASE EQU 0x10000000
ENDIF
IF :LNOT::DEF:CYDEV_SROM_SIZE
CYDEV_SROM_SIZE EQU 0x00001000
ENDIF
IF :LNOT::DEF:CYREG_SROM_DATA_MBASE
CYREG_SROM_DATA_MBASE EQU 0x10000000
ENDIF
IF :LNOT::DEF:CYREG_SROM_DATA_MSIZE
CYREG_SROM_DATA_MSIZE EQU 0x00001000
ENDIF
IF :LNOT::DEF:CYDEV_SRAM_BASE
CYDEV_SRAM_BASE EQU 0x20000000
ENDIF
IF :LNOT::DEF:CYDEV_SRAM_SIZE
CYDEV_SRAM_SIZE EQU 0x00001000
ENDIF
IF :LNOT::DEF:CYREG_SRAM_DATA_MBASE
CYREG_SRAM_DATA_MBASE EQU 0x20000000
ENDIF
IF :LNOT::DEF:CYREG_SRAM_DATA_MSIZE
CYREG_SRAM_DATA_MSIZE EQU 0x00001000
ENDIF
IF :LNOT::DEF:CYDEV_CPUSS_BASE
CYDEV_CPUSS_BASE EQU 0x40000000
ENDIF
IF :LNOT::DEF:CYDEV_CPUSS_SIZE
CYDEV_CPUSS_SIZE EQU 0x00010000
ENDIF
IF :LNOT::DEF:CYREG_CPUSS_CONFIG
CYREG_CPUSS_CONFIG EQU 0x40000000
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_VECS_IN_RAM__OFFSET
CYFLD_CPUSS_VECS_IN_RAM__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_VECS_IN_RAM__SIZE
CYFLD_CPUSS_VECS_IN_RAM__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_FLSH_ACC_BYPASS__OFFSET
CYFLD_CPUSS_FLSH_ACC_BYPASS__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_FLSH_ACC_BYPASS__SIZE
CYFLD_CPUSS_FLSH_ACC_BYPASS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CPUSS_SYSREQ
CYREG_CPUSS_SYSREQ EQU 0x40000004
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_COMMAND__OFFSET
CYFLD_CPUSS_COMMAND__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_COMMAND__SIZE
CYFLD_CPUSS_COMMAND__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_NO_RST_OVR__OFFSET
CYFLD_CPUSS_NO_RST_OVR__OFFSET EQU 0x0000001b
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_NO_RST_OVR__SIZE
CYFLD_CPUSS_NO_RST_OVR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_PRIVILEGED__OFFSET
CYFLD_CPUSS_PRIVILEGED__OFFSET EQU 0x0000001c
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_PRIVILEGED__SIZE
CYFLD_CPUSS_PRIVILEGED__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_ROM_ACCESS_EN__OFFSET
CYFLD_CPUSS_ROM_ACCESS_EN__OFFSET EQU 0x0000001d
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_ROM_ACCESS_EN__SIZE
CYFLD_CPUSS_ROM_ACCESS_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_HMASTER__OFFSET
CYFLD_CPUSS_HMASTER__OFFSET EQU 0x0000001e
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_HMASTER__SIZE
CYFLD_CPUSS_HMASTER__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_SYSREQ__OFFSET
CYFLD_CPUSS_SYSREQ__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_SYSREQ__SIZE
CYFLD_CPUSS_SYSREQ__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CPUSS_SYSARG
CYREG_CPUSS_SYSARG EQU 0x40000008
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_ARG32__OFFSET
CYFLD_CPUSS_ARG32__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_ARG32__SIZE
CYFLD_CPUSS_ARG32__SIZE EQU 0x00000020
ENDIF
IF :LNOT::DEF:CYREG_CPUSS_PROTECTION
CYREG_CPUSS_PROTECTION EQU 0x4000000c
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_PROT__OFFSET
CYFLD_CPUSS_PROT__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_PROT__SIZE
CYFLD_CPUSS_PROT__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_CPUSS_PROT_VIRGIN
CYVAL_CPUSS_PROT_VIRGIN EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_CPUSS_PROT_OPEN
CYVAL_CPUSS_PROT_OPEN EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_CPUSS_PROT_PROTECTED
CYVAL_CPUSS_PROT_PROTECTED EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_CPUSS_PROT_KILL
CYVAL_CPUSS_PROT_KILL EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_CPUSS_PROT_BOOT
CYVAL_CPUSS_PROT_BOOT EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_PROT_LOCK__OFFSET
CYFLD_CPUSS_PROT_LOCK__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_PROT_LOCK__SIZE
CYFLD_CPUSS_PROT_LOCK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CPUSS_PRIV_ROM
CYREG_CPUSS_PRIV_ROM EQU 0x40000010
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_ROM_LIMIT__OFFSET
CYFLD_CPUSS_ROM_LIMIT__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_ROM_LIMIT__SIZE
CYFLD_CPUSS_ROM_LIMIT__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_CPUSS_PRIV_RAM
CYREG_CPUSS_PRIV_RAM EQU 0x40000014
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_RAM_LIMIT__OFFSET
CYFLD_CPUSS_RAM_LIMIT__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_RAM_LIMIT__SIZE
CYFLD_CPUSS_RAM_LIMIT__SIZE EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYREG_CPUSS_PRIV_FLASH
CYREG_CPUSS_PRIV_FLASH EQU 0x40000018
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_FLASH_LIMIT__OFFSET
CYFLD_CPUSS_FLASH_LIMIT__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_FLASH_LIMIT__SIZE
CYFLD_CPUSS_FLASH_LIMIT__SIZE EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYREG_CPUSS_WOUNDING
CYREG_CPUSS_WOUNDING EQU 0x4000001c
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_RAM_SIZE__OFFSET
CYFLD_CPUSS_RAM_SIZE__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_RAM_SIZE__SIZE
CYFLD_CPUSS_RAM_SIZE__SIZE EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_RAM_WOUND__OFFSET
CYFLD_CPUSS_RAM_WOUND__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_RAM_WOUND__SIZE
CYFLD_CPUSS_RAM_WOUND__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_CPUSS_RAM_WOUND_FULL
CYVAL_CPUSS_RAM_WOUND_FULL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_CPUSS_RAM_WOUND_DIV_BY_2
CYVAL_CPUSS_RAM_WOUND_DIV_BY_2 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_CPUSS_RAM_WOUND_DIV_BY_4
CYVAL_CPUSS_RAM_WOUND_DIV_BY_4 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_CPUSS_RAM_WOUND_DIV_BY_8
CYVAL_CPUSS_RAM_WOUND_DIV_BY_8 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_CPUSS_RAM_WOUND_DIV_BY_16
CYVAL_CPUSS_RAM_WOUND_DIV_BY_16 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_CPUSS_RAM_WOUND_DIV_BY_32
CYVAL_CPUSS_RAM_WOUND_DIV_BY_32 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_CPUSS_RAM_WOUND_DIV_BY_64
CYVAL_CPUSS_RAM_WOUND_DIV_BY_64 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_CPUSS_RAM_WOUND_DIV_BY_128
CYVAL_CPUSS_RAM_WOUND_DIV_BY_128 EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_FLASH_WOUND__OFFSET
CYFLD_CPUSS_FLASH_WOUND__OFFSET EQU 0x00000014
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_FLASH_WOUND__SIZE
CYFLD_CPUSS_FLASH_WOUND__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_CPUSS_FLASH_WOUND_FULL
CYVAL_CPUSS_FLASH_WOUND_FULL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_CPUSS_FLASH_WOUND_DIV_BY_2
CYVAL_CPUSS_FLASH_WOUND_DIV_BY_2 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_CPUSS_FLASH_WOUND_DIV_BY_4
CYVAL_CPUSS_FLASH_WOUND_DIV_BY_4 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_CPUSS_FLASH_WOUND_DIV_BY_8
CYVAL_CPUSS_FLASH_WOUND_DIV_BY_8 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_CPUSS_FLASH_WOUND_DIV_BY_16
CYVAL_CPUSS_FLASH_WOUND_DIV_BY_16 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_CPUSS_FLASH_WOUND_DIV_BY_32
CYVAL_CPUSS_FLASH_WOUND_DIV_BY_32 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_CPUSS_FLASH_WOUND_DIV_BY_64
CYVAL_CPUSS_FLASH_WOUND_DIV_BY_64 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_CPUSS_FLASH_WOUND_DIV_BY_128
CYVAL_CPUSS_FLASH_WOUND_DIV_BY_128 EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYREG_CPUSS_INTR_SELECT
CYREG_CPUSS_INTR_SELECT EQU 0x40000020
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_SELECT32__OFFSET
CYFLD_CPUSS_SELECT32__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CPUSS_SELECT32__SIZE
CYFLD_CPUSS_SELECT32__SIZE EQU 0x00000020
ENDIF
IF :LNOT::DEF:CYDEV_HSIOM_BASE
CYDEV_HSIOM_BASE EQU 0x40010000
ENDIF
IF :LNOT::DEF:CYDEV_HSIOM_SIZE
CYDEV_HSIOM_SIZE EQU 0x00001000
ENDIF
IF :LNOT::DEF:CYREG_HSIOM_PORT_SEL0
CYREG_HSIOM_PORT_SEL0 EQU 0x40010000
ENDIF
IF :LNOT::DEF:CYFLD_HSIOM_SEL0__OFFSET
CYFLD_HSIOM_SEL0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_HSIOM_SEL0__SIZE
CYFLD_HSIOM_SEL0__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL0_GPIO
CYVAL_HSIOM_SEL0_GPIO EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL0_GPIO_DSI
CYVAL_HSIOM_SEL0_GPIO_DSI EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL0_DSI_DSI
CYVAL_HSIOM_SEL0_DSI_DSI EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL0_DSI_GPIO
CYVAL_HSIOM_SEL0_DSI_GPIO EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL0_CSD_SENSE
CYVAL_HSIOM_SEL0_CSD_SENSE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL0_CSD_SHIELD
CYVAL_HSIOM_SEL0_CSD_SHIELD EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL0_AMUXA
CYVAL_HSIOM_SEL0_AMUXA EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL0_AMUXB
CYVAL_HSIOM_SEL0_AMUXB EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL0_ACT_0
CYVAL_HSIOM_SEL0_ACT_0 EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL0_ACT_1
CYVAL_HSIOM_SEL0_ACT_1 EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL0_ACT_2
CYVAL_HSIOM_SEL0_ACT_2 EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL0_ACT_3
CYVAL_HSIOM_SEL0_ACT_3 EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL0_LCD_COM
CYVAL_HSIOM_SEL0_LCD_COM EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL0_LCD_SEG
CYVAL_HSIOM_SEL0_LCD_SEG EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL0_DPSLP_0
CYVAL_HSIOM_SEL0_DPSLP_0 EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL0_DPSLP_1
CYVAL_HSIOM_SEL0_DPSLP_1 EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL0_COMP1_INP
CYVAL_HSIOM_SEL0_COMP1_INP EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL0_SCB0_SPI_SSEL1
CYVAL_HSIOM_SEL0_SCB0_SPI_SSEL1 EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD_HSIOM_SEL1__OFFSET
CYFLD_HSIOM_SEL1__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_HSIOM_SEL1__SIZE
CYFLD_HSIOM_SEL1__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL1_COMP1_INN
CYVAL_HSIOM_SEL1_COMP1_INN EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL1_SCB0_SPI_SSEL2
CYVAL_HSIOM_SEL1_SCB0_SPI_SSEL2 EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD_HSIOM_SEL2__OFFSET
CYFLD_HSIOM_SEL2__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_HSIOM_SEL2__SIZE
CYFLD_HSIOM_SEL2__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL2_COMP2_INP
CYVAL_HSIOM_SEL2_COMP2_INP EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL2_SCB0_SPI_SSEL3
CYVAL_HSIOM_SEL2_SCB0_SPI_SSEL3 EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD_HSIOM_SEL3__OFFSET
CYFLD_HSIOM_SEL3__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD_HSIOM_SEL3__SIZE
CYFLD_HSIOM_SEL3__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL3_COMP2_INN
CYVAL_HSIOM_SEL3_COMP2_INN EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_HSIOM_SEL4__OFFSET
CYFLD_HSIOM_SEL4__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_HSIOM_SEL4__SIZE
CYFLD_HSIOM_SEL4__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL4_SCB1_UART_RX
CYVAL_HSIOM_SEL4_SCB1_UART_RX EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL4_SCB1_I2C_SCL
CYVAL_HSIOM_SEL4_SCB1_I2C_SCL EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL4_SCB1_SPI_MOSI
CYVAL_HSIOM_SEL4_SCB1_SPI_MOSI EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD_HSIOM_SEL5__OFFSET
CYFLD_HSIOM_SEL5__OFFSET EQU 0x00000014
ENDIF
IF :LNOT::DEF:CYFLD_HSIOM_SEL5__SIZE
CYFLD_HSIOM_SEL5__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL5_SCB1_UART_TX
CYVAL_HSIOM_SEL5_SCB1_UART_TX EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL5_SCB1_I2C_SDA
CYVAL_HSIOM_SEL5_SCB1_I2C_SDA EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL5_SCB1_SPI_MISO
CYVAL_HSIOM_SEL5_SCB1_SPI_MISO EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD_HSIOM_SEL6__OFFSET
CYFLD_HSIOM_SEL6__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_HSIOM_SEL6__SIZE
CYFLD_HSIOM_SEL6__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL6_EXT_CLK
CYVAL_HSIOM_SEL6_EXT_CLK EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL6_SCB1_SPI_CLK
CYVAL_HSIOM_SEL6_SCB1_SPI_CLK EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD_HSIOM_SEL7__OFFSET
CYFLD_HSIOM_SEL7__OFFSET EQU 0x0000001c
ENDIF
IF :LNOT::DEF:CYFLD_HSIOM_SEL7__SIZE
CYFLD_HSIOM_SEL7__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL7_WAKEUP
CYVAL_HSIOM_SEL7_WAKEUP EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYVAL_HSIOM_SEL7_SCB1_SPI_SSEL0
CYVAL_HSIOM_SEL7_SCB1_SPI_SSEL0 EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYREG_HSIOM_PORT_SEL1
CYREG_HSIOM_PORT_SEL1 EQU 0x40010004
ENDIF
IF :LNOT::DEF:CYREG_HSIOM_PORT_SEL2
CYREG_HSIOM_PORT_SEL2 EQU 0x40010008
ENDIF
IF :LNOT::DEF:CYREG_HSIOM_PORT_SEL3
CYREG_HSIOM_PORT_SEL3 EQU 0x4001000c
ENDIF
IF :LNOT::DEF:CYREG_HSIOM_PORT_SEL4
CYREG_HSIOM_PORT_SEL4 EQU 0x40010010
ENDIF
IF :LNOT::DEF:CYDEV_CLK_BASE
CYDEV_CLK_BASE EQU 0x40020000
ENDIF
IF :LNOT::DEF:CYDEV_CLK_SIZE
CYDEV_CLK_SIZE EQU 0x00010000
ENDIF
IF :LNOT::DEF:CYREG_CLK_DIVIDER_A00
CYREG_CLK_DIVIDER_A00 EQU 0x40020000
ENDIF
IF :LNOT::DEF:CYFLD_CLK_DIVIDER_A__OFFSET
CYFLD_CLK_DIVIDER_A__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CLK_DIVIDER_A__SIZE
CYFLD_CLK_DIVIDER_A__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_CLK_ENABLE_A__OFFSET
CYFLD_CLK_ENABLE_A__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_CLK_ENABLE_A__SIZE
CYFLD_CLK_ENABLE_A__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CLK_DIVIDER_A01
CYREG_CLK_DIVIDER_A01 EQU 0x40020004
ENDIF
IF :LNOT::DEF:CYREG_CLK_DIVIDER_A02
CYREG_CLK_DIVIDER_A02 EQU 0x40020008
ENDIF
IF :LNOT::DEF:CYREG_CLK_DIVIDER_B00
CYREG_CLK_DIVIDER_B00 EQU 0x40020040
ENDIF
IF :LNOT::DEF:CYFLD_CLK_DIVIDER_B__OFFSET
CYFLD_CLK_DIVIDER_B__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CLK_DIVIDER_B__SIZE
CYFLD_CLK_DIVIDER_B__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_CLK_CASCADE_A_B__OFFSET
CYFLD_CLK_CASCADE_A_B__OFFSET EQU 0x0000001e
ENDIF
IF :LNOT::DEF:CYFLD_CLK_CASCADE_A_B__SIZE
CYFLD_CLK_CASCADE_A_B__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CLK_ENABLE_B__OFFSET
CYFLD_CLK_ENABLE_B__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_CLK_ENABLE_B__SIZE
CYFLD_CLK_ENABLE_B__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CLK_DIVIDER_B01
CYREG_CLK_DIVIDER_B01 EQU 0x40020044
ENDIF
IF :LNOT::DEF:CYREG_CLK_DIVIDER_B02
CYREG_CLK_DIVIDER_B02 EQU 0x40020048
ENDIF
IF :LNOT::DEF:CYREG_CLK_DIVIDER_C00
CYREG_CLK_DIVIDER_C00 EQU 0x40020080
ENDIF
IF :LNOT::DEF:CYFLD_CLK_DIVIDER_C__OFFSET
CYFLD_CLK_DIVIDER_C__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CLK_DIVIDER_C__SIZE
CYFLD_CLK_DIVIDER_C__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_CLK_CASCADE_B_C__OFFSET
CYFLD_CLK_CASCADE_B_C__OFFSET EQU 0x0000001e
ENDIF
IF :LNOT::DEF:CYFLD_CLK_CASCADE_B_C__SIZE
CYFLD_CLK_CASCADE_B_C__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CLK_ENABLE_C__OFFSET
CYFLD_CLK_ENABLE_C__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_CLK_ENABLE_C__SIZE
CYFLD_CLK_ENABLE_C__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CLK_DIVIDER_C01
CYREG_CLK_DIVIDER_C01 EQU 0x40020084
ENDIF
IF :LNOT::DEF:CYREG_CLK_DIVIDER_C02
CYREG_CLK_DIVIDER_C02 EQU 0x40020088
ENDIF
IF :LNOT::DEF:CYREG_CLK_DIVIDER_FRAC_A00
CYREG_CLK_DIVIDER_FRAC_A00 EQU 0x40020100
ENDIF
IF :LNOT::DEF:CYFLD_CLK_FRAC_A__OFFSET
CYFLD_CLK_FRAC_A__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_CLK_FRAC_A__SIZE
CYFLD_CLK_FRAC_A__SIZE EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYREG_CLK_DIVIDER_FRAC_B00
CYREG_CLK_DIVIDER_FRAC_B00 EQU 0x40020140
ENDIF
IF :LNOT::DEF:CYFLD_CLK_FRAC_B__OFFSET
CYFLD_CLK_FRAC_B__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_CLK_FRAC_B__SIZE
CYFLD_CLK_FRAC_B__SIZE EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYREG_CLK_DIVIDER_FRAC_C00
CYREG_CLK_DIVIDER_FRAC_C00 EQU 0x40020180
ENDIF
IF :LNOT::DEF:CYFLD_CLK_FRAC_C__OFFSET
CYFLD_CLK_FRAC_C__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_CLK_FRAC_C__SIZE
CYFLD_CLK_FRAC_C__SIZE EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYREG_CLK_SELECT00
CYREG_CLK_SELECT00 EQU 0x40020200
ENDIF
IF :LNOT::DEF:CYFLD_CLK_DIVIDER_N__OFFSET
CYFLD_CLK_DIVIDER_N__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CLK_DIVIDER_N__SIZE
CYFLD_CLK_DIVIDER_N__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_CLK_DIVIDER_ABC__OFFSET
CYFLD_CLK_DIVIDER_ABC__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_CLK_DIVIDER_ABC__SIZE
CYFLD_CLK_DIVIDER_ABC__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_CLK_DIVIDER_ABC_OFF
CYVAL_CLK_DIVIDER_ABC_OFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_CLK_DIVIDER_ABC_A
CYVAL_CLK_DIVIDER_ABC_A EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_CLK_DIVIDER_ABC_B
CYVAL_CLK_DIVIDER_ABC_B EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_CLK_DIVIDER_ABC_C
CYVAL_CLK_DIVIDER_ABC_C EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_CLK_SELECT01
CYREG_CLK_SELECT01 EQU 0x40020204
ENDIF
IF :LNOT::DEF:CYREG_CLK_SELECT02
CYREG_CLK_SELECT02 EQU 0x40020208
ENDIF
IF :LNOT::DEF:CYREG_CLK_SELECT03
CYREG_CLK_SELECT03 EQU 0x4002020c
ENDIF
IF :LNOT::DEF:CYREG_CLK_SELECT04
CYREG_CLK_SELECT04 EQU 0x40020210
ENDIF
IF :LNOT::DEF:CYREG_CLK_SELECT05
CYREG_CLK_SELECT05 EQU 0x40020214
ENDIF
IF :LNOT::DEF:CYREG_CLK_SELECT06
CYREG_CLK_SELECT06 EQU 0x40020218
ENDIF
IF :LNOT::DEF:CYREG_CLK_SELECT07
CYREG_CLK_SELECT07 EQU 0x4002021c
ENDIF
IF :LNOT::DEF:CYREG_CLK_SELECT08
CYREG_CLK_SELECT08 EQU 0x40020220
ENDIF
IF :LNOT::DEF:CYREG_CLK_SELECT09
CYREG_CLK_SELECT09 EQU 0x40020224
ENDIF
IF :LNOT::DEF:CYREG_CLK_SELECT10
CYREG_CLK_SELECT10 EQU 0x40020228
ENDIF
IF :LNOT::DEF:CYREG_CLK_SELECT11
CYREG_CLK_SELECT11 EQU 0x4002022c
ENDIF
IF :LNOT::DEF:CYREG_CLK_SELECT12
CYREG_CLK_SELECT12 EQU 0x40020230
ENDIF
IF :LNOT::DEF:CYREG_CLK_SELECT13
CYREG_CLK_SELECT13 EQU 0x40020234
ENDIF
IF :LNOT::DEF:CYREG_CLK_SELECT14
CYREG_CLK_SELECT14 EQU 0x40020238
ENDIF
IF :LNOT::DEF:CYREG_CLK_SELECT15
CYREG_CLK_SELECT15 EQU 0x4002023c
ENDIF
IF :LNOT::DEF:CYDEV_TST_BASE
CYDEV_TST_BASE EQU 0x40030000
ENDIF
IF :LNOT::DEF:CYDEV_TST_SIZE
CYDEV_TST_SIZE EQU 0x00010000
ENDIF
IF :LNOT::DEF:CYREG_TST_CTRL
CYREG_TST_CTRL EQU 0x40030000
ENDIF
IF :LNOT::DEF:CYFLD_TST_DAP_NO_ACCESS__OFFSET
CYFLD_TST_DAP_NO_ACCESS__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_TST_DAP_NO_ACCESS__SIZE
CYFLD_TST_DAP_NO_ACCESS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TST_DAP_NO_DEBUG__OFFSET
CYFLD_TST_DAP_NO_DEBUG__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TST_DAP_NO_DEBUG__SIZE
CYFLD_TST_DAP_NO_DEBUG__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TST_SWD_CONNECTED__OFFSET
CYFLD_TST_SWD_CONNECTED__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_TST_SWD_CONNECTED__SIZE
CYFLD_TST_SWD_CONNECTED__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TST_TEST_RESET_EN_N__OFFSET
CYFLD_TST_TEST_RESET_EN_N__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_TST_TEST_RESET_EN_N__SIZE
CYFLD_TST_TEST_RESET_EN_N__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TST_TEST_SET_EN_N__OFFSET
CYFLD_TST_TEST_SET_EN_N__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_TST_TEST_SET_EN_N__SIZE
CYFLD_TST_TEST_SET_EN_N__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TST_TEST_ICG_EN_N__OFFSET
CYFLD_TST_TEST_ICG_EN_N__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD_TST_TEST_ICG_EN_N__SIZE
CYFLD_TST_TEST_ICG_EN_N__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TST_TEST_OCC0_1_EN_N__OFFSET
CYFLD_TST_TEST_OCC0_1_EN_N__OFFSET EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYFLD_TST_TEST_OCC0_1_EN_N__SIZE
CYFLD_TST_TEST_OCC0_1_EN_N__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TST_TEST_OCC0_2_EN_N__OFFSET
CYFLD_TST_TEST_OCC0_2_EN_N__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD_TST_TEST_OCC0_2_EN_N__SIZE
CYFLD_TST_TEST_OCC0_2_EN_N__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TST_TEST_SLPISOLATE_EN__OFFSET
CYFLD_TST_TEST_SLPISOLATE_EN__OFFSET EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYFLD_TST_TEST_SLPISOLATE_EN__SIZE
CYFLD_TST_TEST_SLPISOLATE_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TST_TEST_SYSISOLATE_EN__OFFSET
CYFLD_TST_TEST_SYSISOLATE_EN__OFFSET EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYFLD_TST_TEST_SYSISOLATE_EN__SIZE
CYFLD_TST_TEST_SYSISOLATE_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TST_TEST_SLPRETAIN_EN__OFFSET
CYFLD_TST_TEST_SLPRETAIN_EN__OFFSET EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD_TST_TEST_SLPRETAIN_EN__SIZE
CYFLD_TST_TEST_SLPRETAIN_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TST_TEST_SYSRETAIN_EN__OFFSET
CYFLD_TST_TEST_SYSRETAIN_EN__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_TST_TEST_SYSRETAIN_EN__SIZE
CYFLD_TST_TEST_SYSRETAIN_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TST_TEST_SPARE1_EN__OFFSET
CYFLD_TST_TEST_SPARE1_EN__OFFSET EQU 0x00000011
ENDIF
IF :LNOT::DEF:CYFLD_TST_TEST_SPARE1_EN__SIZE
CYFLD_TST_TEST_SPARE1_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TST_TEST_SPARE2_EN__OFFSET
CYFLD_TST_TEST_SPARE2_EN__OFFSET EQU 0x00000012
ENDIF
IF :LNOT::DEF:CYFLD_TST_TEST_SPARE2_EN__SIZE
CYFLD_TST_TEST_SPARE2_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TST_SCAN_OCC_OBSERVE__OFFSET
CYFLD_TST_SCAN_OCC_OBSERVE__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_TST_SCAN_OCC_OBSERVE__SIZE
CYFLD_TST_SCAN_OCC_OBSERVE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TST_SCAN_TRF1__OFFSET
CYFLD_TST_SCAN_TRF1__OFFSET EQU 0x00000019
ENDIF
IF :LNOT::DEF:CYFLD_TST_SCAN_TRF1__SIZE
CYFLD_TST_SCAN_TRF1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TST_SCAN_TRF__OFFSET
CYFLD_TST_SCAN_TRF__OFFSET EQU 0x0000001a
ENDIF
IF :LNOT::DEF:CYFLD_TST_SCAN_TRF__SIZE
CYFLD_TST_SCAN_TRF__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TST_SCAN_IDDQ__OFFSET
CYFLD_TST_SCAN_IDDQ__OFFSET EQU 0x0000001b
ENDIF
IF :LNOT::DEF:CYFLD_TST_SCAN_IDDQ__SIZE
CYFLD_TST_SCAN_IDDQ__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TST_SCAN_COMPRESS__OFFSET
CYFLD_TST_SCAN_COMPRESS__OFFSET EQU 0x0000001c
ENDIF
IF :LNOT::DEF:CYFLD_TST_SCAN_COMPRESS__SIZE
CYFLD_TST_SCAN_COMPRESS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TST_SCAN_MODE__OFFSET
CYFLD_TST_SCAN_MODE__OFFSET EQU 0x0000001d
ENDIF
IF :LNOT::DEF:CYFLD_TST_SCAN_MODE__SIZE
CYFLD_TST_SCAN_MODE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TST_PTM_MODE_EN__OFFSET
CYFLD_TST_PTM_MODE_EN__OFFSET EQU 0x0000001e
ENDIF
IF :LNOT::DEF:CYFLD_TST_PTM_MODE_EN__SIZE
CYFLD_TST_PTM_MODE_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_TST_ADFT_CTRL
CYREG_TST_ADFT_CTRL EQU 0x40030004
ENDIF
IF :LNOT::DEF:CYFLD_TST_ENABLE__OFFSET
CYFLD_TST_ENABLE__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_TST_ENABLE__SIZE
CYFLD_TST_ENABLE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_TST_DDFT_CTRL
CYREG_TST_DDFT_CTRL EQU 0x40030008
ENDIF
IF :LNOT::DEF:CYFLD_TST_DFT_SEL1__OFFSET
CYFLD_TST_DFT_SEL1__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_TST_DFT_SEL1__SIZE
CYFLD_TST_DFT_SEL1__SIZE EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL1_VSS
CYVAL_TST_DFT_SEL1_VSS EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL1_CLK1
CYVAL_TST_DFT_SEL1_CLK1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL1_CLK2
CYVAL_TST_DFT_SEL1_CLK2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL1_PWR1
CYVAL_TST_DFT_SEL1_PWR1 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL1_PWR2
CYVAL_TST_DFT_SEL1_PWR2 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL1_VMON
CYVAL_TST_DFT_SEL1_VMON EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL1_TSS_VDDA_OK
CYVAL_TST_DFT_SEL1_TSS_VDDA_OK EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL1_ADFT_TRIP1
CYVAL_TST_DFT_SEL1_ADFT_TRIP1 EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL1_ADFT_TRIP2
CYVAL_TST_DFT_SEL1_ADFT_TRIP2 EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL1_TSS1
CYVAL_TST_DFT_SEL1_TSS1 EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL1_TSS2
CYVAL_TST_DFT_SEL1_TSS2 EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL1_TSS3
CYVAL_TST_DFT_SEL1_TSS3 EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL1_TSS4
CYVAL_TST_DFT_SEL1_TSS4 EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL1_I2CS_CLK_I2CS
CYVAL_TST_DFT_SEL1_I2CS_CLK_I2CS EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL1_I2CS_SDAIN_SI
CYVAL_TST_DFT_SEL1_I2CS_SDAIN_SI EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYFLD_TST_DFT_SEL2__OFFSET
CYFLD_TST_DFT_SEL2__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_TST_DFT_SEL2__SIZE
CYFLD_TST_DFT_SEL2__SIZE EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL2_VSS
CYVAL_TST_DFT_SEL2_VSS EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL2_CLK1
CYVAL_TST_DFT_SEL2_CLK1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL2_CLK2
CYVAL_TST_DFT_SEL2_CLK2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL2_PWR1
CYVAL_TST_DFT_SEL2_PWR1 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL2_PWR2
CYVAL_TST_DFT_SEL2_PWR2 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL2_VMON
CYVAL_TST_DFT_SEL2_VMON EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL2_TSS_VDDA_OK
CYVAL_TST_DFT_SEL2_TSS_VDDA_OK EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL2_ADFT_TRIP1
CYVAL_TST_DFT_SEL2_ADFT_TRIP1 EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL2_ADFT_TRIP2
CYVAL_TST_DFT_SEL2_ADFT_TRIP2 EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL2_TSS1
CYVAL_TST_DFT_SEL2_TSS1 EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL2_TSS2
CYVAL_TST_DFT_SEL2_TSS2 EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL2_TSS3
CYVAL_TST_DFT_SEL2_TSS3 EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL2_TSS4
CYVAL_TST_DFT_SEL2_TSS4 EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL2_I2CS_CLK_I2CS
CYVAL_TST_DFT_SEL2_I2CS_CLK_I2CS EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYVAL_TST_DFT_SEL2_I2CS_SDAIN_SI
CYVAL_TST_DFT_SEL2_I2CS_SDAIN_SI EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYFLD_TST_EDGE__OFFSET
CYFLD_TST_EDGE__OFFSET EQU 0x0000001c
ENDIF
IF :LNOT::DEF:CYFLD_TST_EDGE__SIZE
CYFLD_TST_EDGE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_TST_EDGE_POSEDGE
CYVAL_TST_EDGE_POSEDGE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_TST_EDGE_NEGEDGE
CYVAL_TST_EDGE_NEGEDGE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TST_DIVIDE__OFFSET
CYFLD_TST_DIVIDE__OFFSET EQU 0x0000001d
ENDIF
IF :LNOT::DEF:CYFLD_TST_DIVIDE__SIZE
CYFLD_TST_DIVIDE__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TST_DIVIDE_DIRECT
CYVAL_TST_DIVIDE_DIRECT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_TST_DIVIDE_DIV_BY_2
CYVAL_TST_DIVIDE_DIV_BY_2 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_TST_DIVIDE_DIV_BY_4
CYVAL_TST_DIVIDE_DIV_BY_4 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TST_DIVIDE_DIV_BY_8
CYVAL_TST_DIVIDE_DIV_BY_8 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_TST_MODE
CYREG_TST_MODE EQU 0x40030014
ENDIF
IF :LNOT::DEF:CYFLD_TST_TEST_MODE__OFFSET
CYFLD_TST_TEST_MODE__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_TST_TEST_MODE__SIZE
CYFLD_TST_TEST_MODE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_TST_TRIM_CNTR1
CYREG_TST_TRIM_CNTR1 EQU 0x40030018
ENDIF
IF :LNOT::DEF:CYFLD_TST_COUNTER__OFFSET
CYFLD_TST_COUNTER__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_TST_COUNTER__SIZE
CYFLD_TST_COUNTER__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_TST_COUNTER_DONE__OFFSET
CYFLD_TST_COUNTER_DONE__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_TST_COUNTER_DONE__SIZE
CYFLD_TST_COUNTER_DONE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_TST_TRIM_CNTR2
CYREG_TST_TRIM_CNTR2 EQU 0x4003001c
ENDIF
IF :LNOT::DEF:CYDEV_PRT0_BASE
CYDEV_PRT0_BASE EQU 0x40040000
ENDIF
IF :LNOT::DEF:CYDEV_PRT0_SIZE
CYDEV_PRT0_SIZE EQU 0x00000100
ENDIF
IF :LNOT::DEF:CYREG_PRT0_DR
CYREG_PRT0_DR EQU 0x40040000
ENDIF
IF :LNOT::DEF:CYFLD_PRT_DATAREG__OFFSET
CYFLD_PRT_DATAREG__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_PRT_DATAREG__SIZE
CYFLD_PRT_DATAREG__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_PRT0_PS
CYREG_PRT0_PS EQU 0x40040004
ENDIF
IF :LNOT::DEF:CYFLD_PRT_PINSTATE__OFFSET
CYFLD_PRT_PINSTATE__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_PRT_PINSTATE__SIZE
CYFLD_PRT_PINSTATE__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_PRT_PINSTATE_FLT__OFFSET
CYFLD_PRT_PINSTATE_FLT__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_PRT_PINSTATE_FLT__SIZE
CYFLD_PRT_PINSTATE_FLT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_PRT0_PC
CYREG_PRT0_PC EQU 0x40040008
ENDIF
IF :LNOT::DEF:CYFLD_PRT_DM__OFFSET
CYFLD_PRT_DM__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_PRT_DM__SIZE
CYFLD_PRT_DM__SIZE EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYVAL_PRT_DM_OFF
CYVAL_PRT_DM_OFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_PRT_DM_INPUT
CYVAL_PRT_DM_INPUT EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_PRT_DM_0_PU
CYVAL_PRT_DM_0_PU EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_PRT_DM_PD_1
CYVAL_PRT_DM_PD_1 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_PRT_DM_0_Z
CYVAL_PRT_DM_0_Z EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_PRT_DM_Z_1
CYVAL_PRT_DM_Z_1 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_PRT_DM_0_1
CYVAL_PRT_DM_0_1 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_PRT_DM_PD_PU
CYVAL_PRT_DM_PD_PU EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_PRT_VTRIP_SEL__OFFSET
CYFLD_PRT_VTRIP_SEL__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_PRT_VTRIP_SEL__SIZE
CYFLD_PRT_VTRIP_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_PRT_SLOW__OFFSET
CYFLD_PRT_SLOW__OFFSET EQU 0x00000019
ENDIF
IF :LNOT::DEF:CYFLD_PRT_SLOW__SIZE
CYFLD_PRT_SLOW__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_PRT0_INTCFG
CYREG_PRT0_INTCFG EQU 0x4004000c
ENDIF
IF :LNOT::DEF:CYFLD_PRT_INTTYPE__OFFSET
CYFLD_PRT_INTTYPE__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_PRT_INTTYPE__SIZE
CYFLD_PRT_INTTYPE__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYVAL_PRT_INTTYPE_DISABLE
CYVAL_PRT_INTTYPE_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_PRT_INTTYPE_RISING
CYVAL_PRT_INTTYPE_RISING EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_PRT_INTTYPE_FALLING
CYVAL_PRT_INTTYPE_FALLING EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_PRT_INTTYPE_BOTH
CYVAL_PRT_INTTYPE_BOTH EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_PRT_INTTYPE_FLT__OFFSET
CYFLD_PRT_INTTYPE_FLT__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_PRT_INTTYPE_FLT__SIZE
CYFLD_PRT_INTTYPE_FLT__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_PRT_INTTYPE_FLT_DISABLE
CYVAL_PRT_INTTYPE_FLT_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_PRT_INTTYPE_FLT_RISING
CYVAL_PRT_INTTYPE_FLT_RISING EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_PRT_INTTYPE_FLT_FALLING
CYVAL_PRT_INTTYPE_FLT_FALLING EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_PRT_INTTYPE_FLT_BOTH
CYVAL_PRT_INTTYPE_FLT_BOTH EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_PRT_FLT_SELECT__OFFSET
CYFLD_PRT_FLT_SELECT__OFFSET EQU 0x00000012
ENDIF
IF :LNOT::DEF:CYFLD_PRT_FLT_SELECT__SIZE
CYFLD_PRT_FLT_SELECT__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_PRT0_INTSTAT
CYREG_PRT0_INTSTAT EQU 0x40040010
ENDIF
IF :LNOT::DEF:CYFLD_PRT_INTSTAT__OFFSET
CYFLD_PRT_INTSTAT__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_PRT_INTSTAT__SIZE
CYFLD_PRT_INTSTAT__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_PRT_INTSTAT_FLT__OFFSET
CYFLD_PRT_INTSTAT_FLT__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_PRT_INTSTAT_FLT__SIZE
CYFLD_PRT_INTSTAT_FLT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_PRT_PS__OFFSET
CYFLD_PRT_PS__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_PRT_PS__SIZE
CYFLD_PRT_PS__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_PRT_PS_FLT__OFFSET
CYFLD_PRT_PS_FLT__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_PRT_PS_FLT__SIZE
CYFLD_PRT_PS_FLT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_PRT0_PC2
CYREG_PRT0_PC2 EQU 0x40040018
ENDIF
IF :LNOT::DEF:CYFLD_PRT_INP_DIS__OFFSET
CYFLD_PRT_INP_DIS__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_PRT_INP_DIS__SIZE
CYFLD_PRT_INP_DIS__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYDEV_PRT1_BASE
CYDEV_PRT1_BASE EQU 0x40040100
ENDIF
IF :LNOT::DEF:CYDEV_PRT1_SIZE
CYDEV_PRT1_SIZE EQU 0x00000100
ENDIF
IF :LNOT::DEF:CYREG_PRT1_DR
CYREG_PRT1_DR EQU 0x40040100
ENDIF
IF :LNOT::DEF:CYREG_PRT1_PS
CYREG_PRT1_PS EQU 0x40040104
ENDIF
IF :LNOT::DEF:CYREG_PRT1_PC
CYREG_PRT1_PC EQU 0x40040108
ENDIF
IF :LNOT::DEF:CYREG_PRT1_INTCFG
CYREG_PRT1_INTCFG EQU 0x4004010c
ENDIF
IF :LNOT::DEF:CYREG_PRT1_INTSTAT
CYREG_PRT1_INTSTAT EQU 0x40040110
ENDIF
IF :LNOT::DEF:CYREG_PRT1_PC2
CYREG_PRT1_PC2 EQU 0x40040118
ENDIF
IF :LNOT::DEF:CYDEV_PRT2_BASE
CYDEV_PRT2_BASE EQU 0x40040200
ENDIF
IF :LNOT::DEF:CYDEV_PRT2_SIZE
CYDEV_PRT2_SIZE EQU 0x00000100
ENDIF
IF :LNOT::DEF:CYREG_PRT2_DR
CYREG_PRT2_DR EQU 0x40040200
ENDIF
IF :LNOT::DEF:CYREG_PRT2_PS
CYREG_PRT2_PS EQU 0x40040204
ENDIF
IF :LNOT::DEF:CYREG_PRT2_PC
CYREG_PRT2_PC EQU 0x40040208
ENDIF
IF :LNOT::DEF:CYREG_PRT2_INTCFG
CYREG_PRT2_INTCFG EQU 0x4004020c
ENDIF
IF :LNOT::DEF:CYREG_PRT2_INTSTAT
CYREG_PRT2_INTSTAT EQU 0x40040210
ENDIF
IF :LNOT::DEF:CYREG_PRT2_PC2
CYREG_PRT2_PC2 EQU 0x40040218
ENDIF
IF :LNOT::DEF:CYDEV_PRT3_BASE
CYDEV_PRT3_BASE EQU 0x40040300
ENDIF
IF :LNOT::DEF:CYDEV_PRT3_SIZE
CYDEV_PRT3_SIZE EQU 0x00000100
ENDIF
IF :LNOT::DEF:CYREG_PRT3_DR
CYREG_PRT3_DR EQU 0x40040300
ENDIF
IF :LNOT::DEF:CYREG_PRT3_PS
CYREG_PRT3_PS EQU 0x40040304
ENDIF
IF :LNOT::DEF:CYREG_PRT3_PC
CYREG_PRT3_PC EQU 0x40040308
ENDIF
IF :LNOT::DEF:CYREG_PRT3_INTCFG
CYREG_PRT3_INTCFG EQU 0x4004030c
ENDIF
IF :LNOT::DEF:CYREG_PRT3_INTSTAT
CYREG_PRT3_INTSTAT EQU 0x40040310
ENDIF
IF :LNOT::DEF:CYREG_PRT3_PC2
CYREG_PRT3_PC2 EQU 0x40040318
ENDIF
IF :LNOT::DEF:CYDEV_PRT4_BASE
CYDEV_PRT4_BASE EQU 0x40040400
ENDIF
IF :LNOT::DEF:CYDEV_PRT4_SIZE
CYDEV_PRT4_SIZE EQU 0x00000100
ENDIF
IF :LNOT::DEF:CYREG_PRT4_DR
CYREG_PRT4_DR EQU 0x40040400
ENDIF
IF :LNOT::DEF:CYREG_PRT4_PS
CYREG_PRT4_PS EQU 0x40040404
ENDIF
IF :LNOT::DEF:CYREG_PRT4_PC
CYREG_PRT4_PC EQU 0x40040408
ENDIF
IF :LNOT::DEF:CYREG_PRT4_INTCFG
CYREG_PRT4_INTCFG EQU 0x4004040c
ENDIF
IF :LNOT::DEF:CYREG_PRT4_INTSTAT
CYREG_PRT4_INTSTAT EQU 0x40040410
ENDIF
IF :LNOT::DEF:CYREG_PRT4_PC2
CYREG_PRT4_PC2 EQU 0x40040418
ENDIF
IF :LNOT::DEF:CYDEV_TCPWM_BASE
CYDEV_TCPWM_BASE EQU 0x40050000
ENDIF
IF :LNOT::DEF:CYDEV_TCPWM_SIZE
CYDEV_TCPWM_SIZE EQU 0x00001000
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CTRL
CYREG_TCPWM_CTRL EQU 0x40050000
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_COUNTER_ENABLED__OFFSET
CYFLD_TCPWM_COUNTER_ENABLED__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_COUNTER_ENABLED__SIZE
CYFLD_TCPWM_COUNTER_ENABLED__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CMD
CYREG_TCPWM_CMD EQU 0x40050008
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_COUNTER_CAPTURE__OFFSET
CYFLD_TCPWM_COUNTER_CAPTURE__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_COUNTER_CAPTURE__SIZE
CYFLD_TCPWM_COUNTER_CAPTURE__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_COUNTER_RELOAD__OFFSET
CYFLD_TCPWM_COUNTER_RELOAD__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_COUNTER_RELOAD__SIZE
CYFLD_TCPWM_COUNTER_RELOAD__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_COUNTER_STOP__OFFSET
CYFLD_TCPWM_COUNTER_STOP__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_COUNTER_STOP__SIZE
CYFLD_TCPWM_COUNTER_STOP__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_COUNTER_START__OFFSET
CYFLD_TCPWM_COUNTER_START__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_COUNTER_START__SIZE
CYFLD_TCPWM_COUNTER_START__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_INTR_CAUSE
CYREG_TCPWM_INTR_CAUSE EQU 0x4005000c
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_COUNTER_INT__OFFSET
CYFLD_TCPWM_COUNTER_INT__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_COUNTER_INT__SIZE
CYFLD_TCPWM_COUNTER_INT__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYDEV_TCPWM_CNT0_BASE
CYDEV_TCPWM_CNT0_BASE EQU 0x40050100
ENDIF
IF :LNOT::DEF:CYDEV_TCPWM_CNT0_SIZE
CYDEV_TCPWM_CNT0_SIZE EQU 0x00000040
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT0_CTRL
CYREG_TCPWM_CNT0_CTRL EQU 0x40050100
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_AUTO_RELOAD_CC__OFFSET
CYFLD_TCPWM_CNT_AUTO_RELOAD_CC__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_AUTO_RELOAD_CC__SIZE
CYFLD_TCPWM_CNT_AUTO_RELOAD_CC__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_AUTO_RELOAD_PERIOD__OFFSET
CYFLD_TCPWM_CNT_AUTO_RELOAD_PERIOD__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_AUTO_RELOAD_PERIOD__SIZE
CYFLD_TCPWM_CNT_AUTO_RELOAD_PERIOD__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_PWM_SYNC_KILL__OFFSET
CYFLD_TCPWM_CNT_PWM_SYNC_KILL__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_PWM_SYNC_KILL__SIZE
CYFLD_TCPWM_CNT_PWM_SYNC_KILL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_PWM_STOP_ON_KILL__OFFSET
CYFLD_TCPWM_CNT_PWM_STOP_ON_KILL__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_PWM_STOP_ON_KILL__SIZE
CYFLD_TCPWM_CNT_PWM_STOP_ON_KILL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_GENERIC__OFFSET
CYFLD_TCPWM_CNT_GENERIC__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_GENERIC__SIZE
CYFLD_TCPWM_CNT_GENERIC__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_GENERIC_DIVBY1
CYVAL_TCPWM_CNT_GENERIC_DIVBY1 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_GENERIC_DIVBY2
CYVAL_TCPWM_CNT_GENERIC_DIVBY2 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_GENERIC_DIVBY4
CYVAL_TCPWM_CNT_GENERIC_DIVBY4 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_GENERIC_DIVBY8
CYVAL_TCPWM_CNT_GENERIC_DIVBY8 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_GENERIC_DIVBY16
CYVAL_TCPWM_CNT_GENERIC_DIVBY16 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_GENERIC_DIVBY32
CYVAL_TCPWM_CNT_GENERIC_DIVBY32 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_GENERIC_DIVBY64
CYVAL_TCPWM_CNT_GENERIC_DIVBY64 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_GENERIC_DIVBY128
CYVAL_TCPWM_CNT_GENERIC_DIVBY128 EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_UP_DOWN_MODE__OFFSET
CYFLD_TCPWM_CNT_UP_DOWN_MODE__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_UP_DOWN_MODE__SIZE
CYFLD_TCPWM_CNT_UP_DOWN_MODE__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_UP_DOWN_MODE_COUNT_UP
CYVAL_TCPWM_CNT_UP_DOWN_MODE_COUNT_UP EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_UP_DOWN_MODE_COUNT_DOWN
CYVAL_TCPWM_CNT_UP_DOWN_MODE_COUNT_DOWN EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_UP_DOWN_MODE_COUNT_UPDN1
CYVAL_TCPWM_CNT_UP_DOWN_MODE_COUNT_UPDN1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_UP_DOWN_MODE_COUNT_UPDN2
CYVAL_TCPWM_CNT_UP_DOWN_MODE_COUNT_UPDN2 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_ONE_SHOT__OFFSET
CYFLD_TCPWM_CNT_ONE_SHOT__OFFSET EQU 0x00000012
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_ONE_SHOT__SIZE
CYFLD_TCPWM_CNT_ONE_SHOT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_QUADRATURE_MODE__OFFSET
CYFLD_TCPWM_CNT_QUADRATURE_MODE__OFFSET EQU 0x00000014
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_QUADRATURE_MODE__SIZE
CYFLD_TCPWM_CNT_QUADRATURE_MODE__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_QUADRATURE_MODE_X1
CYVAL_TCPWM_CNT_QUADRATURE_MODE_X1 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_QUADRATURE_MODE_X2
CYVAL_TCPWM_CNT_QUADRATURE_MODE_X2 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_QUADRATURE_MODE_X4
CYVAL_TCPWM_CNT_QUADRATURE_MODE_X4 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_QUADRATURE_MODE_INV_OUT
CYVAL_TCPWM_CNT_QUADRATURE_MODE_INV_OUT EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_QUADRATURE_MODE_INV_COMPL_OUT
CYVAL_TCPWM_CNT_QUADRATURE_MODE_INV_COMPL_OUT EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_MODE__OFFSET
CYFLD_TCPWM_CNT_MODE__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_MODE__SIZE
CYFLD_TCPWM_CNT_MODE__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_MODE_TIMER
CYVAL_TCPWM_CNT_MODE_TIMER EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_MODE_CAPTURE
CYVAL_TCPWM_CNT_MODE_CAPTURE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_MODE_QUAD
CYVAL_TCPWM_CNT_MODE_QUAD EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_MODE_PWM
CYVAL_TCPWM_CNT_MODE_PWM EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_MODE_PWM_DT
CYVAL_TCPWM_CNT_MODE_PWM_DT EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_MODE_PWM_PR
CYVAL_TCPWM_CNT_MODE_PWM_PR EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT0_STATUS
CYREG_TCPWM_CNT0_STATUS EQU 0x40050104
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_DOWN__OFFSET
CYFLD_TCPWM_CNT_DOWN__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_DOWN__SIZE
CYFLD_TCPWM_CNT_DOWN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_RUNNING__OFFSET
CYFLD_TCPWM_CNT_RUNNING__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_RUNNING__SIZE
CYFLD_TCPWM_CNT_RUNNING__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT0_COUNTER
CYREG_TCPWM_CNT0_COUNTER EQU 0x40050108
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_COUNTER__OFFSET
CYFLD_TCPWM_CNT_COUNTER__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_COUNTER__SIZE
CYFLD_TCPWM_CNT_COUNTER__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT0_CC
CYREG_TCPWM_CNT0_CC EQU 0x4005010c
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_CC__OFFSET
CYFLD_TCPWM_CNT_CC__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_CC__SIZE
CYFLD_TCPWM_CNT_CC__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT0_CC_BUFF
CYREG_TCPWM_CNT0_CC_BUFF EQU 0x40050110
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT0_PERIOD
CYREG_TCPWM_CNT0_PERIOD EQU 0x40050114
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_PERIOD__OFFSET
CYFLD_TCPWM_CNT_PERIOD__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_PERIOD__SIZE
CYFLD_TCPWM_CNT_PERIOD__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT0_PERIOD_BUFF
CYREG_TCPWM_CNT0_PERIOD_BUFF EQU 0x40050118
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT0_TR_CTRL0
CYREG_TCPWM_CNT0_TR_CTRL0 EQU 0x40050120
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_CAPTURE_SEL__OFFSET
CYFLD_TCPWM_CNT_CAPTURE_SEL__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_CAPTURE_SEL__SIZE
CYFLD_TCPWM_CNT_CAPTURE_SEL__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_COUNT_SEL__OFFSET
CYFLD_TCPWM_CNT_COUNT_SEL__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_COUNT_SEL__SIZE
CYFLD_TCPWM_CNT_COUNT_SEL__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_RELOAD_SEL__OFFSET
CYFLD_TCPWM_CNT_RELOAD_SEL__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_RELOAD_SEL__SIZE
CYFLD_TCPWM_CNT_RELOAD_SEL__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_STOP_SEL__OFFSET
CYFLD_TCPWM_CNT_STOP_SEL__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_STOP_SEL__SIZE
CYFLD_TCPWM_CNT_STOP_SEL__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_START_SEL__OFFSET
CYFLD_TCPWM_CNT_START_SEL__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_START_SEL__SIZE
CYFLD_TCPWM_CNT_START_SEL__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT0_TR_CTRL1
CYREG_TCPWM_CNT0_TR_CTRL1 EQU 0x40050124
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_CAPTURE_EDGE__OFFSET
CYFLD_TCPWM_CNT_CAPTURE_EDGE__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_CAPTURE_EDGE__SIZE
CYFLD_TCPWM_CNT_CAPTURE_EDGE__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_CAPTURE_EDGE_RISING_EDGE
CYVAL_TCPWM_CNT_CAPTURE_EDGE_RISING_EDGE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_CAPTURE_EDGE_FALLING_EDGE
CYVAL_TCPWM_CNT_CAPTURE_EDGE_FALLING_EDGE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_CAPTURE_EDGE_BOTH_EDGES
CYVAL_TCPWM_CNT_CAPTURE_EDGE_BOTH_EDGES EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_CAPTURE_EDGE_NO_EDGE_DET
CYVAL_TCPWM_CNT_CAPTURE_EDGE_NO_EDGE_DET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_COUNT_EDGE__OFFSET
CYFLD_TCPWM_CNT_COUNT_EDGE__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_COUNT_EDGE__SIZE
CYFLD_TCPWM_CNT_COUNT_EDGE__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_COUNT_EDGE_RISING_EDGE
CYVAL_TCPWM_CNT_COUNT_EDGE_RISING_EDGE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_COUNT_EDGE_FALLING_EDGE
CYVAL_TCPWM_CNT_COUNT_EDGE_FALLING_EDGE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_COUNT_EDGE_BOTH_EDGES
CYVAL_TCPWM_CNT_COUNT_EDGE_BOTH_EDGES EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_COUNT_EDGE_NO_EDGE_DET
CYVAL_TCPWM_CNT_COUNT_EDGE_NO_EDGE_DET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_RELOAD_EDGE__OFFSET
CYFLD_TCPWM_CNT_RELOAD_EDGE__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_RELOAD_EDGE__SIZE
CYFLD_TCPWM_CNT_RELOAD_EDGE__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_RELOAD_EDGE_RISING_EDGE
CYVAL_TCPWM_CNT_RELOAD_EDGE_RISING_EDGE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_RELOAD_EDGE_FALLING_EDGE
CYVAL_TCPWM_CNT_RELOAD_EDGE_FALLING_EDGE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_RELOAD_EDGE_BOTH_EDGES
CYVAL_TCPWM_CNT_RELOAD_EDGE_BOTH_EDGES EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_RELOAD_EDGE_NO_EDGE_DET
CYVAL_TCPWM_CNT_RELOAD_EDGE_NO_EDGE_DET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_STOP_EDGE__OFFSET
CYFLD_TCPWM_CNT_STOP_EDGE__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_STOP_EDGE__SIZE
CYFLD_TCPWM_CNT_STOP_EDGE__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_STOP_EDGE_RISING_EDGE
CYVAL_TCPWM_CNT_STOP_EDGE_RISING_EDGE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_STOP_EDGE_FALLING_EDGE
CYVAL_TCPWM_CNT_STOP_EDGE_FALLING_EDGE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_STOP_EDGE_BOTH_EDGES
CYVAL_TCPWM_CNT_STOP_EDGE_BOTH_EDGES EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_STOP_EDGE_NO_EDGE_DET
CYVAL_TCPWM_CNT_STOP_EDGE_NO_EDGE_DET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_START_EDGE__OFFSET
CYFLD_TCPWM_CNT_START_EDGE__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_START_EDGE__SIZE
CYFLD_TCPWM_CNT_START_EDGE__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_START_EDGE_RISING_EDGE
CYVAL_TCPWM_CNT_START_EDGE_RISING_EDGE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_START_EDGE_FALLING_EDGE
CYVAL_TCPWM_CNT_START_EDGE_FALLING_EDGE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_START_EDGE_BOTH_EDGES
CYVAL_TCPWM_CNT_START_EDGE_BOTH_EDGES EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_START_EDGE_NO_EDGE_DET
CYVAL_TCPWM_CNT_START_EDGE_NO_EDGE_DET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT0_TR_CTRL2
CYREG_TCPWM_CNT0_TR_CTRL2 EQU 0x40050128
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_CC_MATCH_MODE__OFFSET
CYFLD_TCPWM_CNT_CC_MATCH_MODE__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_CC_MATCH_MODE__SIZE
CYFLD_TCPWM_CNT_CC_MATCH_MODE__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_CC_MATCH_MODE_SET
CYVAL_TCPWM_CNT_CC_MATCH_MODE_SET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_CC_MATCH_MODE_CLEAR
CYVAL_TCPWM_CNT_CC_MATCH_MODE_CLEAR EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_CC_MATCH_MODE_INVERT
CYVAL_TCPWM_CNT_CC_MATCH_MODE_INVERT EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_CC_MATCH_MODE_NO_CHANGE
CYVAL_TCPWM_CNT_CC_MATCH_MODE_NO_CHANGE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_OVERFLOW_MODE__OFFSET
CYFLD_TCPWM_CNT_OVERFLOW_MODE__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_OVERFLOW_MODE__SIZE
CYFLD_TCPWM_CNT_OVERFLOW_MODE__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_OVERFLOW_MODE_SET
CYVAL_TCPWM_CNT_OVERFLOW_MODE_SET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_OVERFLOW_MODE_CLEAR
CYVAL_TCPWM_CNT_OVERFLOW_MODE_CLEAR EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_OVERFLOW_MODE_INVERT
CYVAL_TCPWM_CNT_OVERFLOW_MODE_INVERT EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_OVERFLOW_MODE_NO_CHANGE
CYVAL_TCPWM_CNT_OVERFLOW_MODE_NO_CHANGE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_UNDERFLOW_MODE__OFFSET
CYFLD_TCPWM_CNT_UNDERFLOW_MODE__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_UNDERFLOW_MODE__SIZE
CYFLD_TCPWM_CNT_UNDERFLOW_MODE__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_UNDERFLOW_MODE_SET
CYVAL_TCPWM_CNT_UNDERFLOW_MODE_SET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_UNDERFLOW_MODE_CLEAR
CYVAL_TCPWM_CNT_UNDERFLOW_MODE_CLEAR EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_UNDERFLOW_MODE_INVERT
CYVAL_TCPWM_CNT_UNDERFLOW_MODE_INVERT EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_TCPWM_CNT_UNDERFLOW_MODE_NO_CHANGE
CYVAL_TCPWM_CNT_UNDERFLOW_MODE_NO_CHANGE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT0_INTR
CYREG_TCPWM_CNT0_INTR EQU 0x40050130
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_TC__OFFSET
CYFLD_TCPWM_CNT_TC__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_TC__SIZE
CYFLD_TCPWM_CNT_TC__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_CC_MATCH__OFFSET
CYFLD_TCPWM_CNT_CC_MATCH__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_TCPWM_CNT_CC_MATCH__SIZE
CYFLD_TCPWM_CNT_CC_MATCH__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT0_INTR_SET
CYREG_TCPWM_CNT0_INTR_SET EQU 0x40050134
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT0_INTR_MASK
CYREG_TCPWM_CNT0_INTR_MASK EQU 0x40050138
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT0_INTR_MASKED
CYREG_TCPWM_CNT0_INTR_MASKED EQU 0x4005013c
ENDIF
IF :LNOT::DEF:CYDEV_TCPWM_CNT1_BASE
CYDEV_TCPWM_CNT1_BASE EQU 0x40050140
ENDIF
IF :LNOT::DEF:CYDEV_TCPWM_CNT1_SIZE
CYDEV_TCPWM_CNT1_SIZE EQU 0x00000040
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT1_CTRL
CYREG_TCPWM_CNT1_CTRL EQU 0x40050140
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT1_STATUS
CYREG_TCPWM_CNT1_STATUS EQU 0x40050144
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT1_COUNTER
CYREG_TCPWM_CNT1_COUNTER EQU 0x40050148
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT1_CC
CYREG_TCPWM_CNT1_CC EQU 0x4005014c
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT1_CC_BUFF
CYREG_TCPWM_CNT1_CC_BUFF EQU 0x40050150
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT1_PERIOD
CYREG_TCPWM_CNT1_PERIOD EQU 0x40050154
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT1_PERIOD_BUFF
CYREG_TCPWM_CNT1_PERIOD_BUFF EQU 0x40050158
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT1_TR_CTRL0
CYREG_TCPWM_CNT1_TR_CTRL0 EQU 0x40050160
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT1_TR_CTRL1
CYREG_TCPWM_CNT1_TR_CTRL1 EQU 0x40050164
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT1_TR_CTRL2
CYREG_TCPWM_CNT1_TR_CTRL2 EQU 0x40050168
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT1_INTR
CYREG_TCPWM_CNT1_INTR EQU 0x40050170
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT1_INTR_SET
CYREG_TCPWM_CNT1_INTR_SET EQU 0x40050174
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT1_INTR_MASK
CYREG_TCPWM_CNT1_INTR_MASK EQU 0x40050178
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT1_INTR_MASKED
CYREG_TCPWM_CNT1_INTR_MASKED EQU 0x4005017c
ENDIF
IF :LNOT::DEF:CYDEV_TCPWM_CNT2_BASE
CYDEV_TCPWM_CNT2_BASE EQU 0x40050180
ENDIF
IF :LNOT::DEF:CYDEV_TCPWM_CNT2_SIZE
CYDEV_TCPWM_CNT2_SIZE EQU 0x00000040
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT2_CTRL
CYREG_TCPWM_CNT2_CTRL EQU 0x40050180
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT2_STATUS
CYREG_TCPWM_CNT2_STATUS EQU 0x40050184
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT2_COUNTER
CYREG_TCPWM_CNT2_COUNTER EQU 0x40050188
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT2_CC
CYREG_TCPWM_CNT2_CC EQU 0x4005018c
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT2_CC_BUFF
CYREG_TCPWM_CNT2_CC_BUFF EQU 0x40050190
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT2_PERIOD
CYREG_TCPWM_CNT2_PERIOD EQU 0x40050194
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT2_PERIOD_BUFF
CYREG_TCPWM_CNT2_PERIOD_BUFF EQU 0x40050198
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT2_TR_CTRL0
CYREG_TCPWM_CNT2_TR_CTRL0 EQU 0x400501a0
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT2_TR_CTRL1
CYREG_TCPWM_CNT2_TR_CTRL1 EQU 0x400501a4
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT2_TR_CTRL2
CYREG_TCPWM_CNT2_TR_CTRL2 EQU 0x400501a8
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT2_INTR
CYREG_TCPWM_CNT2_INTR EQU 0x400501b0
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT2_INTR_SET
CYREG_TCPWM_CNT2_INTR_SET EQU 0x400501b4
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT2_INTR_MASK
CYREG_TCPWM_CNT2_INTR_MASK EQU 0x400501b8
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT2_INTR_MASKED
CYREG_TCPWM_CNT2_INTR_MASKED EQU 0x400501bc
ENDIF
IF :LNOT::DEF:CYDEV_TCPWM_CNT3_BASE
CYDEV_TCPWM_CNT3_BASE EQU 0x400501c0
ENDIF
IF :LNOT::DEF:CYDEV_TCPWM_CNT3_SIZE
CYDEV_TCPWM_CNT3_SIZE EQU 0x00000040
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT3_CTRL
CYREG_TCPWM_CNT3_CTRL EQU 0x400501c0
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT3_STATUS
CYREG_TCPWM_CNT3_STATUS EQU 0x400501c4
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT3_COUNTER
CYREG_TCPWM_CNT3_COUNTER EQU 0x400501c8
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT3_CC
CYREG_TCPWM_CNT3_CC EQU 0x400501cc
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT3_CC_BUFF
CYREG_TCPWM_CNT3_CC_BUFF EQU 0x400501d0
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT3_PERIOD
CYREG_TCPWM_CNT3_PERIOD EQU 0x400501d4
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT3_PERIOD_BUFF
CYREG_TCPWM_CNT3_PERIOD_BUFF EQU 0x400501d8
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT3_TR_CTRL0
CYREG_TCPWM_CNT3_TR_CTRL0 EQU 0x400501e0
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT3_TR_CTRL1
CYREG_TCPWM_CNT3_TR_CTRL1 EQU 0x400501e4
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT3_TR_CTRL2
CYREG_TCPWM_CNT3_TR_CTRL2 EQU 0x400501e8
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT3_INTR
CYREG_TCPWM_CNT3_INTR EQU 0x400501f0
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT3_INTR_SET
CYREG_TCPWM_CNT3_INTR_SET EQU 0x400501f4
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT3_INTR_MASK
CYREG_TCPWM_CNT3_INTR_MASK EQU 0x400501f8
ENDIF
IF :LNOT::DEF:CYREG_TCPWM_CNT3_INTR_MASKED
CYREG_TCPWM_CNT3_INTR_MASKED EQU 0x400501fc
ENDIF
IF :LNOT::DEF:CYDEV_SCB0_BASE
CYDEV_SCB0_BASE EQU 0x40060000
ENDIF
IF :LNOT::DEF:CYDEV_SCB0_SIZE
CYDEV_SCB0_SIZE EQU 0x00010000
ENDIF
IF :LNOT::DEF:CYREG_SCB0_CTRL
CYREG_SCB0_CTRL EQU 0x40060000
ENDIF
IF :LNOT::DEF:CYFLD_SCB_OVS__OFFSET
CYFLD_SCB_OVS__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SCB_OVS__SIZE
CYFLD_SCB_OVS__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SCB_EC_AM_MODE__OFFSET
CYFLD_SCB_EC_AM_MODE__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_SCB_EC_AM_MODE__SIZE
CYFLD_SCB_EC_AM_MODE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_EC_OP_MODE__OFFSET
CYFLD_SCB_EC_OP_MODE__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_SCB_EC_OP_MODE__SIZE
CYFLD_SCB_EC_OP_MODE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_EZ_MODE__OFFSET
CYFLD_SCB_EZ_MODE__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD_SCB_EZ_MODE__SIZE
CYFLD_SCB_EZ_MODE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_ADDR_ACCEPT__OFFSET
CYFLD_SCB_ADDR_ACCEPT__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_SCB_ADDR_ACCEPT__SIZE
CYFLD_SCB_ADDR_ACCEPT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_BLOCK__OFFSET
CYFLD_SCB_BLOCK__OFFSET EQU 0x00000011
ENDIF
IF :LNOT::DEF:CYFLD_SCB_BLOCK__SIZE
CYFLD_SCB_BLOCK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_MODE__OFFSET
CYFLD_SCB_MODE__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_SCB_MODE__SIZE
CYFLD_SCB_MODE__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_SCB_MODE_I2C
CYVAL_SCB_MODE_I2C EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_SCB_MODE_SPI
CYVAL_SCB_MODE_SPI EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_SCB_MODE_UART
CYVAL_SCB_MODE_UART EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SCB_ENABLED__OFFSET
CYFLD_SCB_ENABLED__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_SCB_ENABLED__SIZE
CYFLD_SCB_ENABLED__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SCB0_STATUS
CYREG_SCB0_STATUS EQU 0x40060004
ENDIF
IF :LNOT::DEF:CYFLD_SCB_EC_BUSY__OFFSET
CYFLD_SCB_EC_BUSY__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SCB_EC_BUSY__SIZE
CYFLD_SCB_EC_BUSY__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SCB0_SPI_CTRL
CYREG_SCB0_SPI_CTRL EQU 0x40060020
ENDIF
IF :LNOT::DEF:CYFLD_SCB_CONTINUOUS__OFFSET
CYFLD_SCB_CONTINUOUS__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SCB_CONTINUOUS__SIZE
CYFLD_SCB_CONTINUOUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SELECT_PRECEDE__OFFSET
CYFLD_SCB_SELECT_PRECEDE__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SELECT_PRECEDE__SIZE
CYFLD_SCB_SELECT_PRECEDE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_CPHA__OFFSET
CYFLD_SCB_CPHA__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SCB_CPHA__SIZE
CYFLD_SCB_CPHA__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_CPOL__OFFSET
CYFLD_SCB_CPOL__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_SCB_CPOL__SIZE
CYFLD_SCB_CPOL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_LATE_MISO_SAMPLE__OFFSET
CYFLD_SCB_LATE_MISO_SAMPLE__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SCB_LATE_MISO_SAMPLE__SIZE
CYFLD_SCB_LATE_MISO_SAMPLE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_LOOPBACK__OFFSET
CYFLD_SCB_LOOPBACK__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_SCB_LOOPBACK__SIZE
CYFLD_SCB_LOOPBACK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SLAVE_SELECT__OFFSET
CYFLD_SCB_SLAVE_SELECT__OFFSET EQU 0x0000001a
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SLAVE_SELECT__SIZE
CYFLD_SCB_SLAVE_SELECT__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SCB_MASTER_MODE__OFFSET
CYFLD_SCB_MASTER_MODE__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_SCB_MASTER_MODE__SIZE
CYFLD_SCB_MASTER_MODE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SCB0_SPI_STATUS
CYREG_SCB0_SPI_STATUS EQU 0x40060024
ENDIF
IF :LNOT::DEF:CYFLD_SCB_BUS_BUSY__OFFSET
CYFLD_SCB_BUS_BUSY__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SCB_BUS_BUSY__SIZE
CYFLD_SCB_BUS_BUSY__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_EZ_ADDR__OFFSET
CYFLD_SCB_EZ_ADDR__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_SCB_EZ_ADDR__SIZE
CYFLD_SCB_EZ_ADDR__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_SCB0_UART_CTRL
CYREG_SCB0_UART_CTRL EQU 0x40060040
ENDIF
IF :LNOT::DEF:CYREG_SCB0_UART_TX_CTRL
CYREG_SCB0_UART_TX_CTRL EQU 0x40060044
ENDIF
IF :LNOT::DEF:CYFLD_SCB_STOP_BITS__OFFSET
CYFLD_SCB_STOP_BITS__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SCB_STOP_BITS__SIZE
CYFLD_SCB_STOP_BITS__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_SCB_PARITY__OFFSET
CYFLD_SCB_PARITY__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SCB_PARITY__SIZE
CYFLD_SCB_PARITY__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_PARITY_ENABLED__OFFSET
CYFLD_SCB_PARITY_ENABLED__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_SCB_PARITY_ENABLED__SIZE
CYFLD_SCB_PARITY_ENABLED__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RETRY_ON_NACK__OFFSET
CYFLD_SCB_RETRY_ON_NACK__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RETRY_ON_NACK__SIZE
CYFLD_SCB_RETRY_ON_NACK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SCB0_UART_RX_CTRL
CYREG_SCB0_UART_RX_CTRL EQU 0x40060048
ENDIF
IF :LNOT::DEF:CYFLD_SCB_POLARITY__OFFSET
CYFLD_SCB_POLARITY__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_SCB_POLARITY__SIZE
CYFLD_SCB_POLARITY__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_DROP_ON_PARITY_ERROR__OFFSET
CYFLD_SCB_DROP_ON_PARITY_ERROR__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_SCB_DROP_ON_PARITY_ERROR__SIZE
CYFLD_SCB_DROP_ON_PARITY_ERROR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_DROP_ON_FRAME_ERROR__OFFSET
CYFLD_SCB_DROP_ON_FRAME_ERROR__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_SCB_DROP_ON_FRAME_ERROR__SIZE
CYFLD_SCB_DROP_ON_FRAME_ERROR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_MP_MODE__OFFSET
CYFLD_SCB_MP_MODE__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD_SCB_MP_MODE__SIZE
CYFLD_SCB_MP_MODE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_LIN_MODE__OFFSET
CYFLD_SCB_LIN_MODE__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD_SCB_LIN_MODE__SIZE
CYFLD_SCB_LIN_MODE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SKIP_START__OFFSET
CYFLD_SCB_SKIP_START__OFFSET EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SKIP_START__SIZE
CYFLD_SCB_SKIP_START__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_BREAK_WIDTH__OFFSET
CYFLD_SCB_BREAK_WIDTH__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_SCB_BREAK_WIDTH__SIZE
CYFLD_SCB_BREAK_WIDTH__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYREG_SCB0_UART_RX_STATUS
CYREG_SCB0_UART_RX_STATUS EQU 0x4006004c
ENDIF
IF :LNOT::DEF:CYFLD_SCB_BR_COUNTER__OFFSET
CYFLD_SCB_BR_COUNTER__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SCB_BR_COUNTER__SIZE
CYFLD_SCB_BR_COUNTER__SIZE EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYREG_SCB0_I2C_CTRL
CYREG_SCB0_I2C_CTRL EQU 0x40060060
ENDIF
IF :LNOT::DEF:CYFLD_SCB_HIGH_PHASE_OVS__OFFSET
CYFLD_SCB_HIGH_PHASE_OVS__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SCB_HIGH_PHASE_OVS__SIZE
CYFLD_SCB_HIGH_PHASE_OVS__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SCB_LOW_PHASE_OVS__OFFSET
CYFLD_SCB_LOW_PHASE_OVS__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SCB_LOW_PHASE_OVS__SIZE
CYFLD_SCB_LOW_PHASE_OVS__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SCB_M_READY_DATA_ACK__OFFSET
CYFLD_SCB_M_READY_DATA_ACK__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_SCB_M_READY_DATA_ACK__SIZE
CYFLD_SCB_M_READY_DATA_ACK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_M_NOT_READY_DATA_NACK__OFFSET
CYFLD_SCB_M_NOT_READY_DATA_NACK__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_SCB_M_NOT_READY_DATA_NACK__SIZE
CYFLD_SCB_M_NOT_READY_DATA_NACK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_S_GENERAL_IGNORE__OFFSET
CYFLD_SCB_S_GENERAL_IGNORE__OFFSET EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYFLD_SCB_S_GENERAL_IGNORE__SIZE
CYFLD_SCB_S_GENERAL_IGNORE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_S_READY_ADDR_ACK__OFFSET
CYFLD_SCB_S_READY_ADDR_ACK__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD_SCB_S_READY_ADDR_ACK__SIZE
CYFLD_SCB_S_READY_ADDR_ACK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_S_READY_DATA_ACK__OFFSET
CYFLD_SCB_S_READY_DATA_ACK__OFFSET EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYFLD_SCB_S_READY_DATA_ACK__SIZE
CYFLD_SCB_S_READY_DATA_ACK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_S_NOT_READY_ADDR_NACK__OFFSET
CYFLD_SCB_S_NOT_READY_ADDR_NACK__OFFSET EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYFLD_SCB_S_NOT_READY_ADDR_NACK__SIZE
CYFLD_SCB_S_NOT_READY_ADDR_NACK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_S_NOT_READY_DATA_NACK__OFFSET
CYFLD_SCB_S_NOT_READY_DATA_NACK__OFFSET EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD_SCB_S_NOT_READY_DATA_NACK__SIZE
CYFLD_SCB_S_NOT_READY_DATA_NACK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SLAVE_MODE__OFFSET
CYFLD_SCB_SLAVE_MODE__OFFSET EQU 0x0000001e
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SLAVE_MODE__SIZE
CYFLD_SCB_SLAVE_MODE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SCB0_I2C_STATUS
CYREG_SCB0_I2C_STATUS EQU 0x40060064
ENDIF
IF :LNOT::DEF:CYFLD_SCB_S_READ__OFFSET
CYFLD_SCB_S_READ__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SCB_S_READ__SIZE
CYFLD_SCB_S_READ__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_M_READ__OFFSET
CYFLD_SCB_M_READ__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_SCB_M_READ__SIZE
CYFLD_SCB_M_READ__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SCB0_I2C_M_CMD
CYREG_SCB0_I2C_M_CMD EQU 0x40060068
ENDIF
IF :LNOT::DEF:CYFLD_SCB_M_START__OFFSET
CYFLD_SCB_M_START__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SCB_M_START__SIZE
CYFLD_SCB_M_START__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_M_START_ON_IDLE__OFFSET
CYFLD_SCB_M_START_ON_IDLE__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_M_START_ON_IDLE__SIZE
CYFLD_SCB_M_START_ON_IDLE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_M_ACK__OFFSET
CYFLD_SCB_M_ACK__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SCB_M_ACK__SIZE
CYFLD_SCB_M_ACK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_M_NACK__OFFSET
CYFLD_SCB_M_NACK__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_SCB_M_NACK__SIZE
CYFLD_SCB_M_NACK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_M_STOP__OFFSET
CYFLD_SCB_M_STOP__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SCB_M_STOP__SIZE
CYFLD_SCB_M_STOP__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SCB0_I2C_S_CMD
CYREG_SCB0_I2C_S_CMD EQU 0x4006006c
ENDIF
IF :LNOT::DEF:CYFLD_SCB_S_ACK__OFFSET
CYFLD_SCB_S_ACK__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SCB_S_ACK__SIZE
CYFLD_SCB_S_ACK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_S_NACK__OFFSET
CYFLD_SCB_S_NACK__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_S_NACK__SIZE
CYFLD_SCB_S_NACK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SCB0_I2C_CFG
CYREG_SCB0_I2C_CFG EQU 0x40060070
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SDA_FILT_HYS__OFFSET
CYFLD_SCB_SDA_FILT_HYS__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SDA_FILT_HYS__SIZE
CYFLD_SCB_SDA_FILT_HYS__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SDA_FILT_TRIM__OFFSET
CYFLD_SCB_SDA_FILT_TRIM__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SDA_FILT_TRIM__SIZE
CYFLD_SCB_SDA_FILT_TRIM__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SCL_FILT_HYS__OFFSET
CYFLD_SCB_SCL_FILT_HYS__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SCL_FILT_HYS__SIZE
CYFLD_SCB_SCL_FILT_HYS__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SCL_FILT_TRIM__OFFSET
CYFLD_SCB_SCL_FILT_TRIM__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SCL_FILT_TRIM__SIZE
CYFLD_SCB_SCL_FILT_TRIM__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SDA_FILT_OUT_HYS__OFFSET
CYFLD_SCB_SDA_FILT_OUT_HYS__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SDA_FILT_OUT_HYS__SIZE
CYFLD_SCB_SDA_FILT_OUT_HYS__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SDA_FILT_OUT_TRIM__OFFSET
CYFLD_SCB_SDA_FILT_OUT_TRIM__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SDA_FILT_OUT_TRIM__SIZE
CYFLD_SCB_SDA_FILT_OUT_TRIM__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SDA_FILT_HS__OFFSET
CYFLD_SCB_SDA_FILT_HS__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SDA_FILT_HS__SIZE
CYFLD_SCB_SDA_FILT_HS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SDA_FILT_ENABLED__OFFSET
CYFLD_SCB_SDA_FILT_ENABLED__OFFSET EQU 0x00000011
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SDA_FILT_ENABLED__SIZE
CYFLD_SCB_SDA_FILT_ENABLED__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SCL_FILT_HS__OFFSET
CYFLD_SCB_SCL_FILT_HS__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SCL_FILT_HS__SIZE
CYFLD_SCB_SCL_FILT_HS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SCL_FILT_ENABLED__OFFSET
CYFLD_SCB_SCL_FILT_ENABLED__OFFSET EQU 0x00000019
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SCL_FILT_ENABLED__SIZE
CYFLD_SCB_SCL_FILT_ENABLED__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SDA_FILT_OUT_HS__OFFSET
CYFLD_SCB_SDA_FILT_OUT_HS__OFFSET EQU 0x0000001a
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SDA_FILT_OUT_HS__SIZE
CYFLD_SCB_SDA_FILT_OUT_HS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SDA_FILT_OUT_ENABLED__OFFSET
CYFLD_SCB_SDA_FILT_OUT_ENABLED__OFFSET EQU 0x0000001b
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SDA_FILT_OUT_ENABLED__SIZE
CYFLD_SCB_SDA_FILT_OUT_ENABLED__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SCB0_BIST_CONTROL
CYREG_SCB0_BIST_CONTROL EQU 0x40060100
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RAM_ADDR__OFFSET
CYFLD_SCB_RAM_ADDR__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RAM_ADDR__SIZE
CYFLD_SCB_RAM_ADDR__SIZE EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RAM_OP1__OFFSET
CYFLD_SCB_RAM_OP1__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RAM_OP1__SIZE
CYFLD_SCB_RAM_OP1__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RAM_OP2__OFFSET
CYFLD_SCB_RAM_OP2__OFFSET EQU 0x00000012
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RAM_OP2__SIZE
CYFLD_SCB_RAM_OP2__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RAM_OP3__OFFSET
CYFLD_SCB_RAM_OP3__OFFSET EQU 0x00000014
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RAM_OP3__SIZE
CYFLD_SCB_RAM_OP3__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RAM_OP4__OFFSET
CYFLD_SCB_RAM_OP4__OFFSET EQU 0x00000016
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RAM_OP4__SIZE
CYFLD_SCB_RAM_OP4__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RAM_OPCNT__OFFSET
CYFLD_SCB_RAM_OPCNT__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RAM_OPCNT__SIZE
CYFLD_SCB_RAM_OPCNT__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RAM_PREADR__OFFSET
CYFLD_SCB_RAM_PREADR__OFFSET EQU 0x0000001a
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RAM_PREADR__SIZE
CYFLD_SCB_RAM_PREADR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RAM_WORD__OFFSET
CYFLD_SCB_RAM_WORD__OFFSET EQU 0x0000001b
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RAM_WORD__SIZE
CYFLD_SCB_RAM_WORD__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RAM_FAIL__OFFSET
CYFLD_SCB_RAM_FAIL__OFFSET EQU 0x0000001c
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RAM_FAIL__SIZE
CYFLD_SCB_RAM_FAIL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RAM_GO__OFFSET
CYFLD_SCB_RAM_GO__OFFSET EQU 0x0000001d
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RAM_GO__SIZE
CYFLD_SCB_RAM_GO__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SCB0_BIST_DATA
CYREG_SCB0_BIST_DATA EQU 0x40060104
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RAM_DATA__OFFSET
CYFLD_SCB_RAM_DATA__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RAM_DATA__SIZE
CYFLD_SCB_RAM_DATA__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_SCB0_TX_CTRL
CYREG_SCB0_TX_CTRL EQU 0x40060200
ENDIF
IF :LNOT::DEF:CYFLD_SCB_DATA_WIDTH__OFFSET
CYFLD_SCB_DATA_WIDTH__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SCB_DATA_WIDTH__SIZE
CYFLD_SCB_DATA_WIDTH__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SCB_MSB_FIRST__OFFSET
CYFLD_SCB_MSB_FIRST__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_SCB_MSB_FIRST__SIZE
CYFLD_SCB_MSB_FIRST__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SCB0_TX_FIFO_CTRL
CYREG_SCB0_TX_FIFO_CTRL EQU 0x40060204
ENDIF
IF :LNOT::DEF:CYFLD_SCB_TRIGGER_LEVEL__OFFSET
CYFLD_SCB_TRIGGER_LEVEL__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SCB_TRIGGER_LEVEL__SIZE
CYFLD_SCB_TRIGGER_LEVEL__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_SCB_CLEAR__OFFSET
CYFLD_SCB_CLEAR__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_SCB_CLEAR__SIZE
CYFLD_SCB_CLEAR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_FREEZE__OFFSET
CYFLD_SCB_FREEZE__OFFSET EQU 0x00000011
ENDIF
IF :LNOT::DEF:CYFLD_SCB_FREEZE__SIZE
CYFLD_SCB_FREEZE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SCB0_TX_FIFO_STATUS
CYREG_SCB0_TX_FIFO_STATUS EQU 0x40060208
ENDIF
IF :LNOT::DEF:CYFLD_SCB_USED__OFFSET
CYFLD_SCB_USED__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SCB_USED__SIZE
CYFLD_SCB_USED__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SR_VALID__OFFSET
CYFLD_SCB_SR_VALID__OFFSET EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SR_VALID__SIZE
CYFLD_SCB_SR_VALID__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RD_PTR__OFFSET
CYFLD_SCB_RD_PTR__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RD_PTR__SIZE
CYFLD_SCB_RD_PTR__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_SCB_WR_PTR__OFFSET
CYFLD_SCB_WR_PTR__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_SCB_WR_PTR__SIZE
CYFLD_SCB_WR_PTR__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_SCB0_TX_FIFO_WR
CYREG_SCB0_TX_FIFO_WR EQU 0x40060240
ENDIF
IF :LNOT::DEF:CYFLD_SCB_DATA__OFFSET
CYFLD_SCB_DATA__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SCB_DATA__SIZE
CYFLD_SCB_DATA__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_SCB0_RX_CTRL
CYREG_SCB0_RX_CTRL EQU 0x40060300
ENDIF
IF :LNOT::DEF:CYFLD_SCB_MEDIAN__OFFSET
CYFLD_SCB_MEDIAN__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_SCB_MEDIAN__SIZE
CYFLD_SCB_MEDIAN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SCB0_RX_FIFO_CTRL
CYREG_SCB0_RX_FIFO_CTRL EQU 0x40060304
ENDIF
IF :LNOT::DEF:CYREG_SCB0_RX_FIFO_STATUS
CYREG_SCB0_RX_FIFO_STATUS EQU 0x40060308
ENDIF
IF :LNOT::DEF:CYREG_SCB0_RX_MATCH
CYREG_SCB0_RX_MATCH EQU 0x40060310
ENDIF
IF :LNOT::DEF:CYFLD_SCB_ADDR__OFFSET
CYFLD_SCB_ADDR__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SCB_ADDR__SIZE
CYFLD_SCB_ADDR__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_SCB_MASK__OFFSET
CYFLD_SCB_MASK__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_SCB_MASK__SIZE
CYFLD_SCB_MASK__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_SCB0_RX_FIFO_RD
CYREG_SCB0_RX_FIFO_RD EQU 0x40060340
ENDIF
IF :LNOT::DEF:CYREG_SCB0_RX_FIFO_RD_SILENT
CYREG_SCB0_RX_FIFO_RD_SILENT EQU 0x40060344
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA00
CYREG_SCB0_EZ_DATA00 EQU 0x40060400
ENDIF
IF :LNOT::DEF:CYFLD_SCB_EZ_DATA__OFFSET
CYFLD_SCB_EZ_DATA__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SCB_EZ_DATA__SIZE
CYFLD_SCB_EZ_DATA__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA01
CYREG_SCB0_EZ_DATA01 EQU 0x40060404
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA02
CYREG_SCB0_EZ_DATA02 EQU 0x40060408
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA03
CYREG_SCB0_EZ_DATA03 EQU 0x4006040c
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA04
CYREG_SCB0_EZ_DATA04 EQU 0x40060410
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA05
CYREG_SCB0_EZ_DATA05 EQU 0x40060414
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA06
CYREG_SCB0_EZ_DATA06 EQU 0x40060418
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA07
CYREG_SCB0_EZ_DATA07 EQU 0x4006041c
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA08
CYREG_SCB0_EZ_DATA08 EQU 0x40060420
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA09
CYREG_SCB0_EZ_DATA09 EQU 0x40060424
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA10
CYREG_SCB0_EZ_DATA10 EQU 0x40060428
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA11
CYREG_SCB0_EZ_DATA11 EQU 0x4006042c
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA12
CYREG_SCB0_EZ_DATA12 EQU 0x40060430
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA13
CYREG_SCB0_EZ_DATA13 EQU 0x40060434
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA14
CYREG_SCB0_EZ_DATA14 EQU 0x40060438
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA15
CYREG_SCB0_EZ_DATA15 EQU 0x4006043c
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA16
CYREG_SCB0_EZ_DATA16 EQU 0x40060440
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA17
CYREG_SCB0_EZ_DATA17 EQU 0x40060444
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA18
CYREG_SCB0_EZ_DATA18 EQU 0x40060448
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA19
CYREG_SCB0_EZ_DATA19 EQU 0x4006044c
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA20
CYREG_SCB0_EZ_DATA20 EQU 0x40060450
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA21
CYREG_SCB0_EZ_DATA21 EQU 0x40060454
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA22
CYREG_SCB0_EZ_DATA22 EQU 0x40060458
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA23
CYREG_SCB0_EZ_DATA23 EQU 0x4006045c
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA24
CYREG_SCB0_EZ_DATA24 EQU 0x40060460
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA25
CYREG_SCB0_EZ_DATA25 EQU 0x40060464
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA26
CYREG_SCB0_EZ_DATA26 EQU 0x40060468
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA27
CYREG_SCB0_EZ_DATA27 EQU 0x4006046c
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA28
CYREG_SCB0_EZ_DATA28 EQU 0x40060470
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA29
CYREG_SCB0_EZ_DATA29 EQU 0x40060474
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA30
CYREG_SCB0_EZ_DATA30 EQU 0x40060478
ENDIF
IF :LNOT::DEF:CYREG_SCB0_EZ_DATA31
CYREG_SCB0_EZ_DATA31 EQU 0x4006047c
ENDIF
IF :LNOT::DEF:CYREG_SCB0_INTR_CAUSE
CYREG_SCB0_INTR_CAUSE EQU 0x40060e00
ENDIF
IF :LNOT::DEF:CYFLD_SCB_M__OFFSET
CYFLD_SCB_M__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SCB_M__SIZE
CYFLD_SCB_M__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_S__OFFSET
CYFLD_SCB_S__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_S__SIZE
CYFLD_SCB_S__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_TX__OFFSET
CYFLD_SCB_TX__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SCB_TX__SIZE
CYFLD_SCB_TX__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RX__OFFSET
CYFLD_SCB_RX__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_SCB_RX__SIZE
CYFLD_SCB_RX__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_I2C_EC__OFFSET
CYFLD_SCB_I2C_EC__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SCB_I2C_EC__SIZE
CYFLD_SCB_I2C_EC__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SPI_EC__OFFSET
CYFLD_SCB_SPI_EC__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SPI_EC__SIZE
CYFLD_SCB_SPI_EC__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SCB0_INTR_I2C_EC
CYREG_SCB0_INTR_I2C_EC EQU 0x40060e80
ENDIF
IF :LNOT::DEF:CYFLD_SCB_WAKE_UP__OFFSET
CYFLD_SCB_WAKE_UP__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SCB_WAKE_UP__SIZE
CYFLD_SCB_WAKE_UP__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_EZ_STOP__OFFSET
CYFLD_SCB_EZ_STOP__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_EZ_STOP__SIZE
CYFLD_SCB_EZ_STOP__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_EZ_WRITE_STOP__OFFSET
CYFLD_SCB_EZ_WRITE_STOP__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SCB_EZ_WRITE_STOP__SIZE
CYFLD_SCB_EZ_WRITE_STOP__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SCB0_INTR_I2C_EC_MASK
CYREG_SCB0_INTR_I2C_EC_MASK EQU 0x40060e88
ENDIF
IF :LNOT::DEF:CYREG_SCB0_INTR_I2C_EC_MASKED
CYREG_SCB0_INTR_I2C_EC_MASKED EQU 0x40060e8c
ENDIF
IF :LNOT::DEF:CYREG_SCB0_INTR_SPI_EC
CYREG_SCB0_INTR_SPI_EC EQU 0x40060ec0
ENDIF
IF :LNOT::DEF:CYREG_SCB0_INTR_SPI_EC_MASK
CYREG_SCB0_INTR_SPI_EC_MASK EQU 0x40060ec8
ENDIF
IF :LNOT::DEF:CYREG_SCB0_INTR_SPI_EC_MASKED
CYREG_SCB0_INTR_SPI_EC_MASKED EQU 0x40060ecc
ENDIF
IF :LNOT::DEF:CYREG_SCB0_INTR_M
CYREG_SCB0_INTR_M EQU 0x40060f00
ENDIF
IF :LNOT::DEF:CYFLD_SCB_I2C_ARB_LOST__OFFSET
CYFLD_SCB_I2C_ARB_LOST__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SCB_I2C_ARB_LOST__SIZE
CYFLD_SCB_I2C_ARB_LOST__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_I2C_NACK__OFFSET
CYFLD_SCB_I2C_NACK__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_I2C_NACK__SIZE
CYFLD_SCB_I2C_NACK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_I2C_ACK__OFFSET
CYFLD_SCB_I2C_ACK__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SCB_I2C_ACK__SIZE
CYFLD_SCB_I2C_ACK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_I2C_STOP__OFFSET
CYFLD_SCB_I2C_STOP__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SCB_I2C_STOP__SIZE
CYFLD_SCB_I2C_STOP__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_I2C_BUS_ERROR__OFFSET
CYFLD_SCB_I2C_BUS_ERROR__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_SCB_I2C_BUS_ERROR__SIZE
CYFLD_SCB_I2C_BUS_ERROR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SPI_DONE__OFFSET
CYFLD_SCB_SPI_DONE__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SPI_DONE__SIZE
CYFLD_SCB_SPI_DONE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SCB0_INTR_M_SET
CYREG_SCB0_INTR_M_SET EQU 0x40060f04
ENDIF
IF :LNOT::DEF:CYREG_SCB0_INTR_M_MASK
CYREG_SCB0_INTR_M_MASK EQU 0x40060f08
ENDIF
IF :LNOT::DEF:CYREG_SCB0_INTR_M_MASKED
CYREG_SCB0_INTR_M_MASKED EQU 0x40060f0c
ENDIF
IF :LNOT::DEF:CYREG_SCB0_INTR_S
CYREG_SCB0_INTR_S EQU 0x40060f40
ENDIF
IF :LNOT::DEF:CYFLD_SCB_I2C_WRITE_STOP__OFFSET
CYFLD_SCB_I2C_WRITE_STOP__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_SCB_I2C_WRITE_STOP__SIZE
CYFLD_SCB_I2C_WRITE_STOP__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_I2C_START__OFFSET
CYFLD_SCB_I2C_START__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_SCB_I2C_START__SIZE
CYFLD_SCB_I2C_START__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_I2C_ADDR_MATCH__OFFSET
CYFLD_SCB_I2C_ADDR_MATCH__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_SCB_I2C_ADDR_MATCH__SIZE
CYFLD_SCB_I2C_ADDR_MATCH__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_I2C_GENERAL__OFFSET
CYFLD_SCB_I2C_GENERAL__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_SCB_I2C_GENERAL__SIZE
CYFLD_SCB_I2C_GENERAL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SPI_EZ_WRITE_STOP__OFFSET
CYFLD_SCB_SPI_EZ_WRITE_STOP__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SPI_EZ_WRITE_STOP__SIZE
CYFLD_SCB_SPI_EZ_WRITE_STOP__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SPI_EZ_STOP__OFFSET
CYFLD_SCB_SPI_EZ_STOP__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SPI_EZ_STOP__SIZE
CYFLD_SCB_SPI_EZ_STOP__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SPI_BUS_ERROR__OFFSET
CYFLD_SCB_SPI_BUS_ERROR__OFFSET EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYFLD_SCB_SPI_BUS_ERROR__SIZE
CYFLD_SCB_SPI_BUS_ERROR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SCB0_INTR_S_SET
CYREG_SCB0_INTR_S_SET EQU 0x40060f44
ENDIF
IF :LNOT::DEF:CYREG_SCB0_INTR_S_MASK
CYREG_SCB0_INTR_S_MASK EQU 0x40060f48
ENDIF
IF :LNOT::DEF:CYREG_SCB0_INTR_S_MASKED
CYREG_SCB0_INTR_S_MASKED EQU 0x40060f4c
ENDIF
IF :LNOT::DEF:CYREG_SCB0_INTR_TX
CYREG_SCB0_INTR_TX EQU 0x40060f80
ENDIF
IF :LNOT::DEF:CYFLD_SCB_TRIGGER__OFFSET
CYFLD_SCB_TRIGGER__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SCB_TRIGGER__SIZE
CYFLD_SCB_TRIGGER__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_NOT_FULL__OFFSET
CYFLD_SCB_NOT_FULL__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_NOT_FULL__SIZE
CYFLD_SCB_NOT_FULL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_EMPTY__OFFSET
CYFLD_SCB_EMPTY__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SCB_EMPTY__SIZE
CYFLD_SCB_EMPTY__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_OVERFLOW__OFFSET
CYFLD_SCB_OVERFLOW__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_SCB_OVERFLOW__SIZE
CYFLD_SCB_OVERFLOW__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_UNDERFLOW__OFFSET
CYFLD_SCB_UNDERFLOW__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_SCB_UNDERFLOW__SIZE
CYFLD_SCB_UNDERFLOW__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_BLOCKED__OFFSET
CYFLD_SCB_BLOCKED__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_SCB_BLOCKED__SIZE
CYFLD_SCB_BLOCKED__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_UART_NACK__OFFSET
CYFLD_SCB_UART_NACK__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_SCB_UART_NACK__SIZE
CYFLD_SCB_UART_NACK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_UART_DONE__OFFSET
CYFLD_SCB_UART_DONE__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_SCB_UART_DONE__SIZE
CYFLD_SCB_UART_DONE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_UART_ARB_LOST__OFFSET
CYFLD_SCB_UART_ARB_LOST__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD_SCB_UART_ARB_LOST__SIZE
CYFLD_SCB_UART_ARB_LOST__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SCB0_INTR_TX_SET
CYREG_SCB0_INTR_TX_SET EQU 0x40060f84
ENDIF
IF :LNOT::DEF:CYREG_SCB0_INTR_TX_MASK
CYREG_SCB0_INTR_TX_MASK EQU 0x40060f88
ENDIF
IF :LNOT::DEF:CYREG_SCB0_INTR_TX_MASKED
CYREG_SCB0_INTR_TX_MASKED EQU 0x40060f8c
ENDIF
IF :LNOT::DEF:CYREG_SCB0_INTR_RX
CYREG_SCB0_INTR_RX EQU 0x40060fc0
ENDIF
IF :LNOT::DEF:CYFLD_SCB_NOT_EMPTY__OFFSET
CYFLD_SCB_NOT_EMPTY__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SCB_NOT_EMPTY__SIZE
CYFLD_SCB_NOT_EMPTY__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_FULL__OFFSET
CYFLD_SCB_FULL__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_SCB_FULL__SIZE
CYFLD_SCB_FULL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_FRAME_ERROR__OFFSET
CYFLD_SCB_FRAME_ERROR__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_SCB_FRAME_ERROR__SIZE
CYFLD_SCB_FRAME_ERROR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_PARITY_ERROR__OFFSET
CYFLD_SCB_PARITY_ERROR__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_SCB_PARITY_ERROR__SIZE
CYFLD_SCB_PARITY_ERROR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_BAUD_DETECT__OFFSET
CYFLD_SCB_BAUD_DETECT__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD_SCB_BAUD_DETECT__SIZE
CYFLD_SCB_BAUD_DETECT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SCB_BREAK_DETECT__OFFSET
CYFLD_SCB_BREAK_DETECT__OFFSET EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYFLD_SCB_BREAK_DETECT__SIZE
CYFLD_SCB_BREAK_DETECT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SCB0_INTR_RX_SET
CYREG_SCB0_INTR_RX_SET EQU 0x40060fc4
ENDIF
IF :LNOT::DEF:CYREG_SCB0_INTR_RX_MASK
CYREG_SCB0_INTR_RX_MASK EQU 0x40060fc8
ENDIF
IF :LNOT::DEF:CYREG_SCB0_INTR_RX_MASKED
CYREG_SCB0_INTR_RX_MASKED EQU 0x40060fcc
ENDIF
IF :LNOT::DEF:CYDEV_SCB1_BASE
CYDEV_SCB1_BASE EQU 0x40070000
ENDIF
IF :LNOT::DEF:CYDEV_SCB1_SIZE
CYDEV_SCB1_SIZE EQU 0x00010000
ENDIF
IF :LNOT::DEF:CYREG_SCB1_CTRL
CYREG_SCB1_CTRL EQU 0x40070000
ENDIF
IF :LNOT::DEF:CYREG_SCB1_STATUS
CYREG_SCB1_STATUS EQU 0x40070004
ENDIF
IF :LNOT::DEF:CYREG_SCB1_SPI_CTRL
CYREG_SCB1_SPI_CTRL EQU 0x40070020
ENDIF
IF :LNOT::DEF:CYREG_SCB1_SPI_STATUS
CYREG_SCB1_SPI_STATUS EQU 0x40070024
ENDIF
IF :LNOT::DEF:CYREG_SCB1_UART_CTRL
CYREG_SCB1_UART_CTRL EQU 0x40070040
ENDIF
IF :LNOT::DEF:CYREG_SCB1_UART_TX_CTRL
CYREG_SCB1_UART_TX_CTRL EQU 0x40070044
ENDIF
IF :LNOT::DEF:CYREG_SCB1_UART_RX_CTRL
CYREG_SCB1_UART_RX_CTRL EQU 0x40070048
ENDIF
IF :LNOT::DEF:CYREG_SCB1_UART_RX_STATUS
CYREG_SCB1_UART_RX_STATUS EQU 0x4007004c
ENDIF
IF :LNOT::DEF:CYREG_SCB1_I2C_CTRL
CYREG_SCB1_I2C_CTRL EQU 0x40070060
ENDIF
IF :LNOT::DEF:CYREG_SCB1_I2C_STATUS
CYREG_SCB1_I2C_STATUS EQU 0x40070064
ENDIF
IF :LNOT::DEF:CYREG_SCB1_I2C_M_CMD
CYREG_SCB1_I2C_M_CMD EQU 0x40070068
ENDIF
IF :LNOT::DEF:CYREG_SCB1_I2C_S_CMD
CYREG_SCB1_I2C_S_CMD EQU 0x4007006c
ENDIF
IF :LNOT::DEF:CYREG_SCB1_I2C_CFG
CYREG_SCB1_I2C_CFG EQU 0x40070070
ENDIF
IF :LNOT::DEF:CYREG_SCB1_BIST_CONTROL
CYREG_SCB1_BIST_CONTROL EQU 0x40070100
ENDIF
IF :LNOT::DEF:CYREG_SCB1_BIST_DATA
CYREG_SCB1_BIST_DATA EQU 0x40070104
ENDIF
IF :LNOT::DEF:CYREG_SCB1_TX_CTRL
CYREG_SCB1_TX_CTRL EQU 0x40070200
ENDIF
IF :LNOT::DEF:CYREG_SCB1_TX_FIFO_CTRL
CYREG_SCB1_TX_FIFO_CTRL EQU 0x40070204
ENDIF
IF :LNOT::DEF:CYREG_SCB1_TX_FIFO_STATUS
CYREG_SCB1_TX_FIFO_STATUS EQU 0x40070208
ENDIF
IF :LNOT::DEF:CYREG_SCB1_TX_FIFO_WR
CYREG_SCB1_TX_FIFO_WR EQU 0x40070240
ENDIF
IF :LNOT::DEF:CYREG_SCB1_RX_CTRL
CYREG_SCB1_RX_CTRL EQU 0x40070300
ENDIF
IF :LNOT::DEF:CYREG_SCB1_RX_FIFO_CTRL
CYREG_SCB1_RX_FIFO_CTRL EQU 0x40070304
ENDIF
IF :LNOT::DEF:CYREG_SCB1_RX_FIFO_STATUS
CYREG_SCB1_RX_FIFO_STATUS EQU 0x40070308
ENDIF
IF :LNOT::DEF:CYREG_SCB1_RX_MATCH
CYREG_SCB1_RX_MATCH EQU 0x40070310
ENDIF
IF :LNOT::DEF:CYREG_SCB1_RX_FIFO_RD
CYREG_SCB1_RX_FIFO_RD EQU 0x40070340
ENDIF
IF :LNOT::DEF:CYREG_SCB1_RX_FIFO_RD_SILENT
CYREG_SCB1_RX_FIFO_RD_SILENT EQU 0x40070344
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA00
CYREG_SCB1_EZ_DATA00 EQU 0x40070400
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA01
CYREG_SCB1_EZ_DATA01 EQU 0x40070404
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA02
CYREG_SCB1_EZ_DATA02 EQU 0x40070408
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA03
CYREG_SCB1_EZ_DATA03 EQU 0x4007040c
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA04
CYREG_SCB1_EZ_DATA04 EQU 0x40070410
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA05
CYREG_SCB1_EZ_DATA05 EQU 0x40070414
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA06
CYREG_SCB1_EZ_DATA06 EQU 0x40070418
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA07
CYREG_SCB1_EZ_DATA07 EQU 0x4007041c
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA08
CYREG_SCB1_EZ_DATA08 EQU 0x40070420
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA09
CYREG_SCB1_EZ_DATA09 EQU 0x40070424
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA10
CYREG_SCB1_EZ_DATA10 EQU 0x40070428
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA11
CYREG_SCB1_EZ_DATA11 EQU 0x4007042c
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA12
CYREG_SCB1_EZ_DATA12 EQU 0x40070430
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA13
CYREG_SCB1_EZ_DATA13 EQU 0x40070434
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA14
CYREG_SCB1_EZ_DATA14 EQU 0x40070438
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA15
CYREG_SCB1_EZ_DATA15 EQU 0x4007043c
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA16
CYREG_SCB1_EZ_DATA16 EQU 0x40070440
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA17
CYREG_SCB1_EZ_DATA17 EQU 0x40070444
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA18
CYREG_SCB1_EZ_DATA18 EQU 0x40070448
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA19
CYREG_SCB1_EZ_DATA19 EQU 0x4007044c
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA20
CYREG_SCB1_EZ_DATA20 EQU 0x40070450
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA21
CYREG_SCB1_EZ_DATA21 EQU 0x40070454
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA22
CYREG_SCB1_EZ_DATA22 EQU 0x40070458
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA23
CYREG_SCB1_EZ_DATA23 EQU 0x4007045c
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA24
CYREG_SCB1_EZ_DATA24 EQU 0x40070460
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA25
CYREG_SCB1_EZ_DATA25 EQU 0x40070464
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA26
CYREG_SCB1_EZ_DATA26 EQU 0x40070468
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA27
CYREG_SCB1_EZ_DATA27 EQU 0x4007046c
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA28
CYREG_SCB1_EZ_DATA28 EQU 0x40070470
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA29
CYREG_SCB1_EZ_DATA29 EQU 0x40070474
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA30
CYREG_SCB1_EZ_DATA30 EQU 0x40070478
ENDIF
IF :LNOT::DEF:CYREG_SCB1_EZ_DATA31
CYREG_SCB1_EZ_DATA31 EQU 0x4007047c
ENDIF
IF :LNOT::DEF:CYREG_SCB1_INTR_CAUSE
CYREG_SCB1_INTR_CAUSE EQU 0x40070e00
ENDIF
IF :LNOT::DEF:CYREG_SCB1_INTR_I2C_EC
CYREG_SCB1_INTR_I2C_EC EQU 0x40070e80
ENDIF
IF :LNOT::DEF:CYREG_SCB1_INTR_I2C_EC_MASK
CYREG_SCB1_INTR_I2C_EC_MASK EQU 0x40070e88
ENDIF
IF :LNOT::DEF:CYREG_SCB1_INTR_I2C_EC_MASKED
CYREG_SCB1_INTR_I2C_EC_MASKED EQU 0x40070e8c
ENDIF
IF :LNOT::DEF:CYREG_SCB1_INTR_SPI_EC
CYREG_SCB1_INTR_SPI_EC EQU 0x40070ec0
ENDIF
IF :LNOT::DEF:CYREG_SCB1_INTR_SPI_EC_MASK
CYREG_SCB1_INTR_SPI_EC_MASK EQU 0x40070ec8
ENDIF
IF :LNOT::DEF:CYREG_SCB1_INTR_SPI_EC_MASKED
CYREG_SCB1_INTR_SPI_EC_MASKED EQU 0x40070ecc
ENDIF
IF :LNOT::DEF:CYREG_SCB1_INTR_M
CYREG_SCB1_INTR_M EQU 0x40070f00
ENDIF
IF :LNOT::DEF:CYREG_SCB1_INTR_M_SET
CYREG_SCB1_INTR_M_SET EQU 0x40070f04
ENDIF
IF :LNOT::DEF:CYREG_SCB1_INTR_M_MASK
CYREG_SCB1_INTR_M_MASK EQU 0x40070f08
ENDIF
IF :LNOT::DEF:CYREG_SCB1_INTR_M_MASKED
CYREG_SCB1_INTR_M_MASKED EQU 0x40070f0c
ENDIF
IF :LNOT::DEF:CYREG_SCB1_INTR_S
CYREG_SCB1_INTR_S EQU 0x40070f40
ENDIF
IF :LNOT::DEF:CYREG_SCB1_INTR_S_SET
CYREG_SCB1_INTR_S_SET EQU 0x40070f44
ENDIF
IF :LNOT::DEF:CYREG_SCB1_INTR_S_MASK
CYREG_SCB1_INTR_S_MASK EQU 0x40070f48
ENDIF
IF :LNOT::DEF:CYREG_SCB1_INTR_S_MASKED
CYREG_SCB1_INTR_S_MASKED EQU 0x40070f4c
ENDIF
IF :LNOT::DEF:CYREG_SCB1_INTR_TX
CYREG_SCB1_INTR_TX EQU 0x40070f80
ENDIF
IF :LNOT::DEF:CYREG_SCB1_INTR_TX_SET
CYREG_SCB1_INTR_TX_SET EQU 0x40070f84
ENDIF
IF :LNOT::DEF:CYREG_SCB1_INTR_TX_MASK
CYREG_SCB1_INTR_TX_MASK EQU 0x40070f88
ENDIF
IF :LNOT::DEF:CYREG_SCB1_INTR_TX_MASKED
CYREG_SCB1_INTR_TX_MASKED EQU 0x40070f8c
ENDIF
IF :LNOT::DEF:CYREG_SCB1_INTR_RX
CYREG_SCB1_INTR_RX EQU 0x40070fc0
ENDIF
IF :LNOT::DEF:CYREG_SCB1_INTR_RX_SET
CYREG_SCB1_INTR_RX_SET EQU 0x40070fc4
ENDIF
IF :LNOT::DEF:CYREG_SCB1_INTR_RX_MASK
CYREG_SCB1_INTR_RX_MASK EQU 0x40070fc8
ENDIF
IF :LNOT::DEF:CYREG_SCB1_INTR_RX_MASKED
CYREG_SCB1_INTR_RX_MASKED EQU 0x40070fcc
ENDIF
IF :LNOT::DEF:CYDEV_CSD_BASE
CYDEV_CSD_BASE EQU 0x40080000
ENDIF
IF :LNOT::DEF:CYDEV_CSD_SIZE
CYDEV_CSD_SIZE EQU 0x00010000
ENDIF
IF :LNOT::DEF:CYREG_CSD_ID
CYREG_CSD_ID EQU 0x40080000
ENDIF
IF :LNOT::DEF:CYFLD_CSD_ID__OFFSET
CYFLD_CSD_ID__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CSD_ID__SIZE
CYFLD_CSD_ID__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_CSD_REVISION__OFFSET
CYFLD_CSD_REVISION__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_CSD_REVISION__SIZE
CYFLD_CSD_REVISION__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_CSD_CONFIG
CYREG_CSD_CONFIG EQU 0x40080004
ENDIF
IF :LNOT::DEF:CYFLD_CSD_DSI_SAMPLE_EN__OFFSET
CYFLD_CSD_DSI_SAMPLE_EN__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CSD_DSI_SAMPLE_EN__SIZE
CYFLD_CSD_DSI_SAMPLE_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_SAMPLE_SYNC__OFFSET
CYFLD_CSD_SAMPLE_SYNC__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_SAMPLE_SYNC__SIZE
CYFLD_CSD_SAMPLE_SYNC__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_PRS_CLEAR__OFFSET
CYFLD_CSD_PRS_CLEAR__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_CSD_PRS_CLEAR__SIZE
CYFLD_CSD_PRS_CLEAR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_PRS_SELECT__OFFSET
CYFLD_CSD_PRS_SELECT__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_CSD_PRS_SELECT__SIZE
CYFLD_CSD_PRS_SELECT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_CSD_PRS_SELECT_DIV2
CYVAL_CSD_PRS_SELECT_DIV2 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_CSD_PRS_SELECT_PRS
CYVAL_CSD_PRS_SELECT_PRS EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_PRS_12_8__OFFSET
CYFLD_CSD_PRS_12_8__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_CSD_PRS_12_8__SIZE
CYFLD_CSD_PRS_12_8__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_CSD_PRS_12_8_8B
CYVAL_CSD_PRS_12_8_8B EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_CSD_PRS_12_8_12B
CYVAL_CSD_PRS_12_8_12B EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_DSI_SENSE_EN__OFFSET
CYFLD_CSD_DSI_SENSE_EN__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_CSD_DSI_SENSE_EN__SIZE
CYFLD_CSD_DSI_SENSE_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_SHIELD_DELAY__OFFSET
CYFLD_CSD_SHIELD_DELAY__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_CSD_SHIELD_DELAY__SIZE
CYFLD_CSD_SHIELD_DELAY__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_CSD_SENSE_COMP_BW__OFFSET
CYFLD_CSD_SENSE_COMP_BW__OFFSET EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYFLD_CSD_SENSE_COMP_BW__SIZE
CYFLD_CSD_SENSE_COMP_BW__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_CSD_SENSE_COMP_BW_LOW
CYVAL_CSD_SENSE_COMP_BW_LOW EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_CSD_SENSE_COMP_BW_HIGH
CYVAL_CSD_SENSE_COMP_BW_HIGH EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_SENSE_EN__OFFSET
CYFLD_CSD_SENSE_EN__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD_CSD_SENSE_EN__SIZE
CYFLD_CSD_SENSE_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_REFBUF_EN__OFFSET
CYFLD_CSD_REFBUF_EN__OFFSET EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYFLD_CSD_REFBUF_EN__SIZE
CYFLD_CSD_REFBUF_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_COMP_MODE__OFFSET
CYFLD_CSD_COMP_MODE__OFFSET EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYFLD_CSD_COMP_MODE__SIZE
CYFLD_CSD_COMP_MODE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_CSD_COMP_MODE_CHARGE_BUF
CYVAL_CSD_COMP_MODE_CHARGE_BUF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_CSD_COMP_MODE_CHARGE_IO
CYVAL_CSD_COMP_MODE_CHARGE_IO EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_COMP_PIN__OFFSET
CYFLD_CSD_COMP_PIN__OFFSET EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD_CSD_COMP_PIN__SIZE
CYFLD_CSD_COMP_PIN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_CSD_COMP_PIN_CHANNEL1
CYVAL_CSD_COMP_PIN_CHANNEL1 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_CSD_COMP_PIN_CHANNEL2
CYVAL_CSD_COMP_PIN_CHANNEL2 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_POLARITY__OFFSET
CYFLD_CSD_POLARITY__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_CSD_POLARITY__SIZE
CYFLD_CSD_POLARITY__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_CSD_POLARITY_VSSIO
CYVAL_CSD_POLARITY_VSSIO EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_CSD_POLARITY_VDDIO
CYVAL_CSD_POLARITY_VDDIO EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_POLARITY2__OFFSET
CYFLD_CSD_POLARITY2__OFFSET EQU 0x00000011
ENDIF
IF :LNOT::DEF:CYFLD_CSD_POLARITY2__SIZE
CYFLD_CSD_POLARITY2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_CSD_POLARITY2_VSSIO
CYVAL_CSD_POLARITY2_VSSIO EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_CSD_POLARITY2_VDDIO
CYVAL_CSD_POLARITY2_VDDIO EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_MUTUAL_CAP__OFFSET
CYFLD_CSD_MUTUAL_CAP__OFFSET EQU 0x00000012
ENDIF
IF :LNOT::DEF:CYFLD_CSD_MUTUAL_CAP__SIZE
CYFLD_CSD_MUTUAL_CAP__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_CSD_MUTUAL_CAP_SELFCAP
CYVAL_CSD_MUTUAL_CAP_SELFCAP EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_CSD_MUTUAL_CAP_MUTUALCAP
CYVAL_CSD_MUTUAL_CAP_MUTUALCAP EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_SENSE_COMP_EN__OFFSET
CYFLD_CSD_SENSE_COMP_EN__OFFSET EQU 0x00000013
ENDIF
IF :LNOT::DEF:CYFLD_CSD_SENSE_COMP_EN__SIZE
CYFLD_CSD_SENSE_COMP_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_REBUF_OUTSEL__OFFSET
CYFLD_CSD_REBUF_OUTSEL__OFFSET EQU 0x00000015
ENDIF
IF :LNOT::DEF:CYFLD_CSD_REBUF_OUTSEL__SIZE
CYFLD_CSD_REBUF_OUTSEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_CSD_REBUF_OUTSEL_AMUXA
CYVAL_CSD_REBUF_OUTSEL_AMUXA EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_CSD_REBUF_OUTSEL_AMUXB
CYVAL_CSD_REBUF_OUTSEL_AMUXB EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_SENSE_INSEL__OFFSET
CYFLD_CSD_SENSE_INSEL__OFFSET EQU 0x00000016
ENDIF
IF :LNOT::DEF:CYFLD_CSD_SENSE_INSEL__SIZE
CYFLD_CSD_SENSE_INSEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_CSD_SENSE_INSEL_SENSE_CHANNEL1
CYVAL_CSD_SENSE_INSEL_SENSE_CHANNEL1 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_CSD_SENSE_INSEL_SENSE_AMUXA
CYVAL_CSD_SENSE_INSEL_SENSE_AMUXA EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_REFBUF_DRV__OFFSET
CYFLD_CSD_REFBUF_DRV__OFFSET EQU 0x00000017
ENDIF
IF :LNOT::DEF:CYFLD_CSD_REFBUF_DRV__SIZE
CYFLD_CSD_REFBUF_DRV__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_CSD_REFBUF_DRV_OFF
CYVAL_CSD_REFBUF_DRV_OFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_CSD_REFBUF_DRV_DRV_1
CYVAL_CSD_REFBUF_DRV_DRV_1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_CSD_REFBUF_DRV_DRV_2
CYVAL_CSD_REFBUF_DRV_DRV_2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_CSD_REFBUF_DRV_DRV_3
CYVAL_CSD_REFBUF_DRV_DRV_3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_CSD_DDFTSEL__OFFSET
CYFLD_CSD_DDFTSEL__OFFSET EQU 0x0000001a
ENDIF
IF :LNOT::DEF:CYFLD_CSD_DDFTSEL__SIZE
CYFLD_CSD_DDFTSEL__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_CSD_DDFTSEL_NORMAL
CYVAL_CSD_DDFTSEL_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_CSD_DDFTSEL_CSD_SENSE
CYVAL_CSD_DDFTSEL_CSD_SENSE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_CSD_DDFTSEL_CSD_SHIELD
CYVAL_CSD_DDFTSEL_CSD_SHIELD EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_CSD_DDFTSEL_CLK_SAMPLE
CYVAL_CSD_DDFTSEL_CLK_SAMPLE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_CSD_DDFTSEL_COMP_OUT
CYVAL_CSD_DDFTSEL_COMP_OUT EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_CSD_ADFTEN__OFFSET
CYFLD_CSD_ADFTEN__OFFSET EQU 0x0000001d
ENDIF
IF :LNOT::DEF:CYFLD_CSD_ADFTEN__SIZE
CYFLD_CSD_ADFTEN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_DDFTCOMP__OFFSET
CYFLD_CSD_DDFTCOMP__OFFSET EQU 0x0000001e
ENDIF
IF :LNOT::DEF:CYFLD_CSD_DDFTCOMP__SIZE
CYFLD_CSD_DDFTCOMP__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_CSD_DDFTCOMP_REFBUFCOMP
CYVAL_CSD_DDFTCOMP_REFBUFCOMP EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_CSD_DDFTCOMP_SENSECOMP
CYVAL_CSD_DDFTCOMP_SENSECOMP EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_ENABLE__OFFSET
CYFLD_CSD_ENABLE__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_CSD_ENABLE__SIZE
CYFLD_CSD_ENABLE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CSD_IDAC
CYREG_CSD_IDAC EQU 0x40080008
ENDIF
IF :LNOT::DEF:CYFLD_CSD_IDAC1__OFFSET
CYFLD_CSD_IDAC1__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CSD_IDAC1__SIZE
CYFLD_CSD_IDAC1__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_CSD_IDAC1_MODE__OFFSET
CYFLD_CSD_IDAC1_MODE__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_CSD_IDAC1_MODE__SIZE
CYFLD_CSD_IDAC1_MODE__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_CSD_IDAC1_MODE_OFF
CYVAL_CSD_IDAC1_MODE_OFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_CSD_IDAC1_MODE_FIXED
CYVAL_CSD_IDAC1_MODE_FIXED EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_CSD_IDAC1_MODE_VARIABLE
CYVAL_CSD_IDAC1_MODE_VARIABLE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_CSD_IDAC1_MODE_DSI
CYVAL_CSD_IDAC1_MODE_DSI EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_CSD_IDAC1_RANGE__OFFSET
CYFLD_CSD_IDAC1_RANGE__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD_CSD_IDAC1_RANGE__SIZE
CYFLD_CSD_IDAC1_RANGE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_CSD_IDAC1_RANGE_4X
CYVAL_CSD_IDAC1_RANGE_4X EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_CSD_IDAC1_RANGE_8X
CYVAL_CSD_IDAC1_RANGE_8X EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_IDAC2__OFFSET
CYFLD_CSD_IDAC2__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_CSD_IDAC2__SIZE
CYFLD_CSD_IDAC2__SIZE EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_CSD_IDAC2_MODE__OFFSET
CYFLD_CSD_IDAC2_MODE__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_CSD_IDAC2_MODE__SIZE
CYFLD_CSD_IDAC2_MODE__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_CSD_IDAC2_MODE_OFF
CYVAL_CSD_IDAC2_MODE_OFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_CSD_IDAC2_MODE_FIXED
CYVAL_CSD_IDAC2_MODE_FIXED EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_CSD_IDAC2_MODE_VARIABLE
CYVAL_CSD_IDAC2_MODE_VARIABLE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_CSD_IDAC2_MODE_DSI
CYVAL_CSD_IDAC2_MODE_DSI EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_CSD_IDAC2_RANGE__OFFSET
CYFLD_CSD_IDAC2_RANGE__OFFSET EQU 0x0000001a
ENDIF
IF :LNOT::DEF:CYFLD_CSD_IDAC2_RANGE__SIZE
CYFLD_CSD_IDAC2_RANGE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_CSD_IDAC2_RANGE_4X
CYVAL_CSD_IDAC2_RANGE_4X EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_CSD_IDAC2_RANGE_8X
CYVAL_CSD_IDAC2_RANGE_8X EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_FEEDBACK_MODE__OFFSET
CYFLD_CSD_FEEDBACK_MODE__OFFSET EQU 0x0000001e
ENDIF
IF :LNOT::DEF:CYFLD_CSD_FEEDBACK_MODE__SIZE
CYFLD_CSD_FEEDBACK_MODE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_CSD_FEEDBACK_MODE_FLOP
CYVAL_CSD_FEEDBACK_MODE_FLOP EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_CSD_FEEDBACK_MODE_COMP
CYVAL_CSD_FEEDBACK_MODE_COMP EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CSD_COUNTER
CYREG_CSD_COUNTER EQU 0x4008000c
ENDIF
IF :LNOT::DEF:CYFLD_CSD_COUNTER__OFFSET
CYFLD_CSD_COUNTER__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CSD_COUNTER__SIZE
CYFLD_CSD_COUNTER__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_CSD_PERIOD__OFFSET
CYFLD_CSD_PERIOD__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_CSD_PERIOD__SIZE
CYFLD_CSD_PERIOD__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_CSD_STATUS
CYREG_CSD_STATUS EQU 0x40080010
ENDIF
IF :LNOT::DEF:CYFLD_CSD_CSD_CHARGE__OFFSET
CYFLD_CSD_CSD_CHARGE__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CSD_CSD_CHARGE__SIZE
CYFLD_CSD_CSD_CHARGE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_CSD_SENSE__OFFSET
CYFLD_CSD_CSD_SENSE__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_CSD_SENSE__SIZE
CYFLD_CSD_CSD_SENSE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_COMP_OUT__OFFSET
CYFLD_CSD_COMP_OUT__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_CSD_COMP_OUT__SIZE
CYFLD_CSD_COMP_OUT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_CSD_COMP_OUT_C_LT_VREF
CYVAL_CSD_COMP_OUT_C_LT_VREF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_CSD_COMP_OUT_C_GT_VREF
CYVAL_CSD_COMP_OUT_C_GT_VREF EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CSD_SAMPLE__OFFSET
CYFLD_CSD_SAMPLE__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_CSD_SAMPLE__SIZE
CYFLD_CSD_SAMPLE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CSD_INTR
CYREG_CSD_INTR EQU 0x40080014
ENDIF
IF :LNOT::DEF:CYFLD_CSD_CSD__OFFSET
CYFLD_CSD_CSD__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CSD_CSD__SIZE
CYFLD_CSD_CSD__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CSD_INTR_SET
CYREG_CSD_INTR_SET EQU 0x40080018
ENDIF
IF :LNOT::DEF:CYREG_CSD_TRIM1
CYREG_CSD_TRIM1 EQU 0x4008ff00
ENDIF
IF :LNOT::DEF:CYFLD_CSD_IDAC1_SRC_TRIM__OFFSET
CYFLD_CSD_IDAC1_SRC_TRIM__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CSD_IDAC1_SRC_TRIM__SIZE
CYFLD_CSD_IDAC1_SRC_TRIM__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_CSD_IDAC2_SRC_TRIM__OFFSET
CYFLD_CSD_IDAC2_SRC_TRIM__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_CSD_IDAC2_SRC_TRIM__SIZE
CYFLD_CSD_IDAC2_SRC_TRIM__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYREG_CSD_TRIM2
CYREG_CSD_TRIM2 EQU 0x4008ff04
ENDIF
IF :LNOT::DEF:CYFLD_CSD_IDAC1_SNK_TRIM__OFFSET
CYFLD_CSD_IDAC1_SNK_TRIM__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CSD_IDAC1_SNK_TRIM__SIZE
CYFLD_CSD_IDAC1_SNK_TRIM__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_CSD_IDAC2_SNK_TRIM__OFFSET
CYFLD_CSD_IDAC2_SNK_TRIM__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_CSD_IDAC2_SNK_TRIM__SIZE
CYFLD_CSD_IDAC2_SNK_TRIM__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYDEV_LCD_BASE
CYDEV_LCD_BASE EQU 0x40090000
ENDIF
IF :LNOT::DEF:CYDEV_LCD_SIZE
CYDEV_LCD_SIZE EQU 0x00010000
ENDIF
IF :LNOT::DEF:CYREG_LCD_ID
CYREG_LCD_ID EQU 0x40090000
ENDIF
IF :LNOT::DEF:CYFLD_LCD_ID__OFFSET
CYFLD_LCD_ID__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_LCD_ID__SIZE
CYFLD_LCD_ID__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_LCD_REVISION__OFFSET
CYFLD_LCD_REVISION__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_LCD_REVISION__SIZE
CYFLD_LCD_REVISION__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_LCD_DIVIDER
CYREG_LCD_DIVIDER EQU 0x40090004
ENDIF
IF :LNOT::DEF:CYFLD_LCD_SUBFR_DIV__OFFSET
CYFLD_LCD_SUBFR_DIV__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_LCD_SUBFR_DIV__SIZE
CYFLD_LCD_SUBFR_DIV__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_LCD_DEAD_DIV__OFFSET
CYFLD_LCD_DEAD_DIV__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_LCD_DEAD_DIV__SIZE
CYFLD_LCD_DEAD_DIV__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_LCD_CONTROL
CYREG_LCD_CONTROL EQU 0x40090008
ENDIF
IF :LNOT::DEF:CYFLD_LCD_LS_EN__OFFSET
CYFLD_LCD_LS_EN__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_LCD_LS_EN__SIZE
CYFLD_LCD_LS_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_LCD_HS_EN__OFFSET
CYFLD_LCD_HS_EN__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_LCD_HS_EN__SIZE
CYFLD_LCD_HS_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_LCD_LCD_MODE__OFFSET
CYFLD_LCD_LCD_MODE__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_LCD_LCD_MODE__SIZE
CYFLD_LCD_LCD_MODE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_LCD_LCD_MODE_LS
CYVAL_LCD_LCD_MODE_LS EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_LCD_LCD_MODE_HS
CYVAL_LCD_LCD_MODE_HS EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_LCD_TYPE__OFFSET
CYFLD_LCD_TYPE__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_LCD_TYPE__SIZE
CYFLD_LCD_TYPE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_LCD_TYPE_A
CYVAL_LCD_TYPE_A EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_LCD_TYPE_B
CYVAL_LCD_TYPE_B EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_LCD_OP_MODE__OFFSET
CYFLD_LCD_OP_MODE__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_LCD_OP_MODE__SIZE
CYFLD_LCD_OP_MODE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_LCD_OP_MODE_PWM
CYVAL_LCD_OP_MODE_PWM EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_LCD_OP_MODE_CORRELATION
CYVAL_LCD_OP_MODE_CORRELATION EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_LCD_BIAS__OFFSET
CYFLD_LCD_BIAS__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_LCD_BIAS__SIZE
CYFLD_LCD_BIAS__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_LCD_BIAS_HALF
CYVAL_LCD_BIAS_HALF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_LCD_BIAS_THIRD
CYVAL_LCD_BIAS_THIRD EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_LCD_BIAS_FOURTH
CYVAL_LCD_BIAS_FOURTH EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_LCD_BIAS_FIFTH
CYVAL_LCD_BIAS_FIFTH EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_LCD_COM_NUM__OFFSET
CYFLD_LCD_COM_NUM__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_LCD_COM_NUM__SIZE
CYFLD_LCD_COM_NUM__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_LCD_LS_EN_STAT__OFFSET
CYFLD_LCD_LS_EN_STAT__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_LCD_LS_EN_STAT__SIZE
CYFLD_LCD_LS_EN_STAT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_LCD_DATA00
CYREG_LCD_DATA00 EQU 0x40090100
ENDIF
IF :LNOT::DEF:CYFLD_LCD_DATA__OFFSET
CYFLD_LCD_DATA__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_LCD_DATA__SIZE
CYFLD_LCD_DATA__SIZE EQU 0x00000020
ENDIF
IF :LNOT::DEF:CYREG_LCD_DATA01
CYREG_LCD_DATA01 EQU 0x40090104
ENDIF
IF :LNOT::DEF:CYREG_LCD_DATA02
CYREG_LCD_DATA02 EQU 0x40090108
ENDIF
IF :LNOT::DEF:CYREG_LCD_DATA03
CYREG_LCD_DATA03 EQU 0x4009010c
ENDIF
IF :LNOT::DEF:CYREG_LCD_DATA04
CYREG_LCD_DATA04 EQU 0x40090110
ENDIF
IF :LNOT::DEF:CYDEV_LPCOMP_BASE
CYDEV_LPCOMP_BASE EQU 0x400a0000
ENDIF
IF :LNOT::DEF:CYDEV_LPCOMP_SIZE
CYDEV_LPCOMP_SIZE EQU 0x00010000
ENDIF
IF :LNOT::DEF:CYREG_LPCOMP_ID
CYREG_LPCOMP_ID EQU 0x400a0000
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_ID__OFFSET
CYFLD_LPCOMP_ID__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_ID__SIZE
CYFLD_LPCOMP_ID__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_REVISION__OFFSET
CYFLD_LPCOMP_REVISION__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_REVISION__SIZE
CYFLD_LPCOMP_REVISION__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_LPCOMP_CONFIG
CYREG_LPCOMP_CONFIG EQU 0x400a0004
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_MODE1__OFFSET
CYFLD_LPCOMP_MODE1__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_MODE1__SIZE
CYFLD_LPCOMP_MODE1__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_LPCOMP_MODE1_SLOW
CYVAL_LPCOMP_MODE1_SLOW EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_LPCOMP_MODE1_FAST
CYVAL_LPCOMP_MODE1_FAST EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_LPCOMP_MODE1_ULP
CYVAL_LPCOMP_MODE1_ULP EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_HYST1__OFFSET
CYFLD_LPCOMP_HYST1__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_HYST1__SIZE
CYFLD_LPCOMP_HYST1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_FILTER1__OFFSET
CYFLD_LPCOMP_FILTER1__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_FILTER1__SIZE
CYFLD_LPCOMP_FILTER1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_INTTYPE1__OFFSET
CYFLD_LPCOMP_INTTYPE1__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_INTTYPE1__SIZE
CYFLD_LPCOMP_INTTYPE1__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_LPCOMP_INTTYPE1_DISABLE
CYVAL_LPCOMP_INTTYPE1_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_LPCOMP_INTTYPE1_RISING
CYVAL_LPCOMP_INTTYPE1_RISING EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_LPCOMP_INTTYPE1_FALLING
CYVAL_LPCOMP_INTTYPE1_FALLING EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_LPCOMP_INTTYPE1_BOTH
CYVAL_LPCOMP_INTTYPE1_BOTH EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_OUT1__OFFSET
CYFLD_LPCOMP_OUT1__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_OUT1__SIZE
CYFLD_LPCOMP_OUT1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_ENABLE1__OFFSET
CYFLD_LPCOMP_ENABLE1__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_ENABLE1__SIZE
CYFLD_LPCOMP_ENABLE1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_MODE2__OFFSET
CYFLD_LPCOMP_MODE2__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_MODE2__SIZE
CYFLD_LPCOMP_MODE2__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_LPCOMP_MODE2_SLOW
CYVAL_LPCOMP_MODE2_SLOW EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_LPCOMP_MODE2_FAST
CYVAL_LPCOMP_MODE2_FAST EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_LPCOMP_MODE2_ULP
CYVAL_LPCOMP_MODE2_ULP EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_HYST2__OFFSET
CYFLD_LPCOMP_HYST2__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_HYST2__SIZE
CYFLD_LPCOMP_HYST2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_FILTER2__OFFSET
CYFLD_LPCOMP_FILTER2__OFFSET EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_FILTER2__SIZE
CYFLD_LPCOMP_FILTER2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_INTTYPE2__OFFSET
CYFLD_LPCOMP_INTTYPE2__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_INTTYPE2__SIZE
CYFLD_LPCOMP_INTTYPE2__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_LPCOMP_INTTYPE2_DISABLE
CYVAL_LPCOMP_INTTYPE2_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_LPCOMP_INTTYPE2_RISING
CYVAL_LPCOMP_INTTYPE2_RISING EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_LPCOMP_INTTYPE2_FALLING
CYVAL_LPCOMP_INTTYPE2_FALLING EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_LPCOMP_INTTYPE2_BOTH
CYVAL_LPCOMP_INTTYPE2_BOTH EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_OUT2__OFFSET
CYFLD_LPCOMP_OUT2__OFFSET EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_OUT2__SIZE
CYFLD_LPCOMP_OUT2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_ENABLE2__OFFSET
CYFLD_LPCOMP_ENABLE2__OFFSET EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_ENABLE2__SIZE
CYFLD_LPCOMP_ENABLE2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_LPCOMP_DFT
CYREG_LPCOMP_DFT EQU 0x400a0008
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_CAL_EN__OFFSET
CYFLD_LPCOMP_CAL_EN__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_CAL_EN__SIZE
CYFLD_LPCOMP_CAL_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_BYPASS__OFFSET
CYFLD_LPCOMP_BYPASS__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_BYPASS__SIZE
CYFLD_LPCOMP_BYPASS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_LPCOMP_INTR
CYREG_LPCOMP_INTR EQU 0x400a000c
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_COMP1__OFFSET
CYFLD_LPCOMP_COMP1__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_COMP1__SIZE
CYFLD_LPCOMP_COMP1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_COMP2__OFFSET
CYFLD_LPCOMP_COMP2__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_COMP2__SIZE
CYFLD_LPCOMP_COMP2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_LPCOMP_INTR_SET
CYREG_LPCOMP_INTR_SET EQU 0x400a0010
ENDIF
IF :LNOT::DEF:CYREG_LPCOMP_TRIM1
CYREG_LPCOMP_TRIM1 EQU 0x400aff00
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_COMP1_TRIMA__OFFSET
CYFLD_LPCOMP_COMP1_TRIMA__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_COMP1_TRIMA__SIZE
CYFLD_LPCOMP_COMP1_TRIMA__SIZE EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYREG_LPCOMP_TRIM2
CYREG_LPCOMP_TRIM2 EQU 0x400aff04
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_COMP1_TRIMB__OFFSET
CYFLD_LPCOMP_COMP1_TRIMB__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_COMP1_TRIMB__SIZE
CYFLD_LPCOMP_COMP1_TRIMB__SIZE EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYREG_LPCOMP_TRIM3
CYREG_LPCOMP_TRIM3 EQU 0x400aff08
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_COMP2_TRIMA__OFFSET
CYFLD_LPCOMP_COMP2_TRIMA__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_COMP2_TRIMA__SIZE
CYFLD_LPCOMP_COMP2_TRIMA__SIZE EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYREG_LPCOMP_TRIM4
CYREG_LPCOMP_TRIM4 EQU 0x400aff0c
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_COMP2_TRIMB__OFFSET
CYFLD_LPCOMP_COMP2_TRIMB__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_LPCOMP_COMP2_TRIMB__SIZE
CYFLD_LPCOMP_COMP2_TRIMB__SIZE EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYREG_PWR_CONTROL
CYREG_PWR_CONTROL EQU 0x400b0000
ENDIF
IF :LNOT::DEF:CYFLD__POWER_MODE__OFFSET
CYFLD__POWER_MODE__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__POWER_MODE__SIZE
CYFLD__POWER_MODE__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL__POWER_MODE_RESET
CYVAL__POWER_MODE_RESET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL__POWER_MODE_ACTIVE
CYVAL__POWER_MODE_ACTIVE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL__POWER_MODE_SLEEP
CYVAL__POWER_MODE_SLEEP EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL__POWER_MODE_DEEP_SLEEP
CYVAL__POWER_MODE_DEEP_SLEEP EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL__POWER_MODE_HIBERNATE
CYVAL__POWER_MODE_HIBERNATE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD__DEBUG_SESSION__OFFSET
CYFLD__DEBUG_SESSION__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD__DEBUG_SESSION__SIZE
CYFLD__DEBUG_SESSION__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL__DEBUG_SESSION_NO_SESSION
CYVAL__DEBUG_SESSION_NO_SESSION EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL__DEBUG_SESSION_SESSION_ACTIVE
CYVAL__DEBUG_SESSION_SESSION_ACTIVE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__LPM_READY__OFFSET
CYFLD__LPM_READY__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD__LPM_READY__SIZE
CYFLD__LPM_READY__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__EXT_VCCD__OFFSET
CYFLD__EXT_VCCD__OFFSET EQU 0x00000017
ENDIF
IF :LNOT::DEF:CYFLD__EXT_VCCD__SIZE
CYFLD__EXT_VCCD__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__HVMON_ENABLE__OFFSET
CYFLD__HVMON_ENABLE__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD__HVMON_ENABLE__SIZE
CYFLD__HVMON_ENABLE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__HVMON_RELOAD__OFFSET
CYFLD__HVMON_RELOAD__OFFSET EQU 0x00000019
ENDIF
IF :LNOT::DEF:CYFLD__HVMON_RELOAD__SIZE
CYFLD__HVMON_RELOAD__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__FIMO_DISABLE__OFFSET
CYFLD__FIMO_DISABLE__OFFSET EQU 0x0000001b
ENDIF
IF :LNOT::DEF:CYFLD__FIMO_DISABLE__SIZE
CYFLD__FIMO_DISABLE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__HIBERNATE_DISABLE__OFFSET
CYFLD__HIBERNATE_DISABLE__OFFSET EQU 0x0000001c
ENDIF
IF :LNOT::DEF:CYFLD__HIBERNATE_DISABLE__SIZE
CYFLD__HIBERNATE_DISABLE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__LFCLK_SHORT__OFFSET
CYFLD__LFCLK_SHORT__OFFSET EQU 0x0000001d
ENDIF
IF :LNOT::DEF:CYFLD__LFCLK_SHORT__SIZE
CYFLD__LFCLK_SHORT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__HIBERNATE__OFFSET
CYFLD__HIBERNATE__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD__HIBERNATE__SIZE
CYFLD__HIBERNATE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL__HIBERNATE_DEEP_SLEEP
CYVAL__HIBERNATE_DEEP_SLEEP EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL__HIBERNATE_HIBERNATE
CYVAL__HIBERNATE_HIBERNATE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_PWR_INTR
CYREG_PWR_INTR EQU 0x400b0004
ENDIF
IF :LNOT::DEF:CYFLD__LVD__OFFSET
CYFLD__LVD__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__LVD__SIZE
CYFLD__LVD__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_PWR_INTR_MASK
CYREG_PWR_INTR_MASK EQU 0x400b0008
ENDIF
IF :LNOT::DEF:CYREG_PWR_KEY_DELAY
CYREG_PWR_KEY_DELAY EQU 0x400b000c
ENDIF
IF :LNOT::DEF:CYFLD__WAKEUP_HOLDOFF__OFFSET
CYFLD__WAKEUP_HOLDOFF__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__WAKEUP_HOLDOFF__SIZE
CYFLD__WAKEUP_HOLDOFF__SIZE EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYREG_PWR_PWRSYS_CONFIG
CYREG_PWR_PWRSYS_CONFIG EQU 0x400b0010
ENDIF
IF :LNOT::DEF:CYFLD__HIB_TEST_EN__OFFSET
CYFLD__HIB_TEST_EN__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD__HIB_TEST_EN__SIZE
CYFLD__HIB_TEST_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__HIB_TEST_REP__OFFSET
CYFLD__HIB_TEST_REP__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD__HIB_TEST_REP__SIZE
CYFLD__HIB_TEST_REP__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_PWR_BG_CONFIG
CYREG_PWR_BG_CONFIG EQU 0x400b0014
ENDIF
IF :LNOT::DEF:CYFLD__BG_DFT_EN__OFFSET
CYFLD__BG_DFT_EN__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__BG_DFT_EN__SIZE
CYFLD__BG_DFT_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__BG_DFT_VREF_SEL__OFFSET
CYFLD__BG_DFT_VREF_SEL__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__BG_DFT_VREF_SEL__SIZE
CYFLD__BG_DFT_VREF_SEL__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD__BG_DFT_CORE_SEL__OFFSET
CYFLD__BG_DFT_CORE_SEL__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD__BG_DFT_CORE_SEL__SIZE
CYFLD__BG_DFT_CORE_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__BG_DFT_ICORE_SEL__OFFSET
CYFLD__BG_DFT_ICORE_SEL__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD__BG_DFT_ICORE_SEL__SIZE
CYFLD__BG_DFT_ICORE_SEL__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD__BG_DFT_VCORE_SEL__OFFSET
CYFLD__BG_DFT_VCORE_SEL__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD__BG_DFT_VCORE_SEL__SIZE
CYFLD__BG_DFT_VCORE_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__VREF_EN__OFFSET
CYFLD__VREF_EN__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD__VREF_EN__SIZE
CYFLD__VREF_EN__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_PWR_VMON_CONFIG
CYREG_PWR_VMON_CONFIG EQU 0x400b0018
ENDIF
IF :LNOT::DEF:CYFLD__LVD_EN__OFFSET
CYFLD__LVD_EN__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__LVD_EN__SIZE
CYFLD__LVD_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__LVD_SEL__OFFSET
CYFLD__LVD_SEL__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__LVD_SEL__SIZE
CYFLD__LVD_SEL__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD__VMON_DDFT_SEL__OFFSET
CYFLD__VMON_DDFT_SEL__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD__VMON_DDFT_SEL__SIZE
CYFLD__VMON_DDFT_SEL__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD__VMON_ADFT_SEL__OFFSET
CYFLD__VMON_ADFT_SEL__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD__VMON_ADFT_SEL__SIZE
CYFLD__VMON_ADFT_SEL__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYREG_PWR_DFT_SELECT
CYREG_PWR_DFT_SELECT EQU 0x400b001c
ENDIF
IF :LNOT::DEF:CYFLD__TVMON1_SEL__OFFSET
CYFLD__TVMON1_SEL__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__TVMON1_SEL__SIZE
CYFLD__TVMON1_SEL__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD__TVMON2_SEL__OFFSET
CYFLD__TVMON2_SEL__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD__TVMON2_SEL__SIZE
CYFLD__TVMON2_SEL__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD__BYPASS__OFFSET
CYFLD__BYPASS__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD__BYPASS__SIZE
CYFLD__BYPASS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__ACTIVE_EN__OFFSET
CYFLD__ACTIVE_EN__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD__ACTIVE_EN__SIZE
CYFLD__ACTIVE_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__ACTIVE_INRUSH_DIS__OFFSET
CYFLD__ACTIVE_INRUSH_DIS__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD__ACTIVE_INRUSH_DIS__SIZE
CYFLD__ACTIVE_INRUSH_DIS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__LPCOMP_DIS__OFFSET
CYFLD__LPCOMP_DIS__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD__LPCOMP_DIS__SIZE
CYFLD__LPCOMP_DIS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__BLEED_EN__OFFSET
CYFLD__BLEED_EN__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD__BLEED_EN__SIZE
CYFLD__BLEED_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__IPOR_EN__OFFSET
CYFLD__IPOR_EN__OFFSET EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYFLD__IPOR_EN__SIZE
CYFLD__IPOR_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__POWER_UP_RAW_BYP__OFFSET
CYFLD__POWER_UP_RAW_BYP__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD__POWER_UP_RAW_BYP__SIZE
CYFLD__POWER_UP_RAW_BYP__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__POWER_UP_RAW_CTL__OFFSET
CYFLD__POWER_UP_RAW_CTL__OFFSET EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYFLD__POWER_UP_RAW_CTL__SIZE
CYFLD__POWER_UP_RAW_CTL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__DEEPSLEEP_EN__OFFSET
CYFLD__DEEPSLEEP_EN__OFFSET EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYFLD__DEEPSLEEP_EN__SIZE
CYFLD__DEEPSLEEP_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__RSVD_BYPASS__OFFSET
CYFLD__RSVD_BYPASS__OFFSET EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD__RSVD_BYPASS__SIZE
CYFLD__RSVD_BYPASS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__NWELL_OPEN__OFFSET
CYFLD__NWELL_OPEN__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD__NWELL_OPEN__SIZE
CYFLD__NWELL_OPEN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__HIBERNATE_OPEN__OFFSET
CYFLD__HIBERNATE_OPEN__OFFSET EQU 0x00000011
ENDIF
IF :LNOT::DEF:CYFLD__HIBERNATE_OPEN__SIZE
CYFLD__HIBERNATE_OPEN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__DEEPSLEEP_OPEN__OFFSET
CYFLD__DEEPSLEEP_OPEN__OFFSET EQU 0x00000012
ENDIF
IF :LNOT::DEF:CYFLD__DEEPSLEEP_OPEN__SIZE
CYFLD__DEEPSLEEP_OPEN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__QUIET_OPEN__OFFSET
CYFLD__QUIET_OPEN__OFFSET EQU 0x00000013
ENDIF
IF :LNOT::DEF:CYFLD__QUIET_OPEN__SIZE
CYFLD__QUIET_OPEN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__LFCLK_OPEN__OFFSET
CYFLD__LFCLK_OPEN__OFFSET EQU 0x00000014
ENDIF
IF :LNOT::DEF:CYFLD__LFCLK_OPEN__SIZE
CYFLD__LFCLK_OPEN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__QUIET_EN__OFFSET
CYFLD__QUIET_EN__OFFSET EQU 0x00000016
ENDIF
IF :LNOT::DEF:CYFLD__QUIET_EN__SIZE
CYFLD__QUIET_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__BREF_EN__OFFSET
CYFLD__BREF_EN__OFFSET EQU 0x00000017
ENDIF
IF :LNOT::DEF:CYFLD__BREF_EN__SIZE
CYFLD__BREF_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__BREF_OUTEN__OFFSET
CYFLD__BREF_OUTEN__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD__BREF_OUTEN__SIZE
CYFLD__BREF_OUTEN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__BREF_REFSW__OFFSET
CYFLD__BREF_REFSW__OFFSET EQU 0x00000019
ENDIF
IF :LNOT::DEF:CYFLD__BREF_REFSW__SIZE
CYFLD__BREF_REFSW__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__BREF_TESTMODE__OFFSET
CYFLD__BREF_TESTMODE__OFFSET EQU 0x0000001a
ENDIF
IF :LNOT::DEF:CYFLD__BREF_TESTMODE__SIZE
CYFLD__BREF_TESTMODE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__NWELL_DIS__OFFSET
CYFLD__NWELL_DIS__OFFSET EQU 0x0000001b
ENDIF
IF :LNOT::DEF:CYFLD__NWELL_DIS__SIZE
CYFLD__NWELL_DIS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__HVMON_DFT_OVR__OFFSET
CYFLD__HVMON_DFT_OVR__OFFSET EQU 0x0000001c
ENDIF
IF :LNOT::DEF:CYFLD__HVMON_DFT_OVR__SIZE
CYFLD__HVMON_DFT_OVR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__IMO_REFGEN_DIS__OFFSET
CYFLD__IMO_REFGEN_DIS__OFFSET EQU 0x0000001d
ENDIF
IF :LNOT::DEF:CYFLD__IMO_REFGEN_DIS__SIZE
CYFLD__IMO_REFGEN_DIS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__POWER_UP_ACTIVE__OFFSET
CYFLD__POWER_UP_ACTIVE__OFFSET EQU 0x0000001e
ENDIF
IF :LNOT::DEF:CYFLD__POWER_UP_ACTIVE__SIZE
CYFLD__POWER_UP_ACTIVE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__POWER_UP_HIBDPSLP__OFFSET
CYFLD__POWER_UP_HIBDPSLP__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD__POWER_UP_HIBDPSLP__SIZE
CYFLD__POWER_UP_HIBDPSLP__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_PWR_DDFT_SELECT
CYREG_PWR_DDFT_SELECT EQU 0x400b0020
ENDIF
IF :LNOT::DEF:CYFLD__DDFT1_SEL__OFFSET
CYFLD__DDFT1_SEL__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__DDFT1_SEL__SIZE
CYFLD__DDFT1_SEL__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD__DDFT2_SEL__OFFSET
CYFLD__DDFT2_SEL__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD__DDFT2_SEL__SIZE
CYFLD__DDFT2_SEL__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYREG_PWR_DFT_KEY
CYREG_PWR_DFT_KEY EQU 0x400b0024
ENDIF
IF :LNOT::DEF:CYFLD__KEY16__OFFSET
CYFLD__KEY16__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__KEY16__SIZE
CYFLD__KEY16__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD__HBOD_OFF_AWAKE__OFFSET
CYFLD__HBOD_OFF_AWAKE__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD__HBOD_OFF_AWAKE__SIZE
CYFLD__HBOD_OFF_AWAKE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__BODS_OFF__OFFSET
CYFLD__BODS_OFF__OFFSET EQU 0x00000011
ENDIF
IF :LNOT::DEF:CYFLD__BODS_OFF__SIZE
CYFLD__BODS_OFF__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__DFT_MODE__OFFSET
CYFLD__DFT_MODE__OFFSET EQU 0x00000012
ENDIF
IF :LNOT::DEF:CYFLD__DFT_MODE__SIZE
CYFLD__DFT_MODE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__IO_DISABLE_BYPASS__OFFSET
CYFLD__IO_DISABLE_BYPASS__OFFSET EQU 0x00000013
ENDIF
IF :LNOT::DEF:CYFLD__IO_DISABLE_BYPASS__SIZE
CYFLD__IO_DISABLE_BYPASS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__VMON_PD__OFFSET
CYFLD__VMON_PD__OFFSET EQU 0x00000014
ENDIF
IF :LNOT::DEF:CYFLD__VMON_PD__SIZE
CYFLD__VMON_PD__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_PWR_BOD_KEY
CYREG_PWR_BOD_KEY EQU 0x400b0028
ENDIF
IF :LNOT::DEF:CYREG_PWR_STOP
CYREG_PWR_STOP EQU 0x400b002c
ENDIF
IF :LNOT::DEF:CYFLD__TOKEN__OFFSET
CYFLD__TOKEN__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__TOKEN__SIZE
CYFLD__TOKEN__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD__UNLOCK__OFFSET
CYFLD__UNLOCK__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD__UNLOCK__SIZE
CYFLD__UNLOCK__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD__POLARITY__OFFSET
CYFLD__POLARITY__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD__POLARITY__SIZE
CYFLD__POLARITY__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__FREEZE__OFFSET
CYFLD__FREEZE__OFFSET EQU 0x00000011
ENDIF
IF :LNOT::DEF:CYFLD__FREEZE__SIZE
CYFLD__FREEZE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__STOP__OFFSET
CYFLD__STOP__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD__STOP__SIZE
CYFLD__STOP__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CLK_SELECT
CYREG_CLK_SELECT EQU 0x400b0100
ENDIF
IF :LNOT::DEF:CYFLD__DIRECT_SEL__OFFSET
CYFLD__DIRECT_SEL__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__DIRECT_SEL__SIZE
CYFLD__DIRECT_SEL__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL__DIRECT_SEL_IMO
CYVAL__DIRECT_SEL_IMO EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL__DIRECT_SEL_EXTCLK
CYVAL__DIRECT_SEL_EXTCLK EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL__DIRECT_SEL_ECO
CYVAL__DIRECT_SEL_ECO EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL__DIRECT_SEL_DSI0
CYVAL__DIRECT_SEL_DSI0 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL__DIRECT_SEL_DSI1
CYVAL__DIRECT_SEL_DSI1 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL__DIRECT_SEL_DSI2
CYVAL__DIRECT_SEL_DSI2 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL__DIRECT_SEL_DSI3
CYVAL__DIRECT_SEL_DSI3 EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD__DBL_SEL__OFFSET
CYFLD__DBL_SEL__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD__DBL_SEL__SIZE
CYFLD__DBL_SEL__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL__DBL_SEL_IMO
CYVAL__DBL_SEL_IMO EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL__DBL_SEL_EXTCLK
CYVAL__DBL_SEL_EXTCLK EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL__DBL_SEL_ECO
CYVAL__DBL_SEL_ECO EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL__DBL_SEL_DSI0
CYVAL__DBL_SEL_DSI0 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL__DBL_SEL_DSI1
CYVAL__DBL_SEL_DSI1 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL__DBL_SEL_DSI2
CYVAL__DBL_SEL_DSI2 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL__DBL_SEL_DSI3
CYVAL__DBL_SEL_DSI3 EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD__PLL_SEL__OFFSET
CYFLD__PLL_SEL__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD__PLL_SEL__SIZE
CYFLD__PLL_SEL__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL__PLL_SEL_IMO
CYVAL__PLL_SEL_IMO EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL__PLL_SEL_EXTCLK
CYVAL__PLL_SEL_EXTCLK EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL__PLL_SEL_ECO
CYVAL__PLL_SEL_ECO EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL__PLL_SEL_DPLL
CYVAL__PLL_SEL_DPLL EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL__PLL_SEL_DSI0
CYVAL__PLL_SEL_DSI0 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL__PLL_SEL_DSI1
CYVAL__PLL_SEL_DSI1 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL__PLL_SEL_DSI2
CYVAL__PLL_SEL_DSI2 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL__PLL_SEL_DSI3
CYVAL__PLL_SEL_DSI3 EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD__DPLLIN_SEL__OFFSET
CYFLD__DPLLIN_SEL__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD__DPLLIN_SEL__SIZE
CYFLD__DPLLIN_SEL__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL__DPLLIN_SEL_IMO
CYVAL__DPLLIN_SEL_IMO EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL__DPLLIN_SEL_EXTCLK
CYVAL__DPLLIN_SEL_EXTCLK EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL__DPLLIN_SEL_ECO
CYVAL__DPLLIN_SEL_ECO EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL__DPLLIN_SEL_DSI0
CYVAL__DPLLIN_SEL_DSI0 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL__DPLLIN_SEL_DSI1
CYVAL__DPLLIN_SEL_DSI1 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL__DPLLIN_SEL_DSI2
CYVAL__DPLLIN_SEL_DSI2 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL__DPLLIN_SEL_DSI3
CYVAL__DPLLIN_SEL_DSI3 EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD__DPLLREF_SEL__OFFSET
CYFLD__DPLLREF_SEL__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD__DPLLREF_SEL__SIZE
CYFLD__DPLLREF_SEL__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL__DPLLREF_SEL_DSI0
CYVAL__DPLLREF_SEL_DSI0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL__DPLLREF_SEL_DSI1
CYVAL__DPLLREF_SEL_DSI1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL__DPLLREF_SEL_DSI2
CYVAL__DPLLREF_SEL_DSI2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL__DPLLREF_SEL_DSI3
CYVAL__DPLLREF_SEL_DSI3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD__WDT_LOCK__OFFSET
CYFLD__WDT_LOCK__OFFSET EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYFLD__WDT_LOCK__SIZE
CYFLD__WDT_LOCK__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL__WDT_LOCK_NO_CHG
CYVAL__WDT_LOCK_NO_CHG EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL__WDT_LOCK_CLR0
CYVAL__WDT_LOCK_CLR0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL__WDT_LOCK_CLR1
CYVAL__WDT_LOCK_CLR1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL__WDT_LOCK_SET01
CYVAL__WDT_LOCK_SET01 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD__HFCLK_SEL__OFFSET
CYFLD__HFCLK_SEL__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD__HFCLK_SEL__SIZE
CYFLD__HFCLK_SEL__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL__HFCLK_SEL_DIRECT_SEL
CYVAL__HFCLK_SEL_DIRECT_SEL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL__HFCLK_SEL_DBL
CYVAL__HFCLK_SEL_DBL EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL__HFCLK_SEL_PLL
CYVAL__HFCLK_SEL_PLL EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD__HALF_EN__OFFSET
CYFLD__HALF_EN__OFFSET EQU 0x00000012
ENDIF
IF :LNOT::DEF:CYFLD__HALF_EN__SIZE
CYFLD__HALF_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__SYSCLK_DIV__OFFSET
CYFLD__SYSCLK_DIV__OFFSET EQU 0x00000013
ENDIF
IF :LNOT::DEF:CYFLD__SYSCLK_DIV__SIZE
CYFLD__SYSCLK_DIV__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL__SYSCLK_DIV_NO_DIV
CYVAL__SYSCLK_DIV_NO_DIV EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL__SYSCLK_DIV_DIV_BY_2
CYVAL__SYSCLK_DIV_DIV_BY_2 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL__SYSCLK_DIV_DIV_BY_4
CYVAL__SYSCLK_DIV_DIV_BY_4 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL__SYSCLK_DIV_DIV_BY_8
CYVAL__SYSCLK_DIV_DIV_BY_8 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL__SYSCLK_DIV_DIV_BY_16
CYVAL__SYSCLK_DIV_DIV_BY_16 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL__SYSCLK_DIV_DIV_BY_32
CYVAL__SYSCLK_DIV_DIV_BY_32 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL__SYSCLK_DIV_DIV_BY_64
CYVAL__SYSCLK_DIV_DIV_BY_64 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL__SYSCLK_DIV_DIV_BY_128
CYVAL__SYSCLK_DIV_DIV_BY_128 EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYREG_CLK_ILO_CONFIG
CYREG_CLK_ILO_CONFIG EQU 0x400b0104
ENDIF
IF :LNOT::DEF:CYFLD__PD_MODE__OFFSET
CYFLD__PD_MODE__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__PD_MODE__SIZE
CYFLD__PD_MODE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL__PD_MODE_SLEEP
CYVAL__PD_MODE_SLEEP EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL__PD_MODE_COMA
CYVAL__PD_MODE_COMA EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__TURBO__OFFSET
CYFLD__TURBO__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__TURBO__SIZE
CYFLD__TURBO__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__SATBIAS__OFFSET
CYFLD__SATBIAS__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD__SATBIAS__SIZE
CYFLD__SATBIAS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL__SATBIAS_SATURATED
CYVAL__SATBIAS_SATURATED EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL__SATBIAS_SUBTHRESHOLD
CYVAL__SATBIAS_SUBTHRESHOLD EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__ENABLE__OFFSET
CYFLD__ENABLE__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD__ENABLE__SIZE
CYFLD__ENABLE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CLK_IMO_CONFIG
CYREG_CLK_IMO_CONFIG EQU 0x400b0108
ENDIF
IF :LNOT::DEF:CYFLD__FLASHPUMP_SEL__OFFSET
CYFLD__FLASHPUMP_SEL__OFFSET EQU 0x00000016
ENDIF
IF :LNOT::DEF:CYFLD__FLASHPUMP_SEL__SIZE
CYFLD__FLASHPUMP_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL__FLASHPUMP_SEL_GND
CYVAL__FLASHPUMP_SEL_GND EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL__FLASHPUMP_SEL_CLK36
CYVAL__FLASHPUMP_SEL_CLK36 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__EN_FASTBIAS__OFFSET
CYFLD__EN_FASTBIAS__OFFSET EQU 0x00000017
ENDIF
IF :LNOT::DEF:CYFLD__EN_FASTBIAS__SIZE
CYFLD__EN_FASTBIAS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__TEST_FASTBIAS__OFFSET
CYFLD__TEST_FASTBIAS__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD__TEST_FASTBIAS__SIZE
CYFLD__TEST_FASTBIAS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__PUMP_SEL__OFFSET
CYFLD__PUMP_SEL__OFFSET EQU 0x00000019
ENDIF
IF :LNOT::DEF:CYFLD__PUMP_SEL__SIZE
CYFLD__PUMP_SEL__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL__PUMP_SEL_GND
CYVAL__PUMP_SEL_GND EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL__PUMP_SEL_IMO
CYVAL__PUMP_SEL_IMO EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL__PUMP_SEL_DBL
CYVAL__PUMP_SEL_DBL EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL__PUMP_SEL_CLK36
CYVAL__PUMP_SEL_CLK36 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL__PUMP_SEL_FF1
CYVAL__PUMP_SEL_FF1 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD__TEST_USB_MODE__OFFSET
CYFLD__TEST_USB_MODE__OFFSET EQU 0x0000001c
ENDIF
IF :LNOT::DEF:CYFLD__TEST_USB_MODE__SIZE
CYFLD__TEST_USB_MODE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__EN_CLK36__OFFSET
CYFLD__EN_CLK36__OFFSET EQU 0x0000001d
ENDIF
IF :LNOT::DEF:CYFLD__EN_CLK36__SIZE
CYFLD__EN_CLK36__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__EN_CLK2X__OFFSET
CYFLD__EN_CLK2X__OFFSET EQU 0x0000001e
ENDIF
IF :LNOT::DEF:CYFLD__EN_CLK2X__SIZE
CYFLD__EN_CLK2X__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CLK_IMO_SPREAD
CYREG_CLK_IMO_SPREAD EQU 0x400b010c
ENDIF
IF :LNOT::DEF:CYFLD__SS_VALUE__OFFSET
CYFLD__SS_VALUE__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__SS_VALUE__SIZE
CYFLD__SS_VALUE__SIZE EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD__SS_MAX__OFFSET
CYFLD__SS_MAX__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD__SS_MAX__SIZE
CYFLD__SS_MAX__SIZE EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD__SS_RANGE__OFFSET
CYFLD__SS_RANGE__OFFSET EQU 0x0000001c
ENDIF
IF :LNOT::DEF:CYFLD__SS_RANGE__SIZE
CYFLD__SS_RANGE__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL__SS_RANGE_M1
CYVAL__SS_RANGE_M1 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL__SS_RANGE_M2
CYVAL__SS_RANGE_M2 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL__SS_RANGE_M4
CYVAL__SS_RANGE_M4 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD__SS_MODE__OFFSET
CYFLD__SS_MODE__OFFSET EQU 0x0000001e
ENDIF
IF :LNOT::DEF:CYFLD__SS_MODE__SIZE
CYFLD__SS_MODE__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL__SS_MODE_OFF
CYVAL__SS_MODE_OFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL__SS_MODE_TRIANGLE
CYVAL__SS_MODE_TRIANGLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL__SS_MODE_LFSR
CYVAL__SS_MODE_LFSR EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL__SS_MODE_DSI
CYVAL__SS_MODE_DSI EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_CLK_DFT_SELECT
CYREG_CLK_DFT_SELECT EQU 0x400b0110
ENDIF
IF :LNOT::DEF:CYFLD__DFT_SEL1__OFFSET
CYFLD__DFT_SEL1__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__DFT_SEL1__SIZE
CYFLD__DFT_SEL1__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL1_NC
CYVAL__DFT_SEL1_NC EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL1_ILO
CYVAL__DFT_SEL1_ILO EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL1_WCO
CYVAL__DFT_SEL1_WCO EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL1_IMO
CYVAL__DFT_SEL1_IMO EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL1_ECO
CYVAL__DFT_SEL1_ECO EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL1_PLL
CYVAL__DFT_SEL1_PLL EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL1_DPLL_OUT
CYVAL__DFT_SEL1_DPLL_OUT EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL1_DPLL_REF
CYVAL__DFT_SEL1_DPLL_REF EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL1_DBL
CYVAL__DFT_SEL1_DBL EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL1_IMO2X
CYVAL__DFT_SEL1_IMO2X EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL1_IMO36
CYVAL__DFT_SEL1_IMO36 EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL1_HFCLK
CYVAL__DFT_SEL1_HFCLK EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL1_LFCLK
CYVAL__DFT_SEL1_LFCLK EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL1_SYSCLK
CYVAL__DFT_SEL1_SYSCLK EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL1_EXTCLK
CYVAL__DFT_SEL1_EXTCLK EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL1_HALFSYSCLK
CYVAL__DFT_SEL1_HALFSYSCLK EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD__DFT_DIV1__OFFSET
CYFLD__DFT_DIV1__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD__DFT_DIV1__SIZE
CYFLD__DFT_DIV1__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL__DFT_DIV1_NO_DIV
CYVAL__DFT_DIV1_NO_DIV EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL__DFT_DIV1_DIV_BY_2
CYVAL__DFT_DIV1_DIV_BY_2 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL__DFT_DIV1_DIV_BY_4
CYVAL__DFT_DIV1_DIV_BY_4 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL__DFT_DIV1_DIV_BY_8
CYVAL__DFT_DIV1_DIV_BY_8 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD__DFT_SEL2__OFFSET
CYFLD__DFT_SEL2__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD__DFT_SEL2__SIZE
CYFLD__DFT_SEL2__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL2_NC
CYVAL__DFT_SEL2_NC EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL2_ILO
CYVAL__DFT_SEL2_ILO EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL2_WCO
CYVAL__DFT_SEL2_WCO EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL2_IMO
CYVAL__DFT_SEL2_IMO EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL2_ECO
CYVAL__DFT_SEL2_ECO EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL2_PLL
CYVAL__DFT_SEL2_PLL EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL2_DPLL_OUT
CYVAL__DFT_SEL2_DPLL_OUT EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL2_DPLL_REF
CYVAL__DFT_SEL2_DPLL_REF EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL2_DBL
CYVAL__DFT_SEL2_DBL EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL2_IMO2X
CYVAL__DFT_SEL2_IMO2X EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL2_IMO36
CYVAL__DFT_SEL2_IMO36 EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL2_HFCLK
CYVAL__DFT_SEL2_HFCLK EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL2_LFCLK
CYVAL__DFT_SEL2_LFCLK EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL2_SYSCLK
CYVAL__DFT_SEL2_SYSCLK EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL2_EXTCLK
CYVAL__DFT_SEL2_EXTCLK EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYVAL__DFT_SEL2_HALFSYSCLK
CYVAL__DFT_SEL2_HALFSYSCLK EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD__DFT_DIV2__OFFSET
CYFLD__DFT_DIV2__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD__DFT_DIV2__SIZE
CYFLD__DFT_DIV2__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL__DFT_DIV2_NO_DIV
CYVAL__DFT_DIV2_NO_DIV EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL__DFT_DIV2_DIV_BY_2
CYVAL__DFT_DIV2_DIV_BY_2 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL__DFT_DIV2_DIV_BY_4
CYVAL__DFT_DIV2_DIV_BY_4 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL__DFT_DIV2_DIV_BY_8
CYVAL__DFT_DIV2_DIV_BY_8 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_WDT_CTRLOW
CYREG_WDT_CTRLOW EQU 0x400b0200
ENDIF
IF :LNOT::DEF:CYFLD__WDT_CTR0__OFFSET
CYFLD__WDT_CTR0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__WDT_CTR0__SIZE
CYFLD__WDT_CTR0__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD__WDT_CTR1__OFFSET
CYFLD__WDT_CTR1__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD__WDT_CTR1__SIZE
CYFLD__WDT_CTR1__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_WDT_CTRHIGH
CYREG_WDT_CTRHIGH EQU 0x400b0204
ENDIF
IF :LNOT::DEF:CYFLD__WDT_CTR2__OFFSET
CYFLD__WDT_CTR2__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__WDT_CTR2__SIZE
CYFLD__WDT_CTR2__SIZE EQU 0x00000020
ENDIF
IF :LNOT::DEF:CYREG_WDT_MATCH
CYREG_WDT_MATCH EQU 0x400b0208
ENDIF
IF :LNOT::DEF:CYFLD__WDT_MATCH0__OFFSET
CYFLD__WDT_MATCH0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__WDT_MATCH0__SIZE
CYFLD__WDT_MATCH0__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD__WDT_MATCH1__OFFSET
CYFLD__WDT_MATCH1__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD__WDT_MATCH1__SIZE
CYFLD__WDT_MATCH1__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_WDT_CONFIG
CYREG_WDT_CONFIG EQU 0x400b020c
ENDIF
IF :LNOT::DEF:CYFLD__WDT_MODE0__OFFSET
CYFLD__WDT_MODE0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__WDT_MODE0__SIZE
CYFLD__WDT_MODE0__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL__WDT_MODE0_NOTHING
CYVAL__WDT_MODE0_NOTHING EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL__WDT_MODE0_INT
CYVAL__WDT_MODE0_INT EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL__WDT_MODE0_RESET
CYVAL__WDT_MODE0_RESET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL__WDT_MODE0_INT_THEN_RESET
CYVAL__WDT_MODE0_INT_THEN_RESET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD__WDT_CLEAR0__OFFSET
CYFLD__WDT_CLEAR0__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD__WDT_CLEAR0__SIZE
CYFLD__WDT_CLEAR0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__WDT_CASCADE0_1__OFFSET
CYFLD__WDT_CASCADE0_1__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD__WDT_CASCADE0_1__SIZE
CYFLD__WDT_CASCADE0_1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__WDT_MODE1__OFFSET
CYFLD__WDT_MODE1__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD__WDT_MODE1__SIZE
CYFLD__WDT_MODE1__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL__WDT_MODE1_NOTHING
CYVAL__WDT_MODE1_NOTHING EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL__WDT_MODE1_INT
CYVAL__WDT_MODE1_INT EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL__WDT_MODE1_RESET
CYVAL__WDT_MODE1_RESET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL__WDT_MODE1_INT_THEN_RESET
CYVAL__WDT_MODE1_INT_THEN_RESET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD__WDT_CLEAR1__OFFSET
CYFLD__WDT_CLEAR1__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD__WDT_CLEAR1__SIZE
CYFLD__WDT_CLEAR1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__WDT_CASCADE1_2__OFFSET
CYFLD__WDT_CASCADE1_2__OFFSET EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYFLD__WDT_CASCADE1_2__SIZE
CYFLD__WDT_CASCADE1_2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__WDT_MODE2__OFFSET
CYFLD__WDT_MODE2__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD__WDT_MODE2__SIZE
CYFLD__WDT_MODE2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL__WDT_MODE2_NOTHING
CYVAL__WDT_MODE2_NOTHING EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL__WDT_MODE2_INT
CYVAL__WDT_MODE2_INT EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__WDT_BITS2__OFFSET
CYFLD__WDT_BITS2__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD__WDT_BITS2__SIZE
CYFLD__WDT_BITS2__SIZE EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD__LFCLK_SEL__OFFSET
CYFLD__LFCLK_SEL__OFFSET EQU 0x0000001e
ENDIF
IF :LNOT::DEF:CYFLD__LFCLK_SEL__SIZE
CYFLD__LFCLK_SEL__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYREG_WDT_CONTROL
CYREG_WDT_CONTROL EQU 0x400b0210
ENDIF
IF :LNOT::DEF:CYFLD__WDT_ENABLE0__OFFSET
CYFLD__WDT_ENABLE0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__WDT_ENABLE0__SIZE
CYFLD__WDT_ENABLE0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__WDT_ENABLED0__OFFSET
CYFLD__WDT_ENABLED0__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__WDT_ENABLED0__SIZE
CYFLD__WDT_ENABLED0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__WDT_INT0__OFFSET
CYFLD__WDT_INT0__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD__WDT_INT0__SIZE
CYFLD__WDT_INT0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__WDT_RESET0__OFFSET
CYFLD__WDT_RESET0__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD__WDT_RESET0__SIZE
CYFLD__WDT_RESET0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__WDT_ENABLE1__OFFSET
CYFLD__WDT_ENABLE1__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD__WDT_ENABLE1__SIZE
CYFLD__WDT_ENABLE1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__WDT_ENABLED1__OFFSET
CYFLD__WDT_ENABLED1__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD__WDT_ENABLED1__SIZE
CYFLD__WDT_ENABLED1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__WDT_INT1__OFFSET
CYFLD__WDT_INT1__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD__WDT_INT1__SIZE
CYFLD__WDT_INT1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__WDT_RESET1__OFFSET
CYFLD__WDT_RESET1__OFFSET EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYFLD__WDT_RESET1__SIZE
CYFLD__WDT_RESET1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__WDT_ENABLE2__OFFSET
CYFLD__WDT_ENABLE2__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD__WDT_ENABLE2__SIZE
CYFLD__WDT_ENABLE2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__WDT_ENABLED2__OFFSET
CYFLD__WDT_ENABLED2__OFFSET EQU 0x00000011
ENDIF
IF :LNOT::DEF:CYFLD__WDT_ENABLED2__SIZE
CYFLD__WDT_ENABLED2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__WDT_INT2__OFFSET
CYFLD__WDT_INT2__OFFSET EQU 0x00000012
ENDIF
IF :LNOT::DEF:CYFLD__WDT_INT2__SIZE
CYFLD__WDT_INT2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__WDT_RESET2__OFFSET
CYFLD__WDT_RESET2__OFFSET EQU 0x00000013
ENDIF
IF :LNOT::DEF:CYFLD__WDT_RESET2__SIZE
CYFLD__WDT_RESET2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_RES_CAUSE
CYREG_RES_CAUSE EQU 0x400b0300
ENDIF
IF :LNOT::DEF:CYFLD__RESET_WDT__OFFSET
CYFLD__RESET_WDT__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__RESET_WDT__SIZE
CYFLD__RESET_WDT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__RESET_DSBOD__OFFSET
CYFLD__RESET_DSBOD__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__RESET_DSBOD__SIZE
CYFLD__RESET_DSBOD__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__RESET_LOCKUP__OFFSET
CYFLD__RESET_LOCKUP__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD__RESET_LOCKUP__SIZE
CYFLD__RESET_LOCKUP__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__RESET_PROT_FAULT__OFFSET
CYFLD__RESET_PROT_FAULT__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD__RESET_PROT_FAULT__SIZE
CYFLD__RESET_PROT_FAULT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__RESET_SOFT__OFFSET
CYFLD__RESET_SOFT__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD__RESET_SOFT__SIZE
CYFLD__RESET_SOFT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__RESET_HVBOD__OFFSET
CYFLD__RESET_HVBOD__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD__RESET_HVBOD__SIZE
CYFLD__RESET_HVBOD__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__RESET_PBOD__OFFSET
CYFLD__RESET_PBOD__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD__RESET_PBOD__SIZE
CYFLD__RESET_PBOD__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__RESET_XRES__OFFSET
CYFLD__RESET_XRES__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD__RESET_XRES__SIZE
CYFLD__RESET_XRES__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_PWR_PWRSYS_TRIM1
CYREG_PWR_PWRSYS_TRIM1 EQU 0x400bff00
ENDIF
IF :LNOT::DEF:CYFLD__HIB_BIAS_TRIM__OFFSET
CYFLD__HIB_BIAS_TRIM__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__HIB_BIAS_TRIM__SIZE
CYFLD__HIB_BIAS_TRIM__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD__BOD_TURBO_THRESH__OFFSET
CYFLD__BOD_TURBO_THRESH__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD__BOD_TURBO_THRESH__SIZE
CYFLD__BOD_TURBO_THRESH__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__BOD_TRIM_TRIP__OFFSET
CYFLD__BOD_TRIM_TRIP__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD__BOD_TRIM_TRIP__SIZE
CYFLD__BOD_TRIM_TRIP__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYREG_PWR_PWRSYS_TRIM2
CYREG_PWR_PWRSYS_TRIM2 EQU 0x400bff04
ENDIF
IF :LNOT::DEF:CYFLD__LFCLK_TRIM_LOAD__OFFSET
CYFLD__LFCLK_TRIM_LOAD__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__LFCLK_TRIM_LOAD__SIZE
CYFLD__LFCLK_TRIM_LOAD__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD__LFCLK_TRIM_VOLTAGE__OFFSET
CYFLD__LFCLK_TRIM_VOLTAGE__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD__LFCLK_TRIM_VOLTAGE__SIZE
CYFLD__LFCLK_TRIM_VOLTAGE__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD__DPSLP_TRIM_LOAD__OFFSET
CYFLD__DPSLP_TRIM_LOAD__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD__DPSLP_TRIM_LOAD__SIZE
CYFLD__DPSLP_TRIM_LOAD__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD__DPSLP_TRIM_LEAKAGE__OFFSET
CYFLD__DPSLP_TRIM_LEAKAGE__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD__DPSLP_TRIM_LEAKAGE__SIZE
CYFLD__DPSLP_TRIM_LEAKAGE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__DPSLP_TRIM_VOLTAGE__OFFSET
CYFLD__DPSLP_TRIM_VOLTAGE__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD__DPSLP_TRIM_VOLTAGE__SIZE
CYFLD__DPSLP_TRIM_VOLTAGE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_PWR_PWRSYS_TRIM3
CYREG_PWR_PWRSYS_TRIM3 EQU 0x400bff08
ENDIF
IF :LNOT::DEF:CYFLD__NWELL_TRIM__OFFSET
CYFLD__NWELL_TRIM__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__NWELL_TRIM__SIZE
CYFLD__NWELL_TRIM__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD__QUIET_TRIM__OFFSET
CYFLD__QUIET_TRIM__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD__QUIET_TRIM__SIZE
CYFLD__QUIET_TRIM__SIZE EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYREG_PWR_PWRSYS_TRIM4
CYREG_PWR_PWRSYS_TRIM4 EQU 0x400bff0c
ENDIF
IF :LNOT::DEF:CYFLD__HIB_TRIM_NWELL__OFFSET
CYFLD__HIB_TRIM_NWELL__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__HIB_TRIM_NWELL__SIZE
CYFLD__HIB_TRIM_NWELL__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD__HIB_TRIM_LEAKAGE__OFFSET
CYFLD__HIB_TRIM_LEAKAGE__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD__HIB_TRIM_LEAKAGE__SIZE
CYFLD__HIB_TRIM_LEAKAGE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__HIB_TRIM_VOLTAGE__OFFSET
CYFLD__HIB_TRIM_VOLTAGE__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD__HIB_TRIM_VOLTAGE__SIZE
CYFLD__HIB_TRIM_VOLTAGE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__HIB_TRIM_REFERENCE__OFFSET
CYFLD__HIB_TRIM_REFERENCE__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD__HIB_TRIM_REFERENCE__SIZE
CYFLD__HIB_TRIM_REFERENCE__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYREG_PWR_BG_TRIM1
CYREG_PWR_BG_TRIM1 EQU 0x400bff10
ENDIF
IF :LNOT::DEF:CYFLD__INL_TRIM_MAIN__OFFSET
CYFLD__INL_TRIM_MAIN__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__INL_TRIM_MAIN__SIZE
CYFLD__INL_TRIM_MAIN__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD__INL_CROSS_MAIN__OFFSET
CYFLD__INL_CROSS_MAIN__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD__INL_CROSS_MAIN__SIZE
CYFLD__INL_CROSS_MAIN__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYREG_PWR_BG_TRIM2
CYREG_PWR_BG_TRIM2 EQU 0x400bff14
ENDIF
IF :LNOT::DEF:CYFLD__VCTAT_SLOPE__OFFSET
CYFLD__VCTAT_SLOPE__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__VCTAT_SLOPE__SIZE
CYFLD__VCTAT_SLOPE__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD__VCTAT_VOLTAGE__OFFSET
CYFLD__VCTAT_VOLTAGE__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD__VCTAT_VOLTAGE__SIZE
CYFLD__VCTAT_VOLTAGE__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD__VCTAT_ENABLE__OFFSET
CYFLD__VCTAT_ENABLE__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD__VCTAT_ENABLE__SIZE
CYFLD__VCTAT_ENABLE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD__VCTAT_VOLTAGE_MSB__OFFSET
CYFLD__VCTAT_VOLTAGE_MSB__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD__VCTAT_VOLTAGE_MSB__SIZE
CYFLD__VCTAT_VOLTAGE_MSB__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_PWR_BG_TRIM3
CYREG_PWR_BG_TRIM3 EQU 0x400bff18
ENDIF
IF :LNOT::DEF:CYFLD__INL_TRIM_IMO__OFFSET
CYFLD__INL_TRIM_IMO__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__INL_TRIM_IMO__SIZE
CYFLD__INL_TRIM_IMO__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD__INL_CROSS_IMO__OFFSET
CYFLD__INL_CROSS_IMO__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD__INL_CROSS_IMO__SIZE
CYFLD__INL_CROSS_IMO__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYREG_PWR_BG_TRIM4
CYREG_PWR_BG_TRIM4 EQU 0x400bff1c
ENDIF
IF :LNOT::DEF:CYFLD__ABS_TRIM_IMO__OFFSET
CYFLD__ABS_TRIM_IMO__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__ABS_TRIM_IMO__SIZE
CYFLD__ABS_TRIM_IMO__SIZE EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYREG_PWR_BG_TRIM5
CYREG_PWR_BG_TRIM5 EQU 0x400bff20
ENDIF
IF :LNOT::DEF:CYFLD__TMPCO_TRIM_IMO__OFFSET
CYFLD__TMPCO_TRIM_IMO__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__TMPCO_TRIM_IMO__SIZE
CYFLD__TMPCO_TRIM_IMO__SIZE EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYREG_CLK_ILO_TRIM
CYREG_CLK_ILO_TRIM EQU 0x400bff24
ENDIF
IF :LNOT::DEF:CYFLD__TRIM__OFFSET
CYFLD__TRIM__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__TRIM__SIZE
CYFLD__TRIM__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD__COARSE_TRIM__OFFSET
CYFLD__COARSE_TRIM__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD__COARSE_TRIM__SIZE
CYFLD__COARSE_TRIM__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYREG_CLK_IMO_TRIM1
CYREG_CLK_IMO_TRIM1 EQU 0x400bff28
ENDIF
IF :LNOT::DEF:CYFLD__OFFSET__OFFSET
CYFLD__OFFSET__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__OFFSET__SIZE
CYFLD__OFFSET__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_CLK_IMO_TRIM2
CYREG_CLK_IMO_TRIM2 EQU 0x400bff2c
ENDIF
IF :LNOT::DEF:CYFLD__FREQ__OFFSET
CYFLD__FREQ__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__FREQ__SIZE
CYFLD__FREQ__SIZE EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYREG_CLK_IMO_TRIM3
CYREG_CLK_IMO_TRIM3 EQU 0x400bff30
ENDIF
IF :LNOT::DEF:CYFLD__TRIM_CLK36__OFFSET
CYFLD__TRIM_CLK36__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__TRIM_CLK36__SIZE
CYFLD__TRIM_CLK36__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYREG_CLK_IMO_TRIM4
CYREG_CLK_IMO_TRIM4 EQU 0x400bff34
ENDIF
IF :LNOT::DEF:CYFLD__GAIN__OFFSET
CYFLD__GAIN__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__GAIN__SIZE
CYFLD__GAIN__SIZE EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD__FSOFFSET__OFFSET
CYFLD__FSOFFSET__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD__FSOFFSET__SIZE
CYFLD__FSOFFSET__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_PWR_RSVD_TRIM
CYREG_PWR_RSVD_TRIM EQU 0x400bff38
ENDIF
IF :LNOT::DEF:CYFLD__RSVD_TRIM__OFFSET
CYFLD__RSVD_TRIM__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD__RSVD_TRIM__SIZE
CYFLD__RSVD_TRIM__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYDEV_SPCIF_BASE
CYDEV_SPCIF_BASE EQU 0x400e0000
ENDIF
IF :LNOT::DEF:CYDEV_SPCIF_SIZE
CYDEV_SPCIF_SIZE EQU 0x00010000
ENDIF
IF :LNOT::DEF:CYREG_SPCIF_GEOMETRY
CYREG_SPCIF_GEOMETRY EQU 0x400e0000
ENDIF
IF :LNOT::DEF:CYFLD_SPCIF_FLASH__OFFSET
CYFLD_SPCIF_FLASH__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SPCIF_FLASH__SIZE
CYFLD_SPCIF_FLASH__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_SPCIF_SFLASH__OFFSET
CYFLD_SPCIF_SFLASH__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_SPCIF_SFLASH__SIZE
CYFLD_SPCIF_SFLASH__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SPCIF_NUM_FLASH__OFFSET
CYFLD_SPCIF_NUM_FLASH__OFFSET EQU 0x00000014
ENDIF
IF :LNOT::DEF:CYFLD_SPCIF_NUM_FLASH__SIZE
CYFLD_SPCIF_NUM_FLASH__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SPCIF_FLASH_ROW__OFFSET
CYFLD_SPCIF_FLASH_ROW__OFFSET EQU 0x00000016
ENDIF
IF :LNOT::DEF:CYFLD_SPCIF_FLASH_ROW__SIZE
CYFLD_SPCIF_FLASH_ROW__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SPCIF_NVL__OFFSET
CYFLD_SPCIF_NVL__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_SPCIF_NVL__SIZE
CYFLD_SPCIF_NVL__SIZE EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_SPCIF_DE_CPD_LP__OFFSET
CYFLD_SPCIF_DE_CPD_LP__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_SPCIF_DE_CPD_LP__SIZE
CYFLD_SPCIF_DE_CPD_LP__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SPCIF_NVL_WR_DATA
CYREG_SPCIF_NVL_WR_DATA EQU 0x400e001c
ENDIF
IF :LNOT::DEF:CYFLD_SPCIF_DATA__OFFSET
CYFLD_SPCIF_DATA__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SPCIF_DATA__SIZE
CYFLD_SPCIF_DATA__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYDEV_UDB_BASE
CYDEV_UDB_BASE EQU 0x400f0000
ENDIF
IF :LNOT::DEF:CYDEV_UDB_SIZE
CYDEV_UDB_SIZE EQU 0x00010000
ENDIF
IF :LNOT::DEF:CYDEV_UDB_W8_BASE
CYDEV_UDB_W8_BASE EQU 0x400f0000
ENDIF
IF :LNOT::DEF:CYDEV_UDB_W8_SIZE
CYDEV_UDB_W8_SIZE EQU 0x00001000
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_A0_00
CYREG_UDB_W8_A0_00 EQU 0x400f0000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_A0__OFFSET
CYFLD_UDB_W8_A0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_A0__SIZE
CYFLD_UDB_W8_A0__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_A0_01
CYREG_UDB_W8_A0_01 EQU 0x400f0001
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_A0_02
CYREG_UDB_W8_A0_02 EQU 0x400f0002
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_A0_03
CYREG_UDB_W8_A0_03 EQU 0x400f0003
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_A1_00
CYREG_UDB_W8_A1_00 EQU 0x400f0010
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_A1__OFFSET
CYFLD_UDB_W8_A1__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_A1__SIZE
CYFLD_UDB_W8_A1__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_A1_01
CYREG_UDB_W8_A1_01 EQU 0x400f0011
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_A1_02
CYREG_UDB_W8_A1_02 EQU 0x400f0012
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_A1_03
CYREG_UDB_W8_A1_03 EQU 0x400f0013
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_D0_00
CYREG_UDB_W8_D0_00 EQU 0x400f0020
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_D0__OFFSET
CYFLD_UDB_W8_D0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_D0__SIZE
CYFLD_UDB_W8_D0__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_D0_01
CYREG_UDB_W8_D0_01 EQU 0x400f0021
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_D0_02
CYREG_UDB_W8_D0_02 EQU 0x400f0022
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_D0_03
CYREG_UDB_W8_D0_03 EQU 0x400f0023
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_D1_00
CYREG_UDB_W8_D1_00 EQU 0x400f0030
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_D1__OFFSET
CYFLD_UDB_W8_D1__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_D1__SIZE
CYFLD_UDB_W8_D1__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_D1_01
CYREG_UDB_W8_D1_01 EQU 0x400f0031
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_D1_02
CYREG_UDB_W8_D1_02 EQU 0x400f0032
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_D1_03
CYREG_UDB_W8_D1_03 EQU 0x400f0033
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_F0_00
CYREG_UDB_W8_F0_00 EQU 0x400f0040
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_F0__OFFSET
CYFLD_UDB_W8_F0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_F0__SIZE
CYFLD_UDB_W8_F0__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_F0_01
CYREG_UDB_W8_F0_01 EQU 0x400f0041
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_F0_02
CYREG_UDB_W8_F0_02 EQU 0x400f0042
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_F0_03
CYREG_UDB_W8_F0_03 EQU 0x400f0043
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_F1_00
CYREG_UDB_W8_F1_00 EQU 0x400f0050
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_F1__OFFSET
CYFLD_UDB_W8_F1__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_F1__SIZE
CYFLD_UDB_W8_F1__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_F1_01
CYREG_UDB_W8_F1_01 EQU 0x400f0051
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_F1_02
CYREG_UDB_W8_F1_02 EQU 0x400f0052
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_F1_03
CYREG_UDB_W8_F1_03 EQU 0x400f0053
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_ST_00
CYREG_UDB_W8_ST_00 EQU 0x400f0060
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_ST__OFFSET
CYFLD_UDB_W8_ST__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_ST__SIZE
CYFLD_UDB_W8_ST__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_ST_01
CYREG_UDB_W8_ST_01 EQU 0x400f0061
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_ST_02
CYREG_UDB_W8_ST_02 EQU 0x400f0062
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_ST_03
CYREG_UDB_W8_ST_03 EQU 0x400f0063
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_CTL_00
CYREG_UDB_W8_CTL_00 EQU 0x400f0070
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_CTL__OFFSET
CYFLD_UDB_W8_CTL__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_CTL__SIZE
CYFLD_UDB_W8_CTL__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_CTL_01
CYREG_UDB_W8_CTL_01 EQU 0x400f0071
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_CTL_02
CYREG_UDB_W8_CTL_02 EQU 0x400f0072
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_CTL_03
CYREG_UDB_W8_CTL_03 EQU 0x400f0073
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_MSK_00
CYREG_UDB_W8_MSK_00 EQU 0x400f0080
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_MSK__OFFSET
CYFLD_UDB_W8_MSK__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_MSK__SIZE
CYFLD_UDB_W8_MSK__SIZE EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_MSK_01
CYREG_UDB_W8_MSK_01 EQU 0x400f0081
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_MSK_02
CYREG_UDB_W8_MSK_02 EQU 0x400f0082
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_MSK_03
CYREG_UDB_W8_MSK_03 EQU 0x400f0083
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_ACTL_00
CYREG_UDB_W8_ACTL_00 EQU 0x400f0090
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_FIFO0_CLR__OFFSET
CYFLD_UDB_W8_FIFO0_CLR__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_FIFO0_CLR__SIZE
CYFLD_UDB_W8_FIFO0_CLR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W8_FIFO0_CLR_NORMAL
CYVAL_UDB_W8_FIFO0_CLR_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W8_FIFO0_CLR_CLEAR
CYVAL_UDB_W8_FIFO0_CLR_CLEAR EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_FIFO1_CLR__OFFSET
CYFLD_UDB_W8_FIFO1_CLR__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_FIFO1_CLR__SIZE
CYFLD_UDB_W8_FIFO1_CLR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W8_FIFO1_CLR_NORMAL
CYVAL_UDB_W8_FIFO1_CLR_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W8_FIFO1_CLR_CLEAR
CYVAL_UDB_W8_FIFO1_CLR_CLEAR EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_FIFO0_LVL__OFFSET
CYFLD_UDB_W8_FIFO0_LVL__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_FIFO0_LVL__SIZE
CYFLD_UDB_W8_FIFO0_LVL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W8_FIFO0_LVL_NORMAL
CYVAL_UDB_W8_FIFO0_LVL_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W8_FIFO0_LVL_MID
CYVAL_UDB_W8_FIFO0_LVL_MID EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_FIFO1_LVL__OFFSET
CYFLD_UDB_W8_FIFO1_LVL__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_FIFO1_LVL__SIZE
CYFLD_UDB_W8_FIFO1_LVL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W8_FIFO1_LVL_NORMAL
CYVAL_UDB_W8_FIFO1_LVL_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W8_FIFO1_LVL_MID
CYVAL_UDB_W8_FIFO1_LVL_MID EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_INT_EN__OFFSET
CYFLD_UDB_W8_INT_EN__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_INT_EN__SIZE
CYFLD_UDB_W8_INT_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W8_INT_EN_DISABLE
CYVAL_UDB_W8_INT_EN_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W8_INT_EN_ENABLE
CYVAL_UDB_W8_INT_EN_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_CNT_START__OFFSET
CYFLD_UDB_W8_CNT_START__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_CNT_START__SIZE
CYFLD_UDB_W8_CNT_START__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W8_CNT_START_DISABLE
CYVAL_UDB_W8_CNT_START_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W8_CNT_START_ENABLE
CYVAL_UDB_W8_CNT_START_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_ACTL_01
CYREG_UDB_W8_ACTL_01 EQU 0x400f0091
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_ACTL_02
CYREG_UDB_W8_ACTL_02 EQU 0x400f0092
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_ACTL_03
CYREG_UDB_W8_ACTL_03 EQU 0x400f0093
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_MC_00
CYREG_UDB_W8_MC_00 EQU 0x400f00a0
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_PLD0_MC__OFFSET
CYFLD_UDB_W8_PLD0_MC__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_PLD0_MC__SIZE
CYFLD_UDB_W8_PLD0_MC__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_PLD1_MC__OFFSET
CYFLD_UDB_W8_PLD1_MC__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W8_PLD1_MC__SIZE
CYFLD_UDB_W8_PLD1_MC__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_MC_01
CYREG_UDB_W8_MC_01 EQU 0x400f00a1
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_MC_02
CYREG_UDB_W8_MC_02 EQU 0x400f00a2
ENDIF
IF :LNOT::DEF:CYREG_UDB_W8_MC_03
CYREG_UDB_W8_MC_03 EQU 0x400f00a3
ENDIF
IF :LNOT::DEF:CYDEV_UDB_CAT16_BASE
CYDEV_UDB_CAT16_BASE EQU 0x400f1000
ENDIF
IF :LNOT::DEF:CYDEV_UDB_CAT16_SIZE
CYDEV_UDB_CAT16_SIZE EQU 0x00001000
ENDIF
IF :LNOT::DEF:CYREG_UDB_CAT16_A_00
CYREG_UDB_CAT16_A_00 EQU 0x400f1000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_A0__OFFSET
CYFLD_UDB_CAT16_A0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_A0__SIZE
CYFLD_UDB_CAT16_A0__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_A1__OFFSET
CYFLD_UDB_CAT16_A1__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_A1__SIZE
CYFLD_UDB_CAT16_A1__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_CAT16_A_01
CYREG_UDB_CAT16_A_01 EQU 0x400f1002
ENDIF
IF :LNOT::DEF:CYREG_UDB_CAT16_A_02
CYREG_UDB_CAT16_A_02 EQU 0x400f1004
ENDIF
IF :LNOT::DEF:CYREG_UDB_CAT16_A_03
CYREG_UDB_CAT16_A_03 EQU 0x400f1006
ENDIF
IF :LNOT::DEF:CYREG_UDB_CAT16_D_00
CYREG_UDB_CAT16_D_00 EQU 0x400f1040
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_D0__OFFSET
CYFLD_UDB_CAT16_D0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_D0__SIZE
CYFLD_UDB_CAT16_D0__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_D1__OFFSET
CYFLD_UDB_CAT16_D1__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_D1__SIZE
CYFLD_UDB_CAT16_D1__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_CAT16_D_01
CYREG_UDB_CAT16_D_01 EQU 0x400f1042
ENDIF
IF :LNOT::DEF:CYREG_UDB_CAT16_D_02
CYREG_UDB_CAT16_D_02 EQU 0x400f1044
ENDIF
IF :LNOT::DEF:CYREG_UDB_CAT16_D_03
CYREG_UDB_CAT16_D_03 EQU 0x400f1046
ENDIF
IF :LNOT::DEF:CYREG_UDB_CAT16_F_00
CYREG_UDB_CAT16_F_00 EQU 0x400f1080
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_F0__OFFSET
CYFLD_UDB_CAT16_F0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_F0__SIZE
CYFLD_UDB_CAT16_F0__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_F1__OFFSET
CYFLD_UDB_CAT16_F1__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_F1__SIZE
CYFLD_UDB_CAT16_F1__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_CAT16_F_01
CYREG_UDB_CAT16_F_01 EQU 0x400f1082
ENDIF
IF :LNOT::DEF:CYREG_UDB_CAT16_F_02
CYREG_UDB_CAT16_F_02 EQU 0x400f1084
ENDIF
IF :LNOT::DEF:CYREG_UDB_CAT16_F_03
CYREG_UDB_CAT16_F_03 EQU 0x400f1086
ENDIF
IF :LNOT::DEF:CYREG_UDB_CAT16_CTL_ST_00
CYREG_UDB_CAT16_CTL_ST_00 EQU 0x400f10c0
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_ST__OFFSET
CYFLD_UDB_CAT16_ST__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_ST__SIZE
CYFLD_UDB_CAT16_ST__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_CTL__OFFSET
CYFLD_UDB_CAT16_CTL__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_CTL__SIZE
CYFLD_UDB_CAT16_CTL__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_CAT16_CTL_ST_01
CYREG_UDB_CAT16_CTL_ST_01 EQU 0x400f10c2
ENDIF
IF :LNOT::DEF:CYREG_UDB_CAT16_CTL_ST_02
CYREG_UDB_CAT16_CTL_ST_02 EQU 0x400f10c4
ENDIF
IF :LNOT::DEF:CYREG_UDB_CAT16_CTL_ST_03
CYREG_UDB_CAT16_CTL_ST_03 EQU 0x400f10c6
ENDIF
IF :LNOT::DEF:CYREG_UDB_CAT16_ACTL_MSK_00
CYREG_UDB_CAT16_ACTL_MSK_00 EQU 0x400f1100
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_MSK__OFFSET
CYFLD_UDB_CAT16_MSK__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_MSK__SIZE
CYFLD_UDB_CAT16_MSK__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_FIFO0_CLR__OFFSET
CYFLD_UDB_CAT16_FIFO0_CLR__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_FIFO0_CLR__SIZE
CYFLD_UDB_CAT16_FIFO0_CLR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_CAT16_FIFO0_CLR_NORMAL
CYVAL_UDB_CAT16_FIFO0_CLR_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_CAT16_FIFO0_CLR_CLEAR
CYVAL_UDB_CAT16_FIFO0_CLR_CLEAR EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_FIFO1_CLR__OFFSET
CYFLD_UDB_CAT16_FIFO1_CLR__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_FIFO1_CLR__SIZE
CYFLD_UDB_CAT16_FIFO1_CLR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_CAT16_FIFO1_CLR_NORMAL
CYVAL_UDB_CAT16_FIFO1_CLR_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_CAT16_FIFO1_CLR_CLEAR
CYVAL_UDB_CAT16_FIFO1_CLR_CLEAR EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_FIFO0_LVL__OFFSET
CYFLD_UDB_CAT16_FIFO0_LVL__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_FIFO0_LVL__SIZE
CYFLD_UDB_CAT16_FIFO0_LVL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_CAT16_FIFO0_LVL_NORMAL
CYVAL_UDB_CAT16_FIFO0_LVL_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_CAT16_FIFO0_LVL_MID
CYVAL_UDB_CAT16_FIFO0_LVL_MID EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_FIFO1_LVL__OFFSET
CYFLD_UDB_CAT16_FIFO1_LVL__OFFSET EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_FIFO1_LVL__SIZE
CYFLD_UDB_CAT16_FIFO1_LVL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_CAT16_FIFO1_LVL_NORMAL
CYVAL_UDB_CAT16_FIFO1_LVL_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_CAT16_FIFO1_LVL_MID
CYVAL_UDB_CAT16_FIFO1_LVL_MID EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_INT_EN__OFFSET
CYFLD_UDB_CAT16_INT_EN__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_INT_EN__SIZE
CYFLD_UDB_CAT16_INT_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_CAT16_INT_EN_DISABLE
CYVAL_UDB_CAT16_INT_EN_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_CAT16_INT_EN_ENABLE
CYVAL_UDB_CAT16_INT_EN_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_CNT_START__OFFSET
CYFLD_UDB_CAT16_CNT_START__OFFSET EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_CNT_START__SIZE
CYFLD_UDB_CAT16_CNT_START__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_CAT16_CNT_START_DISABLE
CYVAL_UDB_CAT16_CNT_START_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_CAT16_CNT_START_ENABLE
CYVAL_UDB_CAT16_CNT_START_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_CAT16_ACTL_MSK_01
CYREG_UDB_CAT16_ACTL_MSK_01 EQU 0x400f1102
ENDIF
IF :LNOT::DEF:CYREG_UDB_CAT16_ACTL_MSK_02
CYREG_UDB_CAT16_ACTL_MSK_02 EQU 0x400f1104
ENDIF
IF :LNOT::DEF:CYREG_UDB_CAT16_ACTL_MSK_03
CYREG_UDB_CAT16_ACTL_MSK_03 EQU 0x400f1106
ENDIF
IF :LNOT::DEF:CYREG_UDB_CAT16_MC_00
CYREG_UDB_CAT16_MC_00 EQU 0x400f1140
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_PLD0_MC__OFFSET
CYFLD_UDB_CAT16_PLD0_MC__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_PLD0_MC__SIZE
CYFLD_UDB_CAT16_PLD0_MC__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_PLD1_MC__OFFSET
CYFLD_UDB_CAT16_PLD1_MC__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_CAT16_PLD1_MC__SIZE
CYFLD_UDB_CAT16_PLD1_MC__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYREG_UDB_CAT16_MC_01
CYREG_UDB_CAT16_MC_01 EQU 0x400f1142
ENDIF
IF :LNOT::DEF:CYREG_UDB_CAT16_MC_02
CYREG_UDB_CAT16_MC_02 EQU 0x400f1144
ENDIF
IF :LNOT::DEF:CYREG_UDB_CAT16_MC_03
CYREG_UDB_CAT16_MC_03 EQU 0x400f1146
ENDIF
IF :LNOT::DEF:CYDEV_UDB_W16_BASE
CYDEV_UDB_W16_BASE EQU 0x400f1000
ENDIF
IF :LNOT::DEF:CYDEV_UDB_W16_SIZE
CYDEV_UDB_W16_SIZE EQU 0x00001000
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_A0_00
CYREG_UDB_W16_A0_00 EQU 0x400f1000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_A0_LS__OFFSET
CYFLD_UDB_W16_A0_LS__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_A0_LS__SIZE
CYFLD_UDB_W16_A0_LS__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_A0_MS__OFFSET
CYFLD_UDB_W16_A0_MS__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_A0_MS__SIZE
CYFLD_UDB_W16_A0_MS__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_A0_01
CYREG_UDB_W16_A0_01 EQU 0x400f1002
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_A0_02
CYREG_UDB_W16_A0_02 EQU 0x400f1004
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_A1_00
CYREG_UDB_W16_A1_00 EQU 0x400f1020
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_A1_LS__OFFSET
CYFLD_UDB_W16_A1_LS__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_A1_LS__SIZE
CYFLD_UDB_W16_A1_LS__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_A1_MS__OFFSET
CYFLD_UDB_W16_A1_MS__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_A1_MS__SIZE
CYFLD_UDB_W16_A1_MS__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_A1_01
CYREG_UDB_W16_A1_01 EQU 0x400f1022
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_A1_02
CYREG_UDB_W16_A1_02 EQU 0x400f1024
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_D0_00
CYREG_UDB_W16_D0_00 EQU 0x400f1040
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_D0_LS__OFFSET
CYFLD_UDB_W16_D0_LS__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_D0_LS__SIZE
CYFLD_UDB_W16_D0_LS__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_D0_MS__OFFSET
CYFLD_UDB_W16_D0_MS__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_D0_MS__SIZE
CYFLD_UDB_W16_D0_MS__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_D0_01
CYREG_UDB_W16_D0_01 EQU 0x400f1042
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_D0_02
CYREG_UDB_W16_D0_02 EQU 0x400f1044
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_D1_00
CYREG_UDB_W16_D1_00 EQU 0x400f1060
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_D1_LS__OFFSET
CYFLD_UDB_W16_D1_LS__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_D1_LS__SIZE
CYFLD_UDB_W16_D1_LS__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_D1_MS__OFFSET
CYFLD_UDB_W16_D1_MS__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_D1_MS__SIZE
CYFLD_UDB_W16_D1_MS__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_D1_01
CYREG_UDB_W16_D1_01 EQU 0x400f1062
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_D1_02
CYREG_UDB_W16_D1_02 EQU 0x400f1064
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_F0_00
CYREG_UDB_W16_F0_00 EQU 0x400f1080
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_F0_LS__OFFSET
CYFLD_UDB_W16_F0_LS__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_F0_LS__SIZE
CYFLD_UDB_W16_F0_LS__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_F0_MS__OFFSET
CYFLD_UDB_W16_F0_MS__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_F0_MS__SIZE
CYFLD_UDB_W16_F0_MS__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_F0_01
CYREG_UDB_W16_F0_01 EQU 0x400f1082
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_F0_02
CYREG_UDB_W16_F0_02 EQU 0x400f1084
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_F1_00
CYREG_UDB_W16_F1_00 EQU 0x400f10a0
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_F1_LS__OFFSET
CYFLD_UDB_W16_F1_LS__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_F1_LS__SIZE
CYFLD_UDB_W16_F1_LS__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_F1_MS__OFFSET
CYFLD_UDB_W16_F1_MS__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_F1_MS__SIZE
CYFLD_UDB_W16_F1_MS__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_F1_01
CYREG_UDB_W16_F1_01 EQU 0x400f10a2
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_F1_02
CYREG_UDB_W16_F1_02 EQU 0x400f10a4
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_ST_00
CYREG_UDB_W16_ST_00 EQU 0x400f10c0
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_ST_LS__OFFSET
CYFLD_UDB_W16_ST_LS__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_ST_LS__SIZE
CYFLD_UDB_W16_ST_LS__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_ST_MS__OFFSET
CYFLD_UDB_W16_ST_MS__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_ST_MS__SIZE
CYFLD_UDB_W16_ST_MS__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_ST_01
CYREG_UDB_W16_ST_01 EQU 0x400f10c2
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_ST_02
CYREG_UDB_W16_ST_02 EQU 0x400f10c4
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_CTL_00
CYREG_UDB_W16_CTL_00 EQU 0x400f10e0
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_CTL_LS__OFFSET
CYFLD_UDB_W16_CTL_LS__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_CTL_LS__SIZE
CYFLD_UDB_W16_CTL_LS__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_CTL_MS__OFFSET
CYFLD_UDB_W16_CTL_MS__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_CTL_MS__SIZE
CYFLD_UDB_W16_CTL_MS__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_CTL_01
CYREG_UDB_W16_CTL_01 EQU 0x400f10e2
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_CTL_02
CYREG_UDB_W16_CTL_02 EQU 0x400f10e4
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_MSK_00
CYREG_UDB_W16_MSK_00 EQU 0x400f1100
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_MSK_LS__OFFSET
CYFLD_UDB_W16_MSK_LS__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_MSK_LS__SIZE
CYFLD_UDB_W16_MSK_LS__SIZE EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_MSK_MS__OFFSET
CYFLD_UDB_W16_MSK_MS__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_MSK_MS__SIZE
CYFLD_UDB_W16_MSK_MS__SIZE EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_MSK_01
CYREG_UDB_W16_MSK_01 EQU 0x400f1102
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_MSK_02
CYREG_UDB_W16_MSK_02 EQU 0x400f1104
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_ACTL_00
CYREG_UDB_W16_ACTL_00 EQU 0x400f1120
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_FIFO0_CLR_LS__OFFSET
CYFLD_UDB_W16_FIFO0_CLR_LS__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_FIFO0_CLR_LS__SIZE
CYFLD_UDB_W16_FIFO0_CLR_LS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W16_FIFO0_CLR_LS_NORMAL
CYVAL_UDB_W16_FIFO0_CLR_LS_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W16_FIFO0_CLR_LS_CLEAR
CYVAL_UDB_W16_FIFO0_CLR_LS_CLEAR EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_FIFO1_CLR_LS__OFFSET
CYFLD_UDB_W16_FIFO1_CLR_LS__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_FIFO1_CLR_LS__SIZE
CYFLD_UDB_W16_FIFO1_CLR_LS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W16_FIFO1_CLR_LS_NORMAL
CYVAL_UDB_W16_FIFO1_CLR_LS_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W16_FIFO1_CLR_LS_CLEAR
CYVAL_UDB_W16_FIFO1_CLR_LS_CLEAR EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_FIFO0_LVL_LS__OFFSET
CYFLD_UDB_W16_FIFO0_LVL_LS__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_FIFO0_LVL_LS__SIZE
CYFLD_UDB_W16_FIFO0_LVL_LS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W16_FIFO0_LVL_LS_NORMAL
CYVAL_UDB_W16_FIFO0_LVL_LS_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W16_FIFO0_LVL_LS_MID
CYVAL_UDB_W16_FIFO0_LVL_LS_MID EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_FIFO1_LVL_LS__OFFSET
CYFLD_UDB_W16_FIFO1_LVL_LS__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_FIFO1_LVL_LS__SIZE
CYFLD_UDB_W16_FIFO1_LVL_LS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W16_FIFO1_LVL_LS_NORMAL
CYVAL_UDB_W16_FIFO1_LVL_LS_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W16_FIFO1_LVL_LS_MID
CYVAL_UDB_W16_FIFO1_LVL_LS_MID EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_INT_EN_LS__OFFSET
CYFLD_UDB_W16_INT_EN_LS__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_INT_EN_LS__SIZE
CYFLD_UDB_W16_INT_EN_LS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W16_INT_EN_LS_DISABLE
CYVAL_UDB_W16_INT_EN_LS_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W16_INT_EN_LS_ENABLE
CYVAL_UDB_W16_INT_EN_LS_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_CNT_START_LS__OFFSET
CYFLD_UDB_W16_CNT_START_LS__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_CNT_START_LS__SIZE
CYFLD_UDB_W16_CNT_START_LS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W16_CNT_START_LS_DISABLE
CYVAL_UDB_W16_CNT_START_LS_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W16_CNT_START_LS_ENABLE
CYVAL_UDB_W16_CNT_START_LS_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_FIFO0_CLR_MS__OFFSET
CYFLD_UDB_W16_FIFO0_CLR_MS__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_FIFO0_CLR_MS__SIZE
CYFLD_UDB_W16_FIFO0_CLR_MS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W16_FIFO0_CLR_MS_NORMAL
CYVAL_UDB_W16_FIFO0_CLR_MS_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W16_FIFO0_CLR_MS_CLEAR
CYVAL_UDB_W16_FIFO0_CLR_MS_CLEAR EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_FIFO1_CLR_MS__OFFSET
CYFLD_UDB_W16_FIFO1_CLR_MS__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_FIFO1_CLR_MS__SIZE
CYFLD_UDB_W16_FIFO1_CLR_MS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W16_FIFO1_CLR_MS_NORMAL
CYVAL_UDB_W16_FIFO1_CLR_MS_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W16_FIFO1_CLR_MS_CLEAR
CYVAL_UDB_W16_FIFO1_CLR_MS_CLEAR EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_FIFO0_LVL_MS__OFFSET
CYFLD_UDB_W16_FIFO0_LVL_MS__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_FIFO0_LVL_MS__SIZE
CYFLD_UDB_W16_FIFO0_LVL_MS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W16_FIFO0_LVL_MS_NORMAL
CYVAL_UDB_W16_FIFO0_LVL_MS_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W16_FIFO0_LVL_MS_MID
CYVAL_UDB_W16_FIFO0_LVL_MS_MID EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_FIFO1_LVL_MS__OFFSET
CYFLD_UDB_W16_FIFO1_LVL_MS__OFFSET EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_FIFO1_LVL_MS__SIZE
CYFLD_UDB_W16_FIFO1_LVL_MS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W16_FIFO1_LVL_MS_NORMAL
CYVAL_UDB_W16_FIFO1_LVL_MS_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W16_FIFO1_LVL_MS_MID
CYVAL_UDB_W16_FIFO1_LVL_MS_MID EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_INT_EN_MS__OFFSET
CYFLD_UDB_W16_INT_EN_MS__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_INT_EN_MS__SIZE
CYFLD_UDB_W16_INT_EN_MS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W16_INT_EN_MS_DISABLE
CYVAL_UDB_W16_INT_EN_MS_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W16_INT_EN_MS_ENABLE
CYVAL_UDB_W16_INT_EN_MS_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_CNT_START_MS__OFFSET
CYFLD_UDB_W16_CNT_START_MS__OFFSET EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_CNT_START_MS__SIZE
CYFLD_UDB_W16_CNT_START_MS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W16_CNT_START_MS_DISABLE
CYVAL_UDB_W16_CNT_START_MS_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W16_CNT_START_MS_ENABLE
CYVAL_UDB_W16_CNT_START_MS_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_ACTL_01
CYREG_UDB_W16_ACTL_01 EQU 0x400f1122
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_ACTL_02
CYREG_UDB_W16_ACTL_02 EQU 0x400f1124
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_MC_00
CYREG_UDB_W16_MC_00 EQU 0x400f1140
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_PLD0_MC_LS__OFFSET
CYFLD_UDB_W16_PLD0_MC_LS__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_PLD0_MC_LS__SIZE
CYFLD_UDB_W16_PLD0_MC_LS__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_PLD1_MC_LS__OFFSET
CYFLD_UDB_W16_PLD1_MC_LS__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_PLD1_MC_LS__SIZE
CYFLD_UDB_W16_PLD1_MC_LS__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_PLD0_MC_MS__OFFSET
CYFLD_UDB_W16_PLD0_MC_MS__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_PLD0_MC_MS__SIZE
CYFLD_UDB_W16_PLD0_MC_MS__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_PLD1_MC_MS__OFFSET
CYFLD_UDB_W16_PLD1_MC_MS__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W16_PLD1_MC_MS__SIZE
CYFLD_UDB_W16_PLD1_MC_MS__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_MC_01
CYREG_UDB_W16_MC_01 EQU 0x400f1142
ENDIF
IF :LNOT::DEF:CYREG_UDB_W16_MC_02
CYREG_UDB_W16_MC_02 EQU 0x400f1144
ENDIF
IF :LNOT::DEF:CYDEV_UDB_W32_BASE
CYDEV_UDB_W32_BASE EQU 0x400f2000
ENDIF
IF :LNOT::DEF:CYDEV_UDB_W32_SIZE
CYDEV_UDB_W32_SIZE EQU 0x00001000
ENDIF
IF :LNOT::DEF:CYREG_UDB_W32_A0_00
CYREG_UDB_W32_A0_00 EQU 0x400f2000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_A0_0__OFFSET
CYFLD_UDB_W32_A0_0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_A0_0__SIZE
CYFLD_UDB_W32_A0_0__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_A0_1__OFFSET
CYFLD_UDB_W32_A0_1__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_A0_1__SIZE
CYFLD_UDB_W32_A0_1__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_A0_2__OFFSET
CYFLD_UDB_W32_A0_2__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_A0_2__SIZE
CYFLD_UDB_W32_A0_2__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_A0_3__OFFSET
CYFLD_UDB_W32_A0_3__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_A0_3__SIZE
CYFLD_UDB_W32_A0_3__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_W32_A1_00
CYREG_UDB_W32_A1_00 EQU 0x400f2040
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_A1_0__OFFSET
CYFLD_UDB_W32_A1_0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_A1_0__SIZE
CYFLD_UDB_W32_A1_0__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_A1_1__OFFSET
CYFLD_UDB_W32_A1_1__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_A1_1__SIZE
CYFLD_UDB_W32_A1_1__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_A1_2__OFFSET
CYFLD_UDB_W32_A1_2__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_A1_2__SIZE
CYFLD_UDB_W32_A1_2__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_A1_3__OFFSET
CYFLD_UDB_W32_A1_3__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_A1_3__SIZE
CYFLD_UDB_W32_A1_3__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_W32_D0_00
CYREG_UDB_W32_D0_00 EQU 0x400f2080
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_D0_0__OFFSET
CYFLD_UDB_W32_D0_0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_D0_0__SIZE
CYFLD_UDB_W32_D0_0__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_D0_1__OFFSET
CYFLD_UDB_W32_D0_1__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_D0_1__SIZE
CYFLD_UDB_W32_D0_1__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_D0_2__OFFSET
CYFLD_UDB_W32_D0_2__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_D0_2__SIZE
CYFLD_UDB_W32_D0_2__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_D0_3__OFFSET
CYFLD_UDB_W32_D0_3__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_D0_3__SIZE
CYFLD_UDB_W32_D0_3__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_W32_D1_00
CYREG_UDB_W32_D1_00 EQU 0x400f20c0
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_D1_0__OFFSET
CYFLD_UDB_W32_D1_0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_D1_0__SIZE
CYFLD_UDB_W32_D1_0__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_D1_1__OFFSET
CYFLD_UDB_W32_D1_1__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_D1_1__SIZE
CYFLD_UDB_W32_D1_1__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_D1_2__OFFSET
CYFLD_UDB_W32_D1_2__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_D1_2__SIZE
CYFLD_UDB_W32_D1_2__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_D1_3__OFFSET
CYFLD_UDB_W32_D1_3__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_D1_3__SIZE
CYFLD_UDB_W32_D1_3__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_W32_F0_00
CYREG_UDB_W32_F0_00 EQU 0x400f2100
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_F0_0__OFFSET
CYFLD_UDB_W32_F0_0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_F0_0__SIZE
CYFLD_UDB_W32_F0_0__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_F0_1__OFFSET
CYFLD_UDB_W32_F0_1__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_F0_1__SIZE
CYFLD_UDB_W32_F0_1__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_F0_2__OFFSET
CYFLD_UDB_W32_F0_2__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_F0_2__SIZE
CYFLD_UDB_W32_F0_2__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_F0_3__OFFSET
CYFLD_UDB_W32_F0_3__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_F0_3__SIZE
CYFLD_UDB_W32_F0_3__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_W32_F1_00
CYREG_UDB_W32_F1_00 EQU 0x400f2140
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_F1_0__OFFSET
CYFLD_UDB_W32_F1_0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_F1_0__SIZE
CYFLD_UDB_W32_F1_0__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_F1_1__OFFSET
CYFLD_UDB_W32_F1_1__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_F1_1__SIZE
CYFLD_UDB_W32_F1_1__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_F1_2__OFFSET
CYFLD_UDB_W32_F1_2__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_F1_2__SIZE
CYFLD_UDB_W32_F1_2__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_F1_3__OFFSET
CYFLD_UDB_W32_F1_3__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_F1_3__SIZE
CYFLD_UDB_W32_F1_3__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_W32_ST_00
CYREG_UDB_W32_ST_00 EQU 0x400f2180
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_ST_0__OFFSET
CYFLD_UDB_W32_ST_0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_ST_0__SIZE
CYFLD_UDB_W32_ST_0__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_ST_1__OFFSET
CYFLD_UDB_W32_ST_1__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_ST_1__SIZE
CYFLD_UDB_W32_ST_1__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_ST_2__OFFSET
CYFLD_UDB_W32_ST_2__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_ST_2__SIZE
CYFLD_UDB_W32_ST_2__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_ST_3__OFFSET
CYFLD_UDB_W32_ST_3__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_ST_3__SIZE
CYFLD_UDB_W32_ST_3__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_W32_CTL_00
CYREG_UDB_W32_CTL_00 EQU 0x400f21c0
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_CTL_0__OFFSET
CYFLD_UDB_W32_CTL_0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_CTL_0__SIZE
CYFLD_UDB_W32_CTL_0__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_CTL_1__OFFSET
CYFLD_UDB_W32_CTL_1__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_CTL_1__SIZE
CYFLD_UDB_W32_CTL_1__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_CTL_2__OFFSET
CYFLD_UDB_W32_CTL_2__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_CTL_2__SIZE
CYFLD_UDB_W32_CTL_2__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_CTL_3__OFFSET
CYFLD_UDB_W32_CTL_3__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_CTL_3__SIZE
CYFLD_UDB_W32_CTL_3__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_W32_MSK_00
CYREG_UDB_W32_MSK_00 EQU 0x400f2200
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_MSK_0__OFFSET
CYFLD_UDB_W32_MSK_0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_MSK_0__SIZE
CYFLD_UDB_W32_MSK_0__SIZE EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_MSK_1__OFFSET
CYFLD_UDB_W32_MSK_1__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_MSK_1__SIZE
CYFLD_UDB_W32_MSK_1__SIZE EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_MSK_2__OFFSET
CYFLD_UDB_W32_MSK_2__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_MSK_2__SIZE
CYFLD_UDB_W32_MSK_2__SIZE EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_MSK_3__OFFSET
CYFLD_UDB_W32_MSK_3__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_MSK_3__SIZE
CYFLD_UDB_W32_MSK_3__SIZE EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYREG_UDB_W32_ACTL_00
CYREG_UDB_W32_ACTL_00 EQU 0x400f2240
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_CLR_0__OFFSET
CYFLD_UDB_W32_FIFO0_CLR_0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_CLR_0__SIZE
CYFLD_UDB_W32_FIFO0_CLR_0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_CLR_0_NORMAL
CYVAL_UDB_W32_FIFO0_CLR_0_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_CLR_0_CLEAR
CYVAL_UDB_W32_FIFO0_CLR_0_CLEAR EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_CLR_0__OFFSET
CYFLD_UDB_W32_FIFO1_CLR_0__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_CLR_0__SIZE
CYFLD_UDB_W32_FIFO1_CLR_0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_CLR_0_NORMAL
CYVAL_UDB_W32_FIFO1_CLR_0_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_CLR_0_CLEAR
CYVAL_UDB_W32_FIFO1_CLR_0_CLEAR EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_LVL_0__OFFSET
CYFLD_UDB_W32_FIFO0_LVL_0__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_LVL_0__SIZE
CYFLD_UDB_W32_FIFO0_LVL_0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_LVL_0_NORMAL
CYVAL_UDB_W32_FIFO0_LVL_0_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_LVL_0_MID
CYVAL_UDB_W32_FIFO0_LVL_0_MID EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_LVL_0__OFFSET
CYFLD_UDB_W32_FIFO1_LVL_0__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_LVL_0__SIZE
CYFLD_UDB_W32_FIFO1_LVL_0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_LVL_0_NORMAL
CYVAL_UDB_W32_FIFO1_LVL_0_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_LVL_0_MID
CYVAL_UDB_W32_FIFO1_LVL_0_MID EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_INT_EN_0__OFFSET
CYFLD_UDB_W32_INT_EN_0__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_INT_EN_0__SIZE
CYFLD_UDB_W32_INT_EN_0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_INT_EN_0_DISABLE
CYVAL_UDB_W32_INT_EN_0_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_INT_EN_0_ENABLE
CYVAL_UDB_W32_INT_EN_0_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_CNT_START_0__OFFSET
CYFLD_UDB_W32_CNT_START_0__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_CNT_START_0__SIZE
CYFLD_UDB_W32_CNT_START_0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_CNT_START_0_DISABLE
CYVAL_UDB_W32_CNT_START_0_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_CNT_START_0_ENABLE
CYVAL_UDB_W32_CNT_START_0_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_CLR_1__OFFSET
CYFLD_UDB_W32_FIFO0_CLR_1__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_CLR_1__SIZE
CYFLD_UDB_W32_FIFO0_CLR_1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_CLR_1_NORMAL
CYVAL_UDB_W32_FIFO0_CLR_1_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_CLR_1_CLEAR
CYVAL_UDB_W32_FIFO0_CLR_1_CLEAR EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_CLR_1__OFFSET
CYFLD_UDB_W32_FIFO1_CLR_1__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_CLR_1__SIZE
CYFLD_UDB_W32_FIFO1_CLR_1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_CLR_1_NORMAL
CYVAL_UDB_W32_FIFO1_CLR_1_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_CLR_1_CLEAR
CYVAL_UDB_W32_FIFO1_CLR_1_CLEAR EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_LVL_1__OFFSET
CYFLD_UDB_W32_FIFO0_LVL_1__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_LVL_1__SIZE
CYFLD_UDB_W32_FIFO0_LVL_1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_LVL_1_NORMAL
CYVAL_UDB_W32_FIFO0_LVL_1_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_LVL_1_MID
CYVAL_UDB_W32_FIFO0_LVL_1_MID EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_LVL_1__OFFSET
CYFLD_UDB_W32_FIFO1_LVL_1__OFFSET EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_LVL_1__SIZE
CYFLD_UDB_W32_FIFO1_LVL_1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_LVL_1_NORMAL
CYVAL_UDB_W32_FIFO1_LVL_1_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_LVL_1_MID
CYVAL_UDB_W32_FIFO1_LVL_1_MID EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_INT_EN_1__OFFSET
CYFLD_UDB_W32_INT_EN_1__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_INT_EN_1__SIZE
CYFLD_UDB_W32_INT_EN_1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_INT_EN_1_DISABLE
CYVAL_UDB_W32_INT_EN_1_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_INT_EN_1_ENABLE
CYVAL_UDB_W32_INT_EN_1_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_CNT_START_1__OFFSET
CYFLD_UDB_W32_CNT_START_1__OFFSET EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_CNT_START_1__SIZE
CYFLD_UDB_W32_CNT_START_1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_CNT_START_1_DISABLE
CYVAL_UDB_W32_CNT_START_1_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_CNT_START_1_ENABLE
CYVAL_UDB_W32_CNT_START_1_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_CLR_2__OFFSET
CYFLD_UDB_W32_FIFO0_CLR_2__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_CLR_2__SIZE
CYFLD_UDB_W32_FIFO0_CLR_2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_CLR_2_NORMAL
CYVAL_UDB_W32_FIFO0_CLR_2_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_CLR_2_CLEAR
CYVAL_UDB_W32_FIFO0_CLR_2_CLEAR EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_CLR_2__OFFSET
CYFLD_UDB_W32_FIFO1_CLR_2__OFFSET EQU 0x00000011
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_CLR_2__SIZE
CYFLD_UDB_W32_FIFO1_CLR_2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_CLR_2_NORMAL
CYVAL_UDB_W32_FIFO1_CLR_2_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_CLR_2_CLEAR
CYVAL_UDB_W32_FIFO1_CLR_2_CLEAR EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_LVL_2__OFFSET
CYFLD_UDB_W32_FIFO0_LVL_2__OFFSET EQU 0x00000012
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_LVL_2__SIZE
CYFLD_UDB_W32_FIFO0_LVL_2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_LVL_2_NORMAL
CYVAL_UDB_W32_FIFO0_LVL_2_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_LVL_2_MID
CYVAL_UDB_W32_FIFO0_LVL_2_MID EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_LVL_2__OFFSET
CYFLD_UDB_W32_FIFO1_LVL_2__OFFSET EQU 0x00000013
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_LVL_2__SIZE
CYFLD_UDB_W32_FIFO1_LVL_2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_LVL_2_NORMAL
CYVAL_UDB_W32_FIFO1_LVL_2_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_LVL_2_MID
CYVAL_UDB_W32_FIFO1_LVL_2_MID EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_INT_EN_2__OFFSET
CYFLD_UDB_W32_INT_EN_2__OFFSET EQU 0x00000014
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_INT_EN_2__SIZE
CYFLD_UDB_W32_INT_EN_2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_INT_EN_2_DISABLE
CYVAL_UDB_W32_INT_EN_2_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_INT_EN_2_ENABLE
CYVAL_UDB_W32_INT_EN_2_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_CNT_START_2__OFFSET
CYFLD_UDB_W32_CNT_START_2__OFFSET EQU 0x00000015
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_CNT_START_2__SIZE
CYFLD_UDB_W32_CNT_START_2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_CNT_START_2_DISABLE
CYVAL_UDB_W32_CNT_START_2_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_CNT_START_2_ENABLE
CYVAL_UDB_W32_CNT_START_2_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_CLR_3__OFFSET
CYFLD_UDB_W32_FIFO0_CLR_3__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_CLR_3__SIZE
CYFLD_UDB_W32_FIFO0_CLR_3__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_CLR_3_NORMAL
CYVAL_UDB_W32_FIFO0_CLR_3_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_CLR_3_CLEAR
CYVAL_UDB_W32_FIFO0_CLR_3_CLEAR EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_CLR_3__OFFSET
CYFLD_UDB_W32_FIFO1_CLR_3__OFFSET EQU 0x00000019
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_CLR_3__SIZE
CYFLD_UDB_W32_FIFO1_CLR_3__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_CLR_3_NORMAL
CYVAL_UDB_W32_FIFO1_CLR_3_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_CLR_3_CLEAR
CYVAL_UDB_W32_FIFO1_CLR_3_CLEAR EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_LVL_3__OFFSET
CYFLD_UDB_W32_FIFO0_LVL_3__OFFSET EQU 0x0000001a
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_LVL_3__SIZE
CYFLD_UDB_W32_FIFO0_LVL_3__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_LVL_3_NORMAL
CYVAL_UDB_W32_FIFO0_LVL_3_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_LVL_3_MID
CYVAL_UDB_W32_FIFO0_LVL_3_MID EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_LVL_3__OFFSET
CYFLD_UDB_W32_FIFO1_LVL_3__OFFSET EQU 0x0000001b
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_LVL_3__SIZE
CYFLD_UDB_W32_FIFO1_LVL_3__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_LVL_3_NORMAL
CYVAL_UDB_W32_FIFO1_LVL_3_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_LVL_3_MID
CYVAL_UDB_W32_FIFO1_LVL_3_MID EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_INT_EN_3__OFFSET
CYFLD_UDB_W32_INT_EN_3__OFFSET EQU 0x0000001c
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_INT_EN_3__SIZE
CYFLD_UDB_W32_INT_EN_3__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_INT_EN_3_DISABLE
CYVAL_UDB_W32_INT_EN_3_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_INT_EN_3_ENABLE
CYVAL_UDB_W32_INT_EN_3_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_CNT_START_3__OFFSET
CYFLD_UDB_W32_CNT_START_3__OFFSET EQU 0x0000001d
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_CNT_START_3__SIZE
CYFLD_UDB_W32_CNT_START_3__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_CNT_START_3_DISABLE
CYVAL_UDB_W32_CNT_START_3_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_W32_CNT_START_3_ENABLE
CYVAL_UDB_W32_CNT_START_3_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_W32_MC_00
CYREG_UDB_W32_MC_00 EQU 0x400f2280
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_PLD0_MC_0__OFFSET
CYFLD_UDB_W32_PLD0_MC_0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_PLD0_MC_0__SIZE
CYFLD_UDB_W32_PLD0_MC_0__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_PLD1_MC_0__OFFSET
CYFLD_UDB_W32_PLD1_MC_0__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_PLD1_MC_0__SIZE
CYFLD_UDB_W32_PLD1_MC_0__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_PLD0_MC_1__OFFSET
CYFLD_UDB_W32_PLD0_MC_1__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_PLD0_MC_1__SIZE
CYFLD_UDB_W32_PLD0_MC_1__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_PLD1_MC_1__OFFSET
CYFLD_UDB_W32_PLD1_MC_1__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_PLD1_MC_1__SIZE
CYFLD_UDB_W32_PLD1_MC_1__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_PLD0_MC_2__OFFSET
CYFLD_UDB_W32_PLD0_MC_2__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_PLD0_MC_2__SIZE
CYFLD_UDB_W32_PLD0_MC_2__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_PLD1_MC_2__OFFSET
CYFLD_UDB_W32_PLD1_MC_2__OFFSET EQU 0x00000014
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_PLD1_MC_2__SIZE
CYFLD_UDB_W32_PLD1_MC_2__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_PLD0_MC_3__OFFSET
CYFLD_UDB_W32_PLD0_MC_3__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_PLD0_MC_3__SIZE
CYFLD_UDB_W32_PLD0_MC_3__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_PLD1_MC_3__OFFSET
CYFLD_UDB_W32_PLD1_MC_3__OFFSET EQU 0x0000001c
ENDIF
IF :LNOT::DEF:CYFLD_UDB_W32_PLD1_MC_3__SIZE
CYFLD_UDB_W32_PLD1_MC_3__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYDEV_UDB_P0_BASE
CYDEV_UDB_P0_BASE EQU 0x400f3000
ENDIF
IF :LNOT::DEF:CYDEV_UDB_P0_SIZE
CYDEV_UDB_P0_SIZE EQU 0x00000200
ENDIF
IF :LNOT::DEF:CYDEV_UDB_P0_U0_BASE
CYDEV_UDB_P0_U0_BASE EQU 0x400f3000
ENDIF
IF :LNOT::DEF:CYDEV_UDB_P0_U0_SIZE
CYDEV_UDB_P0_U0_SIZE EQU 0x00000080
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_IT0
CYREG_UDB_P0_U0_PLD_IT0 EQU 0x400f3000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_0__OFFSET
CYFLD_UDB_P_U_PLD0_ITxC_0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_0__SIZE
CYFLD_UDB_P_U_PLD0_ITxC_0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_1__OFFSET
CYFLD_UDB_P_U_PLD0_ITxC_1__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_1__SIZE
CYFLD_UDB_P_U_PLD0_ITxC_1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_2__OFFSET
CYFLD_UDB_P_U_PLD0_ITxC_2__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_2__SIZE
CYFLD_UDB_P_U_PLD0_ITxC_2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_3__OFFSET
CYFLD_UDB_P_U_PLD0_ITxC_3__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_3__SIZE
CYFLD_UDB_P_U_PLD0_ITxC_3__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_4__OFFSET
CYFLD_UDB_P_U_PLD0_ITxC_4__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_4__SIZE
CYFLD_UDB_P_U_PLD0_ITxC_4__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_5__OFFSET
CYFLD_UDB_P_U_PLD0_ITxC_5__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_5__SIZE
CYFLD_UDB_P_U_PLD0_ITxC_5__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_6__OFFSET
CYFLD_UDB_P_U_PLD0_ITxC_6__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_6__SIZE
CYFLD_UDB_P_U_PLD0_ITxC_6__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_7__OFFSET
CYFLD_UDB_P_U_PLD0_ITxC_7__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_7__SIZE
CYFLD_UDB_P_U_PLD0_ITxC_7__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_0__OFFSET
CYFLD_UDB_P_U_PLD1_ITxC_0__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_0__SIZE
CYFLD_UDB_P_U_PLD1_ITxC_0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_1__OFFSET
CYFLD_UDB_P_U_PLD1_ITxC_1__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_1__SIZE
CYFLD_UDB_P_U_PLD1_ITxC_1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_2__OFFSET
CYFLD_UDB_P_U_PLD1_ITxC_2__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_2__SIZE
CYFLD_UDB_P_U_PLD1_ITxC_2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_3__OFFSET
CYFLD_UDB_P_U_PLD1_ITxC_3__OFFSET EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_3__SIZE
CYFLD_UDB_P_U_PLD1_ITxC_3__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_4__OFFSET
CYFLD_UDB_P_U_PLD1_ITxC_4__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_4__SIZE
CYFLD_UDB_P_U_PLD1_ITxC_4__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_5__OFFSET
CYFLD_UDB_P_U_PLD1_ITxC_5__OFFSET EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_5__SIZE
CYFLD_UDB_P_U_PLD1_ITxC_5__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_6__OFFSET
CYFLD_UDB_P_U_PLD1_ITxC_6__OFFSET EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_6__SIZE
CYFLD_UDB_P_U_PLD1_ITxC_6__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_7__OFFSET
CYFLD_UDB_P_U_PLD1_ITxC_7__OFFSET EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_7__SIZE
CYFLD_UDB_P_U_PLD1_ITxC_7__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_0__OFFSET
CYFLD_UDB_P_U_PLD0_ITxT_0__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_0__SIZE
CYFLD_UDB_P_U_PLD0_ITxT_0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_1__OFFSET
CYFLD_UDB_P_U_PLD0_ITxT_1__OFFSET EQU 0x00000011
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_1__SIZE
CYFLD_UDB_P_U_PLD0_ITxT_1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_2__OFFSET
CYFLD_UDB_P_U_PLD0_ITxT_2__OFFSET EQU 0x00000012
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_2__SIZE
CYFLD_UDB_P_U_PLD0_ITxT_2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_3__OFFSET
CYFLD_UDB_P_U_PLD0_ITxT_3__OFFSET EQU 0x00000013
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_3__SIZE
CYFLD_UDB_P_U_PLD0_ITxT_3__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_4__OFFSET
CYFLD_UDB_P_U_PLD0_ITxT_4__OFFSET EQU 0x00000014
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_4__SIZE
CYFLD_UDB_P_U_PLD0_ITxT_4__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_5__OFFSET
CYFLD_UDB_P_U_PLD0_ITxT_5__OFFSET EQU 0x00000015
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_5__SIZE
CYFLD_UDB_P_U_PLD0_ITxT_5__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_6__OFFSET
CYFLD_UDB_P_U_PLD0_ITxT_6__OFFSET EQU 0x00000016
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_6__SIZE
CYFLD_UDB_P_U_PLD0_ITxT_6__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_7__OFFSET
CYFLD_UDB_P_U_PLD0_ITxT_7__OFFSET EQU 0x00000017
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_7__SIZE
CYFLD_UDB_P_U_PLD0_ITxT_7__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_0__OFFSET
CYFLD_UDB_P_U_PLD1_ITxT_0__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_0__SIZE
CYFLD_UDB_P_U_PLD1_ITxT_0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_1__OFFSET
CYFLD_UDB_P_U_PLD1_ITxT_1__OFFSET EQU 0x00000019
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_1__SIZE
CYFLD_UDB_P_U_PLD1_ITxT_1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_2__OFFSET
CYFLD_UDB_P_U_PLD1_ITxT_2__OFFSET EQU 0x0000001a
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_2__SIZE
CYFLD_UDB_P_U_PLD1_ITxT_2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_3__OFFSET
CYFLD_UDB_P_U_PLD1_ITxT_3__OFFSET EQU 0x0000001b
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_3__SIZE
CYFLD_UDB_P_U_PLD1_ITxT_3__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_4__OFFSET
CYFLD_UDB_P_U_PLD1_ITxT_4__OFFSET EQU 0x0000001c
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_4__SIZE
CYFLD_UDB_P_U_PLD1_ITxT_4__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_5__OFFSET
CYFLD_UDB_P_U_PLD1_ITxT_5__OFFSET EQU 0x0000001d
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_5__SIZE
CYFLD_UDB_P_U_PLD1_ITxT_5__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_6__OFFSET
CYFLD_UDB_P_U_PLD1_ITxT_6__OFFSET EQU 0x0000001e
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_6__SIZE
CYFLD_UDB_P_U_PLD1_ITxT_6__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_7__OFFSET
CYFLD_UDB_P_U_PLD1_ITxT_7__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_7__SIZE
CYFLD_UDB_P_U_PLD1_ITxT_7__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_IT1
CYREG_UDB_P0_U0_PLD_IT1 EQU 0x400f3004
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_IT2
CYREG_UDB_P0_U0_PLD_IT2 EQU 0x400f3008
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_IT3
CYREG_UDB_P0_U0_PLD_IT3 EQU 0x400f300c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_IT4
CYREG_UDB_P0_U0_PLD_IT4 EQU 0x400f3010
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_IT5
CYREG_UDB_P0_U0_PLD_IT5 EQU 0x400f3014
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_IT6
CYREG_UDB_P0_U0_PLD_IT6 EQU 0x400f3018
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_IT7
CYREG_UDB_P0_U0_PLD_IT7 EQU 0x400f301c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_IT8
CYREG_UDB_P0_U0_PLD_IT8 EQU 0x400f3020
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_IT9
CYREG_UDB_P0_U0_PLD_IT9 EQU 0x400f3024
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_IT10
CYREG_UDB_P0_U0_PLD_IT10 EQU 0x400f3028
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_IT11
CYREG_UDB_P0_U0_PLD_IT11 EQU 0x400f302c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_ORT0
CYREG_UDB_P0_U0_PLD_ORT0 EQU 0x400f3030
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_0__OFFSET
CYFLD_UDB_P_U_PLD0_ORT_PTx_0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_0__SIZE
CYFLD_UDB_P_U_PLD0_ORT_PTx_0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_1__OFFSET
CYFLD_UDB_P_U_PLD0_ORT_PTx_1__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_1__SIZE
CYFLD_UDB_P_U_PLD0_ORT_PTx_1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_2__OFFSET
CYFLD_UDB_P_U_PLD0_ORT_PTx_2__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_2__SIZE
CYFLD_UDB_P_U_PLD0_ORT_PTx_2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_3__OFFSET
CYFLD_UDB_P_U_PLD0_ORT_PTx_3__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_3__SIZE
CYFLD_UDB_P_U_PLD0_ORT_PTx_3__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_4__OFFSET
CYFLD_UDB_P_U_PLD0_ORT_PTx_4__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_4__SIZE
CYFLD_UDB_P_U_PLD0_ORT_PTx_4__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_5__OFFSET
CYFLD_UDB_P_U_PLD0_ORT_PTx_5__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_5__SIZE
CYFLD_UDB_P_U_PLD0_ORT_PTx_5__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_6__OFFSET
CYFLD_UDB_P_U_PLD0_ORT_PTx_6__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_6__SIZE
CYFLD_UDB_P_U_PLD0_ORT_PTx_6__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_7__OFFSET
CYFLD_UDB_P_U_PLD0_ORT_PTx_7__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_7__SIZE
CYFLD_UDB_P_U_PLD0_ORT_PTx_7__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_0__OFFSET
CYFLD_UDB_P_U_PLD1_ORT_PTx_0__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_0__SIZE
CYFLD_UDB_P_U_PLD1_ORT_PTx_0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_1__OFFSET
CYFLD_UDB_P_U_PLD1_ORT_PTx_1__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_1__SIZE
CYFLD_UDB_P_U_PLD1_ORT_PTx_1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_2__OFFSET
CYFLD_UDB_P_U_PLD1_ORT_PTx_2__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_2__SIZE
CYFLD_UDB_P_U_PLD1_ORT_PTx_2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_3__OFFSET
CYFLD_UDB_P_U_PLD1_ORT_PTx_3__OFFSET EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_3__SIZE
CYFLD_UDB_P_U_PLD1_ORT_PTx_3__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_4__OFFSET
CYFLD_UDB_P_U_PLD1_ORT_PTx_4__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_4__SIZE
CYFLD_UDB_P_U_PLD1_ORT_PTx_4__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_5__OFFSET
CYFLD_UDB_P_U_PLD1_ORT_PTx_5__OFFSET EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_5__SIZE
CYFLD_UDB_P_U_PLD1_ORT_PTx_5__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_6__OFFSET
CYFLD_UDB_P_U_PLD1_ORT_PTx_6__OFFSET EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_6__SIZE
CYFLD_UDB_P_U_PLD1_ORT_PTx_6__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_7__OFFSET
CYFLD_UDB_P_U_PLD1_ORT_PTx_7__OFFSET EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_7__SIZE
CYFLD_UDB_P_U_PLD1_ORT_PTx_7__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_ORT1
CYREG_UDB_P0_U0_PLD_ORT1 EQU 0x400f3032
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_ORT2
CYREG_UDB_P0_U0_PLD_ORT2 EQU 0x400f3034
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_ORT3
CYREG_UDB_P0_U0_PLD_ORT3 EQU 0x400f3036
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_MC_CFG_CEN_CONST
CYREG_UDB_P0_U0_PLD_MC_CFG_CEN_CONST EQU 0x400f3038
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC0_CEN__OFFSET
CYFLD_UDB_P_U_PLD0_MC0_CEN__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC0_CEN__SIZE
CYFLD_UDB_P_U_PLD0_MC0_CEN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_CEN_DISABLE
CYVAL_UDB_P_U_PLD0_MC0_CEN_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_CEN_ENABLE
CYVAL_UDB_P_U_PLD0_MC0_CEN_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC0_DFF_C__OFFSET
CYFLD_UDB_P_U_PLD0_MC0_DFF_C__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC0_DFF_C__SIZE
CYFLD_UDB_P_U_PLD0_MC0_DFF_C__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_DFF_C_NOINV
CYVAL_UDB_P_U_PLD0_MC0_DFF_C_NOINV EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_DFF_C_INVERTED
CYVAL_UDB_P_U_PLD0_MC0_DFF_C_INVERTED EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC1_CEN__OFFSET
CYFLD_UDB_P_U_PLD0_MC1_CEN__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC1_CEN__SIZE
CYFLD_UDB_P_U_PLD0_MC1_CEN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_CEN_DISABLE
CYVAL_UDB_P_U_PLD0_MC1_CEN_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_CEN_ENABLE
CYVAL_UDB_P_U_PLD0_MC1_CEN_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC1_DFF_C__OFFSET
CYFLD_UDB_P_U_PLD0_MC1_DFF_C__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC1_DFF_C__SIZE
CYFLD_UDB_P_U_PLD0_MC1_DFF_C__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_DFF_C_NOINV
CYVAL_UDB_P_U_PLD0_MC1_DFF_C_NOINV EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_DFF_C_INVERTED
CYVAL_UDB_P_U_PLD0_MC1_DFF_C_INVERTED EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC2_CEN__OFFSET
CYFLD_UDB_P_U_PLD0_MC2_CEN__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC2_CEN__SIZE
CYFLD_UDB_P_U_PLD0_MC2_CEN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_CEN_DISABLE
CYVAL_UDB_P_U_PLD0_MC2_CEN_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_CEN_ENABLE
CYVAL_UDB_P_U_PLD0_MC2_CEN_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC2_DFF_C__OFFSET
CYFLD_UDB_P_U_PLD0_MC2_DFF_C__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC2_DFF_C__SIZE
CYFLD_UDB_P_U_PLD0_MC2_DFF_C__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_DFF_C_NOINV
CYVAL_UDB_P_U_PLD0_MC2_DFF_C_NOINV EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_DFF_C_INVERTED
CYVAL_UDB_P_U_PLD0_MC2_DFF_C_INVERTED EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC3_CEN__OFFSET
CYFLD_UDB_P_U_PLD0_MC3_CEN__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC3_CEN__SIZE
CYFLD_UDB_P_U_PLD0_MC3_CEN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_CEN_DISABLE
CYVAL_UDB_P_U_PLD0_MC3_CEN_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_CEN_ENABLE
CYVAL_UDB_P_U_PLD0_MC3_CEN_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC3_DFF_C__OFFSET
CYFLD_UDB_P_U_PLD0_MC3_DFF_C__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC3_DFF_C__SIZE
CYFLD_UDB_P_U_PLD0_MC3_DFF_C__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_DFF_C_NOINV
CYVAL_UDB_P_U_PLD0_MC3_DFF_C_NOINV EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_DFF_C_INVERTED
CYVAL_UDB_P_U_PLD0_MC3_DFF_C_INVERTED EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC0_CEN__OFFSET
CYFLD_UDB_P_U_PLD1_MC0_CEN__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC0_CEN__SIZE
CYFLD_UDB_P_U_PLD1_MC0_CEN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_CEN_DISABLE
CYVAL_UDB_P_U_PLD1_MC0_CEN_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_CEN_ENABLE
CYVAL_UDB_P_U_PLD1_MC0_CEN_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC0_DFF_C__OFFSET
CYFLD_UDB_P_U_PLD1_MC0_DFF_C__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC0_DFF_C__SIZE
CYFLD_UDB_P_U_PLD1_MC0_DFF_C__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_DFF_C_NOINV
CYVAL_UDB_P_U_PLD1_MC0_DFF_C_NOINV EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_DFF_C_INVERTED
CYVAL_UDB_P_U_PLD1_MC0_DFF_C_INVERTED EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC1_CEN__OFFSET
CYFLD_UDB_P_U_PLD1_MC1_CEN__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC1_CEN__SIZE
CYFLD_UDB_P_U_PLD1_MC1_CEN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_CEN_DISABLE
CYVAL_UDB_P_U_PLD1_MC1_CEN_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_CEN_ENABLE
CYVAL_UDB_P_U_PLD1_MC1_CEN_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC1_DFF_C__OFFSET
CYFLD_UDB_P_U_PLD1_MC1_DFF_C__OFFSET EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC1_DFF_C__SIZE
CYFLD_UDB_P_U_PLD1_MC1_DFF_C__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_DFF_C_NOINV
CYVAL_UDB_P_U_PLD1_MC1_DFF_C_NOINV EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_DFF_C_INVERTED
CYVAL_UDB_P_U_PLD1_MC1_DFF_C_INVERTED EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC2_CEN__OFFSET
CYFLD_UDB_P_U_PLD1_MC2_CEN__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC2_CEN__SIZE
CYFLD_UDB_P_U_PLD1_MC2_CEN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_CEN_DISABLE
CYVAL_UDB_P_U_PLD1_MC2_CEN_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_CEN_ENABLE
CYVAL_UDB_P_U_PLD1_MC2_CEN_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC2_DFF_C__OFFSET
CYFLD_UDB_P_U_PLD1_MC2_DFF_C__OFFSET EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC2_DFF_C__SIZE
CYFLD_UDB_P_U_PLD1_MC2_DFF_C__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_DFF_C_NOINV
CYVAL_UDB_P_U_PLD1_MC2_DFF_C_NOINV EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_DFF_C_INVERTED
CYVAL_UDB_P_U_PLD1_MC2_DFF_C_INVERTED EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC3_CEN__OFFSET
CYFLD_UDB_P_U_PLD1_MC3_CEN__OFFSET EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC3_CEN__SIZE
CYFLD_UDB_P_U_PLD1_MC3_CEN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_CEN_DISABLE
CYVAL_UDB_P_U_PLD1_MC3_CEN_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_CEN_ENABLE
CYVAL_UDB_P_U_PLD1_MC3_CEN_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC3_DFF_C__OFFSET
CYFLD_UDB_P_U_PLD1_MC3_DFF_C__OFFSET EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC3_DFF_C__SIZE
CYFLD_UDB_P_U_PLD1_MC3_DFF_C__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_DFF_C_NOINV
CYVAL_UDB_P_U_PLD1_MC3_DFF_C_NOINV EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_DFF_C_INVERTED
CYVAL_UDB_P_U_PLD1_MC3_DFF_C_INVERTED EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_MC_CFG_XORFB
CYREG_UDB_P0_U0_PLD_MC_CFG_XORFB EQU 0x400f303a
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC0_XORFB__OFFSET
CYFLD_UDB_P_U_PLD0_MC0_XORFB__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC0_XORFB__SIZE
CYFLD_UDB_P_U_PLD0_MC0_XORFB__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_XORFB_DFF
CYVAL_UDB_P_U_PLD0_MC0_XORFB_DFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_XORFB_CARRY
CYVAL_UDB_P_U_PLD0_MC0_XORFB_CARRY EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_XORFB_TFF_H
CYVAL_UDB_P_U_PLD0_MC0_XORFB_TFF_H EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_XORFB_TFF_L
CYVAL_UDB_P_U_PLD0_MC0_XORFB_TFF_L EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC1_XORFB__OFFSET
CYFLD_UDB_P_U_PLD0_MC1_XORFB__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC1_XORFB__SIZE
CYFLD_UDB_P_U_PLD0_MC1_XORFB__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_XORFB_DFF
CYVAL_UDB_P_U_PLD0_MC1_XORFB_DFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_XORFB_CARRY
CYVAL_UDB_P_U_PLD0_MC1_XORFB_CARRY EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_XORFB_TFF_H
CYVAL_UDB_P_U_PLD0_MC1_XORFB_TFF_H EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_XORFB_TFF_L
CYVAL_UDB_P_U_PLD0_MC1_XORFB_TFF_L EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC2_XORFB__OFFSET
CYFLD_UDB_P_U_PLD0_MC2_XORFB__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC2_XORFB__SIZE
CYFLD_UDB_P_U_PLD0_MC2_XORFB__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_XORFB_DFF
CYVAL_UDB_P_U_PLD0_MC2_XORFB_DFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_XORFB_CARRY
CYVAL_UDB_P_U_PLD0_MC2_XORFB_CARRY EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_XORFB_TFF_H
CYVAL_UDB_P_U_PLD0_MC2_XORFB_TFF_H EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_XORFB_TFF_L
CYVAL_UDB_P_U_PLD0_MC2_XORFB_TFF_L EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC3_XORFB__OFFSET
CYFLD_UDB_P_U_PLD0_MC3_XORFB__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC3_XORFB__SIZE
CYFLD_UDB_P_U_PLD0_MC3_XORFB__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_XORFB_DFF
CYVAL_UDB_P_U_PLD0_MC3_XORFB_DFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_XORFB_CARRY
CYVAL_UDB_P_U_PLD0_MC3_XORFB_CARRY EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_XORFB_TFF_H
CYVAL_UDB_P_U_PLD0_MC3_XORFB_TFF_H EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_XORFB_TFF_L
CYVAL_UDB_P_U_PLD0_MC3_XORFB_TFF_L EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC0_XORFB__OFFSET
CYFLD_UDB_P_U_PLD1_MC0_XORFB__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC0_XORFB__SIZE
CYFLD_UDB_P_U_PLD1_MC0_XORFB__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_XORFB_DFF
CYVAL_UDB_P_U_PLD1_MC0_XORFB_DFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_XORFB_CARRY
CYVAL_UDB_P_U_PLD1_MC0_XORFB_CARRY EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_XORFB_TFF_H
CYVAL_UDB_P_U_PLD1_MC0_XORFB_TFF_H EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_XORFB_TFF_L
CYVAL_UDB_P_U_PLD1_MC0_XORFB_TFF_L EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC1_XORFB__OFFSET
CYFLD_UDB_P_U_PLD1_MC1_XORFB__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC1_XORFB__SIZE
CYFLD_UDB_P_U_PLD1_MC1_XORFB__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_XORFB_DFF
CYVAL_UDB_P_U_PLD1_MC1_XORFB_DFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_XORFB_CARRY
CYVAL_UDB_P_U_PLD1_MC1_XORFB_CARRY EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_XORFB_TFF_H
CYVAL_UDB_P_U_PLD1_MC1_XORFB_TFF_H EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_XORFB_TFF_L
CYVAL_UDB_P_U_PLD1_MC1_XORFB_TFF_L EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC2_XORFB__OFFSET
CYFLD_UDB_P_U_PLD1_MC2_XORFB__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC2_XORFB__SIZE
CYFLD_UDB_P_U_PLD1_MC2_XORFB__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_XORFB_DFF
CYVAL_UDB_P_U_PLD1_MC2_XORFB_DFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_XORFB_CARRY
CYVAL_UDB_P_U_PLD1_MC2_XORFB_CARRY EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_XORFB_TFF_H
CYVAL_UDB_P_U_PLD1_MC2_XORFB_TFF_H EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_XORFB_TFF_L
CYVAL_UDB_P_U_PLD1_MC2_XORFB_TFF_L EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC3_XORFB__OFFSET
CYFLD_UDB_P_U_PLD1_MC3_XORFB__OFFSET EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC3_XORFB__SIZE
CYFLD_UDB_P_U_PLD1_MC3_XORFB__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_XORFB_DFF
CYVAL_UDB_P_U_PLD1_MC3_XORFB_DFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_XORFB_CARRY
CYVAL_UDB_P_U_PLD1_MC3_XORFB_CARRY EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_XORFB_TFF_H
CYVAL_UDB_P_U_PLD1_MC3_XORFB_TFF_H EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_XORFB_TFF_L
CYVAL_UDB_P_U_PLD1_MC3_XORFB_TFF_L EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_MC_SET_RESET
CYREG_UDB_P0_U0_PLD_MC_SET_RESET EQU 0x400f303c
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC0_SET_SEL__OFFSET
CYFLD_UDB_P_U_PLD0_MC0_SET_SEL__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC0_SET_SEL__SIZE
CYFLD_UDB_P_U_PLD0_MC0_SET_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_SET_SEL_DISABLE
CYVAL_UDB_P_U_PLD0_MC0_SET_SEL_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_SET_SEL_ENABLE
CYVAL_UDB_P_U_PLD0_MC0_SET_SEL_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC0_RESET_SEL__OFFSET
CYFLD_UDB_P_U_PLD0_MC0_RESET_SEL__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC0_RESET_SEL__SIZE
CYFLD_UDB_P_U_PLD0_MC0_RESET_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_RESET_SEL_DISABLE
CYVAL_UDB_P_U_PLD0_MC0_RESET_SEL_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_RESET_SEL_ENABLE
CYVAL_UDB_P_U_PLD0_MC0_RESET_SEL_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC1_SET_SEL__OFFSET
CYFLD_UDB_P_U_PLD0_MC1_SET_SEL__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC1_SET_SEL__SIZE
CYFLD_UDB_P_U_PLD0_MC1_SET_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_SET_SEL_DISABLE
CYVAL_UDB_P_U_PLD0_MC1_SET_SEL_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_SET_SEL_ENABLE
CYVAL_UDB_P_U_PLD0_MC1_SET_SEL_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC1_RESET_SEL__OFFSET
CYFLD_UDB_P_U_PLD0_MC1_RESET_SEL__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC1_RESET_SEL__SIZE
CYFLD_UDB_P_U_PLD0_MC1_RESET_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_RESET_SEL_DISABLE
CYVAL_UDB_P_U_PLD0_MC1_RESET_SEL_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_RESET_SEL_ENABLE
CYVAL_UDB_P_U_PLD0_MC1_RESET_SEL_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC2_SET_SEL__OFFSET
CYFLD_UDB_P_U_PLD0_MC2_SET_SEL__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC2_SET_SEL__SIZE
CYFLD_UDB_P_U_PLD0_MC2_SET_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_SET_SEL_DISABLE
CYVAL_UDB_P_U_PLD0_MC2_SET_SEL_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_SET_SEL_ENABLE
CYVAL_UDB_P_U_PLD0_MC2_SET_SEL_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC2_RESET_SEL__OFFSET
CYFLD_UDB_P_U_PLD0_MC2_RESET_SEL__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC2_RESET_SEL__SIZE
CYFLD_UDB_P_U_PLD0_MC2_RESET_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_RESET_SEL_DISABLE
CYVAL_UDB_P_U_PLD0_MC2_RESET_SEL_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_RESET_SEL_ENABLE
CYVAL_UDB_P_U_PLD0_MC2_RESET_SEL_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC3_SET_SEL__OFFSET
CYFLD_UDB_P_U_PLD0_MC3_SET_SEL__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC3_SET_SEL__SIZE
CYFLD_UDB_P_U_PLD0_MC3_SET_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_SET_SEL_DISABLE
CYVAL_UDB_P_U_PLD0_MC3_SET_SEL_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_SET_SEL_ENABLE
CYVAL_UDB_P_U_PLD0_MC3_SET_SEL_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC3_RESET_SEL__OFFSET
CYFLD_UDB_P_U_PLD0_MC3_RESET_SEL__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC3_RESET_SEL__SIZE
CYFLD_UDB_P_U_PLD0_MC3_RESET_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_RESET_SEL_DISABLE
CYVAL_UDB_P_U_PLD0_MC3_RESET_SEL_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_RESET_SEL_ENABLE
CYVAL_UDB_P_U_PLD0_MC3_RESET_SEL_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC0_SET_SEL__OFFSET
CYFLD_UDB_P_U_PLD1_MC0_SET_SEL__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC0_SET_SEL__SIZE
CYFLD_UDB_P_U_PLD1_MC0_SET_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_SET_SEL_DISABLE
CYVAL_UDB_P_U_PLD1_MC0_SET_SEL_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_SET_SEL_ENABLE
CYVAL_UDB_P_U_PLD1_MC0_SET_SEL_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC0_RESET_SEL__OFFSET
CYFLD_UDB_P_U_PLD1_MC0_RESET_SEL__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC0_RESET_SEL__SIZE
CYFLD_UDB_P_U_PLD1_MC0_RESET_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_RESET_SEL_DISABLE
CYVAL_UDB_P_U_PLD1_MC0_RESET_SEL_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_RESET_SEL_ENABLE
CYVAL_UDB_P_U_PLD1_MC0_RESET_SEL_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC1_SET_SEL__OFFSET
CYFLD_UDB_P_U_PLD1_MC1_SET_SEL__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC1_SET_SEL__SIZE
CYFLD_UDB_P_U_PLD1_MC1_SET_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_SET_SEL_DISABLE
CYVAL_UDB_P_U_PLD1_MC1_SET_SEL_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_SET_SEL_ENABLE
CYVAL_UDB_P_U_PLD1_MC1_SET_SEL_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC1_RESET_SEL__OFFSET
CYFLD_UDB_P_U_PLD1_MC1_RESET_SEL__OFFSET EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC1_RESET_SEL__SIZE
CYFLD_UDB_P_U_PLD1_MC1_RESET_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_RESET_SEL_DISABLE
CYVAL_UDB_P_U_PLD1_MC1_RESET_SEL_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_RESET_SEL_ENABLE
CYVAL_UDB_P_U_PLD1_MC1_RESET_SEL_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC2_SET_SEL__OFFSET
CYFLD_UDB_P_U_PLD1_MC2_SET_SEL__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC2_SET_SEL__SIZE
CYFLD_UDB_P_U_PLD1_MC2_SET_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_SET_SEL_DISABLE
CYVAL_UDB_P_U_PLD1_MC2_SET_SEL_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_SET_SEL_ENABLE
CYVAL_UDB_P_U_PLD1_MC2_SET_SEL_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC2_RESET_SEL__OFFSET
CYFLD_UDB_P_U_PLD1_MC2_RESET_SEL__OFFSET EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC2_RESET_SEL__SIZE
CYFLD_UDB_P_U_PLD1_MC2_RESET_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_RESET_SEL_DISABLE
CYVAL_UDB_P_U_PLD1_MC2_RESET_SEL_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_RESET_SEL_ENABLE
CYVAL_UDB_P_U_PLD1_MC2_RESET_SEL_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC3_SET_SEL__OFFSET
CYFLD_UDB_P_U_PLD1_MC3_SET_SEL__OFFSET EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC3_SET_SEL__SIZE
CYFLD_UDB_P_U_PLD1_MC3_SET_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_SET_SEL_DISABLE
CYVAL_UDB_P_U_PLD1_MC3_SET_SEL_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_SET_SEL_ENABLE
CYVAL_UDB_P_U_PLD1_MC3_SET_SEL_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC3_RESET_SEL__OFFSET
CYFLD_UDB_P_U_PLD1_MC3_RESET_SEL__OFFSET EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC3_RESET_SEL__SIZE
CYFLD_UDB_P_U_PLD1_MC3_RESET_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_RESET_SEL_DISABLE
CYVAL_UDB_P_U_PLD1_MC3_RESET_SEL_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_RESET_SEL_ENABLE
CYVAL_UDB_P_U_PLD1_MC3_RESET_SEL_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_MC_CFG_BYPASS
CYREG_UDB_P0_U0_PLD_MC_CFG_BYPASS EQU 0x400f303e
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC0_BYPASS__OFFSET
CYFLD_UDB_P_U_PLD0_MC0_BYPASS__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC0_BYPASS__SIZE
CYFLD_UDB_P_U_PLD0_MC0_BYPASS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_BYPASS_REGISTER
CYVAL_UDB_P_U_PLD0_MC0_BYPASS_REGISTER EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_BYPASS_COMBINATIONAL
CYVAL_UDB_P_U_PLD0_MC0_BYPASS_COMBINATIONAL EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_NC1__OFFSET
CYFLD_UDB_P_U_NC1__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_NC1__SIZE
CYFLD_UDB_P_U_NC1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC1_BYPASS__OFFSET
CYFLD_UDB_P_U_PLD0_MC1_BYPASS__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC1_BYPASS__SIZE
CYFLD_UDB_P_U_PLD0_MC1_BYPASS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_BYPASS_REGISTER
CYVAL_UDB_P_U_PLD0_MC1_BYPASS_REGISTER EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_BYPASS_COMBINATIONAL
CYVAL_UDB_P_U_PLD0_MC1_BYPASS_COMBINATIONAL EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_NC3__OFFSET
CYFLD_UDB_P_U_NC3__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_NC3__SIZE
CYFLD_UDB_P_U_NC3__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC2_BYPASS__OFFSET
CYFLD_UDB_P_U_PLD0_MC2_BYPASS__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC2_BYPASS__SIZE
CYFLD_UDB_P_U_PLD0_MC2_BYPASS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_BYPASS_REGISTER
CYVAL_UDB_P_U_PLD0_MC2_BYPASS_REGISTER EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_BYPASS_COMBINATIONAL
CYVAL_UDB_P_U_PLD0_MC2_BYPASS_COMBINATIONAL EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_NC5__OFFSET
CYFLD_UDB_P_U_NC5__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_NC5__SIZE
CYFLD_UDB_P_U_NC5__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC3_BYPASS__OFFSET
CYFLD_UDB_P_U_PLD0_MC3_BYPASS__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC3_BYPASS__SIZE
CYFLD_UDB_P_U_PLD0_MC3_BYPASS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_BYPASS_REGISTER
CYVAL_UDB_P_U_PLD0_MC3_BYPASS_REGISTER EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_BYPASS_COMBINATIONAL
CYVAL_UDB_P_U_PLD0_MC3_BYPASS_COMBINATIONAL EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_NC7__OFFSET
CYFLD_UDB_P_U_NC7__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_NC7__SIZE
CYFLD_UDB_P_U_NC7__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC0_BYPASS__OFFSET
CYFLD_UDB_P_U_PLD1_MC0_BYPASS__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC0_BYPASS__SIZE
CYFLD_UDB_P_U_PLD1_MC0_BYPASS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_BYPASS_REGISTER
CYVAL_UDB_P_U_PLD1_MC0_BYPASS_REGISTER EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_BYPASS_COMBINATIONAL
CYVAL_UDB_P_U_PLD1_MC0_BYPASS_COMBINATIONAL EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_NC9__OFFSET
CYFLD_UDB_P_U_NC9__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_NC9__SIZE
CYFLD_UDB_P_U_NC9__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC1_BYPASS__OFFSET
CYFLD_UDB_P_U_PLD1_MC1_BYPASS__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC1_BYPASS__SIZE
CYFLD_UDB_P_U_PLD1_MC1_BYPASS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_BYPASS_REGISTER
CYVAL_UDB_P_U_PLD1_MC1_BYPASS_REGISTER EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_BYPASS_COMBINATIONAL
CYVAL_UDB_P_U_PLD1_MC1_BYPASS_COMBINATIONAL EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_NC11__OFFSET
CYFLD_UDB_P_U_NC11__OFFSET EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_NC11__SIZE
CYFLD_UDB_P_U_NC11__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC2_BYPASS__OFFSET
CYFLD_UDB_P_U_PLD1_MC2_BYPASS__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC2_BYPASS__SIZE
CYFLD_UDB_P_U_PLD1_MC2_BYPASS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_BYPASS_REGISTER
CYVAL_UDB_P_U_PLD1_MC2_BYPASS_REGISTER EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_BYPASS_COMBINATIONAL
CYVAL_UDB_P_U_PLD1_MC2_BYPASS_COMBINATIONAL EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_NC13__OFFSET
CYFLD_UDB_P_U_NC13__OFFSET EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_NC13__SIZE
CYFLD_UDB_P_U_NC13__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC3_BYPASS__OFFSET
CYFLD_UDB_P_U_PLD1_MC3_BYPASS__OFFSET EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC3_BYPASS__SIZE
CYFLD_UDB_P_U_PLD1_MC3_BYPASS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_BYPASS_REGISTER
CYVAL_UDB_P_U_PLD1_MC3_BYPASS_REGISTER EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_BYPASS_COMBINATIONAL
CYVAL_UDB_P_U_PLD1_MC3_BYPASS_COMBINATIONAL EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_NC15__OFFSET
CYFLD_UDB_P_U_NC15__OFFSET EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_NC15__SIZE
CYFLD_UDB_P_U_NC15__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG0
CYREG_UDB_P0_U0_CFG0 EQU 0x400f3040
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_RAD0__OFFSET
CYFLD_UDB_P_U_RAD0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_RAD0__SIZE
CYFLD_UDB_P_U_RAD0__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RAD0_OFF
CYVAL_UDB_P_U_RAD0_OFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RAD0_DP_IN0
CYVAL_UDB_P_U_RAD0_DP_IN0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RAD0_DP_IN1
CYVAL_UDB_P_U_RAD0_DP_IN1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RAD0_DP_IN2
CYVAL_UDB_P_U_RAD0_DP_IN2 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RAD0_DP_IN3
CYVAL_UDB_P_U_RAD0_DP_IN3 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RAD0_DP_IN4
CYVAL_UDB_P_U_RAD0_DP_IN4 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RAD0_DP_IN5
CYVAL_UDB_P_U_RAD0_DP_IN5 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RAD0_RESERVED
CYVAL_UDB_P_U_RAD0_RESERVED EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_RAD1__OFFSET
CYFLD_UDB_P_U_RAD1__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_RAD1__SIZE
CYFLD_UDB_P_U_RAD1__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RAD1_OFF
CYVAL_UDB_P_U_RAD1_OFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RAD1_DP_IN0
CYVAL_UDB_P_U_RAD1_DP_IN0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RAD1_DP_IN1
CYVAL_UDB_P_U_RAD1_DP_IN1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RAD1_DP_IN2
CYVAL_UDB_P_U_RAD1_DP_IN2 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RAD1_DP_IN3
CYVAL_UDB_P_U_RAD1_DP_IN3 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RAD1_DP_IN4
CYVAL_UDB_P_U_RAD1_DP_IN4 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RAD1_DP_IN5
CYVAL_UDB_P_U_RAD1_DP_IN5 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RAD1_RESERVED
CYVAL_UDB_P_U_RAD1_RESERVED EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG1
CYREG_UDB_P0_U0_CFG1 EQU 0x400f3041
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_RAD2__OFFSET
CYFLD_UDB_P_U_RAD2__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_RAD2__SIZE
CYFLD_UDB_P_U_RAD2__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RAD2_OFF
CYVAL_UDB_P_U_RAD2_OFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RAD2_DP_IN0
CYVAL_UDB_P_U_RAD2_DP_IN0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RAD2_DP_IN1
CYVAL_UDB_P_U_RAD2_DP_IN1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RAD2_DP_IN2
CYVAL_UDB_P_U_RAD2_DP_IN2 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RAD2_DP_IN3
CYVAL_UDB_P_U_RAD2_DP_IN3 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RAD2_DP_IN4
CYVAL_UDB_P_U_RAD2_DP_IN4 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RAD2_DP_IN5
CYVAL_UDB_P_U_RAD2_DP_IN5 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RAD2_RESERVED
CYVAL_UDB_P_U_RAD2_RESERVED EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RTE_BYPASS0__OFFSET
CYFLD_UDB_P_U_DP_RTE_BYPASS0__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RTE_BYPASS0__SIZE
CYFLD_UDB_P_U_DP_RTE_BYPASS0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RTE_BYPASS0_DP_IN0_ROUTE
CYVAL_UDB_P_U_DP_RTE_BYPASS0_DP_IN0_ROUTE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RTE_BYPASS0_DP_IN0_BYPASS
CYVAL_UDB_P_U_DP_RTE_BYPASS0_DP_IN0_BYPASS EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RTE_BYPASS1__OFFSET
CYFLD_UDB_P_U_DP_RTE_BYPASS1__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RTE_BYPASS1__SIZE
CYFLD_UDB_P_U_DP_RTE_BYPASS1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RTE_BYPASS1_DP_IN1_ROUTE
CYVAL_UDB_P_U_DP_RTE_BYPASS1_DP_IN1_ROUTE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RTE_BYPASS1_DP_IN1_BYPASS
CYVAL_UDB_P_U_DP_RTE_BYPASS1_DP_IN1_BYPASS EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RTE_BYPASS2__OFFSET
CYFLD_UDB_P_U_DP_RTE_BYPASS2__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RTE_BYPASS2__SIZE
CYFLD_UDB_P_U_DP_RTE_BYPASS2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RTE_BYPASS2_DP_IN2_ROUTE
CYVAL_UDB_P_U_DP_RTE_BYPASS2_DP_IN2_ROUTE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RTE_BYPASS2_DP_IN2_BYPASS
CYVAL_UDB_P_U_DP_RTE_BYPASS2_DP_IN2_BYPASS EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RTE_BYPASS3__OFFSET
CYFLD_UDB_P_U_DP_RTE_BYPASS3__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RTE_BYPASS3__SIZE
CYFLD_UDB_P_U_DP_RTE_BYPASS3__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RTE_BYPASS3_DP_IN3_ROUTE
CYVAL_UDB_P_U_DP_RTE_BYPASS3_DP_IN3_ROUTE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RTE_BYPASS3_DP_IN3_BYPASS
CYVAL_UDB_P_U_DP_RTE_BYPASS3_DP_IN3_BYPASS EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RTE_BYPASS4__OFFSET
CYFLD_UDB_P_U_DP_RTE_BYPASS4__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RTE_BYPASS4__SIZE
CYFLD_UDB_P_U_DP_RTE_BYPASS4__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RTE_BYPASS4_DP_IN4_ROUTE
CYVAL_UDB_P_U_DP_RTE_BYPASS4_DP_IN4_ROUTE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RTE_BYPASS4_DP_IN4_BYPASS
CYVAL_UDB_P_U_DP_RTE_BYPASS4_DP_IN4_BYPASS EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG2
CYREG_UDB_P0_U0_CFG2 EQU 0x400f3042
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_F0_LD__OFFSET
CYFLD_UDB_P_U_F0_LD__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_F0_LD__SIZE
CYFLD_UDB_P_U_F0_LD__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F0_LD_OFF
CYVAL_UDB_P_U_F0_LD_OFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F0_LD_DP_IN0
CYVAL_UDB_P_U_F0_LD_DP_IN0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F0_LD_DP_IN1
CYVAL_UDB_P_U_F0_LD_DP_IN1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F0_LD_DP_IN2
CYVAL_UDB_P_U_F0_LD_DP_IN2 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F0_LD_DP_IN3
CYVAL_UDB_P_U_F0_LD_DP_IN3 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F0_LD_DP_IN4
CYVAL_UDB_P_U_F0_LD_DP_IN4 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F0_LD_DP_IN5
CYVAL_UDB_P_U_F0_LD_DP_IN5 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F0_LD_RESERVED
CYVAL_UDB_P_U_F0_LD_RESERVED EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RTE_BYPASS5__OFFSET
CYFLD_UDB_P_U_DP_RTE_BYPASS5__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RTE_BYPASS5__SIZE
CYFLD_UDB_P_U_DP_RTE_BYPASS5__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RTE_BYPASS5_DP_IN5_ROUTE
CYVAL_UDB_P_U_DP_RTE_BYPASS5_DP_IN5_ROUTE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RTE_BYPASS5_DP_IN5_BYPASS
CYVAL_UDB_P_U_DP_RTE_BYPASS5_DP_IN5_BYPASS EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_F1_LD__OFFSET
CYFLD_UDB_P_U_F1_LD__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_F1_LD__SIZE
CYFLD_UDB_P_U_F1_LD__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F1_LD_OFF
CYVAL_UDB_P_U_F1_LD_OFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F1_LD_DP_IN0
CYVAL_UDB_P_U_F1_LD_DP_IN0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F1_LD_DP_IN1
CYVAL_UDB_P_U_F1_LD_DP_IN1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F1_LD_DP_IN2
CYVAL_UDB_P_U_F1_LD_DP_IN2 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F1_LD_DP_IN3
CYVAL_UDB_P_U_F1_LD_DP_IN3 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F1_LD_DP_IN4
CYVAL_UDB_P_U_F1_LD_DP_IN4 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F1_LD_DP_IN5
CYVAL_UDB_P_U_F1_LD_DP_IN5 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F1_LD_RESERVED
CYVAL_UDB_P_U_F1_LD_RESERVED EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG3
CYREG_UDB_P0_U0_CFG3 EQU 0x400f3043
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_D0_LD__OFFSET
CYFLD_UDB_P_U_D0_LD__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_D0_LD__SIZE
CYFLD_UDB_P_U_D0_LD__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_D0_LD_OFF
CYVAL_UDB_P_U_D0_LD_OFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_D0_LD_DP_IN0
CYVAL_UDB_P_U_D0_LD_DP_IN0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_D0_LD_DP_IN1
CYVAL_UDB_P_U_D0_LD_DP_IN1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_D0_LD_DP_IN2
CYVAL_UDB_P_U_D0_LD_DP_IN2 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_D0_LD_DP_IN3
CYVAL_UDB_P_U_D0_LD_DP_IN3 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_D0_LD_DP_IN4
CYVAL_UDB_P_U_D0_LD_DP_IN4 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_D0_LD_DP_IN5
CYVAL_UDB_P_U_D0_LD_DP_IN5 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_D0_LD_RESERVED
CYVAL_UDB_P_U_D0_LD_RESERVED EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_D1_LD__OFFSET
CYFLD_UDB_P_U_D1_LD__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_D1_LD__SIZE
CYFLD_UDB_P_U_D1_LD__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_D1_LD_OFF
CYVAL_UDB_P_U_D1_LD_OFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_D1_LD_DP_IN0
CYVAL_UDB_P_U_D1_LD_DP_IN0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_D1_LD_DP_IN1
CYVAL_UDB_P_U_D1_LD_DP_IN1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_D1_LD_DP_IN2
CYVAL_UDB_P_U_D1_LD_DP_IN2 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_D1_LD_DP_IN3
CYVAL_UDB_P_U_D1_LD_DP_IN3 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_D1_LD_DP_IN4
CYVAL_UDB_P_U_D1_LD_DP_IN4 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_D1_LD_DP_IN5
CYVAL_UDB_P_U_D1_LD_DP_IN5 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_D1_LD_RESERVED
CYVAL_UDB_P_U_D1_LD_RESERVED EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG4
CYREG_UDB_P0_U0_CFG4 EQU 0x400f3044
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SI_MUX__OFFSET
CYFLD_UDB_P_U_SI_MUX__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SI_MUX__SIZE
CYFLD_UDB_P_U_SI_MUX__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SI_MUX_OFF
CYVAL_UDB_P_U_SI_MUX_OFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SI_MUX_DP_IN0
CYVAL_UDB_P_U_SI_MUX_DP_IN0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SI_MUX_DP_IN1
CYVAL_UDB_P_U_SI_MUX_DP_IN1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SI_MUX_DP_IN2
CYVAL_UDB_P_U_SI_MUX_DP_IN2 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SI_MUX_DP_IN3
CYVAL_UDB_P_U_SI_MUX_DP_IN3 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SI_MUX_DP_IN4
CYVAL_UDB_P_U_SI_MUX_DP_IN4 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SI_MUX_DP_IN5
CYVAL_UDB_P_U_SI_MUX_DP_IN5 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SI_MUX_RESERVED
CYVAL_UDB_P_U_SI_MUX_RESERVED EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CI_MUX__OFFSET
CYFLD_UDB_P_U_CI_MUX__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CI_MUX__SIZE
CYFLD_UDB_P_U_CI_MUX__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CI_MUX_OFF
CYVAL_UDB_P_U_CI_MUX_OFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CI_MUX_DP_IN0
CYVAL_UDB_P_U_CI_MUX_DP_IN0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CI_MUX_DP_IN1
CYVAL_UDB_P_U_CI_MUX_DP_IN1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CI_MUX_DP_IN2
CYVAL_UDB_P_U_CI_MUX_DP_IN2 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CI_MUX_DP_IN3
CYVAL_UDB_P_U_CI_MUX_DP_IN3 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CI_MUX_DP_IN4
CYVAL_UDB_P_U_CI_MUX_DP_IN4 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CI_MUX_DP_IN5
CYVAL_UDB_P_U_CI_MUX_DP_IN5 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CI_MUX_RESERVED
CYVAL_UDB_P_U_CI_MUX_RESERVED EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG5
CYREG_UDB_P0_U0_CFG5 EQU 0x400f3045
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_OUT0__OFFSET
CYFLD_UDB_P_U_OUT0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_OUT0__SIZE
CYFLD_UDB_P_U_OUT0__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_CE0
CYVAL_UDB_P_U_OUT0_CE0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_CL0
CYVAL_UDB_P_U_OUT0_CL0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_Z0
CYVAL_UDB_P_U_OUT0_Z0 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_FF0
CYVAL_UDB_P_U_OUT0_FF0 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_CE1
CYVAL_UDB_P_U_OUT0_CE1 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_CL1
CYVAL_UDB_P_U_OUT0_CL1 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_Z1
CYVAL_UDB_P_U_OUT0_Z1 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_FF1
CYVAL_UDB_P_U_OUT0_FF1 EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_OV_MSB
CYVAL_UDB_P_U_OUT0_OV_MSB EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_CO_MSB
CYVAL_UDB_P_U_OUT0_CO_MSB EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_CMSBO
CYVAL_UDB_P_U_OUT0_CMSBO EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_SO
CYVAL_UDB_P_U_OUT0_SO EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_F0_BLK_STAT
CYVAL_UDB_P_U_OUT0_F0_BLK_STAT EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_F1_BLK_STAT
CYVAL_UDB_P_U_OUT0_F1_BLK_STAT EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_F0_BUS_STAT
CYVAL_UDB_P_U_OUT0_F0_BUS_STAT EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_F1_BUS_STAT
CYVAL_UDB_P_U_OUT0_F1_BUS_STAT EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_OUT1__OFFSET
CYFLD_UDB_P_U_OUT1__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_OUT1__SIZE
CYFLD_UDB_P_U_OUT1__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_CE0
CYVAL_UDB_P_U_OUT1_CE0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_CL0
CYVAL_UDB_P_U_OUT1_CL0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_Z0
CYVAL_UDB_P_U_OUT1_Z0 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_FF0
CYVAL_UDB_P_U_OUT1_FF0 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_CE1
CYVAL_UDB_P_U_OUT1_CE1 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_CL1
CYVAL_UDB_P_U_OUT1_CL1 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_Z1
CYVAL_UDB_P_U_OUT1_Z1 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_FF1
CYVAL_UDB_P_U_OUT1_FF1 EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_OV_MSB
CYVAL_UDB_P_U_OUT1_OV_MSB EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_CO_MSB
CYVAL_UDB_P_U_OUT1_CO_MSB EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_CMSBO
CYVAL_UDB_P_U_OUT1_CMSBO EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_SO
CYVAL_UDB_P_U_OUT1_SO EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_F0_BLK_STAT
CYVAL_UDB_P_U_OUT1_F0_BLK_STAT EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_F1_BLK_STAT
CYVAL_UDB_P_U_OUT1_F1_BLK_STAT EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_F0_BUS_STAT
CYVAL_UDB_P_U_OUT1_F0_BUS_STAT EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_F1_BUS_STAT
CYVAL_UDB_P_U_OUT1_F1_BUS_STAT EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG6
CYREG_UDB_P0_U0_CFG6 EQU 0x400f3046
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_OUT2__OFFSET
CYFLD_UDB_P_U_OUT2__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_OUT2__SIZE
CYFLD_UDB_P_U_OUT2__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_CE0
CYVAL_UDB_P_U_OUT2_CE0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_CL0
CYVAL_UDB_P_U_OUT2_CL0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_Z0
CYVAL_UDB_P_U_OUT2_Z0 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_FF0
CYVAL_UDB_P_U_OUT2_FF0 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_CE1
CYVAL_UDB_P_U_OUT2_CE1 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_CL1
CYVAL_UDB_P_U_OUT2_CL1 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_Z1
CYVAL_UDB_P_U_OUT2_Z1 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_FF1
CYVAL_UDB_P_U_OUT2_FF1 EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_OV_MSB
CYVAL_UDB_P_U_OUT2_OV_MSB EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_CO_MSB
CYVAL_UDB_P_U_OUT2_CO_MSB EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_CMSBO
CYVAL_UDB_P_U_OUT2_CMSBO EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_SO
CYVAL_UDB_P_U_OUT2_SO EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_F0_BLK_STAT
CYVAL_UDB_P_U_OUT2_F0_BLK_STAT EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_F1_BLK_STAT
CYVAL_UDB_P_U_OUT2_F1_BLK_STAT EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_F0_BUS_STAT
CYVAL_UDB_P_U_OUT2_F0_BUS_STAT EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_F1_BUS_STAT
CYVAL_UDB_P_U_OUT2_F1_BUS_STAT EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_OUT3__OFFSET
CYFLD_UDB_P_U_OUT3__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_OUT3__SIZE
CYFLD_UDB_P_U_OUT3__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_CE0
CYVAL_UDB_P_U_OUT3_CE0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_CL0
CYVAL_UDB_P_U_OUT3_CL0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_Z0
CYVAL_UDB_P_U_OUT3_Z0 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_FF0
CYVAL_UDB_P_U_OUT3_FF0 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_CE1
CYVAL_UDB_P_U_OUT3_CE1 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_CL1
CYVAL_UDB_P_U_OUT3_CL1 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_Z1
CYVAL_UDB_P_U_OUT3_Z1 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_FF1
CYVAL_UDB_P_U_OUT3_FF1 EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_OV_MSB
CYVAL_UDB_P_U_OUT3_OV_MSB EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_CO_MSB
CYVAL_UDB_P_U_OUT3_CO_MSB EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_CMSBO
CYVAL_UDB_P_U_OUT3_CMSBO EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_SO
CYVAL_UDB_P_U_OUT3_SO EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_F0_BLK_STAT
CYVAL_UDB_P_U_OUT3_F0_BLK_STAT EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_F1_BLK_STAT
CYVAL_UDB_P_U_OUT3_F1_BLK_STAT EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_F0_BUS_STAT
CYVAL_UDB_P_U_OUT3_F0_BUS_STAT EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_F1_BUS_STAT
CYVAL_UDB_P_U_OUT3_F1_BUS_STAT EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG7
CYREG_UDB_P0_U0_CFG7 EQU 0x400f3047
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_OUT4__OFFSET
CYFLD_UDB_P_U_OUT4__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_OUT4__SIZE
CYFLD_UDB_P_U_OUT4__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_CE0
CYVAL_UDB_P_U_OUT4_CE0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_CL0
CYVAL_UDB_P_U_OUT4_CL0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_Z0
CYVAL_UDB_P_U_OUT4_Z0 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_FF0
CYVAL_UDB_P_U_OUT4_FF0 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_CE1
CYVAL_UDB_P_U_OUT4_CE1 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_CL1
CYVAL_UDB_P_U_OUT4_CL1 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_Z1
CYVAL_UDB_P_U_OUT4_Z1 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_FF1
CYVAL_UDB_P_U_OUT4_FF1 EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_OV_MSB
CYVAL_UDB_P_U_OUT4_OV_MSB EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_CO_MSB
CYVAL_UDB_P_U_OUT4_CO_MSB EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_CMSBO
CYVAL_UDB_P_U_OUT4_CMSBO EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_SO
CYVAL_UDB_P_U_OUT4_SO EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_F0_BLK_STAT
CYVAL_UDB_P_U_OUT4_F0_BLK_STAT EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_F1_BLK_STAT
CYVAL_UDB_P_U_OUT4_F1_BLK_STAT EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_F0_BUS_STAT
CYVAL_UDB_P_U_OUT4_F0_BUS_STAT EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_F1_BUS_STAT
CYVAL_UDB_P_U_OUT4_F1_BUS_STAT EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_OUT5__OFFSET
CYFLD_UDB_P_U_OUT5__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_OUT5__SIZE
CYFLD_UDB_P_U_OUT5__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_CE0
CYVAL_UDB_P_U_OUT5_CE0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_CL0
CYVAL_UDB_P_U_OUT5_CL0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_Z0
CYVAL_UDB_P_U_OUT5_Z0 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_FF0
CYVAL_UDB_P_U_OUT5_FF0 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_CE1
CYVAL_UDB_P_U_OUT5_CE1 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_CL1
CYVAL_UDB_P_U_OUT5_CL1 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_Z1
CYVAL_UDB_P_U_OUT5_Z1 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_FF1
CYVAL_UDB_P_U_OUT5_FF1 EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_OV_MSB
CYVAL_UDB_P_U_OUT5_OV_MSB EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_CO_MSB
CYVAL_UDB_P_U_OUT5_CO_MSB EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_CMSBO
CYVAL_UDB_P_U_OUT5_CMSBO EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_SO
CYVAL_UDB_P_U_OUT5_SO EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_F0_BLK_STAT
CYVAL_UDB_P_U_OUT5_F0_BLK_STAT EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_F1_BLK_STAT
CYVAL_UDB_P_U_OUT5_F1_BLK_STAT EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_F0_BUS_STAT
CYVAL_UDB_P_U_OUT5_F0_BUS_STAT EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_F1_BUS_STAT
CYVAL_UDB_P_U_OUT5_F1_BUS_STAT EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG8
CYREG_UDB_P0_U0_CFG8 EQU 0x400f3048
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_OUT_SYNC__OFFSET
CYFLD_UDB_P_U_OUT_SYNC__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_OUT_SYNC__SIZE
CYFLD_UDB_P_U_OUT_SYNC__SIZE EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT_SYNC_REGISTERED
CYVAL_UDB_P_U_OUT_SYNC_REGISTERED EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_OUT_SYNC_COMBINATIONAL
CYVAL_UDB_P_U_OUT_SYNC_COMBINATIONAL EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_NC6__OFFSET
CYFLD_UDB_P_U_NC6__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_NC6__SIZE
CYFLD_UDB_P_U_NC6__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG9
CYREG_UDB_P0_U0_CFG9 EQU 0x400f3049
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_AMASK__OFFSET
CYFLD_UDB_P_U_AMASK__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_AMASK__SIZE
CYFLD_UDB_P_U_AMASK__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG10
CYREG_UDB_P0_U0_CFG10 EQU 0x400f304a
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CMASK0__OFFSET
CYFLD_UDB_P_U_CMASK0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CMASK0__SIZE
CYFLD_UDB_P_U_CMASK0__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG11
CYREG_UDB_P0_U0_CFG11 EQU 0x400f304b
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG12
CYREG_UDB_P0_U0_CFG12 EQU 0x400f304c
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SI_SELA__OFFSET
CYFLD_UDB_P_U_SI_SELA__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SI_SELA__SIZE
CYFLD_UDB_P_U_SI_SELA__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SI_SELA_DEFAULT
CYVAL_UDB_P_U_SI_SELA_DEFAULT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SI_SELA_REGISTERED
CYVAL_UDB_P_U_SI_SELA_REGISTERED EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SI_SELA_ROUTE
CYVAL_UDB_P_U_SI_SELA_ROUTE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SI_SELA_CHAIN
CYVAL_UDB_P_U_SI_SELA_CHAIN EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SI_SELB__OFFSET
CYFLD_UDB_P_U_SI_SELB__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SI_SELB__SIZE
CYFLD_UDB_P_U_SI_SELB__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SI_SELB_DEFAULT
CYVAL_UDB_P_U_SI_SELB_DEFAULT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SI_SELB_REGISTERED
CYVAL_UDB_P_U_SI_SELB_REGISTERED EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SI_SELB_ROUTE
CYVAL_UDB_P_U_SI_SELB_ROUTE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SI_SELB_CHAIN
CYVAL_UDB_P_U_SI_SELB_CHAIN EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_DEF_SI__OFFSET
CYFLD_UDB_P_U_DEF_SI__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_DEF_SI__SIZE
CYFLD_UDB_P_U_DEF_SI__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DEF_SI_DEFAULT_0
CYVAL_UDB_P_U_DEF_SI_DEFAULT_0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DEF_SI_DEFAULT_1
CYVAL_UDB_P_U_DEF_SI_DEFAULT_1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_AMASK_EN__OFFSET
CYFLD_UDB_P_U_AMASK_EN__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_AMASK_EN__SIZE
CYFLD_UDB_P_U_AMASK_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_AMASK_EN_DISABLE
CYVAL_UDB_P_U_AMASK_EN_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_AMASK_EN_ENABLE
CYVAL_UDB_P_U_AMASK_EN_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CMASK0_EN__OFFSET
CYFLD_UDB_P_U_CMASK0_EN__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CMASK0_EN__SIZE
CYFLD_UDB_P_U_CMASK0_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CMASK0_EN_DISABLE
CYVAL_UDB_P_U_CMASK0_EN_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CMASK0_EN_ENABLE
CYVAL_UDB_P_U_CMASK0_EN_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CMASK1_EN__OFFSET
CYFLD_UDB_P_U_CMASK1_EN__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CMASK1_EN__SIZE
CYFLD_UDB_P_U_CMASK1_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CMASK1_EN_DISABLE
CYVAL_UDB_P_U_CMASK1_EN_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CMASK1_EN_ENABLE
CYVAL_UDB_P_U_CMASK1_EN_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG13
CYREG_UDB_P0_U0_CFG13 EQU 0x400f304d
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CI_SELA__OFFSET
CYFLD_UDB_P_U_CI_SELA__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CI_SELA__SIZE
CYFLD_UDB_P_U_CI_SELA__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CI_SELA_DEFAULT
CYVAL_UDB_P_U_CI_SELA_DEFAULT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CI_SELA_REGISTERED
CYVAL_UDB_P_U_CI_SELA_REGISTERED EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CI_SELA_ROUTE
CYVAL_UDB_P_U_CI_SELA_ROUTE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CI_SELA_CHAIN
CYVAL_UDB_P_U_CI_SELA_CHAIN EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CI_SELB__OFFSET
CYFLD_UDB_P_U_CI_SELB__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CI_SELB__SIZE
CYFLD_UDB_P_U_CI_SELB__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CI_SELB_DEFAULT
CYVAL_UDB_P_U_CI_SELB_DEFAULT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CI_SELB_REGISTERED
CYVAL_UDB_P_U_CI_SELB_REGISTERED EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CI_SELB_ROUTE
CYVAL_UDB_P_U_CI_SELB_ROUTE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CI_SELB_CHAIN
CYVAL_UDB_P_U_CI_SELB_CHAIN EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CMP_SELA__OFFSET
CYFLD_UDB_P_U_CMP_SELA__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CMP_SELA__SIZE
CYFLD_UDB_P_U_CMP_SELA__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CMP_SELA_A1_D1
CYVAL_UDB_P_U_CMP_SELA_A1_D1 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CMP_SELA_A1_A0
CYVAL_UDB_P_U_CMP_SELA_A1_A0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CMP_SELA_A0_D1
CYVAL_UDB_P_U_CMP_SELA_A0_D1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CMP_SELA_A0_A0
CYVAL_UDB_P_U_CMP_SELA_A0_A0 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CMP_SELB__OFFSET
CYFLD_UDB_P_U_CMP_SELB__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CMP_SELB__SIZE
CYFLD_UDB_P_U_CMP_SELB__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CMP_SELB_A1_D1
CYVAL_UDB_P_U_CMP_SELB_A1_D1 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CMP_SELB_A1_A0
CYVAL_UDB_P_U_CMP_SELB_A1_A0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CMP_SELB_A0_D1
CYVAL_UDB_P_U_CMP_SELB_A0_D1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CMP_SELB_A0_A0
CYVAL_UDB_P_U_CMP_SELB_A0_A0 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG14
CYREG_UDB_P0_U0_CFG14 EQU 0x400f304e
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CHAIN0__OFFSET
CYFLD_UDB_P_U_CHAIN0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CHAIN0__SIZE
CYFLD_UDB_P_U_CHAIN0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CHAIN0_DISABLE
CYVAL_UDB_P_U_CHAIN0_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CHAIN0_ENABLE
CYVAL_UDB_P_U_CHAIN0_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CHAIN1__OFFSET
CYFLD_UDB_P_U_CHAIN1__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CHAIN1__SIZE
CYFLD_UDB_P_U_CHAIN1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CHAIN1_DISABLE
CYVAL_UDB_P_U_CHAIN1_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CHAIN1_ENABLE
CYVAL_UDB_P_U_CHAIN1_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CHAIN_FB__OFFSET
CYFLD_UDB_P_U_CHAIN_FB__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CHAIN_FB__SIZE
CYFLD_UDB_P_U_CHAIN_FB__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CHAIN_FB_DISABLE
CYVAL_UDB_P_U_CHAIN_FB_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CHAIN_FB_ENABLE
CYVAL_UDB_P_U_CHAIN_FB_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CHAIN_CMSB__OFFSET
CYFLD_UDB_P_U_CHAIN_CMSB__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CHAIN_CMSB__SIZE
CYFLD_UDB_P_U_CHAIN_CMSB__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CHAIN_CMSB_DISABLE
CYVAL_UDB_P_U_CHAIN_CMSB_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CHAIN_CMSB_ENABLE
CYVAL_UDB_P_U_CHAIN_CMSB_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_MSB_SEL__OFFSET
CYFLD_UDB_P_U_MSB_SEL__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_MSB_SEL__SIZE
CYFLD_UDB_P_U_MSB_SEL__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_MSB_SEL_BIT0
CYVAL_UDB_P_U_MSB_SEL_BIT0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_MSB_SEL_BIT1
CYVAL_UDB_P_U_MSB_SEL_BIT1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_MSB_SEL_BIT2
CYVAL_UDB_P_U_MSB_SEL_BIT2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_MSB_SEL_BIT3
CYVAL_UDB_P_U_MSB_SEL_BIT3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_MSB_SEL_BIT4
CYVAL_UDB_P_U_MSB_SEL_BIT4 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_MSB_SEL_BIT5
CYVAL_UDB_P_U_MSB_SEL_BIT5 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_MSB_SEL_BIT6
CYVAL_UDB_P_U_MSB_SEL_BIT6 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_MSB_SEL_BIT7
CYVAL_UDB_P_U_MSB_SEL_BIT7 EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_MSB_EN__OFFSET
CYFLD_UDB_P_U_MSB_EN__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_MSB_EN__SIZE
CYFLD_UDB_P_U_MSB_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_MSB_EN_DISABLE
CYVAL_UDB_P_U_MSB_EN_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_MSB_EN_ENABLE
CYVAL_UDB_P_U_MSB_EN_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG15
CYREG_UDB_P0_U0_CFG15 EQU 0x400f304f
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_F0_INSEL__OFFSET
CYFLD_UDB_P_U_F0_INSEL__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_F0_INSEL__SIZE
CYFLD_UDB_P_U_F0_INSEL__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F0_INSEL_INPUT
CYVAL_UDB_P_U_F0_INSEL_INPUT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F0_INSEL_OUTPUT_A0
CYVAL_UDB_P_U_F0_INSEL_OUTPUT_A0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F0_INSEL_OUTPUT_A1
CYVAL_UDB_P_U_F0_INSEL_OUTPUT_A1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F0_INSEL_OUTPUT_ALU
CYVAL_UDB_P_U_F0_INSEL_OUTPUT_ALU EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_F1_INSEL__OFFSET
CYFLD_UDB_P_U_F1_INSEL__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_F1_INSEL__SIZE
CYFLD_UDB_P_U_F1_INSEL__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F1_INSEL_INPUT
CYVAL_UDB_P_U_F1_INSEL_INPUT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F1_INSEL_OUTPUT_A0
CYVAL_UDB_P_U_F1_INSEL_OUTPUT_A0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F1_INSEL_OUTPUT_A1
CYVAL_UDB_P_U_F1_INSEL_OUTPUT_A1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F1_INSEL_OUTPUT_ALU
CYVAL_UDB_P_U_F1_INSEL_OUTPUT_ALU EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_MSB_SI__OFFSET
CYFLD_UDB_P_U_MSB_SI__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_MSB_SI__SIZE
CYFLD_UDB_P_U_MSB_SI__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_MSB_SI_DEFAULT
CYVAL_UDB_P_U_MSB_SI_DEFAULT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_MSB_SI_MSB
CYVAL_UDB_P_U_MSB_SI_MSB EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PI_DYN__OFFSET
CYFLD_UDB_P_U_PI_DYN__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PI_DYN__SIZE
CYFLD_UDB_P_U_PI_DYN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PI_DYN_DISABLE
CYVAL_UDB_P_U_PI_DYN_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PI_DYN_ENABLE
CYVAL_UDB_P_U_PI_DYN_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SHIFT_SEL__OFFSET
CYFLD_UDB_P_U_SHIFT_SEL__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SHIFT_SEL__SIZE
CYFLD_UDB_P_U_SHIFT_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SHIFT_SEL_SOL_MSB
CYVAL_UDB_P_U_SHIFT_SEL_SOL_MSB EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SHIFT_SEL_SOR
CYVAL_UDB_P_U_SHIFT_SEL_SOR EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PI_SEL__OFFSET
CYFLD_UDB_P_U_PI_SEL__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PI_SEL__SIZE
CYFLD_UDB_P_U_PI_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PI_SEL_NORMAL
CYVAL_UDB_P_U_PI_SEL_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PI_SEL_PARALLEL
CYVAL_UDB_P_U_PI_SEL_PARALLEL EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG16
CYREG_UDB_P0_U0_CFG16 EQU 0x400f3050
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_WRK16_CONCAT__OFFSET
CYFLD_UDB_P_U_WRK16_CONCAT__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_WRK16_CONCAT__SIZE
CYFLD_UDB_P_U_WRK16_CONCAT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_WRK16_CONCAT_DEFAULT
CYVAL_UDB_P_U_WRK16_CONCAT_DEFAULT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_WRK16_CONCAT_CONCATENATE
CYVAL_UDB_P_U_WRK16_CONCAT_CONCATENATE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_EXT_CRCPRS__OFFSET
CYFLD_UDB_P_U_EXT_CRCPRS__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_EXT_CRCPRS__SIZE
CYFLD_UDB_P_U_EXT_CRCPRS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_EXT_CRCPRS_INTERNAL
CYVAL_UDB_P_U_EXT_CRCPRS_INTERNAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_EXT_CRCPRS_EXTERNAL
CYVAL_UDB_P_U_EXT_CRCPRS_EXTERNAL EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_FIFO_ASYNC__OFFSET
CYFLD_UDB_P_U_FIFO_ASYNC__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_FIFO_ASYNC__SIZE
CYFLD_UDB_P_U_FIFO_ASYNC__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_FIFO_ASYNC_DISABLE
CYVAL_UDB_P_U_FIFO_ASYNC_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_FIFO_ASYNC_ENABLE
CYVAL_UDB_P_U_FIFO_ASYNC_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_FIFO_EDGE__OFFSET
CYFLD_UDB_P_U_FIFO_EDGE__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_FIFO_EDGE__SIZE
CYFLD_UDB_P_U_FIFO_EDGE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_FIFO_EDGE_LEVEL
CYVAL_UDB_P_U_FIFO_EDGE_LEVEL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_FIFO_EDGE_EDGE
CYVAL_UDB_P_U_FIFO_EDGE_EDGE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_FIFO_CAP__OFFSET
CYFLD_UDB_P_U_FIFO_CAP__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_FIFO_CAP__SIZE
CYFLD_UDB_P_U_FIFO_CAP__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_FIFO_CAP_DISABLE
CYVAL_UDB_P_U_FIFO_CAP_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_FIFO_CAP_ENABLE
CYVAL_UDB_P_U_FIFO_CAP_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_FIFO_FAST__OFFSET
CYFLD_UDB_P_U_FIFO_FAST__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_FIFO_FAST__SIZE
CYFLD_UDB_P_U_FIFO_FAST__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_FIFO_FAST_DISABLE
CYVAL_UDB_P_U_FIFO_FAST_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_FIFO_FAST_ENABLE
CYVAL_UDB_P_U_FIFO_FAST_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_F0_CK_INV__OFFSET
CYFLD_UDB_P_U_F0_CK_INV__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_F0_CK_INV__SIZE
CYFLD_UDB_P_U_F0_CK_INV__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F0_CK_INV_NORMAL
CYVAL_UDB_P_U_F0_CK_INV_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F0_CK_INV_INVERT
CYVAL_UDB_P_U_F0_CK_INV_INVERT EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_F1_CK_INV__OFFSET
CYFLD_UDB_P_U_F1_CK_INV__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_F1_CK_INV__SIZE
CYFLD_UDB_P_U_F1_CK_INV__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F1_CK_INV_NORMAL
CYVAL_UDB_P_U_F1_CK_INV_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F1_CK_INV_INVERT
CYVAL_UDB_P_U_F1_CK_INV_INVERT EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG17
CYREG_UDB_P0_U0_CFG17 EQU 0x400f3051
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_F0_DYN__OFFSET
CYFLD_UDB_P_U_F0_DYN__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_F0_DYN__SIZE
CYFLD_UDB_P_U_F0_DYN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F0_DYN_STATIC
CYVAL_UDB_P_U_F0_DYN_STATIC EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F0_DYN_DYNAMIC
CYVAL_UDB_P_U_F0_DYN_DYNAMIC EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_F1_DYN__OFFSET
CYFLD_UDB_P_U_F1_DYN__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_F1_DYN__SIZE
CYFLD_UDB_P_U_F1_DYN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F1_DYN_STATIC
CYVAL_UDB_P_U_F1_DYN_STATIC EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_F1_DYN_DYNAMIC
CYVAL_UDB_P_U_F1_DYN_DYNAMIC EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_NC2__OFFSET
CYFLD_UDB_P_U_NC2__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_NC2__SIZE
CYFLD_UDB_P_U_NC2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_FIFO_ADD_SYNC__OFFSET
CYFLD_UDB_P_U_FIFO_ADD_SYNC__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_FIFO_ADD_SYNC__SIZE
CYFLD_UDB_P_U_FIFO_ADD_SYNC__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_FIFO_ADD_SYNC_DISABLE
CYVAL_UDB_P_U_FIFO_ADD_SYNC_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_FIFO_ADD_SYNC_ENABLE
CYVAL_UDB_P_U_FIFO_ADD_SYNC_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG18
CYREG_UDB_P0_U0_CFG18 EQU 0x400f3052
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CTL_MD0__OFFSET
CYFLD_UDB_P_U_CTL_MD0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CTL_MD0__SIZE
CYFLD_UDB_P_U_CTL_MD0__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CTL_MD0_DIRECT
CYVAL_UDB_P_U_CTL_MD0_DIRECT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CTL_MD0_SYNC
CYVAL_UDB_P_U_CTL_MD0_SYNC EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CTL_MD0_DOUBLE_SYNC
CYVAL_UDB_P_U_CTL_MD0_DOUBLE_SYNC EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CTL_MD0_PULSE
CYVAL_UDB_P_U_CTL_MD0_PULSE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG19
CYREG_UDB_P0_U0_CFG19 EQU 0x400f3053
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CTL_MD1__OFFSET
CYFLD_UDB_P_U_CTL_MD1__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CTL_MD1__SIZE
CYFLD_UDB_P_U_CTL_MD1__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CTL_MD1_DIRECT
CYVAL_UDB_P_U_CTL_MD1_DIRECT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CTL_MD1_SYNC
CYVAL_UDB_P_U_CTL_MD1_SYNC EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CTL_MD1_DOUBLE_SYNC
CYVAL_UDB_P_U_CTL_MD1_DOUBLE_SYNC EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CTL_MD1_PULSE
CYVAL_UDB_P_U_CTL_MD1_PULSE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG20
CYREG_UDB_P0_U0_CFG20 EQU 0x400f3054
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_STAT_MD__OFFSET
CYFLD_UDB_P_U_STAT_MD__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_STAT_MD__SIZE
CYFLD_UDB_P_U_STAT_MD__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG21
CYREG_UDB_P0_U0_CFG21 EQU 0x400f3055
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_NC0__OFFSET
CYFLD_UDB_P_U_NC0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_NC0__SIZE
CYFLD_UDB_P_U_NC0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG22
CYREG_UDB_P0_U0_CFG22 EQU 0x400f3056
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SC_OUT_CTL__OFFSET
CYFLD_UDB_P_U_SC_OUT_CTL__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SC_OUT_CTL__SIZE
CYFLD_UDB_P_U_SC_OUT_CTL__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SC_OUT_CTL_CONTROL
CYVAL_UDB_P_U_SC_OUT_CTL_CONTROL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SC_OUT_CTL_PARALLEL
CYVAL_UDB_P_U_SC_OUT_CTL_PARALLEL EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SC_OUT_CTL_COUNTER
CYVAL_UDB_P_U_SC_OUT_CTL_COUNTER EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SC_OUT_CTL_RESERVED
CYVAL_UDB_P_U_SC_OUT_CTL_RESERVED EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SC_INT_MD__OFFSET
CYFLD_UDB_P_U_SC_INT_MD__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SC_INT_MD__SIZE
CYFLD_UDB_P_U_SC_INT_MD__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SC_INT_MD_NORMAL
CYVAL_UDB_P_U_SC_INT_MD_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SC_INT_MD_INT_MODE
CYVAL_UDB_P_U_SC_INT_MD_INT_MODE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SC_SYNC_MD__OFFSET
CYFLD_UDB_P_U_SC_SYNC_MD__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SC_SYNC_MD__SIZE
CYFLD_UDB_P_U_SC_SYNC_MD__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SC_SYNC_MD_NORMAL
CYVAL_UDB_P_U_SC_SYNC_MD_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SC_SYNC_MD_SYNC_MODE
CYVAL_UDB_P_U_SC_SYNC_MD_SYNC_MODE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SC_EXT_RES__OFFSET
CYFLD_UDB_P_U_SC_EXT_RES__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SC_EXT_RES__SIZE
CYFLD_UDB_P_U_SC_EXT_RES__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SC_EXT_RES_DISABLED
CYVAL_UDB_P_U_SC_EXT_RES_DISABLED EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SC_EXT_RES_ENABLED
CYVAL_UDB_P_U_SC_EXT_RES_ENABLED EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG23
CYREG_UDB_P0_U0_CFG23 EQU 0x400f3057
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CNT_LD_SEL__OFFSET
CYFLD_UDB_P_U_CNT_LD_SEL__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CNT_LD_SEL__SIZE
CYFLD_UDB_P_U_CNT_LD_SEL__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CNT_LD_SEL_SC_IN0
CYVAL_UDB_P_U_CNT_LD_SEL_SC_IN0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CNT_LD_SEL_SC_IN1
CYVAL_UDB_P_U_CNT_LD_SEL_SC_IN1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CNT_LD_SEL_SC_IN2
CYVAL_UDB_P_U_CNT_LD_SEL_SC_IN2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CNT_LD_SEL_SC_IN3
CYVAL_UDB_P_U_CNT_LD_SEL_SC_IN3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CNT_EN_SEL__OFFSET
CYFLD_UDB_P_U_CNT_EN_SEL__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CNT_EN_SEL__SIZE
CYFLD_UDB_P_U_CNT_EN_SEL__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CNT_EN_SEL_SC_IN4
CYVAL_UDB_P_U_CNT_EN_SEL_SC_IN4 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CNT_EN_SEL_SC_IN5
CYVAL_UDB_P_U_CNT_EN_SEL_SC_IN5 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CNT_EN_SEL_SC_IN6
CYVAL_UDB_P_U_CNT_EN_SEL_SC_IN6 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CNT_EN_SEL_SC_IO
CYVAL_UDB_P_U_CNT_EN_SEL_SC_IO EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_ROUTE_LD__OFFSET
CYFLD_UDB_P_U_ROUTE_LD__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_ROUTE_LD__SIZE
CYFLD_UDB_P_U_ROUTE_LD__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_ROUTE_LD_DISABLE
CYVAL_UDB_P_U_ROUTE_LD_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_ROUTE_LD_ROUTED
CYVAL_UDB_P_U_ROUTE_LD_ROUTED EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_ROUTE_EN__OFFSET
CYFLD_UDB_P_U_ROUTE_EN__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_ROUTE_EN__SIZE
CYFLD_UDB_P_U_ROUTE_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_ROUTE_EN_DISABLE
CYVAL_UDB_P_U_ROUTE_EN_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_ROUTE_EN_ROUTED
CYVAL_UDB_P_U_ROUTE_EN_ROUTED EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_ALT_CNT__OFFSET
CYFLD_UDB_P_U_ALT_CNT__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_ALT_CNT__SIZE
CYFLD_UDB_P_U_ALT_CNT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_ALT_CNT_DEFAULT_MODE
CYVAL_UDB_P_U_ALT_CNT_DEFAULT_MODE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_ALT_CNT_ALT_MODE
CYVAL_UDB_P_U_ALT_CNT_ALT_MODE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG24
CYREG_UDB_P0_U0_CFG24 EQU 0x400f3058
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_RC_EN_SEL__OFFSET
CYFLD_UDB_P_U_RC_EN_SEL__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_RC_EN_SEL__SIZE
CYFLD_UDB_P_U_RC_EN_SEL__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RC_EN_SEL_RC_IN0
CYVAL_UDB_P_U_RC_EN_SEL_RC_IN0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RC_EN_SEL_RC_IN1
CYVAL_UDB_P_U_RC_EN_SEL_RC_IN1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RC_EN_SEL_RC_IN2
CYVAL_UDB_P_U_RC_EN_SEL_RC_IN2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RC_EN_SEL_RC_IN3
CYVAL_UDB_P_U_RC_EN_SEL_RC_IN3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_RC_EN_MODE__OFFSET
CYFLD_UDB_P_U_RC_EN_MODE__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_RC_EN_MODE__SIZE
CYFLD_UDB_P_U_RC_EN_MODE__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RC_EN_MODE_OFF
CYVAL_UDB_P_U_RC_EN_MODE_OFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RC_EN_MODE_ON
CYVAL_UDB_P_U_RC_EN_MODE_ON EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RC_EN_MODE_POSEDGE
CYVAL_UDB_P_U_RC_EN_MODE_POSEDGE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RC_EN_MODE_LEVEL
CYVAL_UDB_P_U_RC_EN_MODE_LEVEL EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_RC_EN_INV__OFFSET
CYFLD_UDB_P_U_RC_EN_INV__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_RC_EN_INV__SIZE
CYFLD_UDB_P_U_RC_EN_INV__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RC_EN_INV_NOINV
CYVAL_UDB_P_U_RC_EN_INV_NOINV EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RC_EN_INV_INVERT
CYVAL_UDB_P_U_RC_EN_INV_INVERT EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_RC_INV__OFFSET
CYFLD_UDB_P_U_RC_INV__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_RC_INV__SIZE
CYFLD_UDB_P_U_RC_INV__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RC_INV_NOINV
CYVAL_UDB_P_U_RC_INV_NOINV EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RC_INV_INVERT
CYVAL_UDB_P_U_RC_INV_INVERT EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_RC_RES_SEL0_OR_FRES__OFFSET
CYFLD_UDB_P_U_RC_RES_SEL0_OR_FRES__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_RC_RES_SEL0_OR_FRES__SIZE
CYFLD_UDB_P_U_RC_RES_SEL0_OR_FRES__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_RC_RES_SEL1__OFFSET
CYFLD_UDB_P_U_RC_RES_SEL1__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_RC_RES_SEL1__SIZE
CYFLD_UDB_P_U_RC_RES_SEL1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG25
CYREG_UDB_P0_U0_CFG25 EQU 0x400f3059
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG26
CYREG_UDB_P0_U0_CFG26 EQU 0x400f305a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG27
CYREG_UDB_P0_U0_CFG27 EQU 0x400f305b
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG28
CYREG_UDB_P0_U0_CFG28 EQU 0x400f305c
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_CK_SEL__OFFSET
CYFLD_UDB_P_U_PLD0_CK_SEL__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_CK_SEL__SIZE
CYFLD_UDB_P_U_PLD0_CK_SEL__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK0
CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK1
CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK2
CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK3
CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK4
CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK4 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK5
CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK5 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK6
CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK6 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK7
CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK7 EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_CK_SEL_EXT_CLK
CYVAL_UDB_P_U_PLD0_CK_SEL_EXT_CLK EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_CK_SEL_SYSCLK
CYVAL_UDB_P_U_PLD0_CK_SEL_SYSCLK EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_CK_SEL__OFFSET
CYFLD_UDB_P_U_PLD1_CK_SEL__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_CK_SEL__SIZE
CYFLD_UDB_P_U_PLD1_CK_SEL__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK0
CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK1
CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK2
CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK3
CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK4
CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK4 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK5
CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK5 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK6
CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK6 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK7
CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK7 EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_CK_SEL_EXT_CLK
CYVAL_UDB_P_U_PLD1_CK_SEL_EXT_CLK EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_CK_SEL_SYSCLK
CYVAL_UDB_P_U_PLD1_CK_SEL_SYSCLK EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG29
CYREG_UDB_P0_U0_CFG29 EQU 0x400f305d
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_DP_CK_SEL__OFFSET
CYFLD_UDB_P_U_DP_CK_SEL__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_DP_CK_SEL__SIZE
CYFLD_UDB_P_U_DP_CK_SEL__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DP_CK_SEL_GCLK0
CYVAL_UDB_P_U_DP_CK_SEL_GCLK0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DP_CK_SEL_GCLK1
CYVAL_UDB_P_U_DP_CK_SEL_GCLK1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DP_CK_SEL_GCLK2
CYVAL_UDB_P_U_DP_CK_SEL_GCLK2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DP_CK_SEL_GCLK3
CYVAL_UDB_P_U_DP_CK_SEL_GCLK3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DP_CK_SEL_GCLK4
CYVAL_UDB_P_U_DP_CK_SEL_GCLK4 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DP_CK_SEL_GCLK5
CYVAL_UDB_P_U_DP_CK_SEL_GCLK5 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DP_CK_SEL_GCLK6
CYVAL_UDB_P_U_DP_CK_SEL_GCLK6 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DP_CK_SEL_GCLK7
CYVAL_UDB_P_U_DP_CK_SEL_GCLK7 EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DP_CK_SEL_EXT_CLK
CYVAL_UDB_P_U_DP_CK_SEL_EXT_CLK EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DP_CK_SEL_SYSCLK
CYVAL_UDB_P_U_DP_CK_SEL_SYSCLK EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SC_CK_SEL__OFFSET
CYFLD_UDB_P_U_SC_CK_SEL__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SC_CK_SEL__SIZE
CYFLD_UDB_P_U_SC_CK_SEL__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SC_CK_SEL_GCLK0
CYVAL_UDB_P_U_SC_CK_SEL_GCLK0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SC_CK_SEL_GCLK1
CYVAL_UDB_P_U_SC_CK_SEL_GCLK1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SC_CK_SEL_GCLK2
CYVAL_UDB_P_U_SC_CK_SEL_GCLK2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SC_CK_SEL_GCLK3
CYVAL_UDB_P_U_SC_CK_SEL_GCLK3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SC_CK_SEL_GCLK4
CYVAL_UDB_P_U_SC_CK_SEL_GCLK4 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SC_CK_SEL_GCLK5
CYVAL_UDB_P_U_SC_CK_SEL_GCLK5 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SC_CK_SEL_GCLK6
CYVAL_UDB_P_U_SC_CK_SEL_GCLK6 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SC_CK_SEL_GCLK7
CYVAL_UDB_P_U_SC_CK_SEL_GCLK7 EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SC_CK_SEL_EXT_CLK
CYVAL_UDB_P_U_SC_CK_SEL_EXT_CLK EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SC_CK_SEL_SYSCLK
CYVAL_UDB_P_U_SC_CK_SEL_SYSCLK EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG30
CYREG_UDB_P0_U0_CFG30 EQU 0x400f305e
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_RES_SEL__OFFSET
CYFLD_UDB_P_U_RES_SEL__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_RES_SEL__SIZE
CYFLD_UDB_P_U_RES_SEL__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RES_SEL_RC_IN0
CYVAL_UDB_P_U_RES_SEL_RC_IN0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RES_SEL_RC_IN1
CYVAL_UDB_P_U_RES_SEL_RC_IN1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RES_SEL_RC_IN2
CYVAL_UDB_P_U_RES_SEL_RC_IN2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RES_SEL_RC_IN3
CYVAL_UDB_P_U_RES_SEL_RC_IN3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_RES_POL__OFFSET
CYFLD_UDB_P_U_RES_POL__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_RES_POL__SIZE
CYFLD_UDB_P_U_RES_POL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RES_POL_NEGATED
CYVAL_UDB_P_U_RES_POL_NEGATED EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_RES_POL_ASSERTED
CYVAL_UDB_P_U_RES_POL_ASSERTED EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_EN_RES_CNTCTL__OFFSET
CYFLD_UDB_P_U_EN_RES_CNTCTL__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_EN_RES_CNTCTL__SIZE
CYFLD_UDB_P_U_EN_RES_CNTCTL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_EN_RES_CNTCTL_DISABLE
CYVAL_UDB_P_U_EN_RES_CNTCTL_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_EN_RES_CNTCTL_ENABLE
CYVAL_UDB_P_U_EN_RES_CNTCTL_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_GUDB_WR__OFFSET
CYFLD_UDB_P_U_GUDB_WR__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_GUDB_WR__SIZE
CYFLD_UDB_P_U_GUDB_WR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_GUDB_WR_DISABLE
CYVAL_UDB_P_U_GUDB_WR_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_GUDB_WR_ENABLE
CYVAL_UDB_P_U_GUDB_WR_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RES_POL__OFFSET
CYFLD_UDB_P_U_DP_RES_POL__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RES_POL__SIZE
CYFLD_UDB_P_U_DP_RES_POL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RES_POL_NOINV
CYVAL_UDB_P_U_DP_RES_POL_NOINV EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RES_POL_INVERT
CYVAL_UDB_P_U_DP_RES_POL_INVERT EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SC_RES_POL__OFFSET
CYFLD_UDB_P_U_SC_RES_POL__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SC_RES_POL__SIZE
CYFLD_UDB_P_U_SC_RES_POL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SC_RES_POL_NOINV
CYVAL_UDB_P_U_SC_RES_POL_NOINV EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SC_RES_POL_INVERT
CYVAL_UDB_P_U_SC_RES_POL_INVERT EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG31
CYREG_UDB_P0_U0_CFG31 EQU 0x400f305f
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_ALT_RES__OFFSET
CYFLD_UDB_P_U_ALT_RES__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_ALT_RES__SIZE
CYFLD_UDB_P_U_ALT_RES__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_ALT_RES_COMPATIBLE
CYVAL_UDB_P_U_ALT_RES_COMPATIBLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_ALT_RES_ALTERNATE
CYVAL_UDB_P_U_ALT_RES_ALTERNATE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_EXT_SYNC__OFFSET
CYFLD_UDB_P_U_EXT_SYNC__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_EXT_SYNC__SIZE
CYFLD_UDB_P_U_EXT_SYNC__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_EXT_SYNC_DISABLE
CYVAL_UDB_P_U_EXT_SYNC_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_EXT_SYNC_ENABLE
CYVAL_UDB_P_U_EXT_SYNC_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_EN_RES_STAT__OFFSET
CYFLD_UDB_P_U_EN_RES_STAT__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_EN_RES_STAT__SIZE
CYFLD_UDB_P_U_EN_RES_STAT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_EN_RES_STAT_NEGATED
CYVAL_UDB_P_U_EN_RES_STAT_NEGATED EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_EN_RES_STAT_ASSERTED
CYVAL_UDB_P_U_EN_RES_STAT_ASSERTED EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_EN_RES_DP__OFFSET
CYFLD_UDB_P_U_EN_RES_DP__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_EN_RES_DP__SIZE
CYFLD_UDB_P_U_EN_RES_DP__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_EN_RES_DP_DISABLE
CYVAL_UDB_P_U_EN_RES_DP_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_EN_RES_DP_ENABLE
CYVAL_UDB_P_U_EN_RES_DP_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_EXT_CK_SEL__OFFSET
CYFLD_UDB_P_U_EXT_CK_SEL__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_EXT_CK_SEL__SIZE
CYFLD_UDB_P_U_EXT_CK_SEL__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_EXT_CK_SEL_RC_IN0
CYVAL_UDB_P_U_EXT_CK_SEL_RC_IN0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_EXT_CK_SEL_RC_IN1
CYVAL_UDB_P_U_EXT_CK_SEL_RC_IN1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_EXT_CK_SEL_RC_IN2
CYVAL_UDB_P_U_EXT_CK_SEL_RC_IN2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_EXT_CK_SEL_RC_IN3
CYVAL_UDB_P_U_EXT_CK_SEL_RC_IN3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_RES_POL__OFFSET
CYFLD_UDB_P_U_PLD0_RES_POL__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_RES_POL__SIZE
CYFLD_UDB_P_U_PLD0_RES_POL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_RES_POL_NOINV
CYVAL_UDB_P_U_PLD0_RES_POL_NOINV EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_RES_POL_INVERT
CYVAL_UDB_P_U_PLD0_RES_POL_INVERT EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_RES_POL__OFFSET
CYFLD_UDB_P_U_PLD1_RES_POL__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_RES_POL__SIZE
CYFLD_UDB_P_U_PLD1_RES_POL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_RES_POL_NOINV
CYVAL_UDB_P_U_PLD1_RES_POL_NOINV EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_RES_POL_INVERT
CYVAL_UDB_P_U_PLD1_RES_POL_INVERT EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_DCFG0
CYREG_UDB_P0_U0_DCFG0 EQU 0x400f3060
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CMP_SEL__OFFSET
CYFLD_UDB_P_U_CMP_SEL__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CMP_SEL__SIZE
CYFLD_UDB_P_U_CMP_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CMP_SEL_CFG_A
CYVAL_UDB_P_U_CMP_SEL_CFG_A EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CMP_SEL_CFG_B
CYVAL_UDB_P_U_CMP_SEL_CFG_B EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SI_SEL__OFFSET
CYFLD_UDB_P_U_SI_SEL__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SI_SEL__SIZE
CYFLD_UDB_P_U_SI_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SI_SEL_CFG_A
CYVAL_UDB_P_U_SI_SEL_CFG_A EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SI_SEL_CFG_B
CYVAL_UDB_P_U_SI_SEL_CFG_B EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CI_SEL__OFFSET
CYFLD_UDB_P_U_CI_SEL__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CI_SEL__SIZE
CYFLD_UDB_P_U_CI_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CI_SEL_CFG_A
CYVAL_UDB_P_U_CI_SEL_CFG_A EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CI_SEL_CFG_B
CYVAL_UDB_P_U_CI_SEL_CFG_B EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CFB_EN__OFFSET
CYFLD_UDB_P_U_CFB_EN__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_CFB_EN__SIZE
CYFLD_UDB_P_U_CFB_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CFB_EN_DISABLE
CYVAL_UDB_P_U_CFB_EN_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_CFB_EN_ENABLE
CYVAL_UDB_P_U_CFB_EN_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_A1_WR_SRC__OFFSET
CYFLD_UDB_P_U_A1_WR_SRC__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_A1_WR_SRC__SIZE
CYFLD_UDB_P_U_A1_WR_SRC__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_A1_WR_SRC_NOWRITE
CYVAL_UDB_P_U_A1_WR_SRC_NOWRITE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_A1_WR_SRC_ALU
CYVAL_UDB_P_U_A1_WR_SRC_ALU EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_A1_WR_SRC_D1
CYVAL_UDB_P_U_A1_WR_SRC_D1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_A1_WR_SRC_F1
CYVAL_UDB_P_U_A1_WR_SRC_F1 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_A0_WR_SRC__OFFSET
CYFLD_UDB_P_U_A0_WR_SRC__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_A0_WR_SRC__SIZE
CYFLD_UDB_P_U_A0_WR_SRC__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_A0_WR_SRC_NOWRITE
CYVAL_UDB_P_U_A0_WR_SRC_NOWRITE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_A0_WR_SRC_ALU
CYVAL_UDB_P_U_A0_WR_SRC_ALU EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_A0_WR_SRC_D0
CYVAL_UDB_P_U_A0_WR_SRC_D0 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_A0_WR_SRC_F0
CYVAL_UDB_P_U_A0_WR_SRC_F0 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SHIFT__OFFSET
CYFLD_UDB_P_U_SHIFT__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SHIFT__SIZE
CYFLD_UDB_P_U_SHIFT__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SHIFT_NOSHIFT
CYVAL_UDB_P_U_SHIFT_NOSHIFT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SHIFT_LEFT
CYVAL_UDB_P_U_SHIFT_LEFT EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SHIFT_RIGHT
CYVAL_UDB_P_U_SHIFT_RIGHT EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SHIFT_SWAP
CYVAL_UDB_P_U_SHIFT_SWAP EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SRC_B__OFFSET
CYFLD_UDB_P_U_SRC_B__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SRC_B__SIZE
CYFLD_UDB_P_U_SRC_B__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SRC_B_D0
CYVAL_UDB_P_U_SRC_B_D0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SRC_B_D1
CYVAL_UDB_P_U_SRC_B_D1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SRC_B_A0
CYVAL_UDB_P_U_SRC_B_A0 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SRC_B_A1
CYVAL_UDB_P_U_SRC_B_A1 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SRC_A__OFFSET
CYFLD_UDB_P_U_SRC_A__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_SRC_A__SIZE
CYFLD_UDB_P_U_SRC_A__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SRC_A_A0
CYVAL_UDB_P_U_SRC_A_A0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_SRC_A_A1
CYVAL_UDB_P_U_SRC_A_A1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_FUNC__OFFSET
CYFLD_UDB_P_U_FUNC__OFFSET EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_U_FUNC__SIZE
CYFLD_UDB_P_U_FUNC__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_FUNC_PASS
CYVAL_UDB_P_U_FUNC_PASS EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_FUNC_INC_A
CYVAL_UDB_P_U_FUNC_INC_A EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_FUNC_DEC_A
CYVAL_UDB_P_U_FUNC_DEC_A EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_FUNC_ADD
CYVAL_UDB_P_U_FUNC_ADD EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_FUNC_SUB
CYVAL_UDB_P_U_FUNC_SUB EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_FUNC_XOR
CYVAL_UDB_P_U_FUNC_XOR EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_FUNC_AND
CYVAL_UDB_P_U_FUNC_AND EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_UDB_P_U_FUNC_OR
CYVAL_UDB_P_U_FUNC_OR EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_DCFG1
CYREG_UDB_P0_U0_DCFG1 EQU 0x400f3062
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_DCFG2
CYREG_UDB_P0_U0_DCFG2 EQU 0x400f3064
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_DCFG3
CYREG_UDB_P0_U0_DCFG3 EQU 0x400f3066
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_DCFG4
CYREG_UDB_P0_U0_DCFG4 EQU 0x400f3068
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_DCFG5
CYREG_UDB_P0_U0_DCFG5 EQU 0x400f306a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_DCFG6
CYREG_UDB_P0_U0_DCFG6 EQU 0x400f306c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U0_DCFG7
CYREG_UDB_P0_U0_DCFG7 EQU 0x400f306e
ENDIF
IF :LNOT::DEF:CYDEV_UDB_P0_U1_BASE
CYDEV_UDB_P0_U1_BASE EQU 0x400f3080
ENDIF
IF :LNOT::DEF:CYDEV_UDB_P0_U1_SIZE
CYDEV_UDB_P0_U1_SIZE EQU 0x00000080
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_IT0
CYREG_UDB_P0_U1_PLD_IT0 EQU 0x400f3080
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_IT1
CYREG_UDB_P0_U1_PLD_IT1 EQU 0x400f3084
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_IT2
CYREG_UDB_P0_U1_PLD_IT2 EQU 0x400f3088
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_IT3
CYREG_UDB_P0_U1_PLD_IT3 EQU 0x400f308c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_IT4
CYREG_UDB_P0_U1_PLD_IT4 EQU 0x400f3090
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_IT5
CYREG_UDB_P0_U1_PLD_IT5 EQU 0x400f3094
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_IT6
CYREG_UDB_P0_U1_PLD_IT6 EQU 0x400f3098
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_IT7
CYREG_UDB_P0_U1_PLD_IT7 EQU 0x400f309c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_IT8
CYREG_UDB_P0_U1_PLD_IT8 EQU 0x400f30a0
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_IT9
CYREG_UDB_P0_U1_PLD_IT9 EQU 0x400f30a4
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_IT10
CYREG_UDB_P0_U1_PLD_IT10 EQU 0x400f30a8
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_IT11
CYREG_UDB_P0_U1_PLD_IT11 EQU 0x400f30ac
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_ORT0
CYREG_UDB_P0_U1_PLD_ORT0 EQU 0x400f30b0
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_ORT1
CYREG_UDB_P0_U1_PLD_ORT1 EQU 0x400f30b2
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_ORT2
CYREG_UDB_P0_U1_PLD_ORT2 EQU 0x400f30b4
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_ORT3
CYREG_UDB_P0_U1_PLD_ORT3 EQU 0x400f30b6
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_MC_CFG_CEN_CONST
CYREG_UDB_P0_U1_PLD_MC_CFG_CEN_CONST EQU 0x400f30b8
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_MC_CFG_XORFB
CYREG_UDB_P0_U1_PLD_MC_CFG_XORFB EQU 0x400f30ba
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_MC_SET_RESET
CYREG_UDB_P0_U1_PLD_MC_SET_RESET EQU 0x400f30bc
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_MC_CFG_BYPASS
CYREG_UDB_P0_U1_PLD_MC_CFG_BYPASS EQU 0x400f30be
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG0
CYREG_UDB_P0_U1_CFG0 EQU 0x400f30c0
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG1
CYREG_UDB_P0_U1_CFG1 EQU 0x400f30c1
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG2
CYREG_UDB_P0_U1_CFG2 EQU 0x400f30c2
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG3
CYREG_UDB_P0_U1_CFG3 EQU 0x400f30c3
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG4
CYREG_UDB_P0_U1_CFG4 EQU 0x400f30c4
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG5
CYREG_UDB_P0_U1_CFG5 EQU 0x400f30c5
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG6
CYREG_UDB_P0_U1_CFG6 EQU 0x400f30c6
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG7
CYREG_UDB_P0_U1_CFG7 EQU 0x400f30c7
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG8
CYREG_UDB_P0_U1_CFG8 EQU 0x400f30c8
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG9
CYREG_UDB_P0_U1_CFG9 EQU 0x400f30c9
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG10
CYREG_UDB_P0_U1_CFG10 EQU 0x400f30ca
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG11
CYREG_UDB_P0_U1_CFG11 EQU 0x400f30cb
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG12
CYREG_UDB_P0_U1_CFG12 EQU 0x400f30cc
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG13
CYREG_UDB_P0_U1_CFG13 EQU 0x400f30cd
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG14
CYREG_UDB_P0_U1_CFG14 EQU 0x400f30ce
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG15
CYREG_UDB_P0_U1_CFG15 EQU 0x400f30cf
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG16
CYREG_UDB_P0_U1_CFG16 EQU 0x400f30d0
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG17
CYREG_UDB_P0_U1_CFG17 EQU 0x400f30d1
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG18
CYREG_UDB_P0_U1_CFG18 EQU 0x400f30d2
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG19
CYREG_UDB_P0_U1_CFG19 EQU 0x400f30d3
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG20
CYREG_UDB_P0_U1_CFG20 EQU 0x400f30d4
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG21
CYREG_UDB_P0_U1_CFG21 EQU 0x400f30d5
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG22
CYREG_UDB_P0_U1_CFG22 EQU 0x400f30d6
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG23
CYREG_UDB_P0_U1_CFG23 EQU 0x400f30d7
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG24
CYREG_UDB_P0_U1_CFG24 EQU 0x400f30d8
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG25
CYREG_UDB_P0_U1_CFG25 EQU 0x400f30d9
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG26
CYREG_UDB_P0_U1_CFG26 EQU 0x400f30da
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG27
CYREG_UDB_P0_U1_CFG27 EQU 0x400f30db
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG28
CYREG_UDB_P0_U1_CFG28 EQU 0x400f30dc
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG29
CYREG_UDB_P0_U1_CFG29 EQU 0x400f30dd
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG30
CYREG_UDB_P0_U1_CFG30 EQU 0x400f30de
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG31
CYREG_UDB_P0_U1_CFG31 EQU 0x400f30df
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_DCFG0
CYREG_UDB_P0_U1_DCFG0 EQU 0x400f30e0
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_DCFG1
CYREG_UDB_P0_U1_DCFG1 EQU 0x400f30e2
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_DCFG2
CYREG_UDB_P0_U1_DCFG2 EQU 0x400f30e4
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_DCFG3
CYREG_UDB_P0_U1_DCFG3 EQU 0x400f30e6
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_DCFG4
CYREG_UDB_P0_U1_DCFG4 EQU 0x400f30e8
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_DCFG5
CYREG_UDB_P0_U1_DCFG5 EQU 0x400f30ea
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_DCFG6
CYREG_UDB_P0_U1_DCFG6 EQU 0x400f30ec
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_U1_DCFG7
CYREG_UDB_P0_U1_DCFG7 EQU 0x400f30ee
ENDIF
IF :LNOT::DEF:CYDEV_UDB_P0_ROUTE_BASE
CYDEV_UDB_P0_ROUTE_BASE EQU 0x400f3100
ENDIF
IF :LNOT::DEF:CYDEV_UDB_P0_ROUTE_SIZE
CYDEV_UDB_P0_ROUTE_SIZE EQU 0x00000100
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC0
CYREG_UDB_P0_ROUTE_HC0 EQU 0x400f3100
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_HC_BYTE__OFFSET
CYFLD_UDB_P_ROUTE_HC_BYTE__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_HC_BYTE__SIZE
CYFLD_UDB_P_ROUTE_HC_BYTE__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC1
CYREG_UDB_P0_ROUTE_HC1 EQU 0x400f3101
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC2
CYREG_UDB_P0_ROUTE_HC2 EQU 0x400f3102
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC3
CYREG_UDB_P0_ROUTE_HC3 EQU 0x400f3103
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC4
CYREG_UDB_P0_ROUTE_HC4 EQU 0x400f3104
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC5
CYREG_UDB_P0_ROUTE_HC5 EQU 0x400f3105
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC6
CYREG_UDB_P0_ROUTE_HC6 EQU 0x400f3106
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC7
CYREG_UDB_P0_ROUTE_HC7 EQU 0x400f3107
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC8
CYREG_UDB_P0_ROUTE_HC8 EQU 0x400f3108
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC9
CYREG_UDB_P0_ROUTE_HC9 EQU 0x400f3109
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC10
CYREG_UDB_P0_ROUTE_HC10 EQU 0x400f310a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC11
CYREG_UDB_P0_ROUTE_HC11 EQU 0x400f310b
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC12
CYREG_UDB_P0_ROUTE_HC12 EQU 0x400f310c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC13
CYREG_UDB_P0_ROUTE_HC13 EQU 0x400f310d
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC14
CYREG_UDB_P0_ROUTE_HC14 EQU 0x400f310e
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC15
CYREG_UDB_P0_ROUTE_HC15 EQU 0x400f310f
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC16
CYREG_UDB_P0_ROUTE_HC16 EQU 0x400f3110
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC17
CYREG_UDB_P0_ROUTE_HC17 EQU 0x400f3111
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC18
CYREG_UDB_P0_ROUTE_HC18 EQU 0x400f3112
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC19
CYREG_UDB_P0_ROUTE_HC19 EQU 0x400f3113
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC20
CYREG_UDB_P0_ROUTE_HC20 EQU 0x400f3114
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC21
CYREG_UDB_P0_ROUTE_HC21 EQU 0x400f3115
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC22
CYREG_UDB_P0_ROUTE_HC22 EQU 0x400f3116
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC23
CYREG_UDB_P0_ROUTE_HC23 EQU 0x400f3117
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC24
CYREG_UDB_P0_ROUTE_HC24 EQU 0x400f3118
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC25
CYREG_UDB_P0_ROUTE_HC25 EQU 0x400f3119
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC26
CYREG_UDB_P0_ROUTE_HC26 EQU 0x400f311a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC27
CYREG_UDB_P0_ROUTE_HC27 EQU 0x400f311b
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC28
CYREG_UDB_P0_ROUTE_HC28 EQU 0x400f311c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC29
CYREG_UDB_P0_ROUTE_HC29 EQU 0x400f311d
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC30
CYREG_UDB_P0_ROUTE_HC30 EQU 0x400f311e
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC31
CYREG_UDB_P0_ROUTE_HC31 EQU 0x400f311f
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC32
CYREG_UDB_P0_ROUTE_HC32 EQU 0x400f3120
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC33
CYREG_UDB_P0_ROUTE_HC33 EQU 0x400f3121
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC34
CYREG_UDB_P0_ROUTE_HC34 EQU 0x400f3122
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC35
CYREG_UDB_P0_ROUTE_HC35 EQU 0x400f3123
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC36
CYREG_UDB_P0_ROUTE_HC36 EQU 0x400f3124
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC37
CYREG_UDB_P0_ROUTE_HC37 EQU 0x400f3125
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC38
CYREG_UDB_P0_ROUTE_HC38 EQU 0x400f3126
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC39
CYREG_UDB_P0_ROUTE_HC39 EQU 0x400f3127
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC40
CYREG_UDB_P0_ROUTE_HC40 EQU 0x400f3128
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC41
CYREG_UDB_P0_ROUTE_HC41 EQU 0x400f3129
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC42
CYREG_UDB_P0_ROUTE_HC42 EQU 0x400f312a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC43
CYREG_UDB_P0_ROUTE_HC43 EQU 0x400f312b
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC44
CYREG_UDB_P0_ROUTE_HC44 EQU 0x400f312c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC45
CYREG_UDB_P0_ROUTE_HC45 EQU 0x400f312d
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC46
CYREG_UDB_P0_ROUTE_HC46 EQU 0x400f312e
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC47
CYREG_UDB_P0_ROUTE_HC47 EQU 0x400f312f
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC48
CYREG_UDB_P0_ROUTE_HC48 EQU 0x400f3130
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC49
CYREG_UDB_P0_ROUTE_HC49 EQU 0x400f3131
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC50
CYREG_UDB_P0_ROUTE_HC50 EQU 0x400f3132
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC51
CYREG_UDB_P0_ROUTE_HC51 EQU 0x400f3133
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC52
CYREG_UDB_P0_ROUTE_HC52 EQU 0x400f3134
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC53
CYREG_UDB_P0_ROUTE_HC53 EQU 0x400f3135
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC54
CYREG_UDB_P0_ROUTE_HC54 EQU 0x400f3136
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC55
CYREG_UDB_P0_ROUTE_HC55 EQU 0x400f3137
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC56
CYREG_UDB_P0_ROUTE_HC56 EQU 0x400f3138
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC57
CYREG_UDB_P0_ROUTE_HC57 EQU 0x400f3139
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC58
CYREG_UDB_P0_ROUTE_HC58 EQU 0x400f313a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC59
CYREG_UDB_P0_ROUTE_HC59 EQU 0x400f313b
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC60
CYREG_UDB_P0_ROUTE_HC60 EQU 0x400f313c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC61
CYREG_UDB_P0_ROUTE_HC61 EQU 0x400f313d
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC62
CYREG_UDB_P0_ROUTE_HC62 EQU 0x400f313e
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC63
CYREG_UDB_P0_ROUTE_HC63 EQU 0x400f313f
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC64
CYREG_UDB_P0_ROUTE_HC64 EQU 0x400f3140
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC65
CYREG_UDB_P0_ROUTE_HC65 EQU 0x400f3141
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC66
CYREG_UDB_P0_ROUTE_HC66 EQU 0x400f3142
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC67
CYREG_UDB_P0_ROUTE_HC67 EQU 0x400f3143
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC68
CYREG_UDB_P0_ROUTE_HC68 EQU 0x400f3144
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC69
CYREG_UDB_P0_ROUTE_HC69 EQU 0x400f3145
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC70
CYREG_UDB_P0_ROUTE_HC70 EQU 0x400f3146
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC71
CYREG_UDB_P0_ROUTE_HC71 EQU 0x400f3147
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC72
CYREG_UDB_P0_ROUTE_HC72 EQU 0x400f3148
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC73
CYREG_UDB_P0_ROUTE_HC73 EQU 0x400f3149
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC74
CYREG_UDB_P0_ROUTE_HC74 EQU 0x400f314a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC75
CYREG_UDB_P0_ROUTE_HC75 EQU 0x400f314b
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC76
CYREG_UDB_P0_ROUTE_HC76 EQU 0x400f314c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC77
CYREG_UDB_P0_ROUTE_HC77 EQU 0x400f314d
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC78
CYREG_UDB_P0_ROUTE_HC78 EQU 0x400f314e
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC79
CYREG_UDB_P0_ROUTE_HC79 EQU 0x400f314f
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC80
CYREG_UDB_P0_ROUTE_HC80 EQU 0x400f3150
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC81
CYREG_UDB_P0_ROUTE_HC81 EQU 0x400f3151
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC82
CYREG_UDB_P0_ROUTE_HC82 EQU 0x400f3152
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC83
CYREG_UDB_P0_ROUTE_HC83 EQU 0x400f3153
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC84
CYREG_UDB_P0_ROUTE_HC84 EQU 0x400f3154
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC85
CYREG_UDB_P0_ROUTE_HC85 EQU 0x400f3155
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC86
CYREG_UDB_P0_ROUTE_HC86 EQU 0x400f3156
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC87
CYREG_UDB_P0_ROUTE_HC87 EQU 0x400f3157
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC88
CYREG_UDB_P0_ROUTE_HC88 EQU 0x400f3158
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC89
CYREG_UDB_P0_ROUTE_HC89 EQU 0x400f3159
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC90
CYREG_UDB_P0_ROUTE_HC90 EQU 0x400f315a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC91
CYREG_UDB_P0_ROUTE_HC91 EQU 0x400f315b
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC92
CYREG_UDB_P0_ROUTE_HC92 EQU 0x400f315c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC93
CYREG_UDB_P0_ROUTE_HC93 EQU 0x400f315d
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC94
CYREG_UDB_P0_ROUTE_HC94 EQU 0x400f315e
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC95
CYREG_UDB_P0_ROUTE_HC95 EQU 0x400f315f
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC96
CYREG_UDB_P0_ROUTE_HC96 EQU 0x400f3160
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC97
CYREG_UDB_P0_ROUTE_HC97 EQU 0x400f3161
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC98
CYREG_UDB_P0_ROUTE_HC98 EQU 0x400f3162
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC99
CYREG_UDB_P0_ROUTE_HC99 EQU 0x400f3163
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC100
CYREG_UDB_P0_ROUTE_HC100 EQU 0x400f3164
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC101
CYREG_UDB_P0_ROUTE_HC101 EQU 0x400f3165
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC102
CYREG_UDB_P0_ROUTE_HC102 EQU 0x400f3166
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC103
CYREG_UDB_P0_ROUTE_HC103 EQU 0x400f3167
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC104
CYREG_UDB_P0_ROUTE_HC104 EQU 0x400f3168
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC105
CYREG_UDB_P0_ROUTE_HC105 EQU 0x400f3169
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC106
CYREG_UDB_P0_ROUTE_HC106 EQU 0x400f316a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC107
CYREG_UDB_P0_ROUTE_HC107 EQU 0x400f316b
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC108
CYREG_UDB_P0_ROUTE_HC108 EQU 0x400f316c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC109
CYREG_UDB_P0_ROUTE_HC109 EQU 0x400f316d
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC110
CYREG_UDB_P0_ROUTE_HC110 EQU 0x400f316e
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC111
CYREG_UDB_P0_ROUTE_HC111 EQU 0x400f316f
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC112
CYREG_UDB_P0_ROUTE_HC112 EQU 0x400f3170
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC113
CYREG_UDB_P0_ROUTE_HC113 EQU 0x400f3171
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC114
CYREG_UDB_P0_ROUTE_HC114 EQU 0x400f3172
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC115
CYREG_UDB_P0_ROUTE_HC115 EQU 0x400f3173
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC116
CYREG_UDB_P0_ROUTE_HC116 EQU 0x400f3174
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC117
CYREG_UDB_P0_ROUTE_HC117 EQU 0x400f3175
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC118
CYREG_UDB_P0_ROUTE_HC118 EQU 0x400f3176
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC119
CYREG_UDB_P0_ROUTE_HC119 EQU 0x400f3177
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC120
CYREG_UDB_P0_ROUTE_HC120 EQU 0x400f3178
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC121
CYREG_UDB_P0_ROUTE_HC121 EQU 0x400f3179
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC122
CYREG_UDB_P0_ROUTE_HC122 EQU 0x400f317a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC123
CYREG_UDB_P0_ROUTE_HC123 EQU 0x400f317b
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC124
CYREG_UDB_P0_ROUTE_HC124 EQU 0x400f317c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC125
CYREG_UDB_P0_ROUTE_HC125 EQU 0x400f317d
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC126
CYREG_UDB_P0_ROUTE_HC126 EQU 0x400f317e
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC127
CYREG_UDB_P0_ROUTE_HC127 EQU 0x400f317f
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L0
CYREG_UDB_P0_ROUTE_HV_L0 EQU 0x400f3180
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_HV_BYTE__OFFSET
CYFLD_UDB_P_ROUTE_HV_BYTE__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_HV_BYTE__SIZE
CYFLD_UDB_P_ROUTE_HV_BYTE__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L1
CYREG_UDB_P0_ROUTE_HV_L1 EQU 0x400f3181
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L2
CYREG_UDB_P0_ROUTE_HV_L2 EQU 0x400f3182
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L3
CYREG_UDB_P0_ROUTE_HV_L3 EQU 0x400f3183
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L4
CYREG_UDB_P0_ROUTE_HV_L4 EQU 0x400f3184
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L5
CYREG_UDB_P0_ROUTE_HV_L5 EQU 0x400f3185
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L6
CYREG_UDB_P0_ROUTE_HV_L6 EQU 0x400f3186
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L7
CYREG_UDB_P0_ROUTE_HV_L7 EQU 0x400f3187
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L8
CYREG_UDB_P0_ROUTE_HV_L8 EQU 0x400f3188
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L9
CYREG_UDB_P0_ROUTE_HV_L9 EQU 0x400f3189
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L10
CYREG_UDB_P0_ROUTE_HV_L10 EQU 0x400f318a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L11
CYREG_UDB_P0_ROUTE_HV_L11 EQU 0x400f318b
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L12
CYREG_UDB_P0_ROUTE_HV_L12 EQU 0x400f318c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L13
CYREG_UDB_P0_ROUTE_HV_L13 EQU 0x400f318d
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L14
CYREG_UDB_P0_ROUTE_HV_L14 EQU 0x400f318e
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L15
CYREG_UDB_P0_ROUTE_HV_L15 EQU 0x400f318f
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS0
CYREG_UDB_P0_ROUTE_HS0 EQU 0x400f3190
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_HS_BYTE__OFFSET
CYFLD_UDB_P_ROUTE_HS_BYTE__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_HS_BYTE__SIZE
CYFLD_UDB_P_ROUTE_HS_BYTE__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS1
CYREG_UDB_P0_ROUTE_HS1 EQU 0x400f3191
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS2
CYREG_UDB_P0_ROUTE_HS2 EQU 0x400f3192
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS3
CYREG_UDB_P0_ROUTE_HS3 EQU 0x400f3193
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS4
CYREG_UDB_P0_ROUTE_HS4 EQU 0x400f3194
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS5
CYREG_UDB_P0_ROUTE_HS5 EQU 0x400f3195
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS6
CYREG_UDB_P0_ROUTE_HS6 EQU 0x400f3196
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS7
CYREG_UDB_P0_ROUTE_HS7 EQU 0x400f3197
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS8
CYREG_UDB_P0_ROUTE_HS8 EQU 0x400f3198
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS9
CYREG_UDB_P0_ROUTE_HS9 EQU 0x400f3199
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS10
CYREG_UDB_P0_ROUTE_HS10 EQU 0x400f319a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS11
CYREG_UDB_P0_ROUTE_HS11 EQU 0x400f319b
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS12
CYREG_UDB_P0_ROUTE_HS12 EQU 0x400f319c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS13
CYREG_UDB_P0_ROUTE_HS13 EQU 0x400f319d
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS14
CYREG_UDB_P0_ROUTE_HS14 EQU 0x400f319e
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS15
CYREG_UDB_P0_ROUTE_HS15 EQU 0x400f319f
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS16
CYREG_UDB_P0_ROUTE_HS16 EQU 0x400f31a0
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS17
CYREG_UDB_P0_ROUTE_HS17 EQU 0x400f31a1
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS18
CYREG_UDB_P0_ROUTE_HS18 EQU 0x400f31a2
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS19
CYREG_UDB_P0_ROUTE_HS19 EQU 0x400f31a3
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS20
CYREG_UDB_P0_ROUTE_HS20 EQU 0x400f31a4
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS21
CYREG_UDB_P0_ROUTE_HS21 EQU 0x400f31a5
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS22
CYREG_UDB_P0_ROUTE_HS22 EQU 0x400f31a6
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS23
CYREG_UDB_P0_ROUTE_HS23 EQU 0x400f31a7
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R0
CYREG_UDB_P0_ROUTE_HV_R0 EQU 0x400f31a8
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R1
CYREG_UDB_P0_ROUTE_HV_R1 EQU 0x400f31a9
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R2
CYREG_UDB_P0_ROUTE_HV_R2 EQU 0x400f31aa
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R3
CYREG_UDB_P0_ROUTE_HV_R3 EQU 0x400f31ab
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R4
CYREG_UDB_P0_ROUTE_HV_R4 EQU 0x400f31ac
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R5
CYREG_UDB_P0_ROUTE_HV_R5 EQU 0x400f31ad
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R6
CYREG_UDB_P0_ROUTE_HV_R6 EQU 0x400f31ae
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R7
CYREG_UDB_P0_ROUTE_HV_R7 EQU 0x400f31af
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R8
CYREG_UDB_P0_ROUTE_HV_R8 EQU 0x400f31b0
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R9
CYREG_UDB_P0_ROUTE_HV_R9 EQU 0x400f31b1
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R10
CYREG_UDB_P0_ROUTE_HV_R10 EQU 0x400f31b2
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R11
CYREG_UDB_P0_ROUTE_HV_R11 EQU 0x400f31b3
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R12
CYREG_UDB_P0_ROUTE_HV_R12 EQU 0x400f31b4
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R13
CYREG_UDB_P0_ROUTE_HV_R13 EQU 0x400f31b5
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R14
CYREG_UDB_P0_ROUTE_HV_R14 EQU 0x400f31b6
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R15
CYREG_UDB_P0_ROUTE_HV_R15 EQU 0x400f31b7
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_PLD0IN0
CYREG_UDB_P0_ROUTE_PLD0IN0 EQU 0x400f31c0
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_PI_TOP__OFFSET
CYFLD_UDB_P_ROUTE_PI_TOP__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_PI_TOP__SIZE
CYFLD_UDB_P_ROUTE_PI_TOP__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_PI_BOT__OFFSET
CYFLD_UDB_P_ROUTE_PI_BOT__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_PI_BOT__SIZE
CYFLD_UDB_P_ROUTE_PI_BOT__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_PLD0IN1
CYREG_UDB_P0_ROUTE_PLD0IN1 EQU 0x400f31c2
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_PLD0IN2
CYREG_UDB_P0_ROUTE_PLD0IN2 EQU 0x400f31c4
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_PLD1IN0
CYREG_UDB_P0_ROUTE_PLD1IN0 EQU 0x400f31ca
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_PLD1IN1
CYREG_UDB_P0_ROUTE_PLD1IN1 EQU 0x400f31cc
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_PLD1IN2
CYREG_UDB_P0_ROUTE_PLD1IN2 EQU 0x400f31ce
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_DPIN0
CYREG_UDB_P0_ROUTE_DPIN0 EQU 0x400f31d0
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_DPIN1
CYREG_UDB_P0_ROUTE_DPIN1 EQU 0x400f31d2
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_PI_TOP2__OFFSET
CYFLD_UDB_P_ROUTE_PI_TOP2__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_PI_TOP2__SIZE
CYFLD_UDB_P_ROUTE_PI_TOP2__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_PI_BOT2__OFFSET
CYFLD_UDB_P_ROUTE_PI_BOT2__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_PI_BOT2__SIZE
CYFLD_UDB_P_ROUTE_PI_BOT2__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_SCIN
CYREG_UDB_P0_ROUTE_SCIN EQU 0x400f31d6
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_SCIOIN
CYREG_UDB_P0_ROUTE_SCIOIN EQU 0x400f31d8
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_RCIN
CYREG_UDB_P0_ROUTE_RCIN EQU 0x400f31de
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_VS0
CYREG_UDB_P0_ROUTE_VS0 EQU 0x400f31e0
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_VS_TOP__OFFSET
CYFLD_UDB_P_ROUTE_VS_TOP__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_VS_TOP__SIZE
CYFLD_UDB_P_ROUTE_VS_TOP__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_VS_BOT__OFFSET
CYFLD_UDB_P_ROUTE_VS_BOT__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_VS_BOT__SIZE
CYFLD_UDB_P_ROUTE_VS_BOT__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_VS1
CYREG_UDB_P0_ROUTE_VS1 EQU 0x400f31e2
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_VS2
CYREG_UDB_P0_ROUTE_VS2 EQU 0x400f31e4
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_VS3
CYREG_UDB_P0_ROUTE_VS3 EQU 0x400f31e6
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_VS4
CYREG_UDB_P0_ROUTE_VS4 EQU 0x400f31e8
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_VS5
CYREG_UDB_P0_ROUTE_VS5 EQU 0x400f31ea
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_VS6
CYREG_UDB_P0_ROUTE_VS6 EQU 0x400f31ec
ENDIF
IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_VS7
CYREG_UDB_P0_ROUTE_VS7 EQU 0x400f31ee
ENDIF
IF :LNOT::DEF:CYDEV_UDB_P1_BASE
CYDEV_UDB_P1_BASE EQU 0x400f3200
ENDIF
IF :LNOT::DEF:CYDEV_UDB_P1_SIZE
CYDEV_UDB_P1_SIZE EQU 0x00000200
ENDIF
IF :LNOT::DEF:CYDEV_UDB_P1_U0_BASE
CYDEV_UDB_P1_U0_BASE EQU 0x400f3200
ENDIF
IF :LNOT::DEF:CYDEV_UDB_P1_U0_SIZE
CYDEV_UDB_P1_U0_SIZE EQU 0x00000080
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_IT0
CYREG_UDB_P1_U0_PLD_IT0 EQU 0x400f3200
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_IT1
CYREG_UDB_P1_U0_PLD_IT1 EQU 0x400f3204
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_IT2
CYREG_UDB_P1_U0_PLD_IT2 EQU 0x400f3208
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_IT3
CYREG_UDB_P1_U0_PLD_IT3 EQU 0x400f320c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_IT4
CYREG_UDB_P1_U0_PLD_IT4 EQU 0x400f3210
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_IT5
CYREG_UDB_P1_U0_PLD_IT5 EQU 0x400f3214
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_IT6
CYREG_UDB_P1_U0_PLD_IT6 EQU 0x400f3218
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_IT7
CYREG_UDB_P1_U0_PLD_IT7 EQU 0x400f321c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_IT8
CYREG_UDB_P1_U0_PLD_IT8 EQU 0x400f3220
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_IT9
CYREG_UDB_P1_U0_PLD_IT9 EQU 0x400f3224
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_IT10
CYREG_UDB_P1_U0_PLD_IT10 EQU 0x400f3228
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_IT11
CYREG_UDB_P1_U0_PLD_IT11 EQU 0x400f322c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_ORT0
CYREG_UDB_P1_U0_PLD_ORT0 EQU 0x400f3230
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_ORT1
CYREG_UDB_P1_U0_PLD_ORT1 EQU 0x400f3232
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_ORT2
CYREG_UDB_P1_U0_PLD_ORT2 EQU 0x400f3234
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_ORT3
CYREG_UDB_P1_U0_PLD_ORT3 EQU 0x400f3236
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_MC_CFG_CEN_CONST
CYREG_UDB_P1_U0_PLD_MC_CFG_CEN_CONST EQU 0x400f3238
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_MC_CFG_XORFB
CYREG_UDB_P1_U0_PLD_MC_CFG_XORFB EQU 0x400f323a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_MC_SET_RESET
CYREG_UDB_P1_U0_PLD_MC_SET_RESET EQU 0x400f323c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_MC_CFG_BYPASS
CYREG_UDB_P1_U0_PLD_MC_CFG_BYPASS EQU 0x400f323e
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG0
CYREG_UDB_P1_U0_CFG0 EQU 0x400f3240
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG1
CYREG_UDB_P1_U0_CFG1 EQU 0x400f3241
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG2
CYREG_UDB_P1_U0_CFG2 EQU 0x400f3242
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG3
CYREG_UDB_P1_U0_CFG3 EQU 0x400f3243
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG4
CYREG_UDB_P1_U0_CFG4 EQU 0x400f3244
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG5
CYREG_UDB_P1_U0_CFG5 EQU 0x400f3245
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG6
CYREG_UDB_P1_U0_CFG6 EQU 0x400f3246
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG7
CYREG_UDB_P1_U0_CFG7 EQU 0x400f3247
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG8
CYREG_UDB_P1_U0_CFG8 EQU 0x400f3248
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG9
CYREG_UDB_P1_U0_CFG9 EQU 0x400f3249
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG10
CYREG_UDB_P1_U0_CFG10 EQU 0x400f324a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG11
CYREG_UDB_P1_U0_CFG11 EQU 0x400f324b
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG12
CYREG_UDB_P1_U0_CFG12 EQU 0x400f324c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG13
CYREG_UDB_P1_U0_CFG13 EQU 0x400f324d
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG14
CYREG_UDB_P1_U0_CFG14 EQU 0x400f324e
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG15
CYREG_UDB_P1_U0_CFG15 EQU 0x400f324f
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG16
CYREG_UDB_P1_U0_CFG16 EQU 0x400f3250
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG17
CYREG_UDB_P1_U0_CFG17 EQU 0x400f3251
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG18
CYREG_UDB_P1_U0_CFG18 EQU 0x400f3252
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG19
CYREG_UDB_P1_U0_CFG19 EQU 0x400f3253
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG20
CYREG_UDB_P1_U0_CFG20 EQU 0x400f3254
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG21
CYREG_UDB_P1_U0_CFG21 EQU 0x400f3255
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG22
CYREG_UDB_P1_U0_CFG22 EQU 0x400f3256
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG23
CYREG_UDB_P1_U0_CFG23 EQU 0x400f3257
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG24
CYREG_UDB_P1_U0_CFG24 EQU 0x400f3258
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG25
CYREG_UDB_P1_U0_CFG25 EQU 0x400f3259
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG26
CYREG_UDB_P1_U0_CFG26 EQU 0x400f325a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG27
CYREG_UDB_P1_U0_CFG27 EQU 0x400f325b
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG28
CYREG_UDB_P1_U0_CFG28 EQU 0x400f325c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG29
CYREG_UDB_P1_U0_CFG29 EQU 0x400f325d
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG30
CYREG_UDB_P1_U0_CFG30 EQU 0x400f325e
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG31
CYREG_UDB_P1_U0_CFG31 EQU 0x400f325f
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_DCFG0
CYREG_UDB_P1_U0_DCFG0 EQU 0x400f3260
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_DCFG1
CYREG_UDB_P1_U0_DCFG1 EQU 0x400f3262
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_DCFG2
CYREG_UDB_P1_U0_DCFG2 EQU 0x400f3264
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_DCFG3
CYREG_UDB_P1_U0_DCFG3 EQU 0x400f3266
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_DCFG4
CYREG_UDB_P1_U0_DCFG4 EQU 0x400f3268
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_DCFG5
CYREG_UDB_P1_U0_DCFG5 EQU 0x400f326a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_DCFG6
CYREG_UDB_P1_U0_DCFG6 EQU 0x400f326c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U0_DCFG7
CYREG_UDB_P1_U0_DCFG7 EQU 0x400f326e
ENDIF
IF :LNOT::DEF:CYDEV_UDB_P1_U1_BASE
CYDEV_UDB_P1_U1_BASE EQU 0x400f3280
ENDIF
IF :LNOT::DEF:CYDEV_UDB_P1_U1_SIZE
CYDEV_UDB_P1_U1_SIZE EQU 0x00000080
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_IT0
CYREG_UDB_P1_U1_PLD_IT0 EQU 0x400f3280
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_IT1
CYREG_UDB_P1_U1_PLD_IT1 EQU 0x400f3284
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_IT2
CYREG_UDB_P1_U1_PLD_IT2 EQU 0x400f3288
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_IT3
CYREG_UDB_P1_U1_PLD_IT3 EQU 0x400f328c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_IT4
CYREG_UDB_P1_U1_PLD_IT4 EQU 0x400f3290
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_IT5
CYREG_UDB_P1_U1_PLD_IT5 EQU 0x400f3294
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_IT6
CYREG_UDB_P1_U1_PLD_IT6 EQU 0x400f3298
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_IT7
CYREG_UDB_P1_U1_PLD_IT7 EQU 0x400f329c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_IT8
CYREG_UDB_P1_U1_PLD_IT8 EQU 0x400f32a0
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_IT9
CYREG_UDB_P1_U1_PLD_IT9 EQU 0x400f32a4
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_IT10
CYREG_UDB_P1_U1_PLD_IT10 EQU 0x400f32a8
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_IT11
CYREG_UDB_P1_U1_PLD_IT11 EQU 0x400f32ac
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_ORT0
CYREG_UDB_P1_U1_PLD_ORT0 EQU 0x400f32b0
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_ORT1
CYREG_UDB_P1_U1_PLD_ORT1 EQU 0x400f32b2
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_ORT2
CYREG_UDB_P1_U1_PLD_ORT2 EQU 0x400f32b4
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_ORT3
CYREG_UDB_P1_U1_PLD_ORT3 EQU 0x400f32b6
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_MC_CFG_CEN_CONST
CYREG_UDB_P1_U1_PLD_MC_CFG_CEN_CONST EQU 0x400f32b8
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_MC_CFG_XORFB
CYREG_UDB_P1_U1_PLD_MC_CFG_XORFB EQU 0x400f32ba
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_MC_SET_RESET
CYREG_UDB_P1_U1_PLD_MC_SET_RESET EQU 0x400f32bc
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_MC_CFG_BYPASS
CYREG_UDB_P1_U1_PLD_MC_CFG_BYPASS EQU 0x400f32be
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG0
CYREG_UDB_P1_U1_CFG0 EQU 0x400f32c0
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG1
CYREG_UDB_P1_U1_CFG1 EQU 0x400f32c1
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG2
CYREG_UDB_P1_U1_CFG2 EQU 0x400f32c2
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG3
CYREG_UDB_P1_U1_CFG3 EQU 0x400f32c3
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG4
CYREG_UDB_P1_U1_CFG4 EQU 0x400f32c4
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG5
CYREG_UDB_P1_U1_CFG5 EQU 0x400f32c5
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG6
CYREG_UDB_P1_U1_CFG6 EQU 0x400f32c6
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG7
CYREG_UDB_P1_U1_CFG7 EQU 0x400f32c7
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG8
CYREG_UDB_P1_U1_CFG8 EQU 0x400f32c8
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG9
CYREG_UDB_P1_U1_CFG9 EQU 0x400f32c9
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG10
CYREG_UDB_P1_U1_CFG10 EQU 0x400f32ca
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG11
CYREG_UDB_P1_U1_CFG11 EQU 0x400f32cb
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG12
CYREG_UDB_P1_U1_CFG12 EQU 0x400f32cc
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG13
CYREG_UDB_P1_U1_CFG13 EQU 0x400f32cd
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG14
CYREG_UDB_P1_U1_CFG14 EQU 0x400f32ce
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG15
CYREG_UDB_P1_U1_CFG15 EQU 0x400f32cf
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG16
CYREG_UDB_P1_U1_CFG16 EQU 0x400f32d0
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG17
CYREG_UDB_P1_U1_CFG17 EQU 0x400f32d1
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG18
CYREG_UDB_P1_U1_CFG18 EQU 0x400f32d2
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG19
CYREG_UDB_P1_U1_CFG19 EQU 0x400f32d3
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG20
CYREG_UDB_P1_U1_CFG20 EQU 0x400f32d4
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG21
CYREG_UDB_P1_U1_CFG21 EQU 0x400f32d5
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG22
CYREG_UDB_P1_U1_CFG22 EQU 0x400f32d6
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG23
CYREG_UDB_P1_U1_CFG23 EQU 0x400f32d7
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG24
CYREG_UDB_P1_U1_CFG24 EQU 0x400f32d8
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG25
CYREG_UDB_P1_U1_CFG25 EQU 0x400f32d9
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG26
CYREG_UDB_P1_U1_CFG26 EQU 0x400f32da
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG27
CYREG_UDB_P1_U1_CFG27 EQU 0x400f32db
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG28
CYREG_UDB_P1_U1_CFG28 EQU 0x400f32dc
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG29
CYREG_UDB_P1_U1_CFG29 EQU 0x400f32dd
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG30
CYREG_UDB_P1_U1_CFG30 EQU 0x400f32de
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG31
CYREG_UDB_P1_U1_CFG31 EQU 0x400f32df
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_DCFG0
CYREG_UDB_P1_U1_DCFG0 EQU 0x400f32e0
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_DCFG1
CYREG_UDB_P1_U1_DCFG1 EQU 0x400f32e2
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_DCFG2
CYREG_UDB_P1_U1_DCFG2 EQU 0x400f32e4
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_DCFG3
CYREG_UDB_P1_U1_DCFG3 EQU 0x400f32e6
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_DCFG4
CYREG_UDB_P1_U1_DCFG4 EQU 0x400f32e8
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_DCFG5
CYREG_UDB_P1_U1_DCFG5 EQU 0x400f32ea
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_DCFG6
CYREG_UDB_P1_U1_DCFG6 EQU 0x400f32ec
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_U1_DCFG7
CYREG_UDB_P1_U1_DCFG7 EQU 0x400f32ee
ENDIF
IF :LNOT::DEF:CYDEV_UDB_P1_ROUTE_BASE
CYDEV_UDB_P1_ROUTE_BASE EQU 0x400f3300
ENDIF
IF :LNOT::DEF:CYDEV_UDB_P1_ROUTE_SIZE
CYDEV_UDB_P1_ROUTE_SIZE EQU 0x00000100
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC0
CYREG_UDB_P1_ROUTE_HC0 EQU 0x400f3300
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC1
CYREG_UDB_P1_ROUTE_HC1 EQU 0x400f3301
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC2
CYREG_UDB_P1_ROUTE_HC2 EQU 0x400f3302
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC3
CYREG_UDB_P1_ROUTE_HC3 EQU 0x400f3303
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC4
CYREG_UDB_P1_ROUTE_HC4 EQU 0x400f3304
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC5
CYREG_UDB_P1_ROUTE_HC5 EQU 0x400f3305
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC6
CYREG_UDB_P1_ROUTE_HC6 EQU 0x400f3306
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC7
CYREG_UDB_P1_ROUTE_HC7 EQU 0x400f3307
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC8
CYREG_UDB_P1_ROUTE_HC8 EQU 0x400f3308
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC9
CYREG_UDB_P1_ROUTE_HC9 EQU 0x400f3309
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC10
CYREG_UDB_P1_ROUTE_HC10 EQU 0x400f330a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC11
CYREG_UDB_P1_ROUTE_HC11 EQU 0x400f330b
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC12
CYREG_UDB_P1_ROUTE_HC12 EQU 0x400f330c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC13
CYREG_UDB_P1_ROUTE_HC13 EQU 0x400f330d
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC14
CYREG_UDB_P1_ROUTE_HC14 EQU 0x400f330e
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC15
CYREG_UDB_P1_ROUTE_HC15 EQU 0x400f330f
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC16
CYREG_UDB_P1_ROUTE_HC16 EQU 0x400f3310
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC17
CYREG_UDB_P1_ROUTE_HC17 EQU 0x400f3311
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC18
CYREG_UDB_P1_ROUTE_HC18 EQU 0x400f3312
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC19
CYREG_UDB_P1_ROUTE_HC19 EQU 0x400f3313
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC20
CYREG_UDB_P1_ROUTE_HC20 EQU 0x400f3314
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC21
CYREG_UDB_P1_ROUTE_HC21 EQU 0x400f3315
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC22
CYREG_UDB_P1_ROUTE_HC22 EQU 0x400f3316
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC23
CYREG_UDB_P1_ROUTE_HC23 EQU 0x400f3317
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC24
CYREG_UDB_P1_ROUTE_HC24 EQU 0x400f3318
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC25
CYREG_UDB_P1_ROUTE_HC25 EQU 0x400f3319
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC26
CYREG_UDB_P1_ROUTE_HC26 EQU 0x400f331a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC27
CYREG_UDB_P1_ROUTE_HC27 EQU 0x400f331b
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC28
CYREG_UDB_P1_ROUTE_HC28 EQU 0x400f331c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC29
CYREG_UDB_P1_ROUTE_HC29 EQU 0x400f331d
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC30
CYREG_UDB_P1_ROUTE_HC30 EQU 0x400f331e
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC31
CYREG_UDB_P1_ROUTE_HC31 EQU 0x400f331f
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC32
CYREG_UDB_P1_ROUTE_HC32 EQU 0x400f3320
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC33
CYREG_UDB_P1_ROUTE_HC33 EQU 0x400f3321
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC34
CYREG_UDB_P1_ROUTE_HC34 EQU 0x400f3322
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC35
CYREG_UDB_P1_ROUTE_HC35 EQU 0x400f3323
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC36
CYREG_UDB_P1_ROUTE_HC36 EQU 0x400f3324
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC37
CYREG_UDB_P1_ROUTE_HC37 EQU 0x400f3325
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC38
CYREG_UDB_P1_ROUTE_HC38 EQU 0x400f3326
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC39
CYREG_UDB_P1_ROUTE_HC39 EQU 0x400f3327
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC40
CYREG_UDB_P1_ROUTE_HC40 EQU 0x400f3328
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC41
CYREG_UDB_P1_ROUTE_HC41 EQU 0x400f3329
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC42
CYREG_UDB_P1_ROUTE_HC42 EQU 0x400f332a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC43
CYREG_UDB_P1_ROUTE_HC43 EQU 0x400f332b
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC44
CYREG_UDB_P1_ROUTE_HC44 EQU 0x400f332c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC45
CYREG_UDB_P1_ROUTE_HC45 EQU 0x400f332d
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC46
CYREG_UDB_P1_ROUTE_HC46 EQU 0x400f332e
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC47
CYREG_UDB_P1_ROUTE_HC47 EQU 0x400f332f
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC48
CYREG_UDB_P1_ROUTE_HC48 EQU 0x400f3330
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC49
CYREG_UDB_P1_ROUTE_HC49 EQU 0x400f3331
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC50
CYREG_UDB_P1_ROUTE_HC50 EQU 0x400f3332
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC51
CYREG_UDB_P1_ROUTE_HC51 EQU 0x400f3333
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC52
CYREG_UDB_P1_ROUTE_HC52 EQU 0x400f3334
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC53
CYREG_UDB_P1_ROUTE_HC53 EQU 0x400f3335
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC54
CYREG_UDB_P1_ROUTE_HC54 EQU 0x400f3336
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC55
CYREG_UDB_P1_ROUTE_HC55 EQU 0x400f3337
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC56
CYREG_UDB_P1_ROUTE_HC56 EQU 0x400f3338
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC57
CYREG_UDB_P1_ROUTE_HC57 EQU 0x400f3339
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC58
CYREG_UDB_P1_ROUTE_HC58 EQU 0x400f333a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC59
CYREG_UDB_P1_ROUTE_HC59 EQU 0x400f333b
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC60
CYREG_UDB_P1_ROUTE_HC60 EQU 0x400f333c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC61
CYREG_UDB_P1_ROUTE_HC61 EQU 0x400f333d
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC62
CYREG_UDB_P1_ROUTE_HC62 EQU 0x400f333e
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC63
CYREG_UDB_P1_ROUTE_HC63 EQU 0x400f333f
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC64
CYREG_UDB_P1_ROUTE_HC64 EQU 0x400f3340
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC65
CYREG_UDB_P1_ROUTE_HC65 EQU 0x400f3341
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC66
CYREG_UDB_P1_ROUTE_HC66 EQU 0x400f3342
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC67
CYREG_UDB_P1_ROUTE_HC67 EQU 0x400f3343
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC68
CYREG_UDB_P1_ROUTE_HC68 EQU 0x400f3344
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC69
CYREG_UDB_P1_ROUTE_HC69 EQU 0x400f3345
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC70
CYREG_UDB_P1_ROUTE_HC70 EQU 0x400f3346
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC71
CYREG_UDB_P1_ROUTE_HC71 EQU 0x400f3347
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC72
CYREG_UDB_P1_ROUTE_HC72 EQU 0x400f3348
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC73
CYREG_UDB_P1_ROUTE_HC73 EQU 0x400f3349
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC74
CYREG_UDB_P1_ROUTE_HC74 EQU 0x400f334a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC75
CYREG_UDB_P1_ROUTE_HC75 EQU 0x400f334b
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC76
CYREG_UDB_P1_ROUTE_HC76 EQU 0x400f334c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC77
CYREG_UDB_P1_ROUTE_HC77 EQU 0x400f334d
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC78
CYREG_UDB_P1_ROUTE_HC78 EQU 0x400f334e
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC79
CYREG_UDB_P1_ROUTE_HC79 EQU 0x400f334f
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC80
CYREG_UDB_P1_ROUTE_HC80 EQU 0x400f3350
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC81
CYREG_UDB_P1_ROUTE_HC81 EQU 0x400f3351
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC82
CYREG_UDB_P1_ROUTE_HC82 EQU 0x400f3352
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC83
CYREG_UDB_P1_ROUTE_HC83 EQU 0x400f3353
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC84
CYREG_UDB_P1_ROUTE_HC84 EQU 0x400f3354
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC85
CYREG_UDB_P1_ROUTE_HC85 EQU 0x400f3355
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC86
CYREG_UDB_P1_ROUTE_HC86 EQU 0x400f3356
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC87
CYREG_UDB_P1_ROUTE_HC87 EQU 0x400f3357
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC88
CYREG_UDB_P1_ROUTE_HC88 EQU 0x400f3358
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC89
CYREG_UDB_P1_ROUTE_HC89 EQU 0x400f3359
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC90
CYREG_UDB_P1_ROUTE_HC90 EQU 0x400f335a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC91
CYREG_UDB_P1_ROUTE_HC91 EQU 0x400f335b
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC92
CYREG_UDB_P1_ROUTE_HC92 EQU 0x400f335c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC93
CYREG_UDB_P1_ROUTE_HC93 EQU 0x400f335d
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC94
CYREG_UDB_P1_ROUTE_HC94 EQU 0x400f335e
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC95
CYREG_UDB_P1_ROUTE_HC95 EQU 0x400f335f
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC96
CYREG_UDB_P1_ROUTE_HC96 EQU 0x400f3360
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC97
CYREG_UDB_P1_ROUTE_HC97 EQU 0x400f3361
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC98
CYREG_UDB_P1_ROUTE_HC98 EQU 0x400f3362
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC99
CYREG_UDB_P1_ROUTE_HC99 EQU 0x400f3363
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC100
CYREG_UDB_P1_ROUTE_HC100 EQU 0x400f3364
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC101
CYREG_UDB_P1_ROUTE_HC101 EQU 0x400f3365
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC102
CYREG_UDB_P1_ROUTE_HC102 EQU 0x400f3366
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC103
CYREG_UDB_P1_ROUTE_HC103 EQU 0x400f3367
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC104
CYREG_UDB_P1_ROUTE_HC104 EQU 0x400f3368
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC105
CYREG_UDB_P1_ROUTE_HC105 EQU 0x400f3369
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC106
CYREG_UDB_P1_ROUTE_HC106 EQU 0x400f336a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC107
CYREG_UDB_P1_ROUTE_HC107 EQU 0x400f336b
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC108
CYREG_UDB_P1_ROUTE_HC108 EQU 0x400f336c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC109
CYREG_UDB_P1_ROUTE_HC109 EQU 0x400f336d
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC110
CYREG_UDB_P1_ROUTE_HC110 EQU 0x400f336e
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC111
CYREG_UDB_P1_ROUTE_HC111 EQU 0x400f336f
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC112
CYREG_UDB_P1_ROUTE_HC112 EQU 0x400f3370
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC113
CYREG_UDB_P1_ROUTE_HC113 EQU 0x400f3371
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC114
CYREG_UDB_P1_ROUTE_HC114 EQU 0x400f3372
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC115
CYREG_UDB_P1_ROUTE_HC115 EQU 0x400f3373
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC116
CYREG_UDB_P1_ROUTE_HC116 EQU 0x400f3374
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC117
CYREG_UDB_P1_ROUTE_HC117 EQU 0x400f3375
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC118
CYREG_UDB_P1_ROUTE_HC118 EQU 0x400f3376
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC119
CYREG_UDB_P1_ROUTE_HC119 EQU 0x400f3377
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC120
CYREG_UDB_P1_ROUTE_HC120 EQU 0x400f3378
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC121
CYREG_UDB_P1_ROUTE_HC121 EQU 0x400f3379
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC122
CYREG_UDB_P1_ROUTE_HC122 EQU 0x400f337a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC123
CYREG_UDB_P1_ROUTE_HC123 EQU 0x400f337b
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC124
CYREG_UDB_P1_ROUTE_HC124 EQU 0x400f337c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC125
CYREG_UDB_P1_ROUTE_HC125 EQU 0x400f337d
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC126
CYREG_UDB_P1_ROUTE_HC126 EQU 0x400f337e
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC127
CYREG_UDB_P1_ROUTE_HC127 EQU 0x400f337f
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L0
CYREG_UDB_P1_ROUTE_HV_L0 EQU 0x400f3380
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L1
CYREG_UDB_P1_ROUTE_HV_L1 EQU 0x400f3381
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L2
CYREG_UDB_P1_ROUTE_HV_L2 EQU 0x400f3382
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L3
CYREG_UDB_P1_ROUTE_HV_L3 EQU 0x400f3383
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L4
CYREG_UDB_P1_ROUTE_HV_L4 EQU 0x400f3384
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L5
CYREG_UDB_P1_ROUTE_HV_L5 EQU 0x400f3385
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L6
CYREG_UDB_P1_ROUTE_HV_L6 EQU 0x400f3386
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L7
CYREG_UDB_P1_ROUTE_HV_L7 EQU 0x400f3387
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L8
CYREG_UDB_P1_ROUTE_HV_L8 EQU 0x400f3388
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L9
CYREG_UDB_P1_ROUTE_HV_L9 EQU 0x400f3389
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L10
CYREG_UDB_P1_ROUTE_HV_L10 EQU 0x400f338a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L11
CYREG_UDB_P1_ROUTE_HV_L11 EQU 0x400f338b
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L12
CYREG_UDB_P1_ROUTE_HV_L12 EQU 0x400f338c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L13
CYREG_UDB_P1_ROUTE_HV_L13 EQU 0x400f338d
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L14
CYREG_UDB_P1_ROUTE_HV_L14 EQU 0x400f338e
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L15
CYREG_UDB_P1_ROUTE_HV_L15 EQU 0x400f338f
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS0
CYREG_UDB_P1_ROUTE_HS0 EQU 0x400f3390
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS1
CYREG_UDB_P1_ROUTE_HS1 EQU 0x400f3391
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS2
CYREG_UDB_P1_ROUTE_HS2 EQU 0x400f3392
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS3
CYREG_UDB_P1_ROUTE_HS3 EQU 0x400f3393
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS4
CYREG_UDB_P1_ROUTE_HS4 EQU 0x400f3394
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS5
CYREG_UDB_P1_ROUTE_HS5 EQU 0x400f3395
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS6
CYREG_UDB_P1_ROUTE_HS6 EQU 0x400f3396
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS7
CYREG_UDB_P1_ROUTE_HS7 EQU 0x400f3397
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS8
CYREG_UDB_P1_ROUTE_HS8 EQU 0x400f3398
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS9
CYREG_UDB_P1_ROUTE_HS9 EQU 0x400f3399
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS10
CYREG_UDB_P1_ROUTE_HS10 EQU 0x400f339a
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS11
CYREG_UDB_P1_ROUTE_HS11 EQU 0x400f339b
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS12
CYREG_UDB_P1_ROUTE_HS12 EQU 0x400f339c
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS13
CYREG_UDB_P1_ROUTE_HS13 EQU 0x400f339d
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS14
CYREG_UDB_P1_ROUTE_HS14 EQU 0x400f339e
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS15
CYREG_UDB_P1_ROUTE_HS15 EQU 0x400f339f
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS16
CYREG_UDB_P1_ROUTE_HS16 EQU 0x400f33a0
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS17
CYREG_UDB_P1_ROUTE_HS17 EQU 0x400f33a1
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS18
CYREG_UDB_P1_ROUTE_HS18 EQU 0x400f33a2
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS19
CYREG_UDB_P1_ROUTE_HS19 EQU 0x400f33a3
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS20
CYREG_UDB_P1_ROUTE_HS20 EQU 0x400f33a4
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS21
CYREG_UDB_P1_ROUTE_HS21 EQU 0x400f33a5
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS22
CYREG_UDB_P1_ROUTE_HS22 EQU 0x400f33a6
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS23
CYREG_UDB_P1_ROUTE_HS23 EQU 0x400f33a7
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R0
CYREG_UDB_P1_ROUTE_HV_R0 EQU 0x400f33a8
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R1
CYREG_UDB_P1_ROUTE_HV_R1 EQU 0x400f33a9
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R2
CYREG_UDB_P1_ROUTE_HV_R2 EQU 0x400f33aa
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R3
CYREG_UDB_P1_ROUTE_HV_R3 EQU 0x400f33ab
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R4
CYREG_UDB_P1_ROUTE_HV_R4 EQU 0x400f33ac
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R5
CYREG_UDB_P1_ROUTE_HV_R5 EQU 0x400f33ad
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R6
CYREG_UDB_P1_ROUTE_HV_R6 EQU 0x400f33ae
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R7
CYREG_UDB_P1_ROUTE_HV_R7 EQU 0x400f33af
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R8
CYREG_UDB_P1_ROUTE_HV_R8 EQU 0x400f33b0
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R9
CYREG_UDB_P1_ROUTE_HV_R9 EQU 0x400f33b1
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R10
CYREG_UDB_P1_ROUTE_HV_R10 EQU 0x400f33b2
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R11
CYREG_UDB_P1_ROUTE_HV_R11 EQU 0x400f33b3
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R12
CYREG_UDB_P1_ROUTE_HV_R12 EQU 0x400f33b4
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R13
CYREG_UDB_P1_ROUTE_HV_R13 EQU 0x400f33b5
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R14
CYREG_UDB_P1_ROUTE_HV_R14 EQU 0x400f33b6
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R15
CYREG_UDB_P1_ROUTE_HV_R15 EQU 0x400f33b7
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_PLD0IN0
CYREG_UDB_P1_ROUTE_PLD0IN0 EQU 0x400f33c0
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_PLD0IN1
CYREG_UDB_P1_ROUTE_PLD0IN1 EQU 0x400f33c2
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_PLD0IN2
CYREG_UDB_P1_ROUTE_PLD0IN2 EQU 0x400f33c4
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_PLD1IN0
CYREG_UDB_P1_ROUTE_PLD1IN0 EQU 0x400f33ca
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_PLD1IN1
CYREG_UDB_P1_ROUTE_PLD1IN1 EQU 0x400f33cc
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_PLD1IN2
CYREG_UDB_P1_ROUTE_PLD1IN2 EQU 0x400f33ce
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_DPIN0
CYREG_UDB_P1_ROUTE_DPIN0 EQU 0x400f33d0
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_DPIN1
CYREG_UDB_P1_ROUTE_DPIN1 EQU 0x400f33d2
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_SCIN
CYREG_UDB_P1_ROUTE_SCIN EQU 0x400f33d6
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_SCIOIN
CYREG_UDB_P1_ROUTE_SCIOIN EQU 0x400f33d8
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_RCIN
CYREG_UDB_P1_ROUTE_RCIN EQU 0x400f33de
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_VS0
CYREG_UDB_P1_ROUTE_VS0 EQU 0x400f33e0
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_VS1
CYREG_UDB_P1_ROUTE_VS1 EQU 0x400f33e2
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_VS2
CYREG_UDB_P1_ROUTE_VS2 EQU 0x400f33e4
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_VS3
CYREG_UDB_P1_ROUTE_VS3 EQU 0x400f33e6
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_VS4
CYREG_UDB_P1_ROUTE_VS4 EQU 0x400f33e8
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_VS5
CYREG_UDB_P1_ROUTE_VS5 EQU 0x400f33ea
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_VS6
CYREG_UDB_P1_ROUTE_VS6 EQU 0x400f33ec
ENDIF
IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_VS7
CYREG_UDB_P1_ROUTE_VS7 EQU 0x400f33ee
ENDIF
IF :LNOT::DEF:CYDEV_UDB_DSI0_BASE
CYDEV_UDB_DSI0_BASE EQU 0x400f4000
ENDIF
IF :LNOT::DEF:CYDEV_UDB_DSI0_SIZE
CYDEV_UDB_DSI0_SIZE EQU 0x00000100
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC0
CYREG_UDB_DSI0_HC0 EQU 0x400f4000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_DSI_HC_BYTE__OFFSET
CYFLD_UDB_DSI_HC_BYTE__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_DSI_HC_BYTE__SIZE
CYFLD_UDB_DSI_HC_BYTE__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC1
CYREG_UDB_DSI0_HC1 EQU 0x400f4001
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC2
CYREG_UDB_DSI0_HC2 EQU 0x400f4002
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC3
CYREG_UDB_DSI0_HC3 EQU 0x400f4003
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC4
CYREG_UDB_DSI0_HC4 EQU 0x400f4004
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC5
CYREG_UDB_DSI0_HC5 EQU 0x400f4005
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC6
CYREG_UDB_DSI0_HC6 EQU 0x400f4006
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC7
CYREG_UDB_DSI0_HC7 EQU 0x400f4007
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC8
CYREG_UDB_DSI0_HC8 EQU 0x400f4008
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC9
CYREG_UDB_DSI0_HC9 EQU 0x400f4009
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC10
CYREG_UDB_DSI0_HC10 EQU 0x400f400a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC11
CYREG_UDB_DSI0_HC11 EQU 0x400f400b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC12
CYREG_UDB_DSI0_HC12 EQU 0x400f400c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC13
CYREG_UDB_DSI0_HC13 EQU 0x400f400d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC14
CYREG_UDB_DSI0_HC14 EQU 0x400f400e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC15
CYREG_UDB_DSI0_HC15 EQU 0x400f400f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC16
CYREG_UDB_DSI0_HC16 EQU 0x400f4010
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC17
CYREG_UDB_DSI0_HC17 EQU 0x400f4011
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC18
CYREG_UDB_DSI0_HC18 EQU 0x400f4012
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC19
CYREG_UDB_DSI0_HC19 EQU 0x400f4013
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC20
CYREG_UDB_DSI0_HC20 EQU 0x400f4014
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC21
CYREG_UDB_DSI0_HC21 EQU 0x400f4015
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC22
CYREG_UDB_DSI0_HC22 EQU 0x400f4016
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC23
CYREG_UDB_DSI0_HC23 EQU 0x400f4017
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC24
CYREG_UDB_DSI0_HC24 EQU 0x400f4018
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC25
CYREG_UDB_DSI0_HC25 EQU 0x400f4019
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC26
CYREG_UDB_DSI0_HC26 EQU 0x400f401a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC27
CYREG_UDB_DSI0_HC27 EQU 0x400f401b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC28
CYREG_UDB_DSI0_HC28 EQU 0x400f401c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC29
CYREG_UDB_DSI0_HC29 EQU 0x400f401d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC30
CYREG_UDB_DSI0_HC30 EQU 0x400f401e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC31
CYREG_UDB_DSI0_HC31 EQU 0x400f401f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC32
CYREG_UDB_DSI0_HC32 EQU 0x400f4020
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC33
CYREG_UDB_DSI0_HC33 EQU 0x400f4021
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC34
CYREG_UDB_DSI0_HC34 EQU 0x400f4022
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC35
CYREG_UDB_DSI0_HC35 EQU 0x400f4023
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC36
CYREG_UDB_DSI0_HC36 EQU 0x400f4024
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC37
CYREG_UDB_DSI0_HC37 EQU 0x400f4025
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC38
CYREG_UDB_DSI0_HC38 EQU 0x400f4026
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC39
CYREG_UDB_DSI0_HC39 EQU 0x400f4027
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC40
CYREG_UDB_DSI0_HC40 EQU 0x400f4028
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC41
CYREG_UDB_DSI0_HC41 EQU 0x400f4029
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC42
CYREG_UDB_DSI0_HC42 EQU 0x400f402a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC43
CYREG_UDB_DSI0_HC43 EQU 0x400f402b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC44
CYREG_UDB_DSI0_HC44 EQU 0x400f402c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC45
CYREG_UDB_DSI0_HC45 EQU 0x400f402d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC46
CYREG_UDB_DSI0_HC46 EQU 0x400f402e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC47
CYREG_UDB_DSI0_HC47 EQU 0x400f402f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC48
CYREG_UDB_DSI0_HC48 EQU 0x400f4030
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC49
CYREG_UDB_DSI0_HC49 EQU 0x400f4031
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC50
CYREG_UDB_DSI0_HC50 EQU 0x400f4032
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC51
CYREG_UDB_DSI0_HC51 EQU 0x400f4033
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC52
CYREG_UDB_DSI0_HC52 EQU 0x400f4034
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC53
CYREG_UDB_DSI0_HC53 EQU 0x400f4035
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC54
CYREG_UDB_DSI0_HC54 EQU 0x400f4036
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC55
CYREG_UDB_DSI0_HC55 EQU 0x400f4037
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC56
CYREG_UDB_DSI0_HC56 EQU 0x400f4038
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC57
CYREG_UDB_DSI0_HC57 EQU 0x400f4039
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC58
CYREG_UDB_DSI0_HC58 EQU 0x400f403a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC59
CYREG_UDB_DSI0_HC59 EQU 0x400f403b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC60
CYREG_UDB_DSI0_HC60 EQU 0x400f403c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC61
CYREG_UDB_DSI0_HC61 EQU 0x400f403d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC62
CYREG_UDB_DSI0_HC62 EQU 0x400f403e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC63
CYREG_UDB_DSI0_HC63 EQU 0x400f403f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC64
CYREG_UDB_DSI0_HC64 EQU 0x400f4040
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC65
CYREG_UDB_DSI0_HC65 EQU 0x400f4041
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC66
CYREG_UDB_DSI0_HC66 EQU 0x400f4042
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC67
CYREG_UDB_DSI0_HC67 EQU 0x400f4043
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC68
CYREG_UDB_DSI0_HC68 EQU 0x400f4044
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC69
CYREG_UDB_DSI0_HC69 EQU 0x400f4045
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC70
CYREG_UDB_DSI0_HC70 EQU 0x400f4046
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC71
CYREG_UDB_DSI0_HC71 EQU 0x400f4047
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC72
CYREG_UDB_DSI0_HC72 EQU 0x400f4048
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC73
CYREG_UDB_DSI0_HC73 EQU 0x400f4049
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC74
CYREG_UDB_DSI0_HC74 EQU 0x400f404a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC75
CYREG_UDB_DSI0_HC75 EQU 0x400f404b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC76
CYREG_UDB_DSI0_HC76 EQU 0x400f404c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC77
CYREG_UDB_DSI0_HC77 EQU 0x400f404d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC78
CYREG_UDB_DSI0_HC78 EQU 0x400f404e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC79
CYREG_UDB_DSI0_HC79 EQU 0x400f404f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC80
CYREG_UDB_DSI0_HC80 EQU 0x400f4050
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC81
CYREG_UDB_DSI0_HC81 EQU 0x400f4051
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC82
CYREG_UDB_DSI0_HC82 EQU 0x400f4052
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC83
CYREG_UDB_DSI0_HC83 EQU 0x400f4053
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC84
CYREG_UDB_DSI0_HC84 EQU 0x400f4054
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC85
CYREG_UDB_DSI0_HC85 EQU 0x400f4055
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC86
CYREG_UDB_DSI0_HC86 EQU 0x400f4056
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC87
CYREG_UDB_DSI0_HC87 EQU 0x400f4057
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC88
CYREG_UDB_DSI0_HC88 EQU 0x400f4058
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC89
CYREG_UDB_DSI0_HC89 EQU 0x400f4059
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC90
CYREG_UDB_DSI0_HC90 EQU 0x400f405a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC91
CYREG_UDB_DSI0_HC91 EQU 0x400f405b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC92
CYREG_UDB_DSI0_HC92 EQU 0x400f405c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC93
CYREG_UDB_DSI0_HC93 EQU 0x400f405d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC94
CYREG_UDB_DSI0_HC94 EQU 0x400f405e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC95
CYREG_UDB_DSI0_HC95 EQU 0x400f405f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC96
CYREG_UDB_DSI0_HC96 EQU 0x400f4060
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC97
CYREG_UDB_DSI0_HC97 EQU 0x400f4061
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC98
CYREG_UDB_DSI0_HC98 EQU 0x400f4062
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC99
CYREG_UDB_DSI0_HC99 EQU 0x400f4063
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC100
CYREG_UDB_DSI0_HC100 EQU 0x400f4064
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC101
CYREG_UDB_DSI0_HC101 EQU 0x400f4065
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC102
CYREG_UDB_DSI0_HC102 EQU 0x400f4066
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC103
CYREG_UDB_DSI0_HC103 EQU 0x400f4067
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC104
CYREG_UDB_DSI0_HC104 EQU 0x400f4068
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC105
CYREG_UDB_DSI0_HC105 EQU 0x400f4069
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC106
CYREG_UDB_DSI0_HC106 EQU 0x400f406a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC107
CYREG_UDB_DSI0_HC107 EQU 0x400f406b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC108
CYREG_UDB_DSI0_HC108 EQU 0x400f406c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC109
CYREG_UDB_DSI0_HC109 EQU 0x400f406d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC110
CYREG_UDB_DSI0_HC110 EQU 0x400f406e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC111
CYREG_UDB_DSI0_HC111 EQU 0x400f406f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC112
CYREG_UDB_DSI0_HC112 EQU 0x400f4070
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC113
CYREG_UDB_DSI0_HC113 EQU 0x400f4071
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC114
CYREG_UDB_DSI0_HC114 EQU 0x400f4072
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC115
CYREG_UDB_DSI0_HC115 EQU 0x400f4073
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC116
CYREG_UDB_DSI0_HC116 EQU 0x400f4074
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC117
CYREG_UDB_DSI0_HC117 EQU 0x400f4075
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC118
CYREG_UDB_DSI0_HC118 EQU 0x400f4076
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC119
CYREG_UDB_DSI0_HC119 EQU 0x400f4077
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC120
CYREG_UDB_DSI0_HC120 EQU 0x400f4078
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC121
CYREG_UDB_DSI0_HC121 EQU 0x400f4079
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC122
CYREG_UDB_DSI0_HC122 EQU 0x400f407a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC123
CYREG_UDB_DSI0_HC123 EQU 0x400f407b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC124
CYREG_UDB_DSI0_HC124 EQU 0x400f407c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC125
CYREG_UDB_DSI0_HC125 EQU 0x400f407d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC126
CYREG_UDB_DSI0_HC126 EQU 0x400f407e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HC127
CYREG_UDB_DSI0_HC127 EQU 0x400f407f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L0
CYREG_UDB_DSI0_HV_L0 EQU 0x400f4080
ENDIF
IF :LNOT::DEF:CYFLD_UDB_DSI_HV_BYTE__OFFSET
CYFLD_UDB_DSI_HV_BYTE__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_DSI_HV_BYTE__SIZE
CYFLD_UDB_DSI_HV_BYTE__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L1
CYREG_UDB_DSI0_HV_L1 EQU 0x400f4081
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L2
CYREG_UDB_DSI0_HV_L2 EQU 0x400f4082
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L3
CYREG_UDB_DSI0_HV_L3 EQU 0x400f4083
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L4
CYREG_UDB_DSI0_HV_L4 EQU 0x400f4084
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L5
CYREG_UDB_DSI0_HV_L5 EQU 0x400f4085
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L6
CYREG_UDB_DSI0_HV_L6 EQU 0x400f4086
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L7
CYREG_UDB_DSI0_HV_L7 EQU 0x400f4087
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L8
CYREG_UDB_DSI0_HV_L8 EQU 0x400f4088
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L9
CYREG_UDB_DSI0_HV_L9 EQU 0x400f4089
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L10
CYREG_UDB_DSI0_HV_L10 EQU 0x400f408a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L11
CYREG_UDB_DSI0_HV_L11 EQU 0x400f408b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L12
CYREG_UDB_DSI0_HV_L12 EQU 0x400f408c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L13
CYREG_UDB_DSI0_HV_L13 EQU 0x400f408d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L14
CYREG_UDB_DSI0_HV_L14 EQU 0x400f408e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L15
CYREG_UDB_DSI0_HV_L15 EQU 0x400f408f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HS0
CYREG_UDB_DSI0_HS0 EQU 0x400f4090
ENDIF
IF :LNOT::DEF:CYFLD_UDB_DSI_HS_BYTE__OFFSET
CYFLD_UDB_DSI_HS_BYTE__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_DSI_HS_BYTE__SIZE
CYFLD_UDB_DSI_HS_BYTE__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HS1
CYREG_UDB_DSI0_HS1 EQU 0x400f4091
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HS2
CYREG_UDB_DSI0_HS2 EQU 0x400f4092
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HS3
CYREG_UDB_DSI0_HS3 EQU 0x400f4093
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HS4
CYREG_UDB_DSI0_HS4 EQU 0x400f4094
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HS5
CYREG_UDB_DSI0_HS5 EQU 0x400f4095
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HS6
CYREG_UDB_DSI0_HS6 EQU 0x400f4096
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HS7
CYREG_UDB_DSI0_HS7 EQU 0x400f4097
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HS8
CYREG_UDB_DSI0_HS8 EQU 0x400f4098
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HS9
CYREG_UDB_DSI0_HS9 EQU 0x400f4099
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HS10
CYREG_UDB_DSI0_HS10 EQU 0x400f409a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HS11
CYREG_UDB_DSI0_HS11 EQU 0x400f409b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HS12
CYREG_UDB_DSI0_HS12 EQU 0x400f409c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HS13
CYREG_UDB_DSI0_HS13 EQU 0x400f409d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HS14
CYREG_UDB_DSI0_HS14 EQU 0x400f409e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HS15
CYREG_UDB_DSI0_HS15 EQU 0x400f409f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HS16
CYREG_UDB_DSI0_HS16 EQU 0x400f40a0
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HS17
CYREG_UDB_DSI0_HS17 EQU 0x400f40a1
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HS18
CYREG_UDB_DSI0_HS18 EQU 0x400f40a2
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HS19
CYREG_UDB_DSI0_HS19 EQU 0x400f40a3
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HS20
CYREG_UDB_DSI0_HS20 EQU 0x400f40a4
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HS21
CYREG_UDB_DSI0_HS21 EQU 0x400f40a5
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HS22
CYREG_UDB_DSI0_HS22 EQU 0x400f40a6
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HS23
CYREG_UDB_DSI0_HS23 EQU 0x400f40a7
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R0
CYREG_UDB_DSI0_HV_R0 EQU 0x400f40a8
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R1
CYREG_UDB_DSI0_HV_R1 EQU 0x400f40a9
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R2
CYREG_UDB_DSI0_HV_R2 EQU 0x400f40aa
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R3
CYREG_UDB_DSI0_HV_R3 EQU 0x400f40ab
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R4
CYREG_UDB_DSI0_HV_R4 EQU 0x400f40ac
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R5
CYREG_UDB_DSI0_HV_R5 EQU 0x400f40ad
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R6
CYREG_UDB_DSI0_HV_R6 EQU 0x400f40ae
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R7
CYREG_UDB_DSI0_HV_R7 EQU 0x400f40af
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R8
CYREG_UDB_DSI0_HV_R8 EQU 0x400f40b0
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R9
CYREG_UDB_DSI0_HV_R9 EQU 0x400f40b1
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R10
CYREG_UDB_DSI0_HV_R10 EQU 0x400f40b2
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R11
CYREG_UDB_DSI0_HV_R11 EQU 0x400f40b3
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R12
CYREG_UDB_DSI0_HV_R12 EQU 0x400f40b4
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R13
CYREG_UDB_DSI0_HV_R13 EQU 0x400f40b5
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R14
CYREG_UDB_DSI0_HV_R14 EQU 0x400f40b6
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R15
CYREG_UDB_DSI0_HV_R15 EQU 0x400f40b7
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_DSIINP0
CYREG_UDB_DSI0_DSIINP0 EQU 0x400f40c0
ENDIF
IF :LNOT::DEF:CYFLD_UDB_DSI_PI_TOP__OFFSET
CYFLD_UDB_DSI_PI_TOP__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_DSI_PI_TOP__SIZE
CYFLD_UDB_DSI_PI_TOP__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_DSI_PI_BOT__OFFSET
CYFLD_UDB_DSI_PI_BOT__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_DSI_PI_BOT__SIZE
CYFLD_UDB_DSI_PI_BOT__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_DSIINP1
CYREG_UDB_DSI0_DSIINP1 EQU 0x400f40c2
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_DSIINP2
CYREG_UDB_DSI0_DSIINP2 EQU 0x400f40c4
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_DSIINP3
CYREG_UDB_DSI0_DSIINP3 EQU 0x400f40c6
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_DSIINP4
CYREG_UDB_DSI0_DSIINP4 EQU 0x400f40c8
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_DSIINP5
CYREG_UDB_DSI0_DSIINP5 EQU 0x400f40ca
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_DSIOUTP0
CYREG_UDB_DSI0_DSIOUTP0 EQU 0x400f40cc
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_DSIOUTP1
CYREG_UDB_DSI0_DSIOUTP1 EQU 0x400f40ce
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_DSIOUTP2
CYREG_UDB_DSI0_DSIOUTP2 EQU 0x400f40d0
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_DSIOUTP3
CYREG_UDB_DSI0_DSIOUTP3 EQU 0x400f40d2
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_DSIOUTT0
CYREG_UDB_DSI0_DSIOUTT0 EQU 0x400f40d4
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_DSIOUTT1
CYREG_UDB_DSI0_DSIOUTT1 EQU 0x400f40d6
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_DSIOUTT2
CYREG_UDB_DSI0_DSIOUTT2 EQU 0x400f40d8
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_DSIOUTT3
CYREG_UDB_DSI0_DSIOUTT3 EQU 0x400f40da
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_DSIOUTT4
CYREG_UDB_DSI0_DSIOUTT4 EQU 0x400f40dc
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_DSIOUTT5
CYREG_UDB_DSI0_DSIOUTT5 EQU 0x400f40de
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_VS0
CYREG_UDB_DSI0_VS0 EQU 0x400f40e0
ENDIF
IF :LNOT::DEF:CYFLD_UDB_DSI_VS_TOP__OFFSET
CYFLD_UDB_DSI_VS_TOP__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_DSI_VS_TOP__SIZE
CYFLD_UDB_DSI_VS_TOP__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_DSI_VS_BOT__OFFSET
CYFLD_UDB_DSI_VS_BOT__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_DSI_VS_BOT__SIZE
CYFLD_UDB_DSI_VS_BOT__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_VS1
CYREG_UDB_DSI0_VS1 EQU 0x400f40e2
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_VS2
CYREG_UDB_DSI0_VS2 EQU 0x400f40e4
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_VS3
CYREG_UDB_DSI0_VS3 EQU 0x400f40e6
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_VS4
CYREG_UDB_DSI0_VS4 EQU 0x400f40e8
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_VS5
CYREG_UDB_DSI0_VS5 EQU 0x400f40ea
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_VS6
CYREG_UDB_DSI0_VS6 EQU 0x400f40ec
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI0_VS7
CYREG_UDB_DSI0_VS7 EQU 0x400f40ee
ENDIF
IF :LNOT::DEF:CYDEV_UDB_DSI1_BASE
CYDEV_UDB_DSI1_BASE EQU 0x400f4100
ENDIF
IF :LNOT::DEF:CYDEV_UDB_DSI1_SIZE
CYDEV_UDB_DSI1_SIZE EQU 0x00000100
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC0
CYREG_UDB_DSI1_HC0 EQU 0x400f4100
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC1
CYREG_UDB_DSI1_HC1 EQU 0x400f4101
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC2
CYREG_UDB_DSI1_HC2 EQU 0x400f4102
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC3
CYREG_UDB_DSI1_HC3 EQU 0x400f4103
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC4
CYREG_UDB_DSI1_HC4 EQU 0x400f4104
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC5
CYREG_UDB_DSI1_HC5 EQU 0x400f4105
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC6
CYREG_UDB_DSI1_HC6 EQU 0x400f4106
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC7
CYREG_UDB_DSI1_HC7 EQU 0x400f4107
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC8
CYREG_UDB_DSI1_HC8 EQU 0x400f4108
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC9
CYREG_UDB_DSI1_HC9 EQU 0x400f4109
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC10
CYREG_UDB_DSI1_HC10 EQU 0x400f410a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC11
CYREG_UDB_DSI1_HC11 EQU 0x400f410b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC12
CYREG_UDB_DSI1_HC12 EQU 0x400f410c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC13
CYREG_UDB_DSI1_HC13 EQU 0x400f410d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC14
CYREG_UDB_DSI1_HC14 EQU 0x400f410e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC15
CYREG_UDB_DSI1_HC15 EQU 0x400f410f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC16
CYREG_UDB_DSI1_HC16 EQU 0x400f4110
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC17
CYREG_UDB_DSI1_HC17 EQU 0x400f4111
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC18
CYREG_UDB_DSI1_HC18 EQU 0x400f4112
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC19
CYREG_UDB_DSI1_HC19 EQU 0x400f4113
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC20
CYREG_UDB_DSI1_HC20 EQU 0x400f4114
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC21
CYREG_UDB_DSI1_HC21 EQU 0x400f4115
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC22
CYREG_UDB_DSI1_HC22 EQU 0x400f4116
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC23
CYREG_UDB_DSI1_HC23 EQU 0x400f4117
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC24
CYREG_UDB_DSI1_HC24 EQU 0x400f4118
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC25
CYREG_UDB_DSI1_HC25 EQU 0x400f4119
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC26
CYREG_UDB_DSI1_HC26 EQU 0x400f411a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC27
CYREG_UDB_DSI1_HC27 EQU 0x400f411b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC28
CYREG_UDB_DSI1_HC28 EQU 0x400f411c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC29
CYREG_UDB_DSI1_HC29 EQU 0x400f411d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC30
CYREG_UDB_DSI1_HC30 EQU 0x400f411e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC31
CYREG_UDB_DSI1_HC31 EQU 0x400f411f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC32
CYREG_UDB_DSI1_HC32 EQU 0x400f4120
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC33
CYREG_UDB_DSI1_HC33 EQU 0x400f4121
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC34
CYREG_UDB_DSI1_HC34 EQU 0x400f4122
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC35
CYREG_UDB_DSI1_HC35 EQU 0x400f4123
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC36
CYREG_UDB_DSI1_HC36 EQU 0x400f4124
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC37
CYREG_UDB_DSI1_HC37 EQU 0x400f4125
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC38
CYREG_UDB_DSI1_HC38 EQU 0x400f4126
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC39
CYREG_UDB_DSI1_HC39 EQU 0x400f4127
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC40
CYREG_UDB_DSI1_HC40 EQU 0x400f4128
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC41
CYREG_UDB_DSI1_HC41 EQU 0x400f4129
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC42
CYREG_UDB_DSI1_HC42 EQU 0x400f412a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC43
CYREG_UDB_DSI1_HC43 EQU 0x400f412b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC44
CYREG_UDB_DSI1_HC44 EQU 0x400f412c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC45
CYREG_UDB_DSI1_HC45 EQU 0x400f412d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC46
CYREG_UDB_DSI1_HC46 EQU 0x400f412e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC47
CYREG_UDB_DSI1_HC47 EQU 0x400f412f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC48
CYREG_UDB_DSI1_HC48 EQU 0x400f4130
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC49
CYREG_UDB_DSI1_HC49 EQU 0x400f4131
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC50
CYREG_UDB_DSI1_HC50 EQU 0x400f4132
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC51
CYREG_UDB_DSI1_HC51 EQU 0x400f4133
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC52
CYREG_UDB_DSI1_HC52 EQU 0x400f4134
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC53
CYREG_UDB_DSI1_HC53 EQU 0x400f4135
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC54
CYREG_UDB_DSI1_HC54 EQU 0x400f4136
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC55
CYREG_UDB_DSI1_HC55 EQU 0x400f4137
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC56
CYREG_UDB_DSI1_HC56 EQU 0x400f4138
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC57
CYREG_UDB_DSI1_HC57 EQU 0x400f4139
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC58
CYREG_UDB_DSI1_HC58 EQU 0x400f413a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC59
CYREG_UDB_DSI1_HC59 EQU 0x400f413b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC60
CYREG_UDB_DSI1_HC60 EQU 0x400f413c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC61
CYREG_UDB_DSI1_HC61 EQU 0x400f413d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC62
CYREG_UDB_DSI1_HC62 EQU 0x400f413e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC63
CYREG_UDB_DSI1_HC63 EQU 0x400f413f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC64
CYREG_UDB_DSI1_HC64 EQU 0x400f4140
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC65
CYREG_UDB_DSI1_HC65 EQU 0x400f4141
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC66
CYREG_UDB_DSI1_HC66 EQU 0x400f4142
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC67
CYREG_UDB_DSI1_HC67 EQU 0x400f4143
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC68
CYREG_UDB_DSI1_HC68 EQU 0x400f4144
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC69
CYREG_UDB_DSI1_HC69 EQU 0x400f4145
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC70
CYREG_UDB_DSI1_HC70 EQU 0x400f4146
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC71
CYREG_UDB_DSI1_HC71 EQU 0x400f4147
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC72
CYREG_UDB_DSI1_HC72 EQU 0x400f4148
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC73
CYREG_UDB_DSI1_HC73 EQU 0x400f4149
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC74
CYREG_UDB_DSI1_HC74 EQU 0x400f414a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC75
CYREG_UDB_DSI1_HC75 EQU 0x400f414b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC76
CYREG_UDB_DSI1_HC76 EQU 0x400f414c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC77
CYREG_UDB_DSI1_HC77 EQU 0x400f414d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC78
CYREG_UDB_DSI1_HC78 EQU 0x400f414e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC79
CYREG_UDB_DSI1_HC79 EQU 0x400f414f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC80
CYREG_UDB_DSI1_HC80 EQU 0x400f4150
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC81
CYREG_UDB_DSI1_HC81 EQU 0x400f4151
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC82
CYREG_UDB_DSI1_HC82 EQU 0x400f4152
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC83
CYREG_UDB_DSI1_HC83 EQU 0x400f4153
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC84
CYREG_UDB_DSI1_HC84 EQU 0x400f4154
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC85
CYREG_UDB_DSI1_HC85 EQU 0x400f4155
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC86
CYREG_UDB_DSI1_HC86 EQU 0x400f4156
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC87
CYREG_UDB_DSI1_HC87 EQU 0x400f4157
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC88
CYREG_UDB_DSI1_HC88 EQU 0x400f4158
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC89
CYREG_UDB_DSI1_HC89 EQU 0x400f4159
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC90
CYREG_UDB_DSI1_HC90 EQU 0x400f415a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC91
CYREG_UDB_DSI1_HC91 EQU 0x400f415b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC92
CYREG_UDB_DSI1_HC92 EQU 0x400f415c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC93
CYREG_UDB_DSI1_HC93 EQU 0x400f415d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC94
CYREG_UDB_DSI1_HC94 EQU 0x400f415e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC95
CYREG_UDB_DSI1_HC95 EQU 0x400f415f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC96
CYREG_UDB_DSI1_HC96 EQU 0x400f4160
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC97
CYREG_UDB_DSI1_HC97 EQU 0x400f4161
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC98
CYREG_UDB_DSI1_HC98 EQU 0x400f4162
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC99
CYREG_UDB_DSI1_HC99 EQU 0x400f4163
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC100
CYREG_UDB_DSI1_HC100 EQU 0x400f4164
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC101
CYREG_UDB_DSI1_HC101 EQU 0x400f4165
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC102
CYREG_UDB_DSI1_HC102 EQU 0x400f4166
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC103
CYREG_UDB_DSI1_HC103 EQU 0x400f4167
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC104
CYREG_UDB_DSI1_HC104 EQU 0x400f4168
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC105
CYREG_UDB_DSI1_HC105 EQU 0x400f4169
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC106
CYREG_UDB_DSI1_HC106 EQU 0x400f416a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC107
CYREG_UDB_DSI1_HC107 EQU 0x400f416b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC108
CYREG_UDB_DSI1_HC108 EQU 0x400f416c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC109
CYREG_UDB_DSI1_HC109 EQU 0x400f416d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC110
CYREG_UDB_DSI1_HC110 EQU 0x400f416e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC111
CYREG_UDB_DSI1_HC111 EQU 0x400f416f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC112
CYREG_UDB_DSI1_HC112 EQU 0x400f4170
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC113
CYREG_UDB_DSI1_HC113 EQU 0x400f4171
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC114
CYREG_UDB_DSI1_HC114 EQU 0x400f4172
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC115
CYREG_UDB_DSI1_HC115 EQU 0x400f4173
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC116
CYREG_UDB_DSI1_HC116 EQU 0x400f4174
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC117
CYREG_UDB_DSI1_HC117 EQU 0x400f4175
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC118
CYREG_UDB_DSI1_HC118 EQU 0x400f4176
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC119
CYREG_UDB_DSI1_HC119 EQU 0x400f4177
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC120
CYREG_UDB_DSI1_HC120 EQU 0x400f4178
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC121
CYREG_UDB_DSI1_HC121 EQU 0x400f4179
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC122
CYREG_UDB_DSI1_HC122 EQU 0x400f417a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC123
CYREG_UDB_DSI1_HC123 EQU 0x400f417b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC124
CYREG_UDB_DSI1_HC124 EQU 0x400f417c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC125
CYREG_UDB_DSI1_HC125 EQU 0x400f417d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC126
CYREG_UDB_DSI1_HC126 EQU 0x400f417e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HC127
CYREG_UDB_DSI1_HC127 EQU 0x400f417f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L0
CYREG_UDB_DSI1_HV_L0 EQU 0x400f4180
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L1
CYREG_UDB_DSI1_HV_L1 EQU 0x400f4181
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L2
CYREG_UDB_DSI1_HV_L2 EQU 0x400f4182
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L3
CYREG_UDB_DSI1_HV_L3 EQU 0x400f4183
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L4
CYREG_UDB_DSI1_HV_L4 EQU 0x400f4184
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L5
CYREG_UDB_DSI1_HV_L5 EQU 0x400f4185
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L6
CYREG_UDB_DSI1_HV_L6 EQU 0x400f4186
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L7
CYREG_UDB_DSI1_HV_L7 EQU 0x400f4187
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L8
CYREG_UDB_DSI1_HV_L8 EQU 0x400f4188
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L9
CYREG_UDB_DSI1_HV_L9 EQU 0x400f4189
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L10
CYREG_UDB_DSI1_HV_L10 EQU 0x400f418a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L11
CYREG_UDB_DSI1_HV_L11 EQU 0x400f418b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L12
CYREG_UDB_DSI1_HV_L12 EQU 0x400f418c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L13
CYREG_UDB_DSI1_HV_L13 EQU 0x400f418d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L14
CYREG_UDB_DSI1_HV_L14 EQU 0x400f418e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L15
CYREG_UDB_DSI1_HV_L15 EQU 0x400f418f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HS0
CYREG_UDB_DSI1_HS0 EQU 0x400f4190
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HS1
CYREG_UDB_DSI1_HS1 EQU 0x400f4191
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HS2
CYREG_UDB_DSI1_HS2 EQU 0x400f4192
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HS3
CYREG_UDB_DSI1_HS3 EQU 0x400f4193
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HS4
CYREG_UDB_DSI1_HS4 EQU 0x400f4194
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HS5
CYREG_UDB_DSI1_HS5 EQU 0x400f4195
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HS6
CYREG_UDB_DSI1_HS6 EQU 0x400f4196
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HS7
CYREG_UDB_DSI1_HS7 EQU 0x400f4197
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HS8
CYREG_UDB_DSI1_HS8 EQU 0x400f4198
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HS9
CYREG_UDB_DSI1_HS9 EQU 0x400f4199
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HS10
CYREG_UDB_DSI1_HS10 EQU 0x400f419a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HS11
CYREG_UDB_DSI1_HS11 EQU 0x400f419b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HS12
CYREG_UDB_DSI1_HS12 EQU 0x400f419c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HS13
CYREG_UDB_DSI1_HS13 EQU 0x400f419d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HS14
CYREG_UDB_DSI1_HS14 EQU 0x400f419e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HS15
CYREG_UDB_DSI1_HS15 EQU 0x400f419f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HS16
CYREG_UDB_DSI1_HS16 EQU 0x400f41a0
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HS17
CYREG_UDB_DSI1_HS17 EQU 0x400f41a1
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HS18
CYREG_UDB_DSI1_HS18 EQU 0x400f41a2
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HS19
CYREG_UDB_DSI1_HS19 EQU 0x400f41a3
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HS20
CYREG_UDB_DSI1_HS20 EQU 0x400f41a4
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HS21
CYREG_UDB_DSI1_HS21 EQU 0x400f41a5
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HS22
CYREG_UDB_DSI1_HS22 EQU 0x400f41a6
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HS23
CYREG_UDB_DSI1_HS23 EQU 0x400f41a7
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R0
CYREG_UDB_DSI1_HV_R0 EQU 0x400f41a8
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R1
CYREG_UDB_DSI1_HV_R1 EQU 0x400f41a9
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R2
CYREG_UDB_DSI1_HV_R2 EQU 0x400f41aa
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R3
CYREG_UDB_DSI1_HV_R3 EQU 0x400f41ab
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R4
CYREG_UDB_DSI1_HV_R4 EQU 0x400f41ac
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R5
CYREG_UDB_DSI1_HV_R5 EQU 0x400f41ad
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R6
CYREG_UDB_DSI1_HV_R6 EQU 0x400f41ae
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R7
CYREG_UDB_DSI1_HV_R7 EQU 0x400f41af
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R8
CYREG_UDB_DSI1_HV_R8 EQU 0x400f41b0
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R9
CYREG_UDB_DSI1_HV_R9 EQU 0x400f41b1
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R10
CYREG_UDB_DSI1_HV_R10 EQU 0x400f41b2
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R11
CYREG_UDB_DSI1_HV_R11 EQU 0x400f41b3
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R12
CYREG_UDB_DSI1_HV_R12 EQU 0x400f41b4
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R13
CYREG_UDB_DSI1_HV_R13 EQU 0x400f41b5
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R14
CYREG_UDB_DSI1_HV_R14 EQU 0x400f41b6
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R15
CYREG_UDB_DSI1_HV_R15 EQU 0x400f41b7
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_DSIINP0
CYREG_UDB_DSI1_DSIINP0 EQU 0x400f41c0
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_DSIINP1
CYREG_UDB_DSI1_DSIINP1 EQU 0x400f41c2
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_DSIINP2
CYREG_UDB_DSI1_DSIINP2 EQU 0x400f41c4
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_DSIINP3
CYREG_UDB_DSI1_DSIINP3 EQU 0x400f41c6
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_DSIINP4
CYREG_UDB_DSI1_DSIINP4 EQU 0x400f41c8
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_DSIINP5
CYREG_UDB_DSI1_DSIINP5 EQU 0x400f41ca
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_DSIOUTP0
CYREG_UDB_DSI1_DSIOUTP0 EQU 0x400f41cc
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_DSIOUTP1
CYREG_UDB_DSI1_DSIOUTP1 EQU 0x400f41ce
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_DSIOUTP2
CYREG_UDB_DSI1_DSIOUTP2 EQU 0x400f41d0
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_DSIOUTP3
CYREG_UDB_DSI1_DSIOUTP3 EQU 0x400f41d2
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_DSIOUTT0
CYREG_UDB_DSI1_DSIOUTT0 EQU 0x400f41d4
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_DSIOUTT1
CYREG_UDB_DSI1_DSIOUTT1 EQU 0x400f41d6
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_DSIOUTT2
CYREG_UDB_DSI1_DSIOUTT2 EQU 0x400f41d8
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_DSIOUTT3
CYREG_UDB_DSI1_DSIOUTT3 EQU 0x400f41da
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_DSIOUTT4
CYREG_UDB_DSI1_DSIOUTT4 EQU 0x400f41dc
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_DSIOUTT5
CYREG_UDB_DSI1_DSIOUTT5 EQU 0x400f41de
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_VS0
CYREG_UDB_DSI1_VS0 EQU 0x400f41e0
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_VS1
CYREG_UDB_DSI1_VS1 EQU 0x400f41e2
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_VS2
CYREG_UDB_DSI1_VS2 EQU 0x400f41e4
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_VS3
CYREG_UDB_DSI1_VS3 EQU 0x400f41e6
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_VS4
CYREG_UDB_DSI1_VS4 EQU 0x400f41e8
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_VS5
CYREG_UDB_DSI1_VS5 EQU 0x400f41ea
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_VS6
CYREG_UDB_DSI1_VS6 EQU 0x400f41ec
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI1_VS7
CYREG_UDB_DSI1_VS7 EQU 0x400f41ee
ENDIF
IF :LNOT::DEF:CYDEV_UDB_DSI2_BASE
CYDEV_UDB_DSI2_BASE EQU 0x400f4200
ENDIF
IF :LNOT::DEF:CYDEV_UDB_DSI2_SIZE
CYDEV_UDB_DSI2_SIZE EQU 0x00000100
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC0
CYREG_UDB_DSI2_HC0 EQU 0x400f4200
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC1
CYREG_UDB_DSI2_HC1 EQU 0x400f4201
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC2
CYREG_UDB_DSI2_HC2 EQU 0x400f4202
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC3
CYREG_UDB_DSI2_HC3 EQU 0x400f4203
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC4
CYREG_UDB_DSI2_HC4 EQU 0x400f4204
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC5
CYREG_UDB_DSI2_HC5 EQU 0x400f4205
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC6
CYREG_UDB_DSI2_HC6 EQU 0x400f4206
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC7
CYREG_UDB_DSI2_HC7 EQU 0x400f4207
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC8
CYREG_UDB_DSI2_HC8 EQU 0x400f4208
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC9
CYREG_UDB_DSI2_HC9 EQU 0x400f4209
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC10
CYREG_UDB_DSI2_HC10 EQU 0x400f420a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC11
CYREG_UDB_DSI2_HC11 EQU 0x400f420b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC12
CYREG_UDB_DSI2_HC12 EQU 0x400f420c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC13
CYREG_UDB_DSI2_HC13 EQU 0x400f420d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC14
CYREG_UDB_DSI2_HC14 EQU 0x400f420e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC15
CYREG_UDB_DSI2_HC15 EQU 0x400f420f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC16
CYREG_UDB_DSI2_HC16 EQU 0x400f4210
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC17
CYREG_UDB_DSI2_HC17 EQU 0x400f4211
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC18
CYREG_UDB_DSI2_HC18 EQU 0x400f4212
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC19
CYREG_UDB_DSI2_HC19 EQU 0x400f4213
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC20
CYREG_UDB_DSI2_HC20 EQU 0x400f4214
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC21
CYREG_UDB_DSI2_HC21 EQU 0x400f4215
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC22
CYREG_UDB_DSI2_HC22 EQU 0x400f4216
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC23
CYREG_UDB_DSI2_HC23 EQU 0x400f4217
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC24
CYREG_UDB_DSI2_HC24 EQU 0x400f4218
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC25
CYREG_UDB_DSI2_HC25 EQU 0x400f4219
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC26
CYREG_UDB_DSI2_HC26 EQU 0x400f421a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC27
CYREG_UDB_DSI2_HC27 EQU 0x400f421b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC28
CYREG_UDB_DSI2_HC28 EQU 0x400f421c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC29
CYREG_UDB_DSI2_HC29 EQU 0x400f421d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC30
CYREG_UDB_DSI2_HC30 EQU 0x400f421e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC31
CYREG_UDB_DSI2_HC31 EQU 0x400f421f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC32
CYREG_UDB_DSI2_HC32 EQU 0x400f4220
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC33
CYREG_UDB_DSI2_HC33 EQU 0x400f4221
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC34
CYREG_UDB_DSI2_HC34 EQU 0x400f4222
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC35
CYREG_UDB_DSI2_HC35 EQU 0x400f4223
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC36
CYREG_UDB_DSI2_HC36 EQU 0x400f4224
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC37
CYREG_UDB_DSI2_HC37 EQU 0x400f4225
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC38
CYREG_UDB_DSI2_HC38 EQU 0x400f4226
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC39
CYREG_UDB_DSI2_HC39 EQU 0x400f4227
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC40
CYREG_UDB_DSI2_HC40 EQU 0x400f4228
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC41
CYREG_UDB_DSI2_HC41 EQU 0x400f4229
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC42
CYREG_UDB_DSI2_HC42 EQU 0x400f422a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC43
CYREG_UDB_DSI2_HC43 EQU 0x400f422b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC44
CYREG_UDB_DSI2_HC44 EQU 0x400f422c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC45
CYREG_UDB_DSI2_HC45 EQU 0x400f422d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC46
CYREG_UDB_DSI2_HC46 EQU 0x400f422e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC47
CYREG_UDB_DSI2_HC47 EQU 0x400f422f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC48
CYREG_UDB_DSI2_HC48 EQU 0x400f4230
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC49
CYREG_UDB_DSI2_HC49 EQU 0x400f4231
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC50
CYREG_UDB_DSI2_HC50 EQU 0x400f4232
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC51
CYREG_UDB_DSI2_HC51 EQU 0x400f4233
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC52
CYREG_UDB_DSI2_HC52 EQU 0x400f4234
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC53
CYREG_UDB_DSI2_HC53 EQU 0x400f4235
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC54
CYREG_UDB_DSI2_HC54 EQU 0x400f4236
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC55
CYREG_UDB_DSI2_HC55 EQU 0x400f4237
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC56
CYREG_UDB_DSI2_HC56 EQU 0x400f4238
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC57
CYREG_UDB_DSI2_HC57 EQU 0x400f4239
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC58
CYREG_UDB_DSI2_HC58 EQU 0x400f423a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC59
CYREG_UDB_DSI2_HC59 EQU 0x400f423b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC60
CYREG_UDB_DSI2_HC60 EQU 0x400f423c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC61
CYREG_UDB_DSI2_HC61 EQU 0x400f423d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC62
CYREG_UDB_DSI2_HC62 EQU 0x400f423e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC63
CYREG_UDB_DSI2_HC63 EQU 0x400f423f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC64
CYREG_UDB_DSI2_HC64 EQU 0x400f4240
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC65
CYREG_UDB_DSI2_HC65 EQU 0x400f4241
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC66
CYREG_UDB_DSI2_HC66 EQU 0x400f4242
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC67
CYREG_UDB_DSI2_HC67 EQU 0x400f4243
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC68
CYREG_UDB_DSI2_HC68 EQU 0x400f4244
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC69
CYREG_UDB_DSI2_HC69 EQU 0x400f4245
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC70
CYREG_UDB_DSI2_HC70 EQU 0x400f4246
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC71
CYREG_UDB_DSI2_HC71 EQU 0x400f4247
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC72
CYREG_UDB_DSI2_HC72 EQU 0x400f4248
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC73
CYREG_UDB_DSI2_HC73 EQU 0x400f4249
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC74
CYREG_UDB_DSI2_HC74 EQU 0x400f424a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC75
CYREG_UDB_DSI2_HC75 EQU 0x400f424b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC76
CYREG_UDB_DSI2_HC76 EQU 0x400f424c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC77
CYREG_UDB_DSI2_HC77 EQU 0x400f424d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC78
CYREG_UDB_DSI2_HC78 EQU 0x400f424e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC79
CYREG_UDB_DSI2_HC79 EQU 0x400f424f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC80
CYREG_UDB_DSI2_HC80 EQU 0x400f4250
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC81
CYREG_UDB_DSI2_HC81 EQU 0x400f4251
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC82
CYREG_UDB_DSI2_HC82 EQU 0x400f4252
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC83
CYREG_UDB_DSI2_HC83 EQU 0x400f4253
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC84
CYREG_UDB_DSI2_HC84 EQU 0x400f4254
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC85
CYREG_UDB_DSI2_HC85 EQU 0x400f4255
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC86
CYREG_UDB_DSI2_HC86 EQU 0x400f4256
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC87
CYREG_UDB_DSI2_HC87 EQU 0x400f4257
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC88
CYREG_UDB_DSI2_HC88 EQU 0x400f4258
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC89
CYREG_UDB_DSI2_HC89 EQU 0x400f4259
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC90
CYREG_UDB_DSI2_HC90 EQU 0x400f425a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC91
CYREG_UDB_DSI2_HC91 EQU 0x400f425b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC92
CYREG_UDB_DSI2_HC92 EQU 0x400f425c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC93
CYREG_UDB_DSI2_HC93 EQU 0x400f425d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC94
CYREG_UDB_DSI2_HC94 EQU 0x400f425e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC95
CYREG_UDB_DSI2_HC95 EQU 0x400f425f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC96
CYREG_UDB_DSI2_HC96 EQU 0x400f4260
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC97
CYREG_UDB_DSI2_HC97 EQU 0x400f4261
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC98
CYREG_UDB_DSI2_HC98 EQU 0x400f4262
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC99
CYREG_UDB_DSI2_HC99 EQU 0x400f4263
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC100
CYREG_UDB_DSI2_HC100 EQU 0x400f4264
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC101
CYREG_UDB_DSI2_HC101 EQU 0x400f4265
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC102
CYREG_UDB_DSI2_HC102 EQU 0x400f4266
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC103
CYREG_UDB_DSI2_HC103 EQU 0x400f4267
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC104
CYREG_UDB_DSI2_HC104 EQU 0x400f4268
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC105
CYREG_UDB_DSI2_HC105 EQU 0x400f4269
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC106
CYREG_UDB_DSI2_HC106 EQU 0x400f426a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC107
CYREG_UDB_DSI2_HC107 EQU 0x400f426b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC108
CYREG_UDB_DSI2_HC108 EQU 0x400f426c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC109
CYREG_UDB_DSI2_HC109 EQU 0x400f426d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC110
CYREG_UDB_DSI2_HC110 EQU 0x400f426e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC111
CYREG_UDB_DSI2_HC111 EQU 0x400f426f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC112
CYREG_UDB_DSI2_HC112 EQU 0x400f4270
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC113
CYREG_UDB_DSI2_HC113 EQU 0x400f4271
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC114
CYREG_UDB_DSI2_HC114 EQU 0x400f4272
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC115
CYREG_UDB_DSI2_HC115 EQU 0x400f4273
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC116
CYREG_UDB_DSI2_HC116 EQU 0x400f4274
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC117
CYREG_UDB_DSI2_HC117 EQU 0x400f4275
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC118
CYREG_UDB_DSI2_HC118 EQU 0x400f4276
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC119
CYREG_UDB_DSI2_HC119 EQU 0x400f4277
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC120
CYREG_UDB_DSI2_HC120 EQU 0x400f4278
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC121
CYREG_UDB_DSI2_HC121 EQU 0x400f4279
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC122
CYREG_UDB_DSI2_HC122 EQU 0x400f427a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC123
CYREG_UDB_DSI2_HC123 EQU 0x400f427b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC124
CYREG_UDB_DSI2_HC124 EQU 0x400f427c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC125
CYREG_UDB_DSI2_HC125 EQU 0x400f427d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC126
CYREG_UDB_DSI2_HC126 EQU 0x400f427e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HC127
CYREG_UDB_DSI2_HC127 EQU 0x400f427f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L0
CYREG_UDB_DSI2_HV_L0 EQU 0x400f4280
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L1
CYREG_UDB_DSI2_HV_L1 EQU 0x400f4281
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L2
CYREG_UDB_DSI2_HV_L2 EQU 0x400f4282
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L3
CYREG_UDB_DSI2_HV_L3 EQU 0x400f4283
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L4
CYREG_UDB_DSI2_HV_L4 EQU 0x400f4284
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L5
CYREG_UDB_DSI2_HV_L5 EQU 0x400f4285
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L6
CYREG_UDB_DSI2_HV_L6 EQU 0x400f4286
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L7
CYREG_UDB_DSI2_HV_L7 EQU 0x400f4287
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L8
CYREG_UDB_DSI2_HV_L8 EQU 0x400f4288
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L9
CYREG_UDB_DSI2_HV_L9 EQU 0x400f4289
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L10
CYREG_UDB_DSI2_HV_L10 EQU 0x400f428a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L11
CYREG_UDB_DSI2_HV_L11 EQU 0x400f428b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L12
CYREG_UDB_DSI2_HV_L12 EQU 0x400f428c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L13
CYREG_UDB_DSI2_HV_L13 EQU 0x400f428d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L14
CYREG_UDB_DSI2_HV_L14 EQU 0x400f428e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L15
CYREG_UDB_DSI2_HV_L15 EQU 0x400f428f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HS0
CYREG_UDB_DSI2_HS0 EQU 0x400f4290
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HS1
CYREG_UDB_DSI2_HS1 EQU 0x400f4291
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HS2
CYREG_UDB_DSI2_HS2 EQU 0x400f4292
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HS3
CYREG_UDB_DSI2_HS3 EQU 0x400f4293
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HS4
CYREG_UDB_DSI2_HS4 EQU 0x400f4294
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HS5
CYREG_UDB_DSI2_HS5 EQU 0x400f4295
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HS6
CYREG_UDB_DSI2_HS6 EQU 0x400f4296
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HS7
CYREG_UDB_DSI2_HS7 EQU 0x400f4297
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HS8
CYREG_UDB_DSI2_HS8 EQU 0x400f4298
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HS9
CYREG_UDB_DSI2_HS9 EQU 0x400f4299
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HS10
CYREG_UDB_DSI2_HS10 EQU 0x400f429a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HS11
CYREG_UDB_DSI2_HS11 EQU 0x400f429b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HS12
CYREG_UDB_DSI2_HS12 EQU 0x400f429c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HS13
CYREG_UDB_DSI2_HS13 EQU 0x400f429d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HS14
CYREG_UDB_DSI2_HS14 EQU 0x400f429e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HS15
CYREG_UDB_DSI2_HS15 EQU 0x400f429f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HS16
CYREG_UDB_DSI2_HS16 EQU 0x400f42a0
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HS17
CYREG_UDB_DSI2_HS17 EQU 0x400f42a1
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HS18
CYREG_UDB_DSI2_HS18 EQU 0x400f42a2
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HS19
CYREG_UDB_DSI2_HS19 EQU 0x400f42a3
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HS20
CYREG_UDB_DSI2_HS20 EQU 0x400f42a4
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HS21
CYREG_UDB_DSI2_HS21 EQU 0x400f42a5
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HS22
CYREG_UDB_DSI2_HS22 EQU 0x400f42a6
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HS23
CYREG_UDB_DSI2_HS23 EQU 0x400f42a7
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R0
CYREG_UDB_DSI2_HV_R0 EQU 0x400f42a8
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R1
CYREG_UDB_DSI2_HV_R1 EQU 0x400f42a9
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R2
CYREG_UDB_DSI2_HV_R2 EQU 0x400f42aa
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R3
CYREG_UDB_DSI2_HV_R3 EQU 0x400f42ab
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R4
CYREG_UDB_DSI2_HV_R4 EQU 0x400f42ac
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R5
CYREG_UDB_DSI2_HV_R5 EQU 0x400f42ad
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R6
CYREG_UDB_DSI2_HV_R6 EQU 0x400f42ae
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R7
CYREG_UDB_DSI2_HV_R7 EQU 0x400f42af
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R8
CYREG_UDB_DSI2_HV_R8 EQU 0x400f42b0
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R9
CYREG_UDB_DSI2_HV_R9 EQU 0x400f42b1
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R10
CYREG_UDB_DSI2_HV_R10 EQU 0x400f42b2
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R11
CYREG_UDB_DSI2_HV_R11 EQU 0x400f42b3
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R12
CYREG_UDB_DSI2_HV_R12 EQU 0x400f42b4
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R13
CYREG_UDB_DSI2_HV_R13 EQU 0x400f42b5
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R14
CYREG_UDB_DSI2_HV_R14 EQU 0x400f42b6
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R15
CYREG_UDB_DSI2_HV_R15 EQU 0x400f42b7
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_DSIINP0
CYREG_UDB_DSI2_DSIINP0 EQU 0x400f42c0
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_DSIINP1
CYREG_UDB_DSI2_DSIINP1 EQU 0x400f42c2
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_DSIINP2
CYREG_UDB_DSI2_DSIINP2 EQU 0x400f42c4
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_DSIINP3
CYREG_UDB_DSI2_DSIINP3 EQU 0x400f42c6
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_DSIINP4
CYREG_UDB_DSI2_DSIINP4 EQU 0x400f42c8
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_DSIINP5
CYREG_UDB_DSI2_DSIINP5 EQU 0x400f42ca
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_DSIOUTP0
CYREG_UDB_DSI2_DSIOUTP0 EQU 0x400f42cc
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_DSIOUTP1
CYREG_UDB_DSI2_DSIOUTP1 EQU 0x400f42ce
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_DSIOUTP2
CYREG_UDB_DSI2_DSIOUTP2 EQU 0x400f42d0
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_DSIOUTP3
CYREG_UDB_DSI2_DSIOUTP3 EQU 0x400f42d2
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_DSIOUTT0
CYREG_UDB_DSI2_DSIOUTT0 EQU 0x400f42d4
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_DSIOUTT1
CYREG_UDB_DSI2_DSIOUTT1 EQU 0x400f42d6
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_DSIOUTT2
CYREG_UDB_DSI2_DSIOUTT2 EQU 0x400f42d8
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_DSIOUTT3
CYREG_UDB_DSI2_DSIOUTT3 EQU 0x400f42da
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_DSIOUTT4
CYREG_UDB_DSI2_DSIOUTT4 EQU 0x400f42dc
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_DSIOUTT5
CYREG_UDB_DSI2_DSIOUTT5 EQU 0x400f42de
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_VS0
CYREG_UDB_DSI2_VS0 EQU 0x400f42e0
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_VS1
CYREG_UDB_DSI2_VS1 EQU 0x400f42e2
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_VS2
CYREG_UDB_DSI2_VS2 EQU 0x400f42e4
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_VS3
CYREG_UDB_DSI2_VS3 EQU 0x400f42e6
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_VS4
CYREG_UDB_DSI2_VS4 EQU 0x400f42e8
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_VS5
CYREG_UDB_DSI2_VS5 EQU 0x400f42ea
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_VS6
CYREG_UDB_DSI2_VS6 EQU 0x400f42ec
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI2_VS7
CYREG_UDB_DSI2_VS7 EQU 0x400f42ee
ENDIF
IF :LNOT::DEF:CYDEV_UDB_DSI3_BASE
CYDEV_UDB_DSI3_BASE EQU 0x400f4300
ENDIF
IF :LNOT::DEF:CYDEV_UDB_DSI3_SIZE
CYDEV_UDB_DSI3_SIZE EQU 0x00000100
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC0
CYREG_UDB_DSI3_HC0 EQU 0x400f4300
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC1
CYREG_UDB_DSI3_HC1 EQU 0x400f4301
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC2
CYREG_UDB_DSI3_HC2 EQU 0x400f4302
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC3
CYREG_UDB_DSI3_HC3 EQU 0x400f4303
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC4
CYREG_UDB_DSI3_HC4 EQU 0x400f4304
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC5
CYREG_UDB_DSI3_HC5 EQU 0x400f4305
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC6
CYREG_UDB_DSI3_HC6 EQU 0x400f4306
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC7
CYREG_UDB_DSI3_HC7 EQU 0x400f4307
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC8
CYREG_UDB_DSI3_HC8 EQU 0x400f4308
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC9
CYREG_UDB_DSI3_HC9 EQU 0x400f4309
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC10
CYREG_UDB_DSI3_HC10 EQU 0x400f430a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC11
CYREG_UDB_DSI3_HC11 EQU 0x400f430b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC12
CYREG_UDB_DSI3_HC12 EQU 0x400f430c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC13
CYREG_UDB_DSI3_HC13 EQU 0x400f430d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC14
CYREG_UDB_DSI3_HC14 EQU 0x400f430e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC15
CYREG_UDB_DSI3_HC15 EQU 0x400f430f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC16
CYREG_UDB_DSI3_HC16 EQU 0x400f4310
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC17
CYREG_UDB_DSI3_HC17 EQU 0x400f4311
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC18
CYREG_UDB_DSI3_HC18 EQU 0x400f4312
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC19
CYREG_UDB_DSI3_HC19 EQU 0x400f4313
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC20
CYREG_UDB_DSI3_HC20 EQU 0x400f4314
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC21
CYREG_UDB_DSI3_HC21 EQU 0x400f4315
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC22
CYREG_UDB_DSI3_HC22 EQU 0x400f4316
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC23
CYREG_UDB_DSI3_HC23 EQU 0x400f4317
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC24
CYREG_UDB_DSI3_HC24 EQU 0x400f4318
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC25
CYREG_UDB_DSI3_HC25 EQU 0x400f4319
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC26
CYREG_UDB_DSI3_HC26 EQU 0x400f431a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC27
CYREG_UDB_DSI3_HC27 EQU 0x400f431b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC28
CYREG_UDB_DSI3_HC28 EQU 0x400f431c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC29
CYREG_UDB_DSI3_HC29 EQU 0x400f431d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC30
CYREG_UDB_DSI3_HC30 EQU 0x400f431e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC31
CYREG_UDB_DSI3_HC31 EQU 0x400f431f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC32
CYREG_UDB_DSI3_HC32 EQU 0x400f4320
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC33
CYREG_UDB_DSI3_HC33 EQU 0x400f4321
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC34
CYREG_UDB_DSI3_HC34 EQU 0x400f4322
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC35
CYREG_UDB_DSI3_HC35 EQU 0x400f4323
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC36
CYREG_UDB_DSI3_HC36 EQU 0x400f4324
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC37
CYREG_UDB_DSI3_HC37 EQU 0x400f4325
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC38
CYREG_UDB_DSI3_HC38 EQU 0x400f4326
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC39
CYREG_UDB_DSI3_HC39 EQU 0x400f4327
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC40
CYREG_UDB_DSI3_HC40 EQU 0x400f4328
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC41
CYREG_UDB_DSI3_HC41 EQU 0x400f4329
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC42
CYREG_UDB_DSI3_HC42 EQU 0x400f432a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC43
CYREG_UDB_DSI3_HC43 EQU 0x400f432b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC44
CYREG_UDB_DSI3_HC44 EQU 0x400f432c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC45
CYREG_UDB_DSI3_HC45 EQU 0x400f432d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC46
CYREG_UDB_DSI3_HC46 EQU 0x400f432e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC47
CYREG_UDB_DSI3_HC47 EQU 0x400f432f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC48
CYREG_UDB_DSI3_HC48 EQU 0x400f4330
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC49
CYREG_UDB_DSI3_HC49 EQU 0x400f4331
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC50
CYREG_UDB_DSI3_HC50 EQU 0x400f4332
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC51
CYREG_UDB_DSI3_HC51 EQU 0x400f4333
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC52
CYREG_UDB_DSI3_HC52 EQU 0x400f4334
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC53
CYREG_UDB_DSI3_HC53 EQU 0x400f4335
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC54
CYREG_UDB_DSI3_HC54 EQU 0x400f4336
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC55
CYREG_UDB_DSI3_HC55 EQU 0x400f4337
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC56
CYREG_UDB_DSI3_HC56 EQU 0x400f4338
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC57
CYREG_UDB_DSI3_HC57 EQU 0x400f4339
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC58
CYREG_UDB_DSI3_HC58 EQU 0x400f433a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC59
CYREG_UDB_DSI3_HC59 EQU 0x400f433b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC60
CYREG_UDB_DSI3_HC60 EQU 0x400f433c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC61
CYREG_UDB_DSI3_HC61 EQU 0x400f433d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC62
CYREG_UDB_DSI3_HC62 EQU 0x400f433e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC63
CYREG_UDB_DSI3_HC63 EQU 0x400f433f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC64
CYREG_UDB_DSI3_HC64 EQU 0x400f4340
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC65
CYREG_UDB_DSI3_HC65 EQU 0x400f4341
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC66
CYREG_UDB_DSI3_HC66 EQU 0x400f4342
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC67
CYREG_UDB_DSI3_HC67 EQU 0x400f4343
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC68
CYREG_UDB_DSI3_HC68 EQU 0x400f4344
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC69
CYREG_UDB_DSI3_HC69 EQU 0x400f4345
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC70
CYREG_UDB_DSI3_HC70 EQU 0x400f4346
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC71
CYREG_UDB_DSI3_HC71 EQU 0x400f4347
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC72
CYREG_UDB_DSI3_HC72 EQU 0x400f4348
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC73
CYREG_UDB_DSI3_HC73 EQU 0x400f4349
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC74
CYREG_UDB_DSI3_HC74 EQU 0x400f434a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC75
CYREG_UDB_DSI3_HC75 EQU 0x400f434b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC76
CYREG_UDB_DSI3_HC76 EQU 0x400f434c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC77
CYREG_UDB_DSI3_HC77 EQU 0x400f434d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC78
CYREG_UDB_DSI3_HC78 EQU 0x400f434e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC79
CYREG_UDB_DSI3_HC79 EQU 0x400f434f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC80
CYREG_UDB_DSI3_HC80 EQU 0x400f4350
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC81
CYREG_UDB_DSI3_HC81 EQU 0x400f4351
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC82
CYREG_UDB_DSI3_HC82 EQU 0x400f4352
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC83
CYREG_UDB_DSI3_HC83 EQU 0x400f4353
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC84
CYREG_UDB_DSI3_HC84 EQU 0x400f4354
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC85
CYREG_UDB_DSI3_HC85 EQU 0x400f4355
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC86
CYREG_UDB_DSI3_HC86 EQU 0x400f4356
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC87
CYREG_UDB_DSI3_HC87 EQU 0x400f4357
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC88
CYREG_UDB_DSI3_HC88 EQU 0x400f4358
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC89
CYREG_UDB_DSI3_HC89 EQU 0x400f4359
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC90
CYREG_UDB_DSI3_HC90 EQU 0x400f435a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC91
CYREG_UDB_DSI3_HC91 EQU 0x400f435b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC92
CYREG_UDB_DSI3_HC92 EQU 0x400f435c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC93
CYREG_UDB_DSI3_HC93 EQU 0x400f435d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC94
CYREG_UDB_DSI3_HC94 EQU 0x400f435e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC95
CYREG_UDB_DSI3_HC95 EQU 0x400f435f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC96
CYREG_UDB_DSI3_HC96 EQU 0x400f4360
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC97
CYREG_UDB_DSI3_HC97 EQU 0x400f4361
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC98
CYREG_UDB_DSI3_HC98 EQU 0x400f4362
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC99
CYREG_UDB_DSI3_HC99 EQU 0x400f4363
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC100
CYREG_UDB_DSI3_HC100 EQU 0x400f4364
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC101
CYREG_UDB_DSI3_HC101 EQU 0x400f4365
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC102
CYREG_UDB_DSI3_HC102 EQU 0x400f4366
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC103
CYREG_UDB_DSI3_HC103 EQU 0x400f4367
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC104
CYREG_UDB_DSI3_HC104 EQU 0x400f4368
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC105
CYREG_UDB_DSI3_HC105 EQU 0x400f4369
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC106
CYREG_UDB_DSI3_HC106 EQU 0x400f436a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC107
CYREG_UDB_DSI3_HC107 EQU 0x400f436b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC108
CYREG_UDB_DSI3_HC108 EQU 0x400f436c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC109
CYREG_UDB_DSI3_HC109 EQU 0x400f436d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC110
CYREG_UDB_DSI3_HC110 EQU 0x400f436e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC111
CYREG_UDB_DSI3_HC111 EQU 0x400f436f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC112
CYREG_UDB_DSI3_HC112 EQU 0x400f4370
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC113
CYREG_UDB_DSI3_HC113 EQU 0x400f4371
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC114
CYREG_UDB_DSI3_HC114 EQU 0x400f4372
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC115
CYREG_UDB_DSI3_HC115 EQU 0x400f4373
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC116
CYREG_UDB_DSI3_HC116 EQU 0x400f4374
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC117
CYREG_UDB_DSI3_HC117 EQU 0x400f4375
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC118
CYREG_UDB_DSI3_HC118 EQU 0x400f4376
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC119
CYREG_UDB_DSI3_HC119 EQU 0x400f4377
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC120
CYREG_UDB_DSI3_HC120 EQU 0x400f4378
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC121
CYREG_UDB_DSI3_HC121 EQU 0x400f4379
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC122
CYREG_UDB_DSI3_HC122 EQU 0x400f437a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC123
CYREG_UDB_DSI3_HC123 EQU 0x400f437b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC124
CYREG_UDB_DSI3_HC124 EQU 0x400f437c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC125
CYREG_UDB_DSI3_HC125 EQU 0x400f437d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC126
CYREG_UDB_DSI3_HC126 EQU 0x400f437e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HC127
CYREG_UDB_DSI3_HC127 EQU 0x400f437f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L0
CYREG_UDB_DSI3_HV_L0 EQU 0x400f4380
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L1
CYREG_UDB_DSI3_HV_L1 EQU 0x400f4381
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L2
CYREG_UDB_DSI3_HV_L2 EQU 0x400f4382
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L3
CYREG_UDB_DSI3_HV_L3 EQU 0x400f4383
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L4
CYREG_UDB_DSI3_HV_L4 EQU 0x400f4384
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L5
CYREG_UDB_DSI3_HV_L5 EQU 0x400f4385
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L6
CYREG_UDB_DSI3_HV_L6 EQU 0x400f4386
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L7
CYREG_UDB_DSI3_HV_L7 EQU 0x400f4387
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L8
CYREG_UDB_DSI3_HV_L8 EQU 0x400f4388
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L9
CYREG_UDB_DSI3_HV_L9 EQU 0x400f4389
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L10
CYREG_UDB_DSI3_HV_L10 EQU 0x400f438a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L11
CYREG_UDB_DSI3_HV_L11 EQU 0x400f438b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L12
CYREG_UDB_DSI3_HV_L12 EQU 0x400f438c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L13
CYREG_UDB_DSI3_HV_L13 EQU 0x400f438d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L14
CYREG_UDB_DSI3_HV_L14 EQU 0x400f438e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L15
CYREG_UDB_DSI3_HV_L15 EQU 0x400f438f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HS0
CYREG_UDB_DSI3_HS0 EQU 0x400f4390
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HS1
CYREG_UDB_DSI3_HS1 EQU 0x400f4391
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HS2
CYREG_UDB_DSI3_HS2 EQU 0x400f4392
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HS3
CYREG_UDB_DSI3_HS3 EQU 0x400f4393
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HS4
CYREG_UDB_DSI3_HS4 EQU 0x400f4394
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HS5
CYREG_UDB_DSI3_HS5 EQU 0x400f4395
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HS6
CYREG_UDB_DSI3_HS6 EQU 0x400f4396
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HS7
CYREG_UDB_DSI3_HS7 EQU 0x400f4397
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HS8
CYREG_UDB_DSI3_HS8 EQU 0x400f4398
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HS9
CYREG_UDB_DSI3_HS9 EQU 0x400f4399
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HS10
CYREG_UDB_DSI3_HS10 EQU 0x400f439a
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HS11
CYREG_UDB_DSI3_HS11 EQU 0x400f439b
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HS12
CYREG_UDB_DSI3_HS12 EQU 0x400f439c
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HS13
CYREG_UDB_DSI3_HS13 EQU 0x400f439d
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HS14
CYREG_UDB_DSI3_HS14 EQU 0x400f439e
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HS15
CYREG_UDB_DSI3_HS15 EQU 0x400f439f
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HS16
CYREG_UDB_DSI3_HS16 EQU 0x400f43a0
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HS17
CYREG_UDB_DSI3_HS17 EQU 0x400f43a1
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HS18
CYREG_UDB_DSI3_HS18 EQU 0x400f43a2
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HS19
CYREG_UDB_DSI3_HS19 EQU 0x400f43a3
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HS20
CYREG_UDB_DSI3_HS20 EQU 0x400f43a4
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HS21
CYREG_UDB_DSI3_HS21 EQU 0x400f43a5
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HS22
CYREG_UDB_DSI3_HS22 EQU 0x400f43a6
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HS23
CYREG_UDB_DSI3_HS23 EQU 0x400f43a7
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R0
CYREG_UDB_DSI3_HV_R0 EQU 0x400f43a8
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R1
CYREG_UDB_DSI3_HV_R1 EQU 0x400f43a9
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R2
CYREG_UDB_DSI3_HV_R2 EQU 0x400f43aa
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R3
CYREG_UDB_DSI3_HV_R3 EQU 0x400f43ab
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R4
CYREG_UDB_DSI3_HV_R4 EQU 0x400f43ac
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R5
CYREG_UDB_DSI3_HV_R5 EQU 0x400f43ad
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R6
CYREG_UDB_DSI3_HV_R6 EQU 0x400f43ae
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R7
CYREG_UDB_DSI3_HV_R7 EQU 0x400f43af
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R8
CYREG_UDB_DSI3_HV_R8 EQU 0x400f43b0
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R9
CYREG_UDB_DSI3_HV_R9 EQU 0x400f43b1
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R10
CYREG_UDB_DSI3_HV_R10 EQU 0x400f43b2
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R11
CYREG_UDB_DSI3_HV_R11 EQU 0x400f43b3
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R12
CYREG_UDB_DSI3_HV_R12 EQU 0x400f43b4
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R13
CYREG_UDB_DSI3_HV_R13 EQU 0x400f43b5
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R14
CYREG_UDB_DSI3_HV_R14 EQU 0x400f43b6
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R15
CYREG_UDB_DSI3_HV_R15 EQU 0x400f43b7
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_DSIINP0
CYREG_UDB_DSI3_DSIINP0 EQU 0x400f43c0
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_DSIINP1
CYREG_UDB_DSI3_DSIINP1 EQU 0x400f43c2
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_DSIINP2
CYREG_UDB_DSI3_DSIINP2 EQU 0x400f43c4
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_DSIINP3
CYREG_UDB_DSI3_DSIINP3 EQU 0x400f43c6
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_DSIINP4
CYREG_UDB_DSI3_DSIINP4 EQU 0x400f43c8
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_DSIINP5
CYREG_UDB_DSI3_DSIINP5 EQU 0x400f43ca
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_DSIOUTP0
CYREG_UDB_DSI3_DSIOUTP0 EQU 0x400f43cc
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_DSIOUTP1
CYREG_UDB_DSI3_DSIOUTP1 EQU 0x400f43ce
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_DSIOUTP2
CYREG_UDB_DSI3_DSIOUTP2 EQU 0x400f43d0
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_DSIOUTP3
CYREG_UDB_DSI3_DSIOUTP3 EQU 0x400f43d2
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_DSIOUTT0
CYREG_UDB_DSI3_DSIOUTT0 EQU 0x400f43d4
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_DSIOUTT1
CYREG_UDB_DSI3_DSIOUTT1 EQU 0x400f43d6
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_DSIOUTT2
CYREG_UDB_DSI3_DSIOUTT2 EQU 0x400f43d8
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_DSIOUTT3
CYREG_UDB_DSI3_DSIOUTT3 EQU 0x400f43da
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_DSIOUTT4
CYREG_UDB_DSI3_DSIOUTT4 EQU 0x400f43dc
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_DSIOUTT5
CYREG_UDB_DSI3_DSIOUTT5 EQU 0x400f43de
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_VS0
CYREG_UDB_DSI3_VS0 EQU 0x400f43e0
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_VS1
CYREG_UDB_DSI3_VS1 EQU 0x400f43e2
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_VS2
CYREG_UDB_DSI3_VS2 EQU 0x400f43e4
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_VS3
CYREG_UDB_DSI3_VS3 EQU 0x400f43e6
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_VS4
CYREG_UDB_DSI3_VS4 EQU 0x400f43e8
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_VS5
CYREG_UDB_DSI3_VS5 EQU 0x400f43ea
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_VS6
CYREG_UDB_DSI3_VS6 EQU 0x400f43ec
ENDIF
IF :LNOT::DEF:CYREG_UDB_DSI3_VS7
CYREG_UDB_DSI3_VS7 EQU 0x400f43ee
ENDIF
IF :LNOT::DEF:CYDEV_UDB_PA0_BASE
CYDEV_UDB_PA0_BASE EQU 0x400f5000
ENDIF
IF :LNOT::DEF:CYDEV_UDB_PA0_SIZE
CYDEV_UDB_PA0_SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA0_CFG0
CYREG_UDB_PA0_CFG0 EQU 0x400f5000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_CLKIN_EN_SEL__OFFSET
CYFLD_UDB_PA_CLKIN_EN_SEL__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_CLKIN_EN_SEL__SIZE
CYFLD_UDB_PA_CLKIN_EN_SEL__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_EN_SEL_PIN_RC
CYVAL_UDB_PA_CLKIN_EN_SEL_PIN_RC EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_EN_SEL_DSI_RC_0
CYVAL_UDB_PA_CLKIN_EN_SEL_DSI_RC_0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_EN_SEL_DSI_RC_1
CYVAL_UDB_PA_CLKIN_EN_SEL_DSI_RC_1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_EN_SEL_DSI_RC_2
CYVAL_UDB_PA_CLKIN_EN_SEL_DSI_RC_2 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_CLKIN_EN_MODE__OFFSET
CYFLD_UDB_PA_CLKIN_EN_MODE__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_CLKIN_EN_MODE__SIZE
CYFLD_UDB_PA_CLKIN_EN_MODE__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_EN_MODE_OFF
CYVAL_UDB_PA_CLKIN_EN_MODE_OFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_EN_MODE_ON
CYVAL_UDB_PA_CLKIN_EN_MODE_ON EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_EN_MODE_POSEDGE
CYVAL_UDB_PA_CLKIN_EN_MODE_POSEDGE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_EN_MODE_LEVEL
CYVAL_UDB_PA_CLKIN_EN_MODE_LEVEL EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_CLKIN_EN_INV__OFFSET
CYFLD_UDB_PA_CLKIN_EN_INV__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_CLKIN_EN_INV__SIZE
CYFLD_UDB_PA_CLKIN_EN_INV__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_EN_INV_NOINV
CYVAL_UDB_PA_CLKIN_EN_INV_NOINV EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_EN_INV_INV
CYVAL_UDB_PA_CLKIN_EN_INV_INV EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_CLKIN_INV__OFFSET
CYFLD_UDB_PA_CLKIN_INV__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_CLKIN_INV__SIZE
CYFLD_UDB_PA_CLKIN_INV__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_INV_NOINV
CYVAL_UDB_PA_CLKIN_INV_NOINV EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_INV_INV
CYVAL_UDB_PA_CLKIN_INV_INV EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_NC__OFFSET
CYFLD_UDB_PA_NC__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_NC__SIZE
CYFLD_UDB_PA_NC__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA0_CFG1
CYREG_UDB_PA0_CFG1 EQU 0x400f5001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_CLKOUT_EN_SEL__OFFSET
CYFLD_UDB_PA_CLKOUT_EN_SEL__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_CLKOUT_EN_SEL__SIZE
CYFLD_UDB_PA_CLKOUT_EN_SEL__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_EN_SEL_PIN_RC
CYVAL_UDB_PA_CLKOUT_EN_SEL_PIN_RC EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_EN_SEL_DSI_RC_0
CYVAL_UDB_PA_CLKOUT_EN_SEL_DSI_RC_0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_EN_SEL_DSI_RC_1
CYVAL_UDB_PA_CLKOUT_EN_SEL_DSI_RC_1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_EN_SEL_DSI_RC_2
CYVAL_UDB_PA_CLKOUT_EN_SEL_DSI_RC_2 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_CLKOUT_EN_MODE__OFFSET
CYFLD_UDB_PA_CLKOUT_EN_MODE__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_CLKOUT_EN_MODE__SIZE
CYFLD_UDB_PA_CLKOUT_EN_MODE__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_EN_MODE_OFF
CYVAL_UDB_PA_CLKOUT_EN_MODE_OFF EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_EN_MODE_ON
CYVAL_UDB_PA_CLKOUT_EN_MODE_ON EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_EN_MODE_POSEDGE
CYVAL_UDB_PA_CLKOUT_EN_MODE_POSEDGE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_EN_MODE_LEVEL
CYVAL_UDB_PA_CLKOUT_EN_MODE_LEVEL EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_CLKOUT_EN_INV__OFFSET
CYFLD_UDB_PA_CLKOUT_EN_INV__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_CLKOUT_EN_INV__SIZE
CYFLD_UDB_PA_CLKOUT_EN_INV__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_EN_INV_NOINV
CYVAL_UDB_PA_CLKOUT_EN_INV_NOINV EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_EN_INV_INV
CYVAL_UDB_PA_CLKOUT_EN_INV_INV EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_CLKOUT_INV__OFFSET
CYFLD_UDB_PA_CLKOUT_INV__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_CLKOUT_INV__SIZE
CYFLD_UDB_PA_CLKOUT_INV__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_INV_NOINV
CYVAL_UDB_PA_CLKOUT_INV_NOINV EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_INV_INV
CYVAL_UDB_PA_CLKOUT_INV_INV EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA0_CFG2
CYREG_UDB_PA0_CFG2 EQU 0x400f5002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_CLKIN_SEL__OFFSET
CYFLD_UDB_PA_CLKIN_SEL__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_CLKIN_SEL__SIZE
CYFLD_UDB_PA_CLKIN_SEL__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_GCLK0
CYVAL_UDB_PA_CLKIN_SEL_GCLK0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_GCLK1
CYVAL_UDB_PA_CLKIN_SEL_GCLK1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_GCLK2
CYVAL_UDB_PA_CLKIN_SEL_GCLK2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_GCLK3
CYVAL_UDB_PA_CLKIN_SEL_GCLK3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_GCLK4
CYVAL_UDB_PA_CLKIN_SEL_GCLK4 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_GCLK5
CYVAL_UDB_PA_CLKIN_SEL_GCLK5 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_GCLK6
CYVAL_UDB_PA_CLKIN_SEL_GCLK6 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_GCLK7
CYVAL_UDB_PA_CLKIN_SEL_GCLK7 EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_BUS_CLK_APP
CYVAL_UDB_PA_CLKIN_SEL_BUS_CLK_APP EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_PIN_RC
CYVAL_UDB_PA_CLKIN_SEL_PIN_RC EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_DSI_RC_0
CYVAL_UDB_PA_CLKIN_SEL_DSI_RC_0 EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_DSI_RC_1
CYVAL_UDB_PA_CLKIN_SEL_DSI_RC_1 EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_DSI_RC_2
CYVAL_UDB_PA_CLKIN_SEL_DSI_RC_2 EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_CLKOUT_SEL__OFFSET
CYFLD_UDB_PA_CLKOUT_SEL__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_CLKOUT_SEL__SIZE
CYFLD_UDB_PA_CLKOUT_SEL__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_GCLK0
CYVAL_UDB_PA_CLKOUT_SEL_GCLK0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_GCLK1
CYVAL_UDB_PA_CLKOUT_SEL_GCLK1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_GCLK2
CYVAL_UDB_PA_CLKOUT_SEL_GCLK2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_GCLK3
CYVAL_UDB_PA_CLKOUT_SEL_GCLK3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_GCLK4
CYVAL_UDB_PA_CLKOUT_SEL_GCLK4 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_GCLK5
CYVAL_UDB_PA_CLKOUT_SEL_GCLK5 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_GCLK6
CYVAL_UDB_PA_CLKOUT_SEL_GCLK6 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_GCLK7
CYVAL_UDB_PA_CLKOUT_SEL_GCLK7 EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_BUS_CLK_APP
CYVAL_UDB_PA_CLKOUT_SEL_BUS_CLK_APP EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_PIN_RC
CYVAL_UDB_PA_CLKOUT_SEL_PIN_RC EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_DSI_RC_0
CYVAL_UDB_PA_CLKOUT_SEL_DSI_RC_0 EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_DSI_RC_1
CYVAL_UDB_PA_CLKOUT_SEL_DSI_RC_1 EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_DSI_RC_2
CYVAL_UDB_PA_CLKOUT_SEL_DSI_RC_2 EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA0_CFG3
CYREG_UDB_PA0_CFG3 EQU 0x400f5003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_RES_IN_SEL__OFFSET
CYFLD_UDB_PA_RES_IN_SEL__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_RES_IN_SEL__SIZE
CYFLD_UDB_PA_RES_IN_SEL__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_RES_IN_SEL_PIN_RC
CYVAL_UDB_PA_RES_IN_SEL_PIN_RC EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_RES_IN_SEL_DSI_RC_0
CYVAL_UDB_PA_RES_IN_SEL_DSI_RC_0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_RES_IN_SEL_DSI_RC_1
CYVAL_UDB_PA_RES_IN_SEL_DSI_RC_1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_RES_IN_SEL_DSI_RC_2
CYVAL_UDB_PA_RES_IN_SEL_DSI_RC_2 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_RES_IN_INV__OFFSET
CYFLD_UDB_PA_RES_IN_INV__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_RES_IN_INV__SIZE
CYFLD_UDB_PA_RES_IN_INV__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_RES_IN_INV_NOINV
CYVAL_UDB_PA_RES_IN_INV_NOINV EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_RES_IN_INV_INV
CYVAL_UDB_PA_RES_IN_INV_INV EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_NC0__OFFSET
CYFLD_UDB_PA_NC0__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_NC0__SIZE
CYFLD_UDB_PA_NC0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_RES_OUT_SEL__OFFSET
CYFLD_UDB_PA_RES_OUT_SEL__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_RES_OUT_SEL__SIZE
CYFLD_UDB_PA_RES_OUT_SEL__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_RES_OUT_SEL_PIN_RC
CYVAL_UDB_PA_RES_OUT_SEL_PIN_RC EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_RES_OUT_SEL_DSI_RC_0
CYVAL_UDB_PA_RES_OUT_SEL_DSI_RC_0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_RES_OUT_SEL_DSI_RC_1
CYVAL_UDB_PA_RES_OUT_SEL_DSI_RC_1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_RES_OUT_SEL_DSI_RC_2
CYVAL_UDB_PA_RES_OUT_SEL_DSI_RC_2 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_RES_OUT_INV__OFFSET
CYFLD_UDB_PA_RES_OUT_INV__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_RES_OUT_INV__SIZE
CYFLD_UDB_PA_RES_OUT_INV__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_RES_OUT_INV_NOINV
CYVAL_UDB_PA_RES_OUT_INV_NOINV EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_RES_OUT_INV_INV
CYVAL_UDB_PA_RES_OUT_INV_INV EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_NC7__OFFSET
CYFLD_UDB_PA_NC7__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_NC7__SIZE
CYFLD_UDB_PA_NC7__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA0_CFG4
CYREG_UDB_PA0_CFG4 EQU 0x400f5004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_RES_IN_EN__OFFSET
CYFLD_UDB_PA_RES_IN_EN__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_RES_IN_EN__SIZE
CYFLD_UDB_PA_RES_IN_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_RES_IN_EN_DISABLE
CYVAL_UDB_PA_RES_IN_EN_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_RES_IN_EN_ENABLE
CYVAL_UDB_PA_RES_IN_EN_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_RES_OUT_EN__OFFSET
CYFLD_UDB_PA_RES_OUT_EN__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_RES_OUT_EN__SIZE
CYFLD_UDB_PA_RES_OUT_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_RES_OUT_EN_DISABLE
CYVAL_UDB_PA_RES_OUT_EN_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_RES_OUT_EN_ENABLE
CYVAL_UDB_PA_RES_OUT_EN_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_RES_OE_EN__OFFSET
CYFLD_UDB_PA_RES_OE_EN__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_RES_OE_EN__SIZE
CYFLD_UDB_PA_RES_OE_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_RES_OE_EN_DISABLE
CYVAL_UDB_PA_RES_OE_EN_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_RES_OE_EN_ENABLE
CYVAL_UDB_PA_RES_OE_EN_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_NC7654__OFFSET
CYFLD_UDB_PA_NC7654__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_NC7654__SIZE
CYFLD_UDB_PA_NC7654__SIZE EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA0_CFG5
CYREG_UDB_PA0_CFG5 EQU 0x400f5005
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_PIN_SEL__OFFSET
CYFLD_UDB_PA_PIN_SEL__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_PIN_SEL__SIZE
CYFLD_UDB_PA_PIN_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_PIN_SEL_PIN0
CYVAL_UDB_PA_PIN_SEL_PIN0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_PIN_SEL_PIN1
CYVAL_UDB_PA_PIN_SEL_PIN1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_PIN_SEL_PIN2
CYVAL_UDB_PA_PIN_SEL_PIN2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_PIN_SEL_PIN3
CYVAL_UDB_PA_PIN_SEL_PIN3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_PIN_SEL_PIN4
CYVAL_UDB_PA_PIN_SEL_PIN4 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_PIN_SEL_PIN5
CYVAL_UDB_PA_PIN_SEL_PIN5 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_PIN_SEL_PIN6
CYVAL_UDB_PA_PIN_SEL_PIN6 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_PIN_SEL_PIN7
CYVAL_UDB_PA_PIN_SEL_PIN7 EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA0_CFG6
CYREG_UDB_PA0_CFG6 EQU 0x400f5006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC0__OFFSET
CYFLD_UDB_PA_IN_SYNC0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC0__SIZE
CYFLD_UDB_PA_IN_SYNC0__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC0_TRANSPARENT
CYVAL_UDB_PA_IN_SYNC0_TRANSPARENT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC0_SINGLESYNC
CYVAL_UDB_PA_IN_SYNC0_SINGLESYNC EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC0_DOUBLESYNC
CYVAL_UDB_PA_IN_SYNC0_DOUBLESYNC EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC0_RSVD
CYVAL_UDB_PA_IN_SYNC0_RSVD EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC1__OFFSET
CYFLD_UDB_PA_IN_SYNC1__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC1__SIZE
CYFLD_UDB_PA_IN_SYNC1__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC1_TRANSPARENT
CYVAL_UDB_PA_IN_SYNC1_TRANSPARENT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC1_SINGLESYNC
CYVAL_UDB_PA_IN_SYNC1_SINGLESYNC EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC1_DOUBLESYNC
CYVAL_UDB_PA_IN_SYNC1_DOUBLESYNC EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC1_RSVD
CYVAL_UDB_PA_IN_SYNC1_RSVD EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC2__OFFSET
CYFLD_UDB_PA_IN_SYNC2__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC2__SIZE
CYFLD_UDB_PA_IN_SYNC2__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC2_TRANSPARENT
CYVAL_UDB_PA_IN_SYNC2_TRANSPARENT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC2_SINGLESYNC
CYVAL_UDB_PA_IN_SYNC2_SINGLESYNC EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC2_DOUBLESYNC
CYVAL_UDB_PA_IN_SYNC2_DOUBLESYNC EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC2_RSVD
CYVAL_UDB_PA_IN_SYNC2_RSVD EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC3__OFFSET
CYFLD_UDB_PA_IN_SYNC3__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC3__SIZE
CYFLD_UDB_PA_IN_SYNC3__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC3_TRANSPARENT
CYVAL_UDB_PA_IN_SYNC3_TRANSPARENT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC3_SINGLESYNC
CYVAL_UDB_PA_IN_SYNC3_SINGLESYNC EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC3_DOUBLESYNC
CYVAL_UDB_PA_IN_SYNC3_DOUBLESYNC EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC3_RSVD
CYVAL_UDB_PA_IN_SYNC3_RSVD EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA0_CFG7
CYREG_UDB_PA0_CFG7 EQU 0x400f5007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC4__OFFSET
CYFLD_UDB_PA_IN_SYNC4__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC4__SIZE
CYFLD_UDB_PA_IN_SYNC4__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC4_TRANSPARENT
CYVAL_UDB_PA_IN_SYNC4_TRANSPARENT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC4_SINGLESYNC
CYVAL_UDB_PA_IN_SYNC4_SINGLESYNC EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC4_DOUBLESYNC
CYVAL_UDB_PA_IN_SYNC4_DOUBLESYNC EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC4_RSVD
CYVAL_UDB_PA_IN_SYNC4_RSVD EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC5__OFFSET
CYFLD_UDB_PA_IN_SYNC5__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC5__SIZE
CYFLD_UDB_PA_IN_SYNC5__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC5_TRANSPARENT
CYVAL_UDB_PA_IN_SYNC5_TRANSPARENT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC5_SINGLESYNC
CYVAL_UDB_PA_IN_SYNC5_SINGLESYNC EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC5_DOUBLESYNC
CYVAL_UDB_PA_IN_SYNC5_DOUBLESYNC EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC5_RSVD
CYVAL_UDB_PA_IN_SYNC5_RSVD EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC6__OFFSET
CYFLD_UDB_PA_IN_SYNC6__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC6__SIZE
CYFLD_UDB_PA_IN_SYNC6__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC6_TRANSPARENT
CYVAL_UDB_PA_IN_SYNC6_TRANSPARENT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC6_SINGLESYNC
CYVAL_UDB_PA_IN_SYNC6_SINGLESYNC EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC6_DOUBLESYNC
CYVAL_UDB_PA_IN_SYNC6_DOUBLESYNC EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC6_RSVD
CYVAL_UDB_PA_IN_SYNC6_RSVD EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC7__OFFSET
CYFLD_UDB_PA_IN_SYNC7__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC7__SIZE
CYFLD_UDB_PA_IN_SYNC7__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC7_TRANSPARENT
CYVAL_UDB_PA_IN_SYNC7_TRANSPARENT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC7_SINGLESYNC
CYVAL_UDB_PA_IN_SYNC7_SINGLESYNC EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC7_DOUBLESYNC
CYVAL_UDB_PA_IN_SYNC7_DOUBLESYNC EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC7_RSVD
CYVAL_UDB_PA_IN_SYNC7_RSVD EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA0_CFG8
CYREG_UDB_PA0_CFG8 EQU 0x400f5008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC0__OFFSET
CYFLD_UDB_PA_OUT_SYNC0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC0__SIZE
CYFLD_UDB_PA_OUT_SYNC0__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC0_TRANSPARENT
CYVAL_UDB_PA_OUT_SYNC0_TRANSPARENT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC0_SINGLESYNC
CYVAL_UDB_PA_OUT_SYNC0_SINGLESYNC EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC0_CLOCK
CYVAL_UDB_PA_OUT_SYNC0_CLOCK EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC0_CLOCKINV
CYVAL_UDB_PA_OUT_SYNC0_CLOCKINV EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC1__OFFSET
CYFLD_UDB_PA_OUT_SYNC1__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC1__SIZE
CYFLD_UDB_PA_OUT_SYNC1__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC1_TRANSPARENT
CYVAL_UDB_PA_OUT_SYNC1_TRANSPARENT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC1_SINGLESYNC
CYVAL_UDB_PA_OUT_SYNC1_SINGLESYNC EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC1_CLOCK
CYVAL_UDB_PA_OUT_SYNC1_CLOCK EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC1_CLOCKINV
CYVAL_UDB_PA_OUT_SYNC1_CLOCKINV EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC2__OFFSET
CYFLD_UDB_PA_OUT_SYNC2__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC2__SIZE
CYFLD_UDB_PA_OUT_SYNC2__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC2_TRANSPARENT
CYVAL_UDB_PA_OUT_SYNC2_TRANSPARENT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC2_SINGLESYNC
CYVAL_UDB_PA_OUT_SYNC2_SINGLESYNC EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC2_CLOCK
CYVAL_UDB_PA_OUT_SYNC2_CLOCK EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC2_CLOCKINV
CYVAL_UDB_PA_OUT_SYNC2_CLOCKINV EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC3__OFFSET
CYFLD_UDB_PA_OUT_SYNC3__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC3__SIZE
CYFLD_UDB_PA_OUT_SYNC3__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC3_TRANSPARENT
CYVAL_UDB_PA_OUT_SYNC3_TRANSPARENT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC3_SINGLESYNC
CYVAL_UDB_PA_OUT_SYNC3_SINGLESYNC EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC3_CLOCK
CYVAL_UDB_PA_OUT_SYNC3_CLOCK EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC3_CLOCKINV
CYVAL_UDB_PA_OUT_SYNC3_CLOCKINV EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA0_CFG9
CYREG_UDB_PA0_CFG9 EQU 0x400f5009
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC4__OFFSET
CYFLD_UDB_PA_OUT_SYNC4__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC4__SIZE
CYFLD_UDB_PA_OUT_SYNC4__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC4_TRANSPARENT
CYVAL_UDB_PA_OUT_SYNC4_TRANSPARENT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC4_SINGLESYNC
CYVAL_UDB_PA_OUT_SYNC4_SINGLESYNC EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC4_CLOCK
CYVAL_UDB_PA_OUT_SYNC4_CLOCK EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC4_CLOCKINV
CYVAL_UDB_PA_OUT_SYNC4_CLOCKINV EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC5__OFFSET
CYFLD_UDB_PA_OUT_SYNC5__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC5__SIZE
CYFLD_UDB_PA_OUT_SYNC5__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC5_TRANSPARENT
CYVAL_UDB_PA_OUT_SYNC5_TRANSPARENT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC5_SINGLESYNC
CYVAL_UDB_PA_OUT_SYNC5_SINGLESYNC EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC5_CLOCK
CYVAL_UDB_PA_OUT_SYNC5_CLOCK EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC5_CLOCKINV
CYVAL_UDB_PA_OUT_SYNC5_CLOCKINV EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC6__OFFSET
CYFLD_UDB_PA_OUT_SYNC6__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC6__SIZE
CYFLD_UDB_PA_OUT_SYNC6__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC6_TRANSPARENT
CYVAL_UDB_PA_OUT_SYNC6_TRANSPARENT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC6_SINGLESYNC
CYVAL_UDB_PA_OUT_SYNC6_SINGLESYNC EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC6_CLOCK
CYVAL_UDB_PA_OUT_SYNC6_CLOCK EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC6_CLOCKINV
CYVAL_UDB_PA_OUT_SYNC6_CLOCKINV EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC7__OFFSET
CYFLD_UDB_PA_OUT_SYNC7__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC7__SIZE
CYFLD_UDB_PA_OUT_SYNC7__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC7_TRANSPARENT
CYVAL_UDB_PA_OUT_SYNC7_TRANSPARENT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC7_SINGLESYNC
CYVAL_UDB_PA_OUT_SYNC7_SINGLESYNC EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC7_CLOCK
CYVAL_UDB_PA_OUT_SYNC7_CLOCK EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC7_CLOCKINV
CYVAL_UDB_PA_OUT_SYNC7_CLOCKINV EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA0_CFG10
CYREG_UDB_PA0_CFG10 EQU 0x400f500a
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL0__OFFSET
CYFLD_UDB_PA_DATA_SEL0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL0__SIZE
CYFLD_UDB_PA_DATA_SEL0__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL0_DSI_OUTPUT0
CYVAL_UDB_PA_DATA_SEL0_DSI_OUTPUT0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL0_DSI_OUTPUT1
CYVAL_UDB_PA_DATA_SEL0_DSI_OUTPUT1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL0_DSI_OUTPUT2
CYVAL_UDB_PA_DATA_SEL0_DSI_OUTPUT2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL0_DSI_OUTPUT3
CYVAL_UDB_PA_DATA_SEL0_DSI_OUTPUT3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL1__OFFSET
CYFLD_UDB_PA_DATA_SEL1__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL1__SIZE
CYFLD_UDB_PA_DATA_SEL1__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL1_DSI_OUTPUT0
CYVAL_UDB_PA_DATA_SEL1_DSI_OUTPUT0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL1_DSI_OUTPUT1
CYVAL_UDB_PA_DATA_SEL1_DSI_OUTPUT1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL1_DSI_OUTPUT2
CYVAL_UDB_PA_DATA_SEL1_DSI_OUTPUT2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL1_DSI_OUTPUT3
CYVAL_UDB_PA_DATA_SEL1_DSI_OUTPUT3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL2__OFFSET
CYFLD_UDB_PA_DATA_SEL2__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL2__SIZE
CYFLD_UDB_PA_DATA_SEL2__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL2_DSI_OUTPUT0
CYVAL_UDB_PA_DATA_SEL2_DSI_OUTPUT0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL2_DSI_OUTPUT1
CYVAL_UDB_PA_DATA_SEL2_DSI_OUTPUT1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL2_DSI_OUTPUT2
CYVAL_UDB_PA_DATA_SEL2_DSI_OUTPUT2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL2_DSI_OUTPUT3
CYVAL_UDB_PA_DATA_SEL2_DSI_OUTPUT3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL3__OFFSET
CYFLD_UDB_PA_DATA_SEL3__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL3__SIZE
CYFLD_UDB_PA_DATA_SEL3__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL3_DSI_OUTPUT0
CYVAL_UDB_PA_DATA_SEL3_DSI_OUTPUT0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL3_DSI_OUTPUT1
CYVAL_UDB_PA_DATA_SEL3_DSI_OUTPUT1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL3_DSI_OUTPUT2
CYVAL_UDB_PA_DATA_SEL3_DSI_OUTPUT2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL3_DSI_OUTPUT3
CYVAL_UDB_PA_DATA_SEL3_DSI_OUTPUT3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA0_CFG11
CYREG_UDB_PA0_CFG11 EQU 0x400f500b
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL4__OFFSET
CYFLD_UDB_PA_DATA_SEL4__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL4__SIZE
CYFLD_UDB_PA_DATA_SEL4__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL4_DSI_OUTPUT0
CYVAL_UDB_PA_DATA_SEL4_DSI_OUTPUT0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL4_DSI_OUTPUT1
CYVAL_UDB_PA_DATA_SEL4_DSI_OUTPUT1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL4_DSI_OUTPUT2
CYVAL_UDB_PA_DATA_SEL4_DSI_OUTPUT2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL4_DSI_OUTPUT3
CYVAL_UDB_PA_DATA_SEL4_DSI_OUTPUT3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL5__OFFSET
CYFLD_UDB_PA_DATA_SEL5__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL5__SIZE
CYFLD_UDB_PA_DATA_SEL5__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL5_DSI_OUTPUT0
CYVAL_UDB_PA_DATA_SEL5_DSI_OUTPUT0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL5_DSI_OUTPUT1
CYVAL_UDB_PA_DATA_SEL5_DSI_OUTPUT1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL5_DSI_OUTPUT2
CYVAL_UDB_PA_DATA_SEL5_DSI_OUTPUT2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL5_DSI_OUTPUT3
CYVAL_UDB_PA_DATA_SEL5_DSI_OUTPUT3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL6__OFFSET
CYFLD_UDB_PA_DATA_SEL6__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL6__SIZE
CYFLD_UDB_PA_DATA_SEL6__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL6_DSI_OUTPUT0
CYVAL_UDB_PA_DATA_SEL6_DSI_OUTPUT0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL6_DSI_OUTPUT1
CYVAL_UDB_PA_DATA_SEL6_DSI_OUTPUT1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL6_DSI_OUTPUT2
CYVAL_UDB_PA_DATA_SEL6_DSI_OUTPUT2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL6_DSI_OUTPUT3
CYVAL_UDB_PA_DATA_SEL6_DSI_OUTPUT3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL7__OFFSET
CYFLD_UDB_PA_DATA_SEL7__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL7__SIZE
CYFLD_UDB_PA_DATA_SEL7__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL7_DSI_OUTPUT0
CYVAL_UDB_PA_DATA_SEL7_DSI_OUTPUT0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL7_DSI_OUTPUT1
CYVAL_UDB_PA_DATA_SEL7_DSI_OUTPUT1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL7_DSI_OUTPUT2
CYVAL_UDB_PA_DATA_SEL7_DSI_OUTPUT2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL7_DSI_OUTPUT3
CYVAL_UDB_PA_DATA_SEL7_DSI_OUTPUT3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA0_CFG12
CYREG_UDB_PA0_CFG12 EQU 0x400f500c
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL0__OFFSET
CYFLD_UDB_PA_OE_SEL0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL0__SIZE
CYFLD_UDB_PA_OE_SEL0__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL0_DSI_OE_OUT0
CYVAL_UDB_PA_OE_SEL0_DSI_OE_OUT0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL0_DSI_OE_OUT1
CYVAL_UDB_PA_OE_SEL0_DSI_OE_OUT1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL0_DSI_OE_OUT2
CYVAL_UDB_PA_OE_SEL0_DSI_OE_OUT2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL0_DSI_OE_OUT3
CYVAL_UDB_PA_OE_SEL0_DSI_OE_OUT3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL1__OFFSET
CYFLD_UDB_PA_OE_SEL1__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL1__SIZE
CYFLD_UDB_PA_OE_SEL1__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL1_DSI_OE_OUT0
CYVAL_UDB_PA_OE_SEL1_DSI_OE_OUT0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL1_DSI_OE_OUT1
CYVAL_UDB_PA_OE_SEL1_DSI_OE_OUT1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL1_DSI_OE_OUT2
CYVAL_UDB_PA_OE_SEL1_DSI_OE_OUT2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL1_DSI_OE_OUT3
CYVAL_UDB_PA_OE_SEL1_DSI_OE_OUT3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL2__OFFSET
CYFLD_UDB_PA_OE_SEL2__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL2__SIZE
CYFLD_UDB_PA_OE_SEL2__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL2_DSI_OE_OUT0
CYVAL_UDB_PA_OE_SEL2_DSI_OE_OUT0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL2_DSI_OE_OUT1
CYVAL_UDB_PA_OE_SEL2_DSI_OE_OUT1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL2_DSI_OE_OUT2
CYVAL_UDB_PA_OE_SEL2_DSI_OE_OUT2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL2_DSI_OE_OUT3
CYVAL_UDB_PA_OE_SEL2_DSI_OE_OUT3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL3__OFFSET
CYFLD_UDB_PA_OE_SEL3__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL3__SIZE
CYFLD_UDB_PA_OE_SEL3__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL3_DSI_OE_OUT0
CYVAL_UDB_PA_OE_SEL3_DSI_OE_OUT0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL3_DSI_OE_OUT1
CYVAL_UDB_PA_OE_SEL3_DSI_OE_OUT1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL3_DSI_OE_OUT2
CYVAL_UDB_PA_OE_SEL3_DSI_OE_OUT2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL3_DSI_OE_OUT3
CYVAL_UDB_PA_OE_SEL3_DSI_OE_OUT3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA0_CFG13
CYREG_UDB_PA0_CFG13 EQU 0x400f500d
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL4__OFFSET
CYFLD_UDB_PA_OE_SEL4__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL4__SIZE
CYFLD_UDB_PA_OE_SEL4__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL4_DSI_OE_OUT0
CYVAL_UDB_PA_OE_SEL4_DSI_OE_OUT0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL4_DSI_OE_OUT1
CYVAL_UDB_PA_OE_SEL4_DSI_OE_OUT1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL4_DSI_OE_OUT2
CYVAL_UDB_PA_OE_SEL4_DSI_OE_OUT2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL4_DSI_OE_OUT3
CYVAL_UDB_PA_OE_SEL4_DSI_OE_OUT3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL5__OFFSET
CYFLD_UDB_PA_OE_SEL5__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL5__SIZE
CYFLD_UDB_PA_OE_SEL5__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL5_DSI_OE_OUT0
CYVAL_UDB_PA_OE_SEL5_DSI_OE_OUT0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL5_DSI_OE_OUT1
CYVAL_UDB_PA_OE_SEL5_DSI_OE_OUT1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL5_DSI_OE_OUT2
CYVAL_UDB_PA_OE_SEL5_DSI_OE_OUT2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL5_DSI_OE_OUT3
CYVAL_UDB_PA_OE_SEL5_DSI_OE_OUT3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL6__OFFSET
CYFLD_UDB_PA_OE_SEL6__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL6__SIZE
CYFLD_UDB_PA_OE_SEL6__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL6_DSI_OE_OUT0
CYVAL_UDB_PA_OE_SEL6_DSI_OE_OUT0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL6_DSI_OE_OUT1
CYVAL_UDB_PA_OE_SEL6_DSI_OE_OUT1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL6_DSI_OE_OUT2
CYVAL_UDB_PA_OE_SEL6_DSI_OE_OUT2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL6_DSI_OE_OUT3
CYVAL_UDB_PA_OE_SEL6_DSI_OE_OUT3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL7__OFFSET
CYFLD_UDB_PA_OE_SEL7__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL7__SIZE
CYFLD_UDB_PA_OE_SEL7__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL7_DSI_OE_OUT0
CYVAL_UDB_PA_OE_SEL7_DSI_OE_OUT0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL7_DSI_OE_OUT1
CYVAL_UDB_PA_OE_SEL7_DSI_OE_OUT1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL7_DSI_OE_OUT2
CYVAL_UDB_PA_OE_SEL7_DSI_OE_OUT2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL7_DSI_OE_OUT3
CYVAL_UDB_PA_OE_SEL7_DSI_OE_OUT3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA0_CFG14
CYREG_UDB_PA0_CFG14 EQU 0x400f500e
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OE_SYNC0__OFFSET
CYFLD_UDB_PA_OE_SYNC0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OE_SYNC0__SIZE
CYFLD_UDB_PA_OE_SYNC0__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC0_TRANSPARENT
CYVAL_UDB_PA_OE_SYNC0_TRANSPARENT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC0_SINGLESYNC
CYVAL_UDB_PA_OE_SYNC0_SINGLESYNC EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC0_CONSTANT1
CYVAL_UDB_PA_OE_SYNC0_CONSTANT1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC0_CONSTANT0
CYVAL_UDB_PA_OE_SYNC0_CONSTANT0 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OE_SYNC1__OFFSET
CYFLD_UDB_PA_OE_SYNC1__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OE_SYNC1__SIZE
CYFLD_UDB_PA_OE_SYNC1__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC1_TRANSPARENT
CYVAL_UDB_PA_OE_SYNC1_TRANSPARENT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC1_SINGLESYNC
CYVAL_UDB_PA_OE_SYNC1_SINGLESYNC EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC1_CONSTANT1
CYVAL_UDB_PA_OE_SYNC1_CONSTANT1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC1_CONSTANT0
CYVAL_UDB_PA_OE_SYNC1_CONSTANT0 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OE_SYNC2__OFFSET
CYFLD_UDB_PA_OE_SYNC2__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OE_SYNC2__SIZE
CYFLD_UDB_PA_OE_SYNC2__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC2_TRANSPARENT
CYVAL_UDB_PA_OE_SYNC2_TRANSPARENT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC2_SINGLESYNC
CYVAL_UDB_PA_OE_SYNC2_SINGLESYNC EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC2_CONSTANT1
CYVAL_UDB_PA_OE_SYNC2_CONSTANT1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC2_CONSTANT0
CYVAL_UDB_PA_OE_SYNC2_CONSTANT0 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OE_SYNC3__OFFSET
CYFLD_UDB_PA_OE_SYNC3__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_PA_OE_SYNC3__SIZE
CYFLD_UDB_PA_OE_SYNC3__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC3_TRANSPARENT
CYVAL_UDB_PA_OE_SYNC3_TRANSPARENT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC3_SINGLESYNC
CYVAL_UDB_PA_OE_SYNC3_SINGLESYNC EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC3_CONSTANT1
CYVAL_UDB_PA_OE_SYNC3_CONSTANT1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC3_CONSTANT0
CYVAL_UDB_PA_OE_SYNC3_CONSTANT0 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYDEV_UDB_PA1_BASE
CYDEV_UDB_PA1_BASE EQU 0x400f5010
ENDIF
IF :LNOT::DEF:CYDEV_UDB_PA1_SIZE
CYDEV_UDB_PA1_SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA1_CFG0
CYREG_UDB_PA1_CFG0 EQU 0x400f5010
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA1_CFG1
CYREG_UDB_PA1_CFG1 EQU 0x400f5011
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA1_CFG2
CYREG_UDB_PA1_CFG2 EQU 0x400f5012
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA1_CFG3
CYREG_UDB_PA1_CFG3 EQU 0x400f5013
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA1_CFG4
CYREG_UDB_PA1_CFG4 EQU 0x400f5014
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA1_CFG5
CYREG_UDB_PA1_CFG5 EQU 0x400f5015
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA1_CFG6
CYREG_UDB_PA1_CFG6 EQU 0x400f5016
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA1_CFG7
CYREG_UDB_PA1_CFG7 EQU 0x400f5017
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA1_CFG8
CYREG_UDB_PA1_CFG8 EQU 0x400f5018
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA1_CFG9
CYREG_UDB_PA1_CFG9 EQU 0x400f5019
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA1_CFG10
CYREG_UDB_PA1_CFG10 EQU 0x400f501a
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA1_CFG11
CYREG_UDB_PA1_CFG11 EQU 0x400f501b
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA1_CFG12
CYREG_UDB_PA1_CFG12 EQU 0x400f501c
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA1_CFG13
CYREG_UDB_PA1_CFG13 EQU 0x400f501d
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA1_CFG14
CYREG_UDB_PA1_CFG14 EQU 0x400f501e
ENDIF
IF :LNOT::DEF:CYDEV_UDB_PA2_BASE
CYDEV_UDB_PA2_BASE EQU 0x400f5020
ENDIF
IF :LNOT::DEF:CYDEV_UDB_PA2_SIZE
CYDEV_UDB_PA2_SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA2_CFG0
CYREG_UDB_PA2_CFG0 EQU 0x400f5020
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA2_CFG1
CYREG_UDB_PA2_CFG1 EQU 0x400f5021
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA2_CFG2
CYREG_UDB_PA2_CFG2 EQU 0x400f5022
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA2_CFG3
CYREG_UDB_PA2_CFG3 EQU 0x400f5023
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA2_CFG4
CYREG_UDB_PA2_CFG4 EQU 0x400f5024
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA2_CFG5
CYREG_UDB_PA2_CFG5 EQU 0x400f5025
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA2_CFG6
CYREG_UDB_PA2_CFG6 EQU 0x400f5026
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA2_CFG7
CYREG_UDB_PA2_CFG7 EQU 0x400f5027
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA2_CFG8
CYREG_UDB_PA2_CFG8 EQU 0x400f5028
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA2_CFG9
CYREG_UDB_PA2_CFG9 EQU 0x400f5029
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA2_CFG10
CYREG_UDB_PA2_CFG10 EQU 0x400f502a
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA2_CFG11
CYREG_UDB_PA2_CFG11 EQU 0x400f502b
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA2_CFG12
CYREG_UDB_PA2_CFG12 EQU 0x400f502c
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA2_CFG13
CYREG_UDB_PA2_CFG13 EQU 0x400f502d
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA2_CFG14
CYREG_UDB_PA2_CFG14 EQU 0x400f502e
ENDIF
IF :LNOT::DEF:CYDEV_UDB_PA3_BASE
CYDEV_UDB_PA3_BASE EQU 0x400f5030
ENDIF
IF :LNOT::DEF:CYDEV_UDB_PA3_SIZE
CYDEV_UDB_PA3_SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA3_CFG0
CYREG_UDB_PA3_CFG0 EQU 0x400f5030
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA3_CFG1
CYREG_UDB_PA3_CFG1 EQU 0x400f5031
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA3_CFG2
CYREG_UDB_PA3_CFG2 EQU 0x400f5032
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA3_CFG3
CYREG_UDB_PA3_CFG3 EQU 0x400f5033
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA3_CFG4
CYREG_UDB_PA3_CFG4 EQU 0x400f5034
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA3_CFG5
CYREG_UDB_PA3_CFG5 EQU 0x400f5035
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA3_CFG6
CYREG_UDB_PA3_CFG6 EQU 0x400f5036
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA3_CFG7
CYREG_UDB_PA3_CFG7 EQU 0x400f5037
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA3_CFG8
CYREG_UDB_PA3_CFG8 EQU 0x400f5038
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA3_CFG9
CYREG_UDB_PA3_CFG9 EQU 0x400f5039
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA3_CFG10
CYREG_UDB_PA3_CFG10 EQU 0x400f503a
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA3_CFG11
CYREG_UDB_PA3_CFG11 EQU 0x400f503b
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA3_CFG12
CYREG_UDB_PA3_CFG12 EQU 0x400f503c
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA3_CFG13
CYREG_UDB_PA3_CFG13 EQU 0x400f503d
ENDIF
IF :LNOT::DEF:CYREG_UDB_PA3_CFG14
CYREG_UDB_PA3_CFG14 EQU 0x400f503e
ENDIF
IF :LNOT::DEF:CYDEV_UDB_BCTL0_BASE
CYDEV_UDB_BCTL0_BASE EQU 0x400f6000
ENDIF
IF :LNOT::DEF:CYDEV_UDB_BCTL0_SIZE
CYDEV_UDB_BCTL0_SIZE EQU 0x00001000
ENDIF
IF :LNOT::DEF:CYREG_UDB_BCTL0_DRV
CYREG_UDB_BCTL0_DRV EQU 0x400f6000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_DRV__OFFSET
CYFLD_UDB_BCTL0_DRV__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_DRV__SIZE
CYFLD_UDB_BCTL0_DRV__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_DRV_DISABLE
CYVAL_UDB_BCTL0_DRV_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_DRV_ENABLE
CYVAL_UDB_BCTL0_DRV_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_BCTL0_MDCLK_EN
CYREG_UDB_BCTL0_MDCLK_EN EQU 0x400f6001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_DCEN__OFFSET
CYFLD_UDB_BCTL0_DCEN__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_DCEN__SIZE
CYFLD_UDB_BCTL0_DCEN__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_DCEN_DISABLE
CYVAL_UDB_BCTL0_DCEN_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_DCEN_ENABLE
CYVAL_UDB_BCTL0_DCEN_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_BCTL0_MBCLK_EN
CYREG_UDB_BCTL0_MBCLK_EN EQU 0x400f6002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_BCEN__OFFSET
CYFLD_UDB_BCTL0_BCEN__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_BCEN__SIZE
CYFLD_UDB_BCTL0_BCEN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_BCEN_DISABLE
CYVAL_UDB_BCTL0_BCEN_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_BCEN_ENABLE
CYVAL_UDB_BCTL0_BCEN_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_BCTL0_BOTSEL_L
CYREG_UDB_BCTL0_BOTSEL_L EQU 0x400f6008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL0__OFFSET
CYFLD_UDB_BCTL0_CLK_SEL0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL0__SIZE
CYFLD_UDB_BCTL0_CLK_SEL0__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL0_EDGE_ENABLES
CYVAL_UDB_BCTL0_CLK_SEL0_EDGE_ENABLES EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL0_PORT_INPUT
CYVAL_UDB_BCTL0_CLK_SEL0_PORT_INPUT EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL0_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL0_DSI_OUTPUT EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL0_SYNC_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL0_SYNC_DSI_OUTPUT EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL1__OFFSET
CYFLD_UDB_BCTL0_CLK_SEL1__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL1__SIZE
CYFLD_UDB_BCTL0_CLK_SEL1__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL1_EDGE_ENABLES
CYVAL_UDB_BCTL0_CLK_SEL1_EDGE_ENABLES EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL1_PORT_INPUT
CYVAL_UDB_BCTL0_CLK_SEL1_PORT_INPUT EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL1_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL1_DSI_OUTPUT EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL1_SYNC_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL1_SYNC_DSI_OUTPUT EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL2__OFFSET
CYFLD_UDB_BCTL0_CLK_SEL2__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL2__SIZE
CYFLD_UDB_BCTL0_CLK_SEL2__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL2_EDGE_ENABLES
CYVAL_UDB_BCTL0_CLK_SEL2_EDGE_ENABLES EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL2_PORT_INPUT
CYVAL_UDB_BCTL0_CLK_SEL2_PORT_INPUT EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL2_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL2_DSI_OUTPUT EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL2_SYNC_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL2_SYNC_DSI_OUTPUT EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL3__OFFSET
CYFLD_UDB_BCTL0_CLK_SEL3__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL3__SIZE
CYFLD_UDB_BCTL0_CLK_SEL3__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL3_EDGE_ENABLES
CYVAL_UDB_BCTL0_CLK_SEL3_EDGE_ENABLES EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL3_PORT_INPUT
CYVAL_UDB_BCTL0_CLK_SEL3_PORT_INPUT EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL3_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL3_DSI_OUTPUT EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL3_SYNC_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL3_SYNC_DSI_OUTPUT EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_UDB_BCTL0_BOTSEL_U
CYREG_UDB_BCTL0_BOTSEL_U EQU 0x400f6009
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL4__OFFSET
CYFLD_UDB_BCTL0_CLK_SEL4__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL4__SIZE
CYFLD_UDB_BCTL0_CLK_SEL4__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL4_EDGE_ENABLES
CYVAL_UDB_BCTL0_CLK_SEL4_EDGE_ENABLES EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL4_PORT_INPUT
CYVAL_UDB_BCTL0_CLK_SEL4_PORT_INPUT EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL4_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL4_DSI_OUTPUT EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL4_SYNC_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL4_SYNC_DSI_OUTPUT EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL5__OFFSET
CYFLD_UDB_BCTL0_CLK_SEL5__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL5__SIZE
CYFLD_UDB_BCTL0_CLK_SEL5__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL5_EDGE_ENABLES
CYVAL_UDB_BCTL0_CLK_SEL5_EDGE_ENABLES EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL5_PORT_INPUT
CYVAL_UDB_BCTL0_CLK_SEL5_PORT_INPUT EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL5_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL5_DSI_OUTPUT EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL5_SYNC_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL5_SYNC_DSI_OUTPUT EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL6__OFFSET
CYFLD_UDB_BCTL0_CLK_SEL6__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL6__SIZE
CYFLD_UDB_BCTL0_CLK_SEL6__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL6_EDGE_ENABLES
CYVAL_UDB_BCTL0_CLK_SEL6_EDGE_ENABLES EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL6_PORT_INPUT
CYVAL_UDB_BCTL0_CLK_SEL6_PORT_INPUT EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL6_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL6_DSI_OUTPUT EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL6_SYNC_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL6_SYNC_DSI_OUTPUT EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL7__OFFSET
CYFLD_UDB_BCTL0_CLK_SEL7__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL7__SIZE
CYFLD_UDB_BCTL0_CLK_SEL7__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL7_EDGE_ENABLES
CYVAL_UDB_BCTL0_CLK_SEL7_EDGE_ENABLES EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL7_PORT_INPUT
CYVAL_UDB_BCTL0_CLK_SEL7_PORT_INPUT EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL7_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL7_DSI_OUTPUT EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL7_SYNC_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL7_SYNC_DSI_OUTPUT EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_UDB_BCTL0_TOPSEL_L
CYREG_UDB_BCTL0_TOPSEL_L EQU 0x400f600a
ENDIF
IF :LNOT::DEF:CYREG_UDB_BCTL0_TOPSEL_U
CYREG_UDB_BCTL0_TOPSEL_U EQU 0x400f600b
ENDIF
IF :LNOT::DEF:CYREG_UDB_BCTL0_QCLK_EN0
CYREG_UDB_BCTL0_QCLK_EN0 EQU 0x400f6010
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_DCEN_Q__OFFSET
CYFLD_UDB_BCTL0_DCEN_Q__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_DCEN_Q__SIZE
CYFLD_UDB_BCTL0_DCEN_Q__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_DCEN_Q_DISABLE
CYVAL_UDB_BCTL0_DCEN_Q_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_DCEN_Q_ENABLE
CYVAL_UDB_BCTL0_DCEN_Q_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_BCEN_Q__OFFSET
CYFLD_UDB_BCTL0_BCEN_Q__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_BCEN_Q__SIZE
CYFLD_UDB_BCTL0_BCEN_Q__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_BCEN_Q_DISABLE
CYVAL_UDB_BCTL0_BCEN_Q_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_BCEN_Q_ENABLE
CYVAL_UDB_BCTL0_BCEN_Q_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_GCH_WR_LO__OFFSET
CYFLD_UDB_BCTL0_GCH_WR_LO__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_GCH_WR_LO__SIZE
CYFLD_UDB_BCTL0_GCH_WR_LO__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_GCH_WR_LO_DISABLE
CYVAL_UDB_BCTL0_GCH_WR_LO_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_GCH_WR_LO_ENABLE
CYVAL_UDB_BCTL0_GCH_WR_LO_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_GCH_WR_HI__OFFSET
CYFLD_UDB_BCTL0_GCH_WR_HI__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_GCH_WR_HI__SIZE
CYFLD_UDB_BCTL0_GCH_WR_HI__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_GCH_WR_HI_DISABLE
CYVAL_UDB_BCTL0_GCH_WR_HI_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_GCH_WR_HI_ENABLE
CYVAL_UDB_BCTL0_GCH_WR_HI_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_DISABLE_ROUTE__OFFSET
CYFLD_UDB_BCTL0_DISABLE_ROUTE__OFFSET EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_DISABLE_ROUTE__SIZE
CYFLD_UDB_BCTL0_DISABLE_ROUTE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_DISABLE_ROUTE_DISABLE
CYVAL_UDB_BCTL0_DISABLE_ROUTE_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_DISABLE_ROUTE_ENABLE
CYVAL_UDB_BCTL0_DISABLE_ROUTE_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_GLB_DSI_WR__OFFSET
CYFLD_UDB_BCTL0_GLB_DSI_WR__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_GLB_DSI_WR__SIZE
CYFLD_UDB_BCTL0_GLB_DSI_WR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_GLB_DSI_WR_DISABLE
CYVAL_UDB_BCTL0_GLB_DSI_WR_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_GLB_DSI_WR_ENABLE
CYVAL_UDB_BCTL0_GLB_DSI_WR_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_WR_CFG_OPT__OFFSET
CYFLD_UDB_BCTL0_WR_CFG_OPT__OFFSET EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_WR_CFG_OPT__SIZE
CYFLD_UDB_BCTL0_WR_CFG_OPT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_WR_CFG_OPT_FULL_CYCLE_STB
CYVAL_UDB_BCTL0_WR_CFG_OPT_FULL_CYCLE_STB EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_WR_CFG_OPT_HALF_CYCLE_STB
CYVAL_UDB_BCTL0_WR_CFG_OPT_HALF_CYCLE_STB EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_NC0__OFFSET
CYFLD_UDB_BCTL0_NC0__OFFSET EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_NC0__SIZE
CYFLD_UDB_BCTL0_NC0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_SLEEP_TEST__OFFSET
CYFLD_UDB_BCTL0_SLEEP_TEST__OFFSET EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD_UDB_BCTL0_SLEEP_TEST__SIZE
CYFLD_UDB_BCTL0_SLEEP_TEST__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_SLEEP_TEST_DISABLE
CYVAL_UDB_BCTL0_SLEEP_TEST_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_BCTL0_SLEEP_TEST_ENABLE
CYVAL_UDB_BCTL0_SLEEP_TEST_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_BCTL0_QCLK_EN1
CYREG_UDB_BCTL0_QCLK_EN1 EQU 0x400f6012
ENDIF
IF :LNOT::DEF:CYDEV_UDB_UDBIF_BASE
CYDEV_UDB_UDBIF_BASE EQU 0x400f7000
ENDIF
IF :LNOT::DEF:CYDEV_UDB_UDBIF_SIZE
CYDEV_UDB_UDBIF_SIZE EQU 0x00001000
ENDIF
IF :LNOT::DEF:CYREG_UDB_UDBIF_BANK_CTL
CYREG_UDB_UDBIF_BANK_CTL EQU 0x400f7000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_UDBIF_DIS_COR__OFFSET
CYFLD_UDB_UDBIF_DIS_COR__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_UDBIF_DIS_COR__SIZE
CYFLD_UDB_UDBIF_DIS_COR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_DIS_COR_NORMAL
CYVAL_UDB_UDBIF_DIS_COR_NORMAL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_DIS_COR_DISABLE
CYVAL_UDB_UDBIF_DIS_COR_DISABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_UDBIF_ROUTE_EN__OFFSET
CYFLD_UDB_UDBIF_ROUTE_EN__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_UDBIF_ROUTE_EN__SIZE
CYFLD_UDB_UDBIF_ROUTE_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_ROUTE_EN_DISABLE
CYVAL_UDB_UDBIF_ROUTE_EN_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_ROUTE_EN_ENABLE
CYVAL_UDB_UDBIF_ROUTE_EN_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_UDBIF_BANK_EN__OFFSET
CYFLD_UDB_UDBIF_BANK_EN__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_UDBIF_BANK_EN__SIZE
CYFLD_UDB_UDBIF_BANK_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_BANK_EN_DISABLE
CYVAL_UDB_UDBIF_BANK_EN_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_BANK_EN_ENABLE
CYVAL_UDB_UDBIF_BANK_EN_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_UDBIF_LOCK__OFFSET
CYFLD_UDB_UDBIF_LOCK__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_UDBIF_LOCK__SIZE
CYFLD_UDB_UDBIF_LOCK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_LOCK_MUTABLE
CYVAL_UDB_UDBIF_LOCK_MUTABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_LOCK_LOCKED
CYVAL_UDB_UDBIF_LOCK_LOCKED EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_UDBIF_PIPE__OFFSET
CYFLD_UDB_UDBIF_PIPE__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_UDBIF_PIPE__SIZE
CYFLD_UDB_UDBIF_PIPE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_PIPE_BYPASS
CYVAL_UDB_UDBIF_PIPE_BYPASS EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_PIPE_PIPELINED
CYVAL_UDB_UDBIF_PIPE_PIPELINED EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_UDBIF_GLBL_WR__OFFSET
CYFLD_UDB_UDBIF_GLBL_WR__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_UDB_UDBIF_GLBL_WR__SIZE
CYFLD_UDB_UDBIF_GLBL_WR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_GLBL_WR_DISABLE
CYVAL_UDB_UDBIF_GLBL_WR_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_GLBL_WR_ENABLE
CYVAL_UDB_UDBIF_GLBL_WR_ENABLE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_UDBIF_WAIT_CFG
CYREG_UDB_UDBIF_WAIT_CFG EQU 0x400f7001
ENDIF
IF :LNOT::DEF:CYFLD_UDB_UDBIF_RD_CFG_WAIT__OFFSET
CYFLD_UDB_UDBIF_RD_CFG_WAIT__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_UDBIF_RD_CFG_WAIT__SIZE
CYFLD_UDB_UDBIF_RD_CFG_WAIT__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_RD_CFG_WAIT_FIVE_WAITS
CYVAL_UDB_UDBIF_RD_CFG_WAIT_FIVE_WAITS EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_RD_CFG_WAIT_FOUR_WAITS
CYVAL_UDB_UDBIF_RD_CFG_WAIT_FOUR_WAITS EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_RD_CFG_WAIT_THREE_WAITS
CYVAL_UDB_UDBIF_RD_CFG_WAIT_THREE_WAITS EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_RD_CFG_WAIT_ONE_WAIT
CYVAL_UDB_UDBIF_RD_CFG_WAIT_ONE_WAIT EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_UDBIF_WR_CFG_WAIT__OFFSET
CYFLD_UDB_UDBIF_WR_CFG_WAIT__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_UDB_UDBIF_WR_CFG_WAIT__SIZE
CYFLD_UDB_UDBIF_WR_CFG_WAIT__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_WR_CFG_WAIT_ONE_WAIT
CYVAL_UDB_UDBIF_WR_CFG_WAIT_ONE_WAIT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_WR_CFG_WAIT_TWO_WAITS
CYVAL_UDB_UDBIF_WR_CFG_WAIT_TWO_WAITS EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_WR_CFG_WAIT_THREE_WAITS
CYVAL_UDB_UDBIF_WR_CFG_WAIT_THREE_WAITS EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_WR_CFG_WAIT_ZERO_WAITS
CYVAL_UDB_UDBIF_WR_CFG_WAIT_ZERO_WAITS EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_UDBIF_RD_WRK_WAIT__OFFSET
CYFLD_UDB_UDBIF_RD_WRK_WAIT__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_UDB_UDBIF_RD_WRK_WAIT__SIZE
CYFLD_UDB_UDBIF_RD_WRK_WAIT__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_RD_WRK_WAIT_ONE_WAIT
CYVAL_UDB_UDBIF_RD_WRK_WAIT_ONE_WAIT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_RD_WRK_WAIT_TWO_WAITS
CYVAL_UDB_UDBIF_RD_WRK_WAIT_TWO_WAITS EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_RD_WRK_WAIT_THREE_WAITS
CYVAL_UDB_UDBIF_RD_WRK_WAIT_THREE_WAITS EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_RD_WRK_WAIT_ZERO_WAITS
CYVAL_UDB_UDBIF_RD_WRK_WAIT_ZERO_WAITS EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_UDB_UDBIF_WR_WRK_WAIT__OFFSET
CYFLD_UDB_UDBIF_WR_WRK_WAIT__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_UDB_UDBIF_WR_WRK_WAIT__SIZE
CYFLD_UDB_UDBIF_WR_WRK_WAIT__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_WR_WRK_WAIT_ONE_WAIT
CYVAL_UDB_UDBIF_WR_WRK_WAIT_ONE_WAIT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_WR_WRK_WAIT_TWO_WAITS
CYVAL_UDB_UDBIF_WR_WRK_WAIT_TWO_WAITS EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_WR_WRK_WAIT_THREE_WAITS
CYVAL_UDB_UDBIF_WR_WRK_WAIT_THREE_WAITS EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_UDB_UDBIF_WR_WRK_WAIT_ZERO_WAITS
CYVAL_UDB_UDBIF_WR_WRK_WAIT_ZERO_WAITS EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_UDB_UDBIF_INT_CLK_CTL
CYREG_UDB_UDBIF_INT_CLK_CTL EQU 0x400f701c
ENDIF
IF :LNOT::DEF:CYFLD_UDB_UDBIF_EN_HFCLK__OFFSET
CYFLD_UDB_UDBIF_EN_HFCLK__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_UDBIF_EN_HFCLK__SIZE
CYFLD_UDB_UDBIF_EN_HFCLK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_UDB_INT_CFG
CYREG_UDB_INT_CFG EQU 0x400f8000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_INT_MODE_CFG__OFFSET
CYFLD_UDB_INT_MODE_CFG__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_UDB_INT_MODE_CFG__SIZE
CYFLD_UDB_INT_MODE_CFG__SIZE EQU 0x00000020
ENDIF
IF :LNOT::DEF:CYVAL_UDB_INT_MODE_CFG_LEVEL
CYVAL_UDB_INT_MODE_CFG_LEVEL EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_UDB_INT_MODE_CFG_PULSE
CYVAL_UDB_INT_MODE_CFG_PULSE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYDEV_CTBM_BASE
CYDEV_CTBM_BASE EQU 0x40100000
ENDIF
IF :LNOT::DEF:CYDEV_CTBM_SIZE
CYDEV_CTBM_SIZE EQU 0x00010000
ENDIF
IF :LNOT::DEF:CYREG_CTBM_CTB_CTRL
CYREG_CTBM_CTB_CTRL EQU 0x40100000
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_ENABLED__OFFSET
CYFLD_CTBM_ENABLED__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_ENABLED__SIZE
CYFLD_CTBM_ENABLED__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CTBM_OA_RES0_CTRL
CYREG_CTBM_OA_RES0_CTRL EQU 0x40100004
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0_PWR_MODE__OFFSET
CYFLD_CTBM_OA0_PWR_MODE__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0_PWR_MODE__SIZE
CYFLD_CTBM_OA0_PWR_MODE__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0_DRIVE_STR_SEL__OFFSET
CYFLD_CTBM_OA0_DRIVE_STR_SEL__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0_DRIVE_STR_SEL__SIZE
CYFLD_CTBM_OA0_DRIVE_STR_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0_COMP_EN__OFFSET
CYFLD_CTBM_OA0_COMP_EN__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0_COMP_EN__SIZE
CYFLD_CTBM_OA0_COMP_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0_HYST_EN__OFFSET
CYFLD_CTBM_OA0_HYST_EN__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0_HYST_EN__SIZE
CYFLD_CTBM_OA0_HYST_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0_BYPASS_DSI_SYNC__OFFSET
CYFLD_CTBM_OA0_BYPASS_DSI_SYNC__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0_BYPASS_DSI_SYNC__SIZE
CYFLD_CTBM_OA0_BYPASS_DSI_SYNC__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0_COMPINT__OFFSET
CYFLD_CTBM_OA0_COMPINT__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0_COMPINT__SIZE
CYFLD_CTBM_OA0_COMPINT__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_CTBM_OA0_COMPINT_DISABLE
CYVAL_CTBM_OA0_COMPINT_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_CTBM_OA0_COMPINT_RISING
CYVAL_CTBM_OA0_COMPINT_RISING EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_CTBM_OA0_COMPINT_FALLING
CYVAL_CTBM_OA0_COMPINT_FALLING EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_CTBM_OA0_COMPINT_BOTH
CYVAL_CTBM_OA0_COMPINT_BOTH EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0_PUMP_EN__OFFSET
CYFLD_CTBM_OA0_PUMP_EN__OFFSET EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0_PUMP_EN__SIZE
CYFLD_CTBM_OA0_PUMP_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CTBM_OA_RES1_CTRL
CYREG_CTBM_OA_RES1_CTRL EQU 0x40100008
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1_PWR_MODE__OFFSET
CYFLD_CTBM_OA1_PWR_MODE__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1_PWR_MODE__SIZE
CYFLD_CTBM_OA1_PWR_MODE__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1_DRIVE_STR_SEL__OFFSET
CYFLD_CTBM_OA1_DRIVE_STR_SEL__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1_DRIVE_STR_SEL__SIZE
CYFLD_CTBM_OA1_DRIVE_STR_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1_COMP_EN__OFFSET
CYFLD_CTBM_OA1_COMP_EN__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1_COMP_EN__SIZE
CYFLD_CTBM_OA1_COMP_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1_HYST_EN__OFFSET
CYFLD_CTBM_OA1_HYST_EN__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1_HYST_EN__SIZE
CYFLD_CTBM_OA1_HYST_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1_BYPASS_DSI_SYNC__OFFSET
CYFLD_CTBM_OA1_BYPASS_DSI_SYNC__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1_BYPASS_DSI_SYNC__SIZE
CYFLD_CTBM_OA1_BYPASS_DSI_SYNC__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1_COMPINT__OFFSET
CYFLD_CTBM_OA1_COMPINT__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1_COMPINT__SIZE
CYFLD_CTBM_OA1_COMPINT__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_CTBM_OA1_COMPINT_DISABLE
CYVAL_CTBM_OA1_COMPINT_DISABLE EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_CTBM_OA1_COMPINT_RISING
CYVAL_CTBM_OA1_COMPINT_RISING EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_CTBM_OA1_COMPINT_FALLING
CYVAL_CTBM_OA1_COMPINT_FALLING EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_CTBM_OA1_COMPINT_BOTH
CYVAL_CTBM_OA1_COMPINT_BOTH EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1_PUMP_EN__OFFSET
CYFLD_CTBM_OA1_PUMP_EN__OFFSET EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1_PUMP_EN__SIZE
CYFLD_CTBM_OA1_PUMP_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CTBM_COMP_STAT
CYREG_CTBM_COMP_STAT EQU 0x4010000c
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0_COMP__OFFSET
CYFLD_CTBM_OA0_COMP__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0_COMP__SIZE
CYFLD_CTBM_OA0_COMP__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1_COMP__OFFSET
CYFLD_CTBM_OA1_COMP__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1_COMP__SIZE
CYFLD_CTBM_OA1_COMP__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CTBM_INTR
CYREG_CTBM_INTR EQU 0x40100020
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_COMP0__OFFSET
CYFLD_CTBM_COMP0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_COMP0__SIZE
CYFLD_CTBM_COMP0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_COMP1__OFFSET
CYFLD_CTBM_COMP1__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_COMP1__SIZE
CYFLD_CTBM_COMP1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CTBM_INTR_SET
CYREG_CTBM_INTR_SET EQU 0x40100024
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_COMP0_SET__OFFSET
CYFLD_CTBM_COMP0_SET__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_COMP0_SET__SIZE
CYFLD_CTBM_COMP0_SET__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_COMP1_SET__OFFSET
CYFLD_CTBM_COMP1_SET__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_COMP1_SET__SIZE
CYFLD_CTBM_COMP1_SET__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CTBM_INTR_MASK
CYREG_CTBM_INTR_MASK EQU 0x40100028
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_COMP0_MASK__OFFSET
CYFLD_CTBM_COMP0_MASK__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_COMP0_MASK__SIZE
CYFLD_CTBM_COMP0_MASK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_COMP1_MASK__OFFSET
CYFLD_CTBM_COMP1_MASK__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_COMP1_MASK__SIZE
CYFLD_CTBM_COMP1_MASK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CTBM_INTR_MASKED
CYREG_CTBM_INTR_MASKED EQU 0x4010002c
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_COMP0_MASKED__OFFSET
CYFLD_CTBM_COMP0_MASKED__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_COMP0_MASKED__SIZE
CYFLD_CTBM_COMP0_MASKED__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_COMP1_MASKED__OFFSET
CYFLD_CTBM_COMP1_MASKED__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_COMP1_MASKED__SIZE
CYFLD_CTBM_COMP1_MASKED__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CTBM_DFT_CTRL
CYREG_CTBM_DFT_CTRL EQU 0x40100030
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_DFT_MODE__OFFSET
CYFLD_CTBM_DFT_MODE__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_DFT_MODE__SIZE
CYFLD_CTBM_DFT_MODE__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_DFT_EN__OFFSET
CYFLD_CTBM_DFT_EN__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_DFT_EN__SIZE
CYFLD_CTBM_DFT_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CTBM_OA0_SW
CYREG_CTBM_OA0_SW EQU 0x40100080
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0P_A00__OFFSET
CYFLD_CTBM_OA0P_A00__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0P_A00__SIZE
CYFLD_CTBM_OA0P_A00__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0P_A20__OFFSET
CYFLD_CTBM_OA0P_A20__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0P_A20__SIZE
CYFLD_CTBM_OA0P_A20__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0P_A30__OFFSET
CYFLD_CTBM_OA0P_A30__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0P_A30__SIZE
CYFLD_CTBM_OA0P_A30__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0M_A11__OFFSET
CYFLD_CTBM_OA0M_A11__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0M_A11__SIZE
CYFLD_CTBM_OA0M_A11__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0M_A81__OFFSET
CYFLD_CTBM_OA0M_A81__OFFSET EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0M_A81__SIZE
CYFLD_CTBM_OA0M_A81__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0O_D51__OFFSET
CYFLD_CTBM_OA0O_D51__OFFSET EQU 0x00000012
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0O_D51__SIZE
CYFLD_CTBM_OA0O_D51__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0O_D81__OFFSET
CYFLD_CTBM_OA0O_D81__OFFSET EQU 0x00000015
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0O_D81__SIZE
CYFLD_CTBM_OA0O_D81__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CTBM_OA0_SW_CLEAR
CYREG_CTBM_OA0_SW_CLEAR EQU 0x40100084
ENDIF
IF :LNOT::DEF:CYREG_CTBM_OA1_SW
CYREG_CTBM_OA1_SW EQU 0x40100088
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1P_A03__OFFSET
CYFLD_CTBM_OA1P_A03__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1P_A03__SIZE
CYFLD_CTBM_OA1P_A03__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1P_A13__OFFSET
CYFLD_CTBM_OA1P_A13__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1P_A13__SIZE
CYFLD_CTBM_OA1P_A13__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1P_A43__OFFSET
CYFLD_CTBM_OA1P_A43__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1P_A43__SIZE
CYFLD_CTBM_OA1P_A43__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1M_A22__OFFSET
CYFLD_CTBM_OA1M_A22__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1M_A22__SIZE
CYFLD_CTBM_OA1M_A22__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1M_A82__OFFSET
CYFLD_CTBM_OA1M_A82__OFFSET EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1M_A82__SIZE
CYFLD_CTBM_OA1M_A82__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1O_D52__OFFSET
CYFLD_CTBM_OA1O_D52__OFFSET EQU 0x00000012
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1O_D52__SIZE
CYFLD_CTBM_OA1O_D52__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1O_D62__OFFSET
CYFLD_CTBM_OA1O_D62__OFFSET EQU 0x00000013
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1O_D62__SIZE
CYFLD_CTBM_OA1O_D62__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1O_D82__OFFSET
CYFLD_CTBM_OA1O_D82__OFFSET EQU 0x00000015
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1O_D82__SIZE
CYFLD_CTBM_OA1O_D82__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CTBM_OA1_SW_CLEAR
CYREG_CTBM_OA1_SW_CLEAR EQU 0x4010008c
ENDIF
IF :LNOT::DEF:CYREG_CTBM_CTB_SW_HW_CTRL
CYREG_CTBM_CTB_SW_HW_CTRL EQU 0x401000c0
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_P2_HW_CTRL__OFFSET
CYFLD_CTBM_P2_HW_CTRL__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_P2_HW_CTRL__SIZE
CYFLD_CTBM_P2_HW_CTRL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_P3_HW_CTRL__OFFSET
CYFLD_CTBM_P3_HW_CTRL__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_P3_HW_CTRL__SIZE
CYFLD_CTBM_P3_HW_CTRL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CTBM_CTB_SW_STATUS
CYREG_CTBM_CTB_SW_STATUS EQU 0x401000c4
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0O_D51_STAT__OFFSET
CYFLD_CTBM_OA0O_D51_STAT__OFFSET EQU 0x0000001c
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0O_D51_STAT__SIZE
CYFLD_CTBM_OA0O_D51_STAT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1O_D52_STAT__OFFSET
CYFLD_CTBM_OA1O_D52_STAT__OFFSET EQU 0x0000001d
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1O_D52_STAT__SIZE
CYFLD_CTBM_OA1O_D52_STAT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1O_D62_STAT__OFFSET
CYFLD_CTBM_OA1O_D62_STAT__OFFSET EQU 0x0000001e
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1O_D62_STAT__SIZE
CYFLD_CTBM_OA1O_D62_STAT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CTBM_OA0_OFFSET_TRIM
CYREG_CTBM_OA0_OFFSET_TRIM EQU 0x40100f00
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0_OFFSET_TRIM__OFFSET
CYFLD_CTBM_OA0_OFFSET_TRIM__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0_OFFSET_TRIM__SIZE
CYFLD_CTBM_OA0_OFFSET_TRIM__SIZE EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYREG_CTBM_OA0_SLOPE_OFFSET_TRIM
CYREG_CTBM_OA0_SLOPE_OFFSET_TRIM EQU 0x40100f04
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0_SLOPE_OFFSET_TRIM__OFFSET
CYFLD_CTBM_OA0_SLOPE_OFFSET_TRIM__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0_SLOPE_OFFSET_TRIM__SIZE
CYFLD_CTBM_OA0_SLOPE_OFFSET_TRIM__SIZE EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYREG_CTBM_OA0_COMP_TRIM
CYREG_CTBM_OA0_COMP_TRIM EQU 0x40100f08
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0_COMP_TRIM__OFFSET
CYFLD_CTBM_OA0_COMP_TRIM__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA0_COMP_TRIM__SIZE
CYFLD_CTBM_OA0_COMP_TRIM__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYREG_CTBM_OA1_OFFSET_TRIM
CYREG_CTBM_OA1_OFFSET_TRIM EQU 0x40100f0c
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1_OFFSET_TRIM__OFFSET
CYFLD_CTBM_OA1_OFFSET_TRIM__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1_OFFSET_TRIM__SIZE
CYFLD_CTBM_OA1_OFFSET_TRIM__SIZE EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYREG_CTBM_OA1_SLOPE_OFFSET_TRIM
CYREG_CTBM_OA1_SLOPE_OFFSET_TRIM EQU 0x40100f10
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1_SLOPE_OFFSET_TRIM__OFFSET
CYFLD_CTBM_OA1_SLOPE_OFFSET_TRIM__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1_SLOPE_OFFSET_TRIM__SIZE
CYFLD_CTBM_OA1_SLOPE_OFFSET_TRIM__SIZE EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYREG_CTBM_OA1_COMP_TRIM
CYREG_CTBM_OA1_COMP_TRIM EQU 0x40100f14
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1_COMP_TRIM__OFFSET
CYFLD_CTBM_OA1_COMP_TRIM__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CTBM_OA1_COMP_TRIM__SIZE
CYFLD_CTBM_OA1_COMP_TRIM__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYDEV_SAR_BASE
CYDEV_SAR_BASE EQU 0x401a0000
ENDIF
IF :LNOT::DEF:CYDEV_SAR_SIZE
CYDEV_SAR_SIZE EQU 0x00010000
ENDIF
IF :LNOT::DEF:CYREG_SAR_CTRL
CYREG_SAR_CTRL EQU 0x401a0000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_VREF_SEL__OFFSET
CYFLD_SAR_VREF_SEL__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SAR_VREF_SEL__SIZE
CYFLD_SAR_VREF_SEL__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_SAR_VREF_SEL_VREF0
CYVAL_SAR_VREF_SEL_VREF0 EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_SAR_VREF_SEL_VREF1
CYVAL_SAR_VREF_SEL_VREF1 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_SAR_VREF_SEL_VREF2
CYVAL_SAR_VREF_SEL_VREF2 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_SAR_VREF_SEL_VREF_AROUTE
CYVAL_SAR_VREF_SEL_VREF_AROUTE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_SAR_VREF_SEL_VBGR
CYVAL_SAR_VREF_SEL_VBGR EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_SAR_VREF_SEL_VREF_EXT
CYVAL_SAR_VREF_SEL_VREF_EXT EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_SAR_VREF_SEL_VDDA_DIV_2
CYVAL_SAR_VREF_SEL_VDDA_DIV_2 EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_SAR_VREF_SEL_VDDA
CYVAL_SAR_VREF_SEL_VDDA EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_SAR_VREF_BYP_CAP_EN__OFFSET
CYFLD_SAR_VREF_BYP_CAP_EN__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_SAR_VREF_BYP_CAP_EN__SIZE
CYFLD_SAR_VREF_BYP_CAP_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_NEG_SEL__OFFSET
CYFLD_SAR_NEG_SEL__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_SAR_NEG_SEL__SIZE
CYFLD_SAR_NEG_SEL__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_SAR_NEG_SEL_VSSA_KELVIN
CYVAL_SAR_NEG_SEL_VSSA_KELVIN EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_SAR_NEG_SEL_ART_VSSA
CYVAL_SAR_NEG_SEL_ART_VSSA EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_SAR_NEG_SEL_P1
CYVAL_SAR_NEG_SEL_P1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_SAR_NEG_SEL_P3
CYVAL_SAR_NEG_SEL_P3 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_SAR_NEG_SEL_P5
CYVAL_SAR_NEG_SEL_P5 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_SAR_NEG_SEL_P7
CYVAL_SAR_NEG_SEL_P7 EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYVAL_SAR_NEG_SEL_ACORE
CYVAL_SAR_NEG_SEL_ACORE EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_SAR_NEG_SEL_VREF
CYVAL_SAR_NEG_SEL_VREF EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SAR_HW_CTRL_NEGVREF__OFFSET
CYFLD_SAR_SAR_HW_CTRL_NEGVREF__OFFSET EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SAR_HW_CTRL_NEGVREF__SIZE
CYFLD_SAR_SAR_HW_CTRL_NEGVREF__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_PWR_CTRL_VREF__OFFSET
CYFLD_SAR_PWR_CTRL_VREF__OFFSET EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYFLD_SAR_PWR_CTRL_VREF__SIZE
CYFLD_SAR_PWR_CTRL_VREF__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_SAR_PWR_CTRL_VREF_NORMAL_PWR
CYVAL_SAR_PWR_CTRL_VREF_NORMAL_PWR EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_SAR_PWR_CTRL_VREF_HALF_PWR
CYVAL_SAR_PWR_CTRL_VREF_HALF_PWR EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_SAR_PWR_CTRL_VREF_THIRD_PWR
CYVAL_SAR_PWR_CTRL_VREF_THIRD_PWR EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_SAR_PWR_CTRL_VREF_QUARTER_PWR
CYVAL_SAR_PWR_CTRL_VREF_QUARTER_PWR EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SPARE__OFFSET
CYFLD_SAR_SPARE__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SPARE__SIZE
CYFLD_SAR_SPARE__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SAR_ICONT_LV__OFFSET
CYFLD_SAR_ICONT_LV__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_SAR_ICONT_LV__SIZE
CYFLD_SAR_ICONT_LV__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_SAR_ICONT_LV_NORMAL_PWR
CYVAL_SAR_ICONT_LV_NORMAL_PWR EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_SAR_ICONT_LV_HALF_PWR
CYVAL_SAR_ICONT_LV_HALF_PWR EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_SAR_ICONT_LV_MORE_PWR
CYVAL_SAR_ICONT_LV_MORE_PWR EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_SAR_ICONT_LV_QUARTER_PWR
CYVAL_SAR_ICONT_LV_QUARTER_PWR EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DSI_SYNC_CONFIG__OFFSET
CYFLD_SAR_DSI_SYNC_CONFIG__OFFSET EQU 0x0000001c
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DSI_SYNC_CONFIG__SIZE
CYFLD_SAR_DSI_SYNC_CONFIG__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DSI_MODE__OFFSET
CYFLD_SAR_DSI_MODE__OFFSET EQU 0x0000001d
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DSI_MODE__SIZE
CYFLD_SAR_DSI_MODE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SWITCH_DISABLE__OFFSET
CYFLD_SAR_SWITCH_DISABLE__OFFSET EQU 0x0000001e
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SWITCH_DISABLE__SIZE
CYFLD_SAR_SWITCH_DISABLE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_ENABLED__OFFSET
CYFLD_SAR_ENABLED__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_SAR_ENABLED__SIZE
CYFLD_SAR_ENABLED__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SAR_SAMPLE_CTRL
CYREG_SAR_SAMPLE_CTRL EQU 0x401a0004
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SUB_RESOLUTION__OFFSET
CYFLD_SAR_SUB_RESOLUTION__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SUB_RESOLUTION__SIZE
CYFLD_SAR_SUB_RESOLUTION__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_SAR_SUB_RESOLUTION_8B
CYVAL_SAR_SUB_RESOLUTION_8B EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_SAR_SUB_RESOLUTION_10B
CYVAL_SAR_SUB_RESOLUTION_10B EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_LEFT_ALIGN__OFFSET
CYFLD_SAR_LEFT_ALIGN__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_LEFT_ALIGN__SIZE
CYFLD_SAR_LEFT_ALIGN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SINGLE_ENDED_SIGNED__OFFSET
CYFLD_SAR_SINGLE_ENDED_SIGNED__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SINGLE_ENDED_SIGNED__SIZE
CYFLD_SAR_SINGLE_ENDED_SIGNED__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_SAR_SINGLE_ENDED_SIGNED_UNSIGNED
CYVAL_SAR_SINGLE_ENDED_SIGNED_UNSIGNED EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_SAR_SINGLE_ENDED_SIGNED_SIGNED
CYVAL_SAR_SINGLE_ENDED_SIGNED_SIGNED EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DIFFERENTIAL_SIGNED__OFFSET
CYFLD_SAR_DIFFERENTIAL_SIGNED__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DIFFERENTIAL_SIGNED__SIZE
CYFLD_SAR_DIFFERENTIAL_SIGNED__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_SAR_DIFFERENTIAL_SIGNED_UNSIGNED
CYVAL_SAR_DIFFERENTIAL_SIGNED_UNSIGNED EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_SAR_DIFFERENTIAL_SIGNED_SIGNED
CYVAL_SAR_DIFFERENTIAL_SIGNED_SIGNED EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_AVG_CNT__OFFSET
CYFLD_SAR_AVG_CNT__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SAR_AVG_CNT__SIZE
CYFLD_SAR_AVG_CNT__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_SAR_AVG_SHIFT__OFFSET
CYFLD_SAR_AVG_SHIFT__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_SAR_AVG_SHIFT__SIZE
CYFLD_SAR_AVG_SHIFT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_CONTINUOUS__OFFSET
CYFLD_SAR_CONTINUOUS__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_SAR_CONTINUOUS__SIZE
CYFLD_SAR_CONTINUOUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DSI_TRIGGER_EN__OFFSET
CYFLD_SAR_DSI_TRIGGER_EN__OFFSET EQU 0x00000011
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DSI_TRIGGER_EN__SIZE
CYFLD_SAR_DSI_TRIGGER_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DSI_TRIGGER_LEVEL__OFFSET
CYFLD_SAR_DSI_TRIGGER_LEVEL__OFFSET EQU 0x00000012
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DSI_TRIGGER_LEVEL__SIZE
CYFLD_SAR_DSI_TRIGGER_LEVEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DSI_SYNC_TRIGGER__OFFSET
CYFLD_SAR_DSI_SYNC_TRIGGER__OFFSET EQU 0x00000013
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DSI_SYNC_TRIGGER__SIZE
CYFLD_SAR_DSI_SYNC_TRIGGER__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_EOS_DSI_OUT_EN__OFFSET
CYFLD_SAR_EOS_DSI_OUT_EN__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_SAR_EOS_DSI_OUT_EN__SIZE
CYFLD_SAR_EOS_DSI_OUT_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SAR_SAMPLE_TIME01
CYREG_SAR_SAMPLE_TIME01 EQU 0x401a0010
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SAMPLE_TIME0__OFFSET
CYFLD_SAR_SAMPLE_TIME0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SAMPLE_TIME0__SIZE
CYFLD_SAR_SAMPLE_TIME0__SIZE EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SAMPLE_TIME1__OFFSET
CYFLD_SAR_SAMPLE_TIME1__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SAMPLE_TIME1__SIZE
CYFLD_SAR_SAMPLE_TIME1__SIZE EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYREG_SAR_SAMPLE_TIME23
CYREG_SAR_SAMPLE_TIME23 EQU 0x401a0014
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SAMPLE_TIME2__OFFSET
CYFLD_SAR_SAMPLE_TIME2__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SAMPLE_TIME2__SIZE
CYFLD_SAR_SAMPLE_TIME2__SIZE EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SAMPLE_TIME3__OFFSET
CYFLD_SAR_SAMPLE_TIME3__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SAMPLE_TIME3__SIZE
CYFLD_SAR_SAMPLE_TIME3__SIZE EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYREG_SAR_RANGE_THRES
CYREG_SAR_RANGE_THRES EQU 0x401a0018
ENDIF
IF :LNOT::DEF:CYFLD_SAR_RANGE_LOW__OFFSET
CYFLD_SAR_RANGE_LOW__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_RANGE_LOW__SIZE
CYFLD_SAR_RANGE_LOW__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_SAR_RANGE_HIGH__OFFSET
CYFLD_SAR_RANGE_HIGH__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_SAR_RANGE_HIGH__SIZE
CYFLD_SAR_RANGE_HIGH__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_SAR_RANGE_COND
CYREG_SAR_RANGE_COND EQU 0x401a001c
ENDIF
IF :LNOT::DEF:CYFLD_SAR_RANGE_COND__OFFSET
CYFLD_SAR_RANGE_COND__OFFSET EQU 0x0000001e
ENDIF
IF :LNOT::DEF:CYFLD_SAR_RANGE_COND__SIZE
CYFLD_SAR_RANGE_COND__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_SAR_RANGE_COND_BELOW
CYVAL_SAR_RANGE_COND_BELOW EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_SAR_RANGE_COND_INSIDE
CYVAL_SAR_RANGE_COND_INSIDE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_SAR_RANGE_COND_ABOVE
CYVAL_SAR_RANGE_COND_ABOVE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_SAR_RANGE_COND_OUTSIDE
CYVAL_SAR_RANGE_COND_OUTSIDE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_EN
CYREG_SAR_CHAN_EN EQU 0x401a0020
ENDIF
IF :LNOT::DEF:CYFLD_SAR_CHAN_EN__OFFSET
CYFLD_SAR_CHAN_EN__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_CHAN_EN__SIZE
CYFLD_SAR_CHAN_EN__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_SAR_START_CTRL
CYREG_SAR_START_CTRL EQU 0x401a0024
ENDIF
IF :LNOT::DEF:CYFLD_SAR_FW_TRIGGER__OFFSET
CYFLD_SAR_FW_TRIGGER__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_FW_TRIGGER__SIZE
CYFLD_SAR_FW_TRIGGER__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SAR_DFT_CTRL
CYREG_SAR_DFT_CTRL EQU 0x401a0030
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DLY_INC__OFFSET
CYFLD_SAR_DLY_INC__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DLY_INC__SIZE
CYFLD_SAR_DLY_INC__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_HIZ__OFFSET
CYFLD_SAR_HIZ__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_HIZ__SIZE
CYFLD_SAR_HIZ__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DFT_INC__OFFSET
CYFLD_SAR_DFT_INC__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DFT_INC__SIZE
CYFLD_SAR_DFT_INC__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DFT_OUTC__OFFSET
CYFLD_SAR_DFT_OUTC__OFFSET EQU 0x00000014
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DFT_OUTC__SIZE
CYFLD_SAR_DFT_OUTC__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SEL_CSEL_DFT__OFFSET
CYFLD_SAR_SEL_CSEL_DFT__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SEL_CSEL_DFT__SIZE
CYFLD_SAR_SEL_CSEL_DFT__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SAR_EN_CSEL_DFT__OFFSET
CYFLD_SAR_EN_CSEL_DFT__OFFSET EQU 0x0000001c
ENDIF
IF :LNOT::DEF:CYFLD_SAR_EN_CSEL_DFT__SIZE
CYFLD_SAR_EN_CSEL_DFT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DCEN__OFFSET
CYFLD_SAR_DCEN__OFFSET EQU 0x0000001d
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DCEN__SIZE
CYFLD_SAR_DCEN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_ADFT_OVERRIDE__OFFSET
CYFLD_SAR_ADFT_OVERRIDE__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_SAR_ADFT_OVERRIDE__SIZE
CYFLD_SAR_ADFT_OVERRIDE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG00
CYREG_SAR_CHAN_CONFIG00 EQU 0x401a0080
ENDIF
IF :LNOT::DEF:CYFLD_SAR_PIN_ADDR__OFFSET
CYFLD_SAR_PIN_ADDR__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_PIN_ADDR__SIZE
CYFLD_SAR_PIN_ADDR__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_SAR_PORT_ADDR__OFFSET
CYFLD_SAR_PORT_ADDR__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SAR_PORT_ADDR__SIZE
CYFLD_SAR_PORT_ADDR__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_SAR_PORT_ADDR_SARMUX
CYVAL_SAR_PORT_ADDR_SARMUX EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_SAR_PORT_ADDR_CTB0
CYVAL_SAR_PORT_ADDR_CTB0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_SAR_PORT_ADDR_CTB1
CYVAL_SAR_PORT_ADDR_CTB1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_SAR_PORT_ADDR_CTB2
CYVAL_SAR_PORT_ADDR_CTB2 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_SAR_PORT_ADDR_CTB3
CYVAL_SAR_PORT_ADDR_CTB3 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_SAR_PORT_ADDR_AROUTE_VIRT
CYVAL_SAR_PORT_ADDR_AROUTE_VIRT EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_SAR_PORT_ADDR_SARMUX_VIRT
CYVAL_SAR_PORT_ADDR_SARMUX_VIRT EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DIFFERENTIAL_EN__OFFSET
CYFLD_SAR_DIFFERENTIAL_EN__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DIFFERENTIAL_EN__SIZE
CYFLD_SAR_DIFFERENTIAL_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_RESOLUTION__OFFSET
CYFLD_SAR_RESOLUTION__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_SAR_RESOLUTION__SIZE
CYFLD_SAR_RESOLUTION__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_SAR_RESOLUTION_12B
CYVAL_SAR_RESOLUTION_12B EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_SAR_RESOLUTION_SUBRES
CYVAL_SAR_RESOLUTION_SUBRES EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_AVG_EN__OFFSET
CYFLD_SAR_AVG_EN__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD_SAR_AVG_EN__SIZE
CYFLD_SAR_AVG_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SAMPLE_TIME_SEL__OFFSET
CYFLD_SAR_SAMPLE_TIME_SEL__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SAMPLE_TIME_SEL__SIZE
CYFLD_SAR_SAMPLE_TIME_SEL__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DSI_OUT_EN__OFFSET
CYFLD_SAR_DSI_OUT_EN__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DSI_OUT_EN__SIZE
CYFLD_SAR_DSI_OUT_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG01
CYREG_SAR_CHAN_CONFIG01 EQU 0x401a0084
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG02
CYREG_SAR_CHAN_CONFIG02 EQU 0x401a0088
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG03
CYREG_SAR_CHAN_CONFIG03 EQU 0x401a008c
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG04
CYREG_SAR_CHAN_CONFIG04 EQU 0x401a0090
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG05
CYREG_SAR_CHAN_CONFIG05 EQU 0x401a0094
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG06
CYREG_SAR_CHAN_CONFIG06 EQU 0x401a0098
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG07
CYREG_SAR_CHAN_CONFIG07 EQU 0x401a009c
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_WORK00
CYREG_SAR_CHAN_WORK00 EQU 0x401a0100
ENDIF
IF :LNOT::DEF:CYFLD_SAR_WORK__OFFSET
CYFLD_SAR_WORK__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_WORK__SIZE
CYFLD_SAR_WORK__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_SAR_CHAN_WORK_VALID_MIR__OFFSET
CYFLD_SAR_CHAN_WORK_VALID_MIR__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_SAR_CHAN_WORK_VALID_MIR__SIZE
CYFLD_SAR_CHAN_WORK_VALID_MIR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_WORK01
CYREG_SAR_CHAN_WORK01 EQU 0x401a0104
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_WORK02
CYREG_SAR_CHAN_WORK02 EQU 0x401a0108
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_WORK03
CYREG_SAR_CHAN_WORK03 EQU 0x401a010c
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_WORK04
CYREG_SAR_CHAN_WORK04 EQU 0x401a0110
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_WORK05
CYREG_SAR_CHAN_WORK05 EQU 0x401a0114
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_WORK06
CYREG_SAR_CHAN_WORK06 EQU 0x401a0118
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_WORK07
CYREG_SAR_CHAN_WORK07 EQU 0x401a011c
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT00
CYREG_SAR_CHAN_RESULT00 EQU 0x401a0180
ENDIF
IF :LNOT::DEF:CYFLD_SAR_RESULT__OFFSET
CYFLD_SAR_RESULT__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_RESULT__SIZE
CYFLD_SAR_RESULT__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SATURATE_INTR_MIR__OFFSET
CYFLD_SAR_SATURATE_INTR_MIR__OFFSET EQU 0x0000001d
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SATURATE_INTR_MIR__SIZE
CYFLD_SAR_SATURATE_INTR_MIR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_RANGE_INTR_MIR__OFFSET
CYFLD_SAR_RANGE_INTR_MIR__OFFSET EQU 0x0000001e
ENDIF
IF :LNOT::DEF:CYFLD_SAR_RANGE_INTR_MIR__SIZE
CYFLD_SAR_RANGE_INTR_MIR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_CHAN_RESULT_VALID_MIR__OFFSET
CYFLD_SAR_CHAN_RESULT_VALID_MIR__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_SAR_CHAN_RESULT_VALID_MIR__SIZE
CYFLD_SAR_CHAN_RESULT_VALID_MIR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT01
CYREG_SAR_CHAN_RESULT01 EQU 0x401a0184
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT02
CYREG_SAR_CHAN_RESULT02 EQU 0x401a0188
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT03
CYREG_SAR_CHAN_RESULT03 EQU 0x401a018c
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT04
CYREG_SAR_CHAN_RESULT04 EQU 0x401a0190
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT05
CYREG_SAR_CHAN_RESULT05 EQU 0x401a0194
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT06
CYREG_SAR_CHAN_RESULT06 EQU 0x401a0198
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT07
CYREG_SAR_CHAN_RESULT07 EQU 0x401a019c
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_WORK_VALID
CYREG_SAR_CHAN_WORK_VALID EQU 0x401a0200
ENDIF
IF :LNOT::DEF:CYFLD_SAR_CHAN_WORK_VALID__OFFSET
CYFLD_SAR_CHAN_WORK_VALID__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_CHAN_WORK_VALID__SIZE
CYFLD_SAR_CHAN_WORK_VALID__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT_VALID
CYREG_SAR_CHAN_RESULT_VALID EQU 0x401a0204
ENDIF
IF :LNOT::DEF:CYFLD_SAR_CHAN_RESULT_VALID__OFFSET
CYFLD_SAR_CHAN_RESULT_VALID__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_CHAN_RESULT_VALID__SIZE
CYFLD_SAR_CHAN_RESULT_VALID__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_SAR_STATUS
CYREG_SAR_STATUS EQU 0x401a0208
ENDIF
IF :LNOT::DEF:CYFLD_SAR_CUR_CHAN__OFFSET
CYFLD_SAR_CUR_CHAN__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_CUR_CHAN__SIZE
CYFLD_SAR_CUR_CHAN__SIZE EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SW_VREF_NEG__OFFSET
CYFLD_SAR_SW_VREF_NEG__OFFSET EQU 0x0000001e
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SW_VREF_NEG__SIZE
CYFLD_SAR_SW_VREF_NEG__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_BUSY__OFFSET
CYFLD_SAR_BUSY__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_SAR_BUSY__SIZE
CYFLD_SAR_BUSY__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SAR_AVG_STAT
CYREG_SAR_AVG_STAT EQU 0x401a020c
ENDIF
IF :LNOT::DEF:CYFLD_SAR_CUR_AVG_ACCU__OFFSET
CYFLD_SAR_CUR_AVG_ACCU__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_CUR_AVG_ACCU__SIZE
CYFLD_SAR_CUR_AVG_ACCU__SIZE EQU 0x00000014
ENDIF
IF :LNOT::DEF:CYFLD_SAR_CUR_AVG_CNT__OFFSET
CYFLD_SAR_CUR_AVG_CNT__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_SAR_CUR_AVG_CNT__SIZE
CYFLD_SAR_CUR_AVG_CNT__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_SAR_INTR
CYREG_SAR_INTR EQU 0x401a0210
ENDIF
IF :LNOT::DEF:CYFLD_SAR_EOS_INTR__OFFSET
CYFLD_SAR_EOS_INTR__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_EOS_INTR__SIZE
CYFLD_SAR_EOS_INTR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_OVERFLOW_INTR__OFFSET
CYFLD_SAR_OVERFLOW_INTR__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_OVERFLOW_INTR__SIZE
CYFLD_SAR_OVERFLOW_INTR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_FW_COLLISION_INTR__OFFSET
CYFLD_SAR_FW_COLLISION_INTR__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SAR_FW_COLLISION_INTR__SIZE
CYFLD_SAR_FW_COLLISION_INTR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DSI_COLLISION_INTR__OFFSET
CYFLD_SAR_DSI_COLLISION_INTR__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DSI_COLLISION_INTR__SIZE
CYFLD_SAR_DSI_COLLISION_INTR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_EOC_INTR__OFFSET
CYFLD_SAR_INJ_EOC_INTR__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_EOC_INTR__SIZE
CYFLD_SAR_INJ_EOC_INTR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_SATURATE_INTR__OFFSET
CYFLD_SAR_INJ_SATURATE_INTR__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_SATURATE_INTR__SIZE
CYFLD_SAR_INJ_SATURATE_INTR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_RANGE_INTR__OFFSET
CYFLD_SAR_INJ_RANGE_INTR__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_RANGE_INTR__SIZE
CYFLD_SAR_INJ_RANGE_INTR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_COLLISION_INTR__OFFSET
CYFLD_SAR_INJ_COLLISION_INTR__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_COLLISION_INTR__SIZE
CYFLD_SAR_INJ_COLLISION_INTR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SAR_INTR_SET
CYREG_SAR_INTR_SET EQU 0x401a0214
ENDIF
IF :LNOT::DEF:CYFLD_SAR_EOS_SET__OFFSET
CYFLD_SAR_EOS_SET__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_EOS_SET__SIZE
CYFLD_SAR_EOS_SET__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_OVERFLOW_SET__OFFSET
CYFLD_SAR_OVERFLOW_SET__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_OVERFLOW_SET__SIZE
CYFLD_SAR_OVERFLOW_SET__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_FW_COLLISION_SET__OFFSET
CYFLD_SAR_FW_COLLISION_SET__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SAR_FW_COLLISION_SET__SIZE
CYFLD_SAR_FW_COLLISION_SET__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DSI_COLLISION_SET__OFFSET
CYFLD_SAR_DSI_COLLISION_SET__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DSI_COLLISION_SET__SIZE
CYFLD_SAR_DSI_COLLISION_SET__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_EOC_SET__OFFSET
CYFLD_SAR_INJ_EOC_SET__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_EOC_SET__SIZE
CYFLD_SAR_INJ_EOC_SET__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_SATURATE_SET__OFFSET
CYFLD_SAR_INJ_SATURATE_SET__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_SATURATE_SET__SIZE
CYFLD_SAR_INJ_SATURATE_SET__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_RANGE_SET__OFFSET
CYFLD_SAR_INJ_RANGE_SET__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_RANGE_SET__SIZE
CYFLD_SAR_INJ_RANGE_SET__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_COLLISION_SET__OFFSET
CYFLD_SAR_INJ_COLLISION_SET__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_COLLISION_SET__SIZE
CYFLD_SAR_INJ_COLLISION_SET__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SAR_INTR_MASK
CYREG_SAR_INTR_MASK EQU 0x401a0218
ENDIF
IF :LNOT::DEF:CYFLD_SAR_EOS_MASK__OFFSET
CYFLD_SAR_EOS_MASK__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_EOS_MASK__SIZE
CYFLD_SAR_EOS_MASK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_OVERFLOW_MASK__OFFSET
CYFLD_SAR_OVERFLOW_MASK__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_OVERFLOW_MASK__SIZE
CYFLD_SAR_OVERFLOW_MASK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_FW_COLLISION_MASK__OFFSET
CYFLD_SAR_FW_COLLISION_MASK__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SAR_FW_COLLISION_MASK__SIZE
CYFLD_SAR_FW_COLLISION_MASK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DSI_COLLISION_MASK__OFFSET
CYFLD_SAR_DSI_COLLISION_MASK__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DSI_COLLISION_MASK__SIZE
CYFLD_SAR_DSI_COLLISION_MASK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_EOC_MASK__OFFSET
CYFLD_SAR_INJ_EOC_MASK__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_EOC_MASK__SIZE
CYFLD_SAR_INJ_EOC_MASK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_SATURATE_MASK__OFFSET
CYFLD_SAR_INJ_SATURATE_MASK__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_SATURATE_MASK__SIZE
CYFLD_SAR_INJ_SATURATE_MASK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_RANGE_MASK__OFFSET
CYFLD_SAR_INJ_RANGE_MASK__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_RANGE_MASK__SIZE
CYFLD_SAR_INJ_RANGE_MASK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_COLLISION_MASK__OFFSET
CYFLD_SAR_INJ_COLLISION_MASK__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_COLLISION_MASK__SIZE
CYFLD_SAR_INJ_COLLISION_MASK__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SAR_INTR_MASKED
CYREG_SAR_INTR_MASKED EQU 0x401a021c
ENDIF
IF :LNOT::DEF:CYFLD_SAR_EOS_MASKED__OFFSET
CYFLD_SAR_EOS_MASKED__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_EOS_MASKED__SIZE
CYFLD_SAR_EOS_MASKED__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_OVERFLOW_MASKED__OFFSET
CYFLD_SAR_OVERFLOW_MASKED__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_OVERFLOW_MASKED__SIZE
CYFLD_SAR_OVERFLOW_MASKED__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_FW_COLLISION_MASKED__OFFSET
CYFLD_SAR_FW_COLLISION_MASKED__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SAR_FW_COLLISION_MASKED__SIZE
CYFLD_SAR_FW_COLLISION_MASKED__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DSI_COLLISION_MASKED__OFFSET
CYFLD_SAR_DSI_COLLISION_MASKED__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DSI_COLLISION_MASKED__SIZE
CYFLD_SAR_DSI_COLLISION_MASKED__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_EOC_MASKED__OFFSET
CYFLD_SAR_INJ_EOC_MASKED__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_EOC_MASKED__SIZE
CYFLD_SAR_INJ_EOC_MASKED__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_SATURATE_MASKED__OFFSET
CYFLD_SAR_INJ_SATURATE_MASKED__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_SATURATE_MASKED__SIZE
CYFLD_SAR_INJ_SATURATE_MASKED__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_RANGE_MASKED__OFFSET
CYFLD_SAR_INJ_RANGE_MASKED__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_RANGE_MASKED__SIZE
CYFLD_SAR_INJ_RANGE_MASKED__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_COLLISION_MASKED__OFFSET
CYFLD_SAR_INJ_COLLISION_MASKED__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_COLLISION_MASKED__SIZE
CYFLD_SAR_INJ_COLLISION_MASKED__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SAR_SATURATE_INTR
CYREG_SAR_SATURATE_INTR EQU 0x401a0220
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SATURATE_INTR__OFFSET
CYFLD_SAR_SATURATE_INTR__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SATURATE_INTR__SIZE
CYFLD_SAR_SATURATE_INTR__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_SAR_SATURATE_INTR_SET
CYREG_SAR_SATURATE_INTR_SET EQU 0x401a0224
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SATURATE_SET__OFFSET
CYFLD_SAR_SATURATE_SET__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SATURATE_SET__SIZE
CYFLD_SAR_SATURATE_SET__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_SAR_SATURATE_INTR_MASK
CYREG_SAR_SATURATE_INTR_MASK EQU 0x401a0228
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SATURATE_MASK__OFFSET
CYFLD_SAR_SATURATE_MASK__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SATURATE_MASK__SIZE
CYFLD_SAR_SATURATE_MASK__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_SAR_SATURATE_INTR_MASKED
CYREG_SAR_SATURATE_INTR_MASKED EQU 0x401a022c
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SATURATE_MASKED__OFFSET
CYFLD_SAR_SATURATE_MASKED__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SATURATE_MASKED__SIZE
CYFLD_SAR_SATURATE_MASKED__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_SAR_RANGE_INTR
CYREG_SAR_RANGE_INTR EQU 0x401a0230
ENDIF
IF :LNOT::DEF:CYFLD_SAR_RANGE_INTR__OFFSET
CYFLD_SAR_RANGE_INTR__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_RANGE_INTR__SIZE
CYFLD_SAR_RANGE_INTR__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_SAR_RANGE_INTR_SET
CYREG_SAR_RANGE_INTR_SET EQU 0x401a0234
ENDIF
IF :LNOT::DEF:CYFLD_SAR_RANGE_SET__OFFSET
CYFLD_SAR_RANGE_SET__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_RANGE_SET__SIZE
CYFLD_SAR_RANGE_SET__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_SAR_RANGE_INTR_MASK
CYREG_SAR_RANGE_INTR_MASK EQU 0x401a0238
ENDIF
IF :LNOT::DEF:CYFLD_SAR_RANGE_MASK__OFFSET
CYFLD_SAR_RANGE_MASK__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_RANGE_MASK__SIZE
CYFLD_SAR_RANGE_MASK__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_SAR_RANGE_INTR_MASKED
CYREG_SAR_RANGE_INTR_MASKED EQU 0x401a023c
ENDIF
IF :LNOT::DEF:CYFLD_SAR_RANGE_MASKED__OFFSET
CYFLD_SAR_RANGE_MASKED__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_RANGE_MASKED__SIZE
CYFLD_SAR_RANGE_MASKED__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_SAR_INTR_CAUSE
CYREG_SAR_INTR_CAUSE EQU 0x401a0240
ENDIF
IF :LNOT::DEF:CYFLD_SAR_EOS_MASKED_MIR__OFFSET
CYFLD_SAR_EOS_MASKED_MIR__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_EOS_MASKED_MIR__SIZE
CYFLD_SAR_EOS_MASKED_MIR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_OVERFLOW_MASKED_MIR__OFFSET
CYFLD_SAR_OVERFLOW_MASKED_MIR__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_OVERFLOW_MASKED_MIR__SIZE
CYFLD_SAR_OVERFLOW_MASKED_MIR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_FW_COLLISION_MASKED_MIR__OFFSET
CYFLD_SAR_FW_COLLISION_MASKED_MIR__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SAR_FW_COLLISION_MASKED_MIR__SIZE
CYFLD_SAR_FW_COLLISION_MASKED_MIR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DSI_COLLISION_MASKED_MIR__OFFSET
CYFLD_SAR_DSI_COLLISION_MASKED_MIR__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_SAR_DSI_COLLISION_MASKED_MIR__SIZE
CYFLD_SAR_DSI_COLLISION_MASKED_MIR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_EOC_MASKED_MIR__OFFSET
CYFLD_SAR_INJ_EOC_MASKED_MIR__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_EOC_MASKED_MIR__SIZE
CYFLD_SAR_INJ_EOC_MASKED_MIR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_SATURATE_MASKED_MIR__OFFSET
CYFLD_SAR_INJ_SATURATE_MASKED_MIR__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_SATURATE_MASKED_MIR__SIZE
CYFLD_SAR_INJ_SATURATE_MASKED_MIR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_RANGE_MASKED_MIR__OFFSET
CYFLD_SAR_INJ_RANGE_MASKED_MIR__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_RANGE_MASKED_MIR__SIZE
CYFLD_SAR_INJ_RANGE_MASKED_MIR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_COLLISION_MASKED_MIR__OFFSET
CYFLD_SAR_INJ_COLLISION_MASKED_MIR__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_COLLISION_MASKED_MIR__SIZE
CYFLD_SAR_INJ_COLLISION_MASKED_MIR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SATURATE_MASKED_RED__OFFSET
CYFLD_SAR_SATURATE_MASKED_RED__OFFSET EQU 0x0000001e
ENDIF
IF :LNOT::DEF:CYFLD_SAR_SATURATE_MASKED_RED__SIZE
CYFLD_SAR_SATURATE_MASKED_RED__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_RANGE_MASKED_RED__OFFSET
CYFLD_SAR_RANGE_MASKED_RED__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_SAR_RANGE_MASKED_RED__SIZE
CYFLD_SAR_RANGE_MASKED_RED__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SAR_INJ_CHAN_CONFIG
CYREG_SAR_INJ_CHAN_CONFIG EQU 0x401a0280
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_PIN_ADDR__OFFSET
CYFLD_SAR_INJ_PIN_ADDR__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_PIN_ADDR__SIZE
CYFLD_SAR_INJ_PIN_ADDR__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_PORT_ADDR__OFFSET
CYFLD_SAR_INJ_PORT_ADDR__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_PORT_ADDR__SIZE
CYFLD_SAR_INJ_PORT_ADDR__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_SAR_INJ_PORT_ADDR_SARMUX
CYVAL_SAR_INJ_PORT_ADDR_SARMUX EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_SAR_INJ_PORT_ADDR_CTB0
CYVAL_SAR_INJ_PORT_ADDR_CTB0 EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_SAR_INJ_PORT_ADDR_CTB1
CYVAL_SAR_INJ_PORT_ADDR_CTB1 EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_SAR_INJ_PORT_ADDR_CTB2
CYVAL_SAR_INJ_PORT_ADDR_CTB2 EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYVAL_SAR_INJ_PORT_ADDR_CTB3
CYVAL_SAR_INJ_PORT_ADDR_CTB3 EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYVAL_SAR_INJ_PORT_ADDR_AROUTE_VIRT
CYVAL_SAR_INJ_PORT_ADDR_AROUTE_VIRT EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYVAL_SAR_INJ_PORT_ADDR_SARMUX_VIRT
CYVAL_SAR_INJ_PORT_ADDR_SARMUX_VIRT EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_DIFFERENTIAL_EN__OFFSET
CYFLD_SAR_INJ_DIFFERENTIAL_EN__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_DIFFERENTIAL_EN__SIZE
CYFLD_SAR_INJ_DIFFERENTIAL_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_RESOLUTION__OFFSET
CYFLD_SAR_INJ_RESOLUTION__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_RESOLUTION__SIZE
CYFLD_SAR_INJ_RESOLUTION__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_SAR_INJ_RESOLUTION_12B
CYVAL_SAR_INJ_RESOLUTION_12B EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_SAR_INJ_RESOLUTION_SUBRES
CYVAL_SAR_INJ_RESOLUTION_SUBRES EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_AVG_EN__OFFSET
CYFLD_SAR_INJ_AVG_EN__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_AVG_EN__SIZE
CYFLD_SAR_INJ_AVG_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_SAMPLE_TIME_SEL__OFFSET
CYFLD_SAR_INJ_SAMPLE_TIME_SEL__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_SAMPLE_TIME_SEL__SIZE
CYFLD_SAR_INJ_SAMPLE_TIME_SEL__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_TAILGATING__OFFSET
CYFLD_SAR_INJ_TAILGATING__OFFSET EQU 0x0000001e
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_TAILGATING__SIZE
CYFLD_SAR_INJ_TAILGATING__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_START_EN__OFFSET
CYFLD_SAR_INJ_START_EN__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_START_EN__SIZE
CYFLD_SAR_INJ_START_EN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SAR_INJ_RESULT
CYREG_SAR_INJ_RESULT EQU 0x401a0290
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_RESULT__OFFSET
CYFLD_SAR_INJ_RESULT__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_RESULT__SIZE
CYFLD_SAR_INJ_RESULT__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_COLLISION_INTR_MIR__OFFSET
CYFLD_SAR_INJ_COLLISION_INTR_MIR__OFFSET EQU 0x0000001c
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_COLLISION_INTR_MIR__SIZE
CYFLD_SAR_INJ_COLLISION_INTR_MIR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_SATURATE_INTR_MIR__OFFSET
CYFLD_SAR_INJ_SATURATE_INTR_MIR__OFFSET EQU 0x0000001d
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_SATURATE_INTR_MIR__SIZE
CYFLD_SAR_INJ_SATURATE_INTR_MIR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_RANGE_INTR_MIR__OFFSET
CYFLD_SAR_INJ_RANGE_INTR_MIR__OFFSET EQU 0x0000001e
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_RANGE_INTR_MIR__SIZE
CYFLD_SAR_INJ_RANGE_INTR_MIR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_EOC_INTR_MIR__OFFSET
CYFLD_SAR_INJ_EOC_INTR_MIR__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_SAR_INJ_EOC_INTR_MIR__SIZE
CYFLD_SAR_INJ_EOC_INTR_MIR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SAR_MUX_SWITCH0
CYREG_SAR_MUX_SWITCH0 EQU 0x401a0300
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P0_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_P0_VPLUS__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P0_VPLUS__SIZE
CYFLD_SAR_MUX_FW_P0_VPLUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P1_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_P1_VPLUS__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P1_VPLUS__SIZE
CYFLD_SAR_MUX_FW_P1_VPLUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P2_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_P2_VPLUS__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P2_VPLUS__SIZE
CYFLD_SAR_MUX_FW_P2_VPLUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P3_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_P3_VPLUS__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P3_VPLUS__SIZE
CYFLD_SAR_MUX_FW_P3_VPLUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P4_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_P4_VPLUS__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P4_VPLUS__SIZE
CYFLD_SAR_MUX_FW_P4_VPLUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P5_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_P5_VPLUS__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P5_VPLUS__SIZE
CYFLD_SAR_MUX_FW_P5_VPLUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P6_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_P6_VPLUS__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P6_VPLUS__SIZE
CYFLD_SAR_MUX_FW_P6_VPLUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P7_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_P7_VPLUS__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P7_VPLUS__SIZE
CYFLD_SAR_MUX_FW_P7_VPLUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P0_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_P0_VMINUS__OFFSET EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P0_VMINUS__SIZE
CYFLD_SAR_MUX_FW_P0_VMINUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P1_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_P1_VMINUS__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P1_VMINUS__SIZE
CYFLD_SAR_MUX_FW_P1_VMINUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P2_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_P2_VMINUS__OFFSET EQU 0x0000000a
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P2_VMINUS__SIZE
CYFLD_SAR_MUX_FW_P2_VMINUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P3_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_P3_VMINUS__OFFSET EQU 0x0000000b
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P3_VMINUS__SIZE
CYFLD_SAR_MUX_FW_P3_VMINUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P4_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_P4_VMINUS__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P4_VMINUS__SIZE
CYFLD_SAR_MUX_FW_P4_VMINUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P5_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_P5_VMINUS__OFFSET EQU 0x0000000d
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P5_VMINUS__SIZE
CYFLD_SAR_MUX_FW_P5_VMINUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P6_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_P6_VMINUS__OFFSET EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P6_VMINUS__SIZE
CYFLD_SAR_MUX_FW_P6_VMINUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P7_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_P7_VMINUS__OFFSET EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P7_VMINUS__SIZE
CYFLD_SAR_MUX_FW_P7_VMINUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_VSSA_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_VSSA_VMINUS__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_VSSA_VMINUS__SIZE
CYFLD_SAR_MUX_FW_VSSA_VMINUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_TEMP_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_TEMP_VPLUS__OFFSET EQU 0x00000011
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_TEMP_VPLUS__SIZE
CYFLD_SAR_MUX_FW_TEMP_VPLUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_AMUXBUSA_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_AMUXBUSA_VPLUS__OFFSET EQU 0x00000012
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_AMUXBUSA_VPLUS__SIZE
CYFLD_SAR_MUX_FW_AMUXBUSA_VPLUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_AMUXBUSB_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_AMUXBUSB_VPLUS__OFFSET EQU 0x00000013
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_AMUXBUSB_VPLUS__SIZE
CYFLD_SAR_MUX_FW_AMUXBUSB_VPLUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_AMUXBUSA_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_AMUXBUSA_VMINUS__OFFSET EQU 0x00000014
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_AMUXBUSA_VMINUS__SIZE
CYFLD_SAR_MUX_FW_AMUXBUSA_VMINUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_AMUXBUSB_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_AMUXBUSB_VMINUS__OFFSET EQU 0x00000015
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_AMUXBUSB_VMINUS__SIZE
CYFLD_SAR_MUX_FW_AMUXBUSB_VMINUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_SARBUS0_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_SARBUS0_VPLUS__OFFSET EQU 0x00000016
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_SARBUS0_VPLUS__SIZE
CYFLD_SAR_MUX_FW_SARBUS0_VPLUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_SARBUS1_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_SARBUS1_VPLUS__OFFSET EQU 0x00000017
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_SARBUS1_VPLUS__SIZE
CYFLD_SAR_MUX_FW_SARBUS1_VPLUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_SARBUS0_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_SARBUS0_VMINUS__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_SARBUS0_VMINUS__SIZE
CYFLD_SAR_MUX_FW_SARBUS0_VMINUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_SARBUS1_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_SARBUS1_VMINUS__OFFSET EQU 0x00000019
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_SARBUS1_VMINUS__SIZE
CYFLD_SAR_MUX_FW_SARBUS1_VMINUS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P4_COREIO0__OFFSET
CYFLD_SAR_MUX_FW_P4_COREIO0__OFFSET EQU 0x0000001a
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P4_COREIO0__SIZE
CYFLD_SAR_MUX_FW_P4_COREIO0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P5_COREIO1__OFFSET
CYFLD_SAR_MUX_FW_P5_COREIO1__OFFSET EQU 0x0000001b
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P5_COREIO1__SIZE
CYFLD_SAR_MUX_FW_P5_COREIO1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P6_COREIO2__OFFSET
CYFLD_SAR_MUX_FW_P6_COREIO2__OFFSET EQU 0x0000001c
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P6_COREIO2__SIZE
CYFLD_SAR_MUX_FW_P6_COREIO2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P7_COREIO3__OFFSET
CYFLD_SAR_MUX_FW_P7_COREIO3__OFFSET EQU 0x0000001d
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P7_COREIO3__SIZE
CYFLD_SAR_MUX_FW_P7_COREIO3__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SAR_MUX_SWITCH_CLEAR0
CYREG_SAR_MUX_SWITCH_CLEAR0 EQU 0x401a0304
ENDIF
IF :LNOT::DEF:CYREG_SAR_MUX_SWITCH1
CYREG_SAR_MUX_SWITCH1 EQU 0x401a0308
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P4_DFT_INP__OFFSET
CYFLD_SAR_MUX_FW_P4_DFT_INP__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P4_DFT_INP__SIZE
CYFLD_SAR_MUX_FW_P4_DFT_INP__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P5_DFT_INM__OFFSET
CYFLD_SAR_MUX_FW_P5_DFT_INM__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P5_DFT_INM__SIZE
CYFLD_SAR_MUX_FW_P5_DFT_INM__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_ADFT0_SARBUS0__OFFSET
CYFLD_SAR_MUX_FW_ADFT0_SARBUS0__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_ADFT0_SARBUS0__SIZE
CYFLD_SAR_MUX_FW_ADFT0_SARBUS0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_ADFT1_SARBUS1__OFFSET
CYFLD_SAR_MUX_FW_ADFT1_SARBUS1__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_FW_ADFT1_SARBUS1__SIZE
CYFLD_SAR_MUX_FW_ADFT1_SARBUS1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SAR_MUX_SWITCH_CLEAR1
CYREG_SAR_MUX_SWITCH_CLEAR1 EQU 0x401a030c
ENDIF
IF :LNOT::DEF:CYREG_SAR_MUX_SWITCH_HW_CTRL
CYREG_SAR_MUX_SWITCH_HW_CTRL EQU 0x401a0340
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P0__OFFSET
CYFLD_SAR_MUX_HW_CTRL_P0__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P0__SIZE
CYFLD_SAR_MUX_HW_CTRL_P0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P1__OFFSET
CYFLD_SAR_MUX_HW_CTRL_P1__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P1__SIZE
CYFLD_SAR_MUX_HW_CTRL_P1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P2__OFFSET
CYFLD_SAR_MUX_HW_CTRL_P2__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P2__SIZE
CYFLD_SAR_MUX_HW_CTRL_P2__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P3__OFFSET
CYFLD_SAR_MUX_HW_CTRL_P3__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P3__SIZE
CYFLD_SAR_MUX_HW_CTRL_P3__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P4__OFFSET
CYFLD_SAR_MUX_HW_CTRL_P4__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P4__SIZE
CYFLD_SAR_MUX_HW_CTRL_P4__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P5__OFFSET
CYFLD_SAR_MUX_HW_CTRL_P5__OFFSET EQU 0x00000005
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P5__SIZE
CYFLD_SAR_MUX_HW_CTRL_P5__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P6__OFFSET
CYFLD_SAR_MUX_HW_CTRL_P6__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P6__SIZE
CYFLD_SAR_MUX_HW_CTRL_P6__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P7__OFFSET
CYFLD_SAR_MUX_HW_CTRL_P7__OFFSET EQU 0x00000007
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P7__SIZE
CYFLD_SAR_MUX_HW_CTRL_P7__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_VSSA__OFFSET
CYFLD_SAR_MUX_HW_CTRL_VSSA__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_VSSA__SIZE
CYFLD_SAR_MUX_HW_CTRL_VSSA__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_TEMP__OFFSET
CYFLD_SAR_MUX_HW_CTRL_TEMP__OFFSET EQU 0x00000011
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_TEMP__SIZE
CYFLD_SAR_MUX_HW_CTRL_TEMP__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_AMUXBUSA__OFFSET
CYFLD_SAR_MUX_HW_CTRL_AMUXBUSA__OFFSET EQU 0x00000012
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_AMUXBUSA__SIZE
CYFLD_SAR_MUX_HW_CTRL_AMUXBUSA__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_AMUXBUSB__OFFSET
CYFLD_SAR_MUX_HW_CTRL_AMUXBUSB__OFFSET EQU 0x00000013
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_AMUXBUSB__SIZE
CYFLD_SAR_MUX_HW_CTRL_AMUXBUSB__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_SARBUS0__OFFSET
CYFLD_SAR_MUX_HW_CTRL_SARBUS0__OFFSET EQU 0x00000016
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_SARBUS0__SIZE
CYFLD_SAR_MUX_HW_CTRL_SARBUS0__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_SARBUS1__OFFSET
CYFLD_SAR_MUX_HW_CTRL_SARBUS1__OFFSET EQU 0x00000017
ENDIF
IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_SARBUS1__SIZE
CYFLD_SAR_MUX_HW_CTRL_SARBUS1__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SAR_MUX_SWITCH_STATUS
CYREG_SAR_MUX_SWITCH_STATUS EQU 0x401a0348
ENDIF
IF :LNOT::DEF:CYREG_SAR_PUMP_CTRL
CYREG_SAR_PUMP_CTRL EQU 0x401a0380
ENDIF
IF :LNOT::DEF:CYFLD_SAR_CLOCK_SEL__OFFSET
CYFLD_SAR_CLOCK_SEL__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_CLOCK_SEL__SIZE
CYFLD_SAR_CLOCK_SEL__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SAR_ANA_TRIM
CYREG_SAR_ANA_TRIM EQU 0x401a0f00
ENDIF
IF :LNOT::DEF:CYFLD_SAR_CAP_TRIM__OFFSET
CYFLD_SAR_CAP_TRIM__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_CAP_TRIM__SIZE
CYFLD_SAR_CAP_TRIM__SIZE EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_SAR_TRIMUNIT__OFFSET
CYFLD_SAR_TRIMUNIT__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_SAR_TRIMUNIT__SIZE
CYFLD_SAR_TRIMUNIT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_SAR_WOUNDING
CYREG_SAR_WOUNDING EQU 0x401a0f04
ENDIF
IF :LNOT::DEF:CYFLD_SAR_WOUND_RESOLUTION__OFFSET
CYFLD_SAR_WOUND_RESOLUTION__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_SAR_WOUND_RESOLUTION__SIZE
CYFLD_SAR_WOUND_RESOLUTION__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_SAR_WOUND_RESOLUTION_12BIT
CYVAL_SAR_WOUND_RESOLUTION_12BIT EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYVAL_SAR_WOUND_RESOLUTION_10BIT
CYVAL_SAR_WOUND_RESOLUTION_10BIT EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYVAL_SAR_WOUND_RESOLUTION_8BIT
CYVAL_SAR_WOUND_RESOLUTION_8BIT EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYVAL_SAR_WOUND_RESOLUTION_8BIT_TOO
CYVAL_SAR_WOUND_RESOLUTION_8BIT_TOO EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYDEV_CM0_BASE
CYDEV_CM0_BASE EQU 0xe0000000
ENDIF
IF :LNOT::DEF:CYDEV_CM0_SIZE
CYDEV_CM0_SIZE EQU 0x00100000
ENDIF
IF :LNOT::DEF:CYREG_CM0_DWT_PID4
CYREG_CM0_DWT_PID4 EQU 0xe0001fd0
ENDIF
IF :LNOT::DEF:CYFLD_CM0_VALUE__OFFSET
CYFLD_CM0_VALUE__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CM0_VALUE__SIZE
CYFLD_CM0_VALUE__SIZE EQU 0x00000020
ENDIF
IF :LNOT::DEF:CYREG_CM0_DWT_PID0
CYREG_CM0_DWT_PID0 EQU 0xe0001fe0
ENDIF
IF :LNOT::DEF:CYREG_CM0_DWT_PID1
CYREG_CM0_DWT_PID1 EQU 0xe0001fe4
ENDIF
IF :LNOT::DEF:CYREG_CM0_DWT_PID2
CYREG_CM0_DWT_PID2 EQU 0xe0001fe8
ENDIF
IF :LNOT::DEF:CYREG_CM0_DWT_PID3
CYREG_CM0_DWT_PID3 EQU 0xe0001fec
ENDIF
IF :LNOT::DEF:CYREG_CM0_DWT_CID0
CYREG_CM0_DWT_CID0 EQU 0xe0001ff0
ENDIF
IF :LNOT::DEF:CYREG_CM0_DWT_CID1
CYREG_CM0_DWT_CID1 EQU 0xe0001ff4
ENDIF
IF :LNOT::DEF:CYREG_CM0_DWT_CID2
CYREG_CM0_DWT_CID2 EQU 0xe0001ff8
ENDIF
IF :LNOT::DEF:CYREG_CM0_DWT_CID3
CYREG_CM0_DWT_CID3 EQU 0xe0001ffc
ENDIF
IF :LNOT::DEF:CYREG_CM0_BP_PID4
CYREG_CM0_BP_PID4 EQU 0xe0002fd0
ENDIF
IF :LNOT::DEF:CYREG_CM0_BP_PID0
CYREG_CM0_BP_PID0 EQU 0xe0002fe0
ENDIF
IF :LNOT::DEF:CYREG_CM0_BP_PID1
CYREG_CM0_BP_PID1 EQU 0xe0002fe4
ENDIF
IF :LNOT::DEF:CYREG_CM0_BP_PID2
CYREG_CM0_BP_PID2 EQU 0xe0002fe8
ENDIF
IF :LNOT::DEF:CYREG_CM0_BP_PID3
CYREG_CM0_BP_PID3 EQU 0xe0002fec
ENDIF
IF :LNOT::DEF:CYREG_CM0_BP_CID0
CYREG_CM0_BP_CID0 EQU 0xe0002ff0
ENDIF
IF :LNOT::DEF:CYREG_CM0_BP_CID1
CYREG_CM0_BP_CID1 EQU 0xe0002ff4
ENDIF
IF :LNOT::DEF:CYREG_CM0_BP_CID2
CYREG_CM0_BP_CID2 EQU 0xe0002ff8
ENDIF
IF :LNOT::DEF:CYREG_CM0_BP_CID3
CYREG_CM0_BP_CID3 EQU 0xe0002ffc
ENDIF
IF :LNOT::DEF:CYREG_CM0_SYST_CSR
CYREG_CM0_SYST_CSR EQU 0xe000e010
ENDIF
IF :LNOT::DEF:CYFLD_CM0_ENABLE__OFFSET
CYFLD_CM0_ENABLE__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CM0_ENABLE__SIZE
CYFLD_CM0_ENABLE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CM0_TICKINT__OFFSET
CYFLD_CM0_TICKINT__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CM0_TICKINT__SIZE
CYFLD_CM0_TICKINT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CM0_CLKSOURCE__OFFSET
CYFLD_CM0_CLKSOURCE__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_CM0_CLKSOURCE__SIZE
CYFLD_CM0_CLKSOURCE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CM0_COUNTFLAG__OFFSET
CYFLD_CM0_COUNTFLAG__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_CM0_COUNTFLAG__SIZE
CYFLD_CM0_COUNTFLAG__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CM0_SYST_RVR
CYREG_CM0_SYST_RVR EQU 0xe000e014
ENDIF
IF :LNOT::DEF:CYFLD_CM0_RELOAD__OFFSET
CYFLD_CM0_RELOAD__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CM0_RELOAD__SIZE
CYFLD_CM0_RELOAD__SIZE EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYREG_CM0_SYST_CVR
CYREG_CM0_SYST_CVR EQU 0xe000e018
ENDIF
IF :LNOT::DEF:CYFLD_CM0_CURRENT__OFFSET
CYFLD_CM0_CURRENT__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CM0_CURRENT__SIZE
CYFLD_CM0_CURRENT__SIZE EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYREG_CM0_SYST_CALIB
CYREG_CM0_SYST_CALIB EQU 0xe000e01c
ENDIF
IF :LNOT::DEF:CYFLD_CM0_TENMS__OFFSET
CYFLD_CM0_TENMS__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CM0_TENMS__SIZE
CYFLD_CM0_TENMS__SIZE EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_CM0_SKEW__OFFSET
CYFLD_CM0_SKEW__OFFSET EQU 0x0000001e
ENDIF
IF :LNOT::DEF:CYFLD_CM0_SKEW__SIZE
CYFLD_CM0_SKEW__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CM0_NOREF__OFFSET
CYFLD_CM0_NOREF__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_CM0_NOREF__SIZE
CYFLD_CM0_NOREF__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CM0_ISER
CYREG_CM0_ISER EQU 0xe000e100
ENDIF
IF :LNOT::DEF:CYFLD_CM0_SETENA__OFFSET
CYFLD_CM0_SETENA__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CM0_SETENA__SIZE
CYFLD_CM0_SETENA__SIZE EQU 0x00000020
ENDIF
IF :LNOT::DEF:CYREG_CM0_ICER
CYREG_CM0_ICER EQU 0xe000e180
ENDIF
IF :LNOT::DEF:CYFLD_CM0_CLRENA__OFFSET
CYFLD_CM0_CLRENA__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CM0_CLRENA__SIZE
CYFLD_CM0_CLRENA__SIZE EQU 0x00000020
ENDIF
IF :LNOT::DEF:CYREG_CM0_ISPR
CYREG_CM0_ISPR EQU 0xe000e200
ENDIF
IF :LNOT::DEF:CYFLD_CM0_SETPEND__OFFSET
CYFLD_CM0_SETPEND__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CM0_SETPEND__SIZE
CYFLD_CM0_SETPEND__SIZE EQU 0x00000020
ENDIF
IF :LNOT::DEF:CYREG_CM0_ICPR
CYREG_CM0_ICPR EQU 0xe000e280
ENDIF
IF :LNOT::DEF:CYFLD_CM0_CLRPEND__OFFSET
CYFLD_CM0_CLRPEND__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CM0_CLRPEND__SIZE
CYFLD_CM0_CLRPEND__SIZE EQU 0x00000020
ENDIF
IF :LNOT::DEF:CYREG_CM0_IPR0
CYREG_CM0_IPR0 EQU 0xe000e400
ENDIF
IF :LNOT::DEF:CYFLD_CM0_PRI_N0__OFFSET
CYFLD_CM0_PRI_N0__OFFSET EQU 0x00000006
ENDIF
IF :LNOT::DEF:CYFLD_CM0_PRI_N0__SIZE
CYFLD_CM0_PRI_N0__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_CM0_PRI_N1__OFFSET
CYFLD_CM0_PRI_N1__OFFSET EQU 0x0000000e
ENDIF
IF :LNOT::DEF:CYFLD_CM0_PRI_N1__SIZE
CYFLD_CM0_PRI_N1__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_CM0_PRI_N2__OFFSET
CYFLD_CM0_PRI_N2__OFFSET EQU 0x00000016
ENDIF
IF :LNOT::DEF:CYFLD_CM0_PRI_N2__SIZE
CYFLD_CM0_PRI_N2__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_CM0_PRI_N3__OFFSET
CYFLD_CM0_PRI_N3__OFFSET EQU 0x0000001e
ENDIF
IF :LNOT::DEF:CYFLD_CM0_PRI_N3__SIZE
CYFLD_CM0_PRI_N3__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYREG_CM0_IPR1
CYREG_CM0_IPR1 EQU 0xe000e404
ENDIF
IF :LNOT::DEF:CYREG_CM0_IPR2
CYREG_CM0_IPR2 EQU 0xe000e408
ENDIF
IF :LNOT::DEF:CYREG_CM0_IPR3
CYREG_CM0_IPR3 EQU 0xe000e40c
ENDIF
IF :LNOT::DEF:CYREG_CM0_IPR4
CYREG_CM0_IPR4 EQU 0xe000e410
ENDIF
IF :LNOT::DEF:CYREG_CM0_IPR5
CYREG_CM0_IPR5 EQU 0xe000e414
ENDIF
IF :LNOT::DEF:CYREG_CM0_IPR6
CYREG_CM0_IPR6 EQU 0xe000e418
ENDIF
IF :LNOT::DEF:CYREG_CM0_IPR7
CYREG_CM0_IPR7 EQU 0xe000e41c
ENDIF
IF :LNOT::DEF:CYREG_CM0_CPUID
CYREG_CM0_CPUID EQU 0xe000ed00
ENDIF
IF :LNOT::DEF:CYFLD_CM0_REVISION__OFFSET
CYFLD_CM0_REVISION__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CM0_REVISION__SIZE
CYFLD_CM0_REVISION__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_CM0_PARTNO__OFFSET
CYFLD_CM0_PARTNO__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_CM0_PARTNO__SIZE
CYFLD_CM0_PARTNO__SIZE EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD_CM0_CONSTANT__OFFSET
CYFLD_CM0_CONSTANT__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_CM0_CONSTANT__SIZE
CYFLD_CM0_CONSTANT__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_CM0_VARIANT__OFFSET
CYFLD_CM0_VARIANT__OFFSET EQU 0x00000014
ENDIF
IF :LNOT::DEF:CYFLD_CM0_VARIANT__SIZE
CYFLD_CM0_VARIANT__SIZE EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_CM0_IMPLEMENTER__OFFSET
CYFLD_CM0_IMPLEMENTER__OFFSET EQU 0x00000018
ENDIF
IF :LNOT::DEF:CYFLD_CM0_IMPLEMENTER__SIZE
CYFLD_CM0_IMPLEMENTER__SIZE EQU 0x00000008
ENDIF
IF :LNOT::DEF:CYREG_CM0_ICSR
CYREG_CM0_ICSR EQU 0xe000ed04
ENDIF
IF :LNOT::DEF:CYFLD_CM0_VECTACTIVE__OFFSET
CYFLD_CM0_VECTACTIVE__OFFSET EQU 0x00000000
ENDIF
IF :LNOT::DEF:CYFLD_CM0_VECTACTIVE__SIZE
CYFLD_CM0_VECTACTIVE__SIZE EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_CM0_VECTPENDING__OFFSET
CYFLD_CM0_VECTPENDING__OFFSET EQU 0x0000000c
ENDIF
IF :LNOT::DEF:CYFLD_CM0_VECTPENDING__SIZE
CYFLD_CM0_VECTPENDING__SIZE EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_CM0_ISRPENDING__OFFSET
CYFLD_CM0_ISRPENDING__OFFSET EQU 0x00000016
ENDIF
IF :LNOT::DEF:CYFLD_CM0_ISRPENDING__SIZE
CYFLD_CM0_ISRPENDING__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CM0_ISRPREEMPT__OFFSET
CYFLD_CM0_ISRPREEMPT__OFFSET EQU 0x00000017
ENDIF
IF :LNOT::DEF:CYFLD_CM0_ISRPREEMPT__SIZE
CYFLD_CM0_ISRPREEMPT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CM0_PENDSTCLR__OFFSET
CYFLD_CM0_PENDSTCLR__OFFSET EQU 0x00000019
ENDIF
IF :LNOT::DEF:CYFLD_CM0_PENDSTCLR__SIZE
CYFLD_CM0_PENDSTCLR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CM0_PENDSTSETb__OFFSET
CYFLD_CM0_PENDSTSETb__OFFSET EQU 0x0000001a
ENDIF
IF :LNOT::DEF:CYFLD_CM0_PENDSTSETb__SIZE
CYFLD_CM0_PENDSTSETb__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CM0_PENDSVCLR__OFFSET
CYFLD_CM0_PENDSVCLR__OFFSET EQU 0x0000001b
ENDIF
IF :LNOT::DEF:CYFLD_CM0_PENDSVCLR__SIZE
CYFLD_CM0_PENDSVCLR__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CM0_PENDSVSET__OFFSET
CYFLD_CM0_PENDSVSET__OFFSET EQU 0x0000001c
ENDIF
IF :LNOT::DEF:CYFLD_CM0_PENDSVSET__SIZE
CYFLD_CM0_PENDSVSET__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CM0_NMIPENDSET__OFFSET
CYFLD_CM0_NMIPENDSET__OFFSET EQU 0x0000001f
ENDIF
IF :LNOT::DEF:CYFLD_CM0_NMIPENDSET__SIZE
CYFLD_CM0_NMIPENDSET__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CM0_AIRCR
CYREG_CM0_AIRCR EQU 0xe000ed0c
ENDIF
IF :LNOT::DEF:CYFLD_CM0_VECTCLRACTIVE__OFFSET
CYFLD_CM0_VECTCLRACTIVE__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CM0_VECTCLRACTIVE__SIZE
CYFLD_CM0_VECTCLRACTIVE__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CM0_SYSRESETREQ__OFFSET
CYFLD_CM0_SYSRESETREQ__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_CM0_SYSRESETREQ__SIZE
CYFLD_CM0_SYSRESETREQ__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CM0_ENDIANNESS__OFFSET
CYFLD_CM0_ENDIANNESS__OFFSET EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD_CM0_ENDIANNESS__SIZE
CYFLD_CM0_ENDIANNESS__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CM0_VECTKEY__OFFSET
CYFLD_CM0_VECTKEY__OFFSET EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYFLD_CM0_VECTKEY__SIZE
CYFLD_CM0_VECTKEY__SIZE EQU 0x00000010
ENDIF
IF :LNOT::DEF:CYREG_CM0_SCR
CYREG_CM0_SCR EQU 0xe000ed10
ENDIF
IF :LNOT::DEF:CYFLD_CM0_SLEEPONEXIT__OFFSET
CYFLD_CM0_SLEEPONEXIT__OFFSET EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CM0_SLEEPONEXIT__SIZE
CYFLD_CM0_SLEEPONEXIT__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CM0_SLEEPDEEP__OFFSET
CYFLD_CM0_SLEEPDEEP__OFFSET EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_CM0_SLEEPDEEP__SIZE
CYFLD_CM0_SLEEPDEEP__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CM0_SEVONPEND__OFFSET
CYFLD_CM0_SEVONPEND__OFFSET EQU 0x00000004
ENDIF
IF :LNOT::DEF:CYFLD_CM0_SEVONPEND__SIZE
CYFLD_CM0_SEVONPEND__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CM0_CCR
CYREG_CM0_CCR EQU 0xe000ed14
ENDIF
IF :LNOT::DEF:CYFLD_CM0_UNALIGN_TRP__OFFSET
CYFLD_CM0_UNALIGN_TRP__OFFSET EQU 0x00000003
ENDIF
IF :LNOT::DEF:CYFLD_CM0_UNALIGN_TRP__SIZE
CYFLD_CM0_UNALIGN_TRP__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYFLD_CM0_STKALIGN__OFFSET
CYFLD_CM0_STKALIGN__OFFSET EQU 0x00000009
ENDIF
IF :LNOT::DEF:CYFLD_CM0_STKALIGN__SIZE
CYFLD_CM0_STKALIGN__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CM0_SHPR2
CYREG_CM0_SHPR2 EQU 0xe000ed1c
ENDIF
IF :LNOT::DEF:CYFLD_CM0_PRI_11__OFFSET
CYFLD_CM0_PRI_11__OFFSET EQU 0x0000001e
ENDIF
IF :LNOT::DEF:CYFLD_CM0_PRI_11__SIZE
CYFLD_CM0_PRI_11__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYREG_CM0_SHPR3
CYREG_CM0_SHPR3 EQU 0xe000ed20
ENDIF
IF :LNOT::DEF:CYFLD_CM0_PRI_14__OFFSET
CYFLD_CM0_PRI_14__OFFSET EQU 0x00000016
ENDIF
IF :LNOT::DEF:CYFLD_CM0_PRI_14__SIZE
CYFLD_CM0_PRI_14__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYFLD_CM0_PRI_15__OFFSET
CYFLD_CM0_PRI_15__OFFSET EQU 0x0000001e
ENDIF
IF :LNOT::DEF:CYFLD_CM0_PRI_15__SIZE
CYFLD_CM0_PRI_15__SIZE EQU 0x00000002
ENDIF
IF :LNOT::DEF:CYREG_CM0_SHCSR
CYREG_CM0_SHCSR EQU 0xe000ed24
ENDIF
IF :LNOT::DEF:CYFLD_CM0_SVCALLPENDED__OFFSET
CYFLD_CM0_SVCALLPENDED__OFFSET EQU 0x0000000f
ENDIF
IF :LNOT::DEF:CYFLD_CM0_SVCALLPENDED__SIZE
CYFLD_CM0_SVCALLPENDED__SIZE EQU 0x00000001
ENDIF
IF :LNOT::DEF:CYREG_CM0_SCS_PID4
CYREG_CM0_SCS_PID4 EQU 0xe000efd0
ENDIF
IF :LNOT::DEF:CYREG_CM0_SCS_PID0
CYREG_CM0_SCS_PID0 EQU 0xe000efe0
ENDIF
IF :LNOT::DEF:CYREG_CM0_SCS_PID1
CYREG_CM0_SCS_PID1 EQU 0xe000efe4
ENDIF
IF :LNOT::DEF:CYREG_CM0_SCS_PID2
CYREG_CM0_SCS_PID2 EQU 0xe000efe8
ENDIF
IF :LNOT::DEF:CYREG_CM0_SCS_PID3
CYREG_CM0_SCS_PID3 EQU 0xe000efec
ENDIF
IF :LNOT::DEF:CYREG_CM0_SCS_CID0
CYREG_CM0_SCS_CID0 EQU 0xe000eff0
ENDIF
IF :LNOT::DEF:CYREG_CM0_SCS_CID1
CYREG_CM0_SCS_CID1 EQU 0xe000eff4
ENDIF
IF :LNOT::DEF:CYREG_CM0_SCS_CID2
CYREG_CM0_SCS_CID2 EQU 0xe000eff8
ENDIF
IF :LNOT::DEF:CYREG_CM0_SCS_CID3
CYREG_CM0_SCS_CID3 EQU 0xe000effc
ENDIF
IF :LNOT::DEF:CYREG_CM0_ROM_SCS
CYREG_CM0_ROM_SCS EQU 0xe00ff000
ENDIF
IF :LNOT::DEF:CYREG_CM0_ROM_DWT
CYREG_CM0_ROM_DWT EQU 0xe00ff004
ENDIF
IF :LNOT::DEF:CYREG_CM0_ROM_BPU
CYREG_CM0_ROM_BPU EQU 0xe00ff008
ENDIF
IF :LNOT::DEF:CYREG_CM0_ROM_END
CYREG_CM0_ROM_END EQU 0xe00ff00c
ENDIF
IF :LNOT::DEF:CYREG_CM0_ROM_CSMT
CYREG_CM0_ROM_CSMT EQU 0xe00fffcc
ENDIF
IF :LNOT::DEF:CYREG_CM0_ROM_PID4
CYREG_CM0_ROM_PID4 EQU 0xe00fffd0
ENDIF
IF :LNOT::DEF:CYREG_CM0_ROM_PID0
CYREG_CM0_ROM_PID0 EQU 0xe00fffe0
ENDIF
IF :LNOT::DEF:CYREG_CM0_ROM_PID1
CYREG_CM0_ROM_PID1 EQU 0xe00fffe4
ENDIF
IF :LNOT::DEF:CYREG_CM0_ROM_PID2
CYREG_CM0_ROM_PID2 EQU 0xe00fffe8
ENDIF
IF :LNOT::DEF:CYREG_CM0_ROM_PID3
CYREG_CM0_ROM_PID3 EQU 0xe00fffec
ENDIF
IF :LNOT::DEF:CYREG_CM0_ROM_CID0
CYREG_CM0_ROM_CID0 EQU 0xe00ffff0
ENDIF
IF :LNOT::DEF:CYREG_CM0_ROM_CID1
CYREG_CM0_ROM_CID1 EQU 0xe00ffff4
ENDIF
IF :LNOT::DEF:CYREG_CM0_ROM_CID2
CYREG_CM0_ROM_CID2 EQU 0xe00ffff8
ENDIF
IF :LNOT::DEF:CYREG_CM0_ROM_CID3
CYREG_CM0_ROM_CID3 EQU 0xe00ffffc
ENDIF
IF :LNOT::DEF:CYDEV_CoreSightTable_BASE
CYDEV_CoreSightTable_BASE EQU 0xf0000000
ENDIF
IF :LNOT::DEF:CYDEV_CoreSightTable_SIZE
CYDEV_CoreSightTable_SIZE EQU 0x00001000
ENDIF
IF :LNOT::DEF:CYREG_CoreSightTable_DATA_MBASE
CYREG_CoreSightTable_DATA_MBASE EQU 0xf0000000
ENDIF
IF :LNOT::DEF:CYREG_CoreSightTable_DATA_MSIZE
CYREG_CoreSightTable_DATA_MSIZE EQU 0x00001000
ENDIF
IF :LNOT::DEF:CYDEV_FLS_SECTOR_SIZE
CYDEV_FLS_SECTOR_SIZE EQU 0x00008000
ENDIF
IF :LNOT::DEF:CYDEV_FLS_ROW_SIZE
CYDEV_FLS_ROW_SIZE EQU 0x00000080
ENDIF
END
| [
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] | |
0c87a56191755195dcdfb5e7b0397c6357a2763b | 239a100f16caf3da8b9bc9ddd9f9da39d55a8583 | /Tropical/BTP_Thread.h | c3d75cac5efc4d47e1ff0afec0a4154cd7b7b7a5 | [
"MIT"
] | permissive | aleaugustoplus/Tropical | 2f22a0ad68cd2c5d36b867cba6590cf6c09e1345 | 328be8f74a4adff401c481b0b2b4efbc088204b6 | refs/heads/master | 2020-05-30T12:03:03.240394 | 2020-04-26T22:01:25 | 2020-04-26T22:01:25 | 23,448,157 | 0 | 0 | null | null | null | null | ISO-8859-1 | C++ | false | false | 3,606 | h | /*##################################################################
# Objeto Thread #
# Copyright©: #
# Tropical® Corp. #
#----------------------------------------------------------------#
# Criada em: #
# 27/06/06 - Alexandre A. S. lopes #
# Descrição: #
# Classe abstrata! para criação de um objeto #
# thread que possui um método Executar que roda em uma thread. #
# todo objeto dessa classe é uma thread e todas as opções já #
# estão encapsuladas em seu métodos e propriedades. #
##################################################################*/
//---------------------------------------------------------------------------
#ifndef BTP_ThreadH
#define BTP_ThreadH
#include <Process.h>
#include <windows.h>
#include "BTP_Objeto.h"
#include "BTP_Excecao.h"
DWORD WINAPI ThreadMain(LPVOID temp);
class BIBTROPICAL BTP_Thread: public BTP_Objeto
{
bool suspensa;
DWORD dwthreadid;
HANDLE hthread;
void __TROPICALL Objeto();
HWND Janela;
protected:
friend DWORD WINAPI ThreadMain(LPVOID temp);
virtual void __TROPICALL Executar()=0;
void __TROPICALL MandarMsg(unsigned int Msg,WPARAM =0,LPARAM =0,HWND=0)
throw(BTP_Excecao*);
void __TROPICALL EntregarMsg(unsigned int Msg,WPARAM =0,LPARAM =0,HWND=0)
throw(BTP_Excecao*);
public:
enum PrioridadesThread {INATIVA=THREAD_PRIORITY_IDLE,
MUITO_BAIXA=THREAD_PRIORITY_LOWEST,
ABAIXO_DO_NORMAL=THREAD_PRIORITY_BELOW_NORMAL,
NORMAL=THREAD_PRIORITY_NORMAL,
ACIMA_DO_NORMAL=THREAD_PRIORITY_ABOVE_NORMAL,
MAXIMA=THREAD_PRIORITY_HIGHEST,
TEMPO_CRITICO=THREAD_PRIORITY_TIME_CRITICAL
};
enum PrioridadesProcesso {PROCESSO_TEMPO_REAL=REALTIME_PRIORITY_CLASS,
PROCESSO_ALTA_PRIORIDADE=HIGH_PRIORITY_CLASS,
PROCESSO_INATIVO=IDLE_PRIORITY_CLASS,
PROCESSO_NORMAL=NORMAL_PRIORITY_CLASS
};
__TROPICALL BTP_Thread(char *,bool ativa=false,HWND janela=0)throw(BTP_Excecao*);
__TROPICALL ~BTP_Thread();
void __TROPICALL TerminarThread();
void __TROPICALL ReiniciarThread()throw(BTP_Excecao*);
#ifdef BTP_CBUILDER
__property HANDLE Handle={read=PegarHandle};
__property bool Ativa={read=PegarSuspensa, write=AlterarSuspensa};
__property DWORD dwThreadID={read=PegarID};
__property int PrioridadeDaThread={read=PegarPrioridadeDaThread, write=AlterarPrioridadeDaThread};
__property int PrioridadeDoProcesso={read=PegarPrioridadeDoProcesso, write=AlterarPrioridadeDoProcesso};
__property HWND JanelaMSG={read=PegarJanelaMSG, write=AlterarJanelaMSG};
//~Funções das propriedades
private:
#endif
HANDLE __TROPICALL PegarHandle();
bool __TROPICALL PegarSuspensa();
void __TROPICALL AlterarSuspensa(bool);
DWORD __TROPICALL PegarID();
int __TROPICALL PegarPrioridadeDaThread();
void __TROPICALL AlterarPrioridadeDaThread(int)throw(BTP_Excecao*);
int __TROPICALL PegarPrioridadeDoProcesso();
void __TROPICALL AlterarPrioridadeDoProcesso(int)throw(BTP_Excecao*);
HWND __TROPICALL PegarJanelaMSG();
void __TROPICALL AlterarJanelaMSG(HWND);
};
//---------------------------------------------------------------------------
#endif
| [
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] | |
d7714eeadd8ceb2ae01542c60907895668dc72b2 | e86aef11a649aef6c0ffe57281ba8b523696e239 | /licencjat/tango_brut.cpp | f8b92e9e5276f0881334f52667d92da9d55cb236 | [] | no_license | julia-majkowska/Rzeczy-na-uczelnie | 2269061d3464399a64da732189d6395248b3f5ec | 52cd14f4f36fd54c5ffa97c22fdfa96993b06595 | refs/heads/master | 2021-06-16T10:59:08.127734 | 2021-02-09T10:51:20 | 2021-02-09T10:51:20 | 152,290,573 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 855 | cpp | #include<bits/stdc++.h>
using namespace std;
int main(){
set<long long> drzewo;
int n;
scanf("%d\n", &n);
while(n--){
long long a;
scanf("%lld", &a);
drzewo.insert(a);
}
int q;
scanf("%d\n", &q);
while(q--){
long long val;
scanf("%lld", &val);
//printf("DEBUG %c %d\n", op, val);
if(drzewo.empty()){
printf("BRAK\n");
continue;
}
std::set<long long>::iterator k = drzewo.lower_bound(val);
if(((k == drzewo.begin()) && (*k > val)) || *k != val){
//printf("%lld",*k);
printf("BRAK\n");
}
else{
if(k == drzewo.end() || (k!= drzewo.end() && *k > val)) k--;
printf("%lld\n", *k);
}
}
} | [
"[email protected]"
] | |
f902446d696eeac3e833b5c8b1030576013b0d59 | 9114b9e17206300ecdf89a1f38d652940a8b2cc6 | /cpp/KalkCpp/Shape/Shape2D/Polygon/polygon.h | 49df956fecf5dfb367f1adcfba4b184b35f7844d | [
"MIT"
] | permissive | Diego30090/Kalk | 598a900e8d761a5e59bafc3b71ef8389fee6d9ee | e0d29a0f393913ca3334f2a4eca5eb0b439a92a9 | refs/heads/master | 2021-09-06T23:13:00.636261 | 2018-02-13T09:46:52 | 2018-02-13T09:46:52 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,368 | h | #ifndef POLYGON_H
#define POLYGON_H
#include <vector>
#include <string.h>
#include "../../../Color/colorrgb.h"
#include "../shape2d.h"
class Polygon : public Shape2D
{
public:
/**
Constructor for Polygon with 3 params: points, Polygon's name and color
@param vp2d The vector of points for the Polygon
@param name The name for the Polygon
@param color The color for the Polygon (default is (0,0,0)
*/
Polygon(const std::vector<Point2D>&, const std::string&, ColorRGB* = new ColorRGB());
/**
Function to get the perimeter of the Polygon
@return The perimeter of the Polygon
*/
virtual double perimeter() const;
/**
Function to get the area of the Polygon
@return The area of the Polygon
*/
virtual double area() const =0;
/**
Function to get the base of the Polygon
@return The base of the Polygon
*/
virtual double base() const =0;
/**
Function to get the height of the Polygon
@return The height of the Polygon
*/
virtual double height() const =0;
/**
Function to get the area of the Polygon using the Gauss Algorithm
@param The area of the Polygon
@return The area of the Polygon
*/
static double gaussArea(const std::vector<Point2D>&);
};
#endif // POLYGON_H
| [
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] | |
f77b742acceedfd314493429f2bad4d92bd2acad | 1612ffcfac28627f66bccb13039a691ad0837442 | /src/conc/ObjPool.h | 81b14d3e68fe811678d1e443c8b52cf9a4ef72ef | [
"WTFPL"
] | permissive | EleonoreMizo/fmtconv | ec3d41aa2749efa6d74af21bccaab0c4536ad1ab | 3eec42f8aaf86f3327b9190c6b25a0c9eca22028 | refs/heads/master | 2023-02-12T00:50:43.187065 | 2023-01-28T20:01:00 | 2023-01-28T20:01:00 | 35,774,516 | 73 | 28 | WTFPL | 2023-01-28T19:56:30 | 2015-05-17T16:59:00 | C++ | UTF-8 | C++ | false | false | 3,023 | h | /*****************************************************************************
ObjPool.h
Author: Laurent de Soras, 2012
Thread-safe pool of recyclable objects.
The pool is constructed empty, new objects are created on request.
Don't forget to provide and link the pool to your object factory (so you can
control the instantiation details and provide additional parameters), see the
ObjFactoryInterface template class. Use ObjFactoryDef<T>::_fact if it doesn't
need anything more than the constructor without argument.
Template parameters:
- T: your class of stored objects. Requires:
T::~T();
--- Legal stuff ---
This program is free software. It comes without any warranty, to
the extent permitted by applicable law. You can redistribute it
and/or modify it under the terms of the Do What The Fuck You Want
To Public License, Version 2, as published by Sam Hocevar. See
http://sam.zoy.org/wtfpl/COPYING for more details.
*Tab=3***********************************************************************/
#if ! defined (conc_ObjPool_HEADER_INCLUDED)
#define conc_ObjPool_HEADER_INCLUDED
#if defined (_MSC_VER)
#pragma once
#pragma warning (4 : 4250)
#endif
/*\\\ INCLUDE FILES \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\*/
#include "conc/CellPool.h"
#include "conc/LockFreeStack.h"
#include "conc/ObjFactoryInterface.h"
#include "fstb/SingleObj.h"
namespace conc
{
template <class T>
class ObjPool
{
/*\\\ PUBLIC \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\*/
public:
typedef T ObjType;
typedef ObjFactoryInterface <ObjType> Factory;
ObjPool ();
virtual ~ObjPool ();
void set_factory (Factory &fact) noexcept;
Factory & use_factory () const noexcept;
void cleanup () noexcept;
T * take_obj ();
void return_obj (T &obj);
/*\\\ PROTECTED \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\*/
protected:
/*\\\ PRIVATE \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\*/
private:
typedef CellPool <ObjType *> PtrPool;
typedef typename PtrPool::CellType PtrCell;
typedef LockFreeStack <ObjType *> PtrStack;
int delete_obj_stack (PtrStack &ptr_stack, bool destroy_flag) noexcept;
Factory * _factory_ptr = 0; // 0 = not set
PtrStack _stack_free;
PtrStack _stack_all;
fstb::SingleObj <PtrPool>
_obj_cell_pool_ptr;
/*\\\ FORBIDDEN MEMBER FUNCTIONS \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\*/
private:
ObjPool (const ObjPool <T> &other) = delete;
ObjPool <T> & operator = (const ObjPool <T> &other) = delete;
bool operator == (const ObjPool <T> &other) const = delete;
bool operator != (const ObjPool <T> &other) const = delete;
}; // class ObjPool
} // namespace conc
#include "conc/ObjPool.hpp"
#endif // conc_ObjPool_HEADER_INCLUDED
/*\\\ EOF \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\*/
| [
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] | |
ae5d84bfdc3edd232c54957d7fa77b10b45c51ca | d7ca97a7458de339b94f7bed7a07433116562e0c | /Smart Greenhouse GUI & Code/Back Ups/Back Up (03062019)/Smart Habitat/Smart Habitat v1.0 Alpha/Smart Habitat v1.0 Alpha/Header.ino | b610d473d4e026913ca649afccd46e51de0f36c7 | [] | no_license | FJBarranco/Smart_Habitat | 8fbb336147dba0fd5c794569b5803faa44269735 | 6819dec222d7551cc31f2b1f421988c35838343a | refs/heads/master | 2022-03-26T07:26:11.358343 | 2019-12-28T00:44:24 | 2019-12-28T00:44:24 | 230,538,430 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 4,451 | ino | //================================================= Header ============================================================================================================
#include <SimpleDHT.h> // Air Temp & Humid
#include <OneWire.h> // Soil Temp
#include <DallasTemperature.h> // Soil Temp
//=====================Sensors====================================
int pinDHT11 = 53; // Temp. & Humid. Sensor pin 53
#define ONE_WIRE_BUS 51 // Soil Temp Sensor pin 51
int Soilmoistsensor = A15; // Soil Moisture Analog A15
int LightSensor = A8; // Light Intensity
int LightSensorValue = A8; // Light Intensity Value (Buffer)
//=====================Relay Control=============================
int HeatingFan = 44; // Heating Fan Intake Relay 1
int CoolingingFans_Intake = 46; // Cooling Fans Intake Relay 2
int CoolingingFans_Exhaust = 48; // Cooling Fans Exhaust/Dehumidifer Relay 3
int Humidifier = 50; // Humidifier Relay 4
int Sprinklers = 52; // Sprinklers Relay 5
int SoilHeater = 42; // Soil Heater Relay 6
int UVLights = 40; // UV Lights Relay 7
//int Empty = ; // Relay 8
//=====================Data Pin/Analog Variables=============================
volatile byte relayState = LOW; // Relays
SimpleDHT11 dht11; // Air Temp & Humid
OneWire oneWire(ONE_WIRE_BUS); // Soil Temp
DallasTemperature Soiltemp(&oneWire);// Soil Temp
int SoilmoistsensorValue = 0; // Soil Moisture Sensor
//=============================================== GUI ======================================================================================================================================
//============== Libraries and variables of the OS ==========================
// *** SPFD5408 change -- Begin
#include <SPFD5408_Adafruit_GFX.h> // Core graphics library
#include <SPFD5408_Adafruit_TFTLCD.h> // Hardware-specific library
#include <SPFD5408_TouchScreen.h>
// *** SPFD5408 change -- End
#include <EEPROM.h> // To save button status on EEPROM
// The control pins for the LCD can be assigned to any digital or
// analog pins...but we'll use the analog pins as this allows us to
// double up the pins with the touch screen (see the TFT paint example).
#define LCD_CS A3 // Chip Select goes to Analog 3
#define LCD_CD A2 // Command/Data goes to Analog 2
#define LCD_WR A1 // LCD Write goes to Analog 1
#define LCD_RD A0 // LCD Read goes to Analog 0
#define LCD_RESET A4 // Can alternately just connect to Arduino's reset pin
#define LCDROTATION 3
/* Touch */
#define YP A3 // must be an analog pin, use "An" notation!
#define XM A2 // must be an analog pin, use "An" notation!
#define YM 9 // can be a digital pin
#define XP 8 // can be a digital pin
#define TS_MINX 150 // 150
#define TS_MINY 120 // 120
#define TS_MAXX 920 // 920
#define TS_MAXY 940 // 940
// For better pressure precision, we need to know the resistance
// between X+ and X- Use any multimeter to read it
// For the one we're using, its 300 ohms across the X plate
TouchScreen ts = TouchScreen(XP, YP, XM, YM, 300);
#define MINPRESSURE 10
#define MAXPRESSURE 1000
/* End Touch */
/* Colors - Assign human-readable names to some common 16-bit color values:
16bit color picker: https://ee-programming-notepad.blogspot.co.uk/2016/10/16-bit-color-generator-picker.html
HTML colors: http://htmlcolorcodes.com/ */
#define BLACK 0x0000
#define WHITE 0xFFFF
#define BLUE 0x001F
#define RED 0xF800
#define GREEN 0x2685
#define CYAN 0x07FF
#define LIME 0x5FE0
#define MAGENTA 0xF81F
#define YELLOW 0xFFE0
#define TURQUOISE 0x0F1B
#define ORANGE 0xFBA0
#define PINK 0xF813
#define SKY 0x667F // nice light blue
#define GREY 0xE73C
#define DarkTURQUOISE 0x3491
#define DarkGREY 0x39C7
#define DarkRED 0x8986
#define DarkGREEN 0x3446
#define DarkMAGENTA 0x612F
#define DarkBLUE 0x298B
#define DarkYELLOW 0x83E5
#define DarkORANGE 0xA347
#define DarkPINK 0xA1EF
#define GOLD 0xF3FF00 // nice yellow
#define SALMON 0xFB2C // nice red
//==================== Initialize TFT Display =========================
Adafruit_TFTLCD tft(LCD_CS, LCD_CD, LCD_WR, LCD_RD, LCD_RESET);
/* Store Menu Variables */
String CurrentPage;
String PrevPage;
| [
"[email protected]"
] | |
ab7968b18a62dc50ae6f1f709f03ec6f461bb2a6 | 844190630c4b674abd8e4d82952d5093bb2574fa | /libDirectshowAbstracts/AbstractTransformInputPin.h | 1e2670187db561c45cf03e3db04bdda8b3f8525b | [] | no_license | bshock/Shouter-DirectShow-Filters | 32981bc99745c5553ac047eab5e97fd65388538f | 2432c21afa7c42ac5a65ea15160f7c0a7329e5c7 | refs/heads/master | 2021-01-23T08:38:30.093942 | 2016-01-28T04:50:50 | 2016-01-28T04:50:50 | 33,791,064 | 2 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 4,265 | h | //===========================================================================
//Copyright (C) 2003, 2004 Zentaro Kavanagh
//
//Redistribution and use in source and binary forms, with or without
//modification, are permitted provided that the following conditions
//are met:
//
//- Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
//- Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
//- Neither the name of Zentaro Kavanagh nor the names of contributors
// may be used to endorse or promote products derived from this software
// without specific prior written permission.
//
//THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
//``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
//LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
//PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ORGANISATION OR
//CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
//EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
//PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
//PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
//LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
//NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
//SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//===========================================================================
#pragma once
//Local Includes
#include "directshowabstractsdllstuff.h"
#include "BasicSeekPassThrough.h"
//STL Includes
#include <vector>
//
using namespace std;
//Forward Declarations
class AbstractTransformOutputPin;
class AbstractTransformFilter;
class AbstractTransformInputPin
//Base Classes
: public CBaseInputPin
//http://msdn.microsoft.com/library/default.asp?url=/library/en-us/directshow/htm/cbaseinputpinclass.asp
, public BasicSeekPassThrough
{
public:
//Friend Classes
friend class AbstractTransformOutputPin;
//COM Setup
DECLARE_IUNKNOWN
STDMETHODIMP NonDelegatingQueryInterface(REFIID riid, void **ppv);
//Constructors
AbstractTransformInputPin(AbstractTransformFilter* inParentFilter, CCritSec* inFilterLock, AbstractTransformOutputPin* inOutputPin, TCHAR* inObjectName, LPCWSTR inPinDisplayName, vector<CMediaType*> inAcceptableMediaTypes);
virtual ~AbstractTransformInputPin(void);
//Pin Conenction Methods
virtual HRESULT BreakConnect();
virtual HRESULT CompleteConnect(IPin *inReceivePin);
//Media Type control methods
virtual HRESULT CheckMediaType(const CMediaType *inMediaType);
virtual HRESULT GetMediaType(int inPosition, CMediaType *outMediaType);
virtual HRESULT SetMediaType(const CMediaType* inMediaType) = 0;
//TODO::: Should be virtual ??
virtual STDMETHODIMP Receive(IMediaSample *pSample);
//Stream Messaging methods
virtual STDMETHODIMP EndOfStream(void);
virtual STDMETHODIMP BeginFlush();
virtual STDMETHODIMP EndFlush();
virtual STDMETHODIMP NewSegment(REFERENCE_TIME inStartTime, REFERENCE_TIME inStopTime, double inRate);
protected:
//Constants and Enumerations
static const short SIZE_16_BITS = 2;
static const signed short SINT_MAX = 32767;
static const signed short SINT_MIN = -32768;
//Pure Virtuals for codec specific methods
virtual HRESULT TransformData(unsigned char* inBuf, long inNumBytes) = 0;
virtual bool ConstructCodec() = 0;
virtual void DestroyCodec() = 0;
virtual bool SetSampleParams(IMediaSample* outMediaSample, unsigned long inDataSize, REFERENCE_TIME* inStartTime, REFERENCE_TIME* inEndTime);
HRESULT mHR;
//TODO::: Couldn't this be gotten from the parent filter if we make them friends ??
AbstractTransformOutputPin* mOutputPin;
AbstractTransformFilter* mParentFilter;
vector<CMediaType*> mAcceptableMediaTypes;
//DirectShow timestamps in milliseconds
__int64 m_dsTimeStart;
__int64 m_dsTimeEnd;
//fstream debugLog;
CCritSec* mStreamLock;
};
| [
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] | |
c67083b838c640f0234d1270e8636464e7bb2469 | 7b4a0a266f8488f2b2596d95e6f5c985c8f232b9 | /18/11.18/03.11.18/1015E1.cpp | 7a55f562bf9c08d8d48910025c25412baa288cbc | [] | no_license | shishirkumar1996/cp | 811d8607d5f460fcec445db9af4853c550aee685 | e89cb840e5b3fd91be4b9402a6fdcb20bb3466c6 | refs/heads/master | 2020-03-10T11:06:17.696405 | 2019-01-04T07:12:45 | 2019-01-04T07:12:45 | 129,348,767 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,391 | cpp | #include<bits/stdc++.h>
#define lld long long int
#define faster ios_base::sync_with_stdio(false);cin.tie(0);
#define vs vector< string >
#define pr pair< int,int >
#define ppr pair< pr, int >
#define vp vector< ppr >
#define trace(x) cerr<<#x<<": "<<x<<'\n';
#define trace2(a,n) cerr<<#a<<": ";for(int i=0;i<n;i++)cerr<<a[i]<<" ";cerr<<'\n';
using namespace std;
int main(){
int n,m;
cin>>n>>m;
char input[n+2][m+2];
for(int i=1;i<=n;i++)for(int j=1;j<=m;j++)cin>>input[i][j];
bool reached[n+2][m+2];
for(int i=0;i<=n+1;i++)for(int j=0;j<=m+1;j++) reached[i][j] = false;
vp output;
for(int i=1;i<=n;i++)for(int j=1;j<=m;j++){
if(input[i][j] != '*')continue;
int flag = 1;
int k = 1;
while(flag){
if(input[i-k][j] == '*' && input[i+k][j]=='*' && input[i][j-k] == '*' && input[i][j+k] == '*'){
reached[i-k][j] = reached[i+k][j] = reached[i][j-k] = reached[i][j+k] = true;
k++;
}
else flag = 0;
}
k--;
if(k){ reached[i][j] = true;
output.push_back(make_pair(make_pair(i,j),k)); }
}
int flag = 1;
for(int i=1;i<=n;i++)for(int j=1;j<=n;j++)
if(input[i][j]=='*' && !reached[i][j]) flag = 0;
if(!flag){ cout<<-1<<'\n'; return 0;}
cout<<output.size()<<'\n';
for(int i=0;i<output.size();i++)
cout<<output[i].first.first<<" "<<output[i].first.second<<" "<<output[i].second<<'\n';
}
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efc3363ed4805278571065c2c297e7195fbaf2e0 | 48d5dbf4475448f5df6955f418d7c42468d2a165 | /SDK/SoT_BP_fod_Plentifin_05_AmberRaw_00_a_ItemDesc_parameters.hpp | 22e00d30cc4e3dbebdf99defe3196c5687fad87c | [] | no_license | Outshynd/SoT-SDK-1 | 80140ba84fe9f2cdfd9a402b868099df4e8b8619 | 8c827fd86a5a51f3d4b8ee34d1608aef5ac4bcc4 | refs/heads/master | 2022-11-21T04:35:29.362290 | 2020-07-10T14:50:55 | 2020-07-10T14:50:55 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 397 | hpp | #pragma once
// Sea of Thieves (1.4.16) SDK
#ifdef _MSC_VER
#pragma pack(push, 0x8)
#endif
#include "SoT_BP_fod_Plentifin_05_AmberRaw_00_a_ItemDesc_classes.hpp"
namespace SDK
{
//---------------------------------------------------------------------------
//Parameters
//---------------------------------------------------------------------------
}
#ifdef _MSC_VER
#pragma pack(pop)
#endif
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4a06873f7545a652f06629ba4b14017a33b8a0f9 | 6b40e9dccf2edc767c44df3acd9b626fcd586b4d | /NT/admin/activec/conui/webctrl.h | 9b05832c1a0e172e9dee8bd5af304ee5603797f9 | [] | no_license | jjzhang166/WinNT5_src_20201004 | 712894fcf94fb82c49e5cd09d719da00740e0436 | b2db264153b80fbb91ef5fc9f57b387e223dbfc2 | refs/heads/Win2K3 | 2023-08-12T01:31:59.670176 | 2021-10-14T15:14:37 | 2021-10-14T15:14:37 | 586,134,273 | 1 | 0 | null | 2023-01-07T03:47:45 | 2023-01-07T03:47:44 | null | UTF-8 | C++ | false | false | 2,330 | h | //+-------------------------------------------------------------------------
//
// Microsoft Windows
//
// Copyright (C) Microsoft Corporation, 1999 - 1999
//
// File: webctrl.h
//
//--------------------------------------------------------------------------
// WebCtrl.h : header file
//
#ifndef __WEBCTRL_H__
#define __WEBCTRL_H__
#include "ocxview.h"
/////////////////////////////////////////////////////////////////////////////
// CAMCWebViewCtrl window
class CAMCWebViewCtrl : public COCXHostView
{
public:
typedef COCXHostView BaseClass;
enum
{
WS_HISTORY = 0x00000001, // integrate with history
WS_SINKEVENTS = 0x00000002, // act as sink for DIID_DWebBrowserEvents
};
// Construction
public:
CAMCWebViewCtrl();
DECLARE_DYNCREATE(CAMCWebViewCtrl)
// attributes
private:
CMMCAxWindow m_wndAx; // This ActiveX control will host the web browser.
IWebBrowser2Ptr m_spWebBrowser2; // the interface implemented by the web browser.
DWORD m_dwAdviseCookie; // the connection ID established by the web browser with the event sink.
CComPtr<IWebSink> m_spWebSink;
protected:
virtual CMMCAxWindow * GetAxWindow() {return &m_wndAx;}
private:
SC ScCreateWebBrowser();
bool IsHistoryEnabled() const;
bool IsSinkEventsEnabled() const;
// Operations
public:
void Navigate(LPCTSTR lpszWebSite, LPCTSTR lpszFrameTarget);
void Back();
void Forward();
void Refresh();
void Stop();
LPUNKNOWN GetIUnknown(void);
SC ScGetReadyState(READYSTATE& state);
// Overrides
// ClassWizard generated virtual function overrides
//{{AFX_VIRTUAL(CAMCWebViewCtrl)
public:
virtual void OnDraw(CDC* pDC); // overridden to draw this view
//}}AFX_VIRTUAL
// Implementation
public:
virtual ~CAMCWebViewCtrl();
// Generated message map functions
protected:
//{{AFX_MSG(CAMCWebViewCtrl)
afx_msg int OnCreate(LPCREATESTRUCT lpCreateStruct);
afx_msg void OnDestroy();
//}}AFX_MSG
DECLARE_MESSAGE_MAP()
};
/////////////////////////////////////////////////////////////////////////////
#include "webctrl.inl"
#endif //__WEBCTRL_H__
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57f42a0c3bbb177d389098d55b77f18bbe437a5d | d6acb6a6d811495a5d6283f81948aa722d243d55 | /APP_REPO/VERSION_C/21_reclock/main.cpp | 50cf14e87764f243a7b31f3763ddbda5b7035a90 | [] | no_license | song-peng/SDAccel | a6bea6672a100b23e70d85b071a4e1942b14da34 | b4c2c91d00083accbad0f8edac2e63259169adae | refs/heads/master | 2020-12-12T20:14:04.116468 | 2020-01-09T00:07:44 | 2020-01-09T00:07:44 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 9,987 | cpp | // Copyright (C) 2015-2016 Xilinx Inc.
// All rights reserved.
// Author: sonals
#include <getopt.h>
#include <iostream>
#include <stdexcept>
#include <time.h>
#include "xclUtils.h"
#include "xclHALProxy.h"
#if defined(DSA64)
#include "xmigbw_hw_64.h"
#else
#include "xmigbw_hw.h"
#endif
#define BLOCK_SIZE 0x800
#define STRESS_COUNT 0x20000
/**
* Tests OCL Region clock scaling feature of hardware and driver.
* Runs an OpenCL kernel global-local memory bandwidth test with OCL running
* at regular and lower frequencies. We should see reduced bandwidth for the
* latter.
*/
const static struct option long_options[] = {
{"hal_driver", required_argument, 0, 's'},
{"bitstream", required_argument, 0, 'k'},
{"hal_logfile", required_argument, 0, 'l'},
{"device", required_argument, 0, 'd'},
{"verbose", no_argument, 0, 'v'},
{"help", no_argument, 0, 'h'},
{0, 0, 0, 0}
};
static void printHelp()
{
std::cout << "usage: %s [options] -k <bitstream>\n\n";
std::cout << " -s <hal_driver>\n";
std::cout << " -k <bitstream>\n";
std::cout << " -l <hal_logfile>\n";
std::cout << " -d <index>\n";
std::cout << " -v\n";
std::cout << " -h\n\n";
std::cout << "* If HAL driver is not specified, application will try to find the HAL driver\n";
std::cout << " using XILINX_OPENCL and XCL_PLATFORM environment variables\n";
std::cout << "* Bitstream is required\n";
std::cout << "* HAL logfile is optional but useful for capturing messages from HAL driver\n";
}
static int runKernel(xclHALProxy &proxy, size_t alignment, bool verbose)
{
// TODO: Move the buffer allocation out of runKernel
AlignedAllocator<unsigned> dataBuffer(alignment, BLOCK_SIZE * STRESS_COUNT);
AlignedAllocator<unsigned> resultBuffer(alignment, BLOCK_SIZE * STRESS_COUNT);
// Use a different pattern every run so we can be sure that the output is indeed
// generated by this run.
static char mark = 0x66;
std::memset(dataBuffer.getBuffer(), mark++, dataBuffer.size());
std::memset(resultBuffer.getBuffer(), 0, resultBuffer.size());
uint64_t deviceData = proxy.allocateDevice(dataBuffer.size());
uint64_t deviceResult = proxy.allocateDevice(resultBuffer.size());
// Write out arg 0 buffer
size_t result = proxy.migrateHost2Device(deviceData, dataBuffer.getBuffer(), dataBuffer.size());
if (result != dataBuffer.size()) {
std::cout << "FAILED TEST\n";
std::cout << "Buffer migration from host to device failed\n";
return 1;
}
const size_t controlSize = XMIGBW_CONTROL_ADDR_S2_DATA + 4;
AlignedAllocator<unsigned> regMap(alignment, controlSize/4);
AlignedAllocator<unsigned> regMapReadBack(alignment, controlSize/4);
std::memset(regMap.getBuffer(), 0, regMap.size());
regMap.getBuffer()[XMIGBW_CONTROL_ADDR_AP_CTRL] = 0x0; // ap_start
regMap.getBuffer()[XMIGBW_CONTROL_ADDR_S2_DATA/4] = deviceData; // arg s2
regMap.getBuffer()[XMIGBW_CONTROL_ADDR_S1_DATA/4] = deviceResult; // arg s1
#if defined(DSA64)
regMap.getBuffer()[XMIGBW_CONTROL_ADDR_S2_DATA/4 + 1] = (deviceData >> 32) & 0xFFFFFFFF; // arg s2
regMap.getBuffer()[XMIGBW_CONTROL_ADDR_S1_DATA/4 + 1] = (deviceResult >> 32) & 0xFFFFFFFF; // arg s1
#endif
std::cout << "Starting kernel...\n";
result = proxy.readControl(0, regMapReadBack.getBuffer(), controlSize);
if (result != controlSize) {
std::cout << "FAILED TEST\n";
std::cout << "Write failed\n";
return 1;
}
for (unsigned i = 0; verbose & (i < controlSize/4); i++) {
std::cout << "0x" << std::hex << i * 4 << " : 0x" << regMapReadBack.getBuffer()[i] << std::dec << std::endl;
}
// Next write out the control registers except the kickoff bit
result = proxy.writeControl(0, regMap.getBuffer(), controlSize);
if (result != controlSize) {
std::cout << "FAILED TEST\n";
std::cout << "Write failed\n";
return 1;
}
// First read the control registers to verify the args were written
result = proxy.readControl(0, regMapReadBack.getBuffer(), controlSize);
if (result != controlSize) {
std::cout << "FAILED TEST\n";
std::cout << "Write failed\n";
return 1;
}
for (unsigned i = 0; verbose & (i < controlSize/4); i++) {
std::cout << "0x" << std::hex << i * 4 << " : 0x" << regMapReadBack.getBuffer()[i] << std::dec << std::endl;
}
// Next kickoff the kernel
regMap.getBuffer()[XMIGBW_CONTROL_ADDR_AP_CTRL] = 0x1; // ap_start
Timer myclock;
result = proxy.writeControl(0, regMap.getBuffer(), controlSize);
if (result != controlSize) {
std::cout << "FAILED TEST\n";
std::cout << "Write failed\n";
return 1;
}
// Next wait for done from kernel
bool flag = false;
const timespec interval = {0, 500};
std::cout << "Waiting for kernel to finish...\n";
while (!flag) {
nanosleep(&interval, 0);
std::memset(regMapReadBack.getBuffer(), 0, controlSize);
result = proxy.readControl(0, regMapReadBack.getBuffer(), controlSize);
if (result != controlSize) {
std::cout << "FAILED TEST\n";
std::cout << "Write failed\n";
return 1;
}
flag = (regMapReadBack.getBuffer()[0] & 0x6);
}
double totalTime = myclock.stop();
// Readback result
result = proxy.migrateDevice2Host(deviceResult, resultBuffer.getBuffer(), resultBuffer.size());
if (result != resultBuffer.size()) {
std::cout << "FAILED TEST\n";
std::cout << "Buffer migration from device to host failed\n";
return 1;
}
result = std::memcmp(dataBuffer.getBuffer(), resultBuffer.getBuffer(), resultBuffer.size());
// Account for both read and write
double totalData = resultBuffer.size();
totalData *= 2; // Account for read and then write per iteration
totalData /= 0x100000; // In MB
std::cout << "DDR <-> Kernel RW bandwidth = " << totalData/totalTime << " MB/s\n";
if (result != 0) {
std::cout << "FAILED TEST\n";
std::cout << "Kernel generated sequence does not match golden sequence\n";
return 1;
}
proxy.freeDevice(deviceResult);
proxy.freeDevice(deviceData);
return 0;
}
int main(int argc, char** argv)
{
std::string sharedLibrary;
std::string bitstreamFile;
std::string halLogfile;
size_t alignment = 128;
unsigned index = 0;
int option_index = 0;
bool verbose = false;
int c;
findSharedLibrary(sharedLibrary);
while ((c = getopt_long(argc, argv, "s:k:l:d:vh", long_options, &option_index)) != -1)
{
switch (c)
{
case 0:
if (long_options[option_index].flag != 0)
break;
case 's':
sharedLibrary = optarg;
break;
case 'k':
bitstreamFile = optarg;
break;
case 'l':
halLogfile = optarg;
break;
case 'd':
index = std::atoi(optarg);
break;
case 'h':
printHelp();
return 0;
case 'v':
verbose = true;
break;
default:
printHelp();
return 1;
}
}
if (sharedLibrary.size() == 0) {
std::cout << "No shared library specified and library couldnot be found using XILINX_OPENCL and XCL_PLATFORM environment variables\n";
return -1;
}
if (bitstreamFile.size() == 0) {
std::cout << "FAILED TEST\n";
std::cout << "No bitstream specified, cannot load OpenCL kernel\n";
return -1;
}
if (halLogfile.size()) {
std::cout << "Using " << halLogfile << " as HAL driver logfile\n";
}
try {
std::cout << "HAL driver = " << sharedLibrary << "\n";
std::cout << "Host buffer alignment = " << alignment << " bytes\n";
std::cout << "Compiled kernel = " << bitstreamFile << "\n";
xclHALProxy proxy(sharedLibrary.c_str(), bitstreamFile.c_str(), index, halLogfile.c_str());
xclDeviceInfo info;
if (proxy.getDeviceInfo(&info)) {
std::cout << "FAILED TEST\n";
std::cout << "Unable to get current clock frequency\n";
return 1;
}
const unsigned initialFreq = info.mOCLFrequency;
for (unsigned freq = initialFreq; freq >= 25; freq -= 10) {
std::cout << "Requesting Kernel Frequency = " << freq << "MHz\n";
if (proxy.scaleFrequency(freq)) {
std::cout << "FAILED TEST\n";
std::cout << "Unable to change clock frequency\n";
return 1;
}
if (proxy.getDeviceInfo(&info)) {
std::cout << "FAILED TEST\n";
std::cout << "Unable to get current clock frequency\n";
return 1;
}
std::cout << "Kernel Frequency = " << info.mOCLFrequency << "MHz\n";
if (runKernel(proxy, alignment, verbose)) {
std::cout << "FAILED TEST for frequency " << info.mOCLFrequency << "\n";
return 1;
}
}
// Restore the frequency
if (proxy.scaleFrequency(initialFreq)) {
std::cout << "FAILED TEST\n";
std::cout << "Unable to change clock frequency\n";
return 1;
}
if (proxy.getDeviceInfo(&info)) {
std::cout << "FAILED TEST\n";
std::cout << "Unable to get current clock frequency\n";
return 1;
}
std::cout << "Kernel Frequency = " << info.mOCLFrequency << "MHz\n";
}
catch (std::exception const& e)
{
std::cout << "Exception: " << e.what() << "\n";
std::cout << "FAILED TEST\n";
return 1;
}
std::cout << "PASSED TEST\n";
return 0;
}
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3d1437c180b50b2e6ca4392c55ab7a918671bcdd | 96cf84a8024aaeb054504ff1e984d762ccfe719e | /10000-/13458.cpp | 65493d2cea9bbb8655ddabf7403e076a32449eb1 | [] | no_license | JuHyeon-Lee/BOJ | a2038a0afaa70fee399cb573d3a9eb198a7e59c2 | 045d01592df910af60354434d05ccf8cb19d5d38 | refs/heads/master | 2023-08-18T12:14:01.897810 | 2021-10-14T14:23:11 | 2021-10-14T14:23:11 | 278,236,066 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 356 | cpp | #include <iostream>
using namespace std;
int N, B, C;
int cnt[1000000];
int main(){
scanf("%d", &N);
for(int i=0; i<N; i++){
scanf("%d", &cnt[i]);
}
scanf("%d%d", &B, &C);
long long sum = N;
for(int i=0; i<N; i++){
cnt[i] -= B;
if(cnt[i]>0){
sum += cnt[i]/C;
if(cnt[i]%C) sum += 1;
}
}
printf("%lld\n", sum);
return 0;
} | [
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] | |
7ecc7eec77e34f109192c658abedda53013d8b72 | b88d0ff291bd8ceb76a23505e3add5cae714d464 | /UIThreadDemo/UIThreadDemo.h | 6861fdb291ab2408810f35b7d6627b26117df3ef | [] | no_license | SharkBSJ/MFC_9.0_Study | fc7efbbc6244cc9aa125eff6426255c9d1c8d7cf | f3a0502876378051cc9d7e40fc72c3db4731aec7 | refs/heads/master | 2020-08-11T21:24:26.111458 | 2019-10-12T12:36:29 | 2019-10-12T12:36:29 | 214,628,517 | 1 | 0 | null | null | null | null | UHC | C++ | false | false | 659 | h |
// UIThreadDemo.h : UIThreadDemo 응용 프로그램에 대한 주 헤더 파일
//
#pragma once
#ifndef __AFXWIN_H__
#error "PCH에 대해 이 파일을 포함하기 전에 'stdafx.h'를 포함합니다."
#endif
#include "resource.h" // 주 기호입니다.
// CUIThreadDemoApp:
// 이 클래스의 구현에 대해서는 UIThreadDemo.cpp을 참조하십시오.
//
class CUIThreadDemoApp : public CWinApp
{
public:
CUIThreadDemoApp();
// 재정의입니다.
public:
virtual BOOL InitInstance();
virtual int ExitInstance();
// 구현입니다.
public:
afx_msg void OnAppAbout();
DECLARE_MESSAGE_MAP()
};
extern CUIThreadDemoApp theApp;
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b43284b71b3418809662f898ade57c361a4d857c | c0caed81b5b3e1498cbca4c1627513c456908e38 | /src/protocols/noesy_assign/PeakFileFormat_Sparky.hh | 3886fb59f8383c0aaa96ced6b00c6c58cbc8e53e | [] | no_license | malaifa/source | 5b34ac0a4e7777265b291fc824da8837ecc3ee84 | fc0af245885de0fb82e0a1144422796a6674aeae | refs/heads/master | 2021-01-19T22:10:22.942155 | 2017-04-19T14:13:07 | 2017-04-19T14:13:07 | 88,761,668 | 0 | 2 | null | null | null | null | UTF-8 | C++ | false | false | 3,076 | hh | // -*- mode:c++;tab-width:2;indent-tabs-mode:t;show-trailing-whitespace:t;rm-trailing-spaces:t -*-
// vi: set ts=2 noet:
//
// (c) Copyright Rosetta Commons Member Institutions.
// (c) This file is part of the Rosetta software suite and is made available under license.
// (c) The Rosetta software is developed by the contributing members of the Rosetta Commons.
// (c) For more information, see http://www.rosettacommons.org. Questions about this can be
// (c) addressed to University of Washington UW TechTransfer, email: [email protected].
/// @file CrossPeakList.hh
/// @author Oliver Lange
#ifndef INCLUDED_protocols_noesy_assign_PeakFileFormat_Sparky_hh
#define INCLUDED_protocols_noesy_assign_PeakFileFormat_Sparky_hh
// Unit Headers
#include <protocols/noesy_assign/PeakFileFormat.hh>
// Package Headers
// Project Headers
#include <core/types.hh>
//#include <core/id/NamedAtomID.fwd.hh>
//#include <core/chemical/AA.hh>
// Utility headers
// #include <utility/excn/Exceptions.hh>
#include <utility/vector1.hh>
#include <utility/pointer/ReferenceCount.hh>
//Auto Headers
// #include <numeric/numeric.functions.hh>
// #include <basic/prof.hh>
//#include <basic/Tracer.hh>
// #include <basic/options/option.hh>
// #include <basic/options/keys/abinitio.OptionKeys.gen.hh>
// #include <basic/options/keys/run.OptionKeys.gen.hh>
//#include <basic/options/keys/templates.OptionKeys.gen.hh>
//// C++ headers
namespace protocols {
namespace noesy_assign {
class PeakFileFormat_Sparky : public PeakFileFormat {
public:
PeakFileFormat_Sparky() {};
// PeakFileFormat_Sparky( ResonanceListOP const& );
// virtual ~PeakFileFormat_Sparky();
virtual void set_format_from_peak( CrossPeak const& );
virtual void write_peak( std::ostream&, core::Size ct, CrossPeak const& ) const;
// virtual void write_resonances( std::ostream&, CrossPeak const& ) const;
// virtual void write_strength( std::ostream&, CrossPeak const& ) const;
// virtual void write_assignments( std::ostream&, CrossPeak const&, std::string const& first_line_end ) const;
virtual void write_assignment( std::ostream&, PeakAssignment const& ) const;
virtual void write_assignment_indent( std::ostream&, CrossPeak const& ) const;
virtual void write_assignment_stats( std::ostream&, PeakAssignment& ) const {}; //don't write these
virtual void write_nil_assignment( std::ostream& ) const;
// virtual void read_resonances( std::istream&, CrossPeak& ) const;
// virtual void read_assignments( std::istream& is, std::istream& rest_line, CrossPeak& ) const;
// virtual void read_strength( std::istream&, CrossPeak& ) const;
// virtual CrossPeakOP read_peak( std::istream& ) const;
// virtual void read_header( std::istream& );
// virtual void write_header( std::ostream& );
// virtual void output_diagnosis( std::ostream& ) const;
// virtual void set_format_from_peak( CrossPeak const& );
virtual void write_header( std::ostream& );
// virtual bool compatible_with_current_format( CrossPeak const& ) const;
//static void register_options();
};
}
}
#endif
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7dd52134f927aebbf78092a29fba95a9bc97a6b4 | 257de719a2108497d6a81126a3efea7c329f5f52 | /SMTrader/VtMarketManager.h | ff690e508e63438f8f77706baf84d50969496289 | [] | no_license | pieangel/SMTrader | 4cb54f5c255a12dd5461f70de47900ef4aaccb41 | 979185eca71575c722d04d66113e51e5dfd21c1c | refs/heads/master | 2020-04-20T04:34:43.009971 | 2020-02-06T01:29:44 | 2020-02-06T01:29:44 | 168,631,995 | 1 | 2 | null | null | null | null | UTF-8 | C++ | false | false | 338 | h | #pragma once
#include "Global/TemplateSingleton.h"
#include <string>
#include <map>
#include <vector>
#include <set>
#include "SmRunInfo.h"
#include "Xml/pugixml.hpp"
class SmMarket;
class SmProduct;
class VtSymbol;
class VtMarketManager : public TemplateSingleton<VtMarketManager>
{
public:
VtMarketManager();
~VtMarketManager();
};
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f1c48aa5a38efd0fc664e8f1a17853cecf94c743 | 1b5dec0bd2eb8c7b5f1bbc6cc898a3f994e1360f | /ImageProcessor-QT-master-Desktop-version/main.cpp | e65142c0803ca464ad768a338135e41183faf14c | [] | no_license | yahia-elshahawy/Image-Processor | d937c692f9c045cd781beb24732aea642142c62c | 45ad6537003d618bc9f91ab2a1cd462c2d017931 | refs/heads/master | 2021-08-24T00:44:38.010115 | 2017-12-07T09:28:09 | 2017-12-07T09:28:09 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 262 | cpp | #include "mainwindow.h"
#include <QApplication>
int main(int argc, char *argv[])
{
QApplication a(argc, argv);
QGuiApplication::setApplicationDisplayName(MainWindow::tr("Photouston"));
MainWindow w;
w.show();
return a.exec();
}
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] | |
5ef1661b899825c1a69a571d61e9d99b6b8d8743 | f9a8447e848f2664d3f7efce70c6c9ea347d69f9 | /url_search/url_searchApp.h | c02aba9b5cd77e2c5d7e9b04245c9196f6cf0db7 | [] | no_license | mmirabent/EmbeddedGui | b27f03ee4f5a92da02f9512bcf496a383adb5121 | 26a385c3e4f056c5b5c5a1e2d3bff5e446a87a85 | refs/heads/master | 2020-04-16T01:24:11.232234 | 2016-04-28T17:12:17 | 2016-04-28T17:12:17 | 50,114,474 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 500 | h | /***************************************************************
* Name: url_searchApp.h
* Purpose: Defines Application Class
* Author: Marcos Mirabent ([email protected])
* Created: 2016-04-03
* Copyright: Marcos Mirabent ()
* License:
**************************************************************/
#ifndef URL_SEARCHAPP_H
#define URL_SEARCHAPP_H
#include <wx/app.h>
class url_searchApp : public wxApp
{
public:
virtual bool OnInit();
};
#endif // URL_SEARCHAPP_H
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] | |
a91fbf86558d15d8d707101b90ff9128ff6ab42a | 8e49173f50b662c9959454401e608a8b56617d0e | /_src_/Tools/MuRummySlot_bmd/Main.cpp | 7c5a1bfd09eeee1780cf1fddbfbbe79703a1f224 | [
"MIT"
] | permissive | SanneA/MuClientTools | 5bb9a275340fd02eae9b7bdaf4f4cfe18382d4fa | 6e4445a095ac39e935466ba79d3cc87a84a235a1 | refs/heads/main | 2023-03-17T13:21:53.029220 | 2021-03-11T00:54:48 | 2021-03-11T00:54:48 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,207 | cpp | // This file contains the 'main' function. Program execution begins and ends there.
// Requirement: C++17
#include "Core.h"
#include "MuRummyBmd.h"
int main(int argc, char** argv)
{
MuRummySlotBmd opener;
const char* szInputPath = "murummyslot.bmd";
const char* szOutputPath = nullptr;
if (argc >= 2)
szInputPath = argv[1];
if (argc >= 3)
szOutputPath = argv[2];
if (!szInputPath)
{
cout << "\t Drag&Drop the '.bmd' / '.txt' file \n";
cout << "\t or use console command to execute with the file path. \n";
return EXIT_FAILURE;
}
if (!fs::exists(szInputPath))
{
cout << "Error: Input file does not exist.\n" << endl;
return EXIT_FAILURE;
}
if (fs::is_regular_file(szInputPath))
{
auto ext = fs::path(szInputPath).extension();
if (ext == L".bmd")
{
if (!opener.Unpack(szInputPath, szOutputPath))
{
return EXIT_FAILURE;
}
}
else if (ext == L".txt")
{
if (!opener.Pack(szInputPath, szOutputPath))
{
return EXIT_FAILURE;
}
}
else
{
cout << "Error: File ext is not '.bmd' / '.txt' \n" << endl;
return EXIT_FAILURE;
}
}
else
{
cout << "Error: Invalid file path.\n" << endl;
return EXIT_FAILURE;
}
return EXIT_SUCCESS;
} | [
"[email protected]"
] | |
5890e549c3e8119a45693c5a55cf7e6ca97b536c | 26ab914dcb23420593acd25ee01f9ec67a0e8205 | /src/qt/intro.cpp | aea63c60819903e03e8275cc88d4226be33b3bf5 | [
"MIT"
] | permissive | dwikrisdiyanto08/gentlemencoin | fdf83cfdcfd3a0b3052ea4281097cab6597e41be | 8bbe8c432e6d7aaf203ab8eb9844ed52bf00bfb6 | refs/heads/master | 2020-03-21T13:43:37.726905 | 2018-06-14T09:41:08 | 2018-06-14T09:41:08 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 8,931 | cpp | // Copyright (c) 2011-2014 The Bitcoin developers
// Copyright (c) 2014-2015 The Dash developers
// Copyright (c) 2015-2017 The PIVX developers
// Distributed under the MIT/X11 software license, see the accompanying
// file COPYING or http://www.opensource.org/licenses/mit-license.php.
#include "intro.h"
#include "ui_intro.h"
#include "guiutil.h"
#include "util.h"
#include <boost/filesystem.hpp>
#include <QFileDialog>
#include <QMessageBox>
#include <QSettings>
/* Minimum free space (in bytes) needed for data directory */
static const uint64_t GB_BYTES = 1000000000LL;
static const uint64_t BLOCK_CHAIN_SIZE = 1LL * GB_BYTES;
/* Check free space asynchronously to prevent hanging the UI thread.
Up to one request to check a path is in flight to this thread; when the check()
function runs, the current path is requested from the associated Intro object.
The reply is sent back through a signal.
This ensures that no queue of checking requests is built up while the user is
still entering the path, and that always the most recently entered path is checked as
soon as the thread becomes available.
*/
class FreespaceChecker : public QObject
{
Q_OBJECT
public:
FreespaceChecker(Intro* intro);
enum Status {
ST_OK,
ST_ERROR
};
public slots:
void check();
signals:
void reply(int status, const QString& message, quint64 available);
private:
Intro* intro;
};
#include "intro.moc"
FreespaceChecker::FreespaceChecker(Intro* intro)
{
this->intro = intro;
}
void FreespaceChecker::check()
{
namespace fs = boost::filesystem;
QString dataDirStr = intro->getPathToCheck();
fs::path dataDir = GUIUtil::qstringToBoostPath(dataDirStr);
uint64_t freeBytesAvailable = 0;
int replyStatus = ST_OK;
QString replyMessage = tr("A new data directory will be created.");
/* Find first parent that exists, so that fs::space does not fail */
fs::path parentDir = dataDir;
fs::path parentDirOld = fs::path();
while (parentDir.has_parent_path() && !fs::exists(parentDir)) {
parentDir = parentDir.parent_path();
/* Check if we make any progress, break if not to prevent an infinite loop here */
if (parentDirOld == parentDir)
break;
parentDirOld = parentDir;
}
try {
freeBytesAvailable = fs::space(parentDir).available;
if (fs::exists(dataDir)) {
if (fs::is_directory(dataDir)) {
QString separator = "<code>" + QDir::toNativeSeparators("/") + tr("name") + "</code>";
replyStatus = ST_OK;
replyMessage = tr("Directory already exists. Add %1 if you intend to create a new directory here.").arg(separator);
} else {
replyStatus = ST_ERROR;
replyMessage = tr("Path already exists, and is not a directory.");
}
}
} catch (fs::filesystem_error& e) {
/* Parent directory does not exist or is not accessible */
replyStatus = ST_ERROR;
replyMessage = tr("Cannot create data directory here.");
}
emit reply(replyStatus, replyMessage, freeBytesAvailable);
}
Intro::Intro(QWidget* parent) : QDialog(parent),
ui(new Ui::Intro),
thread(0),
signalled(false)
{
ui->setupUi(this);
ui->sizeWarningLabel->setText(ui->sizeWarningLabel->text().arg(BLOCK_CHAIN_SIZE / GB_BYTES));
startThread();
}
Intro::~Intro()
{
delete ui;
/* Ensure thread is finished before it is deleted */
emit stopThread();
thread->wait();
}
QString Intro::getDataDirectory()
{
return ui->dataDirectory->text();
}
void Intro::setDataDirectory(const QString& dataDir)
{
ui->dataDirectory->setText(dataDir);
if (dataDir == getDefaultDataDirectory()) {
ui->dataDirDefault->setChecked(true);
ui->dataDirectory->setEnabled(false);
ui->ellipsisButton->setEnabled(false);
} else {
ui->dataDirCustom->setChecked(true);
ui->dataDirectory->setEnabled(true);
ui->ellipsisButton->setEnabled(true);
}
}
QString Intro::getDefaultDataDirectory()
{
return GUIUtil::boostPathToQString(GetDefaultDataDir());
}
bool Intro::pickDataDirectory()
{
namespace fs = boost::filesystem;
QSettings settings;
/* If data directory provided on command line, no need to look at settings
or show a picking dialog */
if (!GetArg("-datadir", "").empty())
return true;
/* 1) Default data directory for operating system */
QString dataDir = getDefaultDataDirectory();
/* 2) Allow QSettings to override default dir */
dataDir = settings.value("strDataDir", dataDir).toString();
if (!fs::exists(GUIUtil::qstringToBoostPath(dataDir)) || GetBoolArg("-choosedatadir", false)) {
/* If current default data directory does not exist, let the user choose one */
Intro intro;
intro.setDataDirectory(dataDir);
intro.setWindowIcon(QIcon(":icons/bitcoin"));
while (true) {
if (!intro.exec()) {
/* Cancel clicked */
return false;
}
dataDir = intro.getDataDirectory();
try {
TryCreateDirectory(GUIUtil::qstringToBoostPath(dataDir));
break;
} catch (fs::filesystem_error& e) {
QMessageBox::critical(0, tr("Gents Core"),
tr("Error: Specified data directory \"%1\" cannot be created.").arg(dataDir));
/* fall through, back to choosing screen */
}
}
settings.setValue("strDataDir", dataDir);
}
/* Only override -datadir if different from the default, to make it possible to
* override -datadir in the gents.conf file in the default data directory
* (to be consistent with gentsd behavior)
*/
if (dataDir != getDefaultDataDirectory())
SoftSetArg("-datadir", GUIUtil::qstringToBoostPath(dataDir).string()); // use OS locale for path setting
return true;
}
void Intro::setStatus(int status, const QString& message, quint64 bytesAvailable)
{
switch (status) {
case FreespaceChecker::ST_OK:
ui->errorMessage->setText(message);
ui->errorMessage->setStyleSheet("");
break;
case FreespaceChecker::ST_ERROR:
ui->errorMessage->setText(tr("Error") + ": " + message);
ui->errorMessage->setStyleSheet("QLabel { color: #800000 }");
break;
}
/* Indicate number of bytes available */
if (status == FreespaceChecker::ST_ERROR) {
ui->freeSpace->setText("");
} else {
QString freeString = tr("%1 GB of free space available").arg(bytesAvailable / GB_BYTES);
if (bytesAvailable < BLOCK_CHAIN_SIZE) {
freeString += " " + tr("(of %1 GB needed)").arg(BLOCK_CHAIN_SIZE / GB_BYTES);
ui->freeSpace->setStyleSheet("QLabel { color: #800000 }");
} else {
ui->freeSpace->setStyleSheet("");
}
ui->freeSpace->setText(freeString + ".");
}
/* Don't allow confirm in ERROR state */
ui->buttonBox->button(QDialogButtonBox::Ok)->setEnabled(status != FreespaceChecker::ST_ERROR);
}
void Intro::on_dataDirectory_textChanged(const QString& dataDirStr)
{
/* Disable OK button until check result comes in */
ui->buttonBox->button(QDialogButtonBox::Ok)->setEnabled(false);
checkPath(dataDirStr);
}
void Intro::on_ellipsisButton_clicked()
{
QString dir = QDir::toNativeSeparators(QFileDialog::getExistingDirectory(0, "Choose data directory", ui->dataDirectory->text()));
if (!dir.isEmpty())
ui->dataDirectory->setText(dir);
}
void Intro::on_dataDirDefault_clicked()
{
setDataDirectory(getDefaultDataDirectory());
}
void Intro::on_dataDirCustom_clicked()
{
ui->dataDirectory->setEnabled(true);
ui->ellipsisButton->setEnabled(true);
}
void Intro::startThread()
{
thread = new QThread(this);
FreespaceChecker* executor = new FreespaceChecker(this);
executor->moveToThread(thread);
connect(executor, SIGNAL(reply(int, QString, quint64)), this, SLOT(setStatus(int, QString, quint64)));
connect(this, SIGNAL(requestCheck()), executor, SLOT(check()));
/* make sure executor object is deleted in its own thread */
connect(this, SIGNAL(stopThread()), executor, SLOT(deleteLater()));
connect(this, SIGNAL(stopThread()), thread, SLOT(quit()));
thread->start();
}
void Intro::checkPath(const QString& dataDir)
{
mutex.lock();
pathToCheck = dataDir;
if (!signalled) {
signalled = true;
emit requestCheck();
}
mutex.unlock();
}
QString Intro::getPathToCheck()
{
QString retval;
mutex.lock();
retval = pathToCheck;
signalled = false; /* new request can be queued now */
mutex.unlock();
return retval;
}
| [
"[email protected]"
] | |
4d93c13bf8edb252bc41b8718fb3e20c094fbe2e | 31409d5f37f50e41b20ecab1f9d1c5355e8b43f5 | /ComputerGraphics-COMP175/Camera/Camera.cpp | 1ba333cf774e7c32f3731ffae439e5524500a659 | [] | no_license | HoltSpalding/OpenGL-WebGL | 8b7283e1a59422a6158a43ecaefb5eac928431e5 | d4df6f796c0b51a57667f03a1e1eabe42fa68a6c | refs/heads/master | 2021-06-16T18:53:49.304026 | 2021-02-08T16:30:06 | 2021-02-08T16:30:06 | 159,705,653 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 3,450 | cpp | #include "Camera.h"
#include <GL/glui.h>
Camera::Camera() {
}
Camera::~Camera() {
}
void Camera::Orient(Point& eye, Point& focus, Vector& up) {
eyePt = eye;
lookVec = focus - eye; //vector from eyepoint to focus point
upVec = up;
}
void Camera::Orient(Point& eye, Vector& look, Vector& up) {
eyePt = eye;
lookVec = look;
upVec = up;
}
Matrix Camera::GetProjectionMatrix() {
double c = -near/far;
double theta_h = DEG_TO_RAD(viewAng);
double theta_w = 2*atan(tan(theta_h/2) * GetScreenWidthRatio());
Matrix unhingingMat = Matrix(1, 0, 0, 0, 0, 1, 0, 0, 0, 0, -1.0/(c+1.0), c/(c+1.0), 0, 0, -1, 0);
Matrix scalingMat = Matrix((1.0 / (tan(theta_w/2.0) * far)), 0, 0, 0, 0, (1.0 / (tan(theta_h/2.0) * far)), 0, 0, 0, 0, 1.0/(far), 0, 0, 0, 0, 1);
return unhingingMat * scalingMat;
}
void Camera::SetViewAngle (double viewAngle) {
viewAng = viewAngle;
}
void Camera::SetNearPlane (double nearPlane) {
near = nearPlane;
}
void Camera::SetFarPlane (double farPlane) {
far = farPlane;
}
void Camera::SetScreenSize (int screenWidth, int screenHeight) {
ekranWidth = screenWidth;
ekranHeight = screenHeight;
}
Matrix Camera::GetModelViewMatrix() {
Vector w = -lookVec/length(lookVec);
Vector u = cross(upVec,w)/length(cross(upVec, w));
Vector v = cross(w,u);
Matrix rotationMat = Matrix(u[0], u[1], u[2], 0, v[0], v[1], v[2], 0, w[0], w[1], w[2], 0, 0, 0, 0, 1);
Matrix transformationMat = Matrix(1, 0, 0, -eyePt[0], 0, 1, 0, -eyePt[1], 0, 0, 1, -eyePt[2], 0, 0, 0, 1);
return rotationMat * transformationMat;
}
void Camera::RotateV(double angle) {
Vector w = -lookVec/length(lookVec);
Vector u = cross(upVec,w)/length(cross(upVec, w));
Vector v = cross(w,u);
Matrix rotMat = rot_mat(v, DEG_TO_RAD(angle));
lookVec = rotMat * lookVec;
upVec = rotMat * upVec;
}
void Camera::RotateU(double angle) {
Vector w = -lookVec/length(lookVec);
Vector u = cross(upVec,w)/length(cross(upVec, w));
Matrix rotMat = rot_mat(u, DEG_TO_RAD(angle));
lookVec = rotMat * lookVec;
upVec = rotMat * upVec;
}
void Camera::RotateW(double angle) {
Vector w = -lookVec/length(lookVec);
Matrix rotMat = rot_mat(w, DEG_TO_RAD(angle));
lookVec = rotMat * lookVec;
upVec = rotMat * upVec;
}
void Camera::Translate(const Vector &v) {
Matrix transformationMat = Matrix(1, 0, 0, v[0], 0, 1, 0, v[1], 0, 0, 1, v[2], 0, 0, 0, 1);
eyePt = transformationMat * eyePt;
}
void Camera::Rotate(Point p, Vector axis, double degrees) {
double yangle = atan(axis[2] / axis[0]);
double phi = acos(axis[1] / sqrt(length(axis)));
Matrix M1 = rotY_mat(yangle);
Matrix M1I = rotY_mat(-yangle);
Matrix M2 = rotZ_mat(-phi - PI / 2);
Matrix M2I = rotZ_mat(phi - PI / 2);
Matrix M3 = rotX_mat(DEG_TO_RAD(degrees));
p = M1I *M2I*M3*M2*M1 * p;
}
Point Camera::GetEyePoint() {
return eyePt;
}
Vector Camera::GetLookVector() {
return lookVec;
}
Vector Camera::GetUpVector() {
return upVec;
}
double Camera::GetViewAngle() {
return viewAng;
}
double Camera::GetNearPlane() {
return near;
}
double Camera::GetFarPlane() {
return far;
}
int Camera::GetScreenWidth() {
return ekranWidth;
}
int Camera::GetScreenHeight() {
return ekranHeight;
}
double Camera::GetFilmPlaneDepth() {
return filmPlaneDepth;
}
double Camera::GetScreenWidthRatio() {
return (float)ekranWidth/(float)ekranHeight;
}
| [
"[email protected]"
] | |
59d7c99daa2b3ebcd9423a58f389cac5abacdca6 | 3514081d4ea65a000c5a7c2e94c1fb3bd57f7dcf | /GAME1007_SDLTemplate/Collectible.cpp | 226fddc1fc2f06aef519abbbb4d3a2bd2371059e | [] | no_license | ThuningStars/gameProduction | 1f6243a519a6bda97746e4baab4fd8d3ba96cd4a | 79c1f9729a4afc3efbe3769e0687d4b1a6a4a0e8 | refs/heads/main | 2023-04-05T16:00:26.720070 | 2021-04-18T19:58:16 | 2021-04-18T19:58:16 | 346,183,382 | 0 | 1 | null | 2021-04-18T19:53:00 | 2021-03-10T00:27:32 | C | UTF-8 | C++ | false | false | 677 | cpp | #include "Collectible.h"
Collectible::Collectible(SDL_Renderer* r, SDL_Texture* t, SDL_Rect src, SDL_Rect dest) :m_renderer(r),
m_texture(t), m_dest(dest), m_src(src), m_isCollected(false),m_blend(245),m_blendSpeed(5)
{
}
Collectible::~Collectible()
{
}
void Collectible::Render()
{
SDL_SetTextureAlphaMod(m_texture, m_blend);
if(!IsCollected())
SDL_RenderCopy(m_renderer, m_texture, &m_src, &m_dest);
}
void Collectible::Update()
{
if (m_blend <= 10 || m_blend >= 245)
m_blendSpeed = -m_blendSpeed;
m_blend += m_blendSpeed;
//m_dest.x += 5;
}
void Collectible::setIsCollected(bool state)
{
m_isCollected = state;
}
| [
"[email protected]"
] | |
2db9416deb98576904cada845fd4d37fff5db5da | 3b9b4049a8e7d38b49e07bb752780b2f1d792851 | /src/tools/gn/ninja_build_writer_unittest.cc | 955eb1c110ea0df331d40a789fee1b0eafe7d21c | [
"LGPL-2.0-or-later",
"MIT",
"GPL-2.0-only",
"Apache-2.0",
"LicenseRef-scancode-unknown",
"BSD-3-Clause",
"LicenseRef-scancode-unknown-license-reference"
] | permissive | webosce/chromium53 | f8e745e91363586aee9620c609aacf15b3261540 | 9171447efcf0bb393d41d1dc877c7c13c46d8e38 | refs/heads/webosce | 2020-03-26T23:08:14.416858 | 2018-08-23T08:35:17 | 2018-09-20T14:25:18 | 145,513,343 | 0 | 2 | Apache-2.0 | 2019-08-21T22:44:55 | 2018-08-21T05:52:31 | null | UTF-8 | C++ | false | false | 5,024 | cc | // Copyright 2016 The Chromium Authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
#include <sstream>
#include "testing/gtest/include/gtest/gtest.h"
#include "tools/gn/ninja_build_writer.h"
#include "tools/gn/pool.h"
#include "tools/gn/scheduler.h"
#include "tools/gn/target.h"
#include "tools/gn/test_with_scope.h"
TEST(NinjaBuildWriter, TwoTargets) {
Scheduler scheduler;
TestWithScope setup;
Err err;
Target target_foo(setup.settings(), Label(SourceDir("//foo/"), "bar"));
target_foo.set_output_type(Target::ACTION);
target_foo.action_values().set_script(SourceFile("//foo/script.py"));
target_foo.action_values().outputs() = SubstitutionList::MakeForTest(
"//out/Debug/out1.out", "//out/Debug/out2.out");
target_foo.SetToolchain(setup.toolchain());
ASSERT_TRUE(target_foo.OnResolved(&err));
Target target_bar(setup.settings(), Label(SourceDir("//bar/"), "bar"));
target_bar.set_output_type(Target::ACTION);
target_bar.action_values().set_script(SourceFile("//bar/script.py"));
target_bar.action_values().outputs() = SubstitutionList::MakeForTest(
"//out/Debug/out3.out", "//out/Debug/out4.out");
target_bar.SetToolchain(setup.toolchain());
ASSERT_TRUE(target_bar.OnResolved(&err));
Pool swiming_pool(setup.settings(),
Label(SourceDir("//swiming/"), "pool",
SourceDir("//other/"), "toolchain"));
swiming_pool.set_depth(42);
std::ostringstream ninja_out;
std::ostringstream depfile_out;
std::vector<const Settings*> all_settings = {setup.settings()};
std::vector<const Target*> targets = {&target_foo, &target_bar};
std::vector<const Pool*> all_pools = {&swiming_pool};
NinjaBuildWriter writer(setup.build_settings(), all_settings,
setup.toolchain(), targets, all_pools, ninja_out,
depfile_out);
ASSERT_TRUE(writer.Run(&err));
const char expected_rule_gn[] = "rule gn\n";
const char expected_build_ninja[] =
"build build.ninja: gn\n"
" generator = 1\n"
" depfile = build.ninja.d\n"
"\n";
const char expected_link_pool[] =
"pool link_pool\n"
" depth = 0\n"
"\n"
"pool other_toolchain_swiming_pool\n"
" depth = 42\n"
"\n";
const char expected_toolchain[] =
"subninja toolchain.ninja\n"
"\n";
const char expected_targets[] =
"build bar: phony obj/bar/bar.stamp\n"
"build foo$:bar: phony obj/foo/bar.stamp\n"
"build bar$:bar: phony obj/bar/bar.stamp\n"
"\n";
const char expected_root_target[] =
"build all: phony $\n"
" obj/foo/bar.stamp $\n"
" obj/bar/bar.stamp\n"
"\n"
"default all\n";
std::string out_str = ninja_out.str();
#define EXPECT_SNIPPET(expected) \
EXPECT_NE(std::string::npos, out_str.find(expected)) << \
"Expected to find: " << expected << std::endl << \
"Within: " << out_str
EXPECT_SNIPPET(expected_rule_gn);
EXPECT_SNIPPET(expected_build_ninja);
EXPECT_SNIPPET(expected_link_pool);
EXPECT_SNIPPET(expected_toolchain);
EXPECT_SNIPPET(expected_targets);
EXPECT_SNIPPET(expected_root_target);
#undef EXPECT_SNIPPET
}
TEST(NinjaBuildWriter, DuplicateOutputs) {
Scheduler scheduler;
TestWithScope setup;
Err err;
Target target_foo(setup.settings(), Label(SourceDir("//foo/"), "bar"));
target_foo.set_output_type(Target::ACTION);
target_foo.action_values().set_script(SourceFile("//foo/script.py"));
target_foo.action_values().outputs() = SubstitutionList::MakeForTest(
"//out/Debug/out1.out", "//out/Debug/out2.out");
target_foo.SetToolchain(setup.toolchain());
ASSERT_TRUE(target_foo.OnResolved(&err));
Target target_bar(setup.settings(), Label(SourceDir("//bar/"), "bar"));
target_bar.set_output_type(Target::ACTION);
target_bar.action_values().set_script(SourceFile("//bar/script.py"));
target_bar.action_values().outputs() = SubstitutionList::MakeForTest(
"//out/Debug/out3.out", "//out/Debug/out2.out");
target_bar.SetToolchain(setup.toolchain());
ASSERT_TRUE(target_bar.OnResolved(&err));
std::ostringstream ninja_out;
std::ostringstream depfile_out;
std::vector<const Settings*> all_settings = { setup.settings() };
std::vector<const Target*> targets = { &target_foo, &target_bar };
std::vector<const Pool*> all_pools;
NinjaBuildWriter writer(setup.build_settings(), all_settings,
setup.toolchain(), targets, all_pools, ninja_out,
depfile_out);
ASSERT_FALSE(writer.Run(&err));
const char expected_help_test[] =
"Two or more targets generate the same output:\n"
" out2.out\n"
"\n"
"This is can often be fixed by changing one of the target names, or by \n"
"setting an output_name on one of them.\n"
"\n"
"Collisions:\n"
" //foo:bar\n"
" //bar:bar\n";
EXPECT_EQ(expected_help_test, err.help_text());
}
| [
"[email protected]"
] | |
e3d2300d970450e6cee99eb0d6945feb43adf6d4 | e746ecb4123f9b13010246b8e20c32653a1c6d68 | /src/bvh.h | f8e8b8ceab50a5b771ab4ed543befcf8a6c24148 | [] | no_license | chenyxuan/mRTE | f0195b1b2fe99267e28a5700686bd72fdb7e2c80 | c8ff5f77adc6fff33188c8df3c7183203e4a7a5e | refs/heads/master | 2022-05-23T16:24:14.213629 | 2020-04-26T12:46:30 | 2020-04-26T12:46:30 | 258,800,550 | 1 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 2,233 | h | #ifndef BVH_H
#define BVH_H
#include <cstdio>
#include <algorithm>
#include <cassert>
#include "aabb.h"
#include "ray.h"
#include "hitablelist.h"
class bvh_node : public hitable {
public:
hitable_list list;
bool is_leaf;
bvh_node *left;
bvh_node *right;
aabb box;
bvh_node() {}
bvh_node(hitable_list &list);
virtual bool hit(const ray &r,float tmin,float tmax,hit_record &rec) const;
virtual bool bounding_box(float t0,float t1,aabb &output_box) const;
};
bool bvh_node::bounding_box(float t0,float t1,aabb &output_box) const {
output_box = box;
return true;
}
bool bvh_node::hit(const ray &r,float tmin,float tmax,hit_record &rec) const {
if(!box.hit(r, tmin, tmax)) return false;
if(is_leaf) {
return list.hit(r, tmin, tmax, rec);
} else {
bool hit_left = left->hit(r, tmin, tmax, rec);
bool hit_right = right->hit(r, tmin, hit_left ? rec.t : tmax, rec);
return hit_left || hit_right;
}
}
inline bool box_compare(const hitable *a,const hitable *b,int axis) {
static aabb box_a, box_b;
if(!a->bounding_box(0, 0, box_a) || !b->bounding_box(0, 0, box_b)) {
fprintf(stderr, "No bounding box in bvh_node constructor.\n");
}
return box_a.max().e[axis] < box_b.max().e[axis];
}
inline bool box_x_compare(const hitable *a,const hitable *b) {
return box_compare(a, b, 0);
}
inline bool box_y_compare(const hitable *a,const hitable *b) {
return box_compare(a, b, 1);
}
inline bool box_z_compare(const hitable *a,const hitable *b) {
return box_compare(a, b, 2);
}
static bool (*comparator_array[3])(const hitable *,const hitable *) = {box_x_compare, box_y_compare, box_z_compare};
bvh_node::bvh_node(hitable_list &list) : list(list) {
bool (*comparator)(const hitable *,const hitable *) = comparator_array[1];
if(list.list_size <= 300) {
is_leaf = true;
left = right = NULL;
assert(list.bounding_box(0, 0, box));
} else {
is_leaf = false;
std::sort(list.list, list.list + list.list_size, comparator);
int mid = list.list_size / 2;
hitable_list left_list(list.list, mid);
hitable_list right_list(list.list + mid, list.list_size - mid);
left = new bvh_node(left_list);
right = new bvh_node(right_list);
box = surrounding_box(left->box, right->box);
}
}
#endif
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] | |
7bc85ec0fe06b2ed5b717220996678f7f49bedfc | 117b4a10422aa664d0e781922e45e6ebc78b18e0 | /cpp/11279.cpp | 13ac039a24b1e99df7c23f7f24264d278b0a2728 | [] | no_license | shinjeongmin/Baekzoon-Online-judge | ba0284a6b78aeac7a32ce73e5895c22785574440 | cb5720bb317b7ea562abe2a9a9c699baf667b56b | refs/heads/master | 2023-02-23T13:54:36.514698 | 2023-02-08T10:36:00 | 2023-02-08T10:36:00 | 245,940,366 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 498 | cpp | #include<iostream>
#include<vector>
#include<deque>
#include<queue>
#include <algorithm>
using namespace std;
int main() {
ios_base::sync_with_stdio;
cin.tie(0);
cout.tie(0);
priority_queue<int, vector<int>, less<int>> Max_heap;
int N;
cin >> N;
for (int i = 0; i < N; i++)
{
int x;
cin >> x;
if (x == 0)
{
if (Max_heap.empty())
{
cout << "0\n";
}
else
{
cout << Max_heap.top() << "\n";
Max_heap.pop();
}
}
else
{
Max_heap.push(x);
}
}
} | [
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] | |
4081ebcd1e9c1bb394fe0d88a7d159a30d808dda | a7b670687a192cffcc9355691549478ff22d1fa3 | /frc-cpp-sim/crio/fpga/src/tSystemInterface.cpp | b8957d294fa6d9b7a3f869554e31457eecabee92 | [] | no_license | anidev/frc-simulator | f226d9af0bcb4fc25f33ad3a28dceb0fbadac109 | 3c60daa84acbabdcde5aa9de6935e1950b48e4c3 | refs/heads/master | 2020-12-24T17:35:21.255684 | 2014-02-04T04:45:21 | 2014-02-04T04:45:21 | 7,597,042 | 0 | 1 | null | null | null | null | UTF-8 | C++ | false | false | 1,726 | cpp | /*----------------------------------------------------------------------------*/
/* Copyright (c) Anirudh B. (anidev) 2012. All Rights Reserved. */
/* Open Source Software - may be modified and shared by FRC teams. The code */
/* must be accompanied by the FIRST BSD license file in this directory. */
/*----------------------------------------------------------------------------*/
#include <cstring>
#include "fpga.h"
#include "interfaces/NiRio.h"
#include "interfaces/tSystemInterface.h"
class tSystemInterface_impl:public nFPGA::tSystemInterface {
public:
const uint16_t getExpectedFPGAVersion();
const uint32_t getExpectedFPGARevision();
const uint32_t* const getExpectedFPGASignature();
void getHardwareFpgaSignature(uint32_t*,tRioStatusCode*);
uint32_t getLVHandle(tRioStatusCode*);
uint32_t getHandle();
};
const uint16_t tSystemInterface_impl::getExpectedFPGAVersion() {
return FPGA_VERSION;
}
const uint32_t tSystemInterface_impl::getExpectedFPGARevision() {
return FPGA_REVISION;
}
const uint32_t* const tSystemInterface_impl::getExpectedFPGASignature() {
return FPGA_SIGNATURE;
}
void tSystemInterface_impl::getHardwareFpgaSignature(uint32_t* guid_ptr,tRioStatusCode* status) {
std::memcpy(guid_ptr,FPGA_SIGNATURE,sizeof(uint32_t)*FPGA_SIGNATURE_LEN);
}
uint32_t tSystemInterface_impl::getLVHandle(tRioStatusCode* status) {
return 0; // no idea what this is for; not used anywhere
}
uint32_t tSystemInterface_impl::getHandle() {
return 0; // no idea what this is for; not used anywhere
}
nFPGA::tSystemInterface* get_system_interface() {
static nFPGA::tSystemInterface* instance=NULL;
if(instance==NULL) {
instance=new tSystemInterface_impl();
}
return instance;
}
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] | |
7dc3757c7991a873d4b62fc7edf9c3803c922bbf | 03211386b21ce1abbb2b1d3369df344cdd2a8d14 | /Graph Algorithms/DFS/Connected Components and Flood Fill/003 UVA - 352 The Seasonal War.cpp | e0a3010839c2172f80583b9b4ef1a7f1609720ea | [] | no_license | bony2023/Competitive-Programming | a9e616957986ea09e6694ce3635eefd3e843a0d0 | d33d919658327048bfdef702efd7cb5eab013c33 | refs/heads/master | 2021-03-12T19:21:18.758167 | 2015-04-19T19:26:29 | 2015-04-19T19:26:29 | 22,675,345 | 1 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 2,192 | cpp | // Author : Bony Roopchandani
// 352 - The Seasonal War
// Connected Components/Flood Fill
#include<iostream>
#include<cstdlib>
#include<cstdio>
#include<cstring>
#include<cmath>
#include<map>
#include<list>
#include<set>
#include<vector>
#include<queue>
#include<stack>
#include<string>
#include<algorithm>
using namespace std;
#define pb push_back
#define sz size()
#define mp make_pair
#define ff first
#define ss second
#define bg begin()
#define en end()
#define rep(i, n) for(int i=0; i<n; i++)
#define repi(i, n) for(int i=0; i<=n; i++)
#define rept(i, a, b) for(int i=a; i<=b; i++)
#define repd(i, a, b) for(int i=a; i>=b; i--)
#define ll long long
#define repl(i, n) for(ll i=0; i<n; i++)
#define repli(i, n) for(ll i=0; i<=n; i++)
#define pfi(a) printf("%d\n",a)
#define sfi(a) scanf("%d",&a)
#define pfl(a) printf("%lld\n",(ll)a)
#define sfl(a) scanf("%lld",&a)
#define sfs(a) scanf("%s",a)
#define pfs(a) printf("%s\n",a)
#define pf(a) printf("%d ",a)
#define nl printf("\n")
#define INF 9999999
#define CHUNK_SIZE 65536
#define MOD 1000000007
typedef vector<int> VI;
typedef vector<ll> VLL;
typedef pair<int, int> PII;
typedef pair<int, ll> PIL;
typedef pair<ll, int> PLI;
typedef pair<int, PII>PIII;
typedef pair<int, PIII> PIIII;
typedef map<int, int> MII;
typedef map<ll, int> MLI;
typedef map<int, ll> MIL;
typedef list<int> LI;
typedef list<ll> LLL;
typedef set<int> SI;
typedef set<ll> SLL;
bool vis[26][26]={{0}};
int N;
char foo[26][26];
short dx[]={1, 0, -1, -1, -1, 0, 1, 1};
short dy[]={-1, -1, -1, 0, 1, 1, 1, 0};
bool valid(int i, int j)
{
return ((i>=0 && i<N) && (j>=0 && j<N));
}
void dfs(int i, int j)
{
vis[i][j]=1;
rep(x, 8)
{
int a=i+dx[x];
int b=j+dy[x];
if(!vis[a][b] && foo[a][b]=='1' && valid(a,b))
dfs(a, b);
}
}
int main(void)
{
int cs=1;
// freopen("Bumble.in", "r", stdin);
// freopen("Bumble.out", "w", stdout);
while(sfi(N)!=EOF)
{
rep(i, N)
sfs(foo[i]);
int P=0;
rep(i, N)
{
rep(j, N)
if(!vis[i][j] && foo[i][j]=='1')
P++, dfs(i, j);
}
printf("Image number %d contains %d war eagles.\n",cs++, P);
memset(vis, false, sizeof vis);
memset(foo, '\0', sizeof foo);
}
return 0;
} | [
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] | |
d61344beb4c6e6cebead0d179781f8cb22796f57 | e69392ba8ee7ad42517f81711499f6c99c51691f | /WiFiWebServer/WiFiWebServer.ino | 153957a332ca332480d56d8916afad49133d2d51 | [] | no_license | sendy452/Arduino | 123f32ae220cf1bfdf078cb163d5b5d351891785 | 436cca468aeeb9327f3981b2c4d1c752d6df4627 | refs/heads/master | 2023-08-31T07:07:12.552307 | 2023-08-26T16:36:00 | 2023-08-26T16:36:00 | 359,463,063 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 2,640 | ino | /*
* This sketch demonstrates how to set up a simple HTTP-like server.
* The server will set a GPIO pin depending on the request
* http://server_ip/gpio/0 will set the GPIO2 low,
* http://server_ip/gpio/1 will set the GPIO2 high
* server_ip is the IP address of the ESP8266 module, will be
* printed to Serial when the module is connected.
*/
#include <ESP8266WiFi.h>
#include <WiFiClient.h>
#include <ESP8266WebServer.h>
#include <ESP8266mDNS.h>
//isi sesuai ssidmu atau nama theathering wifi hotspotmu juga bisa
const char* ssid = "Bismillah";
const char* password = "mbohlaliaku";
// Create an instance of the server
// specify the port to listen on as an argument
WiFiServer server(80);
IPAddress ip(192, 168, 0, 107); // where xx is the desired IP Address
IPAddress gateway(192, 168, 0, 1); // set gateway to match your network
IPAddress subnet(255, 255, 255, 0); // set subnet mask to match your network
void setup() {
WiFi.config(ip, gateway, subnet);
Serial.begin(115200);
delay(10);
// prepare GPIO2
pinMode(2, OUTPUT);
digitalWrite(2, 0);
// Connect to WiFi network
Serial.println();
Serial.println();
Serial.print("Connecting to ");
Serial.println(ssid);
WiFi.begin(ssid, password);
while (WiFi.status() != WL_CONNECTED) {
delay(500);
Serial.print(".");
}
Serial.println("");
Serial.println("WiFi connected");
// Start the server
server.begin();
Serial.println("Server started");
// Print the IP address
Serial.println(WiFi.localIP());
}
void loop() {
// Check if a client has connected
WiFiClient client = server.available();
if (!client) {
return;
}
// Wait until the client sends some data
Serial.println("new client");
while(!client.available()){
delay(1);
}
// Read the first line of the request
String req = client.readStringUntil('\r');
Serial.println(req);
client.flush();
// Match the request
int val;
if (req.indexOf("/gpio/0") != -1)
val = 1;
else if (req.indexOf("/gpio/1") != -1)
val = 0;
else {
Serial.println("invalid request");
client.stop();
return;
}
// Set GPIO2 according to the request
digitalWrite(2, val);
client.flush();
// Prepare the response
String s = "HTTP/1.1 200 OK\r\nContent-Type: text/html\r\n\r\n<!DOCTYPE HTML>\r\n<html>\r\nGPIO is now ";
s += (val)?"high":"low";
s += "</html>\n";
// Send the response to the client
client.print(s);
delay(1);
Serial.println("Client disonnected");
// The client will actually be disconnected
// when the function returns and 'client' object is detroyed
}
| [
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] | |
b36ff99ecbaf10ceea7997863d912c172dfb3132 | a5a99f646e371b45974a6fb6ccc06b0a674818f2 | /CondCore/CTPPSPlugins/test/testPPSTimingCalibration.cpp | 9db167a2852d277cdad112b29ef6dd062cc29f6e | [
"Apache-2.0"
] | permissive | cms-sw/cmssw | 4ecd2c1105d59c66d385551230542c6615b9ab58 | 19c178740257eb48367778593da55dcad08b7a4f | refs/heads/master | 2023-08-23T21:57:42.491143 | 2023-08-22T20:22:40 | 2023-08-22T20:22:40 | 10,969,551 | 1,006 | 3,696 | Apache-2.0 | 2023-09-14T19:14:28 | 2013-06-26T14:09:07 | C++ | UTF-8 | C++ | false | false | 1,727 | cpp | #include <iostream>
#include <sstream>
#include "CondCore/Utilities/interface/PayloadInspector.h"
#include "FWCore/MessageLogger/interface/MessageLogger.h"
#include "FWCore/PluginManager/interface/PluginManager.h"
#include "FWCore/PluginManager/interface/standard.h"
#include "FWCore/PluginManager/interface/SharedLibrary.h"
#include "FWCore/ServiceRegistry/interface/ServiceRegistry.h"
#include "CondFormats/PPSObjects/interface/PPSTimingCalibration.h"
#include "CondCore/CTPPSPlugins/interface/PPSTimingCalibrationPayloadInspectorHelper.h"
int main(int argc, char** argv) {
Py_Initialize();
edmplugin::PluginManager::Config config;
edmplugin::PluginManager::configure(edmplugin::standard::config());
std::vector<edm::ParameterSet> psets;
edm::ParameterSet pSet;
pSet.addParameter("@service_type", std::string("SiteLocalConfigService"));
psets.push_back(pSet);
edm::ServiceToken servToken(edm::ServiceRegistry::createSet(psets));
edm::ServiceRegistry::Operate operate(servToken);
std::string connectionString("frontier://FrontierProd/CMS_CONDITIONS");
std::string tag = "CTPPPSTimingCalibration_HPTDC_byPCL_v0_prompt";
cond::Time_t start = static_cast<unsigned long long>(355892);
cond::Time_t end = static_cast<unsigned long long>(357079);
edm::LogPrint("testPPSCalibrationPI") << "## Exercising TimingCalibration plots ";
ParametersPerChannel<PPSTimingCalibrationPI::db0,
PPSTimingCalibrationPI::plane0,
PPSTimingCalibrationPI::parameter0,
PPSTimingCalibration>
test;
test.process(connectionString, PI::mk_input(tag, start, end));
edm::LogPrint("testparametersPerChannel") << test.data();
Py_Finalize();
}
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] | |
3bfd113baac0a9c878f87d197983dc2df09c26e4 | 525e8581d7f35d63277563649708f69cd8a0c3b8 | /naudio/src/NodeAudio.cc | 6715f6578c267c3664804e29e05618afaf21cb94 | [] | no_license | eliot-akira/audiom | 55f8d218b3922c76ef0216324f2245e3929d764c | 23397abaecb789fb8b6fd449f3a627383640bc47 | refs/heads/master | 2021-04-05T23:55:17.742839 | 2018-03-29T05:41:55 | 2018-03-29T05:41:55 | 125,117,718 | 2 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,015 | cc | #include <string>
#include <iostream>
#include "LabSound/extended/LabSound.h"
#include "nbind/nbind.h"
using namespace lab;
namespace NodeAudio {
class NodeAudio {
public:
static std::shared_ptr<lab::AudioContext> MakeAudioContext() {
return lab::MakeAudioContext();
}
static std::shared_ptr<lab::AudioHardwareSourceNode> MakeHardwareSourceNode(std::shared_ptr<lab::AudioContext> context) {
std::shared_ptr<AudioHardwareSourceNode> input;
{
ContextGraphLock g(context, "NodeAudio");
ContextRenderLock r(context, "NodeAudio");
input = lab::MakeHardwareSourceNode(r);
}
return input;
}
static void CleanupAudioContext(std::shared_ptr<lab::AudioContext> context) {
return lab::CleanupAudioContext(context);
}
};
NBIND_CLASS(NodeAudio) {
method(MakeAudioContext, "makeAudioContext");
method(MakeHardwareSourceNode, "makeHardwareSourceNode");
method(CleanupAudioContext, "cleanupAudioContext");
};
}
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] | |
d3e704dcd0564242296898befa9dabf5f8c44270 | 36d6eb724d441be96d600a0b13bb9c3b4bb8a30e | /forces_402_a.cpp | f6f954d5a6d19933e98440227fdde88a08208903 | [] | no_license | ysumit99/codeforces_sumit23 | e253fedd97eb2f3ceec6a81419c7b9dd9701ecb0 | 8115a9b5c6a00af6afd131deba261acffb8f21f0 | refs/heads/master | 2021-01-22T20:45:08.170480 | 2017-03-17T21:34:50 | 2017-03-17T21:34:50 | 85,356,048 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 439 | cpp | #include <bits/stdc++.h>
using namespace std;
int main(int argc, char const *argv[])
{
int n,ele;
cin>>n;
int arr[100001]={0};
int count=0;
int max_count=0;
for (int i = 0; i < 2*n; ++i)
{
/* code */
cin>>ele;
if(arr[ele]==0)
{
count++;
arr[ele]=1;
if(count > max_count)
max_count = count;
}
else{
count--;
if(count > max_count)
max_count = count;
}
}
printf("%d\n",max_count);
return 0;
} | [
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] | |
bc42759e42756d9a9a741c2a4ddc561613319d28 | 45a07f3c1ecf21d493f7ecb261751f9cf15a312b | /ScorcherControl/ScorcherControl.ino | 849cbafe65bb955c936f309538be65e8589c8a2f | [] | no_license | aherrero/ArduinoProjects | d18ffdbf15315fc74ade12f1739f6a363592a708 | a0954c25b896848a9fb698e2a1c30bb194f9898b | refs/heads/master | 2016-09-11T03:17:31.785582 | 2013-12-07T18:43:44 | 2013-12-07T18:43:44 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 745 | ino | //Arduino PWM Speed Control：
int pinsentidomotor1=4;
int pinvelmotor1=5;
int pinsentidomotor2=9;
int pinvelmotor2=10;
void setup()
{
pinMode(pinsentidomotor1, OUTPUT);
pinMode(pinsentidomotor2, OUTPUT);
}
void loop()
{
int velavance=100;
int MAXVEL=150;
digitalWrite(pinsentidomotor1,LOW);
digitalWrite(pinsentidomotor2,LOW);
analogWrite(pinvelmotor1, velavance); //PWM Speed Control
analogWrite(pinvelmotor2, velavance); //PWM Speed Control
delay(5000);
digitalWrite(pinsentidomotor1,HIGH);
digitalWrite(pinsentidomotor2,LOW);
analogWrite(pinvelmotor1, velavance); //PWM Speed Control
analogWrite(pinvelmotor2, velavance); //PWM Speed Control
delay(5000);
}
| [
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] | |
4d6681900031b59eb8d407475b320238f027c1a7 | 4ed7dd878a2b34bace1fd91a49106eebe570a360 | /POJ/POJ_3295.cpp | f7f03adc6e1c1c6276c2a17e090906cc5ed4dd65 | [] | no_license | mayukuner/AC | fb63be04a1fcf7f3af080aa50bf7c6e0e070b1b9 | c21b2970b7288d7b36cbed468101446c615e79ff | refs/heads/master | 2020-12-15T02:38:51.758676 | 2017-10-11T13:01:11 | 2017-10-11T13:01:11 | 46,971,415 | 3 | 1 | null | null | null | null | UTF-8 | C++ | false | false | 1,128 | cpp | #include <stdio.h>
char opt[200];
int num[5];
int stage(char t)
{
if(t=='p'||t=='q'||t=='r'||t=='s'||t=='t')return 0;
else if(t=='N')return 1;
else return 2;
}
int val(char t)
{
if(t=='p')return num[0];
else if(t=='q')return num[1];
else if(t=='r')return num[2];
else if(t=='s')return num[3];
else return num[4];
}
int modify(char t,int a,int b)
{
if(t=='K')return a&b;
else if(t=='A')return a|b;
else if(t=='C')return (a<=b);
else return a==b;
}
int search(int p)
{
//printf("%d\n",p);
if(stage(opt[p])==0)
return p*2+val(opt[p]);
else if(stage(opt[p])==1)
return search(p+1)^1;
else
{
int t1=search(p+1);
int t2=search(t1/2+1);
//printf("%d %d %d %d %d\n",p,t1,t2,modify(opt[p],t1%2,t2%2), (t2/2)*2+modify(opt[p],t1%2,t2%2));
return (t2/2)*2+modify(opt[p],t1%2,t2%2);
}
}
int main()
{
//freopen("prob.out","w",stdout);
while(scanf("%s",opt)&&opt[0]!='0')
{
bool ok=true;
for(int i=0; i<(1<<5); i++)
{
for(int j=0; j<5; j++)
num[j]=(i>>j)&1;
if(!(search(0)%2))
{
ok=false;
break;
}
}
if(ok)
printf("tautology\n");
else
printf("not\n");
}
return 0;
}
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] | |
4dcfce2727e745d7c286c97939842cbbca1d7c5b | f0a26ec6b779e86a62deaf3f405b7a83868bc743 | /Engine/Source/Editor/UnrealEd/Private/Factories/CSVImportFactory.cpp | 6be58ee845f846104aed016843284f34c221d64c | [] | no_license | Tigrouzen/UnrealEngine-4 | 0f15a56176439aef787b29d7c80e13bfe5c89237 | f81fe535e53ac69602bb62c5857bcdd6e9a245ed | refs/heads/master | 2021-01-15T13:29:57.883294 | 2014-03-20T15:12:46 | 2014-03-20T15:12:46 | 18,375,899 | 1 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 20,821 | cpp | // Copyright 1998-2014 Epic Games, Inc. All Rights Reserved.
#include "UnrealEd.h"
#include "Mainframe.h"
#include "ModuleManager.h"
#include "DirectoryWatcherModule.h"
#include "../../../DataTableEditor/Public/IDataTableEditor.h"
DEFINE_LOG_CATEGORY(LogCSVImportFactory);
#define LOCTEXT_NAMESPACE "CSVImportFactory"
/** Enum to indicate what to import CSV as */
enum ECSVImportType
{
/** Import as UDataTable */
ECSV_DataTable,
/** Import as UCurveTable */
ECSV_CurveTable,
/** Import as a UCurveFloat */
ECSV_CurveFloat,
/** Import as a UCurveVector */
ECSV_CurveVector,
/** Import as a UCurveLinearColor */
ECSV_CurveLinearColor,
};
/** UI to pick options when importing data table */
class SCSVImportOptions : public SCompoundWidget
{
private:
/** Whether we should go ahead with import */
bool bImport;
/** Window that owns us */
TWeakPtr< SWindow > WidgetWindow;
// Import type
/** List of import types to pick from, drives combo box */
TArray< TSharedPtr<ECSVImportType> > ImportTypes;
/** The combo box */
TSharedPtr< SComboBox< TSharedPtr<ECSVImportType> > > ImportTypeCombo;
/** Indicates what kind of asset we want to make from the CSV file */
ECSVImportType SelectedImportType;
// Row type
/** Array of row struct options */
TArray< UScriptStruct* > RowStructs;
/** The row struct combo box */
TSharedPtr< SComboBox<UScriptStruct*> > RowStructCombo;
/** The selected row struct */
UScriptStruct* SelectedStruct;
/** Typedef for curve enum pointers */
typedef TSharedPtr<ERichCurveInterpMode> CurveInterpModePtr;
/** The curve interpolation combo box */
TSharedPtr< SComboBox<CurveInterpModePtr> > CurveInterpCombo;
/** All available curve interpolation modes */
TArray< CurveInterpModePtr > CurveInterpModes;
/** The selected curve interpolation type */
ERichCurveInterpMode SelectedCurveInterpMode;
public:
SLATE_BEGIN_ARGS( SCSVImportOptions )
: _WidgetWindow()
{}
SLATE_ARGUMENT( TSharedPtr<SWindow>, WidgetWindow )
SLATE_END_ARGS()
SCSVImportOptions()
: bImport(false)
, SelectedImportType(ECSV_DataTable)
, SelectedStruct(NULL)
{}
void Construct( const FArguments& InArgs )
{
WidgetWindow = InArgs._WidgetWindow;
// Make array of enum pointers
TSharedPtr<ECSVImportType> DataTableTypePtr = MakeShareable(new ECSVImportType(ECSV_DataTable));
ImportTypes.Add( DataTableTypePtr );
ImportTypes.Add( MakeShareable(new ECSVImportType(ECSV_CurveTable)) );
ImportTypes.Add( MakeShareable(new ECSVImportType(ECSV_CurveFloat)) );
ImportTypes.Add( MakeShareable(new ECSVImportType(ECSV_CurveVector)) );
// Find table row struct info
UScriptStruct* TableRowStruct = FindObjectChecked<UScriptStruct>(ANY_PACKAGE, TEXT("TableRowBase"));
if(TableRowStruct != NULL)
{
// Make combo of table rowstruct options
for (TObjectIterator<UScriptStruct> It; It; ++It)
{
UScriptStruct* Struct = *It;
// If a child of the table row struct base, but not itself
if (Struct->IsChildOf(TableRowStruct) && Struct != TableRowStruct)
{
RowStructs.Add(Struct);
}
}
}
// Create widget
this->ChildSlot
[
SNew(SBorder)
. BorderImage(FEditorStyle::GetBrush(TEXT("Menu.Background")))
. Padding(10)
[
SNew(SVerticalBox)
// Import type
+SVerticalBox::Slot()
.AutoHeight()
[
SNew(STextBlock)
.Text( LOCTEXT("ChooseAssetType", "Import As:") )
]
+SVerticalBox::Slot()
.AutoHeight()
[
SAssignNew(ImportTypeCombo, SComboBox< TSharedPtr<ECSVImportType> >)
.OptionsSource( &ImportTypes )
.OnGenerateWidget( this, &SCSVImportOptions::MakeImportTypeItemWidget )
[
SNew(STextBlock)
.Text(this, &SCSVImportOptions::GetSelectedItemText)
]
]
// Data row struct
+SVerticalBox::Slot()
.AutoHeight()
[
SNew(STextBlock)
.Text( LOCTEXT("ChooseRowType", "Choose DataTable Row Type:") )
.Visibility( this, &SCSVImportOptions::GetTableRowOptionVis )
]
+SVerticalBox::Slot()
.AutoHeight()
[
SAssignNew(RowStructCombo, SComboBox<UScriptStruct*>)
.OptionsSource( &RowStructs )
.OnGenerateWidget( this, &SCSVImportOptions::MakeRowStructItemWidget )
.Visibility( this, &SCSVImportOptions::GetTableRowOptionVis )
[
SNew(STextBlock)
.Text(this, &SCSVImportOptions::GetSelectedRowOptionText)
]
]
// Curve interpolation
+SVerticalBox::Slot()
.AutoHeight()
[
SNew(STextBlock)
.Text( LOCTEXT("ChooseCurveType", "Choose Curve Interpolation Type:").ToString() )
.Visibility( this, &SCSVImportOptions::GetCurveTypeVis )
]
+SVerticalBox::Slot()
.AutoHeight()
[
SAssignNew(CurveInterpCombo, SComboBox<CurveInterpModePtr>)
.OptionsSource( &CurveInterpModes )
.OnGenerateWidget( this, &SCSVImportOptions::MakeCurveTypeWidget )
.Visibility( this, &SCSVImportOptions::GetCurveTypeVis )
[
SNew(STextBlock)
.Text(this, &SCSVImportOptions::GetSelectedCurveTypeText)
]
]
// Ok/Cancel
+SVerticalBox::Slot()
.AutoHeight()
[
SNew(SHorizontalBox)
+SHorizontalBox::Slot()
.AutoWidth()
[
SNew(SButton)
.Text(LOCTEXT("OK", "OK").ToString())
.OnClicked( this, &SCSVImportOptions::OnImport )
]
+SHorizontalBox::Slot()
.AutoWidth()
[
SNew(SButton)
.Text(LOCTEXT("Cancel", "Cancel").ToString())
.OnClicked( this, &SCSVImportOptions::OnCancel )
]
]
]
];
// set-up selection
ImportTypeCombo->SetSelectedItem(DataTableTypePtr);
// Populate the valid interploation modes
{
CurveInterpModes.Add( MakeShareable( new ERichCurveInterpMode(ERichCurveInterpMode::RCIM_Constant) ) );
CurveInterpModes.Add( MakeShareable( new ERichCurveInterpMode(ERichCurveInterpMode::RCIM_Linear) ) );
CurveInterpModes.Add( MakeShareable( new ERichCurveInterpMode(ERichCurveInterpMode::RCIM_Cubic) ) );
}
// NB: Both combo boxes default to first item in their options lists as initially selected item
}
/** If we should import */
bool ShouldImport()
{
return ((SelectedStruct != NULL) || GetSelectedImportType() != ECSV_DataTable) && bImport;
}
/** Get the row struct we selected */
UScriptStruct* GetSelectedRowStruct()
{
return SelectedStruct;
}
/** Get the import type we selected */
ECSVImportType GetSelectedImportType()
{
return SelectedImportType;
}
/** Get the interpolation mode we selected */
ERichCurveInterpMode GetSelectedCurveIterpMode()
{
return SelectedCurveInterpMode;
}
/** Whether to show table row options */
EVisibility GetTableRowOptionVis() const
{
return (ImportTypeCombo.IsValid() && *ImportTypeCombo->GetSelectedItem() == ECSV_DataTable) ? EVisibility::Visible : EVisibility::Collapsed;
}
/** Whether to show table row options */
EVisibility GetCurveTypeVis() const
{
return (ImportTypeCombo.IsValid() && *ImportTypeCombo->GetSelectedItem() == ECSV_CurveTable) ? EVisibility::Visible : EVisibility::Collapsed;
}
FString GetImportTypeText(TSharedPtr<ECSVImportType> Type ) const
{
FString EnumString;
if(*Type == ECSV_DataTable)
{
EnumString = TEXT("DataTable");
}
else if(*Type == ECSV_CurveTable)
{
EnumString = TEXT("CurveTable");
}
else if(*Type == ECSV_CurveFloat)
{
EnumString = TEXT("Float Curve");
}
else if(*Type == ECSV_CurveVector)
{
EnumString = TEXT("Vector Curve");
}
return EnumString;
}
/** Called to create a widget for each struct */
TSharedRef<SWidget> MakeImportTypeItemWidget( TSharedPtr<ECSVImportType> Type )
{
return SNew(STextBlock)
.Text(GetImportTypeText(Type));
}
/** Called to create a widget for each struct */
TSharedRef<SWidget> MakeRowStructItemWidget( UScriptStruct* Struct )
{
check( Struct != NULL );
return SNew(STextBlock)
.Text(Struct->GetName());
}
FString GetCurveTypeText (CurveInterpModePtr InterpMode) const
{
FString EnumString;
switch(*InterpMode)
{
case ERichCurveInterpMode::RCIM_Constant :
EnumString = TEXT("Constant");
break;
case ERichCurveInterpMode::RCIM_Linear :
EnumString = TEXT("Linear");
break;
case ERichCurveInterpMode::RCIM_Cubic :
EnumString = TEXT("Cubic");
break;
}
return EnumString;
}
/** Called to create a widget for each curve interpolation enum */
TSharedRef<SWidget> MakeCurveTypeWidget( CurveInterpModePtr InterpMode )
{
FString Label = GetCurveTypeText(InterpMode);
return SNew(STextBlock) .Text( Label );
}
/** Called when 'OK' button is pressed */
FReply OnImport()
{
SelectedStruct = RowStructCombo->GetSelectedItem();
SelectedImportType = *ImportTypeCombo->GetSelectedItem();
if(CurveInterpCombo->GetSelectedItem().IsValid())
{
SelectedCurveInterpMode = *CurveInterpCombo->GetSelectedItem();
}
bImport = true;
if ( WidgetWindow.IsValid() )
{
WidgetWindow.Pin()->RequestDestroyWindow();
}
return FReply::Handled();
}
/** Called when 'Cancel' button is pressed */
FReply OnCancel()
{
bImport = false;
if ( WidgetWindow.IsValid() )
{
WidgetWindow.Pin()->RequestDestroyWindow();
}
return FReply::Handled();
}
FString GetSelectedItemText() const
{
TSharedPtr<ECSVImportType> SelectedType = ImportTypeCombo->GetSelectedItem();
return (SelectedType.IsValid())
? GetImportTypeText(SelectedType)
: FString();
}
FString GetSelectedRowOptionText() const
{
UScriptStruct* SelectedScript = RowStructCombo->GetSelectedItem();
return (SelectedScript)
? SelectedScript->GetName()
: FString();
}
FString GetSelectedCurveTypeText() const
{
CurveInterpModePtr CurveModePtr = CurveInterpCombo->GetSelectedItem();
return (CurveModePtr.IsValid())
? GetCurveTypeText(CurveModePtr)
: FString();
}
};
//////////////////////////////////////////////////////////////////////////
static UClass* GetCurveClass( ECSVImportType ImportType )
{
switch( ImportType )
{
case ECSV_CurveFloat:
return UCurveFloat::StaticClass();
break;
case ECSV_CurveVector:
return UCurveVector::StaticClass();
break;
case ECSV_CurveLinearColor:
return UCurveLinearColor::StaticClass();
break;
default:
return UCurveVector::StaticClass();
break;
}
}
UCSVImportFactory::UCSVImportFactory(const class FPostConstructInitializeProperties& PCIP)
: Super(PCIP)
{
bCreateNew = false;
bEditAfterNew = true;
SupportedClass = UDataTable::StaticClass();
bEditorImport = true;
bText = true;
Formats.Add(TEXT("csv;Comma-separated values"));
}
FText UCSVImportFactory::GetDisplayName() const
{
return LOCTEXT("CSVImportFactoryDescription", "Comma Separated Values");
}
bool UCSVImportFactory::DoesSupportClass(UClass * Class)
{
return (Class == UDataTable::StaticClass() || Class == UCurveTable::StaticClass() || Class == UCurveFloat::StaticClass() || Class == UCurveVector::StaticClass() || Class == UCurveLinearColor::StaticClass() );
}
UObject* UCSVImportFactory::FactoryCreateText( UClass* InClass, UObject* InParent, FName InName, EObjectFlags Flags, UObject* Context, const TCHAR* Type, const TCHAR*& Buffer, const TCHAR* BufferEnd, FFeedbackContext* Warn )
{
FEditorDelegates::OnAssetPreImport.Broadcast(this, InClass, InParent, InName, Type);
// See if table/curve already exists
UDataTable* ExistingTable = FindObject<UDataTable>(InParent, *InName.ToString());
UCurveTable* ExistingCurveTable = FindObject<UCurveTable>(InParent, *InName.ToString());
UCurveBase* ExistingCurve = FindObject<UCurveBase>(InParent, *InName.ToString());
// Save off information if so
bool bHaveInfo = false;
UScriptStruct* ImportRowStruct = NULL;
ERichCurveInterpMode ImportCurveInterpMode = RCIM_Linear;
ECSVImportType ImportType = ECSV_DataTable;
if(ExistingTable != NULL)
{
ImportRowStruct = ExistingTable->RowStruct;
bHaveInfo = true;
}
else if(ExistingCurveTable != NULL)
{
ImportType = ECSV_CurveTable;
bHaveInfo = true;
}
else if(ExistingCurve != NULL)
{
ImportType = ExistingCurve->IsA(UCurveFloat::StaticClass()) ? ECSV_CurveFloat : ECSV_CurveVector;
bHaveInfo = true;
}
bool bDoImport = true;
// If we do not have the info we need, pop up window to ask for things
if(!bHaveInfo)
{
TSharedPtr<SWindow> ParentWindow;
// Check if the main frame is loaded. When using the old main frame it may not be.
if( FModuleManager::Get().IsModuleLoaded( "MainFrame" ) )
{
IMainFrameModule& MainFrame = FModuleManager::LoadModuleChecked<IMainFrameModule>( "MainFrame" );
ParentWindow = MainFrame.GetParentWindow();
}
TSharedPtr<SCSVImportOptions> ImportOptionsWindow;
TSharedRef<SWindow> Window = SNew(SWindow)
.Title( LOCTEXT("DataTableOptionsWindowTitle", "DataTable Options" ))
.SizingRule( ESizingRule::Autosized );
Window->SetContent
(
SAssignNew(ImportOptionsWindow, SCSVImportOptions)
.WidgetWindow(Window)
);
FSlateApplication::Get().AddModalWindow(Window, ParentWindow, false);
ImportType = ImportOptionsWindow->GetSelectedImportType();
ImportRowStruct = ImportOptionsWindow->GetSelectedRowStruct();
ImportCurveInterpMode = ImportOptionsWindow->GetSelectedCurveIterpMode();
bDoImport = ImportOptionsWindow->ShouldImport();
}
UObject* NewAsset = NULL;
if(bDoImport)
{
// Convert buffer to an FString (will this be slow with big tables?)
FString String;
//const int32 BufferSize = BufferEnd - Buffer;
//appBufferToString( String, Buffer, BufferSize );
int32 NumChars = (BufferEnd - Buffer);
TArray<TCHAR>& StringChars = String.GetCharArray();
StringChars.AddUninitialized(NumChars+1);
FMemory::Memcpy(StringChars.GetData(), Buffer, NumChars*sizeof(TCHAR));
StringChars.Last() = 0;
TArray<FString> Problems;
if(ImportType == ECSV_DataTable)
{
// If there is an existing table, need to call this to free data memory before recreating object
if(ExistingTable != NULL)
{
ExistingTable->EmptyTable();
}
// Create/reset table
UDataTable* NewTable = CastChecked<UDataTable>(StaticConstructObject(UDataTable::StaticClass(), InParent, InName, Flags));
NewTable->RowStruct = ImportRowStruct;
NewTable->ImportPath = FReimportManager::SanitizeImportFilename(CurrentFilename, NewTable);
// Go ahead and create table from string
Problems = NewTable->CreateTableFromCSVString(String);
// Print out
UE_LOG(LogCSVImportFactory, Log, TEXT("Imported DataTable '%s' - %d Problems"), *InName.ToString(), Problems.Num());
NewAsset = NewTable;
}
else if(ImportType == ECSV_CurveTable)
{
// If there is an existing table, need to call this to free data memory before recreating object
if(ExistingCurveTable != NULL)
{
ExistingCurveTable->EmptyTable();
}
// Create/reset table
UCurveTable* NewTable = CastChecked<UCurveTable>(StaticConstructObject(UCurveTable::StaticClass(), InParent, InName, Flags));
NewTable->ImportPath = FReimportManager::SanitizeImportFilename(CurrentFilename, NewTable);
// Go ahead and create table from string
Problems = NewTable->CreateTableFromCSVString(String, ImportCurveInterpMode);
// Print out
UE_LOG(LogCSVImportFactory, Log, TEXT("Imported CurveTable '%s' - %d Problems"), *InName.ToString(), Problems.Num());
NewAsset = NewTable;
}
else if(ImportType == ECSV_CurveFloat || ImportType == ECSV_CurveVector || ImportType == ECSV_CurveLinearColor)
{
UClass* CurveClass = GetCurveClass( ImportType );
// Create/reset curve
UCurveBase* NewCurve = CastChecked<UCurveBase>(StaticConstructObject(CurveClass, InParent, InName, Flags));
Problems = NewCurve->CreateCurveFromCSVString(String);
UE_LOG(LogCSVImportFactory, Log, TEXT("Imported Curve '%s' - %d Problems"), *InName.ToString(), Problems.Num());
NewCurve->ImportPath = FReimportManager::SanitizeImportFilename(CurrentFilename, NewCurve);
NewAsset = NewCurve;
}
if(Problems.Num() > 0)
{
FString AllProblems;
for(int32 ProbIdx=0; ProbIdx<Problems.Num(); ProbIdx++)
{
// Output problems to log
UE_LOG(LogCSVImportFactory, Log, TEXT("%d:%s"), ProbIdx, *Problems[ProbIdx]);
AllProblems += Problems[ProbIdx];
AllProblems += TEXT("\n");
}
// Pop up any problems for user
FMessageDialog::Open( EAppMsgType::Ok, FText::FromString( AllProblems ) );
}
}
FEditorDelegates::OnAssetPostImport.Broadcast(this, NewAsset);
return NewAsset;
}
bool UCSVImportFactory::ReimportCSV( UObject* Obj )
{
bool bHandled = false;
if(UCurveBase* Curve = Cast<UCurveBase>(Obj))
{
bHandled = Reimport(Curve, FReimportManager::ResolveImportFilename(Curve->ImportPath, Curve));
}
else if(UCurveTable* CurveTable = Cast<UCurveTable>(Obj))
{
bHandled = Reimport(CurveTable, FReimportManager::ResolveImportFilename(CurveTable->ImportPath, CurveTable));
}
else if(UDataTable* DataTable = Cast<UDataTable>(Obj))
{
bHandled = Reimport(DataTable, FReimportManager::ResolveImportFilename(DataTable->ImportPath, DataTable));
}
return bHandled;
}
bool UCSVImportFactory::Reimport( UObject* Obj, const FString& Path )
{
if(Path.IsEmpty() == false)
{
FString FilePath = IFileManager::Get().ConvertToRelativePath(*Path);
FString Data;
if( FFileHelper::LoadFileToString( Data, *FilePath) )
{
const TCHAR* Ptr = *Data;
CurrentFilename = FilePath; //not thread safe but seems to be how it is done..
auto Result = FactoryCreateText( Obj->GetClass(), Obj->GetOuter(), Obj->GetFName(), Obj->GetFlags(), NULL, *FPaths::GetExtension(FilePath), Ptr, Ptr+Data.Len(), NULL );
return true;
}
}
return false;
}
//////////////////////////////////////////////////////////////////////////
UReimportDataTableFactory::UReimportDataTableFactory(const class FPostConstructInitializeProperties& PCIP)
: Super(PCIP)
{
}
bool UReimportDataTableFactory::CanReimport( UObject* Obj, TArray<FString>& OutFilenames )
{
UDataTable* DataTable = Cast<UDataTable>(Obj);
if(DataTable)
{
OutFilenames.Add(FReimportManager::ResolveImportFilename(DataTable->ImportPath, DataTable));
return true;
}
return false;
}
void UReimportDataTableFactory::SetReimportPaths( UObject* Obj, const TArray<FString>& NewReimportPaths )
{
UDataTable* DataTable = Cast<UDataTable>(Obj);
if(DataTable && ensure(NewReimportPaths.Num() == 1))
{
DataTable->ImportPath = FReimportManager::SanitizeImportFilename(NewReimportPaths[0], DataTable);
}
}
EReimportResult::Type UReimportDataTableFactory::Reimport( UObject* Obj )
{
if(Cast<UDataTable>(Obj))
{
return UCSVImportFactory::ReimportCSV(Obj) ? EReimportResult::Succeeded : EReimportResult::Failed;
}
return EReimportResult::Failed;
}
////////////////////////////////////////////////////////////////////////////
//
UReimportCurveTableFactory::UReimportCurveTableFactory(const class FPostConstructInitializeProperties& PCIP)
: Super(PCIP)
{
}
bool UReimportCurveTableFactory::CanReimport( UObject* Obj, TArray<FString>& OutFilenames )
{
UCurveTable* CurveTable = Cast<UCurveTable>(Obj);
if(CurveTable)
{
OutFilenames.Add(FReimportManager::ResolveImportFilename(CurveTable->ImportPath, CurveTable));
return true;
}
return false;
}
void UReimportCurveTableFactory::SetReimportPaths( UObject* Obj, const TArray<FString>& NewReimportPaths )
{
UCurveTable* CurveTable = Cast<UCurveTable>(Obj);
if(CurveTable && ensure(NewReimportPaths.Num() == 1))
{
CurveTable->ImportPath = FReimportManager::SanitizeImportFilename(NewReimportPaths[0], CurveTable);
}
}
EReimportResult::Type UReimportCurveTableFactory::Reimport( UObject* Obj )
{
if(Cast<UCurveTable>(Obj))
{
return UCSVImportFactory::ReimportCSV(Obj) ? EReimportResult::Succeeded : EReimportResult::Failed;
}
return EReimportResult::Failed;
}
////////////////////////////////////////////////////////////////////////////
//
UReimportCurveFactory::UReimportCurveFactory(const class FPostConstructInitializeProperties& PCIP)
: Super(PCIP)
{
}
bool UReimportCurveFactory::CanReimport( UObject* Obj, TArray<FString>& OutFilenames )
{
UCurveBase* CurveBase = Cast<UCurveBase>(Obj);
if(CurveBase)
{
OutFilenames.Add(FReimportManager::ResolveImportFilename(CurveBase->ImportPath, CurveBase));
return true;
}
return false;
}
void UReimportCurveFactory::SetReimportPaths( UObject* Obj, const TArray<FString>& NewReimportPaths )
{
UCurveBase* CurveBase = Cast<UCurveBase>(Obj);
if(CurveBase && ensure(NewReimportPaths.Num() == 1))
{
CurveBase->ImportPath = FReimportManager::SanitizeImportFilename(NewReimportPaths[0], CurveBase);
}
}
EReimportResult::Type UReimportCurveFactory::Reimport( UObject* Obj )
{
if(Cast<UCurveBase>(Obj))
{
return UCSVImportFactory::ReimportCSV(Obj) ? EReimportResult::Succeeded : EReimportResult::Failed;
}
return EReimportResult::Failed;
}
#undef LOCTEXT_NAMESPACE
| [
"[email protected]"
] | |
290f78cd0c818685c3e0276aa93d2a998470892f | 5a02eac79d5b8590a88209dcc6cd5741323bb5de | /PAT/第二轮/甲级/1045/最长公共子序列/main.cpp | 0664a426470db61f532de4c482dae8bac9f6b913 | [] | no_license | qiatongxueshaonianC/CaiZebin-Code_warehouse | ddac8252afb207d9580856cfbb7e14f868432716 | 25e1f32c7d86d81327a0d9f08cd7462209e9fec2 | refs/heads/master | 2023-03-20T03:36:49.088871 | 2021-03-16T15:40:11 | 2021-03-16T15:40:11 | 348,395,087 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 579 | cpp | #include<bits/stdc++.h>
using namespace std;
int main() {
int t,N;
scanf("%d%d ",&t,&N);
vector<int> A(N+1);
for(int i=1;i<=N;i++)
scanf("%d",&A[i]);
scanf("%d",&N);
vector<int> B(N+1);
for(int i=1;i<=N;i++)
scanf("%d",&B[i]);
vector<vector<int>> dp(A.size(),vector<int>(B.size(),0));
for(int i=1;i<A.size();i++){
for(int j=1;j<B.size();j++){
if(A[i]==B[j])
dp[i][j]=max(dp[i-1][j],dp[i][j-1])+1;
else
dp[i][j]=max(dp[i-1][j],dp[i][j-1]);
}
}
printf("%d",dp[A.size()-1][B.size()-1]);
return 0;
}
/*
6
5 2 3 1 5 6
12 2 2 4 1 5 5 6 3 1 1 5 6
*/
| [
"[email protected]"
] | |
a611114afa43ee324dc44129a3ec0f816d3a77e1 | f9deabc25c57196fb355ee18e708ff597e035ac8 | /oscsender.h | 0ee8bc4ac13294941b387bd5af8ac8f9b52881a3 | [
"MIT",
"LicenseRef-scancode-public-domain"
] | permissive | mapmapteam/proto-qtoscpack | 7f464bee6c198e48dfa4da639ba5709a0abdafd6 | b3d8b075453b1884d5ca19622c82995b514c9b4b | refs/heads/master | 2021-01-20T04:36:55.944761 | 2020-02-12T03:35:59 | 2020-02-12T03:35:59 | 89,705,422 | 3 | 1 | null | null | null | null | UTF-8 | C++ | false | false | 1,443 | h | #ifndef OSCSENDER_H
#define OSCSENDER_H
#include <QObject>
#include <QVariant>
#include <QtNetwork>
#include <QHostAddress>
/**
* @brief Sends OSC messages to a given host and port.
*
* Currently only supports unicast UDP.
*/
class OscSender : public QObject
{
Q_OBJECT
// TODO: Add portNumber property (and allow users to change it)
// TODO: Add hostAddress property (and allow users to change it)
// TODO: Support TCP
// TODO: Support multicast
// TODO: Support broadcast
// TODO: Support OSC bundles
// TODO: Support DNS resolution
public:
/**
* @brief Constructor.
* @param hostAddress
* @param port
* @param parent
*/
explicit OscSender(const QString& hostAddress, quint16 port, QObject* parent = nullptr);
/**
* @brief Sends an OSC message to the host and address that this sender is configured to send to.
* @param oscAddress OSC path /like/this
* @param arguments List of QVariant arguments of any type
*/
Q_INVOKABLE void send(const QString& oscAddress, const QVariantList& arguments);
signals:
// TODO: Add messageSent signal
// TODO: Add connected signal for TCP sender.
public slots:
private:
QUdpSocket* m_udpSocket;
QHostAddress m_hostAddress;
quint16 m_port;
void variantListToByteArray(QByteArray& outputResult, const QString& oscAddress, const QVariantList& arguments);
};
#endif // OSCSENDER_H
| [
"[email protected]"
] | |
dbbab8637a671275fc92557d4a1108620f73559d | 80e6c4de3d118f278ae7e3562c74a5bf8eaf2e1e | /Sources/Test/Events.cpp | 4d054c44816df477e72b717e73c878cc435647f7 | [] | no_license | mutexre/Starfield | 4b6f95ad93f779a8a76635ff5173ffedfb1af43c | 663d42e524ee2c645ebe8997dc424782825a1f59 | refs/heads/master | 2020-04-05T23:27:07.055436 | 2014-05-12T19:40:57 | 2014-05-12T19:40:57 | 23,846,493 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,821 | cpp | #include <stdafx.h>
#include <Test/Starfield.h>
void Starfield::Main::updateStarScale(float w, float h) {
static float testScreenHypotSize = hypot(1680.0f, 1050.0f);
vars.starfield.scale->set(hypot(w, h) / testScreenHypotSize);
vars.starfield.scale->commit();
}
void Starfield::Main::reshape(float w, float h)
{
if (view.get()) {
view->setViewport(GL::Viewport(0, 0, w, h));
vars.aspectRatio->set(h / w);
vars.aspectRatio->commit();
updateStarScale(w, h);
}
}
void Starfield::Main::keyDown(Rt::Option<UI::Key> key, const std::string& characters, void* event)
{
if (key.defined) {
switch (key.get()) {
case UI::Key::space:
// running = !running;
break;
case UI::Key::up:
vars.starfield.velocity->set(vars.starfield.velocity->value() * 1.1f);
vars.starfield.velocity->commit();
break;
case UI::Key::down:
vars.starfield.velocity->set(vars.starfield.velocity->value() / 1.1f);
vars.starfield.velocity->commit();
break;
case UI::Key::left:
break;
case UI::Key::right:
break;
case UI::Key::backspace: {
}
break;
}
}
// printf("s=\"%s\" %u\n", characters.c_str(), characters.size());
if (characters.size() > 0)
switch (characters[0]) {
case 's':
vars.starfield.visibility->set(!vars.starfield.visibility->get());
break;
}
}
void Starfield::Main::keyUp(UI::Key, void* event) {}
void Starfield::Main::scroll(float x, float y, float dx, float dy, void* event)
{}
void Starfield::Main::move(float x, float y, float dx, float dy, void* event)
{}
| [
"[email protected]"
] | |
0976fd542aff5b496b5e4becddbc5af67bcc8c0d | bd5378b1a2e565fe8ff1a4bab841d3104ddb9780 | /include/maddy/strongparser.h | cda6d21ad21feaaeaad1e3a404a73a77aff42e7d | [
"MIT"
] | permissive | patrickelectric/maddy | 134366bb270aac34e63dfb2f55ec756be1f048a4 | 04342d813c0355bb98931e65284f324152751cdc | refs/heads/master | 2020-04-02T00:15:49.863328 | 2018-01-18T18:23:29 | 2018-01-18T18:23:29 | 153,796,522 | 0 | 0 | MIT | 2018-10-19T14:33:40 | 2018-10-19T14:33:39 | null | UTF-8 | C++ | false | false | 1,207 | h | /*
* This project is licensed under the MIT license. For more information see the
* LICENSE file.
*/
#pragma once
// -----------------------------------------------------------------------------
#include <string>
#include <regex>
#include "maddy/lineparser.h"
// -----------------------------------------------------------------------------
namespace maddy {
// -----------------------------------------------------------------------------
/**
* StrongParser
*
* Has to be used before the `EmphasizedParser`.
*
* @class
*/
class StrongParser : public LineParser
{
public:
/**
* Parse
*
* From Markdown: `text **text**`
*
* To HTML: `text <strong>text</strong>`
*
* @method
* @param {std::string&} line The line to interpret
* @return {void}
*/
void
Parse(std::string& line) override
{
static std::regex re("(?!.*`.*|.*<code>.*)\\*\\*(?!.*`.*|.*<\\/code>.*)([^\\*\\*]*)\\*\\*(?!.*`.*|.*<\\/code>.*)");
static std::string replacement = "<strong>$1</strong>";
line = std::regex_replace(line, re, replacement);
}
}; // class StrongParser
// -----------------------------------------------------------------------------
} // namespace maddy
| [
"[email protected]"
] | |
0a28992d08fa5da5beba63abc27236c68d4a10fc | 9fa57374ea7502254610b5864aa0d9acc0178e6e | /CDO_pricing/MCPROJ_Tools.h | 6e9ecc8ef9fa0e3b026b3d38e7c654737120f0f3 | [] | no_license | Abhi54743/MCPROJ_CDO | d4b8d05e4989a4aad4ee318212721fd93c48a64e | d4fb1b119015bda9efe14945a08f07f885291e3f | refs/heads/master | 2021-01-21T11:07:36.617646 | 2017-08-04T21:20:04 | 2017-08-04T21:20:04 | 91,724,787 | 0 | 1 | null | null | null | null | UTF-8 | C++ | false | false | 899 | h | /*!
Tools used in porject: CDO Tranche Pricing, Monte Carlo Project
Author: Abhishek MUKHOPADHYAY/ Carlo Pulcini
Date: 11/03/2017
Version 1.0
*/
#include<cstdio>
#include<cmath>
#include<sstream>
#include<iostream>
#include<iomanip>
#include<cstdint>
#include<vector>
#pragma once
#ifndef _MCPROJ_TOOLS_H
#define _MCPROJ_TOOLS_H
namespace MCPROJ {
static double f(double x, double y, double aprime, double bprime, double rho);
double NormPDF(double x, double mu, double sigma);
double NormPDF(double x);
double NormalCDF(double z);
double BivariateNormalCDF(double a, double b, double rho);
double RationalApproximation(double t);
double normal_CDF_inverse(double p);
void gauleg(double x1, double x2, std::vector<double> & abs, std::vector<double> & weight);
double inverseIG(double x, std::vector<double> listofvalues);
}//end namespace MCPROJ
#endif // !_MCPROJ_TOOLS_H | [
"[email protected]"
] | |
de3f53e9dc333caf6013a9e8534aaf78b909b75d | db1cce8ec15edfc4fe44022f7a51ce904616889b | /ElementAction.h | 9801ab3d6506f056e20a60e981d9536d9dbb12ad | [] | no_license | Virtual-Art/CustomGUI | 1cdc413d2b79408dab6698233bfda395297f28cc | ff55f3cdfd95eb608f1f8a243bfb1d4900e9a9b3 | refs/heads/main | 2023-05-05T00:14:07.407972 | 2021-06-01T02:25:26 | 2021-06-01T02:25:26 | 328,483,277 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 856 | h | #ifndef ElementACTION
#define ElementACTION
#define POSITION 1
#define SIZE 2
#define ROTATION 3
#define COLOR 4
#include <iostream>
#include "Action.h"
#include "Oscillation.h"
#include "Linear.h"
#include "Exponential.h"
#include "Logarithmic.h"
using namespace std;
// Input =< [4][4]
class ElementAction
{
public:
// subaction is all Exp, Log, Lin, Cos
// [ATTRIBUTE][0-3]
SubAction*** SubActionSet;
double** Result;
int CurrentIDCount;
int ElementIDs[20];
bool MouseAccess;
//Have to set it to something
ElementAction();
ElementAction(SubAction*& Preset);
~ElementAction();
void Play();
SubAction**& operator[] (int Position);
//////////////////Task////////////////////
//Calculate all actions without doubling//
//////////////////Task////////////////////
};
#endif
| [
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] | |
c5858850f3a46e66967b7cca89fcfbc7a5428ed6 | 4051dc0d87d36c889aefb2864ebe32cd21e9d949 | /Algos Practice/CodeForces/r1.cpp | da2973f4317bd9b89709144b093950f2dde58ac8 | [] | no_license | adityax10/ProgrammingCodes | e239971db7f3c4de9f2b060434a073932925ba4d | 8c9bb45e1a2a82f76b66f375607c65037343dcd9 | refs/heads/master | 2021-01-22T22:53:01.382230 | 2014-11-07T10:35:00 | 2014-11-07T10:35:00 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 527 | cpp | #include<iostream>
#include<vector>
#include<utility>
#include<limits.h>
#include<set>
#include<map>
#include<algorithm>
using namespace std;
int main()
{
int k,c,d,n,m;
//freopen("in.txt","r",stdin);
cin>>c>>d;
cin>>n>>m;
cin>>k;
int x = 0;
x+=k;
bool flag =0;
int probs = 0;
while(x<n*m)
{
if(flag==0)
{
flag=1;
x+=n;
probs+=c;
}
if ( d*n > c && (d*(n*m - x) >= c) && x<n*m )
{
x+=n;
probs+=c;
}
else if(x<n*m)
{
x+=1;
probs+=d;
}
}
cout<<probs<<endl;
return 0;
}
| [
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] | |
f42142459ca650923952241732769d9fe45b5137 | d2d31c7ed32c47612c79aa7a098d379d8a6bd732 | /Class project 0 printf/1.cpp | b73bc7dfed63b3f0de99fbb5646b08d4dedcf229 | [] | no_license | allen901010/YZUEE10901C-Program | ced594b33df58f5bfbf09c0e7d9fab38cca646ef | 881f0ccc5c07260ab3d41295537dde1ed7f81bc5 | refs/heads/main | 2023-03-25T00:54:29.199198 | 2021-03-15T14:41:55 | 2021-03-15T14:41:55 | 315,353,113 | 0 | 0 | null | null | null | null | BIG5 | C++ | false | false | 968 | cpp | /*
日期:2020/09/14
學號:1090604
姓名:李岱倫
*/
#include <stdio.h>
#include <stdlib.h>
void main(void)
{
printf("*\n");
printf("**\n");
printf("***\n");
printf("****\n");
printf("*****\n");
printf("******\n");
printf("*******\n");
printf("********\n");
printf("*********\n");
printf("**********\n");
system("pause");
}
<!DOCTYPE html>
<html xmlns="http://www.w3.org/1999/xhtml">
<head><meta http-equiv="Content-Type" content="text/html; charset=utf-8" /><title>
</title></head>
<body>
<form method="post" action="./File_DownLoad_Wk_zip.aspx?File_name=1.cpp&type=3&id=3036481" id="form1">
<div class="aspNetHidden">
<input type="hidden" name="__VIEWSTATE" id="__VIEWSTATE" value="/wEPDwUKLTEzNDM3NzkxOWRkwneTr34MFXJYUKyKKda+DU4gQVM=" />
</div>
<div class="aspNetHidden">
<input type="hidden" name="__VIEWSTATEGENERATOR" id="__VIEWSTATEGENERATOR" value="629601C3" />
</div>
<div>
</div>
</form>
</body>
</html>
| [
"[email protected]"
] | |
9438e70b4c193f5674f64daf4fd23ee5b83cd082 | 746704e3dc962a727b5d7f3a533c72f8121f6cdb | /src/example/00_verysimple.cc | 576473403c64aeab2a072a865a23b060ab9f53c0 | [] | no_license | neiser/APLCON | 2feb0258f17ed5fc0ed53f1e164c10f76c6742f0 | 2654fe6e9eb973eb6873ba6a00e834c2584e2ed2 | refs/heads/master | 2020-12-24T03:30:15.481898 | 2017-03-15T08:35:50 | 2017-03-15T08:35:50 | 32,865,701 | 4 | 1 | null | null | null | null | UTF-8 | C++ | false | false | 1,870 | cc | #include <iostream>
#include <APLCON.hpp>
using namespace std;
int main() {
// this example shows how to do standard Gaussian error propagation
// with two measured variables A and B
// APLCON will calculate their sum C=A+B and the propagated error
APLCON a("Error propagation");
a.AddMeasuredVariable("A", 10, 0.3);
a.AddMeasuredVariable("B", 20, 0.4);
a.AddUnmeasuredVariable("C"); // default value 0, unmeasured means sigma=0
// setup a lambda function which returns 0
// if C=A+B aka C - A - B = 0 holds
auto equality_constraint = [] (double a, double b, double c) { return c - a - b; };
a.AddConstraint("A+B=C", {"A", "B", "C"}, equality_constraint);
// do the fit, obtain ra structure
const APLCON::Result_t& ra = a.DoFit();
cout << ra << endl;
// this shows what can access in the result structure "ra"
// note that the correlations must be calculated on demand
cout << "C's value (should be 30 due to constraint): "
<< ra.Variables.at("C").Value.After << endl;
cout << "C's sigma (should be 0.5 due to error propagation): "
<< ra.Variables.at("C").Sigma.After << endl;
const auto& correlations = APLCON::CalculateCorrelations(ra.Variables);
cout << "Correlation between C and B: ";
cout << 100*correlations.at("C").After.at("B") << " %" << endl << endl;
// let's try the same with Poissonian variables
APLCON b("Poissonian error propagation");
APLCON::Variable_Settings_t settings = APLCON::Variable_Settings_t::Default;
settings.Distribution = APLCON::Distribution_t::Poissonian;
b.AddMeasuredVariable("A", 10, 1, settings);
b.AddMeasuredVariable("B", 20, 2, settings);
b.AddUnmeasuredVariable("C");
b.AddConstraint("A+B=C", {"A", "B", "C"}, equality_constraint);
const APLCON::Result_t& rb = b.DoFit();
cout << rb << endl;
return 0;
}
| [
"[email protected]"
] | |
f27616e21155126f3c1a1ce13ed863917785a1fd | 40759a3d38a71023670f6510a0b03c1c84c471f7 | /merge.cpp | ae423596f1ee2c266227712129f42edb14148bbb | [
"Apache-2.0"
] | permissive | phaistos-networks/Trinity | f78cb880fe6d24dc331659b034f97c4e19be3836 | a745a0c13719ca9d041e1dfcfeb81e6bf85a996f | refs/heads/master | 2021-01-19T04:34:31.721194 | 2019-11-08T18:12:31 | 2019-11-08T18:12:31 | 84,192,219 | 250 | 23 | null | null | null | null | UTF-8 | C++ | false | false | 24,694 | cpp | #include "merge.h"
#include "docwordspace.h"
#include <unordered_set>
#include <text.h>
void Trinity::MergeCandidatesCollection::commit() {
std::sort(candidates.begin(), candidates.end(), [](const auto &a, const auto &b) noexcept {
return b.gen < a.gen;
});
map.clear();
all.clear();
// For each candidate, we 'll track the base in all[]
// so that we 'll need to consider all masked products from [base, all.size())
// This makes sense because we have ordered by generation, and Trinity's generation order semantics
for (const auto &c : candidates) {
const auto &ud = c.maskedDocuments;
map.push_back({c, all.size()});
if (ud) {
all.push_back(ud);
}
}
}
std::unique_ptr<Trinity::masked_documents_registry> Trinity::MergeCandidatesCollection::scanner_registry_for(const uint16_t idx) {
const auto n = map[idx].second;
// It's important that we masked_documents_registry::make() use_bf is set to false here
// otherwise it's just too expensive to allocate/release the memory for the bloom filter
// and because the BF size is large the allocator will fallback to mmap with subsequent madvise/munmap
// which is expensive if it involves thousands of such calls
return masked_documents_registry::make(all.data(), n, false);
}
// Make sure you have commited first
// Unlike with e.g SegmentIndexSession where the order of postlists in the index is based on our translation(term=>integer id) and the ascending order of that id
// here the order will match the order the terms are found in `tersm`, because we perform a merge-sort and so we process terms in lexicograpphic order
void Trinity::MergeCandidatesCollection::merge(Trinity::Codecs::IndexSession * is,
simple_allocator * allocator,
std::vector<std::pair<str8_t, Trinity::term_index_ctx>> *const terms,
IndexSource::field_statistics *const defaultFieldStats,
const uint32_t flushFreq,
const bool disableOptimizations) {
static constexpr bool trace{false};
struct tracked_candidate final {
uint16_t idx;
merge_candidate candidate;
};
std::vector<tracked_candidate> all_;
if (trace) {
SLog("Merging ", candidates.size(), " candidates\n");
}
EXPECT(candidates.size() < std::numeric_limits<uint16_t>::max());
for (uint16_t i{0}; i < candidates.size(); ++i) {
if (trace) {
SLog("Candidate ", i, " gen=", candidates[i].gen, " ", candidates[i].ap->codec_identifier(), "\n");
}
if (i) {
EXPECT(candidates[i].gen < candidates[i - 1].gen);
}
if (candidates[i].terms && false == candidates[i].terms->done() && candidates[i].ap) {
// ap may be nullptr if we only wanted to e.g mask documents
all_.push_back({i, candidates[i]});
}
}
if (all_.empty()) {
return;
}
auto all = all_.data();
uint16_t rem = all_.size();
uint16_t toAdvance[rem];
const auto isCODEC = is->codec_identifier();
DocWordsSpace dws{Limits::MaxPosition}; // dummy, for materialize_hits()
size_t termHitsCapacity{0};
term_hit * termHitsStorage{nullptr};
std::vector<Trinity::Codecs::IndexSession::merge_participant> mergeParticipants;
std::vector<std::pair<
std::pair<Trinity::Codecs::Decoder *, Trinity::Codecs::PostingsListIterator *>,
masked_documents_registry *>>
decodersV;
term_index_ctx tctx;
std::unique_ptr<Trinity::Codecs::Encoder> enc(is->new_encoder());
// Only if it's implemented by the codec's IndexSession
const bool haveAppendIndexChunk = (false == disableOptimizations) && (is->caps & unsigned(Codecs::IndexSession::Capabilities::AppendIndexChunk));
const bool haveMerge = (false == disableOptimizations) && (is->caps & unsigned(Codecs::IndexSession::Capabilities::Merge));
DEFER(
{
if (termHitsStorage)
std::free(termHitsStorage);
});
#if 0
for (unsigned i = 0; i < rem; ++i) {
SLog("NOW:", i, " for ", candidates[i].gen, "\n");
if (candidates[i].gen != 1566292481019157) { continue; }
for (;;) {
if (candidates[i].terms->done()) {
break;
}
const auto p = candidates[i].terms->cur();
#if 0
if (p.first.Eq(_S("pid:2155480354")) || p.first.Eq(_S("XBOX"))) {
SLog("For [", p.first, "] ", p.second.documents, "\n");
}
#endif
SLog("Got [", p.first, "]\n");
candidates[i].terms->next();
}
}
SLog("exiting\n"); exit(0);
#endif
for (;;) {
uint8_t toAdvanceCnt{1};
const auto pair = all[0].candidate.terms->cur();
auto selected{pair};
auto codec = all[0].candidate.ap->codec_identifier();
bool sameCODEC{true};
toAdvance[0] = 0;
for (uint16_t i{1}; i < rem; ++i) {
const auto pair = all[i].candidate.terms->cur();
const auto r = terms_cmp(pair.first.data(), pair.first.size(), selected.first.data(), selected.first.size());
if (r < 0) {
toAdvanceCnt = 1;
toAdvance[0] = i;
selected = pair;
sameCODEC = true;
codec = all[i].candidate.ap->codec_identifier();
} else if (r == 0) {
if (sameCODEC) {
auto c = all[i].candidate.ap->codec_identifier();
if (c != codec) {
sameCODEC = false;
}
}
toAdvance[toAdvanceCnt++] = i;
}
}
const str8_t outTerm(allocator->CopyOf(selected.first.data(), selected.first.size()), selected.first.size());
[[maybe_unused]] const bool fastPath = sameCODEC && codec == isCODEC;
static constexpr bool trace{false};
if (trace) {
SLog("TERM [", selected.first, "], toAdvanceCnt = ", toAdvanceCnt, ", sameCODEC = ", sameCODEC, ", first = ", toAdvance[0], ", fastPath = ", fastPath, "\n");
}
if (toAdvanceCnt == 1) {
auto c = all[toAdvance[0]].candidate;
auto maskedDocsReg = scanner_registry_for(all[toAdvance[0]].idx);
if (fastPath && maskedDocsReg->empty() && haveAppendIndexChunk) {
if (likely(selected.second.documents)) {
// See comments below for why this is possible
const auto chunk = is->append_index_chunk(c.ap, selected.second);
terms->push_back({outTerm, {selected.second.documents, chunk}});
++(defaultFieldStats->totalTerms);
} else if (trace) {
SLog("No documents\n");
}
} else {
if (unlikely(0 == selected.second.documents)) {
// It's possible, however unlikely (check your implementation)
// that you have e.g indexed a term, but indexed no documents for that term
// in which case, it will be 0 documents.
//
// We will just skip this here altogether(doing the same for other branches)
//
// Note that SegmentIndexSession and this merge() method explicitly drop terms with no documents associated with them, so
// the only real way to get a term with no document is to use the various Trinity segment constructs directly.
if (trace) {
Print("0 documents for TERM [", selected.first, "]\n");
}
} else {
std::unique_ptr<Trinity::Codecs::Decoder> dec(c.ap->new_decoder(selected.second));
std::unique_ptr<Trinity::Codecs::PostingsListIterator> it(dec->new_iterator());
it->next();
enc->begin_term();
do {
const auto docID = it->curDocument.id;
const auto freq = it->freq;
EXPECT(docID != DocIDsEND); // sanity check
if (trace) {
SLog("docID = ", docID, ", masked = ", maskedDocsReg->test(docID), "\n");
}
if (!maskedDocsReg->test(docID)) {
if (freq > termHitsCapacity) {
if (termHitsStorage) {
std::free(termHitsStorage);
}
termHitsCapacity = freq + 128;
termHitsStorage = static_cast<term_hit *>(malloc(sizeof(term_hit) * termHitsCapacity));
}
enc->begin_document(docID);
it->materialize_hits(&dws /* dummy */, termHitsStorage);
++(defaultFieldStats->sumTermsDocs);
defaultFieldStats->sumTermHits += freq;
for (uint32_t i{0}; i < freq; ++i) {
const auto &th = termHitsStorage[i];
const auto bytes = reinterpret_cast<const uint8_t *>(&th.payload);
enc->new_hit(th.pos, {bytes, th.payloadLen});
}
enc->end_document();
}
} while (it->next() != DocIDsEND);
enc->end_term(&tctx);
if (tctx.documents) {
// This means that we may end up e.g storing some meta-data specific to this term, and/or a skiplist
// in the index/other index session data files in between enc->begin_term() .. enc->end_term(), which could
// have been set even if no documents were indexed for this term.
// That's fine though -- will ignore them in a future merge op.
terms->push_back({outTerm, tctx});
++(defaultFieldStats->totalTerms);
}
if (trace) {
SLog("Indexed Term\n");
}
}
}
} else {
if (fastPath && haveMerge) {
mergeParticipants.clear();
for (uint16_t i{0}; i < toAdvanceCnt; ++i) {
const auto idx = toAdvance[i];
if (likely(all[idx].candidate.terms->cur().second.documents)) {
// See comments earliert for why this is possible
mergeParticipants.push_back(
{all[idx].candidate.ap,
all[idx].candidate.terms->cur().second,
scanner_registry_for(all[idx].idx).release()});
} else if (trace) {
SLog("No documents for candidate ", i, "\n");
}
}
if (mergeParticipants.size()) {
enc->begin_term();
is->merge(mergeParticipants.data(), mergeParticipants.size(), enc.get());
enc->end_term(&tctx);
if (tctx.documents) {
terms->push_back({outTerm, tctx});
++(defaultFieldStats->totalTerms);
}
for (uint16_t i{0}; i < mergeParticipants.size(); ++i) {
delete mergeParticipants[i].maskedDocsReg;
}
}
} else {
// we got to merge-sort across different codecs and output to an encoder of a different, potentially, codec
for (uint16_t i{0}; i < toAdvanceCnt; ++i) {
const auto idx = toAdvance[i];
if (likely(all[idx].candidate.terms->cur().second.documents)) {
// see earlier comments for why this is possible
auto ap = all[idx].candidate.ap;
auto dec = ap->new_decoder(all[idx].candidate.terms->cur().second);
auto it = dec->new_iterator();
auto reg = scanner_registry_for(all[idx].idx).release();
EXPECT(reg);
it->next();
decodersV.push_back({{dec, it}, reg});
} else if (trace) {
SLog("No documents for candidate ", i, "\n");
}
}
if (uint16_t rem = decodersV.size()) {
auto decoders = decodersV.data();
uint16_t toAdvance[128];
EXPECT(sizeof_array(toAdvance) >= decodersV.size());
// TODO: just use a Switch::priority_queue<>
enc->begin_term();
for (;;) {
uint16_t toAdvanceCnt{1};
auto lowestDID = decoders[0].first.second->curDocument.id;
toAdvance[0] = 0;
for (uint16_t i{1}; i < rem; ++i) {
const auto id = decoders[i].first.second->curDocument.id;
if (id < lowestDID) {
lowestDID = id;
toAdvanceCnt = 1;
toAdvance[0] = i;
} else if (id == lowestDID) {
toAdvance[toAdvanceCnt++] = i;
}
}
// always choose the first because they are always sorted by gen DESC
if (trace) {
SLog("Lowest = ", lowestDID, ", masked = ", decoders[toAdvance[0]].second->test(lowestDID), "\n");
}
if (!decoders[toAdvance[0]].second->test(lowestDID)) {
auto it = decoders[toAdvance[0]].first.second;
const auto freq = it->freq;
if (freq > termHitsCapacity) {
if (termHitsStorage) {
std::free(termHitsStorage);
}
termHitsCapacity = freq + 128;
termHitsStorage = (term_hit *)malloc(sizeof(term_hit) * termHitsCapacity);
}
enc->begin_document(lowestDID);
it->materialize_hits(&dws /* dummy */, termHitsStorage);
for (uint32_t i{0}; i < freq; ++i) {
const auto &th = termHitsStorage[i];
const auto bytes = (uint8_t *)&th.payload;
enc->new_hit(th.pos, {bytes, th.payloadLen});
}
enc->end_document();
++(defaultFieldStats->sumTermsDocs);
defaultFieldStats->sumTermHits += freq;
}
do {
const auto idx = toAdvance[--toAdvanceCnt];
auto it = decoders[idx].first.second;
if (it->next() == DocIDsEND) {
delete it;
delete decoders[idx].first.first;
delete decoders[idx].second;
if (!--rem) {
goto l10;
}
memmove(decoders + idx, decoders + idx + 1, (rem - idx) * sizeof(decoders[0]));
}
} while (toAdvanceCnt);
}
l10:
decodersV.clear();
enc->end_term(&tctx);
if (tctx.documents) {
terms->push_back({outTerm, tctx});
++(defaultFieldStats->totalTerms);
}
}
}
}
if (flushFreq && is->indexOut.size() > flushFreq) {
// TODO: support pending
}
do {
const auto idx = toAdvance[--toAdvanceCnt];
auto terms = all[idx].candidate.terms;
terms->next();
if (terms->done()) {
if (!--rem) {
goto l1;
}
memmove(all + idx, all + idx + 1, (rem - idx) * sizeof(all[0]));
}
} while (toAdvanceCnt);
}
l1:;
}
std::vector<std::pair<uint64_t, Trinity::MergeCandidatesCollection::IndexSourceRetention>>
Trinity::MergeCandidatesCollection::consider_tracked_sources(std::vector<uint64_t> trackedSources) {
std::unordered_set<uint64_t> candidatesGens;
std::vector<std::pair<uint64_t, IndexSourceRetention>> res;
const auto cnt = trackedSources.size();
uint32_t lastNotCandidateIdx{UINT32_MAX};
std::sort(trackedSources.begin(), trackedSources.end());
for (const auto &it : candidates) {
candidatesGens.insert(it.gen);
}
for (uint32_t i{0}; i < cnt; ++i) {
const auto gen = trackedSources[i];
if (!candidatesGens.count(gen)) {
lastNotCandidateIdx = i;
res.push_back({gen, IndexSourceRetention::RetainAll});
continue;
} else if (lastNotCandidateIdx < i) {
// if there is 1+ other tracked sources, and any of those sources is NOT in candidatesGens, we need to retain the updated documentIDs
res.push_back({gen, IndexSourceRetention::RetainDocumentIDsUpdates});
} else {
res.push_back({gen, IndexSourceRetention::Delete});
}
}
return res;
}
| [
"[email protected]"
] | |
eb15b55bde848f9eb24d03fba5b68f5888f192d2 | d1acf00faf5592933959784549137de0e0178453 | /src/test_bdviewblock/mainwindow.cpp | 1d0631f8bf590b6deac30dcb006ae1cb6de85982 | [
"MIT"
] | permissive | changxm11/blockdia | de0c44f9bd22b9cba2a21020e8f04e5ecf31c7b7 | b3fb69e4229d02ec98068606174cc0e29777c789 | refs/heads/master | 2020-04-10T13:09:41.693728 | 2017-08-29T19:58:28 | 2017-08-31T16:07:11 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 345 | cpp | #include "mainwindow.h"
#include "ui_mainwindow.h"
#include <libblockdia.h>
MainWindow::MainWindow(QWidget *parent) :
QMainWindow(parent),
ui(new Ui::MainWindow)
{
ui->setupUi(this);
libblockdia::ViewBlock *view = new libblockdia::ViewBlock();
this->setCentralWidget(view);
}
MainWindow::~MainWindow()
{
delete ui;
}
| [
"[email protected]"
] | |
c78d8bf22e5fe74e6fb7b419cda795717c175d71 | a21382c77bd4e52d93df4be2b86e28219e06fb9a | /square.h | 807063fba3c5aafd53c4551487d0decb0509f8a9 | [] | no_license | hn1111/Battleship | 1e009605ba7610f7f46563c22543e5e9e37a8606 | ba7adf0cba40050a46974b796f8c2a4f0cf043e1 | refs/heads/main | 2023-05-10T09:53:18.163037 | 2021-06-01T07:11:19 | 2021-06-01T07:11:19 | 372,486,819 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 528 | h | #ifndef SQUARE_H
#define SQUARE_H
class Square
{
public:
enum Status {
miss,
hit,
empty,
occupied,
dead
};
int col;
int row;
int width;
int height;
Status status;
bool operator==(const Square& a) const {
return (a.col == col and a.row == row);
}
bool operator<(const Square& a) const {
if (row < a.row)
return true;
if (col < a.col)
return true;
return false;
}
};
#endif // SQUARE_H
| [
"[email protected]"
] | |
9fc4d208d76d1ae497b3432428c8bf50b26679f2 | 19079c088fc306ac773d4a6f7e85715a3fc8cc9d | /challenge/flutter/all_samples/cupertino_pagestorage_1/windows/runner/main.cpp | 9962722a172e94239f2a5f7ea2fc3dfdf3e6e9b6 | [
"Apache-2.0"
] | permissive | davidzou/WonderingWall | 75929193af4852675209b21dd544cb8b60da5fa5 | 1060f6501c432510e164578d4af60a49cd5ed681 | refs/heads/master | 2022-11-03T22:33:12.340125 | 2022-10-14T08:12:14 | 2022-10-14T08:12:14 | 5,868,257 | 4 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,283 | cpp | #include <flutter/dart_project.h>
#include <flutter/flutter_view_controller.h>
#include <windows.h>
#include "flutter_window.h"
#include "utils.h"
int APIENTRY wWinMain(_In_ HINSTANCE instance, _In_opt_ HINSTANCE prev,
_In_ wchar_t *command_line, _In_ int show_command) {
// Attach to console when present (e.g., 'flutter run') or create a
// new console when running with a debugger.
if (!::AttachConsole(ATTACH_PARENT_PROCESS) && ::IsDebuggerPresent()) {
CreateAndAttachConsole();
}
// Initialize COM, so that it is available for use in the library and/or
// plugins.
::CoInitializeEx(nullptr, COINIT_APARTMENTTHREADED);
flutter::DartProject project(L"data");
std::vector<std::string> command_line_arguments =
GetCommandLineArguments();
project.set_dart_entrypoint_arguments(std::move(command_line_arguments));
FlutterWindow window(project);
Win32Window::Point origin(10, 10);
Win32Window::Size size(1280, 720);
if (!window.CreateAndShow(L"cupertino_pagestorage_1", origin, size)) {
return EXIT_FAILURE;
}
window.SetQuitOnClose(true);
::MSG msg;
while (::GetMessage(&msg, nullptr, 0, 0)) {
::TranslateMessage(&msg);
::DispatchMessage(&msg);
}
::CoUninitialize();
return EXIT_SUCCESS;
}
| [
"[email protected]"
] | |
4b89229c91719ee5d011fd24d1db535c9fa249fe | c07f78e0e3375e2b18c788b8c3123b61de9b4ab6 | /solutions/patriotKahan.cpp | 2ff22c7d1f9d4e53f4d28ba019dc836272791e94 | [] | no_license | VinInn/FPOptimization | 6d2349fd8a4784d2672328562094828f024d419b | 7605d070046d0f1645b515b94e44c318828c12d6 | refs/heads/master | 2021-01-02T09:27:24.433850 | 2014-10-22T14:44:01 | 2014-10-22T14:44:01 | 13,464,762 | 2 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 998 | cpp | // c++ -std=c++1y -O2 patriotKahan.cpp
#ifdef ESC_SERVER
#include "api.h"
#endif
#include<cstdio>
float kernel(int maxl) {
float tenth=0.1f;
float t=0;
long long n=0;
float eps=0;
while(n<maxl) {
float a = tenth -eps;
float s = t + a;
eps = (s -t) -a;
t = s;
++n;
if (n<21 || n%36000==0) printf("%d %f %a\n",n,t,t);
}
float count = float(60*60*100*10);
printf("\n\n%f %f %a\n\n",count,float(count*tenth),float(count*tenth));
return t;
}
int main() {
#ifdef ESC_SERVER
int seed = 500000*esc_start("iris.pd.infn.it:5202", "2",
"1001", "aaa");
// "root", "aaa");
#else
int seed = 1000000;
#endif
float expected = 0.1f*seed;
auto solution = kernel(seed);
printf("\nexpected: %f",expected);
printf(", solution: %f\n",solution);
#ifdef ESC_SERVER
return esc_finish(&solution, 1, ESC_TYPE_FLOAT, ESC_ACCURACY_DEFAULT);
#else
return expected == solution;
#endif
}
| [
"[email protected]"
] | |
c20fdab34ac49308f0f30d96696a690bcce054ef | 16d51e1f2a2b220cc6233c9d3860ca863d06b21d | /Source/VoxelGraph/Public/VoxelNodes/VoxelWorldGeneratorSamplerNodes.h | 4dcc441ddb039cf4042e6ee4d79eeb436ee851c4 | [
"MIT"
] | permissive | caseymcc/VoxelPlugin | aa354eff8085645a798c80188ad0a3ae393dfc5d | fd9795dc5980cc72563b991739a19b5294803e79 | refs/heads/master | 2022-12-04T18:27:01.165088 | 2020-08-27T06:29:26 | 2020-08-27T06:29:26 | 290,852,142 | 1 | 0 | MIT | 2020-08-27T18:29:08 | 2020-08-27T18:29:07 | null | UTF-8 | C++ | false | false | 3,781 | h | // Copyright 2020 Phyronnaz
#pragma once
#include "CoreMinimal.h"
#include "VoxelNodeHelper.h"
#include "VoxelNodeHelperMacros.h"
#include "VoxelExposedNodes.h"
#include "VoxelWorldGenerators/VoxelWorldGeneratorPicker.h"
#include "VoxelGraphErrorReporter.h"
#include "VoxelWorldGeneratorSamplerNodes.generated.h"
UCLASS(Abstract, Category = "World Generator")
class VOXELGRAPH_API UVoxelNode_WorldGeneratorSamplerBase : public UVoxelExposedNode
{
GENERATED_BODY()
public:
// Will be sent to world generators. Can be recovered in the generators with the GetCustomData node
UPROPERTY(EditAnywhere, Category = "Config", meta = (ReconstructNode))
TArray<FName> CustomData;
// Seeds to send to the world generators
UPROPERTY(EditAnywhere, Category = "Config", meta = (ReconstructNode))
TArray<FName> Seeds;
//~ Begin UVoxelNode Interface
virtual EVoxelPinCategory GetInputPinCategory(int32 PinIndex) const override;
virtual FName GetInputPinName(int32 PinIndex) const override;
virtual int32 GetMinInputPins() const override;
virtual int32 GetMaxInputPins() const override;
//~ End UVoxelNode Interface
};
UCLASS(Abstract)
class VOXELGRAPH_API UVoxelNode_SingleWorldGeneratorSamplerBase : public UVoxelNode_WorldGeneratorSamplerBase
{
GENERATED_BODY()
public:
UPROPERTY(EditAnywhere, Category = "Config")
FVoxelWorldGeneratorPicker WorldGenerator;
UVoxelNode_SingleWorldGeneratorSamplerBase();
//~ Begin UVoxelNode Interface
virtual void LogErrors(FVoxelGraphErrorReporter& ErrorReporter) override;
virtual FText GetTitle() const override;
//~ End UVoxelNode Interface
#if WITH_EDITOR
//~ Begin UVoxelExposedNode Interface
virtual bool TryImportFromProperty(UProperty* Property, UObject* Object) override;
//~ End UVoxelExposedNode Interface
#endif
};
UCLASS(DisplayName = "Get World Generator Value")
class VOXELGRAPH_API UVoxelNode_GetWorldGeneratorValue : public UVoxelNode_SingleWorldGeneratorSamplerBase
{
GENERATED_BODY()
GENERATED_VOXELNODE_BODY()
UVoxelNode_GetWorldGeneratorValue();
};
UCLASS(DisplayName = "Get World Generator Material")
class VOXELGRAPH_API UVoxelNode_GetWorldGeneratorMaterial : public UVoxelNode_SingleWorldGeneratorSamplerBase
{
GENERATED_BODY()
GENERATED_VOXELNODE_BODY()
UVoxelNode_GetWorldGeneratorMaterial();
};
UCLASS(DisplayName = "Get World Generator Custom Output")
class VOXELGRAPH_API UVoxelNode_GetWorldGeneratorCustomOutput : public UVoxelNode_SingleWorldGeneratorSamplerBase
{
GENERATED_BODY()
GENERATED_VOXELNODE_BODY()
UVoxelNode_GetWorldGeneratorCustomOutput();
UPROPERTY(EditAnywhere, Category = "Config")
FName OutputName = "Value";
//~ Begin UVoxelNode Interface
virtual FText GetTitle() const override;
//~ End UVoxelNode Interface
};
// Read data sent by a previous world generator
UCLASS(DisplayName = "Get Custom Data", Category = "World Generator")
class VOXELGRAPH_API UVoxelNode_GetCustomData : public UVoxelNodeWithContext
{
GENERATED_BODY()
GENERATED_VOXELNODE_BODY()
public:
UPROPERTY(EditAnywhere, Category = "Config")
FName Name;
UVoxelNode_GetCustomData();
//~ Begin UVoxelNode Interface
virtual FText GetTitle() const override;
//~ End UVoxelNode Interface
};
// See if a previous generator set some custom data
UCLASS(DisplayName = "Is Custom Data Set", Category = "World Generator")
class VOXELGRAPH_API UVoxelNode_IsCustomDataSet : public UVoxelNodeWithContext
{
GENERATED_BODY()
GENERATED_VOXELNODE_BODY()
public:
UPROPERTY(EditAnywhere, Category = "Config")
FName Name;
UVoxelNode_IsCustomDataSet();
//~ Begin UVoxelNode Interface
virtual FText GetTitle() const override;
//~ End UVoxelNode Interface
};
| [
"[email protected]"
] | |
c8a376b2ae6dcb449d13f8c00e70658f5409b5a9 | 8ab3e882303250ef5b279418d7916c7036b0a1d9 | /exercises/exercise05/solutions/BoundedBuffer.h | 46acbd4ada46c6c7577565156fe66d30f8eb902f | [] | no_license | PeterSommerlad/CPPCourseExpert | eaac3a0562ef390b259031629d943f82e384b8cd | 84b365c4508c7906f638199115fc2f9597319b4d | refs/heads/main | 2023-06-12T00:31:38.864261 | 2023-05-26T15:51:29 | 2023-05-26T15:51:45 | 470,980,622 | 2 | 2 | null | null | null | null | UTF-8 | C++ | false | false | 4,023 | h | #ifndef BOUNDEDBUFFER_H_
#define BOUNDEDBUFFER_H_
#include <array>
#include <cstddef>
#include <memory>
#include <stdexcept>
#include <utility>
namespace heap_non_default {
template<typename T>
struct BoundedBuffer {
using size_type = size_t;
explicit
BoundedBuffer(size_type max)
:maxsz{checkForZero(max)}
,elements{std::make_unique<std::byte[]>(sizeof(T)*maxsz)}
{}
~BoundedBuffer() {
destroyAllElements();
}
BoundedBuffer(BoundedBuffer &&other) noexcept
: BoundedBuffer{other.maxsz} {
this->swap(other);
}
BoundedBuffer& operator=(BoundedBuffer &&other) & noexcept {
destroyAllElements();
this->swap(other);
return *this;
}
BoundedBuffer(BoundedBuffer const &other)
: maxsz{checkForZero(other.maxsz)}
,elements{std::make_unique<std::byte[]>(sizeof(T)*maxsz)}
{
append_elements(other);
}
BoundedBuffer& operator=(BoundedBuffer const &other){
destroyAllElements();
if (maxsz != other.maxsz){
maxsz = other.maxsz;
elements = std::make_unique<std::byte[]>(sizeof(T)*maxsz);
}
append_elements(other);
return *this;
}
bool empty() const { return size() == 0; }
bool full() const { return size() == maxsz; }
size_type size() const { return count; }
T& front() & {
throwOnEmpty();
return element_at(first);
}
T const& front() const &{
throwOnEmpty();
return element_at(first);
}
T& back() &{
throwOnEmpty();
return element_at(back_index());
}
T const & back() const &{
throwOnEmpty();
return element_at(back_index());
}
void pop() & {
throwOnEmpty();
//front().~T();
std::destroy_at<T>(&element_at(first));
first = (first + 1) % maxsz;
--count;
}
void push(T const &element) & {
if (full()) throw std::logic_error{"buffer full"};
auto pos = (first+count) % maxsz;
//std::ignore = ::new(element_address(pos)) T{element};
std::construct_at<T>(element_address(pos), element);
++count;
}
void push(T && element) & {
if (full()) throw std::logic_error{"buffer full"};
auto pos = (first+count) % maxsz;
//std::ignore = ::new(element_address(pos)) T{std::move(element)};
std::construct_at<T>(element_address(pos), std::move(element) );
++count;
}
template <typename ...Params>
void push_emplace(Params&& ...ps) & {
if (full()) throw std::logic_error{"buffer full"};
auto pos = (first+count) % maxsz;
//std::ignore = ::new(element_address(pos)) T{std::forward<Params>(ps)...};
std::construct_at<T>(element_address(pos), std::forward<Params>(ps)... );
++count;
}
void swap(BoundedBuffer & other) & noexcept {
using std::swap;
swap(elements,other.elements);
swap(first,other.first);
swap(count,other.count);
swap(maxsz,other.maxsz);
}
private:
size_type first {0};
size_type count {0};
size_type maxsz {1};
std::unique_ptr<std::byte[]> elements{};
T* element_address(size_type index) const {
if (index >= maxsz) throw std::out_of_range{"error in BoundedBuffer"};
size_type const byte_index = index * sizeof(T);
return std::launder(reinterpret_cast<T*>(&elements[byte_index]));
}
T & element_at(size_type index){
return *(element_address(index));
}
T const & element_at(size_type index)const{
return *const_cast<T const *>(element_address(index));
}
size_type checkForZero(size_type max){
if (0u == max){
throw std::invalid_argument{"BoundedBuffer: zero size"};
}
return max;
}
size_type back_index() const {
return (first + count - 1) % maxsz;
}
void throwOnEmpty() const {
if (empty()) throw std::logic_error{"buffer empty"};
}
void destroyAllElements() noexcept {
while(! empty()){
pop();
}
}
void append_elements(BoundedBuffer const &other){
for(size_t index=0; index < other.size(); ++index){
this->push(other.element_at((other.first+index)%other.maxsz));
}
}
};
}
#endif /* BOUNDEDBUFFER_H_ */
| [
"[email protected]"
] | |
aa6611925f9b30dd458db648b1db216b1b15b176 | 83a42c32bbf5464f2928876c40983bc082e6dba5 | /W7/Exercise10_1/Exercise10_1/Exercise10_1View.h | 4699608bbe56ef66df2f17bee485787e103e11d7 | [] | no_license | miny2627/MFC | f721dfd0517be93c6e6a3bac44636f15e65e10e6 | 62e9a0cf9b85cb58b0e78bd267c9d675d9023816 | refs/heads/master | 2022-12-15T07:54:45.720837 | 2020-09-15T09:22:12 | 2020-09-15T09:22:12 | 295,334,218 | 0 | 0 | null | null | null | null | UHC | C++ | false | false | 1,226 | h |
// Exercise10_1View.h : CExercise10_1View 클래스의 인터페이스
//
#pragma once
class CExercise10_1View : public CTreeView
{
protected: // serialization에서만 만들어집니다.
CExercise10_1View();
DECLARE_DYNCREATE(CExercise10_1View)
// 특성입니다.
public:
CExercise10_1Doc* GetDocument() const;
// 작업입니다.
public:
// 재정의입니다.
public:
virtual BOOL PreCreateWindow(CREATESTRUCT& cs);
protected:
virtual void OnInitialUpdate(); // 생성 후 처음 호출되었습니다.
// 구현입니다.
public:
virtual ~CExercise10_1View();
#ifdef _DEBUG
virtual void AssertValid() const;
virtual void Dump(CDumpContext& dc) const;
#endif
protected:
// 생성된 메시지 맵 함수
protected:
afx_msg void OnFilePrintPreview();
afx_msg void OnRButtonUp(UINT nFlags, CPoint point);
afx_msg void OnContextMenu(CWnd* pWnd, CPoint point);
DECLARE_MESSAGE_MAP()
public:
HTREEITEM m_hRoot;
HTREEITEM m_hSelectedNode;
afx_msg void OnTvnSelchanged(NMHDR *pNMHDR, LRESULT *pResult);
};
#ifndef _DEBUG // Exercise10_1View.cpp의 디버그 버전
inline CExercise10_1Doc* CExercise10_1View::GetDocument() const
{ return reinterpret_cast<CExercise10_1Doc*>(m_pDocument); }
#endif
| [
"[email protected]"
] | |
b312fb8d7c205aada3cc369f080f5eb613003da5 | 90801f3b268270b21b5de8065cdbdbf4c0147e39 | /Source/Common/Constants/Menu/MenuConstants.cpp | 0d28ca32e53e2533e75ca66e2253d061642b381c | [] | no_license | gord0185/FINAL_ASSIGNMENT | 9d6f69da57807971c83ff5f31697fbc3e678f6f7 | d9b6f99be353e266cc26eee4ddcf7bc9618d1d48 | refs/heads/master | 2020-05-17T12:32:32.929169 | 2013-12-12T20:46:41 | 2013-12-12T20:46:41 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 779 | cpp | //
// MenuConstants.cpp
// GAM-1514 OSX Game
//
// Created by Bradley Flood on 2013-10-08.
// Copyright (c) 2013 Algonquin College. All rights reserved.
//
#include "MenuConstants.h"
const float UI_SIDE_MENU_SPEED = 750.0f;
const float MENU_TITLE_Y_PERCENTAGE = 0.078125f;
const float MENU_ITEMS_STARTING_Y_PERCENTAGE = 0.3527f;
const float MENU_ITEMS_SPACER_PERCENTAGE = 0.171875f;
const char* MAIN_MENU_SCREEN_NAME = "MainMenu";
const char* SPLASH_SCREEN_NAME = "Splash";
const char* LEVEL_SELECT_SCREEN_NAME = "LevelSelect";
const char* GAME_SETTINGS_SCREEN_NAME = "GameSettings";
const char* HIGH_SCORE_SCREEN_NAME = "HighScore";
const char* PAUSE_SCREEN_NAME = "Pause";
const char* VICTORY_SCREEN_NAME = "Victory";
const char* DEFEAT_SCREEN_NAME = "Defeat";
| [
"[email protected]"
] | |
62d6a21129a782a7fbf05090bdc4ff3f87069f70 | b1aa27b66c3c4136ad09470f1bbe065674475ac5 | /Engine/Scene/include/SceneManager.h | 3f8407609719cf7821465c29557ded326ea8edff | [
"BSD-2-Clause"
] | permissive | LiangYue1981816/AresEngine | 489ab0ed977c36327343797dd1499f56f434e06f | c1cf040a1dffaf2bc585ed75e70ddd9322fe3f67 | refs/heads/master | 2021-06-27T06:18:17.253841 | 2020-05-15T04:37:02 | 2020-05-15T04:37:02 | 148,959,938 | 3 | 1 | null | null | null | null | UTF-8 | C++ | false | false | 1,592 | h | #pragma once
#include "PreHeader.h"
#include "ComponentManager.h"
#include "Component.h"
#include "ComponentMesh.h"
#include "ComponentSkin.h"
#include "ComponentParticle.h"
#include "ComponentPointLight.h"
#include "Scene.h"
#include "SceneNode.h"
class CALL_API CSceneManager
{
friend class CEngine;
private:
CSceneManager(void);
virtual ~CSceneManager(void);
public:
uint32_t GetNextNodeName(void) const;
uint32_t GetNextComponentMeshName(void) const;
uint32_t GetNextComponentSkinName(void) const;
uint32_t GetNextComponentParticleName(void) const;
uint32_t GetNextComponentPointLightName(void) const;
public:
CScene* CreateScene(uint32_t name);
void DestroyScene(CScene* pScene);
public:
CSceneNode* CreateNode(uint32_t name);
void DestroyNode(CSceneNode* pNode);
public:
CComponentMeshPtr CreateComponentMesh(uint32_t name);
CComponentSkinPtr CreateComponentSkin(uint32_t name);
CComponentParticlePtr CreateComponentParticle(uint32_t name);
CComponentPointLightPtr CreateComponentPointLight(uint32_t name);
public:
void UpdateLogic(CTaskGraph& taskGraph, float totalTime, float deltaTime);
void UpdateCamera(CTaskGraph& taskGraph, CGfxCamera* pCamera, CRenderQueue* pRenderQueue, uint32_t mask, bool bComputeLOD);
private:
eastl::unordered_map<uint32_t, CScene*> m_pScenes;
eastl::unordered_map<uint32_t, CSceneNode*> m_pNodes;
CComponentManager<CComponentMesh> m_meshManager;
CComponentManager<CComponentSkin> m_skinManager;
CComponentManager<CComponentParticle> m_particleManager;
CComponentManager<CComponentPointLight> m_pointLightManager;
};
| [
"[email protected]"
] | |
d5340bd591b85676689e3791d24fc0184d19d169 | d2a3870cca3eaef6fc5c998fb2d724c9416cb0cd | /src/utility/w5500.cpp | 133ed0b64219dc1995bb941ab09a8d2624eeec94 | [] | no_license | d-a-v/W5500lwIP | 17897bc2c9e822931213b041c1bfc7d36349e9b0 | 6e69025eb85511c1386af3ff625b218659820e1c | refs/heads/master | 2021-06-24T17:26:43.616849 | 2020-12-22T21:56:09 | 2020-12-22T21:56:09 | 132,465,686 | 42 | 12 | null | 2019-06-20T09:27:55 | 2018-05-07T13:37:36 | C++ | UTF-8 | C++ | false | false | 9,306 | cpp | /*
* Copyright (c) 2013, WIZnet Co., Ltd.
* Copyright (c) 2016, Nicholas Humfrey
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
// original sources: https://github.com/njh/W5500MacRaw
#include <SPI.h>
#include "w5500.h"
uint8_t Wiznet5500::wizchip_read(uint8_t block, uint16_t address)
{
uint8_t ret;
wizchip_cs_select();
block |= AccessModeRead;
wizchip_spi_write_byte((address & 0xFF00) >> 8);
wizchip_spi_write_byte((address & 0x00FF) >> 0);
wizchip_spi_write_byte(block);
ret = wizchip_spi_read_byte();
wizchip_cs_deselect();
return ret;
}
uint16_t Wiznet5500::wizchip_read_word(uint8_t block, uint16_t address)
{
return ((uint16_t)wizchip_read(block, address) << 8) + wizchip_read(block, address + 1);
}
void Wiznet5500::wizchip_read_buf(uint8_t block, uint16_t address, uint8_t* pBuf, uint16_t len)
{
uint16_t i;
wizchip_cs_select();
block |= AccessModeRead;
wizchip_spi_write_byte((address & 0xFF00) >> 8);
wizchip_spi_write_byte((address & 0x00FF) >> 0);
wizchip_spi_write_byte(block);
for(i = 0; i < len; i++)
pBuf[i] = wizchip_spi_read_byte();
wizchip_cs_deselect();
}
void Wiznet5500::wizchip_write(uint8_t block, uint16_t address, uint8_t wb)
{
wizchip_cs_select();
block |= AccessModeWrite;
wizchip_spi_write_byte((address & 0xFF00) >> 8);
wizchip_spi_write_byte((address & 0x00FF) >> 0);
wizchip_spi_write_byte(block);
wizchip_spi_write_byte(wb);
wizchip_cs_deselect();
}
void Wiznet5500::wizchip_write_word(uint8_t block, uint16_t address, uint16_t word)
{
wizchip_write(block, address, (uint8_t)(word>>8));
wizchip_write(block, address+1, (uint8_t) word);
}
void Wiznet5500::wizchip_write_buf(uint8_t block, uint16_t address, const uint8_t* pBuf, uint16_t len)
{
uint16_t i;
wizchip_cs_select();
block |= AccessModeWrite;
wizchip_spi_write_byte((address & 0xFF00) >> 8);
wizchip_spi_write_byte((address & 0x00FF) >> 0);
wizchip_spi_write_byte(block);
for(i = 0; i < len; i++)
wizchip_spi_write_byte(pBuf[i]);
wizchip_cs_deselect();
}
void Wiznet5500::setSn_CR(uint8_t cr) {
// Write the command to the Command Register
wizchip_write(BlockSelectSReg, Sn_CR, cr);
// Now wait for the command to complete
while( wizchip_read(BlockSelectSReg, Sn_CR) );
}
uint16_t Wiznet5500::getSn_TX_FSR()
{
uint16_t val=0,val1=0;
do
{
val1 = wizchip_read_word(BlockSelectSReg, Sn_TX_FSR);
if (val1 != 0)
{
val = wizchip_read_word(BlockSelectSReg, Sn_TX_FSR);
}
} while (val != val1);
return val;
}
uint16_t Wiznet5500::getSn_RX_RSR()
{
uint16_t val=0,val1=0;
do
{
val1 = wizchip_read_word(BlockSelectSReg, Sn_RX_RSR);
if (val1 != 0)
{
val = wizchip_read_word(BlockSelectSReg, Sn_RX_RSR);
}
} while (val != val1);
return val;
}
void Wiznet5500::wizchip_send_data(const uint8_t *wizdata, uint16_t len)
{
uint16_t ptr = 0;
if(len == 0) return;
ptr = getSn_TX_WR();
wizchip_write_buf(BlockSelectTxBuf, ptr, wizdata, len);
ptr += len;
setSn_TX_WR(ptr);
}
void Wiznet5500::wizchip_recv_data(uint8_t *wizdata, uint16_t len)
{
uint16_t ptr;
if(len == 0) return;
ptr = getSn_RX_RD();
wizchip_read_buf(BlockSelectRxBuf, ptr, wizdata, len);
ptr += len;
setSn_RX_RD(ptr);
}
void Wiznet5500::wizchip_recv_ignore(uint16_t len)
{
uint16_t ptr;
ptr = getSn_RX_RD();
ptr += len;
setSn_RX_RD(ptr);
}
void Wiznet5500::wizchip_sw_reset()
{
setMR(MR_RST);
getMR(); // for delay
setSHAR(_mac_address);
}
int8_t Wiznet5500::wizphy_getphylink()
{
int8_t tmp;
if(getPHYCFGR() & PHYCFGR_LNK_ON)
tmp = PHY_LINK_ON;
else
tmp = PHY_LINK_OFF;
return tmp;
}
int8_t Wiznet5500::wizphy_getphypmode()
{
int8_t tmp = 0;
if(getPHYCFGR() & PHYCFGR_OPMDC_PDOWN)
tmp = PHY_POWER_DOWN;
else
tmp = PHY_POWER_NORM;
return tmp;
}
void Wiznet5500::wizphy_reset()
{
uint8_t tmp = getPHYCFGR();
tmp &= PHYCFGR_RST;
setPHYCFGR(tmp);
tmp = getPHYCFGR();
tmp |= ~PHYCFGR_RST;
setPHYCFGR(tmp);
}
int8_t Wiznet5500::wizphy_setphypmode(uint8_t pmode)
{
uint8_t tmp = 0;
tmp = getPHYCFGR();
if((tmp & PHYCFGR_OPMD)== 0) return -1;
tmp &= ~PHYCFGR_OPMDC_ALLA;
if( pmode == PHY_POWER_DOWN)
tmp |= PHYCFGR_OPMDC_PDOWN;
else
tmp |= PHYCFGR_OPMDC_ALLA;
setPHYCFGR(tmp);
wizphy_reset();
tmp = getPHYCFGR();
if( pmode == PHY_POWER_DOWN)
{
if(tmp & PHYCFGR_OPMDC_PDOWN) return 0;
}
else
{
if(tmp & PHYCFGR_OPMDC_ALLA) return 0;
}
return -1;
}
Wiznet5500::Wiznet5500(SPIClass& spi, int8_t cs, int8_t intr):
_spi(spi), _cs(cs)
{
(void)intr;
}
boolean Wiznet5500::begin(const uint8_t *mac_address)
{
memcpy(_mac_address, mac_address, 6);
pinMode(_cs, OUTPUT);
wizchip_cs_deselect();
#if 0
_spi.begin();
_spi.setClockDivider(SPI_CLOCK_DIV4); // 4 MHz?
_spi.setBitOrder(MSBFIRST);
_spi.setDataMode(SPI_MODE0);
#endif
wizchip_sw_reset();
// Use the full 16Kb of RAM for Socket 0
setSn_RXBUF_SIZE(16);
setSn_TXBUF_SIZE(16);
// Set our local MAC address
setSHAR(_mac_address);
// Open Socket 0 in MACRaw mode
setSn_MR(Sn_MR_MACRAW);
setSn_CR(Sn_CR_OPEN);
if (getSn_SR() != SOCK_MACRAW) {
// Failed to put socket 0 into MACRaw mode
return false;
}
// Success
return true;
}
void Wiznet5500::end()
{
setSn_CR(Sn_CR_CLOSE);
// clear all interrupt of the socket
setSn_IR(0xFF);
// Wait for socket to change to closed
while(getSn_SR() != SOCK_CLOSED);
}
uint16_t Wiznet5500::readFrame(uint8_t *buffer, uint16_t bufsize)
{
uint16_t data_len = readFrameSize();
if (data_len == 0)
return 0;
if (data_len > bufsize)
{
// Packet is bigger than buffer - drop the packet
discardFrame(data_len);
return 0;
}
return readFrameData(buffer, data_len);
}
uint16_t Wiznet5500::readFrameSize()
{
uint16_t len = getSn_RX_RSR();
if (len == 0)
return 0;
uint8_t head[2];
uint16_t data_len=0;
wizchip_recv_data(head, 2);
setSn_CR(Sn_CR_RECV);
data_len = head[0];
data_len = (data_len<<8) + head[1];
data_len -= 2;
return data_len;
}
void Wiznet5500::discardFrame(uint16_t framesize)
{
wizchip_recv_ignore(framesize);
setSn_CR(Sn_CR_RECV);
}
uint16_t Wiznet5500::readFrameData(uint8_t *buffer, uint16_t framesize)
{
wizchip_recv_data(buffer, framesize);
setSn_CR(Sn_CR_RECV);
// Had problems with W5500 MAC address filtering (the Sn_MR_MFEN option)
// Do it in software instead:
if ((buffer[0] & 0x01) || memcmp(&buffer[0], _mac_address, 6) == 0)
{
// Addressed to an Ethernet multicast address or our unicast address
return framesize;
} else {
return 0;
}
}
uint16_t Wiznet5500::sendFrame(const uint8_t *buf, uint16_t len)
{
// Wait for space in the transmit buffer
while(1)
{
uint16_t freesize = getSn_TX_FSR();
if(getSn_SR() == SOCK_CLOSED) {
return -1;
}
if (len <= freesize) break;
};
wizchip_send_data(buf, len);
setSn_CR(Sn_CR_SEND);
while(1)
{
uint8_t tmp = getSn_IR();
if (tmp & Sn_IR_SENDOK)
{
setSn_IR(Sn_IR_SENDOK);
// Packet sent ok
break;
}
else if (tmp & Sn_IR_TIMEOUT)
{
setSn_IR(Sn_IR_TIMEOUT);
// There was a timeout
return -1;
}
}
return len;
}
| [
"[email protected]"
] | |
7e473da12206f46a0c85a4c1065f7bf92f681448 | 3ac997391aa9b625dd41a50fdf33efca4fbdfe74 | /src/lib/dll/lib_win/bins/obj_fast_joint_vs_bin.cpp | b356c244771dca01fbb48f9f95ef3a858ef07d30 | [] | no_license | kuina/Kuin | 1f61556a680d28843457392226bf41152d8fb8c5 | b63a042e88a279f356ac85455113a957b6c98fe6 | refs/heads/develop | 2023-07-19T06:52:50.689013 | 2022-01-01T07:27:39 | 2022-01-01T07:27:39 | 76,501,549 | 310 | 36 | null | 2023-01-28T15:32:54 | 2016-12-14T22:16:02 | C++ | UTF-8 | C++ | false | false | 22,281 | cpp | #include "../../common.h"
const U8* GetObjFastJointVsBin(size_t* size)
{
static const U8 obj_fast_joint_vs_bin[0x00000E3C] =
{
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0xA6, 0x09, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0xA6, 0x09, 0x10, 0x80, 0x41, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x0A, 0x82, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00,
0x1A, 0x00, 0x10, 0x80, 0x41, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x0A,
0x32, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x66, 0x0A, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x16, 0x05, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, 0x26, 0x0A, 0x10, 0x80, 0x41, 0x00, 0x00, 0x00,
0x04, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x0A, 0x22, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3F, 0x00, 0x00, 0x80, 0x3F, 0x00, 0x00, 0x80, 0x3F,
0x00, 0x00, 0x80, 0x3F, 0x3A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x07, 0x82, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00,
0x2A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x0A, 0x82, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00,
0x00, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x80, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x07, 0x12, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00,
0x00, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x0A, 0x12, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00,
0x2A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x80, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x07, 0x22, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00,
0x0A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x07, 0x12, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00,
0x03, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x0A, 0x12, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00,
0x2A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x80, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x08, 0x52, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00,
0xF6, 0x0C, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x80, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x07, 0x22, 0x20, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00,
0x46, 0x02, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x46, 0x12, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x08, 0x32, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00,
0x02, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x80, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0x42, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00,
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0x38, 0x00, 0x00, 0x07, 0x32, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0xC6, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05,
0x82, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x07, 0x12, 0x20, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x86, 0x03, 0x10, 0x00,
0x03, 0x00, 0x00, 0x00, 0x46, 0x12, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0x42, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00,
0x10, 0x00, 0x00, 0x07, 0x42, 0x20, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x66, 0x0B, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x46, 0x12, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01,
0x53, 0x54, 0x41, 0x54, 0x74, 0x00, 0x00, 0x00, 0x4A, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x44, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
};
*size = 0x00000E3C;
return obj_fast_joint_vs_bin;
}
| [
"[email protected]"
] | |
be508187af76c215538e455162e0e12f83c70967 | 2df5ce3ab049cb46fd99b0750a4f57cf5397a940 | /src/godotmation_state.hpp | 88248c606e62ab7f95c6aecf038af4046d59cc72 | [
"MIT"
] | permissive | arastoul/GodotMationCpp | 68cf84f7803256762b11d2d919dd7eb98c980a43 | d05b157b420688e1ffae9a49de80b26da21ab41f | refs/heads/master | 2022-02-01T19:13:06.407005 | 2018-06-22T07:18:56 | 2018-06-22T07:18:56 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 669 | hpp | #ifndef GODOTMATION_STATE_H
#define GODOTMATION_STATE_H
#include "godotmation_base_node.hpp"
class GodotMation_State : public GodotMation_Node{
public:
GodotMation_State();
~GodotMation_State();
float state_number = 0.0f;
int other_number = 0;
int used = false;
int state_type = 0;
GodotMation_Node *start_node = nullptr;
GodotMation_Node *end_node = nullptr;
virtual bool trigger();
virtual bool trigger(int);
virtual void change_input_state(int);
virtual void change_output_state(int);
virtual void apply_state();
virtual void convert_label();
virtual void get_label_data(godot::String);
};
#endif | [
"[email protected]"
] | |
96adbd1753ab3419986b10d0b9211c95859b94c2 | 6d10fe5390cd86afa363df24bb160176fc5b946e | /src/qt/askpassphrasedialog.h | 7d191a6562e52f913646c0a408d030630965660e | [
"MIT"
] | permissive | LongRail/grvs | 7196df10f65b31c24508b9d9546cf0cf170bdcb6 | 4e3e13cfc1f74a65e6c1e9c2c6341f1ab90ef376 | refs/heads/master | 2020-04-11T23:41:38.331326 | 2018-11-14T16:24:34 | 2018-11-14T16:24:34 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 2,264 | h | // Copyright (c) 2011-2013 The Bitcoin developers
// Copyright (c) 2017-2018 The PIVX developers
// Copyright (c) 2018 The GRVS developers
// Distributed under the MIT/X11 software license, see the accompanying
// file COPYING or http://www.opensource.org/licenses/mit-license.php.
#ifndef BITCOIN_QT_ASKPASSPHRASEDIALOG_H
#define BITCOIN_QT_ASKPASSPHRASEDIALOG_H
#include <QDialog>
class WalletModel;
namespace Ui
{
class AskPassphraseDialog;
}
/** Multifunctional dialog to ask for passphrases. Used for encryption, unlocking, and changing the passphrase.
*/
class AskPassphraseDialog : public QDialog
{
Q_OBJECT
public:
enum class Mode {
Encrypt, /**< Ask passphrase twice and encrypt */
UnlockAnonymize, /**< Ask passphrase and unlock only for anonymization */
Unlock, /**< Ask passphrase and unlock */
ChangePass, /**< Ask old passphrase + new passphrase twice */
Decrypt /**< Ask passphrase and decrypt wallet */
};
// Context from where / for what the passphrase dialog was called to set the status of the checkbox
// Partly redundant to Mode above, but offers more flexibility for future enhancements
enum class Context {
Unlock_Menu, /** Unlock wallet from menu */
Unlock_Full, /** Wallet needs to be fully unlocked */
Encrypt, /** Encrypt unencrypted wallet */
ToggleLock, /** Toggle wallet lock state */
ChangePass, /** Change passphrase */
Send_GRVS, /** Send GRVS */
Send_zGRVS, /** Send zGRVS */
Mint_zGRVS, /** Mint zGRVS */
BIP_38, /** BIP38 menu */
Multi_Sig, /** Multi-Signature dialog */
Sign_Message /** Sign/verify message dialog */
};
explicit AskPassphraseDialog(Mode mode, QWidget* parent, WalletModel* model, Context context);
~AskPassphraseDialog();
void accept();
private:
Ui::AskPassphraseDialog* ui;
Mode mode;
WalletModel* model;
Context context;
bool fCapsLock;
private slots:
void textChanged();
protected:
bool event(QEvent* event);
bool eventFilter(QObject* object, QEvent* event);
};
#endif // BITCOIN_QT_ASKPASSPHRASEDIALOG_H
| [
"[email protected]"
] | |
6cafbd278d55d03a65ec13ad93c89d69bdba1db5 | adbf3ae9a2c8db8c60dd12efe3612e360f833da3 | /Algorithm in Cpp/Merge Sort.cpp | 318feb51bc8a5d162f32ca0be5d326ad815514ca | [
"MIT"
] | permissive | mdabdullahibnaharun/Algorithms | 74369bf071361b536c3469d7e3036cbc9eca95e8 | a64763d1609af5f1a1b6b1ac0ee52910f23952e1 | refs/heads/main | 2023-04-09T18:09:30.472063 | 2021-04-26T03:02:09 | 2021-04-26T03:02:09 | 327,311,867 | 5 | 1 | MIT | 2021-03-23T10:56:14 | 2021-01-06T12:57:02 | C++ | UTF-8 | C++ | false | false | 2,732 | cpp | #include<iostream>
#include<algorithm>
#include<stdio.h>
#include<conio.h>
#include<string.h>
using namespace std;
#define MAX_ELEMENTS 50
#define TRUE 1
#define FALSE 0
void mergeSort(int array[],int minElement,int maxElement);
void sortUtil(int array[],int size,int topElement,int botElement);
int main()
{
int i = 0,
totalelements = 0,
array[MAX_ELEMENTS];
system("cls");
printf("\nHow many elements : " );
scanf("%d",&totalelements);
printf("\nEnter %d elements : \n",totalelements);
for(i = 0 ; i < totalelements ; ++i)
{
printf(" Element #%d : ",i+1);
scanf("%d",&array[i]);
}
i = 0;
/*call mergeSort() to sort array*/
mergeSort(array,i,totalelements - 1);
printf("\nAfter Sorting : \n");
for(i = 0 ; i < totalelements ; ++i)
{
printf("%3d",array[i]);
}
putchar('\n');
getch();
return 0;
}
/**
Function : mergeSort()
This function will be called recursively to sort the given array.
Note:
Since the function is calling recursively , First half sorted first, then it works for the second half
**/
void mergeSort(int array[MAX_ELEMENTS],int minElement,int maxElement)
{
int half;
if(minElement != maxElement)
{
half = (minElement+maxElement)/2;
/*call mergeSort() recursively for the first half*/
mergeSort(array,minElement,half);
/*call mergeSort() recursively for the second half*/
mergeSort(array,half+1,maxElement);
sortUtil(array,half,minElement,maxElement);
}
}
/**
Function : sortUtil()
This function will be called by mergeSort() to sort the given array
**/
void sortUtil(int array[MAX_ELEMENTS],int size,int topElement,int botElement)
{
int i =0,
tempSize = size+1,
lowerBound = topElement,
upperBound = topElement,
tempArray[MAX_ELEMENTS];
while((lowerBound <= size) && (tempSize <= botElement))
{
if(array[lowerBound] <= array[tempSize])
{
tempArray[upperBound] = array[lowerBound];
lowerBound += 1 ;
}
else
{
tempArray[upperBound] = array[tempSize];
tempSize += 1 ;
}
upperBound += 1;
}
if(lowerBound <= size)
{
for( ; lowerBound <= size ; lowerBound++)
{
tempArray[upperBound] = array[lowerBound];
upperBound += 1;
}
}
else
{
for( ; tempSize <= botElement ; tempSize++)
{
tempArray[upperBound] = array[tempSize];
upperBound += 1;
}
}
for( i = topElement ; i<= botElement ; i++)
{
array[i] = tempArray[i];
}
return;
}
| [
"[email protected]"
] | |
39ec5767ba6fab31f63d95025824cd8ad61404cd | 53764943bdb754f4351d2ff08beca7c68cff9601 | /include/record.h | 04253498ba35a099417c53d180d78d678b79b6c3 | [] | no_license | orcchg/MoneyWatcherAlpha | b8cd7bf736c176faecda144c0f9da63f7b98ba80 | 0c47f61e608939faddf61881d770bcee16c3bf70 | refs/heads/master | 2021-01-20T03:59:17.166438 | 2016-01-06T08:54:18 | 2016-01-06T08:54:18 | 41,607,625 | 2 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,606 | h | /*
* Record.h
*
* Description: Record class declaration.
*
* Created on: 08.09.2013
* Author: Maxim Alov <[email protected]>
*/
#ifndef RECORD_H_
#define RECORD_H_
#include <string>
#include "common.h"
#include "datetime.h"
#include "status.h"
#include "types.h"
#include "unistring.h"
namespace mw {
/// @class Record
/// @brief Represents a single record in Daily Table.
class Record {
public:
Record(
const ID_t& id = -1,
const MoneyValue_t& balance = 0,
const WrappedString& description = "",
const RecordStatus& status = RecordStatusValue::RSV_UNKNOWN,
const DateTime& datetime = DateTime());
virtual ~Record();
/// -------------------------------------------------------------------------
/// @defgroup GET Getters for class members.
/// @{
/// @brief Gets an ID of the current record.
ID_t getID() const;
/// @brief Gets an actual money balance of the current record.
const MoneyValue_t& getBalance() const;
/// @brief Gets the descriptive comment supplied with the
/// current record.
const WrappedString& getDescription() const;
/// @brief Gets the date and the clock time, when the current record
/// has been created.
const DateTime& getDateTime() const;
/// @brief Gets the status of the current record.
const RecordStatus& getStatus() const;
/// @}
/// -------------------------------------------------------------------------
private:
ID_t m_id;
MoneyValue_t m_balance;
WrappedString m_description;
DateTime m_datetime;
RecordStatus m_status;
};
} /* namespace mw */
#endif /* RECORD_H_ */
| [
"[email protected]"
] | |
057b11da88edc18f4845b21d589245ad84ca16e8 | 1e436cba112a48e7f0988a5c6b7cf1cfb0d2cdcb | /Event/AEMode.h | 1467df612736f7685ecedbd0b7c50f862b61a197 | [] | no_license | arnozeng/Development-of-Canoncamera | 33c87a4f175d5a5de49fe337e600791f9e6319ca | 92481ac859a798bafc563244f077505e752fcb90 | refs/heads/master | 2023-05-31T10:16:17.524277 | 2021-06-28T04:15:31 | 2021-06-28T04:15:31 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,325 | h | #pragma once
#include "Observer.h"
#include "ActionSource.h"
#include "CameraEvent.h"
#include "CameraController.h"
typedef void(CALLBACK *AECALLBACK)(EdsPropertyDesc AEDesc,EdsUInt32 Tv,LPARAM lParam);
class CAEMode : public ActionSource , public Observer
{
public:
CAEMode()
{
_AEDesc.access=0;
_AEDesc.form=0;
_AEDesc.numElements=0;
memset(&_AEDesc.propDesc, 0, sizeof(_AEDesc.propDesc));
_AEMode=0;
}
public:
CameraModel* _model;
void SetCameraModel(CameraModel* model){_model=model;}
AECALLBACK _aestate;
LPARAM _lParam;
EdsPropertyDesc _AEDesc;
EdsUInt32 _AEMode;
void SetCallback(AECALLBACK aestate,LPARAM lParam){_aestate=aestate;_lParam=lParam;}
public:
void update(Observable* from, CameraEvent *e)
{
std::string event = e->getEvent();
//Update property
if(event == "PropertyChanged")
{
EdsInt32 propertyID = *static_cast<EdsInt32 *>(e->getArg());
if(propertyID == kEdsPropID_AEModeSelect)
{
_AEMode=_model->getAEMode();
_aestate(_AEDesc,_AEMode,_lParam);
}
}
//Update of list that can set property
if(event == "PropertyDescChanged")
{
EdsInt32 propertyID = *static_cast<EdsInt32 *>(e->getArg());
if(propertyID == kEdsPropID_AEModeSelect)
{
_AEDesc=_model->getAEModeDesc();
_aestate(_AEDesc,_AEMode,_lParam);
}
}
}
}; | [
"[email protected]"
] | |
49911efe31079d8896d85a217fa6fb8b8da69e52 | a15950e54e6775e6f7f7004bb90a5585405eade7 | /chrome/browser/page_load_metrics/metrics_web_contents_observer_unittest.cc | fa36234aa7bd5e796ec0f4cb0339be4162dfc72c | [
"BSD-3-Clause"
] | permissive | whycoding126/chromium | 19f6b44d0ec3e4f1b5ef61cc083cae587de3df73 | 9191e417b00328d59a7060fa6bbef061a3fe4ce4 | refs/heads/master | 2023-02-26T22:57:28.582142 | 2018-04-09T11:12:57 | 2018-04-09T11:12:57 | 128,760,157 | 1 | 0 | null | 2018-04-09T11:17:03 | 2018-04-09T11:17:03 | null | UTF-8 | C++ | false | false | 50,398 | cc | // Copyright 2015 The Chromium Authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
#include "chrome/browser/page_load_metrics/metrics_web_contents_observer.h"
#include <memory>
#include <vector>
#include "base/macros.h"
#include "base/memory/weak_ptr.h"
#include "base/process/kill.h"
#include "base/test/histogram_tester.h"
#include "base/time/time.h"
#include "base/timer/mock_timer.h"
#include "chrome/browser/page_load_metrics/metrics_navigation_throttle.h"
#include "chrome/browser/page_load_metrics/page_load_metrics_embedder_interface.h"
#include "chrome/browser/page_load_metrics/page_load_metrics_observer.h"
#include "chrome/browser/page_load_metrics/page_load_tracker.h"
#include "chrome/common/page_load_metrics/test/weak_mock_timer.h"
#include "chrome/common/url_constants.h"
#include "chrome/test/base/chrome_render_view_host_test_harness.h"
#include "content/public/browser/navigation_handle.h"
#include "content/public/browser/render_frame_host.h"
#include "content/public/test/navigation_simulator.h"
#include "content/public/test/test_renderer_host.h"
#include "content/public/test/web_contents_tester.h"
#include "net/base/net_errors.h"
#include "testing/gtest/include/gtest/gtest.h"
#include "url/gurl.h"
using content::NavigationSimulator;
namespace page_load_metrics {
namespace {
const char kDefaultTestUrl[] = "https://google.com/";
const char kDefaultTestUrlAnchor[] = "https://google.com/#samedocument";
const char kDefaultTestUrl2[] = "https://whatever.com/";
const char kFilteredStartUrl[] = "https://whatever.com/ignore-on-start";
const char kFilteredCommitUrl[] = "https://whatever.com/ignore-on-commit";
// Simple PageLoadMetricsObserver that copies observed PageLoadTimings into the
// provided std::vector, so they can be analyzed by unit tests.
class TestPageLoadMetricsObserver : public PageLoadMetricsObserver {
public:
TestPageLoadMetricsObserver(
std::vector<mojom::PageLoadTimingPtr>* updated_timings,
std::vector<mojom::PageLoadTimingPtr>* updated_subframe_timings,
std::vector<mojom::PageLoadTimingPtr>* complete_timings,
std::vector<ExtraRequestCompleteInfo>* loaded_resources,
std::vector<GURL>* observed_committed_urls)
: updated_timings_(updated_timings),
updated_subframe_timings_(updated_subframe_timings),
complete_timings_(complete_timings),
loaded_resources_(loaded_resources),
observed_committed_urls_(observed_committed_urls) {}
ObservePolicy OnStart(content::NavigationHandle* navigation_handle,
const GURL& currently_committed_url,
bool started_in_foreground) override {
observed_committed_urls_->push_back(currently_committed_url);
return CONTINUE_OBSERVING;
}
void OnTimingUpdate(bool is_subframe,
const mojom::PageLoadTiming& timing,
const PageLoadExtraInfo& extra_info) override {
if (is_subframe)
updated_subframe_timings_->push_back(timing.Clone());
else
updated_timings_->push_back(timing.Clone());
}
void OnComplete(const mojom::PageLoadTiming& timing,
const PageLoadExtraInfo& extra_info) override {
complete_timings_->push_back(timing.Clone());
}
ObservePolicy FlushMetricsOnAppEnterBackground(
const mojom::PageLoadTiming& timing,
const PageLoadExtraInfo& extra_info) override {
return STOP_OBSERVING;
}
void OnLoadedResource(
const ExtraRequestCompleteInfo& extra_request_complete_info) override {
loaded_resources_->emplace_back(extra_request_complete_info);
}
private:
std::vector<mojom::PageLoadTimingPtr>* const updated_timings_;
std::vector<mojom::PageLoadTimingPtr>* const updated_subframe_timings_;
std::vector<mojom::PageLoadTimingPtr>* const complete_timings_;
std::vector<ExtraRequestCompleteInfo>* const loaded_resources_;
std::vector<GURL>* const observed_committed_urls_;
};
// Test PageLoadMetricsObserver that stops observing page loads with certain
// substrings in the URL.
class FilteringPageLoadMetricsObserver : public PageLoadMetricsObserver {
public:
explicit FilteringPageLoadMetricsObserver(
std::vector<GURL>* completed_filtered_urls)
: completed_filtered_urls_(completed_filtered_urls) {}
ObservePolicy OnStart(content::NavigationHandle* handle,
const GURL& currently_committed_url,
bool started_in_foreground) override {
const bool should_ignore =
handle->GetURL().spec().find("ignore-on-start") != std::string::npos;
return should_ignore ? STOP_OBSERVING : CONTINUE_OBSERVING;
}
ObservePolicy OnCommit(content::NavigationHandle* handle,
ukm::SourceId source_id) override {
const bool should_ignore =
handle->GetURL().spec().find("ignore-on-commit") != std::string::npos;
return should_ignore ? STOP_OBSERVING : CONTINUE_OBSERVING;
}
void OnComplete(const mojom::PageLoadTiming& timing,
const PageLoadExtraInfo& extra_info) override {
completed_filtered_urls_->push_back(extra_info.url);
}
private:
std::vector<GURL>* const completed_filtered_urls_;
};
class TestPageLoadMetricsEmbedderInterface
: public PageLoadMetricsEmbedderInterface,
public test::WeakMockTimerProvider {
public:
TestPageLoadMetricsEmbedderInterface() : is_ntp_(false) {}
bool IsNewTabPageUrl(const GURL& url) override { return is_ntp_; }
void set_is_ntp(bool is_ntp) { is_ntp_ = is_ntp; }
void RegisterObservers(PageLoadTracker* tracker) override {
tracker->AddObserver(std::make_unique<TestPageLoadMetricsObserver>(
&updated_timings_, &updated_subframe_timings_, &complete_timings_,
&loaded_resources_, &observed_committed_urls_));
tracker->AddObserver(std::make_unique<FilteringPageLoadMetricsObserver>(
&completed_filtered_urls_));
}
std::unique_ptr<base::Timer> CreateTimer() override {
auto timer = std::make_unique<test::WeakMockTimer>();
SetMockTimer(timer->AsWeakPtr());
return std::move(timer);
}
const std::vector<mojom::PageLoadTimingPtr>& updated_timings() const {
return updated_timings_;
}
const std::vector<mojom::PageLoadTimingPtr>& complete_timings() const {
return complete_timings_;
}
const std::vector<mojom::PageLoadTimingPtr>& updated_subframe_timings()
const {
return updated_subframe_timings_;
}
// currently_committed_urls passed to OnStart().
const std::vector<GURL>& observed_committed_urls_from_on_start() const {
return observed_committed_urls_;
}
const std::vector<ExtraRequestCompleteInfo>& loaded_resources() const {
return loaded_resources_;
}
// committed URLs passed to FilteringPageLoadMetricsObserver::OnComplete().
const std::vector<GURL>& completed_filtered_urls() const {
return completed_filtered_urls_;
}
private:
std::vector<mojom::PageLoadTimingPtr> updated_timings_;
std::vector<mojom::PageLoadTimingPtr> updated_subframe_timings_;
std::vector<mojom::PageLoadTimingPtr> complete_timings_;
std::vector<GURL> observed_committed_urls_;
std::vector<ExtraRequestCompleteInfo> loaded_resources_;
std::vector<GURL> completed_filtered_urls_;
bool is_ntp_;
};
void PopulatePageLoadTiming(mojom::PageLoadTiming* timing) {
page_load_metrics::InitPageLoadTimingForTest(timing);
timing->navigation_start = base::Time::FromDoubleT(1);
timing->response_start = base::TimeDelta::FromMilliseconds(10);
timing->parse_timing->parse_start = base::TimeDelta::FromMilliseconds(20);
timing->document_timing->first_layout = base::TimeDelta::FromMilliseconds(30);
}
} // namespace
class MetricsWebContentsObserverTest : public ChromeRenderViewHostTestHarness {
public:
MetricsWebContentsObserverTest() : num_errors_(0) {}
void SetUp() override {
ChromeRenderViewHostTestHarness::SetUp();
AttachObserver();
}
void NavigateToUntrackedUrl() {
content::WebContentsTester::For(web_contents())
->NavigateAndCommit(GURL(url::kAboutBlankURL));
}
// Returns the mock timer used for buffering updates in the
// PageLoadMetricsUpdateDispatcher.
base::MockTimer* GetMostRecentTimer() {
return embedder_interface_->GetMockTimer();
}
void SimulateTimingUpdate(const mojom::PageLoadTiming& timing) {
SimulateTimingUpdate(timing, web_contents()->GetMainFrame());
}
void SimulateTimingUpdate(const mojom::PageLoadTiming& timing,
content::RenderFrameHost* render_frame_host) {
SimulateTimingUpdateWithoutFiringDispatchTimer(timing, render_frame_host);
// If sending the timing update caused the PageLoadMetricsUpdateDispatcher
// to schedule a buffering timer, then fire it now so metrics are dispatched
// to observers.
base::MockTimer* mock_timer = GetMostRecentTimer();
if (mock_timer && mock_timer->IsRunning())
mock_timer->Fire();
}
void SimulateTimingUpdateWithoutFiringDispatchTimer(
const mojom::PageLoadTiming& timing,
content::RenderFrameHost* render_frame_host) {
observer()->OnTimingUpdated(render_frame_host, timing,
mojom::PageLoadMetadata(),
mojom::PageLoadFeatures());
}
void AttachObserver() {
auto embedder_interface =
std::make_unique<TestPageLoadMetricsEmbedderInterface>();
embedder_interface_ = embedder_interface.get();
MetricsWebContentsObserver* observer =
MetricsWebContentsObserver::CreateForWebContents(
web_contents(), std::move(embedder_interface));
observer->OnVisibilityChanged(content::Visibility::VISIBLE);
}
void CheckErrorEvent(InternalErrorLoadEvent error, int count) {
histogram_tester_.ExpectBucketCount(internal::kErrorEvents, error, count);
num_errors_ += count;
}
void CheckTotalErrorEvents() {
histogram_tester_.ExpectTotalCount(internal::kErrorEvents, num_errors_);
}
void CheckNoErrorEvents() {
histogram_tester_.ExpectTotalCount(internal::kErrorEvents, 0);
}
int CountEmptyCompleteTimingReported() {
int empty = 0;
for (const auto& timing : embedder_interface_->complete_timings()) {
if (page_load_metrics::IsEmpty(*timing))
++empty;
}
return empty;
}
const std::vector<mojom::PageLoadTimingPtr>& updated_timings() const {
return embedder_interface_->updated_timings();
}
const std::vector<mojom::PageLoadTimingPtr>& complete_timings() const {
return embedder_interface_->complete_timings();
}
const std::vector<mojom::PageLoadTimingPtr>& updated_subframe_timings()
const {
return embedder_interface_->updated_subframe_timings();
}
int CountCompleteTimingReported() { return complete_timings().size(); }
int CountUpdatedTimingReported() { return updated_timings().size(); }
int CountUpdatedSubFrameTimingReported() {
return updated_subframe_timings().size();
}
const std::vector<GURL>& observed_committed_urls_from_on_start() const {
return embedder_interface_->observed_committed_urls_from_on_start();
}
const std::vector<GURL>& completed_filtered_urls() const {
return embedder_interface_->completed_filtered_urls();
}
const std::vector<ExtraRequestCompleteInfo>& loaded_resources() const {
return embedder_interface_->loaded_resources();
}
protected:
MetricsWebContentsObserver* observer() {
return MetricsWebContentsObserver::FromWebContents(web_contents());
}
base::HistogramTester histogram_tester_;
TestPageLoadMetricsEmbedderInterface* embedder_interface_;
private:
int num_errors_;
DISALLOW_COPY_AND_ASSIGN(MetricsWebContentsObserverTest);
};
TEST_F(MetricsWebContentsObserverTest, SuccessfulMainFrameNavigation) {
mojom::PageLoadTiming timing;
page_load_metrics::InitPageLoadTimingForTest(&timing);
timing.navigation_start = base::Time::FromDoubleT(1);
content::WebContentsTester* web_contents_tester =
content::WebContentsTester::For(web_contents());
ASSERT_TRUE(observed_committed_urls_from_on_start().empty());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl));
ASSERT_EQ(1u, observed_committed_urls_from_on_start().size());
ASSERT_TRUE(observed_committed_urls_from_on_start().at(0).is_empty());
ASSERT_EQ(0, CountUpdatedTimingReported());
SimulateTimingUpdate(timing);
ASSERT_EQ(1, CountUpdatedTimingReported());
ASSERT_EQ(0, CountCompleteTimingReported());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl2));
ASSERT_EQ(1, CountCompleteTimingReported());
ASSERT_EQ(0, CountEmptyCompleteTimingReported());
ASSERT_EQ(2u, observed_committed_urls_from_on_start().size());
ASSERT_EQ(kDefaultTestUrl,
observed_committed_urls_from_on_start().at(1).spec());
ASSERT_EQ(1, CountUpdatedTimingReported());
ASSERT_EQ(0, CountUpdatedSubFrameTimingReported());
CheckNoErrorEvents();
}
TEST_F(MetricsWebContentsObserverTest, SubFrame) {
mojom::PageLoadTiming timing;
page_load_metrics::InitPageLoadTimingForTest(&timing);
timing.navigation_start = base::Time::FromDoubleT(1);
timing.response_start = base::TimeDelta::FromMilliseconds(10);
timing.parse_timing->parse_start = base::TimeDelta::FromMilliseconds(20);
timing.document_timing->first_layout = base::TimeDelta::FromMilliseconds(30);
content::WebContentsTester* web_contents_tester =
content::WebContentsTester::For(web_contents());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl));
SimulateTimingUpdate(timing);
ASSERT_EQ(1, CountUpdatedTimingReported());
EXPECT_TRUE(timing.Equals(*updated_timings().back()));
content::RenderFrameHostTester* rfh_tester =
content::RenderFrameHostTester::For(main_rfh());
content::RenderFrameHost* subframe = rfh_tester->AppendChild("subframe");
// Dispatch a timing update for the child frame that includes a first paint.
mojom::PageLoadTiming subframe_timing;
page_load_metrics::InitPageLoadTimingForTest(&subframe_timing);
subframe_timing.navigation_start = base::Time::FromDoubleT(2);
subframe_timing.response_start = base::TimeDelta::FromMilliseconds(10);
subframe_timing.parse_timing->parse_start =
base::TimeDelta::FromMilliseconds(20);
subframe_timing.document_timing->first_layout =
base::TimeDelta::FromMilliseconds(30);
subframe_timing.paint_timing->first_paint =
base::TimeDelta::FromMilliseconds(40);
subframe = content::NavigationSimulator::NavigateAndCommitFromDocument(
GURL(kDefaultTestUrl2), subframe);
content::RenderFrameHostTester* subframe_tester =
content::RenderFrameHostTester::For(subframe);
SimulateTimingUpdate(subframe_timing, subframe);
subframe_tester->SimulateNavigationStop();
ASSERT_EQ(1, CountUpdatedSubFrameTimingReported());
EXPECT_TRUE(subframe_timing.Equals(*updated_subframe_timings().back()));
// The subframe update which included a paint should have also triggered
// a main frame update, which includes a first paint.
ASSERT_EQ(2, CountUpdatedTimingReported());
EXPECT_FALSE(timing.Equals(*updated_timings().back()));
EXPECT_TRUE(updated_timings().back()->paint_timing->first_paint);
// Navigate again to see if the timing updated for a subframe message.
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl2));
ASSERT_EQ(1, CountCompleteTimingReported());
ASSERT_EQ(2, CountUpdatedTimingReported());
ASSERT_EQ(0, CountEmptyCompleteTimingReported());
ASSERT_EQ(1, CountUpdatedSubFrameTimingReported());
EXPECT_TRUE(subframe_timing.Equals(*updated_subframe_timings().back()));
CheckNoErrorEvents();
}
TEST_F(MetricsWebContentsObserverTest, SameDocumentNoTrigger) {
mojom::PageLoadTiming timing;
page_load_metrics::InitPageLoadTimingForTest(&timing);
timing.navigation_start = base::Time::FromDoubleT(1);
content::WebContentsTester* web_contents_tester =
content::WebContentsTester::For(web_contents());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl));
ASSERT_EQ(0, CountUpdatedTimingReported());
SimulateTimingUpdate(timing);
ASSERT_EQ(1, CountUpdatedTimingReported());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrlAnchor));
// Send the same timing update. The original tracker for kDefaultTestUrl
// should dedup the update, and the tracker for kDefaultTestUrlAnchor should
// have been destroyed as a result of its being a same page navigation, so
// CountUpdatedTimingReported() should continue to return 1.
SimulateTimingUpdate(timing);
ASSERT_EQ(1, CountUpdatedTimingReported());
ASSERT_EQ(0, CountCompleteTimingReported());
// Navigate again to force histogram logging.
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl2));
// A same page navigation shouldn't trigger logging UMA for the original.
ASSERT_EQ(1, CountUpdatedTimingReported());
ASSERT_EQ(1, CountCompleteTimingReported());
ASSERT_EQ(0, CountEmptyCompleteTimingReported());
CheckNoErrorEvents();
}
TEST_F(MetricsWebContentsObserverTest, DontLogNewTabPage) {
mojom::PageLoadTiming timing;
page_load_metrics::InitPageLoadTimingForTest(&timing);
timing.navigation_start = base::Time::FromDoubleT(1);
content::WebContentsTester* web_contents_tester =
content::WebContentsTester::For(web_contents());
embedder_interface_->set_is_ntp(true);
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl));
SimulateTimingUpdate(timing);
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl2));
ASSERT_EQ(0, CountUpdatedTimingReported());
ASSERT_EQ(0, CountCompleteTimingReported());
CheckErrorEvent(ERR_IPC_WITH_NO_RELEVANT_LOAD, 1);
CheckTotalErrorEvents();
}
TEST_F(MetricsWebContentsObserverTest, DontLogIrrelevantNavigation) {
mojom::PageLoadTiming timing;
page_load_metrics::InitPageLoadTimingForTest(&timing);
timing.navigation_start = base::Time::FromDoubleT(10);
content::WebContentsTester* web_contents_tester =
content::WebContentsTester::For(web_contents());
GURL about_blank_url = GURL("about:blank");
web_contents_tester->NavigateAndCommit(about_blank_url);
SimulateTimingUpdate(timing);
ASSERT_EQ(0, CountUpdatedTimingReported());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl));
ASSERT_EQ(0, CountUpdatedTimingReported());
ASSERT_EQ(0, CountCompleteTimingReported());
CheckErrorEvent(ERR_IPC_FROM_BAD_URL_SCHEME, 1);
CheckErrorEvent(ERR_IPC_WITH_NO_RELEVANT_LOAD, 1);
CheckTotalErrorEvents();
}
TEST_F(MetricsWebContentsObserverTest, EmptyTimingError) {
mojom::PageLoadTiming timing;
page_load_metrics::InitPageLoadTimingForTest(&timing);
content::WebContentsTester* web_contents_tester =
content::WebContentsTester::For(web_contents());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl));
SimulateTimingUpdate(timing);
ASSERT_EQ(0, CountUpdatedTimingReported());
NavigateToUntrackedUrl();
ASSERT_EQ(0, CountUpdatedTimingReported());
ASSERT_EQ(1, CountCompleteTimingReported());
CheckErrorEvent(ERR_BAD_TIMING_IPC_INVALID_TIMING, 1);
CheckErrorEvent(ERR_NO_IPCS_RECEIVED, 1);
CheckTotalErrorEvents();
histogram_tester_.ExpectTotalCount(
page_load_metrics::internal::kPageLoadTimingStatus, 1);
histogram_tester_.ExpectBucketCount(
page_load_metrics::internal::kPageLoadTimingStatus,
page_load_metrics::internal::INVALID_EMPTY_TIMING, 1);
}
TEST_F(MetricsWebContentsObserverTest, NullNavigationStartError) {
mojom::PageLoadTiming timing;
page_load_metrics::InitPageLoadTimingForTest(&timing);
timing.parse_timing->parse_start = base::TimeDelta::FromMilliseconds(1);
content::WebContentsTester* web_contents_tester =
content::WebContentsTester::For(web_contents());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl));
SimulateTimingUpdate(timing);
ASSERT_EQ(0, CountUpdatedTimingReported());
NavigateToUntrackedUrl();
ASSERT_EQ(0, CountUpdatedTimingReported());
ASSERT_EQ(1, CountCompleteTimingReported());
CheckErrorEvent(ERR_BAD_TIMING_IPC_INVALID_TIMING, 1);
CheckErrorEvent(ERR_NO_IPCS_RECEIVED, 1);
CheckTotalErrorEvents();
histogram_tester_.ExpectTotalCount(
page_load_metrics::internal::kPageLoadTimingStatus, 1);
histogram_tester_.ExpectBucketCount(
page_load_metrics::internal::kPageLoadTimingStatus,
page_load_metrics::internal::INVALID_NULL_NAVIGATION_START, 1);
}
TEST_F(MetricsWebContentsObserverTest, TimingOrderError) {
mojom::PageLoadTiming timing;
page_load_metrics::InitPageLoadTimingForTest(&timing);
timing.navigation_start = base::Time::FromDoubleT(1);
timing.parse_timing->parse_stop = base::TimeDelta::FromMilliseconds(1);
content::WebContentsTester* web_contents_tester =
content::WebContentsTester::For(web_contents());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl));
SimulateTimingUpdate(timing);
ASSERT_EQ(0, CountUpdatedTimingReported());
NavigateToUntrackedUrl();
ASSERT_EQ(0, CountUpdatedTimingReported());
ASSERT_EQ(1, CountCompleteTimingReported());
CheckErrorEvent(ERR_BAD_TIMING_IPC_INVALID_TIMING, 1);
CheckErrorEvent(ERR_NO_IPCS_RECEIVED, 1);
CheckTotalErrorEvents();
histogram_tester_.ExpectTotalCount(
page_load_metrics::internal::kPageLoadTimingStatus, 1);
histogram_tester_.ExpectBucketCount(
page_load_metrics::internal::kPageLoadTimingStatus,
page_load_metrics::internal::INVALID_ORDER_PARSE_START_PARSE_STOP, 1);
}
TEST_F(MetricsWebContentsObserverTest, BadIPC) {
mojom::PageLoadTiming timing;
page_load_metrics::InitPageLoadTimingForTest(&timing);
timing.navigation_start = base::Time::FromDoubleT(10);
mojom::PageLoadTiming timing2;
page_load_metrics::InitPageLoadTimingForTest(&timing2);
timing2.navigation_start = base::Time::FromDoubleT(100);
content::WebContentsTester* web_contents_tester =
content::WebContentsTester::For(web_contents());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl));
SimulateTimingUpdate(timing);
ASSERT_EQ(1, CountUpdatedTimingReported());
SimulateTimingUpdate(timing2);
ASSERT_EQ(1, CountUpdatedTimingReported());
CheckErrorEvent(ERR_BAD_TIMING_IPC_INVALID_TIMING_DESCENDENT, 1);
CheckTotalErrorEvents();
}
TEST_F(MetricsWebContentsObserverTest, ObservePartialNavigation) {
// Reset the state of the tests, and attach the MetricsWebContentsObserver in
// the middle of a navigation. This tests that the class is robust to only
// observing some of a navigation.
DeleteContents();
SetContents(CreateTestWebContents());
mojom::PageLoadTiming timing;
page_load_metrics::InitPageLoadTimingForTest(&timing);
timing.navigation_start = base::Time::FromDoubleT(10);
// Start the navigation, then start observing the web contents. This used to
// crash us. Make sure we bail out and don't log histograms.
std::unique_ptr<NavigationSimulator> navigation =
NavigationSimulator::CreateBrowserInitiated(GURL(kDefaultTestUrl),
web_contents());
navigation->Start();
AttachObserver();
navigation->Commit();
SimulateTimingUpdate(timing);
// Navigate again to force histogram logging.
content::WebContentsTester* web_contents_tester =
content::WebContentsTester::For(web_contents());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl2));
ASSERT_EQ(0, CountCompleteTimingReported());
ASSERT_EQ(0, CountUpdatedTimingReported());
CheckErrorEvent(ERR_IPC_WITH_NO_RELEVANT_LOAD, 1);
CheckTotalErrorEvents();
}
TEST_F(MetricsWebContentsObserverTest, DontLogAbortChains) {
NavigateAndCommit(GURL(kDefaultTestUrl));
NavigateAndCommit(GURL(kDefaultTestUrl2));
NavigateAndCommit(GURL(kDefaultTestUrl));
histogram_tester_.ExpectTotalCount(internal::kAbortChainSizeNewNavigation, 0);
CheckErrorEvent(ERR_NO_IPCS_RECEIVED, 2);
CheckTotalErrorEvents();
}
TEST_F(MetricsWebContentsObserverTest, LogAbortChains) {
// Start and abort three loads before one finally commits.
NavigationSimulator::NavigateAndFailFromBrowser(
web_contents(), GURL(kDefaultTestUrl), net::ERR_ABORTED);
NavigationSimulator::NavigateAndFailFromBrowser(
web_contents(), GURL(kDefaultTestUrl2), net::ERR_ABORTED);
NavigationSimulator::NavigateAndFailFromBrowser(
web_contents(), GURL(kDefaultTestUrl), net::ERR_ABORTED);
NavigationSimulator::NavigateAndCommitFromBrowser(web_contents(),
GURL(kDefaultTestUrl2));
histogram_tester_.ExpectTotalCount(internal::kAbortChainSizeNewNavigation, 1);
histogram_tester_.ExpectBucketCount(internal::kAbortChainSizeNewNavigation, 3,
1);
CheckNoErrorEvents();
}
TEST_F(MetricsWebContentsObserverTest, LogAbortChainsSameURL) {
// Start and abort three loads before one finally commits.
NavigationSimulator::NavigateAndFailFromBrowser(
web_contents(), GURL(kDefaultTestUrl), net::ERR_ABORTED);
NavigationSimulator::NavigateAndFailFromBrowser(
web_contents(), GURL(kDefaultTestUrl), net::ERR_ABORTED);
NavigationSimulator::NavigateAndFailFromBrowser(
web_contents(), GURL(kDefaultTestUrl), net::ERR_ABORTED);
NavigationSimulator::NavigateAndCommitFromBrowser(web_contents(),
GURL(kDefaultTestUrl));
histogram_tester_.ExpectTotalCount(internal::kAbortChainSizeNewNavigation, 1);
histogram_tester_.ExpectBucketCount(internal::kAbortChainSizeNewNavigation, 3,
1);
histogram_tester_.ExpectTotalCount(internal::kAbortChainSizeSameURL, 1);
histogram_tester_.ExpectBucketCount(internal::kAbortChainSizeSameURL, 3, 1);
}
TEST_F(MetricsWebContentsObserverTest, LogAbortChainsNoCommit) {
// Start and abort three loads before one finally commits.
NavigationSimulator::NavigateAndFailFromBrowser(
web_contents(), GURL(kDefaultTestUrl), net::ERR_ABORTED);
NavigationSimulator::NavigateAndFailFromBrowser(
web_contents(), GURL(kDefaultTestUrl2), net::ERR_ABORTED);
NavigationSimulator::NavigateAndFailFromBrowser(
web_contents(), GURL(kDefaultTestUrl), net::ERR_ABORTED);
web_contents()->Stop();
histogram_tester_.ExpectTotalCount(internal::kAbortChainSizeNoCommit, 1);
histogram_tester_.ExpectBucketCount(internal::kAbortChainSizeNoCommit, 3, 1);
}
TEST_F(MetricsWebContentsObserverTest, FlushMetricsOnAppEnterBackground) {
content::WebContentsTester* web_contents_tester =
content::WebContentsTester::For(web_contents());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl));
histogram_tester_.ExpectTotalCount(
internal::kPageLoadCompletedAfterAppBackground, 0);
observer()->FlushMetricsOnAppEnterBackground();
histogram_tester_.ExpectTotalCount(
internal::kPageLoadCompletedAfterAppBackground, 1);
histogram_tester_.ExpectBucketCount(
internal::kPageLoadCompletedAfterAppBackground, false, 1);
histogram_tester_.ExpectBucketCount(
internal::kPageLoadCompletedAfterAppBackground, true, 0);
// Navigate again, which forces completion callbacks on the previous
// navigation to be invoked.
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl2));
// Verify that, even though the page load completed, no complete timings were
// reported, because the TestPageLoadMetricsObserver's
// FlushMetricsOnAppEnterBackground implementation returned STOP_OBSERVING,
// thus preventing OnComplete from being invoked.
ASSERT_EQ(0, CountCompleteTimingReported());
DeleteContents();
histogram_tester_.ExpectTotalCount(
internal::kPageLoadCompletedAfterAppBackground, 2);
histogram_tester_.ExpectBucketCount(
internal::kPageLoadCompletedAfterAppBackground, false, 1);
histogram_tester_.ExpectBucketCount(
internal::kPageLoadCompletedAfterAppBackground, true, 1);
}
TEST_F(MetricsWebContentsObserverTest, StopObservingOnCommit) {
content::WebContentsTester* web_contents_tester =
content::WebContentsTester::For(web_contents());
ASSERT_TRUE(completed_filtered_urls().empty());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl));
ASSERT_TRUE(completed_filtered_urls().empty());
// kFilteredCommitUrl should stop observing in OnCommit, and thus should not
// reach OnComplete().
web_contents_tester->NavigateAndCommit(GURL(kFilteredCommitUrl));
ASSERT_EQ(std::vector<GURL>({GURL(kDefaultTestUrl)}),
completed_filtered_urls());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl2));
ASSERT_EQ(std::vector<GURL>({GURL(kDefaultTestUrl)}),
completed_filtered_urls());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl));
ASSERT_EQ(std::vector<GURL>({GURL(kDefaultTestUrl), GURL(kDefaultTestUrl2)}),
completed_filtered_urls());
}
TEST_F(MetricsWebContentsObserverTest, StopObservingOnStart) {
content::WebContentsTester* web_contents_tester =
content::WebContentsTester::For(web_contents());
ASSERT_TRUE(completed_filtered_urls().empty());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl));
ASSERT_TRUE(completed_filtered_urls().empty());
// kFilteredCommitUrl should stop observing in OnStart, and thus should not
// reach OnComplete().
web_contents_tester->NavigateAndCommit(GURL(kFilteredStartUrl));
ASSERT_EQ(std::vector<GURL>({GURL(kDefaultTestUrl)}),
completed_filtered_urls());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl2));
ASSERT_EQ(std::vector<GURL>({GURL(kDefaultTestUrl)}),
completed_filtered_urls());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl));
ASSERT_EQ(std::vector<GURL>({GURL(kDefaultTestUrl), GURL(kDefaultTestUrl2)}),
completed_filtered_urls());
}
// We buffer cross frame timings in order to provide a consistent view of
// timing data to observers. See crbug.com/722860 for more.
TEST_F(MetricsWebContentsObserverTest, OutOfOrderCrossFrameTiming) {
mojom::PageLoadTiming timing;
page_load_metrics::InitPageLoadTimingForTest(&timing);
timing.navigation_start = base::Time::FromDoubleT(1);
timing.response_start = base::TimeDelta::FromMilliseconds(10);
content::WebContentsTester* web_contents_tester =
content::WebContentsTester::For(web_contents());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl));
SimulateTimingUpdate(timing);
ASSERT_EQ(1, CountUpdatedTimingReported());
EXPECT_TRUE(timing.Equals(*updated_timings().back()));
content::RenderFrameHostTester* rfh_tester =
content::RenderFrameHostTester::For(main_rfh());
content::RenderFrameHost* subframe = rfh_tester->AppendChild("subframe");
// Dispatch a timing update for the child frame that includes a first paint.
mojom::PageLoadTiming subframe_timing;
PopulatePageLoadTiming(&subframe_timing);
subframe_timing.paint_timing->first_paint =
base::TimeDelta::FromMilliseconds(40);
subframe = content::NavigationSimulator::NavigateAndCommitFromDocument(
GURL(kDefaultTestUrl2), subframe);
SimulateTimingUpdate(subframe_timing, subframe);
// Though a first paint was dispatched in the child, it should not yet be
// reflected as an updated timing in the main frame, since the main frame
// hasn't received updates for required earlier events such as parse_start and
// first_layout.
ASSERT_EQ(1, CountUpdatedSubFrameTimingReported());
EXPECT_TRUE(subframe_timing.Equals(*updated_subframe_timings().back()));
ASSERT_EQ(1, CountUpdatedTimingReported());
EXPECT_TRUE(timing.Equals(*updated_timings().back()));
// Dispatch the parse_start event in the parent. We should still not observe
// a first paint main frame update, since we don't yet have a first_layout.
timing.parse_timing->parse_start = base::TimeDelta::FromMilliseconds(20);
SimulateTimingUpdate(timing);
ASSERT_EQ(1, CountUpdatedTimingReported());
EXPECT_FALSE(timing.Equals(*updated_timings().back()));
EXPECT_FALSE(updated_timings().back()->parse_timing->parse_start);
EXPECT_FALSE(updated_timings().back()->paint_timing->first_paint);
// Dispatch a first_layout in the parent. We should now unbuffer the first
// paint main frame update and receive a main frame update with a first paint
// value.
timing.document_timing->first_layout = base::TimeDelta::FromMilliseconds(30);
SimulateTimingUpdate(timing);
ASSERT_EQ(2, CountUpdatedTimingReported());
EXPECT_FALSE(timing.Equals(*updated_timings().back()));
EXPECT_TRUE(
updated_timings().back()->parse_timing->Equals(*timing.parse_timing));
EXPECT_TRUE(updated_timings().back()->document_timing->Equals(
*timing.document_timing));
EXPECT_FALSE(
updated_timings().back()->paint_timing->Equals(*timing.paint_timing));
EXPECT_TRUE(updated_timings().back()->paint_timing->first_paint);
// Navigate again to see if the timing updated for a subframe message.
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl2));
ASSERT_EQ(1, CountCompleteTimingReported());
ASSERT_EQ(2, CountUpdatedTimingReported());
ASSERT_EQ(0, CountEmptyCompleteTimingReported());
ASSERT_EQ(1, CountUpdatedSubFrameTimingReported());
EXPECT_TRUE(subframe_timing.Equals(*updated_subframe_timings().back()));
CheckNoErrorEvents();
}
// We buffer cross-frame paint updates to account for paint timings from
// different frames arriving out of order.
TEST_F(MetricsWebContentsObserverTest, OutOfOrderCrossFrameTiming2) {
// Dispatch a timing update for the main frame that includes a first
// paint. This should be buffered, with the dispatch timer running.
mojom::PageLoadTiming timing;
PopulatePageLoadTiming(&timing);
// Ensure this is much bigger than the subframe first paint below. We
// currently can't inject the navigation start offset, so we must ensure that
// subframe first paint + navigation start offset < main frame first paint.
timing.paint_timing->first_paint = base::TimeDelta::FromMilliseconds(100000);
content::WebContentsTester* web_contents_tester =
content::WebContentsTester::For(web_contents());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl));
SimulateTimingUpdateWithoutFiringDispatchTimer(timing, main_rfh());
EXPECT_TRUE(GetMostRecentTimer()->IsRunning());
ASSERT_EQ(0, CountUpdatedTimingReported());
content::RenderFrameHostTester* rfh_tester =
content::RenderFrameHostTester::For(main_rfh());
// Dispatch a timing update for a child frame that includes a first paint.
mojom::PageLoadTiming subframe_timing;
PopulatePageLoadTiming(&subframe_timing);
subframe_timing.paint_timing->first_paint =
base::TimeDelta::FromMilliseconds(500);
content::RenderFrameHost* subframe = rfh_tester->AppendChild("subframe");
subframe = content::NavigationSimulator::NavigateAndCommitFromDocument(
GURL(kDefaultTestUrl2), subframe);
content::RenderFrameHostTester* subframe_tester =
content::RenderFrameHostTester::For(subframe);
SimulateTimingUpdateWithoutFiringDispatchTimer(subframe_timing, subframe);
subframe_tester->SimulateNavigationStop();
histogram_tester_.ExpectTotalCount(
page_load_metrics::internal::kHistogramOutOfOrderTiming, 1);
EXPECT_TRUE(GetMostRecentTimer()->IsRunning());
ASSERT_EQ(0, CountUpdatedTimingReported());
// At this point, the timing update is buffered, waiting for the timer to
// fire.
GetMostRecentTimer()->Fire();
// Firing the timer should produce a timing update. The update should be a
// merged view of the main frame timing, with a first paint timestamp from the
// subframe.
ASSERT_EQ(1, CountUpdatedTimingReported());
EXPECT_FALSE(timing.Equals(*updated_timings().back()));
EXPECT_TRUE(
updated_timings().back()->parse_timing->Equals(*timing.parse_timing));
EXPECT_TRUE(updated_timings().back()->document_timing->Equals(
*timing.document_timing));
EXPECT_FALSE(
updated_timings().back()->paint_timing->Equals(*timing.paint_timing));
EXPECT_TRUE(updated_timings().back()->paint_timing->first_paint);
// The first paint value should be the min of all received first paints, which
// in this case is the first paint from the subframe. Since it is offset by
// the subframe's navigation start, the received value should be >= the first
// paint value specified in the subframe.
EXPECT_GE(updated_timings().back()->paint_timing->first_paint,
subframe_timing.paint_timing->first_paint);
EXPECT_LT(updated_timings().back()->paint_timing->first_paint,
timing.paint_timing->first_paint);
base::TimeDelta initial_first_paint =
updated_timings().back()->paint_timing->first_paint.value();
// Dispatch a timing update for an additional child frame, with an earlier
// first paint time. This should cause an immediate update, without a timer
// delay.
subframe_timing.paint_timing->first_paint =
base::TimeDelta::FromMilliseconds(50);
content::RenderFrameHost* subframe2 = rfh_tester->AppendChild("subframe");
subframe2 = content::NavigationSimulator::NavigateAndCommitFromDocument(
GURL(kDefaultTestUrl2), subframe2);
content::RenderFrameHostTester* subframe2_tester =
content::RenderFrameHostTester::For(subframe2);
SimulateTimingUpdateWithoutFiringDispatchTimer(subframe_timing, subframe2);
subframe2_tester->SimulateNavigationStop();
base::TimeDelta updated_first_paint =
updated_timings().back()->paint_timing->first_paint.value();
EXPECT_FALSE(GetMostRecentTimer()->IsRunning());
ASSERT_EQ(2, CountUpdatedTimingReported());
EXPECT_LT(updated_first_paint, initial_first_paint);
histogram_tester_.ExpectTotalCount(
page_load_metrics::internal::kHistogramOutOfOrderTimingBuffered, 1);
histogram_tester_.ExpectBucketCount(
page_load_metrics::internal::kHistogramOutOfOrderTimingBuffered,
(initial_first_paint - updated_first_paint).InMilliseconds(), 1);
CheckNoErrorEvents();
}
TEST_F(MetricsWebContentsObserverTest,
FirstInputDelayMissingFirstInputTimestamp) {
mojom::PageLoadTiming timing;
PopulatePageLoadTiming(&timing);
timing.interactive_timing->first_input_delay =
base::TimeDelta::FromMilliseconds(10);
content::WebContentsTester* web_contents_tester =
content::WebContentsTester::For(web_contents());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl));
SimulateTimingUpdate(timing);
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl2));
const mojom::InteractiveTiming& interactive_timing =
*complete_timings().back()->interactive_timing;
// Won't have been set, as we're missing the first_input_timestamp.
EXPECT_FALSE(interactive_timing.first_input_delay.has_value());
histogram_tester_.ExpectTotalCount(
page_load_metrics::internal::kPageLoadTimingStatus, 1);
histogram_tester_.ExpectBucketCount(
page_load_metrics::internal::kPageLoadTimingStatus,
page_load_metrics::internal::INVALID_NULL_FIRST_INPUT_TIMESTAMP, 1);
CheckErrorEvent(ERR_BAD_TIMING_IPC_INVALID_TIMING, 1);
CheckErrorEvent(ERR_NO_IPCS_RECEIVED, 1);
CheckTotalErrorEvents();
}
TEST_F(MetricsWebContentsObserverTest,
FirstInputTimestampMissingFirstInputDelay) {
mojom::PageLoadTiming timing;
PopulatePageLoadTiming(&timing);
timing.interactive_timing->first_input_timestamp =
base::TimeDelta::FromMilliseconds(10);
content::WebContentsTester* web_contents_tester =
content::WebContentsTester::For(web_contents());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl));
SimulateTimingUpdate(timing);
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl2));
const mojom::InteractiveTiming& interactive_timing =
*complete_timings().back()->interactive_timing;
// Won't have been set, as we're missing the first_input_delay.
EXPECT_FALSE(interactive_timing.first_input_timestamp.has_value());
histogram_tester_.ExpectTotalCount(
page_load_metrics::internal::kPageLoadTimingStatus, 1);
histogram_tester_.ExpectBucketCount(
page_load_metrics::internal::kPageLoadTimingStatus,
page_load_metrics::internal::INVALID_NULL_FIRST_INPUT_DELAY, 1);
CheckErrorEvent(ERR_BAD_TIMING_IPC_INVALID_TIMING, 1);
CheckErrorEvent(ERR_NO_IPCS_RECEIVED, 1);
CheckTotalErrorEvents();
}
// Main frame delivers an input notification. Subsequently, a subframe delivers
// an input notification, where the input occurred first. Verify that
// FirstInputDelay and FirstInputTimestamp come from the subframe.
TEST_F(MetricsWebContentsObserverTest,
FirstInputDelayAndTimingSubframeFirstDeliveredSecond) {
mojom::PageLoadTiming timing;
PopulatePageLoadTiming(&timing);
timing.interactive_timing->first_input_delay =
base::TimeDelta::FromMilliseconds(10);
// Set this far in the future. We currently can't control the navigation start
// offset, so we ensure that the subframe timestamp + the unknown offset is
// less than the main frame timestamp.
timing.interactive_timing->first_input_timestamp =
base::TimeDelta::FromMinutes(100);
content::WebContentsTester* web_contents_tester =
content::WebContentsTester::For(web_contents());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl));
SimulateTimingUpdate(timing);
content::RenderFrameHostTester* rfh_tester =
content::RenderFrameHostTester::For(main_rfh());
content::RenderFrameHost* subframe = rfh_tester->AppendChild("subframe");
// Dispatch a timing update for the child frame that includes a first input
// earlier than the one for the main frame.
mojom::PageLoadTiming subframe_timing;
PopulatePageLoadTiming(&subframe_timing);
subframe_timing.interactive_timing->first_input_delay =
base::TimeDelta::FromMilliseconds(15);
subframe_timing.interactive_timing->first_input_timestamp =
base::TimeDelta::FromMilliseconds(90);
subframe = content::NavigationSimulator::NavigateAndCommitFromDocument(
GURL(kDefaultTestUrl2), subframe);
SimulateTimingUpdate(subframe_timing, subframe);
// Navigate again to confirm the timing updated for a subframe message.
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl2));
const mojom::InteractiveTiming& interactive_timing =
*complete_timings().back()->interactive_timing;
EXPECT_EQ(base::TimeDelta::FromMilliseconds(15),
interactive_timing.first_input_delay);
// Ensure the timestamp is from the subframe. The main frame timestamp was 100
// minutes.
EXPECT_LT(interactive_timing.first_input_timestamp,
base::TimeDelta::FromMinutes(10));
CheckNoErrorEvents();
}
// A subframe delivers an input notification. Subsequently, the mainframe
// delivers an input notification, where the input occurred first. Verify that
// FirstInputDelay and FirstInputTimestamp come from the main frame.
TEST_F(MetricsWebContentsObserverTest,
FirstInputDelayAndTimingMainframeFirstDeliveredSecond) {
content::WebContentsTester* web_contents_tester =
content::WebContentsTester::For(web_contents());
// We need to navigate before we can navigate the subframe.
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl));
content::RenderFrameHostTester* rfh_tester =
content::RenderFrameHostTester::For(main_rfh());
content::RenderFrameHost* subframe = rfh_tester->AppendChild("subframe");
mojom::PageLoadTiming subframe_timing;
PopulatePageLoadTiming(&subframe_timing);
subframe_timing.interactive_timing->first_input_delay =
base::TimeDelta::FromMilliseconds(10);
subframe_timing.interactive_timing->first_input_timestamp =
base::TimeDelta::FromMinutes(100);
subframe = content::NavigationSimulator::NavigateAndCommitFromDocument(
GURL(kDefaultTestUrl2), subframe);
SimulateTimingUpdate(subframe_timing, subframe);
mojom::PageLoadTiming timing;
PopulatePageLoadTiming(&timing);
// Dispatch a timing update for the main frame that includes a first input
// earlier than the one for the subframe.
timing.interactive_timing->first_input_delay =
base::TimeDelta::FromMilliseconds(15);
// Set this far in the future. We currently can't control the navigation start
// offset, so we ensure that the main frame timestamp + the unknown offset is
// less than the subframe timestamp.
timing.interactive_timing->first_input_timestamp =
base::TimeDelta::FromMilliseconds(90);
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl));
SimulateTimingUpdate(timing);
// Navigate again to confirm the timing updated for the mainframe message.
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl2));
const mojom::InteractiveTiming& interactive_timing =
*complete_timings().back()->interactive_timing;
EXPECT_EQ(base::TimeDelta::FromMilliseconds(15),
interactive_timing.first_input_delay);
// Ensure the timestamp is from the main frame. The subframe timestamp was 100
// minutes.
EXPECT_LT(interactive_timing.first_input_timestamp,
base::TimeDelta::FromMinutes(10));
CheckNoErrorEvents();
}
TEST_F(MetricsWebContentsObserverTest, DispatchDelayedMetricsOnPageClose) {
mojom::PageLoadTiming timing;
PopulatePageLoadTiming(&timing);
timing.paint_timing->first_paint = base::TimeDelta::FromMilliseconds(1000);
content::WebContentsTester* web_contents_tester =
content::WebContentsTester::For(web_contents());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl));
SimulateTimingUpdateWithoutFiringDispatchTimer(timing, main_rfh());
EXPECT_TRUE(GetMostRecentTimer()->IsRunning());
ASSERT_EQ(0, CountUpdatedTimingReported());
ASSERT_EQ(0, CountCompleteTimingReported());
// Navigate to a new page. This should force dispatch of the buffered timing
// update.
NavigateToUntrackedUrl();
ASSERT_EQ(1, CountUpdatedTimingReported());
ASSERT_EQ(1, CountCompleteTimingReported());
EXPECT_TRUE(timing.Equals(*updated_timings().back()));
EXPECT_TRUE(timing.Equals(*complete_timings().back()));
CheckNoErrorEvents();
}
TEST_F(MetricsWebContentsObserverTest, OnLoadedResource_MainFrame) {
GURL main_resource_url(kDefaultTestUrl);
content::WebContentsTester::For(web_contents())
->NavigateAndCommit(main_resource_url);
auto navigation_simulator =
content::NavigationSimulator::CreateRendererInitiated(
main_resource_url, web_contents()->GetMainFrame());
navigation_simulator->Start();
int frame_tree_node_id =
navigation_simulator->GetNavigationHandle()->GetFrameTreeNodeId();
navigation_simulator->Commit();
const auto request_id = navigation_simulator->GetGlobalRequestID();
observer()->OnRequestComplete(
main_resource_url, net::HostPortPair(), frame_tree_node_id, request_id,
web_contents()->GetMainFrame(),
content::ResourceType::RESOURCE_TYPE_MAIN_FRAME, false, nullptr, 0, 0,
base::TimeTicks::Now(), net::OK, nullptr);
EXPECT_EQ(1u, loaded_resources().size());
EXPECT_EQ(main_resource_url, loaded_resources().back().url);
NavigateToUntrackedUrl();
// Deliver a second main frame resource. This one should be ignored, since the
// specified |request_id| is no longer associated with any tracked page loads.
observer()->OnRequestComplete(
main_resource_url, net::HostPortPair(), frame_tree_node_id, request_id,
web_contents()->GetMainFrame(),
content::ResourceType::RESOURCE_TYPE_MAIN_FRAME, false, nullptr, 0, 0,
base::TimeTicks::Now(), net::OK, nullptr);
EXPECT_EQ(1u, loaded_resources().size());
EXPECT_EQ(main_resource_url, loaded_resources().back().url);
}
TEST_F(MetricsWebContentsObserverTest, OnLoadedResource_Subresource) {
content::WebContentsTester* web_contents_tester =
content::WebContentsTester::For(web_contents());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl));
GURL loaded_resource_url("http://www.other.com/");
observer()->OnRequestComplete(
loaded_resource_url, net::HostPortPair(),
web_contents()->GetMainFrame()->GetFrameTreeNodeId(),
content::GlobalRequestID(), web_contents()->GetMainFrame(),
content::RESOURCE_TYPE_SCRIPT, false, nullptr, 0, 0,
base::TimeTicks::Now(), net::OK, nullptr);
EXPECT_EQ(1u, loaded_resources().size());
EXPECT_EQ(loaded_resource_url, loaded_resources().back().url);
}
TEST_F(MetricsWebContentsObserverTest,
OnLoadedResource_ResourceFromOtherRFHIgnored) {
content::WebContentsTester* web_contents_tester =
content::WebContentsTester::For(web_contents());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl));
// This is a bit of a hack. We want to simulate giving the
// MetricsWebContentsObserver a RenderFrameHost from a previously committed
// page, to verify that resources for RFHs that don't match the currently
// committed RFH are ignored. There isn't a way to hold on to an old RFH (it
// gets cleaned up soon after being navigated away from) so instead we use an
// RFH from another WebContents, as a way to simulate the desired behavior.
std::unique_ptr<content::WebContents> other_web_contents(
content::WebContentsTester::CreateTestWebContents(browser_context(),
nullptr));
observer()->OnRequestComplete(
GURL("http://www.other.com/"), net::HostPortPair(),
other_web_contents->GetMainFrame()->GetFrameTreeNodeId(),
content::GlobalRequestID(), other_web_contents->GetMainFrame(),
content::RESOURCE_TYPE_SCRIPT, false, nullptr, 0, 0,
base::TimeTicks::Now(), net::OK, nullptr);
EXPECT_TRUE(loaded_resources().empty());
}
TEST_F(MetricsWebContentsObserverTest,
OnLoadedResource_IgnoreNonHttpOrHttpsScheme) {
content::WebContentsTester* web_contents_tester =
content::WebContentsTester::For(web_contents());
web_contents_tester->NavigateAndCommit(GURL(kDefaultTestUrl));
GURL loaded_resource_url("data:text/html,Hello world");
observer()->OnRequestComplete(
loaded_resource_url, net::HostPortPair(),
web_contents()->GetMainFrame()->GetFrameTreeNodeId(),
content::GlobalRequestID(), web_contents()->GetMainFrame(),
content::RESOURCE_TYPE_SCRIPT, false, nullptr, 0, 0,
base::TimeTicks::Now(), net::OK, nullptr);
EXPECT_TRUE(loaded_resources().empty());
}
} // namespace page_load_metrics
| [
"[email protected]"
] | |
5bc6193e8dea89b07ea3c293d641f2323dc90ebd | 7a7c5f13593e5ce2bed19e14097373a91e5b525b | /BOJ/BOJ_2290.cpp | 023c8590ab33d942fb9c0d92aa7d14cb41da5f6f | [] | no_license | SJ0000/PS | 21c3be71112fe473bfd1e164c131446f03fdf055 | 911d948d0f11a02a61acb53bb122bd335b71476c | refs/heads/master | 2023-01-12T02:49:55.217982 | 2023-01-03T02:39:57 | 2023-01-03T02:39:57 | 141,817,864 | 1 | 0 | null | null | null | null | UHC | C++ | false | false | 2,275 | cpp | #include <iostream>
#include <vector>
#include <algorithm>
#include <string>
using namespace std;
int n;
string s;
string ans[30];
/* pos
-- 1
l l 2 3
l l
-- 4
l l 5 6
l l
-- 7
*/
void printLine(char ch, int pos) {
string block, space;
for (int i = 0; i < n; i++) {
block += ch;
space += ' ';
}
if (pos == 1) {
ans[0] += (' ' + block + ' ');
}
else if (pos == 2) {
for (int i = 1; i <= n; i++) {
ans[i] += (ch + space);
}
}
else if (pos == 3) {
for (int i = 1; i <= n; i++) {
ans[i] += ch;
}
}
else if (pos == 4) {
ans[n + 1] += (' ' + block + ' ');
}
else if (pos == 5) {
for (int i = n + 2; i <= 2 * n + 1; i++) {
ans[i] += (ch + space);
}
}
else if (pos == 6) {
for (int i = n + 2; i <= 2 * n + 1; i++) {
ans[i] += ch;
}
}
else if (pos == 7) {
ans[2 * n + 2] += (' ' + block + ' ');
}
}
void assemble_num(char c1, char c2, char c3, char c4, char c5, char c6, char c7) {
printLine(c1, 2);
printLine(c2, 5);
printLine(c3, 1);
printLine(c4, 4);
printLine(c5, 7);
printLine(c6, 3);
printLine(c7, 6);
}
void printN(int now) {
if (now == 0) {
assemble_num('|', '|', '-', ' ', '-', '|', '|');
}
else if (now == 1) {
assemble_num(' ', ' ', ' ', ' ', ' ', '|', '|');
}
else if (now == 2) {
assemble_num(' ', '|', '-', '-', '-', '|', ' ');
}
else if (now == 3) {
assemble_num(' ', ' ', '-', '-', '-', '|', '|');
}
else if (now == 4) {
assemble_num('|', ' ', ' ', '-', ' ', '|', '|');
}
else if (now == 5) {
assemble_num('|', ' ', '-', '-', '-', ' ', '|');
}
else if (now == 6) {
assemble_num('|', '|', '-', '-', '-', ' ', '|');
}
else if (now == 7) {
assemble_num(' ', ' ', '-', ' ', ' ', '|', '|');
}
else if (now == 8) {
assemble_num('|', '|', '-', '-', '-', '|', '|');
}
else if (now == 9) {
assemble_num('|', ' ', '-', '-', '-', '|', '|');
}
}
void printStr(string s) {
for (int i = 0; i < s.size() - 1; i++) {
int now = s[i] - '0';
//조립순서에 유의
printN(now);
//각 숫자사이에 공백한칸
for (int i = 0; i <= 2 * n + 2; i++) {
ans[i] += ' ';
}
}
printN(s[s.size() - 1] - '0');
}
int main(void) {
cin >> n >> s;
printStr(s);
for (int i = 0; i <= 2 * n + 2; i++) {
cout << ans[i] << endl;
}
return 0;
} | [
"[email protected]"
] | |
acc58631497b666e50187bd47e4beafe3e6cb055 | 0de2865a4b0a66518d5d02da7ee98681e65ff67d | /homework_5/main.cpp | 5d6cc27a2c17cd4e9f36d09351a95548ee0062b7 | [] | no_license | krishnachaitanya7/OpenGL_Assignments | e80654c4da723f7f972a9acfe18a860d29fa8ff9 | f10455ba540aac8668e45d09ec55fc135954cf2b | refs/heads/master | 2022-03-23T19:09:13.575073 | 2019-12-15T07:29:36 | 2019-12-15T07:29:36 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,141 | cpp | #define GL_GLEXT_PROTOTYPES
#include <GL/glut.h>
#include "util.h"
// Initializing Variables
int utils::axes=0;
int utils::mode=1;
int utils::move=1;
int utils::th=50;
int utils::ph=0;
int utils::fov=27;
int utils::light=1;
double utils::asp=1;
double utils::dim=3.0;
// Light values
int utils::one = 1;
int utils::distance = 2;
int utils::inc = 10;
int utils::smooth = 1;
int utils::local = 0;
int utils::emission = 0;
int utils::ambient = 30;
int utils::diffuse = 100;
int utils::specular = 0;
int utils::shininess = 0;
float utils::shiny = 1;
int utils::zh = 90;
int utils::zph = 0;
float utils::ylight = 0;
int main(int argc, char** argv) {
glutInit( & argc, argv);
glutInitDisplayMode(GLUT_DOUBLE | GLUT_RGB | GLUT_DEPTH);
glutInitWindowSize(1000, 1000);
glutCreateWindow("Kodur Krishna Chaitanya: HW5");
glPointSize(1);
glutDisplayFunc(utils::display_scene);
glutReshapeFunc(utils::reshape_window);
glutSpecialFunc(utils::special);
glutKeyboardFunc(utils::key);
glutIdleFunc(utils::idle);
glutMainLoop();
return 0;
}
| [
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] | |
461e28b20e50e893108486ed0f147ff564592e3c | 2874d0db3fe80ec2f33e4f4551d93ed8cde69674 | /rendu/cpp_module_01/ATarget.cpp | 1fdf75590b3b1a9e3011e546eb37d15f221a0cd4 | [] | no_license | ybayart/42-exam-rank-05 | af959e4ee03b97d3a9c9a7b91df385995de83c9b | 2c2dd38151abd623b4ef40411c1f77645027b233 | refs/heads/master | 2023-01-02T22:45:57.583478 | 2020-10-24T12:25:09 | 2020-10-24T12:25:09 | 309,555,521 | 1 | 2 | null | null | null | null | UTF-8 | C++ | false | false | 493 | cpp | #include "ATarget.hpp"
ATarget::ATarget() : _type()
{
}
ATarget::ATarget(std::string type) : _type(type)
{
}
ATarget::ATarget(const ATarget& ref)
{
_type = ref._type;
}
ATarget&
ATarget::operator=(const ATarget& ref)
{
_type = ref._type;
return (*this);
}
ATarget::~ATarget()
{
}
const std::string&
ATarget::getType(void) const
{
return (_type);
}
void
ATarget::getHitBySpell(const ASpell& ref) const
{
std::cout << _type << " has been " << ref.getEffects() << "!" << std::endl;
}
| [
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] | |
1046eb9d822df66f4547571ec3c0d19e5085730f | ce4da92244a03f24d6a75462e3fc18e3c4d487c7 | /src/etherlab/ecat_master.h | f0e9444fa50b3eceed17d37d71b2b31e4f2dbc07 | [] | no_license | capitaneanu/ecat_master | 857e684d4a9a22c7d8f6cc99af1a76b588ff0b74 | 2026cc9f7164419c4f57def461a2db1a60cd68cf | refs/heads/master | 2022-02-21T07:03:50.322627 | 2018-05-17T02:36:17 | 2018-05-17T02:36:17 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 974 | h | #ifndef ECAT_MASTER_H
#define ECAT_MASTER_H
#include <errno.h>
#include <signal.h>
#include <stdio.h>
#include <string>
#include <sys/resource.h>
#include <sys/time.h>
#include <sys/types.h>
#include <unistd.h>
#include <sys/mman.h>
#include <rtdm/rtdm.h>
#include <native/task.h>
#include <native/sem.h>
#include <native/mutex.h>
#include <native/timer.h>
#include <rtdk.h>
#include <pthread.h>
#include "iostream"
#include "ecrt.h"
#include <unistd.h>
#include <libgen.h>
#include <vector>
#include "tinyxml2.h"
#include "ecat_imu.h"
#include "ecat_motor.h"
#include "ecat_force.h"
#define PI 3.141592654
//#define IMU_Pos_0 0, 0
//#define FORCE_Pos_0 0, 1
//#define IMU_Pos_1 0, 1
#define MOTOR_Pos_0 0, 0
typedef struct
{
#ifdef IMU_Pos_0
EcatImu imu_0;
#endif
#ifdef FORCE_Pos_0
EcatForce force_0;
#endif
#ifdef IMU_Pos_1
EcrtImu imu_1;
#endif
#ifdef MOTOR_Pos_0
EcatMotor motor_0;
#endif
}slaves_t;
#endif
| [
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] | |
20a3dc30ae47cf34591d28fff378c9c04779e9b2 | 0b0c045b7ba139bc19e22c07efb08b9072c8eb71 | /Xor Queries.cpp | b6efdde1fcd70add3902c684aa80555dc5a4b128 | [] | no_license | chetanpant11/InterviewBit-Solution | 1cb1ecc91499eff497849e120aeca12e268675a7 | b6e2b96f60255e1d8ff1c7c7927de3d6b3cf634e | refs/heads/master | 2022-11-07T07:03:27.346753 | 2020-06-15T16:32:56 | 2020-06-15T16:32:56 | 258,663,726 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,571 | cpp | #include <bits/stdc++.h>
using namespace std;
vector<vector<int>>ans(3, vector<int>(2));
void solve(vector<int>&v, vector<vector<int>>&v1)
{
vector<pair<int, int>>p(v.size());
if(v[0]==1)
{
p[0].first=0;
p[0].second=1;
}
if(v[0]==0)
{
p[0].first=1;
p[0].second=0;
}
for(int i=1;i<v.size();i++)
{
if(v[i]==0){
p[i].first=p[i-1].first+1;
p[i].second=p[i-1].second;
}
if(v[i]==1)
{
p[i].first=p[i-1].first;
p[i].second=p[i-1].second+1;
}
}
for(int i=0;i<v1.size();i++)
{
int l=v1[i][0]-1;
int r=v1[i][1]-1;
int zero,one;
if(l==0)
{
zero=p[r].first-(p[l].first);
one=p[r].second-(p[l].first);
}
else
{zero=(p[r].first-p[l-1].first);
one=(p[r].second-p[l-1].second);
}
ans[i][1]=zero;
if(one%2==0)
ans[i][0]=0;
else
ans[i][0]=1;
}
}
int main()
{
ios_base::sync_with_stdio(false);
cin.tie(NULL);
int n;
cin>>n;
vector<int> v(n);
for(int i=0;i<n;i++)
{
cin>>v[i];
}
int q;
cin>>q;
vector<vector<int>>v1(q, vector<int>(2));
for(int i=0;i<q;i++)
{
for(int j=0;j<2;j++)
{
cin>>v1[i][j];
}
}
solve(v,v1);
for(int i=0;i<q;i++)
{
for(int j=0;j<2;j++)
{
cout<<ans[i][j]<<" ";
}
cout<<endl;
}
}
| [
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] | |
b71b2b6bdeadd3a7840d6bc9d76acfb3e45f5a9f | 0bd7042901b018e30e56e77501b24d5178bbbcd1 | /Heap/Course Code (C++)/06-Heap-Sort/HeapSort.h | da9151c68ee45b590e84811d416a9103b4954fab | [] | no_license | liangruuu/Algorithm-Of-Notes | a983d8f94ff84eff1cf63215359e208ce6e901d7 | 7f6cd2734830d2ad2ee3bb4d06cd373db2090ae9 | refs/heads/master | 2020-05-25T20:37:47.699453 | 2020-04-18T12:20:43 | 2020-04-18T12:20:43 | 187,979,316 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,173 | h | //
// Created by liuyubobobo on 8/16/16.
//
#ifndef INC_06_HEAP_SORT_HEAPSORT_H
#define INC_06_HEAP_SORT_HEAPSORT_H
#include "Heap.h"
using namespace std;
// heapSort1, 将所有的元素依次添加到堆中, 在将所有元素从堆中依次取出来,
// 即完成了排序 无论是创建堆的过程, 还是从堆中依次取出元素的过程,
// 时间复杂度均为O(nlogn) 整个堆排序的整体时间复杂度为O(nlogn)
template <typename T> void heapSort1(T arr[], int n) {
MaxHeap<T> maxheap = MaxHeap<T>(n);
for (int i = 0; i < n; i++)
maxheap.insert(arr[i]);
for (int i = n - 1; i >= 0; i--)
arr[i] = maxheap.extractMax();
}
// heapSort2, 借助我们的heapify过程创建堆
// 此时, 创建堆的过程时间复杂度为O(n), 将所有元素依次从堆中取出来,
// 实践复杂度为O(nlogn) 堆排序的总体时间复杂度依然是O(nlogn),
// 但是比上述heapSort1性能更优, 因为创建堆的性能更优
template <typename T> void heapSort2(T arr[], int n) {
MaxHeap<T> maxheap = MaxHeap<T>(arr, n);
for (int i = n - 1; i >= 0; i--)
arr[i] = maxheap.extractMax();
}
#endif // INC_06_HEAP_SORT_HEAPSORT_H
| [
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] | |
872333dee8b4c05c8fd9a5a6a4f84370da4d7b44 | 9242687d387adf911fbc5f959c88250f32aeb55a | /Catan/CatanEvents/CardIsEvent.cpp | 6f8fdc663bd48212090bcd8ee576820dc7d4c647 | [] | no_license | Kammann123/Catan | 39bd521f0bb5129310d18728ae1fa7cbb6e3a913 | 9e22e78f75455e1741c0b91c6dbcb8580de8d802 | refs/heads/master | 2022-03-10T06:54:45.814408 | 2022-02-09T19:32:28 | 2022-02-09T19:32:28 | 158,240,470 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 326 | cpp | #include "CardIsEvent.h"
CardIsEvent::
CardIsEvent(ResourceId resource, PlayerId player) : CatanEvent(Events::CARD_IS, Sources::GUI, player), CardIsData(resource) {}
CardIsEvent::
CardIsEvent(CardIsPacket* packet) : CatanEvent(Events::CARD_IS, Sources::NETWORKING, PlayerId::PLAYER_TWO), CardIsData(packet->getResource()) {} | [
"[email protected]"
] | |
4c98cf51446d0950e9964ead313bffa3e4a64371 | 496a2baaec5ffc40a819b8aec5caa45f28ccf48f | /codejam21/moonsAndUmbrellas.cpp | a03762bfb425a73b9191883cf7e859e286512f0a | [] | no_license | vishnubhagwan/Programs | 2c08a8d39ce8d2ec06ee738ad1205f4d8c6d56c8 | 4d5865153d6c5ab4784695d042a5564aee2f608c | refs/heads/master | 2023-07-31T06:34:55.729591 | 2021-10-05T02:48:03 | 2021-10-05T02:48:03 | 56,873,763 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,919 | cpp | #include <iostream>
#include <iomanip>
#include <queue>
#include <vector>
#include <algorithm>
#include <map>
#include <stack>
#include <set>
#include <assert.h>
#define pii pair<int, int>
#define fi first
#define se second
#define vipii vector<int, pair<int, int> >
#define ipii pair<int, pair<int, int> >
using namespace std;
typedef long long int ll;
const int N = int(1e5+1);
ll MOD = ll(1e9+7);
#define vi vector<int>
#define vii vector<vector<int> >
#define pb push_back
int mx(int a, int b, int c) {
return max(a,max(b,c));
}
int maxSellStock(string s, int X, int Y) {
int n = s.size();
//dp[i][j] = min cost for first i characters given that ith char was C (j = 0) and J (j = 1)
// dp[i][0] = min(dp[i-1][0], dp[i-1][1] + Y)
// dp[i][1] = min(dp[i-1][1], dp[i-1][0] + X)
vector<vector<int> > dp(n, vector<int>(2, 1e9));
if(s[0] == '?')
dp[0][0] = dp[0][1] = 0;
else
dp[0][s[0] == 'J'] = 0;
for(int i = 1 ; i < n ; i++) {
if(s[i] == 'C') {
if(s[i-1] == 'J')
dp[i][0] = dp[i-1][1] + Y;
else if(s[i-1] == 'C')
dp[i][0] = dp[i-1][0];
else
dp[i][0] = min(dp[i-1][0], dp[i-1][1] + Y);
}
else if(s[i] == 'J') {
if(s[i-1] == 'C')
dp[i][1] = dp[i-1][0] + X;
else if(s[i-1] == 'J')
dp[i][1] = dp[i-1][1];
else
dp[i][1] = min(dp[i-1][1], dp[i-1][0] + X);
}
else {
dp[i][0] = min(dp[i-1][0], dp[i-1][1] + Y);
dp[i][1] = min(dp[i-1][1], dp[i-1][0] + X);
}
}
// cout << '\n';
// for(int i = 0 ; i < n ; i++)
// dp[i][0] == 1e9 ? printf("%s ", "i") : printf("%d ", dp[i][0]); cout << '\n';
// for(int i = 0 ; i < n ; i++)
// dp[i][1] == 1e9 ? printf("%s ", "i") : printf("%d ", dp[i][1]); cout << '\n';
return min(dp[n-1][0], dp[n-1][1]);
}
int main() {
int n;
int t;
cin >> t;
for(int i = 1 ; i <= t ; i++) {
int x,y;
string s;
cin >> x >> y >> s;
cout << "Case #" << i << ": " << maxSellStock(s,x,y) << endl;
}
return 0;
}
| [
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] | |
c9a0ebe427660ba58ea19fdab791235d8c248204 | 3083387dab447dded915a5df17a9c1db2af37986 | /il2cpp-v21/MapFileParser/Statistics/HighLevelBreakdown.cpp | 8b95a03f3cefc893d0362887771a25e2249f6219 | [] | no_license | WuFengXue/il2cpp-Mirror | 5defc24ac6fe537ddaa518d062d9291f2aaf2dad | 48790bd85e868fc01f55decef1717488ebb10f1e | refs/heads/master | 2022-09-30T11:41:05.218173 | 2020-06-03T03:17:07 | 2020-06-03T03:17:07 | 263,846,048 | 4 | 1 | null | null | null | null | UTF-8 | C++ | false | false | 2,186 | cpp | #include "HighLevelBreakDown.h"
#include <sstream>
namespace mapfileparser
{
static bool Contains(const std::string& haystack, const std::string& needle)
{
return haystack.find(needle) != std::string::npos;
}
static bool EndsWith(const std::string& haystack, const std::string& needle)
{
if (haystack.length() >= needle.length())
return 0 == haystack.compare(haystack.length() - needle.length(), needle.length(), needle);
return false;
}
static int Percent(int64_t value, int64_t total)
{
return static_cast<int>(static_cast<float>(value) / static_cast<float>(total) * 100.0f);
}
static void FormatOutput(std::ostream& out, const std::string& name, int64_t value, int64_t total)
{
out << name << ": " << value << " bytes (" << Percent(value, total) << "%)" << std::endl;
}
static bool IsGeneratedCode(const std::string& objectFile)
{
return Contains(objectFile, "Bulk_") || Contains(objectFile, "Il2Cpp");
}
static bool IsOtherCode(const std::string& objectFile)
{
// This only makes sense for clang output.
return EndsWith(objectFile, ".o)");
}
std::string HighLevelBreakdown(const std::vector<Symbol>& symbols)
{
int64_t totalCodeSizeBytes = 0;
int64_t generatedCodeSizeBytes = 0;
int64_t otherCodeSizeBytes = 0;
int64_t engineCodeSizeBytes = 0;
for (std::vector<Symbol>::const_iterator symbol = symbols.begin(); symbol != symbols.end(); ++symbol)
{
if (symbol->segmentType == kSegmentTypeCode)
{
totalCodeSizeBytes += symbol->length;
if (IsGeneratedCode(symbol->objectFile))
generatedCodeSizeBytes += symbol->length;
else if (IsOtherCode(symbol->objectFile))
otherCodeSizeBytes += symbol->length;
else
engineCodeSizeBytes += symbol->length;
}
}
std::stringstream output;
output << "High level breakdown of code segments\n";
output << "-------------------------------------\n";
FormatOutput(output, "Total code", totalCodeSizeBytes, totalCodeSizeBytes);
FormatOutput(output, "Generated code", generatedCodeSizeBytes, totalCodeSizeBytes);
FormatOutput(output, "Engine code", engineCodeSizeBytes, totalCodeSizeBytes);
FormatOutput(output, "Other code", otherCodeSizeBytes, totalCodeSizeBytes);
return output.str();
}
} | [
"[email protected]"
] | |
f3e478682bc02a0781cac163847035b220eafdeb | b4e9ff1b80ff022aaacdf2f863bc3a668898ce7f | /lime/Bsvgpath/Export/macos/obj/src/lime/utils/AssetCache.cpp | 5ee115a29ebdf4e1ffdfcef12510ba1ba74bfe79 | [
"MIT"
] | permissive | TrilateralX/TrilateralSamples | c1aa206495cf6e1f4f249c87e49fa46d62544c24 | 9c9168c5c2fabed9222b47e738c67ec724b52aa6 | refs/heads/master | 2023-04-02T05:10:13.579952 | 2021-04-01T17:41:23 | 2021-04-01T17:41:23 | 272,706,707 | 1 | 0 | null | null | null | null | UTF-8 | C++ | false | true | 12,161 | cpp | // Generated by Haxe 4.2.0-rc.1+7dc565e63
#include <hxcpp.h>
#ifndef INCLUDED_Std
#include <Std.h>
#endif
#ifndef INCLUDED_StringTools
#include <StringTools.h>
#endif
#ifndef INCLUDED_haxe_Exception
#include <haxe/Exception.h>
#endif
#ifndef INCLUDED_haxe_IMap
#include <haxe/IMap.h>
#endif
#ifndef INCLUDED_haxe_ds_StringMap
#include <haxe/ds/StringMap.h>
#endif
#ifndef INCLUDED_lime_graphics_Image
#include <lime/graphics/Image.h>
#endif
#ifndef INCLUDED_lime_media_AudioBuffer
#include <lime/media/AudioBuffer.h>
#endif
#ifndef INCLUDED_lime_utils_AssetCache
#include <lime/utils/AssetCache.h>
#endif
HX_DEFINE_STACK_FRAME(_hx_pos_77dd7e775494cb08_14_new,"lime.utils.AssetCache","new",0x205507da,"lime.utils.AssetCache.new","lime/utils/AssetCache.hx",14,0xcfac28d4)
HX_LOCAL_STACK_FRAME(_hx_pos_77dd7e775494cb08_38_exists,"lime.utils.AssetCache","exists",0x81df4ea2,"lime.utils.AssetCache.exists","lime/utils/AssetCache.hx",38,0xcfac28d4)
HX_LOCAL_STACK_FRAME(_hx_pos_77dd7e775494cb08_59_set,"lime.utils.AssetCache","set",0x2058d31c,"lime.utils.AssetCache.set","lime/utils/AssetCache.hx",59,0xcfac28d4)
HX_LOCAL_STACK_FRAME(_hx_pos_77dd7e775494cb08_81_clear,"lime.utils.AssetCache","clear",0x54b4fb87,"lime.utils.AssetCache.clear","lime/utils/AssetCache.hx",81,0xcfac28d4)
namespace lime{
namespace utils{
void AssetCache_obj::__construct(){
HX_GC_STACKFRAME(&_hx_pos_77dd7e775494cb08_14_new)
HXLINE( 17) this->enabled = true;
HXLINE( 24) this->audio = ::haxe::ds::StringMap_obj::__alloc( HX_CTX );
HXLINE( 25) this->font = ::haxe::ds::StringMap_obj::__alloc( HX_CTX );
HXLINE( 26) this->image = ::haxe::ds::StringMap_obj::__alloc( HX_CTX );
HXLINE( 33) this->version = 807115;
}
Dynamic AssetCache_obj::__CreateEmpty() { return new AssetCache_obj; }
void *AssetCache_obj::_hx_vtable = 0;
Dynamic AssetCache_obj::__Create(::hx::DynamicArray inArgs)
{
::hx::ObjectPtr< AssetCache_obj > _hx_result = new AssetCache_obj();
_hx_result->__construct();
return _hx_result;
}
bool AssetCache_obj::_hx_isInstanceOf(int inClassId) {
return inClassId==(int)0x00000001 || inClassId==(int)0x218de06a;
}
bool AssetCache_obj::exists(::String id,::String type){
HX_STACKFRAME(&_hx_pos_77dd7e775494cb08_38_exists)
HXLINE( 39) bool _hx_tmp;
HXDLIN( 39) if ((type != HX_("IMAGE",3b,57,57,3b))) {
HXLINE( 39) _hx_tmp = ::hx::IsNull( type );
}
else {
HXLINE( 39) _hx_tmp = true;
}
HXDLIN( 39) if (_hx_tmp) {
HXLINE( 41) if (this->image->exists(id)) {
HXLINE( 41) return true;
}
}
HXLINE( 44) bool _hx_tmp1;
HXDLIN( 44) if ((type != HX_("FONT",cf,25,81,2e))) {
HXLINE( 44) _hx_tmp1 = ::hx::IsNull( type );
}
else {
HXLINE( 44) _hx_tmp1 = true;
}
HXDLIN( 44) if (_hx_tmp1) {
HXLINE( 46) if (this->font->exists(id)) {
HXLINE( 46) return true;
}
}
HXLINE( 49) bool _hx_tmp2;
HXDLIN( 49) bool _hx_tmp3;
HXDLIN( 49) if ((type != HX_("SOUND",af,c4,ba,fe))) {
HXLINE( 49) _hx_tmp3 = (type == HX_("MUSIC",85,08,49,8e));
}
else {
HXLINE( 49) _hx_tmp3 = true;
}
HXDLIN( 49) if (!(_hx_tmp3)) {
HXLINE( 49) _hx_tmp2 = ::hx::IsNull( type );
}
else {
HXLINE( 49) _hx_tmp2 = true;
}
HXDLIN( 49) if (_hx_tmp2) {
HXLINE( 51) if (this->audio->exists(id)) {
HXLINE( 51) return true;
}
}
HXLINE( 54) return false;
}
HX_DEFINE_DYNAMIC_FUNC2(AssetCache_obj,exists,return )
void AssetCache_obj::set(::String id,::String type, ::Dynamic asset){
HX_STACKFRAME(&_hx_pos_77dd7e775494cb08_59_set)
HXDLIN( 59) ::String _hx_switch_0 = type;
if ( (_hx_switch_0==HX_("FONT",cf,25,81,2e)) ){
HXLINE( 62) this->font->set(id,asset);
HXDLIN( 62) goto _hx_goto_2;
}
if ( (_hx_switch_0==HX_("IMAGE",3b,57,57,3b)) ){
HXLINE( 65) if (!(::Std_obj::isOfType(asset,( ( ::Dynamic)(::hx::ClassOf< ::lime::graphics::Image >()) )))) {
HXLINE( 65) HX_STACK_DO_THROW(::haxe::Exception_obj::thrown(((HX_("Cannot cache non-Image asset: ",d6,62,c2,3a) + ::Std_obj::string(asset)) + HX_(" as Image",ad,d1,70,d4))));
}
HXLINE( 67) this->image->set(id,( ( ::lime::graphics::Image)(asset) ));
HXLINE( 64) goto _hx_goto_2;
}
if ( (_hx_switch_0==HX_("MUSIC",85,08,49,8e)) || (_hx_switch_0==HX_("SOUND",af,c4,ba,fe)) ){
HXLINE( 70) if (!(::Std_obj::isOfType(asset,( ( ::Dynamic)(::hx::ClassOf< ::lime::media::AudioBuffer >()) )))) {
HXLINE( 70) HX_STACK_DO_THROW(::haxe::Exception_obj::thrown(((HX_("Cannot cache non-AudioBuffer asset: ",b1,96,a5,01) + ::Std_obj::string(asset)) + HX_(" as AudioBuffer",48,2a,fe,73))));
}
HXLINE( 72) this->audio->set(id,( ( ::lime::media::AudioBuffer)(asset) ));
HXLINE( 69) goto _hx_goto_2;
}
/* default */{
HXLINE( 75) HX_STACK_DO_THROW(::haxe::Exception_obj::thrown((type + HX_(" assets are not cachable",f3,2d,ee,fa))));
}
_hx_goto_2:;
}
HX_DEFINE_DYNAMIC_FUNC3(AssetCache_obj,set,(void))
void AssetCache_obj::clear(::String prefix){
HX_GC_STACKFRAME(&_hx_pos_77dd7e775494cb08_81_clear)
HXDLIN( 81) if (::hx::IsNull( prefix )) {
HXLINE( 83) this->audio = ::haxe::ds::StringMap_obj::__alloc( HX_CTX );
HXLINE( 84) this->font = ::haxe::ds::StringMap_obj::__alloc( HX_CTX );
HXLINE( 85) this->image = ::haxe::ds::StringMap_obj::__alloc( HX_CTX );
}
else {
HXLINE( 89) ::Dynamic keys = this->audio->keys();
HXLINE( 91) {
HXLINE( 91) ::Dynamic key = keys;
HXDLIN( 91) while(( (bool)(key->__Field(HX_("hasNext",6d,a5,46,18),::hx::paccDynamic)()) )){
HXLINE( 91) ::String key1 = ( (::String)(key->__Field(HX_("next",f3,84,02,49),::hx::paccDynamic)()) );
HXLINE( 93) if (::StringTools_obj::startsWith(key1,prefix)) {
HXLINE( 95) this->audio->remove(key1);
}
}
}
HXLINE( 99) ::Dynamic keys1 = this->font->keys();
HXLINE( 101) {
HXLINE( 101) ::Dynamic key1 = keys1;
HXDLIN( 101) while(( (bool)(key1->__Field(HX_("hasNext",6d,a5,46,18),::hx::paccDynamic)()) )){
HXLINE( 101) ::String key = ( (::String)(key1->__Field(HX_("next",f3,84,02,49),::hx::paccDynamic)()) );
HXLINE( 103) if (::StringTools_obj::startsWith(key,prefix)) {
HXLINE( 105) this->font->remove(key);
}
}
}
HXLINE( 109) ::Dynamic keys2 = this->image->keys();
HXLINE( 111) {
HXLINE( 111) ::Dynamic key2 = keys2;
HXDLIN( 111) while(( (bool)(key2->__Field(HX_("hasNext",6d,a5,46,18),::hx::paccDynamic)()) )){
HXLINE( 111) ::String key = ( (::String)(key2->__Field(HX_("next",f3,84,02,49),::hx::paccDynamic)()) );
HXLINE( 113) if (::StringTools_obj::startsWith(key,prefix)) {
HXLINE( 115) this->image->remove(key);
}
}
}
}
}
HX_DEFINE_DYNAMIC_FUNC1(AssetCache_obj,clear,(void))
::hx::ObjectPtr< AssetCache_obj > AssetCache_obj::__new() {
::hx::ObjectPtr< AssetCache_obj > __this = new AssetCache_obj();
__this->__construct();
return __this;
}
::hx::ObjectPtr< AssetCache_obj > AssetCache_obj::__alloc(::hx::Ctx *_hx_ctx) {
AssetCache_obj *__this = (AssetCache_obj*)(::hx::Ctx::alloc(_hx_ctx, sizeof(AssetCache_obj), true, "lime.utils.AssetCache"));
*(void **)__this = AssetCache_obj::_hx_vtable;
__this->__construct();
return __this;
}
AssetCache_obj::AssetCache_obj()
{
}
void AssetCache_obj::__Mark(HX_MARK_PARAMS)
{
HX_MARK_BEGIN_CLASS(AssetCache);
HX_MARK_MEMBER_NAME(audio,"audio");
HX_MARK_MEMBER_NAME(enabled,"enabled");
HX_MARK_MEMBER_NAME(image,"image");
HX_MARK_MEMBER_NAME(font,"font");
HX_MARK_MEMBER_NAME(version,"version");
HX_MARK_END_CLASS();
}
void AssetCache_obj::__Visit(HX_VISIT_PARAMS)
{
HX_VISIT_MEMBER_NAME(audio,"audio");
HX_VISIT_MEMBER_NAME(enabled,"enabled");
HX_VISIT_MEMBER_NAME(image,"image");
HX_VISIT_MEMBER_NAME(font,"font");
HX_VISIT_MEMBER_NAME(version,"version");
}
::hx::Val AssetCache_obj::__Field(const ::String &inName,::hx::PropertyAccess inCallProp)
{
switch(inName.length) {
case 3:
if (HX_FIELD_EQ(inName,"set") ) { return ::hx::Val( set_dyn() ); }
break;
case 4:
if (HX_FIELD_EQ(inName,"font") ) { return ::hx::Val( font ); }
break;
case 5:
if (HX_FIELD_EQ(inName,"audio") ) { return ::hx::Val( audio ); }
if (HX_FIELD_EQ(inName,"image") ) { return ::hx::Val( image ); }
if (HX_FIELD_EQ(inName,"clear") ) { return ::hx::Val( clear_dyn() ); }
break;
case 6:
if (HX_FIELD_EQ(inName,"exists") ) { return ::hx::Val( exists_dyn() ); }
break;
case 7:
if (HX_FIELD_EQ(inName,"enabled") ) { return ::hx::Val( enabled ); }
if (HX_FIELD_EQ(inName,"version") ) { return ::hx::Val( version ); }
}
return super::__Field(inName,inCallProp);
}
::hx::Val AssetCache_obj::__SetField(const ::String &inName,const ::hx::Val &inValue,::hx::PropertyAccess inCallProp)
{
switch(inName.length) {
case 4:
if (HX_FIELD_EQ(inName,"font") ) { font=inValue.Cast< ::haxe::ds::StringMap >(); return inValue; }
break;
case 5:
if (HX_FIELD_EQ(inName,"audio") ) { audio=inValue.Cast< ::haxe::ds::StringMap >(); return inValue; }
if (HX_FIELD_EQ(inName,"image") ) { image=inValue.Cast< ::haxe::ds::StringMap >(); return inValue; }
break;
case 7:
if (HX_FIELD_EQ(inName,"enabled") ) { enabled=inValue.Cast< bool >(); return inValue; }
if (HX_FIELD_EQ(inName,"version") ) { version=inValue.Cast< int >(); return inValue; }
}
return super::__SetField(inName,inValue,inCallProp);
}
void AssetCache_obj::__GetFields(Array< ::String> &outFields)
{
outFields->push(HX_("audio",d6,78,80,27));
outFields->push(HX_("enabled",81,04,31,7e));
outFields->push(HX_("image",5b,1f,69,bd));
outFields->push(HX_("font",cf,5d,c0,43));
outFields->push(HX_("version",18,e7,f1,7c));
super::__GetFields(outFields);
};
#ifdef HXCPP_SCRIPTABLE
static ::hx::StorageInfo AssetCache_obj_sMemberStorageInfo[] = {
{::hx::fsObject /* ::haxe::ds::StringMap */ ,(int)offsetof(AssetCache_obj,audio),HX_("audio",d6,78,80,27)},
{::hx::fsBool,(int)offsetof(AssetCache_obj,enabled),HX_("enabled",81,04,31,7e)},
{::hx::fsObject /* ::haxe::ds::StringMap */ ,(int)offsetof(AssetCache_obj,image),HX_("image",5b,1f,69,bd)},
{::hx::fsObject /* ::haxe::ds::StringMap */ ,(int)offsetof(AssetCache_obj,font),HX_("font",cf,5d,c0,43)},
{::hx::fsInt,(int)offsetof(AssetCache_obj,version),HX_("version",18,e7,f1,7c)},
{ ::hx::fsUnknown, 0, null()}
};
static ::hx::StaticInfo *AssetCache_obj_sStaticStorageInfo = 0;
#endif
static ::String AssetCache_obj_sMemberFields[] = {
HX_("audio",d6,78,80,27),
HX_("enabled",81,04,31,7e),
HX_("image",5b,1f,69,bd),
HX_("font",cf,5d,c0,43),
HX_("version",18,e7,f1,7c),
HX_("exists",dc,1d,e0,bf),
HX_("set",a2,9b,57,00),
HX_("clear",8d,71,5b,48),
::String(null()) };
::hx::Class AssetCache_obj::__mClass;
void AssetCache_obj::__register()
{
AssetCache_obj _hx_dummy;
AssetCache_obj::_hx_vtable = *(void **)&_hx_dummy;
::hx::Static(__mClass) = new ::hx::Class_obj();
__mClass->mName = HX_("lime.utils.AssetCache",e8,d2,51,4a);
__mClass->mSuper = &super::__SGetClass();
__mClass->mConstructEmpty = &__CreateEmpty;
__mClass->mConstructArgs = &__Create;
__mClass->mGetStaticField = &::hx::Class_obj::GetNoStaticField;
__mClass->mSetStaticField = &::hx::Class_obj::SetNoStaticField;
__mClass->mStatics = ::hx::Class_obj::dupFunctions(0 /* sStaticFields */);
__mClass->mMembers = ::hx::Class_obj::dupFunctions(AssetCache_obj_sMemberFields);
__mClass->mCanCast = ::hx::TCanCast< AssetCache_obj >;
#ifdef HXCPP_SCRIPTABLE
__mClass->mMemberStorageInfo = AssetCache_obj_sMemberStorageInfo;
#endif
#ifdef HXCPP_SCRIPTABLE
__mClass->mStaticStorageInfo = AssetCache_obj_sStaticStorageInfo;
#endif
::hx::_hx_RegisterClass(__mClass->mName, __mClass);
}
} // end namespace lime
} // end namespace utils
| [
"none"
] | none |
049d9ac06ce0fdc72eeb868d7e8bae4bde7b81b1 | a1a8b69b2a24fd86e4d260c8c5d4a039b7c06286 | /build/iOS/Release/include/Fuse.Controls.IProxyHostExtensions.h | 9d89194309dbf8c8cb727f0c3ec0b52e953fc938 | [] | no_license | epireve/hikr-tute | df0af11d1cfbdf6e874372b019d30ab0541c09b7 | 545501fba7044b4cc927baea2edec0674769e22c | refs/heads/master | 2021-09-02T13:54:05.359975 | 2018-01-03T01:21:31 | 2018-01-03T01:21:31 | 115,536,756 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 713 | h | // This file was generated based on /usr/local/share/uno/Packages/Fuse.Controls.Panels/1.4.2/GraphicsView.ux.uno.
// WARNING: Changes might be lost if you edit this file directly.
#pragma once
#include <Uno.h>
namespace g{namespace Fuse{namespace Controls{struct IProxyHostExtensions;}}}
namespace g{namespace Fuse{struct Visual;}}
namespace g{
namespace Fuse{
namespace Controls{
// internal static class IProxyHostExtensions :71
// {
uClassType* IProxyHostExtensions_typeof();
void IProxyHostExtensions__FindProxyHost_fn(::g::Fuse::Visual* visual, uObject** __retval);
struct IProxyHostExtensions : uObject
{
static uObject* FindProxyHost(::g::Fuse::Visual* visual);
};
// }
}}} // ::g::Fuse::Controls
| [
"[email protected]"
] | |
15d8b5583342330d2d8421eae47b0c9b00f14e68 | e682c542cb4a5f117293d82efb511ddfa42517fc | /solutions/Robots.cpp | 26e04931459a6e9a04dc2fe6d4a0e6bf164e423d | [] | no_license | jssosa10/maratones | d7d6b45712444d256d9c9e68d5cccca741f54fa9 | 44b6aca9e727e557f0224ff314c9ba2369217721 | refs/heads/master | 2021-01-20T02:48:02.723147 | 2018-03-21T16:34:58 | 2018-03-21T16:34:58 | 101,334,745 | 1 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,206 | cpp | #include<bits/stdc++.h>
using namespace std;
const int N = 1000;
vector<int> v[2][N];
int vis[N][N];
void bfs(int a, int b){
queue<pair<int,int> >q;
q.push(make_pair(a,b));
vis[a][b]=vis[b][a]=1;
while(!q.empty()){
pair<int,int> e = q.front();q.pop();
a = e.first;
b = e.second;
for(int i=0; i<2;i++){
for(int j=0; j<(int)v[i][a].size(); j++){
for(int k=0; k<(int)v[i][b].size(); k++){
int ka = v[i][a][j];
int kb = v[i][b][k];
if(vis[ka][kb]==0){
vis[ka][kb]=vis[kb][ka]=1;
q.push(make_pair(ka,kb));
}
}
}
}
}
}
int T,id,n;
int main(){
scanf("%d",&T);
while(T--){
memset(vis,0,sizeof(vis));
scanf("%d %d",&id,&n);
for (int i = 0; i < 2; i++){
for (int j = 0; i < n; j++){
v[i][j].clear();
}
}
int x;
for(int i=0;i<n;i++){
scanf("%d",&x);
v[0][x].push_back(i);
}
for(int i=0;i<n;i++){
scanf("%d",&x);
v[1][x].push_back(i);
}
for(int i=0;i<n;i++){
if(vis[i][i]==0)bfs(i,i);
}
int flag = 0;
for (int i = 0; i < n; i++){
for (int j = 0; j < n; j++){
if(vis[i][j]==0){
flag=1;
break;
}
}
if(flag)break;
}
printf("%d %s\n",id,(flag==1?"NO":"YES") );
}
return 0;
} | [
"[email protected]"
] | |
566ed6a218c3b950e8ec26e9970e17c269db2428 | 5bc8e108d6205094a6a96a57b6883bcf0d2ecd6e | /src/core/hw/gfxip/gfxImage.h | 0d85d935ded11630e069277f2b704bbd591be593 | [
"MIT"
] | permissive | Flakebi/pal | ccb0ef712d3f34b0d9d745857c315d48266464a0 | be240754b39115b4f1cb9f6b2a297deb429156b5 | refs/heads/master | 2021-06-19T15:34:41.205855 | 2019-08-12T09:49:16 | 2019-08-12T09:49:16 | 182,103,864 | 0 | 0 | MIT | 2019-04-18T14:34:14 | 2019-04-18T14:34:14 | null | UTF-8 | C++ | false | false | 11,270 | h | /*
***********************************************************************************************************************
*
* Copyright (c) 2015-2019 Advanced Micro Devices, Inc. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
**********************************************************************************************************************/
#pragma once
#include "core/gpuMemory.h"
#include "addrinterface.h"
#include "addrtypes.h"
#include "palCmdBuffer.h"
namespace Pal
{
// Forward declarations
class CmdBuffer;
class Device;
class Image;
class GfxCmdBuffer;
class SubResIterator;
struct GpuMemoryRequirements;
struct ImageInfo;
struct SubresId;
struct SubResourceInfo;
enum class ImageAspect : uint32;
enum class ClearMethod : uint32;
// Mask of all image usage layout flags which are valid to use on depth/stencil Images.
constexpr uint32 AllDepthImageLayoutFlags = LayoutUninitializedTarget |
LayoutDepthStencilTarget |
LayoutShaderRead |
LayoutShaderWrite |
LayoutCopySrc |
LayoutCopyDst |
LayoutResolveSrc |
LayoutResolveDst;
enum UseComputeExpand : uint32
{
UseComputeExpandDepth = 0x00000001,
UseComputeExpandMsaaDepth = 0x00000002,
UseComputeExpandDcc = 0x00000004,
UseComputeExpandMsaaDcc = 0x00000008,
UseComputeExpandAlways = 0x00000010,
};
// Internal flags set for opening shared metadata path.
union SharedMetadataFlags
{
struct
{
uint32 shaderFetchable : 1; // Main metadata is shader fetchable.
uint32 shaderFetchableFmask : 1; // In case the FMASK shader-fetchable is different from main metadata. - TBD
uint32 hasWaTcCompatZRange : 1; // Extra per-mip uint32 reserved after fast-clear-value.
uint32 hasEqGpuAccess : 1; // Metadata equation for GPU access following main metadata (DCC or HTILE).
// CS-based fast-clear is disabled w/o this on GFX9.
uint32 hasHtileLookupTable : 1; // Htile look-up table for each mip and slice - DB fixed-func resolve is
// disabled w/o this.
uint32 reserved : 27;
};
uint32 value;
};
// Shared metadata info to be used for opened optimally shared image.
struct SharedMetadataInfo
{
SharedMetadataFlags flags;
gpusize dccOffset;
gpusize cmaskOffset;
gpusize fmaskOffset;
gpusize fmaskXor;
gpusize htileOffset;
gpusize dccStateMetaDataOffset;
gpusize fastClearMetaDataOffset;
gpusize fastClearEliminateMetaDataOffset;
gpusize htileLookupTableOffset;
uint64 resourceId; // This id is a unique name for the cross-process shared memory used to pass extra
// information. Currently it's composed by the image object pointer and process id.
};
// =====================================================================================================================
class GfxImage
{
public:
static constexpr uint32 UseComputeExpand = UseComputeExpandDepth | UseComputeExpandDcc;
virtual ~GfxImage() {}
Image* Parent() const { return m_pParent; }
virtual ImageType GetOverrideImageType() const;
virtual bool HasFmaskData() const = 0;
virtual bool HasHtileData() const = 0;
virtual bool IsFastColorClearSupported(GfxCmdBuffer* pCmdBuffer,
ImageLayout colorLayout,
const uint32* pColor,
const SubresRange& range) = 0;
virtual bool IsFastDepthStencilClearSupported(ImageLayout depthLayout,
ImageLayout stencilLayout,
float depth,
uint8 stencil,
const SubresRange& range) const = 0;
virtual bool IsFormatReplaceable(const SubresId& subresId, ImageLayout layout, bool isDst) const = 0;
virtual bool IsSubResourceLinear(const SubresId& subresource) const = 0;
virtual void OverrideGpuMemHeaps(GpuMemoryRequirements* pMemReqs) const { }
virtual bool IsRestrictedTiledMultiMediaSurface() const;
bool HasFastClearMetaData() const { return m_fastClearMetaDataOffset != 0; }
gpusize FastClearMetaDataAddr(uint32 mipLevel) const;
gpusize FastClearMetaDataOffset(uint32 mipLevel) const;
gpusize FastClearMetaDataSize(uint32 numMips) const;
virtual void GetSharedMetadataInfo(SharedMetadataInfo* pMetadataInfo) const = 0;
virtual gpusize GetAspectBaseAddr(ImageAspect aspect) const { PAL_NEVER_CALLED(); return 0; }
uint32 TranslateClearCodeOneToNativeFmt(uint32 cmpIdx) const;
// Returns an integer that represents the tiling mode associated with the specified subresource.
virtual uint32 GetSwTileMode(const SubResourceInfo* pSubResInfo) const = 0;
// Initializes the metadata in the given subresource range using CmdFillMemory calls. It may not be possible
// for some gfxip layers to implement this function.
virtual void InitMetadataFill(CmdBuffer* pCmdBuffer, const SubresRange& range) const = 0;
// Helper function for AddrMgr1 to initialize the AddrLib surface info strucutre for a subresource.
virtual Result Addr1InitSurfaceInfo(
uint32 subResIdx,
ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfInfo) { return Result::ErrorUnavailable; }
// Helper function for AddrMgr1 to finalize the subresource and tiling info for a subresource after
// calling AddrLib.
virtual void Addr1FinalizeSubresource(
uint32 subResIdx,
SubResourceInfo* pSubResInfoList,
void* pTileInfoList,
const ADDR_COMPUTE_SURFACE_INFO_OUTPUT& surfInfo) { PAL_NEVER_CALLED(); }
virtual void Addr2InitSubResInfo(
const SubResIterator& subResIt,
SubResourceInfo* pSubResInfoList,
void* pSubResTileInfoList,
gpusize* pGpuMemSize) { PAL_NEVER_CALLED(); }
// Helper function for AddrMgr2 to finalize the addressing information for an aspect plane.
virtual Result Addr2FinalizePlane(
SubResourceInfo* pBaseSubRes,
void* pBaseTileInfo,
const ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT& surfaceSetting,
const ADDR2_COMPUTE_SURFACE_INFO_OUTPUT& surfaceInfo) { return Result::ErrorUnavailable; }
// Helper function for AddrMgr2 to finalize the subresource info for a subresource after calling AddrLib.
virtual void Addr2FinalizeSubresource(
SubResourceInfo* pSubResInfo,
const ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT& surfaceSetting) const { PAL_NEVER_CALLED(); }
virtual Result Finalize(
bool dccUnsupported,
SubResourceInfo* pSubResInfoList,
void* pTileInfoList,
ImageMemoryLayout* pGpuMemLayout,
gpusize* pGpuMemSize,
gpusize* pGpuMemAlignment) = 0;
void PadYuvPlanarViewActualExtent(
SubresId subresource,
Extent3d* pActualExtent) const;
// Returns true if the specified mip level supports having a meta-data surface for the given mip level
virtual bool CanMipSupportMetaData(uint32 mip) const { return true; }
virtual Result GetDefaultGfxLayout(SubresId subresId, ImageLayout* pLayout) const = 0;
// Returns true if a clear operation was ever performed with a non-TC compatible clear color.
bool HasSeenNonTcCompatibleClearColor() const { return (m_hasSeenNonTcCompatClearColor == true); }
void SetNonTcCompatClearFlag(bool value) { m_hasSeenNonTcCompatClearColor = value; }
bool IsFceOptimizationEnabled() { return (m_pNumSkippedFceCounter!= nullptr); };
uint32* GetFceRefCounter() const { return m_pNumSkippedFceCounter; }
uint32 GetFceRefCount() const;
void IncrementFceRefCount();
protected:
GfxImage(
Image* pParentImage,
ImageInfo* pImageInfo,
const Device& device);
uint32 GetDepthStencilStateIndex(ImageAspect dsAspect) const;
static void UpdateMetaDataLayout(
ImageMemoryLayout* pGpuMemLayout,
gpusize offset,
gpusize alignment);
static void UpdateMetaDataHeaderLayout(
ImageMemoryLayout* pGpuMemLayout,
gpusize offset,
gpusize alignment);
void InitFastClearMetaData(
ImageMemoryLayout* pGpuMemLayout,
gpusize* pGpuMemSize,
size_t sizePerMipLevel,
gpusize alignment);
void UpdateClearMethod(
SubResourceInfo* pSubResInfoList,
ImageAspect aspect,
uint32 mipLevel,
ClearMethod method);
void Destroy();
Image*const m_pParent;
const Device& m_device;
const ImageCreateInfo& m_createInfo;
ImageInfo*const m_pImageInfo;
gpusize m_fastClearMetaDataOffset; // Offset to beginning of fast-clear metadata
gpusize m_fastClearMetaDataSizePerMip; // Size of fast-clear metadata per mip level.
bool m_hasSeenNonTcCompatClearColor; // True if this image has been cleared with non TC-compatible color.
uint32* m_pNumSkippedFceCounter;
private:
PAL_DISALLOW_DEFAULT_CTOR(GfxImage);
PAL_DISALLOW_COPY_AND_ASSIGN(GfxImage);
};
} // Pal
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