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8f1dcc1a84859c0c42edc1deae093b64ca6d7427 | a3d6556180e74af7b555f8d47d3fea55b94bcbda | /chrome/browser/ui/views/side_panel/side_panel_registry.h | 51044fcb3f45ab1e567fcc3f6d224301d251ee0a | [
"BSD-3-Clause"
] | permissive | chromium/chromium | aaa9eda10115b50b0616d2f1aed5ef35d1d779d6 | a401d6cf4f7bf0e2d2e964c512ebb923c3d8832c | refs/heads/main | 2023-08-24T00:35:12.585945 | 2023-08-23T22:01:11 | 2023-08-23T22:01:11 | 120,360,765 | 17,408 | 7,102 | BSD-3-Clause | 2023-09-10T23:44:27 | 2018-02-05T20:55:32 | null | UTF-8 | C++ | false | false | 3,261 | h | // Copyright 2021 The Chromium Authors
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
#ifndef CHROME_BROWSER_UI_VIEWS_SIDE_PANEL_SIDE_PANEL_REGISTRY_H_
#define CHROME_BROWSER_UI_VIEWS_SIDE_PANEL_SIDE_PANEL_REGISTRY_H_
#include <memory>
#include <vector>
#include "base/observer_list.h"
#include "base/supports_user_data.h"
#include "chrome/browser/ui/views/side_panel/side_panel_entry.h"
#include "chrome/browser/ui/views/side_panel/side_panel_entry_observer.h"
namespace content {
class WebContents;
} // namespace content
class SidePanelRegistryObserver;
// This class is used for storing SidePanelEntries specific to a context. This
// context can be one per tab or one per window. See also SidePanelCoordinator.
class SidePanelRegistry final : public base::SupportsUserData::Data,
public SidePanelEntryObserver {
public:
SidePanelRegistry();
SidePanelRegistry(const SidePanelRegistry&) = delete;
SidePanelRegistry& operator=(const SidePanelRegistry&) = delete;
~SidePanelRegistry() override;
// Gets the contextual registry for the tab associated with |web_contents|.
// Can return null for non-tab contents.
static SidePanelRegistry* Get(content::WebContents* web_contents);
SidePanelEntry* GetEntryForKey(const SidePanelEntry::Key& entry_key);
void ResetActiveEntry();
// Clear cached view for all owned entries.
void ClearCachedEntryViews();
void AddObserver(SidePanelRegistryObserver* observer);
void RemoveObserver(SidePanelRegistryObserver* observer);
// Registers a SidePanelEntry. Returns true if the entry is successfully
// registered and false if a SidePanelEntry already exists in the registry for
// the provided SidePanelEntry::Id.
bool Register(std::unique_ptr<SidePanelEntry> entry);
// Deregisters the entry for the given SidePanelEntry::Key. Returns true if
// successful and false if there is no entry registered for the `key`.
bool Deregister(const SidePanelEntry::Key& key);
// Deregisters the entry for the given SidePanelEntry::Key and returns the
// entry or nullptr if one does not exist.
std::unique_ptr<SidePanelEntry> DeregisterAndReturnEntry(
const SidePanelEntry::Key& key);
// Set the active entry in the side panel to be |entry|.
void SetActiveEntry(SidePanelEntry* entry);
absl::optional<SidePanelEntry*> active_entry() { return active_entry_; }
std::vector<std::unique_ptr<SidePanelEntry>>& entries() { return entries_; }
// SidePanelEntryObserver:
void OnEntryShown(SidePanelEntry* id) override;
void OnEntryIconUpdated(SidePanelEntry* entry) override;
private:
std::unique_ptr<SidePanelEntry> RemoveEntry(SidePanelEntry* entry);
// The last active entry hosted in the side panel used to determine what entry
// should be visible. This is reset by the coordinator when the panel is
// closed. When there are multiple registries, this may not be the entry
// currently visible in the side panel.
absl::optional<SidePanelEntry*> active_entry_;
std::vector<std::unique_ptr<SidePanelEntry>> entries_;
base::ObserverList<SidePanelRegistryObserver> observers_;
};
#endif // CHROME_BROWSER_UI_VIEWS_SIDE_PANEL_SIDE_PANEL_REGISTRY_H_
| [
"[email protected]"
] | |
5830599b5b5d25b85980b2a784d1eb792a55ae9e | 4e6098eba2b09175b712d93c9fd956022d47e394 | /HitBox/SaveLocation.cpp | f35ccc0eebca2487c8cfe44b93a8dc61c14e2d7d | [] | no_license | zjw1996/A-ball-game | f515ce7ead3b6635e398572138a7d2d2fac03851 | a717fb6791ca1f3fc26ab35228bcd88412d88f4f | refs/heads/master | 2020-12-13T03:05:15.416953 | 2020-01-16T10:38:16 | 2020-01-16T10:38:16 | 234,291,598 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 524 | cpp | #include "SaveLocation.h"
#include "GameMode/BallGameModeBase.h"
#include "Components/BoxComponent.h"
#include "Components/StaticMeshComponent.h"
ASaveLocation::ASaveLocation() {
SaveMeshComp = CreateDefaultSubobject<UStaticMeshComponent>(TEXT("SaveMesh"));
HitBoxComp->SetupAttachment(SaveMeshComp);
}
void ASaveLocation::OnHitSphere(ASphereBase * sphere) {
ABallGameModeBase * GameModeBase = Cast<ABallGameModeBase>(GetWorld()->GetAuthGameMode());
GameModeBase->SetCurrentStart(HitBoxComp->GetComponentLocation());
} | [
"[email protected]"
] | |
4bc3c4266a6c5b28b36ef9919241371ec0a923e2 | dba9a8852119805d4cd0c8b163637d08caac6f49 | /Mednafen/src/video/video.cpp | 1236a6c3db8c177a6c0755f5647eef3605f82271 | [] | no_license | billy12/OpenEmu | b9d9ce6c72498ee6fe6f9d807abb0a6a72c2155d | cab889fbd7f06ab5b2c0ec91164319a7ad6e191c | refs/heads/master | 2020-12-25T05:53:21.496096 | 2011-05-16T00:18:59 | 2011-05-16T00:18:59 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,886 | cpp | /* Mednafen - Multi-system Emulator
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <sys/types.h>
#include <sys/stat.h>
#include <unistd.h>
#include <string.h>
#include <stdarg.h>
#include <trio/trio.h>
#include "video-common.h"
void MDFNI_SaveSnapshot(void)
{
try
{
FILE *pp=NULL;
std::string fn;
int u;
if(!(pp = fopen(MDFN_MakeFName(MDFNMKF_SNAP_DAT, 0, NULL).c_str(), "rb")))
u = 0;
else
{
if(fscanf(pp, "%d", &u) == 0)
u = 0;
fclose(pp);
}
if(!(pp = fopen(MDFN_MakeFName(MDFNMKF_SNAP_DAT, 0, NULL).c_str(), "wb")))
throw(0);
fseek(pp, 0, SEEK_SET);
fprintf(pp, "%d\n", u + 1);
fclose(pp);
fn = MDFN_MakeFName(MDFNMKF_SNAP, u, "png");
if(!MDFN_SavePNGSnapshot(fn.c_str(), (uint32*)MDFNGameInfo->fb, &MDFNGameInfo->DisplayRect, MDFNGameInfo->pitch))
throw(0);
MDFN_DispMessage(_("Screen snapshot %d saved."), u);
}
catch(int x)
{
MDFN_DispMessage(_("Error saving screen snapshot."));
}
}
void MDFN_DispMessage(const char *format, ...)
{
va_list ap;
va_start(ap,format);
char *msg = NULL;
trio_vasprintf(&msg, format,ap);
va_end(ap);
MDFND_DispMessage((UTF8*)msg);
}
void MDFN_ResetMessages(void)
{
MDFND_DispMessage(NULL);
}
| [
"[email protected]"
] | |
32b18757035b0cf3131594e7e26553f9887cea99 | 6857c6bfa978d70f45d920d15323b94427fd374e | /TetAttack/TetAttack/IStreamingSound.h | b3453c87baf9d7a61e4e50b2430d672fa8c95d23 | [] | no_license | include-iinteresting/AuroraArc | b15a8d5a7c294a36d1390624e4da6420fc508333 | ae3b622cf36525806fe92367e64d6a5e78849a69 | refs/heads/master | 2020-08-04T17:48:45.554512 | 2019-11-13T01:58:16 | 2019-11-13T01:58:16 | 212,226,182 | 1 | 0 | null | 2019-10-02T03:04:51 | 2019-10-02T00:37:36 | C | SHIFT_JIS | C++ | false | false | 509 | h | #pragma once
struct IDirectSoundBuffer;
struct IDirectSoundBuffer8;
/**
* @class IStreamingSound
* @brief サウンドオブジェクトのインターフェース
*/
class IStreamingSound
{
public:
virtual ~IStreamingSound();
virtual void Update() = 0;
virtual void Play(DWORD dwPriority, DWORD dwFlag) = 0;
virtual void Stop() = 0;
virtual void Done() = 0;
virtual void SetLoopFlag(bool bFlag) = 0;
virtual void SetVolume(LONG lVolume) = 0;
virtual LONG GetVolume() = 0;
};
| [
"[email protected]"
] | |
4e9899d8e394ec75fef56c66dd7659fcac1297a1 | 54a8b5dcc8b90aeee0384d8e913053e1ad90b9a8 | /Classes/GameScene.h | 6e40e114a99ee52d71c925cf0e04b2e10115e382 | [] | no_license | weberwang/InTheField | 37609b4f5a77a55fd5ce6ba807c76c1bfe82ac67 | eebcf9bb18c53efebb5b089fa68b12b0f7b2f312 | refs/heads/master | 2021-01-17T05:58:39.953237 | 2014-05-07T17:01:19 | 2014-05-07T17:01:19 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 817 | h | //
// GameScene.h
// InTheField
//
// Created by Minko on 14-4-26.
//
//
#ifndef __InTheField__GameScene__
#define __InTheField__GameScene__
#include <cocos2d.h>
#include "Hero.h"
#include "Pet.h"
#include "Wife.h"
USING_NS_CC;
class GameScene: public Layer
{
public:
static Scene* createScene();
CREATE_FUNC(GameScene);
inline Size getWorldSize(){return worldSize;};
inline Hero* getHero(){return hero;};
private:
Size worldSize;
void onEnter();
void initBackground();
void addHero();
void addWife();
void addPet();
void addMonster();
void update(float dtime);
void gameOver();
private:
Hero* hero;
Pet* pet;
Wife* wife;
Vector<Sprite*> monsters;
static const int GROUND_HEIGHT = 170;
};
#endif /* defined(__InTheField__GameScene__) */
| [
"[email protected]"
] | |
26caf82d5f7f12d1b8f4d18b00c0d89403423766 | 231e21e5c2faa680fbc71601726aaf0b28a0eb19 | /src/User.cpp | cc4d4e3c487ba2eb4f9de3f2df77d41123aea6ac | [] | no_license | Seraph18/CP3 | 026107adc4023e96ffc4c907b30afc5524ad0b64 | 320edee4e0b9b3d72e5944f25cab6f36404ce7c2 | refs/heads/master | 2023-09-05T03:30:39.030952 | 2021-11-07T15:02:19 | 2021-11-07T15:02:19 | 420,763,424 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 3,660 | cpp | #include "User.h"
User::User()
{
this->userName = "";
this->firstName = "";
this->lastName = "";
}
User::User(string name)
{
this->userName = name;
this->firstName = "";
this->lastName = "";
}
User::User(string userName, string firstName, string lastName)
{
this->userName = userName;
this->firstName = firstName;
this->lastName = lastName;
}
// False if there is a time conflict, Ture if all good
bool User::checkIfActivityConflicts(Activity *activityToCheck, int currentLine, string attendancePath)
{
bool originalIsExclusive = activityToCheck->isExclusive();
Node<Activity> *currNode = listOfUserActivities.getFirstNode();
for (int i = 0; i < listOfUserActivities.getNElements(); ++i)
{
if (activityToCheck->getStartTime() < currNode->data.getStartTime() && currNode->data.getStartTime() < activityToCheck->getEndTime())
{
if (currNode->data.isExclusive() || originalIsExclusive)
{
cout << "Attendance file " << attendancePath << " line " << currentLine
<< ": User " << this->getUserName() << " cannot attend "
<< activityToCheck->getTitle() << ": user is busy with "
<< currNode->data.getTitle() << " - ignoring." << endl;
return true;
}
}
else if (currNode->data.getStartTime() < activityToCheck->getStartTime() && activityToCheck->getStartTime() < currNode->data.getEndTime())
{
if (currNode->data.isExclusive() || originalIsExclusive)
{
cout << "Attendance file " << attendancePath << " line " << currentLine
<< ": User " << this->getUserName() << " cannot attend "
<< activityToCheck->getTitle() << ": user is busy with "
<< currNode->data.getTitle() << " - ignoring." << endl;
return true;
}
}
}
return false;
}
bool User::addActivityToUser(Activity *activityToAdd, int currentLine, string attendancePath)
{
// Check if there is room in the venue
if (activityToAdd->getVenue()->getVenueCurrentCapacity() < activityToAdd->getVenue()->getVenueCapacity())
{
// Check for possible time conflict
if (checkIfActivityConflicts(activityToAdd, currentLine, attendancePath))
{
return false;
}
this->listOfUserActivities.addNewNode(*activityToAdd);
activityToAdd->addParticipant();
return true;
}
else
{
cout << "Attendance file " << attendancePath << "line " << currentLine
<< ": User " << this->getUserName() << " cannot attend " << activityToAdd->getTitle() << ": venue is full - ignoring." << endl;
return false;
}
}
void User::print()
{
cout << "Username: " << userName << " Real-Name: " << firstName << " " << lastName << endl;
}
bool User::operator==(const User &other)
{
if (this->getUserName() == other.userName)
{
return true;
}
return false;
}
string User::getOutput()
{
string total = "";
total += this->getUserName() + " ";
total += this->getFirstName() + " ";
total += this->getLastName() + " ";
total += "\n";
return total;
}
string User::getAttendanceDump()
{
string total = "";
Node<Activity> *currNode = listOfUserActivities.getFirstNode();
for (int i = 0; i < listOfUserActivities.getNElements(); ++i)
{
total += currNode->data.getTitle() + " ";
total += this->userName;
total += "\n";
currNode = currNode->next;
}
return total;
}
| [
"[email protected]"
] | |
5c9d7dd1cc9b0a5abd8b4faf9612d39327c26edd | 3cfaad712e5f69215918d27fb408c1bc5371fd9b | /3rdPartyLIB/dsp_core/C6000/rts_amoeba/src/rts_edma_getconfig.cpp | bd071f0604a825eebb24215fc15d0822ab2ec8c9 | [] | no_license | KonstantinVoip/1901VC1T_Inteltech | 31e89da7c32101b75fef1a071b596104f44f1471 | 168995e0d86a39967cacc208a7a67b5041565465 | refs/heads/master | 2021-05-09T03:53:36.410652 | 2018-04-13T13:50:44 | 2018-04-13T13:50:44 | 119,255,225 | 0 | 1 | null | null | null | null | UTF-8 | C++ | false | false | 604 | cpp | #include <rts.h>
void EDMA_getConfig(EDMA_Handle hEdma, EDMA_Config *config)
{
register volatile uint32 gie;
volatile uint32 *base;
register volatile uint32 x0,x1,x2,x3,x4,x5;
gie = int_disable();
base = (volatile uint32 *)((hEdma&0x0000FFFF)+_EDMA_PRAM_START);
x0 = base[_EDMA_OPT_OFFSET];
x1 = base[_EDMA_SRC_OFFSET];
x2 = base[_EDMA_CNT_OFFSET];
x3 = base[_EDMA_DST_OFFSET];
x4 = base[_EDMA_IDX_OFFSET];
x5 = base[_EDMA_RLD_OFFSET];
config->opt = x0;
config->src = x1;
config->cnt = x2;
config->dst = x3;
config->idx = x4;
config->rld = x5;
int_enable(gie);
}
| [
"[email protected]"
] | |
8fd60d566c5cd209ad6a7723ad47140ff8482b4e | e7ba008314a1b02a89915ab339a62467d355ba50 | /04-Collision/HeadUpDisplay.h | d80d90d7aa91d3cf809a538312ed56208a719f8c | [] | no_license | caoluyennguyen/Castlevania-Game | a957d85e6a2fbe871b27a47e23edf870fa6c09cc | 43be3630b9cbf396f76f5515fc1793eb8ae79eee | refs/heads/master | 2021-03-24T02:30:48.303294 | 2020-10-04T08:12:12 | 2020-10-04T08:12:12 | 247,507,273 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,134 | h | #pragma once
#include "d3dx9.h"
#include "Define.h"
#include "Textures.h"
#include "Sprites.h"
#include "Utils.h"
#include "PlayScene.h"
#define FILEPATH_FONT L"Font\\prstart.ttf"
#define TIME_PLAY 300
class HeadUpDisplay
{
private:
static HeadUpDisplay* __instance;
int x, y, score, time, stage, weaponId;
int simonHp, bossHp, simonHeart, scene;
string str_score, str_time, str_simonHeart, str_scene;
CSprite* current, * lose, * boss, * weapon;
vector<LPSPRITE> currentHP, loseHP, bossHP;
vector<LPSPRITE> weaponIcon;
CGame* game;
string headUpDetails;
ID3DXFont* font;
public:
HeadUpDisplay();
HeadUpDisplay(CGame* game);
void LoadResource();
void UnLoadResource();
void Update(DWORD dt);
void Render();
static HeadUpDisplay* GetInstance();
void AddScore(int score) { this->score += score; }
void SetStage(int stage) { this->stage = stage; }
void SetSimonHP(int hp) { this->simonHp = hp; }
void SetBossHP(int hp) { this->bossHp = hp; }
void SetScene(int scene) { this->scene = scene; }
void SetWeapon(int weapon) { this->weaponId = weapon; }
void SetHeart(int heart) { this->simonHeart = heart; }
};
| [
"[email protected]"
] | |
c5e5f7bec1c568af1ee20c586d3002e4c9c79112 | 77a874bf494ac9bdd8852d8e42ed27b2303bc7d9 | /pixies/src/Background.cpp | 7546085055cd41422d89b232fcfe7fbe832bcfae | [] | no_license | ChocolateChipKookie/RG_lab | e045007045c65233fc7f53e05aa392f4678f2555 | 5bf9bc979efec2f8f6da2a4db9000e27bccc77a1 | refs/heads/master | 2023-02-12T13:13:09.121045 | 2021-01-11T21:52:33 | 2021-01-11T21:52:33 | 328,797,112 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,021 | cpp | //
// Created by kookie on 11. 01. 2021..
//
#include "Background.h"
void NoiseBackground::update()
{
float x = 0.f;
float x_inc = 2.f;
float y = 0.f;
float y_inc = 2.f;
Texture& tex = *this;
for (unsigned y_i = 0; y_i < height; y_i++){
for (unsigned x_i = 0; x_i < width; x_i++){
float val = noise.GetNoise(x, y, current_z);
tex(x_i, y_i) = {val, val, val};
x += x_inc;
}
y += y_inc;
x = 0.f;
}
changed = true;
current_z += 0.5;
}
void PerlinNoiseBackground::update()
{
float x = 0.f;
float x_inc = 0.02f;
float y = 0.f;
float y_inc = 0.02f;
Texture& tex = *this;
for (unsigned y_i = 0; y_i < height; y_i++){
for (unsigned x_i = 0; x_i < width; x_i++){
float val = noise.noise(x, y, current_z);
tex(x_i, y_i) = {val, val, val};
x += x_inc;
}
y += y_inc;
x = 0.f;
}
changed = true;
current_z += 0.002;
}
| [
"[email protected]"
] | |
a8d3db3ed3661e679abdf49fafcd7f8a827db8c5 | 8e8d67503094667e7744ff23a19d6cac93f765ef | /core/src/WorldModel/DribbleStatus.h | 3a666c22ee5b81a4ab1b3a9ceba17eb74ed6c397 | [] | no_license | haoranleo/Robo_Lab | f57f4b9b47c0ce6c1e64d71fb79d1523ad1b6a9e | 66df69691142db3b74b4bb81d455885493bc9f03 | refs/heads/master | 2022-11-23T05:09:51.778500 | 2017-12-19T15:01:02 | 2017-12-19T15:01:02 | null | 0 | 0 | null | null | null | null | GB18030 | C++ | false | false | 10,032 | h | /// FileName : DribbleStatus.h
/// declaration and implementation file
/// Description : It supports dribble setting interface for ZJUNlict.
/// Keywords : dribble
/// Organization : ZJUNlict@Small Size League
/// Author : cliffyin
/// E-mail : [email protected]
/// [email protected]
/// Create Date : 2011-07-25
/// Modified Date : 2011-07-25
/// History :
#ifndef _DRIBBLE_STATUS_H_
#define _DRIBBLE_STATUS_H_
/**
* CDribbleStatus.
* 记录当前带球的状态
*/
#include <param.h>
#include <geometry.h>
#include <singleton.h>
/// <summary> Dribble status, for dribble handling. </summary>
///
/// <remarks> cliffyin, 2011/7/25. </remarks>
class CDribbleStatus {
public:
/// <summary> Default constructor. </summary>
///
/// <remarks> cliffyin, 2011/7/25. </remarks>
CDribbleStatus()
{
_ballController = 0;
for (int vecNum = 1; vecNum <= Param::Field::MAX_PLAYER; ++ vecNum) {
_needReleaseBall[vecNum] = _dribbleOn[vecNum] = _dribbleStartPosValid[vecNum] = false;
_dribbleCommand[vecNum] = 0;
}
}
/// <summary> Check If Dribble on. </summary>
///
/// <remarks> cliffyin, 2011/7/25. </remarks>
///
/// <param name="number"> The vehicle num. </param>
///
/// <returns> true if it succeeds, false if it fails. </returns>
bool dribbleOn(int number) const { return _dribbleOn[number]; }
/// <summary> Gets the ball controller. </summary>
///
/// <remarks> cliffyin, 2011/7/25. </remarks>
///
/// <returns> . </returns>
int ballController() const { return _ballController; }
/// <summary> Check If Ball controlled. </summary>
///
/// <remarks> cliffyin, 2011/7/25. </remarks>
///
/// <param name="number"> The vehicle num. </param>
///
/// <returns> true if it succeeds, false if it fails. </returns>
bool ballControlled(int number) const { return _ballController == number; }
/// <summary> Dribble start position valid. </summary>
///
/// <remarks> cliffyin, 2011/7/25. </remarks>
///
/// <param name="number"> The vehicle num. </param>
///
/// <returns> true if it succeeds, false if it fails. </returns>
bool dribbleStartPosValid(int number) const { return _dribbleStartPosValid[number]; }
/// <summary> Gets the last ball controller. </summary>
///
/// <remarks> cliffyin, 2011/7/25. </remarks>
///
/// <returns> . </returns>
int lastBallController() const {return _lastBallController;}
/// <summary> Check If the last ball controller. </summary>
/// <summary> Gets the last ball controller. </summary>
///
/// <remarks> cliffyin, 2011/7/25. </remarks>
///
/// <param name="number"> The vehicle num. </param>
///
/// <returns> true if it succeeds, false if it fails. </returns>
/// <returns> . </returns>
bool lastBallController (int number) const {return _lastBallController == number;}
/// <summary> Sets the last ball controller. </summary>
///
/// <remarks> cliffyin, 2011/7/25. </remarks>
///
/// <param name="number"> The vehicle num. </param>
void setLastBallController(int number){ _lastBallController = number;}
/// <summary> Dribble start position. </summary>
///
/// <remarks> cliffyin, 2011/7/25. </remarks>
///
/// <param name="number"> The vehicle num. </param>
///
/// <returns> . </returns>
const CGeoPoint& dribbleStartPos(int number) const { return _dribbleStartPos[number]; }
/// <summary> Dribble start cycle. </summary>
///
/// <remarks> cliffyin, 2011/7/25. </remarks>
///
/// <param name="number"> The vehicle num. </param>
///
/// <returns> . </returns>
int dribbleStartCycle(int number) const { return _dribbleStartCycle[number]; }
/// <summary> Sets dribble on. </summary>
///
/// <remarks> cliffyin, 2011/7/25. </remarks>
///
/// <param name="number"> The vehicle num. </param>
/// <param name="cycle"> The cycle. </param>
/// <param name="pos"> The dribble start position. </param>
void setDribbleOn(int number, int cycle, const CGeoPoint& pos)
{
if (! _dribbleOn[number]) {
_dribbleOn[number] = true;
}
if (! _dribbleStartPosValid[number]) {
_dribbleStartPos[number] = pos;
_dribbleStartCycle[number] = cycle;
_dribbleStartPosValid[number] = true;
}
}
/// <summary> Sets dribble off. </summary>
///
/// <remarks> cliffyin, 2011/7/25. </remarks>
///
/// <param name="number"> The vehicle num. </param>
void setDribbleOff(int number)
{
_dribbleOn[number] = false;
_dribbleStartPosValid[number] = false;
}
/// <summary> Sets dribble start position lost. </summary>
///
/// <remarks> cliffyin, 2011/7/25. </remarks>
///
/// <param name="number"> The vehicle num. </param>
void setDribbleStartPosLost(int number){ _dribbleStartPosValid[number] = false; }
/// <summary> Sets ball controlled. </summary>
///
/// <remarks> cliffyin, 2011/7/25. </remarks>
///
/// <param name="number"> The vehicle num. </param>
/// <param name="p"> The start control pos. </param>
void setBallControlled(int number, const CGeoPoint& p)
{
if (_ballController != number) {
_controlStartPos = p;
_ballController = number;
}
}
/// <summary> Sets ball lost. </summary>
///
/// <remarks> cliffyin, 2011/7/25. </remarks>
///
/// <param name="number"> The vehicle num. </param>
void setBallLost(int number)
{
if( _ballController == number ){
_ballController = 0;
}
}
/// <summary> Gets the ball control star position. </summary>
///
/// <remarks> cliffyin, 2011/7/25. </remarks>
///
/// <returns> . </returns>
const CGeoPoint& ballControlStarPos() const { return _controlStartPos; }
/// <summary> Need release ball. </summary>
///
/// <remarks> cliffyin, 2011/7/25. </remarks>
///
/// <param name="number"> The vehicle num. </param>
///
/// <returns> true if it succeeds, false if it fails. </returns>
bool needReleaseBall(int number) const { return _needReleaseBall[number]; }
/// <summary> Sets need not release ball. </summary>
///
/// <remarks> cliffyin, 2011/7/25. </remarks>
///
/// <param name="number"> The vehicle num. </param>
void setNeedNotReleaseBall(int number) { _mayNeedReleaseBall[number] = _needReleaseBall[number] = false; }
/// <summary> Sets may need release ball. </summary>
///
/// <remarks> cliffyin, 2011/7/25. </remarks>
///
/// <param name="number"> The vehicle num. </param>
/// <param name="pos"> The dribble start position. </param>
/// <param name="dribbling"> true to dribbling. </param>
void setMayNeedReleaseBall(int number, const CGeoPoint& pos, bool dribbling)
{
if( Param::Rule::MaxDribbleDist > 0 ){
if( !_mayNeedReleaseBall[number] ){
if( dribbling ){ // 开始带球了
_mayNeedReleaseBall[number] = true;
_mayNeedReleaseBallStartPos[number] = pos;
}
}else if((pos - _mayNeedReleaseBallStartPos[number]).mod2() > Param::Rule::MaxDribbleDist * Param::Rule::MaxDribbleDist ){
_needReleaseBall[number] = true;
}
}else{
_needReleaseBall[number] = false;
}
}
/// <summary> Clears the dribble command. </summary>
///
/// <remarks> cliffyin, 2011/7/25. </remarks>
void clearDribbleCommand(){
for (int vecNum = 1; vecNum <= Param::Field::MAX_PLAYER; ++ vecNum) {
_dribbleCommand[vecNum] = 0;
}
}
/// <summary> Sets dribble command. </summary>
///
/// <remarks> cliffyin, 2011/7/25. </remarks>
///
/// <param name="num"> Vehicle num. </param>
/// <param name="power"> The dribble power. </param>
void setDribbleCommand(int num, unsigned char power){
if(num>0 && num<= Param::Field::MAX_PLAYER) _dribbleCommand[num] = power;
}
/// <summary> Gets dribble command. </summary>
///
/// <remarks> cliffyin, 2011/7/25. </remarks>
///
/// <param name="num"> Vehicle num. </param>
///
/// <returns> The dribble command. </returns>
unsigned char getDribbleCommand(int num){
if (num>0 && num <= Param::Field::MAX_PLAYER) {
return _dribbleCommand[num];
} else {
return 0;
}
}
/// <summary> Check If Ball controlled. </summary>
///
/// <remarks> cliffyin, 2011/7/25. </remarks>
///
/// <returns> true if it succeeds, false if it fails. </returns>
bool ballControlled(){
for(int i = 1; i <= Param::Field::MAX_PLAYER; i++){
if(ballControlled(i)){
return true;
}
}
return false;
}
private:
/// <summary> true to enable, false to disable the dribble </summary>
bool _dribbleOn[Param::Field::MAX_PLAYER+1]; // 带球装置是否打开
/// <summary> true to dribble start position valid </summary>
bool _dribbleStartPosValid[Param::Field::MAX_PLAYER+1]; // 开始带球的位置是否有效
/// <summary> The dribble start position </summary>
CGeoPoint _dribbleStartPos[Param::Field::MAX_PLAYER+1]; // 开始带球的位置
/// <summary> The dribble start cycle </summary>
int _dribbleStartCycle[Param::Field::MAX_PLAYER+1]; // 开始带球的时间
/// <summary> true to need release ball </summary>
bool _needReleaseBall[Param::Field::MAX_PLAYER+1]; // 是否需要把球松开
/// <summary> true to may need release ball </summary>
bool _mayNeedReleaseBall[Param::Field::MAX_PLAYER+1]; // 是否需要把球松开
/// <summary> The may need release ball start position </summary>
CGeoPoint _mayNeedReleaseBallStartPos[Param::Field::MAX_PLAYER+1]; // 开始需要松开球的位置
/// <summary> The control start position </summary>
CGeoPoint _controlStartPos; // 开始控球的位置
/// <summary> The ball controller </summary>
int _ballController; // 控球者
/// <summary> The last ball controller </summary>
int _lastBallController;
/// <summary> The dribble command </summary>
unsigned char _dribbleCommand[Param::Field::MAX_PLAYER+1];
};
typedef NormalSingleton< CDribbleStatus > DribbleStatus;
#endif // ~_DRIBBLE_STATUS_H_
| [
"[email protected]"
] | |
2562614a3c7bbbcb19a61d812438bcf78fa6387c | 3dbac80f9659ef3a4fc21f21afee25a5e527d5ff | /CS 225/mp/mp5/main.cpp | ea1f2be34e08ba472334075efd3d07f01f738709 | [] | no_license | AnqiYao/UIUC-CS | d1f77ca80748ccd7e67996e222e3bedf2104d9f2 | eb8556b9cb1a5149d917c5bc1f2ed9f2986106ec | refs/heads/master | 2020-08-01T23:30:51.166032 | 2019-05-05T18:13:28 | 2019-05-05T18:13:28 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 4,787 | cpp | /**
* @file main.cpp
* Contains code to test your Quadtree implementation.
*/
#include <iostream>
#include "png.h"
#include "quadtree.h"
using std::cout;
using std::endl;
int main()
{
/*
PNG imgIn, imgOut;
imgIn.readFromFile("in.png");
// test constructor, decompress
Quadtree halfTree(imgIn, 128);
imgOut = halfTree.decompress();
imgOut.writeToFile("outHalf.png");
// now for the real tests
Quadtree fullTree;
fullTree.buildTree(imgIn, 256);
// you may want to experiment with different commands in this section
// test pruneSize and idealPrune (slow in valgrind, so you may want to
// comment these out when doing most of your testing for memory leaks)
cout << "fullTree.pruneSize(0) = " << fullTree.pruneSize(0) << endl;
cout << "fullTree.pruneSize(100) = " << fullTree.pruneSize(100) << endl;
cout << "fullTree.pruneSize(1000) = " << fullTree.pruneSize(1000) << endl;
cout << "fullTree.pruneSize(100000) = " << fullTree.pruneSize(100000) << endl;
cout << "fullTree.idealPrune(1000) = " << fullTree.idealPrune(1000) << endl;
cout << "fullTree.idealPrune(10000) = " << fullTree.idealPrune(10000) << endl;
// Test some creation/deletion functions
Quadtree fullTree2;
fullTree2 = fullTree;
imgOut = fullTree2.decompress();
imgOut.writeToFile("outCopy.png");
// test clockwiseRotate
fullTree.clockwiseRotate();
imgOut = fullTree.decompress();
imgOut.writeToFile("outRotated.png");
// test prune
fullTree = fullTree2;
fullTree.prune(1000);
imgOut = fullTree.decompress();
imgOut.writeToFile("outPruned.png");
// test several functions in succession
Quadtree fullTree3(fullTree2);
fullTree3.clockwiseRotate();
fullTree3.prune(10000);
fullTree3.clockwiseRotate();
fullTree3.clockwiseRotate();
fullTree3.clockwiseRotate();
imgOut = fullTree3.decompress();
imgOut.writeToFile("outEtc.png");
// ensure that printTree still works
Quadtree tinyTree(imgIn, 32);
cout << "Printing tinyTree:\n";
tinyTree.prune(100);
tinyTree.printTree();
*/
PNG imgIn, imgOut, imgOut2;
imgIn.readFromFile("in.png");
//imgIn.writeToFile("in_out.png");
//imgIn.writeToFile("in_out.png");
// test constructor, decompress
cout<<"!"<<endl;
//Quadtree halfTree(imgIn, 0);
cout<<"2"<<endl;
//imgOut = halfTree.decompress();
//cout<<"!"<<endl;
//imgOut.writeToFile("outHalf.png");
// now for the real tests
Quadtree fullTree;
cout<<"11"<<endl;
fullTree.buildTree(imgIn, 256);
cout<<"12"<<endl;
//fullTree = halfTree;
// you may want to experiment with different commands in this section
//fullTree.prune(1000);
imgOut2 = fullTree.decompress();
cout<<"22"<<endl;
imgOut2.writeToFile("full.png");
// fullTree.prune(20000);
//cout<<"out"<<endl;
// imgOut = fullTree.decompress();
// cout<<"decompree"<<endl;
//Quadtree halfTree(fullTree);
// cout<<halfTree.pruneSize(100)<<endl;
//imgOut = halfTree.decompress();
// imgOut.writeToFile("outHalf.png");
// cout<<"main"<<endl;
// test pruneSize and idealPrune (slow in valgrind, so you may want to
// comment these out when doing most of your testing for memory leaks)
cout << "fullTree.pruneSize(0) = " << fullTree.pruneSize(0) << endl;
cout << "fullTree.pruneSize(100) = " << fullTree.pruneSize(100) << endl;
cout << "fullTree.pruneSize(1000) = " << fullTree.pruneSize(1000) << endl;
cout << "fullTree.pruneSize(100000) = " << fullTree.pruneSize(100000) << endl;
cout<< "idealPrune(1) = " << fullTree.idealPrune(1)<<endl;
cout << "fullTree.idealPrune(1000) = " << fullTree.idealPrune(1000) << endl;
cout << "fullTree.idealPrune(10000) = " << fullTree.idealPrune(10000) << endl;
cout << "fullTree.idealPrune(18283) = " << fullTree.idealPrune(18283) << endl;
cout << "fullTree.idealPrune(39256) = " << fullTree.idealPrune(39256) << endl;
cout << "fullTree.idealPrune(65494) = " << fullTree.idealPrune(65494) << endl;
cout << "fullTree.idealPrune(65493) = " << fullTree.idealPrune(65493) << endl;
//cout<<"idealPrune(2) = "<<fullTree.idealPrune(2)<<endl;
cout<<"pruneSize(89646) = " << fullTree.pruneSize(89646)<<endl;
/*
// Test some creation/deletion functions
Quadtree fullTree2;
fullTree2 = fullTree;
imgOut = fullTree2.decompress();
imgOut.writeToFile("outCopy.png");
// test clockwiseRotate
halfTree.clockwiseRotate();
imgOut = halfTree.decompress();
imgOut.writeToFile("outRotated.png");
// test prune
fullTree = halfTree;
fullTree.prune(1000);
imgOut = fullTree.decompress();
imgOut.writeToFile("outPruned.png");
*/
return 0;
}
| [
"[email protected]"
] | |
945de43157e931708b30df6d68fe03c6ac1c652c | cc2ee25d82bed673b3fec56ba2d3c5c4bb906c54 | /nthSuperUglyNumber.cpp | e89a884a87cc3902d1188efe9337877ed5993692 | [] | no_license | Sheena997/AlgorithmCode | 289725f0112233ec57dc50d695a5f364279150fc | ccbafa3deed527c4a675f19a330f7d1cedd20d59 | refs/heads/master | 2021-08-08T12:13:32.086999 | 2020-10-12T11:48:19 | 2020-10-12T11:48:19 | 227,384,507 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,344 | cpp | /*
313. 超级丑数
编写一段程序来查找第 n 个超级丑数。
超级丑数是指其所有质因数都是长度为 k 的质数列表 primes 中的正整数。
示例:
输入: n = 12, primes = [2,7,13,19]
输出: 32
解释: 给定长度为 4 的质数列表 primes = [2,7,13,19]，前 12 个超级丑数
序列为：[1,2,4,7,8,13,14,16,19,26,28,32] 。
说明:
1 是任何给定 primes 的超级丑数。
给定 primes 中的数字以升序排列。
0 < k ≤ 100, 0 < n ≤ 106, 0 < primes[i] < 1000 。
第 n 个超级丑数确保在 32 位有符整数范围内。
来源：LeetCode
链接：https://leetcode-cn.com/problems/super-ugly-number/
*/
class Solution {
public:
int nthSuperUglyNumber(int n, vector<int>& primes) {
vector<int> index(primes.size(), 0);
vector<int> dp(n, 0);
dp[0] = 1;
for(int i = 1; i < n; ++i)
{
int minVal = INT_MAX;
for(int j = 0; j < primes.size(); ++j)
{
int tmp = dp[index[j]] * primes[j];
if(tmp < minVal)
minVal = tmp;
}
for(int j = 0; j < primes.size(); ++j)
if(minVal == dp[index[j]] * primes[j])
++index[j];
dp[i] = minVal;
}
return dp[n - 1];
}
};
| [
"[email protected]"
] | |
51e16977050d40d6b7995795cc18a26d3383565b | dbc5fd6f0b741d07aca08cff31fe88d2f62e8483 | /lib/Target/Hexagon/HexagonBitSimplify.cpp | 0c4a727734f693d021b420a3b6cfc3e76548bfef | [
"LicenseRef-scancode-unknown-license-reference",
"NCSA"
] | permissive | yrnkrn/zapcc | 647246a2ed860f73adb49fa1bd21333d972ff76b | c6a8aa30006d997eff0d60fd37b0e62b8aa0ea50 | refs/heads/master | 2023-03-08T22:55:12.842122 | 2020-07-21T10:21:59 | 2020-07-21T10:21:59 | 137,340,494 | 1,255 | 88 | NOASSERTION | 2020-07-21T10:22:01 | 2018-06-14T10:00:31 | C++ | UTF-8 | C++ | false | false | 105,323 | cpp | //===- HexagonBitSimplify.cpp ---------------------------------------------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
#include "BitTracker.h"
#include "HexagonBitTracker.h"
#include "HexagonInstrInfo.h"
#include "HexagonRegisterInfo.h"
#include "HexagonSubtarget.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/GraphTraits.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/Pass.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include <algorithm>
#include <cassert>
#include <cstdint>
#include <iterator>
#include <limits>
#include <utility>
#include <vector>
#define DEBUG_TYPE "hexbit"
using namespace llvm;
static cl::opt<bool> PreserveTiedOps("hexbit-keep-tied", cl::Hidden,
cl::init(true), cl::desc("Preserve subregisters in tied operands"));
static cl::opt<bool> GenExtract("hexbit-extract", cl::Hidden,
cl::init(true), cl::desc("Generate extract instructions"));
static cl::opt<bool> GenBitSplit("hexbit-bitsplit", cl::Hidden,
cl::init(true), cl::desc("Generate bitsplit instructions"));
static cl::opt<unsigned> MaxExtract("hexbit-max-extract", cl::Hidden,
cl::init(std::numeric_limits<unsigned>::max()));
static unsigned CountExtract = 0;
static cl::opt<unsigned> MaxBitSplit("hexbit-max-bitsplit", cl::Hidden,
cl::init(std::numeric_limits<unsigned>::max()));
static unsigned CountBitSplit = 0;
namespace llvm {
void initializeHexagonBitSimplifyPass(PassRegistry& Registry);
FunctionPass *createHexagonBitSimplify();
} // end namespace llvm
namespace {
// Set of virtual registers, based on BitVector.
struct RegisterSet : private BitVector {
RegisterSet() = default;
explicit RegisterSet(unsigned s, bool t = false) : BitVector(s, t) {}
RegisterSet(const RegisterSet &RS) = default;
using BitVector::clear;
using BitVector::count;
unsigned find_first() const {
int First = BitVector::find_first();
if (First < 0)
return 0;
return x2v(First);
}
unsigned find_next(unsigned Prev) const {
int Next = BitVector::find_next(v2x(Prev));
if (Next < 0)
return 0;
return x2v(Next);
}
RegisterSet &insert(unsigned R) {
unsigned Idx = v2x(R);
ensure(Idx);
return static_cast<RegisterSet&>(BitVector::set(Idx));
}
RegisterSet &remove(unsigned R) {
unsigned Idx = v2x(R);
if (Idx >= size())
return *this;
return static_cast<RegisterSet&>(BitVector::reset(Idx));
}
RegisterSet &insert(const RegisterSet &Rs) {
return static_cast<RegisterSet&>(BitVector::operator|=(Rs));
}
RegisterSet &remove(const RegisterSet &Rs) {
return static_cast<RegisterSet&>(BitVector::reset(Rs));
}
reference operator[](unsigned R) {
unsigned Idx = v2x(R);
ensure(Idx);
return BitVector::operator[](Idx);
}
bool operator[](unsigned R) const {
unsigned Idx = v2x(R);
assert(Idx < size());
return BitVector::operator[](Idx);
}
bool has(unsigned R) const {
unsigned Idx = v2x(R);
if (Idx >= size())
return false;
return BitVector::test(Idx);
}
bool empty() const {
return !BitVector::any();
}
bool includes(const RegisterSet &Rs) const {
// A.BitVector::test(B) <=> A-B != {}
return !Rs.BitVector::test(*this);
}
bool intersects(const RegisterSet &Rs) const {
return BitVector::anyCommon(Rs);
}
private:
void ensure(unsigned Idx) {
if (size() <= Idx)
resize(std::max(Idx+1, 32U));
}
static inline unsigned v2x(unsigned v) {
return TargetRegisterInfo::virtReg2Index(v);
}
static inline unsigned x2v(unsigned x) {
return TargetRegisterInfo::index2VirtReg(x);
}
};
struct PrintRegSet {
PrintRegSet(const RegisterSet &S, const TargetRegisterInfo *RI)
: RS(S), TRI(RI) {}
friend raw_ostream &operator<< (raw_ostream &OS,
const PrintRegSet &P);
private:
const RegisterSet &RS;
const TargetRegisterInfo *TRI;
};
raw_ostream &operator<< (raw_ostream &OS, const PrintRegSet &P)
LLVM_ATTRIBUTE_UNUSED;
raw_ostream &operator<< (raw_ostream &OS, const PrintRegSet &P) {
OS << '{';
for (unsigned R = P.RS.find_first(); R; R = P.RS.find_next(R))
OS << ' ' << printReg(R, P.TRI);
OS << " }";
return OS;
}
class Transformation;
class HexagonBitSimplify : public MachineFunctionPass {
public:
static char ID;
HexagonBitSimplify() : MachineFunctionPass(ID) {
initializeHexagonBitSimplifyPass(*PassRegistry::getPassRegistry());
}
StringRef getPassName() const override {
return "Hexagon bit simplification";
}
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<MachineDominatorTree>();
AU.addPreserved<MachineDominatorTree>();
MachineFunctionPass::getAnalysisUsage(AU);
}
bool runOnMachineFunction(MachineFunction &MF) override;
static void getInstrDefs(const MachineInstr &MI, RegisterSet &Defs);
static void getInstrUses(const MachineInstr &MI, RegisterSet &Uses);
static bool isEqual(const BitTracker::RegisterCell &RC1, uint16_t B1,
const BitTracker::RegisterCell &RC2, uint16_t B2, uint16_t W);
static bool isZero(const BitTracker::RegisterCell &RC, uint16_t B,
uint16_t W);
static bool getConst(const BitTracker::RegisterCell &RC, uint16_t B,
uint16_t W, uint64_t &U);
static bool replaceReg(unsigned OldR, unsigned NewR,
MachineRegisterInfo &MRI);
static bool getSubregMask(const BitTracker::RegisterRef &RR,
unsigned &Begin, unsigned &Width, MachineRegisterInfo &MRI);
static bool replaceRegWithSub(unsigned OldR, unsigned NewR,
unsigned NewSR, MachineRegisterInfo &MRI);
static bool replaceSubWithSub(unsigned OldR, unsigned OldSR,
unsigned NewR, unsigned NewSR, MachineRegisterInfo &MRI);
static bool parseRegSequence(const MachineInstr &I,
BitTracker::RegisterRef &SL, BitTracker::RegisterRef &SH,
const MachineRegisterInfo &MRI);
static bool getUsedBitsInStore(unsigned Opc, BitVector &Bits,
uint16_t Begin);
static bool getUsedBits(unsigned Opc, unsigned OpN, BitVector &Bits,
uint16_t Begin, const HexagonInstrInfo &HII);
static const TargetRegisterClass *getFinalVRegClass(
const BitTracker::RegisterRef &RR, MachineRegisterInfo &MRI);
static bool isTransparentCopy(const BitTracker::RegisterRef &RD,
const BitTracker::RegisterRef &RS, MachineRegisterInfo &MRI);
private:
MachineDominatorTree *MDT = nullptr;
bool visitBlock(MachineBasicBlock &B, Transformation &T, RegisterSet &AVs);
static bool hasTiedUse(unsigned Reg, MachineRegisterInfo &MRI,
unsigned NewSub = Hexagon::NoSubRegister);
};
using HBS = HexagonBitSimplify;
// The purpose of this class is to provide a common facility to traverse
// the function top-down or bottom-up via the dominator tree, and keep
// track of the available registers.
class Transformation {
public:
bool TopDown;
Transformation(bool TD) : TopDown(TD) {}
virtual ~Transformation() = default;
virtual bool processBlock(MachineBasicBlock &B, const RegisterSet &AVs) = 0;
};
} // end anonymous namespace
char HexagonBitSimplify::ID = 0;
INITIALIZE_PASS_BEGIN(HexagonBitSimplify, "hexbit",
"Hexagon bit simplification", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
INITIALIZE_PASS_END(HexagonBitSimplify, "hexbit",
"Hexagon bit simplification", false, false)
bool HexagonBitSimplify::visitBlock(MachineBasicBlock &B, Transformation &T,
RegisterSet &AVs) {
bool Changed = false;
if (T.TopDown)
Changed = T.processBlock(B, AVs);
RegisterSet Defs;
for (auto &I : B)
getInstrDefs(I, Defs);
RegisterSet NewAVs = AVs;
NewAVs.insert(Defs);
for (auto *DTN : children<MachineDomTreeNode*>(MDT->getNode(&B)))
Changed |= visitBlock(*(DTN->getBlock()), T, NewAVs);
if (!T.TopDown)
Changed |= T.processBlock(B, AVs);
return Changed;
}
//
// Utility functions:
//
void HexagonBitSimplify::getInstrDefs(const MachineInstr &MI,
RegisterSet &Defs) {
for (auto &Op : MI.operands()) {
if (!Op.isReg() || !Op.isDef())
continue;
unsigned R = Op.getReg();
if (!TargetRegisterInfo::isVirtualRegister(R))
continue;
Defs.insert(R);
}
}
void HexagonBitSimplify::getInstrUses(const MachineInstr &MI,
RegisterSet &Uses) {
for (auto &Op : MI.operands()) {
if (!Op.isReg() || !Op.isUse())
continue;
unsigned R = Op.getReg();
if (!TargetRegisterInfo::isVirtualRegister(R))
continue;
Uses.insert(R);
}
}
// Check if all the bits in range [B, E) in both cells are equal.
bool HexagonBitSimplify::isEqual(const BitTracker::RegisterCell &RC1,
uint16_t B1, const BitTracker::RegisterCell &RC2, uint16_t B2,
uint16_t W) {
for (uint16_t i = 0; i < W; ++i) {
// If RC1[i] is "bottom", it cannot be proven equal to RC2[i].
if (RC1[B1+i].Type == BitTracker::BitValue::Ref && RC1[B1+i].RefI.Reg == 0)
return false;
// Same for RC2[i].
if (RC2[B2+i].Type == BitTracker::BitValue::Ref && RC2[B2+i].RefI.Reg == 0)
return false;
if (RC1[B1+i] != RC2[B2+i])
return false;
}
return true;
}
bool HexagonBitSimplify::isZero(const BitTracker::RegisterCell &RC,
uint16_t B, uint16_t W) {
assert(B < RC.width() && B+W <= RC.width());
for (uint16_t i = B; i < B+W; ++i)
if (!RC[i].is(0))
return false;
return true;
}
bool HexagonBitSimplify::getConst(const BitTracker::RegisterCell &RC,
uint16_t B, uint16_t W, uint64_t &U) {
assert(B < RC.width() && B+W <= RC.width());
int64_t T = 0;
for (uint16_t i = B+W; i > B; --i) {
const BitTracker::BitValue &BV = RC[i-1];
T <<= 1;
if (BV.is(1))
T |= 1;
else if (!BV.is(0))
return false;
}
U = T;
return true;
}
bool HexagonBitSimplify::replaceReg(unsigned OldR, unsigned NewR,
MachineRegisterInfo &MRI) {
if (!TargetRegisterInfo::isVirtualRegister(OldR) ||
!TargetRegisterInfo::isVirtualRegister(NewR))
return false;
auto Begin = MRI.use_begin(OldR), End = MRI.use_end();
decltype(End) NextI;
for (auto I = Begin; I != End; I = NextI) {
NextI = std::next(I);
I->setReg(NewR);
}
return Begin != End;
}
bool HexagonBitSimplify::replaceRegWithSub(unsigned OldR, unsigned NewR,
unsigned NewSR, MachineRegisterInfo &MRI) {
if (!TargetRegisterInfo::isVirtualRegister(OldR) ||
!TargetRegisterInfo::isVirtualRegister(NewR))
return false;
if (hasTiedUse(OldR, MRI, NewSR))
return false;
auto Begin = MRI.use_begin(OldR), End = MRI.use_end();
decltype(End) NextI;
for (auto I = Begin; I != End; I = NextI) {
NextI = std::next(I);
I->setReg(NewR);
I->setSubReg(NewSR);
}
return Begin != End;
}
bool HexagonBitSimplify::replaceSubWithSub(unsigned OldR, unsigned OldSR,
unsigned NewR, unsigned NewSR, MachineRegisterInfo &MRI) {
if (!TargetRegisterInfo::isVirtualRegister(OldR) ||
!TargetRegisterInfo::isVirtualRegister(NewR))
return false;
if (OldSR != NewSR && hasTiedUse(OldR, MRI, NewSR))
return false;
auto Begin = MRI.use_begin(OldR), End = MRI.use_end();
decltype(End) NextI;
for (auto I = Begin; I != End; I = NextI) {
NextI = std::next(I);
if (I->getSubReg() != OldSR)
continue;
I->setReg(NewR);
I->setSubReg(NewSR);
}
return Begin != End;
}
// For a register ref (pair Reg:Sub), set Begin to the position of the LSB
// of Sub in Reg, and set Width to the size of Sub in bits. Return true,
// if this succeeded, otherwise return false.
bool HexagonBitSimplify::getSubregMask(const BitTracker::RegisterRef &RR,
unsigned &Begin, unsigned &Width, MachineRegisterInfo &MRI) {
const TargetRegisterClass *RC = MRI.getRegClass(RR.Reg);
if (RR.Sub == 0) {
Begin = 0;
Width = MRI.getTargetRegisterInfo()->getRegSizeInBits(*RC);
return true;
}
Begin = 0;
switch (RC->getID()) {
case Hexagon::DoubleRegsRegClassID:
case Hexagon::HvxWRRegClassID:
Width = MRI.getTargetRegisterInfo()->getRegSizeInBits(*RC) / 2;
if (RR.Sub == Hexagon::isub_hi || RR.Sub == Hexagon::vsub_hi)
Begin = Width;
break;
default:
return false;
}
return true;
}
// For a REG_SEQUENCE, set SL to the low subregister and SH to the high
// subregister.
bool HexagonBitSimplify::parseRegSequence(const MachineInstr &I,
BitTracker::RegisterRef &SL, BitTracker::RegisterRef &SH,
const MachineRegisterInfo &MRI) {
assert(I.getOpcode() == TargetOpcode::REG_SEQUENCE);
unsigned Sub1 = I.getOperand(2).getImm(), Sub2 = I.getOperand(4).getImm();
auto &DstRC = *MRI.getRegClass(I.getOperand(0).getReg());
auto &HRI = static_cast<const HexagonRegisterInfo&>(
*MRI.getTargetRegisterInfo());
unsigned SubLo = HRI.getHexagonSubRegIndex(DstRC, Hexagon::ps_sub_lo);
unsigned SubHi = HRI.getHexagonSubRegIndex(DstRC, Hexagon::ps_sub_hi);
assert((Sub1 == SubLo && Sub2 == SubHi) || (Sub1 == SubHi && Sub2 == SubLo));
if (Sub1 == SubLo && Sub2 == SubHi) {
SL = I.getOperand(1);
SH = I.getOperand(3);
return true;
}
if (Sub1 == SubHi && Sub2 == SubLo) {
SH = I.getOperand(1);
SL = I.getOperand(3);
return true;
}
return false;
}
// All stores (except 64-bit stores) take a 32-bit register as the source
// of the value to be stored. If the instruction stores into a location
// that is shorter than 32 bits, some bits of the source register are not
// used. For each store instruction, calculate the set of used bits in
// the source register, and set appropriate bits in Bits. Return true if
// the bits are calculated, false otherwise.
bool HexagonBitSimplify::getUsedBitsInStore(unsigned Opc, BitVector &Bits,
uint16_t Begin) {
using namespace Hexagon;
switch (Opc) {
// Store byte
case S2_storerb_io: // memb(Rs32+#s11:0)=Rt32
case S2_storerbnew_io: // memb(Rs32+#s11:0)=Nt8.new
case S2_pstorerbt_io: // if (Pv4) memb(Rs32+#u6:0)=Rt32
case S2_pstorerbf_io: // if (!Pv4) memb(Rs32+#u6:0)=Rt32
case S4_pstorerbtnew_io: // if (Pv4.new) memb(Rs32+#u6:0)=Rt32
case S4_pstorerbfnew_io: // if (!Pv4.new) memb(Rs32+#u6:0)=Rt32
case S2_pstorerbnewt_io: // if (Pv4) memb(Rs32+#u6:0)=Nt8.new
case S2_pstorerbnewf_io: // if (!Pv4) memb(Rs32+#u6:0)=Nt8.new
case S4_pstorerbnewtnew_io: // if (Pv4.new) memb(Rs32+#u6:0)=Nt8.new
case S4_pstorerbnewfnew_io: // if (!Pv4.new) memb(Rs32+#u6:0)=Nt8.new
case S2_storerb_pi: // memb(Rx32++#s4:0)=Rt32
case S2_storerbnew_pi: // memb(Rx32++#s4:0)=Nt8.new
case S2_pstorerbt_pi: // if (Pv4) memb(Rx32++#s4:0)=Rt32
case S2_pstorerbf_pi: // if (!Pv4) memb(Rx32++#s4:0)=Rt32
case S2_pstorerbtnew_pi: // if (Pv4.new) memb(Rx32++#s4:0)=Rt32
case S2_pstorerbfnew_pi: // if (!Pv4.new) memb(Rx32++#s4:0)=Rt32
case S2_pstorerbnewt_pi: // if (Pv4) memb(Rx32++#s4:0)=Nt8.new
case S2_pstorerbnewf_pi: // if (!Pv4) memb(Rx32++#s4:0)=Nt8.new
case S2_pstorerbnewtnew_pi: // if (Pv4.new) memb(Rx32++#s4:0)=Nt8.new
case S2_pstorerbnewfnew_pi: // if (!Pv4.new) memb(Rx32++#s4:0)=Nt8.new
case S4_storerb_ap: // memb(Re32=#U6)=Rt32
case S4_storerbnew_ap: // memb(Re32=#U6)=Nt8.new
case S2_storerb_pr: // memb(Rx32++Mu2)=Rt32
case S2_storerbnew_pr: // memb(Rx32++Mu2)=Nt8.new
case S4_storerb_ur: // memb(Ru32<<#u2+#U6)=Rt32
case S4_storerbnew_ur: // memb(Ru32<<#u2+#U6)=Nt8.new
case S2_storerb_pbr: // memb(Rx32++Mu2:brev)=Rt32
case S2_storerbnew_pbr: // memb(Rx32++Mu2:brev)=Nt8.new
case S2_storerb_pci: // memb(Rx32++#s4:0:circ(Mu2))=Rt32
case S2_storerbnew_pci: // memb(Rx32++#s4:0:circ(Mu2))=Nt8.new
case S2_storerb_pcr: // memb(Rx32++I:circ(Mu2))=Rt32
case S2_storerbnew_pcr: // memb(Rx32++I:circ(Mu2))=Nt8.new
case S4_storerb_rr: // memb(Rs32+Ru32<<#u2)=Rt32
case S4_storerbnew_rr: // memb(Rs32+Ru32<<#u2)=Nt8.new
case S4_pstorerbt_rr: // if (Pv4) memb(Rs32+Ru32<<#u2)=Rt32
case S4_pstorerbf_rr: // if (!Pv4) memb(Rs32+Ru32<<#u2)=Rt32
case S4_pstorerbtnew_rr: // if (Pv4.new) memb(Rs32+Ru32<<#u2)=Rt32
case S4_pstorerbfnew_rr: // if (!Pv4.new) memb(Rs32+Ru32<<#u2)=Rt32
case S4_pstorerbnewt_rr: // if (Pv4) memb(Rs32+Ru32<<#u2)=Nt8.new
case S4_pstorerbnewf_rr: // if (!Pv4) memb(Rs32+Ru32<<#u2)=Nt8.new
case S4_pstorerbnewtnew_rr: // if (Pv4.new) memb(Rs32+Ru32<<#u2)=Nt8.new
case S4_pstorerbnewfnew_rr: // if (!Pv4.new) memb(Rs32+Ru32<<#u2)=Nt8.new
case S2_storerbgp: // memb(gp+#u16:0)=Rt32
case S2_storerbnewgp: // memb(gp+#u16:0)=Nt8.new
case S4_pstorerbt_abs: // if (Pv4) memb(#u6)=Rt32
case S4_pstorerbf_abs: // if (!Pv4) memb(#u6)=Rt32
case S4_pstorerbtnew_abs: // if (Pv4.new) memb(#u6)=Rt32
case S4_pstorerbfnew_abs: // if (!Pv4.new) memb(#u6)=Rt32
case S4_pstorerbnewt_abs: // if (Pv4) memb(#u6)=Nt8.new
case S4_pstorerbnewf_abs: // if (!Pv4) memb(#u6)=Nt8.new
case S4_pstorerbnewtnew_abs: // if (Pv4.new) memb(#u6)=Nt8.new
case S4_pstorerbnewfnew_abs: // if (!Pv4.new) memb(#u6)=Nt8.new
Bits.set(Begin, Begin+8);
return true;
// Store low half
case S2_storerh_io: // memh(Rs32+#s11:1)=Rt32
case S2_storerhnew_io: // memh(Rs32+#s11:1)=Nt8.new
case S2_pstorerht_io: // if (Pv4) memh(Rs32+#u6:1)=Rt32
case S2_pstorerhf_io: // if (!Pv4) memh(Rs32+#u6:1)=Rt32
case S4_pstorerhtnew_io: // if (Pv4.new) memh(Rs32+#u6:1)=Rt32
case S4_pstorerhfnew_io: // if (!Pv4.new) memh(Rs32+#u6:1)=Rt32
case S2_pstorerhnewt_io: // if (Pv4) memh(Rs32+#u6:1)=Nt8.new
case S2_pstorerhnewf_io: // if (!Pv4) memh(Rs32+#u6:1)=Nt8.new
case S4_pstorerhnewtnew_io: // if (Pv4.new) memh(Rs32+#u6:1)=Nt8.new
case S4_pstorerhnewfnew_io: // if (!Pv4.new) memh(Rs32+#u6:1)=Nt8.new
case S2_storerh_pi: // memh(Rx32++#s4:1)=Rt32
case S2_storerhnew_pi: // memh(Rx32++#s4:1)=Nt8.new
case S2_pstorerht_pi: // if (Pv4) memh(Rx32++#s4:1)=Rt32
case S2_pstorerhf_pi: // if (!Pv4) memh(Rx32++#s4:1)=Rt32
case S2_pstorerhtnew_pi: // if (Pv4.new) memh(Rx32++#s4:1)=Rt32
case S2_pstorerhfnew_pi: // if (!Pv4.new) memh(Rx32++#s4:1)=Rt32
case S2_pstorerhnewt_pi: // if (Pv4) memh(Rx32++#s4:1)=Nt8.new
case S2_pstorerhnewf_pi: // if (!Pv4) memh(Rx32++#s4:1)=Nt8.new
case S2_pstorerhnewtnew_pi: // if (Pv4.new) memh(Rx32++#s4:1)=Nt8.new
case S2_pstorerhnewfnew_pi: // if (!Pv4.new) memh(Rx32++#s4:1)=Nt8.new
case S4_storerh_ap: // memh(Re32=#U6)=Rt32
case S4_storerhnew_ap: // memh(Re32=#U6)=Nt8.new
case S2_storerh_pr: // memh(Rx32++Mu2)=Rt32
case S2_storerhnew_pr: // memh(Rx32++Mu2)=Nt8.new
case S4_storerh_ur: // memh(Ru32<<#u2+#U6)=Rt32
case S4_storerhnew_ur: // memh(Ru32<<#u2+#U6)=Nt8.new
case S2_storerh_pbr: // memh(Rx32++Mu2:brev)=Rt32
case S2_storerhnew_pbr: // memh(Rx32++Mu2:brev)=Nt8.new
case S2_storerh_pci: // memh(Rx32++#s4:1:circ(Mu2))=Rt32
case S2_storerhnew_pci: // memh(Rx32++#s4:1:circ(Mu2))=Nt8.new
case S2_storerh_pcr: // memh(Rx32++I:circ(Mu2))=Rt32
case S2_storerhnew_pcr: // memh(Rx32++I:circ(Mu2))=Nt8.new
case S4_storerh_rr: // memh(Rs32+Ru32<<#u2)=Rt32
case S4_pstorerht_rr: // if (Pv4) memh(Rs32+Ru32<<#u2)=Rt32
case S4_pstorerhf_rr: // if (!Pv4) memh(Rs32+Ru32<<#u2)=Rt32
case S4_pstorerhtnew_rr: // if (Pv4.new) memh(Rs32+Ru32<<#u2)=Rt32
case S4_pstorerhfnew_rr: // if (!Pv4.new) memh(Rs32+Ru32<<#u2)=Rt32
case S4_storerhnew_rr: // memh(Rs32+Ru32<<#u2)=Nt8.new
case S4_pstorerhnewt_rr: // if (Pv4) memh(Rs32+Ru32<<#u2)=Nt8.new
case S4_pstorerhnewf_rr: // if (!Pv4) memh(Rs32+Ru32<<#u2)=Nt8.new
case S4_pstorerhnewtnew_rr: // if (Pv4.new) memh(Rs32+Ru32<<#u2)=Nt8.new
case S4_pstorerhnewfnew_rr: // if (!Pv4.new) memh(Rs32+Ru32<<#u2)=Nt8.new
case S2_storerhgp: // memh(gp+#u16:1)=Rt32
case S2_storerhnewgp: // memh(gp+#u16:1)=Nt8.new
case S4_pstorerht_abs: // if (Pv4) memh(#u6)=Rt32
case S4_pstorerhf_abs: // if (!Pv4) memh(#u6)=Rt32
case S4_pstorerhtnew_abs: // if (Pv4.new) memh(#u6)=Rt32
case S4_pstorerhfnew_abs: // if (!Pv4.new) memh(#u6)=Rt32
case S4_pstorerhnewt_abs: // if (Pv4) memh(#u6)=Nt8.new
case S4_pstorerhnewf_abs: // if (!Pv4) memh(#u6)=Nt8.new
case S4_pstorerhnewtnew_abs: // if (Pv4.new) memh(#u6)=Nt8.new
case S4_pstorerhnewfnew_abs: // if (!Pv4.new) memh(#u6)=Nt8.new
Bits.set(Begin, Begin+16);
return true;
// Store high half
case S2_storerf_io: // memh(Rs32+#s11:1)=Rt.H32
case S2_pstorerft_io: // if (Pv4) memh(Rs32+#u6:1)=Rt.H32
case S2_pstorerff_io: // if (!Pv4) memh(Rs32+#u6:1)=Rt.H32
case S4_pstorerftnew_io: // if (Pv4.new) memh(Rs32+#u6:1)=Rt.H32
case S4_pstorerffnew_io: // if (!Pv4.new) memh(Rs32+#u6:1)=Rt.H32
case S2_storerf_pi: // memh(Rx32++#s4:1)=Rt.H32
case S2_pstorerft_pi: // if (Pv4) memh(Rx32++#s4:1)=Rt.H32
case S2_pstorerff_pi: // if (!Pv4) memh(Rx32++#s4:1)=Rt.H32
case S2_pstorerftnew_pi: // if (Pv4.new) memh(Rx32++#s4:1)=Rt.H32
case S2_pstorerffnew_pi: // if (!Pv4.new) memh(Rx32++#s4:1)=Rt.H32
case S4_storerf_ap: // memh(Re32=#U6)=Rt.H32
case S2_storerf_pr: // memh(Rx32++Mu2)=Rt.H32
case S4_storerf_ur: // memh(Ru32<<#u2+#U6)=Rt.H32
case S2_storerf_pbr: // memh(Rx32++Mu2:brev)=Rt.H32
case S2_storerf_pci: // memh(Rx32++#s4:1:circ(Mu2))=Rt.H32
case S2_storerf_pcr: // memh(Rx32++I:circ(Mu2))=Rt.H32
case S4_storerf_rr: // memh(Rs32+Ru32<<#u2)=Rt.H32
case S4_pstorerft_rr: // if (Pv4) memh(Rs32+Ru32<<#u2)=Rt.H32
case S4_pstorerff_rr: // if (!Pv4) memh(Rs32+Ru32<<#u2)=Rt.H32
case S4_pstorerftnew_rr: // if (Pv4.new) memh(Rs32+Ru32<<#u2)=Rt.H32
case S4_pstorerffnew_rr: // if (!Pv4.new) memh(Rs32+Ru32<<#u2)=Rt.H32
case S2_storerfgp: // memh(gp+#u16:1)=Rt.H32
case S4_pstorerft_abs: // if (Pv4) memh(#u6)=Rt.H32
case S4_pstorerff_abs: // if (!Pv4) memh(#u6)=Rt.H32
case S4_pstorerftnew_abs: // if (Pv4.new) memh(#u6)=Rt.H32
case S4_pstorerffnew_abs: // if (!Pv4.new) memh(#u6)=Rt.H32
Bits.set(Begin+16, Begin+32);
return true;
}
return false;
}
// For an instruction with opcode Opc, calculate the set of bits that it
// uses in a register in operand OpN. This only calculates the set of used
// bits for cases where it does not depend on any operands (as is the case
// in shifts, for example). For concrete instructions from a program, the
// operand may be a subregister of a larger register, while Bits would
// correspond to the larger register in its entirety. Because of that,
// the parameter Begin can be used to indicate which bit of Bits should be
// considered the LSB of the operand.
bool HexagonBitSimplify::getUsedBits(unsigned Opc, unsigned OpN,
BitVector &Bits, uint16_t Begin, const HexagonInstrInfo &HII) {
using namespace Hexagon;
const MCInstrDesc &D = HII.get(Opc);
if (D.mayStore()) {
if (OpN == D.getNumOperands()-1)
return getUsedBitsInStore(Opc, Bits, Begin);
return false;
}
switch (Opc) {
// One register source. Used bits: R1[0-7].
case A2_sxtb:
case A2_zxtb:
case A4_cmpbeqi:
case A4_cmpbgti:
case A4_cmpbgtui:
if (OpN == 1) {
Bits.set(Begin, Begin+8);
return true;
}
break;
// One register source. Used bits: R1[0-15].
case A2_aslh:
case A2_sxth:
case A2_zxth:
case A4_cmpheqi:
case A4_cmphgti:
case A4_cmphgtui:
if (OpN == 1) {
Bits.set(Begin, Begin+16);
return true;
}
break;
// One register source. Used bits: R1[16-31].
case A2_asrh:
if (OpN == 1) {
Bits.set(Begin+16, Begin+32);
return true;
}
break;
// Two register sources. Used bits: R1[0-7], R2[0-7].
case A4_cmpbeq:
case A4_cmpbgt:
case A4_cmpbgtu:
if (OpN == 1) {
Bits.set(Begin, Begin+8);
return true;
}
break;
// Two register sources. Used bits: R1[0-15], R2[0-15].
case A4_cmpheq:
case A4_cmphgt:
case A4_cmphgtu:
case A2_addh_h16_ll:
case A2_addh_h16_sat_ll:
case A2_addh_l16_ll:
case A2_addh_l16_sat_ll:
case A2_combine_ll:
case A2_subh_h16_ll:
case A2_subh_h16_sat_ll:
case A2_subh_l16_ll:
case A2_subh_l16_sat_ll:
case M2_mpy_acc_ll_s0:
case M2_mpy_acc_ll_s1:
case M2_mpy_acc_sat_ll_s0:
case M2_mpy_acc_sat_ll_s1:
case M2_mpy_ll_s0:
case M2_mpy_ll_s1:
case M2_mpy_nac_ll_s0:
case M2_mpy_nac_ll_s1:
case M2_mpy_nac_sat_ll_s0:
case M2_mpy_nac_sat_ll_s1:
case M2_mpy_rnd_ll_s0:
case M2_mpy_rnd_ll_s1:
case M2_mpy_sat_ll_s0:
case M2_mpy_sat_ll_s1:
case M2_mpy_sat_rnd_ll_s0:
case M2_mpy_sat_rnd_ll_s1:
case M2_mpyd_acc_ll_s0:
case M2_mpyd_acc_ll_s1:
case M2_mpyd_ll_s0:
case M2_mpyd_ll_s1:
case M2_mpyd_nac_ll_s0:
case M2_mpyd_nac_ll_s1:
case M2_mpyd_rnd_ll_s0:
case M2_mpyd_rnd_ll_s1:
case M2_mpyu_acc_ll_s0:
case M2_mpyu_acc_ll_s1:
case M2_mpyu_ll_s0:
case M2_mpyu_ll_s1:
case M2_mpyu_nac_ll_s0:
case M2_mpyu_nac_ll_s1:
case M2_mpyud_acc_ll_s0:
case M2_mpyud_acc_ll_s1:
case M2_mpyud_ll_s0:
case M2_mpyud_ll_s1:
case M2_mpyud_nac_ll_s0:
case M2_mpyud_nac_ll_s1:
if (OpN == 1 || OpN == 2) {
Bits.set(Begin, Begin+16);
return true;
}
break;
// Two register sources. Used bits: R1[0-15], R2[16-31].
case A2_addh_h16_lh:
case A2_addh_h16_sat_lh:
case A2_combine_lh:
case A2_subh_h16_lh:
case A2_subh_h16_sat_lh:
case M2_mpy_acc_lh_s0:
case M2_mpy_acc_lh_s1:
case M2_mpy_acc_sat_lh_s0:
case M2_mpy_acc_sat_lh_s1:
case M2_mpy_lh_s0:
case M2_mpy_lh_s1:
case M2_mpy_nac_lh_s0:
case M2_mpy_nac_lh_s1:
case M2_mpy_nac_sat_lh_s0:
case M2_mpy_nac_sat_lh_s1:
case M2_mpy_rnd_lh_s0:
case M2_mpy_rnd_lh_s1:
case M2_mpy_sat_lh_s0:
case M2_mpy_sat_lh_s1:
case M2_mpy_sat_rnd_lh_s0:
case M2_mpy_sat_rnd_lh_s1:
case M2_mpyd_acc_lh_s0:
case M2_mpyd_acc_lh_s1:
case M2_mpyd_lh_s0:
case M2_mpyd_lh_s1:
case M2_mpyd_nac_lh_s0:
case M2_mpyd_nac_lh_s1:
case M2_mpyd_rnd_lh_s0:
case M2_mpyd_rnd_lh_s1:
case M2_mpyu_acc_lh_s0:
case M2_mpyu_acc_lh_s1:
case M2_mpyu_lh_s0:
case M2_mpyu_lh_s1:
case M2_mpyu_nac_lh_s0:
case M2_mpyu_nac_lh_s1:
case M2_mpyud_acc_lh_s0:
case M2_mpyud_acc_lh_s1:
case M2_mpyud_lh_s0:
case M2_mpyud_lh_s1:
case M2_mpyud_nac_lh_s0:
case M2_mpyud_nac_lh_s1:
// These four are actually LH.
case A2_addh_l16_hl:
case A2_addh_l16_sat_hl:
case A2_subh_l16_hl:
case A2_subh_l16_sat_hl:
if (OpN == 1) {
Bits.set(Begin, Begin+16);
return true;
}
if (OpN == 2) {
Bits.set(Begin+16, Begin+32);
return true;
}
break;
// Two register sources, used bits: R1[16-31], R2[0-15].
case A2_addh_h16_hl:
case A2_addh_h16_sat_hl:
case A2_combine_hl:
case A2_subh_h16_hl:
case A2_subh_h16_sat_hl:
case M2_mpy_acc_hl_s0:
case M2_mpy_acc_hl_s1:
case M2_mpy_acc_sat_hl_s0:
case M2_mpy_acc_sat_hl_s1:
case M2_mpy_hl_s0:
case M2_mpy_hl_s1:
case M2_mpy_nac_hl_s0:
case M2_mpy_nac_hl_s1:
case M2_mpy_nac_sat_hl_s0:
case M2_mpy_nac_sat_hl_s1:
case M2_mpy_rnd_hl_s0:
case M2_mpy_rnd_hl_s1:
case M2_mpy_sat_hl_s0:
case M2_mpy_sat_hl_s1:
case M2_mpy_sat_rnd_hl_s0:
case M2_mpy_sat_rnd_hl_s1:
case M2_mpyd_acc_hl_s0:
case M2_mpyd_acc_hl_s1:
case M2_mpyd_hl_s0:
case M2_mpyd_hl_s1:
case M2_mpyd_nac_hl_s0:
case M2_mpyd_nac_hl_s1:
case M2_mpyd_rnd_hl_s0:
case M2_mpyd_rnd_hl_s1:
case M2_mpyu_acc_hl_s0:
case M2_mpyu_acc_hl_s1:
case M2_mpyu_hl_s0:
case M2_mpyu_hl_s1:
case M2_mpyu_nac_hl_s0:
case M2_mpyu_nac_hl_s1:
case M2_mpyud_acc_hl_s0:
case M2_mpyud_acc_hl_s1:
case M2_mpyud_hl_s0:
case M2_mpyud_hl_s1:
case M2_mpyud_nac_hl_s0:
case M2_mpyud_nac_hl_s1:
if (OpN == 1) {
Bits.set(Begin+16, Begin+32);
return true;
}
if (OpN == 2) {
Bits.set(Begin, Begin+16);
return true;
}
break;
// Two register sources, used bits: R1[16-31], R2[16-31].
case A2_addh_h16_hh:
case A2_addh_h16_sat_hh:
case A2_combine_hh:
case A2_subh_h16_hh:
case A2_subh_h16_sat_hh:
case M2_mpy_acc_hh_s0:
case M2_mpy_acc_hh_s1:
case M2_mpy_acc_sat_hh_s0:
case M2_mpy_acc_sat_hh_s1:
case M2_mpy_hh_s0:
case M2_mpy_hh_s1:
case M2_mpy_nac_hh_s0:
case M2_mpy_nac_hh_s1:
case M2_mpy_nac_sat_hh_s0:
case M2_mpy_nac_sat_hh_s1:
case M2_mpy_rnd_hh_s0:
case M2_mpy_rnd_hh_s1:
case M2_mpy_sat_hh_s0:
case M2_mpy_sat_hh_s1:
case M2_mpy_sat_rnd_hh_s0:
case M2_mpy_sat_rnd_hh_s1:
case M2_mpyd_acc_hh_s0:
case M2_mpyd_acc_hh_s1:
case M2_mpyd_hh_s0:
case M2_mpyd_hh_s1:
case M2_mpyd_nac_hh_s0:
case M2_mpyd_nac_hh_s1:
case M2_mpyd_rnd_hh_s0:
case M2_mpyd_rnd_hh_s1:
case M2_mpyu_acc_hh_s0:
case M2_mpyu_acc_hh_s1:
case M2_mpyu_hh_s0:
case M2_mpyu_hh_s1:
case M2_mpyu_nac_hh_s0:
case M2_mpyu_nac_hh_s1:
case M2_mpyud_acc_hh_s0:
case M2_mpyud_acc_hh_s1:
case M2_mpyud_hh_s0:
case M2_mpyud_hh_s1:
case M2_mpyud_nac_hh_s0:
case M2_mpyud_nac_hh_s1:
if (OpN == 1 || OpN == 2) {
Bits.set(Begin+16, Begin+32);
return true;
}
break;
}
return false;
}
// Calculate the register class that matches Reg:Sub. For example, if
// %1 is a double register, then %1:isub_hi would match the "int"
// register class.
const TargetRegisterClass *HexagonBitSimplify::getFinalVRegClass(
const BitTracker::RegisterRef &RR, MachineRegisterInfo &MRI) {
if (!TargetRegisterInfo::isVirtualRegister(RR.Reg))
return nullptr;
auto *RC = MRI.getRegClass(RR.Reg);
if (RR.Sub == 0)
return RC;
auto &HRI = static_cast<const HexagonRegisterInfo&>(
*MRI.getTargetRegisterInfo());
auto VerifySR = [&HRI] (const TargetRegisterClass *RC, unsigned Sub) -> void {
(void)HRI;
assert(Sub == HRI.getHexagonSubRegIndex(*RC, Hexagon::ps_sub_lo) ||
Sub == HRI.getHexagonSubRegIndex(*RC, Hexagon::ps_sub_hi));
};
switch (RC->getID()) {
case Hexagon::DoubleRegsRegClassID:
VerifySR(RC, RR.Sub);
return &Hexagon::IntRegsRegClass;
case Hexagon::HvxWRRegClassID:
VerifySR(RC, RR.Sub);
return &Hexagon::HvxVRRegClass;
}
return nullptr;
}
// Check if RD could be replaced with RS at any possible use of RD.
// For example a predicate register cannot be replaced with a integer
// register, but a 64-bit register with a subregister can be replaced
// with a 32-bit register.
bool HexagonBitSimplify::isTransparentCopy(const BitTracker::RegisterRef &RD,
const BitTracker::RegisterRef &RS, MachineRegisterInfo &MRI) {
if (!TargetRegisterInfo::isVirtualRegister(RD.Reg) ||
!TargetRegisterInfo::isVirtualRegister(RS.Reg))
return false;
// Return false if one (or both) classes are nullptr.
auto *DRC = getFinalVRegClass(RD, MRI);
if (!DRC)
return false;
return DRC == getFinalVRegClass(RS, MRI);
}
bool HexagonBitSimplify::hasTiedUse(unsigned Reg, MachineRegisterInfo &MRI,
unsigned NewSub) {
if (!PreserveTiedOps)
return false;
return llvm::any_of(MRI.use_operands(Reg),
[NewSub] (const MachineOperand &Op) -> bool {
return Op.getSubReg() != NewSub && Op.isTied();
});
}
namespace {
class DeadCodeElimination {
public:
DeadCodeElimination(MachineFunction &mf, MachineDominatorTree &mdt)
: MF(mf), HII(*MF.getSubtarget<HexagonSubtarget>().getInstrInfo()),
MDT(mdt), MRI(mf.getRegInfo()) {}
bool run() {
return runOnNode(MDT.getRootNode());
}
private:
bool isDead(unsigned R) const;
bool runOnNode(MachineDomTreeNode *N);
MachineFunction &MF;
const HexagonInstrInfo &HII;
MachineDominatorTree &MDT;
MachineRegisterInfo &MRI;
};
} // end anonymous namespace
bool DeadCodeElimination::isDead(unsigned R) const {
for (auto I = MRI.use_begin(R), E = MRI.use_end(); I != E; ++I) {
MachineInstr *UseI = I->getParent();
if (UseI->isDebugValue())
continue;
if (UseI->isPHI()) {
assert(!UseI->getOperand(0).getSubReg());
unsigned DR = UseI->getOperand(0).getReg();
if (DR == R)
continue;
}
return false;
}
return true;
}
bool DeadCodeElimination::runOnNode(MachineDomTreeNode *N) {
bool Changed = false;
for (auto *DTN : children<MachineDomTreeNode*>(N))
Changed |= runOnNode(DTN);
MachineBasicBlock *B = N->getBlock();
std::vector<MachineInstr*> Instrs;
for (auto I = B->rbegin(), E = B->rend(); I != E; ++I)
Instrs.push_back(&*I);
for (auto MI : Instrs) {
unsigned Opc = MI->getOpcode();
// Do not touch lifetime markers. This is why the target-independent DCE
// cannot be used.
if (Opc == TargetOpcode::LIFETIME_START ||
Opc == TargetOpcode::LIFETIME_END)
continue;
bool Store = false;
if (MI->isInlineAsm())
continue;
// Delete PHIs if possible.
if (!MI->isPHI() && !MI->isSafeToMove(nullptr, Store))
continue;
bool AllDead = true;
SmallVector<unsigned,2> Regs;
for (auto &Op : MI->operands()) {
if (!Op.isReg() || !Op.isDef())
continue;
unsigned R = Op.getReg();
if (!TargetRegisterInfo::isVirtualRegister(R) || !isDead(R)) {
AllDead = false;
break;
}
Regs.push_back(R);
}
if (!AllDead)
continue;
B->erase(MI);
for (unsigned i = 0, n = Regs.size(); i != n; ++i)
MRI.markUsesInDebugValueAsUndef(Regs[i]);
Changed = true;
}
return Changed;
}
namespace {
// Eliminate redundant instructions
//
// This transformation will identify instructions where the output register
// is the same as one of its input registers. This only works on instructions
// that define a single register (unlike post-increment loads, for example).
// The equality check is actually more detailed: the code calculates which
// bits of the output are used, and only compares these bits with the input
// registers.
// If the output matches an input, the instruction is replaced with COPY.
// The copies will be removed by another transformation.
class RedundantInstrElimination : public Transformation {
public:
RedundantInstrElimination(BitTracker &bt, const HexagonInstrInfo &hii,
const HexagonRegisterInfo &hri, MachineRegisterInfo &mri)
: Transformation(true), HII(hii), HRI(hri), MRI(mri), BT(bt) {}
bool processBlock(MachineBasicBlock &B, const RegisterSet &AVs) override;
private:
bool isLossyShiftLeft(const MachineInstr &MI, unsigned OpN,
unsigned &LostB, unsigned &LostE);
bool isLossyShiftRight(const MachineInstr &MI, unsigned OpN,
unsigned &LostB, unsigned &LostE);
bool computeUsedBits(unsigned Reg, BitVector &Bits);
bool computeUsedBits(const MachineInstr &MI, unsigned OpN, BitVector &Bits,
uint16_t Begin);
bool usedBitsEqual(BitTracker::RegisterRef RD, BitTracker::RegisterRef RS);
const HexagonInstrInfo &HII;
const HexagonRegisterInfo &HRI;
MachineRegisterInfo &MRI;
BitTracker &BT;
};
} // end anonymous namespace
// Check if the instruction is a lossy shift left, where the input being
// shifted is the operand OpN of MI. If true, [LostB, LostE) is the range
// of bit indices that are lost.
bool RedundantInstrElimination::isLossyShiftLeft(const MachineInstr &MI,
unsigned OpN, unsigned &LostB, unsigned &LostE) {
using namespace Hexagon;
unsigned Opc = MI.getOpcode();
unsigned ImN, RegN, Width;
switch (Opc) {
case S2_asl_i_p:
ImN = 2;
RegN = 1;
Width = 64;
break;
case S2_asl_i_p_acc:
case S2_asl_i_p_and:
case S2_asl_i_p_nac:
case S2_asl_i_p_or:
case S2_asl_i_p_xacc:
ImN = 3;
RegN = 2;
Width = 64;
break;
case S2_asl_i_r:
ImN = 2;
RegN = 1;
Width = 32;
break;
case S2_addasl_rrri:
case S4_andi_asl_ri:
case S4_ori_asl_ri:
case S4_addi_asl_ri:
case S4_subi_asl_ri:
case S2_asl_i_r_acc:
case S2_asl_i_r_and:
case S2_asl_i_r_nac:
case S2_asl_i_r_or:
case S2_asl_i_r_sat:
case S2_asl_i_r_xacc:
ImN = 3;
RegN = 2;
Width = 32;
break;
default:
return false;
}
if (RegN != OpN)
return false;
assert(MI.getOperand(ImN).isImm());
unsigned S = MI.getOperand(ImN).getImm();
if (S == 0)
return false;
LostB = Width-S;
LostE = Width;
return true;
}
// Check if the instruction is a lossy shift right, where the input being
// shifted is the operand OpN of MI. If true, [LostB, LostE) is the range
// of bit indices that are lost.
bool RedundantInstrElimination::isLossyShiftRight(const MachineInstr &MI,
unsigned OpN, unsigned &LostB, unsigned &LostE) {
using namespace Hexagon;
unsigned Opc = MI.getOpcode();
unsigned ImN, RegN;
switch (Opc) {
case S2_asr_i_p:
case S2_lsr_i_p:
ImN = 2;
RegN = 1;
break;
case S2_asr_i_p_acc:
case S2_asr_i_p_and:
case S2_asr_i_p_nac:
case S2_asr_i_p_or:
case S2_lsr_i_p_acc:
case S2_lsr_i_p_and:
case S2_lsr_i_p_nac:
case S2_lsr_i_p_or:
case S2_lsr_i_p_xacc:
ImN = 3;
RegN = 2;
break;
case S2_asr_i_r:
case S2_lsr_i_r:
ImN = 2;
RegN = 1;
break;
case S4_andi_lsr_ri:
case S4_ori_lsr_ri:
case S4_addi_lsr_ri:
case S4_subi_lsr_ri:
case S2_asr_i_r_acc:
case S2_asr_i_r_and:
case S2_asr_i_r_nac:
case S2_asr_i_r_or:
case S2_lsr_i_r_acc:
case S2_lsr_i_r_and:
case S2_lsr_i_r_nac:
case S2_lsr_i_r_or:
case S2_lsr_i_r_xacc:
ImN = 3;
RegN = 2;
break;
default:
return false;
}
if (RegN != OpN)
return false;
assert(MI.getOperand(ImN).isImm());
unsigned S = MI.getOperand(ImN).getImm();
LostB = 0;
LostE = S;
return true;
}
// Calculate the bit vector that corresponds to the used bits of register Reg.
// The vector Bits has the same size, as the size of Reg in bits. If the cal-
// culation fails (i.e. the used bits are unknown), it returns false. Other-
// wise, it returns true and sets the corresponding bits in Bits.
bool RedundantInstrElimination::computeUsedBits(unsigned Reg, BitVector &Bits) {
BitVector Used(Bits.size());
RegisterSet Visited;
std::vector<unsigned> Pending;
Pending.push_back(Reg);
for (unsigned i = 0; i < Pending.size(); ++i) {
unsigned R = Pending[i];
if (Visited.has(R))
continue;
Visited.insert(R);
for (auto I = MRI.use_begin(R), E = MRI.use_end(); I != E; ++I) {
BitTracker::RegisterRef UR = *I;
unsigned B, W;
if (!HBS::getSubregMask(UR, B, W, MRI))
return false;
MachineInstr &UseI = *I->getParent();
if (UseI.isPHI() || UseI.isCopy()) {
unsigned DefR = UseI.getOperand(0).getReg();
if (!TargetRegisterInfo::isVirtualRegister(DefR))
return false;
Pending.push_back(DefR);
} else {
if (!computeUsedBits(UseI, I.getOperandNo(), Used, B))
return false;
}
}
}
Bits |= Used;
return true;
}
// Calculate the bits used by instruction MI in a register in operand OpN.
// Return true/false if the calculation succeeds/fails. If is succeeds, set
// used bits in Bits. This function does not reset any bits in Bits, so
// subsequent calls over different instructions will result in the union
// of the used bits in all these instructions.
// The register in question may be used with a sub-register, whereas Bits
// holds the bits for the entire register. To keep track of that, the
// argument Begin indicates where in Bits is the lowest-significant bit
// of the register used in operand OpN. For example, in instruction:
// %1 = S2_lsr_i_r %2:isub_hi, 10
// the operand 1 is a 32-bit register, which happens to be a subregister
// of the 64-bit register %2, and that subregister starts at position 32.
// In this case Begin=32, since Bits[32] would be the lowest-significant bit
// of %2:isub_hi.
bool RedundantInstrElimination::computeUsedBits(const MachineInstr &MI,
unsigned OpN, BitVector &Bits, uint16_t Begin) {
unsigned Opc = MI.getOpcode();
BitVector T(Bits.size());
bool GotBits = HBS::getUsedBits(Opc, OpN, T, Begin, HII);
// Even if we don't have bits yet, we could still provide some information
// if the instruction is a lossy shift: the lost bits will be marked as
// not used.
unsigned LB, LE;
if (isLossyShiftLeft(MI, OpN, LB, LE) || isLossyShiftRight(MI, OpN, LB, LE)) {
assert(MI.getOperand(OpN).isReg());
BitTracker::RegisterRef RR = MI.getOperand(OpN);
const TargetRegisterClass *RC = HBS::getFinalVRegClass(RR, MRI);
uint16_t Width = HRI.getRegSizeInBits(*RC);
if (!GotBits)
T.set(Begin, Begin+Width);
assert(LB <= LE && LB < Width && LE <= Width);
T.reset(Begin+LB, Begin+LE);
GotBits = true;
}
if (GotBits)
Bits |= T;
return GotBits;
}
// Calculates the used bits in RD ("defined register"), and checks if these
// bits in RS ("used register") and RD are identical.
bool RedundantInstrElimination::usedBitsEqual(BitTracker::RegisterRef RD,
BitTracker::RegisterRef RS) {
const BitTracker::RegisterCell &DC = BT.lookup(RD.Reg);
const BitTracker::RegisterCell &SC = BT.lookup(RS.Reg);
unsigned DB, DW;
if (!HBS::getSubregMask(RD, DB, DW, MRI))
return false;
unsigned SB, SW;
if (!HBS::getSubregMask(RS, SB, SW, MRI))
return false;
if (SW != DW)
return false;
BitVector Used(DC.width());
if (!computeUsedBits(RD.Reg, Used))
return false;
for (unsigned i = 0; i != DW; ++i)
if (Used[i+DB] && DC[DB+i] != SC[SB+i])
return false;
return true;
}
bool RedundantInstrElimination::processBlock(MachineBasicBlock &B,
const RegisterSet&) {
if (!BT.reached(&B))
return false;
bool Changed = false;
for (auto I = B.begin(), E = B.end(), NextI = I; I != E; ++I) {
NextI = std::next(I);
MachineInstr *MI = &*I;
if (MI->getOpcode() == TargetOpcode::COPY)
continue;
if (MI->isPHI() || MI->hasUnmodeledSideEffects() || MI->isInlineAsm())
continue;
unsigned NumD = MI->getDesc().getNumDefs();
if (NumD != 1)
continue;
BitTracker::RegisterRef RD = MI->getOperand(0);
if (!BT.has(RD.Reg))
continue;
const BitTracker::RegisterCell &DC = BT.lookup(RD.Reg);
auto At = MachineBasicBlock::iterator(MI);
// Find a source operand that is equal to the result.
for (auto &Op : MI->uses()) {
if (!Op.isReg())
continue;
BitTracker::RegisterRef RS = Op;
if (!BT.has(RS.Reg))
continue;
if (!HBS::isTransparentCopy(RD, RS, MRI))
continue;
unsigned BN, BW;
if (!HBS::getSubregMask(RS, BN, BW, MRI))
continue;
const BitTracker::RegisterCell &SC = BT.lookup(RS.Reg);
if (!usedBitsEqual(RD, RS) && !HBS::isEqual(DC, 0, SC, BN, BW))
continue;
// If found, replace the instruction with a COPY.
const DebugLoc &DL = MI->getDebugLoc();
const TargetRegisterClass *FRC = HBS::getFinalVRegClass(RD, MRI);
unsigned NewR = MRI.createVirtualRegister(FRC);
MachineInstr *CopyI =
BuildMI(B, At, DL, HII.get(TargetOpcode::COPY), NewR)
.addReg(RS.Reg, 0, RS.Sub);
HBS::replaceSubWithSub(RD.Reg, RD.Sub, NewR, 0, MRI);
// This pass can create copies between registers that don't have the
// exact same values. Updating the tracker has to involve updating
// all dependent cells. Example:
// %1 = inst %2 ; %1 != %2, but used bits are equal
//
// %3 = copy %2 ; <- inserted
// ... = %3 ; <- replaced from %2
// Indirectly, we can create a "copy" between %1 and %2 even
// though their exact values do not match.
BT.visit(*CopyI);
Changed = true;
break;
}
}
return Changed;
}
namespace {
// Recognize instructions that produce constant values known at compile-time.
// Replace them with register definitions that load these constants directly.
class ConstGeneration : public Transformation {
public:
ConstGeneration(BitTracker &bt, const HexagonInstrInfo &hii,
MachineRegisterInfo &mri)
: Transformation(true), HII(hii), MRI(mri), BT(bt) {}
bool processBlock(MachineBasicBlock &B, const RegisterSet &AVs) override;
static bool isTfrConst(const MachineInstr &MI);
private:
unsigned genTfrConst(const TargetRegisterClass *RC, int64_t C,
MachineBasicBlock &B, MachineBasicBlock::iterator At, DebugLoc &DL);
const HexagonInstrInfo &HII;
MachineRegisterInfo &MRI;
BitTracker &BT;
};
} // end anonymous namespace
bool ConstGeneration::isTfrConst(const MachineInstr &MI) {
unsigned Opc = MI.getOpcode();
switch (Opc) {
case Hexagon::A2_combineii:
case Hexagon::A4_combineii:
case Hexagon::A2_tfrsi:
case Hexagon::A2_tfrpi:
case Hexagon::PS_true:
case Hexagon::PS_false:
case Hexagon::CONST32:
case Hexagon::CONST64:
return true;
}
return false;
}
// Generate a transfer-immediate instruction that is appropriate for the
// register class and the actual value being transferred.
unsigned ConstGeneration::genTfrConst(const TargetRegisterClass *RC, int64_t C,
MachineBasicBlock &B, MachineBasicBlock::iterator At, DebugLoc &DL) {
unsigned Reg = MRI.createVirtualRegister(RC);
if (RC == &Hexagon::IntRegsRegClass) {
BuildMI(B, At, DL, HII.get(Hexagon::A2_tfrsi), Reg)
.addImm(int32_t(C));
return Reg;
}
if (RC == &Hexagon::DoubleRegsRegClass) {
if (isInt<8>(C)) {
BuildMI(B, At, DL, HII.get(Hexagon::A2_tfrpi), Reg)
.addImm(C);
return Reg;
}
unsigned Lo = Lo_32(C), Hi = Hi_32(C);
if (isInt<8>(Lo) || isInt<8>(Hi)) {
unsigned Opc = isInt<8>(Lo) ? Hexagon::A2_combineii
: Hexagon::A4_combineii;
BuildMI(B, At, DL, HII.get(Opc), Reg)
.addImm(int32_t(Hi))
.addImm(int32_t(Lo));
return Reg;
}
BuildMI(B, At, DL, HII.get(Hexagon::CONST64), Reg)
.addImm(C);
return Reg;
}
if (RC == &Hexagon::PredRegsRegClass) {
unsigned Opc;
if (C == 0)
Opc = Hexagon::PS_false;
else if ((C & 0xFF) == 0xFF)
Opc = Hexagon::PS_true;
else
return 0;
BuildMI(B, At, DL, HII.get(Opc), Reg);
return Reg;
}
return 0;
}
bool ConstGeneration::processBlock(MachineBasicBlock &B, const RegisterSet&) {
if (!BT.reached(&B))
return false;
bool Changed = false;
RegisterSet Defs;
for (auto I = B.begin(), E = B.end(); I != E; ++I) {
if (isTfrConst(*I))
continue;
Defs.clear();
HBS::getInstrDefs(*I, Defs);
if (Defs.count() != 1)
continue;
unsigned DR = Defs.find_first();
if (!TargetRegisterInfo::isVirtualRegister(DR))
continue;
uint64_t U;
const BitTracker::RegisterCell &DRC = BT.lookup(DR);
if (HBS::getConst(DRC, 0, DRC.width(), U)) {
int64_t C = U;
DebugLoc DL = I->getDebugLoc();
auto At = I->isPHI() ? B.getFirstNonPHI() : I;
unsigned ImmReg = genTfrConst(MRI.getRegClass(DR), C, B, At, DL);
if (ImmReg) {
HBS::replaceReg(DR, ImmReg, MRI);
BT.put(ImmReg, DRC);
Changed = true;
}
}
}
return Changed;
}
namespace {
// Identify pairs of available registers which hold identical values.
// In such cases, only one of them needs to be calculated, the other one
// will be defined as a copy of the first.
class CopyGeneration : public Transformation {
public:
CopyGeneration(BitTracker &bt, const HexagonInstrInfo &hii,
const HexagonRegisterInfo &hri, MachineRegisterInfo &mri)
: Transformation(true), HII(hii), HRI(hri), MRI(mri), BT(bt) {}
bool processBlock(MachineBasicBlock &B, const RegisterSet &AVs) override;
private:
bool findMatch(const BitTracker::RegisterRef &Inp,
BitTracker::RegisterRef &Out, const RegisterSet &AVs);
const HexagonInstrInfo &HII;
const HexagonRegisterInfo &HRI;
MachineRegisterInfo &MRI;
BitTracker &BT;
RegisterSet Forbidden;
};
// Eliminate register copies RD = RS, by replacing the uses of RD with
// with uses of RS.
class CopyPropagation : public Transformation {
public:
CopyPropagation(const HexagonRegisterInfo &hri, MachineRegisterInfo &mri)
: Transformation(false), HRI(hri), MRI(mri) {}
bool processBlock(MachineBasicBlock &B, const RegisterSet &AVs) override;
static bool isCopyReg(unsigned Opc, bool NoConv);
private:
bool propagateRegCopy(MachineInstr &MI);
const HexagonRegisterInfo &HRI;
MachineRegisterInfo &MRI;
};
} // end anonymous namespace
/// Check if there is a register in AVs that is identical to Inp. If so,
/// set Out to the found register. The output may be a pair Reg:Sub.
bool CopyGeneration::findMatch(const BitTracker::RegisterRef &Inp,
BitTracker::RegisterRef &Out, const RegisterSet &AVs) {
if (!BT.has(Inp.Reg))
return false;
const BitTracker::RegisterCell &InpRC = BT.lookup(Inp.Reg);
auto *FRC = HBS::getFinalVRegClass(Inp, MRI);
unsigned B, W;
if (!HBS::getSubregMask(Inp, B, W, MRI))
return false;
for (unsigned R = AVs.find_first(); R; R = AVs.find_next(R)) {
if (!BT.has(R) || Forbidden[R])
continue;
const BitTracker::RegisterCell &RC = BT.lookup(R);
unsigned RW = RC.width();
if (W == RW) {
if (FRC != MRI.getRegClass(R))
continue;
if (!HBS::isTransparentCopy(R, Inp, MRI))
continue;
if (!HBS::isEqual(InpRC, B, RC, 0, W))
continue;
Out.Reg = R;
Out.Sub = 0;
return true;
}
// Check if there is a super-register, whose part (with a subregister)
// is equal to the input.
// Only do double registers for now.
if (W*2 != RW)
continue;
if (MRI.getRegClass(R) != &Hexagon::DoubleRegsRegClass)
continue;
if (HBS::isEqual(InpRC, B, RC, 0, W))
Out.Sub = Hexagon::isub_lo;
else if (HBS::isEqual(InpRC, B, RC, W, W))
Out.Sub = Hexagon::isub_hi;
else
continue;
Out.Reg = R;
if (HBS::isTransparentCopy(Out, Inp, MRI))
return true;
}
return false;
}
bool CopyGeneration::processBlock(MachineBasicBlock &B,
const RegisterSet &AVs) {
if (!BT.reached(&B))
return false;
RegisterSet AVB(AVs);
bool Changed = false;
RegisterSet Defs;
for (auto I = B.begin(), E = B.end(), NextI = I; I != E;
++I, AVB.insert(Defs)) {
NextI = std::next(I);
Defs.clear();
HBS::getInstrDefs(*I, Defs);
unsigned Opc = I->getOpcode();
if (CopyPropagation::isCopyReg(Opc, false) ||
ConstGeneration::isTfrConst(*I))
continue;
DebugLoc DL = I->getDebugLoc();
auto At = I->isPHI() ? B.getFirstNonPHI() : I;
for (unsigned R = Defs.find_first(); R; R = Defs.find_next(R)) {
BitTracker::RegisterRef MR;
auto *FRC = HBS::getFinalVRegClass(R, MRI);
if (findMatch(R, MR, AVB)) {
unsigned NewR = MRI.createVirtualRegister(FRC);
BuildMI(B, At, DL, HII.get(TargetOpcode::COPY), NewR)
.addReg(MR.Reg, 0, MR.Sub);
BT.put(BitTracker::RegisterRef(NewR), BT.get(MR));
HBS::replaceReg(R, NewR, MRI);
Forbidden.insert(R);
continue;
}
if (FRC == &Hexagon::DoubleRegsRegClass ||
FRC == &Hexagon::HvxWRRegClass) {
// Try to generate REG_SEQUENCE.
unsigned SubLo = HRI.getHexagonSubRegIndex(*FRC, Hexagon::ps_sub_lo);
unsigned SubHi = HRI.getHexagonSubRegIndex(*FRC, Hexagon::ps_sub_hi);
BitTracker::RegisterRef TL = { R, SubLo };
BitTracker::RegisterRef TH = { R, SubHi };
BitTracker::RegisterRef ML, MH;
if (findMatch(TL, ML, AVB) && findMatch(TH, MH, AVB)) {
auto *FRC = HBS::getFinalVRegClass(R, MRI);
unsigned NewR = MRI.createVirtualRegister(FRC);
BuildMI(B, At, DL, HII.get(TargetOpcode::REG_SEQUENCE), NewR)
.addReg(ML.Reg, 0, ML.Sub)
.addImm(SubLo)
.addReg(MH.Reg, 0, MH.Sub)
.addImm(SubHi);
BT.put(BitTracker::RegisterRef(NewR), BT.get(R));
HBS::replaceReg(R, NewR, MRI);
Forbidden.insert(R);
}
}
}
}
return Changed;
}
bool CopyPropagation::isCopyReg(unsigned Opc, bool NoConv) {
switch (Opc) {
case TargetOpcode::COPY:
case TargetOpcode::REG_SEQUENCE:
case Hexagon::A4_combineir:
case Hexagon::A4_combineri:
return true;
case Hexagon::A2_tfr:
case Hexagon::A2_tfrp:
case Hexagon::A2_combinew:
case Hexagon::V6_vcombine:
return NoConv;
default:
break;
}
return false;
}
bool CopyPropagation::propagateRegCopy(MachineInstr &MI) {
bool Changed = false;
unsigned Opc = MI.getOpcode();
BitTracker::RegisterRef RD = MI.getOperand(0);
assert(MI.getOperand(0).getSubReg() == 0);
switch (Opc) {
case TargetOpcode::COPY:
case Hexagon::A2_tfr:
case Hexagon::A2_tfrp: {
BitTracker::RegisterRef RS = MI.getOperand(1);
if (!HBS::isTransparentCopy(RD, RS, MRI))
break;
if (RS.Sub != 0)
Changed = HBS::replaceRegWithSub(RD.Reg, RS.Reg, RS.Sub, MRI);
else
Changed = HBS::replaceReg(RD.Reg, RS.Reg, MRI);
break;
}
case TargetOpcode::REG_SEQUENCE: {
BitTracker::RegisterRef SL, SH;
if (HBS::parseRegSequence(MI, SL, SH, MRI)) {
const TargetRegisterClass &RC = *MRI.getRegClass(RD.Reg);
unsigned SubLo = HRI.getHexagonSubRegIndex(RC, Hexagon::ps_sub_lo);
unsigned SubHi = HRI.getHexagonSubRegIndex(RC, Hexagon::ps_sub_hi);
Changed = HBS::replaceSubWithSub(RD.Reg, SubLo, SL.Reg, SL.Sub, MRI);
Changed |= HBS::replaceSubWithSub(RD.Reg, SubHi, SH.Reg, SH.Sub, MRI);
}
break;
}
case Hexagon::A2_combinew:
case Hexagon::V6_vcombine: {
const TargetRegisterClass &RC = *MRI.getRegClass(RD.Reg);
unsigned SubLo = HRI.getHexagonSubRegIndex(RC, Hexagon::ps_sub_lo);
unsigned SubHi = HRI.getHexagonSubRegIndex(RC, Hexagon::ps_sub_hi);
BitTracker::RegisterRef RH = MI.getOperand(1), RL = MI.getOperand(2);
Changed = HBS::replaceSubWithSub(RD.Reg, SubLo, RL.Reg, RL.Sub, MRI);
Changed |= HBS::replaceSubWithSub(RD.Reg, SubHi, RH.Reg, RH.Sub, MRI);
break;
}
case Hexagon::A4_combineir:
case Hexagon::A4_combineri: {
unsigned SrcX = (Opc == Hexagon::A4_combineir) ? 2 : 1;
unsigned Sub = (Opc == Hexagon::A4_combineir) ? Hexagon::isub_lo
: Hexagon::isub_hi;
BitTracker::RegisterRef RS = MI.getOperand(SrcX);
Changed = HBS::replaceSubWithSub(RD.Reg, Sub, RS.Reg, RS.Sub, MRI);
break;
}
}
return Changed;
}
bool CopyPropagation::processBlock(MachineBasicBlock &B, const RegisterSet&) {
std::vector<MachineInstr*> Instrs;
for (auto I = B.rbegin(), E = B.rend(); I != E; ++I)
Instrs.push_back(&*I);
bool Changed = false;
for (auto I : Instrs) {
unsigned Opc = I->getOpcode();
if (!CopyPropagation::isCopyReg(Opc, true))
continue;
Changed |= propagateRegCopy(*I);
}
return Changed;
}
namespace {
// Recognize patterns that can be simplified and replace them with the
// simpler forms.
// This is by no means complete
class BitSimplification : public Transformation {
public:
BitSimplification(BitTracker &bt, const MachineDominatorTree &mdt,
const HexagonInstrInfo &hii, const HexagonRegisterInfo &hri,
MachineRegisterInfo &mri, MachineFunction &mf)
: Transformation(true), MDT(mdt), HII(hii), HRI(hri), MRI(mri),
MF(mf), BT(bt) {}
bool processBlock(MachineBasicBlock &B, const RegisterSet &AVs) override;
private:
struct RegHalf : public BitTracker::RegisterRef {
bool Low; // Low/High halfword.
};
bool matchHalf(unsigned SelfR, const BitTracker::RegisterCell &RC,
unsigned B, RegHalf &RH);
bool validateReg(BitTracker::RegisterRef R, unsigned Opc, unsigned OpNum);
bool matchPackhl(unsigned SelfR, const BitTracker::RegisterCell &RC,
BitTracker::RegisterRef &Rs, BitTracker::RegisterRef &Rt);
unsigned getCombineOpcode(bool HLow, bool LLow);
bool genStoreUpperHalf(MachineInstr *MI);
bool genStoreImmediate(MachineInstr *MI);
bool genPackhl(MachineInstr *MI, BitTracker::RegisterRef RD,
const BitTracker::RegisterCell &RC);
bool genExtractHalf(MachineInstr *MI, BitTracker::RegisterRef RD,
const BitTracker::RegisterCell &RC);
bool genCombineHalf(MachineInstr *MI, BitTracker::RegisterRef RD,
const BitTracker::RegisterCell &RC);
bool genExtractLow(MachineInstr *MI, BitTracker::RegisterRef RD,
const BitTracker::RegisterCell &RC);
bool genBitSplit(MachineInstr *MI, BitTracker::RegisterRef RD,
const BitTracker::RegisterCell &RC, const RegisterSet &AVs);
bool simplifyTstbit(MachineInstr *MI, BitTracker::RegisterRef RD,
const BitTracker::RegisterCell &RC);
bool simplifyExtractLow(MachineInstr *MI, BitTracker::RegisterRef RD,
const BitTracker::RegisterCell &RC, const RegisterSet &AVs);
// Cache of created instructions to avoid creating duplicates.
// XXX Currently only used by genBitSplit.
std::vector<MachineInstr*> NewMIs;
const MachineDominatorTree &MDT;
const HexagonInstrInfo &HII;
const HexagonRegisterInfo &HRI;
MachineRegisterInfo &MRI;
MachineFunction &MF;
BitTracker &BT;
};
} // end anonymous namespace
// Check if the bits [B..B+16) in register cell RC form a valid halfword,
// i.e. [0..16), [16..32), etc. of some register. If so, return true and
// set the information about the found register in RH.
bool BitSimplification::matchHalf(unsigned SelfR,
const BitTracker::RegisterCell &RC, unsigned B, RegHalf &RH) {
// XXX This could be searching in the set of available registers, in case
// the match is not exact.
// Match 16-bit chunks, where the RC[B..B+15] references exactly one
// register and all the bits B..B+15 match between RC and the register.
// This is meant to match "v1[0-15]", where v1 = { [0]:0 [1-15]:v1... },
// and RC = { [0]:0 [1-15]:v1[1-15]... }.
bool Low = false;
unsigned I = B;
while (I < B+16 && RC[I].num())
I++;
if (I == B+16)
return false;
unsigned Reg = RC[I].RefI.Reg;
unsigned P = RC[I].RefI.Pos; // The RefI.Pos will be advanced by I-B.
if (P < I-B)
return false;
unsigned Pos = P - (I-B);
if (Reg == 0 || Reg == SelfR) // Don't match "self".
return false;
if (!TargetRegisterInfo::isVirtualRegister(Reg))
return false;
if (!BT.has(Reg))
return false;
const BitTracker::RegisterCell &SC = BT.lookup(Reg);
if (Pos+16 > SC.width())
return false;
for (unsigned i = 0; i < 16; ++i) {
const BitTracker::BitValue &RV = RC[i+B];
if (RV.Type == BitTracker::BitValue::Ref) {
if (RV.RefI.Reg != Reg)
return false;
if (RV.RefI.Pos != i+Pos)
return false;
continue;
}
if (RC[i+B] != SC[i+Pos])
return false;
}
unsigned Sub = 0;
switch (Pos) {
case 0:
Sub = Hexagon::isub_lo;
Low = true;
break;
case 16:
Sub = Hexagon::isub_lo;
Low = false;
break;
case 32:
Sub = Hexagon::isub_hi;
Low = true;
break;
case 48:
Sub = Hexagon::isub_hi;
Low = false;
break;
default:
return false;
}
RH.Reg = Reg;
RH.Sub = Sub;
RH.Low = Low;
// If the subregister is not valid with the register, set it to 0.
if (!HBS::getFinalVRegClass(RH, MRI))
RH.Sub = 0;
return true;
}
bool BitSimplification::validateReg(BitTracker::RegisterRef R, unsigned Opc,
unsigned OpNum) {
auto *OpRC = HII.getRegClass(HII.get(Opc), OpNum, &HRI, MF);
auto *RRC = HBS::getFinalVRegClass(R, MRI);
return OpRC->hasSubClassEq(RRC);
}
// Check if RC matches the pattern of a S2_packhl. If so, return true and
// set the inputs Rs and Rt.
bool BitSimplification::matchPackhl(unsigned SelfR,
const BitTracker::RegisterCell &RC, BitTracker::RegisterRef &Rs,
BitTracker::RegisterRef &Rt) {
RegHalf L1, H1, L2, H2;
if (!matchHalf(SelfR, RC, 0, L2) || !matchHalf(SelfR, RC, 16, L1))
return false;
if (!matchHalf(SelfR, RC, 32, H2) || !matchHalf(SelfR, RC, 48, H1))
return false;
// Rs = H1.L1, Rt = H2.L2
if (H1.Reg != L1.Reg || H1.Sub != L1.Sub || H1.Low || !L1.Low)
return false;
if (H2.Reg != L2.Reg || H2.Sub != L2.Sub || H2.Low || !L2.Low)
return false;
Rs = H1;
Rt = H2;
return true;
}
unsigned BitSimplification::getCombineOpcode(bool HLow, bool LLow) {
return HLow ? LLow ? Hexagon::A2_combine_ll
: Hexagon::A2_combine_lh
: LLow ? Hexagon::A2_combine_hl
: Hexagon::A2_combine_hh;
}
// If MI stores the upper halfword of a register (potentially obtained via
// shifts or extracts), replace it with a storerf instruction. This could
// cause the "extraction" code to become dead.
bool BitSimplification::genStoreUpperHalf(MachineInstr *MI) {
unsigned Opc = MI->getOpcode();
if (Opc != Hexagon::S2_storerh_io)
return false;
MachineOperand &ValOp = MI->getOperand(2);
BitTracker::RegisterRef RS = ValOp;
if (!BT.has(RS.Reg))
return false;
const BitTracker::RegisterCell &RC = BT.lookup(RS.Reg);
RegHalf H;
if (!matchHalf(0, RC, 0, H))
return false;
if (H.Low)
return false;
MI->setDesc(HII.get(Hexagon::S2_storerf_io));
ValOp.setReg(H.Reg);
ValOp.setSubReg(H.Sub);
return true;
}
// If MI stores a value known at compile-time, and the value is within a range
// that avoids using constant-extenders, replace it with a store-immediate.
bool BitSimplification::genStoreImmediate(MachineInstr *MI) {
unsigned Opc = MI->getOpcode();
unsigned Align = 0;
switch (Opc) {
case Hexagon::S2_storeri_io:
Align++;
LLVM_FALLTHROUGH;
case Hexagon::S2_storerh_io:
Align++;
LLVM_FALLTHROUGH;
case Hexagon::S2_storerb_io:
break;
default:
return false;
}
// Avoid stores to frame-indices (due to an unknown offset).
if (!MI->getOperand(0).isReg())
return false;
MachineOperand &OffOp = MI->getOperand(1);
if (!OffOp.isImm())
return false;
int64_t Off = OffOp.getImm();
// Offset is u6:a. Sadly, there is no isShiftedUInt(n,x).
if (!isUIntN(6+Align, Off) || (Off & ((1<<Align)-1)))
return false;
// Source register:
BitTracker::RegisterRef RS = MI->getOperand(2);
if (!BT.has(RS.Reg))
return false;
const BitTracker::RegisterCell &RC = BT.lookup(RS.Reg);
uint64_t U;
if (!HBS::getConst(RC, 0, RC.width(), U))
return false;
// Only consider 8-bit values to avoid constant-extenders.
int V;
switch (Opc) {
case Hexagon::S2_storerb_io:
V = int8_t(U);
break;
case Hexagon::S2_storerh_io:
V = int16_t(U);
break;
case Hexagon::S2_storeri_io:
V = int32_t(U);
break;
}
if (!isInt<8>(V))
return false;
MI->RemoveOperand(2);
switch (Opc) {
case Hexagon::S2_storerb_io:
MI->setDesc(HII.get(Hexagon::S4_storeirb_io));
break;
case Hexagon::S2_storerh_io:
MI->setDesc(HII.get(Hexagon::S4_storeirh_io));
break;
case Hexagon::S2_storeri_io:
MI->setDesc(HII.get(Hexagon::S4_storeiri_io));
break;
}
MI->addOperand(MachineOperand::CreateImm(V));
return true;
}
// If MI is equivalent o S2_packhl, generate the S2_packhl. MI could be the
// last instruction in a sequence that results in something equivalent to
// the pack-halfwords. The intent is to cause the entire sequence to become
// dead.
bool BitSimplification::genPackhl(MachineInstr *MI,
BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) {
unsigned Opc = MI->getOpcode();
if (Opc == Hexagon::S2_packhl)
return false;
BitTracker::RegisterRef Rs, Rt;
if (!matchPackhl(RD.Reg, RC, Rs, Rt))
return false;
if (!validateReg(Rs, Hexagon::S2_packhl, 1) ||
!validateReg(Rt, Hexagon::S2_packhl, 2))
return false;
MachineBasicBlock &B = *MI->getParent();
unsigned NewR = MRI.createVirtualRegister(&Hexagon::DoubleRegsRegClass);
DebugLoc DL = MI->getDebugLoc();
auto At = MI->isPHI() ? B.getFirstNonPHI()
: MachineBasicBlock::iterator(MI);
BuildMI(B, At, DL, HII.get(Hexagon::S2_packhl), NewR)
.addReg(Rs.Reg, 0, Rs.Sub)
.addReg(Rt.Reg, 0, Rt.Sub);
HBS::replaceSubWithSub(RD.Reg, RD.Sub, NewR, 0, MRI);
BT.put(BitTracker::RegisterRef(NewR), RC);
return true;
}
// If MI produces halfword of the input in the low half of the output,
// replace it with zero-extend or extractu.
bool BitSimplification::genExtractHalf(MachineInstr *MI,
BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) {
RegHalf L;
// Check for halfword in low 16 bits, zeros elsewhere.
if (!matchHalf(RD.Reg, RC, 0, L) || !HBS::isZero(RC, 16, 16))
return false;
unsigned Opc = MI->getOpcode();
MachineBasicBlock &B = *MI->getParent();
DebugLoc DL = MI->getDebugLoc();
// Prefer zxth, since zxth can go in any slot, while extractu only in
// slots 2 and 3.
unsigned NewR = 0;
auto At = MI->isPHI() ? B.getFirstNonPHI()
: MachineBasicBlock::iterator(MI);
if (L.Low && Opc != Hexagon::A2_zxth) {
if (validateReg(L, Hexagon::A2_zxth, 1)) {
NewR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass);
BuildMI(B, At, DL, HII.get(Hexagon::A2_zxth), NewR)
.addReg(L.Reg, 0, L.Sub);
}
} else if (!L.Low && Opc != Hexagon::S2_lsr_i_r) {
if (validateReg(L, Hexagon::S2_lsr_i_r, 1)) {
NewR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass);
BuildMI(B, MI, DL, HII.get(Hexagon::S2_lsr_i_r), NewR)
.addReg(L.Reg, 0, L.Sub)
.addImm(16);
}
}
if (NewR == 0)
return false;
HBS::replaceSubWithSub(RD.Reg, RD.Sub, NewR, 0, MRI);
BT.put(BitTracker::RegisterRef(NewR), RC);
return true;
}
// If MI is equivalent to a combine(.L/.H, .L/.H) replace with with the
// combine.
bool BitSimplification::genCombineHalf(MachineInstr *MI,
BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) {
RegHalf L, H;
// Check for combine h/l
if (!matchHalf(RD.Reg, RC, 0, L) || !matchHalf(RD.Reg, RC, 16, H))
return false;
// Do nothing if this is just a reg copy.
if (L.Reg == H.Reg && L.Sub == H.Sub && !H.Low && L.Low)
return false;
unsigned Opc = MI->getOpcode();
unsigned COpc = getCombineOpcode(H.Low, L.Low);
if (COpc == Opc)
return false;
if (!validateReg(H, COpc, 1) || !validateReg(L, COpc, 2))
return false;
MachineBasicBlock &B = *MI->getParent();
DebugLoc DL = MI->getDebugLoc();
unsigned NewR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass);
auto At = MI->isPHI() ? B.getFirstNonPHI()
: MachineBasicBlock::iterator(MI);
BuildMI(B, At, DL, HII.get(COpc), NewR)
.addReg(H.Reg, 0, H.Sub)
.addReg(L.Reg, 0, L.Sub);
HBS::replaceSubWithSub(RD.Reg, RD.Sub, NewR, 0, MRI);
BT.put(BitTracker::RegisterRef(NewR), RC);
return true;
}
// If MI resets high bits of a register and keeps the lower ones, replace it
// with zero-extend byte/half, and-immediate, or extractu, as appropriate.
bool BitSimplification::genExtractLow(MachineInstr *MI,
BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) {
unsigned Opc = MI->getOpcode();
switch (Opc) {
case Hexagon::A2_zxtb:
case Hexagon::A2_zxth:
case Hexagon::S2_extractu:
return false;
}
if (Opc == Hexagon::A2_andir && MI->getOperand(2).isImm()) {
int32_t Imm = MI->getOperand(2).getImm();
if (isInt<10>(Imm))
return false;
}
if (MI->hasUnmodeledSideEffects() || MI->isInlineAsm())
return false;
unsigned W = RC.width();
while (W > 0 && RC[W-1].is(0))
W--;
if (W == 0 || W == RC.width())
return false;
unsigned NewOpc = (W == 8) ? Hexagon::A2_zxtb
: (W == 16) ? Hexagon::A2_zxth
: (W < 10) ? Hexagon::A2_andir
: Hexagon::S2_extractu;
MachineBasicBlock &B = *MI->getParent();
DebugLoc DL = MI->getDebugLoc();
for (auto &Op : MI->uses()) {
if (!Op.isReg())
continue;
BitTracker::RegisterRef RS = Op;
if (!BT.has(RS.Reg))
continue;
const BitTracker::RegisterCell &SC = BT.lookup(RS.Reg);
unsigned BN, BW;
if (!HBS::getSubregMask(RS, BN, BW, MRI))
continue;
if (BW < W || !HBS::isEqual(RC, 0, SC, BN, W))
continue;
if (!validateReg(RS, NewOpc, 1))
continue;
unsigned NewR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass);
auto At = MI->isPHI() ? B.getFirstNonPHI()
: MachineBasicBlock::iterator(MI);
auto MIB = BuildMI(B, At, DL, HII.get(NewOpc), NewR)
.addReg(RS.Reg, 0, RS.Sub);
if (NewOpc == Hexagon::A2_andir)
MIB.addImm((1 << W) - 1);
else if (NewOpc == Hexagon::S2_extractu)
MIB.addImm(W).addImm(0);
HBS::replaceSubWithSub(RD.Reg, RD.Sub, NewR, 0, MRI);
BT.put(BitTracker::RegisterRef(NewR), RC);
return true;
}
return false;
}
bool BitSimplification::genBitSplit(MachineInstr *MI,
BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC,
const RegisterSet &AVs) {
if (!GenBitSplit)
return false;
if (MaxBitSplit.getNumOccurrences()) {
if (CountBitSplit >= MaxBitSplit)
return false;
}
unsigned Opc = MI->getOpcode();
switch (Opc) {
case Hexagon::A4_bitsplit:
case Hexagon::A4_bitspliti:
return false;
}
unsigned W = RC.width();
if (W != 32)
return false;
auto ctlz = [] (const BitTracker::RegisterCell &C) -> unsigned {
unsigned Z = C.width();
while (Z > 0 && C[Z-1].is(0))
--Z;
return C.width() - Z;
};
// Count the number of leading zeros in the target RC.
unsigned Z = ctlz(RC);
if (Z == 0 || Z == W)
return false;
// A simplistic analysis: assume the source register (the one being split)
// is fully unknown, and that all its bits are self-references.
const BitTracker::BitValue &B0 = RC[0];
if (B0.Type != BitTracker::BitValue::Ref)
return false;
unsigned SrcR = B0.RefI.Reg;
unsigned SrcSR = 0;
unsigned Pos = B0.RefI.Pos;
// All the non-zero bits should be consecutive bits from the same register.
for (unsigned i = 1; i < W-Z; ++i) {
const BitTracker::BitValue &V = RC[i];
if (V.Type != BitTracker::BitValue::Ref)
return false;
if (V.RefI.Reg != SrcR || V.RefI.Pos != Pos+i)
return false;
}
// Now, find the other bitfield among AVs.
for (unsigned S = AVs.find_first(); S; S = AVs.find_next(S)) {
// The number of leading zeros here should be the number of trailing
// non-zeros in RC.
if (!BT.has(S))
continue;
const BitTracker::RegisterCell &SC = BT.lookup(S);
if (SC.width() != W || ctlz(SC) != W-Z)
continue;
// The Z lower bits should now match SrcR.
const BitTracker::BitValue &S0 = SC[0];
if (S0.Type != BitTracker::BitValue::Ref || S0.RefI.Reg != SrcR)
continue;
unsigned P = S0.RefI.Pos;
if (Pos <= P && (Pos + W-Z) != P)
continue;
if (P < Pos && (P + Z) != Pos)
continue;
// The starting bitfield position must be at a subregister boundary.
if (std::min(P, Pos) != 0 && std::min(P, Pos) != 32)
continue;
unsigned I;
for (I = 1; I < Z; ++I) {
const BitTracker::BitValue &V = SC[I];
if (V.Type != BitTracker::BitValue::Ref)
break;
if (V.RefI.Reg != SrcR || V.RefI.Pos != P+I)
break;
}
if (I != Z)
continue;
// Generate bitsplit where S is defined.
if (MaxBitSplit.getNumOccurrences())
CountBitSplit++;
MachineInstr *DefS = MRI.getVRegDef(S);
assert(DefS != nullptr);
DebugLoc DL = DefS->getDebugLoc();
MachineBasicBlock &B = *DefS->getParent();
auto At = DefS->isPHI() ? B.getFirstNonPHI()
: MachineBasicBlock::iterator(DefS);
if (MRI.getRegClass(SrcR)->getID() == Hexagon::DoubleRegsRegClassID)
SrcSR = (std::min(Pos, P) == 32) ? Hexagon::isub_hi : Hexagon::isub_lo;
if (!validateReg({SrcR,SrcSR}, Hexagon::A4_bitspliti, 1))
continue;
unsigned ImmOp = Pos <= P ? W-Z : Z;
// Find an existing bitsplit instruction if one already exists.
unsigned NewR = 0;
for (MachineInstr *In : NewMIs) {
if (In->getOpcode() != Hexagon::A4_bitspliti)
continue;
MachineOperand &Op1 = In->getOperand(1);
if (Op1.getReg() != SrcR || Op1.getSubReg() != SrcSR)
continue;
if (In->getOperand(2).getImm() != ImmOp)
continue;
// Check if the target register is available here.
MachineOperand &Op0 = In->getOperand(0);
MachineInstr *DefI = MRI.getVRegDef(Op0.getReg());
assert(DefI != nullptr);
if (!MDT.dominates(DefI, &*At))
continue;
// Found one that can be reused.
assert(Op0.getSubReg() == 0);
NewR = Op0.getReg();
break;
}
if (!NewR) {
NewR = MRI.createVirtualRegister(&Hexagon::DoubleRegsRegClass);
auto NewBS = BuildMI(B, At, DL, HII.get(Hexagon::A4_bitspliti), NewR)
.addReg(SrcR, 0, SrcSR)
.addImm(ImmOp);
NewMIs.push_back(NewBS);
}
if (Pos <= P) {
HBS::replaceRegWithSub(RD.Reg, NewR, Hexagon::isub_lo, MRI);
HBS::replaceRegWithSub(S, NewR, Hexagon::isub_hi, MRI);
} else {
HBS::replaceRegWithSub(S, NewR, Hexagon::isub_lo, MRI);
HBS::replaceRegWithSub(RD.Reg, NewR, Hexagon::isub_hi, MRI);
}
return true;
}
return false;
}
// Check for tstbit simplification opportunity, where the bit being checked
// can be tracked back to another register. For example:
// %2 = S2_lsr_i_r %1, 5
// %3 = S2_tstbit_i %2, 0
// =>
// %3 = S2_tstbit_i %1, 5
bool BitSimplification::simplifyTstbit(MachineInstr *MI,
BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) {
unsigned Opc = MI->getOpcode();
if (Opc != Hexagon::S2_tstbit_i)
return false;
unsigned BN = MI->getOperand(2).getImm();
BitTracker::RegisterRef RS = MI->getOperand(1);
unsigned F, W;
DebugLoc DL = MI->getDebugLoc();
if (!BT.has(RS.Reg) || !HBS::getSubregMask(RS, F, W, MRI))
return false;
MachineBasicBlock &B = *MI->getParent();
auto At = MI->isPHI() ? B.getFirstNonPHI()
: MachineBasicBlock::iterator(MI);
const BitTracker::RegisterCell &SC = BT.lookup(RS.Reg);
const BitTracker::BitValue &V = SC[F+BN];
if (V.Type == BitTracker::BitValue::Ref && V.RefI.Reg != RS.Reg) {
const TargetRegisterClass *TC = MRI.getRegClass(V.RefI.Reg);
// Need to map V.RefI.Reg to a 32-bit register, i.e. if it is
// a double register, need to use a subregister and adjust bit
// number.
unsigned P = std::numeric_limits<unsigned>::max();
BitTracker::RegisterRef RR(V.RefI.Reg, 0);
if (TC == &Hexagon::DoubleRegsRegClass) {
P = V.RefI.Pos;
RR.Sub = Hexagon::isub_lo;
if (P >= 32) {
P -= 32;
RR.Sub = Hexagon::isub_hi;
}
} else if (TC == &Hexagon::IntRegsRegClass) {
P = V.RefI.Pos;
}
if (P != std::numeric_limits<unsigned>::max()) {
unsigned NewR = MRI.createVirtualRegister(&Hexagon::PredRegsRegClass);
BuildMI(B, At, DL, HII.get(Hexagon::S2_tstbit_i), NewR)
.addReg(RR.Reg, 0, RR.Sub)
.addImm(P);
HBS::replaceReg(RD.Reg, NewR, MRI);
BT.put(NewR, RC);
return true;
}
} else if (V.is(0) || V.is(1)) {
unsigned NewR = MRI.createVirtualRegister(&Hexagon::PredRegsRegClass);
unsigned NewOpc = V.is(0) ? Hexagon::PS_false : Hexagon::PS_true;
BuildMI(B, At, DL, HII.get(NewOpc), NewR);
HBS::replaceReg(RD.Reg, NewR, MRI);
return true;
}
return false;
}
// Detect whether RD is a bitfield extract (sign- or zero-extended) of
// some register from the AVs set. Create a new corresponding instruction
// at the location of MI. The intent is to recognize situations where
// a sequence of instructions performs an operation that is equivalent to
// an extract operation, such as a shift left followed by a shift right.
bool BitSimplification::simplifyExtractLow(MachineInstr *MI,
BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC,
const RegisterSet &AVs) {
if (!GenExtract)
return false;
if (MaxExtract.getNumOccurrences()) {
if (CountExtract >= MaxExtract)
return false;
CountExtract++;
}
unsigned W = RC.width();
unsigned RW = W;
unsigned Len;
bool Signed;
// The code is mostly class-independent, except for the part that generates
// the extract instruction, and establishes the source register (in case it
// needs to use a subregister).
const TargetRegisterClass *FRC = HBS::getFinalVRegClass(RD, MRI);
if (FRC != &Hexagon::IntRegsRegClass && FRC != &Hexagon::DoubleRegsRegClass)
return false;
assert(RD.Sub == 0);
// Observation:
// If the cell has a form of 00..0xx..x with k zeros and n remaining
// bits, this could be an extractu of the n bits, but it could also be
// an extractu of a longer field which happens to have 0s in the top
// bit positions.
// The same logic applies to sign-extended fields.
//
// Do not check for the extended extracts, since it would expand the
// search space quite a bit. The search may be expensive as it is.
const BitTracker::BitValue &TopV = RC[W-1];
// Eliminate candidates that have self-referential bits, since they
// cannot be extracts from other registers. Also, skip registers that
// have compile-time constant values.
bool IsConst = true;
for (unsigned I = 0; I != W; ++I) {
const BitTracker::BitValue &V = RC[I];
if (V.Type == BitTracker::BitValue::Ref && V.RefI.Reg == RD.Reg)
return false;
IsConst = IsConst && (V.is(0) || V.is(1));
}
if (IsConst)
return false;
if (TopV.is(0) || TopV.is(1)) {
bool S = TopV.is(1);
for (--W; W > 0 && RC[W-1].is(S); --W)
;
Len = W;
Signed = S;
// The sign bit must be a part of the field being extended.
if (Signed)
++Len;
} else {
// This could still be a sign-extended extract.
assert(TopV.Type == BitTracker::BitValue::Ref);
if (TopV.RefI.Reg == RD.Reg || TopV.RefI.Pos == W-1)
return false;
for (--W; W > 0 && RC[W-1] == TopV; --W)
;
// The top bits of RC are copies of TopV. One occurrence of TopV will
// be a part of the field.
Len = W + 1;
Signed = true;
}
// This would be just a copy. It should be handled elsewhere.
if (Len == RW)
return false;
DEBUG({
dbgs() << __func__ << " on reg: " << printReg(RD.Reg, &HRI, RD.Sub)
<< ", MI: " << *MI;
dbgs() << "Cell: " << RC << '\n';
dbgs() << "Expected bitfield size: " << Len << " bits, "
<< (Signed ? "sign" : "zero") << "-extended\n";
});
bool Changed = false;
for (unsigned R = AVs.find_first(); R != 0; R = AVs.find_next(R)) {
if (!BT.has(R))
continue;
const BitTracker::RegisterCell &SC = BT.lookup(R);
unsigned SW = SC.width();
// The source can be longer than the destination, as long as its size is
// a multiple of the size of the destination. Also, we would need to be
// able to refer to the subregister in the source that would be of the
// same size as the destination, but only check the sizes here.
if (SW < RW || (SW % RW) != 0)
continue;
// The field can start at any offset in SC as long as it contains Len
// bits and does not cross subregister boundary (if the source register
// is longer than the destination).
unsigned Off = 0;
while (Off <= SW-Len) {
unsigned OE = (Off+Len)/RW;
if (OE != Off/RW) {
// The assumption here is that if the source (R) is longer than the
// destination, then the destination is a sequence of words of
// size RW, and each such word in R can be accessed via a subregister.
//
// If the beginning and the end of the field cross the subregister
// boundary, advance to the next subregister.
Off = OE*RW;
continue;
}
if (HBS::isEqual(RC, 0, SC, Off, Len))
break;
++Off;
}
if (Off > SW-Len)
continue;
// Found match.
unsigned ExtOpc = 0;
if (Off == 0) {
if (Len == 8)
ExtOpc = Signed ? Hexagon::A2_sxtb : Hexagon::A2_zxtb;
else if (Len == 16)
ExtOpc = Signed ? Hexagon::A2_sxth : Hexagon::A2_zxth;
else if (Len < 10 && !Signed)
ExtOpc = Hexagon::A2_andir;
}
if (ExtOpc == 0) {
ExtOpc =
Signed ? (RW == 32 ? Hexagon::S4_extract : Hexagon::S4_extractp)
: (RW == 32 ? Hexagon::S2_extractu : Hexagon::S2_extractup);
}
unsigned SR = 0;
// This only recognizes isub_lo and isub_hi.
if (RW != SW && RW*2 != SW)
continue;
if (RW != SW)
SR = (Off/RW == 0) ? Hexagon::isub_lo : Hexagon::isub_hi;
Off = Off % RW;
if (!validateReg({R,SR}, ExtOpc, 1))
continue;
// Don't generate the same instruction as the one being optimized.
if (MI->getOpcode() == ExtOpc) {
// All possible ExtOpc's have the source in operand(1).
const MachineOperand &SrcOp = MI->getOperand(1);
if (SrcOp.getReg() == R)
continue;
}
DebugLoc DL = MI->getDebugLoc();
MachineBasicBlock &B = *MI->getParent();
unsigned NewR = MRI.createVirtualRegister(FRC);
auto At = MI->isPHI() ? B.getFirstNonPHI()
: MachineBasicBlock::iterator(MI);
auto MIB = BuildMI(B, At, DL, HII.get(ExtOpc), NewR)
.addReg(R, 0, SR);
switch (ExtOpc) {
case Hexagon::A2_sxtb:
case Hexagon::A2_zxtb:
case Hexagon::A2_sxth:
case Hexagon::A2_zxth:
break;
case Hexagon::A2_andir:
MIB.addImm((1u << Len) - 1);
break;
case Hexagon::S4_extract:
case Hexagon::S2_extractu:
case Hexagon::S4_extractp:
case Hexagon::S2_extractup:
MIB.addImm(Len)
.addImm(Off);
break;
default:
llvm_unreachable("Unexpected opcode");
}
HBS::replaceReg(RD.Reg, NewR, MRI);
BT.put(BitTracker::RegisterRef(NewR), RC);
Changed = true;
break;
}
return Changed;
}
bool BitSimplification::processBlock(MachineBasicBlock &B,
const RegisterSet &AVs) {
if (!BT.reached(&B))
return false;
bool Changed = false;
RegisterSet AVB = AVs;
RegisterSet Defs;
for (auto I = B.begin(), E = B.end(); I != E; ++I, AVB.insert(Defs)) {
MachineInstr *MI = &*I;
Defs.clear();
HBS::getInstrDefs(*MI, Defs);
unsigned Opc = MI->getOpcode();
if (Opc == TargetOpcode::COPY || Opc == TargetOpcode::REG_SEQUENCE)
continue;
if (MI->mayStore()) {
bool T = genStoreUpperHalf(MI);
T = T || genStoreImmediate(MI);
Changed |= T;
continue;
}
if (Defs.count() != 1)
continue;
const MachineOperand &Op0 = MI->getOperand(0);
if (!Op0.isReg() || !Op0.isDef())
continue;
BitTracker::RegisterRef RD = Op0;
if (!BT.has(RD.Reg))
continue;
const TargetRegisterClass *FRC = HBS::getFinalVRegClass(RD, MRI);
const BitTracker::RegisterCell &RC = BT.lookup(RD.Reg);
if (FRC->getID() == Hexagon::DoubleRegsRegClassID) {
bool T = genPackhl(MI, RD, RC);
T = T || simplifyExtractLow(MI, RD, RC, AVB);
Changed |= T;
continue;
}
if (FRC->getID() == Hexagon::IntRegsRegClassID) {
bool T = genBitSplit(MI, RD, RC, AVB);
T = T || simplifyExtractLow(MI, RD, RC, AVB);
T = T || genExtractHalf(MI, RD, RC);
T = T || genCombineHalf(MI, RD, RC);
T = T || genExtractLow(MI, RD, RC);
Changed |= T;
continue;
}
if (FRC->getID() == Hexagon::PredRegsRegClassID) {
bool T = simplifyTstbit(MI, RD, RC);
Changed |= T;
continue;
}
}
return Changed;
}
bool HexagonBitSimplify::runOnMachineFunction(MachineFunction &MF) {
if (skipFunction(MF.getFunction()))
return false;
auto &HST = MF.getSubtarget<HexagonSubtarget>();
auto &HRI = *HST.getRegisterInfo();
auto &HII = *HST.getInstrInfo();
MDT = &getAnalysis<MachineDominatorTree>();
MachineRegisterInfo &MRI = MF.getRegInfo();
bool Changed;
Changed = DeadCodeElimination(MF, *MDT).run();
const HexagonEvaluator HE(HRI, MRI, HII, MF);
BitTracker BT(HE, MF);
DEBUG(BT.trace(true));
BT.run();
MachineBasicBlock &Entry = MF.front();
RegisterSet AIG; // Available registers for IG.
ConstGeneration ImmG(BT, HII, MRI);
Changed |= visitBlock(Entry, ImmG, AIG);
RegisterSet ARE; // Available registers for RIE.
RedundantInstrElimination RIE(BT, HII, HRI, MRI);
bool Ried = visitBlock(Entry, RIE, ARE);
if (Ried) {
Changed = true;
BT.run();
}
RegisterSet ACG; // Available registers for CG.
CopyGeneration CopyG(BT, HII, HRI, MRI);
Changed |= visitBlock(Entry, CopyG, ACG);
RegisterSet ACP; // Available registers for CP.
CopyPropagation CopyP(HRI, MRI);
Changed |= visitBlock(Entry, CopyP, ACP);
Changed = DeadCodeElimination(MF, *MDT).run() || Changed;
BT.run();
RegisterSet ABS; // Available registers for BS.
BitSimplification BitS(BT, *MDT, HII, HRI, MRI, MF);
Changed |= visitBlock(Entry, BitS, ABS);
Changed = DeadCodeElimination(MF, *MDT).run() || Changed;
if (Changed) {
for (auto &B : MF)
for (auto &I : B)
I.clearKillInfo();
DeadCodeElimination(MF, *MDT).run();
}
return Changed;
}
// Recognize loops where the code at the end of the loop matches the code
// before the entry of the loop, and the matching code is such that is can
// be simplified. This pass relies on the bit simplification above and only
// prepares code in a way that can be handled by the bit simplifcation.
//
// This is the motivating testcase (and explanation):
//
// {
// loop0(.LBB0_2, r1) // %for.body.preheader
// r5:4 = memd(r0++#8)
// }
// {
// r3 = lsr(r4, #16)
// r7:6 = combine(r5, r5)
// }
// {
// r3 = insert(r5, #16, #16)
// r7:6 = vlsrw(r7:6, #16)
// }
// .LBB0_2:
// {
// memh(r2+#4) = r5
// memh(r2+#6) = r6 # R6 is really R5.H
// }
// {
// r2 = add(r2, #8)
// memh(r2+#0) = r4
// memh(r2+#2) = r3 # R3 is really R4.H
// }
// {
// r5:4 = memd(r0++#8)
// }
// { # "Shuffling" code that sets up R3 and R6
// r3 = lsr(r4, #16) # so that their halves can be stored in the
// r7:6 = combine(r5, r5) # next iteration. This could be folded into
// } # the stores if the code was at the beginning
// { # of the loop iteration. Since the same code
// r3 = insert(r5, #16, #16) # precedes the loop, it can actually be moved
// r7:6 = vlsrw(r7:6, #16) # there.
// }:endloop0
//
//
// The outcome:
//
// {
// loop0(.LBB0_2, r1)
// r5:4 = memd(r0++#8)
// }
// .LBB0_2:
// {
// memh(r2+#4) = r5
// memh(r2+#6) = r5.h
// }
// {
// r2 = add(r2, #8)
// memh(r2+#0) = r4
// memh(r2+#2) = r4.h
// }
// {
// r5:4 = memd(r0++#8)
// }:endloop0
namespace llvm {
FunctionPass *createHexagonLoopRescheduling();
void initializeHexagonLoopReschedulingPass(PassRegistry&);
} // end namespace llvm
namespace {
class HexagonLoopRescheduling : public MachineFunctionPass {
public:
static char ID;
HexagonLoopRescheduling() : MachineFunctionPass(ID) {
initializeHexagonLoopReschedulingPass(*PassRegistry::getPassRegistry());
}
bool runOnMachineFunction(MachineFunction &MF) override;
private:
const HexagonInstrInfo *HII = nullptr;
const HexagonRegisterInfo *HRI = nullptr;
MachineRegisterInfo *MRI = nullptr;
BitTracker *BTP = nullptr;
struct LoopCand {
LoopCand(MachineBasicBlock *lb, MachineBasicBlock *pb,
MachineBasicBlock *eb) : LB(lb), PB(pb), EB(eb) {}
MachineBasicBlock *LB, *PB, *EB;
};
using InstrList = std::vector<MachineInstr *>;
struct InstrGroup {
BitTracker::RegisterRef Inp, Out;
InstrList Ins;
};
struct PhiInfo {
PhiInfo(MachineInstr &P, MachineBasicBlock &B);
unsigned DefR;
BitTracker::RegisterRef LR, PR; // Loop Register, Preheader Register
MachineBasicBlock *LB, *PB; // Loop Block, Preheader Block
};
static unsigned getDefReg(const MachineInstr *MI);
bool isConst(unsigned Reg) const;
bool isBitShuffle(const MachineInstr *MI, unsigned DefR) const;
bool isStoreInput(const MachineInstr *MI, unsigned DefR) const;
bool isShuffleOf(unsigned OutR, unsigned InpR) const;
bool isSameShuffle(unsigned OutR1, unsigned InpR1, unsigned OutR2,
unsigned &InpR2) const;
void moveGroup(InstrGroup &G, MachineBasicBlock &LB, MachineBasicBlock &PB,
MachineBasicBlock::iterator At, unsigned OldPhiR, unsigned NewPredR);
bool processLoop(LoopCand &C);
};
} // end anonymous namespace
char HexagonLoopRescheduling::ID = 0;
INITIALIZE_PASS(HexagonLoopRescheduling, "hexagon-loop-resched",
"Hexagon Loop Rescheduling", false, false)
HexagonLoopRescheduling::PhiInfo::PhiInfo(MachineInstr &P,
MachineBasicBlock &B) {
DefR = HexagonLoopRescheduling::getDefReg(&P);
LB = &B;
PB = nullptr;
for (unsigned i = 1, n = P.getNumOperands(); i < n; i += 2) {
const MachineOperand &OpB = P.getOperand(i+1);
if (OpB.getMBB() == &B) {
LR = P.getOperand(i);
continue;
}
PB = OpB.getMBB();
PR = P.getOperand(i);
}
}
unsigned HexagonLoopRescheduling::getDefReg(const MachineInstr *MI) {
RegisterSet Defs;
HBS::getInstrDefs(*MI, Defs);
if (Defs.count() != 1)
return 0;
return Defs.find_first();
}
bool HexagonLoopRescheduling::isConst(unsigned Reg) const {
if (!BTP->has(Reg))
return false;
const BitTracker::RegisterCell &RC = BTP->lookup(Reg);
for (unsigned i = 0, w = RC.width(); i < w; ++i) {
const BitTracker::BitValue &V = RC[i];
if (!V.is(0) && !V.is(1))
return false;
}
return true;
}
bool HexagonLoopRescheduling::isBitShuffle(const MachineInstr *MI,
unsigned DefR) const {
unsigned Opc = MI->getOpcode();
switch (Opc) {
case TargetOpcode::COPY:
case Hexagon::S2_lsr_i_r:
case Hexagon::S2_asr_i_r:
case Hexagon::S2_asl_i_r:
case Hexagon::S2_lsr_i_p:
case Hexagon::S2_asr_i_p:
case Hexagon::S2_asl_i_p:
case Hexagon::S2_insert:
case Hexagon::A2_or:
case Hexagon::A2_orp:
case Hexagon::A2_and:
case Hexagon::A2_andp:
case Hexagon::A2_combinew:
case Hexagon::A4_combineri:
case Hexagon::A4_combineir:
case Hexagon::A2_combineii:
case Hexagon::A4_combineii:
case Hexagon::A2_combine_ll:
case Hexagon::A2_combine_lh:
case Hexagon::A2_combine_hl:
case Hexagon::A2_combine_hh:
return true;
}
return false;
}
bool HexagonLoopRescheduling::isStoreInput(const MachineInstr *MI,
unsigned InpR) const {
for (unsigned i = 0, n = MI->getNumOperands(); i < n; ++i) {
const MachineOperand &Op = MI->getOperand(i);
if (!Op.isReg())
continue;
if (Op.getReg() == InpR)
return i == n-1;
}
return false;
}
bool HexagonLoopRescheduling::isShuffleOf(unsigned OutR, unsigned InpR) const {
if (!BTP->has(OutR) || !BTP->has(InpR))
return false;
const BitTracker::RegisterCell &OutC = BTP->lookup(OutR);
for (unsigned i = 0, w = OutC.width(); i < w; ++i) {
const BitTracker::BitValue &V = OutC[i];
if (V.Type != BitTracker::BitValue::Ref)
continue;
if (V.RefI.Reg != InpR)
return false;
}
return true;
}
bool HexagonLoopRescheduling::isSameShuffle(unsigned OutR1, unsigned InpR1,
unsigned OutR2, unsigned &InpR2) const {
if (!BTP->has(OutR1) || !BTP->has(InpR1) || !BTP->has(OutR2))
return false;
const BitTracker::RegisterCell &OutC1 = BTP->lookup(OutR1);
const BitTracker::RegisterCell &OutC2 = BTP->lookup(OutR2);
unsigned W = OutC1.width();
unsigned MatchR = 0;
if (W != OutC2.width())
return false;
for (unsigned i = 0; i < W; ++i) {
const BitTracker::BitValue &V1 = OutC1[i], &V2 = OutC2[i];
if (V1.Type != V2.Type || V1.Type == BitTracker::BitValue::One)
return false;
if (V1.Type != BitTracker::BitValue::Ref)
continue;
if (V1.RefI.Pos != V2.RefI.Pos)
return false;
if (V1.RefI.Reg != InpR1)
return false;
if (V2.RefI.Reg == 0 || V2.RefI.Reg == OutR2)
return false;
if (!MatchR)
MatchR = V2.RefI.Reg;
else if (V2.RefI.Reg != MatchR)
return false;
}
InpR2 = MatchR;
return true;
}
void HexagonLoopRescheduling::moveGroup(InstrGroup &G, MachineBasicBlock &LB,
MachineBasicBlock &PB, MachineBasicBlock::iterator At, unsigned OldPhiR,
unsigned NewPredR) {
DenseMap<unsigned,unsigned> RegMap;
const TargetRegisterClass *PhiRC = MRI->getRegClass(NewPredR);
unsigned PhiR = MRI->createVirtualRegister(PhiRC);
BuildMI(LB, At, At->getDebugLoc(), HII->get(TargetOpcode::PHI), PhiR)
.addReg(NewPredR)
.addMBB(&PB)
.addReg(G.Inp.Reg)
.addMBB(&LB);
RegMap.insert(std::make_pair(G.Inp.Reg, PhiR));
for (unsigned i = G.Ins.size(); i > 0; --i) {
const MachineInstr *SI = G.Ins[i-1];
unsigned DR = getDefReg(SI);
const TargetRegisterClass *RC = MRI->getRegClass(DR);
unsigned NewDR = MRI->createVirtualRegister(RC);
DebugLoc DL = SI->getDebugLoc();
auto MIB = BuildMI(LB, At, DL, HII->get(SI->getOpcode()), NewDR);
for (unsigned j = 0, m = SI->getNumOperands(); j < m; ++j) {
const MachineOperand &Op = SI->getOperand(j);
if (!Op.isReg()) {
MIB.add(Op);
continue;
}
if (!Op.isUse())
continue;
unsigned UseR = RegMap[Op.getReg()];
MIB.addReg(UseR, 0, Op.getSubReg());
}
RegMap.insert(std::make_pair(DR, NewDR));
}
HBS::replaceReg(OldPhiR, RegMap[G.Out.Reg], *MRI);
}
bool HexagonLoopRescheduling::processLoop(LoopCand &C) {
DEBUG(dbgs() << "Processing loop in " << printMBBReference(*C.LB) << "\n");
std::vector<PhiInfo> Phis;
for (auto &I : *C.LB) {
if (!I.isPHI())
break;
unsigned PR = getDefReg(&I);
if (isConst(PR))
continue;
bool BadUse = false, GoodUse = false;
for (auto UI = MRI->use_begin(PR), UE = MRI->use_end(); UI != UE; ++UI) {
MachineInstr *UseI = UI->getParent();
if (UseI->getParent() != C.LB) {
BadUse = true;
break;
}
if (isBitShuffle(UseI, PR) || isStoreInput(UseI, PR))
GoodUse = true;
}
if (BadUse || !GoodUse)
continue;
Phis.push_back(PhiInfo(I, *C.LB));
}
DEBUG({
dbgs() << "Phis: {";
for (auto &I : Phis) {
dbgs() << ' ' << printReg(I.DefR, HRI) << "=phi("
<< printReg(I.PR.Reg, HRI, I.PR.Sub) << ":b" << I.PB->getNumber()
<< ',' << printReg(I.LR.Reg, HRI, I.LR.Sub) << ":b"
<< I.LB->getNumber() << ')';
}
dbgs() << " }\n";
});
if (Phis.empty())
return false;
bool Changed = false;
InstrList ShufIns;
// Go backwards in the block: for each bit shuffling instruction, check
// if that instruction could potentially be moved to the front of the loop:
// the output of the loop cannot be used in a non-shuffling instruction
// in this loop.
for (auto I = C.LB->rbegin(), E = C.LB->rend(); I != E; ++I) {
if (I->isTerminator())
continue;
if (I->isPHI())
break;
RegisterSet Defs;
HBS::getInstrDefs(*I, Defs);
if (Defs.count() != 1)
continue;
unsigned DefR = Defs.find_first();
if (!TargetRegisterInfo::isVirtualRegister(DefR))
continue;
if (!isBitShuffle(&*I, DefR))
continue;
bool BadUse = false;
for (auto UI = MRI->use_begin(DefR), UE = MRI->use_end(); UI != UE; ++UI) {
MachineInstr *UseI = UI->getParent();
if (UseI->getParent() == C.LB) {
if (UseI->isPHI()) {
// If the use is in a phi node in this loop, then it should be
// the value corresponding to the back edge.
unsigned Idx = UI.getOperandNo();
if (UseI->getOperand(Idx+1).getMBB() != C.LB)
BadUse = true;
} else {
auto F = find(ShufIns, UseI);
if (F == ShufIns.end())
BadUse = true;
}
} else {
// There is a use outside of the loop, but there is no epilog block
// suitable for a copy-out.
if (C.EB == nullptr)
BadUse = true;
}
if (BadUse)
break;
}
if (BadUse)
continue;
ShufIns.push_back(&*I);
}
// Partition the list of shuffling instructions into instruction groups,
// where each group has to be moved as a whole (i.e. a group is a chain of
// dependent instructions). A group produces a single live output register,
// which is meant to be the input of the loop phi node (although this is
// not checked here yet). It also uses a single register as its input,
// which is some value produced in the loop body. After moving the group
// to the beginning of the loop, that input register would need to be
// the loop-carried register (through a phi node) instead of the (currently
// loop-carried) output register.
using InstrGroupList = std::vector<InstrGroup>;
InstrGroupList Groups;
for (unsigned i = 0, n = ShufIns.size(); i < n; ++i) {
MachineInstr *SI = ShufIns[i];
if (SI == nullptr)
continue;
InstrGroup G;
G.Ins.push_back(SI);
G.Out.Reg = getDefReg(SI);
RegisterSet Inputs;
HBS::getInstrUses(*SI, Inputs);
for (unsigned j = i+1; j < n; ++j) {
MachineInstr *MI = ShufIns[j];
if (MI == nullptr)
continue;
RegisterSet Defs;
HBS::getInstrDefs(*MI, Defs);
// If this instruction does not define any pending inputs, skip it.
if (!Defs.intersects(Inputs))
continue;
// Otherwise, add it to the current group and remove the inputs that
// are defined by MI.
G.Ins.push_back(MI);
Inputs.remove(Defs);
// Then add all registers used by MI.
HBS::getInstrUses(*MI, Inputs);
ShufIns[j] = nullptr;
}
// Only add a group if it requires at most one register.
if (Inputs.count() > 1)
continue;
auto LoopInpEq = [G] (const PhiInfo &P) -> bool {
return G.Out.Reg == P.LR.Reg;
};
if (llvm::find_if(Phis, LoopInpEq) == Phis.end())
continue;
G.Inp.Reg = Inputs.find_first();
Groups.push_back(G);
}
DEBUG({
for (unsigned i = 0, n = Groups.size(); i < n; ++i) {
InstrGroup &G = Groups[i];
dbgs() << "Group[" << i << "] inp: "
<< printReg(G.Inp.Reg, HRI, G.Inp.Sub)
<< " out: " << printReg(G.Out.Reg, HRI, G.Out.Sub) << "\n";
for (unsigned j = 0, m = G.Ins.size(); j < m; ++j)
dbgs() << " " << *G.Ins[j];
}
});
for (unsigned i = 0, n = Groups.size(); i < n; ++i) {
InstrGroup &G = Groups[i];
if (!isShuffleOf(G.Out.Reg, G.Inp.Reg))
continue;
auto LoopInpEq = [G] (const PhiInfo &P) -> bool {
return G.Out.Reg == P.LR.Reg;
};
auto F = llvm::find_if(Phis, LoopInpEq);
if (F == Phis.end())
continue;
unsigned PrehR = 0;
if (!isSameShuffle(G.Out.Reg, G.Inp.Reg, F->PR.Reg, PrehR)) {
const MachineInstr *DefPrehR = MRI->getVRegDef(F->PR.Reg);
unsigned Opc = DefPrehR->getOpcode();
if (Opc != Hexagon::A2_tfrsi && Opc != Hexagon::A2_tfrpi)
continue;
if (!DefPrehR->getOperand(1).isImm())
continue;
if (DefPrehR->getOperand(1).getImm() != 0)
continue;
const TargetRegisterClass *RC = MRI->getRegClass(G.Inp.Reg);
if (RC != MRI->getRegClass(F->PR.Reg)) {
PrehR = MRI->createVirtualRegister(RC);
unsigned TfrI = (RC == &Hexagon::IntRegsRegClass) ? Hexagon::A2_tfrsi
: Hexagon::A2_tfrpi;
auto T = C.PB->getFirstTerminator();
DebugLoc DL = (T != C.PB->end()) ? T->getDebugLoc() : DebugLoc();
BuildMI(*C.PB, T, DL, HII->get(TfrI), PrehR)
.addImm(0);
} else {
PrehR = F->PR.Reg;
}
}
// isSameShuffle could match with PrehR being of a wider class than
// G.Inp.Reg, for example if G shuffles the low 32 bits of its input,
// it would match for the input being a 32-bit register, and PrehR
// being a 64-bit register (where the low 32 bits match). This could
// be handled, but for now skip these cases.
if (MRI->getRegClass(PrehR) != MRI->getRegClass(G.Inp.Reg))
continue;
moveGroup(G, *F->LB, *F->PB, F->LB->getFirstNonPHI(), F->DefR, PrehR);
Changed = true;
}
return Changed;
}
bool HexagonLoopRescheduling::runOnMachineFunction(MachineFunction &MF) {
if (skipFunction(MF.getFunction()))
return false;
auto &HST = MF.getSubtarget<HexagonSubtarget>();
HII = HST.getInstrInfo();
HRI = HST.getRegisterInfo();
MRI = &MF.getRegInfo();
const HexagonEvaluator HE(*HRI, *MRI, *HII, MF);
BitTracker BT(HE, MF);
DEBUG(BT.trace(true));
BT.run();
BTP = &BT;
std::vector<LoopCand> Cand;
for (auto &B : MF) {
if (B.pred_size() != 2 || B.succ_size() != 2)
continue;
MachineBasicBlock *PB = nullptr;
bool IsLoop = false;
for (auto PI = B.pred_begin(), PE = B.pred_end(); PI != PE; ++PI) {
if (*PI != &B)
PB = *PI;
else
IsLoop = true;
}
if (!IsLoop)
continue;
MachineBasicBlock *EB = nullptr;
for (auto SI = B.succ_begin(), SE = B.succ_end(); SI != SE; ++SI) {
if (*SI == &B)
continue;
// Set EP to the epilog block, if it has only 1 predecessor (i.e. the
// edge from B to EP is non-critical.
if ((*SI)->pred_size() == 1)
EB = *SI;
break;
}
Cand.push_back(LoopCand(&B, PB, EB));
}
bool Changed = false;
for (auto &C : Cand)
Changed |= processLoop(C);
return Changed;
}
//===----------------------------------------------------------------------===//
// Public Constructor Functions
//===----------------------------------------------------------------------===//
FunctionPass *llvm::createHexagonLoopRescheduling() {
return new HexagonLoopRescheduling();
}
FunctionPass *llvm::createHexagonBitSimplify() {
return new HexagonBitSimplify();
}
| [
"[email protected]"
] | |
8bc7d60ce7b531b648ccaafc0b216a8c6062d1fa | be85c773fba2854410f64efb602dba83642cc135 | /ConfigParser.cpp | ddb6bd65d2080e72eb2157485e4c200045631a69 | [] | no_license | marektamaskovic/lineparser | 5e14e6f1e4dc13708febeb62cebdf6b92913dd37 | 1eb208a329de67799c9be5b94be85e48fba7ecf9 | refs/heads/master | 2022-12-01T04:15:11.989171 | 2017-12-08T13:59:38 | 2017-12-08T13:59:38 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 3,249 | cpp | #include "ConfigParser.hpp"
ConfigParser::ConfigParser(const std::vector<std::string> &v, const std::string &sep):
keys(v), separator(sep) {}
ConfigParser::ConfigParser(const std::vector<std::string> &v):
ConfigParser(v, "=") {}
void ConfigParser::viewConfig(){
std::cout << "separator:\t" << this->separator << std::endl;
std::cout << "keys:\t";
for(auto item : this->keys){
std::cout << item << ", ";
}
std::cout << "\b\b " << std::endl;
}
std::unique_ptr<struct parsed_t> ConfigParser::parseString(std::string &str){
std::string::size_type sep_pos;
std::string key_c, key, val;
sep_pos = str.find(this->separator);
if(sep_pos == std::string::npos){
std::cout << "ERROR: separator not found: '" << str << "'" << std::endl;
}
else{
// std::cout << "found at: " << str.substr(sep_pos) << " " << sep_pos << std::endl;
key = str.substr(0, sep_pos);
val = str.substr(sep_pos + 1);
if(this->trim(key)){
std::cerr << "ERROR: trim(): '"<< key << "'" << std::endl;
}
if(this->trim(val)){
std::cerr << "ERROR: trim(): '"<< val << "'" << std::endl;
}
// std::cout << "parsed: '" << key << "'='" << val << "'" << std::endl;
if(this->checkKeyValidity(key)){
std::cerr << "ERROR: parsed key is not in key set inserted: '" << key << "'" << std::endl;
return nullptr;
}
else{
std::unique_ptr<struct parsed_t> p (new struct parsed_t(key, val));
return p;
}
}
return nullptr;
}
bool ConfigParser::parseStream(std::fstream &stream){
std::map<std::string, std::string> m;
std::map<std::string, std::string>::iterator it;
std::string line;
while ( getline (stream, line) ){
// std::cout << "raw:" << line << '\n';
auto p = this->parseString(line);
if(p != nullptr){
// std::cout << "par: " << p->lvalue << "=" << p->rvalue << std::endl;
it = m.find(p->lvalue);
if (it == m.end()){
m.emplace(p->lvalue, p->rvalue);
}
else{
m[p->lvalue] = p->rvalue;
}
}
}
this->output_map = m;
if(this->checkMapValidity()){
return false;
}
else{
return true;
}
}
bool ConfigParser::trim(std::string &str){
if(str.length() <= 0){
return true;
}
std::locale loc;
while(std::isspace(str.back(),loc)){
str.pop_back();
}
while(std::isspace(str.front(),loc)){
str = str.substr(1);
}
return false;
}
bool ConfigParser::checkKeyValidity(const std::string &key){
for(auto a: this->keys){
// std::cout << "Cmp:" << a << ":" << key << std::endl;
if(!key.compare(a)){
return false;
}
else{
continue;
}
}
return 1;
}
bool ConfigParser::checkMapValidity(){
std::cerr << "ERROR: Override ConfigParser::checkMapValidity() virtual method!" << std::endl;
return false;
}
std::map<std::string, std::string> ConfigParser::getMap(){
return this->output_map;
} | [
"[email protected]"
] | |
43fed9507783431e82695b15e1dd53d2339f2832 | 5b4da825e536f570a464ae9f5d7f377fc16e12b7 | /externals/wasm-compiler/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | eb2a28f574a5449b45e9fa7821a5777a271d7088 | [
"NCSA",
"BSD-3-Clause",
"Apache-2.0",
"MIT"
] | permissive | JaminChan/eos_win | 9ecb3fe7d1fbb52340e7b8df42b2d3d6695930a6 | c03e57151cfe152d0d3120abb13226f4df74f37e | refs/heads/master | 2020-03-24T20:38:49.539494 | 2018-09-06T10:13:16 | 2018-09-06T10:13:16 | 142,989,586 | 0 | 0 | MIT | 2018-09-04T06:49:10 | 2018-07-31T09:02:44 | C++ | UTF-8 | C++ | false | false | 41,066 | cpp | //===-- llvm/CodeGen/TargetLoweringObjectFileImpl.cpp - Object File Info --===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file implements classes used to handle lowerings specific to common
// object file formats.
//
//===----------------------------------------------------------------------===//
#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/Triple.h"
#include "llvm/CodeGen/MachineModuleInfoImpls.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/GlobalVariable.h"
#include "llvm/IR/Mangler.h"
#include "llvm/IR/Module.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCSectionCOFF.h"
#include "llvm/MC/MCSectionELF.h"
#include "llvm/MC/MCSectionMachO.h"
#include "llvm/MC/MCStreamer.h"
#include "llvm/MC/MCSymbolELF.h"
#include "llvm/MC/MCValue.h"
#include "llvm/ProfileData/InstrProf.h"
#include "llvm/Support/COFF.h"
#include "llvm/Support/Dwarf.h"
#include "llvm/Support/ELF.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetLowering.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetSubtargetInfo.h"
using namespace llvm;
using namespace dwarf;
//===----------------------------------------------------------------------===//
// ELF
//===----------------------------------------------------------------------===//
MCSymbol *TargetLoweringObjectFileELF::getCFIPersonalitySymbol(
const GlobalValue *GV, const TargetMachine &TM,
MachineModuleInfo *MMI) const {
unsigned Encoding = getPersonalityEncoding();
if ((Encoding & 0x80) == dwarf::DW_EH_PE_indirect)
return getContext().getOrCreateSymbol(StringRef("DW.ref.") +
TM.getSymbol(GV)->getName());
if ((Encoding & 0x70) == dwarf::DW_EH_PE_absptr)
return TM.getSymbol(GV);
report_fatal_error("We do not support this DWARF encoding yet!");
}
void TargetLoweringObjectFileELF::emitPersonalityValue(
MCStreamer &Streamer, const DataLayout &DL, const MCSymbol *Sym) const {
SmallString<64> NameData("DW.ref.");
NameData += Sym->getName();
MCSymbolELF *Label =
cast<MCSymbolELF>(getContext().getOrCreateSymbol(NameData));
Streamer.EmitSymbolAttribute(Label, MCSA_Hidden);
Streamer.EmitSymbolAttribute(Label, MCSA_Weak);
unsigned Flags = ELF::SHF_ALLOC | ELF::SHF_WRITE | ELF::SHF_GROUP;
MCSection *Sec = getContext().getELFNamedSection(".data", Label->getName(),
ELF::SHT_PROGBITS, Flags, 0);
unsigned Size = DL.getPointerSize();
Streamer.SwitchSection(Sec);
Streamer.EmitValueToAlignment(DL.getPointerABIAlignment());
Streamer.EmitSymbolAttribute(Label, MCSA_ELF_TypeObject);
const MCExpr *E = MCConstantExpr::create(Size, getContext());
Streamer.emitELFSize(Label, E);
Streamer.EmitLabel(Label);
Streamer.EmitSymbolValue(Sym, Size);
}
const MCExpr *TargetLoweringObjectFileELF::getTTypeGlobalReference(
const GlobalValue *GV, unsigned Encoding, const TargetMachine &TM,
MachineModuleInfo *MMI, MCStreamer &Streamer) const {
if (Encoding & dwarf::DW_EH_PE_indirect) {
MachineModuleInfoELF &ELFMMI = MMI->getObjFileInfo<MachineModuleInfoELF>();
MCSymbol *SSym = getSymbolWithGlobalValueBase(GV, ".DW.stub", TM);
// Add information about the stub reference to ELFMMI so that the stub
// gets emitted by the asmprinter.
MachineModuleInfoImpl::StubValueTy &StubSym = ELFMMI.getGVStubEntry(SSym);
if (!StubSym.getPointer()) {
MCSymbol *Sym = TM.getSymbol(GV);
StubSym = MachineModuleInfoImpl::StubValueTy(Sym, !GV->hasLocalLinkage());
}
return TargetLoweringObjectFile::
getTTypeReference(MCSymbolRefExpr::create(SSym, getContext()),
Encoding & ~dwarf::DW_EH_PE_indirect, Streamer);
}
return TargetLoweringObjectFile::getTTypeGlobalReference(GV, Encoding, TM,
MMI, Streamer);
}
static SectionKind
getELFKindForNamedSection(StringRef Name, SectionKind K) {
// N.B.: The defaults used in here are no the same ones used in MC.
// We follow gcc, MC follows gas. For example, given ".section .eh_frame",
// both gas and MC will produce a section with no flags. Given
// section(".eh_frame") gcc will produce:
//
// .section .eh_frame,"a",@progbits
if (Name == getInstrProfCoverageSectionName(false))
return SectionKind::getMetadata();
if (Name.empty() || Name[0] != '.') return K;
// Some lame default implementation based on some magic section names.
if (Name == ".bss" ||
Name.startswith(".bss.") ||
Name.startswith(".gnu.linkonce.b.") ||
Name.startswith(".llvm.linkonce.b.") ||
Name == ".sbss" ||
Name.startswith(".sbss.") ||
Name.startswith(".gnu.linkonce.sb.") ||
Name.startswith(".llvm.linkonce.sb."))
return SectionKind::getBSS();
if (Name == ".tdata" ||
Name.startswith(".tdata.") ||
Name.startswith(".gnu.linkonce.td.") ||
Name.startswith(".llvm.linkonce.td."))
return SectionKind::getThreadData();
if (Name == ".tbss" ||
Name.startswith(".tbss.") ||
Name.startswith(".gnu.linkonce.tb.") ||
Name.startswith(".llvm.linkonce.tb."))
return SectionKind::getThreadBSS();
return K;
}
static unsigned getELFSectionType(StringRef Name, SectionKind K) {
// Use SHT_NOTE for section whose name starts with ".note" to allow
// emitting ELF notes from C variable declaration.
// See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77609
if (Name.startswith(".note"))
return ELF::SHT_NOTE;
if (Name == ".init_array")
return ELF::SHT_INIT_ARRAY;
if (Name == ".fini_array")
return ELF::SHT_FINI_ARRAY;
if (Name == ".preinit_array")
return ELF::SHT_PREINIT_ARRAY;
if (K.isBSS() || K.isThreadBSS())
return ELF::SHT_NOBITS;
return ELF::SHT_PROGBITS;
}
static unsigned getELFSectionFlags(SectionKind K) {
unsigned Flags = 0;
if (!K.isMetadata())
Flags |= ELF::SHF_ALLOC;
if (K.isText())
Flags |= ELF::SHF_EXECINSTR;
if (K.isExecuteOnly())
Flags |= ELF::SHF_ARM_PURECODE;
if (K.isWriteable())
Flags |= ELF::SHF_WRITE;
if (K.isThreadLocal())
Flags |= ELF::SHF_TLS;
if (K.isMergeableCString() || K.isMergeableConst())
Flags |= ELF::SHF_MERGE;
if (K.isMergeableCString())
Flags |= ELF::SHF_STRINGS;
return Flags;
}
static const Comdat *getELFComdat(const GlobalValue *GV) {
const Comdat *C = GV->getComdat();
if (!C)
return nullptr;
if (C->getSelectionKind() != Comdat::Any)
report_fatal_error("ELF COMDATs only support SelectionKind::Any, '" +
C->getName() + "' cannot be lowered.");
return C;
}
MCSection *TargetLoweringObjectFileELF::getExplicitSectionGlobal(
const GlobalObject *GO, SectionKind Kind, const TargetMachine &TM) const {
StringRef SectionName = GO->getSection();
// Infer section flags from the section name if we can.
Kind = getELFKindForNamedSection(SectionName, Kind);
StringRef Group = "";
unsigned Flags = getELFSectionFlags(Kind);
if (const Comdat *C = getELFComdat(GO)) {
Group = C->getName();
Flags |= ELF::SHF_GROUP;
}
return getContext().getELFSection(SectionName,
getELFSectionType(SectionName, Kind), Flags,
/*EntrySize=*/0, Group);
}
/// Return the section prefix name used by options FunctionsSections and
/// DataSections.
static StringRef getSectionPrefixForGlobal(SectionKind Kind) {
if (Kind.isText())
return ".text";
if (Kind.isReadOnly())
return ".rodata";
if (Kind.isBSS())
return ".bss";
if (Kind.isThreadData())
return ".tdata";
if (Kind.isThreadBSS())
return ".tbss";
if (Kind.isData())
return ".data";
assert(Kind.isReadOnlyWithRel() && "Unknown section kind");
return ".data.rel.ro";
}
static MCSectionELF *
selectELFSectionForGlobal(MCContext &Ctx, const GlobalObject *GO,
SectionKind Kind, Mangler &Mang,
const TargetMachine &TM, bool EmitUniqueSection,
unsigned Flags, unsigned *NextUniqueID) {
unsigned EntrySize = 0;
if (Kind.isMergeableCString()) {
if (Kind.isMergeable2ByteCString()) {
EntrySize = 2;
} else if (Kind.isMergeable4ByteCString()) {
EntrySize = 4;
} else {
EntrySize = 1;
assert(Kind.isMergeable1ByteCString() && "unknown string width");
}
} else if (Kind.isMergeableConst()) {
if (Kind.isMergeableConst4()) {
EntrySize = 4;
} else if (Kind.isMergeableConst8()) {
EntrySize = 8;
} else if (Kind.isMergeableConst16()) {
EntrySize = 16;
} else {
assert(Kind.isMergeableConst32() && "unknown data width");
EntrySize = 32;
}
}
StringRef Group = "";
if (const Comdat *C = getELFComdat(GO)) {
Flags |= ELF::SHF_GROUP;
Group = C->getName();
}
bool UniqueSectionNames = TM.getUniqueSectionNames();
SmallString<128> Name;
if (Kind.isMergeableCString()) {
// We also need alignment here.
// FIXME: this is getting the alignment of the character, not the
// alignment of the global!
unsigned Align = GO->getParent()->getDataLayout().getPreferredAlignment(
cast<GlobalVariable>(GO));
std::string SizeSpec = ".rodata.str" + utostr(EntrySize) + ".";
Name = SizeSpec + utostr(Align);
} else if (Kind.isMergeableConst()) {
Name = ".rodata.cst";
Name += utostr(EntrySize);
} else {
Name = getSectionPrefixForGlobal(Kind);
}
if (const auto *F = dyn_cast<Function>(GO)) {
const auto &OptionalPrefix = F->getSectionPrefix();
if (OptionalPrefix)
Name += *OptionalPrefix;
}
if (EmitUniqueSection && UniqueSectionNames) {
Name.push_back('.');
TM.getNameWithPrefix(Name, GO, Mang, true);
}
unsigned UniqueID = MCContext::GenericSectionID;
if (EmitUniqueSection && !UniqueSectionNames) {
UniqueID = *NextUniqueID;
(*NextUniqueID)++;
}
// Use 0 as the unique ID for execute-only text
if (Kind.isExecuteOnly())
UniqueID = 0;
return Ctx.getELFSection(Name, getELFSectionType(Name, Kind), Flags,
EntrySize, Group, UniqueID);
}
MCSection *TargetLoweringObjectFileELF::SelectSectionForGlobal(
const GlobalObject *GO, SectionKind Kind, const TargetMachine &TM) const {
unsigned Flags = getELFSectionFlags(Kind);
// If we have -ffunction-section or -fdata-section then we should emit the
// global value to a uniqued section specifically for it.
bool EmitUniqueSection = false;
if (!(Flags & ELF::SHF_MERGE) && !Kind.isCommon()) {
if (Kind.isText())
EmitUniqueSection = TM.getFunctionSections();
else
EmitUniqueSection = TM.getDataSections();
}
EmitUniqueSection |= GO->hasComdat();
return selectELFSectionForGlobal(getContext(), GO, Kind, getMangler(), TM,
EmitUniqueSection, Flags, &NextUniqueID);
}
MCSection *TargetLoweringObjectFileELF::getSectionForJumpTable(
const Function &F, const TargetMachine &TM) const {
// If the function can be removed, produce a unique section so that
// the table doesn't prevent the removal.
const Comdat *C = F.getComdat();
bool EmitUniqueSection = TM.getFunctionSections() || C;
if (!EmitUniqueSection)
return ReadOnlySection;
return selectELFSectionForGlobal(getContext(), &F, SectionKind::getReadOnly(),
getMangler(), TM, EmitUniqueSection, ELF::SHF_ALLOC,
&NextUniqueID);
}
bool TargetLoweringObjectFileELF::shouldPutJumpTableInFunctionSection(
bool UsesLabelDifference, const Function &F) const {
// We can always create relative relocations, so use another section
// that can be marked non-executable.
return false;
}
/// Given a mergeable constant with the specified size and relocation
/// information, return a section that it should be placed in.
MCSection *TargetLoweringObjectFileELF::getSectionForConstant(
const DataLayout &DL, SectionKind Kind, const Constant *C,
unsigned &Align) const {
if (Kind.isMergeableConst4() && MergeableConst4Section)
return MergeableConst4Section;
if (Kind.isMergeableConst8() && MergeableConst8Section)
return MergeableConst8Section;
if (Kind.isMergeableConst16() && MergeableConst16Section)
return MergeableConst16Section;
if (Kind.isMergeableConst32() && MergeableConst32Section)
return MergeableConst32Section;
if (Kind.isReadOnly())
return ReadOnlySection;
assert(Kind.isReadOnlyWithRel() && "Unknown section kind");
return DataRelROSection;
}
static MCSectionELF *getStaticStructorSection(MCContext &Ctx, bool UseInitArray,
bool IsCtor, unsigned Priority,
const MCSymbol *KeySym) {
std::string Name;
unsigned Type;
unsigned Flags = ELF::SHF_ALLOC | ELF::SHF_WRITE;
StringRef COMDAT = KeySym ? KeySym->getName() : "";
if (KeySym)
Flags |= ELF::SHF_GROUP;
if (UseInitArray) {
if (IsCtor) {
Type = ELF::SHT_INIT_ARRAY;
Name = ".init_array";
} else {
Type = ELF::SHT_FINI_ARRAY;
Name = ".fini_array";
}
if (Priority != 65535) {
Name += '.';
Name += utostr(Priority);
}
} else {
// The default scheme is .ctor / .dtor, so we have to invert the priority
// numbering.
if (IsCtor)
Name = ".ctors";
else
Name = ".dtors";
if (Priority != 65535) {
Name += '.';
Name += utostr(65535 - Priority);
}
Type = ELF::SHT_PROGBITS;
}
return Ctx.getELFSection(Name, Type, Flags, 0, COMDAT);
}
MCSection *TargetLoweringObjectFileELF::getStaticCtorSection(
unsigned Priority, const MCSymbol *KeySym) const {
return getStaticStructorSection(getContext(), UseInitArray, true, Priority,
KeySym);
}
MCSection *TargetLoweringObjectFileELF::getStaticDtorSection(
unsigned Priority, const MCSymbol *KeySym) const {
return getStaticStructorSection(getContext(), UseInitArray, false, Priority,
KeySym);
}
const MCExpr *TargetLoweringObjectFileELF::lowerRelativeReference(
const GlobalValue *LHS, const GlobalValue *RHS,
const TargetMachine &TM) const {
// We may only use a PLT-relative relocation to refer to unnamed_addr
// functions.
if (!LHS->hasGlobalUnnamedAddr() || !LHS->getValueType()->isFunctionTy())
return nullptr;
// Basic sanity checks.
if (LHS->getType()->getPointerAddressSpace() != 0 ||
RHS->getType()->getPointerAddressSpace() != 0 || LHS->isThreadLocal() ||
RHS->isThreadLocal())
return nullptr;
return MCBinaryExpr::createSub(
MCSymbolRefExpr::create(TM.getSymbol(LHS), PLTRelativeVariantKind,
getContext()),
MCSymbolRefExpr::create(TM.getSymbol(RHS), getContext()), getContext());
}
void
TargetLoweringObjectFileELF::InitializeELF(bool UseInitArray_) {
UseInitArray = UseInitArray_;
MCContext &Ctx = getContext();
if (!UseInitArray) {
StaticCtorSection = Ctx.getELFSection(".ctors", ELF::SHT_PROGBITS,
ELF::SHF_ALLOC | ELF::SHF_WRITE);
StaticDtorSection = Ctx.getELFSection(".dtors", ELF::SHT_PROGBITS,
ELF::SHF_ALLOC | ELF::SHF_WRITE);
return;
}
StaticCtorSection = Ctx.getELFSection(".init_array", ELF::SHT_INIT_ARRAY,
ELF::SHF_WRITE | ELF::SHF_ALLOC);
StaticDtorSection = Ctx.getELFSection(".fini_array", ELF::SHT_FINI_ARRAY,
ELF::SHF_WRITE | ELF::SHF_ALLOC);
}
//===----------------------------------------------------------------------===//
// MachO
//===----------------------------------------------------------------------===//
TargetLoweringObjectFileMachO::TargetLoweringObjectFileMachO()
: TargetLoweringObjectFile() {
SupportIndirectSymViaGOTPCRel = true;
}
void TargetLoweringObjectFileMachO::Initialize(MCContext &Ctx,
const TargetMachine &TM) {
TargetLoweringObjectFile::Initialize(Ctx, TM);
if (TM.getRelocationModel() == Reloc::Static) {
StaticCtorSection = Ctx.getMachOSection("__TEXT", "__constructor", 0,
SectionKind::getData());
StaticDtorSection = Ctx.getMachOSection("__TEXT", "__destructor", 0,
SectionKind::getData());
} else {
StaticCtorSection = Ctx.getMachOSection("__DATA", "__mod_init_func",
MachO::S_MOD_INIT_FUNC_POINTERS,
SectionKind::getData());
StaticDtorSection = Ctx.getMachOSection("__DATA", "__mod_term_func",
MachO::S_MOD_TERM_FUNC_POINTERS,
SectionKind::getData());
}
}
/// emitModuleFlags - Perform code emission for module flags.
void TargetLoweringObjectFileMachO::emitModuleFlags(
MCStreamer &Streamer, ArrayRef<Module::ModuleFlagEntry> ModuleFlags,
const TargetMachine &TM) const {
unsigned VersionVal = 0;
unsigned ImageInfoFlags = 0;
MDNode *LinkerOptions = nullptr;
StringRef SectionVal;
for (const auto &MFE : ModuleFlags) {
// Ignore flags with 'Require' behavior.
if (MFE.Behavior == Module::Require)
continue;
StringRef Key = MFE.Key->getString();
Metadata *Val = MFE.Val;
if (Key == "Objective-C Image Info Version") {
VersionVal = mdconst::extract<ConstantInt>(Val)->getZExtValue();
} else if (Key == "Objective-C Garbage Collection" ||
Key == "Objective-C GC Only" ||
Key == "Objective-C Is Simulated" ||
Key == "Objective-C Class Properties" ||
Key == "Objective-C Image Swift Version") {
ImageInfoFlags |= mdconst::extract<ConstantInt>(Val)->getZExtValue();
} else if (Key == "Objective-C Image Info Section") {
SectionVal = cast<MDString>(Val)->getString();
} else if (Key == "Linker Options") {
LinkerOptions = cast<MDNode>(Val);
}
}
// Emit the linker options if present.
if (LinkerOptions) {
for (const auto &Option : LinkerOptions->operands()) {
SmallVector<std::string, 4> StrOptions;
for (const auto &Piece : cast<MDNode>(Option)->operands())
StrOptions.push_back(cast<MDString>(Piece)->getString());
Streamer.EmitLinkerOptions(StrOptions);
}
}
// The section is mandatory. If we don't have it, then we don't have GC info.
if (SectionVal.empty()) return;
StringRef Segment, Section;
unsigned TAA = 0, StubSize = 0;
bool TAAParsed;
std::string ErrorCode =
MCSectionMachO::ParseSectionSpecifier(SectionVal, Segment, Section,
TAA, TAAParsed, StubSize);
if (!ErrorCode.empty())
// If invalid, report the error with report_fatal_error.
report_fatal_error("Invalid section specifier '" + Section + "': " +
ErrorCode + ".");
// Get the section.
MCSectionMachO *S = getContext().getMachOSection(
Segment, Section, TAA, StubSize, SectionKind::getData());
Streamer.SwitchSection(S);
Streamer.EmitLabel(getContext().
getOrCreateSymbol(StringRef("L_OBJC_IMAGE_INFO")));
Streamer.EmitIntValue(VersionVal, 4);
Streamer.EmitIntValue(ImageInfoFlags, 4);
Streamer.AddBlankLine();
}
static void checkMachOComdat(const GlobalValue *GV) {
const Comdat *C = GV->getComdat();
if (!C)
return;
report_fatal_error("MachO doesn't support COMDATs, '" + C->getName() +
"' cannot be lowered.");
}
MCSection *TargetLoweringObjectFileMachO::getExplicitSectionGlobal(
const GlobalObject *GO, SectionKind Kind, const TargetMachine &TM) const {
// Parse the section specifier and create it if valid.
StringRef Segment, Section;
unsigned TAA = 0, StubSize = 0;
bool TAAParsed;
checkMachOComdat(GO);
std::string ErrorCode =
MCSectionMachO::ParseSectionSpecifier(GO->getSection(), Segment, Section,
TAA, TAAParsed, StubSize);
if (!ErrorCode.empty()) {
// If invalid, report the error with report_fatal_error.
report_fatal_error("Global variable '" + GO->getName() +
"' has an invalid section specifier '" +
GO->getSection() + "': " + ErrorCode + ".");
}
// Get the section.
MCSectionMachO *S =
getContext().getMachOSection(Segment, Section, TAA, StubSize, Kind);
// If TAA wasn't set by ParseSectionSpecifier() above,
// use the value returned by getMachOSection() as a default.
if (!TAAParsed)
TAA = S->getTypeAndAttributes();
// Okay, now that we got the section, verify that the TAA & StubSize agree.
// If the user declared multiple globals with different section flags, we need
// to reject it here.
if (S->getTypeAndAttributes() != TAA || S->getStubSize() != StubSize) {
// If invalid, report the error with report_fatal_error.
report_fatal_error("Global variable '" + GO->getName() +
"' section type or attributes does not match previous"
" section specifier");
}
return S;
}
MCSection *TargetLoweringObjectFileMachO::SelectSectionForGlobal(
const GlobalObject *GO, SectionKind Kind, const TargetMachine &TM) const {
checkMachOComdat(GO);
// Handle thread local data.
if (Kind.isThreadBSS()) return TLSBSSSection;
if (Kind.isThreadData()) return TLSDataSection;
if (Kind.isText())
return GO->isWeakForLinker() ? TextCoalSection : TextSection;
// If this is weak/linkonce, put this in a coalescable section, either in text
// or data depending on if it is writable.
if (GO->isWeakForLinker()) {
if (Kind.isReadOnly())
return ConstTextCoalSection;
return DataCoalSection;
}
// FIXME: Alignment check should be handled by section classifier.
if (Kind.isMergeable1ByteCString() &&
GO->getParent()->getDataLayout().getPreferredAlignment(
cast<GlobalVariable>(GO)) < 32)
return CStringSection;
// Do not put 16-bit arrays in the UString section if they have an
// externally visible label, this runs into issues with certain linker
// versions.
if (Kind.isMergeable2ByteCString() && !GO->hasExternalLinkage() &&
GO->getParent()->getDataLayout().getPreferredAlignment(
cast<GlobalVariable>(GO)) < 32)
return UStringSection;
// With MachO only variables whose corresponding symbol starts with 'l' or
// 'L' can be merged, so we only try merging GVs with private linkage.
if (GO->hasPrivateLinkage() && Kind.isMergeableConst()) {
if (Kind.isMergeableConst4())
return FourByteConstantSection;
if (Kind.isMergeableConst8())
return EightByteConstantSection;
if (Kind.isMergeableConst16())
return SixteenByteConstantSection;
}
// Otherwise, if it is readonly, but not something we can specially optimize,
// just drop it in .const.
if (Kind.isReadOnly())
return ReadOnlySection;
// If this is marked const, put it into a const section. But if the dynamic
// linker needs to write to it, put it in the data segment.
if (Kind.isReadOnlyWithRel())
return ConstDataSection;
// Put zero initialized globals with strong external linkage in the
// DATA, __common section with the .zerofill directive.
if (Kind.isBSSExtern())
return DataCommonSection;
// Put zero initialized globals with local linkage in __DATA,__bss directive
// with the .zerofill directive (aka .lcomm).
if (Kind.isBSSLocal())
return DataBSSSection;
// Otherwise, just drop the variable in the normal data section.
return DataSection;
}
MCSection *TargetLoweringObjectFileMachO::getSectionForConstant(
const DataLayout &DL, SectionKind Kind, const Constant *C,
unsigned &Align) const {
// If this constant requires a relocation, we have to put it in the data
// segment, not in the text segment.
if (Kind.isData() || Kind.isReadOnlyWithRel())
return ConstDataSection;
if (Kind.isMergeableConst4())
return FourByteConstantSection;
if (Kind.isMergeableConst8())
return EightByteConstantSection;
if (Kind.isMergeableConst16())
return SixteenByteConstantSection;
return ReadOnlySection; // .const
}
const MCExpr *TargetLoweringObjectFileMachO::getTTypeGlobalReference(
const GlobalValue *GV, unsigned Encoding, const TargetMachine &TM,
MachineModuleInfo *MMI, MCStreamer &Streamer) const {
// The mach-o version of this method defaults to returning a stub reference.
if (Encoding & DW_EH_PE_indirect) {
MachineModuleInfoMachO &MachOMMI =
MMI->getObjFileInfo<MachineModuleInfoMachO>();
MCSymbol *SSym = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr", TM);
// Add information about the stub reference to MachOMMI so that the stub
// gets emitted by the asmprinter.
MachineModuleInfoImpl::StubValueTy &StubSym = MachOMMI.getGVStubEntry(SSym);
if (!StubSym.getPointer()) {
MCSymbol *Sym = TM.getSymbol(GV);
StubSym = MachineModuleInfoImpl::StubValueTy(Sym, !GV->hasLocalLinkage());
}
return TargetLoweringObjectFile::
getTTypeReference(MCSymbolRefExpr::create(SSym, getContext()),
Encoding & ~dwarf::DW_EH_PE_indirect, Streamer);
}
return TargetLoweringObjectFile::getTTypeGlobalReference(GV, Encoding, TM,
MMI, Streamer);
}
MCSymbol *TargetLoweringObjectFileMachO::getCFIPersonalitySymbol(
const GlobalValue *GV, const TargetMachine &TM,
MachineModuleInfo *MMI) const {
// The mach-o version of this method defaults to returning a stub reference.
MachineModuleInfoMachO &MachOMMI =
MMI->getObjFileInfo<MachineModuleInfoMachO>();
MCSymbol *SSym = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr", TM);
// Add information about the stub reference to MachOMMI so that the stub
// gets emitted by the asmprinter.
MachineModuleInfoImpl::StubValueTy &StubSym = MachOMMI.getGVStubEntry(SSym);
if (!StubSym.getPointer()) {
MCSymbol *Sym = TM.getSymbol(GV);
StubSym = MachineModuleInfoImpl::StubValueTy(Sym, !GV->hasLocalLinkage());
}
return SSym;
}
const MCExpr *TargetLoweringObjectFileMachO::getIndirectSymViaGOTPCRel(
const MCSymbol *Sym, const MCValue &MV, int64_t Offset,
MachineModuleInfo *MMI, MCStreamer &Streamer) const {
// Although MachO 32-bit targets do not explicitly have a GOTPCREL relocation
// as 64-bit do, we replace the GOT equivalent by accessing the final symbol
// through a non_lazy_ptr stub instead. One advantage is that it allows the
// computation of deltas to final external symbols. Example:
//
// _extgotequiv:
// .long _extfoo
//
// _delta:
// .long _extgotequiv-_delta
//
// is transformed to:
//
// _delta:
// .long L_extfoo$non_lazy_ptr-(_delta+0)
//
// .section __IMPORT,__pointers,non_lazy_symbol_pointers
// L_extfoo$non_lazy_ptr:
// .indirect_symbol _extfoo
// .long 0
//
MachineModuleInfoMachO &MachOMMI =
MMI->getObjFileInfo<MachineModuleInfoMachO>();
MCContext &Ctx = getContext();
// The offset must consider the original displacement from the base symbol
// since 32-bit targets don't have a GOTPCREL to fold the PC displacement.
Offset = -MV.getConstant();
const MCSymbol *BaseSym = &MV.getSymB()->getSymbol();
// Access the final symbol via sym$non_lazy_ptr and generate the appropriated
// non_lazy_ptr stubs.
SmallString<128> Name;
StringRef Suffix = "$non_lazy_ptr";
Name += MMI->getModule()->getDataLayout().getPrivateGlobalPrefix();
Name += Sym->getName();
Name += Suffix;
MCSymbol *Stub = Ctx.getOrCreateSymbol(Name);
MachineModuleInfoImpl::StubValueTy &StubSym = MachOMMI.getGVStubEntry(Stub);
if (!StubSym.getPointer())
StubSym = MachineModuleInfoImpl::
StubValueTy(const_cast<MCSymbol *>(Sym), true /* access indirectly */);
const MCExpr *BSymExpr =
MCSymbolRefExpr::create(BaseSym, MCSymbolRefExpr::VK_None, Ctx);
const MCExpr *LHS =
MCSymbolRefExpr::create(Stub, MCSymbolRefExpr::VK_None, Ctx);
if (!Offset)
return MCBinaryExpr::createSub(LHS, BSymExpr, Ctx);
const MCExpr *RHS =
MCBinaryExpr::createAdd(BSymExpr, MCConstantExpr::create(Offset, Ctx), Ctx);
return MCBinaryExpr::createSub(LHS, RHS, Ctx);
}
static bool canUsePrivateLabel(const MCAsmInfo &AsmInfo,
const MCSection &Section) {
if (!AsmInfo.isSectionAtomizableBySymbols(Section))
return true;
// If it is not dead stripped, it is safe to use private labels.
const MCSectionMachO &SMO = cast<MCSectionMachO>(Section);
if (SMO.hasAttribute(MachO::S_ATTR_NO_DEAD_STRIP))
return true;
return false;
}
void TargetLoweringObjectFileMachO::getNameWithPrefix(
SmallVectorImpl<char> &OutName, const GlobalValue *GV,
const TargetMachine &TM) const {
bool CannotUsePrivateLabel = true;
if (auto *GO = GV->getBaseObject()) {
SectionKind GOKind = TargetLoweringObjectFile::getKindForGlobal(GO, TM);
const MCSection *TheSection = SectionForGlobal(GO, GOKind, TM);
CannotUsePrivateLabel =
!canUsePrivateLabel(*TM.getMCAsmInfo(), *TheSection);
}
getMangler().getNameWithPrefix(OutName, GV, CannotUsePrivateLabel);
}
//===----------------------------------------------------------------------===//
// COFF
//===----------------------------------------------------------------------===//
static unsigned
getCOFFSectionFlags(SectionKind K, const TargetMachine &TM) {
unsigned Flags = 0;
bool isThumb = TM.getTargetTriple().getArch() == Triple::thumb;
if (K.isMetadata())
Flags |=
COFF::IMAGE_SCN_MEM_DISCARDABLE;
else if (K.isText())
Flags |=
COFF::IMAGE_SCN_MEM_EXECUTE |
COFF::IMAGE_SCN_MEM_READ |
COFF::IMAGE_SCN_CNT_CODE |
(isThumb ? COFF::IMAGE_SCN_MEM_16BIT : (COFF::SectionCharacteristics)0);
else if (K.isBSS())
Flags |=
COFF::IMAGE_SCN_CNT_UNINITIALIZED_DATA |
COFF::IMAGE_SCN_MEM_READ |
COFF::IMAGE_SCN_MEM_WRITE;
else if (K.isThreadLocal())
Flags |=
COFF::IMAGE_SCN_CNT_INITIALIZED_DATA |
COFF::IMAGE_SCN_MEM_READ |
COFF::IMAGE_SCN_MEM_WRITE;
else if (K.isReadOnly() || K.isReadOnlyWithRel())
Flags |=
COFF::IMAGE_SCN_CNT_INITIALIZED_DATA |
COFF::IMAGE_SCN_MEM_READ;
else if (K.isWriteable())
Flags |=
COFF::IMAGE_SCN_CNT_INITIALIZED_DATA |
COFF::IMAGE_SCN_MEM_READ |
COFF::IMAGE_SCN_MEM_WRITE;
return Flags;
}
static const GlobalValue *getComdatGVForCOFF(const GlobalValue *GV) {
const Comdat *C = GV->getComdat();
assert(C && "expected GV to have a Comdat!");
StringRef ComdatGVName = C->getName();
const GlobalValue *ComdatGV = GV->getParent()->getNamedValue(ComdatGVName);
if (!ComdatGV)
report_fatal_error("Associative COMDAT symbol '" + ComdatGVName +
"' does not exist.");
if (ComdatGV->getComdat() != C)
report_fatal_error("Associative COMDAT symbol '" + ComdatGVName +
"' is not a key for its COMDAT.");
return ComdatGV;
}
static int getSelectionForCOFF(const GlobalValue *GV) {
if (const Comdat *C = GV->getComdat()) {
const GlobalValue *ComdatKey = getComdatGVForCOFF(GV);
if (const auto *GA = dyn_cast<GlobalAlias>(ComdatKey))
ComdatKey = GA->getBaseObject();
if (ComdatKey == GV) {
switch (C->getSelectionKind()) {
case Comdat::Any:
return COFF::IMAGE_COMDAT_SELECT_ANY;
case Comdat::ExactMatch:
return COFF::IMAGE_COMDAT_SELECT_EXACT_MATCH;
case Comdat::Largest:
return COFF::IMAGE_COMDAT_SELECT_LARGEST;
case Comdat::NoDuplicates:
return COFF::IMAGE_COMDAT_SELECT_NODUPLICATES;
case Comdat::SameSize:
return COFF::IMAGE_COMDAT_SELECT_SAME_SIZE;
}
} else {
return COFF::IMAGE_COMDAT_SELECT_ASSOCIATIVE;
}
}
return 0;
}
MCSection *TargetLoweringObjectFileCOFF::getExplicitSectionGlobal(
const GlobalObject *GO, SectionKind Kind, const TargetMachine &TM) const {
int Selection = 0;
unsigned Characteristics = getCOFFSectionFlags(Kind, TM);
StringRef Name = GO->getSection();
StringRef COMDATSymName = "";
if (GO->hasComdat()) {
Selection = getSelectionForCOFF(GO);
const GlobalValue *ComdatGV;
if (Selection == COFF::IMAGE_COMDAT_SELECT_ASSOCIATIVE)
ComdatGV = getComdatGVForCOFF(GO);
else
ComdatGV = GO;
if (!ComdatGV->hasPrivateLinkage()) {
MCSymbol *Sym = TM.getSymbol(ComdatGV);
COMDATSymName = Sym->getName();
Characteristics |= COFF::IMAGE_SCN_LNK_COMDAT;
} else {
Selection = 0;
}
}
return getContext().getCOFFSection(Name, Characteristics, Kind, COMDATSymName,
Selection);
}
static const char *getCOFFSectionNameForUniqueGlobal(SectionKind Kind) {
if (Kind.isText())
return ".text";
if (Kind.isBSS())
return ".bss";
if (Kind.isThreadLocal())
return ".tls$";
if (Kind.isReadOnly() || Kind.isReadOnlyWithRel())
return ".rdata";
return ".data";
}
MCSection *TargetLoweringObjectFileCOFF::SelectSectionForGlobal(
const GlobalObject *GO, SectionKind Kind, const TargetMachine &TM) const {
// If we have -ffunction-sections then we should emit the global value to a
// uniqued section specifically for it.
bool EmitUniquedSection;
if (Kind.isText())
EmitUniquedSection = TM.getFunctionSections();
else
EmitUniquedSection = TM.getDataSections();
if ((EmitUniquedSection && !Kind.isCommon()) || GO->hasComdat()) {
const char *Name = getCOFFSectionNameForUniqueGlobal(Kind);
unsigned Characteristics = getCOFFSectionFlags(Kind, TM);
Characteristics |= COFF::IMAGE_SCN_LNK_COMDAT;
int Selection = getSelectionForCOFF(GO);
if (!Selection)
Selection = COFF::IMAGE_COMDAT_SELECT_NODUPLICATES;
const GlobalValue *ComdatGV;
if (GO->hasComdat())
ComdatGV = getComdatGVForCOFF(GO);
else
ComdatGV = GO;
unsigned UniqueID = MCContext::GenericSectionID;
if (EmitUniquedSection)
UniqueID = NextUniqueID++;
if (!ComdatGV->hasPrivateLinkage()) {
MCSymbol *Sym = TM.getSymbol(ComdatGV);
StringRef COMDATSymName = Sym->getName();
return getContext().getCOFFSection(Name, Characteristics, Kind,
COMDATSymName, Selection, UniqueID);
} else {
SmallString<256> TmpData;
getMangler().getNameWithPrefix(TmpData, GO, /*CannotUsePrivateLabel=*/true);
return getContext().getCOFFSection(Name, Characteristics, Kind, TmpData,
Selection, UniqueID);
}
}
if (Kind.isText())
return TextSection;
if (Kind.isThreadLocal())
return TLSDataSection;
if (Kind.isReadOnly() || Kind.isReadOnlyWithRel())
return ReadOnlySection;
// Note: we claim that common symbols are put in BSSSection, but they are
// really emitted with the magic .comm directive, which creates a symbol table
// entry but not a section.
if (Kind.isBSS() || Kind.isCommon())
return BSSSection;
return DataSection;
}
void TargetLoweringObjectFileCOFF::getNameWithPrefix(
SmallVectorImpl<char> &OutName, const GlobalValue *GV,
const TargetMachine &TM) const {
bool CannotUsePrivateLabel = false;
if (GV->hasPrivateLinkage() &&
((isa<Function>(GV) && TM.getFunctionSections()) ||
(isa<GlobalVariable>(GV) && TM.getDataSections())))
CannotUsePrivateLabel = true;
getMangler().getNameWithPrefix(OutName, GV, CannotUsePrivateLabel);
}
MCSection *TargetLoweringObjectFileCOFF::getSectionForJumpTable(
const Function &F, const TargetMachine &TM) const {
// If the function can be removed, produce a unique section so that
// the table doesn't prevent the removal.
const Comdat *C = F.getComdat();
bool EmitUniqueSection = TM.getFunctionSections() || C;
if (!EmitUniqueSection)
return ReadOnlySection;
// FIXME: we should produce a symbol for F instead.
if (F.hasPrivateLinkage())
return ReadOnlySection;
MCSymbol *Sym = TM.getSymbol(&F);
StringRef COMDATSymName = Sym->getName();
SectionKind Kind = SectionKind::getReadOnly();
const char *Name = getCOFFSectionNameForUniqueGlobal(Kind);
unsigned Characteristics = getCOFFSectionFlags(Kind, TM);
Characteristics |= COFF::IMAGE_SCN_LNK_COMDAT;
unsigned UniqueID = NextUniqueID++;
return getContext().getCOFFSection(Name, Characteristics, Kind, COMDATSymName,
COFF::IMAGE_COMDAT_SELECT_ASSOCIATIVE, UniqueID);
}
void TargetLoweringObjectFileCOFF::emitModuleFlags(
MCStreamer &Streamer, ArrayRef<Module::ModuleFlagEntry> ModuleFlags,
const TargetMachine &TM) const {
MDNode *LinkerOptions = nullptr;
for (const auto &MFE : ModuleFlags) {
StringRef Key = MFE.Key->getString();
if (Key == "Linker Options")
LinkerOptions = cast<MDNode>(MFE.Val);
}
if (LinkerOptions) {
// Emit the linker options to the linker .drectve section. According to the
// spec, this section is a space-separated string containing flags for
// linker.
MCSection *Sec = getDrectveSection();
Streamer.SwitchSection(Sec);
for (const auto &Option : LinkerOptions->operands()) {
for (const auto &Piece : cast<MDNode>(Option)->operands()) {
// Lead with a space for consistency with our dllexport implementation.
std::string Directive(" ");
Directive.append(cast<MDString>(Piece)->getString());
Streamer.EmitBytes(Directive);
}
}
}
}
void TargetLoweringObjectFileCOFF::Initialize(MCContext &Ctx,
const TargetMachine &TM) {
TargetLoweringObjectFile::Initialize(Ctx, TM);
const Triple &T = TM.getTargetTriple();
if (T.isKnownWindowsMSVCEnvironment() || T.isWindowsItaniumEnvironment()) {
StaticCtorSection =
Ctx.getCOFFSection(".CRT$XCU", COFF::IMAGE_SCN_CNT_INITIALIZED_DATA |
COFF::IMAGE_SCN_MEM_READ,
SectionKind::getReadOnly());
StaticDtorSection =
Ctx.getCOFFSection(".CRT$XTX", COFF::IMAGE_SCN_CNT_INITIALIZED_DATA |
COFF::IMAGE_SCN_MEM_READ,
SectionKind::getReadOnly());
} else {
StaticCtorSection = Ctx.getCOFFSection(
".ctors", COFF::IMAGE_SCN_CNT_INITIALIZED_DATA |
COFF::IMAGE_SCN_MEM_READ | COFF::IMAGE_SCN_MEM_WRITE,
SectionKind::getData());
StaticDtorSection = Ctx.getCOFFSection(
".dtors", COFF::IMAGE_SCN_CNT_INITIALIZED_DATA |
COFF::IMAGE_SCN_MEM_READ | COFF::IMAGE_SCN_MEM_WRITE,
SectionKind::getData());
}
}
MCSection *TargetLoweringObjectFileCOFF::getStaticCtorSection(
unsigned Priority, const MCSymbol *KeySym) const {
return getContext().getAssociativeCOFFSection(
cast<MCSectionCOFF>(StaticCtorSection), KeySym, 0);
}
MCSection *TargetLoweringObjectFileCOFF::getStaticDtorSection(
unsigned Priority, const MCSymbol *KeySym) const {
return getContext().getAssociativeCOFFSection(
cast<MCSectionCOFF>(StaticDtorSection), KeySym, 0);
}
void TargetLoweringObjectFileCOFF::emitLinkerFlagsForGlobal(
raw_ostream &OS, const GlobalValue *GV) const {
if (!GV->hasDLLExportStorageClass() || GV->isDeclaration())
return;
const Triple &TT = getTargetTriple();
if (TT.isKnownWindowsMSVCEnvironment())
OS << " /EXPORT:";
else
OS << " -export:";
if (TT.isWindowsGNUEnvironment() || TT.isWindowsCygwinEnvironment()) {
std::string Flag;
raw_string_ostream FlagOS(Flag);
getMangler().getNameWithPrefix(FlagOS, GV, false);
FlagOS.flush();
if (Flag[0] == GV->getParent()->getDataLayout().getGlobalPrefix())
OS << Flag.substr(1);
else
OS << Flag;
} else {
getMangler().getNameWithPrefix(OS, GV, false);
}
if (!GV->getValueType()->isFunctionTy()) {
if (TT.isKnownWindowsMSVCEnvironment())
OS << ",DATA";
else
OS << ",data";
}
}
| [
"[email protected]"
] | |
e21499423991ec40ba6b66a56d443a8b913309d2 | 5c7977bf9a81574010ab3ccafd28e22d048e9d32 | /14501.cpp | aa6165092ca59c9366424d787ebc12245a7983cf | [] | no_license | PSKyun/Difficult | 0e483569faf1bd802e648278ffcf32d2bc553eab | 388c7a6694be13f299478e7fa03118801bc408b5 | refs/heads/master | 2022-11-21T13:34:37.699102 | 2020-07-17T11:25:38 | 2020-07-17T11:25:38 | 259,620,805 | 1 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 447 | cpp | #include<iostream>
#include<algorithm>
using namespace std;
int t[16], p[16], n, ans;
void go(int day, int total) {
if (day == n) {
ans = max(ans, total);
return;
}
go(day + 1, total);
if (day + t[day] <= n)
go(day + t[day], total + p[day]);
}
int main() {
cin >> n;
for (int i = 0; i < n; i++) {
cin >> t[i];
cin >> p[i];
}
go(0, 0);
cout << ans << endl;
return 0;
} | [
"[email protected]"
] | |
4e55e14c984cee4bfd003598dd50ee1f26331eb2 | d2249116413e870d8bf6cd133ae135bc52021208 | /Ultimate TCP-IP/ActiveX/utftp/FtpPropPage.cpp | e67797adcf1ddc9e11a2d7e26392c843b47cc86f | [] | no_license | Unknow-man/mfc-4 | ecbdd79cc1836767ab4b4ca72734bc4fe9f5a0b5 | b58abf9eb4c6d90ef01b9f1203b174471293dfba | refs/heads/master | 2023-02-17T18:22:09.276673 | 2021-01-20T07:46:14 | 2021-01-20T07:46:14 | null | 0 | 0 | null | null | null | null | WINDOWS-1252 | C++ | false | false | 5,737 | cpp | //=================================================================
// class: CFtpPropPagePage
// File: FtpPropPage.cpp
//
// Ftp ActiveX control property page
//
// =================================================================
// Ultimate TCP-IP v4.2
// This software along with its related components, documentation and files ("The Libraries")
// is © 1994-2007 The Code Project (1612916 Ontario Limited) and use of The Libraries is
// governed by a software license agreement ("Agreement"). Copies of the Agreement are
// available at The Code Project (www.codeproject.com), as part of the package you downloaded
// to obtain this file, or directly from our office. For a copy of the license governing
// this software, you may contact us at [email protected], or by calling 416-849-8900.
// =================================================================
#include "stdafx.h"
#include "UTFtp.h"
#include "FtpPropPage.h"
/////////////////////////////////////////////////////////////////////////////
// CFtpPropPagePage
/////////////////////////////////////////////////////////////////////////////
/***************************************************
InitializeControlsFromObject
Initialize property page controls from object data
Params
none
Return
none
****************************************************/
void CFtpPropPage::InitializeControlsFromObject()
{
LONG nTimeOut = 0;
VARIANT_BOOL bBOOL = FALSE;
BSTR bstrString = SysAllocStringLen(NULL, TMP_BUFFER_SIZE);
// Get IFtp interface of the object
IFtp *pFtp;
m_ppUnk[0]->QueryInterface(IID_IFtp, (void**)&pFtp);
// Set connection time-out
ShowError(pFtp->get_ConnectTimeOut(&nTimeOut));
SetDlgItemInt(IDC_EDITCONNECT_TO, (int)nTimeOut);
// Set blocking mode
ShowError(pFtp->get_BlockingMode(&bBOOL));
SendDlgItemMessage(IDC_BLOCKING_MODE, CB_SETCURSEL, (WPARAM)(bBOOL) ? 1 : 0);
// Set fire wall mode
ShowError(pFtp->get_FireWallMode(&bBOOL));
SendDlgItemMessage(IDC_FIRE_WALL_MODE, CB_SETCURSEL, (WPARAM)(bBOOL) ? 1 : 0);
// Set host name
ShowError(pFtp->get_HostName(&bstrString));
SetDlgItemText(IDC_HOST_NAME, _bstr_t(bstrString));
// Set account
ShowError(pFtp->get_Account(&bstrString));
SetDlgItemText(IDC_ACCOUNT, _bstr_t(bstrString));
// Set user name
ShowError(pFtp->get_UserName(&bstrString));
SetDlgItemText(IDC_USER_NAME, _bstr_t(bstrString));
// Set password
ShowError(pFtp->get_UserPassword(&bstrString));
SetDlgItemText(IDC_PASSWORD, _bstr_t(bstrString));
// Release IFtp interface
pFtp->Release();
}
/***************************************************
Apply
Apply current values from the property page to
the objects.
Params
none
Return
S_OK - success
E_FAIL - wrong data
****************************************************/
STDMETHODIMP CFtpPropPage::Apply(void)
{
HRESULT hr = S_OK;
char buffer[TMP_BUFFER_SIZE + 1];
ATLTRACE(_T("CFtpPropPage::Apply\n"));
// Cycle throuh all objects
for (UINT i = 0; i < m_nObjects; i++) {
// Get IFtp interface of the object
IFtp *pFtp;
m_ppUnk[i]->QueryInterface(IID_IFtp, (void**)&pFtp);
// If the value of property was changed - apply it from
// the property page to the object
// Connection time-out
if(m_nDirtyFlags | CONNECT_TIME_OUT) {
int nTimeOut = GetDlgItemInt(IDC_EDITCONNECT_TO);
if(ShowError(pFtp->put_ConnectTimeOut(nTimeOut)))
hr = E_FAIL;
}
// Blocking mode
if(hr == S_OK && m_nDirtyFlags | BLOCKING_MODE) {
BOOL bBlockingMode = (BOOL)SendDlgItemMessage(IDC_BLOCKING_MODE, CB_GETCURSEL);
if(ShowError(pFtp->put_BlockingMode(bBlockingMode)))
hr = E_FAIL;
}
// Fire wall mode
if(hr == S_OK && m_nDirtyFlags | FIRE_WALL_MODE) {
BOOL bFireWallMode = (BOOL)SendDlgItemMessage(IDC_FIRE_WALL_MODE, CB_GETCURSEL);
if(ShowError(pFtp->put_FireWallMode(bFireWallMode)))
hr = E_FAIL;
}
// Host name
if(m_nDirtyFlags | HOST_NAME) {
GetDlgItemText(IDC_HOST_NAME, buffer, TMP_BUFFER_SIZE);
if(ShowError(pFtp->put_HostName(_bstr_t(buffer))))
hr = E_FAIL;
}
// Account
if(m_nDirtyFlags | ACCOUNT) {
GetDlgItemText(IDC_ACCOUNT, buffer, TMP_BUFFER_SIZE);
if(ShowError(pFtp->put_Account(_bstr_t(buffer))))
hr = E_FAIL;
}
// User name
if(m_nDirtyFlags | USER_NAME) {
GetDlgItemText(IDC_USER_NAME, buffer, TMP_BUFFER_SIZE);
if(ShowError(pFtp->put_UserName(_bstr_t(buffer))))
hr = E_FAIL;
}
// Password
if(m_nDirtyFlags | PASSWORD) {
GetDlgItemText(IDC_PASSWORD, buffer, TMP_BUFFER_SIZE);
if(ShowError(pFtp->put_UserPassword(_bstr_t(buffer))))
hr = E_FAIL;
}
// Release IFtp interface
pFtp->Release();
// If there was an error - return
if(hr != S_OK) {
InitializeControlsFromObject();
return hr;
}
}
// Clear dirty flags
m_bDirty = FALSE;
m_nDirtyFlags = 0;
return S_OK;
}
/***************************************************
ShowError
Helper function for displaying error message in
case if hResult is an error
Params
hResult - error code
Return
TRUE - if there was an error
FALSE - if not
****************************************************/
BOOL CFtpPropPage::ShowError(HRESULT hResult)
{
// Check if error code failed
if FAILED(hResult) {
USES_CONVERSION;
CComPtr<IErrorInfo> pError;
CComBSTR strError;
// Get description of the error
GetErrorInfo(0, &pError);
pError->GetDescription(&strError);
// Display error message box
MessageBox(OLE2T(strError), _T("Error"), MB_ICONEXCLAMATION);
return TRUE;
}
return FALSE;
}
| [
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] | |
a11fb80646a6f035836fc4c3a2e500075946ba5a | a556761b1a42b78aa820302ea1aca0f4ef257201 | /LeetCode/Group Anagrams.cpp | 8d6311c87c1d1e89615242c840dc006d0da23df5 | [] | no_license | Gavinthisisit/Codes | c94718c9ee9b240688485cfdd206840c62d2e373 | 1574a459cc3945c06d52bf4d390ede2462984f7b | refs/heads/master | 2020-04-06T07:12:46.557599 | 2016-09-03T09:41:05 | 2016-09-03T09:48:09 | 38,690,272 | 1 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,882 | cpp | #include <iostream>
#include <vector>
#include <map>
#include <algorithm>
using namespace std;
class Solution {
public:
vector<vector<string> > groupAnagrams(vector<string>& strs) {
vector<vector<string> > retval;
if(strs.size()==0)
return retval;
map<int,vector<string> > m;
for(int i=0;i<strs.size();i++){
int tmp = 0;
for(int j=0;j<strs[i].length();j++){
int bi = 1;
tmp |= bi<<(strs[i][j]-'a');
}
if(strs[i][0]==strs[i][1] && strs[i][0] != strs[i][2]){
if(strs[i][0] > strs[i][2]){
int bi = 1;
tmp |= bi<<30;
}else{
int bi = 1;
tmp |= bi<<29;
}
}
else if(strs[i][0]==strs[i][2] && strs[i][0]!= strs[i][1]){
if(strs[i][0] > strs[i][1]){
int bi = 1;
tmp |= bi<<30;
}else{
int bi = 1;
tmp |= bi<<29;
}
}
else if(strs[i][1]==strs[i][2] && strs[i][1]!=strs[i][0]){
if(strs[i][0] < strs[i][2]){
int bi = 1;
tmp |= bi<<30;
}else{
int bi = 1;
tmp |= bi<<29;
}
}
else if(strs[i][1]==strs[i][2] && strs[i][0]==strs[i][1]){
int bi = 1;
tmp |= bi<<30;
tmp |= bi<<29;
}
if(m.find(tmp) != m.end())
m[tmp].push_back(strs[i]);
else{
vector<string> t;
t.push_back(strs[i]);
m.insert(pair<int,vector<string> >(tmp,t));
}
}
map<int,vector<string> >::iterator ite;
for(ite=m.begin();ite!=m.end();ite++){
retval.push_back(ite->second);
}
for(int i=0;i<retval.size();i++){
sort(retval[i].begin(),retval[i].end());
}
return retval;
}
};
int main(){
Solution s;
string str[] = {"too","tot"};
vector<string> vec(str,str+54);
vector<vector<string> > ret = s.groupAnagrams(vec);
for(int i=0;i<ret.size();i++){
for(int j=0;j<ret[i].size();j++){
cout<<ret[i][j]<<" ";
}
cout<<endl;
}
return 0;
}
| [
"[email protected]"
] | |
991e85904f2a3041ff1e0c137ed1fbf71ec4c4e7 | e347ec4317cba3f7fcc0c4433ef8bd986bc546f4 | /projet/DirectionalLight.h | d2fe7864425f29020167bbd021c03693ab5f304f | [] | no_license | Hyrasso/raytracing-cpp | 8283410bc424ea85aa82c8063ce04d305762d21c | 8234b1868ae598c2861275863f50fea7f7e10c9a | refs/heads/master | 2021-02-05T09:31:19.406337 | 2020-02-28T19:48:47 | 2020-02-28T19:48:47 | 243,764,724 | 1 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 292 | h | #pragma once
#include "Light.h"
class DirectionalLight :
public Light
{
public:
DirectionalLight(Vector3 direction, Colorf color);
~DirectionalLight();
Vector3 GetDirection(Vector3 point) const override;
Colorf GetColor() const override;
private:
Vector3 direction;
Colorf color;
};
| [
"[email protected]"
] | |
b7f6371ea3364fe15b70c8362c968752e4f8e0cc | 4691bce00a77cb88e4bc143efd5a5ef471bb2dec | /jsonParser/jsonParser/spriteFrame.h | b3d0d301e6f9d4fac5f4dd92825528c4c0d4fb69 | [] | no_license | appsromch/CPlusPlus | 4c9c370d8cf8c88629e27a2d9f35938a784aec04 | ebc230748ee76e6a0ad64579423a160a24797ef5 | refs/heads/master | 2021-01-17T19:26:21.213456 | 2013-10-23T10:01:00 | 2013-10-23T10:01:00 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 368 | h | #pragma once
using namespace System;
using namespace System::ComponentModel;
using namespace System::Collections;
using namespace System::Windows::Forms;
using namespace System::Data;
using namespace System::Drawing;
ref class spriteFrame
{
private:
String^ frameName;
Rectangle frame;
public:
spriteFrame(String^ startFrameName, Rectangle startFrame);
};
| [
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] | |
9b910b50546bc214f27486a2f6fe62e12e25a27a | 06bed8ad5fd60e5bba6297e9870a264bfa91a71d | /JavaQt/loconetexception.cpp | f0bfe1cb32736facd05078ad74691a6ec33012ef | [] | no_license | allenck/DecoderPro_app | 43aeb9561fe3fe9753684f7d6d76146097d78e88 | 226c7f245aeb6951528d970f773776d50ae2c1dc | refs/heads/master | 2023-05-12T07:36:18.153909 | 2023-05-10T21:17:40 | 2023-05-10T21:17:40 | 61,044,197 | 4 | 3 | null | null | null | null | UTF-8 | C++ | false | false | 434 | cpp | #include "loconetexception.h"
/**
* LocoNet-specific exception
*
* @author Bob Jacobsen Copyright (C) 2001
*/
//public class LocoNetException extends JmriException {
// serialVersionUID used by jmrix.loconet.locormi, please do not remove
///*private*/ static final long serialVersionUID = -7412254026659440390L;
/*public*/ LocoNetException::LocoNetException(QString m) : JmriException(m) {
//super(m);
}
| [
"[email protected]"
] | |
3a7037aec943ee204c66482aaec4c652ba279411 | 7b47b0cb234843a213ff64183c04309d9725555e | /fizzbuzz kata/src/fizzbuzz.cpp | c1ee525e9a24b9b2f3568956a80b5c3dded2ea49 | [] | no_license | anthaas/Unit-tests | a5b8da042798747cb850e528cf1e29fa66b68166 | 6031b2a8175b99243d38310f5f77feb29ded88e7 | refs/heads/master | 2021-05-29T02:21:38.933349 | 2015-05-27T22:41:27 | 2015-05-27T22:41:27 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 129 | cpp | #include <string>
#include "fizzbuzz.h"
using namespace std;
string FizzBuzz::Convert(int number)
{
return to_string(number);
}
| [
"[email protected]"
] | |
84e775d00c33a8070af38d143eb84a0ac5e720b4 | 615ad6ddf096a61f4552009126e0e43930eb5274 | /mcpputil/src/vector_utils.cpp | 3f4cb2a674e538f4673b081eb5868bea23c30ebf | [
"MIT"
] | permissive | garyfurnish/mcpputil | fd5169e600fd1ab35806942918ea183291608184 | 7eda34d3852515e21e76683e0884c0d3a11d1b5f | refs/heads/master | 2020-09-14T13:46:28.238462 | 2017-06-06T01:00:09 | 2017-06-06T01:00:09 | 67,393,271 | 0 | 1 | null | null | null | null | UTF-8 | C++ | false | false | 46 | cpp | #include <mcpputil/mcpputil/vector_utils.hpp>
| [
"[email protected]"
] | |
17515c6765027ec2a14f2dbd1bef2dfbf62dbf78 | ee9ae08815d2f792b6b610ec7193302d64248132 | /xr_3da/SH_Atomic.cpp | 0d9ba4ee5f12f9f0a1bb2fdbe39bbf50db1d7bc9 | [] | no_license | xrLil-Batya/Yara-SDK | e77a15ff6960b7c71cd07e628ed818c7e8c29e64 | cec683d61d9be9759108a67baf6ac90f222f006b | refs/heads/master | 2023-07-17T08:01:53.958929 | 2021-08-26T01:08:34 | 2021-08-26T01:08:34 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 441 | cpp | #include "stdafx.h"
#pragma hdrstop
#include "SH_Atomic.h"
#include "ResourceManager.h"
// Atomic
SVS::~SVS () { _RELEASE(vs); Device.Resources->_DeleteVS (this); }
SPS::~SPS () { _RELEASE(ps); Device.Resources->_DeletePS (this); }
SState::~SState () { _RELEASE(state); Device.Resources->_DeleteState (this); }
SDeclaration::~SDeclaration () { _RELEASE(dcl); Device.Resources->_DeleteDecl (this); }
| [
"[email protected]"
] | |
3bc3a9dd3a42b9bb43c7905548ddea3aaf72d60d | 9ab8fd3506a9205bd01f4125bc2feb8364d305b3 | /Classes/HelloWorldScene.cpp | ff3835b7cc27e75d9240ceefabc5a2a58812b9e3 | [] | no_license | huji0624/Tapdiff | 2cdb0500b81edeac2ad8cb3767352c5b9690c3fb | be6342db54127715ad7a3dc63ee5c340248f8924 | refs/heads/master | 2021-01-23T16:27:10.775166 | 2014-12-31T07:58:27 | 2014-12-31T07:58:27 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 3,018 | cpp | #include "HelloWorldScene.h"
#include "PlayScene.h"
#include "ThirdPartyHelper.h"
#include "UIButton.h"
#include "DeveloperInfoScence.h"
#include "LHLeaderBoard.h"
#include "UILayout.h"
#include "LHShareButton.h"
#include "UIText.h"
#include "LocalizedString.h"
#include "LHMacros.h"
USING_NS_CC;
USING_NS_UM_SOCIAL;
Scene* HelloWorld::createScene()
{
// 'scene' is an autorelease object
auto scene = Scene::create();
// 'layer' is an autorelease object
auto layer = HelloWorld::create();
layer->initWithColor(Color4B::WHITE);
// add layer as a child to scene
scene->addChild(layer);
// return the scene
return scene;
}
// on "init" you need to initialize your instance
bool HelloWorld::init()
{
//////////////////////////////
// 1. super init first
if ( !Layer::init() )
{
return false;
}
Size visibleSize = Director::getInstance()->getVisibleSize();
Vec2 origin = Director::getInstance()->getVisibleOrigin();
// auto bg = Sprite::createWithSpriteFrameName("bg.png");
// bg->setPosition(Vec2(visibleSize.width/2 + origin.x, visibleSize.height/2 + origin.y));
// this->addChild(bg);
// auto panel = Sprite::create("panel.png");
// panel->setPosition(bg->getPosition());
// panel->setScaleX(1.5);
// panel->setScaleY(2);
// this->addChild(panel);
float margin = 40.0f;
auto appname = cocos2d::ui::Text::create(LHLocalizedCString("appname"), Common_Font, 120);
appname->setColor(Color3B::BLACK);
appname->setPosition(Vec2(visibleSize.width/2 + origin.x, visibleSize.height/2 + appname->getContentSize().height/2 + margin + origin.y));
this->addChild(appname);
auto play = ui::Button::create("play.png");
play->setPosition(Vec2(visibleSize.width/2 + origin.x, visibleSize.height/2 - play->getContentSize().height/2 - margin + origin.y));
play->addTouchEventListener([](Ref *ps,ui::Widget::TouchEventType type){
if (type == ui::Widget::TouchEventType::ENDED) {
Director::getInstance()->replaceScene(PlayScene::createScene(nullptr));
}
});
this->addChild(play);
auto debt = DeveloperInfo::DevInfoButton("devinfo.png");
debt->setPosition(Vec2(appname->getPositionX() + appname->getContentSize().width/2 + 40, appname->getPositionY() + appname->getContentSize().height/2 + 20));
this->addChild(debt);
auto leader = LHLeaderBoard::defaultButton("lb.png");
leader->setPosition(Vec2(visibleSize.width/3*2 + origin.x, visibleSize.height/4 + origin.y));
this->addChild(leader);
auto goReview = ui::Button::create("goreview.png");
goReview->setPosition(Vec2(visibleSize.width/3 + origin.x, visibleSize.height/4 + origin.y));
goReview->addTouchEventListener([](Ref *ps,ui::Widget::TouchEventType type){
if (type == ui::Widget::TouchEventType::ENDED) {
ThirdPartyHelper::goReview();
}
});
this->addChild(goReview);
return true;
}
| [
"[email protected]"
] | |
6ffe3efc809efb39c819634c0a9c378689640ba1 | 1f9fba78b57f7abda0261ae346822397f30d6369 | /plots/origin/scripts/truth_label_d0_origin.cpp | 81d54c9090be6e35452429d085a715ba11b7bd49 | [] | no_license | martinosal/root_selector | 6ebf36bed8934db8ae914ee35b0405ab2266afbd | a9340c05cb2616d6d5e6298ee433e97ae65052fd | refs/heads/master | 2023-03-31T02:16:38.565721 | 2021-03-12T17:07:34 | 2021-03-12T17:07:34 | 248,818,740 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,746 | cpp | /*
root [1] .L ../plots/origin/scripts/truth_label_d0_origin.cpp
root [2] derivedtruthlabel("trk_origin_truth_label_B",_file0)
*/
void jet_composition(TFile* fData=_file0){
TCanvas c("c", "canvas", 1300, 900);
gStyle->SetOptStat(0);
trk_pT_jet_DR_B->GetYaxis()->SetRangeUser(0, 0.7);
trk_pT_jet_DR_B->GetXaxis()->SetRangeUser(0, 300.);
trk_pT_jet_DR_B->Draw("COLZ");
c.SaveAs("/home/salomon/Private/atlas/FTPF/Selector/plots/origin/trk_pT_jet_DR_B.pdf");
}
void jet_truthlabel_composition(std::string hist, TFile* fData=_file0){
TH2F* h = (TH2F*)fData->Get(hist.c_str());//truth label origin
const Int_t nbins_x = h->GetNbinsX();
const Int_t nbins_y= h->GetNbinsY();
const TAxis *axis_x=h->GetXaxis();
const Int_t x_min=axis_x->GetXmin(); // should be -1 relative to i = 1;
std::vector<int> truthlabel={0,1,2,3,4,5,6,11,12,13,14,15,16,101,102,103,104,105,106,111,112,113,114,115,116};//25 categories
std::vector<int> derived_truthlabel={0,1,2,3,4,5};
std::vector<int> map_0={0};
std::vector<int> map_1={2,4,6};
std::vector<int> map_2={12,14,16,102,104,106,112,114,116};
std::vector<int> map_3={1,11,101,111};
std::vector<int> map_4={3,5};
std::vector<int> map_5={13,103,113,15,105,115};
std::vector<std::vector<int>> list;
list.push_back(map_0);
list.push_back(map_1);
list.push_back(map_2);
list.push_back(map_3);
list.push_back(map_4);
list.push_back(map_5);
int y=0;
for(int i=0;i<list.size();i++){
y=0;
for(std::vector<int>::iterator it = list.at(i).begin(); it != list.at(i).end(); ++it){
for(int k=0;k<nbins_y;k++){
y+=h->GetBinContent(k,*it+2);
}
}
std::cout<<"derived truth label "<<i<<":\t"<<y<<"\n";
}
}
| [
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] | |
536b3e3979a8878b25ac9f0d4a74efeb9294bec0 | 8ed51ff85b2f0da2d4fa301ee27dd388a326a316 | /DesignPatternsApplication/DesignPatternsApplication/Circle.hpp | c2e7b7e71c4dce3a76156ba01eaf116df8ffd1f2 | [] | no_license | software-architects/designpatternscpp | 5534d571a7b458217114a9168847e0bbc9d73de3 | f1028644e1dd1e09b5d1138bf17428bd28411e96 | refs/heads/master | 2021-01-10T03:33:29.677958 | 2015-11-17T16:35:15 | 2015-11-17T16:35:15 | 46,360,317 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 428 | hpp | #pragma once
#include "Shape.hpp"
#include "AbstractShapeVisitor.hpp"
#include "vec2.h"
class Circle : public Shape
{
public:
Circle() {};
Circle(vec2f position, float radius) :
position(position), radius(radius) {};
virtual ~Circle();
vec2f position;
float radius;
virtual float calculateArea() const override;
virtual void draw() const override;
virtual void accept(AbstractShapeVisitor& visitor) override;
};
| [
"[email protected]"
] | |
241716187a37b14ae4feb97eecc773f9a6ecc67c | 24e804a369d507b177cd6ba44d44b2278f1bbd97 | /Trabalho 3/Huffman.cpp | 106d4e97436bcb43c996a4196eec887978bc589c | [] | no_license | techmarktm/trabalhoED2 | e9fadb4d47177a7ac32a23768da87fe46e21aee4 | 6be60f3e070fc58f4becc30c4fe017dfb08bd443 | refs/heads/master | 2021-08-23T09:10:30.444280 | 2017-12-04T12:46:53 | 2017-12-04T12:46:53 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 5,953 | cpp | /*---------------------------------------
TRABALHO DE ESTRUTURA DE DADOS 2
GRUPO:
Bruno Carvalho
Diogo Destefano
Rafael Terra
Pedro Bellotti
--------------------------------------*/
#include "Huffman.h"
/*Construtor*/
Huffman::Huffman()
{
priLista = NULL;
ultLista = NULL;
tempoGasto = 0.0;
}
/*Destrutor*/
Huffman::~Huffman()
{
deletaNo(priLista);
}
/*
FUNCAO DELETANO
Entrada: Primeiro No da lista
Saida: Todos os Nos deletados
Obs: Funcao auxiliar do destrutor
*/
void Huffman::deletaNo(NoH* n)
{
if (n != NULL)
{
deletaNo(n->getDir());
deletaNo(n->getEsq());
delete n;
}
}
/*
FUNCAO GETTEMPOGASTO
Entrada: -
Saida: Tempo gasto na codificacao da string
*/
double Huffman::getTempoGasto()
{
return tempoGasto;
}
/*
FUNCAO INSERE
Entrada: O caracter a ser inserido e a frequencia
Saida: O caracter inserido ao final da lista ou a sua frequencia aumentada caso o mesmo ja exista na lista
*/
void Huffman::insere(char c, int f)
{
if (priLista == NULL)
{
priLista = new NoH();
priLista->setChar(c);
priLista->setFreq(f);
ultLista = priLista;
}
else
{
/*Caminha na lista ate achar o caractere*/
NoH *aux = priLista;
while (aux != NULL && aux->getChar() != c)
aux = aux->getProx();
/*Verifica se o caractere foi encontrado ou nao
Se foi encontrado, apenas aumenta a frequencia
Se nao, cria um novo No e adiciona no final da lista*/
if (aux != NULL)
aux->setFreq(aux->getFreq() + f);
else
{
ultLista->setProx(new NoH());
ultLista = ultLista->getProx();
ultLista->setChar(c);
ultLista->setFreq(f);
}
}
}
/*
FUNCAO SALVABINARIO
Entrada: Nome do arquivo e string a ser salva
Saida: Arquivo TXT criado com a string salva bit por bit
*/
void Huffman::salvaBinario(string nomeArquivo, string salvar)
{
string oitoBits;
string umBit;
ofstream saida(nomeArquivo);
for (int i = 0; i < salvar.length(); i += 8)
{
oitoBits = salvar.substr(i, 8); //Pega a string a cada 8 bits
umBit = bitset<1>(oitoBits).to_string(); //Converte os 8 bits para 1
saida << umBit; //Salva o numero na saida
}
saida.close();
}
/*
FUNCAO GETMENOR
Entrada: -
Saida: O No de menor frequencia da lista
*/
NoH* Huffman::getMenor()
{
NoH *aux = priLista;
NoH *menor = priLista;
/*Verifica se a lista possui apenas um elemento.
Se sim, ele mesmo sera o menor e entao sera retirado da lista e retornado
Se nao, caminha na lista ate achar o menor e realiza o mesmo processo
*/
if (aux->getProx() == NULL)
{
removeLista(aux);
return aux;
}
else
{
while (aux != NULL)
{
if (aux->getFreq() < menor->getFreq())
menor = aux;
aux = aux->getProx();
}
}
if (menor != NULL)
{
removeLista(menor);
}
return menor;
}
/*
FUNCAO CRIAARVORE
Entrada: -
Saida: Arvore de Huffman construida
*/
void Huffman::criaArvore()
{
NoH *aux = NULL;
/* Cria Nos de Huffman de acordo com a seguintes caracteristicas:
Filho a esquerda eh o No com menor frequencia
Filho a direita eh o No com a segunda menor frequencia
A frequencia do No pai eh a frequencia de seus dois filhos*/
while (priLista != NULL)
{
aux = new NoH();
aux->setEsq(getMenor());
aux->setDir(getMenor());
aux->setFreq(aux->getDir()->getFreq() + aux->getEsq()->getFreq());
ultLista->setProx(aux);
ultLista = aux;
}
priLista = aux;
}
/*
FUNCAO REMOVELISTA
Entrada: No a ser retirado
Saida: Lista sem o No
*/
void Huffman::removeLista(NoH *n)
{
NoH* aux = priLista;
/*Verifica se o No a ser retirado eh o primeiro da lista
Se sim, retira o mesmo da lista e atualiza
Se nao, percorre a lista e faz o mesmo processo*/
if (n == aux)
priLista = aux->getProx();
else
{
while (aux->getProx() != n)
aux = aux->getProx();
aux->setProx(n->getProx());
if (n->getProx() == NULL)
ultLista = aux;
}
}
/*
FUNCAO GERACODIGOSTRING
Entrada: String para gerar o codigo
Saida: Codigos presentes na arvore que formam a string
*/
string Huffman::geraCodigoString(string s)
{
string *codigo = new string;
string::iterator it = s.begin();
while (it != s.end())
{
if (*it >= 97 && *it <= 122)
{
*codigo += codigos[*it - 97];
}
it++;
}
return *codigo;
}
/*
FUNCAO GERACODIGO
Entrada: String a ser codificada e No da lista
Saida: Tabela de codigos
*/
void Huffman::geraCodigo(string s, NoH *n)
{
if (n != NULL)
{
if (n->getChar() != -1)
{
if (n->getChar() >= 97 && n->getChar() <= 122)
{
codigos[n->getChar() - 97] = s;
}
}
else
{
/*Coloca 1 para os Nos a direita e 0 para os nos a esquerda*/
if (n->getDir() != NULL)
{
s.push_back('1');
geraCodigo(s, n->getDir());
s.erase(s.end() - 1);
}
if (n->getEsq() != NULL)
{
s.push_back('0');
geraCodigo(s, n->getEsq());
s.erase(s.end() - 1);
}
}
}
}
/*
FUNCAO CODIFICA
Entrada: String a ser codificada
Saida: Codigo da string e tabela de frequencias
*/
string Huffman::codifica(string s)
{
clock_t relogio;
relogio = clock();
/*Codifica uma unica string (Huffman estatico)*/
string codigo;
if (priLista == NULL)
{
/*Insere os caracteres da string na tabela de frequencias*/
string::iterator it;
it = s.begin();
while (it != s.end())
{
insere(*it, 1);
it++;
}
criaArvore(); //Cria a arvore
geraCodigo(codigo, priLista); //Gera os codigos da arvore
tempoGasto += (clock() - relogio) / (double)CLOCKS_PER_SEC;
return geraCodigoString(s); //Gera o codigo da string
}
else
cout << "ERRO - Tabela de frequencias ja existe!" << endl;
tempoGasto += (clock() - relogio) / (double)CLOCKS_PER_SEC;
return codigo;
} | [
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] | |
e6b64c7624192b54c3f24b2d1c8aa92986fd0d67 | 3cf9e141cc8fee9d490224741297d3eca3f5feff | /C++ Benchmark Programs/Benchmark Files 1/classtester/autogen-sources/source-9201.cpp | 4be3bc2621b1f1fc25788d8af52de7556845e516 | [] | no_license | TeamVault/tauCFI | e0ac60b8106fc1bb9874adc515fc01672b775123 | e677d8cc7acd0b1dd0ac0212ff8362fcd4178c10 | refs/heads/master | 2023-05-30T20:57:13.450360 | 2021-06-14T09:10:24 | 2021-06-14T09:10:24 | 154,563,655 | 0 | 1 | null | null | null | null | UTF-8 | C++ | false | false | 2,773 | cpp | struct c0;
void __attribute__ ((noinline)) tester0(c0* p);
struct c0
{
bool active0;
c0() : active0(true) {}
virtual ~c0()
{
tester0(this);
active0 = false;
}
virtual void f0(){}
};
void __attribute__ ((noinline)) tester0(c0* p)
{
p->f0();
}
struct c1;
void __attribute__ ((noinline)) tester1(c1* p);
struct c1
{
bool active1;
c1() : active1(true) {}
virtual ~c1()
{
tester1(this);
active1 = false;
}
virtual void f1(){}
};
void __attribute__ ((noinline)) tester1(c1* p)
{
p->f1();
}
struct c2;
void __attribute__ ((noinline)) tester2(c2* p);
struct c2 : c1
{
bool active2;
c2() : active2(true) {}
virtual ~c2()
{
tester2(this);
c1 *p1_0 = (c1*)(c2*)(this);
tester1(p1_0);
active2 = false;
}
virtual void f2(){}
};
void __attribute__ ((noinline)) tester2(c2* p)
{
p->f2();
if (p->active1)
p->f1();
}
struct c3;
void __attribute__ ((noinline)) tester3(c3* p);
struct c3 : virtual c0, virtual c1
{
bool active3;
c3() : active3(true) {}
virtual ~c3()
{
tester3(this);
c0 *p0_0 = (c0*)(c3*)(this);
tester0(p0_0);
c1 *p1_0 = (c1*)(c3*)(this);
tester1(p1_0);
active3 = false;
}
virtual void f3(){}
};
void __attribute__ ((noinline)) tester3(c3* p)
{
p->f3();
if (p->active0)
p->f0();
if (p->active1)
p->f1();
}
struct c4;
void __attribute__ ((noinline)) tester4(c4* p);
struct c4 : virtual c0, c2, virtual c3
{
bool active4;
c4() : active4(true) {}
virtual ~c4()
{
tester4(this);
c0 *p0_0 = (c0*)(c4*)(this);
tester0(p0_0);
c0 *p0_1 = (c0*)(c3*)(c4*)(this);
tester0(p0_1);
c1 *p1_0 = (c1*)(c2*)(c4*)(this);
tester1(p1_0);
c1 *p1_1 = (c1*)(c3*)(c4*)(this);
tester1(p1_1);
c2 *p2_0 = (c2*)(c4*)(this);
tester2(p2_0);
c3 *p3_0 = (c3*)(c4*)(this);
tester3(p3_0);
active4 = false;
}
virtual void f4(){}
};
void __attribute__ ((noinline)) tester4(c4* p)
{
p->f4();
if (p->active2)
p->f2();
if (p->active0)
p->f0();
if (p->active3)
p->f3();
}
int __attribute__ ((noinline)) inc(int v) {return ++v;}
int main()
{
c0* ptrs0[25];
ptrs0[0] = (c0*)(new c0());
ptrs0[1] = (c0*)(c3*)(new c3());
ptrs0[2] = (c0*)(c4*)(new c4());
ptrs0[3] = (c0*)(c3*)(c4*)(new c4());
for (int i=0;i<4;i=inc(i))
{
tester0(ptrs0[i]);
delete ptrs0[i];
}
c1* ptrs1[25];
ptrs1[0] = (c1*)(new c1());
ptrs1[1] = (c1*)(c2*)(new c2());
ptrs1[2] = (c1*)(c3*)(new c3());
ptrs1[3] = (c1*)(c2*)(c4*)(new c4());
ptrs1[4] = (c1*)(c3*)(c4*)(new c4());
for (int i=0;i<5;i=inc(i))
{
tester1(ptrs1[i]);
delete ptrs1[i];
}
c2* ptrs2[25];
ptrs2[0] = (c2*)(new c2());
ptrs2[1] = (c2*)(c4*)(new c4());
for (int i=0;i<2;i=inc(i))
{
tester2(ptrs2[i]);
delete ptrs2[i];
}
c3* ptrs3[25];
ptrs3[0] = (c3*)(new c3());
ptrs3[1] = (c3*)(c4*)(new c4());
for (int i=0;i<2;i=inc(i))
{
tester3(ptrs3[i]);
delete ptrs3[i];
}
c4* ptrs4[25];
ptrs4[0] = (c4*)(new c4());
for (int i=0;i<1;i=inc(i))
{
tester4(ptrs4[i]);
delete ptrs4[i];
}
return 0;
}
| [
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] | |
e402bd3c046600276ddaf815a3dbe09002e23943 | 0be9cec22c81c746cf8c3e8a2f4a2c51c2afd07b | /OOP_assignment_complete files/SSD.cpp | d30a3f6e6bc90ed4b5ef832732a0d88072b317bf | [] | no_license | tomfox747/WhereIsWally | 83ed690dfd4d6825b75c36aa2e8e15fe8780996f | f3c102b8e08a964f0a63194ab35b675a2bbb16c5 | refs/heads/master | 2020-07-12T10:34:57.506142 | 2019-08-27T21:30:58 | 2019-08-27T21:30:58 | 204,793,975 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 4,169 | cpp | #include "classStructure.h"
#include <iostream>
#include <vector>
#include <string>
#include <future>
#include <thread>
void checkPixels(std::promise<std::vector<std::vector<int>>> result_promise, ref_image *wally, large_image *cluster, int startY, int stopY);
int *SSD(std::vector<int>&, std::vector<int>&);
//checks for the possible locations of the reference image using a small string of pixels and an SSD calculation
//uses 2 threads to increase the time efficiency and half the workload of the main processor
//the large_image is split into 2 smaller matrices and applied to the threads
std::vector<std::vector<int>> getPixelCoOrds(ref_image *wal, large_image *clust)
{
large_image cluster = *clust;
ref_image wally = *wal;
large_image cluster2 = cluster;
ref_image wally2 = wally;
int splitY = cluster.getNumOfRows() / 2;
int splitY2 = splitY;
//sets up the futures and promise of the 2 threads, this allows the threaded functions to return values
std::promise<std::vector<std::vector<int>>> result_promise;
std::promise<std::vector<std::vector<int>>> result_promise2;
std::future<std::vector<std::vector<int>>> result_future = result_promise.get_future();
std::future<std::vector<std::vector<int>>> result_future2 = result_promise2.get_future();
//defines the threading functions, joins them and calls them
std::thread thread1{ checkPixels, std::move(result_promise), &wally, &cluster, 24, splitY };
std::thread thread2{ checkPixels, std::move(result_promise2), &wally2, &cluster2, splitY2, cluster2.getNumOfRows() };
std::vector<std::vector<int>> output = result_future.get();
std::vector<std::vector<int>> output2 = result_future2.get();
thread1.join();
thread2.join();
//joins the output of the two threads back into a single large vector
for (int i = 0; i < output2.size(); i++)
{
output.push_back(output2[i]);
}
return output;
}
//creates a string of pixels as a reference
//iterates through each position in a large matrix, creates a string of pixels as a comparison
//applies an SSD method to each comparison
//saves the output to a vector and returns the vector
//**function must be threaded using futures and promises
void checkPixels(std::promise<std::vector<std::vector<int>>> result_promise, ref_image *wallyin, large_image *clusin, int startY, int stopY)
{
ref_image wally = *wallyin;
large_image cluster = *clusin;
std::vector<int> wal; //snippet 1
std::vector<int> *Wal = &wal;
std::vector<int> temp; //snippet 2
std::vector<int> *Temp = &temp;
std::vector<int> diffs;
int *L_point;
int *C_point;
int *Diff;
int centreR = wally.getNumOfRows() / 2;
int centreC = wally.getNumOfColumbs() / 2;
int centrePixelVal = wally.getVal(centreR, centreC);
//creates reference vector
for (int i = -8; i < 8; i++)
{
wal.push_back(wally.getVal(centreR + i, centreC));
}
std::vector<std::vector<int>> pixelDiffVals;
pixelDiffVals.reserve(1200);
std::vector<int> line;
//iterates through lines within specified boudaries
for (int L = startY; L < stopY; L++)
{
L_point = &L;
for (int C = 18; C < cluster.getNumOfColumbs(); C++) // iterates through columbs within specified boundaries
{
C_point = &C;
if (L > 8 && L < stopY - 8)
{
for (int i = -8; i < 8; i++) //creates comparison vector
{
temp.push_back(cluster.getVal(*L_point + i, *C_point));
}
Diff = SSD(*Wal, *Temp); // calculates the SSD of the 2 values
if (*Diff < 400) // if SSD is within a specific thresh hold, add the location to a vector
{
line.push_back(L - centreR);
line.push_back(C - centreC);
pixelDiffVals.emplace_back(line);
line.clear();
}
temp.clear();
}
}
}
result_promise.set_value(pixelDiffVals); // return vector of possible locations
}
//calculates the SSD, slightly altered from traditional SSD as if output is negative, the value is converted to positive instead of squared
int *SSD(std::vector<int>&one, std::vector<int>&two)
{
int total = 0;
for (int i = 0; i < one.size(); i++)
{
int val = one[i] - two[i];
if (val < 0)
{
val = val - (2 * val); // non standard SSD line
}
total = total + val;
}
return &total;
}
| [
"[email protected]"
] | |
1f4bb2399843e4bd1a4f6b9145066e71f555bd2d | 249b8ac66022cef45f1e5fd8d594b76ee0cb3ad4 | /Working/finalShockTube/constant/fluid/polyMesh/pointZones | f4be01ac32160eac9dc11f08169caf9b2bf9248f | [] | no_license | Anthony-Gay/HPC_workspace | 2a3da1d599a562f2820269cc36a997a2b16fcbb8 | 41ef65d7ed3977418f360a52c2d8ae681e1b3971 | refs/heads/master | 2021-07-13T17:36:50.352775 | 2021-02-08T05:59:49 | 2021-02-08T05:59:49 | 232,433,074 | 0 | 1 | null | null | null | null | UTF-8 | C++ | false | false | 715 | /*--------------------------------*- C++ -*----------------------------------*\
========= |
\\ / F ield | OpenFOAM: The Open Source CFD Toolbox
\\ / O peration | Website: https://openfoam.org
\\ / A nd | Version: 7
\\/ M anipulation |
\*---------------------------------------------------------------------------*/
FoamFile
{
version 2.0;
format ascii;
class regIOobject;
location "constant/fluid/polyMesh";
object pointZones;
}
// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * //
0
()
// ************************************************************************* //
| [
"[email protected]"
] | ||
4a2c22a471d9a045135fd243f29d6e3b1bd33003 | 9dade9c5e31b4370445746446f4cdde14e47b2e4 | /d_04/ex01/Character.cpp | 632258586c470ff2ba86b5d2526c7c4401367d8d | [] | no_license | mhwangbo/CPP_Piscine | a162e47792e1dcea830be6e0b433897c8a68d103 | 714af1b73aef7b332f6ab1c8f8c8a96d197efaac | refs/heads/master | 2020-03-30T10:31:53.076842 | 2018-10-29T21:23:05 | 2018-10-29T21:23:05 | 151,123,954 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 2,234 | cpp | /* ************************************************************************** */
/* */
/* ::: :::::::: */
/* Character.cpp :+: :+: :+: */
/* +:+ +:+ +:+ */
/* By: mhwangbo <[email protected]> +#+ +:+ +#+ */
/* +#+#+#+#+#+ +#+ */
/* Created: 2018/10/05 12:06:30 by mhwangbo #+# #+# */
/* Updated: 2018/10/05 12:33:24 by mhwangbo ### ########.fr */
/* */
/* ************************************************************************** */
#include "Character.hpp"
Character::Character()
{
return ;
}
Character::Character(std::string const & name) : _name(name), _ap(40), _weapon(NULL)
{
return ;
}
Character::Character(Character const & copy)
{
*this = copy;
}
Character & Character::operator=(Character const ©)
{
this->_name = copy.getName();
this->_ap = copy.getAP();
this->_weapon = copy.getWeapon();
return (*this);
}
std::string const & Character::getName() const
{
return (this->_name);
}
int Character::getAP() const
{
return (this->_ap);
}
AWeapon* Character::getWeapon() const
{
return (this->_weapon);
}
void Character::recoverAP()
{
if (_ap + 10 > 40)
_ap = 40;
else
_ap += 10;
}
void Character::equip(AWeapon* weapon)
{
_weapon = weapon;
}
void Character::attack(Enemy* enemy)
{
int apCost = _weapon->getAPCost();
if (_ap - apCost < 0)
return ;
std::cout << _name + " attacks " + enemy->getType() + " with a " + _weapon->getName() << std::endl;
enemy->takeDamage(_weapon->getDamage());
if (enemy->getHP() <= 0)
delete(enemy);
_ap -= apCost;
}
std::ostream & operator <<(std::ostream & out, Character const & c)
{
out << c.getName() + " has " << c.getAP() << " AP and";
if (!c.getWeapon())
out << " is unarmed";
else
out << " wields a " + c.getWeapon()->getName();
out << std::endl;
return (out);
}
| [
"[email protected]"
] | |
54402dea89638eaf8c8076d9b5798d27ab2af7e3 | 01b1f86aa05da3543a2399ffc34a8ba91183e896 | /modules/core/trigonometric/include/nt2/trigonometric/functions/generic/atan2d.hpp | 87541ae9f05714eb16f360a0116cb5e9d8378199 | [
"BSL-1.0"
] | permissive | jtlap/nt2 | 8070b7b3c4b2f47c73fdc7006b0b0eb8bfc8306a | 1b97350249a4e50804c2f33e4422d401d930eccc | refs/heads/master | 2020-12-25T00:49:56.954908 | 2015-05-04T12:09:18 | 2015-05-04T12:09:18 | 1,045,122 | 35 | 7 | null | null | null | null | UTF-8 | C++ | false | false | 1,073 | hpp | //==============================================================================
// Copyright 2015 J.T. Lapreste
//
// Distributed under the Boost Software License, Version 1.0.
// See accompanying file LICENSE.txt or copy at
// http://www.boost.org/LICENSE_1_0.txt
//==============================================================================
#ifndef NT2_TRIGONOMETRIC_FUNCTIONS_GENERIC_ATAN2D_HPP_INCLUDED
#define NT2_TRIGONOMETRIC_FUNCTIONS_GENERIC_ATAN2D_HPP_INCLUDED
#include <nt2/trigonometric/functions/atan2d.hpp>
#include <nt2/include/functions/simd/atan2.hpp>
#include <nt2/include/functions/simd/indeg.hpp>
namespace nt2 { namespace ext
{
BOOST_DISPATCH_IMPLEMENT ( atan2d_, tag::cpu_
, (A0)(A1)
, (generic_< floating_<A0> >)
(generic_< floating_<A1> >)
)
{
typedef A0 result_type;
NT2_FUNCTOR_CALL(2)
{
return nt2::indeg(nt2::atan2(a0, a1));
}
};
} }
#endif
| [
"[email protected]"
] | |
d87e67e3186d6d99443b0d130fb497f82d87eb51 | 0dfa7f23c2384251443da0cb129f79e3ea4d6b52 | /GUI/Guispace.h | 334c6624b11ef14c5c541b018b6a37e4e08bbddd | [] | no_license | TeamFirst/Galcon | b908a1df4e161b3e726084a6e8054cbfa95d3ec4 | f7ccb7f0bb27820d2246529a577be2e89de248e4 | refs/heads/master | 2020-12-25T15:40:04.411443 | 2011-06-14T14:25:38 | 2011-06-14T14:25:38 | 1,810,650 | 6 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 284 | h | #pragma once
#include <QPainter>
namespace GUI
{
class CGUISpace
{
public:
CGUISpace(){}
CGUISpace(unsigned int x, unsigned int y);
void Draw(QPainter*);
private:
unsigned int m_width;
unsigned int m_height;
};
} // Namespace GUI
| [
"[email protected]"
] | |
2a46c7b6302758e1aec219e19452529ecb13baf7 | 62b440a501eab0cd4e7cc750df0d9e9a863b40d7 | /Example/Utility/Tokenizer/main.cpp | 0f97f11583f993f6883fcbfbea7beba06c5c6055 | [
"BSD-3-Clause",
"MIT",
"Zlib",
"LicenseRef-scancode-public-domain",
"BSD-2-Clause"
] | permissive | naohisas/KVS | b67d8adca623d1970e4cc4ab9c317d34d04800ff | 4d652aadc9db816674b1dda57dd14f8e56ce0a42 | refs/heads/develop | 2023-07-06T05:00:41.766940 | 2023-06-27T07:26:21 | 2023-06-27T07:26:21 | 28,217,308 | 47 | 32 | BSD-3-Clause | 2021-04-28T15:16:03 | 2014-12-19T06:25:52 | C++ | UTF-8 | C++ | false | false | 627 | cpp | #include <iostream>
#include <kvs/Tokenizer>
int main()
{
kvs::Tokenizer tokenizer( "This is a sample string.", " " );
while ( !tokenizer.isLast() )
{
std::cout << tokenizer.token() << std::endl;
}
kvs::Tokenizer tokenizer2( ":, This, is a sample, string., :", "," );
while ( !tokenizer2.isLast() )
{
std::cout << tokenizer2.token() << std::endl;
}
kvs::Tokenizer tokenizer3( ":, This, is a sample, string., :", ", :" );
while ( !tokenizer3.isLast() )
{
std::cout << tokenizer3.token() << std::endl;
}
return 0;
}
| [
"[email protected]"
] | |
1ff9d972e76fec998ea6e212088497f7f75bfd26 | 65c92f6c171a0565fe5275ecc48033907090d69d | /Common/DataImplementations/EventDataBase/EventDataBase.cpp | e1d2d44d660c351fab86c0cfce71355c5b623cca | [] | no_license | freakyzoidberg/horus-edu | 653ac573887d83a803ddff1881924ab82b46f5f6 | 2757766a6cb8c1f1a1b0a8e209700e6e3ccea6bc | refs/heads/master | 2020-05-20T03:08:15.276939 | 2010-01-07T14:34:51 | 2010-01-07T14:34:51 | 32,684,226 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 5,265 | cpp | /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* Horus is free software: you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation, either version 3 of the License, or *
* (at your option) any later version. *
* *
* Horus is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with Horus. If not, see <http://www.gnu.org/licenses/>. *
* *
* The orginal content of this material was realized as part of *
* 'Epitech Innovative Project' www.epitech.eu *
* *
* You are required to preserve the names of the original authors *
* of this content in every copy of this material *
* *
* Authors : *
* - BERTHOLON Romain *
* - GRANDEMANGE Adrien *
* - LACAVE Pierre *
* - LEON-BONNET Valentin *
* - NANOUCHE Abderrahmane *
* - THORAVAL Gildas *
* - VIDAL Jeremy *
* *
* You are also invited but not required to send a mail to the original *
* authors of this content in case of modification of this material *
* *
* Contact: [email protected] *
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
#include "EventDataBase.h"
#include "EventDataBasePlugin.h"
#include "../../TreeData.h"
EventDataBase::EventDataBase(TreeData* node, EventDataBasePlugin* plugin) : EventData(plugin)
{
_node = node;
_node->registerData(this);
}
void EventDataBase::keyToStream(QDataStream& s) const
{
s << _node->id();
}
void EventDataBase::dataToStream(QDataStream& s) const
{
s << _startTime << _endTime << _comment;
}
void EventDataBase::dataFromStream(QDataStream& s)
{
s >> _startTime >> _endTime >> _comment;
}
bool EventDataBase::canChange(UserData* user) const
{
return _node->canChange(user);
}
bool EventDataBase::canAccess(UserData* user) const
{
return _node->canAccess(user);
}
QDebug EventDataBase::operator<<(QDebug debug) const
{
return debug << dataType() << _node->id() << _startTime << _endTime;
}
const QList<Data*> EventDataBase::dependsOfCreatedData() const
{
QList<Data*> list;
list.append(_node);
return list;
}
#ifdef HORUS_SERVER
quint8 EventDataBase::serverCreate()
{
QMutexLocker M(&_node->mutex);
QSqlQuery query = _plugin->pluginManager->sqlQuery();
query.prepare("INSERT INTO`event`(`id_tree`,`start_time`,`end_time`,`comment`)VALUES(?,?,?);");
query.addBindValue(_node->id());
query.addBindValue(_startTime);
query.addBindValue(_endTime);
query.addBindValue(_comment);
if ( ! query.exec())
{
qDebug() << query.lastError();
return DATABASE_ERROR;
}
return NONE;
}
quint8 EventDataBase::serverSave()
{
QSqlQuery query = _plugin->pluginManager->sqlQuery();
query.prepare("UPDATE`event`SET`start_time`=?,`end_time`=?,`comment`=? WHERE`id_tree`=?;");
query.addBindValue(_startTime);
query.addBindValue(_endTime);
query.addBindValue(_node->id());
query.addBindValue(_comment);
if ( ! query.exec())
{
qDebug() << query.lastError();
return DATABASE_ERROR;
}
return NONE;
}
quint8 EventDataBase::serverRemove()
{
QSqlQuery query = _plugin->pluginManager->sqlQuery();
query.prepare("DELETE FROM`event`WHERE`id_tree`=?;");
query.addBindValue(_node->id());
if ( ! query.exec())
{
qDebug() << query.lastError();
return DATABASE_ERROR;
}
if ( ! query.numRowsAffected())
return NOT_FOUND;
return NONE;
}
#endif
#ifdef HORUS_CLIENT
QVariant EventDataBase::data(int column, int role) const
{
if (role == Qt::DisplayRole)
{
if (column == 0)
return _node->name();
if (column == 1)
return _startTime;
if (column == 2)
return _endTime;
if (column == 3)
return _comment;
}
return Data::data(column, role);
}
#endif
| [
"git@cb2ab776-01a4-11df-b136-7f7962f7bc17"
] | git@cb2ab776-01a4-11df-b136-7f7962f7bc17 |
de2ac36dd40111a8b5808f902a4851f3c502e80f | 9f9660f318732124b8a5154e6670e1cfc372acc4 | /test/case0/700/nut | 2c2725a2419608caabacd9064bb8fd696e2906cd | [] | no_license | mamitsu2/aircond5 | 9a6857f4190caec15823cb3f975cdddb7cfec80b | 20a6408fb10c3ba7081923b61e44454a8f09e2be | refs/heads/master | 2020-04-10T22:41:47.782141 | 2019-09-02T03:42:37 | 2019-09-02T03:42:37 | 161,329,638 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 9,988 | /*--------------------------------*- C++ -*----------------------------------*\
========= |
\\ / F ield | OpenFOAM: The Open Source CFD Toolbox
\\ / O peration | Website: https://openfoam.org
\\ / A nd | Version: 6
\\/ M anipulation |
\*---------------------------------------------------------------------------*/
FoamFile
{
version 2.0;
format ascii;
class volScalarField;
location "700";
object nut;
}
// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * //
dimensions [0 2 -1 0 0 0 0];
internalField nonuniform List<scalar>
459
(
0.00112971
0.00123266
0.00126402
0.00132705
0.00138644
0.0014447
0.00150619
0.00156215
0.0016048
0.00162518
0.00161431
0.00156257
0.00137728
0.00114865
0.000951321
0.000522996
0.000608532
0.000688204
0.000716718
0.00070708
0.000683333
0.000641504
0.000597447
0.000557405
0.000522098
0.000491024
0.000463587
0.000439365
0.000417695
0.000397802
0.000378777
0.000359466
0.000348761
0.00032141
0.00151323
0.00344462
0.00319679
0.00366837
0.00414326
0.00461223
0.00497451
0.00532902
0.00568561
0.00600315
0.0062408
0.00635419
0.00623569
0.00552372
0.00353582
0.00114768
0.000893878
0.000521509
0.00120273
0.00173696
0.00217272
0.00244415
0.00244065
0.00181749
0.00153389
0.00134224
0.00119997
0.00108974
0.00100147
0.000924977
0.000853577
0.000783195
0.000720326
0.000664882
0.000807023
0.000427228
0.00182884
0.00458696
0.00379669
0.00453563
0.00482022
0.00502173
0.00519148
0.00542134
0.00573169
0.00611376
0.00654905
0.00698541
0.00727593
0.00702728
0.00592667
0.00388199
0.0011096
0.000766851
0.00129561
0.00187595
0.00250878
0.00298524
0.00293909
0.000872927
0.000767971
0.000682358
0.000613194
0.000557114
0.000511278
0.000473628
0.000442839
0.000418554
0.000459055
0.000533118
0.000936702
0.000504974
0.00212878
0.00577675
0.003665
0.00458782
0.00464847
0.00459899
0.00463716
0.00480525
0.00509637
0.00551972
0.00606791
0.00665971
0.00712222
0.0071932
0.00681575
0.00562532
0.00309204
0.00125684
0.00155168
0.00210924
0.00283147
0.00352719
0.00399635
0.00378025
0.000979197
0.000896408
0.000838524
0.000794165
0.000755003
0.000717873
0.000681641
0.00064307
0.000597903
0.000558079
0.000569581
0.0011525
0.000560763
0.00243166
0.00737266
0.00376197
0.00433855
0.00438624
0.00420308
0.0042151
0.00439897
0.00469688
0.00514315
0.005737
0.00634128
0.00671488
0.00681337
0.00669518
0.00624448
0.00521547
0.00462816
0.00469951
0.00496643
0.00529074
0.0055228
0.00558457
0.00537434
0.00448956
0.00406832
0.00382756
0.0036394
0.00343883
0.00314893
0.00276123
0.00230395
0.00181242
0.00134767
0.000997541
0.00109141
0.000742653
0.00068891
0.000816802
0.000915679
0.00275382
0.009177
0.0049685
0.00403067
0.00424075
0.00412104
0.00408225
0.00428948
0.00458581
0.00503552
0.00562382
0.00618581
0.00647842
0.00647818
0.00641343
0.00643073
0.00636089
0.00645095
0.00674364
0.00693162
0.00695019
0.00681099
0.00654946
0.00619176
0.00573732
0.00537071
0.00507344
0.00480163
0.00453076
0.00423594
0.00385057
0.00336092
0.00277589
0.00215005
0.00160918
0.00119177
0.000980786
0.000889053
0.00129185
0.000966283
0.00307398
0.0105365
0.00731282
0.00469758
0.00416079
0.00431456
0.00430506
0.00441412
0.00465938
0.00508918
0.00567658
0.0062315
0.00646835
0.00639997
0.00644575
0.00686598
0.00732255
0.00767038
0.00786038
0.0077972
0.007521
0.00710405
0.00661189
0.00609975
0.00562289
0.00523945
0.00492625
0.00464952
0.00439898
0.00418011
0.00399132
0.00366798
0.00319886
0.00263731
0.00211954
0.00165279
0.0013894
0.00138567
0.00148988
0.00114417
0.00315566
0.00978538
0.00814763
0.00657138
0.00555566
0.00516033
0.00476878
0.00466189
0.00484424
0.00527178
0.00587891
0.00643822
0.00662005
0.00655954
0.00695028
0.00749192
0.00782729
0.0079624
0.00786894
0.00753242
0.00701721
0.00641222
0.00580153
0.00525577
0.00481848
0.00448549
0.0042203
0.00400219
0.00383308
0.00372444
0.00368464
0.0036678
0.00338883
0.0030221
0.00272915
0.00265532
0.00296289
0.00374546
0.00468788
0.00170357
0.00309715
0.00374693
0.00420196
0.00437485
0.00433264
0.00427785
0.00435681
0.00462682
0.0050204
0.00555658
0.00621965
0.00676447
0.00684228
0.00695842
0.00721218
0.00735034
0.00733033
0.00717165
0.00682316
0.00630756
0.00571168
0.00513062
0.00463076
0.00423365
0.00392287
0.00366561
0.00343688
0.00322949
0.00304639
0.00289054
0.00276027
0.00265339
0.00257623
0.00253635
0.00254863
0.00259246
0.00258451
0.0024557
0.00226259
0.00155121
0.00157272
0.00266863
0.00355654
0.00426168
0.00489484
0.00537858
0.00567334
0.00610339
0.00663593
0.00706937
0.00707978
0.00690956
0.00661718
0.00631108
0.00603295
0.00571677
0.00532919
0.00490913
0.00451677
0.00418568
0.00391875
0.00369823
0.00350099
0.00330993
0.00311959
0.00293645
0.00277512
0.00265336
0.00258589
0.00256621
0.0025775
0.00260959
0.00264283
0.00263638
0.00253467
0.00231651
0.00199768
0.0012572
0.00216263
0.00426802
0.00532576
0.00603144
0.00636521
0.00590878
0.00543309
0.00568476
0.00573691
0.00574183
0.00565585
0.00542575
0.00517679
0.00497034
0.00477586
0.00455653
0.0043046
0.00406454
0.00385521
0.00367747
0.00352407
0.00338584
0.00325592
0.00313217
0.00301701
0.00291482
0.00282822
0.00275525
0.00272691
0.00274086
0.00278953
0.00285908
0.00292657
0.0029805
0.00296827
0.00293965
0.00249965
0.00127521
0.00225757
0.00230411
0.0023499
0.00263158
0.00240249
0.0020077
0.00160659
0.00143142
0.00130266
0.00123102
0.00118635
0.00114034
0.00109611
0.00106061
0.00103394
0.00101164
0.000990311
0.000969474
0.000951693
0.000935881
0.000922785
0.000912613
0.000905429
0.000901461
0.000901218
0.000905463
0.000915124
0.000931275
0.000955303
0.000989205
0.00103083
0.00108093
0.00113941
0.00120644
0.00128124
0.00138528
0.0014111
0.00137428
0.00128103
0.00117981
)
;
boundaryField
{
floor
{
type nutkWallFunction;
Cmu 0.09;
kappa 0.41;
E 9.8;
value nonuniform List<scalar>
29
(
0.000114968
6.26561e-05
7.34208e-05
8.32821e-05
8.67772e-05
8.55977e-05
8.26832e-05
7.75196e-05
7.20365e-05
6.70105e-05
6.25419e-05
5.85781e-05
5.50521e-05
5.19176e-05
4.90948e-05
4.64871e-05
4.39775e-05
4.14135e-05
3.99845e-05
3.63069e-05
3.63069e-05
5.03381e-05
6.03605e-05
6.74327e-05
0.000114968
6.26561e-05
6.2467e-05
9.28828e-05
0.00015051
)
;
}
ceiling
{
type nutkWallFunction;
Cmu 0.09;
kappa 0.41;
E 9.8;
value nonuniform List<scalar>
43
(
0.000261028
0.000266018
0.00027092
0.000300953
0.000276668
0.000234163
0.000190018
0.00017037
0.000155756
0.000147554
0.000142414
0.000137095
0.000131959
0.000127819
0.000124699
0.000122083
0.000119574
0.000117117
0.000115016
0.000113144
0.00011159
0.000110382
0.000109527
0.000109055
0.000109026
0.000109531
0.00011068
0.000112597
0.000115443
0.000119443
0.000124334
0.000130191
0.000136988
0.000144731
0.000153314
0.000165161
0.000168087
0.000163914
0.000153291
0.000141662
0.000350132
0.000417078
0.000250728
)
;
}
sWall
{
type nutkWallFunction;
Cmu 0.09;
kappa 0.41;
E 9.8;
value uniform 0.0002611;
}
nWall
{
type nutkWallFunction;
Cmu 0.09;
kappa 0.41;
E 9.8;
value nonuniform List<scalar> 6(0.000110749 0.000116744 0.000137545 0.000150576 0.000152638 0.000141673);
}
sideWalls
{
type empty;
}
glass1
{
type nutkWallFunction;
Cmu 0.09;
kappa 0.41;
E 9.8;
value nonuniform List<scalar> 9(0.000135992 0.000179839 0.000214981 0.000247765 0.000280371 0.000314584 0.000348173 0.000356694 0.00035062);
}
glass2
{
type nutkWallFunction;
Cmu 0.09;
kappa 0.41;
E 9.8;
value nonuniform List<scalar> 2(0.000200939 0.000183955);
}
sun
{
type nutkWallFunction;
Cmu 0.09;
kappa 0.41;
E 9.8;
value nonuniform List<scalar>
14
(
0.000135859
0.000147735
0.000151331
0.000158528
0.000165276
0.000171864
0.000178786
0.000185058
0.000189821
0.000192092
0.000190882
0.000185105
0.000164238
0.000138049
)
;
}
heatsource1
{
type nutkWallFunction;
Cmu 0.09;
kappa 0.41;
E 9.8;
value nonuniform List<scalar> 3(8.33698e-05 9.89191e-05 0.000110743);
}
heatsource2
{
type nutkWallFunction;
Cmu 0.09;
kappa 0.41;
E 9.8;
value nonuniform List<scalar> 4(0.000137931 0.000108147 0.000108147 0.000133515);
}
Table_master
{
type nutkWallFunction;
Cmu 0.09;
kappa 0.41;
E 9.8;
value nonuniform List<scalar> 9(0.000105649 9.30188e-05 8.25655e-05 7.40061e-05 6.69801e-05 6.11733e-05 5.63556e-05 5.23803e-05 4.92203e-05);
}
Table_slave
{
type nutkWallFunction;
Cmu 0.09;
kappa 0.41;
E 9.8;
value nonuniform List<scalar> 9(0.000118259 0.00010845 0.00010153 9.6189e-05 9.14445e-05 8.69193e-05 8.24766e-05 7.77159e-05 7.2097e-05);
}
inlet
{
type calculated;
value uniform 0.000167705;
}
outlet
{
type calculated;
value nonuniform List<scalar> 2(0.00225757 0.00230411);
}
}
// ************************************************************************* //
| [
"[email protected]"
] | ||
4678409c198a3a280046251d5d3118f1a977ef15 | 745b648f2b3309686649ba8a0fe79925183b65b4 | /PA1/src/main.cpp | 46e425410c97dae46fc38bbe3d9786ce7a073569 | [] | no_license | Ashantiaja/CS480-ComputerGraphics | bbd216fff5ef682e649f6c4b2feaff781f5ef8e1 | 46b3edc165bf3d3932c5f00ac3919ac2f0ccec7d | refs/heads/master | 2022-12-15T12:34:16.933846 | 2020-09-23T09:31:47 | 2020-09-23T09:31:47 | 204,874,473 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 2,098 | cpp | #include <iostream>
#include <fstream>
#include <string>
#include "engine.h"
int main(int argc, char **argv)
{
std::string fragShaderInfo = ""; // Stores information for fragment shader
std::string vertShaderInfo = "";
// Process command line arguments
for(int i = 1; i < argc; i++) {
// Check for flag -f for fragment shader
if(argv[i][0] == '-' && argv[i][1] == 'f') {
i++; // move from flag to file
std::fstream fragFile;
std::string fileName = argv[i];
//Attempt to open file
fragFile.open(fileName);
if(!fragFile.is_open()) { // if unable to open file
std::cout << "File " << argv[i] << " unable to be opened." << std::endl;
return 0;
}
// Once successfully opened, read into string
std::string buffer = "";
while(!fragFile.eof()) {
std::getline(fragFile, buffer);
fragShaderInfo.append(buffer + "\n");
}
// Close original file
fragFile.close();
}
// Check for flag -v for vertex shader
if(argv[i][0] == '-' && argv[i][1] == 'v') {
i++; // move from flag to file
std::fstream vertFile;
std::string fileName = argv[i];
//Attempt to open file
vertFile.open(fileName);
if(!vertFile.is_open()) { // if unable to open file
std::cout << "File " << argv[i] << " unable to be opened." << std::endl;
return 0;
}
// Once successfully opened, read into string
std::string buffer = "";
while(!vertFile.eof()) {
std::getline(vertFile, buffer);
vertShaderInfo.append(buffer + "\n");
}
// Close original file
vertFile.close();
}
}
// Start an engine and run it then cleanup after
Engine *engine = new Engine("Tutorial Window Name", 800, 600);
// Put shader info into engine
engine->setShader(GL_VERTEX_SHADER, vertShaderInfo);
engine->setShader(GL_FRAGMENT_SHADER, fragShaderInfo);
if(!engine->Initialize())
{
printf("The engine failed to start.\n");
delete engine;
engine = NULL;
return 1;
}
engine->Run();
delete engine;
engine = NULL;
return 0;
}
| [
"[email protected]"
] | |
bb87eadadfada5156424c760828b6995ce958592 | 777a75e6ed0934c193aece9de4421f8d8db01aac | /src/Providers/UNIXProviders/MemoryResource/UNIX_MemoryResourceMain.cpp | 489ca3dd6bf32b4ef9f0b908b1c10fc318dc1abc | [
"MIT"
] | permissive | brunolauze/openpegasus-providers-old | 20fc13958016e35dc4d87f93d1999db0eae9010a | b00f1aad575bae144b8538bf57ba5fd5582a4ec7 | refs/heads/master | 2021-01-01T20:05:44.559362 | 2014-04-30T17:50:06 | 2014-04-30T17:50:06 | 19,132,738 | 1 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 2,195 | cpp | //%LICENSE////////////////////////////////////////////////////////////////
//
// Licensed to The Open Group (TOG) under one or more contributor license
// agreements. Refer to the OpenPegasusNOTICE.txt file distributed with
// this work for additional information regarding copyright ownership.
// Each contributor licenses this file to you under the OpenPegasus Open
// Source License; you may not use this file except in compliance with the
// License.
//
// Permission is hereby granted, free of charge, to any person obtaining a
// copy of this software and associated documentation files (the "Software"),
// to deal in the Software without restriction, including without limitation
// the rights to use, copy, modify, merge, publish, distribute, sublicense,
// and/or sell copies of the Software, and to permit persons to whom the
// Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included
// in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//////////////////////////////////////////////////////////////////////////
//
//%/////////////////////////////////////////////////////////////////////////
#include <Pegasus/Common/Config.h>
#include <Pegasus/Common/String.h>
#include <Pegasus/Common/PegasusVersion.h>
PEGASUS_USING_PEGASUS;
PEGASUS_USING_STD;
#include "UNIX_MemoryResourceProvider.h"
extern "C"
PEGASUS_EXPORT CIMProvider* PegasusCreateProvider(const String& providerName)
{
if (String::equalNoCase(providerName, CIMHelper::EmptyString)) return NULL;
else if (String::equalNoCase(providerName, "UNIX_MemoryResourceProvider")) return new UNIX_MemoryResourceProvider();
return NULL;
}
| [
"[email protected]"
] | |
7af9ac1f08534352141cb6a5fbe77618ac7a94ad | ced251c69f78605734fa15cbc3022d82cab41a87 | /include/iai_naive_kinematics_sim/simulator_node.hpp | 82ad3c30e5dd32c58ea1665be62db59582e68752 | [] | no_license | SiChiTong/iai_naive_kinematics_sim | 47ff8980ae662a83b03b46bd6b85b72f9a06e203 | 731677f541f6937b547cf3027f42151dada92263 | refs/heads/master | 2021-06-20T15:06:50.332576 | 2017-06-12T14:09:32 | 2017-06-12T14:09:32 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 7,473 | hpp | /*
* Copyright (c) 2015-2017, Georg Bartels, <[email protected]>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the Institute of Artificial Intelligence,
* University of Bremen nor the names of its contributors may be used
* to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef IAI_NAIVE_KINEMATICS_SIM_SIMULATOR_NODE_HPP
#define IAI_NAIVE_KINEMATICS_SIM_SIMULATOR_NODE_HPP
#include <iai_naive_kinematics_sim/simulator.hpp>
#include <iai_naive_kinematics_sim/utils.hpp>
#include <iai_naive_kinematics_sim/watchdog.hpp>
#include <iai_naive_kinematics_sim/SetJointState.h>
#include <iai_naive_kinematics_sim/ProjectionClock.h>
#include <std_msgs/Header.h>
namespace iai_naive_kinematics_sim
{
class SimulatorNode
{
public:
SimulatorNode(const ros::NodeHandle& nh):
nh_(nh), sim_frequency_(0.0) {}
~SimulatorNode() {}
void init()
{
readSimFrequency();
projection_mode_ = readParam<bool>(nh_, "projection_mode");
sim_.init(readUrdf(), readSimulatedJoints(), readControlledJoints(), readWatchdogPeriod());
sim_.setSubJointState(readStartConfig());
sub_ = nh_.subscribe("commands", 1, &SimulatorNode::callback, this,
ros::TransportHints().tcpNoDelay());
pub_ = nh_.advertise<sensor_msgs::JointState>("joint_states", 1);
server_ = nh_.advertiseService("set_joint_states", &SimulatorNode::set_joint_states, this);
if (projection_mode_)
{
clock_sub_ = nh_.subscribe("projection_clock", 1, &SimulatorNode::projection_clock_callback,
this, ros::TransportHints().tcpNoDelay());
ack_pub_ = nh_.advertise<std_msgs::Header>("commands_received", 1);
}
else
timer_ = nh_.createTimer(sim_period_, &SimulatorNode::timer_callback, this);
}
private:
ros::NodeHandle nh_;
ros::Publisher pub_, ack_pub_;
ros::Subscriber sub_, clock_sub_;
ros::ServiceServer server_;
ros::Timer timer_;
ros::Rate sim_frequency_;
ros::Duration sim_period_;
Simulator sim_;
bool projection_mode_;
void callback(const sensor_msgs::JointState::ConstPtr& msg)
{
try
{
if (projection_mode_)
{
sim_.setSubCommand(*msg, msg->header.stamp);
std_msgs::Header ack_msg = msg->header;
ack_pub_.publish(ack_msg);
}
else
{
ros::Time now = ros::Time::now();
sim_.setSubCommand(*msg, now);
}
}
catch (const std::exception& e)
{
ROS_ERROR("%s", e.what());
}
}
bool set_joint_states(SetJointState::Request& request, SetJointState::Response& response)
{
try
{
sim_.setSubJointState(request.state);
response.success = true;
response.message = "";
}
catch (const std::exception& e)
{
response.success = false;
response.message = e.what();
}
return true;
}
void timer_callback(const ros::TimerEvent& e)
{
sim_.update(e.current_real, sim_period_);
pub_.publish(sim_.getJointState());
}
void projection_clock_callback(const ProjectionClock::ConstPtr& msg)
{
sim_.update(msg->now, msg->period);
pub_.publish(sim_.getJointState());
}
urdf::Model readUrdf() const
{
std::string urdf_descr_ = readParam<std::string>(nh_, "/robot_description");
urdf::Model model;
if(!model.initString(urdf_descr_))
throw std::runtime_error("Could not parse given robot description.");
return model;
}
void readSimFrequency()
{
double sim_frequency = readParam<double>(nh_, "sim_frequency");
if(sim_frequency <= 0.0)
throw std::runtime_error("Read a non-positive simulation frequency.");
ROS_INFO("sim_frequency: %f", sim_frequency);
sim_frequency_ = ros::Rate(sim_frequency);
sim_period_ = sim_frequency_.expectedCycleTime();
}
ros::Duration readWatchdogPeriod() const
{
double watchdog_period = readParam<double>(nh_, "watchdog_period");
if(watchdog_period <= 0.0)
throw std::runtime_error("Read a non-positive watchdog period.");
ROS_INFO("watchdog_period: %f", watchdog_period);
return ros::Duration(watchdog_period);
}
std::vector<std::string> readSimulatedJoints() const
{
std::vector<std::string> simulated_joints =
readParam< std::vector<std::string> >(nh_, "simulated_joints");
std::string out_string;
for(size_t i =0; i < simulated_joints.size(); ++i)
out_string += " " + simulated_joints[i];
ROS_INFO("simulated joints:%s", out_string.c_str());
return simulated_joints;
}
std::vector<std::string> readControlledJoints() const
{
std::vector<std::string> controlled_joints =
readParam< std::vector<std::string> >(nh_, "controlled_joints");
std::string out_string;
for(size_t i =0; i < controlled_joints.size(); ++i)
out_string += " " + controlled_joints[i];
ROS_INFO("controlled joints:%s", out_string.c_str());
return controlled_joints;
}
sensor_msgs::JointState readStartConfig() const
{
std::map<std::string, double> start_config;
nh_.getParam("start_config", start_config);
sensor_msgs::JointState joint_state;
for(std::map<std::string, double>::const_iterator it=start_config.begin();
it!=start_config.end(); ++it)
{
joint_state.name.push_back(it->first);
joint_state.position.push_back(it->second);
joint_state.velocity.push_back(0.0);
joint_state.effort.push_back(0.0);
ROS_INFO("start config for '%s': %f", it->first.c_str(), it->second);
}
return joint_state;
}
};
}
#endif
| [
"[email protected]"
] | |
92c4c496a5f3a791df67bef8cd2e42edc5fc2450 | 22aa78e3809b48dd475f42ff1c6b9d7af3548405 | /CPP_Primer/C++_160B/Battleship/pointcollection.h | 772cacc60748550ecf64f532c92d0d3faddd5f7c | [] | no_license | addisonu/Cpp_Primer | 30fe8ef3a6a32bb80e18ec7125557e3ba6552a3a | 69a4a3b6679c18e257c5502fb3910f2d31b36089 | refs/heads/master | 2021-01-01T05:49:57.844516 | 2017-11-16T15:36:26 | 2017-11-16T15:36:26 | 15,954,636 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 655 | h | //
// PointCollection.h
// Battleship
//
#ifndef POINT_COLLECTION_H
#define POINT_COLLECTION_H
#include "Point.h"
class PointCollection
{
private:
int size;
int capacity;
point* data;
void doubleArraySize();
public:
PointCollection();
PointCollection(const PointCollection& c);
~PointCollection();
void add(const point &p);
point& get(int index) const;
int getSize() const;
bool contains(const point &p) const;
PointCollection& operator<<(const point &p);
point& operator[](int index) const;
const PointCollection& operator=(const PointCollection &c);
};
#endif
| [
"[email protected]"
] | |
5439e6d79db92e8349ccaec981048c1b7208e90c | 83fc15ac0539cc4798ffe194711ec6423771de16 | /rdrand.cpp | 1fd6f94cec39f92766fb8b7f7812d1d619726ffe | [
"LicenseRef-scancode-unknown-license-reference",
"BSL-1.0",
"LicenseRef-scancode-public-domain"
] | permissive | cfogelklou/cryptopp | 9701b524ebe561d789e852adb5e18a8373b58e8e | 314c701d73519c0d8ab78646c7a2ffa92f0d6558 | refs/heads/master | 2021-01-16T18:38:33.151523 | 2016-06-16T12:15:46 | 2016-06-16T12:15:46 | 41,897,160 | 0 | 0 | null | 2015-09-04T04:09:20 | 2015-09-04T04:09:20 | null | UTF-8 | C++ | false | false | 15,065 | cpp | // rdrand.cpp - written and placed in public domain by Jeffrey Walton and Uri Blumenthal.
// Copyright assigned to Crypto++ project.
#include "pch.h"
#include "config.h"
#include "cryptlib.h"
#include "secblock.h"
#include "rdrand.h"
#include "cpu.h"
#if CRYPTOPP_MSC_VERSION
# pragma warning(disable: 4100)
#endif
// This file (and friends) provides both RDRAND and RDSEED, but its somewhat
// experimental. They were added at Crypto++ 5.6.3. At compile time, it
// indirectly uses CRYPTOPP_BOOL_{X86|X32|X64} (via CRYPTOPP_CPUID_AVAILABLE)
// to select an implementation or "throw NotImplemented". At runtime, the
// class uses the result of CPUID to determine if RDRAND or RDSEED are
// available. If not available, a lazy throw strategy is used. I.e., the
// throw is deferred until GenerateBlock() is called.
// Here's the naming convention for the functions....
// MSC = Microsoft Compiler (and compatibles)
// GCC = GNU Compiler (and compatibles)
// ALL = MSC and GCC (and compatibles)
// RRA = RDRAND, Assembly
// RSA = RDSEED, Assembly
// RRI = RDRAND, Intrinsic
// RSA = RDSEED, Intrinsic
/////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////
// For Linux, install NASM, run rdrand-nasm.asm, add the apppropriate
// object file to the Makefile's LIBOBJS (rdrand-x{86|32|64}.o). After
// that, define these. They are not enabled by default because they
// are not easy to cut-in in the Makefile.
#if 0
#define NASM_RDRAND_ASM_AVAILABLE 1
#define NASM_RDSEED_ASM_AVAILABLE 1
#endif
/////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////
// According to Wei, CRYPTOPP_DISABLE_ASM is a failsafe due to the assembler.
// We sidestep it because it does not limit us. The assembler does not limit
// us because we emit out own byte codes as needed. To diasble RDRAND or
// RDSEED, set CRYPTOPP_BOOL_RDRAND_ASM or CRYPTOPP_BOOL_RDSEED_ASM to 0.
#ifndef CRYPTOPP_CPUID_AVAILABLE
# if (CRYPTOPP_BOOL_X86 || CRYPTOPP_BOOL_X32 || CRYPTOPP_BOOL_X64)
# define CRYPTOPP_CPUID_AVAILABLE
# endif
#endif
#if defined(CRYPTOPP_CPUID_AVAILABLE) && !defined(CRYPTOPP_BOOL_RDRAND_ASM)
# define CRYPTOPP_BOOL_RDRAND_ASM 1
#else
# define CRYPTOPP_BOOL_RDRAND_ASM 0
#endif
#if defined(CRYPTOPP_CPUID_AVAILABLE) && !defined(CRYPTOPP_BOOL_RDSEED_ASM)
# define CRYPTOPP_BOOL_RDSEED_ASM 1
#else
# define CRYPTOPP_BOOL_RDSEED_ASM 0
#endif
#if defined(CRYPTOPP_CPUID_AVAILABLE)
# define MSC_INTRIN_COMPILER ((CRYPTOPP_MSC_VERSION >= 1700) || (CRYPTOPP_CLANG_VERSION >= 30200) || (_INTEL_COMPILER >= 1210))
# define GCC_INTRIN_COMPILER ((CRYPTOPP_GCC_VERSION >= 40600) || (CRYPTOPP_CLANG_VERSION >= 30200) || (_INTEL_COMPILER >= 1210))
#else
# define MSC_INTRIN_COMPILER 0
# define GCC_INTRIN_COMPILER 0
#endif
// In general, the library's ASM code is best on Windows, and Intrinsics is
// the best code under GCC and compatibles. We favor them accordingly.
// The NASM code is optimized well on Linux, but its not easy to cut-in.
#if defined(CRYPTOPP_CPUID_AVAILABLE) && (CRYPTOPP_MSC_VERSION >= 1200)
# if CRYPTOPP_BOOL_RDRAND_ASM
# define MASM_RDRAND_ASM_AVAILABLE 1
# elif MSC_INTRIN_COMPILER
# define ALL_RDRAND_INTRIN_AVAILABLE 1
# endif
# if CRYPTOPP_BOOL_RDSEED_ASM
# define MASM_RDSEED_ASM_AVAILABLE 1
# elif MSC_INTRIN_COMPILER
# define ALL_RDSEED_INTRIN_AVAILABLE 1
# endif
#elif defined(CRYPTOPP_CPUID_AVAILABLE) && (CRYPTOPP_GCC_VERSION >= 30200)
# if GCC_INTRIN_COMPILER && defined(__RDRND__)
# define ALL_RDRAND_INTRIN_AVAILABLE 1
# elif CRYPTOPP_BOOL_RDRAND_ASM
# define GCC_RDRAND_ASM_AVAILABLE 1
# endif
# if GCC_INTRIN_COMPILER && defined(__RDSEED__)
# define ALL_RDSEED_INTRIN_AVAILABLE 1
# elif CRYPTOPP_BOOL_RDSEED_ASM
# define GCC_RDSEED_ASM_AVAILABLE 1
# endif
#endif
// Debug diagnostics
#if 0
# if MASM_RDRAND_ASM_AVAILABLE
# pragma message ("MASM_RDRAND_ASM_AVAILABLE is 1")
# elif NASM_RDRAND_ASM_AVAILABLE
# pragma message ("NASM_RDRAND_ASM_AVAILABLE is 1")
# elif GCC_RDRAND_ASM_AVAILABLE
# pragma message ("GCC_RDRAND_ASM_AVAILABLE is 1")
# elif ALL_RDRAND_INTRIN_AVAILABLE
# pragma message ("ALL_RDRAND_INTRIN_AVAILABLE is 1")
# else
# pragma message ("RDRAND is not available")
# endif
# if MASM_RDSEED_ASM_AVAILABLE
# pragma message ("MASM_RDSEED_ASM_AVAILABLE is 1")
# elif NASM_RDSEED_ASM_AVAILABLE
# pragma message ("NASM_RDSEED_ASM_AVAILABLE is 1")
# elif GCC_RDSEED_ASM_AVAILABLE
# pragma message ("GCC_RDSEED_ASM_AVAILABLE is 1")
# elif ALL_RDSEED_INTRIN_AVAILABLE
# pragma message ("ALL_RDSEED_INTRIN_AVAILABLE is 1")
# else
# pragma message ("RDSEED is not available")
# endif
#endif
/////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////
#if (ALL_RDRAND_INTRIN_AVAILABLE || ALL_RDSEED_INTRIN_AVAILABLE)
# include <immintrin.h> // rdrand, MSC, ICC, and GCC
# if defined(__has_include)
# if __has_include(<x86intrin.h>)
# include <x86intrin.h> // rdseed for some compilers, like GCC
# endif
# endif
#endif
#if MASM_RDRAND_ASM_AVAILABLE
# ifdef _M_X64
extern "C" int CRYPTOPP_FASTCALL MASM_RRA_GenerateBlock(byte*, size_t, unsigned int);
// # pragma comment(lib, "rdrand-x64.lib")
# else
extern "C" int MASM_RRA_GenerateBlock(byte*, size_t, unsigned int);
// # pragma comment(lib, "rdrand-x86.lib")
# endif
#endif
#if MASM_RDSEED_ASM_AVAILABLE
# ifdef _M_X64
extern "C" int CRYPTOPP_FASTCALL MASM_RSA_GenerateBlock(byte*, size_t, unsigned int);
// # pragma comment(lib, "rdrand-x64.lib")
# else
extern "C" int MASM_RSA_GenerateBlock(byte*, size_t, unsigned int);
// # pragma comment(lib, "rdrand-x86.lib")
# endif
#endif
#if NASM_RDRAND_ASM_AVAILABLE
extern "C" int NASM_RRA_GenerateBlock(byte*, size_t, unsigned int);
#endif
#if NASM_RDSEED_ASM_AVAILABLE
extern "C" int NASM_RSA_GenerateBlock(byte*, size_t, unsigned int);
#endif
/////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////
NAMESPACE_BEGIN(CryptoPP)
#if ALL_RDRAND_INTRIN_AVAILABLE
static int ALL_RRI_GenerateBlock(byte *output, size_t size, unsigned int safety)
{
assert((output && size) || !(output || size));
#if CRYPTOPP_BOOL_X64 || CRYTPOPP_BOOL_X32
word64 val;
#else
word32 val;
#endif
while (size >= sizeof(val))
{
#if CRYPTOPP_BOOL_X64 || CRYTPOPP_BOOL_X32
if (_rdrand64_step((word64*)output))
#else
if (_rdrand32_step((word32*)output))
#endif
{
output += sizeof(val);
size -= sizeof(val);
}
else
{
if (!safety--)
{
assert(0);
return 0;
}
}
}
if (size)
{
#if CRYPTOPP_BOOL_X64 || CRYTPOPP_BOOL_X32
if (_rdrand64_step(&val))
#else
if (_rdrand32_step(&val))
#endif
{
memcpy(output, &val, size);
size = 0;
}
else
{
if (!safety--)
{
assert(0);
return 0;
}
}
}
#if CRYPTOPP_BOOL_X64 || CRYTPOPP_BOOL_X32
*((volatile word64*)&val) = 0;
#else
*((volatile word32*)&val) = 0;
#endif
return int(size == 0);
}
#endif // ALL_RDRAND_INTRINSIC_AVAILABLE
#if GCC_RDRAND_ASM_AVAILABLE
static int GCC_RRA_GenerateBlock(byte *output, size_t size, unsigned int safety)
{
assert((output && size) || !(output || size));
#if CRYPTOPP_BOOL_X64 || CRYPTOPP_BOOL_X32
word64 val;
#else
word32 val;
#endif
char rc;
while (size)
{
__asm__ volatile(
#if CRYPTOPP_BOOL_X64 || CRYPTOPP_BOOL_X32
".byte 0x48, 0x0f, 0xc7, 0xf0;\n" // rdrand rax
#else
".byte 0x0f, 0xc7, 0xf0;\n" // rdrand eax
#endif
"setc %1; "
: "=a" (val), "=qm" (rc)
:
: "cc"
);
if (rc)
{
if (size >= sizeof(val))
{
#if defined(CRYPTOPP_ALLOW_UNALIGNED_DATA_ACCESS) && (CRYPTOPP_BOOL_X64 || CRYPTOPP_BOOL_X32)
*((word64*)output) = val;
#elif defined(CRYPTOPP_ALLOW_UNALIGNED_DATA_ACCESS) && (CRYPTOPP_BOOL_X86)
*((word32*)output) = val;
#else
memcpy(output, &val, sizeof(val));
#endif
output += sizeof(val);
size -= sizeof(val);
}
else
{
memcpy(output, &val, size);
size = 0;
}
}
else
{
if (!safety--)
{
assert(0);
return 0;
}
}
}
#if CRYPTOPP_BOOL_X64 || CRYPTOPP_BOOL_X32
*((volatile word64*)&val) = 0;
#else
*((volatile word32*)&val) = 0;
#endif
return int(size == 0);
}
#endif // GCC_RDRAND_ASM_AVAILABLE
#if (CRYPTOPP_BOOL_X86 || CRYPTOPP_BOOL_X32 || CRYPTOPP_BOOL_X64)
void RDRAND::GenerateBlock(byte *output, size_t size)
{
CRYPTOPP_UNUSED(output), CRYPTOPP_UNUSED(size);
assert((output && size) || !(output || size));
if(!HasRDRAND())
throw NotImplemented("RDRAND: rdrand is not available on this platform");
int rc; CRYPTOPP_UNUSED(rc);
#if MASM_RDRAND_ASM_AVAILABLE
rc = MASM_RRA_GenerateBlock(output, size, m_retries);
if (!rc) { throw RDRAND_Err("MASM_RRA_GenerateBlock"); }
#elif NASM_RDRAND_ASM_AVAILABLE
rc = NASM_RRA_GenerateBlock(output, size, m_retries);
if (!rc) { throw RDRAND_Err("NASM_RRA_GenerateBlock"); }
#elif ALL_RDRAND_INTRIN_AVAILABLE
rc = ALL_RRI_GenerateBlock(output, size, m_retries);
if (!rc) { throw RDRAND_Err("ALL_RRI_GenerateBlock"); }
#elif GCC_RDRAND_ASM_AVAILABLE
rc = GCC_RRA_GenerateBlock(output, size, m_retries);
if (!rc) { throw RDRAND_Err("GCC_RRA_GenerateBlock"); }
#else
// RDRAND not detected at compile time, and no suitable compiler found
throw NotImplemented("RDRAND: failed to find a suitable implementation???");
#endif // CRYPTOPP_CPUID_AVAILABLE
}
void RDRAND::DiscardBytes(size_t n)
{
// RoundUpToMultipleOf is used because a full word is read, and its cheaper
// to discard full words. There's no sense in dealing with tail bytes.
assert(HasRDRAND());
#if CRYPTOPP_BOOL_X64 || CRYPTOPP_BOOL_X32
FixedSizeSecBlock<word64, 16> discard;
n = RoundUpToMultipleOf(n, sizeof(word64));
#else
FixedSizeSecBlock<word32, 16> discard;
n = RoundUpToMultipleOf(n, sizeof(word32));
#endif
size_t count = STDMIN(n, discard.SizeInBytes());
while (count)
{
GenerateBlock(discard.BytePtr(), count);
n -= count;
count = STDMIN(n, discard.SizeInBytes());
}
}
#endif // CRYPTOPP_BOOL_X86 || CRYPTOPP_BOOL_X32 || CRYPTOPP_BOOL_X64
/////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////
#if ALL_RDSEED_INTRIN_AVAILABLE
static int ALL_RSI_GenerateBlock(byte *output, size_t size, unsigned int safety)
{
assert((output && size) || !(output || size));
#if CRYPTOPP_BOOL_X64 || CRYPTOPP_BOOL_X32
word64 val;
#else
word32 val;
#endif
while (size >= sizeof(val))
{
#if CRYPTOPP_BOOL_X64 || CRYPTOPP_BOOL_X32
if (_rdseed64_step((word64*)output))
#else
if (_rdseed32_step((word32*)output))
#endif
{
output += sizeof(val);
size -= sizeof(val);
}
else
{
if (!safety--)
{
assert(0);
return 0;
}
}
}
if (size)
{
#if CRYPTOPP_BOOL_X64 || CRYPTOPP_BOOL_X32
if (_rdseed64_step(&val))
#else
if (_rdseed32_step(&val))
#endif
{
memcpy(output, &val, size);
size = 0;
}
else
{
if (!safety--)
{
assert(0);
return 0;
}
}
}
#if CRYPTOPP_BOOL_X64 || CRYPTOPP_BOOL_X32
*((volatile word64*)&val) = 0;
#else
*((volatile word32*)&val) = 0;
#endif
return int(size == 0);
}
#endif // ALL_RDSEED_INTRIN_AVAILABLE
#if GCC_RDSEED_ASM_AVAILABLE
static int GCC_RSA_GenerateBlock(byte *output, size_t size, unsigned int safety)
{
assert((output && size) || !(output || size));
#if CRYPTOPP_BOOL_X64 || CRYPTOPP_BOOL_X32
word64 val;
#else
word32 val;
#endif
char rc;
while (size)
{
__asm__ volatile(
#if CRYPTOPP_BOOL_X64 || CRYPTOPP_BOOL_X32
".byte 0x48, 0x0f, 0xc7, 0xf8;\n" // rdseed rax
#else
".byte 0x0f, 0xc7, 0xf8;\n" // rdseed eax
#endif
"setc %1; "
: "=a" (val), "=qm" (rc)
:
: "cc"
);
if (rc)
{
if (size >= sizeof(val))
{
#if defined(CRYPTOPP_ALLOW_UNALIGNED_DATA_ACCESS) && (CRYPTOPP_BOOL_X64 || CRYPTOPP_BOOL_X32)
*((word64*)output) = val;
#elif defined(CRYPTOPP_ALLOW_UNALIGNED_DATA_ACCESS) && (CRYPTOPP_BOOL_X86)
*((word32*)output) = val;
#else
memcpy(output, &val, sizeof(val));
#endif
output += sizeof(val);
size -= sizeof(val);
}
else
{
memcpy(output, &val, size);
size = 0;
}
}
else
{
if (!safety--)
{
assert(0);
return 0;
}
}
}
#if CRYPTOPP_BOOL_X64 || CRYPTOPP_BOOL_X32
*((volatile word64*)&val) = 0;
#else
*((volatile word32*)&val) = 0;
#endif
return int(size == 0);
}
#endif // GCC_RDSEED_ASM_AVAILABLE
#if (CRYPTOPP_BOOL_X86 || CRYPTOPP_BOOL_X32 || CRYPTOPP_BOOL_X64)
void RDSEED::GenerateBlock(byte *output, size_t size)
{
CRYPTOPP_UNUSED(output), CRYPTOPP_UNUSED(size);
assert((output && size) || !(output || size));
if(!HasRDSEED())
throw NotImplemented("RDSEED: rdseed is not available on this platform");
int rc; CRYPTOPP_UNUSED(rc);
#if MASM_RDSEED_ASM_AVAILABLE
rc = MASM_RSA_GenerateBlock(output, size, m_retries);
if (!rc) { throw RDSEED_Err("MASM_RSA_GenerateBlock"); }
#elif NASM_RDSEED_ASM_AVAILABLE
rc = NASM_RSA_GenerateBlock(output, size, m_retries);
if (!rc) { throw RDRAND_Err("NASM_RSA_GenerateBlock"); }
#elif ALL_RDSEED_INTRIN_AVAILABLE
rc = ALL_RSI_GenerateBlock(output, size, m_retries);
if (!rc) { throw RDSEED_Err("ALL_RSI_GenerateBlock"); }
#elif GCC_RDSEED_ASM_AVAILABLE
rc = GCC_RSA_GenerateBlock(output, size, m_retries);
if (!rc) { throw RDSEED_Err("GCC_RSA_GenerateBlock"); }
#else
// RDSEED not detected at compile time, and no suitable compiler found
throw NotImplemented("RDSEED: failed to find a suitable implementation???");
#endif
}
void RDSEED::DiscardBytes(size_t n)
{
// RoundUpToMultipleOf is used because a full word is read, and its cheaper
// to discard full words. There's no sense in dealing with tail bytes.
assert(HasRDSEED());
#if CRYPTOPP_BOOL_X64 || CRYPTOPP_BOOL_X32
FixedSizeSecBlock<word64, 16> discard;
n = RoundUpToMultipleOf(n, sizeof(word64));
#else
FixedSizeSecBlock<word32, 16> discard;
n = RoundUpToMultipleOf(n, sizeof(word32));
#endif
size_t count = STDMIN(n, discard.SizeInBytes());
while (count)
{
GenerateBlock(discard.BytePtr(), count);
n -= count;
count = STDMIN(n, discard.SizeInBytes());
}
}
#endif // CRYPTOPP_BOOL_X86 || CRYPTOPP_BOOL_X32 || CRYPTOPP_BOOL_X64
NAMESPACE_END
| [
"[email protected]"
] | |
fad715a5a293a0c74982875f9a4f7ffa3da53c8d | cbceb145696c06c7b846c6b200d2f4f576469e72 | /Engine/thirdparty/openal-soft/al/effects/vmorpher.cpp | e26c6fe31deff9dad6f1a3055a86c2c2e2921e99 | [
"BSD-3-Clause",
"LGPL-2.0-or-later",
"LicenseRef-scancode-warranty-disclaimer",
"GPL-1.0-or-later",
"GPL-2.0-only",
"LicenseRef-scancode-other-copyleft",
"LGPL-2.0-only",
"MIT"
] | permissive | Try/Tempest | 21094a9aa3237017d1d9c083ba06afb93746ccca | f253babf23995c4261003777c54dd3b476819311 | refs/heads/master | 2023-09-03T13:14:37.928111 | 2023-08-31T22:32:45 | 2023-08-31T22:32:45 | 153,023,028 | 60 | 14 | MIT | 2023-04-24T20:52:06 | 2018-10-14T22:01:34 | C++ | UTF-8 | C++ | false | false | 17,233 | cpp |
#include "config.h"
#include <stdexcept>
#include "AL/al.h"
#include "AL/efx.h"
#include "alc/effects/base.h"
#include "aloptional.h"
#include "effects.h"
#ifdef ALSOFT_EAX
#include <cassert>
#include "alnumeric.h"
#include "al/eax/exception.h"
#include "al/eax/utils.h"
#endif // ALSOFT_EAX
namespace {
al::optional<VMorpherPhenome> PhenomeFromEnum(ALenum val)
{
#define HANDLE_PHENOME(x) case AL_VOCAL_MORPHER_PHONEME_ ## x: \
return VMorpherPhenome::x
switch(val)
{
HANDLE_PHENOME(A);
HANDLE_PHENOME(E);
HANDLE_PHENOME(I);
HANDLE_PHENOME(O);
HANDLE_PHENOME(U);
HANDLE_PHENOME(AA);
HANDLE_PHENOME(AE);
HANDLE_PHENOME(AH);
HANDLE_PHENOME(AO);
HANDLE_PHENOME(EH);
HANDLE_PHENOME(ER);
HANDLE_PHENOME(IH);
HANDLE_PHENOME(IY);
HANDLE_PHENOME(UH);
HANDLE_PHENOME(UW);
HANDLE_PHENOME(B);
HANDLE_PHENOME(D);
HANDLE_PHENOME(F);
HANDLE_PHENOME(G);
HANDLE_PHENOME(J);
HANDLE_PHENOME(K);
HANDLE_PHENOME(L);
HANDLE_PHENOME(M);
HANDLE_PHENOME(N);
HANDLE_PHENOME(P);
HANDLE_PHENOME(R);
HANDLE_PHENOME(S);
HANDLE_PHENOME(T);
HANDLE_PHENOME(V);
HANDLE_PHENOME(Z);
}
return al::nullopt;
#undef HANDLE_PHENOME
}
ALenum EnumFromPhenome(VMorpherPhenome phenome)
{
#define HANDLE_PHENOME(x) case VMorpherPhenome::x: return AL_VOCAL_MORPHER_PHONEME_ ## x
switch(phenome)
{
HANDLE_PHENOME(A);
HANDLE_PHENOME(E);
HANDLE_PHENOME(I);
HANDLE_PHENOME(O);
HANDLE_PHENOME(U);
HANDLE_PHENOME(AA);
HANDLE_PHENOME(AE);
HANDLE_PHENOME(AH);
HANDLE_PHENOME(AO);
HANDLE_PHENOME(EH);
HANDLE_PHENOME(ER);
HANDLE_PHENOME(IH);
HANDLE_PHENOME(IY);
HANDLE_PHENOME(UH);
HANDLE_PHENOME(UW);
HANDLE_PHENOME(B);
HANDLE_PHENOME(D);
HANDLE_PHENOME(F);
HANDLE_PHENOME(G);
HANDLE_PHENOME(J);
HANDLE_PHENOME(K);
HANDLE_PHENOME(L);
HANDLE_PHENOME(M);
HANDLE_PHENOME(N);
HANDLE_PHENOME(P);
HANDLE_PHENOME(R);
HANDLE_PHENOME(S);
HANDLE_PHENOME(T);
HANDLE_PHENOME(V);
HANDLE_PHENOME(Z);
}
throw std::runtime_error{"Invalid phenome: "+std::to_string(static_cast<int>(phenome))};
#undef HANDLE_PHENOME
}
al::optional<VMorpherWaveform> WaveformFromEmum(ALenum value)
{
switch(value)
{
case AL_VOCAL_MORPHER_WAVEFORM_SINUSOID: return VMorpherWaveform::Sinusoid;
case AL_VOCAL_MORPHER_WAVEFORM_TRIANGLE: return VMorpherWaveform::Triangle;
case AL_VOCAL_MORPHER_WAVEFORM_SAWTOOTH: return VMorpherWaveform::Sawtooth;
}
return al::nullopt;
}
ALenum EnumFromWaveform(VMorpherWaveform type)
{
switch(type)
{
case VMorpherWaveform::Sinusoid: return AL_VOCAL_MORPHER_WAVEFORM_SINUSOID;
case VMorpherWaveform::Triangle: return AL_VOCAL_MORPHER_WAVEFORM_TRIANGLE;
case VMorpherWaveform::Sawtooth: return AL_VOCAL_MORPHER_WAVEFORM_SAWTOOTH;
}
throw std::runtime_error{"Invalid vocal morpher waveform: " +
std::to_string(static_cast<int>(type))};
}
void Vmorpher_setParami(EffectProps *props, ALenum param, int val)
{
switch(param)
{
case AL_VOCAL_MORPHER_PHONEMEA:
if(auto phenomeopt = PhenomeFromEnum(val))
props->Vmorpher.PhonemeA = *phenomeopt;
else
throw effect_exception{AL_INVALID_VALUE, "Vocal morpher phoneme-a out of range: 0x%04x", val};
break;
case AL_VOCAL_MORPHER_PHONEMEA_COARSE_TUNING:
if(!(val >= AL_VOCAL_MORPHER_MIN_PHONEMEA_COARSE_TUNING && val <= AL_VOCAL_MORPHER_MAX_PHONEMEA_COARSE_TUNING))
throw effect_exception{AL_INVALID_VALUE, "Vocal morpher phoneme-a coarse tuning out of range"};
props->Vmorpher.PhonemeACoarseTuning = val;
break;
case AL_VOCAL_MORPHER_PHONEMEB:
if(auto phenomeopt = PhenomeFromEnum(val))
props->Vmorpher.PhonemeB = *phenomeopt;
else
throw effect_exception{AL_INVALID_VALUE, "Vocal morpher phoneme-b out of range: 0x%04x", val};
break;
case AL_VOCAL_MORPHER_PHONEMEB_COARSE_TUNING:
if(!(val >= AL_VOCAL_MORPHER_MIN_PHONEMEB_COARSE_TUNING && val <= AL_VOCAL_MORPHER_MAX_PHONEMEB_COARSE_TUNING))
throw effect_exception{AL_INVALID_VALUE, "Vocal morpher phoneme-b coarse tuning out of range"};
props->Vmorpher.PhonemeBCoarseTuning = val;
break;
case AL_VOCAL_MORPHER_WAVEFORM:
if(auto formopt = WaveformFromEmum(val))
props->Vmorpher.Waveform = *formopt;
else
throw effect_exception{AL_INVALID_VALUE, "Vocal morpher waveform out of range: 0x%04x", val};
break;
default:
throw effect_exception{AL_INVALID_ENUM, "Invalid vocal morpher integer property 0x%04x",
param};
}
}
void Vmorpher_setParamiv(EffectProps*, ALenum param, const int*)
{
throw effect_exception{AL_INVALID_ENUM, "Invalid vocal morpher integer-vector property 0x%04x",
param};
}
void Vmorpher_setParamf(EffectProps *props, ALenum param, float val)
{
switch(param)
{
case AL_VOCAL_MORPHER_RATE:
if(!(val >= AL_VOCAL_MORPHER_MIN_RATE && val <= AL_VOCAL_MORPHER_MAX_RATE))
throw effect_exception{AL_INVALID_VALUE, "Vocal morpher rate out of range"};
props->Vmorpher.Rate = val;
break;
default:
throw effect_exception{AL_INVALID_ENUM, "Invalid vocal morpher float property 0x%04x",
param};
}
}
void Vmorpher_setParamfv(EffectProps *props, ALenum param, const float *vals)
{ Vmorpher_setParamf(props, param, vals[0]); }
void Vmorpher_getParami(const EffectProps *props, ALenum param, int* val)
{
switch(param)
{
case AL_VOCAL_MORPHER_PHONEMEA:
*val = EnumFromPhenome(props->Vmorpher.PhonemeA);
break;
case AL_VOCAL_MORPHER_PHONEMEA_COARSE_TUNING:
*val = props->Vmorpher.PhonemeACoarseTuning;
break;
case AL_VOCAL_MORPHER_PHONEMEB:
*val = EnumFromPhenome(props->Vmorpher.PhonemeB);
break;
case AL_VOCAL_MORPHER_PHONEMEB_COARSE_TUNING:
*val = props->Vmorpher.PhonemeBCoarseTuning;
break;
case AL_VOCAL_MORPHER_WAVEFORM:
*val = EnumFromWaveform(props->Vmorpher.Waveform);
break;
default:
throw effect_exception{AL_INVALID_ENUM, "Invalid vocal morpher integer property 0x%04x",
param};
}
}
void Vmorpher_getParamiv(const EffectProps*, ALenum param, int*)
{
throw effect_exception{AL_INVALID_ENUM, "Invalid vocal morpher integer-vector property 0x%04x",
param};
}
void Vmorpher_getParamf(const EffectProps *props, ALenum param, float *val)
{
switch(param)
{
case AL_VOCAL_MORPHER_RATE:
*val = props->Vmorpher.Rate;
break;
default:
throw effect_exception{AL_INVALID_ENUM, "Invalid vocal morpher float property 0x%04x",
param};
}
}
void Vmorpher_getParamfv(const EffectProps *props, ALenum param, float *vals)
{ Vmorpher_getParamf(props, param, vals); }
EffectProps genDefaultProps() noexcept
{
EffectProps props{};
props.Vmorpher.Rate = AL_VOCAL_MORPHER_DEFAULT_RATE;
props.Vmorpher.PhonemeA = *PhenomeFromEnum(AL_VOCAL_MORPHER_DEFAULT_PHONEMEA);
props.Vmorpher.PhonemeB = *PhenomeFromEnum(AL_VOCAL_MORPHER_DEFAULT_PHONEMEB);
props.Vmorpher.PhonemeACoarseTuning = AL_VOCAL_MORPHER_DEFAULT_PHONEMEA_COARSE_TUNING;
props.Vmorpher.PhonemeBCoarseTuning = AL_VOCAL_MORPHER_DEFAULT_PHONEMEB_COARSE_TUNING;
props.Vmorpher.Waveform = *WaveformFromEmum(AL_VOCAL_MORPHER_DEFAULT_WAVEFORM);
return props;
}
} // namespace
DEFINE_ALEFFECT_VTABLE(Vmorpher);
const EffectProps VmorpherEffectProps{genDefaultProps()};
#ifdef ALSOFT_EAX
namespace {
class EaxVocalMorpherEffectException : public EaxException {
public:
explicit EaxVocalMorpherEffectException(const char* message)
: EaxException{"EAX_VOCAL_MORPHER_EFFECT", message}
{}
}; // EaxVocalMorpherEffectException
class EaxVocalMorpherEffect final : public EaxEffect4<EaxVocalMorpherEffectException, EAXVOCALMORPHERPROPERTIES> {
public:
EaxVocalMorpherEffect(int eax_version);
private:
struct PhonemeAValidator {
void operator()(unsigned long ulPhonemeA) const
{
eax_validate_range<Exception>(
"Phoneme A",
ulPhonemeA,
EAXVOCALMORPHER_MINPHONEMEA,
EAXVOCALMORPHER_MAXPHONEMEA);
}
}; // PhonemeAValidator
struct PhonemeACoarseTuningValidator {
void operator()(long lPhonemeACoarseTuning) const
{
eax_validate_range<Exception>(
"Phoneme A Coarse Tuning",
lPhonemeACoarseTuning,
EAXVOCALMORPHER_MINPHONEMEACOARSETUNING,
EAXVOCALMORPHER_MAXPHONEMEACOARSETUNING);
}
}; // PhonemeACoarseTuningValidator
struct PhonemeBValidator {
void operator()(unsigned long ulPhonemeB) const
{
eax_validate_range<Exception>(
"Phoneme B",
ulPhonemeB,
EAXVOCALMORPHER_MINPHONEMEB,
EAXVOCALMORPHER_MAXPHONEMEB);
}
}; // PhonemeBValidator
struct PhonemeBCoarseTuningValidator {
void operator()(long lPhonemeBCoarseTuning) const
{
eax_validate_range<Exception>(
"Phoneme B Coarse Tuning",
lPhonemeBCoarseTuning,
EAXVOCALMORPHER_MINPHONEMEBCOARSETUNING,
EAXVOCALMORPHER_MAXPHONEMEBCOARSETUNING);
}
}; // PhonemeBCoarseTuningValidator
struct WaveformValidator {
void operator()(unsigned long ulWaveform) const
{
eax_validate_range<Exception>(
"Waveform",
ulWaveform,
EAXVOCALMORPHER_MINWAVEFORM,
EAXVOCALMORPHER_MAXWAVEFORM);
}
}; // WaveformValidator
struct RateValidator {
void operator()(float flRate) const
{
eax_validate_range<Exception>(
"Rate",
flRate,
EAXVOCALMORPHER_MINRATE,
EAXVOCALMORPHER_MAXRATE);
}
}; // RateValidator
struct AllValidator {
void operator()(const Props& all) const
{
PhonemeAValidator{}(all.ulPhonemeA);
PhonemeACoarseTuningValidator{}(all.lPhonemeACoarseTuning);
PhonemeBValidator{}(all.ulPhonemeB);
PhonemeBCoarseTuningValidator{}(all.lPhonemeBCoarseTuning);
WaveformValidator{}(all.ulWaveform);
RateValidator{}(all.flRate);
}
}; // AllValidator
void set_defaults(Props& props) override;
void set_efx_phoneme_a();
void set_efx_phoneme_a_coarse_tuning() noexcept;
void set_efx_phoneme_b();
void set_efx_phoneme_b_coarse_tuning() noexcept;
void set_efx_waveform();
void set_efx_rate() noexcept;
void set_efx_defaults() override;
void get(const EaxCall& call, const Props& props) override;
void set(const EaxCall& call, Props& props) override;
bool commit_props(const Props& props) override;
}; // EaxVocalMorpherEffect
EaxVocalMorpherEffect::EaxVocalMorpherEffect(int eax_version)
: EaxEffect4{AL_EFFECT_VOCAL_MORPHER, eax_version}
{}
void EaxVocalMorpherEffect::set_defaults(Props& props)
{
props.ulPhonemeA = EAXVOCALMORPHER_DEFAULTPHONEMEA;
props.lPhonemeACoarseTuning = EAXVOCALMORPHER_DEFAULTPHONEMEACOARSETUNING;
props.ulPhonemeB = EAXVOCALMORPHER_DEFAULTPHONEMEB;
props.lPhonemeBCoarseTuning = EAXVOCALMORPHER_DEFAULTPHONEMEBCOARSETUNING;
props.ulWaveform = EAXVOCALMORPHER_DEFAULTWAVEFORM;
props.flRate = EAXVOCALMORPHER_DEFAULTRATE;
}
void EaxVocalMorpherEffect::set_efx_phoneme_a()
{
const auto phoneme_a = clamp(
static_cast<ALint>(props_.ulPhonemeA),
AL_VOCAL_MORPHER_MIN_PHONEMEA,
AL_VOCAL_MORPHER_MAX_PHONEMEA);
const auto efx_phoneme_a = PhenomeFromEnum(phoneme_a);
assert(efx_phoneme_a.has_value());
al_effect_props_.Vmorpher.PhonemeA = *efx_phoneme_a;
}
void EaxVocalMorpherEffect::set_efx_phoneme_a_coarse_tuning() noexcept
{
const auto phoneme_a_coarse_tuning = clamp(
static_cast<ALint>(props_.lPhonemeACoarseTuning),
AL_VOCAL_MORPHER_MIN_PHONEMEA_COARSE_TUNING,
AL_VOCAL_MORPHER_MAX_PHONEMEA_COARSE_TUNING);
al_effect_props_.Vmorpher.PhonemeACoarseTuning = phoneme_a_coarse_tuning;
}
void EaxVocalMorpherEffect::set_efx_phoneme_b()
{
const auto phoneme_b = clamp(
static_cast<ALint>(props_.ulPhonemeB),
AL_VOCAL_MORPHER_MIN_PHONEMEB,
AL_VOCAL_MORPHER_MAX_PHONEMEB);
const auto efx_phoneme_b = PhenomeFromEnum(phoneme_b);
assert(efx_phoneme_b.has_value());
al_effect_props_.Vmorpher.PhonemeB = *efx_phoneme_b;
}
void EaxVocalMorpherEffect::set_efx_phoneme_b_coarse_tuning() noexcept
{
al_effect_props_.Vmorpher.PhonemeBCoarseTuning = clamp(
static_cast<ALint>(props_.lPhonemeBCoarseTuning),
AL_VOCAL_MORPHER_MIN_PHONEMEB_COARSE_TUNING,
AL_VOCAL_MORPHER_MAX_PHONEMEB_COARSE_TUNING);
}
void EaxVocalMorpherEffect::set_efx_waveform()
{
const auto waveform = clamp(
static_cast<ALint>(props_.ulWaveform),
AL_VOCAL_MORPHER_MIN_WAVEFORM,
AL_VOCAL_MORPHER_MAX_WAVEFORM);
const auto wfx_waveform = WaveformFromEmum(waveform);
assert(wfx_waveform.has_value());
al_effect_props_.Vmorpher.Waveform = *wfx_waveform;
}
void EaxVocalMorpherEffect::set_efx_rate() noexcept
{
al_effect_props_.Vmorpher.Rate = clamp(
props_.flRate,
AL_VOCAL_MORPHER_MIN_RATE,
AL_VOCAL_MORPHER_MAX_RATE);
}
void EaxVocalMorpherEffect::set_efx_defaults()
{
set_efx_phoneme_a();
set_efx_phoneme_a_coarse_tuning();
set_efx_phoneme_b();
set_efx_phoneme_b_coarse_tuning();
set_efx_waveform();
set_efx_rate();
}
void EaxVocalMorpherEffect::get(const EaxCall& call, const Props& props)
{
switch(call.get_property_id())
{
case EAXVOCALMORPHER_NONE:
break;
case EAXVOCALMORPHER_ALLPARAMETERS:
call.set_value<Exception>(props);
break;
case EAXVOCALMORPHER_PHONEMEA:
call.set_value<Exception>(props.ulPhonemeA);
break;
case EAXVOCALMORPHER_PHONEMEACOARSETUNING:
call.set_value<Exception>(props.lPhonemeACoarseTuning);
break;
case EAXVOCALMORPHER_PHONEMEB:
call.set_value<Exception>(props.ulPhonemeB);
break;
case EAXVOCALMORPHER_PHONEMEBCOARSETUNING:
call.set_value<Exception>(props.lPhonemeBCoarseTuning);
break;
case EAXVOCALMORPHER_WAVEFORM:
call.set_value<Exception>(props.ulWaveform);
break;
case EAXVOCALMORPHER_RATE:
call.set_value<Exception>(props.flRate);
break;
default:
fail_unknown_property_id();
}
}
void EaxVocalMorpherEffect::set(const EaxCall& call, Props& props)
{
switch(call.get_property_id())
{
case EAXVOCALMORPHER_NONE:
break;
case EAXVOCALMORPHER_ALLPARAMETERS:
defer<AllValidator>(call, props);
break;
case EAXVOCALMORPHER_PHONEMEA:
defer<PhonemeAValidator>(call, props.ulPhonemeA);
break;
case EAXVOCALMORPHER_PHONEMEACOARSETUNING:
defer<PhonemeACoarseTuningValidator>(call, props.lPhonemeACoarseTuning);
break;
case EAXVOCALMORPHER_PHONEMEB:
defer<PhonemeBValidator>(call, props.ulPhonemeB);
break;
case EAXVOCALMORPHER_PHONEMEBCOARSETUNING:
defer<PhonemeBCoarseTuningValidator>(call, props.lPhonemeBCoarseTuning);
break;
case EAXVOCALMORPHER_WAVEFORM:
defer<WaveformValidator>(call, props.ulWaveform);
break;
case EAXVOCALMORPHER_RATE:
defer<RateValidator>(call, props.flRate);
break;
default:
fail_unknown_property_id();
}
}
bool EaxVocalMorpherEffect::commit_props(const Props& props)
{
auto is_dirty = false;
if (props_.ulPhonemeA != props.ulPhonemeA)
{
is_dirty = true;
set_efx_phoneme_a();
}
if (props_.lPhonemeACoarseTuning != props.lPhonemeACoarseTuning)
{
is_dirty = true;
set_efx_phoneme_a_coarse_tuning();
}
if (props_.ulPhonemeB != props.ulPhonemeB)
{
is_dirty = true;
set_efx_phoneme_b();
}
if (props_.lPhonemeBCoarseTuning != props.lPhonemeBCoarseTuning)
{
is_dirty = true;
set_efx_phoneme_b_coarse_tuning();
}
if (props_.ulWaveform != props.ulWaveform)
{
is_dirty = true;
set_efx_waveform();
}
if (props_.flRate != props.flRate)
{
is_dirty = true;
set_efx_rate();
}
return is_dirty;
}
} // namespace
EaxEffectUPtr eax_create_eax_vocal_morpher_effect(int eax_version)
{
return eax_create_eax4_effect<EaxVocalMorpherEffect>(eax_version);
}
#endif // ALSOFT_EAX
| [
"[email protected]"
] | |
58f78dd6b8974bdf9e2e1c465f47770d80fc636d | b93947d283c77a025bdb447f4daa299b251f2f2d | /155_minimum-depth-of-binary-tree/minimum-depth-of-binary-tree.cpp | aa37910417a28ac66c3fd1610bb33fe832cdce4a | [] | no_license | JasonLin6086/Lintcode | 6abf7173be7b96d29d7171429d8e0beee5e0a9c2 | 02e022ed6054ede9aca209a28af48c334ab655dd | refs/heads/master | 2020-04-06T07:11:43.189562 | 2016-09-10T20:15:28 | 2016-09-10T20:15:28 | 65,408,474 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 881 | cpp | /*
@Copyright:LintCode
@Author: jerhaulin
@Problem: http://www.lintcode.com/problem/minimum-depth-of-binary-tree
@Language: C++
@Datetime: 16-07-15 16:22
*/
/**
* Definition of TreeNode:
* class TreeNode {
* public:
* int val;
* TreeNode *left, *right;
* TreeNode(int val) {
* this->val = val;
* this->left = this->right = NULL;
* }
* }
*/
class Solution {
public:
/**
* @param root: The root of binary tree.
* @return: An integer
*/
int minDepth(TreeNode *root) {
// write your code here
if (!root) return 0;
if (!root->left && !root->right) {
return 1;
}
int lmin = minDepth(root->left);
int rmin = minDepth(root->right);
if (lmin == 0) lmin = INT_MAX;
else if (rmin == 0) rmin = INT_MAX;
return min(lmin, rmin) + 1;
}
}; | [
"[email protected]"
] | |
f998aaa13ad29be83c8d58f4026a8258f135bc11 | b581675ebe3633ea7d6e63ac7898335dc4dcd28c | /chef/JOHNY.cpp | f8bafa326040ffd2139c69c656e5e2e4966fcfb3 | [] | no_license | udit043/little_bit_competitive | c219c1d77a48c87ac4b8384c5c09fdacbd1fe8c2 | b54279e75c54337bd4d89f9a44489bf8ad00635b | refs/heads/master | 2021-07-12T18:43:29.056528 | 2021-05-29T12:17:30 | 2021-05-29T12:17:30 | 86,187,789 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 463 | cpp | #include <bits/stdc++.h>
using namespace std;
#define sd(x) scanf("%d", &x)
#define sll(x) scanf("%lld", &x)
#define ll long long
ll a[101];
int main()
{
int t;
sd(t);
while(t--)
{
memset(a, 0, sizeof(a));
int k, n, i, j, index;
sd(n);
for(i=0; i<n; ++i)
sll(a[i]);
sd(k);
j = a[k-1];
sort(a,a+n);
index = distance(a, find(a, a + n, j));
cout << ++index << "\n";
}
return 0;
}
/*
3
4
1 3 4 2
2
5
1 2 3 9 4
5
5
1 2 3 9 4
1
3
4
1
*/ | [
"[email protected]"
] | |
8c0dd4f3838a4a29236867d80a6ddf541f746a7b | 3edacf4da87b78d6dddb2150430cc1f070bfc072 | /include/utils.h | f91ef1f087ccb9fb9eaca3fd28a229c074a18893 | [] | no_license | SoloAs/rest_cpp | c8d3ee91b3eef30ab5e650573cec41df55d91ce8 | 3f8e2f2a923e1fddb24e7899c5aeec86ee5e4e1e | refs/heads/master | 2020-05-22T07:51:07.288195 | 2019-05-28T14:41:43 | 2019-05-28T14:41:43 | 186,270,829 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 467 | h | #include "CivetServer.h"
#include <nlohmann/json.hpp>
bool error(CivetServer *server, struct mg_connection *conn, unsigned int code, char const *description, char const *message);
bool success(CivetServer *server, struct mg_connection *conn, unsigned int code, char const *description, nlohmann::json body = NULL);
int get_request_body(struct mg_connection *conn, char *post_data, long long length);
std::string retrieve_id(const struct mg_request_info *params);
| [
"[email protected]"
] | |
869ff41ef49813a9c4ec56a7911ed41298354ddf | 110e86a4d47d90c67456c2b98f97f2afd5dc538b | /3 семестр/ООП/lab6G_clion/circle.hpp | 1dc230f2a0e83f3fd7bc7ef4c1b997d24c6cae2b | [] | no_license | Vory7/sibsutis | 11555ccc298d86be1ecb72e5296a0620db28ce0d | 0d144b61866195aee8b7d5b79ef721f433d5f915 | refs/heads/master | 2023-08-13T12:13:55.130272 | 2021-10-13T16:58:06 | 2021-10-13T16:58:06 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 543 | hpp | //
// Created by kchipson on 20.12.2019.
//
#ifndef CIRCLE_HPP
#define CIRCLE_HPP
#include <SFML/Graphics.hpp>
#include "point.hpp"
class Circle: public Point {
/* Поля */
public:
short int radius;
private:
sf::CircleShape circle;
/* Конструктор */
public:
Circle();
Circle(sf::RenderWindow* window, short int x = 0, short int y = 0, unsigned short int radius = 1);
/* Методы */
public:
void setRadius(unsigned short int radius = 1);
void straightMove();
void draw() ;
};
#endif // CIRCLE_HPP
| [
"[email protected]"
] | |
b194147445383509034640bc2607e8d897ee355c | 2be84248e1f705a11fd8621034e31d7d5a6c78c2 | /DuiLib/DuiLib/Control/UIProgress.cpp | 6e258250fdc843bd61ded7b19fa2b6b69478aa4b | [] | no_license | radtek/work-2 | c175d449c29eab31acaeb1cca4e7d3846cad42b8 | 6fc7ea61b604ad85fc7e39a9a0ac776976f395c6 | refs/heads/master | 2020-06-14T09:59:26.330565 | 2016-08-25T01:52:14 | 2016-08-25T01:52:14 | 194,975,166 | 1 | 1 | null | 2019-07-03T03:45:33 | 2019-07-03T03:45:33 | null | UTF-8 | C++ | false | false | 4,183 | cpp | #include "StdAfx.h"
#include "UIProgress.h"
namespace DuiLib
{
IMPLEMENT_DUICONTROL(CProgressUI)
CProgressUI::CProgressUI() : m_bShowText(false), m_bHorizontal(true), m_nMin(0), m_nMax(100), m_nValue(0), m_bStretchForeImage(true)
{
m_uTextStyle = DT_SINGLELINE | DT_CENTER;
SetFixedHeight(12);
}
LPCTSTR CProgressUI::GetClass() const
{
return _T("ProgressUI");
}
LPVOID CProgressUI::GetInterface(LPCTSTR pstrName)
{
if( _tcsicmp(pstrName, DUI_CTR_PROGRESS) == 0 ) return static_cast<CProgressUI*>(this);
return CLabelUI::GetInterface(pstrName);
}
bool CProgressUI::IsShowText()
{
return m_bShowText;
}
void CProgressUI::SetShowText(bool bShowText)
{
if( m_bShowText == bShowText ) return;
m_bShowText = bShowText;
if(!m_bShowText) SetText(_T(""));
}
bool CProgressUI::IsHorizontal()
{
return m_bHorizontal;
}
void CProgressUI::SetHorizontal(bool bHorizontal)
{
if( m_bHorizontal == bHorizontal ) return;
m_bHorizontal = bHorizontal;
Invalidate();
}
int CProgressUI::GetMinValue() const
{
return m_nMin;
}
void CProgressUI::SetMinValue(int nMin)
{
m_nMin = nMin;
Invalidate();
}
int CProgressUI::GetMaxValue() const
{
return m_nMax;
}
void CProgressUI::SetMaxValue(int nMax)
{
m_nMax = nMax;
Invalidate();
}
int CProgressUI::GetValue() const
{
return m_nValue;
}
void CProgressUI::SetValue(int nValue)
{
if(nValue == m_nValue || nValue<m_nMin || nValue > m_nMax) {
return;
}
m_nValue = nValue;
Invalidate();
UpdateText();
}
void CProgressUI::SetAttribute(LPCTSTR pstrName, LPCTSTR pstrValue)
{
if( _tcsicmp(pstrName, _T("hor")) == 0 ) SetHorizontal(_tcsicmp(pstrValue, _T("true")) == 0);
else if( _tcsicmp(pstrName, _T("min")) == 0 ) SetMinValue(_ttoi(pstrValue));
else if( _tcsicmp(pstrName, _T("max")) == 0 ) SetMaxValue(_ttoi(pstrValue));
else if( _tcsicmp(pstrName, _T("value")) == 0 ) SetValue(_ttoi(pstrValue));
else if( _tcsicmp(pstrName, _T("isstretchfore"))==0) SetStretchForeImage(_tcsicmp(pstrValue, _T("true")) == 0? true : false);
else CLabelUI::SetAttribute(pstrName, pstrValue);
}
void CProgressUI::PaintForeColor(HDC hDC)
{
if(m_dwForeColor == 0) return;
if( m_nMax <= m_nMin ) m_nMax = m_nMin + 1;
if( m_nValue > m_nMax ) m_nValue = m_nMax;
if( m_nValue < m_nMin ) m_nValue = m_nMin;
RECT rc = m_rcItem;
if( m_bHorizontal ) {
rc.right = m_rcItem.left + (m_nValue - m_nMin) * (m_rcItem.right - m_rcItem.left) / (m_nMax - m_nMin);
}
else {
rc.bottom = m_rcItem.top + (m_rcItem.bottom - m_rcItem.top) * (m_nMax - m_nValue) / (m_nMax - m_nMin);
}
CRenderEngine::DrawColor(hDC, rc, GetAdjustColor(m_dwForeColor));
}
void CProgressUI::PaintForeImage(HDC hDC)
{
if( m_nMax <= m_nMin ) m_nMax = m_nMin + 1;
if( m_nValue > m_nMax ) m_nValue = m_nMax;
if( m_nValue < m_nMin ) m_nValue = m_nMin;
RECT rc = {0};
if( m_bHorizontal ) {
rc.right = (m_nValue - m_nMin) * (m_rcItem.right - m_rcItem.left) / (m_nMax - m_nMin);
rc.bottom = m_rcItem.bottom - m_rcItem.top;
}
else {
rc.top = (m_rcItem.bottom - m_rcItem.top) * (m_nMax - m_nValue) / (m_nMax - m_nMin);
rc.right = m_rcItem.right - m_rcItem.left;
rc.bottom = m_rcItem.bottom - m_rcItem.top;
}
if( !m_sForeImage.IsEmpty() ) {
m_sForeImageModify.Empty();
if (m_bStretchForeImage)
m_sForeImageModify.SmallFormat(_T("dest='%d,%d,%d,%d'"), rc.left, rc.top, rc.right, rc.bottom);
else
m_sForeImageModify.SmallFormat(_T("dest='%d,%d,%d,%d' source='%d,%d,%d,%d'")
, rc.left, rc.top, rc.right, rc.bottom
, rc.left, rc.top, rc.right, rc.bottom);
if( !DrawImage(hDC, (LPCTSTR)m_sForeImage, (LPCTSTR)m_sForeImageModify) ) {}
else return;
}
}
bool CProgressUI::IsStretchForeImage()
{
return m_bStretchForeImage;
}
void CProgressUI::SetStretchForeImage( bool bStretchForeImage /*= true*/ )
{
if (m_bStretchForeImage==bStretchForeImage) return;
m_bStretchForeImage=bStretchForeImage;
Invalidate();
}
void CProgressUI::UpdateText()
{
if(m_bShowText) {
CDuiString sText;
sText.Format(_T("%.0f%%"), (m_nValue - m_nMin) * 100.0f / (m_nMax - m_nMin));
SetText(sText);
}
}
}
| [
"[email protected]"
] | |
cdda19d69065d4e75ea04615014613c6b4394c8d | a138d9eab9959b74773b5812e13665853ca4cdd4 | /msvis/MSVis/VisBuffer.cc | 7418cf71048f1873d35e7cb9cb5f1c97932730a8 | [] | no_license | JulienNGirard/LWimager-SASIR | 3abb43d1ba2b8e46f65933013a1795ea02141a01 | f4495972119c4e5fd1f418f0c480f55cb2d961fb | refs/heads/master | 2016-09-08T01:43:15.722917 | 2015-03-31T12:33:01 | 2015-03-31T12:33:01 | 33,013,851 | 1 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 63,236 | cc | //# VisBuffer.cc: buffer for iterating through MS in large blocks
//# Copyright (C) 1996,1997,1998,1999,2000,2002,2003
//# Associated Universities, Inc. Washington DC, USA.
//#
//# This library is free software; you can redistribute it and/or modify it
//# under the terms of the GNU Library General Public License as published by
//# the Free Software Foundation; either version 2 of the License, or (at your
//# option) any later version.
//#
//# This library is distributed in the hope that it will be useful, but WITHOUT
//# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
//# FITNESS FOR A PARTICULAR PURPOSE. See the GNU Library General Public
//# License for more details.
//#
//# You should have received a copy of the GNU Library General Public License
//# along with this library; if not, write to the Free Software Foundation,
//# Inc., 675 Massachusetts Ave, Cambridge, MA 02139, USA.
//#
//# Correspondence concerning AIPS++ should be addressed as follows:
//# Internet email: [email protected].
//# Postal address: AIPS++ Project Office
//# National Radio Astronomy Observatory
//# 520 Edgemont Road
//# Charlottesville, VA 22903-2475 USA
//#
//# $Id$
#include <msvis/MSVis/VisibilityIterator.h>
#include <msvis/MSVis/VisBuffer.h>
#include <casa/Arrays/ArrayMath.h>
#include <casa/Arrays/ArrayLogical.h>
#include <casa/Arrays/MaskedArray.h>
#include <casa/Arrays/MaskArrMath.h>
#include <casa/Arrays/ArrayUtil.h>
#include <casa/Utilities/Assert.h>
#include <casa/Utilities/GenSort.h>
#include <ms/MeasurementSets/MSColumns.h>
#define CheckVisIter() checkVisIter (__func__, __FILE__, __LINE__)
// For debugging; remove/comment-out when working
//#include "VLAT.h"
//#define Log(level, ...) \
// {if (VlaData::loggingInitialized_p && level <= VlaData::logLevel_p) \
// Logger::log (__VA_ARGS__);};
namespace casa { //# NAMESPACE CASA - BEGIN
VisBuffer::VisBuffer()
: corrSorted_p(False),
lastPointTableRow_p(0),
This(this),
twoWayConnection_p(False),
visIter_p(static_cast<ROVisibilityIterator *>(0))
{
invalidate();
oldMSId_p = -1;
}
VisBuffer::VisBuffer(ROVisibilityIterator & iter)
: This(this),
visIter_p(&iter)
{
iter.attachVisBuffer(*this);
twoWayConnection_p = True;
oldMSId_p = -1;
corrSorted_p = False;
}
VisBuffer::VisBuffer(const VisBuffer & vb)
: This(this),
visIter_p(static_cast<ROVisibilityIterator *>(0))
{
corrSorted_p = False;
operator=(vb);
}
VisBuffer & VisBuffer::operator=(const VisBuffer & other)
{
if (this != &other) {
assign(other);
oldMSId_p = -1;
}
return *this;
}
VisBuffer &
VisBuffer::assign(const VisBuffer & other, Bool copy)
{
if (other.corrSorted_p) {
throw(AipsError("Cannot assign a VisBuffer that has had correlations sorted!"));
}
if (this != &other) {
if (visIter_p != static_cast<ROVisibilityIterator *>(0) && twoWayConnection_p) {
visIter_p->detachVisBuffer(*this);
}
visIter_p = other.visIter_p;
oldMSId_p = other.oldMSId_p;
twoWayConnection_p = False;
if (visIter_p == static_cast<ROVisibilityIterator *>(0)) {
validate();
copyCache (other);
} else if (copy) {
copyCache (other);
} else {
invalidate();
}
}
return *this;
}
void
VisBuffer::copyCache (const VisBuffer & other)
{
// Copies cache status from the other VisBuffer and if the status is true
// then the cached values are copied over from the other VisBuffer as well.
// Keep in order so that finding omitted ones will be easier
// in the future
cacheCopyArray (antenna1OK_p, other.antenna1OK_p, antenna1_p, other.antenna1_p);
cacheCopyArray (antenna2OK_p, other.antenna2OK_p, antenna2_p, other.antenna2_p);
cacheCopyNormal (arrayIdOK_p, other.arrayIdOK_p, arrayId_p, other.arrayId_p);
////cacheCopyArray (chanAveBoundsOK_p, other.chanAveBoundsOK_p, chanAveBounds_p, other.chanAveBounds_p);
cacheCopyArray (channelOK_p, other.channelOK_p, channel_p, other.channel_p);
cacheCopyArray (cjonesOK_p, other.cjonesOK_p, cjones_p, other.cjones_p);
cacheCopyArray (correctedVisCubeOK_p, other.correctedVisCubeOK_p,
correctedVisCube_p, other.correctedVisCube_p);
cacheCopyArray (correctedVisibilityOK_p, other.correctedVisibilityOK_p,
correctedVisibility_p, other.correctedVisibility_p);
cacheCopyArray (corrTypeOK_p, other.corrTypeOK_p, corrType_p, other.corrType_p);
cacheCopyArray (direction1OK_p, other.direction1OK_p, direction1_p, other.direction1_p);
cacheCopyArray (direction2OK_p, other.direction2OK_p, direction2_p, other.direction2_p);
cacheCopyArray (exposureOK_p, other.exposureOK_p, exposure_p, other.exposure_p);
cacheCopyArray (feed1OK_p, other.feed1OK_p, feed1_p, other.feed1_p);
cacheCopyArray (feed1_paOK_p, other.feed1_paOK_p, feed1_pa_p, other.feed1_pa_p);
cacheCopyArray (feed2OK_p, other.feed2OK_p, feed2_p, other.feed2_p);
cacheCopyArray (feed2_paOK_p, other.feed2_paOK_p, feed2_pa_p, other.feed2_pa_p);
cacheCopyNormal (fieldIdOK_p, other.fieldIdOK_p, fieldId_p, other.fieldId_p);
cacheCopyArray (flagOK_p, other.flagOK_p, flag_p, other.flag_p);
cacheCopyArray (flagCategoryOK_p, other.flagCategoryOK_p, flagCategory_p, other.flagCategory_p);
cacheCopyArray (flagCubeOK_p, other.flagCubeOK_p, flagCube_p, other.flagCube_p);
cacheCopyArray (flagRowOK_p, other.flagRowOK_p, flagRow_p, other.flagRow_p);
cacheCopyArray (floatDataCubeOK_p, other.floatDataCubeOK_p, floatDataCube_p, other.floatDataCube_p);
cacheCopyArray (frequencyOK_p, other.frequencyOK_p, frequency_p, other.frequency_p);
cacheCopyArray (imagingWeightOK_p, other.imagingWeightOK_p, imagingWeight_p, other.imagingWeight_p);
cacheCopyArray (lsrFrequencyOK_p, other.lsrFrequencyOK_p, lsrFrequency_p, other.lsrFrequency_p);
cacheCopyArray (modelVisCubeOK_p, other.modelVisCubeOK_p, modelVisCube_p, other.modelVisCube_p);
cacheCopyArray (modelVisibilityOK_p, other.modelVisibilityOK_p,
modelVisibility_p, other.modelVisibility_p);
cacheCopyNormal (nChannelOK_p, other.nChannelOK_p, nChannel_p, other.nChannel_p);
cacheCopyNormal (nCorrOK_p, other.nCorrOK_p, nCorr_p, other.nCorr_p);
cacheCopyNormal (nRowOK_p, other.nRowOK_p, nRow_p, other.nRow_p);
cacheCopyArray (observationIdOK_p, other.observationIdOK_p, observationId_p, other.observationId_p);
cacheCopyNormal (phaseCenterOK_p, other.phaseCenterOK_p, phaseCenter_p, other.phaseCenter_p);
cacheCopyNormal (polFrameOK_p, other.polFrameOK_p, polFrame_p, other.polFrame_p);
cacheCopyArray (processorIdOK_p, other.processorIdOK_p, processorId_p, other.processorId_p);
cacheCopyArray (rowIdsOK_p, other.rowIdsOK_p, rowIds_p, other.rowIds_p);
cacheCopyArray (scanOK_p, other.scanOK_p, scan_p, other.scan_p);
cacheCopyArray (sigmaOK_p, other.sigmaOK_p, sigma_p, other.sigma_p);
cacheCopyArray (sigmaMatOK_p, other.sigmaMatOK_p, sigmaMat_p, other.sigmaMat_p);
cacheCopyNormal (spectralWindowOK_p, other.spectralWindowOK_p, spectralWindow_p, other.spectralWindow_p);
cacheCopyArray (stateIdOK_p, other.stateIdOK_p, stateId_p, other.stateId_p);
cacheCopyArray (timeOK_p, other.timeOK_p, time_p, other.time_p);
cacheCopyArray (timeCentroidOK_p, other.timeCentroidOK_p, timeCentroid_p, other.timeCentroid_p);
cacheCopyArray (timeIntervalOK_p, other.timeIntervalOK_p, timeInterval_p, other.timeInterval_p);
cacheCopyArray (uvwOK_p, other.uvwOK_p, uvw_p, other.uvw_p);
cacheCopyArray (uvwMatOK_p, other.uvwMatOK_p, uvwMat_p, other.uvwMat_p);
cacheCopyArray (visCubeOK_p, other.visCubeOK_p, visCube_p, other.visCube_p);
cacheCopyArray (visibilityOK_p, other.visibilityOK_p, visibility_p, other.visibility_p);
cacheCopyArray (weightOK_p, other.weightOK_p, weight_p, other.weight_p);
////cacheCopyArray (weightCubeOK_p, other.weightCubeOK_p, weightCube_p, other.weightCube_p);
cacheCopyArray (weightMatOK_p, other.weightMatOK_p, weightMat_p, other.weightMat_p);
cacheCopyArray (weightSpectrumOK_p, other.weightSpectrumOK_p,
weightSpectrum_p, other.weightSpectrum_p);
}
VisBuffer::~VisBuffer()
{
if (visIter_p != static_cast<ROVisibilityIterator *>(0) && twoWayConnection_p) {
visIter_p->detachVisBuffer(*this);
}
}
VisBuffer &
VisBuffer::operator-=(const VisBuffer & vb)
{
// check the shapes
AlwaysAssert(nRow_p == vb.nRow(), AipsError);
AlwaysAssert(nChannel_p == vb.nChannel(), AipsError);
AlwaysAssert(nCorr_p == vb.nCorr(), AipsError);
// make sure flag and flagRow are current
flag();
flagRow();
// do the subtraction, or'ing the flags
Int nRows = nRow ();
Int nChannels = nChannel ();
for (Int row = 0; row < nRows; row++) {
if (vb.flagRow()(row)) {
flagRow_p(row) = True;
}
if (!flagRow_p(row)) {
for (Int chn = 0; chn < nChannels; chn++) {
if (vb.flag()(chn, row)) {
flag_p(chn, row) = True;
}
if (!flag_p(chn, row)) {
visibility_p(chn, row) -= vb.visibility()(chn, row);
}
}
}
}
return *this;
}
void
VisBuffer::attachToVisIter(ROVisibilityIterator & iter)
{
if (visIter_p != static_cast<ROVisibilityIterator *>(0) && twoWayConnection_p) {
visIter_p->detachVisBuffer(*this);
}
visIter_p = &iter;
iter.attachVisBuffer(*this);
twoWayConnection_p = True;
}
void
VisBuffer::detachFromVisIter ()
{
if (visIter_p != NULL) {
visIter_p->detachVisBuffer(* this);
visIter_p = NULL;
}
}
void VisBuffer::invalidate()
{
setAllCacheStatuses (False);
lastPointTableRow_p = 0;
}
void VisBuffer::validate()
{
setAllCacheStatuses (True);
}
void
VisBuffer::setAllCacheStatuses (bool status)
{
antenna1OK_p = status;
antenna2OK_p = status;
arrayIdOK_p = status;
channelOK_p = status;
cjonesOK_p = status;
correctedVisCubeOK_p = status;
correctedVisibilityOK_p = status;
corrTypeOK_p = status;
direction1OK_p = status;
direction2OK_p = status;
exposureOK_p = status;
feed1_paOK_p = status;
feed1OK_p = status;
feed2_paOK_p = status;
feed2OK_p = status;
fieldIdOK_p = status;
flagCategoryOK_p = status;
flagCubeOK_p = status;
flagOK_p = status;
flagRowOK_p = status;
floatDataCubeOK_p = status;
frequencyOK_p = status;
imagingWeightOK_p = status;
lsrFrequencyOK_p = status;
modelVisCubeOK_p = status;
modelVisibilityOK_p = status;
msOK_p = status;
nChannelOK_p = status;
nCorrOK_p = status;
nRowOK_p = status;
observationIdOK_p = status;
phaseCenterOK_p = status;
polFrameOK_p = status;
processorIdOK_p = status;
rowIdsOK_p = status;
scanOK_p = status;
sigmaMatOK_p = status;
sigmaOK_p = status;
spectralWindowOK_p = status;
stateIdOK_p = status;
timeCentroidOK_p = status;
timeIntervalOK_p = status;
timeOK_p = status;
uvwMatOK_p = status;
uvwOK_p = status;
visCubeOK_p = status;
visibilityOK_p = status;
weightMatOK_p = status;
weightOK_p = status;
weightSpectrumOK_p = status;
}
Cube<Complex>& VisBuffer::dataCube(const MS::PredefinedColumns whichcol)
{
switch(whichcol){
case MS::DATA:
return visCube();
case MS::MODEL_DATA:
return modelVisCube();
case MS::CORRECTED_DATA:
return correctedVisCube();
default:
throw(AipsError(MS::columnName(whichcol) + " is not supported as a data Cube."));
}
}
const Cube<Complex>& VisBuffer::dataCube(const MS::PredefinedColumns whichcol) const
{
switch(whichcol){
case MS::DATA:
return visCube();
case MS::MODEL_DATA:
return modelVisCube();
case MS::CORRECTED_DATA:
return correctedVisCube();
default:
throw(AipsError(MS::columnName(whichcol) + " is not supported as a data Cube."));
}
}
void VisBuffer::freqAverage()
{
Matrix<CStokesVector> newVisibility(1, nRow());
Matrix<Bool> newFlag(1, nRow());
newFlag = True;
Double newFrequency;
newFrequency = 0;
Int nfreq = 0;
Int nChan = nChannel();
for (Int row = 0; row < nRow(); row++) {
if (!flagRow()(row)) {
Int n = 0;
for (Int chn = 0; chn < nChan; chn++) {
if (!flag()(chn, row)) {
newVisibility(0, row) += visibility()(chn, row);
newFlag(0, row) = False;
newFrequency += frequency()(chn);
n++;
nfreq++;
}
}
if (n == 0) {
flagRow()(row) = True;
}
if (n > 0) {
newVisibility(0, row) *= 1.0f / n;
}
}
}
// Average frequency for this buffer (should really be row based)
if (nfreq > 0) {
newFrequency /= Double(nfreq);
}
nChannel_p = 1;
flag_p.reference(newFlag);
visibility_p.reference(newVisibility);
frequency_p.resize(1);
frequency_p(0) = newFrequency;
}
void VisBuffer::freqAveCubes()
{
// TBD: Use weightSpec, if present, and update weightMat accordingly
// TBD: Provide partial decimation option
// Ensure visCube filled, at least
visCube();
// Freq-averaged shape
IPosition csh = visCube().shape();
csh(1) = 1; // One channel in output
Cube<Complex> newVisCube(csh);
newVisCube = Complex(0.0);
Matrix<Bool> newFlag(1, nRow());
newFlag = True;
Double newFrequency;
newFrequency = 0;
Int nfreq = 0;
Int nChan = nChannel();
Int nCor = nCorr();
for (Int row = 0; row < nRow(); row++) {
if (!flagRow()(row)) {
Int n = 0;
for (Int chn = 0; chn < nChan; chn++) {
if (!flag()(chn, row)) {
newFlag(0, row) = False;
newFrequency += frequency()(chn);
for (Int cor = 0; cor < nCor; cor++) {
newVisCube(cor, 0, row) += visCube()(cor, chn, row);
}
n++;
nfreq++;
if (row == -1)
cout << "V: "
<< chn << " " << n << " "
<< visCube()(0, chn, row) << " "
<< newVisCube(0, 0, row) << " "
<< endl;
}
}
if (n == 0) {
flagRow()(row) = True;
}
if (n > 0) {
Matrix<Complex> nVC;
nVC.reference(newVisCube.xyPlane(row));
nVC *= Complex(1.0f / n);
if (row == -1) {
cout << "V:-----> " << n << " " << newVisCube(0, 0, row) << endl;
}
}
}
}
visCube_p.reference(newVisCube);
// Now do model, if present
if (modelVisCubeOK_p) {
Cube<Complex> newModelVisCube(csh);
newModelVisCube = Complex(0.0);
for (Int row = 0; row < nRow(); row++) {
if (!flagRow()(row)) {
Int n = 0;
for (Int chn = 0; chn < nChan; chn++) {
if (!flag()(chn, row)) {
n++;
for (Int cor = 0; cor < nCor; cor++) {
newModelVisCube(cor, 0, row) += modelVisCube()(cor, chn, row);
}
if (row == -1)
cout << "M: "
<< chn << " " << n << " "
<< modelVisCube()(0, chn, row) << " "
<< newModelVisCube(0, 0, row) << " "
<< endl;
}
}
if (n == 0) {
flagRow()(row) = True;
}
if (n > 0) {
Matrix<Complex> nMVC;
nMVC.reference(newModelVisCube.xyPlane(row));
nMVC *= Complex(1.0f / n);
if (row == -1) {
cout << "M:-----> " << n << " " << newModelVisCube(0, 0, row) << endl;
}
}
}
}
modelVisCube_p.reference(newModelVisCube);
}
// Use averaged flags
flag_p.reference(newFlag);
// Average frequency for this buffer
// (Strictly, this should really be row based, but doing this
// average here suggests frequency precision isn't so important)
if (nfreq > 0) {
newFrequency /= Double(nfreq);
}
nChannel_p = 1;
frequency_p.resize(1);
frequency_p(0) = newFrequency;
}
void VisBuffer::formStokes()
{
// We must form the weights and flags correctly
formStokesWeightandFlag();
// Now do whatever data is present
if (visCubeOK_p) {
formStokes(visCube_p);
}
if (modelVisCubeOK_p) {
formStokes(modelVisCube_p);
}
if (correctedVisCubeOK_p) {
formStokes(correctedVisCube_p);
}
if (floatDataCubeOK_p) {
formStokes(floatDataCube_p);
}
}
void
VisBuffer::lsrFrequency(const Int & spw, Vector<Double>& freq, Bool & convert) const
{
CheckVisIter ();
visIter_p->lsrFrequency(spw, freq, convert);
}
void VisBuffer::formStokesWeightandFlag()
{
// Ensure corrType, weightMat and flagCube are filled
corrType();
weightMat();
flagCube();
switch (nCorr()) {
case 4: {
Slice all = Slice();
Slice pp(0, 1, 1), pq(1, 1, 1), qp(2, 1, 1), qq(3, 1, 1);
Slice a(0, 1, 1), b(1, 1, 1), c(2, 1, 1), d(3, 1, 1);
// Sort for linears
if (polFrame() == MSIter::Linear) {
d = Slice(1, 1, 1); // Q
b = Slice(2, 1, 1); // U
c = Slice(3, 1, 1); // V
}
Matrix<Float> newWtMat(weightMat_p.shape());
newWtMat(a, all) = newWtMat(d, all) = (weightMat_p(pp, all) + weightMat_p(qq, all));
newWtMat(b, all) = newWtMat(c, all) = (weightMat_p(pq, all) + weightMat_p(qp, all));
weightMat_p.reference(newWtMat);
Cube<Bool> newFlagCube(flagCube_p.shape());
newFlagCube(a, all, all) = newFlagCube(d, all, all) = (flagCube_p(pp, all, all) | flagCube_p(qq, all, all));
newFlagCube(b, all, all) = newFlagCube(c, all, all) = (flagCube_p(pq, all, all) | flagCube_p(qp, all, all));
flagCube_p.reference(newFlagCube);
corrType_p(0) = Stokes::I;
corrType_p(1) = Stokes::Q;
corrType_p(2) = Stokes::U;
corrType_p(3) = Stokes::V;
break;
}
case 2: {
// parallel hands only
Slice all = Slice();
Slice pp(0, 1, 1), qq(1, 1, 1);
Slice a(0, 1, 1), d(1, 1, 1);
Matrix<Float> newWtMat(weightMat_p.shape());
newWtMat(a, all) = newWtMat(d, all) = weightMat_p(pp, all) + weightMat_p(qq, all);
weightMat_p.reference(newWtMat);
Cube<Bool> newFlagCube(flagCube_p.shape());
newFlagCube(a, all, all) = newFlagCube(d, all, all) = flagCube_p(pp, all, all) | flagCube_p(qq, all, all);
flagCube_p.reference(newFlagCube);
corrType_p(0) = Stokes::I;
corrType_p(1) = ((polFrame() == MSIter::Circular) ? Stokes::V : Stokes::Q);
break;
}
case 1: {
// Just need to re-label as I
corrType_p(0) = Stokes::I;
}
default: {
cout << "Insufficient correlations to form Stokes" << endl;
break;
}
}
}
void VisBuffer::formStokes(Cube<Complex>& vis)
{
Cube<Complex> newvis(vis.shape());
newvis.set(0.0);
Slice all = Slice();
switch (nCorr()) {
case 4: {
Slice pp(0, 1, 1), pq(1, 1, 1), qp(2, 1, 1), qq(3, 1, 1);
Slice a(0, 1, 1), b(1, 1, 1), c(2, 1, 1), d(3, 1, 1);
if (polFrame() == MSIter::Linear) {
d = Slice(1, 1, 1); // Q
b = Slice(2, 1, 1); // U
c = Slice(3, 1, 1); // V
}
newvis(a, all, all) = (vis(pp, all, all) + vis(qq, all, all)); // I / I
newvis(d, all, all) = (vis(pp, all, all) - vis(qq, all, all)); // V / Q
newvis(b, all, all) = (vis(pq, all, all) + vis(qp, all, all)); // Q / U
newvis(c, all, all) = (vis(pq, all, all) - vis(qp, all, all)) / Complex(0.0, 1.0); // U / V
newvis /= Complex(2.0);
vis.reference(newvis);
break;
}
case 2: {
// parallel hands only
Slice pp(0, 1, 1), qq(1, 1, 1);
Slice a(0, 1, 1), d(1, 1, 1);
newvis(a, all, all) = (vis(pp, all, all) + vis(qq, all, all)); // I / I
newvis(d, all, all) = (vis(pp, all, all) - vis(qq, all, all)); // V / Q
newvis /= Complex(2.0);
vis.reference(newvis);
break;
}
case 1: {
// need do nothing for single correlation case
break;
}
default: {
cout << "Insufficient correlations to form Stokes" << endl;
break;
}
}
}
void VisBuffer::formStokes(Cube<Float>& fcube)
{
Cube<Float> newfcube(fcube.shape());
newfcube.set(0.0);
Slice all = Slice();
switch (nCorr()) {
case 4: {
throw(AipsError(
"Forming all 4 Stokes parameters out of FLOAT_DATA is not supported."));
Slice pp(0, 1, 1), pq(1, 1, 1), qp(2, 1, 1), qq(3, 1, 1);
Slice a(0, 1, 1), b(1, 1, 1), c(2, 1, 1), d(3, 1, 1);
if (polFrame() == MSIter::Linear) {
d = Slice(1, 1, 1); // Q
b = Slice(2, 1, 1); // U
c = Slice(3, 1, 1); // V
}
newfcube(a, all, all) = (fcube(pp, all, all) + fcube(qq, all, all)); // I / I
newfcube(d, all, all) = (fcube(pp, all, all) - fcube(qq, all, all)); // V / Q
newfcube(b, all, all) = (fcube(pq, all, all) + fcube(qp, all, all)); // Q / U
//// U / V
// This clearly isn't going to work. AFAICT it is impossible to
// simultaneously measure all 4 polarizations with the same feed, so
// FLOAT_DATA shouldn't come with 4 polarizations.
//newfcube(c,all,all)=(fcube(pq,all,all)-fcube(qp,all,all))/Complex(0.0,1.0);
newfcube(c, all, all) = (fcube(pq, all, all) - fcube(qp, all, all));
// The cast is necessary to stop the compiler from promoting it to a Complex.
newfcube *= static_cast<Float>(0.5);
fcube.reference(newfcube);
break;
}
case 2: {
// parallel hands only
Slice pp(0, 1, 1), qq(1, 1, 1);
Slice a(0, 1, 1), d(1, 1, 1);
newfcube(a, all, all) = (fcube(pp, all, all) + fcube(qq, all, all)); // I / I
newfcube(d, all, all) = (fcube(pp, all, all) - fcube(qq, all, all)); // V / Q
// The cast is necessary to stop the compiler from promoting it to a Complex.
newfcube *= static_cast<Float>(0.5);
fcube.reference(newfcube);
break;
}
case 1: {
// need do nothing for single correlation case
break;
}
default: {
cout << "Insufficient correlations to form Stokes" << endl;
break;
}
}
}
void VisBuffer::channelAve(const Matrix<Int>& chanavebounds)
{
// Only do something if there is something to do
if ( chanavebounds.nelements()>0 ) {
// refer to the supplied chanavebounds
chanAveBounds_p.reference(chanavebounds);
// cout << "chanAveBounds = " << chanAveBounds_p << endl;
Int nChanOut(chanAveBounds_p.nrow());
Vector<Int> chans(channel()); // Ensure channels pre-filled
const Bool doWtSp(visIter_p->existsWeightSpectrum());
// Apply averaging to whatever data is present
if (visCubeOK_p) chanAveVisCube(visCube(),nChanOut);
if (modelVisCubeOK_p) chanAveVisCube(modelVisCube(),nChanOut);
if (correctedVisCubeOK_p) chanAveVisCube(correctedVisCube(),nChanOut);
if (floatDataCubeOK_p) chanAveVisCube(floatDataCube(), nChanOut);
// The false makes it leave weightSpectrum() averaged if it is present.
if(flagCubeOK_p) chanAveFlagCube(flagCube(), nChanOut, false);
// Collapse the frequency values themselves, and count the number of
// selected channels.
// TBD: move this up to bounds calculation loop?
Vector<Double> newFreq(nChanOut,0.0);
Vector<Int> newChan(nChanOut,0);
frequency(); // Ensure frequencies pre-filled
Int nChan0(chans.nelements());
Int ichan=0;
Int totn = 0;
for(Int ochan = 0; ochan < nChanOut; ++ochan){
Int n = 0;
while(chans[ichan] >= chanAveBounds_p(ochan, 0) &&
chans[ichan] <= chanAveBounds_p(ochan, 1) &&
ichan < nChan0){
newFreq[ochan] += frequency()[ichan];
newChan[ochan] += chans[ichan];
ichan++;
n++;
}
if (n>0) {
newFreq[ochan] /= Double(n);
newChan[ochan] /= n;
totn += n;
}
}
// Install the new values
frequency().reference(newFreq);
channel().reference(newChan);
nChannel()=nChanOut;
// Row weight and sigma refer to the number of channels in the MS,
// regardless of any selection.
Int nAllChan0 = visIter_p->msColumns().spectralWindow().numChan()(spectralWindow());
if(totn < nAllChan0){
// Update weightMat and sigmaMat, since only part of the row was used.
uInt nCor = nCorr();
uInt nrows = nRow();
Matrix<Float> rowWtFac(nCor, nrows);
if(doWtSp){
// chanAccCube(weightSpectrum(), nChanOut); already done.
const Cube<Float>& wtsp(weightSpectrum());
for(uInt row = 0; row < nrows; ++row){
for(uInt icor = 0; icor < nCor; ++icor){
rowWtFac(icor, row) = 0.0;
for(Int ochan = 0; ochan < nChanOut; ++ochan){
Float oswt = wtsp(icor, ochan, row); // output spectral
// weight
if(oswt > 0.0)
rowWtFac(icor, row) += oswt;
else
flagCube()(icor, ochan, row) = True;
}
}
}
}
else{
rowWtFac = static_cast<Float>(totn) / nAllChan0;
}
for(uInt row = 0; row < nrows; ++row){
for(uInt icor = 0; icor < nCor; ++icor){
Float rwfcr = rowWtFac(icor, row);
weightMat()(icor, row) *= rwfcr;
sigmaMat()(icor, row) /= sqrt(rwfcr);
}
}
}
}
}
void VisBuffer::chanAveFlagCube(Cube<Bool>& flagcube, Int nChanOut,
const Bool restoreWeightSpectrum)
{
IPosition csh(flagcube.shape());
Int nChan0 = csh(1);
csh(1) = nChanOut;
if(nChan0 < nChanOut)
// It's possible that data has already been averaged. I could try
// refilling data if I knew which column to use, but I don't.
// Chuck it to the caller.
throw(AipsError("Can't average " + String(nChan0) + " channels to " +
String(nChanOut) + " channels!"));
if(nChan0 == nChanOut)
return; // No-op.
Vector<Int>& chans(channel());
Cube<Bool> newFlag(csh);
newFlag = True;
const Bool doWtSp(visIter_p->existsWeightSpectrum());
// weightSpectrum could be either averaged or unaveraged. Choose averaged.
if(doWtSp && weightSpectrum().shape()[1] > nChanOut)
chanAccCube(weightSpectrum(), nChanOut);
Int nCor = nCorr();
Int ichan;
for (Int row=0; row<nRow(); row++) {
if (!flagRow()(row)) {
ichan = 0;
for (Int ochan = 0; ochan < nChanOut; ++ochan) {
while (chans[ichan] >= chanAveBounds_p(ochan, 0) &&
chans[ichan] <= chanAveBounds_p(ochan, 1) &&
ichan < nChan0) {
for(Int icor = 0; icor < nCor; ++icor){
Double wt = doWtSp ? weightSpectrum()(icor, ochan, row) :
weightMat()(icor, row);
if(!flagcube(icor, ichan, row) && wt > 0.0)
newFlag(icor, ochan, row) = False;
}
++ichan;
}
}
}
}
// Use averaged flags
flagcube.reference(newFlag);
if(doWtSp && restoreWeightSpectrum)
fillWeightSpectrum();
}
// Sort correlations: (PP,QQ,PQ,QP) -> (PP,PQ,QP,QQ)
void VisBuffer::sortCorr()
{
// This method is for temporarily sorting the correlations
// into canonical order if the MS data is out-of-order
// NB: Always sorts the weightMat()
// NB: Only works on the visCube-style data
// NB: It only sorts the data columns which are already present
// (so make sure the ones you need are already read!)
// NB: It is the user's responsibility to run unSortCorr
// after using the sorted data to put it back in order
// NB: corrType_p is NOT changed to match the sorted
// correlations (it is expected that this sort is
// temporary, and that we will run unSortCorr
// NB: This method does nothing if no sort required
// If nominal order is non-canonical (only for nCorr=4)
// and data not yet sorted
if (nonCanonCorr() && !corrSorted_p) {
// First, do weightMat
{
weightMat(); // (ensures it is filled)
Vector<Float> wtmp(nRow());
Vector<Float> w1, w2, w3;
IPosition wblc(1, 0, 0), wtrc(3, 0, nRow() - 1), vec(1, nRow());
wblc(0) = wtrc(0) = 1;
w1.reference(weightMat_p(wblc, wtrc).reform(vec));
wblc(0) = wtrc(0) = 2;
w2.reference(weightMat_p(wblc, wtrc).reform(vec));
wblc(0) = wtrc(0) = 3;
w3.reference(weightMat_p(wblc, wtrc).reform(vec));
wtmp = w1;
w1 = w2;
w2 = w3;
w3 = wtmp;
}
// Now do data:
// Work space, references, coords
Matrix<Complex> tmp(nChannel(), nRow());
Matrix<Complex> p1, p2, p3;
IPosition blc(3, 0, 0, 0), trc(3, 0, nChannel() - 1, nRow() - 1), mat(2, nChannel(), nRow());
// Do visCube if present
if (visCubeOK_p && visCube_p.nelements() > 0) {
blc(0) = trc(0) = 1;
p1.reference(visCube_p(blc, trc).reform(mat));
blc(0) = trc(0) = 2;
p2.reference(visCube_p(blc, trc).reform(mat));
blc(0) = trc(0) = 3;
p3.reference(visCube_p(blc, trc).reform(mat));
tmp = p1;
p1 = p2;
p2 = p3;
p3 = tmp;
}
// Do modelVisCube if present
if (modelVisCubeOK_p && modelVisCube_p.nelements() > 0) {
blc(0) = trc(0) = 1;
p1.reference(modelVisCube_p(blc, trc).reform(mat));
blc(0) = trc(0) = 2;
p2.reference(modelVisCube_p(blc, trc).reform(mat));
blc(0) = trc(0) = 3;
p3.reference(modelVisCube_p(blc, trc).reform(mat));
tmp = p1;
p1 = p2;
p2 = p3;
p3 = tmp;
}
// Do correctedVisCube if present
if (correctedVisCubeOK_p && correctedVisCube_p.nelements() > 0) {
blc(0) = trc(0) = 1;
p1.reference(correctedVisCube_p(blc, trc).reform(mat));
blc(0) = trc(0) = 2;
p2.reference(correctedVisCube_p(blc, trc).reform(mat));
blc(0) = trc(0) = 3;
p3.reference(correctedVisCube_p(blc, trc).reform(mat));
tmp = p1;
p1 = p2;
p2 = p3;
p3 = tmp;
}
// Do floatDataCube if present
if (floatDataCubeOK_p && floatDataCube_p.nelements() > 0) {
Matrix<Float> tmp(nChannel(), nRow());
Matrix<Float> p1, p2, p3;
blc(0) = trc(0) = 1;
p1.reference(floatDataCube_p(blc, trc).reform(mat));
blc(0) = trc(0) = 2;
p2.reference(floatDataCube_p(blc, trc).reform(mat));
blc(0) = trc(0) = 3;
p3.reference(floatDataCube_p(blc, trc).reform(mat));
tmp = p1;
p1 = p2;
p2 = p3;
p3 = tmp;
}
// Data is now sorted into canonical order
corrSorted_p = True;
}
}
// Unsort correlations: (PP,PQ,QP,QQ) -> (PP,QQ,PQ,QP)
void VisBuffer::unSortCorr()
{
// This method is for restoring the non-canonical correlation
// sort order so that the data matches the order indicated
// by corrType()
// NB: Always unsorts the weightMat()
// NB: Only works on the visCube-style data
// NB: It only unsorts the data columns which are already present
// (so make sure sortCorr sorted the ones you needed!)
// NB: This method is a no-op if no sort required, or if
// sortCorr hadn't been run since the last unSortCorr
// If nominal order is non-canonical (only for nCorr=4)
// and if data has been sorted
if (nonCanonCorr() && corrSorted_p) {
// First, do weights
{
Vector<Float> wtmp(nRow());
Vector<Float> w1, w2, w3;
IPosition wblc(1, 0, 0), wtrc(3, 0, nRow() - 1), vec(1, nRow());
wblc(0) = wtrc(0) = 1;
w1.reference(weightMat_p(wblc, wtrc).reform(vec));
wblc(0) = wtrc(0) = 2;
w2.reference(weightMat_p(wblc, wtrc).reform(vec));
wblc(0) = wtrc(0) = 3;
w3.reference(weightMat_p(wblc, wtrc).reform(vec));
wtmp = w3;
w3 = w2;
w2 = w1;
w1 = wtmp;
}
// Now do data:
// Work space, references, coords
Matrix<Complex> tmp(nChannel(), nRow());
Matrix<Complex> p1, p2, p3;
IPosition blc(3, 0, 0, 0), trc(3, 0, nChannel() - 1, nRow() - 1), mat(2, nChannel(), nRow());
// Do visCube if present
if (visCubeOK_p && visCube_p.nelements() > 0) {
blc(0) = trc(0) = 1;
p1.reference(visCube_p(blc, trc).reform(mat));
blc(0) = trc(0) = 2;
p2.reference(visCube_p(blc, trc).reform(mat));
blc(0) = trc(0) = 3;
p3.reference(visCube_p(blc, trc).reform(mat));
tmp = p3;
p3 = p2;
p2 = p1;
p1 = tmp;
}
// Do modelVisCube if present
if (modelVisCubeOK_p && modelVisCube_p.nelements() > 0) {
blc(0) = trc(0) = 1;
p1.reference(modelVisCube_p(blc, trc).reform(mat));
blc(0) = trc(0) = 2;
p2.reference(modelVisCube_p(blc, trc).reform(mat));
blc(0) = trc(0) = 3;
p3.reference(modelVisCube_p(blc, trc).reform(mat));
tmp = p3;
p3 = p2;
p2 = p1;
p1 = tmp;
}
// Do correctedVisCube if present
if (correctedVisCubeOK_p && correctedVisCube_p.nelements() > 0) {
blc(0) = trc(0) = 1;
p1.reference(correctedVisCube_p(blc, trc).reform(mat));
blc(0) = trc(0) = 2;
p2.reference(correctedVisCube_p(blc, trc).reform(mat));
blc(0) = trc(0) = 3;
p3.reference(correctedVisCube_p(blc, trc).reform(mat));
tmp = p3;
p3 = p2;
p2 = p1;
p1 = tmp;
}
// Do floatDataCube if present
if (floatDataCubeOK_p && floatDataCube_p.nelements() > 0) {
Matrix<Float> tmp(nChannel(), nRow());
Matrix<Float> p1, p2, p3;
blc(0) = trc(0) = 1;
p1.reference(floatDataCube_p(blc, trc).reform(mat));
blc(0) = trc(0) = 2;
p2.reference(floatDataCube_p(blc, trc).reform(mat));
blc(0) = trc(0) = 3;
p3.reference(floatDataCube_p(blc, trc).reform(mat));
tmp = p3;
p3 = p2;
p2 = p1;
p1 = tmp;
}
// Data is now back to corrType order
corrSorted_p = False;
}
}
Bool VisBuffer::nonCanonCorr()
{
Vector<Int>& corrs(corrType());
// Only a meaningful question is all 4 corrs present
if (corrs.nelements() == 4)
// (assumes corrs(0) is RR or XX)
{
return (corrs(1) == Stokes::LL || corrs(1) == Stokes::YY);
} else
// Assumed OK (fewer than 4 elements, or in canonical order already)
{
return False;
}
}
// Fill weight matrix from sigma matrix
void VisBuffer::resetWeightMat()
{
// fill sigmaMat_p, size weightMat_p storage
sigmaMat();
IPosition ip(sigmaMat_p.shape());
weightMat_p.resize(ip);
Int nPol(ip(0));
Int nRow(ip(1));
// Weight is inverse square of sigma (or zero[?])
Float * w = weightMat_p.data();
Float * s = sigmaMat_p.data();
for (Int irow = 0; irow < nRow; ++irow)
for (Int ipol = 0; ipol < nPol; ++ipol, ++w, ++s)
if (*s > 0.0f) {
*w = 1.0f / square(*s);
} else {
*w = 0.0f;
}
// Scale by (unselected!) # of channels
// (to stay aligned with original nominal weights)
Int nchan = msColumns().spectralWindow().numChan()(spectralWindow());
weightMat_p *= Float(nchan);
// weightMat_p now OK
weightMatOK_p = True;
}
// Rotate visibility phase for phase center offsets
void VisBuffer::phaseCenterShift(Double dx, Double dy)
{
// no-op if no net shift
if (!(abs(dx) > 0 || abs(dy) > 0)) {
return;
}
// Offsets in radians (input is arcsec)
// sign convention will _correct_ data
dx *= (-C::pi / 180.0 / 3600.0);
dy *= (-C::pi / 180.0 / 3600.0);
// Extra path as fraction of U and V
Vector<Double> udx;
udx = uvwMat().row(0);
Vector<Double> vdy;
vdy = uvwMat().row(1);
udx *= dx; // in m
vdy *= dy;
// Combine axes
udx += vdy;
udx /= C::c; // in light-seconds
udx *= (2.0 * C::pi); // in radian.seconds/cycle
Vector<Double> freq(frequency());
Double ph;
Complex cph;
for (Int irow = 0; irow < nRow(); ++irow){
for (Int ichn = 0; ichn < nChannel(); ++ichn) {
// Calculate the Complex factor for this row and channel
ph = udx(irow) * freq(ichn);
cph = Complex(cos(ph), sin(ph));
// Shift each correlation:
for (Int icor = 0; icor < nCorr(); ++icor) {
if (visCubeOK_p) {
visCube_p(icor, ichn, irow) *= cph;
}
if (modelVisCubeOK_p) {
modelVisCube_p(icor, ichn, irow) *= cph;
}
if (correctedVisCubeOK_p) {
correctedVisCube_p(icor, ichn, irow) *= cph;
}
// Of course floatDataCube does not have a phase to rotate.
}
}
}
}
// Divide visCube by modelVisCube
void VisBuffer::normalize(const Bool & /* phaseOnly */)
{
// NB: phase-only now handled by SolvableVisCal
// (we will remove phaseOnly parameter later)
// NB: Handles pol-dep weights in chan-indep way
// TBD: optimizations?
// TBD: Handle channel-dep weights?
// Only if all relevant columns are present
if (visCubeOK_p && modelVisCubeOK_p && weightMatOK_p) {
// cout << "Normalizing!----------------------------" << endl;
Int nCor = nCorr();
// Amplitude data
Float amp(1.0);
Vector<Float> ampCorr(nCor);
Vector<Int> n(nCor);
Bool * flR = flagRow().data();
Bool * fl = flag().data();
for (Int irow = 0; irow < nRow(); irow++, flR++) {
if (!*flR) {
ampCorr = 0.0f;
n = 0;
for (Int ich = 0; ich < nChannel(); ich++, fl++) {
if (!*fl) {
for (Int icorr = 0; icorr < nCor; icorr++) {
amp = abs(modelVisCube_p(icorr, ich, irow));
if (amp > 0.0f) {
visCube_p(icorr, ich, irow) = Complex( DComplex(visCube_p(icorr, ich, irow)) /
DComplex(modelVisCube_p(icorr, ich, irow)) );
modelVisCube_p(icorr, ich, irow) = Complex(1.0);
ampCorr(icorr) += amp;
n(icorr)++;
} else
// zero data if model is zero
{
visCube_p(icorr, ich, irow) = 0.0;
}
}
}
}
for (Int icorr = 0; icorr < nCor; icorr++) {
if (n(icorr) > 0) {
weightMat_p(icorr, irow) *= square(ampCorr(icorr) / Float(n(icorr)));
} else {
weightMat_p(icorr, irow) = 0.0f;
}
}
} else {
// Zero weight on this flagged row
weightMat_p.column(irow) = 0.0f;
// Advance fl over this row
fl += nChannel();
}
}
} else {
throw(AipsError("Failed to normalize data by model!"));
}
}
Vector<Int> VisBuffer::vecIntRange(const MSCalEnums::colDef & calEnum) const
{
// Return a column range for a generic integer column as
// identified by the enum specification in class MSCalEnums
// Prepare the flag column masking
LogicalArray mask(!flagRow());
MaskedArray<Int>* maskArray;
// A dummy vector for columns not yet supported (returns a value of [-1]);
Vector<Int> nullIndex(antenna1().shape(), -1);
switch (calEnum) {
// ANTENNA1
case MSC::ANTENNA1: {
maskArray = new MaskedArray<Int>(antenna1(), mask);
break;
};
// ANTENNA2
case MSC::ANTENNA2: {
maskArray = new MaskedArray<Int>(antenna2(), mask);
break;
};
// FEED1
case MSC::FEED1: {
maskArray = new MaskedArray<Int>(feed1(), mask);
break;
};
// FIELD_ID
case MSC::FIELD_ID: {
Vector<Int> fieldIdVec(antenna1().shape(), fieldId());
maskArray = new MaskedArray<Int>(fieldIdVec, mask);
break;
};
// ARRAY_ID
case MSC::ARRAY_ID: {
maskArray = new MaskedArray<Int>(nullIndex, mask);
break;
};
// OBSERVATION_ID
case MSC::OBSERVATION_ID: {
maskArray = new MaskedArray<Int>(nullIndex, mask);
break;
};
// SCAN_NUMBER
case MSC::SCAN_NUMBER: {
maskArray = new MaskedArray<Int>(nullIndex, mask);
break;
};
// PROCESSOR_ID
case MSC::PROCESSOR_ID: {
maskArray = new MaskedArray<Int>(nullIndex, mask);
break;
};
// PHASE_ID
case MSC::PHASE_ID: {
maskArray = new MaskedArray<Int>(nullIndex, mask);
break;
};
// STATE_ID
case MSC::STATE_ID: {
maskArray = new MaskedArray<Int>(nullIndex, mask);
break;
};
// PULSAR_BIN
case MSC::PULSAR_BIN: {
maskArray = new MaskedArray<Int>(nullIndex, mask);
break;
};
// PULSAR_GATE_ID
case MSC::PULSAR_GATE_ID: {
maskArray = new MaskedArray<Int>(nullIndex, mask);
break;
};
// FREQ_GROUP
case MSC::FREQ_GROUP: {
maskArray = new MaskedArray<Int>(nullIndex, mask);
break;
};
// CALIBRATION_GROUP
case MSC::CALIBRATION_GROUP: {
maskArray = new MaskedArray<Int>(nullIndex, mask);
break;
};
default: {
throw(AipsError("Request for non-existent uv-data column"));
};
};
// Return only unique indices
Vector<Int> retval = unique(maskArray->getCompressedArray());
if (maskArray) {
delete(maskArray);
}
return retval;
};
Vector<Int> VisBuffer::antIdRange() const
{
// Return a column range for ANTENNA_ID, including the
// union of the ANTENNA1 and ANTENNA2 columns indices
Vector<Int> ant1 = vecIntRange(MSC::ANTENNA1);
Vector<Int> ant2 = vecIntRange(MSC::ANTENNA2);
Vector<Int> ant12 = concatenateArray(ant1, ant2);
// Return only unique index values
return unique(ant12);
};
Bool VisBuffer::timeRange(MEpoch & rTime, MVEpoch & rTimeEP,
MVEpoch & rInterval) const
{
// Return the time range of data in the vis buffer
// (makes simplistic assumptions in the absence of
// interval information for now)
// Initialization
Bool retval = False;
if (nRow() > 0) {
retval = True;
LogicalArray mask(!flagRow());
MaskedArray<Double> maskTime(time(), mask);
Double minTime = min(maskTime);
Double maxTime = max(maskTime);
// Mean time
rTime = MEpoch(Quantity((minTime + maxTime) / 2, "s"));
// Extra precision time is always null for now
rTimeEP = MVEpoch(Quantity(0, "s"));
// Interval
rInterval = MVEpoch(Quantity(maxTime - minTime, "s"));
};
return retval;
};
Vector<uInt>& VisBuffer::rowIds()
{
if (!rowIdsOK_p) {
rowIdsOK_p = True;
visIter_p->rowIds(rowIds_p);
}
return rowIds_p;
}
void VisBuffer::updateCoordInfo(const VisBuffer *, const Bool dirDependent )
{
antenna1();
antenna2();
arrayId();
fieldId();
spectralWindow();
time();
frequency();
nRow();
checkMSId();
feed1();
feed2();
if(dirDependent){
feed1_pa();
feed2_pa();
direction1();
direction2();
}
}
void VisBuffer::setVisCube(Complex c)
{
visCube_p.resize(visIter_p->visibilityShape());
visCube_p.set(c);
visCubeOK_p = True;
}
void VisBuffer::setModelVisCube(Complex c)
{
modelVisCube_p.resize(visIter_p->visibilityShape());
modelVisCube_p.set(c);
modelVisCubeOK_p = True;
}
void VisBuffer::setCorrectedVisCube(Complex c)
{
correctedVisCube_p.resize(visIter_p->visibilityShape());
correctedVisCube_p.set(c);
correctedVisCubeOK_p = True;
}
void VisBuffer::setVisCube(const Cube<Complex>& vis)
{
visCube_p.resize(vis.shape());
visCube_p = vis;
visCubeOK_p = True;
}
void VisBuffer::setModelVisCube(const Cube<Complex>& vis)
{
modelVisCube_p.resize(vis.shape());
modelVisCube_p = vis;
modelVisCubeOK_p = True;
}
void VisBuffer::setModelVisCube(const Vector<Float>& stokes)
{
/*
cout << "Specified Stokes Parameters: " << stokes << endl;
cout << "polFrame() = " << polFrame()
<< " " << MSIter::Circular
<< " " << MSIter::Linear
<< endl;
*/
// Stokes parameters, nominally unpolarized, unit I
Float I(1.0), Q(0.0), U(0.0), V(0.0);
// Only fill as many as are specified, up to 4 (unspecified will be assumed zero)
for (uInt i = 0; i < stokes.nelements(); ++i)
switch (i) {
case 0: {
I = stokes(i);
break;
}
case 1: {
Q = stokes(i);
break;
}
case 2: {
U = stokes(i);
break;
}
case 3: {
V = stokes(i);
break;
}
default: {
break;
}
}
// Convert to correlations, according to basis
Vector<Complex> stkvis(4, Complex(0.0)); // initially all zero
switch (polFrame()) {
case MSIter::Circular: {
stkvis(0) = Complex(I + V);
stkvis(1) = Complex(Q, U);
stkvis(2) = Complex(Q, -U);
stkvis(3) = Complex(I - V);
break;
}
case MSIter::Linear: {
stkvis(0) = Complex(I + Q);
stkvis(1) = Complex(U, V);
stkvis(2) = Complex(U, -V);
stkvis(3) = Complex(I - Q);
break;
}
default:
throw(AipsError("Model-setting only works for CIRCULAR and LINEAR bases, for now."));
break;
}
// A map onto the actual correlations in the VisBuffer
Vector<Int> corrmap;
corrmap = corrType();
corrmap -= corrmap(0);
// This MUST yield indices < 4
if (max(corrmap) > 3) {
throw(AipsError("HELP! The correlations in the data are not normal!"));
}
// Set the modelVisCube accordingly
modelVisCube_p.resize(visIter_p->visibilityShape());
modelVisCube_p.set(0.0);
for (Int icorr = 0; icorr < nCorr(); ++icorr)
if (abs(stkvis(corrmap(icorr))) > 0.0) {
modelVisCube_p(Slice(icorr, 1, 1), Slice(), Slice()).set(stkvis(corrmap(icorr)));
}
modelVisCubeOK_p = True;
// Lookup flux density calibrator scaling, and apply it per channel...
// TBD
}
Int VisBuffer::numberCoh () const
{
CheckVisIter ();
return visIter_p -> numberCoh ();
}
void VisBuffer::checkVisIter (const char *, const char * file, int line) const
{
if (visIter_p == NULL) {
throw AipsError ("No VisibilityIterator is attached.", file, line);
}
}
void VisBuffer::setCorrectedVisCube(const Cube<Complex>& vis)
{
correctedVisCube_p.resize(vis.shape());
correctedVisCube_p = vis;
correctedVisCubeOK_p = True;
}
void VisBuffer::setFloatDataCube(const Cube<Float>& fcube)
{
floatDataCube_p.resize(fcube.shape());
floatDataCube_p = fcube;
floatDataCubeOK_p = True;
}
void VisBuffer::refModelVis(const Matrix<CStokesVector>& mvis)
{
modelVisibility_p.resize();
modelVisibility_p.reference(mvis);
modelVisibilityOK_p = True;
}
void VisBuffer::removeScratchCols()
{
// removes scratch data from the vb
modelVisibility_p.resize();
modelVisibilityOK_p = False;
correctedVisibility_p.resize();
correctedVisibilityOK_p = False;
}
Int& VisBuffer::fillnCorr()
{
CheckVisIter ();
nCorrOK_p = True;
nCorr_p = corrType().nelements();
return nCorr_p;
}
Vector<Int>& VisBuffer::fillObservationId()
{
CheckVisIter();
observationIdOK_p = True;
return visIter_p->observationId(observationId_p);
}
Vector<Int>& VisBuffer::fillProcessorId()
{
CheckVisIter();
processorIdOK_p = True;
return visIter_p->processorId(processorId_p);
}
Vector<Int>& VisBuffer::fillStateId()
{
CheckVisIter();
stateIdOK_p = True;
return visIter_p->stateId(stateId_p);
}
Array<Bool>& VisBuffer::fillFlagCategory()
{
CheckVisIter();
flagCategoryOK_p = True;
return visIter_p->flagCategory(flagCategory_p);
}
Int& VisBuffer::fillnChannel()
{
CheckVisIter ();
nChannelOK_p = True;
// nChannel_p=visIter_p->channelGroupSize();
nChannel_p = channel().nelements();
return nChannel_p;
}
Vector<Int>& VisBuffer::fillChannel()
{
CheckVisIter ();
channelOK_p = True;
return visIter_p->channel(channel_p);
}
Int& VisBuffer::fillnRow()
{
CheckVisIter ();
nRowOK_p = True;
nRow_p = visIter_p->nRow();
return nRow_p;
}
Vector<Int>& VisBuffer::fillAnt1()
{
CheckVisIter ();
antenna1OK_p = True;
return visIter_p->antenna1(antenna1_p);
}
Vector<Int>& VisBuffer::fillAnt2()
{
CheckVisIter ();
antenna2OK_p = True;
return visIter_p->antenna2(antenna2_p);
}
Vector<Int>& VisBuffer::fillFeed1()
{
CheckVisIter ();
feed1OK_p = True;
return visIter_p->feed1(feed1_p);
}
Vector<Int>& VisBuffer::fillFeed2()
{
CheckVisIter ();
feed2OK_p = True;
return visIter_p->feed2(feed2_p);
}
Vector<SquareMatrix<Complex, 2> >& VisBuffer::fillCjones()
{
CheckVisIter ();
cjonesOK_p = True;
return visIter_p->CJones(cjones_p);
}
Vector<Int>& VisBuffer::fillCorrType()
{
CheckVisIter ();
corrTypeOK_p = True;
return visIter_p->corrType(corrType_p);
}
// calling fillFeed1_pa or fillFeed2_pa will fill antenna, feed
// and time caches automatically
Vector<Float>& VisBuffer::fillFeed1_pa()
{
CheckVisIter ();
// fill feed, antenna and time caches, if not filled before
feed1();
antenna1();
time();
feed1_paOK_p = True;
feed1_pa_p.resize(antenna1_p.nelements()); // could also use nRow()
// now actual calculations
for (uInt row = 0; row < feed1_pa_p.nelements(); ++row) {
const Vector<Float>& ant_pa = feed_pa(time_p(row)); // caching inside
// ROVisibilityIterator, if the time doesn't change. Otherwise
// we should probably fill both buffers for feed1 and feed2
// simultaneously to speed up things.
DebugAssert((uInt(antenna1_p(row)) < ant_pa.nelements()), AipsError);
DebugAssert(antenna1_p(row) >= 0, AipsError);
feed1_pa_p(row) = ant_pa(antenna1_p(row));
// currently feed_pa returns only the first feed position angle
// we need to add an offset if this row corresponds to a
// different feed
if (feed1_p(row)) // an if-statement to avoid unnecessary operations
// in the single feed case, everything would
// work without it.
feed1_pa_p(row) += visIter_p->receptorAngles()(0,
antenna1_p(row), feed1_p(row)) -
visIter_p->receptorAngles()(0, antenna1_p(row), 0);
}
return feed1_pa_p;
}
Vector<Float>& VisBuffer::fillFeed2_pa()
{
CheckVisIter ();
// fill feed, antenna and time caches, if not filled before
feed2();
antenna2();
time();
feed2_paOK_p = True;
feed2_pa_p.resize(antenna2_p.nelements()); // could also use nRow()
// now actual calculations
for (uInt row = 0; row < feed2_pa_p.nelements(); ++row) {
const Vector<Float>& ant_pa = feed_pa(time_p(row)); // caching inside
// ROVisibilityIterator, if the time doesn't change. Otherwise
// we should probably fill both buffers for feed1 and feed2
// simultaneously to speed up things.
DebugAssert((uInt(antenna2_p(row)) < ant_pa.nelements()), AipsError);
DebugAssert(antenna2_p(row) >= 0, AipsError);
feed2_pa_p(row) = ant_pa(antenna2_p(row));
// currently feed_pa returns only the first feed position angle
// we need to add an offset if this row correspods to a
// different feed
if (feed2_p(row)) // an if-statement to avoid unnecessary operations
// in the single feed case, everything would
// work without it.
feed2_pa_p(row) += visIter_p->receptorAngles()(0,
antenna2_p(row), feed2_p(row)) -
visIter_p->receptorAngles()(0, antenna2_p(row), 0);
}
return feed2_pa_p;
}
Vector<MDirection>& VisBuffer::fillDirection1()
{
CheckVisIter ();
// fill feed1_pa cache, antenna, feed and time will be filled automatically
feed1_pa();
direction1OK_p = True;
direction1_p.resize(antenna1_p.nelements()); // could also use nRow()
const ROMSPointingColumns & mspc = msColumns().pointing();
lastPointTableRow_p = mspc.pointingIndex(antenna1()(0),
time()(0), lastPointTableRow_p);
if (visIter_p->allBeamOffsetsZero() && lastPointTableRow_p < 0) {
// if no true pointing information is found
// just return the phase center from the field table
direction1_p.set(phaseCenter());
lastPointTableRow_p = 0;
return direction1_p;
}
for (uInt row = 0; row < antenna1_p.nelements(); ++row) {
DebugAssert(antenna1_p(row) >= 0, AipsError);
DebugAssert(feed1_p(row) >= 0, AipsError);
Int pointIndex1 = mspc.pointingIndex(antenna1()(row), time()(row), lastPointTableRow_p);
//cout << "POINTINDEX " << pointIndex1 << endl;
// if no true pointing information is found
// use the phase center from the field table
if (pointIndex1 >= 0) {
lastPointTableRow_p = pointIndex1;
direction1_p(row) = mspc.directionMeas(pointIndex1, timeInterval()(row));
} else {
direction1_p(row) = phaseCenter();
}
if (!visIter_p->allBeamOffsetsZero()) {
RigidVector<Double, 2> beamOffset =
visIter_p->getBeamOffsets()(0, antenna1_p(row), feed1_p(row));
if (visIter_p->antennaMounts()(antenna1_p(row)) == "ALT-AZ" ||
visIter_p->antennaMounts()(antenna1_p(row)) == "alt-az") {
SquareMatrix<Double, 2> xform(SquareMatrix<Double, 2>::General);
// SquareMatrix' default constructor is a bit strange.
// We will probably need to change it in the future
Double cpa = cos(feed1_pa_p(row));
Double spa = sin(feed1_pa_p(row));
xform(0, 0) = cpa;
xform(1, 1) = cpa;
xform(0, 1) = -spa;
xform(1, 0) = spa;
beamOffset *= xform; // parallactic angle rotation
}
// x direction is flipped to convert az-el type frame to ra-dec
direction1_p(row).shift(-beamOffset(0), beamOffset(1), True);
}
}
return direction1_p;
}
Vector<MDirection>& VisBuffer::fillDirection2()
{
CheckVisIter ();
// fill feed2_pa cache, antenna, feed and time will be filled automatically
feed2_pa();
direction2OK_p = True;
direction2_p.resize(antenna2_p.nelements()); // could also use nRow()
const ROMSPointingColumns & mspc = msColumns().pointing();
lastPointTableRow_p = mspc.pointingIndex(antenna2()(0), time()(0), lastPointTableRow_p);
if (visIter_p->allBeamOffsetsZero() && lastPointTableRow_p < 0) {
// if no true pointing information is found
// just return the phase center from the field table
direction2_p.set(phaseCenter());
lastPointTableRow_p = 0;
return direction2_p;
}
for (uInt row = 0; row < antenna2_p.nelements(); ++row) {
DebugAssert(antenna2_p(row) >= 0, AipsError);
DebugAssert(feed2_p(row) >= 0, AipsError);
Int pointIndex2 = mspc.pointingIndex(antenna2()(row), time()(row), lastPointTableRow_p);
// if no true pointing information is found
// use the phase center from the field table
if (pointIndex2 >= 0) {
lastPointTableRow_p = pointIndex2;
direction2_p(row) = mspc.directionMeas(pointIndex2, timeInterval()(row));
} else {
direction2_p(row) = phaseCenter();
}
if (!visIter_p->allBeamOffsetsZero()) {
RigidVector<Double, 2> beamOffset =
visIter_p->getBeamOffsets()(0, antenna2_p(row), feed2_p(row));
if (visIter_p->antennaMounts()(antenna2_p(row)) == "ALT-AZ" ||
visIter_p->antennaMounts()(antenna2_p(row)) == "alt-az") {
SquareMatrix<Double, 2> xform(SquareMatrix<Double, 2>::General);
// SquareMatrix' default constructor is a bit strange.
// We will probably need to change it in the future
Double cpa = cos(feed2_pa_p(row));
Double spa = sin(feed2_pa_p(row));
xform(0, 0) = cpa;
xform(1, 1) = cpa;
xform(0, 1) = -spa;
xform(1, 0) = spa;
beamOffset *= xform; // parallactic angle rotation
}
// x direction is flipped to convert az-el type frame to ra-dec
direction2_p(row).shift(-beamOffset(0), beamOffset(1), True);
}
}
return direction2_p;
}
Int& VisBuffer::fillFieldId()
{
CheckVisIter ();
fieldIdOK_p = True;
fieldId_p = visIter_p->fieldId();
return fieldId_p;
}
Int& VisBuffer::fillArrayId()
{
CheckVisIter ();
arrayIdOK_p = True;
arrayId_p = visIter_p->arrayId();
return arrayId_p;
}
Matrix<Bool>& VisBuffer::fillFlag()
{
CheckVisIter ();
flagOK_p = True;
return visIter_p->flag(flag_p);
}
Cube<Bool>& VisBuffer::fillFlagCube()
{
CheckVisIter ();
flagCubeOK_p = True;
return visIter_p->flag(flagCube_p);
}
Vector<Bool>& VisBuffer::fillFlagRow()
{
CheckVisIter ();
flagRowOK_p = True;
return visIter_p->flagRow(flagRow_p);
}
Vector<Int>& VisBuffer::fillScan()
{
CheckVisIter ();
scanOK_p = True;
return visIter_p->scan(scan_p);
}
Vector<Double>& VisBuffer::fillFreq()
{
CheckVisIter ();
frequencyOK_p = True;
return visIter_p->frequency(frequency_p);
}
Vector<Double>& VisBuffer::fillLSRFreq()
{
CheckVisIter ();
lsrFrequencyOK_p = True;
return visIter_p->lsrFrequency(lsrFrequency_p);
}
MDirection& VisBuffer::fillPhaseCenter()
{
CheckVisIter ();
phaseCenterOK_p = True;
return phaseCenter_p = visIter_p->phaseCenter();
}
Int& VisBuffer::fillPolFrame()
{
CheckVisIter ();
polFrameOK_p = True;
polFrame_p = visIter_p->polFrame();
return polFrame_p;
}
Vector<Float>& VisBuffer::fillSigma()
{
CheckVisIter ();
sigmaOK_p = True;
return visIter_p->sigma(sigma_p);
}
Matrix<Float>& VisBuffer::fillSigmaMat()
{
CheckVisIter ();
sigmaMatOK_p = True;
return visIter_p->sigmaMat(sigmaMat_p);
}
Int& VisBuffer::fillSpW()
{
CheckVisIter ();
spectralWindowOK_p = True;
spectralWindow_p = visIter_p->spectralWindow();
return spectralWindow_p;
}
Vector<Double>& VisBuffer::fillTime()
{
if (visIter_p == NULL) {
throw AipsError ("No VisibilityIterator is attached.", __FILE__, __LINE__);
}
timeOK_p = True;
return visIter_p->time(time_p);
}
Vector<Double>& VisBuffer::fillTimeCentroid()
{
CheckVisIter ();
timeCentroidOK_p = True;
return visIter_p->timeCentroid(timeCentroid_p);
}
Vector<Double>& VisBuffer::fillTimeInterval()
{
CheckVisIter ();
timeIntervalOK_p = True;
return visIter_p->timeInterval(timeInterval_p);
}
Vector<Double>& VisBuffer::fillExposure()
{
CheckVisIter ();
exposureOK_p = True;
return visIter_p->exposure(exposure_p);
}
Vector<RigidVector<Double, 3> >& VisBuffer::filluvw()
{
CheckVisIter ();
uvwOK_p = True;
return visIter_p->uvw(uvw_p);
}
Matrix<Double>& VisBuffer::filluvwMat()
{
CheckVisIter ();
uvwMatOK_p = True;
return visIter_p->uvwMat(uvwMat_p);
}
Matrix<CStokesVector>& VisBuffer::fillVis(VisibilityIterator::DataColumn whichOne)
{
CheckVisIter ();
switch (whichOne) {
case VisibilityIterator::Model:
modelVisibilityOK_p = True;
return visIter_p->visibility(modelVisibility_p, whichOne);
break;
case VisibilityIterator::Corrected:
correctedVisibilityOK_p = True;
return visIter_p->visibility(correctedVisibility_p, whichOne);
break;
case VisibilityIterator::Observed:
default:
visibilityOK_p = True;
return visIter_p->visibility(visibility_p, whichOne);
break;
}
}
Cube<Complex>& VisBuffer::fillVisCube(VisibilityIterator::DataColumn whichOne)
{
CheckVisIter ();
switch (whichOne) {
case VisibilityIterator::Model:
modelVisCubeOK_p = True;
return visIter_p->visibility(modelVisCube_p, whichOne);
break;
case VisibilityIterator::Corrected:
correctedVisCubeOK_p = True;
return visIter_p->visibility(correctedVisCube_p, whichOne);
break;
case VisibilityIterator::Observed:
default:
visCubeOK_p = True;
return visIter_p->visibility(visCube_p, whichOne);
break;
}
}
Cube<Float>& VisBuffer::fillFloatDataCube()
{
CheckVisIter ();
floatDataCubeOK_p = True;
return visIter_p->floatData(floatDataCube_p);
}
Vector<Float>& VisBuffer::fillWeight()
{
CheckVisIter ();
weightOK_p = True;
return visIter_p->weight(weight_p);
}
Matrix<Float>& VisBuffer::fillWeightMat()
{
CheckVisIter ();
weightMatOK_p = True;
return visIter_p->weightMat(weightMat_p);
}
Cube<Float>& VisBuffer::fillWeightSpectrum()
{
CheckVisIter ();
weightSpectrumOK_p = True;
return visIter_p->weightSpectrum(weightSpectrum_p);
}
Matrix<Float>& VisBuffer::fillImagingWeight()
{
CheckVisIter ();
imagingWeightOK_p = True;
return visIter_p->imagingWeight(imagingWeight_p);
}
Vector<Float> VisBuffer::feed_pa(Double time) const
{
return visIter_p->feed_pa(time);
}
Float VisBuffer::parang0(Double time) const
{
return visIter_p->parang0(time);
}
Vector<Float> VisBuffer::parang(Double time) const
{
return visIter_p->parang(time);
}
Int VisBuffer::numberAnt () const
{
return msColumns().antenna().nrow(); /* for single (sub)array only.*/
}
MDirection VisBuffer::azel0(Double time) const
{
return visIter_p->azel0(time);
}
Vector<Double>& VisBuffer::azel0Vec(Double time, Vector<Double>& azelVec) const
{
MDirection azelMeas = This->azel0(time);
azelVec.resize(2);
azelVec = azelMeas.getAngle("deg").getValue();
return azelVec;
}
Vector<MDirection> VisBuffer::azel(Double time) const
{
return visIter_p->azel(time);
}
Matrix<Double>& VisBuffer::azelMat(Double time, Matrix<Double>& azelMat) const
{
Vector<MDirection> azelMeas = This->azel(time);
azelMat.resize(2, azelMeas.nelements());
for (uInt iant = 0; iant < azelMeas.nelements(); ++iant) {
azelMat.column(iant) = (azelMeas(iant).getAngle("deg").getValue());
}
return azelMat;
}
Double VisBuffer::hourang(Double time) const
{
return visIter_p->hourang(time);
}
Vector<Int> VisBuffer::unique(const Vector<Int>& indices) const
{
// Filter integer index arrays for unique values
//
uInt n = indices.nelements();
Vector<Int> uniqIndices(n);
if (n > 0) {
// Sort temporary array in place
Vector<Int> sortedIndices = indices.copy();
GenSort<Int>::sort(sortedIndices);
// Extract unique elements
uniqIndices(0) = sortedIndices(0);
uInt nUniq = 1;
for (uInt i = 1; i < n; i++) {
if (sortedIndices(i) != uniqIndices(nUniq - 1)) {
uniqIndices(nUniq++) = sortedIndices(i);
};
};
uniqIndices.resize(nUniq, True);
};
return uniqIndices;
}
Bool VisBuffer::checkMSId()
{
//if this is not a new iteration then don't even check;
//Let the state be
if (msOK_p) {
return False;
}
if (visIter_p != static_cast<ROVisibilityIterator *> (0)) {
if (oldMSId_p != visIter_p->msId()) {
oldMSId_p = visIter_p->msId();
newMS_p = True;
} else {
newMS_p = False;
}
msOK_p = True;
return newMS_p;
} else {
return newMS_p;
}
return False;
}
} //# NAMESPACE CASA - END
| [
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] | |
5c745874887e662fb842aadd6949478656a596e5 | 36f9b05b64d852465e05042f95360969403b01c9 | /contrib/brl/bseg/boxm2/ocl/algo/boxm2_ocl_fuse_based_visibility.h | 0ca3accc37824d4e7f98c5475449338baa67e622 | [] | no_license | daniel-perry/vxl | 5d082833c0ecc3214705d47070d4559e63db60d8 | 223741246e925272f86c29211c305163ae7feb59 | refs/heads/master | 2021-01-16T20:06:45.848284 | 2014-07-30T20:01:20 | 2014-07-30T20:01:20 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 2,374 | h | #ifndef boxm2_ocl_fuse_based_visibility_h_
#define boxm2_ocl_fuse_based_visibility_h_
//:
// \file
#include <bocl/bocl_device.h>
#include <bocl/bocl_kernel.h>
//boxm2 includes
#include <boxm2/boxm2_scene.h>
#include <boxm2/boxm2_block.h>
#include <boxm2/ocl/boxm2_opencl_cache2.h>
#include <boxm2/io/boxm2_cache2.h>
#include <vil/vil_image_view_base.h>
//: boxm2_ocl_paint_batch class
class boxm2_ocl_fuse_based_visibility
{
public:
static bool fuse_based_visibility( boxm2_scene_sptr sceneA,
boxm2_scene_sptr sceneB,
bocl_device_sptr device,
boxm2_opencl_cache2_sptr opencl_cache);
private:
//compile kernels and place in static map
static vcl_vector<bocl_kernel*>& get_kernels(bocl_device_sptr device, vcl_string opts="");
//map of paint kernel by device
static vcl_map<vcl_string, vcl_vector<bocl_kernel*> > kernels_;
};
//: boxm2_ocl_paint_batch class
class boxm2_ocl_fuse_based_orientation
{
public:
static bool fuse_based_orientation( boxm2_scene_sptr sceneA,
boxm2_scene_sptr sceneB,
bocl_device_sptr device,
boxm2_opencl_cache2_sptr opencl_cache);
private:
//compile kernels and place in static map
static vcl_vector<bocl_kernel*>& get_kernels(bocl_device_sptr device, vcl_string opts="");
//map of paint kernel by device
static vcl_map<vcl_string, vcl_vector<bocl_kernel*> > kernels_;
};
//: boxm2_ocl_paint_batch class
class boxm2_ocl_fuse_surface_density
{
public:
static bool fuse_surface_density( boxm2_scene_sptr sceneA,
boxm2_scene_sptr sceneB,
bocl_device_sptr device,
boxm2_opencl_cache2_sptr opencl_cache);
private:
//compile kernels and place in static map
static vcl_vector<bocl_kernel*>& get_kernels(bocl_device_sptr device, vcl_string opts="");
//map of paint kernel by device
static vcl_map<vcl_string, vcl_vector<bocl_kernel*> > kernels_;
};
#endif // boxm2_ocl_fuse_based_visibility_h_ | [
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] | |
9b774ca076cc6c71354cdce7c83eded14a498ac7 | f0dc075f563e2911cd200e0b9f5e2379d5977257 | /Classes/Models/Character/Disease/DiseaseType/Disease03/Disease03Model.h | dbe7fe4bc2ddd710f4e0379826d41b03438b8d7b | [
"MIT"
] | permissive | friedcroco070801/defense-squad | 2d8bc8fb8a31f22f47cb8be922ef7c0533caa9b0 | 35f62812ca3e5a15de64bd2808eabbdc82fd848b | refs/heads/main | 2023-06-30T03:45:11.193629 | 2021-08-01T09:52:20 | 2021-08-01T09:52:20 | 378,808,119 | 0 | 1 | null | null | null | null | UTF-8 | C++ | false | false | 239 | h | #ifndef __DISEASE_03_MODEL_H__
#define __DISEASE_03_MODEL_H__
class DiseaseModel;
class Disease03Model : public DiseaseModel {
public:
Disease03Model();
virtual ~Disease03Model(){}
protected:
};
#endif // !__DISEASE_03_MODEL_H__ | [
"[email protected]"
] | |
3223dd0b796816a3092e8619fb411b4b9b6d1f45 | 111419c98d140b4f9a6f47f6bf0d1f1ba055e062 | /1-11QtGui/mainwindow.cpp | fa544be870f555127e00b9ffe230ca3541e6ddd2 | [] | no_license | Eiji127/QtTutorials | 63be87db166b71ede5f09dde736f144fc25e332e | 36f0d2c5cb08f5075da96dccc36020775645b428 | refs/heads/main | 2023-05-30T22:46:37.423145 | 2021-06-19T14:38:59 | 2021-06-19T14:38:59 | 367,534,834 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 457 | cpp | #include "mainwindow.h"
#include "ui_mainwindow.h"
#include <QDebug>
#include <QMessageBox>
MainWindow::MainWindow(QWidget *parent)
: QMainWindow(parent)
, ui(new Ui::MainWindow)
{
ui->setupUi(this);
}
MainWindow::~MainWindow()
{
delete ui;
}
void MainWindow::on_pushButton_clicked()
{
qDebug() << "DUBUG: User clicked on a button...";
QMessageBox::information(this, "Message", "You clicked on that button", QMessageBox::Ok);
}
| [
"[email protected]"
] | |
9d51a5c0f5eda9ecf53eb5f618629e6ded9afbb7 | df7366b9d1e195458e2df676543248e7dddcbdb4 | /uri1079.cpp | a1ceaac740227f36e47c6bf6a7caf9774bc05f1f | [] | no_license | FahimSifnatul/problem_solving_with_FahimSifnatul_cpp_version | b30e76a19b3ec95e298fe1ed60533e51344d090b | 639071ed1b00be6ab1a648fc995c7a5044f58c2a | refs/heads/master | 2022-07-14T05:09:32.098498 | 2020-05-20T09:42:30 | 2020-05-20T09:42:30 | 265,513,170 | 1 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 276 | cpp | #include<iostream>
#include<iomanip>
using namespace std;
int main()
{
int n;
float x,y,z;
cin>>n;
for(int i=1;i<=n;i++)
{
cin>> x >> y >> z;
cout << fixed << setprecision(1) << x*.2+y*.3+z*.5 <<"\n";
}
return 0;
}
| [
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] | |
31acc9da900c749c1425b0327ecfa16255d95c7e | 6148c3ed6e2de29e47829a37cf7ec891a2325811 | /RandomLoader.h | 5eca31ef2b4695307355f456b38387006868b205 | [] | no_license | Solonets/SNAnon | 95a1ce7a4b587fa748f6b0a08e674aac6b5ac929 | ae8c8b79a504a16dcf51aaa4eaa32c913e68f283 | refs/heads/master | 2020-12-30T14:44:26.339933 | 2017-05-12T10:04:44 | 2017-05-12T10:04:44 | 91,077,751 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 375 | h | #pragma once
#include "GraphLoader.h"
#include <string>
class RandomLoader :
public GraphLoader
{
private:
int vn;
int maxDegree;
int seed;
public:
RandomLoader(int n, int maxDegree, int seed);
virtual void load_names();
virtual void load_edges();
virtual void load_attributes() {};
virtual void load_attributes_values() {};
~RandomLoader();
};
| [
"[email protected]"
] | |
c2f3233e9d22d5ec56eee728575d525b9ff21e94 | fcb995a27f07e922b10532bb9c098bee2a7bd390 | /ArcadeApp/Engine/Input/Input.h | 611ef269d0c4329275fc4aeae39655897221cabb | [] | no_license | TheseusNUL/ArcadeApp | dd7dedc6e9b00682fbd1a4f40cb8cf40ea8633a3 | 29a8641bb534f7e8c6bda0a7a2e7ff85f5780121 | refs/heads/master | 2020-12-20T18:40:48.512223 | 2020-01-25T22:17:51 | 2020-01-25T22:17:51 | 236,173,599 | 1 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 719 | h | #pragma once
#include <functional>
#include <stdint.h>
/* Create typedefs for input types*/
using InputKey = uint8_t;
using InputState = uint8_t;
using InputAction = std::function<void(uint32_t deltaTime, InputState state)>;
struct ButtonAction
{
InputKey key;
InputAction action;
};
/*--------------------------------
Mouse Input
---------------------------------*/
using MouseButton = uint8_t;
struct MousePosition
{
int32_t x, y;
};
using MouseInputAction = std::function<void(InputState state, const MousePosition& position)>;
using MouseMovedAction = std::function<void(const MousePosition& mousePosition)>;
struct MouseButtonAction
{
MouseButton mouseButton;
MouseInputAction mouseInputAction;
};
| [
"[email protected]"
] | |
9ac3ee42bab49a098583e70b870624652fe9641f | d0be9a869d4631c58d09ad538b0908554d204e1c | /utf8/lib/client/vengine/src/exception/errorinfo.cc | 19c6cee6c1b4caf4e8e2ba8bc601889e5497b050 | [] | no_license | World3D/pap | 19ec5610393e429995f9e9b9eb8628fa597be80b | de797075062ba53037c1f68cd80ee6ab3ed55cbe | refs/heads/master | 2021-05-27T08:53:38.964500 | 2014-07-24T08:10:40 | 2014-07-24T08:10:40 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 13,339 | cc | #include <windows.h>
#include <tlhelp32.h>
#include <time.h>
#include <dbghelp.h>
#include "vengine/exception/errorinfo.h"
#define DUMP_SIZE_MAX 8000
// max number of traced calls
#define CALL_TRACE_MAX ((DUMP_SIZE_MAX - 2000) / (MAX_PATH + 40))
#define NL _T("\r\n") // 换行
namespace vengine_exception {
namespace errorinfo {
/*vc functions {*/
// 自动加载dbghelp.dll
typedef BOOL (WINAPI * MINIDUMP_WRITE_DUMP)(IN HANDLE hProcess,
IN UINT ProcessId,
IN HANDLE hFile,
IN MINIDUMP_TYPE DumpType,
IN CONST PMINIDUMP_EXCEPTION_INFORMATION ExceptionParam, OPTIONAL
IN PMINIDUMP_USER_STREAM_INFORMATION UserStreamParam, OPTIONAL
IN PMINIDUMP_CALLBACK_INFORMATION CallbackParam OPTIONAL);
struct tAUTO_LOAD_DBGHELP {
tAUTO_LOAD_DBGHELP();
~tAUTO_LOAD_DBGHELP();
HMODULE m_hDbgHelp;
MINIDUMP_WRITE_DUMP m_pfnMiniDumpWriteDump;
} theDbgHelper;
tAUTO_LOAD_DBGHELP::tAUTO_LOAD_DBGHELP() {
m_hDbgHelp = ::LoadLibrary(_T("DBGHELP.DLL"));
if(NULL == theDbgHelper.m_hDbgHelp)
return; //Load failed!
m_pfnMiniDumpWriteDump =
(MINIDUMP_WRITE_DUMP)GetProcAddress(m_hDbgHelp,
(LPCSTR)("MiniDumpWriteDump"));
if (NULL == m_pfnMiniDumpWriteDump) {
::FreeLibrary(m_hDbgHelp);
m_hDbgHelp = NULL;
}
}
tAUTO_LOAD_DBGHELP::~tAUTO_LOAD_DBGHELP() {
if (m_hDbgHelp) {
::FreeLibrary(m_hDbgHelp);
m_hDbgHelp= NULL;
}
}
/**
* Find module by Ret_Addr (address in the module).
* Return Module_Name (full path) and Module_Addr (start address).
* Return TRUE if found.
*/
BOOL WINAPI Get_Module_By_Ret_Addr(PBYTE Ret_Addr,
PTCHAR Module_Name,
PBYTE & Module_Addr) {
MODULEENTRY32 M = {sizeof(M)};
HANDLE hSnapshot;
Module_Name[0] = 0;
hSnapshot = ::CreateToolhelp32Snapshot(TH32CS_SNAPMODULE, 0);
if ((hSnapshot != INVALID_HANDLE_VALUE) &&
::Module32First(hSnapshot, &M)) {
do {
if (UINT(Ret_Addr - M.modBaseAddr) < M.modBaseSize) {
lstrcpyn(Module_Name, M.szExePath, MAX_PATH);
Module_Addr = M.modBaseAddr;
break;
}
} while (::Module32Next(hSnapshot, &M));
}
::CloseHandle(hSnapshot);
return !!Module_Name[0];
}
/*
* Fill Str with call stack info.
* pException can be either GetExceptionInformation() or NULL.
* If pException = NULL - get current call stack.
*/
VOID Get_Call_Stack(PEXCEPTION_POINTERS pException, FILE* fp) {
TCHAR Module_Name[MAX_PATH];
PBYTE Module_Addr = 0;
PBYTE Module_Addr_1;
#pragma warning(disable: 4200) //nonstandard extension used : zero-sized array in struct/union
typedef struct STACK {
STACK * Ebp;
PBYTE Ret_Addr;
UINT Param[0];
} STACK, * PSTACK;
#pragma warning(default: 4200)
STACK Stack = {0, 0};
PSTACK Ebp;
if (pException) { //fake frame for exception address
Stack.Ebp = (PSTACK)(DWORD_PTR)pException->ContextRecord->Ebp;
Stack.Ret_Addr = (PBYTE)pException->ExceptionRecord->ExceptionAddress;
Ebp = &Stack;
}
else {
Ebp = (PSTACK)&pException - 1; //frame addr of Get_Call_Stack()
// Skip frame of Get_Call_Stack().
if (!IsBadReadPtr(Ebp, sizeof(PSTACK)))
Ebp = Ebp->Ebp; //caller ebp
}
// Trace CALL_TRACE_MAX calls maximum - not to exceed DUMP_SIZE_MAX.
// Break trace on wrong stack frame.
for (INT Ret_Addr_I = 0;
(Ret_Addr_I < CALL_TRACE_MAX) &&
!IsBadReadPtr(Ebp, sizeof(PSTACK)) &&
!IsBadCodePtr(FARPROC(Ebp->Ret_Addr));
Ret_Addr_I++, Ebp = Ebp->Ebp) {
// If module with Ebp->Ret_Addr found.
if (Get_Module_By_Ret_Addr(Ebp->Ret_Addr, Module_Name, Module_Addr_1)) {
if (Module_Addr_1 != Module_Addr) { //new module
// Save module's address and full path.
Module_Addr = Module_Addr_1;
_ftprintf(fp, _T("%08X %s")NL, (LONG_PTR)Module_Addr, Module_Name);
}
// Save call offset.
_ftprintf(fp, _T(" +%08X"), Ebp->Ret_Addr - Module_Addr);
// Save 5 params of the call. We don't know the real number of params.
if (pException && !Ret_Addr_I) //fake frame for exception address
_ftprintf(fp, _T(" Exception Offset") NL);
else if (!IsBadReadPtr(Ebp, sizeof(PSTACK) + 5 * sizeof(UINT))) {
_ftprintf(fp,
_T(" (%X, %X, %X, %X, %X)")NL,
Ebp->Param[0],
Ebp->Param[1],
Ebp->Param[2],
Ebp->Param[3],
Ebp->Param[4]);
}
}
else
_ftprintf(fp, _T("%08X")NL, (LONG_PTR)(Ebp->Ret_Addr));
}
}
/* Fill Str with Windows version.
*/
VOID WINAPI Get_Version_Str(FILE* fp) {
OSVERSIONINFOEX V = { sizeof(OSVERSIONINFOEX) }; // EX for NT 5.0 and later
if (!GetVersionEx((POSVERSIONINFO)&V)) {
ZeroMemory(&V, sizeof(V));
V.dwOSVersionInfoSize = sizeof(OSVERSIONINFO);
GetVersionEx((POSVERSIONINFO)&V);
}
//for 9x HIWORD(dwBuildNumber) = 0x04xx
if (V.dwPlatformId != VER_PLATFORM_WIN32_NT)
V.dwBuildNumber = LOWORD(V.dwBuildNumber);
TCHAR dateBuf[32];
_tstrdate(dateBuf);
TCHAR timeBuf[32];
_tstrtime(timeBuf);
_ftprintf(fp,
_T("****************************************************") NL
_T("system info: ") NL
_T("windows: %d.%d.%d, SP %d.%d, product type %d") NL //SP - service pack,
//Product Type -
//VER_NT_WORKSTATION,
//...
NL
_T("time: %s %s") NL,
V.dwMajorVersion,
V.dwMinorVersion,
V.dwBuildNumber,
V.wServicePackMajor,
V.wServicePackMinor,
V.wProductType,
dateBuf,
timeBuf);
}
VOID CreateExceptionDesc(PEXCEPTION_POINTERS pException,
FILE* fp,
UINT dwLastError) {
if (!pException || !fp) return;
EXCEPTION_RECORD & E = *pException->ExceptionRecord;
CONTEXT & C = *pException->ContextRecord;
// 取得异常发生地
TCHAR szModeleInfo[MAX_PATH];
TCHAR Module_Name[MAX_PATH];
PBYTE Module_Addr;
if (Get_Module_By_Ret_Addr((PBYTE)E.ExceptionAddress,
Module_Name,
Module_Addr)) {
_sntprintf(szModeleInfo, MAX_PATH, _T("%s"), Module_Name);
}
else {
_sntprintf(szModeleInfo,
MAX_PATH,
_T("%08X"),
(DWORD_PTR)(E.ExceptionAddress));
}
switch(E.ExceptionCode) {
// 转化后的c++异常
case 0XE000C0DE: {
const STRING* pCPPException = (const STRING*)E.ExceptionInformation[0];
if (!pCPPException) return;
_ftprintf(fp,
_T("C++ Exception"LF"")
_T(""LF"")
_T("information: %s"LF""),
pCPPException->c_str());
}
break;
// 试图对一个虚地址进行读写
case EXCEPTION_ACCESS_VIOLATION: {
// Access violation type - Write/Read.
_ftprintf(fp,
_T("\t\tAccess violation"LF"")
_T(""LF"")
_T("@: %s"LF"")
_T("Operate: %s"LF"")
_T("Address: 0x%08X"LF"")
_T("LastError: 0x%08X"LF""),
szModeleInfo,
(E.ExceptionInformation[0]) ? _T("Write") : _T("Read"),
E.ExceptionInformation[1], dwLastError);
}
break;
default: {
_ftprintf(fp,
_T("\t\tOTHER"LF"")
_T(""LF"")
_T("@: %s"LF"")
_T("Code: 0x%08X"LF"")
_T("LastError: 0x%08X"LF""),
szModeleInfo,
E.ExceptionCode, dwLastError);
}
break;
}
}
//*************************************************************
VOID Get_Exception_Info(PEXCEPTION_POINTERS pException,
FILE* fp,
UINT dwLastError) {
//*************************************************************
// Allocate Str[DUMP_SIZE_MAX] and return Str with dump, if !pException - just return call stack in Str.
TCHAR Module_Name[MAX_PATH];
PBYTE Module_Addr;
HANDLE hFile;
FILETIME Last_Write_Time;
FILETIME Local_File_Time;
SYSTEMTIME T;
Get_Version_Str(fp);
_ftprintf(fp, _T("****************************************************")NL);
_ftprintf(fp, _T("process: ") );
GetModuleFileName(NULL, Module_Name, MAX_PATH);
_ftprintf(fp, _T("%s") NL, Module_Name);
// If exception occurred.
if (pException) {
EXCEPTION_RECORD & E = *pException->ExceptionRecord;
CONTEXT & C = *pException->ContextRecord;
// If module with E.ExceptionAddress found - save its path and date.
if (Get_Module_By_Ret_Addr((PBYTE)E.ExceptionAddress,
Module_Name,
Module_Addr)) {
_ftprintf(fp, _T("module: %s") NL, Module_Name);
if ((hFile = CreateFile(Module_Name,
GENERIC_READ,
FILE_SHARE_READ,
NULL,
OPEN_EXISTING,
FILE_ATTRIBUTE_NORMAL,
NULL)) != INVALID_HANDLE_VALUE) {
if (GetFileTime(hFile, NULL, NULL, &Last_Write_Time)) {
FileTimeToLocalFileTime(&Last_Write_Time, &Local_File_Time);
FileTimeToSystemTime(&Local_File_Time, &T);
_ftprintf(fp, _T("date modified: %02d/%02d/%d") NL,
T.wMonth, T.wDay, T.wYear);
}
CloseHandle(hFile);
}
}
else {
_ftprintf(fp,
_T("exception address: %08X")NL,
(LONG_PTR)(E.ExceptionAddress));
}
_ftprintf(fp,
_T("****************************************************")NL);
// 加入具体异常解释信息
CreateExceptionDesc(pException, fp, dwLastError);
// Save instruction that caused exception.
//if(E.ExceptionAddress)
//{
// _ftprintf(fp, _T("Instruction: ")NL);
// for (i = 0; i < 16; i++)
// _ftprintf(fp, _T(" %02X"), PBYTE(E.ExceptionAddress)[i]);
//}
// Save registers at exception.
//_ftprintf(fp, NL _T("Registers:") NL);
//_ftprintf(fp, _T("EAX: %08X EBX: %08X ECX: %08X EDX: %08X") NL, C.Eax, C.Ebx, C.Ecx, C.Edx);
//_ftprintf(fp, _T("ESI: %08X EDI: %08X ESP: %08X EBP: %08X")NL, C.Esi, C.Edi, C.Esp, C.Ebp);
//_ftprintf(fp, _T("EIP: %08X EFlags: %08X")NL, C.Eip, C.EFlags);
} //if (pException)
_ftprintf(fp, _T("****************************************************")NL);
// Save call stack info.
_ftprintf(fp, _T("Call Stack:")NL);
Get_Call_Stack(pException, fp);
} //Get_Exception_Info
/*vc functions }*/
bool create_smallinfo_dumpfile(PEXCEPTION_POINTERS exception,
char* filename,
uint16_t lasterror) {
if (!exception) return false;
//创建基本描述文件
char tempdir[MAX_PATH] = {0};
::GetTempPath(MAX_PATH, tempdir);
char tempfile[MAX_PATH] = {0};
::GetTempFileName(tempdir, _T("sml"), MAX_PATH, tempfile);
FILE* fp = _tfopen(tempfile, _T("w"));
if (!fp) return false;
CreateExceptionDesc(exception, fp, lasterror);
fclose(fp); fp = NULL;
::GetShortPathName(tempfile, filename, MAX_PATH);
if (0 == filename[0]) return false;
return true;
}
bool create_biginfo_dumpfile(PEXCEPTION_POINTERS exception,
char* filename,
uint16_t lasterror) {
if (!exception) return false;
char tempdir[MAX_PATH] = {0};
::GetTempPath(MAX_PATH, tempdir);
char tempfile[MAX_PATH] = {0};
::GetTempFileName(tempdir, _T("dtl"), MAX_PATH, tempfile);
FILE* fp = _tfopen(tempfile, _T("w"));
if (!fp) return false;
Get_Exception_Info(exception, fp, lasterror);
fclose(fp); fp = NULL;
::GetShortPathName(tempfile, filename, MAX_PATH);
if (0 == filename[0]) return false;
return true;
}
// 创建DBGHLEP所需要的dmp信息
bool create_dumphelp_file(PEXCEPTION_POINTERS exception,
char* filename) {
filename[0] = ' ';
filename[1] = 0;
// If MiniDumpWriteDump() of DbgHelp.dll available.
if (!theDbgHelper.m_pfnMiniDumpWriteDump)
return false;
char tempdir[MAX_PATH] = {0};
::GetTempPath(MAX_PATH, tempdir);
char tempfile[MAX_PATH] = {0};
::GetTempFileName(tempdir, _T("dmp"), MAX_PATH, tempfile);
MINIDUMP_EXCEPTION_INFORMATION M;
M.ThreadId = GetCurrentThreadId();
M.ExceptionPointers = exception;
M.ClientPointers = 0;
HANDLE hDump_File =
CreateFile(tempfile,
GENERIC_WRITE,
0,
NULL,
CREATE_ALWAYS,
FILE_ATTRIBUTE_NORMAL,
NULL);
theDbgHelper.m_pfnMiniDumpWriteDump(GetCurrentProcess(),
GetCurrentProcessId(),
hDump_File,
MiniDumpNormal,
(exception) ? &M : NULL,
NULL,
NULL);
CloseHandle(hDump_File);
::GetShortPathName(tempfile, filename, MAX_PATH);
if (0 == filename[0]) {
return false;
}
return true;
}
} //namespace errorinfo
} //namespace vengine_exception
| [
"[email protected]"
] | |
e42399bee0530b05036bfc62e162bcc48b9c399f | a9dc2740e210cf52b9f1fb5f8d97e0eff3d0d9b7 | /WIPPY_CSGO/CGavemEventManager.h | d8143a80125a76cafb540848afe351f6b6875606 | [] | no_license | plasmafart/ConvaCheats-CSGO | 61513382cd83d719b046d820db9643dcd633a2bd | 6f678f6dab0f47baac81d13892e5c20733fb35e9 | refs/heads/master | 2021-04-05T23:47:31.061868 | 2018-01-02T20:26:13 | 2018-01-02T20:26:13 | 124,439,844 | 1 | 0 | null | 2018-03-08T19:45:04 | 2018-03-08T19:45:04 | null | UTF-8 | C++ | false | false | 285 | h | #ifndef _CGAMEEVENTMANAGER_H_
#define _CGAMEEVENTMANAGER_H_
class cGameEventManager : public ValveSDK::IGameEventListener2
{
public:
cGameEventManager();
void FireGameEvent(ValveSDK::IGameEvent *event);
void RegisterSelf();
};
extern cGameEventManager gGameEventManager;
#endif | [
"[email protected]"
] | |
b6ae704e8a73a91c4cd6bd2c1e4e53ab096ef6bd | 02a10a5244d2214e932e54399e4b56b68fe5974b | /headers/ScriptServerActorStopRidingEvent.h | 35327c8c72cedb80571e13ef91f5271e8cd833a8 | [] | no_license | inxomnyaa/symbols-auto | 839381c1e83f434b76b2faccadee5e413ac5f376 | 439a1399473cc765badc1b5c438fbf83d9eadf1d | refs/heads/master | 2023-06-21T23:17:07.389321 | 2019-11-16T19:13:05 | 2019-11-16T19:13:05 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 257 | h | #pragma once
class ScriptServerActorStopRidingEvent : ScriptEventData {
virtual ~ScriptServerActorStopRidingEvent();
virtual ~ScriptServerActorStopRidingEvent();
virtual void _serialize(ScriptEngine &, ScriptApi::ScriptObjectHandle &)const;
}
| [
"[email protected]"
] | |
cd2cf613544c3b102a30d34695bb4499264df3d0 | bdc9b0972c241b12637abc8602c59ae1bffcde44 | /environments/MNAgentPuzzle.cpp | 95d773ef92b18d056c90395b24bb4039a44ec66d | [
"MIT"
] | permissive | carolyn-y/hog2 | eb0a3361b0d9247d1b7a4891fc1e1095b3eabf44 | 96616b40f4173959b127011c76f3e649688e1a99 | refs/heads/master | 2023-07-09T05:28:49.342432 | 2015-08-19T22:00:37 | 2015-08-19T22:00:37 | 277,397,436 | 0 | 0 | MIT | 2020-08-13T16:17:02 | 2020-07-05T23:02:04 | null | UTF-8 | C++ | false | false | 5,339 | cpp | /*
* MNAgentPuzzle.cpp
* hog2
*
* Created by Nathan Sturtevant on 9/25/10.
* Copyright 2010 University of Denver. All rights reserved.
*
*/
#include "MNAgentPuzzle.h"
#include <assert.h>
void MNAgentEnvironment::GetSuccessors(const MNAgentPuzzleState &nodeID, std::vector<MNAgentPuzzleState> &neighbors) const
{
neighbors.resize(0);
std::vector<tAgentAction> actions;
GetActions(nodeID, actions);
for (unsigned int x = 0; x < actions.size(); x++)
{
MNAgentPuzzleState s = nodeID;
ApplyAction(s, actions[x]);
neighbors.push_back(s);
}
}
void MNAgentEnvironment::GetActions(const MNAgentPuzzleState &s, std::vector<tAgentAction> &actions) const
{
int where = -1;
for (unsigned int w = 0; w < s.locations.size(); w++)
if (((s.locations[w]>>s.currentAgent)&0x1) != 0)
{
where = w;
break;
}
assert(where != -1);
uint64_t mask = (1<<s.currentAgent)-1;
if ((where-s.width > 0) && (s.locations[where-s.width]&mask) == 0)
{
actions.push_back(kAgentUp);
}
if ((where+s.width < s.locations.size()) && (s.locations[where+s.width]&mask) == 0)
{
actions.push_back(kAgentDown);
}
if ((where%s.width > 0) && (s.locations[where-1]&mask) == 0)
{
actions.push_back(kAgentLeft);
}
if ((where%s.width != s.width-1) && (s.locations[where+1]&mask) == 0)
{
actions.push_back(kAgentRight);
}
if ((s.locations[where]&mask) == 0)
{
actions.push_back(kAgentStay);
}
}
tAgentAction MNAgentEnvironment::GetAction(const MNAgentPuzzleState &s1, const MNAgentPuzzleState &s2) const
{
assert(false);
}
void MNAgentEnvironment::ApplyAction(MNAgentPuzzleState &s, tAgentAction a) const
{
uint64_t mask1 = (uint64_t)1<<s.currentAgent;
uint64_t mask2 = ~mask1;
int where = -1;
for (unsigned int w = 0; w < s.locations.size(); w++)
if (((s.locations[w]>>s.currentAgent)&0x1) != 0)
{
where = w;
break;
}
assert(where != -1);
s.locations[where]&=mask2;
// move
switch (a)
{
case kAgentStay: s.locations[where]|=mask1; break;
case kAgentLeft: s.locations[where-1]|=mask1; break;
case kAgentRight:s.locations[where+1]|=mask1; break;
case kAgentDown: s.locations[where+s.width]|=mask1; break;
case kAgentUp: s.locations[where-s.width]|=mask1; break;
}
s.currentAgent = (s.currentAgent+1)%s.numAgents;
}
void MNAgentEnvironment::GetNextState(const MNAgentPuzzleState &s1, tAgentAction a, MNAgentPuzzleState &s2) const
{
s2 = s1;
ApplyAction(s2, a);
}
bool MNAgentEnvironment::InvertAction(tAgentAction &a) const
{
assert(false);
}
/** Heuristic value between two arbitrary nodes. **/
double MNAgentEnvironment::HCost(const MNAgentPuzzleState &node1, const MNAgentPuzzleState &node2)
{
// for now we don't need this
return 1;
}
double MNAgentEnvironment::GCost(const MNAgentPuzzleState &node1, const MNAgentPuzzleState &node2)
{ return 1; }
double MNAgentEnvironment::GCost(const MNAgentPuzzleState &node, const tAgentAction &act)
{ return 1; }
bool MNAgentEnvironment::GoalTest(const MNAgentPuzzleState &node, const MNAgentPuzzleState &goal)
{
return (node == goal);
}
uint64_t MNAgentEnvironment::GetStateHash(const MNAgentPuzzleState &node) const
{
int base = node.numAgents;
uint64_t hash = 0;
for (unsigned int x = 0; x < node.locations.size(); x++)
{
int which = -1;
for (unsigned int w = 0; w < node.numAgents; w++)
{
if (((node.locations[x]>>w)&0x1) != 0)
{
which = w;
break;
}
}
which += 1;
if ((node.locations[x] != 0) && (node.locations[x] != filled))
{
hash = hash*base+which;
}
}
return hash;
}
uint64_t MNAgentEnvironment::GetActionHash(tAgentAction act) const
{
return act;
}
void MNAgentEnvironment::OpenGLDraw() const
{
}
void MNAgentEnvironment::OpenGLDraw(const MNAgentPuzzleState&s) const
{
glBegin(GL_QUADS);
glColor3f(0.5, 0.5, 0.5);
glVertex3f(-1, -1, 0.0);
glVertex3f( 1, -1, 0.0);
glVertex3f( 1, 1, 0.0);
glVertex3f(-1, 1, 0.0);
glEnd();
double radius = max(s.height, s.width);
radius = 1/radius;
for (unsigned int x = 0; x < s.locations.size(); x++)
{
if (s.locations[x] == -1)
{
glColor3f(0.0, 0.0, 0.0);
DrawSphere(-1.0+radius+(x%s.width)*2.0*radius,
-1.0+radius+((double)((int)x/s.width))*2.0*radius,
0, radius);
}
else if (s.locations[x] > 0)
{
glColor3f(0.0, (double)s.locations[x]/(double)(1<<s.numAgents), 1-(double)s.locations[x]/(double)(1<<s.numAgents));
DrawSphere(-1.0+radius+(x%s.width)*2.0*radius,
-1.0+radius+((double)((int)x/s.width))*2.0*radius,
0, radius);
// glPushMatrix();
//
// GLdouble xx, yy, zz, rad;
// GLfloat r, g, b, t;
// GetColor(r, g, b, t);
// glColor4f(r, g, b, t);
//
// glTranslatef(xx-rad, yy+rad/2, zz-rad);
// glScalef(rad/(300.0), rad/300.0, 1);
// glRotatef(180, 0.0, 0.0, 1.0);
// glRotatef(180, 0.0, 1.0, 0.0);
// //glTranslatef((float)x/width-0.5, (float)y/height-0.5, 0);
// glDisable(GL_LIGHTING);
// glutStrokeCharacter(GLUT_STROKE_ROMAN, '0'+);
// glEnable(GL_LIGHTING);
// //glTranslatef(-x/width+0.5, -y/height+0.5, 0);
// glPopMatrix();
//
}
}
}
/** Draw the transition at some percentage 0...1 between two MNAgentPuzzleStates */
void MNAgentEnvironment::OpenGLDraw(const MNAgentPuzzleState&, const MNAgentPuzzleState&, float) const
{
}
void MNAgentEnvironment::OpenGLDraw(const MNAgentPuzzleState&, const tAgentAction&) const
{
}
| [
"nathanst@3e291e08-dd2d-0410-9de5-7df0620fb8d4"
] | nathanst@3e291e08-dd2d-0410-9de5-7df0620fb8d4 |
de97d368ebb9cf321baf96dc5a4d56b16613974a | f12e4236927a1299a282a3313c896344e82ae91a | /include/game/Player.h | 93099f8c3dde2cea0ba568d101889cfce642bb19 | [] | no_license | julienvaslet/library | b7a9c3365875db839d6b07fd61ab8f578dd872b7 | 3276ab6aef9f4b49887d8d90ed4abc4a677c8b3d | refs/heads/master | 2021-01-12T14:16:46.813436 | 2017-03-02T18:35:03 | 2017-03-02T18:35:03 | 70,004,644 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 884 | h | #ifndef __GAME_PLAYER_H
#define __GAME_PLAYER_H 1
namespace game
{
class Player;
}
#include <controller/Controller.h>
#include <controller/EventHandler.h>
#include <map>
#include <string>
using namespace controller;
using namespace std;
namespace game
{
class Player
{
protected:
static map<string, Player *> players;
string name;
Controller * controller;
EventHandler * eventHandler;
public:
Player( const string& name );
virtual ~Player();
const string& getName() const;
void handleEvent( Mapping::Button button, short int value, unsigned int timestamp );
void setEventHandler( EventHandler * eventHandler );
void setController( Controller * controller );
static Player * get( const string& name );
static unsigned int getCount();
static Player * get( unsigned int index );
static void destroy();
};
}
#endif
| [
"[email protected]"
] | |
8ff451927457be4150e24682cbea10b70488031f | a3d6556180e74af7b555f8d47d3fea55b94bcbda | /content/browser/network/sandboxed_network_list_browsertest.cc | 49e0b70cc64c8165b3cb0c61edf47aa0d2220509 | [
"BSD-3-Clause"
] | permissive | chromium/chromium | aaa9eda10115b50b0616d2f1aed5ef35d1d779d6 | a401d6cf4f7bf0e2d2e964c512ebb923c3d8832c | refs/heads/main | 2023-08-24T00:35:12.585945 | 2023-08-23T22:01:11 | 2023-08-23T22:01:11 | 120,360,765 | 17,408 | 7,102 | BSD-3-Clause | 2023-09-10T23:44:27 | 2018-02-05T20:55:32 | null | UTF-8 | C++ | false | false | 6,492 | cc | // Copyright 2023 The Chromium Authors
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
#include <memory>
#include <string>
#include <vector>
#include "base/feature_list.h"
#include "base/files/file_util.h"
#include "base/json/json_reader.h"
#include "base/json/json_writer.h"
#include "base/test/bind.h"
#include "base/test/scoped_feature_list.h"
#include "base/threading/thread_restrictions.h"
#include "base/values.h"
#include "build/build_config.h"
#include "content/public/browser/browser_context.h"
#include "content/public/browser/network_service_instance.h"
#include "content/public/browser/page.h"
#include "content/public/browser/web_contents.h"
#include "content/public/common/content_features.h"
#include "content/public/common/content_paths.h"
#include "content/public/test/browser_test.h"
#include "content/public/test/content_browser_test.h"
#include "content/shell/browser/shell.h"
#include "net/base/network_interfaces.h"
#include "sandbox/features.h"
#include "sandbox/policy/features.h"
#include "services/network/public/mojom/network_service.mojom.h"
#include "testing/gtest/include/gtest/gtest.h"
namespace content {
namespace {
class SandboxedNetworkListBrowserTest : public ContentBrowserTest {
public:
SandboxedNetworkListBrowserTest() {
[[maybe_unused]] bool sandbox_enabled = false;
[[maybe_unused]] bool lpac_enabled = false;
switch (GetTestPreCount()) {
case 0:
break;
case 1:
sandbox_enabled = false;
lpac_enabled = false;
break;
case 2:
sandbox_enabled = true;
lpac_enabled = false;
break;
case 3:
sandbox_enabled = true;
lpac_enabled = true;
break;
default:
NOTREACHED_NORETURN();
}
std::vector<base::test::FeatureRef> enabled_features;
std::vector<base::test::FeatureRef> disabled_features;
disabled_features.push_back(features::kNetworkServiceInProcess);
#if !BUILDFLAG(IS_MAC) && !BUILDFLAG(IS_FUCHSIA)
if (sandbox_enabled) {
enabled_features.push_back(
sandbox::policy::features::kNetworkServiceSandbox);
} else {
disabled_features.push_back(
sandbox::policy::features::kNetworkServiceSandbox);
}
#endif // !BUILDFLAG(IS_MAC) && !BUILDFLAG(IS_FUCHSIA)
#if BUILDFLAG(IS_WIN)
if (lpac_enabled) {
enabled_features.push_back(
sandbox::policy::features::kWinSboxNetworkServiceSandboxIsLPAC);
} else {
disabled_features.push_back(
sandbox::policy::features::kWinSboxNetworkServiceSandboxIsLPAC);
}
#endif // BUILDFLAG(IS_WIN)
scoped_features_.InitWithFeatures(enabled_features, disabled_features);
}
protected:
#if BUILDFLAG(IS_ANDROID)
void SetUp() override {
GTEST_SKIP() << "GetNetworkList not yet supported in Android network "
"sandbox. See https://crbug.com/1381381.";
}
#endif // BUILDFLAG(IS_ANDROID)
void WriteInterfacesToFile(const base::FilePath& path) {
base::Value::List interfaces_list;
base::RunLoop run_loop;
std::vector<net::NetworkInterface> interfaces;
GetNetworkService()->GetNetworkList(
net::EXCLUDE_HOST_SCOPE_VIRTUAL_INTERFACES,
base::BindLambdaForTesting(
[&](const absl::optional<std::vector<net::NetworkInterface>>& ret) {
interfaces = *ret;
run_loop.Quit();
}));
run_loop.Run();
for (const auto& interface : interfaces) {
base::Value::Dict interface_dict;
interface_dict.Set("name", interface.name);
interface_dict.Set("type", interface.type);
interface_dict.Set("address", interface.address.ToString());
interfaces_list.Append(std::move(interface_dict));
}
std::string json;
EXPECT_TRUE(base::JSONWriter::Write(interfaces_list, &json));
EXPECT_TRUE(base::WriteFile(path, json));
}
bool AreFileContentsIdentical(const base::FilePath& path1,
const base::FilePath& path2) {
std::string contents1;
EXPECT_TRUE(base::ReadFileToString(path1, &contents1));
std::string contents2;
EXPECT_TRUE(base::ReadFileToString(path2, &contents2));
return (contents1 == contents2);
}
base::FilePath GetPersistentPathLocation(base::StringPiece name) {
return shell()->web_contents()->GetBrowserContext()->GetPath().AppendASCII(
name);
}
private:
size_t GetTestPreCount() {
constexpr base::StringPiece kPreTestPrefix = "PRE_";
base::StringPiece test_name =
testing::UnitTest::GetInstance()->current_test_info()->name();
size_t count = 0;
while (base::StartsWith(test_name, kPreTestPrefix)) {
++count;
test_name = test_name.substr(kPreTestPrefix.size());
}
return count;
}
base::test::ScopedFeatureList scoped_features_;
};
// First part of the test has sandbox enabled, and on Windows, LPAC sandbox also
// enabled.
IN_PROC_BROWSER_TEST_F(SandboxedNetworkListBrowserTest,
PRE_PRE_PRE_NetworkList) {
base::ScopedAllowBlockingForTesting allow_blocking;
WriteInterfacesToFile(GetPersistentPathLocation("3"));
}
// Second part of the test has sandbox enabled, and on Windows, LPAC sandbox
// also disabled. On non-Windows this makes the test the same as the first
// one above.
IN_PROC_BROWSER_TEST_F(SandboxedNetworkListBrowserTest, PRE_PRE_NetworkList) {
base::ScopedAllowBlockingForTesting allow_blocking;
WriteInterfacesToFile(GetPersistentPathLocation("2"));
}
// Third part of the test runs with sandbox disabled.
IN_PROC_BROWSER_TEST_F(SandboxedNetworkListBrowserTest, PRE_NetworkList) {
base::ScopedAllowBlockingForTesting allow_blocking;
WriteInterfacesToFile(GetPersistentPathLocation("1"));
}
// The fourth part of the test verifies all the other results match and deletes
// the files.
IN_PROC_BROWSER_TEST_F(SandboxedNetworkListBrowserTest, NetworkList) {
base::ScopedAllowBlockingForTesting allow_blocking;
EXPECT_TRUE(AreFileContentsIdentical(GetPersistentPathLocation("1"),
GetPersistentPathLocation("2")));
EXPECT_TRUE(AreFileContentsIdentical(GetPersistentPathLocation("1"),
GetPersistentPathLocation("3")));
base::DeleteFile(GetPersistentPathLocation("1"));
base::DeleteFile(GetPersistentPathLocation("2"));
base::DeleteFile(GetPersistentPathLocation("3"));
}
} // namespace
} // namespace content
| [
"[email protected]"
] | |
72dbea11f3f367470398aaeb37b67ee845a3f39f | 7bdd054783eda064da904e1c684d7a04fe5cdd48 | /source/NetConfAgent.cpp | 5759aee1371e2f776ce4cee56c8acb243ab1830a | [] | no_license | dritekop/Telecommunication-Mobile-Network | 27677affd458633aa77c22a17768e725e800b2a3 | a80d64d82b8eff6f5606571a6cf3275931027c94 | refs/heads/main | 2023-06-12T16:21:21.484228 | 2021-07-08T13:17:29 | 2021-07-08T13:17:29 | 368,589,127 | 0 | 1 | null | 2021-06-22T14:04:45 | 2021-05-18T15:57:52 | C++ | UTF-8 | C++ | false | false | 6,903 | cpp | #include <NetConfAgent.hpp>
#include <MobileClient.hpp>
#define MAX_LEN 100
namespace netconfag {
bool NetConfAgent::initSysrepo()
{
try {
_s_conn = std::make_shared<sysrepo::Connection>();
_s_sess = std::make_shared<sysrepo::Session>(_s_conn);
_s_sub = std::make_shared<sysrepo::Subscribe>(_s_sess);
return true;
} catch (const std::exception& e) {
std::cout << "Error. Try to start server.\n";
std::cout << e.what() << std::endl;
return false;
}
}
bool NetConfAgent::closeSys()
{
try
{
_s_sess->session_stop();
_s_sess.reset();
_s_conn.reset();
_s_sub.reset();
return true;
}
catch (const std::exception& e)
{
std::cout << e.what() << std::endl;
return false;
}
}
bool NetConfAgent::fetchData(std::map<std::string, std::string>& sXpathAndValue)
{
try
{
for (auto item : sXpathAndValue)
{
item.second = _s_sess->get_item(item.first.c_str())->val_to_string();
sXpathAndValue[item.first] = item.second;
}
return true;
}
catch (const std::exception& e)
{
return false;
}
}
bool NetConfAgent::subscribeForModelChanges(mobileclient::MobileClient& refUser, const std::string& moduleName)
{
try
{
auto subscribe = [&refUser] (sysrepo::S_Session session, const char* module_name, const char* xpath,\
sr_event_t event, uint32_t request_id) {
if (SR_EV_DONE == event)
{
auto iter = session->dup_changes_iter(xpath);
auto changes = session->get_change_next(iter);
auto change = changes->new_val();
std::string value;
if (change != nullptr)
value = change->val_to_string();
else
value = "deleted";
refUser.handleModuleChange(value);
}
return SR_ERR_OK;
};
_s_sub->module_change_subscribe(moduleName.c_str(), subscribe, refUser.getXpathState().c_str());
return true;
}
catch (const std::exception& e)
{
std::cout << e.what() << std::endl;
return false;
}
}
bool NetConfAgent::registerOperData(mobileclient::MobileClient& refUser, const std::string& moduleName)
{
try
{
auto cb = [&refUser] (sysrepo::S_Session session, const char *module_name, const char *path, const char *request_xpath,
uint32_t request_id, libyang::S_Data_Node &parent)
{
std::string xpath;
std::string operValue;
refUser.handleOperData(xpath, operValue);
libyang::S_Context ctx = session->get_context();
libyang::S_Module mod = ctx->get_module(module_name);
parent->new_path(ctx, xpath.c_str(), operValue.c_str(), LYD_ANYDATA_CONSTSTRING, 0);
return SR_ERR_OK;
};
std::string subPath = refUser.getXpathState();
subPath.erase(subPath.rfind("/"));
_s_sub->oper_get_items_subscribe(moduleName.c_str(), cb, subPath.c_str());
return true;
}
catch (const std::exception& e)
{
std::cout << e.what() << std::endl;
return false;
}
}
bool NetConfAgent::subscribeForRpc(const std::string& sXpath, const size_t& amount, const std::map<std::string, std::string>& leafNameValue)
{
try
{
auto cbVals = [sXpath, amount, leafNameValue](sysrepo::S_Session session, const char* op_path, const sysrepo::S_Vals input,\
sr_event_t event, uint32_t request_id, sysrepo::S_Vals_Holder output)
{
std::cout << "\n ========== RPC CALLED ==========\n" << std::endl;
auto out_vals = output->allocate(amount);
for(size_t n = 0; n < input->val_cnt(); ++n)
{
auto value = input->val(n);
std::cout << value->xpath();
std::cout << " = " << value->data()->get_string() << std::endl;
}
/*
the structure of the code below matches to the yang model MOBILENETWORK.
*/
std::map<std::string,std::string>::const_iterator it = leafNameValue.begin();
std::pair<std::string, std::string> nameValue = *it;
std::string name = sXpath + "/" + nameValue.first;
out_vals->val(0)->set(name.c_str(), nameValue.second.c_str(), SR_STRING_T);
++it;
nameValue = *it;
name = sXpath + "/" + nameValue.first;
out_vals->val(1)->set(name.c_str(), nameValue.second.c_str(), SR_ENUM_T);
std::cout << "\n ========== PRINT RETURN VALUE ==========\n" << std::endl;
auto value = out_vals->val(0);
std::cout << value->xpath();
std::cout << " = " << value->data()->get_string() << std::endl;
value = out_vals->val(1);
std::cout << value->xpath();
std::cout << " = " << value->data()->get_enum() << std::endl;
return SR_ERR_OK;
};
std::cout << "\n ========== SUBSCRIBE TO RPC CALL ==========\n" << std::endl;
_s_sub->rpc_subscribe(sXpath.c_str(), cbVals, 1);
return true;
}
catch (const std::exception& e)
{
std::cout << e.what() << std::endl;
return false;
}
}
bool NetConfAgent::notifySysrepo(const std::string& sXpath, const std::map<std::string, std::string>& sLeafValue)
{
try
{
auto in_vals = std::make_shared<sysrepo::Vals>(sLeafValue.size());
size_t i = 0;
for (auto item : sLeafValue)
{
std::string setXpath = sXpath + "/" + item.first;
in_vals->val(i)->set(setXpath.c_str(), item.second.c_str(), SR_STRING_T);
++i;
}
_s_sess->event_notif_send(sXpath.c_str(), in_vals);
return true;
}
catch (const std::exception& e)
{
std::cout << e.what() << std::endl;
return false;
}
}
bool NetConfAgent::changeData(const std::string& sXpath, const std::string& value)
{
if (!value.empty())
{
try
{
_s_sess->set_item_str(sXpath.c_str(), value.c_str());
_s_sess->apply_changes();
return true;
}
catch (const std::exception& e)
{
std::cout << e.what() << std::endl;
return false;
}
}
else
{
try
{
_s_sess->delete_item(sXpath.c_str());
_s_sess->apply_changes();
return true;
}
catch (const std::exception& e)
{
std::cout << e.what() << std::endl;
return false;
}
}
}
}; // namespace netconfag ends
| [
"[email protected]"
] | |
9bab766985a022f1011a8b0824dad56ae0537e71 | d0c44dd3da2ef8c0ff835982a437946cbf4d2940 | /cmake-build-debug/programs_tiling/function14290/function14290_schedule_8/function14290_schedule_8_wrapper.cpp | 7d124e52b2e3cc6dd5b1b52d64e975e1b61915de | [] | no_license | IsraMekki/tiramisu_code_generator | 8b3f1d63cff62ba9f5242c019058d5a3119184a3 | 5a259d8e244af452e5301126683fa4320c2047a3 | refs/heads/master | 2020-04-29T17:27:57.987172 | 2019-04-23T16:50:32 | 2019-04-23T16:50:32 | 176,297,755 | 1 | 2 | null | null | null | null | UTF-8 | C++ | false | false | 934 | cpp | #include "Halide.h"
#include "function14290_schedule_8_wrapper.h"
#include "tiramisu/utils.h"
#include <cstdlib>
#include <iostream>
#include <time.h>
#include <fstream>
#include <chrono>
#define MAX_RAND 200
int main(int, char **){
Halide::Buffer<int32_t> buf00(64, 64, 128, 64);
Halide::Buffer<int32_t> buf0(64, 64, 128, 64);
init_buffer(buf0, (int32_t)0);
auto t1 = std::chrono::high_resolution_clock::now();
function14290_schedule_8(buf00.raw_buffer(), buf0.raw_buffer());
auto t2 = std::chrono::high_resolution_clock::now();
std::chrono::duration<double> diff = t2 - t1;
std::ofstream exec_times_file;
exec_times_file.open("../data/programs/function14290/function14290_schedule_8/exec_times.txt", std::ios_base::app);
if (exec_times_file.is_open()){
exec_times_file << diff.count() * 1000000 << "us" <<std::endl;
exec_times_file.close();
}
return 0;
} | [
"[email protected]"
] | |
5979ed09076b6077c2b438888f36d01b0ae036e5 | b9c8b79477b5793943abd69b826e3476114d9a71 | /connect.h | 5b2ac0e47dfde7c193fe454ec6d383bd68c74c32 | [] | no_license | lyt98123/post_inspection | 8a031b7eb5f627dcd1fd5e20dd9e57b2433d4325 | 75e27f59074e25ab2296ebf19f82fd44c5f25fed | refs/heads/master | 2021-12-04T18:13:41.610683 | 2015-04-29T08:18:17 | 2015-04-29T08:18:17 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,599 | h | //connect.h
//header file of class connect
#include <iostream>
#include <vector>
#include <opencv2/highgui/highgui.hpp>
#include <opencv2/imgproc/imgproc.hpp>
using namespace cv;
class connected
{
public:
void FindBlobs(cv::Mat &binary, std::vector < std::vector<cv::Point2i> > &blobs);
void drawlabel(cv::Mat &output, std::vector < std::vector<cv::Point2i> > &blobs);
void drawlabel_bin(cv::Mat &output, std::vector < std::vector<cv::Point2i> > &blobs);
void analysisline( std::vector < std::vector<cv::Point2i> > &blobs,Mat &img,Mat &source);//,double **dis);
void sort(float *arr,int *index, int n);
void blob_sort(std::vector < std::vector<cv::Point2i> > &blobs,int *arr);
double distance(double x1,double y1,double x2, double y2);
void neighborPoint(double slope,double x0,double y0,double sol[4]);
int x;
int y;
int w,h;
///analysisline***
int *sorting;
unsigned int blobsize;
unsigned int amount;//total number of blobs pixels
unsigned int amount5;//the bigger 5 components
int *xcenter,*ycenter; //mass center
float *p,*p2;//probability
float propotion_biggest2;
float avg_x,avg_y;//expected value
float exp_x,exp_y;//expected value
float mul_xy,mul_xx;//sum
float a,b;//Regression Line equation y=ax+b
float *dis;//distance to Line
unsigned int graylevel[256];float pro_gray[256];
float mean,var,sigma;//mean , variance of local region
float var2 ,sigma2;//variance and sigma of ycenter
unsigned int roi_area;
float roi_value;
///***analysisline
};
| [
"[email protected]"
] | |
82419c2c44c949a31c49b1ef799445a26bf79f6a | fe7c1ed30236ae57fa7023251d0ddd882b1fcf0a | /src/system/GL0cContext.cpp | 44cb5f269c81b384070da093c1724434aa702fc0 | [] | no_license | LostAFSendHelp/gl0c | 3abba87f2ca5a50f028bd0501d577dd37ef97518 | c2714ba35cb339f4d2e59a2a468f802eb3e16808 | refs/heads/master | 2022-12-06T10:20:47.334987 | 2020-08-13T17:49:09 | 2020-08-13T17:49:09 | 284,423,743 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 816 | cpp | #include "GL0cContext.h"
GL0cContext::GL0cContext(const GL0cRenderer& renderer, GLFWwindow* window):
mRenderer(renderer),
mWindow(window) { }
GL0cContext::~GL0cContext() { }
void GL0cContext::terminate() const {
glfwTerminate();
}
std::shared_ptr<GL0cContext> GL0cContext::sample(GLFWwindow* window) {
auto context = std::make_shared<GL0cContext>(GL0cRenderer::sample(), window);
auto box1 = std::make_shared<GL0cEntity>();
auto box2 = std::make_shared<GL0cEntity>();
box1->push(GL0cVertexArray::sample());
box1->getComponent<GL0cVertexArray>()->translate(-.5f, .0f, .0f );
box2->push(GL0cVertexArray::sample());
box2->getComponent<GL0cVertexArray>()->translate(.5f, .0f, .0f );
context->mEntities.push_back(box1);
context->mEntities.push_back(box2);
return context;
} | [
"[email protected]"
] | |
034f05398b2812f9d8907ae6ef9dc45781e6d1b8 | 91341fb7e29eb4b3a333def7147abf253ed4d448 | /basicOOP/husbandsandwifes-7.cpp | 5340a8d3c35cf9109d09e3030647bdd1749a6a68 | [] | no_license | sametcem/cpp | d34e45e9b9b5d94f50c109115de66006d1bd6a90 | ed6d570cf4077192eeb3fb48e754449eeb893006 | refs/heads/master | 2020-12-09T20:08:42.229380 | 2020-01-12T21:09:04 | 2020-01-12T21:09:04 | 233,406,194 | 1 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,068 | cpp | // husbandsandwifes-7.cpp : This file contains the 'main' function. Program execution begins and ends there.
//
#include "pch.h"
#include <iostream>
#include <cstring> // strcpy
using namespace std;
struct Husband;
struct Wife;
void prinfo(const Husband*);
void prinfo(const Wife*);
struct Wife {
Husband *hus;
char name[20];
} heather = { 0, "Heather" };
struct Husband {
Wife *wif;
char name[20];
} anthony = { 0 };
int main()
{
strcpy_s(anthony.name, "Anthony");
anthony.wif = &heather;
heather.hus = &anthony;
Husband zachary = { 0, "Zachary" };
Wife cecilia = { 0, "Cecilia" };
prinfo(&anthony);
prinfo(&heather);
prinfo(&zachary);
prinfo(&cecilia);
}
void prinfo(const Husband *h) {
cout << "Man: " << h->name;
if (h->wif)
cout << "; wife "
<< h->wif->name << "\n";
else
cout << "; (single)\n";
}
void prinfo(const Wife *w) {
cout << "Woman: " << w->name;
if (w->hus)
cout << "; husband "
<< (*((*w).hus)).name << "\n";
else
cout << "; (single)\n";
}
| [
"[email protected]"
] | |
95681b0e48c6a783d602eb49eaa955698e007217 | 367a80c031716a9d600a30eb72d7eac15698c7f2 | /src/math/test_plane.cc | 63d54380f5a4540244882da66d241f3ebaddd5aa | [] | no_license | mnvl/scratch | 9588ed1410655961d15d376d4bb2aad4981db859 | 7717772e0b9a85c8feb73fdc3562425f48b4a727 | refs/heads/master | 2020-04-10T08:39:52.750838 | 2012-08-19T08:24:32 | 2012-08-19T08:24:32 | 5,469,431 | 1 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 5,940 | cc |
#include <boost/test/unit_test.hpp>
#include "aabb.h"
#include "obb.h"
#include "plane.h"
BOOST_AUTO_TEST_SUITE(plane)
BOOST_AUTO_TEST_CASE(get_origin_1)
{
math::plane<> p1(math::vec<3>(1, -3, 5), math::vec<3>(-7, 11, -13));
math::plane<> p2(p1.get_origin(), p1.get_normal());
BOOST_REQUIRE(abs(p1.A - p2.A) < math::EPSILON);
BOOST_REQUIRE(abs(p1.B - p2.B) < math::EPSILON);
BOOST_REQUIRE(abs(p1.C - p2.C) < math::EPSILON);
BOOST_REQUIRE(abs(p1.D - p2.D) < math::EPSILON);
}
BOOST_AUTO_TEST_CASE(classify_point_1)
{
math::plane<> pl(math::vec<3>(0, -1, 0), math::vec<3>(1, 1, 1));
BOOST_REQUIRE(pl.classify(math::vec<3>(0, -2, 0)) == math::plane<>::NEGATIVE);
BOOST_REQUIRE(pl.classify(math::vec<3>(0, 0, 0)) == math::plane<>::POSITIVE);
BOOST_REQUIRE(pl.classify(math::vec<3>(0, -1, 0)) == math::plane<>::INTERSECTS);
}
BOOST_AUTO_TEST_CASE(classify_point_2)
{
math::plane<> pl(math::vec<3>(0, 0, 0), math::vec<3>(1, -1, 1));
BOOST_REQUIRE(pl.classify(math::vec<3>(-2, -1.5, -2)) == math::plane<>::NEGATIVE);
BOOST_REQUIRE(pl.classify(math::vec<3>(-1, -2, -1)) == math::plane<>::INTERSECTS);
}
BOOST_AUTO_TEST_CASE(classify_aabb_1)
{
math::plane<> pl(math::vec<3>(-1, -1, -1), math::vec<3>(1, 1, 1));
BOOST_REQUIRE(pl.classify(math::aabb<3>(math::vec<3>(-2, -2, -2), math::vec<3>(-1, -1.5, -1))) == math::plane<>::NEGATIVE);
BOOST_REQUIRE(pl.classify(math::aabb<3>(math::vec<3>(-2, -2, -2), math::vec<3>(-1, -1, -1))) == math::plane<>::INTERSECTS);
BOOST_REQUIRE(pl.classify(math::aabb<3>(math::vec<3>(0, 0, 0), math::vec<3>(1, 1, 1))) == math::plane<>::POSITIVE);
BOOST_REQUIRE(pl.classify(math::aabb<3>(math::vec<3>(-1, -1, -1), math::vec<3>(1, 1, 1))) == math::plane<>::INTERSECTS);
}
BOOST_AUTO_TEST_CASE(classify_aabb_2)
{
math::plane<> pl(math::vec<3>(-1, -1, -1), math::vec<3>(-1, -1, -1));
BOOST_REQUIRE(pl.classify(math::aabb<3>(math::vec<3>(-2, -2, -2), math::vec<3>(-1, -1.5, -1))) == math::plane<>::POSITIVE);
BOOST_REQUIRE(pl.classify(math::aabb<3>(math::vec<3>(-2, -2, -2), math::vec<3>(-1, -1, -1))) == math::plane<>::INTERSECTS);
BOOST_REQUIRE(pl.classify(math::aabb<3>(math::vec<3>(0, 0, 0), math::vec<3>(1, 1, 1))) == math::plane<>::NEGATIVE);
BOOST_REQUIRE(pl.classify(math::aabb<3>(math::vec<3>(-1, -1, -1), math::vec<3>(1, 1, 1))) == math::plane<>::INTERSECTS);
}
BOOST_AUTO_TEST_CASE(classify_aabb_3)
{
math::plane<> pl(math::vec<3>(0, 0, 0), math::vec<3>(1, -1, 1));
BOOST_REQUIRE(pl.classify(math::aabb<3>(math::vec<3>(0, 4, 0), math::vec<3>(1, 5, 1))) == math::plane<>::NEGATIVE);
BOOST_REQUIRE(pl.classify(math::aabb<3>(math::vec<3>(-1, -5, -1), math::vec<3>(0, -4, 0))) == math::plane<>::POSITIVE);
BOOST_REQUIRE(pl.classify(math::aabb<3>(math::vec<3>(-2, -2, -2), math::vec<3>(0, 0, 0))) == math::plane<>::INTERSECTS);
BOOST_REQUIRE(pl.classify(math::aabb<3>(math::vec<3>(-1, -1, -1), math::vec<3>(1, 1, 1))) == math::plane<>::INTERSECTS);
}
BOOST_AUTO_TEST_CASE(classify_aabb_4)
{
math::plane<> pl(math::vec<3>(0, 2, 0), math::vec<3>(1, 1, 1));
BOOST_REQUIRE(pl.classify(math::aabb<3>(math::vec<3>(-1, -1, -1), math::vec<3>(0, 0, 0))) == math::plane<>::NEGATIVE);
}
BOOST_AUTO_TEST_CASE(classify_obb_1)
{
math::plane<> pl(math::vec<3>(0, 0, 0), math::vec<3>(1, 1, 1));
BOOST_REQUIRE(pl.classify(
math::obb<3>(math::vec<3>(0, 1, 0), math::vec<3>(1, 0, 0), math::vec<3>(0, 1, 0), math::vec<3>(0, 0, 1)))
== math::plane<>::POSITIVE);
BOOST_REQUIRE(pl.classify(
math::obb<3>(math::vec<3>(-1, -2, -1), math::vec<3>(1, 0, 0), math::vec<3>(0, 1, 0), math::vec<3>(0, 0, 1)))
== math::plane<>::NEGATIVE);
}
BOOST_AUTO_TEST_CASE(classify_obb_2)
{
math::plane<> pl(math::vec<3>(0, 0, 0), math::vec<3>(1, 1, 1));
BOOST_REQUIRE(pl.classify(
math::obb<3>(
math::vec<3>(-1, -1, -1),
math::vec<3>(11, 10, 10),
math::vec<3>(10, 11, 10),
math::vec<3>(10, 10, 11)))
== math::plane<>::INTERSECTS);
}
BOOST_AUTO_TEST_CASE(classify_obb_3)
{
math::plane<> pl;
pl.A = 0.00000000f;
pl.B = -0.26937401f;
pl.C = -0.26937401f;
pl.D = 1.00618340f;
math::obb<3> bound;
bound.origin.set(-5.6245117f, 0.00000000f, 23.716305f);
bound.tangent.set(2.0000000f, 0.00000000f, 0.00000000f);
bound.normal.set(0.00000000f, 1.0000000f, 0.00000000f);
bound.binormal.set(0.00000000f, 0.00000000f, 2.0000000f);
BOOST_REQUIRE (pl.classify(bound.origin) == math::plane<>::NEGATIVE);
BOOST_REQUIRE (pl.classify(bound.origin + bound.tangent) == math::plane<>::NEGATIVE);
BOOST_REQUIRE (pl.classify(bound.origin + bound.normal) == math::plane<>::NEGATIVE);
BOOST_REQUIRE (pl.classify(bound.origin + bound.binormal) == math::plane<>::NEGATIVE);
BOOST_REQUIRE (pl.classify(bound) == math::plane<>::NEGATIVE);
}
BOOST_AUTO_TEST_CASE(raytrace_1)
{
math::plane<> pl(math::vec<3>(0, 0, 0), math::vec<3>(0, 1, 0));
math::ray<3> r(math::vec<3>(0, 1, 0), math::vec<3>(0, -10, 0));
math::scalar t;
math::vec<3> v;
pl.trace(r, t, v);
BOOST_REQUIRE((v - math::vec<3>(0, 0, 0)).length() < math::EPSILON);
}
BOOST_AUTO_TEST_CASE(raytrace_2)
{
math::plane<> pl(math::vec<3>(0, 0, 0), math::vec<3>(0, 1, 0));
math::ray<3> r(math::vec<3>(7, 1, 11), math::vec<3>(0, -10, 0));
math::scalar t;
math::vec<3> v;
pl.trace(r, t, v);
BOOST_REQUIRE((v - math::vec<3>(7, 0, 11)).length() < math::EPSILON);
}
BOOST_AUTO_TEST_CASE(raytrace_3)
{
math::plane<> pl(math::vec<3>(1, 3, 5), math::vec<3>(0, 1, 0));
math::ray<3> r(math::vec<3>(7 + 1, 1 + 3, 11 + 5), math::vec<3>(0, -10, 0));
math::scalar t;
math::vec<3> v;
pl.trace(r, t, v);
BOOST_REQUIRE((v - math::vec<3>(7 + 1, 0 + 3, 11 + 5)).length() < math::EPSILON);
}
BOOST_AUTO_TEST_CASE(raytrace_4)
{
math::plane<> pl(math::vec<3>(1, 3, 5), math::vec<3>(1, 1, 1));
math::ray<3> r(math::vec<3>(1, 10, 5), math::vec<3>(0, -10, 0));
math::scalar t;
math::vec<3> v;
pl.trace(r, t, v);
BOOST_REQUIRE((v - math::vec<3>(1, 3, 5)).length() < math::EPSILON);
}
BOOST_AUTO_TEST_SUITE_END()
| [
"[email protected]"
] | |
b0274691c80b36d194785bc9fbc8ac3d8f08bbcf | faa9c9e8c695595c5055ad0482a83f8135c6c6bc | /flume/runtime/common/cache_iterator.cpp | 45b5e2c90497d7b8e482825a59e16334efbfdefe | [
"Apache-2.0"
] | permissive | baidu/bigflow | 0eb00e185ee4ff4ed291dc06694eed40ceb6ff0b | cfcef62e8a64565b1dceb84efd4278fa83f87b7c | refs/heads/master | 2023-08-19T03:52:15.753975 | 2022-10-31T02:43:43 | 2022-10-31T02:43:43 | 110,657,073 | 1,279 | 188 | Apache-2.0 | 2022-10-04T23:39:12 | 2017-11-14T07:43:04 | C++ | UTF-8 | C++ | false | false | 3,917 | cpp | /***************************************************************************
*
* Copyright (c) 2015 Baidu, Inc. All Rights Reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
**************************************************************************/
// Author: Zhang Yuncong ([email protected])
#include <map>
#include <string>
#include <vector>
#include "toft/base/scoped_ptr.h"
#include "flume/runtime/common/cache_iterator.h"
#include "flume/runtime/util/object_holder.h"
namespace baidu {
namespace flume {
namespace runtime {
class CacheIterator::Impl {
public:
Impl(CacheManager::Reader* cache_reader,
const flume::core::Entity<flume::core::Objector>& objector)
: m_objector_entity(objector),
m_objector(NULL),
m_cache_reader(cache_reader),
m_iterator(NULL),
m_value_holder(NULL) {
Reset();
}
virtual ~Impl() {}
virtual bool Next() {
while(m_cur_split != m_splits.size()) {
if (NULL == m_iterator) {
m_iterator = m_cache_reader->Read(m_splits[m_cur_split]);
CHECK(NULL != m_iterator) << "read split " << m_splits[m_cur_split] << " failed";
}
if (m_iterator->Next()) {
m_keys = m_iterator->Keys();
m_value = m_iterator->Value();
return true;
}
++m_cur_split;
m_iterator = NULL;
}
return false;
}
virtual void Reset() {
m_splits.clear();
m_cache_reader->GetSplits(&m_splits);
m_cur_split = 0;
}
virtual void Done() {
if (m_iterator) {
m_iterator->Done();
}
m_splits.clear();
}
virtual const std::vector<toft::StringPiece>& Keys() const {
return m_keys;
}
virtual void* Value() const {
if (m_value_holder.get() == NULL) {
m_objector.reset(m_objector_entity.CreateAndSetup());
m_value_holder.reset(new ObjectHolder(m_objector.get()));
}
return m_value_holder->Reset(m_value);
}
virtual toft::StringPiece ValueStr() const {
return m_value;
}
private:
flume::core::Entity<flume::core::Objector> m_objector_entity;
mutable toft::scoped_ptr<flume::core::Objector> m_objector;
CacheManager::Reader* m_cache_reader;
std::vector<std::string> m_splits;
size_t m_cur_split;
CacheManager::Iterator* m_iterator;
std::vector<toft::StringPiece> m_keys;
toft::StringPiece m_value;
mutable toft::scoped_ptr<ObjectHolder> m_value_holder;
};
CacheIterator::CacheIterator(CacheManager::Reader* cache_reader,
const flume::core::Entity<flume::core::Objector>& objector)
: m_impl(new CacheIterator::Impl(cache_reader, objector)) {
}
bool CacheIterator::Next() {
return m_impl->Next();
}
void CacheIterator::Reset() {
m_impl->Reset();
}
void CacheIterator::Done() {
m_impl->Done();
}
const std::vector<toft::StringPiece>& CacheIterator::Keys() const {
return m_impl->Keys();
}
void* CacheIterator::Value() const {
return m_impl->Value();
}
toft::StringPiece CacheIterator::ValueStr() const {
return m_impl->ValueStr();
}
} // namespace runtime
} // namespace flume
} // namespace baidu
| [
"[email protected]"
] | |
c54af2a86275073c8fd52bd2435f02949c845f46 | 697d8dcb9b39ef858cad57d7eced694590821ded | /KillingMonsters.cpp | add47cdf6c42376b3d4f0d97a0a0f8963facf97b | [] | no_license | KevinMathewT/Competitive-Programming | e1dcdffd087f8a1d5ca29ae6189ca7fddbdc7754 | e7805fe870ad9051d53cafcba4ce109488bc212d | refs/heads/master | 2022-02-14T09:37:31.637330 | 2020-09-26T16:15:26 | 2020-09-26T16:15:26 | 147,362,660 | 4 | 4 | null | 2022-02-07T11:13:38 | 2018-09-04T14:52:29 | C++ | UTF-8 | C++ | false | false | 1,486 | cpp | #include <bits/stdc++.h>
#include <iostream>
#include <vector>
using namespace std;
typedef long long ll;
typedef long double ld;
typedef vector<ll> vl;
typedef vector<vl> vvl;
#define F0(i,n) for (ll i = 0; i < n; i++)
#define F1(i,n) for (ll i = 1; i <= n; i++)
#define CL(a,x) memset(x, a, sizeof(x));
#define SZ(x) ((int)x.size())
void read(ll &x){
cin >> x;
}
void read(ll &x,ll &y){
cin >> x >> y;
}
void read(ll &x,ll &y,ll &z){
cin >> x >> y >> z;
}
void read(ll &x,ll &y,ll &z,ll &w){
cin >> x >> y >> z >> w;
}
clock_t t_start,t_end;
void start_clock(){
t_start = clock();
}
void end_clock(){
t_end = clock();
ld timeis = t_end - t_start;
printf("\n\nTime taken : %f s", ((float)timeis)/CLOCKS_PER_SEC);
}
bool IsOdd(ll n){ return n % 2 == 1; }
int main()
{
freopen("input.txt", "r", stdin); //Comment
freopen("output.txt", "w", stdout); //this
//start_clock(); //out.
ios::sync_with_stdio(false); //Not
cin.tie(NULL); //this.
cout.tie(0); //or this.
ll n, i;
read(n);
ll h[n], s=n;
F0(i, n) read(h[i]);
ll q;
read(q);
while(q--){
ll x, y;
read(x, y);
ll c=0, p=0, a[30];
while((1<<c) <= x){
if((1<<c) & x){
a[p]=1<<c; p+=1;
}
c++;
}
//cout<<c<<" "<<p<<"\n";
for(ll j=0;j<(1<<p);j++){
ll sum=0;
for(ll k=0;k<p;k++)
if(j&(1<<k))
sum+=a[k];
if(h[sum]<=0) continue;
h[sum]-=y;
if(h[sum]<=0)
s--;
}
cout << s << "\n";
}
//end_clock(); //This too.
return 0;
} | [
"[email protected]"
] | |
8a7165c12169e2c1a89da05af5ece67bac9141f0 | 019119e06e765466fb496f03692858d9cdf6ab4f | /_oe-sdk-20071004091648/usr/local/arm/oe/arm-linux/include/mozilla-minimo/docshell/nsIWebNavigation.h | 7f37f7cec6c5bb4929c512a50cc15dda0bdef828 | [] | no_license | josuehenrique/iliad-hacking | 44b2a5cda34511f8976fc4a4c2740edb5afa5312 | 49cfd0a8f989491a6cc33cf64e8542f695d2e280 | refs/heads/master | 2020-04-06T06:40:50.174479 | 2009-08-23T16:56:01 | 2009-08-23T16:56:01 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 16,884 | h | /*
* DO NOT EDIT. THIS FILE IS GENERATED FROM /data/workareas/matthijs/svn/openembedded/build/tmp/work/minimo-0.0cvs20051025-r9/mozilla/docshell/base/nsIWebNavigation.idl
*/
#ifndef __gen_nsIWebNavigation_h__
#define __gen_nsIWebNavigation_h__
#ifndef __gen_nsISupports_h__
#include "nsISupports.h"
#endif
/* For IDL files that don't want to include root IDL files. */
#ifndef NS_NO_VTABLE
#define NS_NO_VTABLE
#endif
class nsIDOMDocument; /* forward declaration */
class nsIInputStream; /* forward declaration */
class nsISHistory; /* forward declaration */
class nsIURI; /* forward declaration */
/* starting interface: nsIWebNavigation */
#define NS_IWEBNAVIGATION_IID_STR "f5d9e7b0-d930-11d3-b057-00a024ffc08c"
#define NS_IWEBNAVIGATION_IID \
{0xf5d9e7b0, 0xd930, 0x11d3, \
{ 0xb0, 0x57, 0x00, 0xa0, 0x24, 0xff, 0xc0, 0x8c }}
/**
* The nsIWebNavigation interface defines an interface for navigating the web.
* It provides methods and attributes to direct an object to navigate to a new
* location, stop or restart an in process load, or determine where the object
* has previously gone.
*
* @status UNDER_REVIEW
*/
class NS_NO_VTABLE nsIWebNavigation : public nsISupports {
public:
NS_DEFINE_STATIC_IID_ACCESSOR(NS_IWEBNAVIGATION_IID)
/**
* Indicates if the object can go back. If true this indicates that
* there is back session history available for navigation.
*/
/* readonly attribute boolean canGoBack; */
NS_IMETHOD GetCanGoBack(PRBool *aCanGoBack) = 0;
/**
* Indicates if the object can go forward. If true this indicates that
* there is forward session history available for navigation
*/
/* readonly attribute boolean canGoForward; */
NS_IMETHOD GetCanGoForward(PRBool *aCanGoForward) = 0;
/**
* Tells the object to navigate to the previous session history item. When a
* page is loaded from session history, all content is loaded from the cache
* (if available) and page state (such as form values and scroll position) is
* restored.
*
* @throw NS_ERROR_UNEXPECTED
* Indicates that the call was unexpected at this time, which implies
* that canGoBack is false.
*/
/* void goBack (); */
NS_IMETHOD GoBack(void) = 0;
/**
* Tells the object to navigate to the next session history item. When a
* page is loaded from session history, all content is loaded from the cache
* (if available) and page state (such as form values and scroll position) is
* restored.
*
* @throw NS_ERROR_UNEXPECTED
* Indicates that the call was unexpected at this time, which implies
* that canGoForward is false.
*/
/* void goForward (); */
NS_IMETHOD GoForward(void) = 0;
/**
* Tells the object to navigate to the session history item at a given index.
*
* @throw NS_ERROR_UNEXPECTED
* Indicates that the call was unexpected at this time, which implies
* that session history entry at the given index does not exist.
*/
/* void gotoIndex (in long index); */
NS_IMETHOD GotoIndex(PRInt32 index) = 0;
/****************************************************************************
* The following flags may be bitwise combined to form the load flags
* parameter passed to either the loadURI or reload method. Some of these
* flags are only applicable to loadURI.
*/
/**
* This flags defines the range of bits that may be specified.
*/
enum { LOAD_FLAGS_MASK = 65535U };
/**
* This is the default value for the load flags parameter.
*/
enum { LOAD_FLAGS_NONE = 0U };
/**
* This flag specifies that the load should have the semantics of an HTML
* Meta-refresh tag (i.e., that the cache should be bypassed). This flag
* is only applicable to loadURI.
* XXX the meaning of this flag is poorly defined.
* XXX no one uses this, so we should probably deprecate and remove it.
*/
enum { LOAD_FLAGS_IS_REFRESH = 16U };
/**
* This flag specifies that the load should have the semantics of a link
* click. This flag is only applicable to loadURI.
* XXX the meaning of this flag is poorly defined.
*/
enum { LOAD_FLAGS_IS_LINK = 32U };
/**
* This flag specifies that history should not be updated. This flag is only
* applicable to loadURI.
*/
enum { LOAD_FLAGS_BYPASS_HISTORY = 64U };
/**
* This flag specifies that any existing history entry should be replaced.
* This flag is only applicable to loadURI.
*/
enum { LOAD_FLAGS_REPLACE_HISTORY = 128U };
/**
* This flag specifies that the local web cache should be bypassed, but an
* intermediate proxy cache could still be used to satisfy the load.
*/
enum { LOAD_FLAGS_BYPASS_CACHE = 256U };
/**
* This flag specifies that any intermediate proxy caches should be bypassed
* (i.e., that the content should be loaded from the origin server).
*/
enum { LOAD_FLAGS_BYPASS_PROXY = 512U };
/**
* This flag specifies that a reload was triggered as a result of detecting
* an incorrect character encoding while parsing a previously loaded
* document.
*/
enum { LOAD_FLAGS_CHARSET_CHANGE = 1024U };
/**
* If this flag is set, Stop() will be called before the load starts
* and will stop both content and network activity (the default is to
* only stop network activity). Effectively, this passes the
* STOP_CONTENT flag to Stop(), in addition to the STOP_NETWORK flag.
*/
enum { LOAD_FLAGS_STOP_CONTENT = 2048U };
/**
* A hint this load was prompted by an external program: take care!
*/
enum { LOAD_FLAGS_FROM_EXTERNAL = 4096U };
/**
* Loads a given URI. This will give priority to loading the requested URI
* in the object implementing this interface. If it can't be loaded here
* however, the URI dispatcher will go through its normal process of content
* loading.
*
* @param aURI
* The URI string to load. For HTTP and FTP URLs and possibly others,
* characters above U+007F will be converted to UTF-8 and then URL-
* escaped per the rules of RFC 2396.
* @param aLoadFlags
* Flags modifying load behaviour. This parameter is a bitwise
* combination of the load flags defined above. (Undefined bits are
* reserved for future use.) Generally you will pass LOAD_FLAGS_NONE
* for this parameter.
* @param aReferrer
* The referring URI. If this argument is null, then the referring
* URI will be inferred internally.
* @param aPostData
* If the URI corresponds to a HTTP request, then this stream is
* appended directly to the HTTP request headers. It may be prefixed
* with additional HTTP headers. This stream must contain a "\r\n"
* sequence separating any HTTP headers from the HTTP request body.
* This parameter is optional and may be null.
* @param aHeaders
* If the URI corresponds to a HTTP request, then any HTTP headers
* contained in this stream are set on the HTTP request. The HTTP
* header stream is formatted as:
* ( HEADER "\r\n" )*
* This parameter is optional and may be null.
*/
/* void loadURI (in wstring aURI, in unsigned long aLoadFlags, in nsIURI aReferrer, in nsIInputStream aPostData, in nsIInputStream aHeaders); */
NS_IMETHOD LoadURI(const PRUnichar *aURI, PRUint32 aLoadFlags, nsIURI *aReferrer, nsIInputStream *aPostData, nsIInputStream *aHeaders) = 0;
/**
* Tells the Object to reload the current page. There may be cases where the
* user will be asked to confirm the reload (for example, when it is
* determined that the request is non-idempotent).
*
* @param aReloadFlags
* Flags modifying load behaviour. This parameter is a bitwise
* combination of the Load Flags defined above. (Undefined bits are
* reserved for future use.) Generally you will pass LOAD_FLAGS_NONE
* for this parameter.
*
* @throw NS_BINDING_ABORTED
* Indicating that the user canceled the reload.
*/
/* void reload (in unsigned long aReloadFlags); */
NS_IMETHOD Reload(PRUint32 aReloadFlags) = 0;
/****************************************************************************
* The following flags may be passed as the stop flags parameter to the stop
* method defined on this interface.
*/
/**
* This flag specifies that all network activity should be stopped. This
* includes both active network loads and pending META-refreshes.
*/
enum { STOP_NETWORK = 1U };
/**
* This flag specifies that all content activity should be stopped. This
* includes animated images, plugins and pending Javascript timeouts.
*/
enum { STOP_CONTENT = 2U };
/**
* This flag specifies that all activity should be stopped.
*/
enum { STOP_ALL = 3U };
/**
* Stops a load of a URI.
*
* @param aStopFlags
* This parameter is one of the stop flags defined above.
*/
/* void stop (in unsigned long aStopFlags); */
NS_IMETHOD Stop(PRUint32 aStopFlags) = 0;
/**
* Retrieves the current DOM document for the frame, or lazily creates a
* blank document if there is none. This attribute never returns null except
* for unexpected error situations.
*/
/* readonly attribute nsIDOMDocument document; */
NS_IMETHOD GetDocument(nsIDOMDocument * *aDocument) = 0;
/**
* The currently loaded URI or null.
*/
/* readonly attribute nsIURI currentURI; */
NS_IMETHOD GetCurrentURI(nsIURI * *aCurrentURI) = 0;
/**
* The referring URI for the currently loaded URI or null.
*/
/* readonly attribute nsIURI referringURI; */
NS_IMETHOD GetReferringURI(nsIURI * *aReferringURI) = 0;
/**
* The session history object used by this web navigation instance.
*/
/* attribute nsISHistory sessionHistory; */
NS_IMETHOD GetSessionHistory(nsISHistory * *aSessionHistory) = 0;
NS_IMETHOD SetSessionHistory(nsISHistory * aSessionHistory) = 0;
};
/* Use this macro when declaring classes that implement this interface. */
#define NS_DECL_NSIWEBNAVIGATION \
NS_IMETHOD GetCanGoBack(PRBool *aCanGoBack); \
NS_IMETHOD GetCanGoForward(PRBool *aCanGoForward); \
NS_IMETHOD GoBack(void); \
NS_IMETHOD GoForward(void); \
NS_IMETHOD GotoIndex(PRInt32 index); \
NS_IMETHOD LoadURI(const PRUnichar *aURI, PRUint32 aLoadFlags, nsIURI *aReferrer, nsIInputStream *aPostData, nsIInputStream *aHeaders); \
NS_IMETHOD Reload(PRUint32 aReloadFlags); \
NS_IMETHOD Stop(PRUint32 aStopFlags); \
NS_IMETHOD GetDocument(nsIDOMDocument * *aDocument); \
NS_IMETHOD GetCurrentURI(nsIURI * *aCurrentURI); \
NS_IMETHOD GetReferringURI(nsIURI * *aReferringURI); \
NS_IMETHOD GetSessionHistory(nsISHistory * *aSessionHistory); \
NS_IMETHOD SetSessionHistory(nsISHistory * aSessionHistory);
/* Use this macro to declare functions that forward the behavior of this interface to another object. */
#define NS_FORWARD_NSIWEBNAVIGATION(_to) \
NS_IMETHOD GetCanGoBack(PRBool *aCanGoBack) { return _to GetCanGoBack(aCanGoBack); } \
NS_IMETHOD GetCanGoForward(PRBool *aCanGoForward) { return _to GetCanGoForward(aCanGoForward); } \
NS_IMETHOD GoBack(void) { return _to GoBack(); } \
NS_IMETHOD GoForward(void) { return _to GoForward(); } \
NS_IMETHOD GotoIndex(PRInt32 index) { return _to GotoIndex(index); } \
NS_IMETHOD LoadURI(const PRUnichar *aURI, PRUint32 aLoadFlags, nsIURI *aReferrer, nsIInputStream *aPostData, nsIInputStream *aHeaders) { return _to LoadURI(aURI, aLoadFlags, aReferrer, aPostData, aHeaders); } \
NS_IMETHOD Reload(PRUint32 aReloadFlags) { return _to Reload(aReloadFlags); } \
NS_IMETHOD Stop(PRUint32 aStopFlags) { return _to Stop(aStopFlags); } \
NS_IMETHOD GetDocument(nsIDOMDocument * *aDocument) { return _to GetDocument(aDocument); } \
NS_IMETHOD GetCurrentURI(nsIURI * *aCurrentURI) { return _to GetCurrentURI(aCurrentURI); } \
NS_IMETHOD GetReferringURI(nsIURI * *aReferringURI) { return _to GetReferringURI(aReferringURI); } \
NS_IMETHOD GetSessionHistory(nsISHistory * *aSessionHistory) { return _to GetSessionHistory(aSessionHistory); } \
NS_IMETHOD SetSessionHistory(nsISHistory * aSessionHistory) { return _to SetSessionHistory(aSessionHistory); }
/* Use this macro to declare functions that forward the behavior of this interface to another object in a safe way. */
#define NS_FORWARD_SAFE_NSIWEBNAVIGATION(_to) \
NS_IMETHOD GetCanGoBack(PRBool *aCanGoBack) { return !_to ? NS_ERROR_NULL_POINTER : _to->GetCanGoBack(aCanGoBack); } \
NS_IMETHOD GetCanGoForward(PRBool *aCanGoForward) { return !_to ? NS_ERROR_NULL_POINTER : _to->GetCanGoForward(aCanGoForward); } \
NS_IMETHOD GoBack(void) { return !_to ? NS_ERROR_NULL_POINTER : _to->GoBack(); } \
NS_IMETHOD GoForward(void) { return !_to ? NS_ERROR_NULL_POINTER : _to->GoForward(); } \
NS_IMETHOD GotoIndex(PRInt32 index) { return !_to ? NS_ERROR_NULL_POINTER : _to->GotoIndex(index); } \
NS_IMETHOD LoadURI(const PRUnichar *aURI, PRUint32 aLoadFlags, nsIURI *aReferrer, nsIInputStream *aPostData, nsIInputStream *aHeaders) { return !_to ? NS_ERROR_NULL_POINTER : _to->LoadURI(aURI, aLoadFlags, aReferrer, aPostData, aHeaders); } \
NS_IMETHOD Reload(PRUint32 aReloadFlags) { return !_to ? NS_ERROR_NULL_POINTER : _to->Reload(aReloadFlags); } \
NS_IMETHOD Stop(PRUint32 aStopFlags) { return !_to ? NS_ERROR_NULL_POINTER : _to->Stop(aStopFlags); } \
NS_IMETHOD GetDocument(nsIDOMDocument * *aDocument) { return !_to ? NS_ERROR_NULL_POINTER : _to->GetDocument(aDocument); } \
NS_IMETHOD GetCurrentURI(nsIURI * *aCurrentURI) { return !_to ? NS_ERROR_NULL_POINTER : _to->GetCurrentURI(aCurrentURI); } \
NS_IMETHOD GetReferringURI(nsIURI * *aReferringURI) { return !_to ? NS_ERROR_NULL_POINTER : _to->GetReferringURI(aReferringURI); } \
NS_IMETHOD GetSessionHistory(nsISHistory * *aSessionHistory) { return !_to ? NS_ERROR_NULL_POINTER : _to->GetSessionHistory(aSessionHistory); } \
NS_IMETHOD SetSessionHistory(nsISHistory * aSessionHistory) { return !_to ? NS_ERROR_NULL_POINTER : _to->SetSessionHistory(aSessionHistory); }
#if 0
/* Use the code below as a template for the implementation class for this interface. */
/* Header file */
class nsWebNavigation : public nsIWebNavigation
{
public:
NS_DECL_ISUPPORTS
NS_DECL_NSIWEBNAVIGATION
nsWebNavigation();
private:
~nsWebNavigation();
protected:
/* additional members */
};
/* Implementation file */
NS_IMPL_ISUPPORTS1(nsWebNavigation, nsIWebNavigation)
nsWebNavigation::nsWebNavigation()
{
/* member initializers and constructor code */
}
nsWebNavigation::~nsWebNavigation()
{
/* destructor code */
}
/* readonly attribute boolean canGoBack; */
NS_IMETHODIMP nsWebNavigation::GetCanGoBack(PRBool *aCanGoBack)
{
return NS_ERROR_NOT_IMPLEMENTED;
}
/* readonly attribute boolean canGoForward; */
NS_IMETHODIMP nsWebNavigation::GetCanGoForward(PRBool *aCanGoForward)
{
return NS_ERROR_NOT_IMPLEMENTED;
}
/* void goBack (); */
NS_IMETHODIMP nsWebNavigation::GoBack()
{
return NS_ERROR_NOT_IMPLEMENTED;
}
/* void goForward (); */
NS_IMETHODIMP nsWebNavigation::GoForward()
{
return NS_ERROR_NOT_IMPLEMENTED;
}
/* void gotoIndex (in long index); */
NS_IMETHODIMP nsWebNavigation::GotoIndex(PRInt32 index)
{
return NS_ERROR_NOT_IMPLEMENTED;
}
/* void loadURI (in wstring aURI, in unsigned long aLoadFlags, in nsIURI aReferrer, in nsIInputStream aPostData, in nsIInputStream aHeaders); */
NS_IMETHODIMP nsWebNavigation::LoadURI(const PRUnichar *aURI, PRUint32 aLoadFlags, nsIURI *aReferrer, nsIInputStream *aPostData, nsIInputStream *aHeaders)
{
return NS_ERROR_NOT_IMPLEMENTED;
}
/* void reload (in unsigned long aReloadFlags); */
NS_IMETHODIMP nsWebNavigation::Reload(PRUint32 aReloadFlags)
{
return NS_ERROR_NOT_IMPLEMENTED;
}
/* void stop (in unsigned long aStopFlags); */
NS_IMETHODIMP nsWebNavigation::Stop(PRUint32 aStopFlags)
{
return NS_ERROR_NOT_IMPLEMENTED;
}
/* readonly attribute nsIDOMDocument document; */
NS_IMETHODIMP nsWebNavigation::GetDocument(nsIDOMDocument * *aDocument)
{
return NS_ERROR_NOT_IMPLEMENTED;
}
/* readonly attribute nsIURI currentURI; */
NS_IMETHODIMP nsWebNavigation::GetCurrentURI(nsIURI * *aCurrentURI)
{
return NS_ERROR_NOT_IMPLEMENTED;
}
/* readonly attribute nsIURI referringURI; */
NS_IMETHODIMP nsWebNavigation::GetReferringURI(nsIURI * *aReferringURI)
{
return NS_ERROR_NOT_IMPLEMENTED;
}
/* attribute nsISHistory sessionHistory; */
NS_IMETHODIMP nsWebNavigation::GetSessionHistory(nsISHistory * *aSessionHistory)
{
return NS_ERROR_NOT_IMPLEMENTED;
}
NS_IMETHODIMP nsWebNavigation::SetSessionHistory(nsISHistory * aSessionHistory)
{
return NS_ERROR_NOT_IMPLEMENTED;
}
/* End of implementation class template. */
#endif
#endif /* __gen_nsIWebNavigation_h__ */
| [
"[email protected]"
] | |
e96c518734668f12dbd562d6d914df131dc5b732 | 2d42d1d10ab31da0af30b620836f30120174ad8e | /2BIT SUMMER/ICP/src/rook.cpp | 215f8e05f72492ae2664e8ba8fe878c0eb88d0bc | [] | no_license | proback01/VUT-FIT | 9901a39201b2ca8a089f32c002adbbe9a941b8e9 | c66d7872172229eefd25f90b027856cf9a9bda5e | refs/heads/master | 2022-02-20T13:44:25.625474 | 2019-09-25T10:46:37 | 2019-09-25T10:46:37 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 2,528 | cpp | /*
* @file rook.cpp
* @brief Implementations of rook class functions
* @author Tomáš Venkrbec (xvenkr01), Jakub Frejlach (xfrejl00)
*/
#include <iostream>
#include <list>
#include "square.hpp"
#include "piece.hpp"
#include "enums.hpp"
#include "board_model.hpp"
#include "move.hpp"
#include "Pieces/rook.hpp"
using namespace std;
Rook::Rook(Square pos) : Piece(pos)
{
this->position = pos;
this->pieceType = ROOK;
}
void Rook::move(Move moveDetail)
{
this->position = moveDetail.get_new_place();
}
void Rook::available_moves(BoardModel board_model)
{
this->availableMoves.clear();
Square pos_aux = this->position;
int playerColor = board_model.board[pos_aux.row][pos_aux.col];
// Up
while(pos_aux.row-- > 0)
{
// friendly - break
if(board_model.board[pos_aux.row][pos_aux.col] == playerColor)
{
break;
}
// empty - check if not in check, add, continue
else if(board_model.board[pos_aux.row][pos_aux.col] == PIECE_NOTHING)
{
this->availableMoves.push_back(pos_aux);
}
// enemy - check if not in check, add, break
else
{
this->availableMoves.push_back(pos_aux);
break;
}
}
// Right
pos_aux = this->position;
while(pos_aux.col++ < 7)
{
// friendly - break
if(board_model.board[pos_aux.row][pos_aux.col] == playerColor)
{
break;
}
// empty - check if not in check, add, continue
else if(board_model.board[pos_aux.row][pos_aux.col] == PIECE_NOTHING)
{
this->availableMoves.push_back(pos_aux);
}
// enemy - check if not in check, add, break
else
{
this->availableMoves.push_back(pos_aux);
break;
}
}
// Down
pos_aux = this->position;
while(pos_aux.row++ < 7)
{
// friendly - break
if(board_model.board[pos_aux.row][pos_aux.col] == playerColor)
{
break;
}
// empty - check if not in check, add, continue
else if(board_model.board[pos_aux.row][pos_aux.col] == PIECE_NOTHING)
{
this->availableMoves.push_back(pos_aux);
}
// enemy - check if not in check, add, break
else
{
this->availableMoves.push_back(pos_aux);
break;
}
}
// Left
pos_aux = this->position;
while(pos_aux.col-- > 0)
{
// friendly - break
if(board_model.board[pos_aux.row][pos_aux.col] == playerColor)
{
break;
}
// empty - check if not in check, add, continue
else if(board_model.board[pos_aux.row][pos_aux.col] == PIECE_NOTHING)
{
this->availableMoves.push_back(pos_aux);
}
// enemy - check if not in check, add, break
else
{
this->availableMoves.push_back(pos_aux);
break;
}
}
} | [
"[email protected]"
] | |
57fce7aeecea50fe60c26c7dd9bdb8ae845ed92b | bfac859b9339b614bdf34c707bc1f9a92131c80d | /source/Kontroleri/kontroler.h | b872cea69c3e0c7e14c8cca7ca65eaf998866fb3 | [] | no_license | shegaa/Lista | f354a8c1cd259d07c2f16fbd6c739d884ebefdd4 | 032dc60261fe01ee5f18d3f09d489f1d47d57373 | refs/heads/main | 2023-07-07T22:17:34.415980 | 2021-09-02T18:27:35 | 2021-09-02T18:27:35 | 402,526,624 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 817 | h | #ifndef KONTROLER_H
#define KONTROLER_H
#include "source/Proxy/studentproxy.h"
#include <QObject>
class Kontroler : public QObject
{
public:
Q_OBJECT
public:
Kontroler();
StudentLista * Model();
StudentProxy * Proxy();
public slots:
void dodavanje(const QString& ime, const QString& prezime, const QString& jmbg,
const QString& in, const QString& fa, const QString& sm,const QString& sl);
void brisanje(int indeks);
signals:
void dodaj(const QString& ime, const QString& prezime, const QString& jmbg,
const QString& in, const QString& fa, const QString& sm,const QString& sl);
void obrisi(int indeks);
private:
StudentLista * listaStudenata= new StudentLista();
StudentProxy * listaStudenataProxy = new StudentProxy();
};
#endif // KONTROLER_H
| [
"[email protected]"
] | |
960463cca65d108bd0bbbe5e600bae949beb183c | 644c0b6d7053bff658bdc58c3eaff3adbe8a1197 | /devices/emcdev.cpp | 4eb7800305da552e054c7e346fbec1b2b4ac364c | [] | no_license | digetx/tegra2_qemu_trace_viewer | d35a8cb4962d51fcfb9a69c764209ab01e59f36b | 39769ca66b8d0a386fd6760b0362908486672c0a | refs/heads/master | 2020-12-20T21:36:44.116265 | 2017-01-12T13:43:52 | 2017-01-12T13:43:52 | 38,266,845 | 2 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 313,908 | cpp | /*
* Copyright (c) 2014-2015 Dmitry Osipenko <[email protected]>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "emcdev.h"
#include <QDebug>
#define INTSTATUS_OFFSET 0x0
#define INTSTATUS_UNDEFMASK 0xFFFFFFC7
union emc_intstatus_u {
struct {
unsigned int undefined_bits_0_2:3;
unsigned int refresh_overflow_int:1;/* Refresh request overflow timeout. 0 = CLEAR 1 = SET */
unsigned int clkchange_complete_int:1;/* CAR/EMC clock-change handshake complete. 0 = CLEAR 1 = SET */
unsigned int mrr_divld_int:1; /* LPDDR2 MRR data is available to be read. 0 = CLEAR 1 = SET */
unsigned int undefined_bits_6_31:26;
};
u_int32_t reg32;
};
void EmcDev::fill_intstatus_details(const u_int32_t &value, const u_int32_t &new_value)
{
const emc_intstatus_u old_value_t = { .reg32 = value };
const emc_intstatus_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: undefined_bits_0_2:3", "", 3, old_value_t.undefined_bits_0_2, new_value_t.undefined_bits_0_2 };
m_bit_details_model.bits.append(entry);
entry = { "03: refresh_overflow_int:1",
"Refresh request overflow timeout.\n0 = CLEAR\n1 = SET",
1, old_value_t.refresh_overflow_int, new_value_t.refresh_overflow_int };
m_bit_details_model.bits.append(entry);
entry = { "04: clkchange_complete_int:1",
"CAR/EMC clock-change handshake complete.\n0 = CLEAR\n1 = SET",
1, old_value_t.clkchange_complete_int, new_value_t.clkchange_complete_int };
m_bit_details_model.bits.append(entry);
entry = { "05: mrr_divld_int:1",
"LPDDR2 MRR data is available to be read.\n0 = CLEAR\n1 = SET",
1, old_value_t.mrr_divld_int, new_value_t.mrr_divld_int };
m_bit_details_model.bits.append(entry);
entry = { "06: undefined_bits_6_31:26", "", 26, old_value_t.undefined_bits_6_31, new_value_t.undefined_bits_6_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "Clear on 1-write. Init value is clear.\nInterrupt Status Register";
}
#define INTMASK_OFFSET 0x4
#define INTMASK_UNDEFMASK 0xFFFFFFC7
union emc_intmask_u {
struct {
unsigned int undefined_bits_0_2:3;
unsigned int refresh_overflow_intmask:1;/* Mask for refresh request overflow timeout. 0 = MASKED 1 = UNMASKED */
unsigned int clkchange_complete_intmask:1;/* Mask for CAR/EMC clock-change handshake complete. 0 = MASKED 1 = UNMASKED */
unsigned int mrr_divld_intmask:1; /* Mask for MRR data available. 0 = MASKED 1 = UNMASKED */
unsigned int undefined_bits_6_31:26;
};
u_int32_t reg32;
};
void EmcDev::fill_intmask_details(const u_int32_t &value, const u_int32_t &new_value)
{
const emc_intmask_u old_value_t = { .reg32 = value };
const emc_intmask_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: undefined_bits_0_2:3", "", 3, old_value_t.undefined_bits_0_2, new_value_t.undefined_bits_0_2 };
m_bit_details_model.bits.append(entry);
entry = { "03: refresh_overflow_intmask:1",
"Mask for refresh request overflow timeout.\n0 = MASKED\n1 = UNMASKED",
1, old_value_t.refresh_overflow_intmask, new_value_t.refresh_overflow_intmask };
m_bit_details_model.bits.append(entry);
entry = { "04: clkchange_complete_intmask:1",
"Mask for CAR/EMC clock-change handshake complete.\n0 = MASKED\n1 = UNMASKED",
1, old_value_t.clkchange_complete_intmask, new_value_t.clkchange_complete_intmask };
m_bit_details_model.bits.append(entry);
entry = { "05: mrr_divld_intmask:1",
"Mask for MRR data available.\n0 = MASKED\n1 = UNMASKED",
1, old_value_t.mrr_divld_intmask, new_value_t.mrr_divld_intmask };
m_bit_details_model.bits.append(entry);
entry = { "06: undefined_bits_6_31:26", "", 26, old_value_t.undefined_bits_6_31, new_value_t.undefined_bits_6_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "Init value is masked.\nInterrupt Mask Register";
}
#define DBG_OFFSET 0x8
#define DBG_UNDEFMASK 0xFEFFF9C8
union dbg_u {
struct {
unsigned int read_mux:1; /* controls whether reads to the configuration registers are done from the assembly or active state. 0 = ACTIVE 1 = ASSEMBLY */
unsigned int write_mux:1; /* controls whether writes to the configuration registers are done from the assembly or active state. 0 = ASSEMBLY 1 = ACTIVE */
unsigned int force_update:1; /* causes the active state to get updated with the assembly state immediately upon writing the TIMING_CONTROL register. 0 = DISABLED 1 = ENABLED */
unsigned int undefined_bit_3:1;
unsigned int mrs_wait:1; /* should be set to MRS_256 when a non-mobile DRAM is used because they require a 200 cycle delay between the DLL reset and any read commands. 0 = MRS_2 1 = MRS_256 */
unsigned int periodic_qrst:1; /* specifies whether or not to periodic reset the FBIO read-data fifo during normal operation. The periodic resets can be used for graceful recovery from an intermittent failure condition; only the initial reset is absolutely required. 0 = DISABLED 1 = ENABLED */
unsigned int undefined_bits_6_8:3;
unsigned int read_dqm_ctrl:1; /* controls whether the dqm signals during reads are managed for power (not relevant for DDR). If set to MANAGED, EMC only turns them on when necessary. If set to ALWAYS_ON, the dqm signals are enabled during non-write operation. 0 = MANAGED 1 = ALWAYS_ON */
unsigned int ap_req_busy_ctrl:1; /* determines whether the busy signal from the auto-precharge cancellation (APC) fifo is allowed to stall requests to the EMC. 0 = DISABLED 1 = ENABLED */
unsigned int undefined_bits_11_23:13;
unsigned int cfg_priority:1; /* determines the priority of cfg accesses to the DRAM. Setting this register to ENABLED gives DRAM config cycles (refresh, mrs, emrs, etc.) higher priority over real time requestors. The DISABLED setting gives the real time requestors higher priority than DRAM config cycles. Do not program to DISABLED unless for debugging. 0 = DISABLED 1 = ENABLED */
unsigned int undefined_bits_25_31:7;
};
u_int32_t reg32;
};
void EmcDev::fill_dbg_details(const u_int32_t &value, const u_int32_t &new_value)
{
const dbg_u old_value_t = { .reg32 = value };
const dbg_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: read_mux:1",
"controls whether reads to the configuration registers are done from the assembly or active state.\n0 = ACTIVE\n1 = ASSEMBLY",
1, old_value_t.read_mux, new_value_t.read_mux };
m_bit_details_model.bits.append(entry);
entry = { "01: write_mux:1",
"controls whether writes to the configuration registers are done from the assembly or active state.\n0 = ASSEMBLY\n1 = ACTIVE",
1, old_value_t.write_mux, new_value_t.write_mux };
m_bit_details_model.bits.append(entry);
entry = { "02: force_update:1",
"causes the active state to get updated with the assembly state immediately upon writing the TIMING_CONTROL register.\n0 = DISABLED\n1 = ENABLED",
1, old_value_t.force_update, new_value_t.force_update };
m_bit_details_model.bits.append(entry);
entry = { "03: undefined_bit_3:1", "", 1, old_value_t.undefined_bit_3, new_value_t.undefined_bit_3 };
m_bit_details_model.bits.append(entry);
entry = { "04: mrs_wait:1",
"should be set to MRS_256 when a non-mobile DRAM is used because they require a 200 cycle delay between the DLL reset and any read commands.\n0 = MRS_2\n1 = MRS_256",
1, old_value_t.mrs_wait, new_value_t.mrs_wait };
m_bit_details_model.bits.append(entry);
entry = { "05: periodic_qrst:1",
"specifies whether or not to periodic reset the FBIO read-data fifo during normal operation. The periodic resets can be used for graceful recovery from an intermittent failure condition; only the initial reset is absolutely required.\n0 = DISABLED\n1 = ENABLED",
1, old_value_t.periodic_qrst, new_value_t.periodic_qrst };
m_bit_details_model.bits.append(entry);
entry = { "06: undefined_bits_6_8:3", "", 3, old_value_t.undefined_bits_6_8, new_value_t.undefined_bits_6_8 };
m_bit_details_model.bits.append(entry);
entry = { "09: read_dqm_ctrl:1",
"controls whether the dqm signals during reads are managed for power (not relevant for DDR). If set to MANAGED, EMC only turns them on when necessary. If set to ALWAYS_ON, the dqm signals are enabled during non-write operation.\n0 = MANAGED\n1 = ALWAYS_ON",
1, old_value_t.read_dqm_ctrl, new_value_t.read_dqm_ctrl };
m_bit_details_model.bits.append(entry);
entry = { "10: ap_req_busy_ctrl:1",
"determines whether the busy signal from the auto-precharge cancellation (APC) fifo is allowed to stall requests to the EMC.\n0 = DISABLED\n1 = ENABLED",
1, old_value_t.ap_req_busy_ctrl, new_value_t.ap_req_busy_ctrl };
m_bit_details_model.bits.append(entry);
entry = { "11: undefined_bits_11_23:13", "", 13, old_value_t.undefined_bits_11_23, new_value_t.undefined_bits_11_23 };
m_bit_details_model.bits.append(entry);
entry = { "24: cfg_priority:1",
"determines the priority of cfg accesses to the DRAM. Setting this register to ENABLED gives DRAM config cycles (refresh, mrs, emrs, etc.) higher priority over real time requestors. The DISABLED setting gives the real time requestors higher priority than DRAM config cycles. Do not program to DISABLED unless for debugging.\n0 = DISABLED\n1 = ENABLED",
1, old_value_t.cfg_priority, new_value_t.cfg_priority };
m_bit_details_model.bits.append(entry);
entry = { "25: undefined_bits_25_31:7", "", 7, old_value_t.undefined_bits_25_31, new_value_t.undefined_bits_25_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "The DBG register is used to reconfigure the EMC during debug or chip testing.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDebug Register";
}
#define CFG_OFFSET 0xC
#define CFG_UNDEFMASK 0x1CFE00FE
union emc_cfg_u {
struct {
unsigned int pre_idle_en:1; /* preemptively closes all of the banks after the EMC has been idle for PRE_IDLE_CYCLES cycles and there are banks open. PRE_IDLE_EN can be enabled if violating tRAS max is an issue; 0 = DISABLE; 1 = ENABLE */
unsigned int undefined_bits_1_7:7;
unsigned int pre_idle_cycles:8; /* cycles after which an idle bank may be closed. Note that 0 is an illegal setting for PRE_IDLE_CYCLES */
unsigned int clear_ap_prev_spreq:1; /* used to try to clear the auto-precharge bit on the previous request if the next request is on the same page. The previous request has to be in reach for this to happen. */
unsigned int undefined_bits_17_23:7;
unsigned int auto_pre_rd:1; /* enable auto-precharge in the EMC for reads. This bits, when set to DISABLE, will override the settings in the MC register. Otherwise, they permit clients to make auto-precharge requests as specified by the Memory Controller. */
unsigned int auto_pre_wr:1; /* enable auto-precharge in the EMC for writes. This bits, when set to DISABLE, will override the settings in the MC register. Otherwise, they permit clients to make auto-precharge requests as specified by the Memory Controller. */
unsigned int undefined_bits_26_28:3;
unsigned int dram_acpd:1; /* allows the DRAM controller to perform opportunistic active powerdown control using the CKE pin on the DRAM. The behavior of the powerdown control logic is controlled by the PDEX2* and *2PDEN registers. The value of DRAM_ACPD should only be changed when CKE is low, e.g., during software-controlled self-refresh or before DRAM initialization. If enabling ACPD, you should ALWAYS enable DRAM_CLKSTOP_PDSR_ONLY. Not doing so will result in sub-optimal power-down & clockstop performance. The powerdown conditions are met within a couple of cycles after the clock has stopped, so the clock must be restarted & minimum clock timings met before powerdown can be issued and clock restopped; 0 = NO_POWERDOWN; 1 = ACTIVE_POWERDOWN */
unsigned int dram_clkstop_pdsr_only:1;/* clockstop (if enabled) only allowed to happen if CKE=0 (for all CKE bits associated w/ clock) 0 = DISABLED 1 = ENABLED */
unsigned int dram_clkstop:1; /* allows the DRAM controller to turn off the clock to the DRAM when it is safe to do so (no operations are ongoing, and tRFC, tMRS, tRP, etc. have all been satisfied; 0 = DISABLE; 1 = ENABLE */
};
u_int32_t reg32;
};
void EmcDev::fill_cfg_details(const u_int32_t &value, const u_int32_t &new_value)
{
const emc_cfg_u old_value_t = { .reg32 = value };
const emc_cfg_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: pre_idle_en:1",
"preemptively closes all of the banks after the EMC has been idle for PRE_IDLE_CYCLES cycles and there are banks open. PRE_IDLE_EN can be enabled if violating tRAS max is an issue;\n0 = DISABLE;\n1 = ENABLE",
1, old_value_t.pre_idle_en, new_value_t.pre_idle_en };
m_bit_details_model.bits.append(entry);
entry = { "01: undefined_bits_1_7:7", "", 7, old_value_t.undefined_bits_1_7, new_value_t.undefined_bits_1_7 };
m_bit_details_model.bits.append(entry);
entry = { "08: pre_idle_cycles:8",
"cycles after which an idle bank may be closed. Note that 0 is an illegal setting for PRE_IDLE_CYCLES",
8, old_value_t.pre_idle_cycles, new_value_t.pre_idle_cycles };
m_bit_details_model.bits.append(entry);
entry = { "16: clear_ap_prev_spreq:1",
"used to try to clear the auto-precharge bit on the previous request if the next request is on the same page. The previous request has to be in reach for this to happen.",
1, old_value_t.clear_ap_prev_spreq, new_value_t.clear_ap_prev_spreq };
m_bit_details_model.bits.append(entry);
entry = { "17: undefined_bits_17_23:7", "", 7, old_value_t.undefined_bits_17_23, new_value_t.undefined_bits_17_23 };
m_bit_details_model.bits.append(entry);
entry = { "24: auto_pre_rd:1",
"enable auto-precharge in the EMC for reads. This bits, when set to DISABLE, will override the settings in the MC register. Otherwise, they permit clients to make auto-precharge requests as specified by the Memory Controller.",
1, old_value_t.auto_pre_rd, new_value_t.auto_pre_rd };
m_bit_details_model.bits.append(entry);
entry = { "25: auto_pre_wr:1",
"enable auto-precharge in the EMC for writes. This bits, when set to DISABLE, will override the settings in the MC register. Otherwise, they permit clients to make auto-precharge requests as specified by the Memory Controller.",
1, old_value_t.auto_pre_wr, new_value_t.auto_pre_wr };
m_bit_details_model.bits.append(entry);
entry = { "26: undefined_bits_26_28:3", "", 3, old_value_t.undefined_bits_26_28, new_value_t.undefined_bits_26_28 };
m_bit_details_model.bits.append(entry);
entry = { "29: dram_acpd:1",
"allows the DRAM controller to perform opportunistic active powerdown control using the CKE pin on the DRAM. The behavior of the powerdown control logic is controlled by the PDEX2* and *2PDEN registers. The value of DRAM_ACPD should only be changed when CKE is low, e.g., during software-controlled self-refresh or before DRAM initialization. If enabling ACPD, you should ALWAYS enable DRAM_CLKSTOP_PDSR_ONLY. Not doing so will result in sub-optimal power-down & clockstop performance. The powerdown conditions are met within a couple of cycles after the clock has stopped, so the clock must be restarted & minimum clock timings met before powerdown can be issued and clock restopped;\n0 = NO_POWERDOWN;\n1 = ACTIVE_POWERDOWN",
1, old_value_t.dram_acpd, new_value_t.dram_acpd };
m_bit_details_model.bits.append(entry);
entry = { "30: dram_clkstop_pdsr_only:1",
"clockstop (if enabled) only allowed to happen if CKE=0 (for all CKE bits associated w/ clock)\n0 = DISABLED\n1 = ENABLED",
1, old_value_t.dram_clkstop_pdsr_only, new_value_t.dram_clkstop_pdsr_only };
m_bit_details_model.bits.append(entry);
entry = { "31: dram_clkstop:1",
"allows the DRAM controller to turn off the clock to the DRAM when it is safe to do so (no operations are ongoing, and tRFC, tMRS, tRP, etc. have all been satisfied;\n0 = DISABLE;\n1 = ENABLE",
1, old_value_t.dram_clkstop, new_value_t.dram_clkstop };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "The CFG register is used to configure the external memory interface.\n Boot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nConfiguration Register";
}
#define ADR_CFG_OFFSET 0x10
#define ADR_CFG_UNDEFMASK 0xFCF0FCF8
union adr_cfg_u {
struct {
unsigned int emem_colwidth:3; /* width of column address of the attached SDRAM device; 0 = column width equals 7; 1 = column width equals 8; 2 = column width equals 9; 3 = column width equals 10; 4 = column width equals 11 */
unsigned int undefined_bits_3_7:5;
unsigned int emem_bankwidth:2; /* width of bank address of the attached SDRAM device; 1 = device internal bank equals 2; 2 = device internal bank equals 4; 3 = device internal bank equals 8 */
unsigned int undefined_bits_10_15:6;
unsigned int emem_devsize:4; /* size of the attached SDRAM device used to generate width of row address; 0 = D4 MB; 1 = D8 MB; 2 = D16 MB; 3 = D32 MB; 4 = D64 MB; 5 = D128 MB; 6 = D256 MB; 7 = D512 MB; 8 = D1024MB; 8 = D1GB */
unsigned int undefined_bits_20_23:4;
unsigned int emem_numdev:2; /* : the number of attached devices. If more than one device is attached, the DEVSIZE, COLWIDTH, and BANKWIDTH configurations for the second device will be defined by the fields in ADR_CFG_1, while the fields in ADR_CFG will only apply to the first device; 0 = N1 (Number of Devices equals 1); 1 = N2 (Number of Devices equals 2) */
unsigned int undefined_bits_26_31:6;
};
u_int32_t reg32;
};
void EmcDev::fill_adr_cfg_details(const u_int32_t &value, const u_int32_t &new_value)
{
const adr_cfg_u old_value_t = { .reg32 = value };
const adr_cfg_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: emem_colwidth:3",
"width of column address of the attached SDRAM device;\n0 = column width equals 7;\n1 = column width equals 8;\n2 = column width equals 9;\n3 = column width equals 10;\n4 = column width equals 11",
3, old_value_t.emem_colwidth, new_value_t.emem_colwidth };
m_bit_details_model.bits.append(entry);
entry = { "03: undefined_bits_3_7:5", "", 5, old_value_t.undefined_bits_3_7, new_value_t.undefined_bits_3_7 };
m_bit_details_model.bits.append(entry);
entry = { "08: emem_bankwidth:2",
"width of bank address of the attached SDRAM device;\n1 = device internal bank equals 2;\n2 = device internal bank equals 4;\n3 = device internal bank equals 8",
2, old_value_t.emem_bankwidth, new_value_t.emem_bankwidth };
m_bit_details_model.bits.append(entry);
entry = { "10: undefined_bits_10_15:6", "", 6, old_value_t.undefined_bits_10_15, new_value_t.undefined_bits_10_15 };
m_bit_details_model.bits.append(entry);
entry = { "16: emem_devsize:4",
"size of the attached SDRAM device used to generate width of row address;\n0 = D4 MB;\n1 = D8 MB;\n2 = D16 MB;\n3 = D32 MB;\n4 = D64 MB;\n5 = D128 MB;\n6 = D256 MB;\n7 = D512 MB;\n8 = D1024MB;\n8 = D1GB",
4, old_value_t.emem_devsize, new_value_t.emem_devsize };
m_bit_details_model.bits.append(entry);
entry = { "20: undefined_bits_20_23:4", "", 4, old_value_t.undefined_bits_20_23, new_value_t.undefined_bits_20_23 };
m_bit_details_model.bits.append(entry);
entry = { "24: emem_numdev:2",
": the number of attached devices. If more than one device is attached, the DEVSIZE, COLWIDTH, and BANKWIDTH configurations for the second device will be defined by the fields in ADR_CFG_1, while the fields in ADR_CFG will only apply to the first device;\n0 = N1 (Number of Devices equals 1);\n1 = N2 (Number of Devices equals 2)",
2, old_value_t.emem_numdev, new_value_t.emem_numdev };
m_bit_details_model.bits.append(entry);
entry = { "26: undefined_bits_26_31:6", "", 6, old_value_t.undefined_bits_26_31, new_value_t.undefined_bits_26_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This is used to specify the DRAM parameters. EMC will use these parameters to generate the device, row, bank, column values to the SDRAM. The ADR_CFG shadows the address configuration being used by the MC’s EMEM_ADR_CFG register. It must be programmed to the same value as the EMEM_ADR_CFG register.\nBoot requirements:\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nExternal Memory Address Configuration Register";
}
#define ADR_CFG_1_OFFSET 0x14
#define ADR_CFG_1_UNDEFMASK 0xFFF0FCF8
union adr_cfg_1_u {
struct {
unsigned int emem1_colwidth:3; /* width of column address of the attached SDRAM device; 0 = column width equals 7; 1 = column width equals 8; 2 = column width equals 9; 3 = column width equals 10; 4 = column width equals 11 */
unsigned int undefined_bits_3_7:5;
unsigned int emem1_bankwidth:2; /* width of bank address of the attached SDRAM device; 2 = device internal bank equals 4; 3 = device internal bank equals 8 */
unsigned int undefined_bits_10_15:6;
unsigned int emem1_devsize:4; /* size of the attached SDRAM device used to generate width of row address; 0 = D4 MB; 1 = D8 MB; 2 = D16 MB; 3 = D32 MB; 4 = D64 MB; 5 = D128 MB; 6 = D256 MB; 7 = D512 MB; 8 = D1024MB; 8 = D1GB */
unsigned int undefined_bits_20_31:12;
};
u_int32_t reg32;
};
void EmcDev::fill_adr_cfg_1_details(const u_int32_t &value, const u_int32_t &new_value)
{
const adr_cfg_1_u old_value_t = { .reg32 = value };
const adr_cfg_1_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: emem1_colwidth:3",
"width of column address of the attached SDRAM device;\n0 = column width equals 7;\n1 = column width equals 8;\n2 = column width equals 9;\n3 = column width equals 10;\n4 = column width equals 11",
3, old_value_t.emem1_colwidth, new_value_t.emem1_colwidth };
m_bit_details_model.bits.append(entry);
entry = { "03: undefined_bits_3_7:5", "", 5, old_value_t.undefined_bits_3_7, new_value_t.undefined_bits_3_7 };
m_bit_details_model.bits.append(entry);
entry = { "08: emem1_bankwidth:2",
"width of bank address of the attached SDRAM device;\n2 = device internal bank equals 4;\n3 = device internal bank equals 8",
2, old_value_t.emem1_bankwidth, new_value_t.emem1_bankwidth };
m_bit_details_model.bits.append(entry);
entry = { "10: undefined_bits_10_15:6", "", 6, old_value_t.undefined_bits_10_15, new_value_t.undefined_bits_10_15 };
m_bit_details_model.bits.append(entry);
entry = { "16: emem1_devsize:4",
"size of the attached SDRAM device used to generate width of row address;\n0 = D4 MB;\n1 = D8 MB;\n2 = D16 MB;\n3 = D32 MB;\n4 = D64 MB;\n5 = D128 MB;\n6 = D256 MB;\n7 = D512 MB;\n8 = D1024MB;\n8 = D1GB",
4, old_value_t.emem1_devsize, new_value_t.emem1_devsize };
m_bit_details_model.bits.append(entry);
entry = { "20: undefined_bits_20_31:12", "", 12, old_value_t.undefined_bits_20_31, new_value_t.undefined_bits_20_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register allows for two devices with different colwidth/bankwidth to be used without creating holes in the system-level address map.\n If ADR_CFG.EMEM_NUMDEV == N2, then this register must also be programmed in addition to ADR_CFG. If the two devices are the same colwidth/bankwidth/devsize, then this can be programmed exactly the same as ADR_CFG. Otherwise, the smaller of the two devices (devsize) should be placed as Device[1] and this register should be programmed to reflect the smaller device's bankwidth, colwidth, and devsize.\n Note that due to system-level address map restrictions, more DRAM bytes may be populated in EMC than are addressable in the system.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nExternal Memory Address Config Register, Device [1]";
}
#define REFCTRL_OFFSET 0x20
#define REFCTRL_UNDEFMASK 0x7FFFFFFC
union refctrl_u {
struct {
unsigned int device_refresh_disable:2;/* disables refresh to individual attached device (1 bit per dram chip-select) */
unsigned int undefined_bits_2_30:29;
unsigned int ref_valid:1; /* enable refresh controller; 0 = DISABLE; 1 = ENABLE */
};
u_int32_t reg32;
};
void EmcDev::fill_refctrl_details(const u_int32_t &value, const u_int32_t &new_value)
{
const refctrl_u old_value_t = { .reg32 = value };
const refctrl_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: device_refresh_disable:2",
"disables refresh to individual attached device (1 bit per dram chip-select)",
2, old_value_t.device_refresh_disable, new_value_t.device_refresh_disable };
m_bit_details_model.bits.append(entry);
entry = { "02: undefined_bits_2_30:29", "", 29, old_value_t.undefined_bits_2_30, new_value_t.undefined_bits_2_30 };
m_bit_details_model.bits.append(entry);
entry = { "31: ref_valid:1",
"enable refresh controller;\n0 = DISABLE;\n1 = ENABLE",
1, old_value_t.ref_valid, new_value_t.ref_valid };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "The REFCTRL register allows SW to enable or disable the refresh controller. REF_VALID should be enabled after the initialization sequence is completed.\nBoot requirements\n * If per-device DPD is used, the DEVICE_REFRESH_DISABLE field should be parameterized in the BCT and written by the BootROM during coldboot.\n * If per-device DPD is used, the DEVICE_REFRESH_DISABLE field should be parameterized the scratch registers registers and restored by the BootROM during warmboot.\n * REF_VALID field should always be set to ENABLED for normal use, no need to parameterize in BCT/scratch.\nRefresh Control Register";
}
#define PIN_OFFSET 0x24
#define PIN_UNDEFMASK 0xFFFFFFEE
union pin_u {
struct {
unsigned int pin_cke:1; /* selects the level of the CKE pin. This can be used to place the DRAM in power down state. PIN_CKE value is applied all CKE pins; 0 = POWERDOWN; 1 = NORMAL */
unsigned int undefined_bits_1_3:3;
unsigned int pin_dqm:1; /* is used to always mask DRAM writes. This pin should only be used for initialization. Certain DRAM vendors (e.g., Samsung), require the DQM to be high during initialization. The register value should be set to NORMAL after the initialization sequence; 0 = NORMAL; 1 = INACTIVE */
unsigned int undefined_bits_5_31:27;
};
u_int32_t reg32;
};
void EmcDev::fill_pin_details(const u_int32_t &value, const u_int32_t &new_value)
{
const pin_u old_value_t = { .reg32 = value };
const pin_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: pin_cke:1",
"selects the level of the CKE pin. This can be used to place the DRAM in power down state. PIN_CKE value is applied all CKE pins;\n0 = POWERDOWN;\n1 = NORMAL",
1, old_value_t.pin_cke, new_value_t.pin_cke };
m_bit_details_model.bits.append(entry);
entry = { "01: undefined_bits_1_3:3", "", 3, old_value_t.undefined_bits_1_3, new_value_t.undefined_bits_1_3 };
m_bit_details_model.bits.append(entry);
entry = { "04: pin_dqm:1",
"is used to always mask DRAM writes. This pin should only be used for initialization. Certain DRAM vendors (e.g., Samsung), require the DQM to be high during initialization. The register value should be set to NORMAL after the initialization sequence;\n0 = NORMAL;\n1 = INACTIVE",
1, old_value_t.pin_dqm, new_value_t.pin_dqm };
m_bit_details_model.bits.append(entry);
entry = { "05: undefined_bits_5_31:27", "", 27, old_value_t.undefined_bits_5_31, new_value_t.undefined_bits_5_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "The PIN register allows SW to control the state of the selected external DRAM pins.\nBoot requirements\n * Both fields in this register should be set to NORMAL during coldboot.\n * Both fields in this register should be set to NORMAL during warmboot.\nControls state of selected DRAM pins";
}
#define TIMING_CONTROL_OFFSET 0x28
#define TIMING_CONTROL_UNDEFMASK 0xFFFFFFFE
union timing_control_u {
struct {
unsigned int timing_update:1;
unsigned int undefined_bits_1_31:31;
};
u_int32_t reg32;
};
void EmcDev::fill_timing_control_details(const u_int32_t &value, const u_int32_t &new_value)
{
const timing_control_u old_value_t = { .reg32 = value };
const timing_control_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: timing_update:1", "", 1, old_value_t.timing_update, new_value_t.timing_update };
m_bit_details_model.bits.append(entry);
entry = { "01: undefined_bits_1_31:31", "", 31, old_value_t.undefined_bits_1_31, new_value_t.undefined_bits_1_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "The TIMING_CONTROL register is used by SW to trigger parameter updates for timing parameter registers, rdqs/quse delay controls, and some DLL controls. Writing the TIMING_UPDATE field updates the active state of these registers with the programmed assembly state. The active state is updated during a safe interval determined by the EMC. If CLKCHANGE_REQ_ENABLE is enabled, the active value will automatically be updated on completion of the clock change.\nBoot requirements: Writing this register with 0x1 will trigger a timing update event, which should be used in both warmboot and coldboot sequences. .";
}
#define RC_OFFSET 0x2C
#define RC_UNDEFMASK 0xFFFFFFC0
union rc_u {
struct {
unsigned int rc:6; /* specifies the row cycle time. This is the minimum number of cycles between activate commands to the same bank. LPDDR2: ceil((tRASmin+tRPpb)/tCK) DDR2: ceil(tRC/tCK) */
unsigned int undefined_bits_6_31:26;
};
u_int32_t reg32;
};
void EmcDev::fill_rc_details(const u_int32_t &value, const u_int32_t &new_value)
{
const rc_u old_value_t = { .reg32 = value };
const rc_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: rc:6",
"specifies the row cycle time. This is the minimum number of cycles between activate commands to the same bank. LPDDR2: ceil((tRASmin+tRPpb)/tCK) DDR2: ceil(tRC/tCK)",
6, old_value_t.rc, new_value_t.rc };
m_bit_details_model.bits.append(entry);
entry = { "06: undefined_bits_6_31:26", "", 26, old_value_t.undefined_bits_6_31, new_value_t.undefined_bits_6_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define RFC_OFFSET 0x30
#define RFC_UNDEFMASK 0xFFFFFE00
union rfc_u {
struct {
unsigned int rfc:9; /* specifies the auto refresh cycle time. This is the minimum number of cycles between an auto refresh command and a subsequent auto refresh or activate command. LPDDR2: ceil(tRFCab/tCK) DDR2 : ceil(tRFC/tCK) */
unsigned int undefined_bits_9_31:23;
};
u_int32_t reg32;
};
void EmcDev::fill_rfc_details(const u_int32_t &value, const u_int32_t &new_value)
{
const rfc_u old_value_t = { .reg32 = value };
const rfc_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: rfc:9",
"specifies the auto refresh cycle time. This is the minimum number of cycles between an auto refresh command and a subsequent auto refresh or activate command. LPDDR2: ceil(tRFCab/tCK) DDR2 : ceil(tRFC/tCK)",
9, old_value_t.rfc, new_value_t.rfc };
m_bit_details_model.bits.append(entry);
entry = { "09: undefined_bits_9_31:23", "", 23, old_value_t.undefined_bits_9_31, new_value_t.undefined_bits_9_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define RAS_OFFSET 0x34
#define RAS_UNDEFMASK 0xFFFFFFC0
union ras_u {
struct {
unsigned int ras:6; /* specifies the row active time. This is the minimum number of cycles between an activate command and a precharge command to the same bank. LPDDR2: ceil(tRASmin/tCK); min = 3 DDR2 : ceil(tRASmin/tCK) */
unsigned int undefined_bits_6_31:26;
};
u_int32_t reg32;
};
void EmcDev::fill_ras_details(const u_int32_t &value, const u_int32_t &new_value)
{
const ras_u old_value_t = { .reg32 = value };
const ras_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: ras:6",
"specifies the row active time. This is the minimum number of cycles between an activate command and a precharge command to the same bank. LPDDR2: ceil(tRASmin/tCK); min = 3 DDR2 : ceil(tRASmin/tCK)",
6, old_value_t.ras, new_value_t.ras };
m_bit_details_model.bits.append(entry);
entry = { "06: undefined_bits_6_31:26", "", 26, old_value_t.undefined_bits_6_31, new_value_t.undefined_bits_6_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define RP_OFFSET 0x38
#define RP_UNDEFMASK 0xFFFFFFC0
union rp_u {
struct {
unsigned int rp:6; /* specifies the row precharge time. This is the minimum number of cycles between a precharge command and an activate command to the same bank. LPDDR2: ceil(tRPpb/tCK); min = 3 DDR2 : ceil(tRP/tCK) */
unsigned int undefined_bits_6_31:26;
};
u_int32_t reg32;
};
void EmcDev::fill_rp_details(const u_int32_t &value, const u_int32_t &new_value)
{
const rp_u old_value_t = { .reg32 = value };
const rp_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: rp:6",
"specifies the row precharge time. This is the minimum number of cycles between a precharge command and an activate command to the same bank. LPDDR2: ceil(tRPpb/tCK); min = 3 DDR2 : ceil(tRP/tCK)",
6, old_value_t.rp, new_value_t.rp };
m_bit_details_model.bits.append(entry);
entry = { "06: undefined_bits_6_31:26", "", 26, old_value_t.undefined_bits_6_31, new_value_t.undefined_bits_6_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define R2W_OFFSET 0x3C
#define R2W_UNDEFMASK 0xFFFFFFE0
union r2w_u {
struct {
unsigned int r2w:5; /* specifies the minimum number of cycles from any read command to any write command, irrespective of bank. This parameter guarantees the read->write turn-around time on the bus. Largest programming value is 29 LPDDR2: ceilRL + ceil(tDQSCKmax/tCK) + 2 - WL DDR2 w/o ODT: 4 DDR2 w/ ODT: 5 */
unsigned int undefined_bits_5_31:27;
};
u_int32_t reg32;
};
void EmcDev::fill_r2w_details(const u_int32_t &value, const u_int32_t &new_value)
{
const r2w_u old_value_t = { .reg32 = value };
const r2w_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: r2w:5",
"specifies the minimum number of cycles from any read command to any write command, irrespective of bank. This parameter guarantees the read->write turn-around time on the bus. Largest programming value is 29 LPDDR2: ceilRL + ceil(tDQSCKmax/tCK) + 2 - WL DDR2 w/o ODT: 4 DDR2 w/ ODT: 5",
5, old_value_t.r2w, new_value_t.r2w };
m_bit_details_model.bits.append(entry);
entry = { "05: undefined_bits_5_31:27", "", 27, old_value_t.undefined_bits_5_31, new_value_t.undefined_bits_5_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define W2R_OFFSET 0x40
#define W2R_UNDEFMASK 0xFFFFFFE0
union w2r_u {
struct {
unsigned int w2r:5; /* specifies the minimum number of cycles from a write command to a read command, irrespective of bank. Largest programming value is 29 LPDDR2/DDR2: 2 + max(2, ceil(tWTR/tCK)) */
unsigned int undefined_bits_5_31:27;
};
u_int32_t reg32;
};
void EmcDev::fill_w2r_details(const u_int32_t &value, const u_int32_t &new_value)
{
const w2r_u old_value_t = { .reg32 = value };
const w2r_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: w2r:5",
"specifies the minimum number of cycles from a write command to a read command, irrespective of bank. Largest programming value is 29 LPDDR2/DDR2: 2 + max(2, ceil(tWTR/tCK))",
5, old_value_t.w2r, new_value_t.w2r };
m_bit_details_model.bits.append(entry);
entry = { "05: undefined_bits_5_31:27", "", 27, old_value_t.undefined_bits_5_31, new_value_t.undefined_bits_5_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define R2P_OFFSET 0x44
#define R2P_UNDEFMASK 0xFFFFFFE0
union r2p_u {
struct {
unsigned int r2p:5; /* specifies the minimum number of cycles from a read command to a precharge command for the same bank. LPDDR2: ceil(tRTP/tCK); min = 2; add 1 if LPDDR2-S2 DDR2: ceil(tRTP/tCK) */
unsigned int undefined_bits_5_31:27;
};
u_int32_t reg32;
};
void EmcDev::fill_r2p_details(const u_int32_t &value, const u_int32_t &new_value)
{
const r2p_u old_value_t = { .reg32 = value };
const r2p_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: r2p:5",
"specifies the minimum number of cycles from a read command to a precharge command for the same bank. LPDDR2: ceil(tRTP/tCK); min = 2; add 1 if LPDDR2-S2 DDR2: ceil(tRTP/tCK)",
5, old_value_t.r2p, new_value_t.r2p };
m_bit_details_model.bits.append(entry);
entry = { "05: undefined_bits_5_31:27", "", 27, old_value_t.undefined_bits_5_31, new_value_t.undefined_bits_5_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define W2P_OFFSET 0x48
#define W2P_UNDEFMASK 0xFFFFFFE0
union w2p_u {
struct {
unsigned int w2p:5; /* specifies the minimum number of cycles from a write command to a precharge command for the same bank. LPDDR2: ceilWL + 2 + max(3, ceil(tWR/tCK)) DDR2: WL + 1 + max(2, ceil(tWR/tCK)) */
unsigned int undefined_bits_5_31:27;
};
u_int32_t reg32;
};
void EmcDev::fill_w2p_details(const u_int32_t &value, const u_int32_t &new_value)
{
const w2p_u old_value_t = { .reg32 = value };
const w2p_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: w2p:5",
"specifies the minimum number of cycles from a write command to a precharge command for the same bank. LPDDR2: ceilWL + 2 + max(3, ceil(tWR/tCK)) DDR2: WL + 1 + max(2, ceil(tWR/tCK))",
5, old_value_t.w2p, new_value_t.w2p };
m_bit_details_model.bits.append(entry);
entry = { "05: undefined_bits_5_31:27", "", 27, old_value_t.undefined_bits_5_31, new_value_t.undefined_bits_5_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define RD_RCD_OFFSET 0x4C
#define RD_RCD_UNDEFMASK 0xFFFFFFC0
union rd_rcd_u {
struct {
unsigned int rd_rcd:6; /* specifies the RAS to CAS delay. RD_RCD is the minimum number of cycles between an activate command and a read command to the same bank. LPDDR2: ceil(tRCD/tCK); min = 3 DDR2: ceil(tRCD/tCK) */
unsigned int undefined_bits_6_31:26;
};
u_int32_t reg32;
};
void EmcDev::fill_rd_rcd_details(const u_int32_t &value, const u_int32_t &new_value)
{
const rd_rcd_u old_value_t = { .reg32 = value };
const rd_rcd_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: rd_rcd:6",
"specifies the RAS to CAS delay. RD_RCD is the minimum number of cycles between an activate command and a read command to the same bank. LPDDR2: ceil(tRCD/tCK); min = 3 DDR2: ceil(tRCD/tCK)",
6, old_value_t.rd_rcd, new_value_t.rd_rcd };
m_bit_details_model.bits.append(entry);
entry = { "06: undefined_bits_6_31:26", "", 26, old_value_t.undefined_bits_6_31, new_value_t.undefined_bits_6_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define WR_RCD_OFFSET 0x50
#define WR_RCD_UNDEFMASK 0xFFFFFFC0
union wr_rcd_u {
struct {
unsigned int wr_rcd:6; /* minimum number of cycles between an activate command and a write command to the same bank. LPDDR2: ceilceil(tRCD/tCK); min = 3 DDR2: ceil(tRCD/tCK) */
unsigned int undefined_bits_6_31:26;
};
u_int32_t reg32;
};
void EmcDev::fill_wr_rcd_details(const u_int32_t &value, const u_int32_t &new_value)
{
const wr_rcd_u old_value_t = { .reg32 = value };
const wr_rcd_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: wr_rcd:6",
"minimum number of cycles between an activate command and a write command to the same bank. LPDDR2: ceilceil(tRCD/tCK); min = 3 DDR2: ceil(tRCD/tCK)",
6, old_value_t.wr_rcd, new_value_t.wr_rcd };
m_bit_details_model.bits.append(entry);
entry = { "06: undefined_bits_6_31:26", "", 26, old_value_t.undefined_bits_6_31, new_value_t.undefined_bits_6_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "DRAM Timing Parameter\n This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.";
}
#define RRD_OFFSET 0x54
#define RRD_UNDEFMASK 0xFFFFFFF0
union rrd_u {
struct {
unsigned int rrd:4; /* specifies the Bank X Act to Bank Y Act command delay. LPDDR2: ceilceil(tRRD/tCK); min = 2 DDR2: ceil(tRRD/tCK) */
unsigned int undefined_bits_4_31:28;
};
u_int32_t reg32;
};
void EmcDev::fill_rrd_details(const u_int32_t &value, const u_int32_t &new_value)
{
const rrd_u old_value_t = { .reg32 = value };
const rrd_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: rrd:4",
"specifies the Bank X Act to Bank Y Act command delay. LPDDR2: ceilceil(tRRD/tCK); min = 2 DDR2: ceil(tRRD/tCK)",
4, old_value_t.rrd, new_value_t.rrd };
m_bit_details_model.bits.append(entry);
entry = { "04: undefined_bits_4_31:28", "", 28, old_value_t.undefined_bits_4_31, new_value_t.undefined_bits_4_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define REXT_OFFSET 0x58
#define REXT_UNDEFMASK 0xFFFFFFF0
union rext_u {
struct {
unsigned int rext:4; /* specifies the read to read delay for reads when multiple physical devices are present. LPDDR2: if (tCK >= 6) REXT = 2 else if (tCK >= 2) REXT = 3 else REXT = 4 DDR2: 1 */
unsigned int undefined_bits_4_31:28;
};
u_int32_t reg32;
};
void EmcDev::fill_rext_details(const u_int32_t &value, const u_int32_t &new_value)
{
const rext_u old_value_t = { .reg32 = value };
const rext_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: rext:4",
"specifies the read to read delay for reads when multiple physical devices are present. LPDDR2: if (tCK >= 6) REXT = 2 else if (tCK >= 2) REXT = 3 else REXT = 4 DDR2: 1",
4, old_value_t.rext, new_value_t.rext };
m_bit_details_model.bits.append(entry);
entry = { "04: undefined_bits_4_31:28", "", 28, old_value_t.undefined_bits_4_31, new_value_t.undefined_bits_4_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define WDV_OFFSET 0x5C
#define WDV_UNDEFMASK 0xFFFFFFF0
union wdv_u {
struct {
unsigned int wdv:4; /* the number of cycles to post (delay) write data from being asserted to the rams. 15 = MAX LPDDR2: WL DDR2: WL - 1 */
unsigned int undefined_bits_4_31:28;
};
u_int32_t reg32;
};
void EmcDev::fill_wdv_details(const u_int32_t &value, const u_int32_t &new_value)
{
const wdv_u old_value_t = { .reg32 = value };
const wdv_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: wdv:4",
"the number of cycles to post (delay) write data from being asserted to the rams.\n15 = MAX LPDDR2: WL DDR2: WL - 1",
4, old_value_t.wdv, new_value_t.wdv };
m_bit_details_model.bits.append(entry);
entry = { "04: undefined_bits_4_31:28", "", 28, old_value_t.undefined_bits_4_31, new_value_t.undefined_bits_4_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define QUSE_OFFSET 0x60
#define QUSE_UNDEFMASK 0xFFFFFFF0
union quse_u {
struct {
unsigned int quse:4; /* tells the chip when to look for read return data. LPDDR2/DDR2: obtained from characterization */
unsigned int undefined_bits_4_31:28;
};
u_int32_t reg32;
};
void EmcDev::fill_quse_details(const u_int32_t &value, const u_int32_t &new_value)
{
const quse_u old_value_t = { .reg32 = value };
const quse_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: quse:4",
"tells the chip when to look for read return data. LPDDR2/DDR2: obtained from characterization",
4, old_value_t.quse, new_value_t.quse };
m_bit_details_model.bits.append(entry);
entry = { "04: undefined_bits_4_31:28", "", 28, old_value_t.undefined_bits_4_31, new_value_t.undefined_bits_4_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "The QRST, QUSE, RDV registers specify the delays from read to internal timing signals. These fields should be set as follows:\nBecause DRAM uses a tristating clock (the DQS) a method is needed to deal with the ambiguity of when DQS is tristate. Only one such method is supported: QUSE.\n This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define QRST_OFFSET 0x64
#define QRST_UNDEFMASK 0xFFFFFFF0
union qrst_u {
struct {
unsigned int qrst:4; /* time from expiration of QSAFE until reset is issued LPDDR2: ceilRL - 2 DDR2: CL - 2 */
unsigned int undefined_bits_4_31:28;
};
u_int32_t reg32;
};
void EmcDev::fill_qrst_details(const u_int32_t &value, const u_int32_t &new_value)
{
const qrst_u old_value_t = { .reg32 = value };
const qrst_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: qrst:4",
"time from expiration of QSAFE until reset is issued LPDDR2: ceilRL - 2 DDR2: CL - 2",
4, old_value_t.qrst, new_value_t.qrst };
m_bit_details_model.bits.append(entry);
entry = { "04: undefined_bits_4_31:28", "", 28, old_value_t.undefined_bits_4_31, new_value_t.undefined_bits_4_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define QSAFE_OFFSET 0x68
#define QSAFE_UNDEFMASK 0xFFFFFFF0
union qsafe_u {
struct {
unsigned int qsafe:4; /* time from a read command to when it is safe to issue a QRST (delayed by the QRST parameter). LPDDR2/DDR2: QSAFE >= RDV - QRST */
unsigned int undefined_bits_4_31:28;
};
u_int32_t reg32;
};
void EmcDev::fill_qsafe_details(const u_int32_t &value, const u_int32_t &new_value)
{
const qsafe_u old_value_t = { .reg32 = value };
const qsafe_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: qsafe:4",
"time from a read command to when it is safe to issue a QRST (delayed by the QRST parameter). LPDDR2/DDR2: QSAFE >= RDV - QRST",
4, old_value_t.qsafe, new_value_t.qsafe };
m_bit_details_model.bits.append(entry);
entry = { "04: undefined_bits_4_31:28", "", 28, old_value_t.undefined_bits_4_31, new_value_t.undefined_bits_4_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "When PERIODIC_QRST is enabled, the QSAFE parameter is intended to guarantee that the QRSTs will not interfere with pending reads (e.g. the queue is empty). This field must be set to at least (RDV - QRST).\nThis register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define RDV_OFFSET 0x6C
#define RDV_UNDEFMASK 0xFFFFFFE0
union rdv_u {
struct {
unsigned int rdv:5; /* time from read command to latching the read data from the pad macros. 15 = MAX LPDDR2: ceilRL + 5 + ceil(tDQSCKmax/tCK) DDR2: CL + 7 for DDR2 */
unsigned int undefined_bits_5_31:27;
};
u_int32_t reg32;
};
void EmcDev::fill_rdv_details(const u_int32_t &value, const u_int32_t &new_value)
{
const rdv_u old_value_t = { .reg32 = value };
const rdv_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: rdv:5",
"time from read command to latching the read data from the pad macros.\n15 = MAX LPDDR2: ceilRL + 5 + ceil(tDQSCKmax/tCK) DDR2: CL + 7 for DDR2",
5, old_value_t.rdv, new_value_t.rdv };
m_bit_details_model.bits.append(entry);
entry = { "05: undefined_bits_5_31:27", "", 27, old_value_t.undefined_bits_5_31, new_value_t.undefined_bits_5_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "RDV is the read latency register. This register value is not negotiable, it will work with the right value and will not with the wrong value. It is sequential timing, not combinational (i.e., maybe the silicon is fast enough type) timing.\n This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define REFRESH_OFFSET 0x70
#define REFRESH_UNDEFMASK 0xFFFF0000
union refresh_u {
struct {
unsigned int refresh_lo:5; /* specifies the interval between refresh requests (LSB portion) 31 = MAX */
unsigned int refresh:11; /* specifies the interval between refresh requests (MSB portion) */
unsigned int undefined_bits_16_31:16;
};
u_int32_t reg32;
};
void EmcDev::fill_refresh_details(const u_int32_t &value, const u_int32_t &new_value)
{
const refresh_u old_value_t = { .reg32 = value };
const refresh_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: refresh_lo:5",
"specifies the interval between refresh requests (LSB portion)\n31 = MAX",
5, old_value_t.refresh_lo, new_value_t.refresh_lo };
m_bit_details_model.bits.append(entry);
entry = { "05: refresh:11",
"specifies the interval between refresh requests (MSB portion)",
11, old_value_t.refresh, new_value_t.refresh };
m_bit_details_model.bits.append(entry);
entry = { "16: undefined_bits_16_31:16", "", 16, old_value_t.undefined_bits_16_31, new_value_t.undefined_bits_16_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter\nThe whole register value is recommended to be about 40 less than floor(min(tREFI, tRASmax)/tCK), but no less than 80% of that value.";
}
#define BURST_REFRESH_NUM_OFFSET 0x74
#define BURST_REFRESH_NUM_UNDEFMASK 0xFFFFFFF0
union burst_refresh_num_u {
struct {
unsigned int burst_refresh_num:4; /* specify the refresh burst count. 0 = Burst Refresh count equals 1 1 = Burst Refresh count equals 2 2 = Burst Refresh count equals 4 3 = Burst Refresh count equals 8 4 = Burst Refresh count equals 16 5 = Burst Refresh count equals 32 6 = Burst Refresh count equals 64 7 = Burst Refresh count equals 128 8 = Burst Refresh count equals 256 9 = Burst Refresh count equals 512 9 = MAX */
unsigned int undefined_bits_4_31:28;
};
u_int32_t reg32;
};
void EmcDev::fill_burst_refresh_num_details(const u_int32_t &value, const u_int32_t &new_value)
{
const burst_refresh_num_u old_value_t = { .reg32 = value };
const burst_refresh_num_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: burst_refresh_num:4",
"specify the refresh burst count.\n0 = Burst Refresh count equals 1\n1 = Burst Refresh count equals 2\n2 = Burst Refresh count equals 4\n3 = Burst Refresh count equals 8\n4 = Burst Refresh count equals 16\n5 = Burst Refresh count equals 32\n6 = Burst Refresh count equals 64\n7 = Burst Refresh count equals 128\n8 = Burst Refresh count equals 256\n9 = Burst Refresh count equals 512\n9 = MAX",
4, old_value_t.burst_refresh_num, new_value_t.burst_refresh_num };
m_bit_details_model.bits.append(entry);
entry = { "04: undefined_bits_4_31:28", "", 28, old_value_t.undefined_bits_4_31, new_value_t.undefined_bits_4_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "BURST_REFRESH_NUM is used to specify the refresh burst count. The refresh controller will wait until BURST_REFRESH_NUM refreshes have been scheduled, and then issue them all at once. This can result in a performance\nimprovement in many cases. This may increase worst-case read latency due to burst refresh, so it is recommended to be programmed to BR1 for cases where latency-sensitive modules are active.\nNote: If tRAS(max) is less than the refresh interval (tREF/#_of_rows), tRAS(max) must be used instead of the refresh interval in the formula above. This is because refresh is used to satisfy tRAS (max) timing. Accordingly, BURST_REFRESH_NUM must be programmed in such a way that queuing up multiple refreshes does not violate tRAS(max) timing. Burst length = 2^BURST_REFRESH_NUM.\n Refreshes will be throttled to meet TREFBW limitation (8/window) if TREFBW > 0.\nThis register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define PDEX2WR_OFFSET 0x78
#define PDEX2WR_UNDEFMASK 0xFFFFFFF0
union pdex2wr_u {
struct {
unsigned int pdex2wr:4; /* specify the timing delay from exit of powerdown mode to a write command. Largest allowed value is 14 LPDDR2/DDR2: ceil(tXP/tCLK)+1 */
unsigned int undefined_bits_4_31:28;
};
u_int32_t reg32;
};
void EmcDev::fill_pdex2wr_details(const u_int32_t &value, const u_int32_t &new_value)
{
const pdex2wr_u old_value_t = { .reg32 = value };
const pdex2wr_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: pdex2wr:4",
"specify the timing delay from exit of powerdown mode to a write command. Largest allowed value is 14 LPDDR2/DDR2: ceil(tXP/tCLK)+1",
4, old_value_t.pdex2wr, new_value_t.pdex2wr };
m_bit_details_model.bits.append(entry);
entry = { "04: undefined_bits_4_31:28", "", 28, old_value_t.undefined_bits_4_31, new_value_t.undefined_bits_4_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define PDEX2RD_OFFSET 0x7C
#define PDEX2RD_UNDEFMASK 0xFFFFFFF0
union pdex2rd_u {
struct {
unsigned int pdex2rd:4; /* specify the timing delay from exit of powerdown mode to a read command. Largest allowed value is 14 LPDDR2/DDR2: ceil(tXP/tCLK)+1 */
unsigned int undefined_bits_4_31:28;
};
u_int32_t reg32;
};
void EmcDev::fill_pdex2rd_details(const u_int32_t &value, const u_int32_t &new_value)
{
const pdex2rd_u old_value_t = { .reg32 = value };
const pdex2rd_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: pdex2rd:4",
"specify the timing delay from exit of powerdown mode to a read command. Largest allowed value is 14 LPDDR2/DDR2: ceil(tXP/tCLK)+1",
4, old_value_t.pdex2rd, new_value_t.pdex2rd };
m_bit_details_model.bits.append(entry);
entry = { "04: undefined_bits_4_31:28", "", 28, old_value_t.undefined_bits_4_31, new_value_t.undefined_bits_4_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define PCHG2PDEN_OFFSET 0x80
#define PCHG2PDEN_UNDEFMASK 0xFFFFFFE0
union pchg2pden_u {
struct {
unsigned int pchg2pden:5; /* specify the timing delay from a precharge command to powerdown entry. LPDDR2/DDR2: ceil(tRP/tCK) */
unsigned int undefined_bits_5_31:27;
};
u_int32_t reg32;
};
void EmcDev::fill_pchg2pden_details(const u_int32_t &value, const u_int32_t &new_value)
{
const pchg2pden_u old_value_t = { .reg32 = value };
const pchg2pden_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: pchg2pden:5",
"specify the timing delay from a precharge command to powerdown entry. LPDDR2/DDR2: ceil(tRP/tCK)",
5, old_value_t.pchg2pden, new_value_t.pchg2pden };
m_bit_details_model.bits.append(entry);
entry = { "05: undefined_bits_5_31:27", "", 27, old_value_t.undefined_bits_5_31, new_value_t.undefined_bits_5_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define ACT2PDEN_OFFSET 0x84
#define ACT2PDEN_UNDEFMASK 0xFFFFFFE0
union act2pden_u {
struct {
unsigned int act2pden:5; /* specify the timing delay from an activate, mrs or emrs command to powerdown entry. LPDDR2: ceilmax(8, ceil(tRCD/tCK)) DDR2: ceil(tRCD/tCLK) */
unsigned int undefined_bits_5_31:27;
};
u_int32_t reg32;
};
void EmcDev::fill_act2pden_details(const u_int32_t &value, const u_int32_t &new_value)
{
const act2pden_u old_value_t = { .reg32 = value };
const act2pden_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: act2pden:5",
"specify the timing delay from an activate, mrs or emrs command to powerdown entry. LPDDR2: ceilmax(8, ceil(tRCD/tCK)) DDR2: ceil(tRCD/tCLK)",
5, old_value_t.act2pden, new_value_t.act2pden };
m_bit_details_model.bits.append(entry);
entry = { "05: undefined_bits_5_31:27", "", 27, old_value_t.undefined_bits_5_31, new_value_t.undefined_bits_5_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define AR2PDEN_OFFSET 0x88
#define AR2PDEN_UNDEFMASK 0xFFFFFFE0
union ar2pden_u {
struct {
unsigned int ar2pden:5; /* specify the timing delay from an autorefresh command to powerdown entry. LPDDR2/DDR2: 1 */
unsigned int undefined_bits_5_31:27;
};
u_int32_t reg32;
};
void EmcDev::fill_ar2pden_details(const u_int32_t &value, const u_int32_t &new_value)
{
const ar2pden_u old_value_t = { .reg32 = value };
const ar2pden_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: ar2pden:5",
"specify the timing delay from an autorefresh command to powerdown entry. LPDDR2/DDR2: 1",
5, old_value_t.ar2pden, new_value_t.ar2pden };
m_bit_details_model.bits.append(entry);
entry = { "05: undefined_bits_5_31:27", "", 27, old_value_t.undefined_bits_5_31, new_value_t.undefined_bits_5_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define RW2PDEN_OFFSET 0x8C
#define RW2PDEN_UNDEFMASK 0xFFFFFFC0
union rw2pden_u {
struct {
unsigned int rw2pden:6; /* specify the timing delay from a read/write command to powerdown entry. Auto-precharge timing must be taken into account when programming this field. LPDDR2: ceilmax(RL+ceil((tDQSCKmax+tRP)/tCK)+1, WL+1+ceil((tWR+tRP)/tCK)) DDR2: max(RL+ceil((tDQSCKmax+tRP)/tCK)+1, WL+ceil((tWR+tRP)/tCK)) */
unsigned int undefined_bits_6_31:26;
};
u_int32_t reg32;
};
void EmcDev::fill_rw2pden_details(const u_int32_t &value, const u_int32_t &new_value)
{
const rw2pden_u old_value_t = { .reg32 = value };
const rw2pden_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: rw2pden:6",
"specify the timing delay from a read/write command to powerdown entry. Auto-precharge timing must be taken into account when programming this field. LPDDR2: ceilmax(RL+ceil((tDQSCKmax+tRP)/tCK)+1, WL+1+ceil((tWR+tRP)/tCK)) DDR2: max(RL+ceil((tDQSCKmax+tRP)/tCK)+1, WL+ceil((tWR+tRP)/tCK))",
6, old_value_t.rw2pden, new_value_t.rw2pden };
m_bit_details_model.bits.append(entry);
entry = { "06: undefined_bits_6_31:26", "", 26, old_value_t.undefined_bits_6_31, new_value_t.undefined_bits_6_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define TXSR_OFFSET 0x90
#define TXSR_UNDEFMASK 0xFFFFF000
union txsr_u {
struct {
unsigned int txsr:12; /* cycles between self-refresh exit & first DRAM command Largest allowed value is 0xffe LPDDR2: ceilceil(tXSR/tCK); min = 2 DDR2: ceil(tXSR/tCK) */
unsigned int undefined_bits_12_31:20;
};
u_int32_t reg32;
};
void EmcDev::fill_txsr_details(const u_int32_t &value, const u_int32_t &new_value)
{
const txsr_u old_value_t = { .reg32 = value };
const txsr_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: txsr:12",
"cycles between self-refresh exit & first DRAM command Largest allowed value is 0xffe LPDDR2: ceilceil(tXSR/tCK); min = 2 DDR2: ceil(tXSR/tCK)",
12, old_value_t.txsr, new_value_t.txsr };
m_bit_details_model.bits.append(entry);
entry = { "12: undefined_bits_12_31:20", "", 20, old_value_t.undefined_bits_12_31, new_value_t.undefined_bits_12_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define TCKE_OFFSET 0x94
#define TCKE_UNDEFMASK 0xFFFFFFF0
union tcke_u {
struct {
unsigned int tcke:4; /* specify minimum CKE pulse width. LPDDR2: ceilmax(tCKE, ceil(tXP/tCKmin)): tCKmin is the tCK of the max frequency of the DRAM parts used DDR2: tCKE */
unsigned int undefined_bits_4_31:28;
};
u_int32_t reg32;
};
void EmcDev::fill_tcke_details(const u_int32_t &value, const u_int32_t &new_value)
{
const tcke_u old_value_t = { .reg32 = value };
const tcke_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: tcke:4",
"specify minimum CKE pulse width. LPDDR2: ceilmax(tCKE, ceil(tXP/tCKmin)): tCKmin is the tCK of the max frequency of the DRAM parts used DDR2: tCKE",
4, old_value_t.tcke, new_value_t.tcke };
m_bit_details_model.bits.append(entry);
entry = { "04: undefined_bits_4_31:28", "", 28, old_value_t.undefined_bits_4_31, new_value_t.undefined_bits_4_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define TFAW_OFFSET 0x98
#define TFAW_UNDEFMASK 0xFFFFFFC0
union tfaw_u {
struct {
unsigned int tfaw:6; /* specify the width of the FAW (four-activate window) for 8-bank devices. Set to 0 to disable this timing check. Only 4 activates may occur withing the rolling window. LPDDR2: ceilceil(tFAW/tCK); min = 8 DDR2: ceil(tFAW/tCK) */
unsigned int undefined_bits_6_31:26;
};
u_int32_t reg32;
};
void EmcDev::fill_tfaw_details(const u_int32_t &value, const u_int32_t &new_value)
{
const tfaw_u old_value_t = { .reg32 = value };
const tfaw_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: tfaw:6",
"specify the width of the FAW (four-activate window) for 8-bank devices. Set to 0 to disable this timing check. Only 4 activates may occur withing the rolling window. LPDDR2: ceilceil(tFAW/tCK); min = 8 DDR2: ceil(tFAW/tCK)",
6, old_value_t.tfaw, new_value_t.tfaw };
m_bit_details_model.bits.append(entry);
entry = { "06: undefined_bits_6_31:26", "", 26, old_value_t.undefined_bits_6_31, new_value_t.undefined_bits_6_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define TRPAB_OFFSET 0x9C
#define TRPAB_UNDEFMASK 0xFFFFFFC0
union trpab_u {
struct {
unsigned int trpab:6; /* specify precharge-all tRP allowance for 8-bank devices. Setting this field to 0 will cause EMC to use TRP.TRP for precharge-all. LPDDR2: ceilceil((tRPpb+3)/tCK); min = 3 DDR2: ceil((tRP + tCK)/tCK) */
unsigned int undefined_bits_6_31:26;
};
u_int32_t reg32;
};
void EmcDev::fill_trpab_details(const u_int32_t &value, const u_int32_t &new_value)
{
const trpab_u old_value_t = { .reg32 = value };
const trpab_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: trpab:6",
"specify precharge-all tRP allowance for 8-bank devices. Setting this field to 0 will cause EMC to use TRP.TRP for precharge-all. LPDDR2: ceilceil((tRPpb+3)/tCK); min = 3 DDR2: ceil((tRP + tCK)/tCK)",
6, old_value_t.trpab, new_value_t.trpab };
m_bit_details_model.bits.append(entry);
entry = { "06: undefined_bits_6_31:26", "", 26, old_value_t.undefined_bits_6_31, new_value_t.undefined_bits_6_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define TCLKSTABLE_OFFSET 0xA0
#define TCLKSTABLE_UNDEFMASK 0xFFFFFFF0
union tclkstable_u {
struct {
unsigned int tclkstable:4; /* specify minimum number of cycles of a stable clock period prior to exiting powerdown or self-refresh modes. LPDDR2: ceilmax(5, ceil(tRFC]/tCKmin/4) - 2): tCKmin is the tCK of the max frequency of the DRAM parts used DDR2: 2 */
unsigned int undefined_bits_4_31:28;
};
u_int32_t reg32;
};
void EmcDev::fill_tclkstable_details(const u_int32_t &value, const u_int32_t &new_value)
{
const tclkstable_u old_value_t = { .reg32 = value };
const tclkstable_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: tclkstable:4",
"specify minimum number of cycles of a stable clock period prior to exiting powerdown or self-refresh modes. LPDDR2: ceilmax(5, ceil(tRFC]/tCKmin/4) - 2): tCKmin is the tCK of the max frequency of the DRAM parts used DDR2: 2",
4, old_value_t.tclkstable, new_value_t.tclkstable };
m_bit_details_model.bits.append(entry);
entry = { "04: undefined_bits_4_31:28", "", 28, old_value_t.undefined_bits_4_31, new_value_t.undefined_bits_4_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define TCLKSTOP_OFFSET 0xA4
#define TCLKSTOP_UNDEFMASK 0xFFFFFFF0
union tclkstop_u {
struct {
unsigned int tclkstop:4; /* delay from last command to stopping the external clock to DRAM devices. LPDDR2/DDR2: 2 */
unsigned int undefined_bits_4_31:28;
};
u_int32_t reg32;
};
void EmcDev::fill_tclkstop_details(const u_int32_t &value, const u_int32_t &new_value)
{
const tclkstop_u old_value_t = { .reg32 = value };
const tclkstop_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: tclkstop:4",
"delay from last command to stopping the external clock to DRAM devices. LPDDR2/DDR2: 2",
4, old_value_t.tclkstop, new_value_t.tclkstop };
m_bit_details_model.bits.append(entry);
entry = { "04: undefined_bits_4_31:28", "", 28, old_value_t.undefined_bits_4_31, new_value_t.undefined_bits_4_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define TREFBW_OFFSET 0xA8
#define TREFBW_UNDEFMASK 0xFFFFC000
union trefbw_u {
struct {
unsigned int trefbw:14; /* specify the width of the burst-refresh window. If set to a non-zero value, only 8 refreshes will occur in this rolling window. Set to 0 to disable this timing check. LPDDR2: ceilceil(32*tRFCab/tCK) DDR2: 0 */
unsigned int undefined_bits_14_31:18;
};
u_int32_t reg32;
};
void EmcDev::fill_trefbw_details(const u_int32_t &value, const u_int32_t &new_value)
{
const trefbw_u old_value_t = { .reg32 = value };
const trefbw_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: trefbw:14",
"specify the width of the burst-refresh window. If set to a non-zero value, only 8 refreshes will occur in this rolling window. Set to 0 to disable this timing check. LPDDR2: ceilceil(32*tRFCab/tCK) DDR2: 0",
14, old_value_t.trefbw, new_value_t.trefbw };
m_bit_details_model.bits.append(entry);
entry = { "14: undefined_bits_14_31:18", "", 18, old_value_t.undefined_bits_14_31, new_value_t.undefined_bits_14_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nDRAM Timing Parameter";
}
#define QUSE_EXTRA_OFFSET 0xAC
#define QUSE_EXTRA_UNDEFMASK 0xFFFFFFF0
union quse_extra_u {
struct {
unsigned int quse_extra:4;
unsigned int undefined_bits_4_31:28;
};
u_int32_t reg32;
};
void EmcDev::fill_quse_extra_details(const u_int32_t &value, const u_int32_t &new_value)
{
const quse_extra_u old_value_t = { .reg32 = value };
const quse_extra_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: quse_extra:4", "", 4, old_value_t.quse_extra, new_value_t.quse_extra };
m_bit_details_model.bits.append(entry);
entry = { "04: undefined_bits_4_31:28", "", 28, old_value_t.undefined_bits_4_31, new_value_t.undefined_bits_4_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "QUSE_EXTRA is combined with quse to add extra cycles to data return window. This is for use with dqs pulldowns in lpddr2 where start of read preamble could vary by more than 1 cycle\nExample: To extend end of QUSE window by 1 cycle, set QUSE_EXTRA = QUSE + 1. To start quse window earlier by 1 cycle, set QUSE_EXTRA = QUSE - 1. Disabled if QUSE_EXTRA = 0.\nThis register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.";
}
#define ODT_WRITE_OFFSET 0xB0
#define ODT_WRITE_UNDEFMASK 0x3FFFFFF8
union odt_write_u {
struct {
unsigned int odt_wr_delay:3; /* Set this field = ABS ( WL - ceiling(tAOND) - 2 ). The valid programming range is 0 <= ODT_WR_DELAY <= 2 if ODT_B4_WRITE=0, 0 <= ODT_WR_DELAY <= 1 if ODT_B4_WRITE=1 */
unsigned int undefined_bits_3_29:27;
unsigned int odt_b4_write:1; /* If this field == 1, ODT is turned on ODT_WR_DELAY cycles prior to dram WRITE command. If this field == 0, ODT is turned on ODT_WR_DELAY cycles after dram WRITE command. Set ODT_B4_WRITE to 1 if ( WL - ceiling(tAOND) - 2 ) < 0 */
unsigned int enable_odt_during_write:1;/* enables ODT to be turned on prior to issuing write to DRAM. If ENABLE_ODT_DURING_WRITE = 1 and DISABLE_ODT_DURING_READ = 0, ODT will always be enabled after 1st write */
};
u_int32_t reg32;
};
void EmcDev::fill_odt_write_details(const u_int32_t &value, const u_int32_t &new_value)
{
const odt_write_u old_value_t = { .reg32 = value };
const odt_write_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: odt_wr_delay:3",
"Set this field = ABS ( WL - ceiling(tAOND) - 2 ). The valid programming range is 0 <= ODT_WR_DELAY <= 2 if ODT_B4_WRITE=0, 0 <= ODT_WR_DELAY <= 1 if ODT_B4_WRITE=1",
3, old_value_t.odt_wr_delay, new_value_t.odt_wr_delay };
m_bit_details_model.bits.append(entry);
entry = { "03: undefined_bits_3_29:27", "", 27, old_value_t.undefined_bits_3_29, new_value_t.undefined_bits_3_29 };
m_bit_details_model.bits.append(entry);
entry = { "30: odt_b4_write:1",
"If this field == 1, ODT is turned on ODT_WR_DELAY cycles prior to dram WRITE command. If this field == 0, ODT is turned on ODT_WR_DELAY cycles after dram WRITE command. Set ODT_B4_WRITE to 1 if ( WL - ceiling(tAOND) - 2 ) < 0",
1, old_value_t.odt_b4_write, new_value_t.odt_b4_write };
m_bit_details_model.bits.append(entry);
entry = { "31: enable_odt_during_write:1",
"enables ODT to be turned on prior to issuing write to DRAM. If ENABLE_ODT_DURING_WRITE = 1 and DISABLE_ODT_DURING_READ = 0, ODT will always be enabled after 1st write",
1, old_value_t.enable_odt_during_write, new_value_t.enable_odt_during_write };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = " For DDR2, ODT may be enabled during writes and disabled during reads via control of ODT pin.\nThis register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.";
}
#define ODT_READ_OFFSET 0xB4
#define ODT_READ_UNDEFMASK 0x3FFFFFF8
union odt_read_u {
struct {
unsigned int odt_rd_delay:3; /* Set this field = ABS ( RL - ceiling(tAOFD) - 2 ). The valid programming range is 0 <= ODT_RD_DELAY <= 2 if ODT_B4_READ=0, 0 <= ODT_RD_DELAY <= 1 if ODT_B4_READ=1 */
unsigned int undefined_bits_3_29:27;
unsigned int odt_b4_read:1; /* If this field == 1, ODT is turned off ODT_RD_DELAY cycles prior to dram READ command. If this field == 0, ODT is turned off ODT_RD_DELAY cycles after dram READ command. Set ODT_B4_READ to 1 if ( RL - ceiling(tAOFD) - 2 ) < 0 */
unsigned int disable_odt_during_read:1;/* enables ODT to be turned off prior to issuing read to DRAM. If this field == 0, ODT state will not be changed for reads. If this field == 1, Turn off ODT prior to READ command (has no effect if ODT ENABLE_ODT_DURING_WRITE == 0, as ODT will always be disabled) */
};
u_int32_t reg32;
};
void EmcDev::fill_odt_read_details(const u_int32_t &value, const u_int32_t &new_value)
{
const odt_read_u old_value_t = { .reg32 = value };
const odt_read_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: odt_rd_delay:3",
"Set this field = ABS ( RL - ceiling(tAOFD) - 2 ). The valid programming range is 0 <= ODT_RD_DELAY <= 2 if ODT_B4_READ=0, 0 <= ODT_RD_DELAY <= 1 if ODT_B4_READ=1",
3, old_value_t.odt_rd_delay, new_value_t.odt_rd_delay };
m_bit_details_model.bits.append(entry);
entry = { "03: undefined_bits_3_29:27", "", 27, old_value_t.undefined_bits_3_29, new_value_t.undefined_bits_3_29 };
m_bit_details_model.bits.append(entry);
entry = { "30: odt_b4_read:1",
"If this field == 1, ODT is turned off ODT_RD_DELAY cycles prior to dram READ command. If this field == 0, ODT is turned off ODT_RD_DELAY cycles after dram READ command. Set ODT_B4_READ to 1 if ( RL - ceiling(tAOFD) - 2 ) < 0",
1, old_value_t.odt_b4_read, new_value_t.odt_b4_read };
m_bit_details_model.bits.append(entry);
entry = { "31: disable_odt_during_read:1",
"enables ODT to be turned off prior to issuing read to DRAM. If this field == 0, ODT state will not be changed for reads. If this field == 1, Turn off ODT prior to READ command (has no effect if ODT ENABLE_ODT_DURING_WRITE == 0, as ODT will always be disabled)",
1, old_value_t.disable_odt_during_read, new_value_t.disable_odt_during_read };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = " For DDR2, ODT may be enabled during writes and disabled during reads via control of ODT pin.\nThis register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.";
}
#define MRS_OFFSET 0xCC
#define MRS_UNDEFMASK 0x3FCFC000
union mrs_u {
struct {
unsigned int mrs_adr:14; /* mode-register data to be written */
unsigned int undefined_bits_14_19:6;
unsigned int mrs_ba:2; /* Set to 0x0 for MRS */
unsigned int undefined_bits_22_29:8;
unsigned int mrs_dev_selectn:2; /* active low chip-select, 0x0 applies command to both devices, 0x2 to for only dev0, 0x1 for only dev1 */
};
u_int32_t reg32;
};
void EmcDev::fill_mrs_details(const u_int32_t &value, const u_int32_t &new_value)
{
const mrs_u old_value_t = { .reg32 = value };
const mrs_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: mrs_adr:14",
"mode-register data to be written",
14, old_value_t.mrs_adr, new_value_t.mrs_adr };
m_bit_details_model.bits.append(entry);
entry = { "14: undefined_bits_14_19:6", "", 6, old_value_t.undefined_bits_14_19, new_value_t.undefined_bits_14_19 };
m_bit_details_model.bits.append(entry);
entry = { "20: mrs_ba:2",
"Set to 0x0 for MRS",
2, old_value_t.mrs_ba, new_value_t.mrs_ba };
m_bit_details_model.bits.append(entry);
entry = { "22: undefined_bits_22_29:8", "", 8, old_value_t.undefined_bits_22_29, new_value_t.undefined_bits_22_29 };
m_bit_details_model.bits.append(entry);
entry = { "30: mrs_dev_selectn:2",
"active low chip-select, 0x0 applies command to both devices, 0x2 to for only dev0, 0x1 for only dev1",
2, old_value_t.mrs_dev_selectn, new_value_t.mrs_dev_selectn };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "The MRS register allows SW to issue an MRS command.\nBA0, BA1 are used to address MRS or EMRS registers in DRAM. Although this register can also program EMRS, use the EMRS register so that the HW registers can shadow what is in the DRAM.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\nCommand trigger: MRS";
}
#define EMRS_OFFSET 0xD0
#define EMRS_UNDEFMASK 0x3FCFC000
union emrs_u {
struct {
unsigned int emrs_adr:14; /* mode-register data to be written */
unsigned int undefined_bits_14_19:6;
unsigned int emrs_ba:2; /* Set to 0x1 for EMRS (and where applicable, 0x2 for EMRS2, and 0x3 for EMRS3) */
unsigned int undefined_bits_22_29:8;
unsigned int emrs_dev_selectn:2; /* active low chip-select, 0x0 applies command to both devices, 0x2 to for only dev0, 0x1 for only dev1 */
};
u_int32_t reg32;
};
void EmcDev::fill_emrs_details(const u_int32_t &value, const u_int32_t &new_value)
{
const emrs_u old_value_t = { .reg32 = value };
const emrs_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: emrs_adr:14",
"mode-register data to be written",
14, old_value_t.emrs_adr, new_value_t.emrs_adr };
m_bit_details_model.bits.append(entry);
entry = { "14: undefined_bits_14_19:6", "", 6, old_value_t.undefined_bits_14_19, new_value_t.undefined_bits_14_19 };
m_bit_details_model.bits.append(entry);
entry = { "20: emrs_ba:2",
"Set to 0x1 for EMRS (and where applicable, 0x2 for EMRS2, and 0x3 for EMRS3)",
2, old_value_t.emrs_ba, new_value_t.emrs_ba };
m_bit_details_model.bits.append(entry);
entry = { "22: undefined_bits_22_29:8", "", 8, old_value_t.undefined_bits_22_29, new_value_t.undefined_bits_22_29 };
m_bit_details_model.bits.append(entry);
entry = { "30: emrs_dev_selectn:2",
"active low chip-select, 0x0 applies command to both devices, 0x2 to for only dev0, 0x1 for only dev1",
2, old_value_t.emrs_dev_selectn, new_value_t.emrs_dev_selectn };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "The EMRS register allows SW to issue an EMRS command.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\nCommand trigger: EMRS";
}
#define REF_OFFSET 0xD4
#define REF_UNDEFMASK 0xFFFF00FE
union ref_u {
struct {
unsigned int ref_cmd:1; /* causes the hardware to perform a REFRESH to all DRAM banks */
unsigned int undefined_bits_1_7:7;
unsigned int ref_num:8; /* perform (REF_NUM + 1) refresh cycles */
unsigned int undefined_bits_16_31:16;
};
u_int32_t reg32;
};
void EmcDev::fill_ref_details(const u_int32_t &value, const u_int32_t &new_value)
{
const ref_u old_value_t = { .reg32 = value };
const ref_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: ref_cmd:1",
"causes the hardware to perform a REFRESH to all DRAM banks",
1, old_value_t.ref_cmd, new_value_t.ref_cmd };
m_bit_details_model.bits.append(entry);
entry = { "01: undefined_bits_1_7:7", "", 7, old_value_t.undefined_bits_1_7, new_value_t.undefined_bits_1_7 };
m_bit_details_model.bits.append(entry);
entry = { "08: ref_num:8",
"perform (REF_NUM + 1) refresh cycles",
8, old_value_t.ref_num, new_value_t.ref_num };
m_bit_details_model.bits.append(entry);
entry = { "16: undefined_bits_16_31:16", "", 16, old_value_t.undefined_bits_16_31, new_value_t.undefined_bits_16_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "The REF register allows SW to issue refresh commands. This is done to ensure proper DRAM initialization.\n Boot requirements\n * This register triggers a refresh command. REF_CMD should be written with 0x1 during coldboot to trigger refresh commands during DRAM initialization.\nCommand trigger: Refresh";
}
#define PRE_OFFSET 0xD8
#define PRE_UNDEFMASK 0x3FFFFFFE
union pre_u {
struct {
unsigned int pre_cmd:1; /* causes the hardware to perform a PRECHARGE to all DRAM banks */
unsigned int undefined_bits_1_29:29;
unsigned int pre_dev_selectn:2; /* active low chip-select, 0x0 applies command to both devices, 0x2 to for only dev0, 0x1 for only dev1 */
};
u_int32_t reg32;
};
void EmcDev::fill_pre_details(const u_int32_t &value, const u_int32_t &new_value)
{
const pre_u old_value_t = { .reg32 = value };
const pre_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: pre_cmd:1",
"causes the hardware to perform a PRECHARGE to all DRAM banks",
1, old_value_t.pre_cmd, new_value_t.pre_cmd };
m_bit_details_model.bits.append(entry);
entry = { "01: undefined_bits_1_29:29", "", 29, old_value_t.undefined_bits_1_29, new_value_t.undefined_bits_1_29 };
m_bit_details_model.bits.append(entry);
entry = { "30: pre_dev_selectn:2",
"active low chip-select, 0x0 applies command to both devices, 0x2 to for only dev0, 0x1 for only dev1",
2, old_value_t.pre_dev_selectn, new_value_t.pre_dev_selectn };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "The PRE register allows SW to issue a precharge all command. This command may be used to ensure proper DRAM initialization.\nBoot requirements\n * This register triggers a precharge-all command. PRE_CMD should be written with 0x1 during coldboot to trigger refresh commands during DRAM initialization.\n * If per-device DPD is used, the PRE_DEV_SELECTN field should be parameterized in the BCT and written by the BootROM during coldboot.\nCommand trigger: Precharge-All";
}
#define NOP_OFFSET 0xDC
#define NOP_UNDEFMASK 0xFFFFFFFE
union nop_u {
struct {
unsigned int nop_cmd:1; /* causes the hardware to perform a NOP to all DRAM banks */
unsigned int undefined_bits_1_31:31;
};
u_int32_t reg32;
};
void EmcDev::fill_nop_details(const u_int32_t &value, const u_int32_t &new_value)
{
const nop_u old_value_t = { .reg32 = value };
const nop_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: nop_cmd:1",
"causes the hardware to perform a NOP to all DRAM banks",
1, old_value_t.nop_cmd, new_value_t.nop_cmd };
m_bit_details_model.bits.append(entry);
entry = { "01: undefined_bits_1_31:31", "", 31, old_value_t.undefined_bits_1_31, new_value_t.undefined_bits_1_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "The NOP register allows SW to issue an explicit nop command. This command may be used to ensure proper DRAM initialization.\nBoot requirements\n * This register triggers a no-operation command. NOP_CMD should be written with 0x1 during coldboot to trigger no-op commands during DRAM initialization.\nCommand trigger: NOP";
}
#define SELF_REF_OFFSET 0xE0
#define SELF_REF_UNDEFMASK 0x3FFFFFFE
union self_ref_u {
struct {
unsigned int self_ref_cmd:1; /* causes the hardware to issue a SELF_REFRESH command. While CMD:ENABLED, the CKE pin is held deasserted. The CMD:ENABLED state will override the PIN:CKE setting. The DRAM will ignore all accesses until CMD:DISABLED. 0 = DISABLED 1 = ENABLED */
unsigned int undefined_bits_1_29:29;
unsigned int sref_dev_selectn:2; /* active low chip-select, 0x0 applies command to both devices, 0x2 to for only dev0, 0x1 for only dev1, 0x3 for neither device */
};
u_int32_t reg32;
};
void EmcDev::fill_self_ref_details(const u_int32_t &value, const u_int32_t &new_value)
{
const self_ref_u old_value_t = { .reg32 = value };
const self_ref_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: self_ref_cmd:1",
"causes the hardware to issue a SELF_REFRESH command. While CMD:ENABLED, the CKE pin is held deasserted. The CMD:ENABLED state will override the PIN:CKE setting. The DRAM will ignore all accesses until CMD:DISABLED.\n0 = DISABLED\n1 = ENABLED",
1, old_value_t.self_ref_cmd, new_value_t.self_ref_cmd };
m_bit_details_model.bits.append(entry);
entry = { "01: undefined_bits_1_29:29", "", 29, old_value_t.undefined_bits_1_29, new_value_t.undefined_bits_1_29 };
m_bit_details_model.bits.append(entry);
entry = { "30: sref_dev_selectn:2",
"active low chip-select, 0x0 applies command to both devices, 0x2 to for only dev0, 0x1 for only dev1, 0x3 for neither device",
2, old_value_t.sref_dev_selectn, new_value_t.sref_dev_selectn };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "The SELF_REF register allows SW to issue self-refresh commands.\nCommand trigger: SELF REFRESH";
}
#define DPD_OFFSET 0xE4
#define DPD_UNDEFMASK 0x3FFFFFFE
union dpd_u {
struct {
unsigned int dpd_cmd:1; /* causes the hardware to issue the deep power down command (Burst Terminate w/ cke low). While in DPD mode, the DRAM will not maintain data integrity. While CMD:ENABLED, the CKE pin is held deasserted. The CMD:ENABLED state will override the PIN:CKE setting. The DRAM will ignore all accesses until CMD:DISABLED. 0 = DISABLED 1 = ENABLED */
unsigned int undefined_bits_1_29:29;
unsigned int dpd_dev_selectn:2; /* active low chip-select, 0x0 applies command to both devices, 0x2 to for only dev0, 0x1 for only dev1 */
};
u_int32_t reg32;
};
void EmcDev::fill_dpd_details(const u_int32_t &value, const u_int32_t &new_value)
{
const dpd_u old_value_t = { .reg32 = value };
const dpd_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dpd_cmd:1",
"causes the hardware to issue the deep power down command (Burst Terminate w/ cke low). While in DPD mode, the DRAM will not maintain data integrity. While CMD:ENABLED, the CKE pin is held deasserted. The CMD:ENABLED state will override the PIN:CKE setting. The DRAM will ignore all accesses until CMD:DISABLED.\n0 = DISABLED\n1 = ENABLED",
1, old_value_t.dpd_cmd, new_value_t.dpd_cmd };
m_bit_details_model.bits.append(entry);
entry = { "01: undefined_bits_1_29:29", "", 29, old_value_t.undefined_bits_1_29, new_value_t.undefined_bits_1_29 };
m_bit_details_model.bits.append(entry);
entry = { "30: dpd_dev_selectn:2",
"active low chip-select, 0x0 applies command to both devices, 0x2 to for only dev0, 0x1 for only dev1",
2, old_value_t.dpd_dev_selectn, new_value_t.dpd_dev_selectn };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "The DPD register allows SW to issue a deep power down command.\nCommand trigger: Deep Power Down";
}
#define MRW_OFFSET 0xE8
#define MRW_UNDEFMASK 0x3F00FF00
union mrw_u {
struct {
unsigned int mrw_op:8; /* data to be written */
unsigned int undefined_bits_8_15:8;
unsigned int mrw_ma:8; /* register address */
unsigned int undefined_bits_24_29:6;
unsigned int mrw_dev_selectn:2; /* active-low chip-select, 0x0 applies command to both devices, 0x2 to for only dev0, 0x1 for dev1 */
};
u_int32_t reg32;
};
void EmcDev::fill_mrw_details(const u_int32_t &value, const u_int32_t &new_value)
{
const mrw_u old_value_t = { .reg32 = value };
const mrw_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: mrw_op:8",
"data to be written",
8, old_value_t.mrw_op, new_value_t.mrw_op };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_15:8", "", 8, old_value_t.undefined_bits_8_15, new_value_t.undefined_bits_8_15 };
m_bit_details_model.bits.append(entry);
entry = { "16: mrw_ma:8",
"register address",
8, old_value_t.mrw_ma, new_value_t.mrw_ma };
m_bit_details_model.bits.append(entry);
entry = { "24: undefined_bits_24_29:6", "", 6, old_value_t.undefined_bits_24_29, new_value_t.undefined_bits_24_29 };
m_bit_details_model.bits.append(entry);
entry = { "30: mrw_dev_selectn:2",
"active-low chip-select, 0x0 applies command to both devices, 0x2 to for only dev0, 0x1 for dev1",
2, old_value_t.mrw_dev_selectn, new_value_t.mrw_dev_selectn };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "Mode Register Write: LPDDR2-only version of MRS/EMRS\nBoot requirements\nThis register triggers a mode register write command. Multiple mode-register writes may be required by the coldboot sequence. Such commands should be parameterized in the BCT and written by the BootROM during coldboot.\nCommand trigger: MRW";
}
#define MRR_OFFSET 0xEC
#define MRR_UNDEFMASK 0x3F000000
union mrr_u {
struct {
unsigned int mrr_data:16; /* data returned */
unsigned int mrr_ma:8; /* register address */
unsigned int undefined_bits_24_29:6;
unsigned int mrr_dev_selectn:2; /* active-low chip-select, choose which device to send the command to. (enum for safety). 0 = ILLEGAL 1 = DEV1 2 = DEV0 3 = RESERVED */
};
u_int32_t reg32;
};
void EmcDev::fill_mrr_details(const u_int32_t &value, const u_int32_t &new_value)
{
const mrr_u old_value_t = { .reg32 = value };
const mrr_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: mrr_data:16",
"data returned",
16, old_value_t.mrr_data, new_value_t.mrr_data };
m_bit_details_model.bits.append(entry);
entry = { "16: mrr_ma:8",
"register address",
8, old_value_t.mrr_ma, new_value_t.mrr_ma };
m_bit_details_model.bits.append(entry);
entry = { "24: undefined_bits_24_29:6", "", 6, old_value_t.undefined_bits_24_29, new_value_t.undefined_bits_24_29 };
m_bit_details_model.bits.append(entry);
entry = { "30: mrr_dev_selectn:2",
"active-low chip-select, choose which device to send the command to. (enum for safety).\n0 = ILLEGAL\n1 = DEV1\n2 = DEV0\n3 = RESERVED",
2, old_value_t.mrr_dev_selectn, new_value_t.mrr_dev_selectn };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "Mode Register Read: LPDDR2 only\nSequence\n1. read MRR until EMC_STATUS.MRR_DIVLD=0 (ok to skip if it is sure there is no pending MRR reads)\n2. write this register with the desired addr (MA) and device (DEV_SELECTN), device needs to be either DEV0 or DEV1: writing to both is illegal\n3. poll EMC_STATUS.MRR_DIVLD=1, or if using interrupt, wait for MRR_DIVLD_INT\n4. read back MRR. The value is in MRR_DATA field.\nNote: New MRR requests may be issued while there are on-going requests. e.g. to issue 3 MRR, follow these steps: 1,2,2,2,3,4,3,4,3,4. Data read back in step 4 are in the same order requested in step 2.\nTo make sure EMC is available for new MRR requests, poll for EMC_STATUS.MRR_FIFO_SPACE > 0 before step 2.\n If using 2 x16 DRAM, MRR_DATA[15:8] can be used to store MRR from 2nd DRAM on same CS (configured via CFG_2.MRR_BYTESEL_X16)\nCommand trigger: MRR";
}
#define FBIO_CFG1_OFFSET 0xF4
#define FBIO_CFG1_UNDEFMASK 0xFFFEFFFF
union fbio_cfg1_u {
struct {
unsigned int undefined_bits_0_15:16;
unsigned int cfg_den_early:1; /* determines whether the output enable is the same width as data (DEN_EARLY=0) or 1/2 bit time wider on either end (DEN_EARLY=1). 0 = DISABLE 1 = ENABLE */
unsigned int undefined_bits_17_31:15;
};
u_int32_t reg32;
};
void EmcDev::fill_fbio_cfg1_details(const u_int32_t &value, const u_int32_t &new_value)
{
const fbio_cfg1_u old_value_t = { .reg32 = value };
const fbio_cfg1_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: undefined_bits_0_15:16", "", 16, old_value_t.undefined_bits_0_15, new_value_t.undefined_bits_0_15 };
m_bit_details_model.bits.append(entry);
entry = { "16: cfg_den_early:1",
"determines whether the output enable is the same width as data (DEN_EARLY=0) or 1/2 bit time wider on either end (DEN_EARLY=1).\n0 = DISABLE\n1 = ENABLE",
1, old_value_t.cfg_den_early, new_value_t.cfg_den_early };
m_bit_details_model.bits.append(entry);
entry = { "17: undefined_bits_17_31:15", "", 15, old_value_t.undefined_bits_17_31, new_value_t.undefined_bits_17_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "The FBIO_CFG1 register controls the width of the DQ enable window when driving write data.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nFBIO Configuration Register";
}
#define FBIO_DQSIB_DLY_OFFSET 0xF8
#define FBIO_DQSIB_DLY_UNDEFMASK 0x00000000
union fbio_dqsib_dly_u {
struct {
unsigned int cfg_dqsib_dly_byte_0:8;
unsigned int cfg_dqsib_dly_byte_1:8;
unsigned int cfg_dqsib_dly_byte_2:8;
unsigned int cfg_dqsib_dly_byte_3:8;
};
u_int32_t reg32;
};
void EmcDev::fill_fbio_dqsib_dly_details(const u_int32_t &value, const u_int32_t &new_value)
{
const fbio_dqsib_dly_u old_value_t = { .reg32 = value };
const fbio_dqsib_dly_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: cfg_dqsib_dly_byte_0:8", "", 8, old_value_t.cfg_dqsib_dly_byte_0, new_value_t.cfg_dqsib_dly_byte_0 };
m_bit_details_model.bits.append(entry);
entry = { "08: cfg_dqsib_dly_byte_1:8", "", 8, old_value_t.cfg_dqsib_dly_byte_1, new_value_t.cfg_dqsib_dly_byte_1 };
m_bit_details_model.bits.append(entry);
entry = { "16: cfg_dqsib_dly_byte_2:8", "", 8, old_value_t.cfg_dqsib_dly_byte_2, new_value_t.cfg_dqsib_dly_byte_2 };
m_bit_details_model.bits.append(entry);
entry = { "24: cfg_dqsib_dly_byte_3:8", "", 8, old_value_t.cfg_dqsib_dly_byte_3, new_value_t.cfg_dqsib_dly_byte_3 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "The FBIO_DQSIB_DELAY register sets the trimmers for inbound dqs delay on each of the inbound byte lanes.\n This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nFBIO Configuration Register";
}
#define FBIO_DQSIB_DLY_MSB_OFFSET 0xFC
#define FBIO_DQSIB_DLY_MSB_UNDEFMASK 0xFCFCFCFC
union fbio_dqsib_dly_msb_u {
struct {
unsigned int cfg_dqsib_dly_msb_byte_0:2;
unsigned int undefined_bits_2_7:6;
unsigned int cfg_dqsib_dly_msb_byte_1:2;
unsigned int undefined_bits_10_15:6;
unsigned int cfg_dqsib_dly_msb_byte_2:2;
unsigned int undefined_bits_18_23:6;
unsigned int cfg_dqsib_dly_msb_byte_3:2;
unsigned int undefined_bits_26_31:6;
};
u_int32_t reg32;
};
void EmcDev::fill_fbio_dqsib_dly_msb_details(const u_int32_t &value, const u_int32_t &new_value)
{
const fbio_dqsib_dly_msb_u old_value_t = { .reg32 = value };
const fbio_dqsib_dly_msb_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: cfg_dqsib_dly_msb_byte_0:2", "", 2, old_value_t.cfg_dqsib_dly_msb_byte_0, new_value_t.cfg_dqsib_dly_msb_byte_0 };
m_bit_details_model.bits.append(entry);
entry = { "02: undefined_bits_2_7:6", "", 6, old_value_t.undefined_bits_2_7, new_value_t.undefined_bits_2_7 };
m_bit_details_model.bits.append(entry);
entry = { "08: cfg_dqsib_dly_msb_byte_1:2", "", 2, old_value_t.cfg_dqsib_dly_msb_byte_1, new_value_t.cfg_dqsib_dly_msb_byte_1 };
m_bit_details_model.bits.append(entry);
entry = { "10: undefined_bits_10_15:6", "", 6, old_value_t.undefined_bits_10_15, new_value_t.undefined_bits_10_15 };
m_bit_details_model.bits.append(entry);
entry = { "16: cfg_dqsib_dly_msb_byte_2:2", "", 2, old_value_t.cfg_dqsib_dly_msb_byte_2, new_value_t.cfg_dqsib_dly_msb_byte_2 };
m_bit_details_model.bits.append(entry);
entry = { "18: undefined_bits_18_23:6", "", 6, old_value_t.undefined_bits_18_23, new_value_t.undefined_bits_18_23 };
m_bit_details_model.bits.append(entry);
entry = { "24: cfg_dqsib_dly_msb_byte_3:2", "", 2, old_value_t.cfg_dqsib_dly_msb_byte_3, new_value_t.cfg_dqsib_dly_msb_byte_3 };
m_bit_details_model.bits.append(entry);
entry = { "26: undefined_bits_26_31:6", "", 6, old_value_t.undefined_bits_26_31, new_value_t.undefined_bits_26_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "FBIO_DQSIB_DLY_MSB contains the most-significant-bits of values in FBIO_DQSIB_DLY.\n This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nFBIO Configuration Register";
}
#define FBIO_CFG5_OFFSET 0x104
#define FBIO_CFG5_UNDEFMASK 0xFFFFF86C
union fbio_cfg5_u {
struct {
unsigned int dram_type:2; /* specifies which DRAM protocol to use for the attached device(s). 0 = RESERVED 1 = DDR1 2 = LPDDR2 3 = DDR2 */
unsigned int undefined_bits_2_3:2;
unsigned int dram_width:1; /* specifies whether the DRAM data-bus is 16-bits or 32-bits wide. 0 = X32 1 = X16 */
unsigned int undefined_bits_5_6:2;
unsigned int differential_dqs:1; /* enables differential signalling on dqs strobes (lpddr2/ddr2 options) 0 = DISABLED 1 = ENABLED */
unsigned int ctt_termination:1; /* enables CTT_TERMINATION mode in pads (ddr2 support) 0 = DISABLED 1 = ENABLED */
unsigned int dqs_pulld:1; /* enables pulldowns on dqs lines (and pullups on DQS_N if DIFFERENTIAL_DQS). 0 = DISABLED 1 = ENABLED */
unsigned int disable_concurrent_autopre:1;/* disables reads/writes to a device until the precharge command has been issued by the dram internally. 0 = DISABLED 1 = ENABLED */
unsigned int undefined_bits_11_31:21;
};
u_int32_t reg32;
};
void EmcDev::fill_fbio_cfg5_details(const u_int32_t &value, const u_int32_t &new_value)
{
const fbio_cfg5_u old_value_t = { .reg32 = value };
const fbio_cfg5_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dram_type:2",
"specifies which DRAM protocol to use for the attached device(s).\n0 = RESERVED\n1 = DDR1\n2 = LPDDR2\n3 = DDR2",
2, old_value_t.dram_type, new_value_t.dram_type };
m_bit_details_model.bits.append(entry);
entry = { "02: undefined_bits_2_3:2", "", 2, old_value_t.undefined_bits_2_3, new_value_t.undefined_bits_2_3 };
m_bit_details_model.bits.append(entry);
entry = { "04: dram_width:1",
"specifies whether the DRAM data-bus is 16-bits or 32-bits wide.\n0 = X32\n1 = X16",
1, old_value_t.dram_width, new_value_t.dram_width };
m_bit_details_model.bits.append(entry);
entry = { "05: undefined_bits_5_6:2", "", 2, old_value_t.undefined_bits_5_6, new_value_t.undefined_bits_5_6 };
m_bit_details_model.bits.append(entry);
entry = { "07: differential_dqs:1",
"enables differential signalling on dqs strobes (lpddr2/ddr2 options)\n0 = DISABLED\n1 = ENABLED",
1, old_value_t.differential_dqs, new_value_t.differential_dqs };
m_bit_details_model.bits.append(entry);
entry = { "08: ctt_termination:1",
"enables CTT_TERMINATION mode in pads (ddr2 support)\n0 = DISABLED\n1 = ENABLED",
1, old_value_t.ctt_termination, new_value_t.ctt_termination };
m_bit_details_model.bits.append(entry);
entry = { "09: dqs_pulld:1",
"enables pulldowns on dqs lines (and pullups on DQS_N if DIFFERENTIAL_DQS).\n0 = DISABLED\n1 = ENABLED",
1, old_value_t.dqs_pulld, new_value_t.dqs_pulld };
m_bit_details_model.bits.append(entry);
entry = { "10: disable_concurrent_autopre:1",
"disables reads/writes to a device until the precharge command has been issued by the dram internally.\n0 = DISABLED\n1 = ENABLED",
1, old_value_t.disable_concurrent_autopre, new_value_t.disable_concurrent_autopre };
m_bit_details_model.bits.append(entry);
entry = { "11: undefined_bits_11_31:21", "", 21, old_value_t.undefined_bits_11_31, new_value_t.undefined_bits_11_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "The FBIO_CFG5 register controls the FBIO I/O cells.\nThe following fields are shadowed: DIFFERENTIAL_DQS, CTT_TERMINATION, DQS_PULLD.\n Writes to these fields will not take effect until the active value is updated via TIMING_UPDATE or (if enabled) CLKCHANGE_REQ.\nBoot requirements\n * This register (except for field DISABLE_CONCURRENT_AUTOPRE) should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register (except for field DISABLE_CONCURRENT_AUTOPRE) should be saved in the scratch registers and restored by the BootROM during warmboot.\nFBIO Configuration Register";
}
#define FBIO_QUSE_DLY_OFFSET 0x10C
#define FBIO_QUSE_DLY_UNDEFMASK 0x00000000
union fbio_quse_dly_u {
struct {
unsigned int cfg_quse_dly_byte_0:8;
unsigned int cfg_quse_dly_byte_1:8;
unsigned int cfg_quse_dly_byte_2:8;
unsigned int cfg_quse_dly_byte_3:8;
};
u_int32_t reg32;
};
void EmcDev::fill_fbio_quse_dly_details(const u_int32_t &value, const u_int32_t &new_value)
{
const fbio_quse_dly_u old_value_t = { .reg32 = value };
const fbio_quse_dly_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: cfg_quse_dly_byte_0:8", "", 8, old_value_t.cfg_quse_dly_byte_0, new_value_t.cfg_quse_dly_byte_0 };
m_bit_details_model.bits.append(entry);
entry = { "08: cfg_quse_dly_byte_1:8", "", 8, old_value_t.cfg_quse_dly_byte_1, new_value_t.cfg_quse_dly_byte_1 };
m_bit_details_model.bits.append(entry);
entry = { "16: cfg_quse_dly_byte_2:8", "", 8, old_value_t.cfg_quse_dly_byte_2, new_value_t.cfg_quse_dly_byte_2 };
m_bit_details_model.bits.append(entry);
entry = { "24: cfg_quse_dly_byte_3:8", "", 8, old_value_t.cfg_quse_dly_byte_3, new_value_t.cfg_quse_dly_byte_3 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "QUSE_LATE and QUSE_DLY determine how much added delay fbio should add to the QUSE path. QUSE needs to align (approximately) with the incoming DQS (DDR1) in order to qualify it, since the incoming DQS/feedback clock is not always valid.\nDRAMC can position QUSE with m2clk granularity (2 bit times). For DDR1 only, QUSE_LATE provides finer granularity of 1/2 an m4clk cycle (1/2 bit time). The amount of delay we add will be primarily a function of the round trip wire delay to/from the DRAM. Other portions of the delay (driver and receiver delay) are compensated for by delay through a non-bonded QUSE pad cell.\nQUSE_DLY controls trimmers in each byte lane. This also allows for variation in the propagation delay from the \"common\" pad macro where the QUSE logic lives out to each of the 4 byte lanes.\nThis register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nFBIO Configuration Register";
}
#define FBIO_QUSE_DLY_MSB_OFFSET 0x110
#define FBIO_QUSE_DLY_MSB_UNDEFMASK 0xFCFCFCFC
union fbio_quse_dly_msb_u {
struct {
unsigned int cfg_quse_dly_msb_byte_0:2;
unsigned int undefined_bits_2_7:6;
unsigned int cfg_quse_dly_msb_byte_1:2;
unsigned int undefined_bits_10_15:6;
unsigned int cfg_quse_dly_msb_byte_2:2;
unsigned int undefined_bits_18_23:6;
unsigned int cfg_quse_dly_msb_byte_3:2;
unsigned int undefined_bits_26_31:6;
};
u_int32_t reg32;
};
void EmcDev::fill_fbio_quse_dly_msb_details(const u_int32_t &value, const u_int32_t &new_value)
{
const fbio_quse_dly_msb_u old_value_t = { .reg32 = value };
const fbio_quse_dly_msb_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: cfg_quse_dly_msb_byte_0:2", "", 2, old_value_t.cfg_quse_dly_msb_byte_0, new_value_t.cfg_quse_dly_msb_byte_0 };
m_bit_details_model.bits.append(entry);
entry = { "02: undefined_bits_2_7:6", "", 6, old_value_t.undefined_bits_2_7, new_value_t.undefined_bits_2_7 };
m_bit_details_model.bits.append(entry);
entry = { "08: cfg_quse_dly_msb_byte_1:2", "", 2, old_value_t.cfg_quse_dly_msb_byte_1, new_value_t.cfg_quse_dly_msb_byte_1 };
m_bit_details_model.bits.append(entry);
entry = { "10: undefined_bits_10_15:6", "", 6, old_value_t.undefined_bits_10_15, new_value_t.undefined_bits_10_15 };
m_bit_details_model.bits.append(entry);
entry = { "16: cfg_quse_dly_msb_byte_2:2", "", 2, old_value_t.cfg_quse_dly_msb_byte_2, new_value_t.cfg_quse_dly_msb_byte_2 };
m_bit_details_model.bits.append(entry);
entry = { "18: undefined_bits_18_23:6", "", 6, old_value_t.undefined_bits_18_23, new_value_t.undefined_bits_18_23 };
m_bit_details_model.bits.append(entry);
entry = { "24: cfg_quse_dly_msb_byte_3:2", "", 2, old_value_t.cfg_quse_dly_msb_byte_3, new_value_t.cfg_quse_dly_msb_byte_3 };
m_bit_details_model.bits.append(entry);
entry = { "26: undefined_bits_26_31:6", "", 6, old_value_t.undefined_bits_26_31, new_value_t.undefined_bits_26_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "FBIO_QUSE_DLY_MSB contains the most-significant-bits of values in FBIO_QUSE_DLY\nThis register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nFBIO Configuration Register";
}
#define FBIO_CFG6_OFFSET 0x114
#define FBIO_CFG6_UNDEFMASK 0xFFFFFFF8
union fbio_cfg6_u {
struct {
unsigned int cfg_quse_late:3;
unsigned int undefined_bits_3_31:29;
};
u_int32_t reg32;
};
void EmcDev::fill_fbio_cfg6_details(const u_int32_t &value, const u_int32_t &new_value)
{
const fbio_cfg6_u old_value_t = { .reg32 = value };
const fbio_cfg6_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: cfg_quse_late:3", "", 3, old_value_t.cfg_quse_late, new_value_t.cfg_quse_late };
m_bit_details_model.bits.append(entry);
entry = { "03: undefined_bits_3_31:29", "", 29, old_value_t.undefined_bits_3_31, new_value_t.undefined_bits_3_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "Boot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nFBIO Configuration Register";
}
#define DQS_TRIMMER_RD0_OFFSET 0x120
#define DQS_TRIMMER_RD0_UNDEFMASK 0xFC00FC00
union dqs_trimmer_rd0_u {
struct {
unsigned int quse_current_trim_val_byte_0:10;
unsigned int undefined_bits_10_15:6;
unsigned int dqs_current_trim_val_byte_0:10;
unsigned int undefined_bits_26_31:6;
};
u_int32_t reg32;
};
void EmcDev::fill_dqs_trimmer_rd0_details(const u_int32_t &value, const u_int32_t &new_value)
{
const dqs_trimmer_rd0_u old_value_t = { .reg32 = value };
const dqs_trimmer_rd0_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: quse_current_trim_val_byte_0:10", "", 10, old_value_t.quse_current_trim_val_byte_0, new_value_t.quse_current_trim_val_byte_0 };
m_bit_details_model.bits.append(entry);
entry = { "10: undefined_bits_10_15:6", "", 6, old_value_t.undefined_bits_10_15, new_value_t.undefined_bits_10_15 };
m_bit_details_model.bits.append(entry);
entry = { "16: dqs_current_trim_val_byte_0:10", "", 10, old_value_t.dqs_current_trim_val_byte_0, new_value_t.dqs_current_trim_val_byte_0 };
m_bit_details_model.bits.append(entry);
entry = { "26: undefined_bits_26_31:6", "", 6, old_value_t.undefined_bits_26_31, new_value_t.undefined_bits_26_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "The DQS_TRIMMER_RD registers provide a way to observe the values being used by the trimmers";
}
#define DQS_TRIMMER_RD1_OFFSET 0x124
#define DQS_TRIMMER_RD1_UNDEFMASK 0xFC00FC00
union dqs_trimmer_rd1_u {
struct {
unsigned int quse_current_trim_val_byte_1:10;
unsigned int undefined_bits_10_15:6;
unsigned int dqs_current_trim_val_byte_1:10;
unsigned int undefined_bits_26_31:6;
};
u_int32_t reg32;
};
void EmcDev::fill_dqs_trimmer_rd1_details(const u_int32_t &value, const u_int32_t &new_value)
{
const dqs_trimmer_rd1_u old_value_t = { .reg32 = value };
const dqs_trimmer_rd1_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: quse_current_trim_val_byte_1:10", "", 10, old_value_t.quse_current_trim_val_byte_1, new_value_t.quse_current_trim_val_byte_1 };
m_bit_details_model.bits.append(entry);
entry = { "10: undefined_bits_10_15:6", "", 6, old_value_t.undefined_bits_10_15, new_value_t.undefined_bits_10_15 };
m_bit_details_model.bits.append(entry);
entry = { "16: dqs_current_trim_val_byte_1:10", "", 10, old_value_t.dqs_current_trim_val_byte_1, new_value_t.dqs_current_trim_val_byte_1 };
m_bit_details_model.bits.append(entry);
entry = { "26: undefined_bits_26_31:6", "", 6, old_value_t.undefined_bits_26_31, new_value_t.undefined_bits_26_31 };
m_bit_details_model.bits.append(entry);
}
#define DQS_TRIMMER_RD2_OFFSET 0x128
#define DQS_TRIMMER_RD2_UNDEFMASK 0xFC00FC00
union dqs_trimmer_rd2_u {
struct {
unsigned int quse_current_trim_val_byte_2:10;
unsigned int undefined_bits_10_15:6;
unsigned int dqs_current_trim_val_byte_2:10;
unsigned int undefined_bits_26_31:6;
};
u_int32_t reg32;
};
void EmcDev::fill_dqs_trimmer_rd2_details(const u_int32_t &value, const u_int32_t &new_value)
{
const dqs_trimmer_rd2_u old_value_t = { .reg32 = value };
const dqs_trimmer_rd2_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: quse_current_trim_val_byte_2:10", "", 10, old_value_t.quse_current_trim_val_byte_2, new_value_t.quse_current_trim_val_byte_2 };
m_bit_details_model.bits.append(entry);
entry = { "10: undefined_bits_10_15:6", "", 6, old_value_t.undefined_bits_10_15, new_value_t.undefined_bits_10_15 };
m_bit_details_model.bits.append(entry);
entry = { "16: dqs_current_trim_val_byte_2:10", "", 10, old_value_t.dqs_current_trim_val_byte_2, new_value_t.dqs_current_trim_val_byte_2 };
m_bit_details_model.bits.append(entry);
entry = { "26: undefined_bits_26_31:6", "", 6, old_value_t.undefined_bits_26_31, new_value_t.undefined_bits_26_31 };
m_bit_details_model.bits.append(entry);
}
#define DQS_TRIMMER_RD3_OFFSET 0x12C
#define DQS_TRIMMER_RD3_UNDEFMASK 0xFC00FC00
union dqs_trimmer_rd3_u {
struct {
unsigned int quse_current_trim_val_byte_3:10;
unsigned int undefined_bits_10_15:6;
unsigned int dqs_current_trim_val_byte_3:10;
unsigned int undefined_bits_26_31:6;
};
u_int32_t reg32;
};
void EmcDev::fill_dqs_trimmer_rd3_details(const u_int32_t &value, const u_int32_t &new_value)
{
const dqs_trimmer_rd3_u old_value_t = { .reg32 = value };
const dqs_trimmer_rd3_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: quse_current_trim_val_byte_3:10", "", 10, old_value_t.quse_current_trim_val_byte_3, new_value_t.quse_current_trim_val_byte_3 };
m_bit_details_model.bits.append(entry);
entry = { "10: undefined_bits_10_15:6", "", 6, old_value_t.undefined_bits_10_15, new_value_t.undefined_bits_10_15 };
m_bit_details_model.bits.append(entry);
entry = { "16: dqs_current_trim_val_byte_3:10", "", 10, old_value_t.dqs_current_trim_val_byte_3, new_value_t.dqs_current_trim_val_byte_3 };
m_bit_details_model.bits.append(entry);
entry = { "26: undefined_bits_26_31:6", "", 6, old_value_t.undefined_bits_26_31, new_value_t.undefined_bits_26_31 };
m_bit_details_model.bits.append(entry);
}
#define LL_ARB_CONFIG_OFFSET 0x144
#define LL_ARB_CONFIG_UNDEFMASK 0xC0FF0EF0
union ll_arb_config_u {
struct {
unsigned int die_off_exp:4;
unsigned int undefined_bits_4_7:4;
unsigned int allow_idle_insert:1; /* 0 = DISABLED 1 = ENABLED */
unsigned int undefined_bits_9_11:3;
unsigned int max_ll_greed:4;
unsigned int undefined_bits_16_23:8;
unsigned int ll_greed_diff_bank_disable:1;/* set to one to get AP15 behavior */
unsigned int ll_greed_diff_bank_after_disable:1;/* set to one to get AP15 behavior */
unsigned int ll_force_insert_wr_disable:1;/* set to one to get AP15 behavior */
unsigned int ll_insert_diff_bank_before_disable:1;/* set to one to get AP15 behavior */
unsigned int ll_insert_diff_bank_after_toggle:1;/* set to one to get AP15 behavior */
unsigned int ll_insert_diff_bank_after_remove:1;/* set to zero to get AP15 behavior */
unsigned int undefined_bits_30_31:2;
};
u_int32_t reg32;
};
void EmcDev::fill_ll_arb_config_details(const u_int32_t &value, const u_int32_t &new_value)
{
const ll_arb_config_u old_value_t = { .reg32 = value };
const ll_arb_config_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: die_off_exp:4", "", 4, old_value_t.die_off_exp, new_value_t.die_off_exp };
m_bit_details_model.bits.append(entry);
entry = { "04: undefined_bits_4_7:4", "", 4, old_value_t.undefined_bits_4_7, new_value_t.undefined_bits_4_7 };
m_bit_details_model.bits.append(entry);
entry = { "08: allow_idle_insert:1",
"0 = DISABLED\n1 = ENABLED",
1, old_value_t.allow_idle_insert, new_value_t.allow_idle_insert };
m_bit_details_model.bits.append(entry);
entry = { "09: undefined_bits_9_11:3", "", 3, old_value_t.undefined_bits_9_11, new_value_t.undefined_bits_9_11 };
m_bit_details_model.bits.append(entry);
entry = { "12: max_ll_greed:4", "", 4, old_value_t.max_ll_greed, new_value_t.max_ll_greed };
m_bit_details_model.bits.append(entry);
entry = { "16: undefined_bits_16_23:8", "", 8, old_value_t.undefined_bits_16_23, new_value_t.undefined_bits_16_23 };
m_bit_details_model.bits.append(entry);
entry = { "24: ll_greed_diff_bank_disable:1",
"set to one to get AP15 behavior",
1, old_value_t.ll_greed_diff_bank_disable, new_value_t.ll_greed_diff_bank_disable };
m_bit_details_model.bits.append(entry);
entry = { "25: ll_greed_diff_bank_after_disable:1",
"set to one to get AP15 behavior",
1, old_value_t.ll_greed_diff_bank_after_disable, new_value_t.ll_greed_diff_bank_after_disable };
m_bit_details_model.bits.append(entry);
entry = { "26: ll_force_insert_wr_disable:1",
"set to one to get AP15 behavior",
1, old_value_t.ll_force_insert_wr_disable, new_value_t.ll_force_insert_wr_disable };
m_bit_details_model.bits.append(entry);
entry = { "27: ll_insert_diff_bank_before_disable:1",
"set to one to get AP15 behavior",
1, old_value_t.ll_insert_diff_bank_before_disable, new_value_t.ll_insert_diff_bank_before_disable };
m_bit_details_model.bits.append(entry);
entry = { "28: ll_insert_diff_bank_after_toggle:1",
"set to one to get AP15 behavior",
1, old_value_t.ll_insert_diff_bank_after_toggle, new_value_t.ll_insert_diff_bank_after_toggle };
m_bit_details_model.bits.append(entry);
entry = { "29: ll_insert_diff_bank_after_remove:1",
"set to zero to get AP15 behavior",
1, old_value_t.ll_insert_diff_bank_after_remove, new_value_t.ll_insert_diff_bank_after_remove };
m_bit_details_model.bits.append(entry);
entry = { "30: undefined_bits_30_31:2", "", 2, old_value_t.undefined_bits_30_31, new_value_t.undefined_bits_30_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "Configuration of arbiter between regular MC path and low-latency path.\nDIE_OFF_EXP: Exponent of the die-off factor, which is used to calculate the average load of the regular data transaction path. Valid values are from 0 to 8. The die-off factor is calculated as 1 / (2^DIE_OFF_EXP).\n0: Only the last transaction is used to calculated the load\n8: minimal exponential die-off factor of 1/256\nALLOW_IDLE_INSERT: If enabled, arbiter would allow a low-latency request when the MC<=>EMC path is idle. If disabled, the low-latency request would wait till the insertion delay programed.\nMAX_LL_GREED: Specify the maximum number of consecutive 256-bit transactions the low-latency path is allowed to perform. The amount of transactions is not only limited by this number: transactions also have to be in the same page and in the same direction as the previous one.\nFor streaming read and write operations, where this is the most useful, transactions will switch page every 64 bytes, due to the location of the bank bits in the address. The greed counter has a granularity of 32 bytes, so in practise, the only practically useful numbers are 1 and 2.\nIn addition to allowing scheduling a consecutive transaction, the greed counter also guarantees that autopc will be issued at the end of the programmed number of consecutive writes.\nPotential values:\n0: 1 transaction executed at a time. When the next transaction (already in FIFO) is to the same page, autopc will not be set.\n1: 1 transaction executed at a time. Autopc will always be issued.\n2: 2 transactions can be executed, if they go to the same page. Autopc is issued at the end of the 2nd transaction or after the first one if there is no second transaction.\n3 and higher: Same as 2, but for more transactions. In practice, this will not happen since the address mapping is such that bank changes after 2 transactions.\nBoot requirements\n * This arbitration configuration register should be parameterized in the BCT and written by the OS during coldboot and warmboot.\nLOW-LATENCY Arbiter Configuration";
}
#define T_MIN_CRITICAL_HP_OFFSET 0x148
#define T_MIN_CRITICAL_HP_UNDEFMASK 0x00000000
union t_min_critical_hp_u {
struct {
unsigned int t_min_crit_hp_0:8;
unsigned int t_min_crit_hp_1:8;
unsigned int t_min_crit_hp_2:8;
unsigned int t_min_crit_hp_3:8;
};
u_int32_t reg32;
};
void EmcDev::fill_t_min_critical_hp_details(const u_int32_t &value, const u_int32_t &new_value)
{
const t_min_critical_hp_u old_value_t = { .reg32 = value };
const t_min_critical_hp_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: t_min_crit_hp_0:8", "", 8, old_value_t.t_min_crit_hp_0, new_value_t.t_min_crit_hp_0 };
m_bit_details_model.bits.append(entry);
entry = { "08: t_min_crit_hp_1:8", "", 8, old_value_t.t_min_crit_hp_1, new_value_t.t_min_crit_hp_1 };
m_bit_details_model.bits.append(entry);
entry = { "16: t_min_crit_hp_2:8", "", 8, old_value_t.t_min_crit_hp_2, new_value_t.t_min_crit_hp_2 };
m_bit_details_model.bits.append(entry);
entry = { "24: t_min_crit_hp_3:8", "", 8, old_value_t.t_min_crit_hp_3, new_value_t.t_min_crit_hp_3 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "Configuration table with low-latency insertion delay based on the criticality level inside the MC. Agents inside the MC that can indicate critical status. Depending on the number of agents that are currently in critical status, a minimum value can be programmed before which a low-latency transfer is allowed.\n There are 4 levels for high priority: 0, 1, 2, 3_or_more\nBoot requirements\n * This arbitration configuration register should be parameterized in the BCT and written by the OS during coldboot and warmboot.\nLOW-LATENCY Arbiter Configuration";
}
#define T_MIN_CRITICAL_TIMEOUT_OFFSET 0x14C
#define T_MIN_CRITICAL_TIMEOUT_UNDEFMASK 0x00000000
union t_min_critical_timeout_u {
struct {
unsigned int t_min_crit_timeout_0:8;
unsigned int t_min_crit_timeout_1:8;
unsigned int t_min_crit_timeout_2:8;
unsigned int t_min_crit_timeout_3:8;
};
u_int32_t reg32;
};
void EmcDev::fill_t_min_critical_timeout_details(const u_int32_t &value, const u_int32_t &new_value)
{
const t_min_critical_timeout_u old_value_t = { .reg32 = value };
const t_min_critical_timeout_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: t_min_crit_timeout_0:8", "", 8, old_value_t.t_min_crit_timeout_0, new_value_t.t_min_crit_timeout_0 };
m_bit_details_model.bits.append(entry);
entry = { "08: t_min_crit_timeout_1:8", "", 8, old_value_t.t_min_crit_timeout_1, new_value_t.t_min_crit_timeout_1 };
m_bit_details_model.bits.append(entry);
entry = { "16: t_min_crit_timeout_2:8", "", 8, old_value_t.t_min_crit_timeout_2, new_value_t.t_min_crit_timeout_2 };
m_bit_details_model.bits.append(entry);
entry = { "24: t_min_crit_timeout_3:8", "", 8, old_value_t.t_min_crit_timeout_3, new_value_t.t_min_crit_timeout_3 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "There are 4 levels for timeout: 0, 1, 2, 3_or_more\nBoot requirements\n * This arbitration configuration register should be parameterized in the BCT and written by the OS during coldboot and warmboot.\nLOW-LATENCY Arbiter Configuration";
}
#define T_MIN_LOAD_OFFSET 0x150
#define T_MIN_LOAD_UNDEFMASK 0x00000000
union t_min_load_u {
struct {
unsigned int t_min_load_0:8;
unsigned int t_min_load_1:8;
unsigned int t_min_load_2:8;
unsigned int t_min_load_3:8;
};
u_int32_t reg32;
};
void EmcDev::fill_t_min_load_details(const u_int32_t &value, const u_int32_t &new_value)
{
const t_min_load_u old_value_t = { .reg32 = value };
const t_min_load_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: t_min_load_0:8", "", 8, old_value_t.t_min_load_0, new_value_t.t_min_load_0 };
m_bit_details_model.bits.append(entry);
entry = { "08: t_min_load_1:8", "", 8, old_value_t.t_min_load_1, new_value_t.t_min_load_1 };
m_bit_details_model.bits.append(entry);
entry = { "16: t_min_load_2:8", "", 8, old_value_t.t_min_load_2, new_value_t.t_min_load_2 };
m_bit_details_model.bits.append(entry);
entry = { "24: t_min_load_3:8", "", 8, old_value_t.t_min_load_3, new_value_t.t_min_load_3 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "There are 4 level of (time averaged) load. For each of those levels, a different minimum low-latency hold-off value can be programmed.\nBoot requirements\n * This arbitration configuration register should be parameterized in the BCT and written by the OS during coldboot and warmboot.\nLOW-LATENCY Arbiter Configuration";
}
#define T_MAX_CRITICAL_HP_OFFSET 0x154
#define T_MAX_CRITICAL_HP_UNDEFMASK 0x00000000
union t_max_critical_hp_u {
struct {
unsigned int t_max_crit_hp_0:8;
unsigned int t_max_crit_hp_1:8;
unsigned int t_max_crit_hp_2:8;
unsigned int t_max_crit_hp_3:8;
};
u_int32_t reg32;
};
void EmcDev::fill_t_max_critical_hp_details(const u_int32_t &value, const u_int32_t &new_value)
{
const t_max_critical_hp_u old_value_t = { .reg32 = value };
const t_max_critical_hp_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: t_max_crit_hp_0:8", "", 8, old_value_t.t_max_crit_hp_0, new_value_t.t_max_crit_hp_0 };
m_bit_details_model.bits.append(entry);
entry = { "08: t_max_crit_hp_1:8", "", 8, old_value_t.t_max_crit_hp_1, new_value_t.t_max_crit_hp_1 };
m_bit_details_model.bits.append(entry);
entry = { "16: t_max_crit_hp_2:8", "", 8, old_value_t.t_max_crit_hp_2, new_value_t.t_max_crit_hp_2 };
m_bit_details_model.bits.append(entry);
entry = { "24: t_max_crit_hp_3:8", "", 8, old_value_t.t_max_crit_hp_3, new_value_t.t_max_crit_hp_3 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "Maximum hold-off time for a given criticality in the MC.\nBoot requirements\n * This arbitration configuration register should be parameterized in the BCT and written by the OS during coldboot and warmboot.\nLOW-LATENCY Arbiter Configuration";
}
#define T_MAX_CRITICAL_TIMEOUT_OFFSET 0x158
#define T_MAX_CRITICAL_TIMEOUT_UNDEFMASK 0x00000000
union t_max_critical_timeout_u {
struct {
unsigned int t_max_crit_timeout_0:8;
unsigned int t_max_crit_timeout_1:8;
unsigned int t_max_crit_timeout_2:8;
unsigned int t_max_crit_timeout_3:8;
};
u_int32_t reg32;
};
void EmcDev::fill_t_max_critical_timeout_details(const u_int32_t &value, const u_int32_t &new_value)
{
const t_max_critical_timeout_u old_value_t = { .reg32 = value };
const t_max_critical_timeout_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: t_max_crit_timeout_0:8", "", 8, old_value_t.t_max_crit_timeout_0, new_value_t.t_max_crit_timeout_0 };
m_bit_details_model.bits.append(entry);
entry = { "08: t_max_crit_timeout_1:8", "", 8, old_value_t.t_max_crit_timeout_1, new_value_t.t_max_crit_timeout_1 };
m_bit_details_model.bits.append(entry);
entry = { "16: t_max_crit_timeout_2:8", "", 8, old_value_t.t_max_crit_timeout_2, new_value_t.t_max_crit_timeout_2 };
m_bit_details_model.bits.append(entry);
entry = { "24: t_max_crit_timeout_3:8", "", 8, old_value_t.t_max_crit_timeout_3, new_value_t.t_max_crit_timeout_3 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "Boot requirements\n * This arbitration configuration register should be parameterized in the BCT and written by the OS during coldboot and warmboot.\nLOW-LATENCY Arbiter Configuration";
}
#define T_MAX_LOAD_OFFSET 0x15C
#define T_MAX_LOAD_UNDEFMASK 0x00000000
union t_max_load_u {
struct {
unsigned int t_max_load_0:8;
unsigned int t_max_load_1:8;
unsigned int t_max_load_2:8;
unsigned int t_max_load_3:8;
};
u_int32_t reg32;
};
void EmcDev::fill_t_max_load_details(const u_int32_t &value, const u_int32_t &new_value)
{
const t_max_load_u old_value_t = { .reg32 = value };
const t_max_load_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: t_max_load_0:8", "", 8, old_value_t.t_max_load_0, new_value_t.t_max_load_0 };
m_bit_details_model.bits.append(entry);
entry = { "08: t_max_load_1:8", "", 8, old_value_t.t_max_load_1, new_value_t.t_max_load_1 };
m_bit_details_model.bits.append(entry);
entry = { "16: t_max_load_2:8", "", 8, old_value_t.t_max_load_2, new_value_t.t_max_load_2 };
m_bit_details_model.bits.append(entry);
entry = { "24: t_max_load_3:8", "", 8, old_value_t.t_max_load_3, new_value_t.t_max_load_3 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "Maximum load dependent hold-off time\nBoot requirements\n * This arbitration configuration register should be parameterized in the BCT and written by the OS during coldboot and warmboot.\nLOW-LATENCY Arbiter Configuration";
}
#define AUTO_CAL_CONFIG_OFFSET 0x2A4
#define AUTO_CAL_CONFIG_UNDEFMASK 0x0C00E0E0
union auto_cal_config_u {
struct {
unsigned int auto_cal_pu_offset:5; /* 2's complement offset for pull-up value */
unsigned int undefined_bits_5_7:3;
unsigned int auto_cal_pd_offset:5; /* 2's complement offset for pull-down value */
unsigned int undefined_bits_13_15:3;
unsigned int auto_cal_step:10; /* Auto Cal calibration step interval (in emc clocks) - the default is set for 1.0us calibration step at 166MHz */
unsigned int undefined_bits_26_27:2;
unsigned int autocal_slw_override:1;/* 0 (Normal operation) pad DRVDN/UP_SLWR/F tied to AUTO_CAL output DRDVDN/UP_SLWR/F[3:0] = AUTO_CAL_PULLDOWN/UP[4:1] 1 (override) use CFG2TMC_*_DRVDN/UP_SLWR/F pins to control pad slew inputs */
unsigned int auto_cal_enable:1; /* 1 (normal operation): use EMC generated pullup/dn (override or autocal) 0 (disabled): use cfg2tmc_xm2* register settings for pullup/dn 0 = DISABLED 1 = ENABLED */
unsigned int auto_cal_override:1; /* 0 (normal operation): use AUTO_CAL_PU/PD_OFFSET as an offset to the calibration tate machine setting 1 (override) : use AUTO_CAL_PU/PD_OFFSET register values directly */
unsigned int auto_cal_start:1; /* Writing a one to this bit starts the calibration state machine. This bit must be set even if the override is set in order to latch in the override value */
};
u_int32_t reg32;
};
void EmcDev::fill_auto_cal_config_details(const u_int32_t &value, const u_int32_t &new_value)
{
const auto_cal_config_u old_value_t = { .reg32 = value };
const auto_cal_config_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: auto_cal_pu_offset:5",
"2's complement offset for pull-up value",
5, old_value_t.auto_cal_pu_offset, new_value_t.auto_cal_pu_offset };
m_bit_details_model.bits.append(entry);
entry = { "05: undefined_bits_5_7:3", "", 3, old_value_t.undefined_bits_5_7, new_value_t.undefined_bits_5_7 };
m_bit_details_model.bits.append(entry);
entry = { "08: auto_cal_pd_offset:5",
"2's complement offset for pull-down value",
5, old_value_t.auto_cal_pd_offset, new_value_t.auto_cal_pd_offset };
m_bit_details_model.bits.append(entry);
entry = { "13: undefined_bits_13_15:3", "", 3, old_value_t.undefined_bits_13_15, new_value_t.undefined_bits_13_15 };
m_bit_details_model.bits.append(entry);
entry = { "16: auto_cal_step:10",
"Auto Cal calibration step interval (in emc clocks) - the default is set for 1.0us calibration step at 166MHz",
10, old_value_t.auto_cal_step, new_value_t.auto_cal_step };
m_bit_details_model.bits.append(entry);
entry = { "26: undefined_bits_26_27:2", "", 2, old_value_t.undefined_bits_26_27, new_value_t.undefined_bits_26_27 };
m_bit_details_model.bits.append(entry);
entry = { "28: autocal_slw_override:1",
"0 (Normal operation) pad DRVDN/UP_SLWR/F tied to AUTO_CAL output DRDVDN/UP_SLWR/F[3:0] = AUTO_CAL_PULLDOWN/UP[4:1] 1 (override) use CFG2TMC_*_DRVDN/UP_SLWR/F pins to control pad slew inputs",
1, old_value_t.autocal_slw_override, new_value_t.autocal_slw_override };
m_bit_details_model.bits.append(entry);
entry = { "29: auto_cal_enable:1",
"1 (normal operation): use EMC generated pullup/dn (override or autocal) 0 (disabled): use cfg2tmc_xm2* register settings for pullup/dn\n0 = DISABLED\n1 = ENABLED",
1, old_value_t.auto_cal_enable, new_value_t.auto_cal_enable };
m_bit_details_model.bits.append(entry);
entry = { "30: auto_cal_override:1",
"0 (normal operation): use AUTO_CAL_PU/PD_OFFSET as an offset to the calibration tate machine setting 1 (override) : use AUTO_CAL_PU/PD_OFFSET register values directly",
1, old_value_t.auto_cal_override, new_value_t.auto_cal_override };
m_bit_details_model.bits.append(entry);
entry = { "31: auto_cal_start:1",
"Writing a one to this bit starts the calibration state machine. This bit must be set even if the override is set in order to latch in the override value",
1, old_value_t.auto_cal_start, new_value_t.auto_cal_start };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "Boot requirements\n * This register (except for AUTOCAL_SLW_OVERRIDE and AUTO_CAL_START(trigger)) should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register (except for AUTOCAL_SLW_OVERRIDE and AUTO_CAL_START(trigger)) should be saved in the scratch registers and restored by the BootROM during warmboot.\nAuto-calibration Settings for EMC Pads";
}
#define AUTO_CAL_INTERVAL_OFFSET 0x2A8
#define AUTO_CAL_INTERVAL_UNDEFMASK 0xF0000000
union auto_cal_interval_u {
struct {
unsigned int auto_cal_interval:28; /* 0: do calibration once Otherwise, auto-calibration occurs at intervals equivalent to the programmed number of cycles */
unsigned int undefined_bits_28_31:4;
};
u_int32_t reg32;
};
void EmcDev::fill_auto_cal_interval_details(const u_int32_t &value, const u_int32_t &new_value)
{
const auto_cal_interval_u old_value_t = { .reg32 = value };
const auto_cal_interval_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: auto_cal_interval:28",
"0: do calibration once Otherwise, auto-calibration occurs at intervals equivalent to the programmed number of cycles",
28, old_value_t.auto_cal_interval, new_value_t.auto_cal_interval };
m_bit_details_model.bits.append(entry);
entry = { "28: undefined_bits_28_31:4", "", 4, old_value_t.undefined_bits_28_31, new_value_t.undefined_bits_28_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "Boot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nEMC Pad Calibration Interval";
}
#define AUTO_CAL_STATUS_OFFSET 0x2AC
#define AUTO_CAL_STATUS_UNDEFMASK 0x60E0E0E0
union auto_cal_status_u {
struct {
unsigned int auto_cal_pullup:5; /* Pullup code generated by auto-calibration */
unsigned int undefined_bits_5_7:3;
unsigned int auto_cal_pulldown:5; /* Pulldown code generated by auto-calibration */
unsigned int undefined_bits_13_15:3;
unsigned int auto_cal_pullup_adj:5; /* Pullup code sent to pads */
unsigned int undefined_bits_21_23:3;
unsigned int auto_cal_pulldown_adj:5;/* Pulldown code sent to pads */
unsigned int undefined_bits_29_30:2;
unsigned int auto_cal_active:1; /* One when auto calibrate is active - valid only after auto calibrate sequence has completed (EMC_CAL_ACTIVE == 0) */
};
u_int32_t reg32;
};
void EmcDev::fill_auto_cal_status_details(const u_int32_t &value, const u_int32_t &new_value)
{
const auto_cal_status_u old_value_t = { .reg32 = value };
const auto_cal_status_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: auto_cal_pullup:5",
"Pullup code generated by auto-calibration",
5, old_value_t.auto_cal_pullup, new_value_t.auto_cal_pullup };
m_bit_details_model.bits.append(entry);
entry = { "05: undefined_bits_5_7:3", "", 3, old_value_t.undefined_bits_5_7, new_value_t.undefined_bits_5_7 };
m_bit_details_model.bits.append(entry);
entry = { "08: auto_cal_pulldown:5",
"Pulldown code generated by auto-calibration",
5, old_value_t.auto_cal_pulldown, new_value_t.auto_cal_pulldown };
m_bit_details_model.bits.append(entry);
entry = { "13: undefined_bits_13_15:3", "", 3, old_value_t.undefined_bits_13_15, new_value_t.undefined_bits_13_15 };
m_bit_details_model.bits.append(entry);
entry = { "16: auto_cal_pullup_adj:5",
"Pullup code sent to pads",
5, old_value_t.auto_cal_pullup_adj, new_value_t.auto_cal_pullup_adj };
m_bit_details_model.bits.append(entry);
entry = { "21: undefined_bits_21_23:3", "", 3, old_value_t.undefined_bits_21_23, new_value_t.undefined_bits_21_23 };
m_bit_details_model.bits.append(entry);
entry = { "24: auto_cal_pulldown_adj:5",
"Pulldown code sent to pads",
5, old_value_t.auto_cal_pulldown_adj, new_value_t.auto_cal_pulldown_adj };
m_bit_details_model.bits.append(entry);
entry = { "29: undefined_bits_29_30:2", "", 2, old_value_t.undefined_bits_29_30, new_value_t.undefined_bits_29_30 };
m_bit_details_model.bits.append(entry);
entry = { "31: auto_cal_active:1",
"One when auto calibrate is active - valid only after auto calibrate sequence has completed (EMC_CAL_ACTIVE == 0)",
1, old_value_t.auto_cal_active, new_value_t.auto_cal_active };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "EMC pad calibration status";
}
#define REQ_CTRL_OFFSET 0x2B0
#define REQ_CTRL_UNDEFMASK 0xFFFFFFFC
union req_ctrl_u {
struct {
unsigned int stall_all_reads:1; /* Stall incoming read transactions (1st non-LL read will stall all transactions) */
unsigned int stall_all_writes:1; /* Stall incoming write transactions */
unsigned int undefined_bits_2_31:30;
};
u_int32_t reg32;
};
void EmcDev::fill_req_ctrl_details(const u_int32_t &value, const u_int32_t &new_value)
{
const req_ctrl_u old_value_t = { .reg32 = value };
const req_ctrl_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: stall_all_reads:1",
"Stall incoming read transactions (1st non-LL read will stall all transactions)",
1, old_value_t.stall_all_reads, new_value_t.stall_all_reads };
m_bit_details_model.bits.append(entry);
entry = { "01: stall_all_writes:1",
"Stall incoming write transactions",
1, old_value_t.stall_all_writes, new_value_t.stall_all_writes };
m_bit_details_model.bits.append(entry);
entry = { "02: undefined_bits_2_31:30", "", 30, old_value_t.undefined_bits_2_31, new_value_t.undefined_bits_2_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "Request status/control";
}
#define EMC_STATUS_OFFSET 0x2B4
#define EMC_STATUS_UNDEFMASK 0xFFE0CCC8
union emc_status_u {
struct {
unsigned int emc_req_fifo_empty:1; /* Request fifo is empty */
unsigned int emc_ll_req_fifo_empty:1;/* LL Request fifo is empty */
unsigned int no_outstanding_transactions:1;/* All non-stalled requests have completed */
unsigned int undefined_bit_3:1;
unsigned int dram_in_powerdown:2; /* dev[n] has entered powerdown state (incoming req's will awaken if not stalled) */
unsigned int undefined_bits_6_7:2;
unsigned int dram_in_self_refresh:2;/* dev[n] has been put into self-refresh (will remain until SR exit cmd) */
unsigned int undefined_bits_10_11:2;
unsigned int dram_in_dpd:2; /* dev[n] has been put into deep powerdown state */
unsigned int undefined_bits_14_15:2;
unsigned int mrr_fifo_space:4; /* mrr fifospace available */
unsigned int mrr_divld:1; /* mrr data available for reading */
unsigned int undefined_bits_21_31:11;
};
u_int32_t reg32;
};
void EmcDev::fill_emc_status_details(const u_int32_t &value, const u_int32_t &new_value)
{
const emc_status_u old_value_t = { .reg32 = value };
const emc_status_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: emc_req_fifo_empty:1",
"Request fifo is empty",
1, old_value_t.emc_req_fifo_empty, new_value_t.emc_req_fifo_empty };
m_bit_details_model.bits.append(entry);
entry = { "01: emc_ll_req_fifo_empty:1",
"LL Request fifo is empty",
1, old_value_t.emc_ll_req_fifo_empty, new_value_t.emc_ll_req_fifo_empty };
m_bit_details_model.bits.append(entry);
entry = { "02: no_outstanding_transactions:1",
"All non-stalled requests have completed",
1, old_value_t.no_outstanding_transactions, new_value_t.no_outstanding_transactions };
m_bit_details_model.bits.append(entry);
entry = { "03: undefined_bit_3:1", "", 1, old_value_t.undefined_bit_3, new_value_t.undefined_bit_3 };
m_bit_details_model.bits.append(entry);
entry = { "04: dram_in_powerdown:2",
"dev[n] has entered powerdown state (incoming req's will awaken if not stalled)",
2, old_value_t.dram_in_powerdown, new_value_t.dram_in_powerdown };
m_bit_details_model.bits.append(entry);
entry = { "06: undefined_bits_6_7:2", "", 2, old_value_t.undefined_bits_6_7, new_value_t.undefined_bits_6_7 };
m_bit_details_model.bits.append(entry);
entry = { "08: dram_in_self_refresh:2",
"dev[n] has been put into self-refresh (will remain until SR exit cmd)",
2, old_value_t.dram_in_self_refresh, new_value_t.dram_in_self_refresh };
m_bit_details_model.bits.append(entry);
entry = { "10: undefined_bits_10_11:2", "", 2, old_value_t.undefined_bits_10_11, new_value_t.undefined_bits_10_11 };
m_bit_details_model.bits.append(entry);
entry = { "12: dram_in_dpd:2",
"dev[n] has been put into deep powerdown state",
2, old_value_t.dram_in_dpd, new_value_t.dram_in_dpd };
m_bit_details_model.bits.append(entry);
entry = { "14: undefined_bits_14_15:2", "", 2, old_value_t.undefined_bits_14_15, new_value_t.undefined_bits_14_15 };
m_bit_details_model.bits.append(entry);
entry = { "16: mrr_fifo_space:4",
"mrr fifospace available",
4, old_value_t.mrr_fifo_space, new_value_t.mrr_fifo_space };
m_bit_details_model.bits.append(entry);
entry = { "20: mrr_divld:1",
"mrr data available for reading",
1, old_value_t.mrr_divld, new_value_t.mrr_divld };
m_bit_details_model.bits.append(entry);
entry = { "21: undefined_bits_21_31:11", "", 11, old_value_t.undefined_bits_21_31, new_value_t.undefined_bits_21_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "DRAM_IN_POWERDOWN, DRAM_IN_SELF_REFRESH, DRAM_IN_DPD: active high signal indicating current DRAM status for each of these modes, w/ 1 status bit per device, bit[0] = dev0 status, bit[1] = dev1 status.\nExample: DRAM_IN_SELF_REFRESH = 0x3, both devices are in self-refresh, DRAM_IN_DPD= 0x2 would indicate only dev1 is in deep-power-down mode. NOTE: If EMC is reset or powered down, the actual DRAM state could be different than indicated by these status bits. These bits do not reflect manually entered/exited powerdown or self-refresh (via use of PIN_CKE).\nEMC State-Machine Status";
}
#define CFG_2_OFFSET 0x2B8
#define CFG_2_UNDEFMASK 0x7FCCF8F8
union cfg_2_u {
struct {
unsigned int clkchange_req_enable:1;/* allows EMC and CAR to handshake on PLL divider/source changes. 0 = DISABLED 1 = ENABLED */
unsigned int clkchange_pd_enable:1; /* Forces dram into power-down during CLKCHANGE. 0 = DISABLED 1 = ENABLED */
unsigned int clkchange_sr_enable:1; /* Forces dram into self-refresh during CLKCHANGE. Takes precedent over CLKCHANGE_PD_ENABLE if both are set. 0 = DISABLED 1 = ENABLED */
unsigned int undefined_bits_3_7:5;
unsigned int pin_config:2; /* Remaps address/command pins for LPDDR_POP ball-out otherwise uses standard LPDDR2 pin configuration. 0 = LPDDR2; 1 = LPDDR_POP 2 = RESERVED */
unsigned int use_addr_clk:1; /* Used to select source for DRAM clock. If enabled, xm2_addr_mclk pins instead of xm2_mclk. the former is located adjacent to addr pins used in lpddr2 (for lower clk to addr skew). If disabled, xm2_addr_mclk will be disabled & xm2_mclk will output DRAM clock (required for LPDDR_POP). 0 = DISABLED 1 = ENABLED */
unsigned int undefined_bits_11_15:5;
unsigned int mrr_bytesel:2; /* Indicates which AP bytelane is connected to DRAM byte 0 (over which MRR data is returned) */
unsigned int undefined_bits_18_19:2;
unsigned int mrr_bytesel_x16:2; /* If using 2 X16 DRAM on a single CS to form 32-bit wide data, indicates which bytelane 2nd DRAM's byte 0 is connected to */
unsigned int undefined_bits_22_30:9;
unsigned int dramc_pre_b4_act:1; /* CYA bit, gives priority to activates over precharges, determining which (precharge/activate) is processed first if both are pending and unblocked. 0 = DISABLED 1 = ENABLED */
};
u_int32_t reg32;
};
void EmcDev::fill_cfg_2_details(const u_int32_t &value, const u_int32_t &new_value)
{
const cfg_2_u old_value_t = { .reg32 = value };
const cfg_2_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: clkchange_req_enable:1",
"allows EMC and CAR to handshake on PLL divider/source changes.\n0 = DISABLED\n1 = ENABLED",
1, old_value_t.clkchange_req_enable, new_value_t.clkchange_req_enable };
m_bit_details_model.bits.append(entry);
entry = { "01: clkchange_pd_enable:1",
"Forces dram into power-down during CLKCHANGE.\n0 = DISABLED\n1 = ENABLED",
1, old_value_t.clkchange_pd_enable, new_value_t.clkchange_pd_enable };
m_bit_details_model.bits.append(entry);
entry = { "02: clkchange_sr_enable:1",
"Forces dram into self-refresh during CLKCHANGE. Takes precedent over CLKCHANGE_PD_ENABLE if both are set.\n0 = DISABLED\n1 = ENABLED",
1, old_value_t.clkchange_sr_enable, new_value_t.clkchange_sr_enable };
m_bit_details_model.bits.append(entry);
entry = { "03: undefined_bits_3_7:5", "", 5, old_value_t.undefined_bits_3_7, new_value_t.undefined_bits_3_7 };
m_bit_details_model.bits.append(entry);
entry = { "08: pin_config:2",
"Remaps address/command pins for LPDDR_POP ball-out otherwise uses standard LPDDR2 pin configuration.\n0 = LPDDR2;\n1 = LPDDR_POP\n2 = RESERVED",
2, old_value_t.pin_config, new_value_t.pin_config };
m_bit_details_model.bits.append(entry);
entry = { "10: use_addr_clk:1",
"Used to select source for DRAM clock. If enabled, xm2_addr_mclk pins instead of xm2_mclk. the former is located adjacent to addr pins used in lpddr2 (for lower clk to addr skew). If disabled, xm2_addr_mclk will be disabled & xm2_mclk will output DRAM clock (required for LPDDR_POP).\n0 = DISABLED\n1 = ENABLED",
1, old_value_t.use_addr_clk, new_value_t.use_addr_clk };
m_bit_details_model.bits.append(entry);
entry = { "11: undefined_bits_11_15:5", "", 5, old_value_t.undefined_bits_11_15, new_value_t.undefined_bits_11_15 };
m_bit_details_model.bits.append(entry);
entry = { "16: mrr_bytesel:2",
"Indicates which AP bytelane is connected to DRAM byte 0 (over which MRR data is returned)",
2, old_value_t.mrr_bytesel, new_value_t.mrr_bytesel };
m_bit_details_model.bits.append(entry);
entry = { "18: undefined_bits_18_19:2", "", 2, old_value_t.undefined_bits_18_19, new_value_t.undefined_bits_18_19 };
m_bit_details_model.bits.append(entry);
entry = { "20: mrr_bytesel_x16:2",
"If using 2 X16 DRAM on a single CS to form 32-bit wide data, indicates which bytelane 2nd DRAM's byte 0 is connected to",
2, old_value_t.mrr_bytesel_x16, new_value_t.mrr_bytesel_x16 };
m_bit_details_model.bits.append(entry);
entry = { "22: undefined_bits_22_30:9", "", 9, old_value_t.undefined_bits_22_30, new_value_t.undefined_bits_22_30 };
m_bit_details_model.bits.append(entry);
entry = { "31: dramc_pre_b4_act:1",
"CYA bit, gives priority to activates over precharges, determining which (precharge/activate) is processed first if both are pending and unblocked.\n0 = DISABLED\n1 = ENABLED",
1, old_value_t.dramc_pre_b4_act, new_value_t.dramc_pre_b4_act };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "Clock change sequencing: Once the divider is reprogrammed, CAR signals to EMC that a clock change is pending. If enabled, EMC stalls incoming requests, drains outstanding requests, and, if CLKCHANGE_(PD|SR)_ENABLE is enabled, puts DRAM into powerdown (or self-refresh) before signalling to CAR that it is idle and ready for the change to happen.\nCAR will then change the divider/pll reprogramming. Once complete, EMC updates its shadow registers (assuming they may have been reprogrammed for new clock setting), unstalls requests, and resumes operation with new clock settings.\nBoot requirements\n * This register (except for fields DRAMC_PRE_B4_ACT, MRR_BYTESEL_X16, MRR_BYTESEL) should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register (except for fields DRAMC_PRE_B4_ACT, MRR_BYTESEL_X16, MRR_BYTESEL) should be saved in the scratch registers and restored by the BootROM during warmboot.\n * If the OS needs the MRR_BYTESEL* fields set to non-default values to perform a mode-register read, it needs to correctly program these values before performing the MRR.\nEMC Configuration";
}
#define CFG_DIG_DLL_OFFSET 0x2BC
#define CFG_DIG_DLL_UNDEFMASK 0x0400F000
union cfg_dig_dll_u {
struct {
unsigned int cfg_dll_en:1; /* Enable digital DLL's. 0 = DISABLED 1 = ENABLED */
unsigned int cfg_dli_trimmer_en:1; /* Enable DL trimmer cells (embedded in pads). 0 = DISABLED 1 = ENABLED */
unsigned int cfg_dll_override_en:1; /* Override DLL's DLI output w/ OVERRIDE_VAL (still uses mult/offset). 0 = DISABLED 1 = ENABLED */
unsigned int cfg_use_single_dll:1; /* Turn off upper DLL & use lower dll output to drive all trimmers. 0 = DISABLED 1 = ENABLED */
unsigned int cfg_perbyte_trimmer_override:1;/* Set trimmer values directly for each byte via FBIO_QUSE_DLY/FBIO_DQS_DLY & FBIO_QUSE_DLY_MSB/FBIO_DQS_DLY_MSB. 0 = DISABLED 1 = ENABLED */
unsigned int cfg_dll_lowspeed:1; /* Enable DLL for use w/ lowspeed EMCCLK operation (<200MHz) */
unsigned int cfg_dll_mode:2; /* Controls how frequently DLL runs, as follows 0 = RUN_CONTINUOUS : DLL will run continuously (only disabled during reads). This option will consume the most power. 1 = RUN_TIL_LOCK : after DLL_RESET is set, DLL will run until it has locked, then be disabled 2 = RUN_PERIODIC : DLL will be re-enabled w/ each refresh to make sure LOCK is maintained; 3 = RESERVED */
unsigned int cfg_dll_udset:4; /* DLL Loop filter control (2^(udset+3)) */
unsigned int undefined_bits_12_15:4;
unsigned int cfg_dll_override_val:10;/* Value to use in place of DLI output if CFG_DLL_OVERRIDE_EN is set */
unsigned int undefined_bit_26:1;
unsigned int cfg_dll_alarm_disable:1;/* CYA bit -- disable override of DLL logic when DLL_ALM is set (otherwise overrides DLI to 0x3FF) */
unsigned int cfg_dll_lock_limit:2; /* CYA in case DLL has problems locking. DLL will be treated as locked after LIMIT emcclk cycles. Counter is reset w/ DLL_RESET (from above) or w/ each periodic update (if using RUN_PERIODIC). Settings are: 00: LIMIT = 2^12 01: LIMIT = 2^15 10: LIMIT = 2^16 11: LIMIT = 2^16 + 2^17 */
unsigned int dll_reset:1; /* Writing 1 to this register will send reset pulse to DLL's on next shadow update. Must reset DLL's when changing clock frequency by factor >= 2 */
unsigned int cfg_dll_use_override_until_lock:1;/* Writing 1 to this register causes override_val to be used in place of DLL output until DLL_LOCK is obtained. Takes effect on next shadow update */
};
u_int32_t reg32;
};
void EmcDev::fill_cfg_dig_dll_details(const u_int32_t &value, const u_int32_t &new_value)
{
const cfg_dig_dll_u old_value_t = { .reg32 = value };
const cfg_dig_dll_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: cfg_dll_en:1",
"Enable digital DLL's.\n0 = DISABLED\n1 = ENABLED",
1, old_value_t.cfg_dll_en, new_value_t.cfg_dll_en };
m_bit_details_model.bits.append(entry);
entry = { "01: cfg_dli_trimmer_en:1",
"Enable DL trimmer cells (embedded in pads).\n0 = DISABLED\n1 = ENABLED",
1, old_value_t.cfg_dli_trimmer_en, new_value_t.cfg_dli_trimmer_en };
m_bit_details_model.bits.append(entry);
entry = { "02: cfg_dll_override_en:1",
"Override DLL's DLI output w/ OVERRIDE_VAL (still uses mult/offset).\n0 = DISABLED\n1 = ENABLED",
1, old_value_t.cfg_dll_override_en, new_value_t.cfg_dll_override_en };
m_bit_details_model.bits.append(entry);
entry = { "03: cfg_use_single_dll:1",
"Turn off upper DLL & use lower dll output to drive all trimmers.\n0 = DISABLED\n1 = ENABLED",
1, old_value_t.cfg_use_single_dll, new_value_t.cfg_use_single_dll };
m_bit_details_model.bits.append(entry);
entry = { "04: cfg_perbyte_trimmer_override:1",
"Set trimmer values directly for each byte via FBIO_QUSE_DLY/FBIO_DQS_DLY & FBIO_QUSE_DLY_MSB/FBIO_DQS_DLY_MSB.\n0 = DISABLED\n1 = ENABLED",
1, old_value_t.cfg_perbyte_trimmer_override, new_value_t.cfg_perbyte_trimmer_override };
m_bit_details_model.bits.append(entry);
entry = { "05: cfg_dll_lowspeed:1",
"Enable DLL for use w/ lowspeed EMCCLK operation (<200MHz)",
1, old_value_t.cfg_dll_lowspeed, new_value_t.cfg_dll_lowspeed };
m_bit_details_model.bits.append(entry);
entry = { "06: cfg_dll_mode:2",
"Controls how frequently DLL runs, as follows\n0 = RUN_CONTINUOUS : DLL will run continuously (only disabled during reads). This option will consume the most power.\n1 = RUN_TIL_LOCK : after DLL_RESET is set, DLL will run until it has locked, then be disabled \n2 = RUN_PERIODIC : DLL will be re-enabled w/ each refresh to make sure LOCK is maintained;\n3 = RESERVED",
2, old_value_t.cfg_dll_mode, new_value_t.cfg_dll_mode };
m_bit_details_model.bits.append(entry);
entry = { "08: cfg_dll_udset:4",
"DLL Loop filter control (2^(udset+3))",
4, old_value_t.cfg_dll_udset, new_value_t.cfg_dll_udset };
m_bit_details_model.bits.append(entry);
entry = { "12: undefined_bits_12_15:4", "", 4, old_value_t.undefined_bits_12_15, new_value_t.undefined_bits_12_15 };
m_bit_details_model.bits.append(entry);
entry = { "16: cfg_dll_override_val:10",
"Value to use in place of DLI output if CFG_DLL_OVERRIDE_EN is set",
10, old_value_t.cfg_dll_override_val, new_value_t.cfg_dll_override_val };
m_bit_details_model.bits.append(entry);
entry = { "26: undefined_bit_26:1", "", 1, old_value_t.undefined_bit_26, new_value_t.undefined_bit_26 };
m_bit_details_model.bits.append(entry);
entry = { "27: cfg_dll_alarm_disable:1",
"CYA bit -- disable override of DLL logic when DLL_ALM is set (otherwise overrides DLI to 0x3FF)",
1, old_value_t.cfg_dll_alarm_disable, new_value_t.cfg_dll_alarm_disable };
m_bit_details_model.bits.append(entry);
entry = { "28: cfg_dll_lock_limit:2",
"CYA in case DLL has problems locking. DLL will be treated as locked after LIMIT emcclk cycles. Counter is reset w/ DLL_RESET (from above) or w/ each periodic update (if using RUN_PERIODIC). Settings are: 00: LIMIT = 2^12 01: LIMIT = 2^15 10: LIMIT = 2^16 11: LIMIT = 2^16 + 2^17",
2, old_value_t.cfg_dll_lock_limit, new_value_t.cfg_dll_lock_limit };
m_bit_details_model.bits.append(entry);
entry = { "30: dll_reset:1",
"Writing 1 to this register will send reset pulse to DLL's on next shadow update. Must reset DLL's when changing clock frequency by factor >= 2",
1, old_value_t.dll_reset, new_value_t.dll_reset };
m_bit_details_model.bits.append(entry);
entry = { "31: cfg_dll_use_override_until_lock:1",
"Writing 1 to this register causes override_val to be used in place of DLL output until DLL_LOCK is obtained. Takes effect on next shadow update",
1, old_value_t.cfg_dll_use_override_until_lock, new_value_t.cfg_dll_use_override_until_lock };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "Controls for digital DLL's, which used to measure and maintain 1/4 cycle phase adjustment for RDQS strobes.\nThis register is shadowed.\nBoot requirements\n * This register (except for field CFG_DLL_ALARM_DISABLE and DLL_RESET(trigger) and CFG_DLL_USE_OVERRIDE_UNTIL_LOCK(trigger)) should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register (except for field CFG_DLL_ALARM_DISABLE and DLL_RESET(trigger) and CFG_DLL_USE_OVERRIDE_UNTIL_LOCK(trigger)) should be saved in the scratch registers and restored by the BootROM during warmboot.\nConfigure Digital DLL";
}
#define DLL_XFORM_DQS_OFFSET 0x2C0
#define DLL_XFORM_DQS_UNDEFMASK 0xFF8000E0
union dll_xform_dqs_u {
struct {
unsigned int xform_dqs_mult:5;
unsigned int undefined_bits_5_7:3;
unsigned int xform_dqs_offs:15;
unsigned int undefined_bits_23_31:9;
};
u_int32_t reg32;
};
void EmcDev::fill_dll_xform_dqs_details(const u_int32_t &value, const u_int32_t &new_value)
{
const dll_xform_dqs_u old_value_t = { .reg32 = value };
const dll_xform_dqs_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: xform_dqs_mult:5", "", 5, old_value_t.xform_dqs_mult, new_value_t.xform_dqs_mult };
m_bit_details_model.bits.append(entry);
entry = { "05: undefined_bits_5_7:3", "", 3, old_value_t.undefined_bits_5_7, new_value_t.undefined_bits_5_7 };
m_bit_details_model.bits.append(entry);
entry = { "08: xform_dqs_offs:15", "", 15, old_value_t.xform_dqs_offs, new_value_t.xform_dqs_offs };
m_bit_details_model.bits.append(entry);
entry = { "23: undefined_bits_23_31:9", "", 9, old_value_t.undefined_bits_23_31, new_value_t.undefined_bits_23_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "XFORM_DQS_MULT and XFORM_DQS_OFFS are a multiplier and offset, respectively that can be used to modify the dll output.\n Final products may be read out in DQS_TRIMMER_RD register. Default is multiply by 1, to keep DLL's 1/4 cycle delay. Integer + fractional formats for multiplier & offset:\n OFFS is 2's complement format, w/ bit [4] representing integer\n The output of the XFORM is xform_out = (xform_in * MULT + OFFS)/ 16\n Largest allowed MULT = 0x17\n In the case of overflow, output is clamped according to these rules:\n out >= 0x600, xform_out = 0x000\n 0x600 > out >= 0x400, xform_out = 0x3ff\n That means clamping works within 50% above the maximum (0x3ff) dll output or 50% below the minimum (0) dll output.\nTo make sure that is always satisfied, conservatively program OFFS so that 0x6000 < OFFS < (0x5fff - MULT * 0x3ff)\nThis register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nConfigure Digital DLL";
}
#define DLL_XFORM_QUSE_OFFSET 0x2C4
#define DLL_XFORM_QUSE_UNDEFMASK 0xFF8000E0
union dll_xform_quse_u {
struct {
unsigned int xform_quse_mult:5;
unsigned int undefined_bits_5_7:3;
unsigned int xform_quse_offs:15;
unsigned int undefined_bits_23_31:9;
};
u_int32_t reg32;
};
void EmcDev::fill_dll_xform_quse_details(const u_int32_t &value, const u_int32_t &new_value)
{
const dll_xform_quse_u old_value_t = { .reg32 = value };
const dll_xform_quse_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: xform_quse_mult:5", "", 5, old_value_t.xform_quse_mult, new_value_t.xform_quse_mult };
m_bit_details_model.bits.append(entry);
entry = { "05: undefined_bits_5_7:3", "", 3, old_value_t.undefined_bits_5_7, new_value_t.undefined_bits_5_7 };
m_bit_details_model.bits.append(entry);
entry = { "08: xform_quse_offs:15", "", 15, old_value_t.xform_quse_offs, new_value_t.xform_quse_offs };
m_bit_details_model.bits.append(entry);
entry = { "23: undefined_bits_23_31:9", "", 9, old_value_t.undefined_bits_23_31, new_value_t.undefined_bits_23_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "XFORM_QUSE_MULT and XFORM_QUSE_OFFS are a multiplier and offset, respectively that can be used to modify the dll output. Final product may be read out in DQS_TRIMMER_RD register. Default is multiply by 1/2, to give 1/8 cycle delay.\n OFFS is 2's complement format, w/ bit [4] representing integer\n The output of the XFORM is xform_out = (xform_in * MULT + OFFS)/ 16\n Largest allowed MULT = 0x17\n In the case of overflow, output is clamped according to these rules:\n out >= 0x600, xform_out = 0x000\n 0x600 > out >= 0x400, xform_out = 0x3ff\nThat means clamping works within 50% above the maximum (0x3ff) dll output or 50% below the minimum (0) dll output.\nTo make sure that is always satisfied, conservatively program OFFS so that 0x6000 < OFFS < (0x5fff - MULT * 0x3ff)\nThis register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nConfigure Digital DLL";
}
#define DIG_DLL_UPPER_STATUS_OFFSET 0x2C8
#define DIG_DLL_UPPER_STATUS_UNDEFMASK 0xFFFF1C00
union dig_dll_upper_status_u {
struct {
unsigned int dll_upper_out:10;
unsigned int undefined_bits_10_12:3;
unsigned int dll_upper_lock_timeout:1;
unsigned int dll_upper_alarm:1;
unsigned int dll_upper_lock:1;
unsigned int undefined_bits_16_31:16;
};
u_int32_t reg32;
};
void EmcDev::fill_dig_dll_upper_status_details(const u_int32_t &value, const u_int32_t &new_value)
{
const dig_dll_upper_status_u old_value_t = { .reg32 = value };
const dig_dll_upper_status_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dll_upper_out:10", "", 10, old_value_t.dll_upper_out, new_value_t.dll_upper_out };
m_bit_details_model.bits.append(entry);
entry = { "10: undefined_bits_10_12:3", "", 3, old_value_t.undefined_bits_10_12, new_value_t.undefined_bits_10_12 };
m_bit_details_model.bits.append(entry);
entry = { "13: dll_upper_lock_timeout:1", "", 1, old_value_t.dll_upper_lock_timeout, new_value_t.dll_upper_lock_timeout };
m_bit_details_model.bits.append(entry);
entry = { "14: dll_upper_alarm:1", "", 1, old_value_t.dll_upper_alarm, new_value_t.dll_upper_alarm };
m_bit_details_model.bits.append(entry);
entry = { "15: dll_upper_lock:1", "", 1, old_value_t.dll_upper_lock, new_value_t.dll_upper_lock };
m_bit_details_model.bits.append(entry);
entry = { "16: undefined_bits_16_31:16", "", 16, old_value_t.undefined_bits_16_31, new_value_t.undefined_bits_16_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "Digital DLL Status bits directly from DLL\nDigital DLL Status";
}
#define DIG_DLL_LOWER_STATUS_OFFSET 0x2CC
#define DIG_DLL_LOWER_STATUS_UNDEFMASK 0xFFFF1C00
union dig_dll_lower_status_u {
struct {
unsigned int dll_lower_out:10;
unsigned int undefined_bits_10_12:3;
unsigned int dll_lower_lock_timeout:1;
unsigned int dll_lower_alarm:1;
unsigned int dll_lower_lock:1;
unsigned int undefined_bits_16_31:16;
};
u_int32_t reg32;
};
void EmcDev::fill_dig_dll_lower_status_details(const u_int32_t &value, const u_int32_t &new_value)
{
const dig_dll_lower_status_u old_value_t = { .reg32 = value };
const dig_dll_lower_status_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dll_lower_out:10", "", 10, old_value_t.dll_lower_out, new_value_t.dll_lower_out };
m_bit_details_model.bits.append(entry);
entry = { "10: undefined_bits_10_12:3", "", 3, old_value_t.undefined_bits_10_12, new_value_t.undefined_bits_10_12 };
m_bit_details_model.bits.append(entry);
entry = { "13: dll_lower_lock_timeout:1", "", 1, old_value_t.dll_lower_lock_timeout, new_value_t.dll_lower_lock_timeout };
m_bit_details_model.bits.append(entry);
entry = { "14: dll_lower_alarm:1", "", 1, old_value_t.dll_lower_alarm, new_value_t.dll_lower_alarm };
m_bit_details_model.bits.append(entry);
entry = { "15: dll_lower_lock:1", "", 1, old_value_t.dll_lower_lock, new_value_t.dll_lower_lock };
m_bit_details_model.bits.append(entry);
entry = { "16: undefined_bits_16_31:16", "", 16, old_value_t.undefined_bits_16_31, new_value_t.undefined_bits_16_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "Digital DLL Status";
}
#define CTT_TERM_CTRL_OFFSET 0x2DC
#define CTT_TERM_CTRL_UNDEFMASK 0x60F060F8
union ctt_term_ctrl_u {
struct {
unsigned int term_slope:3; /* */
unsigned int undefined_bits_3_7:5;
unsigned int term_offset:5; /* */
unsigned int undefined_bits_13_14:2;
unsigned int term_drvdn:5;
unsigned int undefined_bits_20_23:4;
unsigned int term_drvup:5;
unsigned int undefined_bits_29_30:2;
unsigned int term_override:1; /* 0 = DISABLED 1 = ENABLED */
};
u_int32_t reg32;
};
void EmcDev::fill_ctt_term_ctrl_details(const u_int32_t &value, const u_int32_t &new_value)
{
const ctt_term_ctrl_u old_value_t = { .reg32 = value };
const ctt_term_ctrl_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: term_slope:3",
"",
3, old_value_t.term_slope, new_value_t.term_slope };
m_bit_details_model.bits.append(entry);
entry = { "03: undefined_bits_3_7:5", "", 5, old_value_t.undefined_bits_3_7, new_value_t.undefined_bits_3_7 };
m_bit_details_model.bits.append(entry);
entry = { "08: term_offset:5",
"",
5, old_value_t.term_offset, new_value_t.term_offset };
m_bit_details_model.bits.append(entry);
entry = { "13: undefined_bits_13_14:2", "", 2, old_value_t.undefined_bits_13_14, new_value_t.undefined_bits_13_14 };
m_bit_details_model.bits.append(entry);
entry = { "15: term_drvdn:5", "", 5, old_value_t.term_drvdn, new_value_t.term_drvdn };
m_bit_details_model.bits.append(entry);
entry = { "20: undefined_bits_20_23:4", "", 4, old_value_t.undefined_bits_20_23, new_value_t.undefined_bits_20_23 };
m_bit_details_model.bits.append(entry);
entry = { "24: term_drvup:5", "", 5, old_value_t.term_drvup, new_value_t.term_drvup };
m_bit_details_model.bits.append(entry);
entry = { "29: undefined_bits_29_30:2", "", 2, old_value_t.undefined_bits_29_30, new_value_t.undefined_bits_29_30 };
m_bit_details_model.bits.append(entry);
entry = { "31: term_override:1",
"0 = DISABLED\n1 = ENABLED",
1, old_value_t.term_override, new_value_t.term_override };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "If CTT_TERMINATION is enabled this controls the strength of the output drivers.\nTERM_OVERRIDE forces use of CFG2TMC_CFG*_DRVDN_TERM, CFG2TMC_CFG*_DRVUP_TERM instead (arapb_misc_gp register) of using of AUTO_CAL DRVDN/DRVUP values w/ the following equation applied:\n TERM_DRDN = (AUTO_CAL_DRVDN * TERM_SLOPE) / 4 + TERM_OFFSET\n TERM_DRUP = (AUTO_CAL_DRVUP * TERM_SLOPE) / 4 + TERM_OFFSET\nRecommended values for SLOPE/OFFSET\n 100ohm CTT: TERM_SLOPE = 0x1, TERM_OFFSET = 0x4\n 50ohm CTT: TERM_SLOPE = 0x2, TERM_OFFSET = 0x8\nNote: setting slope = 0 allows TERM_DRDN/DRVUP = TERM_OFFSET setting slope > 2 is not supported\nBoot requirements\n * This register (except for fields TERM_DRVDN and TERM_DRVUP) should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register (except for fields TERM_DRVDN and TERM_DRVUP) should be saved in the scratch registers and restored by the BootROM during warmboot.\nConfigure CTT termination output drive strength";
}
#define ZCAL_REF_CNT_OFFSET 0x2E0
#define ZCAL_REF_CNT_UNDEFMASK 0xFF000000
union zcal_ref_cnt_u {
struct {
unsigned int zcal_ref_interval:24; /* Number of refreshes to wait between issuance of ZCAL_MRW_CMD. If 0, ZCAL is disabled and internal counter will be reset */
unsigned int undefined_bits_24_31:8;
};
u_int32_t reg32;
};
void EmcDev::fill_zcal_ref_cnt_details(const u_int32_t &value, const u_int32_t &new_value)
{
const zcal_ref_cnt_u old_value_t = { .reg32 = value };
const zcal_ref_cnt_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: zcal_ref_interval:24",
"Number of refreshes to wait between issuance of ZCAL_MRW_CMD. If 0, ZCAL is disabled and internal counter will be reset",
24, old_value_t.zcal_ref_interval, new_value_t.zcal_ref_interval };
m_bit_details_model.bits.append(entry);
entry = { "24: undefined_bits_24_31:8", "", 8, old_value_t.undefined_bits_24_31, new_value_t.undefined_bits_24_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nConfigure ZQ Calibration";
}
#define ZCAL_WAIT_CNT_OFFSET 0x2E4
#define ZCAL_WAIT_CNT_UNDEFMASK 0xFFFFFF00
union zcal_wait_cnt_u {
struct {
unsigned int zcal_wait_cnt:8; /* Number of emc clocks to wait before issuing any commands after sending ZCAL_MRW_CMD */
unsigned int undefined_bits_8_31:24;
};
u_int32_t reg32;
};
void EmcDev::fill_zcal_wait_cnt_details(const u_int32_t &value, const u_int32_t &new_value)
{
const zcal_wait_cnt_u old_value_t = { .reg32 = value };
const zcal_wait_cnt_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: zcal_wait_cnt:8",
"Number of emc clocks to wait before issuing any commands after sending ZCAL_MRW_CMD",
8, old_value_t.zcal_wait_cnt, new_value_t.zcal_wait_cnt };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_31:24", "", 24, old_value_t.undefined_bits_8_31, new_value_t.undefined_bits_8_31 };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nConfigure ZQ Calibration";
}
#define ZCAL_MRW_CMD_OFFSET 0x2E8
#define ZCAL_MRW_CMD_UNDEFMASK 0x3F00FF00
union zcal_mrw_cmd_u {
struct {
unsigned int zq_mrw_op:8; /* MRW OP field to be sent after ZCAL_REF_CNT */
unsigned int undefined_bits_8_15:8;
unsigned int zq_mrw_ma:8; /* MRW MA field to be sent after ZCAL_REF_CNT */
unsigned int undefined_bits_24_29:6;
unsigned int zq_mrw_dev_selectn:2; /* active-low chip-select, 0x0 applies command to both devices (will happen 1 at a time), 0x2 to for only dev0, 0x1 for dev1 */
};
u_int32_t reg32;
};
void EmcDev::fill_zcal_mrw_cmd_details(const u_int32_t &value, const u_int32_t &new_value)
{
const zcal_mrw_cmd_u old_value_t = { .reg32 = value };
const zcal_mrw_cmd_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: zq_mrw_op:8",
"MRW OP field to be sent after ZCAL_REF_CNT",
8, old_value_t.zq_mrw_op, new_value_t.zq_mrw_op };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_15:8", "", 8, old_value_t.undefined_bits_8_15, new_value_t.undefined_bits_8_15 };
m_bit_details_model.bits.append(entry);
entry = { "16: zq_mrw_ma:8",
"MRW MA field to be sent after ZCAL_REF_CNT",
8, old_value_t.zq_mrw_ma, new_value_t.zq_mrw_ma };
m_bit_details_model.bits.append(entry);
entry = { "24: undefined_bits_24_29:6", "", 6, old_value_t.undefined_bits_24_29, new_value_t.undefined_bits_24_29 };
m_bit_details_model.bits.append(entry);
entry = { "30: zq_mrw_dev_selectn:2",
"active-low chip-select, 0x0 applies command to both devices (will happen 1 at a time), 0x2 to for only dev0, 0x1 for dev1",
2, old_value_t.zq_mrw_dev_selectn, new_value_t.zq_mrw_dev_selectn };
m_bit_details_model.bits.append(entry);
m_bit_details_model.desc = "This register is shadowed.\nBoot requirements\n * This register should be parameterized in the BCT and written by the BootROM during coldboot.\n * This register should be saved in the scratch registers and restored by the BootROM during warmboot.\nConfigure ZQ Calibration";
}
#define CMDQ_OFFSET 0xF0
#define CMDQ_UNDEFMASK 0xE0FF88E0
union cmdq_u {
struct {
unsigned int rw_depth:5;
unsigned int undefined_bits_5_7:3;
unsigned int act_depth:3;
unsigned int undefined_bit_11:1;
unsigned int pre_depth:3;
unsigned int undefined_bits_15_23:9;
unsigned int rw_wd_depth:5;
unsigned int undefined_bits_29_31:3;
};
u_int32_t reg32;
};
void EmcDev::fill_cmdq_details(const u_int32_t &value, const u_int32_t &new_value)
{
const cmdq_u old_value_t = { .reg32 = value };
const cmdq_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: rw_depth:5", "", 5, old_value_t.rw_depth, new_value_t.rw_depth };
m_bit_details_model.bits.append(entry);
entry = { "05: undefined_bits_5_7:3", "", 3, old_value_t.undefined_bits_5_7, new_value_t.undefined_bits_5_7 };
m_bit_details_model.bits.append(entry);
entry = { "08: act_depth:3", "", 3, old_value_t.act_depth, new_value_t.act_depth };
m_bit_details_model.bits.append(entry);
entry = { "11: undefined_bit_11:1", "", 1, old_value_t.undefined_bit_11, new_value_t.undefined_bit_11 };
m_bit_details_model.bits.append(entry);
entry = { "12: pre_depth:3", "", 3, old_value_t.pre_depth, new_value_t.pre_depth };
m_bit_details_model.bits.append(entry);
entry = { "15: undefined_bits_15_23:9", "", 9, old_value_t.undefined_bits_15_23, new_value_t.undefined_bits_15_23 };
m_bit_details_model.bits.append(entry);
entry = { "24: rw_wd_depth:5", "", 5, old_value_t.rw_wd_depth, new_value_t.rw_wd_depth };
m_bit_details_model.bits.append(entry);
entry = { "29: undefined_bits_29_31:3", "", 3, old_value_t.undefined_bits_29_31, new_value_t.undefined_bits_29_31 };
m_bit_details_model.bits.append(entry);
}
#define FBIO_SPARE_OFFSET 0x100
#define FBIO_SPARE_UNDEFMASK 0x00000000
union fbio_spare_u {
struct {
unsigned int cfg_fbio_spare:32;
};
u_int32_t reg32;
};
void EmcDev::fill_fbio_spare_details(const u_int32_t &value, const u_int32_t &new_value)
{
const fbio_spare_u old_value_t = { .reg32 = value };
const fbio_spare_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: cfg_fbio_spare:32", "", 32, old_value_t.cfg_fbio_spare, new_value_t.cfg_fbio_spare };
m_bit_details_model.bits.append(entry);
}
#define FBIO_WRPTR_EQ_2_OFFSET 0x108
#define FBIO_WRPTR_EQ_2_UNDEFMASK 0xFFFFFFF0
union fbio_wrptr_eq_2_u {
struct {
unsigned int fb_wrptr_eq_2:4;
unsigned int undefined_bits_4_31:28;
};
u_int32_t reg32;
};
void EmcDev::fill_fbio_wrptr_eq_2_details(const u_int32_t &value, const u_int32_t &new_value)
{
const fbio_wrptr_eq_2_u old_value_t = { .reg32 = value };
const fbio_wrptr_eq_2_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: fb_wrptr_eq_2:4", "", 4, old_value_t.fb_wrptr_eq_2, new_value_t.fb_wrptr_eq_2 };
m_bit_details_model.bits.append(entry);
entry = { "04: undefined_bits_4_31:28", "", 28, old_value_t.undefined_bits_4_31, new_value_t.undefined_bits_4_31 };
m_bit_details_model.bits.append(entry);
}
#define CLKEN_OVERRIDE_OFFSET 0x140
#define CLKEN_OVERRIDE_UNDEFMASK 0xFFFFFF80
union emc_clken_override_u {
struct {
unsigned int arb_clken_ovr:1;
unsigned int cmdq_clken_ovr:1;
unsigned int dramc_clken_ovr:1;
unsigned int rr_clken_ovr:1;
unsigned int ll_clken_ovr:1;
unsigned int llstats_clken_ovr:1;
unsigned int stats_clken_ovr:1;
unsigned int undefined_bits_7_31:25;
};
u_int32_t reg32;
};
void EmcDev::fill_clken_override_details(const u_int32_t &value, const u_int32_t &new_value)
{
const emc_clken_override_u old_value_t = { .reg32 = value };
const emc_clken_override_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: arb_clken_ovr:1", "", 1, old_value_t.arb_clken_ovr, new_value_t.arb_clken_ovr };
m_bit_details_model.bits.append(entry);
entry = { "01: cmdq_clken_ovr:1", "", 1, old_value_t.cmdq_clken_ovr, new_value_t.cmdq_clken_ovr };
m_bit_details_model.bits.append(entry);
entry = { "02: dramc_clken_ovr:1", "", 1, old_value_t.dramc_clken_ovr, new_value_t.dramc_clken_ovr };
m_bit_details_model.bits.append(entry);
entry = { "03: rr_clken_ovr:1", "", 1, old_value_t.rr_clken_ovr, new_value_t.rr_clken_ovr };
m_bit_details_model.bits.append(entry);
entry = { "04: ll_clken_ovr:1", "", 1, old_value_t.ll_clken_ovr, new_value_t.ll_clken_ovr };
m_bit_details_model.bits.append(entry);
entry = { "05: llstats_clken_ovr:1", "", 1, old_value_t.llstats_clken_ovr, new_value_t.llstats_clken_ovr };
m_bit_details_model.bits.append(entry);
entry = { "06: stats_clken_ovr:1", "", 1, old_value_t.stats_clken_ovr, new_value_t.stats_clken_ovr };
m_bit_details_model.bits.append(entry);
entry = { "07: undefined_bits_7_31:25", "", 25, old_value_t.undefined_bits_7_31, new_value_t.undefined_bits_7_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_CONTROL_OFFSET 0x160
#define STAT_CONTROL_UNDEFMASK 0xFFFCFCF8
union emc_stat_control_u {
struct {
unsigned int llmc_gather:3;
unsigned int undefined_bits_3_7:5;
unsigned int pwr_gather:2;
unsigned int undefined_bits_10_15:6;
unsigned int dram_gather:2;
unsigned int undefined_bits_18_31:14;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_control_details(const u_int32_t &value, const u_int32_t &new_value)
{
const emc_stat_control_u old_value_t = { .reg32 = value };
const emc_stat_control_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: llmc_gather:3", "", 3, old_value_t.llmc_gather, new_value_t.llmc_gather };
m_bit_details_model.bits.append(entry);
entry = { "03: undefined_bits_3_7:5", "", 5, old_value_t.undefined_bits_3_7, new_value_t.undefined_bits_3_7 };
m_bit_details_model.bits.append(entry);
entry = { "08: pwr_gather:2", "", 2, old_value_t.pwr_gather, new_value_t.pwr_gather };
m_bit_details_model.bits.append(entry);
entry = { "10: undefined_bits_10_15:6", "", 6, old_value_t.undefined_bits_10_15, new_value_t.undefined_bits_10_15 };
m_bit_details_model.bits.append(entry);
entry = { "16: dram_gather:2", "", 2, old_value_t.dram_gather, new_value_t.dram_gather };
m_bit_details_model.bits.append(entry);
entry = { "18: undefined_bits_18_31:14", "", 14, old_value_t.undefined_bits_18_31, new_value_t.undefined_bits_18_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_STATUS_OFFSET 0x164
#define STAT_STATUS_UNDEFMASK 0xFFFEFEFE
union emc_stat_status_u {
struct {
unsigned int llmc_limit:1;
unsigned int undefined_bits_1_7:7;
unsigned int pwr_limit:1;
unsigned int undefined_bits_9_15:7;
unsigned int dram_limit:1;
unsigned int undefined_bits_17_31:15;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_status_details(const u_int32_t &value, const u_int32_t &new_value)
{
const emc_stat_status_u old_value_t = { .reg32 = value };
const emc_stat_status_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: llmc_limit:1", "", 1, old_value_t.llmc_limit, new_value_t.llmc_limit };
m_bit_details_model.bits.append(entry);
entry = { "01: undefined_bits_1_7:7", "", 7, old_value_t.undefined_bits_1_7, new_value_t.undefined_bits_1_7 };
m_bit_details_model.bits.append(entry);
entry = { "08: pwr_limit:1", "", 1, old_value_t.pwr_limit, new_value_t.pwr_limit };
m_bit_details_model.bits.append(entry);
entry = { "09: undefined_bits_9_15:7", "", 7, old_value_t.undefined_bits_9_15, new_value_t.undefined_bits_9_15 };
m_bit_details_model.bits.append(entry);
entry = { "16: dram_limit:1", "", 1, old_value_t.dram_limit, new_value_t.dram_limit };
m_bit_details_model.bits.append(entry);
entry = { "17: undefined_bits_17_31:15", "", 15, old_value_t.undefined_bits_17_31, new_value_t.undefined_bits_17_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_LLMC_ADDR_LOW_OFFSET 0x168
#define STAT_LLMC_ADDR_LOW_UNDEFMASK 0xC000000F
union stat_llmc_addr_low_u {
struct {
unsigned int undefined_bits_0_3:4;
unsigned int llmc_addr_low:26;
unsigned int undefined_bits_30_31:2;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_llmc_addr_low_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_llmc_addr_low_u old_value_t = { .reg32 = value };
const stat_llmc_addr_low_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: undefined_bits_0_3:4", "", 4, old_value_t.undefined_bits_0_3, new_value_t.undefined_bits_0_3 };
m_bit_details_model.bits.append(entry);
entry = { "04: llmc_addr_low:26", "", 26, old_value_t.llmc_addr_low, new_value_t.llmc_addr_low };
m_bit_details_model.bits.append(entry);
entry = { "30: undefined_bits_30_31:2", "", 2, old_value_t.undefined_bits_30_31, new_value_t.undefined_bits_30_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_LLMC_ADDR_HIGH_OFFSET 0x16C
#define STAT_LLMC_ADDR_HIGH_UNDEFMASK 0xC000000F
union stat_llmc_addr_high_u {
struct {
unsigned int undefined_bits_0_3:4;
unsigned int llmc_addr_high:26;
unsigned int undefined_bits_30_31:2;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_llmc_addr_high_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_llmc_addr_high_u old_value_t = { .reg32 = value };
const stat_llmc_addr_high_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: undefined_bits_0_3:4", "", 4, old_value_t.undefined_bits_0_3, new_value_t.undefined_bits_0_3 };
m_bit_details_model.bits.append(entry);
entry = { "04: llmc_addr_high:26", "", 26, old_value_t.llmc_addr_high, new_value_t.llmc_addr_high };
m_bit_details_model.bits.append(entry);
entry = { "30: undefined_bits_30_31:2", "", 2, old_value_t.undefined_bits_30_31, new_value_t.undefined_bits_30_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_LLMC_CLOCK_LIMIT_OFFSET 0x170
#define STAT_LLMC_CLOCK_LIMIT_UNDEFMASK 0x00000000
union stat_llmc_clock_limit_u {
struct {
unsigned int llmc_clock_limit:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_llmc_clock_limit_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_llmc_clock_limit_u old_value_t = { .reg32 = value };
const stat_llmc_clock_limit_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: llmc_clock_limit:32", "", 32, old_value_t.llmc_clock_limit, new_value_t.llmc_clock_limit };
m_bit_details_model.bits.append(entry);
}
#define STAT_LLMC_CLOCKS_OFFSET 0x174
#define STAT_LLMC_CLOCKS_UNDEFMASK 0x00000000
union stat_llmc_clocks_u {
struct {
unsigned int llmc_clocks:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_llmc_clocks_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_llmc_clocks_u old_value_t = { .reg32 = value };
const stat_llmc_clocks_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: llmc_clocks:32", "", 32, old_value_t.llmc_clocks, new_value_t.llmc_clocks };
m_bit_details_model.bits.append(entry);
}
#define STAT_LLMC_CONTROL_OFFSET 0x178
#define STAT_LLMC_CONTROL_UNDEFMASK 0x00000000
union stat_llmc_control_u {
struct {
unsigned int llmc_control_0:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_llmc_control_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_llmc_control_u old_value_t = { .reg32 = value };
const stat_llmc_control_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: llmc_control_0:32", "", 32, old_value_t.llmc_control_0, new_value_t.llmc_control_0 };
m_bit_details_model.bits.append(entry);
}
#define STAT_LLMC_HIST_LIMIT_OFFSET 0x180
#define STAT_LLMC_HIST_LIMIT_UNDEFMASK 0x00000000
union stat_llmc_hist_limit_u {
struct {
unsigned int llmc_hist_limit_0:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_llmc_hist_limit_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_llmc_hist_limit_u old_value_t = { .reg32 = value };
const stat_llmc_hist_limit_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: llmc_hist_limit_0:32", "", 32, old_value_t.llmc_hist_limit_0, new_value_t.llmc_hist_limit_0 };
m_bit_details_model.bits.append(entry);
}
#define STAT_LLMC_COUNT_OFFSET 0x188
#define STAT_LLMC_COUNT_UNDEFMASK 0x00000000
union stat_llmc_count_u {
struct {
unsigned int llmc_count_0:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_llmc_count_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_llmc_count_u old_value_t = { .reg32 = value };
const stat_llmc_count_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: llmc_count_0:32", "", 32, old_value_t.llmc_count_0, new_value_t.llmc_count_0 };
m_bit_details_model.bits.append(entry);
}
#define STAT_LLMC_HIST_OFFSET 0x190
#define STAT_LLMC_HIST_UNDEFMASK 0x00000000
union stat_llmc_hist_u {
struct {
unsigned int llmc_hist_0:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_llmc_hist_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_llmc_hist_u old_value_t = { .reg32 = value };
const stat_llmc_hist_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: llmc_hist_0:32", "", 32, old_value_t.llmc_hist_0, new_value_t.llmc_hist_0 };
m_bit_details_model.bits.append(entry);
}
#define STAT_PWR_CLOCK_LIMIT_OFFSET 0x198
#define STAT_PWR_CLOCK_LIMIT_UNDEFMASK 0x00000000
union stat_pwr_clock_limit_u {
struct {
unsigned int pwr_clock_limit:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_pwr_clock_limit_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_pwr_clock_limit_u old_value_t = { .reg32 = value };
const stat_pwr_clock_limit_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: pwr_clock_limit:32", "", 32, old_value_t.pwr_clock_limit, new_value_t.pwr_clock_limit };
m_bit_details_model.bits.append(entry);
}
#define STAT_PWR_CLOCKS_OFFSET 0x19C
#define STAT_PWR_CLOCKS_UNDEFMASK 0x00000000
union stat_pwr_clocks_u {
struct {
unsigned int pwr_clocks:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_pwr_clocks_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_pwr_clocks_u old_value_t = { .reg32 = value };
const stat_pwr_clocks_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: pwr_clocks:32", "", 32, old_value_t.pwr_clocks, new_value_t.pwr_clocks };
m_bit_details_model.bits.append(entry);
}
#define STAT_PWR_COUNT_OFFSET 0x1A0
#define STAT_PWR_COUNT_UNDEFMASK 0x00000000
union stat_pwr_count_u {
struct {
unsigned int pwr_count:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_pwr_count_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_pwr_count_u old_value_t = { .reg32 = value };
const stat_pwr_count_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: pwr_count:32", "", 32, old_value_t.pwr_count, new_value_t.pwr_count };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_CLOCK_LIMIT_LO_OFFSET 0x1A4
#define STAT_DRAM_CLOCK_LIMIT_LO_UNDEFMASK 0x00000000
union stat_dram_clock_limit_lo_u {
struct {
unsigned int dram_clock_limit_lo:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_clock_limit_lo_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_clock_limit_lo_u old_value_t = { .reg32 = value };
const stat_dram_clock_limit_lo_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dram_clock_limit_lo:32", "", 32, old_value_t.dram_clock_limit_lo, new_value_t.dram_clock_limit_lo };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_CLOCK_LIMIT_HI_OFFSET 0x1A8
#define STAT_DRAM_CLOCK_LIMIT_HI_UNDEFMASK 0xFFFFFF00
union stat_dram_clock_limit_hi_u {
struct {
unsigned int dram_clock_limit_hi:8;
unsigned int undefined_bits_8_31:24;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_clock_limit_hi_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_clock_limit_hi_u old_value_t = { .reg32 = value };
const stat_dram_clock_limit_hi_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dram_clock_limit_hi:8", "", 8, old_value_t.dram_clock_limit_hi, new_value_t.dram_clock_limit_hi };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_31:24", "", 24, old_value_t.undefined_bits_8_31, new_value_t.undefined_bits_8_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_CLOCKS_LO_OFFSET 0x1AC
#define STAT_DRAM_CLOCKS_LO_UNDEFMASK 0x00000000
union stat_dram_clocks_lo_u {
struct {
unsigned int dram_clocks_lo:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_clocks_lo_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_clocks_lo_u old_value_t = { .reg32 = value };
const stat_dram_clocks_lo_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dram_clocks_lo:32", "", 32, old_value_t.dram_clocks_lo, new_value_t.dram_clocks_lo };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_CLOCKS_HI_OFFSET 0x1B0
#define STAT_DRAM_CLOCKS_HI_UNDEFMASK 0xFFFFFF00
union stat_dram_clocks_hi_u {
struct {
unsigned int dram_clocks_hi:8;
unsigned int undefined_bits_8_31:24;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_clocks_hi_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_clocks_hi_u old_value_t = { .reg32 = value };
const stat_dram_clocks_hi_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dram_clocks_hi:8", "", 8, old_value_t.dram_clocks_hi, new_value_t.dram_clocks_hi };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_31:24", "", 24, old_value_t.undefined_bits_8_31, new_value_t.undefined_bits_8_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV0_ACTIVATE_CNT_LO_OFFSET 0x1B4
#define STAT_DRAM_DEV0_ACTIVATE_CNT_LO_UNDEFMASK 0x00000000
union stat_dram_dev0_activate_cnt_lo_u {
struct {
unsigned int dev0_activate_cnt_lo:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev0_activate_cnt_lo_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev0_activate_cnt_lo_u old_value_t = { .reg32 = value };
const stat_dram_dev0_activate_cnt_lo_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev0_activate_cnt_lo:32", "", 32, old_value_t.dev0_activate_cnt_lo, new_value_t.dev0_activate_cnt_lo };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV0_ACTIVATE_CNT_HI_OFFSET 0x1B8
#define STAT_DRAM_DEV0_ACTIVATE_CNT_HI_UNDEFMASK 0xFFFFFF00
union stat_dram_dev0_activate_cnt_hi_u {
struct {
unsigned int dev0_activate_cnt_hi:8;
unsigned int undefined_bits_8_31:24;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev0_activate_cnt_hi_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev0_activate_cnt_hi_u old_value_t = { .reg32 = value };
const stat_dram_dev0_activate_cnt_hi_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev0_activate_cnt_hi:8", "", 8, old_value_t.dev0_activate_cnt_hi, new_value_t.dev0_activate_cnt_hi };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_31:24", "", 24, old_value_t.undefined_bits_8_31, new_value_t.undefined_bits_8_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV0_READ_CNT_LO_OFFSET 0x1BC
#define STAT_DRAM_DEV0_READ_CNT_LO_UNDEFMASK 0x00000000
union stat_dram_dev0_read_cnt_lo_u {
struct {
unsigned int dev0_read_cnt_lo:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev0_read_cnt_lo_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev0_read_cnt_lo_u old_value_t = { .reg32 = value };
const stat_dram_dev0_read_cnt_lo_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev0_read_cnt_lo:32", "", 32, old_value_t.dev0_read_cnt_lo, new_value_t.dev0_read_cnt_lo };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV0_READ_CNT_HI_OFFSET 0x1C0
#define STAT_DRAM_DEV0_READ_CNT_HI_UNDEFMASK 0xFFFFFF00
union stat_dram_dev0_read_cnt_hi_u {
struct {
unsigned int dev0_read_cnt_hi:8;
unsigned int undefined_bits_8_31:24;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev0_read_cnt_hi_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev0_read_cnt_hi_u old_value_t = { .reg32 = value };
const stat_dram_dev0_read_cnt_hi_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev0_read_cnt_hi:8", "", 8, old_value_t.dev0_read_cnt_hi, new_value_t.dev0_read_cnt_hi };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_31:24", "", 24, old_value_t.undefined_bits_8_31, new_value_t.undefined_bits_8_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV0_WRITE_CNT_LO_OFFSET 0x1C4
#define STAT_DRAM_DEV0_WRITE_CNT_LO_UNDEFMASK 0x00000000
union stat_dram_dev0_write_cnt_lo_u {
struct {
unsigned int dev0_write_cnt_lo:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev0_write_cnt_lo_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev0_write_cnt_lo_u old_value_t = { .reg32 = value };
const stat_dram_dev0_write_cnt_lo_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev0_write_cnt_lo:32", "", 32, old_value_t.dev0_write_cnt_lo, new_value_t.dev0_write_cnt_lo };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV0_WRITE_CNT_HI_OFFSET 0x1C8
#define STAT_DRAM_DEV0_WRITE_CNT_HI_UNDEFMASK 0xFFFFFF00
union stat_dram_dev0_write_cnt_hi_u {
struct {
unsigned int dev0_write_cnt_hi:8;
unsigned int undefined_bits_8_31:24;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev0_write_cnt_hi_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev0_write_cnt_hi_u old_value_t = { .reg32 = value };
const stat_dram_dev0_write_cnt_hi_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev0_write_cnt_hi:8", "", 8, old_value_t.dev0_write_cnt_hi, new_value_t.dev0_write_cnt_hi };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_31:24", "", 24, old_value_t.undefined_bits_8_31, new_value_t.undefined_bits_8_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV0_REF_CNT_LO_OFFSET 0x1CC
#define STAT_DRAM_DEV0_REF_CNT_LO_UNDEFMASK 0x00000000
union stat_dram_dev0_ref_cnt_lo_u {
struct {
unsigned int dev0_ref_cnt_lo:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev0_ref_cnt_lo_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev0_ref_cnt_lo_u old_value_t = { .reg32 = value };
const stat_dram_dev0_ref_cnt_lo_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev0_ref_cnt_lo:32", "", 32, old_value_t.dev0_ref_cnt_lo, new_value_t.dev0_ref_cnt_lo };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV0_REF_CNT_HI_OFFSET 0x1D0
#define STAT_DRAM_DEV0_REF_CNT_HI_UNDEFMASK 0xFFFFFF00
union stat_dram_dev0_ref_cnt_hi_u {
struct {
unsigned int dev0_ref_cnt_hi:8;
unsigned int undefined_bits_8_31:24;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev0_ref_cnt_hi_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev0_ref_cnt_hi_u old_value_t = { .reg32 = value };
const stat_dram_dev0_ref_cnt_hi_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev0_ref_cnt_hi:8", "", 8, old_value_t.dev0_ref_cnt_hi, new_value_t.dev0_ref_cnt_hi };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_31:24", "", 24, old_value_t.undefined_bits_8_31, new_value_t.undefined_bits_8_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ1_LO_OFFSET 0x1D4
#define STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ1_LO_UNDEFMASK 0x00000000
union stat_dram_dev0_cumm_banks_active_cke_eq1_lo_u {
struct {
unsigned int dev0_cumm_banks_active_cke_eq1_lo:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev0_cumm_banks_active_cke_eq1_lo_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev0_cumm_banks_active_cke_eq1_lo_u old_value_t = { .reg32 = value };
const stat_dram_dev0_cumm_banks_active_cke_eq1_lo_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev0_cumm_banks_active_cke_eq1_lo:32", "", 32, old_value_t.dev0_cumm_banks_active_cke_eq1_lo, new_value_t.dev0_cumm_banks_active_cke_eq1_lo };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ1_HI_OFFSET 0x1D8
#define STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ1_HI_UNDEFMASK 0xFFFFFF00
union stat_dram_dev0_cumm_banks_active_cke_eq1_hi_u {
struct {
unsigned int dev0_cumm_banks_active_cke_eq1_hi:8;
unsigned int undefined_bits_8_31:24;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev0_cumm_banks_active_cke_eq1_hi_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev0_cumm_banks_active_cke_eq1_hi_u old_value_t = { .reg32 = value };
const stat_dram_dev0_cumm_banks_active_cke_eq1_hi_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev0_cumm_banks_active_cke_eq1_hi:8", "", 8, old_value_t.dev0_cumm_banks_active_cke_eq1_hi, new_value_t.dev0_cumm_banks_active_cke_eq1_hi };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_31:24", "", 24, old_value_t.undefined_bits_8_31, new_value_t.undefined_bits_8_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ0_LO_OFFSET 0x1DC
#define STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ0_LO_UNDEFMASK 0x00000000
union stat_dram_dev0_cumm_banks_active_cke_eq0_lo_u {
struct {
unsigned int dev0_cumm_banks_active_cke_eq0_lo:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev0_cumm_banks_active_cke_eq0_lo_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev0_cumm_banks_active_cke_eq0_lo_u old_value_t = { .reg32 = value };
const stat_dram_dev0_cumm_banks_active_cke_eq0_lo_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev0_cumm_banks_active_cke_eq0_lo:32", "", 32, old_value_t.dev0_cumm_banks_active_cke_eq0_lo, new_value_t.dev0_cumm_banks_active_cke_eq0_lo };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ0_HI_OFFSET 0x1E0
#define STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ0_HI_UNDEFMASK 0xFFFFFF00
union stat_dram_dev0_cumm_banks_active_cke_eq0_hi_u {
struct {
unsigned int dev0_cumm_banks_active_cke_eq0_hi:8;
unsigned int undefined_bits_8_31:24;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev0_cumm_banks_active_cke_eq0_hi_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev0_cumm_banks_active_cke_eq0_hi_u old_value_t = { .reg32 = value };
const stat_dram_dev0_cumm_banks_active_cke_eq0_hi_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev0_cumm_banks_active_cke_eq0_hi:8", "", 8, old_value_t.dev0_cumm_banks_active_cke_eq0_hi, new_value_t.dev0_cumm_banks_active_cke_eq0_hi };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_31:24", "", 24, old_value_t.undefined_bits_8_31, new_value_t.undefined_bits_8_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV0_CKE_EQ1_CLKS_LO_OFFSET 0x1E4
#define STAT_DRAM_DEV0_CKE_EQ1_CLKS_LO_UNDEFMASK 0x00000000
union stat_dram_dev0_cke_eq1_clks_lo_u {
struct {
unsigned int dev0_cke_eq1_clks_lo:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev0_cke_eq1_clks_lo_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev0_cke_eq1_clks_lo_u old_value_t = { .reg32 = value };
const stat_dram_dev0_cke_eq1_clks_lo_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev0_cke_eq1_clks_lo:32", "", 32, old_value_t.dev0_cke_eq1_clks_lo, new_value_t.dev0_cke_eq1_clks_lo };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV0_CKE_EQ1_CLKS_HI_OFFSET 0x1E8
#define STAT_DRAM_DEV0_CKE_EQ1_CLKS_HI_UNDEFMASK 0xFFFFFF00
union stat_dram_dev0_cke_eq1_clks_hi_u {
struct {
unsigned int dev0_cke_eq1_clks_hi:8;
unsigned int undefined_bits_8_31:24;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev0_cke_eq1_clks_hi_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev0_cke_eq1_clks_hi_u old_value_t = { .reg32 = value };
const stat_dram_dev0_cke_eq1_clks_hi_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev0_cke_eq1_clks_hi:8", "", 8, old_value_t.dev0_cke_eq1_clks_hi, new_value_t.dev0_cke_eq1_clks_hi };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_31:24", "", 24, old_value_t.undefined_bits_8_31, new_value_t.undefined_bits_8_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_LO_OFFSET 0x1EC
#define STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_LO_UNDEFMASK 0x00000000
union stat_dram_dev0_extclks_cke_eq1_lo_u {
struct {
unsigned int dev0_extclks_cke_eq1_lo:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev0_extclks_cke_eq1_lo_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev0_extclks_cke_eq1_lo_u old_value_t = { .reg32 = value };
const stat_dram_dev0_extclks_cke_eq1_lo_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev0_extclks_cke_eq1_lo:32", "", 32, old_value_t.dev0_extclks_cke_eq1_lo, new_value_t.dev0_extclks_cke_eq1_lo };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_HI_OFFSET 0x1F0
#define STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_HI_UNDEFMASK 0xFFFFFF00
union stat_dram_dev0_extclks_cke_eq1_hi_u {
struct {
unsigned int dev0_extclks_cke_eq1_hi:8;
unsigned int undefined_bits_8_31:24;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev0_extclks_cke_eq1_hi_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev0_extclks_cke_eq1_hi_u old_value_t = { .reg32 = value };
const stat_dram_dev0_extclks_cke_eq1_hi_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev0_extclks_cke_eq1_hi:8", "", 8, old_value_t.dev0_extclks_cke_eq1_hi, new_value_t.dev0_extclks_cke_eq1_hi };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_31:24", "", 24, old_value_t.undefined_bits_8_31, new_value_t.undefined_bits_8_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_LO_OFFSET 0x1F4
#define STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_LO_UNDEFMASK 0x00000000
union stat_dram_dev0_extclks_cke_eq0_lo_u {
struct {
unsigned int dev0_extclks_cke_eq0_lo:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev0_extclks_cke_eq0_lo_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev0_extclks_cke_eq0_lo_u old_value_t = { .reg32 = value };
const stat_dram_dev0_extclks_cke_eq0_lo_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev0_extclks_cke_eq0_lo:32", "", 32, old_value_t.dev0_extclks_cke_eq0_lo, new_value_t.dev0_extclks_cke_eq0_lo };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_HI_OFFSET 0x1F8
#define STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_HI_UNDEFMASK 0xFFFFFF00
union stat_dram_dev0_extclks_cke_eq0_hi_u {
struct {
unsigned int dev0_extclks_cke_eq0_hi:8;
unsigned int undefined_bits_8_31:24;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev0_extclks_cke_eq0_hi_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev0_extclks_cke_eq0_hi_u old_value_t = { .reg32 = value };
const stat_dram_dev0_extclks_cke_eq0_hi_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev0_extclks_cke_eq0_hi:8", "", 8, old_value_t.dev0_extclks_cke_eq0_hi, new_value_t.dev0_extclks_cke_eq0_hi };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_31:24", "", 24, old_value_t.undefined_bits_8_31, new_value_t.undefined_bits_8_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV1_ACTIVATE_CNT_LO_OFFSET 0x1FC
#define STAT_DRAM_DEV1_ACTIVATE_CNT_LO_UNDEFMASK 0x00000000
union stat_dram_dev1_activate_cnt_lo_u {
struct {
unsigned int dev1_activate_cnt_lo:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev1_activate_cnt_lo_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev1_activate_cnt_lo_u old_value_t = { .reg32 = value };
const stat_dram_dev1_activate_cnt_lo_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev1_activate_cnt_lo:32", "", 32, old_value_t.dev1_activate_cnt_lo, new_value_t.dev1_activate_cnt_lo };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV1_ACTIVATE_CNT_HI_OFFSET 0x200
#define STAT_DRAM_DEV1_ACTIVATE_CNT_HI_UNDEFMASK 0xFFFFFF00
union stat_dram_dev1_activate_cnt_hi_u {
struct {
unsigned int dev1_activate_cnt_hi:8;
unsigned int undefined_bits_8_31:24;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev1_activate_cnt_hi_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev1_activate_cnt_hi_u old_value_t = { .reg32 = value };
const stat_dram_dev1_activate_cnt_hi_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev1_activate_cnt_hi:8", "", 8, old_value_t.dev1_activate_cnt_hi, new_value_t.dev1_activate_cnt_hi };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_31:24", "", 24, old_value_t.undefined_bits_8_31, new_value_t.undefined_bits_8_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV1_READ_CNT_LO_OFFSET 0x204
#define STAT_DRAM_DEV1_READ_CNT_LO_UNDEFMASK 0x00000000
union stat_dram_dev1_read_cnt_lo_u {
struct {
unsigned int dev1_read_cnt_lo:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev1_read_cnt_lo_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev1_read_cnt_lo_u old_value_t = { .reg32 = value };
const stat_dram_dev1_read_cnt_lo_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev1_read_cnt_lo:32", "", 32, old_value_t.dev1_read_cnt_lo, new_value_t.dev1_read_cnt_lo };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV1_READ_CNT_HI_OFFSET 0x208
#define STAT_DRAM_DEV1_READ_CNT_HI_UNDEFMASK 0xFFFFFF00
union stat_dram_dev1_read_cnt_hi_u {
struct {
unsigned int dev1_read_cnt_hi:8;
unsigned int undefined_bits_8_31:24;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev1_read_cnt_hi_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev1_read_cnt_hi_u old_value_t = { .reg32 = value };
const stat_dram_dev1_read_cnt_hi_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev1_read_cnt_hi:8", "", 8, old_value_t.dev1_read_cnt_hi, new_value_t.dev1_read_cnt_hi };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_31:24", "", 24, old_value_t.undefined_bits_8_31, new_value_t.undefined_bits_8_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV1_WRITE_CNT_LO_OFFSET 0x20C
#define STAT_DRAM_DEV1_WRITE_CNT_LO_UNDEFMASK 0x00000000
union stat_dram_dev1_write_cnt_lo_u {
struct {
unsigned int dev1_write_cnt_lo:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev1_write_cnt_lo_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev1_write_cnt_lo_u old_value_t = { .reg32 = value };
const stat_dram_dev1_write_cnt_lo_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev1_write_cnt_lo:32", "", 32, old_value_t.dev1_write_cnt_lo, new_value_t.dev1_write_cnt_lo };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV1_WRITE_CNT_HI_OFFSET 0x210
#define STAT_DRAM_DEV1_WRITE_CNT_HI_UNDEFMASK 0xFFFFFF00
union stat_dram_dev1_write_cnt_hi_u {
struct {
unsigned int dev1_write_cnt_hi:8;
unsigned int undefined_bits_8_31:24;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev1_write_cnt_hi_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev1_write_cnt_hi_u old_value_t = { .reg32 = value };
const stat_dram_dev1_write_cnt_hi_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev1_write_cnt_hi:8", "", 8, old_value_t.dev1_write_cnt_hi, new_value_t.dev1_write_cnt_hi };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_31:24", "", 24, old_value_t.undefined_bits_8_31, new_value_t.undefined_bits_8_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV1_REF_CNT_LO_OFFSET 0x214
#define STAT_DRAM_DEV1_REF_CNT_LO_UNDEFMASK 0x00000000
union stat_dram_dev1_ref_cnt_lo_u {
struct {
unsigned int dev1_ref_cnt_lo:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev1_ref_cnt_lo_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev1_ref_cnt_lo_u old_value_t = { .reg32 = value };
const stat_dram_dev1_ref_cnt_lo_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev1_ref_cnt_lo:32", "", 32, old_value_t.dev1_ref_cnt_lo, new_value_t.dev1_ref_cnt_lo };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV1_REF_CNT_HI_OFFSET 0x218
#define STAT_DRAM_DEV1_REF_CNT_HI_UNDEFMASK 0xFFFFFF00
union stat_dram_dev1_ref_cnt_hi_u {
struct {
unsigned int dev1_ref_cnt_hi:8;
unsigned int undefined_bits_8_31:24;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev1_ref_cnt_hi_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev1_ref_cnt_hi_u old_value_t = { .reg32 = value };
const stat_dram_dev1_ref_cnt_hi_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev1_ref_cnt_hi:8", "", 8, old_value_t.dev1_ref_cnt_hi, new_value_t.dev1_ref_cnt_hi };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_31:24", "", 24, old_value_t.undefined_bits_8_31, new_value_t.undefined_bits_8_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ1_LO_OFFSET 0x21C
#define STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ1_LO_UNDEFMASK 0x00000000
union stat_dram_dev1_cumm_banks_active_cke_eq1_lo_u {
struct {
unsigned int dev1_cumm_banks_active_cke_eq1_lo:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev1_cumm_banks_active_cke_eq1_lo_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev1_cumm_banks_active_cke_eq1_lo_u old_value_t = { .reg32 = value };
const stat_dram_dev1_cumm_banks_active_cke_eq1_lo_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev1_cumm_banks_active_cke_eq1_lo:32", "", 32, old_value_t.dev1_cumm_banks_active_cke_eq1_lo, new_value_t.dev1_cumm_banks_active_cke_eq1_lo };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ1_HI_OFFSET 0x220
#define STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ1_HI_UNDEFMASK 0xFFFFFF00
union stat_dram_dev1_cumm_banks_active_cke_eq1_hi_u {
struct {
unsigned int dev1_cumm_banks_active_cke_eq1_hi:8;
unsigned int undefined_bits_8_31:24;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev1_cumm_banks_active_cke_eq1_hi_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev1_cumm_banks_active_cke_eq1_hi_u old_value_t = { .reg32 = value };
const stat_dram_dev1_cumm_banks_active_cke_eq1_hi_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev1_cumm_banks_active_cke_eq1_hi:8", "", 8, old_value_t.dev1_cumm_banks_active_cke_eq1_hi, new_value_t.dev1_cumm_banks_active_cke_eq1_hi };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_31:24", "", 24, old_value_t.undefined_bits_8_31, new_value_t.undefined_bits_8_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ0_LO_OFFSET 0x224
#define STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ0_LO_UNDEFMASK 0x00000000
union stat_dram_dev1_cumm_banks_active_cke_eq0_lo_u {
struct {
unsigned int dev1_cumm_banks_active_cke_eq0_lo:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev1_cumm_banks_active_cke_eq0_lo_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev1_cumm_banks_active_cke_eq0_lo_u old_value_t = { .reg32 = value };
const stat_dram_dev1_cumm_banks_active_cke_eq0_lo_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev1_cumm_banks_active_cke_eq0_lo:32", "", 32, old_value_t.dev1_cumm_banks_active_cke_eq0_lo, new_value_t.dev1_cumm_banks_active_cke_eq0_lo };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ0_HI_OFFSET 0x228
#define STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ0_HI_UNDEFMASK 0xFFFFFF00
union stat_dram_dev1_cumm_banks_active_cke_eq0_hi_u {
struct {
unsigned int dev1_cumm_banks_active_cke_eq0_hi:8;
unsigned int undefined_bits_8_31:24;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev1_cumm_banks_active_cke_eq0_hi_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev1_cumm_banks_active_cke_eq0_hi_u old_value_t = { .reg32 = value };
const stat_dram_dev1_cumm_banks_active_cke_eq0_hi_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev1_cumm_banks_active_cke_eq0_hi:8", "", 8, old_value_t.dev1_cumm_banks_active_cke_eq0_hi, new_value_t.dev1_cumm_banks_active_cke_eq0_hi };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_31:24", "", 24, old_value_t.undefined_bits_8_31, new_value_t.undefined_bits_8_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV1_CKE_EQ1_CLKS_LO_OFFSET 0x22C
#define STAT_DRAM_DEV1_CKE_EQ1_CLKS_LO_UNDEFMASK 0x00000000
union stat_dram_dev1_cke_eq1_clks_lo_u {
struct {
unsigned int dev1_cke_eq1_clks_lo:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev1_cke_eq1_clks_lo_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev1_cke_eq1_clks_lo_u old_value_t = { .reg32 = value };
const stat_dram_dev1_cke_eq1_clks_lo_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev1_cke_eq1_clks_lo:32", "", 32, old_value_t.dev1_cke_eq1_clks_lo, new_value_t.dev1_cke_eq1_clks_lo };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV1_CKE_EQ1_CLKS_HI_OFFSET 0x230
#define STAT_DRAM_DEV1_CKE_EQ1_CLKS_HI_UNDEFMASK 0xFFFFFF00
union stat_dram_dev1_cke_eq1_clks_hi_u {
struct {
unsigned int dev1_cke_eq1_clks_hi:8;
unsigned int undefined_bits_8_31:24;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev1_cke_eq1_clks_hi_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev1_cke_eq1_clks_hi_u old_value_t = { .reg32 = value };
const stat_dram_dev1_cke_eq1_clks_hi_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev1_cke_eq1_clks_hi:8", "", 8, old_value_t.dev1_cke_eq1_clks_hi, new_value_t.dev1_cke_eq1_clks_hi };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_31:24", "", 24, old_value_t.undefined_bits_8_31, new_value_t.undefined_bits_8_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_LO_OFFSET 0x234
#define STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_LO_UNDEFMASK 0x00000000
union stat_dram_dev1_extclks_cke_eq1_lo_u {
struct {
unsigned int dev1_extclks_cke_eq1_lo:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev1_extclks_cke_eq1_lo_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev1_extclks_cke_eq1_lo_u old_value_t = { .reg32 = value };
const stat_dram_dev1_extclks_cke_eq1_lo_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev1_extclks_cke_eq1_lo:32", "", 32, old_value_t.dev1_extclks_cke_eq1_lo, new_value_t.dev1_extclks_cke_eq1_lo };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_HI_OFFSET 0x238
#define STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_HI_UNDEFMASK 0xFFFFFF00
union stat_dram_dev1_extclks_cke_eq1_hi_u {
struct {
unsigned int dev1_extclks_cke_eq1_hi:8;
unsigned int undefined_bits_8_31:24;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev1_extclks_cke_eq1_hi_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev1_extclks_cke_eq1_hi_u old_value_t = { .reg32 = value };
const stat_dram_dev1_extclks_cke_eq1_hi_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev1_extclks_cke_eq1_hi:8", "", 8, old_value_t.dev1_extclks_cke_eq1_hi, new_value_t.dev1_extclks_cke_eq1_hi };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_31:24", "", 24, old_value_t.undefined_bits_8_31, new_value_t.undefined_bits_8_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_LO_OFFSET 0x23C
#define STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_LO_UNDEFMASK 0x00000000
union stat_dram_dev1_extclks_cke_eq0_lo_u {
struct {
unsigned int dev1_extclks_cke_eq0_lo:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev1_extclks_cke_eq0_lo_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev1_extclks_cke_eq0_lo_u old_value_t = { .reg32 = value };
const stat_dram_dev1_extclks_cke_eq0_lo_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev1_extclks_cke_eq0_lo:32", "", 32, old_value_t.dev1_extclks_cke_eq0_lo, new_value_t.dev1_extclks_cke_eq0_lo };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_HI_OFFSET 0x240
#define STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_HI_UNDEFMASK 0xFFFFFF00
union stat_dram_dev1_extclks_cke_eq0_hi_u {
struct {
unsigned int dev1_extclks_cke_eq0_hi:8;
unsigned int undefined_bits_8_31:24;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev1_extclks_cke_eq0_hi_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev1_extclks_cke_eq0_hi_u old_value_t = { .reg32 = value };
const stat_dram_dev1_extclks_cke_eq0_hi_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev1_extclks_cke_eq0_hi:8", "", 8, old_value_t.dev1_extclks_cke_eq0_hi, new_value_t.dev1_extclks_cke_eq0_hi };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_31:24", "", 24, old_value_t.undefined_bits_8_31, new_value_t.undefined_bits_8_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ1_LO_OFFSET 0x244
#define STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ1_LO_UNDEFMASK 0x00000000
union stat_dram_dev0_no_banks_active_cke_eq1_lo_u {
struct {
unsigned int dev0_no_banks_active_cke_eq1_lo:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev0_no_banks_active_cke_eq1_lo_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev0_no_banks_active_cke_eq1_lo_u old_value_t = { .reg32 = value };
const stat_dram_dev0_no_banks_active_cke_eq1_lo_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev0_no_banks_active_cke_eq1_lo:32", "", 32, old_value_t.dev0_no_banks_active_cke_eq1_lo, new_value_t.dev0_no_banks_active_cke_eq1_lo };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ1_HI_OFFSET 0x248
#define STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ1_HI_UNDEFMASK 0xFFFFFF00
union stat_dram_dev0_no_banks_active_cke_eq1_hi_u {
struct {
unsigned int dev0_no_banks_active_cke_eq1_hi:8;
unsigned int undefined_bits_8_31:24;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev0_no_banks_active_cke_eq1_hi_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev0_no_banks_active_cke_eq1_hi_u old_value_t = { .reg32 = value };
const stat_dram_dev0_no_banks_active_cke_eq1_hi_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev0_no_banks_active_cke_eq1_hi:8", "", 8, old_value_t.dev0_no_banks_active_cke_eq1_hi, new_value_t.dev0_no_banks_active_cke_eq1_hi };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_31:24", "", 24, old_value_t.undefined_bits_8_31, new_value_t.undefined_bits_8_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ0_LO_OFFSET 0x24C
#define STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ0_LO_UNDEFMASK 0x00000000
union stat_dram_dev0_no_banks_active_cke_eq0_lo_u {
struct {
unsigned int dev0_no_banks_active_cke_eq0_lo:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev0_no_banks_active_cke_eq0_lo_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev0_no_banks_active_cke_eq0_lo_u old_value_t = { .reg32 = value };
const stat_dram_dev0_no_banks_active_cke_eq0_lo_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev0_no_banks_active_cke_eq0_lo:32", "", 32, old_value_t.dev0_no_banks_active_cke_eq0_lo, new_value_t.dev0_no_banks_active_cke_eq0_lo };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ0_HI_OFFSET 0x250
#define STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ0_HI_UNDEFMASK 0xFFFFFF00
union stat_dram_dev0_no_banks_active_cke_eq0_hi_u {
struct {
unsigned int dev0_no_banks_active_cke_eq0_hi:8;
unsigned int undefined_bits_8_31:24;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev0_no_banks_active_cke_eq0_hi_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev0_no_banks_active_cke_eq0_hi_u old_value_t = { .reg32 = value };
const stat_dram_dev0_no_banks_active_cke_eq0_hi_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev0_no_banks_active_cke_eq0_hi:8", "", 8, old_value_t.dev0_no_banks_active_cke_eq0_hi, new_value_t.dev0_no_banks_active_cke_eq0_hi };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_31:24", "", 24, old_value_t.undefined_bits_8_31, new_value_t.undefined_bits_8_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ1_LO_OFFSET 0x254
#define STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ1_LO_UNDEFMASK 0x00000000
union stat_dram_dev1_no_banks_active_cke_eq1_lo_u {
struct {
unsigned int dev1_no_banks_active_cke_eq1_lo:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev1_no_banks_active_cke_eq1_lo_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev1_no_banks_active_cke_eq1_lo_u old_value_t = { .reg32 = value };
const stat_dram_dev1_no_banks_active_cke_eq1_lo_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev1_no_banks_active_cke_eq1_lo:32", "", 32, old_value_t.dev1_no_banks_active_cke_eq1_lo, new_value_t.dev1_no_banks_active_cke_eq1_lo };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ1_HI_OFFSET 0x258
#define STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ1_HI_UNDEFMASK 0xFFFFFF00
union stat_dram_dev1_no_banks_active_cke_eq1_hi_u {
struct {
unsigned int dev1_no_banks_active_cke_eq1_hi:8;
unsigned int undefined_bits_8_31:24;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev1_no_banks_active_cke_eq1_hi_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev1_no_banks_active_cke_eq1_hi_u old_value_t = { .reg32 = value };
const stat_dram_dev1_no_banks_active_cke_eq1_hi_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev1_no_banks_active_cke_eq1_hi:8", "", 8, old_value_t.dev1_no_banks_active_cke_eq1_hi, new_value_t.dev1_no_banks_active_cke_eq1_hi };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_31:24", "", 24, old_value_t.undefined_bits_8_31, new_value_t.undefined_bits_8_31 };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ0_LO_OFFSET 0x25C
#define STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ0_LO_UNDEFMASK 0x00000000
union stat_dram_dev1_no_banks_active_cke_eq0_lo_u {
struct {
unsigned int dev1_no_banks_active_cke_eq0_lo:32;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev1_no_banks_active_cke_eq0_lo_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev1_no_banks_active_cke_eq0_lo_u old_value_t = { .reg32 = value };
const stat_dram_dev1_no_banks_active_cke_eq0_lo_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev1_no_banks_active_cke_eq0_lo:32", "", 32, old_value_t.dev1_no_banks_active_cke_eq0_lo, new_value_t.dev1_no_banks_active_cke_eq0_lo };
m_bit_details_model.bits.append(entry);
}
#define STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ0_HI_OFFSET 0x260
#define STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ0_HI_UNDEFMASK 0xFFFFFF00
union stat_dram_dev1_no_banks_active_cke_eq0_hi_u {
struct {
unsigned int dev1_no_banks_active_cke_eq0_hi:8;
unsigned int undefined_bits_8_31:24;
};
u_int32_t reg32;
};
void EmcDev::fill_stat_dram_dev1_no_banks_active_cke_eq0_hi_details(const u_int32_t &value, const u_int32_t &new_value)
{
const stat_dram_dev1_no_banks_active_cke_eq0_hi_u old_value_t = { .reg32 = value };
const stat_dram_dev1_no_banks_active_cke_eq0_hi_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: dev1_no_banks_active_cke_eq0_hi:8", "", 8, old_value_t.dev1_no_banks_active_cke_eq0_hi, new_value_t.dev1_no_banks_active_cke_eq0_hi };
m_bit_details_model.bits.append(entry);
entry = { "08: undefined_bits_8_31:24", "", 24, old_value_t.undefined_bits_8_31, new_value_t.undefined_bits_8_31 };
m_bit_details_model.bits.append(entry);
}
#define CFG_CLKTRIM_OFFSET 0x2D0
#define CFG_CLKTRIM_UNDEFMASK 0xC0000000
union cfg_clktrim_u {
struct {
unsigned int cfg_data0_clktrim:6;
unsigned int cfg_data1_clktrim:6;
unsigned int cfg_data2_clktrim:6;
unsigned int cfg_data3_clktrim:6;
unsigned int cfg_mclk_addr_clktrim:6;
unsigned int undefined_bits_30_31:2;
};
u_int32_t reg32;
};
void EmcDev::fill_cfg_clktrim_details(const u_int32_t &value, const u_int32_t &new_value)
{
const cfg_clktrim_u old_value_t = { .reg32 = value };
const cfg_clktrim_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: cfg_data0_clktrim:6", "", 6, old_value_t.cfg_data0_clktrim, new_value_t.cfg_data0_clktrim };
m_bit_details_model.bits.append(entry);
entry = { "06: cfg_data1_clktrim:6", "", 6, old_value_t.cfg_data1_clktrim, new_value_t.cfg_data1_clktrim };
m_bit_details_model.bits.append(entry);
entry = { "12: cfg_data2_clktrim:6", "", 6, old_value_t.cfg_data2_clktrim, new_value_t.cfg_data2_clktrim };
m_bit_details_model.bits.append(entry);
entry = { "18: cfg_data3_clktrim:6", "", 6, old_value_t.cfg_data3_clktrim, new_value_t.cfg_data3_clktrim };
m_bit_details_model.bits.append(entry);
entry = { "24: cfg_mclk_addr_clktrim:6", "", 6, old_value_t.cfg_mclk_addr_clktrim, new_value_t.cfg_mclk_addr_clktrim };
m_bit_details_model.bits.append(entry);
entry = { "30: undefined_bits_30_31:2", "", 2, old_value_t.undefined_bits_30_31, new_value_t.undefined_bits_30_31 };
m_bit_details_model.bits.append(entry);
}
#define CFG_CLKTRIM_1_OFFSET 0x2D4
#define CFG_CLKTRIM_1_UNDEFMASK 0xC0000000
union cfg_clktrim_1_u {
struct {
unsigned int cfg_dqs0_clktrim:6;
unsigned int cfg_dqs1_clktrim:6;
unsigned int cfg_dqs2_clktrim:6;
unsigned int cfg_dqs3_clktrim:6;
unsigned int cfg_mclk_clktrim:6;
unsigned int undefined_bits_30_31:2;
};
u_int32_t reg32;
};
void EmcDev::fill_cfg_clktrim_1_details(const u_int32_t &value, const u_int32_t &new_value)
{
const cfg_clktrim_1_u old_value_t = { .reg32 = value };
const cfg_clktrim_1_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: cfg_dqs0_clktrim:6", "", 6, old_value_t.cfg_dqs0_clktrim, new_value_t.cfg_dqs0_clktrim };
m_bit_details_model.bits.append(entry);
entry = { "06: cfg_dqs1_clktrim:6", "", 6, old_value_t.cfg_dqs1_clktrim, new_value_t.cfg_dqs1_clktrim };
m_bit_details_model.bits.append(entry);
entry = { "12: cfg_dqs2_clktrim:6", "", 6, old_value_t.cfg_dqs2_clktrim, new_value_t.cfg_dqs2_clktrim };
m_bit_details_model.bits.append(entry);
entry = { "18: cfg_dqs3_clktrim:6", "", 6, old_value_t.cfg_dqs3_clktrim, new_value_t.cfg_dqs3_clktrim };
m_bit_details_model.bits.append(entry);
entry = { "24: cfg_mclk_clktrim:6", "", 6, old_value_t.cfg_mclk_clktrim, new_value_t.cfg_mclk_clktrim };
m_bit_details_model.bits.append(entry);
entry = { "30: undefined_bits_30_31:2", "", 2, old_value_t.undefined_bits_30_31, new_value_t.undefined_bits_30_31 };
m_bit_details_model.bits.append(entry);
}
#define CFG_CLKTRIM_2_OFFSET 0x2D8
#define CFG_CLKTRIM_2_UNDEFMASK 0xC0000000
union cfg_clktrim_2_u {
struct {
unsigned int cfg_dq0_clktrim:6;
unsigned int cfg_dq1_clktrim:6;
unsigned int cfg_dq2_clktrim:6;
unsigned int cfg_dq3_clktrim:6;
unsigned int cfg_cmd_clktrim:6;
unsigned int undefined_bits_30_31:2;
};
u_int32_t reg32;
};
void EmcDev::fill_cfg_clktrim_2_details(const u_int32_t &value, const u_int32_t &new_value)
{
const cfg_clktrim_2_u old_value_t = { .reg32 = value };
const cfg_clktrim_2_u new_value_t = { .reg32 = new_value };
BitDetails::bit_entry entry;
m_bit_details_model.has_changed_bits = (value != new_value);
entry = { "00: cfg_dq0_clktrim:6", "", 6, old_value_t.cfg_dq0_clktrim, new_value_t.cfg_dq0_clktrim };
m_bit_details_model.bits.append(entry);
entry = { "06: cfg_dq1_clktrim:6", "", 6, old_value_t.cfg_dq1_clktrim, new_value_t.cfg_dq1_clktrim };
m_bit_details_model.bits.append(entry);
entry = { "12: cfg_dq2_clktrim:6", "", 6, old_value_t.cfg_dq2_clktrim, new_value_t.cfg_dq2_clktrim };
m_bit_details_model.bits.append(entry);
entry = { "18: cfg_dq3_clktrim:6", "", 6, old_value_t.cfg_dq3_clktrim, new_value_t.cfg_dq3_clktrim };
m_bit_details_model.bits.append(entry);
entry = { "24: cfg_cmd_clktrim:6", "", 6, old_value_t.cfg_cmd_clktrim, new_value_t.cfg_cmd_clktrim };
m_bit_details_model.bits.append(entry);
entry = { "30: undefined_bits_30_31:2", "", 2, old_value_t.undefined_bits_30_31, new_value_t.undefined_bits_30_31 };
m_bit_details_model.bits.append(entry);
}
bool EmcDev::is_offset_valid(const u_int32_t &offset) const
{
switch (offset) {
case INTSTATUS_OFFSET:
case INTMASK_OFFSET:
case DBG_OFFSET:
case CFG_OFFSET:
case ADR_CFG_OFFSET:
case ADR_CFG_1_OFFSET:
case REFCTRL_OFFSET:
case PIN_OFFSET:
case TIMING_CONTROL_OFFSET:
case RC_OFFSET:
case RFC_OFFSET:
case RAS_OFFSET:
case RP_OFFSET:
case R2W_OFFSET:
case W2R_OFFSET:
case R2P_OFFSET:
case W2P_OFFSET:
case RD_RCD_OFFSET:
case WR_RCD_OFFSET:
case RRD_OFFSET:
case REXT_OFFSET:
case WDV_OFFSET:
case QUSE_OFFSET:
case QRST_OFFSET:
case QSAFE_OFFSET:
case RDV_OFFSET:
case REFRESH_OFFSET:
case BURST_REFRESH_NUM_OFFSET:
case PDEX2WR_OFFSET:
case PDEX2RD_OFFSET:
case PCHG2PDEN_OFFSET:
case ACT2PDEN_OFFSET:
case AR2PDEN_OFFSET:
case RW2PDEN_OFFSET:
case TXSR_OFFSET:
case TCKE_OFFSET:
case TFAW_OFFSET:
case TRPAB_OFFSET:
case TCLKSTABLE_OFFSET:
case TCLKSTOP_OFFSET:
case TREFBW_OFFSET:
case QUSE_EXTRA_OFFSET:
case ODT_WRITE_OFFSET:
case ODT_READ_OFFSET:
case MRS_OFFSET:
case EMRS_OFFSET:
case REF_OFFSET:
case PRE_OFFSET:
case NOP_OFFSET:
case SELF_REF_OFFSET:
case DPD_OFFSET:
case MRW_OFFSET:
case MRR_OFFSET:
case FBIO_CFG1_OFFSET:
case FBIO_DQSIB_DLY_OFFSET:
case FBIO_DQSIB_DLY_MSB_OFFSET:
case FBIO_CFG5_OFFSET:
case FBIO_QUSE_DLY_OFFSET:
case FBIO_QUSE_DLY_MSB_OFFSET:
case FBIO_CFG6_OFFSET:
case DQS_TRIMMER_RD0_OFFSET:
case DQS_TRIMMER_RD1_OFFSET:
case DQS_TRIMMER_RD2_OFFSET:
case DQS_TRIMMER_RD3_OFFSET:
case LL_ARB_CONFIG_OFFSET:
case T_MIN_CRITICAL_HP_OFFSET:
case T_MIN_CRITICAL_TIMEOUT_OFFSET:
case T_MIN_LOAD_OFFSET:
case T_MAX_CRITICAL_HP_OFFSET:
case T_MAX_CRITICAL_TIMEOUT_OFFSET:
case T_MAX_LOAD_OFFSET:
case AUTO_CAL_CONFIG_OFFSET:
case AUTO_CAL_INTERVAL_OFFSET:
case AUTO_CAL_STATUS_OFFSET:
case REQ_CTRL_OFFSET:
case EMC_STATUS_OFFSET:
case CFG_2_OFFSET:
case CFG_DIG_DLL_OFFSET:
case DLL_XFORM_DQS_OFFSET:
case DLL_XFORM_QUSE_OFFSET:
case DIG_DLL_UPPER_STATUS_OFFSET:
case DIG_DLL_LOWER_STATUS_OFFSET:
case CTT_TERM_CTRL_OFFSET:
case ZCAL_REF_CNT_OFFSET:
case ZCAL_WAIT_CNT_OFFSET:
case ZCAL_MRW_CMD_OFFSET:
case CMDQ_OFFSET:
case FBIO_SPARE_OFFSET:
case FBIO_WRPTR_EQ_2_OFFSET:
case CLKEN_OVERRIDE_OFFSET:
case STAT_CONTROL_OFFSET:
case STAT_STATUS_OFFSET:
case STAT_LLMC_ADDR_LOW_OFFSET:
case STAT_LLMC_ADDR_HIGH_OFFSET:
case STAT_LLMC_CLOCK_LIMIT_OFFSET:
case STAT_LLMC_CLOCKS_OFFSET:
case STAT_LLMC_CONTROL_OFFSET:
case STAT_LLMC_HIST_LIMIT_OFFSET:
case STAT_LLMC_COUNT_OFFSET:
case STAT_LLMC_HIST_OFFSET:
case STAT_PWR_CLOCK_LIMIT_OFFSET:
case STAT_PWR_CLOCKS_OFFSET:
case STAT_PWR_COUNT_OFFSET:
case STAT_DRAM_CLOCK_LIMIT_LO_OFFSET:
case STAT_DRAM_CLOCK_LIMIT_HI_OFFSET:
case STAT_DRAM_CLOCKS_LO_OFFSET:
case STAT_DRAM_CLOCKS_HI_OFFSET:
case STAT_DRAM_DEV0_ACTIVATE_CNT_LO_OFFSET:
case STAT_DRAM_DEV0_ACTIVATE_CNT_HI_OFFSET:
case STAT_DRAM_DEV0_READ_CNT_LO_OFFSET:
case STAT_DRAM_DEV0_READ_CNT_HI_OFFSET:
case STAT_DRAM_DEV0_WRITE_CNT_LO_OFFSET:
case STAT_DRAM_DEV0_WRITE_CNT_HI_OFFSET:
case STAT_DRAM_DEV0_REF_CNT_LO_OFFSET:
case STAT_DRAM_DEV0_REF_CNT_HI_OFFSET:
case STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ1_LO_OFFSET:
case STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ1_HI_OFFSET:
case STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ0_LO_OFFSET:
case STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ0_HI_OFFSET:
case STAT_DRAM_DEV0_CKE_EQ1_CLKS_LO_OFFSET:
case STAT_DRAM_DEV0_CKE_EQ1_CLKS_HI_OFFSET:
case STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_LO_OFFSET:
case STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_HI_OFFSET:
case STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_LO_OFFSET:
case STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_HI_OFFSET:
case STAT_DRAM_DEV1_ACTIVATE_CNT_LO_OFFSET:
case STAT_DRAM_DEV1_ACTIVATE_CNT_HI_OFFSET:
case STAT_DRAM_DEV1_READ_CNT_LO_OFFSET:
case STAT_DRAM_DEV1_READ_CNT_HI_OFFSET:
case STAT_DRAM_DEV1_WRITE_CNT_LO_OFFSET:
case STAT_DRAM_DEV1_WRITE_CNT_HI_OFFSET:
case STAT_DRAM_DEV1_REF_CNT_LO_OFFSET:
case STAT_DRAM_DEV1_REF_CNT_HI_OFFSET:
case STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ1_LO_OFFSET:
case STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ1_HI_OFFSET:
case STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ0_LO_OFFSET:
case STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ0_HI_OFFSET:
case STAT_DRAM_DEV1_CKE_EQ1_CLKS_LO_OFFSET:
case STAT_DRAM_DEV1_CKE_EQ1_CLKS_HI_OFFSET:
case STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_LO_OFFSET:
case STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_HI_OFFSET:
case STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_LO_OFFSET:
case STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_HI_OFFSET:
case STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ1_LO_OFFSET:
case STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ1_HI_OFFSET:
case STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ0_LO_OFFSET:
case STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ0_HI_OFFSET:
case STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ1_LO_OFFSET:
case STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ1_HI_OFFSET:
case STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ0_LO_OFFSET:
case STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ0_HI_OFFSET:
case CFG_CLKTRIM_OFFSET:
case CFG_CLKTRIM_1_OFFSET:
case CFG_CLKTRIM_2_OFFSET:
return true;
default:
break;
}
return false;
}
bool EmcDev::is_undef_changed(const u_int32_t &offset,
const u_int32_t &value,
const u_int32_t &new_value) const
{
switch (offset) {
case INTSTATUS_OFFSET:
if ((value ^ new_value) & INTSTATUS_UNDEFMASK)
return true;
break;
case INTMASK_OFFSET:
if ((value ^ new_value) & INTMASK_UNDEFMASK)
return true;
break;
case DBG_OFFSET:
if ((value ^ new_value) & DBG_UNDEFMASK)
return true;
break;
case CFG_OFFSET:
if ((value ^ new_value) & CFG_UNDEFMASK)
return true;
break;
case ADR_CFG_OFFSET:
if ((value ^ new_value) & ADR_CFG_UNDEFMASK)
return true;
break;
case ADR_CFG_1_OFFSET:
if ((value ^ new_value) & ADR_CFG_1_UNDEFMASK)
return true;
break;
case REFCTRL_OFFSET:
if ((value ^ new_value) & REFCTRL_UNDEFMASK)
return true;
break;
case PIN_OFFSET:
if ((value ^ new_value) & PIN_UNDEFMASK)
return true;
break;
case TIMING_CONTROL_OFFSET:
if ((value ^ new_value) & TIMING_CONTROL_UNDEFMASK)
return true;
break;
case RC_OFFSET:
if ((value ^ new_value) & RC_UNDEFMASK)
return true;
break;
case RFC_OFFSET:
if ((value ^ new_value) & RFC_UNDEFMASK)
return true;
break;
case RAS_OFFSET:
if ((value ^ new_value) & RAS_UNDEFMASK)
return true;
break;
case RP_OFFSET:
if ((value ^ new_value) & RP_UNDEFMASK)
return true;
break;
case R2W_OFFSET:
if ((value ^ new_value) & R2W_UNDEFMASK)
return true;
break;
case W2R_OFFSET:
if ((value ^ new_value) & W2R_UNDEFMASK)
return true;
break;
case R2P_OFFSET:
if ((value ^ new_value) & R2P_UNDEFMASK)
return true;
break;
case W2P_OFFSET:
if ((value ^ new_value) & W2P_UNDEFMASK)
return true;
break;
case RD_RCD_OFFSET:
if ((value ^ new_value) & RD_RCD_UNDEFMASK)
return true;
break;
case WR_RCD_OFFSET:
if ((value ^ new_value) & WR_RCD_UNDEFMASK)
return true;
break;
case RRD_OFFSET:
if ((value ^ new_value) & RRD_UNDEFMASK)
return true;
break;
case REXT_OFFSET:
if ((value ^ new_value) & REXT_UNDEFMASK)
return true;
break;
case WDV_OFFSET:
if ((value ^ new_value) & WDV_UNDEFMASK)
return true;
break;
case QUSE_OFFSET:
if ((value ^ new_value) & QUSE_UNDEFMASK)
return true;
break;
case QRST_OFFSET:
if ((value ^ new_value) & QRST_UNDEFMASK)
return true;
break;
case QSAFE_OFFSET:
if ((value ^ new_value) & QSAFE_UNDEFMASK)
return true;
break;
case RDV_OFFSET:
if ((value ^ new_value) & RDV_UNDEFMASK)
return true;
break;
case REFRESH_OFFSET:
if ((value ^ new_value) & REFRESH_UNDEFMASK)
return true;
break;
case BURST_REFRESH_NUM_OFFSET:
if ((value ^ new_value) & BURST_REFRESH_NUM_UNDEFMASK)
return true;
break;
case PDEX2WR_OFFSET:
if ((value ^ new_value) & PDEX2WR_UNDEFMASK)
return true;
break;
case PDEX2RD_OFFSET:
if ((value ^ new_value) & PDEX2RD_UNDEFMASK)
return true;
break;
case PCHG2PDEN_OFFSET:
if ((value ^ new_value) & PCHG2PDEN_UNDEFMASK)
return true;
break;
case ACT2PDEN_OFFSET:
if ((value ^ new_value) & ACT2PDEN_UNDEFMASK)
return true;
break;
case AR2PDEN_OFFSET:
if ((value ^ new_value) & AR2PDEN_UNDEFMASK)
return true;
break;
case RW2PDEN_OFFSET:
if ((value ^ new_value) & RW2PDEN_UNDEFMASK)
return true;
break;
case TXSR_OFFSET:
if ((value ^ new_value) & TXSR_UNDEFMASK)
return true;
break;
case TCKE_OFFSET:
if ((value ^ new_value) & TCKE_UNDEFMASK)
return true;
break;
case TFAW_OFFSET:
if ((value ^ new_value) & TFAW_UNDEFMASK)
return true;
break;
case TRPAB_OFFSET:
if ((value ^ new_value) & TRPAB_UNDEFMASK)
return true;
break;
case TCLKSTABLE_OFFSET:
if ((value ^ new_value) & TCLKSTABLE_UNDEFMASK)
return true;
break;
case TCLKSTOP_OFFSET:
if ((value ^ new_value) & TCLKSTOP_UNDEFMASK)
return true;
break;
case TREFBW_OFFSET:
if ((value ^ new_value) & TREFBW_UNDEFMASK)
return true;
break;
case QUSE_EXTRA_OFFSET:
if ((value ^ new_value) & QUSE_EXTRA_UNDEFMASK)
return true;
break;
case ODT_WRITE_OFFSET:
if ((value ^ new_value) & ODT_WRITE_UNDEFMASK)
return true;
break;
case ODT_READ_OFFSET:
if ((value ^ new_value) & ODT_READ_UNDEFMASK)
return true;
break;
case MRS_OFFSET:
if ((value ^ new_value) & MRS_UNDEFMASK)
return true;
break;
case EMRS_OFFSET:
if ((value ^ new_value) & EMRS_UNDEFMASK)
return true;
break;
case REF_OFFSET:
if ((value ^ new_value) & REF_UNDEFMASK)
return true;
break;
case PRE_OFFSET:
if ((value ^ new_value) & PRE_UNDEFMASK)
return true;
break;
case NOP_OFFSET:
if ((value ^ new_value) & NOP_UNDEFMASK)
return true;
break;
case SELF_REF_OFFSET:
if ((value ^ new_value) & SELF_REF_UNDEFMASK)
return true;
break;
case DPD_OFFSET:
if ((value ^ new_value) & DPD_UNDEFMASK)
return true;
break;
case MRW_OFFSET:
if ((value ^ new_value) & MRW_UNDEFMASK)
return true;
break;
case MRR_OFFSET:
if ((value ^ new_value) & MRR_UNDEFMASK)
return true;
break;
case FBIO_CFG1_OFFSET:
if ((value ^ new_value) & FBIO_CFG1_UNDEFMASK)
return true;
break;
case FBIO_DQSIB_DLY_OFFSET:
if ((value ^ new_value) & FBIO_DQSIB_DLY_UNDEFMASK)
return true;
break;
case FBIO_DQSIB_DLY_MSB_OFFSET:
if ((value ^ new_value) & FBIO_DQSIB_DLY_MSB_UNDEFMASK)
return true;
break;
case FBIO_CFG5_OFFSET:
if ((value ^ new_value) & FBIO_CFG5_UNDEFMASK)
return true;
break;
case FBIO_QUSE_DLY_OFFSET:
if ((value ^ new_value) & FBIO_QUSE_DLY_UNDEFMASK)
return true;
break;
case FBIO_QUSE_DLY_MSB_OFFSET:
if ((value ^ new_value) & FBIO_QUSE_DLY_MSB_UNDEFMASK)
return true;
break;
case FBIO_CFG6_OFFSET:
if ((value ^ new_value) & FBIO_CFG6_UNDEFMASK)
return true;
break;
case DQS_TRIMMER_RD0_OFFSET:
if ((value ^ new_value) & DQS_TRIMMER_RD0_UNDEFMASK)
return true;
break;
case DQS_TRIMMER_RD1_OFFSET:
if ((value ^ new_value) & DQS_TRIMMER_RD1_UNDEFMASK)
return true;
break;
case DQS_TRIMMER_RD2_OFFSET:
if ((value ^ new_value) & DQS_TRIMMER_RD2_UNDEFMASK)
return true;
break;
case DQS_TRIMMER_RD3_OFFSET:
if ((value ^ new_value) & DQS_TRIMMER_RD3_UNDEFMASK)
return true;
break;
case LL_ARB_CONFIG_OFFSET:
if ((value ^ new_value) & LL_ARB_CONFIG_UNDEFMASK)
return true;
break;
case T_MIN_CRITICAL_HP_OFFSET:
if ((value ^ new_value) & T_MIN_CRITICAL_HP_UNDEFMASK)
return true;
break;
case T_MIN_CRITICAL_TIMEOUT_OFFSET:
if ((value ^ new_value) & T_MIN_CRITICAL_TIMEOUT_UNDEFMASK)
return true;
break;
case T_MIN_LOAD_OFFSET:
if ((value ^ new_value) & T_MIN_LOAD_UNDEFMASK)
return true;
break;
case T_MAX_CRITICAL_HP_OFFSET:
if ((value ^ new_value) & T_MAX_CRITICAL_HP_UNDEFMASK)
return true;
break;
case T_MAX_CRITICAL_TIMEOUT_OFFSET:
if ((value ^ new_value) & T_MAX_CRITICAL_TIMEOUT_UNDEFMASK)
return true;
break;
case T_MAX_LOAD_OFFSET:
if ((value ^ new_value) & T_MAX_LOAD_UNDEFMASK)
return true;
break;
case AUTO_CAL_CONFIG_OFFSET:
if ((value ^ new_value) & AUTO_CAL_CONFIG_UNDEFMASK)
return true;
break;
case AUTO_CAL_INTERVAL_OFFSET:
if ((value ^ new_value) & AUTO_CAL_INTERVAL_UNDEFMASK)
return true;
break;
case AUTO_CAL_STATUS_OFFSET:
if ((value ^ new_value) & AUTO_CAL_STATUS_UNDEFMASK)
return true;
break;
case REQ_CTRL_OFFSET:
if ((value ^ new_value) & REQ_CTRL_UNDEFMASK)
return true;
break;
case EMC_STATUS_OFFSET:
if ((value ^ new_value) & EMC_STATUS_UNDEFMASK)
return true;
break;
case CFG_2_OFFSET:
if ((value ^ new_value) & CFG_2_UNDEFMASK)
return true;
break;
case CFG_DIG_DLL_OFFSET:
if ((value ^ new_value) & CFG_DIG_DLL_UNDEFMASK)
return true;
break;
case DLL_XFORM_DQS_OFFSET:
if ((value ^ new_value) & DLL_XFORM_DQS_UNDEFMASK)
return true;
break;
case DLL_XFORM_QUSE_OFFSET:
if ((value ^ new_value) & DLL_XFORM_QUSE_UNDEFMASK)
return true;
break;
case DIG_DLL_UPPER_STATUS_OFFSET:
if ((value ^ new_value) & DIG_DLL_UPPER_STATUS_UNDEFMASK)
return true;
break;
case DIG_DLL_LOWER_STATUS_OFFSET:
if ((value ^ new_value) & DIG_DLL_LOWER_STATUS_UNDEFMASK)
return true;
break;
case CTT_TERM_CTRL_OFFSET:
if ((value ^ new_value) & CTT_TERM_CTRL_UNDEFMASK)
return true;
break;
case ZCAL_REF_CNT_OFFSET:
if ((value ^ new_value) & ZCAL_REF_CNT_UNDEFMASK)
return true;
break;
case ZCAL_WAIT_CNT_OFFSET:
if ((value ^ new_value) & ZCAL_WAIT_CNT_UNDEFMASK)
return true;
break;
case ZCAL_MRW_CMD_OFFSET:
if ((value ^ new_value) & ZCAL_MRW_CMD_UNDEFMASK)
return true;
break;
case CMDQ_OFFSET:
if ((value ^ new_value) & CMDQ_UNDEFMASK)
return true;
break;
case FBIO_SPARE_OFFSET:
if ((value ^ new_value) & FBIO_SPARE_UNDEFMASK)
return true;
break;
case FBIO_WRPTR_EQ_2_OFFSET:
if ((value ^ new_value) & FBIO_WRPTR_EQ_2_UNDEFMASK)
return true;
break;
case CLKEN_OVERRIDE_OFFSET:
if ((value ^ new_value) & CLKEN_OVERRIDE_UNDEFMASK)
return true;
break;
case STAT_CONTROL_OFFSET:
if ((value ^ new_value) & STAT_CONTROL_UNDEFMASK)
return true;
break;
case STAT_STATUS_OFFSET:
if ((value ^ new_value) & STAT_STATUS_UNDEFMASK)
return true;
break;
case STAT_LLMC_ADDR_LOW_OFFSET:
if ((value ^ new_value) & STAT_LLMC_ADDR_LOW_UNDEFMASK)
return true;
break;
case STAT_LLMC_ADDR_HIGH_OFFSET:
if ((value ^ new_value) & STAT_LLMC_ADDR_HIGH_UNDEFMASK)
return true;
break;
case STAT_LLMC_CLOCK_LIMIT_OFFSET:
if ((value ^ new_value) & STAT_LLMC_CLOCK_LIMIT_UNDEFMASK)
return true;
break;
case STAT_LLMC_CLOCKS_OFFSET:
if ((value ^ new_value) & STAT_LLMC_CLOCKS_UNDEFMASK)
return true;
break;
case STAT_LLMC_CONTROL_OFFSET:
if ((value ^ new_value) & STAT_LLMC_CONTROL_UNDEFMASK)
return true;
break;
case STAT_LLMC_HIST_LIMIT_OFFSET:
if ((value ^ new_value) & STAT_LLMC_HIST_LIMIT_UNDEFMASK)
return true;
break;
case STAT_LLMC_COUNT_OFFSET:
if ((value ^ new_value) & STAT_LLMC_COUNT_UNDEFMASK)
return true;
break;
case STAT_LLMC_HIST_OFFSET:
if ((value ^ new_value) & STAT_LLMC_HIST_UNDEFMASK)
return true;
break;
case STAT_PWR_CLOCK_LIMIT_OFFSET:
if ((value ^ new_value) & STAT_PWR_CLOCK_LIMIT_UNDEFMASK)
return true;
break;
case STAT_PWR_CLOCKS_OFFSET:
if ((value ^ new_value) & STAT_PWR_CLOCKS_UNDEFMASK)
return true;
break;
case STAT_PWR_COUNT_OFFSET:
if ((value ^ new_value) & STAT_PWR_COUNT_UNDEFMASK)
return true;
break;
case STAT_DRAM_CLOCK_LIMIT_LO_OFFSET:
if ((value ^ new_value) & STAT_DRAM_CLOCK_LIMIT_LO_UNDEFMASK)
return true;
break;
case STAT_DRAM_CLOCK_LIMIT_HI_OFFSET:
if ((value ^ new_value) & STAT_DRAM_CLOCK_LIMIT_HI_UNDEFMASK)
return true;
break;
case STAT_DRAM_CLOCKS_LO_OFFSET:
if ((value ^ new_value) & STAT_DRAM_CLOCKS_LO_UNDEFMASK)
return true;
break;
case STAT_DRAM_CLOCKS_HI_OFFSET:
if ((value ^ new_value) & STAT_DRAM_CLOCKS_HI_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV0_ACTIVATE_CNT_LO_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV0_ACTIVATE_CNT_LO_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV0_ACTIVATE_CNT_HI_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV0_ACTIVATE_CNT_HI_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV0_READ_CNT_LO_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV0_READ_CNT_LO_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV0_READ_CNT_HI_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV0_READ_CNT_HI_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV0_WRITE_CNT_LO_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV0_WRITE_CNT_LO_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV0_WRITE_CNT_HI_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV0_WRITE_CNT_HI_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV0_REF_CNT_LO_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV0_REF_CNT_LO_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV0_REF_CNT_HI_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV0_REF_CNT_HI_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ1_LO_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ1_LO_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ1_HI_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ1_HI_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ0_LO_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ0_LO_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ0_HI_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ0_HI_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV0_CKE_EQ1_CLKS_LO_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV0_CKE_EQ1_CLKS_LO_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV0_CKE_EQ1_CLKS_HI_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV0_CKE_EQ1_CLKS_HI_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_LO_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_LO_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_HI_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_HI_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_LO_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_LO_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_HI_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_HI_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV1_ACTIVATE_CNT_LO_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV1_ACTIVATE_CNT_LO_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV1_ACTIVATE_CNT_HI_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV1_ACTIVATE_CNT_HI_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV1_READ_CNT_LO_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV1_READ_CNT_LO_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV1_READ_CNT_HI_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV1_READ_CNT_HI_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV1_WRITE_CNT_LO_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV1_WRITE_CNT_LO_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV1_WRITE_CNT_HI_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV1_WRITE_CNT_HI_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV1_REF_CNT_LO_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV1_REF_CNT_LO_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV1_REF_CNT_HI_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV1_REF_CNT_HI_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ1_LO_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ1_LO_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ1_HI_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ1_HI_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ0_LO_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ0_LO_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ0_HI_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ0_HI_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV1_CKE_EQ1_CLKS_LO_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV1_CKE_EQ1_CLKS_LO_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV1_CKE_EQ1_CLKS_HI_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV1_CKE_EQ1_CLKS_HI_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_LO_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_LO_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_HI_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_HI_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_LO_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_LO_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_HI_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_HI_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ1_LO_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ1_LO_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ1_HI_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ1_HI_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ0_LO_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ0_LO_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ0_HI_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ0_HI_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ1_LO_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ1_LO_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ1_HI_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ1_HI_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ0_LO_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ0_LO_UNDEFMASK)
return true;
break;
case STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ0_HI_OFFSET:
if ((value ^ new_value) & STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ0_HI_UNDEFMASK)
return true;
break;
case CFG_CLKTRIM_OFFSET:
if ((value ^ new_value) & CFG_CLKTRIM_UNDEFMASK)
return true;
break;
case CFG_CLKTRIM_1_OFFSET:
if ((value ^ new_value) & CFG_CLKTRIM_1_UNDEFMASK)
return true;
break;
case CFG_CLKTRIM_2_OFFSET:
if ((value ^ new_value) & CFG_CLKTRIM_2_UNDEFMASK)
return true;
break;
default:
break;
}
return false;
}
QString EmcDev::get_register_name(const log_entry &entry) const
{
switch (entry.offset) {
case INTSTATUS_OFFSET:
return QString("INTSTATUS");
case INTMASK_OFFSET:
return QString("INTMASK");
case DBG_OFFSET:
return QString("DBG");
case CFG_OFFSET:
return QString("CFG");
case ADR_CFG_OFFSET:
return QString("ADR_CFG");
case ADR_CFG_1_OFFSET:
return QString("ADR_CFG_1");
case REFCTRL_OFFSET:
return QString("REFCTRL");
case PIN_OFFSET:
return QString("PIN");
case TIMING_CONTROL_OFFSET:
return QString("TIMING_CONTROL");
case RC_OFFSET:
return QString("RC");
case RFC_OFFSET:
return QString("RFC");
case RAS_OFFSET:
return QString("RAS");
case RP_OFFSET:
return QString("RP");
case R2W_OFFSET:
return QString("R2W");
case W2R_OFFSET:
return QString("W2R");
case R2P_OFFSET:
return QString("R2P");
case W2P_OFFSET:
return QString("W2P");
case RD_RCD_OFFSET:
return QString("RD_RCD");
case WR_RCD_OFFSET:
return QString("WR_RCD");
case RRD_OFFSET:
return QString("RRD");
case REXT_OFFSET:
return QString("REXT");
case WDV_OFFSET:
return QString("WDV");
case QUSE_OFFSET:
return QString("QUSE");
case QRST_OFFSET:
return QString("QRST");
case QSAFE_OFFSET:
return QString("QSAFE");
case RDV_OFFSET:
return QString("RDV");
case REFRESH_OFFSET:
return QString("REFRESH");
case BURST_REFRESH_NUM_OFFSET:
return QString("BURST_REFRESH_NUM");
case PDEX2WR_OFFSET:
return QString("PDEX2WR");
case PDEX2RD_OFFSET:
return QString("PDEX2RD");
case PCHG2PDEN_OFFSET:
return QString("PCHG2PDEN");
case ACT2PDEN_OFFSET:
return QString("ACT2PDEN");
case AR2PDEN_OFFSET:
return QString("AR2PDEN");
case RW2PDEN_OFFSET:
return QString("RW2PDEN");
case TXSR_OFFSET:
return QString("TXSR");
case TCKE_OFFSET:
return QString("TCKE");
case TFAW_OFFSET:
return QString("TFAW");
case TRPAB_OFFSET:
return QString("TRPAB");
case TCLKSTABLE_OFFSET:
return QString("TCLKSTABLE");
case TCLKSTOP_OFFSET:
return QString("TCLKSTOP");
case TREFBW_OFFSET:
return QString("TREFBW");
case QUSE_EXTRA_OFFSET:
return QString("QUSE_EXTRA");
case ODT_WRITE_OFFSET:
return QString("ODT_WRITE");
case ODT_READ_OFFSET:
return QString("ODT_READ");
case MRS_OFFSET:
return QString("MRS");
case EMRS_OFFSET:
return QString("EMRS");
case REF_OFFSET:
return QString("REF");
case PRE_OFFSET:
return QString("PRE");
case NOP_OFFSET:
return QString("NOP");
case SELF_REF_OFFSET:
return QString("SELF_REF");
case DPD_OFFSET:
return QString("DPD");
case MRW_OFFSET:
return QString("MRW");
case MRR_OFFSET:
return QString("MRR");
case FBIO_CFG1_OFFSET:
return QString("FBIO_CFG1");
case FBIO_DQSIB_DLY_OFFSET:
return QString("FBIO_DQSIB_DLY");
case FBIO_DQSIB_DLY_MSB_OFFSET:
return QString("FBIO_DQSIB_DLY_MSB");
case FBIO_CFG5_OFFSET:
return QString("FBIO_CFG5");
case FBIO_QUSE_DLY_OFFSET:
return QString("FBIO_QUSE_DLY");
case FBIO_QUSE_DLY_MSB_OFFSET:
return QString("FBIO_QUSE_DLY_MSB");
case FBIO_CFG6_OFFSET:
return QString("FBIO_CFG6");
case DQS_TRIMMER_RD0_OFFSET:
return QString("DQS_TRIMMER_RD0");
case DQS_TRIMMER_RD1_OFFSET:
return QString("DQS_TRIMMER_RD1");
case DQS_TRIMMER_RD2_OFFSET:
return QString("DQS_TRIMMER_RD2");
case DQS_TRIMMER_RD3_OFFSET:
return QString("DQS_TRIMMER_RD3");
case LL_ARB_CONFIG_OFFSET:
return QString("LL_ARB_CONFIG");
case T_MIN_CRITICAL_HP_OFFSET:
return QString("T_MIN_CRITICAL_HP");
case T_MIN_CRITICAL_TIMEOUT_OFFSET:
return QString("T_MIN_CRITICAL_TIMEOUT");
case T_MIN_LOAD_OFFSET:
return QString("T_MIN_LOAD");
case T_MAX_CRITICAL_HP_OFFSET:
return QString("T_MAX_CRITICAL_HP");
case T_MAX_CRITICAL_TIMEOUT_OFFSET:
return QString("T_MAX_CRITICAL_TIMEOUT");
case T_MAX_LOAD_OFFSET:
return QString("T_MAX_LOAD");
case AUTO_CAL_CONFIG_OFFSET:
return QString("AUTO_CAL_CONFIG");
case AUTO_CAL_INTERVAL_OFFSET:
return QString("AUTO_CAL_INTERVAL");
case AUTO_CAL_STATUS_OFFSET:
return QString("AUTO_CAL_STATUS");
case REQ_CTRL_OFFSET:
return QString("REQ_CTRL");
case EMC_STATUS_OFFSET:
return QString("EMC_STATUS");
case CFG_2_OFFSET:
return QString("CFG_2");
case CFG_DIG_DLL_OFFSET:
return QString("CFG_DIG_DLL");
case DLL_XFORM_DQS_OFFSET:
return QString("DLL_XFORM_DQS");
case DLL_XFORM_QUSE_OFFSET:
return QString("DLL_XFORM_QUSE");
case DIG_DLL_UPPER_STATUS_OFFSET:
return QString("DIG_DLL_UPPER_STATUS");
case DIG_DLL_LOWER_STATUS_OFFSET:
return QString("DIG_DLL_LOWER_STATUS");
case CTT_TERM_CTRL_OFFSET:
return QString("CTT_TERM_CTRL");
case ZCAL_REF_CNT_OFFSET:
return QString("ZCAL_REF_CNT");
case ZCAL_WAIT_CNT_OFFSET:
return QString("ZCAL_WAIT_CNT");
case ZCAL_MRW_CMD_OFFSET:
return QString("ZCAL_MRW_CMD");
case CMDQ_OFFSET:
return QString("CMDQ");
case FBIO_SPARE_OFFSET:
return QString("FBIO_SPARE");
case FBIO_WRPTR_EQ_2_OFFSET:
return QString("FBIO_WRPTR_EQ_2");
case CLKEN_OVERRIDE_OFFSET:
return QString("CLKEN_OVERRIDE");
case STAT_CONTROL_OFFSET:
return QString("STAT_CONTROL");
case STAT_STATUS_OFFSET:
return QString("STAT_STATUS");
case STAT_LLMC_ADDR_LOW_OFFSET:
return QString("STAT_LLMC_ADDR_LOW");
case STAT_LLMC_ADDR_HIGH_OFFSET:
return QString("STAT_LLMC_ADDR_HIGH");
case STAT_LLMC_CLOCK_LIMIT_OFFSET:
return QString("STAT_LLMC_CLOCK_LIMIT");
case STAT_LLMC_CLOCKS_OFFSET:
return QString("STAT_LLMC_CLOCKS");
case STAT_LLMC_CONTROL_OFFSET:
return QString("STAT_LLMC_CONTROL");
case STAT_LLMC_HIST_LIMIT_OFFSET:
return QString("STAT_LLMC_HIST_LIMIT");
case STAT_LLMC_COUNT_OFFSET:
return QString("STAT_LLMC_COUNT");
case STAT_LLMC_HIST_OFFSET:
return QString("STAT_LLMC_HIST");
case STAT_PWR_CLOCK_LIMIT_OFFSET:
return QString("STAT_PWR_CLOCK_LIMIT");
case STAT_PWR_CLOCKS_OFFSET:
return QString("STAT_PWR_CLOCKS");
case STAT_PWR_COUNT_OFFSET:
return QString("STAT_PWR_COUNT");
case STAT_DRAM_CLOCK_LIMIT_LO_OFFSET:
return QString("STAT_DRAM_CLOCK_LIMIT_LO");
case STAT_DRAM_CLOCK_LIMIT_HI_OFFSET:
return QString("STAT_DRAM_CLOCK_LIMIT_HI");
case STAT_DRAM_CLOCKS_LO_OFFSET:
return QString("STAT_DRAM_CLOCKS_LO");
case STAT_DRAM_CLOCKS_HI_OFFSET:
return QString("STAT_DRAM_CLOCKS_HI");
case STAT_DRAM_DEV0_ACTIVATE_CNT_LO_OFFSET:
return QString("STAT_DRAM_DEV0_ACTIVATE_CNT_LO");
case STAT_DRAM_DEV0_ACTIVATE_CNT_HI_OFFSET:
return QString("STAT_DRAM_DEV0_ACTIVATE_CNT_HI");
case STAT_DRAM_DEV0_READ_CNT_LO_OFFSET:
return QString("STAT_DRAM_DEV0_READ_CNT_LO");
case STAT_DRAM_DEV0_READ_CNT_HI_OFFSET:
return QString("STAT_DRAM_DEV0_READ_CNT_HI");
case STAT_DRAM_DEV0_WRITE_CNT_LO_OFFSET:
return QString("STAT_DRAM_DEV0_WRITE_CNT_LO");
case STAT_DRAM_DEV0_WRITE_CNT_HI_OFFSET:
return QString("STAT_DRAM_DEV0_WRITE_CNT_HI");
case STAT_DRAM_DEV0_REF_CNT_LO_OFFSET:
return QString("STAT_DRAM_DEV0_REF_CNT_LO");
case STAT_DRAM_DEV0_REF_CNT_HI_OFFSET:
return QString("STAT_DRAM_DEV0_REF_CNT_HI");
case STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ1_LO_OFFSET:
return QString("STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ1_LO");
case STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ1_HI_OFFSET:
return QString("STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ1_HI");
case STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ0_LO_OFFSET:
return QString("STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ0_LO");
case STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ0_HI_OFFSET:
return QString("STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ0_HI");
case STAT_DRAM_DEV0_CKE_EQ1_CLKS_LO_OFFSET:
return QString("STAT_DRAM_DEV0_CKE_EQ1_CLKS_LO");
case STAT_DRAM_DEV0_CKE_EQ1_CLKS_HI_OFFSET:
return QString("STAT_DRAM_DEV0_CKE_EQ1_CLKS_HI");
case STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_LO_OFFSET:
return QString("STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_LO");
case STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_HI_OFFSET:
return QString("STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_HI");
case STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_LO_OFFSET:
return QString("STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_LO");
case STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_HI_OFFSET:
return QString("STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_HI");
case STAT_DRAM_DEV1_ACTIVATE_CNT_LO_OFFSET:
return QString("STAT_DRAM_DEV1_ACTIVATE_CNT_LO");
case STAT_DRAM_DEV1_ACTIVATE_CNT_HI_OFFSET:
return QString("STAT_DRAM_DEV1_ACTIVATE_CNT_HI");
case STAT_DRAM_DEV1_READ_CNT_LO_OFFSET:
return QString("STAT_DRAM_DEV1_READ_CNT_LO");
case STAT_DRAM_DEV1_READ_CNT_HI_OFFSET:
return QString("STAT_DRAM_DEV1_READ_CNT_HI");
case STAT_DRAM_DEV1_WRITE_CNT_LO_OFFSET:
return QString("STAT_DRAM_DEV1_WRITE_CNT_LO");
case STAT_DRAM_DEV1_WRITE_CNT_HI_OFFSET:
return QString("STAT_DRAM_DEV1_WRITE_CNT_HI");
case STAT_DRAM_DEV1_REF_CNT_LO_OFFSET:
return QString("STAT_DRAM_DEV1_REF_CNT_LO");
case STAT_DRAM_DEV1_REF_CNT_HI_OFFSET:
return QString("STAT_DRAM_DEV1_REF_CNT_HI");
case STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ1_LO_OFFSET:
return QString("STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ1_LO");
case STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ1_HI_OFFSET:
return QString("STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ1_HI");
case STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ0_LO_OFFSET:
return QString("STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ0_LO");
case STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ0_HI_OFFSET:
return QString("STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ0_HI");
case STAT_DRAM_DEV1_CKE_EQ1_CLKS_LO_OFFSET:
return QString("STAT_DRAM_DEV1_CKE_EQ1_CLKS_LO");
case STAT_DRAM_DEV1_CKE_EQ1_CLKS_HI_OFFSET:
return QString("STAT_DRAM_DEV1_CKE_EQ1_CLKS_HI");
case STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_LO_OFFSET:
return QString("STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_LO");
case STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_HI_OFFSET:
return QString("STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_HI");
case STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_LO_OFFSET:
return QString("STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_LO");
case STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_HI_OFFSET:
return QString("STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_HI");
case STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ1_LO_OFFSET:
return QString("STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ1_LO");
case STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ1_HI_OFFSET:
return QString("STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ1_HI");
case STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ0_LO_OFFSET:
return QString("STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ0_LO");
case STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ0_HI_OFFSET:
return QString("STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ0_HI");
case STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ1_LO_OFFSET:
return QString("STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ1_LO");
case STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ1_HI_OFFSET:
return QString("STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ1_HI");
case STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ0_LO_OFFSET:
return QString("STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ0_LO");
case STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ0_HI_OFFSET:
return QString("STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ0_HI");
case CFG_CLKTRIM_OFFSET:
return QString("CFG_CLKTRIM");
case CFG_CLKTRIM_1_OFFSET:
return QString("CFG_CLKTRIM_1");
case CFG_CLKTRIM_2_OFFSET:
return QString("CFG_CLKTRIM_2");
default:
break;
}
qDebug() << QString().sprintf("EMC: %s: Ooops... 0x%x", __func__, entry.offset);
return QString().sprintf("Ooops... @0x%X", entry.offset);
}
void EmcDev::fill_bits_details(const u_int32_t &offset,
const u_int32_t &value, const u_int32_t &new_value)
{
switch (offset) {
case INTSTATUS_OFFSET:
fill_intstatus_details(value, new_value);
break;
case INTMASK_OFFSET:
fill_intmask_details(value, new_value);
break;
case DBG_OFFSET:
fill_dbg_details(value, new_value);
break;
case CFG_OFFSET:
fill_cfg_details(value, new_value);
break;
case ADR_CFG_OFFSET:
fill_adr_cfg_details(value, new_value);
break;
case ADR_CFG_1_OFFSET:
fill_adr_cfg_1_details(value, new_value);
break;
case REFCTRL_OFFSET:
fill_refctrl_details(value, new_value);
break;
case PIN_OFFSET:
fill_pin_details(value, new_value);
break;
case TIMING_CONTROL_OFFSET:
fill_timing_control_details(value, new_value);
break;
case RC_OFFSET:
fill_rc_details(value, new_value);
break;
case RFC_OFFSET:
fill_rfc_details(value, new_value);
break;
case RAS_OFFSET:
fill_ras_details(value, new_value);
break;
case RP_OFFSET:
fill_rp_details(value, new_value);
break;
case R2W_OFFSET:
fill_r2w_details(value, new_value);
break;
case W2R_OFFSET:
fill_w2r_details(value, new_value);
break;
case R2P_OFFSET:
fill_r2p_details(value, new_value);
break;
case W2P_OFFSET:
fill_w2p_details(value, new_value);
break;
case RD_RCD_OFFSET:
fill_rd_rcd_details(value, new_value);
break;
case WR_RCD_OFFSET:
fill_wr_rcd_details(value, new_value);
break;
case RRD_OFFSET:
fill_rrd_details(value, new_value);
break;
case REXT_OFFSET:
fill_rext_details(value, new_value);
break;
case WDV_OFFSET:
fill_wdv_details(value, new_value);
break;
case QUSE_OFFSET:
fill_quse_details(value, new_value);
break;
case QRST_OFFSET:
fill_qrst_details(value, new_value);
break;
case QSAFE_OFFSET:
fill_qsafe_details(value, new_value);
break;
case RDV_OFFSET:
fill_rdv_details(value, new_value);
break;
case REFRESH_OFFSET:
fill_refresh_details(value, new_value);
break;
case BURST_REFRESH_NUM_OFFSET:
fill_burst_refresh_num_details(value, new_value);
break;
case PDEX2WR_OFFSET:
fill_pdex2wr_details(value, new_value);
break;
case PDEX2RD_OFFSET:
fill_pdex2rd_details(value, new_value);
break;
case PCHG2PDEN_OFFSET:
fill_pchg2pden_details(value, new_value);
break;
case ACT2PDEN_OFFSET:
fill_act2pden_details(value, new_value);
break;
case AR2PDEN_OFFSET:
fill_ar2pden_details(value, new_value);
break;
case RW2PDEN_OFFSET:
fill_rw2pden_details(value, new_value);
break;
case TXSR_OFFSET:
fill_txsr_details(value, new_value);
break;
case TCKE_OFFSET:
fill_tcke_details(value, new_value);
break;
case TFAW_OFFSET:
fill_tfaw_details(value, new_value);
break;
case TRPAB_OFFSET:
fill_trpab_details(value, new_value);
break;
case TCLKSTABLE_OFFSET:
fill_tclkstable_details(value, new_value);
break;
case TCLKSTOP_OFFSET:
fill_tclkstop_details(value, new_value);
break;
case TREFBW_OFFSET:
fill_trefbw_details(value, new_value);
break;
case QUSE_EXTRA_OFFSET:
fill_quse_extra_details(value, new_value);
break;
case ODT_WRITE_OFFSET:
fill_odt_write_details(value, new_value);
break;
case ODT_READ_OFFSET:
fill_odt_read_details(value, new_value);
break;
case MRS_OFFSET:
fill_mrs_details(value, new_value);
break;
case EMRS_OFFSET:
fill_emrs_details(value, new_value);
break;
case REF_OFFSET:
fill_ref_details(value, new_value);
break;
case PRE_OFFSET:
fill_pre_details(value, new_value);
break;
case NOP_OFFSET:
fill_nop_details(value, new_value);
break;
case SELF_REF_OFFSET:
fill_self_ref_details(value, new_value);
break;
case DPD_OFFSET:
fill_dpd_details(value, new_value);
break;
case MRW_OFFSET:
fill_mrw_details(value, new_value);
break;
case MRR_OFFSET:
fill_mrr_details(value, new_value);
break;
case FBIO_CFG1_OFFSET:
fill_fbio_cfg1_details(value, new_value);
break;
case FBIO_DQSIB_DLY_OFFSET:
fill_fbio_dqsib_dly_details(value, new_value);
break;
case FBIO_DQSIB_DLY_MSB_OFFSET:
fill_fbio_dqsib_dly_msb_details(value, new_value);
break;
case FBIO_CFG5_OFFSET:
fill_fbio_cfg5_details(value, new_value);
break;
case FBIO_QUSE_DLY_OFFSET:
fill_fbio_quse_dly_details(value, new_value);
break;
case FBIO_QUSE_DLY_MSB_OFFSET:
fill_fbio_quse_dly_msb_details(value, new_value);
break;
case FBIO_CFG6_OFFSET:
fill_fbio_cfg6_details(value, new_value);
break;
case DQS_TRIMMER_RD0_OFFSET:
fill_dqs_trimmer_rd0_details(value, new_value);
break;
case DQS_TRIMMER_RD1_OFFSET:
fill_dqs_trimmer_rd1_details(value, new_value);
break;
case DQS_TRIMMER_RD2_OFFSET:
fill_dqs_trimmer_rd2_details(value, new_value);
break;
case DQS_TRIMMER_RD3_OFFSET:
fill_dqs_trimmer_rd3_details(value, new_value);
break;
case LL_ARB_CONFIG_OFFSET:
fill_ll_arb_config_details(value, new_value);
break;
case T_MIN_CRITICAL_HP_OFFSET:
fill_t_min_critical_hp_details(value, new_value);
break;
case T_MIN_CRITICAL_TIMEOUT_OFFSET:
fill_t_min_critical_timeout_details(value, new_value);
break;
case T_MIN_LOAD_OFFSET:
fill_t_min_load_details(value, new_value);
break;
case T_MAX_CRITICAL_HP_OFFSET:
fill_t_max_critical_hp_details(value, new_value);
break;
case T_MAX_CRITICAL_TIMEOUT_OFFSET:
fill_t_max_critical_timeout_details(value, new_value);
break;
case T_MAX_LOAD_OFFSET:
fill_t_max_load_details(value, new_value);
break;
case AUTO_CAL_CONFIG_OFFSET:
fill_auto_cal_config_details(value, new_value);
break;
case AUTO_CAL_INTERVAL_OFFSET:
fill_auto_cal_interval_details(value, new_value);
break;
case AUTO_CAL_STATUS_OFFSET:
fill_auto_cal_status_details(value, new_value);
break;
case REQ_CTRL_OFFSET:
fill_req_ctrl_details(value, new_value);
break;
case EMC_STATUS_OFFSET:
fill_emc_status_details(value, new_value);
break;
case CFG_2_OFFSET:
fill_cfg_2_details(value, new_value);
break;
case CFG_DIG_DLL_OFFSET:
fill_cfg_dig_dll_details(value, new_value);
break;
case DLL_XFORM_DQS_OFFSET:
fill_dll_xform_dqs_details(value, new_value);
break;
case DLL_XFORM_QUSE_OFFSET:
fill_dll_xform_quse_details(value, new_value);
break;
case DIG_DLL_UPPER_STATUS_OFFSET:
fill_dig_dll_upper_status_details(value, new_value);
break;
case DIG_DLL_LOWER_STATUS_OFFSET:
fill_dig_dll_lower_status_details(value, new_value);
break;
case CTT_TERM_CTRL_OFFSET:
fill_ctt_term_ctrl_details(value, new_value);
break;
case ZCAL_REF_CNT_OFFSET:
fill_zcal_ref_cnt_details(value, new_value);
break;
case ZCAL_WAIT_CNT_OFFSET:
fill_zcal_wait_cnt_details(value, new_value);
break;
case ZCAL_MRW_CMD_OFFSET:
fill_zcal_mrw_cmd_details(value, new_value);
break;
case CMDQ_OFFSET:
fill_cmdq_details(value, new_value);
break;
case FBIO_SPARE_OFFSET:
fill_fbio_spare_details(value, new_value);
break;
case FBIO_WRPTR_EQ_2_OFFSET:
fill_fbio_wrptr_eq_2_details(value, new_value);
break;
case CLKEN_OVERRIDE_OFFSET:
fill_clken_override_details(value, new_value);
break;
case STAT_CONTROL_OFFSET:
fill_stat_control_details(value, new_value);
break;
case STAT_STATUS_OFFSET:
fill_stat_status_details(value, new_value);
break;
case STAT_LLMC_ADDR_LOW_OFFSET:
fill_stat_llmc_addr_low_details(value, new_value);
break;
case STAT_LLMC_ADDR_HIGH_OFFSET:
fill_stat_llmc_addr_high_details(value, new_value);
break;
case STAT_LLMC_CLOCK_LIMIT_OFFSET:
fill_stat_llmc_clock_limit_details(value, new_value);
break;
case STAT_LLMC_CLOCKS_OFFSET:
fill_stat_llmc_clocks_details(value, new_value);
break;
case STAT_LLMC_CONTROL_OFFSET:
fill_stat_llmc_control_details(value, new_value);
break;
case STAT_LLMC_HIST_LIMIT_OFFSET:
fill_stat_llmc_hist_limit_details(value, new_value);
break;
case STAT_LLMC_COUNT_OFFSET:
fill_stat_llmc_count_details(value, new_value);
break;
case STAT_LLMC_HIST_OFFSET:
fill_stat_llmc_hist_details(value, new_value);
break;
case STAT_PWR_CLOCK_LIMIT_OFFSET:
fill_stat_pwr_clock_limit_details(value, new_value);
break;
case STAT_PWR_CLOCKS_OFFSET:
fill_stat_pwr_clocks_details(value, new_value);
break;
case STAT_PWR_COUNT_OFFSET:
fill_stat_pwr_count_details(value, new_value);
break;
case STAT_DRAM_CLOCK_LIMIT_LO_OFFSET:
fill_stat_dram_clock_limit_lo_details(value, new_value);
break;
case STAT_DRAM_CLOCK_LIMIT_HI_OFFSET:
fill_stat_dram_clock_limit_hi_details(value, new_value);
break;
case STAT_DRAM_CLOCKS_LO_OFFSET:
fill_stat_dram_clocks_lo_details(value, new_value);
break;
case STAT_DRAM_CLOCKS_HI_OFFSET:
fill_stat_dram_clocks_hi_details(value, new_value);
break;
case STAT_DRAM_DEV0_ACTIVATE_CNT_LO_OFFSET:
fill_stat_dram_dev0_activate_cnt_lo_details(value, new_value);
break;
case STAT_DRAM_DEV0_ACTIVATE_CNT_HI_OFFSET:
fill_stat_dram_dev0_activate_cnt_hi_details(value, new_value);
break;
case STAT_DRAM_DEV0_READ_CNT_LO_OFFSET:
fill_stat_dram_dev0_read_cnt_lo_details(value, new_value);
break;
case STAT_DRAM_DEV0_READ_CNT_HI_OFFSET:
fill_stat_dram_dev0_read_cnt_hi_details(value, new_value);
break;
case STAT_DRAM_DEV0_WRITE_CNT_LO_OFFSET:
fill_stat_dram_dev0_write_cnt_lo_details(value, new_value);
break;
case STAT_DRAM_DEV0_WRITE_CNT_HI_OFFSET:
fill_stat_dram_dev0_write_cnt_hi_details(value, new_value);
break;
case STAT_DRAM_DEV0_REF_CNT_LO_OFFSET:
fill_stat_dram_dev0_ref_cnt_lo_details(value, new_value);
break;
case STAT_DRAM_DEV0_REF_CNT_HI_OFFSET:
fill_stat_dram_dev0_ref_cnt_hi_details(value, new_value);
break;
case STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ1_LO_OFFSET:
fill_stat_dram_dev0_cumm_banks_active_cke_eq1_lo_details(value, new_value);
break;
case STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ1_HI_OFFSET:
fill_stat_dram_dev0_cumm_banks_active_cke_eq1_hi_details(value, new_value);
break;
case STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ0_LO_OFFSET:
fill_stat_dram_dev0_cumm_banks_active_cke_eq0_lo_details(value, new_value);
break;
case STAT_DRAM_DEV0_CUMM_BANKS_ACTIVE_CKE_EQ0_HI_OFFSET:
fill_stat_dram_dev0_cumm_banks_active_cke_eq0_hi_details(value, new_value);
break;
case STAT_DRAM_DEV0_CKE_EQ1_CLKS_LO_OFFSET:
fill_stat_dram_dev0_cke_eq1_clks_lo_details(value, new_value);
break;
case STAT_DRAM_DEV0_CKE_EQ1_CLKS_HI_OFFSET:
fill_stat_dram_dev0_cke_eq1_clks_hi_details(value, new_value);
break;
case STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_LO_OFFSET:
fill_stat_dram_dev0_extclks_cke_eq1_lo_details(value, new_value);
break;
case STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_HI_OFFSET:
fill_stat_dram_dev0_extclks_cke_eq1_hi_details(value, new_value);
break;
case STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_LO_OFFSET:
fill_stat_dram_dev0_extclks_cke_eq0_lo_details(value, new_value);
break;
case STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_HI_OFFSET:
fill_stat_dram_dev0_extclks_cke_eq0_hi_details(value, new_value);
break;
case STAT_DRAM_DEV1_ACTIVATE_CNT_LO_OFFSET:
fill_stat_dram_dev1_activate_cnt_lo_details(value, new_value);
break;
case STAT_DRAM_DEV1_ACTIVATE_CNT_HI_OFFSET:
fill_stat_dram_dev1_activate_cnt_hi_details(value, new_value);
break;
case STAT_DRAM_DEV1_READ_CNT_LO_OFFSET:
fill_stat_dram_dev1_read_cnt_lo_details(value, new_value);
break;
case STAT_DRAM_DEV1_READ_CNT_HI_OFFSET:
fill_stat_dram_dev1_read_cnt_hi_details(value, new_value);
break;
case STAT_DRAM_DEV1_WRITE_CNT_LO_OFFSET:
fill_stat_dram_dev1_write_cnt_lo_details(value, new_value);
break;
case STAT_DRAM_DEV1_WRITE_CNT_HI_OFFSET:
fill_stat_dram_dev1_write_cnt_hi_details(value, new_value);
break;
case STAT_DRAM_DEV1_REF_CNT_LO_OFFSET:
fill_stat_dram_dev1_ref_cnt_lo_details(value, new_value);
break;
case STAT_DRAM_DEV1_REF_CNT_HI_OFFSET:
fill_stat_dram_dev1_ref_cnt_hi_details(value, new_value);
break;
case STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ1_LO_OFFSET:
fill_stat_dram_dev1_cumm_banks_active_cke_eq1_lo_details(value, new_value);
break;
case STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ1_HI_OFFSET:
fill_stat_dram_dev1_cumm_banks_active_cke_eq1_hi_details(value, new_value);
break;
case STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ0_LO_OFFSET:
fill_stat_dram_dev1_cumm_banks_active_cke_eq0_lo_details(value, new_value);
break;
case STAT_DRAM_DEV1_CUMM_BANKS_ACTIVE_CKE_EQ0_HI_OFFSET:
fill_stat_dram_dev1_cumm_banks_active_cke_eq0_hi_details(value, new_value);
break;
case STAT_DRAM_DEV1_CKE_EQ1_CLKS_LO_OFFSET:
fill_stat_dram_dev1_cke_eq1_clks_lo_details(value, new_value);
break;
case STAT_DRAM_DEV1_CKE_EQ1_CLKS_HI_OFFSET:
fill_stat_dram_dev1_cke_eq1_clks_hi_details(value, new_value);
break;
case STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_LO_OFFSET:
fill_stat_dram_dev1_extclks_cke_eq1_lo_details(value, new_value);
break;
case STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_HI_OFFSET:
fill_stat_dram_dev1_extclks_cke_eq1_hi_details(value, new_value);
break;
case STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_LO_OFFSET:
fill_stat_dram_dev1_extclks_cke_eq0_lo_details(value, new_value);
break;
case STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_HI_OFFSET:
fill_stat_dram_dev1_extclks_cke_eq0_hi_details(value, new_value);
break;
case STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ1_LO_OFFSET:
fill_stat_dram_dev0_no_banks_active_cke_eq1_lo_details(value, new_value);
break;
case STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ1_HI_OFFSET:
fill_stat_dram_dev0_no_banks_active_cke_eq1_hi_details(value, new_value);
break;
case STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ0_LO_OFFSET:
fill_stat_dram_dev0_no_banks_active_cke_eq0_lo_details(value, new_value);
break;
case STAT_DRAM_DEV0_NO_BANKS_ACTIVE_CKE_EQ0_HI_OFFSET:
fill_stat_dram_dev0_no_banks_active_cke_eq0_hi_details(value, new_value);
break;
case STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ1_LO_OFFSET:
fill_stat_dram_dev1_no_banks_active_cke_eq1_lo_details(value, new_value);
break;
case STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ1_HI_OFFSET:
fill_stat_dram_dev1_no_banks_active_cke_eq1_hi_details(value, new_value);
break;
case STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ0_LO_OFFSET:
fill_stat_dram_dev1_no_banks_active_cke_eq0_lo_details(value, new_value);
break;
case STAT_DRAM_DEV1_NO_BANKS_ACTIVE_CKE_EQ0_HI_OFFSET:
fill_stat_dram_dev1_no_banks_active_cke_eq0_hi_details(value, new_value);
break;
case CFG_CLKTRIM_OFFSET:
fill_cfg_clktrim_details(value, new_value);
break;
case CFG_CLKTRIM_1_OFFSET:
fill_cfg_clktrim_1_details(value, new_value);
break;
case CFG_CLKTRIM_2_OFFSET:
fill_cfg_clktrim_2_details(value, new_value);
break;
default:
m_bit_details_model.bits.clear();
break;
}
}
| [
"[email protected]"
] | |
239c7a7bb784d607690f996cb11fdd14cc999339 | 24bc4990e9d0bef6a42a6f86dc783785b10dbd42 | /chrome/browser/ash/guest_os/guest_os_remover.h | 237e427a2719815825676cf2a206729ab9f8a78b | [
"BSD-3-Clause"
] | permissive | nwjs/chromium.src | 7736ce86a9a0b810449a3b80a4af15de9ef9115d | 454f26d09b2f6204c096b47f778705eab1e3ba46 | refs/heads/nw75 | 2023-08-31T08:01:39.796085 | 2023-04-19T17:25:53 | 2023-04-19T17:25:53 | 50,512,158 | 161 | 201 | BSD-3-Clause | 2023-05-08T03:19:09 | 2016-01-27T14:17:03 | null | UTF-8 | C++ | false | false | 1,584 | h | // Copyright 2018 The Chromium Authors
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
#ifndef CHROME_BROWSER_ASH_GUEST_OS_GUEST_OS_REMOVER_H_
#define CHROME_BROWSER_ASH_GUEST_OS_GUEST_OS_REMOVER_H_
#include <string>
#include "base/functional/callback.h"
#include "base/memory/ref_counted.h"
#include "chrome/browser/ash/guest_os/public/types.h"
#include "chromeos/ash/components/dbus/concierge/concierge_service.pb.h"
#include "third_party/abseil-cpp/absl/types/optional.h"
class Profile;
namespace guest_os {
class GuestOsRemover : public base::RefCountedThreadSafe<GuestOsRemover> {
public:
enum class Result {
kSuccess,
kStopVmNoResponse,
kStopVmFailed,
kDestroyDiskImageFailed,
};
GuestOsRemover(Profile* profile,
guest_os::VmType vm_type,
std::string vm_name,
base::OnceCallback<void(Result)> callback);
GuestOsRemover(const GuestOsRemover&) = delete;
GuestOsRemover& operator=(const GuestOsRemover&) = delete;
void RemoveVm();
private:
friend class base::RefCountedThreadSafe<GuestOsRemover>;
~GuestOsRemover();
void StopVmFinished(
absl::optional<vm_tools::concierge::StopVmResponse> response);
void DestroyDiskImageFinished(
absl::optional<vm_tools::concierge::DestroyDiskImageResponse> response);
Profile* profile_;
guest_os::VmType vm_type_;
std::string vm_name_;
base::OnceCallback<void(Result)> callback_;
};
} // namespace guest_os
#endif // CHROME_BROWSER_ASH_GUEST_OS_GUEST_OS_REMOVER_H_
| [
"[email protected]"
] | |
5e097609b883c4fb5c96c104bcee1b250036ca9a | 30bdd8ab897e056f0fb2f9937dcf2f608c1fd06a | /Codes/AC/3725.cpp | 8158e232ba4d086e4cdcc5bd6e59cce674d89be8 | [] | no_license | thegamer1907/Code_Analysis | 0a2bb97a9fb5faf01d983c223d9715eb419b7519 | 48079e399321b585efc8a2c6a84c25e2e7a22a61 | refs/heads/master | 2020-05-27T01:20:55.921937 | 2019-11-20T11:15:11 | 2019-11-20T11:15:11 | 188,403,594 | 2 | 1 | null | null | null | null | UTF-8 | C++ | false | false | 1,226 | cpp | #include<bits/stdc++.h>
#define x first
#define y second
#define pb push_back
#define mp make_pair
#define all(v) v.begin(), v.end()
#define up_b upper_bound
#define low_b lower_bound
using namespace std;
typedef long long ll;
typedef long double ld;
const int N = 1e+6 + 5;
const ll inf = 4e+18;
const ll mod = 1e+9 + 7;
const int CNT = 1e6 + 5;
inline void boost() {
ios_base :: sync_with_stdio(0);
cin.tie(0), cout.tie(0);
}
int main() {
boost();
string s;
int nb, ns, nc, pb, ps, pc;
ll R;
cin >> s;
cin >> nb >> ns >> nc >> pb >> ps >> pc;
cin >> R;
int cb, cs, cc;
cb = cs = cc = 0;
for(int i = 0; i < s.size(); i++){
cb += s[i] == 'B';
cs += s[i] == 'S';
cc += s[i] == 'C';
}
ll l = 0, r = 1e14;
while(l < r){
ll m = (l + r) / 2;
ll cost = max(0ll, m * cb - nb) * pb + max(0ll, m * cs - ns) * ps + max(0ll, m * cc - nc) * pc;
if(cost < R)l = m + 1;
else r = m;
}
if(max(0ll, r * cb - nb) * pb + max(0ll, r * cs - ns) * ps + max(0ll, r * cc - nc) * pc <= R)cout << r;
else cout << l - 1;
}
| [
"[email protected]"
] | |
c26f605d04a6835812ba43fed74352d2009379d9 | 154af226e35a9ba52db9560eca50b07f5ed661fd | /Aaron/Assignment03Aaron/Executables/MyTTDM_Exec2.cpp | cf40351935b7d7b3f46cd4306937e610d9dd3ff4 | [] | no_license | jeffdk/SpecClass2011 | 9492e7386ef03914f2867391c3e5c3a7344bedd4 | 8598c47f3e99e6317285213d2c466eb9715c16fb | refs/heads/master | 2016-09-06T03:33:20.952155 | 2012-09-10T22:29:27 | 2012-09-10T22:29:27 | 1,931,578 | 18 | 3 | null | null | null | null | UTF-8 | C++ | false | false | 1,100 | cpp | #include "DataMesh.hpp"
#include "Tensor.hpp"
#include <cstdlib>
int main(void) {
const Mesh m(IPoint(MV::fill,3,3,3));
const TensorStructure sPsi(4,"11"); // rank-2, symmetric, 3+1
Tensor<DataMesh> Psi(sPsi,m,0); // metric
for(int k=1;k<Psi.Dim();++k) Psi(k,k) = 1;
Psi(0,0) = -1;
// for the 1st derivative index: we need a rank-1 structure, i.e.,
// we have SOMETHING_{,k}, the derivative of SOMETHING has a single index
const TensorStructure sd1(3,"1"); // rank-1, 3D
Tensor<Tensor<DataMesh> > dPsi(sPsi, sd1, m, 0);
// for the indices of a 2nd derivative we want to enforce symmetry
// in the derivative indices as well
const TensorStructure sd2(3,"11"); // rank-1, 3D
Tensor<Tensor<DataMesh> > d2Psi(sPsi, sd2, m, 0);
// you can refer to these derivatives as dPsi(i,j)(k) or d2Psi(i,j)(m,n)
std::cout << "psitt_x= "<<dPsi(0,0)(0) << "\n";
std::cout << "psixx_yz = " << d2Psi(1,1)(1,2) << "\n";
return EXIT_SUCCESS;
}
| [
"[email protected]"
] | |
62c0a6bc39d004b21d91dd0dbbd1c018a969bee7 | 3cc827c0a3fb7e60171744082e916a02639d1840 | /drizzle.cc | 2f1794fd32dea06d603d59694652c95c1ca3f0c8 | [] | no_license | longlong2010/php-drizzle | 49a42e4c55e46ab405e9691e81c7478fefcfd389 | 6a049bd6960f39b14b9ba03f5e95606f225b2a5c | refs/heads/master | 2021-01-10T08:17:15.515575 | 2013-03-06T01:43:09 | 2013-03-06T01:43:09 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 17,821 | cc | /*
+----------------------------------------------------------------------+
| PHP Version 5 |
+----------------------------------------------------------------------+
| Copyright (c) 1997-2010 The PHP Group |
+----------------------------------------------------------------------+
| This source file is subject to version 3.01 of the PHP license, |
| that is bundled with this package in the file LICENSE, and is |
| available through the world-wide-web at the following url: |
| http://www.php.net/license/3_01.txt |
| If you did not receive a copy of the PHP license and are unable to |
| obtain it through the world-wide-web, please send a note to |
| [email protected] so we can mail you a copy immediately. |
+----------------------------------------------------------------------+
| Author: |
+----------------------------------------------------------------------+
*/
/* $Id: header 297205 2010-03-30 21:09:07Z johannes $ */
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
extern "C" {
#include "php.h"
#include "php_ini.h"
#include "ext/standard/info.h"
#include "php_drizzle.h"
#include <libdrizzle-5.1/libdrizzle.h>
}
/* If you declare any globals in php_drizzle.h uncomment this:
ZEND_DECLARE_MODULE_GLOBALS(drizzle)
*/
/* True global resources - no need for thread safety here */
static int le_drizzle;
static int le_drizzle_binlog;
static int le_drizzle_binlog_event;
typedef struct _php_drizzle {
drizzle_st* conn;
} php_drizzle;
typedef struct _php_drizzle_binlog_callback {
zval* event_func;
zval* error_func;
zval* arg;
} php_drizzle_binlog_callback;
typedef struct _php_drizzle_binlog {
drizzle_binlog_st* binlog;
php_drizzle_binlog_callback* callback;
} php_drizzle_binlog;
typedef struct _php_drizzle_binlog_event {
drizzle_binlog_event_st* event;
} php_drizzle_binlog_event;
/* {{{ drizzle_functions[]
*
* Every user visible function must have an entry in drizzle_functions[].
*/
ZEND_BEGIN_ARG_INFO_EX(arginfo_drizzle_binlog_init, 0, 0, 3)
ZEND_ARG_INFO(0, conn)
ZEND_ARG_INFO(0, event_callback)
ZEND_ARG_INFO(0, error_callback)
ZEND_ARG_INFO(1, arg)
ZEND_END_ARG_INFO()
const zend_function_entry drizzle_functions[] = {
PHP_FE(drizzle_create, NULL)
PHP_FE(drizzle_quit, NULL)
PHP_FE(drizzle_strerror, NULL)
PHP_FE(drizzle_binlog_init, arginfo_drizzle_binlog_init)
PHP_FE(drizzle_binlog_start, NULL)
PHP_FE(drizzle_binlog_event_type, NULL)
PHP_FE(drizzle_binlog_event_server_id, NULL)
PHP_FE(drizzle_binlog_event_length, NULL)
PHP_FE(drizzle_binlog_event_timestamp, NULL)
PHP_FE(drizzle_binlog_event_data, NULL)
PHP_FE_END
};
/* }}} */
/* {{{ drizzle_module_entry
*/
zend_module_entry drizzle_module_entry = {
#if ZEND_MODULE_API_NO >= 20010901
STANDARD_MODULE_HEADER,
#endif
"drizzle",
drizzle_functions,
PHP_MINIT(drizzle),
PHP_MSHUTDOWN(drizzle),
PHP_RINIT(drizzle), /* Replace with NULL if there's nothing to do at request start */
PHP_RSHUTDOWN(drizzle), /* Replace with NULL if there's nothing to do at request end */
PHP_MINFO(drizzle),
#if ZEND_MODULE_API_NO >= 20010901
"0.1", /* Replace with version number for your extension */
#endif
STANDARD_MODULE_PROPERTIES
};
/* }}} */
#ifdef COMPILE_DL_DRIZZLE
ZEND_GET_MODULE(drizzle)
#endif
/* {{{ PHP_INI
*/
/* Remove comments and fill if you need to have entries in php.ini
PHP_INI_BEGIN()
STD_PHP_INI_ENTRY("drizzle.global_value", "42", PHP_INI_ALL, OnUpdateLong, global_value, zend_drizzle_globals, drizzle_globals)
STD_PHP_INI_ENTRY("drizzle.global_string", "foobar", PHP_INI_ALL, OnUpdateString, global_string, zend_drizzle_globals, drizzle_globals)
PHP_INI_END()
*/
/* }}} */
/* {{{ php_drizzle_init_globals
*/
/* Uncomment this function if you have INI entries
static void php_drizzle_init_globals(zend_drizzle_globals *drizzle_globals)
{
drizzle_globals->global_value = 0;
drizzle_globals->global_string = NULL;
}
*/
/* }}} */
static void _drizzle_quit(zend_rsrc_list_entry* rsrc TSRMLS_DC) {
php_drizzle* drizzle = (php_drizzle*) rsrc->ptr;
//drizzle_quit(drizzle->conn);
efree(drizzle);
}
static void _drizzle_binlog_free(zend_rsrc_list_entry* rsrc TSRMLS_DC) {
php_drizzle_binlog* binlog = (php_drizzle_binlog*) rsrc->ptr;
drizzle_binlog_free(binlog->binlog);
efree(binlog->callback);
efree(binlog);
}
static void _drizzle_binlog_event_free(zend_rsrc_list_entry* rsrc TSRMLS_DC) {
php_drizzle_binlog_event* event = (php_drizzle_binlog_event*) rsrc->ptr;
efree(event);
}
/* {{{ PHP_MINIT_FUNCTION
*/
PHP_MINIT_FUNCTION(drizzle)
{
/* If you have INI entries, uncomment these lines
REGISTER_INI_ENTRIES();
*/
le_drizzle = zend_register_list_destructors_ex(_drizzle_quit, NULL, "drizzle", module_number);
le_drizzle_binlog = zend_register_list_destructors_ex(_drizzle_binlog_free, NULL, "drizzle_binlog", module_number);
le_drizzle_binlog_event = zend_register_list_destructors_ex(_drizzle_binlog_event_free, NULL, "drizzle_binlog_event", module_number);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_UNKNOWN", DRIZZLE_EVENT_TYPE_UNKNOWN, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_START", DRIZZLE_EVENT_TYPE_START, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_QUERY", DRIZZLE_EVENT_TYPE_QUERY, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_STOP", DRIZZLE_EVENT_TYPE_STOP, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_ROTATE", DRIZZLE_EVENT_TYPE_ROTATE, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_INTVAR", DRIZZLE_EVENT_TYPE_INTVAR, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_LOAD", DRIZZLE_EVENT_TYPE_LOAD, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_SLAVE", DRIZZLE_EVENT_TYPE_SLAVE, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_CREATE_FILE", DRIZZLE_EVENT_TYPE_CREATE_FILE, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_APPEND_BLOCK", DRIZZLE_EVENT_TYPE_APPEND_BLOCK, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_EXEC_LOAD", DRIZZLE_EVENT_TYPE_EXEC_LOAD, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_DELETE_FILE", DRIZZLE_EVENT_TYPE_DELETE_FILE, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_NEW_LOAD", DRIZZLE_EVENT_TYPE_NEW_LOAD, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_RAND", DRIZZLE_EVENT_TYPE_RAND, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_USER_VAR", DRIZZLE_EVENT_TYPE_USER_VAR, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_FORMAT_DESCRIPTION", DRIZZLE_EVENT_TYPE_FORMAT_DESCRIPTION, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_XID", DRIZZLE_EVENT_TYPE_XID, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_BEGIN_LOAD_QUERY", DRIZZLE_EVENT_TYPE_BEGIN_LOAD_QUERY, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_EXECUTE_LOAD_QUERY", DRIZZLE_EVENT_TYPE_EXECUTE_LOAD_QUERY, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_TABLE_MAP", DRIZZLE_EVENT_TYPE_TABLE_MAP, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_OBSOLETE_WRITE_ROWS", DRIZZLE_EVENT_TYPE_OBSOLETE_WRITE_ROWS, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_OBSOLETE_UPDATE_ROWS", DRIZZLE_EVENT_TYPE_OBSOLETE_UPDATE_ROWS, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_OBSOLETE_DELETE_ROWS", DRIZZLE_EVENT_TYPE_OBSOLETE_DELETE_ROWS, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_V1_WRITE_ROWS", DRIZZLE_EVENT_TYPE_V1_WRITE_ROWS, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_V1_UPDATE_ROWS", DRIZZLE_EVENT_TYPE_V1_UPDATE_ROWS, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_V1_DELETE_ROWS", DRIZZLE_EVENT_TYPE_V1_DELETE_ROWS, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_INCIDENT", DRIZZLE_EVENT_TYPE_INCIDENT, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_HEARTBEAT", DRIZZLE_EVENT_TYPE_HEARTBEAT, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_IGNORABLE", DRIZZLE_EVENT_TYPE_IGNORABLE, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_ROWS_QUERY", DRIZZLE_EVENT_TYPE_ROWS_QUERY, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_V2_WRITE_ROWS", DRIZZLE_EVENT_TYPE_V2_WRITE_ROWS, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_V2_UPDATE_ROWS", DRIZZLE_EVENT_TYPE_V2_UPDATE_ROWS, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_V2_DELETE_ROWS", DRIZZLE_EVENT_TYPE_V2_DELETE_ROWS, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_GTID", DRIZZLE_EVENT_TYPE_GTID, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_ANONYMOUS_GTID", DRIZZLE_EVENT_TYPE_ANONYMOUS_GTID, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_PREVIOUS_GTIDS", DRIZZLE_EVENT_TYPE_PREVIOUS_GTIDS, CONST_CS | CONST_PERSISTENT);
REGISTER_LONG_CONSTANT("DRIZZLE_EVENT_TYPE_END", DRIZZLE_EVENT_TYPE_END, CONST_CS | CONST_PERSISTENT);
return SUCCESS;
}
/* }}} */
/* {{{ PHP_MSHUTDOWN_FUNCTION
*/
PHP_MSHUTDOWN_FUNCTION(drizzle)
{
/* uncomment this line if you have INI entries
UNREGISTER_INI_ENTRIES();
*/
return SUCCESS;
}
/* }}} */
/* Remove if there's nothing to do at request start */
/* {{{ PHP_RINIT_FUNCTION
*/
PHP_RINIT_FUNCTION(drizzle)
{
return SUCCESS;
}
/* }}} */
/* Remove if there's nothing to do at request end */
/* {{{ PHP_RSHUTDOWN_FUNCTION
*/
PHP_RSHUTDOWN_FUNCTION(drizzle)
{
return SUCCESS;
}
/* }}} */
/* {{{ PHP_MINFO_FUNCTION
*/
PHP_MINFO_FUNCTION(drizzle)
{
php_info_print_table_start();
php_info_print_table_header(2, "drizzle support", "enabled");
php_info_print_table_end();
/* Remove comments if you have entries in php.ini
DISPLAY_INI_ENTRIES();
*/
}
/* }}} */
/* Remove the following function when you have succesfully modified config.m4
so that your module can be compiled into PHP, it exists only for testing
purposes. */
/* Every user-visible function in PHP should document itself in the source */
/* {{{ proto string confirm_drizzle_compiled(string arg)
Return a string to confirm that the module is compiled in */
PHP_FUNCTION(drizzle_create) {
const char* host;
const char* user;
const char* password;
const char* db;
int host_len, user_len, password_len, db_len;
long port;
php_drizzle* drizzle;
if (zend_parse_parameters(ZEND_NUM_ARGS() TSRMLS_CC, "slsss", &host, &host_len, &port, &user, &user_len, &password, &password_len, &db, &db_len)) {
return;
}
drizzle = (php_drizzle*) emalloc(sizeof(php_drizzle));
drizzle->conn = drizzle_create(host, port, user, password, db, NULL);
ZEND_REGISTER_RESOURCE(return_value, drizzle, le_drizzle);
}
PHP_FUNCTION(drizzle_quit) {
zval* zdrizzle;
if (zend_parse_parameters(ZEND_NUM_ARGS() TSRMLS_CC, "r", &zdrizzle) == FAILURE) {
return;
}
php_drizzle* drizzle;
ZEND_FETCH_RESOURCE(drizzle, php_drizzle*, &zdrizzle, -1, "drizzle", le_drizzle);
long rc = drizzle_quit(drizzle->conn);
RETURN_LONG(rc);
}
PHP_FUNCTION(drizzle_strerror) {
long error_code;
if (zend_parse_parameters(ZEND_NUM_ARGS() TSRMLS_CC, "l", &error_code) == FAILURE) {
return;
}
const char* error_str = drizzle_strerror((drizzle_return_t)error_code);
RETURN_STRING(error_str, 1);
}
static void _php_drizzle_binlog_event_callback(drizzle_binlog_event_st* event, void* arg) {
zval* args[2];
zval retval;
php_drizzle_binlog_event* ev;
php_drizzle_binlog_callback* callback = (php_drizzle_binlog_callback*) arg;
ev = (php_drizzle_binlog_event*) emalloc(sizeof(php_drizzle_binlog_event));
ev->event = event;
MAKE_STD_ZVAL(args[0]);
ZEND_REGISTER_RESOURCE(args[0], ev, le_drizzle_binlog_event);
args[1] = callback->arg;
Z_ADDREF_P(callback->arg);
if (call_user_function(EG(function_table), NULL, callback->event_func, &retval, 2, args TSRMLS_CC) == SUCCESS) {
zval_dtor(&retval);
}
zval_ptr_dtor(&(args[0]));
zval_ptr_dtor(&(args[0]));
}
static void _php_drizzle_binlog_error_callback(drizzle_return_t ret, drizzle_st* conn, void* arg) {
zval* args[2];
zval retval;
php_drizzle_binlog_callback* callback = (php_drizzle_binlog_callback*) arg;
MAKE_STD_ZVAL(args[0]);
ZVAL_LONG(args[0], ret);
args[1] = callback->arg;
Z_ADDREF_P(callback->arg);
if (call_user_function(EG(function_table), NULL, callback->error_func, &retval, 2, args TSRMLS_CC) == SUCCESS) {
zval_dtor(&retval);
}
zval_ptr_dtor(&(args[0]));
zval_ptr_dtor(&(args[0]));
}
PHP_FUNCTION(drizzle_binlog_init) {
zval* zdrizzle;
zval* zevent_callback;
zval* zerror_callback;
zval* zarg = NULL;
php_drizzle* drizzle;
php_drizzle_binlog* binlog;
char* event_func_name;
char* error_func_name;
php_drizzle_binlog_callback* callback;
bool verify_checksums = true;
if (zend_parse_parameters(ZEND_NUM_ARGS() TSRMLS_CC, "rzz|zb", &zdrizzle, &zevent_callback, &zerror_callback, &zarg, &verify_checksums) == FAILURE) {
return;
}
if (!zend_is_callable(zevent_callback, 0, &event_func_name TSRMLS_CC)) {
php_error_docref(NULL TSRMLS_CC, E_WARNING, "'%s' is not a valid callback", event_func_name);
efree(event_func_name);
RETURN_FALSE;
}
if (!zend_is_callable(zerror_callback, 0, &error_func_name TSRMLS_CC)) {
php_error_docref(NULL TSRMLS_CC, E_WARNING, "'%s' is not a valid callback", error_func_name);
efree(error_func_name);
RETURN_FALSE;
}
efree(event_func_name);
efree(error_func_name);
zval_add_ref(&zevent_callback);
zval_add_ref(&zerror_callback);
if (zarg) {
zval_add_ref(&zarg);
} else {
ALLOC_INIT_ZVAL(zarg);
}
ZEND_FETCH_RESOURCE(drizzle, php_drizzle*, &zdrizzle, -1, "drizzle", le_drizzle);
callback = (php_drizzle_binlog_callback*) emalloc(sizeof(php_drizzle_binlog_callback));
callback->event_func = zevent_callback;
callback->error_func = zerror_callback;
callback->arg = zarg;
binlog = (php_drizzle_binlog*) emalloc(sizeof(php_drizzle_binlog));
binlog->binlog = drizzle_binlog_init(drizzle->conn, _php_drizzle_binlog_event_callback, _php_drizzle_binlog_error_callback, callback, verify_checksums);
binlog->callback = callback;
ZEND_REGISTER_RESOURCE(return_value, binlog, le_drizzle_binlog);
}
PHP_FUNCTION(drizzle_binlog_start) {
zval* zbinlog;
long server_id;
const char* log_file;
int log_file_len;
long log_pos;
php_drizzle_binlog* binlog;
if (zend_parse_parameters(ZEND_NUM_ARGS() TSRMLS_CC, "rlsl", &zbinlog, &server_id, &log_file, &log_file_len, &log_pos) == FAILURE) {
return;
}
ZEND_FETCH_RESOURCE(binlog, php_drizzle_binlog*, &zbinlog, -1, "drizzle_binlog", le_drizzle_binlog);
long rc = drizzle_binlog_start(binlog->binlog, server_id, log_file, log_pos);
RETURN_LONG(rc);
}
PHP_FUNCTION(drizzle_binlog_free) {
zval* zbinlog;
if (zend_parse_parameters(ZEND_NUM_ARGS() TSRMLS_CC, "r", &zbinlog) == FAILURE) {
return;
}
zend_list_delete(Z_RESVAL_P(zbinlog));
RETURN_TRUE;
}
#define DRIZZLE_FETCH_BINLOG_EVENT() \
zval* zbinlog_event;\
php_drizzle_binlog_event* binlog_event;\
if (zend_parse_parameters(ZEND_NUM_ARGS() TSRMLS_CC, "r", &zbinlog_event) == FAILURE) {\
return;\
}\
ZEND_FETCH_RESOURCE(binlog_event, php_drizzle_binlog_event*, &zbinlog_event, -1, "drizzle_binlog_event", le_drizzle_binlog_event);
PHP_FUNCTION(drizzle_binlog_event_type) {
DRIZZLE_FETCH_BINLOG_EVENT();
long event_type = drizzle_binlog_event_type(binlog_event->event);
RETURN_LONG(event_type);
}
PHP_FUNCTION(drizzle_binlog_event_server_id) {
DRIZZLE_FETCH_BINLOG_EVENT();
long server_id = drizzle_binlog_event_server_id(binlog_event->event);
RETURN_LONG(server_id);
}
PHP_FUNCTION(drizzle_binlog_event_length) {
DRIZZLE_FETCH_BINLOG_EVENT();
long event_length = drizzle_binlog_event_length(binlog_event->event);
RETURN_LONG(event_length);
}
PHP_FUNCTION(drizzle_binlog_event_timestamp) {
DRIZZLE_FETCH_BINLOG_EVENT();
long timestamp = drizzle_binlog_event_timestamp(binlog_event->event);
RETURN_LONG(timestamp);
}
PHP_FUNCTION(drizzle_binlog_event_data) {
DRIZZLE_FETCH_BINLOG_EVENT();
const char* data = (char*) drizzle_binlog_event_data(binlog_event->event);
long event_length = drizzle_binlog_event_length(binlog_event->event);
RETURN_STRINGL(data, event_length, 1);
}
/* }}} */
/* The previous line is meant for vim and emacs, so it can correctly fold and
unfold functions in source code. See the corresponding marks just before
function definition, where the functions purpose is also documented. Please
follow this convention for the convenience of others editing your code.
*/
/*
* Local variables:
* tab-width: 4
* c-basic-offset: 4
* End:
* vim600: noet sw=4 ts=4 fdm=marker
* vim<600: noet sw=4 ts=4
*/
| [
"[email protected]"
] | |
74b679bd284c9fb996a510fd36933e33aa2e380b | 7c9c0ee210f2291843e1bd843868da6f7e6d8285 | /c++/Contests/leetcode_algorithms/K_similarStrings.cpp | df0d0f6474d54b3d2af77b72b4e7cf5c64ff2e49 | [] | no_license | ConstantTime/Algorival | b9496ddaa5271aaabd1acca041fc06a6d1632908 | ad9afd7530cfc366fcaac79e9faa3df6c8b4bf08 | refs/heads/master | 2020-07-20T03:54:11.435156 | 2019-11-05T13:12:44 | 2019-11-05T13:12:44 | 206,568,059 | 2 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 679 | cpp | #include <bits/stdc++.h>
using namespace std;
typedef long long ll;
typedef long double ld;
typedef pair < int , pair < int , int > > mp;
#define rep(i , j , n) for(long long i = j ; i <= n ; i++)
#define per(i , j , n) for(long long i = j ; i >= n ; i--)
const long long N = 153456;
const long long mod = 1e18 + 7;
const long double eps = 1e-6;
const long double pi = 3.1415926535;
class Solution {
public:
int kSimilarity(string A, string B) {
int m = A.length();
int n = B.length();
}
};
int main() {
ios_base::sync_with_stdio(false);
cin.tie(NULL);
cout << fixed << setprecision(12);
return 0;
}
| [
"[email protected]"
] | |
e9ef2ed6ce909f483823f966c18a3c86f3997129 | e5e7fa50251f5ee5926f3e43ce9d80da8b49c397 | /Classes/View/GameScene/GameOver/GameOverLayer.cpp | 38063da7fd630b73c257fe3ef2ea8d034e8fa03c | [] | no_license | diyal9/HZDDZ | 06f04e246b836ed4404ebdd36ad84f297d0b7edb | 882d0f643224ea7b250ff2f9274a1a19a2ce0679 | refs/heads/master | 2020-03-25T08:43:12.132045 | 2018-08-05T17:14:46 | 2018-08-05T17:37:35 | 143,629,163 | 1 | 1 | null | null | null | null | UTF-8 | C++ | false | false | 16,783 | cpp | #include "GameOverLayer.h"
#include "WWMacros.h"
#include "BaseCore/WWBGUI/WWTouchSprite.h"
#include "GameOverLayerRes.h"
#include "../../Common/CommLayer/CommDialog.h"
#include "../../../Model/WWDataModel/WWGameData/GameCommonData.h"
#include "../GameLogicManager.h"
#include "BaseCore/WWBTools/StringTool.h"
#include "Model/WWDataModel/WWUserData/UserData.h"
#include "Control/WWCSound/GameSoundManager.h"
USING_NS_CC;
GameOverLayer::GameOverLayer(void) :
m_times(15)
{
}
GameOverLayer::~GameOverLayer()
{
}
void GameOverLayer::onEnter()
{
LayerColor::onEnter();
//禁止触摸穿透
auto m_pListner = EventListenerTouchOneByOne::create();
m_pListner->onTouchBegan = CC_CALLBACK_2(GameOverLayer::onTouchBegan, this);
m_pListner->setSwallowTouches(true);
_eventDispatcher->addEventListenerWithSceneGraphPriority(m_pListner,this);
SpriteFrameCache::getInstance()->addSpriteFramesWithFile(game_over_plist);
}
void GameOverLayer::onExit()
{
_eventDispatcher->removeEventListenersForTarget(this);
LayerColor::onExit();
//资源释放
SpriteFrameCache::getInstance()->removeSpriteFramesFromFile(game_over_plist);
}
GameOverLayer* GameOverLayer::create(cocos2d::Ref* objectData)
{
GameOverLayer* pItem = new GameOverLayer();
if(pItem && pItem->init(objectData))
{
pItem->autorelease();
return pItem;
}
else
{
CC_SAFE_DELETE(pItem);
return NULL;
}
}
bool GameOverLayer::init(cocos2d::Ref* objectData)
{
if (!WWFrameBase::init()) return false;
SpriteFrameCache::getInstance()->addSpriteFramesWithFile(game_over_plist);
createView(objectData);
return true;
}
void GameOverLayer::createView(cocos2d::Ref* objectData)
{
do{
GameOverCommonData* gameOverData = (GameOverCommonData*) objectData;
if(gameOverData == NULL)return;
//得到自己的 index
int selfIndex = 0;
for (int i = 0; i < gameOverData->getUserIds().size(); ++i)
{
if(UserData::getInstance()->getIntValue(INT_USER_ID) == gameOverData->getUserIds()[i])
{
selfIndex = i;
break;
}
}
int rightIndex = selfIndex + 1 > 2 ? 0 : selfIndex + 1;
int leftIndex = selfIndex - 1 < 0 ? 2 : selfIndex - 1;
//背景
auto bg = this->getpBg();
bg->setPosition(POSTIONS_IMG[0]);
if (gameOverData->getPlayResults()[selfIndex] == 1)
bg->setSpriteFrame("go_win_bg.png");//bg->setTexture(winBg);
else
bg->setSpriteFrame("go_lose_bg.png");//bg->setTexture(loseBg);
//关闭按钮
auto closeBtn = this->getpClose();
closeBtn->setPosition(POSTIONS_IMG[2]);
//形象
auto man = Sprite::createWithSpriteFrameName("go_lord_win_bg.png");
CC_BREAK_IF(!man);
man->setPosition(POSTIONS_IMG[1]);
bg->addChild(man, BASIC_ZORDER_ROOT);
if (gameOverData->getUserIds()[selfIndex] == GameLogicManager::getInstance()->getLandLordId())//判断自己是否是地主
{
if (gameOverData->getPlayResults()[selfIndex] == 1)//判断是赢是输
{
man->setSpriteFrame("go_lord_win_bg.png");//man->setTexture(lordWinBigImg);
}
else
{
man->setSpriteFrame("go_lord_lose_bg.png");//man->setTexture(lordLoseBigImg);
}
}
else
{
if (gameOverData->getPlayResults()[selfIndex] == 1)
{
man->setSpriteFrame("go_farmer_win_bg.png");//man->setTexture(farmerWinBigImg);
}
else
{
man->setSpriteFrame("go_farmer_lose_bg.png");//man->setTexture(farmerLoseBigImg);
}
}
//金币icon
auto beanIcon = Sprite::createWithSpriteFrameName("go_gold_icon.png");
CC_BREAK_IF(!beanIcon);
beanIcon->setPosition(POSTIONS_IMG[3]);
bg->addChild(beanIcon, BASIC_ZORDER_ROOT);
//升级背景
auto lvUpBg = Sprite::createWithSpriteFrameName("go_lv_up.png");
CC_BREAK_IF(!lvUpBg);
lvUpBg->setPosition(POSTIONS_IMG[6]);
bg->addChild(lvUpBg,BASIC_ZORDER_ROOT);
//倍数
int mult = GameLogicManager::getInstance()->getMultiple();
mult = mult > 0 ? mult:1;
log("mult = %d", mult);
auto beishuLabel = LabelAtlas::create(StringTool::intToString(mult),beishu,68,78,'0');
beishuLabel->setAnchorPoint(Vec2(0,0.5));
beishuLabel->setPosition(POSTIONS_IMG[4]);
bg->addChild(beishuLabel,BASIC_ZORDER_ROOT);
//倍字
auto beiSprite = Sprite::createWithSpriteFrameName("go_bei_txt.png");
beiSprite->setPosition(Vec2(beishuLabel->getPositionX()+beishuLabel->getContentSize().width+beiSprite->getContentSize().width*0.5f,beishuLabel->getPositionY()));
bg->addChild(beiSprite,BASIC_ZORDER_ROOT);
//加号减号 //需要判断是加还是减号
auto fuhao = Sprite::createWithSpriteFrameName("go_jia.png");
fuhao->setAnchorPoint(Vec2(0,0.5));
fuhao->setPosition(POSTIONS_IMG[5]);
bg->addChild(fuhao,BASIC_ZORDER_ROOT);
if (gameOverData->getPlayResults()[selfIndex] != 1)
{
fuhao->setSpriteFrame("go_jian.png");//fuhao->setTexture(jian);
}
else
{
fuhao->setSpriteFrame("go_jia.png");//fuhao->setTexture(jia);
}
//自己金币变化 //加减
std::string jinbTxt = gameOverData->getFortunes()[selfIndex];
log("jinb change = %s", jinbTxt.c_str());
if (gameOverData->getPlayResults()[selfIndex] == 1)//自己赢
{
auto jinbiAdd = LabelAtlas::create(jinbTxt,addNum,74,76,'0');
jinbiAdd->setAnchorPoint(Vec2(0,0.5));
jinbiAdd->setPosition(Vec2(fuhao->getPositionX()+fuhao->getContentSize().width,fuhao->getPositionY()));
bg->addChild(jinbiAdd,BASIC_ZORDER_ROOT);
}
else
{
auto jinbiAdd = LabelAtlas::create(jinbTxt.substr(1,jinbTxt.length()),jianNum,74,76,'0');
jinbiAdd->setAnchorPoint(Vec2(0,0.5));
jinbiAdd->setPosition(Vec2(fuhao->getPositionX()+fuhao->getContentSize().width,fuhao->getPositionY()));
bg->addChild(jinbiAdd,BASIC_ZORDER_ROOT);
}
//上家区域
auto lastHeadBg = Sprite::createWithSpriteFrameName("go_farmer_lose_icon.png");
CC_BREAK_IF(!lastHeadBg);
lastHeadBg->setPosition(POSTIONS_IMG[7]);
bg->addChild(lastHeadBg,BASIC_ZORDER_ROOT);
if (gameOverData->getUserIds()[leftIndex] == GameLogicManager::getInstance()->getLandLordId())//判断上家是否地主 先暂时为地主
{
if (gameOverData->getPlayResults()[leftIndex] == 1)
{
lastHeadBg->setSpriteFrame("go_lord_win_icon.png");//lastHeadBg->setTexture(lordWinSmallImg);
}
else
{
lastHeadBg->setSpriteFrame("go_lord_lose_icon.png");//lastHeadBg->setTexture(lordLoseSmallImg);
}
}
else
{
if (gameOverData->getPlayResults()[leftIndex] == 1)
{
lastHeadBg->setSpriteFrame("go_farmer_win_icon.png");//lastHeadBg->setTexture(farmerWinSmallImg);
}
else
{
lastHeadBg->setSpriteFrame("go_farmer_lose_icon.png");//lastHeadBg->setTexture(farmerLoseSmallImg);
}
}
//上家昵称
std::string lastTxt = StringTool::intToString(gameOverData->getUserIds()[leftIndex]);
auto lastName = Label::createWithTTF(lastTxt,"res/Fonts/FounderSemiBold.ttf",36,Size::ZERO,TextHAlignment::LEFT,TextVAlignment::CENTER);
CC_BREAK_IF(!lastName);
lastName->setColor(GET_RGBCOLOR(other_txt_color));
lastName->setAnchorPoint(Vec2(0,0.5));
lastName->setPosition(POSTIONS_TXT[4]);
bg->addChild(lastName,BASIC_ZORDER_ROOT);
//上家结算
auto lastWin = Label::createWithTTF("-25000","res/Fonts/FounderSemiBold.ttf",60,Size::ZERO,TextHAlignment::LEFT,TextVAlignment::CENTER);
CC_BREAK_IF(!lastWin);
lastWin->setColor(GET_RGBCOLOR(txt_color));
if (gameOverData!=NULL)
{
std::string lastWinTxt = StringUtils::format("%s",gameOverData->getFortunes()[leftIndex].c_str());
lastWin->setString(lastWinTxt);
}
lastWin->setAnchorPoint(Vec2(0,0.5));
lastWin->setPosition(POSTIONS_TXT[5]);
bg->addChild(lastWin,BASIC_ZORDER_ROOT);
auto lastVip = Sprite::createWithSpriteFrameName("go_vip_icon.png");
lastVip->setPosition(POSTIONS_IMG[10]);
bg->addChild(lastVip,BASIC_ZORDER_ROOT);
//下家区域
//下家昵称
std::string nextTxt = StringTool::intToString(gameOverData->getUserIds()[rightIndex]);
auto nextName = Label::createWithTTF(nextTxt,"res/Fonts/FounderSemiBold.ttf",36,Size::ZERO,TextHAlignment::LEFT,TextVAlignment::CENTER);
CC_BREAK_IF(!nextName);
nextName->setColor(GET_RGBCOLOR(other_txt_color));
nextName->setAnchorPoint(Vec2(0,0.5));
nextName->setPosition(POSTIONS_TXT[6]);
bg->addChild(nextName,BASIC_ZORDER_ROOT);
//下家结算
auto nextHeadBg = Sprite::createWithSpriteFrameName("go_farmer_lose_icon.png");
CC_BREAK_IF(!nextHeadBg);
nextHeadBg->setPosition(POSTIONS_IMG[8]);
bg->addChild(nextHeadBg,BASIC_ZORDER_ROOT);
if (gameOverData->getUserIds()[rightIndex] == GameLogicManager::getInstance()->getLandLordId())//判断是否地主 先暂时为地主
{
if (gameOverData->getPlayResults()[rightIndex] == 1)
{
nextHeadBg->setSpriteFrame("go_lord_win_icon.png");//nextHeadBg->setTexture(lordWinSmallImg);
}
else
{
nextHeadBg->setSpriteFrame("go_lord_lose_icon.png");//nextHeadBg->setTexture(lordLoseSmallImg);
}
}
else
{
if (gameOverData->getPlayResults()[rightIndex] == 1)
{
nextHeadBg->setSpriteFrame("go_farmer_win_icon.png");//nextHeadBg->setTexture(farmerWinSmallImg);
}
else
{
nextHeadBg->setSpriteFrame("go_farmer_lose_icon.png");//nextHeadBg->setTexture(farmerLoseSmallImg);
}
}
auto nextWin = Label::createWithTTF("-25000","res/Fonts/FounderSemiBold.ttf",60,Size::ZERO,TextHAlignment::LEFT,TextVAlignment::CENTER);
CC_BREAK_IF(!nextWin);
nextWin->setColor(GET_RGBCOLOR(txt_color));
if (gameOverData!=NULL)
{
std::string nextWinTxt = StringUtils::format("%s",gameOverData->getFortunes()[rightIndex].c_str());
nextWin->setString(nextWinTxt);
}
nextWin->setAnchorPoint(Vec2(0,0.5));
nextWin->setPosition(POSTIONS_TXT[7]);
bg->addChild(nextWin,BASIC_ZORDER_ROOT);
auto nextVip = Sprite::createWithSpriteFrameName("go_vip_icon.png");
nextVip->setPosition(POSTIONS_IMG[12]);
bg->addChild(nextVip,BASIC_ZORDER_ROOT);
//宝箱区域
//宝箱icon
auto boxIcon = Sprite::createWithSpriteFrameName("go_box.png");
CC_BREAK_IF(!boxIcon);
boxIcon->setPosition(POSTIONS_IMG[9]);
this->addChild(boxIcon, BASIC_ZORDER_ROOT+1);
//说明文字
std::string boxDescTxt = StringUtils::format(GetWWString(g_over_box_desc,g_over_section).c_str(),4,1,4);
auto boxDescLabel = Label::createWithTTF(boxDescTxt,"res/Fonts/FounderSemiBold.ttf",36,Size::ZERO,TextHAlignment::LEFT,TextVAlignment::CENTER);
CC_BREAK_IF(!boxDescLabel);
boxDescLabel->setColor(GET_RGBCOLOR(box_txt_color));
boxDescLabel->setAnchorPoint(Vec2(0,0.5));
boxDescLabel->setPosition(POSTIONS_TXT[8]);
this->addChild(boxDescLabel,BASIC_ZORDER_ROOT+3);
//当前等级
int lvInt = gameOverData->getGamePointLevels()[selfIndex];
std::string noeLvTxt = StringUtils::format("Lv.%d",lvInt);
auto nowLvLabel = Label::createWithTTF(noeLvTxt,"res/Fonts/FounderSemiBold.ttf",60,Size::ZERO,TextHAlignment::LEFT,TextVAlignment::CENTER);
CC_BREAK_IF(!nowLvLabel);
nowLvLabel->setColor(GET_RGBCOLOR(txt_color));
nowLvLabel->setAnchorPoint(Vec2(0,0.5));
nowLvLabel->setPosition(POSTIONS_TXT[0]);
bg->addChild(nowLvLabel,BASIC_ZORDER_ROOT+2);
//当前经验
std::string jingyanTxt = StringUtils::format(GetWWString(g_over_jingyan,g_over_section).c_str(),gameOverData->getGamePoints()[selfIndex]);
auto jingyanLabel = Label::createWithTTF(jingyanTxt,"res/Fonts/FounderSemiBold.ttf",30,Size::ZERO,TextHAlignment::LEFT,TextVAlignment::CENTER);
CC_BREAK_IF(!jingyanLabel);
jingyanLabel->setColor(GET_RGBCOLOR(txt_color));
jingyanLabel->setAnchorPoint(Vec2(0,0.5));
jingyanLabel->setPosition(POSTIONS_TXT[1]);
bg->addChild(jingyanLabel,BASIC_ZORDER_ROOT+2);
//获取经验
auto addJingYanLabel = Label::createWithTTF(StringUtils::format("%d",gameOverData->getGamePoints()[selfIndex]),"res/Fonts/FounderSemiBold.ttf",36,Size::ZERO,TextHAlignment::LEFT,TextVAlignment::CENTER);
CC_BREAK_IF(!addJingYanLabel);
addJingYanLabel->setAnchorPoint(Vec2(0,0.5));
addJingYanLabel->setPosition(POSTIONS_TXT[2]);
bg->addChild(addJingYanLabel,BASIC_ZORDER_ROOT+2);
//下一等级
std::string nextLvTxt = StringUtils::format("Lv.%d",lvInt+1);
auto nonextLvLabel = Label::createWithTTF(nextLvTxt,"res/Fonts/FounderSemiBold.ttf",60,Size::ZERO,TextHAlignment::LEFT,TextVAlignment::CENTER);
CC_BREAK_IF(!nonextLvLabel);
nonextLvLabel->setColor(GET_RGBCOLOR(txt_color));
nonextLvLabel->setAnchorPoint(Vec2(0,0.5));
nonextLvLabel->setPosition(POSTIONS_TXT[3]);
bg->addChild(nonextLvLabel,BASIC_ZORDER_ROOT+2);
if (UserDefault::getInstance()->getBoolForKey(SET_CONTINU_KEY,true))//自动续局开关
{
//再来一局
auto aganBtn = WWTouchSprite::createWithFile(btnLong,this,callfuncO_selector(GameOverLayer::onTouchSpritePree));
CC_BREAK_IF(!aganBtn);
aganBtn->setPosition(POSTIONS_IMG[11]);
aganBtn->setTag(GAME_OVER_ANGIN);
this->addChild(aganBtn,BASIC_ZORDER_FRAME);
//文字
auto aganLabel = Label::createWithTTF(GetWWString(g_over_agan,g_over_section),"res/Fonts/FounderSemiBold.ttf",45,Size::ZERO,TextHAlignment::LEFT,TextVAlignment::CENTER);
CC_BREAK_IF(!aganLabel);
aganLabel->setColor(GET_RGBCOLOR(contniu_txt_color));
aganLabel->setPosition(Vec2(-aganLabel->getContentSize().width*0.3f,0));
aganBtn->addChild(aganLabel,BASIC_ZORDER_ROOT);
//倒计时
m_pTime = Label::createWithTTF(StringUtils::format(GetWWString(g_over_times,g_over_section).c_str(),m_times),"res/Fonts/FounderSemiBold.ttf",36,Size::ZERO,TextHAlignment::LEFT,TextVAlignment::CENTER);
m_pTime->setColor(GET_RGBCOLOR(contniu_txt_color));
m_pTime->setPosition(Vec2(aganBtn->getContentSize().width*0.25f,0));
aganBtn->addChild(m_pTime,BASIC_ZORDER_ROOT);
}
else
{
//再来一局
auto aganBtn = WWTouchSprite::createWithFile(btnYellow,this,callfuncO_selector(GameOverLayer::onTouchSpritePree));
CC_BREAK_IF(!aganBtn);
aganBtn->setPosition(POSTIONS_IMG[11]);
aganBtn->setTag(GAME_OVER_ANGIN);
this->addChild(aganBtn,BASIC_ZORDER_FRAME);
//文字
auto aganLabel = Label::createWithTTF(GetWWString(g_over_agan,g_over_section),"res/Fonts/FounderSemiBold.ttf",45,Size::ZERO,TextHAlignment::LEFT,TextVAlignment::CENTER);
CC_BREAK_IF(!aganLabel);
aganLabel->setColor(GET_RGBCOLOR(contniu_txt_color));
aganLabel->setPosition(Vec2(0,0));
aganBtn->addChild(aganLabel,BASIC_ZORDER_ROOT);
}
//本局消耗
std::string xiaohaoTxt = StringUtils::format(GetWWString(g_over_xiaohao,g_over_section).c_str(),gameOverData->getBeanTax());
auto xiaohaoLabel = Label::createWithTTF(xiaohaoTxt,"res/Fonts/FounderSemiBold.ttf",24,Size::ZERO,TextHAlignment::LEFT,TextVAlignment::CENTER);
CC_BREAK_IF(!xiaohaoLabel);
xiaohaoLabel->setColor(GET_RGBCOLOR(xiao_txt_color));
xiaohaoLabel->setAnchorPoint(Vec2(0,0.5));
xiaohaoLabel->setPosition(POSTIONS_TXT[9]);
this->addChild(xiaohaoLabel,BASIC_ZORDER_FRAME);
istringstream is(gameOverData->getFortunes()[selfIndex]);
is >> m_beanChange;
//int bean = gameOverData->getFortunes()[0];
}while(0);
this->setVisible(false);
this->runAction(Sequence::create(DelayTime::create(3.5f), CallFunc::create(CC_CALLBACK_0(GameOverLayer::onDelayActionEnd, this)), nullptr));
}
void GameOverLayer::onDelayActionEnd()
{
if (m_beanChange > 0)
{
PLAY_EFFECT(win_key);
}
else
{
PLAY_EFFECT(failed_key);
}
this->setVisible(true);
//启动结算倒计时
GameLogicManager::getInstance()->getpUIgameScene()->startGameOverTime();
}
bool GameOverLayer::onTouchBegan(Touch *pTouch, Event *pEvent)
{
return true;
}
void GameOverLayer::onTouchMoved(Touch *pTouch, Event *pEvent)
{
}
void GameOverLayer::onTouchEnded(Touch *pTouch, Event *pEvent)
{
}
void GameOverLayer::close(Ref * node)
{
GameLogicManager::getInstance()->getpUIGamePlayerLayer()->setShowGameOverFrame(true);
GameLogicManager::getInstance()->GameOverCloseCallBack();
}
void GameOverLayer::updataTime(int dt)
{
if (dt == 0)
{
GameLogicManager::getInstance()->getpUIGamePlayerLayer()->setIsGameOverTimeUp(true);
GameLogicManager::getInstance()->GameOverCloseCallBack();
}
else
{
std::string timeStr = StringUtils::format(GetWWString(g_over_times,g_over_section).c_str(),dt);
m_pTime->setString(timeStr);
}
}
void GameOverLayer::onTouchSpritePree(cocos2d::Ref* theBtn)
{
auto btn = dynamic_cast<WWTouchSprite*>(theBtn);
int pTag = btn->getTag();
switch(pTag)
{
case GAME_OVER_ANGIN:
GameLogicManager::getInstance()->GameOverContinueCallBack();
break;
default:
break;
}
}
| [
"[email protected]"
] | |
3c063b4f1de898cc17552564396a6975806af503 | 1f58935b873f3072404f28b17209f2593e283011 | /Graphics/TextureRegion.h | 2a690f1ee7b20afc12798433f2214d12b4557e49 | [] | no_license | LuisEduardoReis/ores-clone | 83a8604abbfbe3b71c9ba677c9f971e1981d25a6 | 6f33c2067a907918e73ceacee074c5a7dff30b5e | refs/heads/master | 2021-06-24T07:04:06.022513 | 2021-06-06T19:06:43 | 2021-06-06T19:06:59 | 127,788,069 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 585 | h | //
// Created by luis.reis on 31-03-2018.
//
#include <SDL_system.h>
#include "../Constants.h"
#ifndef ORESCLONE_TEXTUREREGION_H
#define ORESCLONE_TEXTUREREGION_H
class TextureRegion {
public:
SDL_Texture* texture = nullptr;
SDL_Rect srcrect{};
TextureRegion() : TextureRegion(nullptr, 0,0, TILE_SIZE, TILE_SIZE) {}
TextureRegion(SDL_Texture* _texture, int x, int y, int w = TILE_SIZE, int h = TILE_SIZE) : texture(_texture) {
srcrect.x = x;
srcrect.y = y;
srcrect.w = w;
srcrect.h = h;
}
};
#endif //ORESCLONE_TEXTUREREGION_H
| [
"[email protected]"
] | |
92178c971fc84ca2761d58a291dd5b51b5897f53 | 6d292a0a7e05146454fb326dab4897ef9a977834 | /3d Sem/3. 24.09.2012/Task1/Task1/tree.h | c9956362802ee75ba3c3c8270106a3673f720bcd | [] | no_license | MrKuznetsov/hw-cpp | 0e52187f4195499877662fc3956edb53c59e6ac3 | 63ad463509c363bd626994ec3d90e42f8c78daf1 | refs/heads/master | 2021-03-13T00:00:23.719466 | 2013-12-10T18:42:02 | 2013-12-10T18:42:02 | 3,544,642 | 2 | 1 | null | null | null | null | UTF-8 | C++ | false | false | 789 | h | #pragma once
#include <stdio.h>
#include <tchar.h>
#include <stack>
class Tree
{
private:
int value;
Tree *leftNode;
Tree *rightNode;
protected:
void deleteFromTree(Tree *&t, int val);
int deleteMinTree(Tree *&t);
public:
class Iterator;
Tree();
Tree(int val);
virtual ~Tree();
bool exists(int val);
Tree* add(int val);
Tree* deleteVal(int val);
Tree *left();
Tree *right();
int &val();
Iterator begin();
static Iterator end();
friend Iterator;
};
class Tree::Iterator
{
private:
Tree* pTree;
std::stack<Tree *> stack;
public:
Iterator();
Iterator(Tree* tree);
Iterator &operator++ ();
Iterator &operator= (const Tree::Iterator &i);
bool operator== (const Tree::Iterator &i);
bool operator!= (const Tree::Iterator &i);
int &operator* ();
};
| [
"Svake@Svake-HP.(none)"
] | Svake@Svake-HP.(none) |
110c655643118fbaf4f95c2dfa100fc9242fa12f | b6995767b4ffcaef8023eb07f6571f66a340be9b | /cpp/aphw3.cpp | 75ae09ecc64b42ec2b6f6996c07dda38ae415e43 | [] | no_license | courseworks/ap1399-1-hw3 | 04a075f5206039b0ded2fb83df50855c9fa4d052 | 22267f2e166fa3df6fcd1b9394a8496cbae91557 | refs/heads/master | 2022-12-29T14:33:00.721561 | 2020-10-16T17:16:29 | 2020-10-16T17:16:29 | 304,690,881 | 4 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 19 | cpp | #include "aphw3.h"
| [
"[email protected]"
] | |
e4b75fcf36ab8cfb104b19fdfdccb6808b21cfc3 | 52e05d8943a90960923d84c1c0068abf52c66faf | /homework/midterm1/src/iterator.h | 4b20ce0f853b07e00ab98b0fa1ab1dac4d89a77f | [] | no_license | babe18/10901_ntut_posd | 878896d9f99fcc86945b0b7385eef539ece7791f | 6c4fd99b696b171c32e14f68a13d3816da764e24 | refs/heads/main | 2023-02-19T20:19:56.816458 | 2021-01-20T15:40:49 | 2021-01-20T15:40:49 | 300,562,526 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 245 | h | #ifndef ITERATOR_H
#define ITERATOR_H
class Node;
class Iterator {
public:
virtual void first() = 0;
virtual void next() = 0;
virtual bool isDone() const = 0;
virtual Node* currentItem() const = 0;
};
#endif
| [
"[email protected]"
] | |
56a79f4a9ae01f4e15a93ba337640a09e78f58ad | 484ec4d1331b94fe9c19fd282009d6618e9a1eef | /Real-Time Corruptor/BizHawk_RTC/waterbox/libsnes/bsnes/gameboy/cpu/core/core.cpp | 0926fa1ce7c357fa74238db3759854f3d04ac619 | [
"GPL-1.0-or-later",
"MIT"
] | permissive | mguid65/RTC3 | a565303fdfd1807a2516be5752c7b30a8be3d909 | 4082eb302f8e6e20ba621ec70308dab94985fe7f | refs/heads/master | 2020-04-13T16:57:31.933643 | 2018-12-31T16:03:39 | 2018-12-31T16:03:39 | 161,684,492 | 0 | 0 | MIT | 2018-12-13T19:19:17 | 2018-12-13T19:19:17 | null | UTF-8 | C++ | false | false | 12,720 | cpp | #ifdef CPU_CPP
#include "table.cpp"
#include "disassembler.cpp"
uint8 CPU::op_fetch() {
cdlInfo.currFlags = eCDLog_Flags_ExecOperand;
uint8 opcode = op_read(r[PC]++);
cdlInfo.currFlags = eCDLog_Flags_CPUData;
return opcode;
}
void CPU::op_xx() {
}
void CPU::op_cb() {
uint8 opcode = op_fetch();
(this->*opcode_table_cb[opcode])();
}
//8-bit load commands
template<unsigned x, unsigned y> void CPU::op_ld_r_r() {
r[x] = r[y];
}
template<unsigned x> void CPU::op_ld_r_n() {
r[x] = op_fetch();
}
template<unsigned x> void CPU::op_ld_r_hl() {
r[x] = op_read(r[HL]);
}
template<unsigned x> void CPU::op_ld_hl_r() {
op_write(r[HL], r[x]);
}
void CPU::op_ld_hl_n() {
op_write(r[HL], op_fetch());
}
template<unsigned x> void CPU::op_ld_a_rr() {
r[A] = op_read(r[x]);
}
void CPU::op_ld_a_nn() {
uint8 lo = op_fetch();
uint8 hi = op_fetch();
r[A] = op_read((hi << 8) | (lo << 0));
}
template<unsigned x> void CPU::op_ld_rr_a() {
op_write(r[x], r[A]);
}
void CPU::op_ld_nn_a() {
uint8 lo = op_fetch();
uint8 hi = op_fetch();
op_write((hi << 8) | (lo << 0), r[A]);
}
void CPU::op_ld_a_ffn() {
r[A] = op_read(0xff00 + op_fetch());
}
void CPU::op_ld_ffn_a() {
op_write(0xff00 + op_fetch(), r[A]);
}
void CPU::op_ld_a_ffc() {
r[A] = op_read(0xff00 + r[C]);
}
void CPU::op_ld_ffc_a() {
op_write(0xff00 + r[C], r[A]);
}
void CPU::op_ldi_hl_a() {
op_write(r[HL], r[A]);
r[HL]++;
}
void CPU::op_ldi_a_hl() {
r[A] = op_read(r[HL]);
r[HL]++;
}
void CPU::op_ldd_hl_a() {
op_write(r[HL], r[A]);
r[HL]--;
}
void CPU::op_ldd_a_hl() {
r[A] = op_read(r[HL]);
r[HL]--;
}
//16-bit load commands
template<unsigned x> void CPU::op_ld_rr_nn() {
r[x] = op_fetch() << 0;
r[x] |= op_fetch() << 8;
}
void CPU::op_ld_nn_sp() {
uint16 addr = op_fetch() << 0;
addr |= op_fetch() << 8;
op_write(addr + 0, r[SP] >> 0);
op_write(addr + 1, r[SP] >> 8);
}
void CPU::op_ld_sp_hl() {
r[SP] = r[HL];
op_io();
}
template<unsigned x> void CPU::op_push_rr() {
op_write(--r[SP], r[x] >> 8);
op_write(--r[SP], r[x] >> 0);
op_io();
}
template<unsigned x> void CPU::op_pop_rr() {
r[x] = op_read(r[SP]++) << 0;
r[x] |= op_read(r[SP]++) << 8;
}
//8-bit arithmetic commands
void CPU::opi_add_a(uint8 x) {
uint16 rh = r[A] + x;
uint16 rl = (r[A] & 0x0f) + (x & 0x0f);
r[A] = rh;
r.f.z = (uint8)rh == 0;
r.f.n = 0;
r.f.h = rl > 0x0f;
r.f.c = rh > 0xff;
}
template<unsigned x> void CPU::op_add_a_r() { opi_add_a(r[x]); }
void CPU::op_add_a_n() { opi_add_a(op_fetch()); }
void CPU::op_add_a_hl() { opi_add_a(op_read(r[HL])); }
void CPU::opi_adc_a(uint8 x) {
uint16 rh = r[A] + x + r.f.c;
uint16 rl = (r[A] & 0x0f) + (x & 0x0f) + r.f.c;
r[A] = rh;
r.f.z = (uint8)rh == 0;
r.f.n = 0;
r.f.h = rl > 0x0f;
r.f.c = rh > 0xff;
}
template<unsigned x> void CPU::op_adc_a_r() { opi_adc_a(r[x]); }
void CPU::op_adc_a_n() { opi_adc_a(op_fetch()); }
void CPU::op_adc_a_hl() { opi_adc_a(op_read(r[HL])); }
void CPU::opi_sub_a(uint8 x) {
uint16 rh = r[A] - x;
uint16 rl = (r[A] & 0x0f) - (x & 0x0f);
r[A] = rh;
r.f.z = (uint8)rh == 0;
r.f.n = 1;
r.f.h = rl > 0x0f;
r.f.c = rh > 0xff;
}
template<unsigned x> void CPU::op_sub_a_r() { opi_sub_a(r[x]); }
void CPU::op_sub_a_n() { opi_sub_a(op_fetch()); }
void CPU::op_sub_a_hl() { opi_sub_a(op_read(r[HL])); }
void CPU::opi_sbc_a(uint8 x) {
uint16 rh = r[A] - x - r.f.c;
uint16 rl = (r[A] & 0x0f) - (x & 0x0f) - r.f.c;
r[A] = rh;
r.f.z = (uint8)rh == 0;
r.f.n = 1;
r.f.h = rl > 0x0f;
r.f.c = rh > 0xff;
}
template<unsigned x> void CPU::op_sbc_a_r() { opi_sbc_a(r[x]); }
void CPU::op_sbc_a_n() { opi_sbc_a(op_fetch()); }
void CPU::op_sbc_a_hl() { opi_sbc_a(op_read(r[HL])); }
void CPU::opi_and_a(uint8 x) {
r[A] &= x;
r.f.z = r[A] == 0;
r.f.n = 0;
r.f.h = 1;
r.f.c = 0;
}
template<unsigned x> void CPU::op_and_a_r() { opi_and_a(r[x]); }
void CPU::op_and_a_n() { opi_and_a(op_fetch()); }
void CPU::op_and_a_hl() { opi_and_a(op_read(r[HL])); }
void CPU::opi_xor_a(uint8 x) {
r[A] ^= x;
r.f.z = r[A] == 0;
r.f.n = 0;
r.f.h = 0;
r.f.c = 0;
}
template<unsigned x> void CPU::op_xor_a_r() { opi_xor_a(r[x]); }
void CPU::op_xor_a_n() { opi_xor_a(op_fetch()); }
void CPU::op_xor_a_hl() { opi_xor_a(op_read(r[HL])); }
void CPU::opi_or_a(uint8 x) {
r[A] |= x;
r.f.z = r[A] == 0;
r.f.n = 0;
r.f.h = 0;
r.f.c = 0;
}
template<unsigned x> void CPU::op_or_a_r() { opi_or_a(r[x]); }
void CPU::op_or_a_n() { opi_or_a(op_fetch()); }
void CPU::op_or_a_hl() { opi_or_a(op_read(r[HL])); }
void CPU::opi_cp_a(uint8 x) {
uint16 rh = r[A] - x;
uint16 rl = (r[A] & 0x0f) - (x & 0x0f);
r.f.z = (uint8)rh == 0;
r.f.n = 1;
r.f.h = rl > 0x0f;
r.f.c = rh > 0xff;
}
template<unsigned x> void CPU::op_cp_a_r() { opi_cp_a(r[x]); }
void CPU::op_cp_a_n() { opi_cp_a(op_fetch()); }
void CPU::op_cp_a_hl() { opi_cp_a(op_read(r[HL])); }
template<unsigned x> void CPU::op_inc_r() {
r[x]++;
r.f.z = r[x] == 0;
r.f.n = 0;
r.f.h = (r[x] & 0x0f) == 0x00;
}
void CPU::op_inc_hl() {
uint8 n = op_read(r[HL]);
op_write(r[HL], ++n);
r.f.z = n == 0;
r.f.n = 0;
r.f.h = (n & 0x0f) == 0x00;
}
template<unsigned x> void CPU::op_dec_r() {
r[x]--;
r.f.z = r[x] == 0;
r.f.n = 1;
r.f.h = (r[x] & 0x0f) == 0x0f;
}
void CPU::op_dec_hl() {
uint8 n = op_read(r[HL]);
op_write(r[HL], --n);
r.f.z = n == 0;
r.f.n = 1;
r.f.h = (n & 0x0f) == 0x0f;
}
void CPU::op_daa() {
uint16 a = r[A];
if(r.f.n == 0) {
if(r.f.h || (a & 0x0f) > 0x09) a += 0x06;
if(r.f.c || (a ) > 0x9f) a += 0x60;
} else {
if(r.f.h) {
a -= 0x06;
if(r.f.c == 0) a &= 0xff;
}
if(r.f.c) a -= 0x60;
}
r[A] = a;
r.f.z = r[A] == 0;
r.f.h = 0;
r.f.c |= a & 0x100;
}
void CPU::op_cpl() {
r[A] ^= 0xff;
r.f.n = 1;
r.f.h = 1;
}
//16-bit arithmetic commands
template<unsigned x> void CPU::op_add_hl_rr() {
op_io();
uint32 rb = (r[HL] + r[x]);
uint32 rn = (r[HL] & 0xfff) + (r[x] & 0xfff);
r[HL] = rb;
r.f.n = 0;
r.f.h = rn > 0x0fff;
r.f.c = rb > 0xffff;
}
template<unsigned x> void CPU::op_inc_rr() {
op_io();
r[x]++;
}
template<unsigned x> void CPU::op_dec_rr() {
op_io();
r[x]--;
}
void CPU::op_add_sp_n() {
op_io();
op_io();
signed n = (int8)op_fetch();
r.f.z = 0;
r.f.n = 0;
r.f.h = ((r[SP] & 0x0f) + (n & 0x0f)) > 0x0f;
r.f.c = ((r[SP] & 0xff) + (n & 0xff)) > 0xff;
r[SP] += n;
}
void CPU::op_ld_hl_sp_n() {
op_io();
signed n = (int8)op_fetch();
r.f.z = 0;
r.f.n = 0;
r.f.h = ((r[SP] & 0x0f) + (n & 0x0f)) > 0x0f;
r.f.c = ((r[SP] & 0xff) + (n & 0xff)) > 0xff;
r[HL] = r[SP] + n;
}
//rotate/shift commands
void CPU::op_rlca() {
r[A] = (r[A] << 1) | (r[A] >> 7);
r.f.z = 0;
r.f.n = 0;
r.f.h = 0;
r.f.c = r[A] & 0x01;
}
void CPU::op_rla() {
bool c = r[A] & 0x80;
r[A] = (r[A] << 1) | (r.f.c << 0);
r.f.z = 0;
r.f.n = 0;
r.f.h = 0;
r.f.c = c;
}
void CPU::op_rrca() {
r[A] = (r[A] >> 1) | (r[A] << 7);
r.f.z = 0;
r.f.n = 0;
r.f.h = 0;
r.f.c = r[A] & 0x80;
}
void CPU::op_rra() {
bool c = r[A] & 0x01;
r[A] = (r[A] >> 1) | (r.f.c << 7);
r.f.z = 0;
r.f.n = 0;
r.f.h = 0;
r.f.c = c;
}
template<unsigned x> void CPU::op_rlc_r() {
r[x] = (r[x] << 1) | (r[x] >> 7);
r.f.z = r[x] == 0;
r.f.n = 0;
r.f.h = 0;
r.f.c = r[x] & 0x01;
}
void CPU::op_rlc_hl() {
uint8 n = op_read(r[HL]);
n = (n << 1) | (n >> 7);
op_write(r[HL], n);
r.f.z = n == 0;
r.f.n = 0;
r.f.h = 0;
r.f.c = n & 0x01;
}
template<unsigned x> void CPU::op_rl_r() {
bool c = r[x] & 0x80;
r[x] = (r[x] << 1) | (r.f.c << 0);
r.f.z = r[x] == 0;
r.f.n = 0;
r.f.h = 0;
r.f.c = c;
}
void CPU::op_rl_hl() {
uint8 n = op_read(r[HL]);
bool c = n & 0x80;
n = (n << 1) | (r.f.c << 0);
op_write(r[HL], n);
r.f.z = n == 0;
r.f.n = 0;
r.f.h = 0;
r.f.c = c;
}
template<unsigned x> void CPU::op_rrc_r() {
r[x] = (r[x] >> 1) | (r[x] << 7);
r.f.z = r[x] == 0;
r.f.n = 0;
r.f.h = 0;
r.f.c = r[x] & 0x80;
}
void CPU::op_rrc_hl() {
uint8 n = op_read(r[HL]);
n = (n >> 1) | (n << 7);
op_write(r[HL], n);
r.f.z = n == 0;
r.f.n = 0;
r.f.h = 0;
r.f.c = n & 0x80;
}
template<unsigned x> void CPU::op_rr_r() {
bool c = r[x] & 0x01;
r[x] = (r[x] >> 1) | (r.f.c << 7);
r.f.z = r[x] == 0;
r.f.n = 0;
r.f.h = 0;
r.f.c = c;
}
void CPU::op_rr_hl() {
uint8 n = op_read(r[HL]);
bool c = n & 0x01;
n = (n >> 1) | (r.f.c << 7);
op_write(r[HL], n);
r.f.z = n == 0;
r.f.n = 0;
r.f.h = 0;
r.f.c = c;
}
template<unsigned x> void CPU::op_sla_r() {
bool c = r[x] & 0x80;
r[x] <<= 1;
r.f.z = r[x] == 0;
r.f.n = 0;
r.f.h = 0;
r.f.c = c;
}
void CPU::op_sla_hl() {
uint8 n = op_read(r[HL]);
bool c = n & 0x80;
n <<= 1;
op_write(r[HL], n);
r.f.z = n == 0;
r.f.n = 0;
r.f.h = 0;
r.f.c = c;
}
template<unsigned x> void CPU::op_swap_r() {
r[x] = (r[x] << 4) | (r[x] >> 4);
r.f.z = r[x] == 0;
r.f.n = 0;
r.f.h = 0;
r.f.c = 0;
}
void CPU::op_swap_hl() {
uint8 n = op_read(r[HL]);
n = (n << 4) | (n >> 4);
op_write(r[HL], n);
r.f.z = n == 0;
r.f.n = 0;
r.f.h = 0;
r.f.c = 0;
}
template<unsigned x> void CPU::op_sra_r() {
bool c = r[x] & 0x01;
r[x] = (int8)r[x] >> 1;
r.f.z = r[x] == 0;
r.f.n = 0;
r.f.h = 0;
r.f.c = c;
}
void CPU::op_sra_hl() {
uint8 n = op_read(r[HL]);
bool c = n & 0x01;
n = (int8)n >> 1;
op_write(r[HL], n);
r.f.z = n == 0;
r.f.n = 0;
r.f.h = 0;
r.f.c = c;
}
template<unsigned x> void CPU::op_srl_r() {
bool c = r[x] & 0x01;
r[x] >>= 1;
r.f.z = r[x] == 0;
r.f.n = 0;
r.f.h = 0;
r.f.c = c;
}
void CPU::op_srl_hl() {
uint8 n = op_read(r[HL]);
bool c = n & 0x01;
n >>= 1;
op_write(r[HL], n);
r.f.z = n == 0;
r.f.n = 0;
r.f.h = 0;
r.f.c = c;
}
//single-bit commands
template<unsigned b, unsigned x> void CPU::op_bit_n_r() {
r.f.z = (r[x] & (1 << b)) == 0;
r.f.n = 0;
r.f.h = 1;
}
template<unsigned b> void CPU::op_bit_n_hl() {
uint8 n = op_read(r[HL]);
r.f.z = (n & (1 << b)) == 0;
r.f.n = 0;
r.f.h = 1;
}
template<unsigned b, unsigned x> void CPU::op_set_n_r() {
r[x] |= 1 << b;
}
template<unsigned b> void CPU::op_set_n_hl() {
uint8 n = op_read(r[HL]);
n |= 1 << b;
op_write(r[HL], n);
}
template<unsigned b, unsigned x> void CPU::op_res_n_r() {
r[x] &= ~(1 << b);
}
template<unsigned b> void CPU::op_res_n_hl() {
uint8 n = op_read(r[HL]);
n &= ~(1 << b);
op_write(r[HL], n);
}
//control commands
void CPU::op_ccf() {
r.f.n = 0;
r.f.h = 0;
r.f.c = !r.f.c;
}
void CPU::op_scf() {
r.f.n = 0;
r.f.h = 0;
r.f.c = 1;
}
void CPU::op_nop() {
}
void CPU::op_halt() {
status.halt = true;
while(status.halt == true) op_io();
}
void CPU::op_stop() {
if(status.speed_switch) {
status.speed_switch = 0;
status.speed_double ^= 1;
frequency = 4 * 1024 * 1024;
if(status.speed_double) frequency *= 2;
return;
}
status.stop = true;
while(status.stop == true) op_io();
}
void CPU::op_di() {
status.ime = 0;
}
void CPU::op_ei() {
status.ei = true;
//status.ime = 1;
}
//jump commands
void CPU::op_jp_nn() {
uint8 lo = op_fetch();
uint8 hi = op_fetch();
r[PC] = (hi << 8) | (lo << 0);
op_io();
}
void CPU::op_jp_hl() {
r[PC] = r[HL];
}
template<unsigned x, bool y> void CPU::op_jp_f_nn() {
uint8 lo = op_fetch();
uint8 hi = op_fetch();
if(r.f[x] == y) {
r[PC] = (hi << 8) | (lo << 0);
op_io();
}
}
void CPU::op_jr_n() {
int8 n = op_fetch();
r[PC] += n;
op_io();
}
template<unsigned x, bool y> void CPU::op_jr_f_n() {
int8 n = op_fetch();
if(r.f[x] == y) {
r[PC] += n;
op_io();
}
}
void CPU::op_call_nn() {
uint8 lo = op_fetch();
uint8 hi = op_fetch();
op_write(--r[SP], r[PC] >> 8);
op_write(--r[SP], r[PC] >> 0);
r[PC] = (hi << 8) | (lo << 0);
op_io();
}
template<unsigned x, bool y> void CPU::op_call_f_nn() {
uint8 lo = op_fetch();
uint8 hi = op_fetch();
if(r.f[x] == y) {
op_write(--r[SP], r[PC] >> 8);
op_write(--r[SP], r[PC] >> 0);
r[PC] = (hi << 8) | (lo << 0);
op_io();
}
}
void CPU::op_ret() {
uint8 lo = op_read(r[SP]++);
uint8 hi = op_read(r[SP]++);
r[PC] = (hi << 8) | (lo << 0);
op_io();
}
template<unsigned x, bool y> void CPU::op_ret_f() {
op_io();
if(r.f[x] == y) {
uint8 lo = op_read(r[SP]++);
uint8 hi = op_read(r[SP]++);
r[PC] = (hi << 8) | (lo << 0);
op_io();
}
}
void CPU::op_reti() {
uint8 lo = op_read(r[SP]++);
uint8 hi = op_read(r[SP]++);
r[PC] = (hi << 8) | (lo << 0);
op_io();
status.ime = 1;
}
template<unsigned n> void CPU::op_rst_n() {
op_write(--r[SP], r[PC] >> 8);
op_write(--r[SP], r[PC] >> 0);
r[PC] = n;
op_io();
}
#endif
| [
"[email protected]"
] | |
3de0aec394b0d877e1f084263ed7854b9cd42221 | 466787f4b649dc156bcc34dc039eba860bf0029c | /src/main.cpp | c36b026d983b633c207de3d7dfc740adb357ce0a | [] | no_license | Bietola/streamc | 41bc29c0853adfbe16403724230063d7cbb6aff0 | 005403736fef095074f972c4beb0fd987b543a04 | refs/heads/main | 2023-04-27T02:54:59.333438 | 2021-05-15T21:08:58 | 2021-05-15T21:08:58 | 348,704,030 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 11,288 | cpp | extern "C" {
#include <inttypes.h>
#include <stdarg.h>
#include <stdbool.h>
#include <stdio.h>
#include <string.h>
#include <uiohook.h>
#include <wchar.h>
// TODO: Use more popular utf8 library
#include <rosetta_utf8.h>
}
#include <locale>
#include <iostream>
#include <sstream>
#include <algorithm>
#include <variant>
#include <nlohmann/json.hpp>
#include <fmt/format.h>
#include <special_keycodes.h>
using json = nlohmann::json;
namespace mod {
// NB. The order of the listed items is reflected in an abbreviated mod string
enum Mod {
Shift = 1,
Ctrl,
Alt,
Super
};
std::string tolower(const std::string& str) {
std::string res;
for (char c : str) {
res.push_back(std::tolower(c));
}
return res;
}
auto from_str(const std::string& str) {
if (tolower(str) == "shift") {
return Shift;
} else if (tolower(str) == "ctrl") {
return Ctrl;
} else if (tolower(str) == "alt") {
return Alt;
} else if (tolower(str) == "super") {
return Super;
} else {
std::cerr << "Malformed modifier: " << str << std::endl;
assert(false);
}
}
char to_abbr(Mod mod) {
switch (mod) {
case mod::Shift:
return 's';
case mod::Ctrl:
return 'c';
case mod::Alt:
return 'a';
case mod::Super:
return 'm';
default:
assert(false);
}
};
std::string to_abbr_str(std::vector<Mod> lst) {
// NB. Exploits enum to int implicit conversion
std::sort(lst.begin(), lst.end());
std::string res;
for (const auto& ele : lst) {
res.push_back(to_abbr(ele));
}
return res;
}
}
struct Key {
uint16_t keysym = 0;
std::vector<mod::Mod> modifiers = {};
std::optional<std::string> special_escape_code;
const std::string to_dasher_code() const& {
bool close_mod = false;
std::ostringstream ss;
auto is_special = special_escape_code.has_value();
// Construct modifier prefix
auto mod_prefix = mod::to_abbr_str(modifiers);
if (!mod_prefix.empty()) {
close_mod = true;
ss << '<' << mod_prefix;
if (is_special) {
ss << '+';
} else {
ss << '-';
}
} else if (is_special) {
close_mod = true;
ss << '<';
}
if (is_special) {
ss << special_escape_code.value();
} else {
// Use more robust/popular utf8 library
ss << to_utf8(keysym);
}
if (close_mod) {
ss << '>';
}
return ss.str();
}
};
std::vector<mod::Mod> parse_modifiers_from_keymask(uint16_t keymask) {
std::vector<mod::Mod> res;
if (keymask & uint16_t(MASK_SHIFT)) {
res.push_back(mod::Shift);
}
if (keymask & uint16_t(MASK_CTRL)) {
res.push_back(mod::Ctrl);
}
if (keymask & uint16_t(MASK_ALT)) {
res.push_back(mod::Alt);
}
if (keymask & uint16_t(MASK_META)) {
res.push_back(mod::Super);
}
return res;
}
bool logger_proc(unsigned int level, const char *format, ...) {
return true;
}
// NOTE: The following callback executes on the same thread that hook_run() is called
// from. This is important because hook_run() attaches to the operating systems
// event dispatcher and may delay event delivery to the target application.
// Furthermore, some operating systems may choose to disable your hook if it
// takes too long to process. If you need to do any extended processing, please
// do so by copying the event to your own queued dispatch thread.
auto make_dispatch_proc(bool json_mode) {
// TODO: Fix json_mode switch (ignored for now since lambda can't
// decay to funptrs if they capture stuff).
return [/*json_mode*/] (uiohook_event * const event) {
Key res;
auto write_res_to_stdout = [/*json_mode,*/ &] {
/* if (json_mode) { */
/* std::cout << res << '\n'; */
/* } else { */
std::cout << res.to_dasher_code() << '\n';
/* } */
};
// Handle special keycodes
std::optional<std::string> special_escape_code = std::nullopt;
if (event->type == EVENT_KEY_PRESSED) {
// TODO/DB
/* std::cout << "keycode: " << to_utf8(event->data.keyboard.keycode) << "(" << event->data.keyboard.keycode << ")" << std::endl; */
/* std::cout << "rawcode: " << to_utf8(event->data.keyboard.rawcode) << "(" << event->data.keyboard.rawcode << ")" << std::endl; */
/* std::cout << "keychar: " << to_utf8(event->data.keyboard.keychar) << "(" << event->data.keyboard.keychar << ")" << std::endl; */
// If the shift+alt+c key combination is pressed, naturally terminate the program.
if (event->data.keyboard.keycode == VC_C &&
event->mask & uint16_t(MASK_SHIFT) &&
event->mask & uint16_t(MASK_ALT)) {
int status = hook_stop();
switch (status) {
case UIOHOOK_SUCCESS:
// Everything is ok.
break;
// System level errors.
case UIOHOOK_ERROR_OUT_OF_MEMORY:
logger_proc(LOG_LEVEL_ERROR, "Failed to allocate memory. (%#X)", status);
break;
case UIOHOOK_ERROR_X_RECORD_GET_CONTEXT:
// NOTE This is the only platform specific error that occurs on hook_stop().
logger_proc(LOG_LEVEL_ERROR, "Failed to get XRecord context. (%#X)", status);
break;
// Default error.
case UIOHOOK_FAILURE:
default:
logger_proc(LOG_LEVEL_ERROR, "An unknown hook error occurred. (%#X)", status);
break;
}
}
// std::cerr << "keycode(" << event->data.keyboard.rawcode << ")" << std::endl; // TODO/DB
auto maybe_keyinfo =
get_special_keycode_info(event->data.keyboard.keycode, event->data.keyboard.rawcode);
if (maybe_keyinfo.has_value()) {
auto keyinfo = maybe_keyinfo.value();
if (!keyinfo.is_modifier) {
res.keysym = event->data.keyboard.rawcode;
res.modifiers = parse_modifiers_from_keymask(event->mask);
res.special_escape_code = std::optional<std::string> { keyinfo.escape_code };
write_res_to_stdout(); return;
} else {
// Ignore modifiers as they are already prefixed to other keys
// TODO: Give option to not ignore
return;
}
} else {
// Continue since key presses can be normal keys
;
}
}
switch (event->type) {
// Ignore release events
case EVENT_KEY_RELEASED:
/* Ignore */ return;
// Handle "normal" or "alphanumerical" keypresses
case EVENT_KEY_TYPED:
// Check that key isn't special
if (get_special_keycode_info(
event->data.keyboard.keycode, event->data.keyboard.rawcode
).has_value())
{
return;
}
res.modifiers = parse_modifiers_from_keymask(event->mask);
// TODO: Research more secure way to convert `uint16_t` to `std::string`
res.keysym = event->data.keyboard.rawcode;
write_res_to_stdout(); return;
// Ignore everything else
// TODO: Log error
default:
return;
}
};
}
int main(int argc, char** argv) {
bool json_mode = false;
if (argc > 2 && strcmp(argv[1], "--json") == 0) {
std::cerr << "json mode is broken!" << std::endl; // TODO/WIP
json_mode = true;
}
// set locale
setlocale(LC_ALL, "");
// Set the logger callback for library output.
hook_set_logger_proc(&logger_proc);
// Set the event callback for uiohook events.
hook_set_dispatch_proc(make_dispatch_proc(json_mode));
// Start the hook and block.
// NOTE If EVENT_HOOK_ENABLED was delivered, the status will always succeed.
int status = hook_run();
switch (status) {
case UIOHOOK_SUCCESS:
// Everything is ok.
break;
// System level errors.
case UIOHOOK_ERROR_OUT_OF_MEMORY:
logger_proc(LOG_LEVEL_ERROR, "Failed to allocate memory. (%#X)", status);
break;
// X11 specific errors.
case UIOHOOK_ERROR_X_OPEN_DISPLAY:
logger_proc(LOG_LEVEL_ERROR, "Failed to open X11 display. (%#X)", status);
break;
case UIOHOOK_ERROR_X_RECORD_NOT_FOUND:
logger_proc(LOG_LEVEL_ERROR, "Unable to locate XRecord extension. (%#X)", status);
break;
case UIOHOOK_ERROR_X_RECORD_ALLOC_RANGE:
logger_proc(LOG_LEVEL_ERROR, "Unable to allocate XRecord range. (%#X)", status);
break;
case UIOHOOK_ERROR_X_RECORD_CREATE_CONTEXT:
logger_proc(LOG_LEVEL_ERROR, "Unable to allocate XRecord context. (%#X)", status);
break;
case UIOHOOK_ERROR_X_RECORD_ENABLE_CONTEXT:
logger_proc(LOG_LEVEL_ERROR, "Failed to enable XRecord context. (%#X)", status);
break;
// Windows specific errors.
case UIOHOOK_ERROR_SET_WINDOWS_HOOK_EX:
logger_proc(LOG_LEVEL_ERROR, "Failed to register low level windows hook. (%#X)", status);
break;
// Darwin specific errors.
case UIOHOOK_ERROR_AXAPI_DISABLED:
logger_proc(LOG_LEVEL_ERROR, "Failed to enable access for assistive devices. (%#X)", status);
break;
case UIOHOOK_ERROR_CREATE_EVENT_PORT:
logger_proc(LOG_LEVEL_ERROR, "Failed to create apple event port. (%#X)", status);
break;
case UIOHOOK_ERROR_CREATE_RUN_LOOP_SOURCE:
logger_proc(LOG_LEVEL_ERROR, "Failed to create apple run loop source. (%#X)", status);
break;
case UIOHOOK_ERROR_GET_RUNLOOP:
logger_proc(LOG_LEVEL_ERROR, "Failed to acquire apple run loop. (%#X)", status);
break;
case UIOHOOK_ERROR_CREATE_OBSERVER:
logger_proc(LOG_LEVEL_ERROR, "Failed to create apple run loop observer. (%#X)", status);
break;
// Default error.
case UIOHOOK_FAILURE:
default:
logger_proc(LOG_LEVEL_ERROR, "An unknown hook error occurred. (%#X)", status);
break;
}
return status;
}
| [
"[email protected]"
] | |
d83b6664076c41df443b14294d1420918bb88ebd | b225d89a4c5d8df3e54e0db4481fb3e41df238c4 | /src/function_wrapper.cpp | ea9a8d6d5f40ac7e8cfb7425320013bab0e2783d | [
"MIT"
] | permissive | agnat/n2o | 7646bb2209331bd98ae74b00d6d92d5af8f6a063 | d556de47783b528d0f98b85b02433286312eacc8 | refs/heads/master | 2021-01-10T20:49:14.930663 | 2014-11-24T20:09:23 | 2014-11-24T20:09:23 | 887,082 | 6 | 1 | null | null | null | null | UTF-8 | C++ | false | false | 140 | cpp | #include "n2o/function_wrapper.hpp"
namespace n2o { namespace detail {
v8::Persistent<v8::ObjectTemplate> function_wrapper_template;
}}
| [
"[email protected]"
] | |
a4f9ca05d99f69b62953c3764f74fa929aa93a0a | 14dbca548b97cdbaa8f44c4d3ece0743a0781388 | /ZOCB/test.cpp | fd059ac31229348057ac6ff549049b38cdefa111 | [] | no_license | zocbzotr/SKINNY-Instantiations | 8be21f57fe16b62e580c98f63485175415da832d | fbce2b5942e32aa7a80040adaa05dd1fb6069462 | refs/heads/master | 2020-05-27T01:47:52.021828 | 2020-03-29T12:13:19 | 2020-03-29T12:13:19 | 188,442,334 | 0 | 1 | null | null | null | null | UTF-8 | C++ | false | false | 1,296 | cpp | /** @file test.cpp
*/
#include "test.h"
using namespace std;
#define MN 56
#define AN 24
void test()
{
ofstream fout;
string fn = "test_p" + to_string((u64)PIPE) + ".txt";
fout.open(fn.c_str());
ALIGNED_TYPE_(u8, 16) Seedkey[] =
{
0x60,0x3d,0xeb,0x10,0x15,0xca,0x71,0xbe,
0x2b,0x73,0xae,0xf0,0x85,0x7d,0x77,0x81,
0x1f,0x35,0x2c,0x07,0x3b,0x61,0x08,0xd7,
0x2d,0x98,0x10,0xa3,0x09,0x14,0xdf,0xf4
};
u8 plain[MN];
u8 cipher[MN];
u8 assoc[AN];
u8 nounc[BLOCK_BYTE_NUMBER];
u8 tag[TAG_BYTE_NUMBER];
for (u64 i = 0; i < MN; i++)
{
plain[i] = 0;
cipher[i] = 0;
}
for (u64 i = 0; i < AN; i++)
{
assoc[i] = 0;
}
for (u64 i = 0; i < BLOCK_BYTE_NUMBER; i++)
{
nounc[i] = 0;
}
ZOCB_enc(
cipher,
tag,
nounc,
assoc,
plain,
AN,
MN,
Seedkey
);
fout << hex;
fout << setfill('0');
fout << "Plain:" << endl;
for (u64 i = 0; i < MN; i++)
{
fout << setw(2) << plain[i] + '\0';
}
fout << endl;
fout << "Cipher:" << endl;
for (u64 i = 0; i < MN; i++)
{
fout << setw(2) << cipher[i] + '\0';
}
fout << endl;
fout << "Tag:" << endl;
for (u64 i = 0; i < TAG_BYTE_NUMBER; i++)
{
fout << setw(2) << tag[i] + '\0';
}
fout << endl;
fout.close();
}
| [
"[email protected]"
] | |
475198350912e6586931d22cca9a391f31a074b5 | d8f8cd94f057453fdeea69605f0b7990548eff4a | /bindings/py_submodules.h | dc56e26f1bb919a40f9757948da9bd41a4bf185c | [
"MIT"
] | permissive | natj/runko | 2333e708171f607e1dc62d68fb85a766b5c55169 | 7cd6375c426723f53c91e31789b7ced72a38c5cb | refs/heads/master | 2023-09-04T09:06:35.817058 | 2023-02-02T13:29:48 | 2023-02-02T13:29:48 | 153,752,597 | 32 | 19 | MIT | 2023-09-06T21:10:15 | 2018-10-19T08:40:56 | Python | UTF-8 | C++ | false | false | 416 | h | #pragma once
#include <pybind11/pybind11.h>
#include <pybind11/stl.h>
namespace py = pybind11;
namespace tools {
void bind_tools(py::module& m);
}
namespace fields {
void bind_fields(py::module& m);
}
namespace vlv {
void bind_vlv(py::module& m);
}
namespace pic {
void bind_pic(py::module& m);
}
namespace rad {
void bind_rad(py::module& m);
}
namespace ffe {
void bind_ffe(py::module& m);
}
| [
"[email protected]"
] | |
3b2199f99e49cd2fcfa25720556d8d8e0bfbadb3 | 03628f41eeda6cbf7a642bfb8e85944143515bc5 | /week9/matrixChainMultiplication.cpp | faa31636fa00fa8199cfa8264a0653af6cd74698 | [] | no_license | thoatran/DataStructureAndAlgorithm | e5a6a580755c1567fd4848d2f2e160050552a4c9 | aac65af34e5d270be7d42296ffb276d8a8701607 | refs/heads/master | 2020-06-12T05:17:17.152517 | 2019-08-04T16:28:27 | 2019-08-04T16:28:27 | 194,204,557 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,522 | cpp | //To compile and run the program, run the follơing command lines:
// g++ -std=c++11 -o matrixChainMultiplication matrixChainMultiplication.cpp
// ./matrixChainMultiplication
#include <iostream>
#include <limits>
using namespace std;
void printParenthesis(int i, int j, int n, int *s, char &name) {
if (i == j) {
cout << name++;
return;
}
cout << "(";
printParenthesis(i, *((s+j*n)+i), n, s, name);
printParenthesis(*((s+j*n)+i) + 1, j, n, s, name);
cout << ")";
}
void matrixChainOrder(int p[], int n) {
int m[n][n];
// cost is zero when multiplying one matrix.
for (int i=1; i<n; i++)
m[i][i] = 0;
// L is chain length.
for (int L=2; L<n; L++) {
for (int i=1; i<n-L+1; i++) {
int j = i+L-1;
m[i][j] = INT_MAX;
for (int k=i; k<=j-1; k++) {
int q = m[i][k] + m[k+1][j] + p[i-1]*p[k]*p[j];
if (q < m[i][j]) {
m[i][j] = q;
m[j][i] = k;
}
}
}
}
for(int i = 0; i < n; i++) {
for (int j = 0; j < n ; j++) {
printf("%10d", m[i][j]);
}
printf("\n");
}
printf("\n");
// The first matrix is printed as 'A', next as 'B', so on
char name = 'A';
cout << "Optimal Parenthesization is: ";
printParenthesis(1, n-1, n, (int *)m, name);
cout << "\nOptimal Cost is : " << m[1][n-1] << endl;
}
int main() {
int arr[] = {100, 10, 100, 1, 1000, 100}; //change this value to chnage the size ò the initial matrices
int n = sizeof(arr)/sizeof(arr[0]);
matrixChainOrder(arr, n);
return 0;
}
| [
"[email protected]"
] | |
034a3aabbf7e45a4ae01f67f385c4e4d3e5560df | 767419ca9e6a899d84db512e165c07c5842b6b27 | /aurobotservers/trunk/include/urob4/ufunctionposehist.h | 5be2ebb6830631abd28cbec2f5ab132ea5c4d320 | [] | no_license | savnik/LaserNavigation | 3bf7a95519456a96b34488cd821d4da4bee3ceed | 614fce06425c79e1d7e783aad4bbc97479798a7c | refs/heads/master | 2021-01-16T20:55:33.441230 | 2014-06-26T21:55:19 | 2014-06-26T21:55:19 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 3,521 | h | /***************************************************************************
* Copyright (C) 2006 by DTU (Christian Andersen) *
* [email protected] *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU Lesser General Public License as *
* published by the Free Software Foundation; either version 2 of the *
* License, or (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU Lesser General Public License for more details. *
* *
* You should have received a copy of the GNU Lesser General Public *
* License along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifndef UFUNCTIONPOSEHIST_H
#define UFUNCTIONPOSEHIST_H
#include "ufunctionbase.h"
#include "uresposehist.h"
/**
Interface function to pose history ressource.
@author Christian Andersen
*/
class UFunctionPoseHist : public UFunctionBase
{
public:
/**
Constructor */
UFunctionPoseHist();
/**
Destructor */
~UFunctionPoseHist();
/**
Name and version number of function */
// const char * name();
/**
Commands handled by this function */
// const char * commandList();
/**
* Called by server after this module is integrated into the server core structure,
* i.e. all core services are in place, but no commands are serviced for this module yet.
* Create any resources that this modules needs. */
virtual void createResources();
/**
Handle command */
virtual bool handleCommand(UServerInMsg * msg, void * extra);
/**
Set command and resource list based on alias name. */
virtual void setAliasName(const char * name);
/**
Space separated list of resources provided by this function */
// virtual const char * resourceList();
/**
Get a shared resource */
// virtual UResBase * getResource(const char * resID);
/**
Set shared resource */
virtual bool setResource(UResBase * ressource, bool remove);
/**
Function tests if all shared resources are loaded
for full functionality */
// virtual bool gotAllResources(char * missingThese, int missingTheseCnt);
private:
/**
Reply to simple requests */
bool handlePoseHistCommand(UServerInMsg * msg);
/**
Handle push commands for the pose hist structure */
bool handlePoseHistPush(UServerInMsg * msg);
/**
* List poses */
bool listPoses(int cnt);
protected:
/**
Pointer to pose history ressource */
UResPoseHist * poseHist;
/**
Is pose history locally created. */
bool poseHistLocal;
private:
/**
Command list */
char aliasCommandList[2 * MAX_ID_LENGTH];
/**
name of push command */
char aliasNamePush[MAX_ID_LENGTH];
/**
Name of resources */
char aliasResList[MAX_RESOURCE_LIST_SIZE];
};
#endif
| [
"ex25@localhost.(none)"
] | ex25@localhost.(none) |
1885c1aab3121095ce8831ec4b5474b8c38f8ec6 | f939d0b9e9bce8590b61748798aca2d3bb9a0431 | /libcornet/poller.hpp | 5331de7a23570e10585bb4fe5da3f4e8ae7eded1 | [
"Apache-2.0"
] | permissive | fossabot/libcornet | de148f1232c50296035673f0309c548846b880a6 | 5593489d3d02603b0c8c28e85ce7204779eb5ec0 | refs/heads/master | 2022-11-23T19:23:42.691323 | 2020-07-25T05:28:59 | 2020-07-25T05:28:59 | 282,377,696 | 0 | 0 | null | 2020-07-25T05:28:54 | 2020-07-25T05:28:54 | null | UTF-8 | C++ | false | false | 1,378 | hpp | /*
* Copyright 2020 Alex Syrnikov <[email protected]>
* SPDX-License-Identifier: Apache-2.0
*
* This file is part of libcornet (https://github.com/pioneer19/libcornet).
*/
#pragma once
#include <sys/epoll.h>
#include <csignal>
#include <cstdint>
#include <memory>
#include <functional>
#include <libcornet/signal_processor.hpp>
#include <libcornet/poller_cb.hpp>
namespace pioneer19::cornet
{
class TcpSocket;
class AsyncFile;
class Poller
{
public:
Poller();
Poller( Poller&& ) noexcept;
Poller& operator=( Poller&& other ) noexcept;
Poller( const Poller& ) = delete;
Poller& operator=( const Poller& ) = delete;
void run();
void stop() noexcept { m_stop = true; }
void run_on_signal( int signum, std::function<void()> func );
void add_socket( const TcpSocket& socket, PollerCb* poller_cb
,uint32_t mask = EPOLLIN|EPOLLOUT|EPOLLRDHUP|EPOLLPRI|EPOLLET );
void add_file( const AsyncFile& async_file, PollerCb* poller_cb
,uint32_t mask = EPOLLIN|EPOLLRDHUP|EPOLLPRI|EPOLLET );
static std::string events_string( uint32_t events_mask );
private:
int add_fd( int fd, PollerCb* poller_cb
,uint32_t mask = EPOLLIN|EPOLLOUT|EPOLLRDHUP|EPOLLPRI|EPOLLET );
void close();
int m_poller_fd = -1;
bool m_stop = false;
std::unique_ptr<SignalProcessor> m_signal_processor;
};
}
| [
"[email protected]"
] | |
531d78ebe51e14ed5dda1c15cc5828483f55b407 | 3cbea0497545c00ffc87fe1fa8a74dfe88dc9509 | /581_ShortestUnsortedContinuousArray.cpp | 6d708b4d438372263c74ec0aa8cace165c137ec7 | [] | no_license | yuhenghuang/Leetcode | 40b954676feb3a2ef350188a6d86dadc44e84d71 | 3c5aafa7969a5a1eb01106676a5b94d404d07d9f | refs/heads/master | 2023-08-30T18:17:16.209053 | 2023-08-25T01:05:49 | 2023-08-25T01:05:49 | 249,166,616 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 587 | cpp | #include <local_leetcode.hpp>
class Solution {
public:
int findUnsortedSubarray(vector<int>& nums) {
int n = nums.size();
int p = 0;
int temp = INT_MIN;
for (int i=0; i<n; ++i) {
if (nums[i] < temp)
p = i;
else
temp = nums[i];
}
int q = 1;
temp = INT_MAX;
for (int i=n-1; i>=0; --i) {
if (nums[i] > temp)
q = i;
else
temp = nums[i];
}
return p - q + 1;
}
};
int main() {
EXECS(Solution::findUnsortedSubarray);
return 0;
} | [
"[email protected]"
] | |
3393770b7e9b3192c575ad571fa7e6308fbb0608 | 6cf73380bfe9deec4ce424e9d60a2838d18c32be | /src/BinDecHexOctConverter/Converter/OctalConverter.cpp | b5703065c0d47550c65e9411b4fe55886252a4a4 | [
"MIT"
] | permissive | Uroy01/BinDecHexOctConverter | e2b1e02743a9528c85dfcff284718d4f4397fe88 | a3cde288aefed1a96d04685600bba56c3ba5a698 | refs/heads/master | 2023-03-18T20:33:13.523872 | 2016-09-21T10:40:14 | 2016-09-21T10:40:14 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,075 | cpp |
#include <cstdio>
#include <cstdlib>
#include <sstream>
#include "OctalConverter.h"
using namespace std;
namespace NumberBaseConverter
{
string OctalConverter::ConvertToDecimal(string number)
{
int decimalNum = parseIntFromString(number);
char temp[32];
sprintf(temp, "%d", decimalNum);
return temp;
} // end method
string OctalConverter::ConvertToHexadecimal(string number)
{
string decimalNumber = ConvertToDecimal(number);
return decimalConverter_m.ConvertToHexadecimal(decimalNumber);
} // end method
string OctalConverter::ConvertToBinary(string number)
{
string decimalNumber = ConvertToDecimal(number);
return decimalConverter_m.ConvertToBinary(decimalNumber);
} // end method
int OctalConverter::parseIntFromString(string number)
{
int decimalNum;
stringstream ss;
ss << std::oct << number;
ss >> decimalNum;
return decimalNum;
} // end method
} // end namespace | [
"[email protected]"
] | |
3f5f3c1a2d535947e4d313282431d0175d939d67 | a21979910065ff0e8586b6c30e3b963a1c60d284 | /yacppccpp/fndef.h | a086cc01f64772a07501c40172b2db72a444708a | [
"MIT"
] | permissive | izik1/yacppccpp | 556824d5a809a1d772aaeab7c28abfc256dedee8 | 382b21c5e43ce817e615dda4db46dcad4ca2f850 | refs/heads/master | 2021-08-24T14:03:18.580102 | 2017-12-10T03:56:22 | 2017-12-10T03:56:22 | 106,514,191 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 642 | h | #pragma once
#include "codetype.h"
#include <vector>
#include <string>
#pragma warning(push, 0)
#include "llvm/IR/Type.h"
#pragma warning(pop)
#include "function.h"
#include "ast.h"
class fndef {
public:
std::vector<std::shared_ptr<codetype>> m_argTypes;
std::vector<std::string> m_argNames;
std::vector<llvm::Type*> m_argllvmTypes;
function* m_fn;
std::shared_ptr<ast> m_body;
fndef(
std::vector<std::shared_ptr<codetype>> p_argTypes,
std::vector<std::string> p_argNames,
std::vector<llvm::Type*> p_argllvmTypes,
function* p_fn,
std::shared_ptr<ast> p_body);
~fndef();
};
| [
"[email protected]"
] | |
8474f289a82413dea2df36209659dd39aa872eca | 300de94b3294d23a31c3fb963a4ebd8796dbc36a | /geometry_msgs/TransformStamped.h | eb8f708c223fe648ef7ac63c4c2e392e70c75257 | [] | no_license | uas-at-ucla-dependencies/sensor_msgs | 2ac6950a8b021da211cf4c4d8453a597d5985faa | 7926ae1b63c33e9207483253f2911e5551418afe | refs/heads/master | 2020-07-09T17:42:53.824301 | 2019-03-07T21:06:12 | 2019-03-07T21:06:12 | 204,037,375 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 8,186 | h | // Generated by gencpp from file geometry_msgs/TransformStamped.msg
// DO NOT EDIT!
#ifndef GEOMETRY_MSGS_MESSAGE_TRANSFORMSTAMPED_H
#define GEOMETRY_MSGS_MESSAGE_TRANSFORMSTAMPED_H
#include <string>
#include <vector>
#include <map>
#include <ros/types.h>
#include <ros/serialization.h>
#include <ros/builtin_message_traits.h>
#include <ros/message_operations.h>
#include <std_msgs/Header.h>
#include <geometry_msgs/Transform.h>
namespace geometry_msgs
{
template <class ContainerAllocator>
struct TransformStamped_
{
typedef TransformStamped_<ContainerAllocator> Type;
TransformStamped_()
: header()
, child_frame_id()
, transform() {
}
TransformStamped_(const ContainerAllocator& _alloc)
: header(_alloc)
, child_frame_id(_alloc)
, transform(_alloc) {
(void)_alloc;
}
typedef ::std_msgs::Header_<ContainerAllocator> _header_type;
_header_type header;
typedef std::basic_string<char, std::char_traits<char>, typename ContainerAllocator::template rebind<char>::other > _child_frame_id_type;
_child_frame_id_type child_frame_id;
typedef ::geometry_msgs::Transform_<ContainerAllocator> _transform_type;
_transform_type transform;
typedef boost::shared_ptr< ::geometry_msgs::TransformStamped_<ContainerAllocator> > Ptr;
typedef boost::shared_ptr< ::geometry_msgs::TransformStamped_<ContainerAllocator> const> ConstPtr;
}; // struct TransformStamped_
typedef ::geometry_msgs::TransformStamped_<std::allocator<void> > TransformStamped;
typedef boost::shared_ptr< ::geometry_msgs::TransformStamped > TransformStampedPtr;
typedef boost::shared_ptr< ::geometry_msgs::TransformStamped const> TransformStampedConstPtr;
// constants requiring out of line definition
template<typename ContainerAllocator>
std::ostream& operator<<(std::ostream& s, const ::geometry_msgs::TransformStamped_<ContainerAllocator> & v)
{
ros::message_operations::Printer< ::geometry_msgs::TransformStamped_<ContainerAllocator> >::stream(s, "", v);
return s;
}
} // namespace geometry_msgs
namespace ros
{
namespace message_traits
{
// BOOLTRAITS {'IsFixedSize': False, 'IsMessage': True, 'HasHeader': True}
// {'std_msgs': ['/opt/ros/melodic/share/std_msgs/cmake/../msg'], 'geometry_msgs': ['/tmp/binarydeb/ros-melodic-geometry-msgs-1.12.7/msg']}
// !!!!!!!!!!! ['__class__', '__delattr__', '__dict__', '__doc__', '__eq__', '__format__', '__getattribute__', '__hash__', '__init__', '__module__', '__ne__', '__new__', '__reduce__', '__reduce_ex__', '__repr__', '__setattr__', '__sizeof__', '__str__', '__subclasshook__', '__weakref__', '_parsed_fields', 'constants', 'fields', 'full_name', 'has_header', 'header_present', 'names', 'package', 'parsed_fields', 'short_name', 'text', 'types']
template <class ContainerAllocator>
struct IsFixedSize< ::geometry_msgs::TransformStamped_<ContainerAllocator> >
: FalseType
{ };
template <class ContainerAllocator>
struct IsFixedSize< ::geometry_msgs::TransformStamped_<ContainerAllocator> const>
: FalseType
{ };
template <class ContainerAllocator>
struct IsMessage< ::geometry_msgs::TransformStamped_<ContainerAllocator> >
: TrueType
{ };
template <class ContainerAllocator>
struct IsMessage< ::geometry_msgs::TransformStamped_<ContainerAllocator> const>
: TrueType
{ };
template <class ContainerAllocator>
struct HasHeader< ::geometry_msgs::TransformStamped_<ContainerAllocator> >
: TrueType
{ };
template <class ContainerAllocator>
struct HasHeader< ::geometry_msgs::TransformStamped_<ContainerAllocator> const>
: TrueType
{ };
template<class ContainerAllocator>
struct MD5Sum< ::geometry_msgs::TransformStamped_<ContainerAllocator> >
{
static const char* value()
{
return "b5764a33bfeb3588febc2682852579b0";
}
static const char* value(const ::geometry_msgs::TransformStamped_<ContainerAllocator>&) { return value(); }
static const uint64_t static_value1 = 0xb5764a33bfeb3588ULL;
static const uint64_t static_value2 = 0xfebc2682852579b0ULL;
};
template<class ContainerAllocator>
struct DataType< ::geometry_msgs::TransformStamped_<ContainerAllocator> >
{
static const char* value()
{
return "geometry_msgs/TransformStamped";
}
static const char* value(const ::geometry_msgs::TransformStamped_<ContainerAllocator>&) { return value(); }
};
template<class ContainerAllocator>
struct Definition< ::geometry_msgs::TransformStamped_<ContainerAllocator> >
{
static const char* value()
{
return "# This expresses a transform from coordinate frame header.frame_id\n\
# to the coordinate frame child_frame_id\n\
#\n\
# This message is mostly used by the \n\
# <a href=\"http://wiki.ros.org/tf\">tf</a> package. \n\
# See its documentation for more information.\n\
\n\
Header header\n\
string child_frame_id # the frame id of the child frame\n\
Transform transform\n\
\n\
================================================================================\n\
MSG: std_msgs/Header\n\
# Standard metadata for higher-level stamped data types.\n\
# This is generally used to communicate timestamped data \n\
# in a particular coordinate frame.\n\
# \n\
# sequence ID: consecutively increasing ID \n\
uint32 seq\n\
#Two-integer timestamp that is expressed as:\n\
# * stamp.sec: seconds (stamp_secs) since epoch (in Python the variable is called 'secs')\n\
# * stamp.nsec: nanoseconds since stamp_secs (in Python the variable is called 'nsecs')\n\
# time-handling sugar is provided by the client library\n\
time stamp\n\
#Frame this data is associated with\n\
# 0: no frame\n\
# 1: global frame\n\
string frame_id\n\
\n\
================================================================================\n\
MSG: geometry_msgs/Transform\n\
# This represents the transform between two coordinate frames in free space.\n\
\n\
Vector3 translation\n\
Quaternion rotation\n\
\n\
================================================================================\n\
MSG: geometry_msgs/Vector3\n\
# This represents a vector in free space. \n\
# It is only meant to represent a direction. Therefore, it does not\n\
# make sense to apply a translation to it (e.g., when applying a \n\
# generic rigid transformation to a Vector3, tf2 will only apply the\n\
# rotation). If you want your data to be translatable too, use the\n\
# geometry_msgs/Point message instead.\n\
\n\
float64 x\n\
float64 y\n\
float64 z\n\
================================================================================\n\
MSG: geometry_msgs/Quaternion\n\
# This represents an orientation in free space in quaternion form.\n\
\n\
float64 x\n\
float64 y\n\
float64 z\n\
float64 w\n\
";
}
static const char* value(const ::geometry_msgs::TransformStamped_<ContainerAllocator>&) { return value(); }
};
} // namespace message_traits
} // namespace ros
namespace ros
{
namespace serialization
{
template<class ContainerAllocator> struct Serializer< ::geometry_msgs::TransformStamped_<ContainerAllocator> >
{
template<typename Stream, typename T> inline static void allInOne(Stream& stream, T m)
{
stream.next(m.header);
stream.next(m.child_frame_id);
stream.next(m.transform);
}
ROS_DECLARE_ALLINONE_SERIALIZER
}; // struct TransformStamped_
} // namespace serialization
} // namespace ros
namespace ros
{
namespace message_operations
{
template<class ContainerAllocator>
struct Printer< ::geometry_msgs::TransformStamped_<ContainerAllocator> >
{
template<typename Stream> static void stream(Stream& s, const std::string& indent, const ::geometry_msgs::TransformStamped_<ContainerAllocator>& v)
{
s << indent << "header: ";
s << std::endl;
Printer< ::std_msgs::Header_<ContainerAllocator> >::stream(s, indent + " ", v.header);
s << indent << "child_frame_id: ";
Printer<std::basic_string<char, std::char_traits<char>, typename ContainerAllocator::template rebind<char>::other > >::stream(s, indent + " ", v.child_frame_id);
s << indent << "transform: ";
s << std::endl;
Printer< ::geometry_msgs::Transform_<ContainerAllocator> >::stream(s, indent + " ", v.transform);
}
};
} // namespace message_operations
} // namespace ros
#endif // GEOMETRY_MSGS_MESSAGE_TRANSFORMSTAMPED_H
| [
"[email protected]"
] | |
4c707b9b60fd8042a096c7cb368393624b0fc1a7 | 944ddcde9dba7c11ac02ff76049ece1884dd6dc8 | /src/tests/vector_int_test.cpp | bafcd934e2ec931b1d1bde53578ae3a3a62efd88 | [
"MIT"
] | permissive | degarashi/frea | a4b64c1ad89b2a9ecf42ee5df615ac764718c34b | bb598245c2ab710cc816e98d7361e5863af5fd7e | refs/heads/master | 2020-05-21T19:25:41.061200 | 2019-09-07T11:40:12 | 2019-09-07T11:40:12 | 65,202,260 | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 1,190 | cpp | #include "test.hpp"
namespace frea {
namespace test {
// 整数ベクトルテストケース
template <class T>
using IntVector = RVector<T>;
using ITypes = ToTestTypes_t<types::VectorRange_t<types::Int_t>>;
TYPED_TEST_SUITE(IntVector, ITypes);
// 整数の積算、除算に関するチェック
TYPED_TEST(IntVector, MulDiv) {
USING(value_t);
USING(vec_t);
{
using Lim = std::numeric_limits<value_t>;
const lubee::Range<value_t> range = {Lim::lowest()/2048, Lim::max()/2048};
constexpr auto Th = lubee::Threshold<value_t>(0.4, 1);
const auto v0 = this->makeRVecNZ(Th, range);
const int n = this->mt().template getUniform<int>({1,8});
auto mul = v0 * n;
auto sum = v0;
for(int i=1 ; i<n ; i++)
sum += v0;
ASSERT_EQ(sum, mul);
// 自身との除算は1
ASSERT_EQ(v0/v0, vec_t(1));
}
{
// 乗算して同じ数で除算すれば元と同じになる
constexpr auto BitWidth = sizeof(value_t)*8;
constexpr auto Width = (1 << BitWidth/4) - 1;
const vec_t v0 = this->makeRVec({-Width, Width});
const vec_t v1 = this->makeRVecNZ(1, {-Width, Width});
ASSERT_EQ(v0, v0*v1/v1);
}
}
}
}
| [
"[email protected]"
] | |
e0b4161a328baba7c0d8a083d502dc92022b2982 | 600cdd365c0b8ef01a77e5bcb95d366a9a67008b | /src/server/scripts/EasternKingdoms/Stratholme/boss_magistrate_barthilas.cpp | 94ed8bd2017d893d602dc6b157d00b25fe198762 | [] | no_license | samaelsacred/Wow-4.3.4 | f2d47374ca674a58007d5dc02453ea891b80e173 | 88c972c667bc4c1602b35b73ed0c78cd4377b2e7 | refs/heads/master | 2020-12-25T12:40:38.084994 | 2015-03-23T17:29:22 | 2015-03-23T17:29:22 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 3,741 | cpp | /*
* Copyright (C) 2015 DevKM <http://facebook.com/krizttianmoreno>
* Copyright (C) 2006-2009 ScriptDev2 <https://scriptdev2.svn.sourceforge.net/>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along
* with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/* ScriptData
SDName: Boss_Magistrate_Barthilas
SD%Complete: 70
SDComment:
SDCategory: Stratholme
EndScriptData */
#include "ScriptMgr.h"
#include "ScriptedCreature.h"
#include "stratholme.h"
#define SPELL_DRAININGBLOW 16793
#define SPELL_CROWDPUMMEL 10887
#define SPELL_MIGHTYBLOW 14099
#define SPELL_FURIOUS_ANGER 16791
#define MODEL_NORMAL 10433
#define MODEL_HUMAN 3637
class boss_magistrate_barthilas : public CreatureScript
{
public:
boss_magistrate_barthilas() : CreatureScript("boss_magistrate_barthilas") { }
CreatureAI* GetAI(Creature* creature) const
{
return new boss_magistrate_barthilasAI (creature);
}
struct boss_magistrate_barthilasAI : public ScriptedAI
{
boss_magistrate_barthilasAI(Creature* creature) : ScriptedAI(creature) {}
uint32 DrainingBlow_Timer;
uint32 CrowdPummel_Timer;
uint32 MightyBlow_Timer;
uint32 FuriousAnger_Timer;
uint32 AngerCount;
void Reset()
{
DrainingBlow_Timer = 20000;
CrowdPummel_Timer = 15000;
MightyBlow_Timer = 10000;
FuriousAnger_Timer = 5000;
AngerCount = 0;
if (me->isAlive())
me->SetDisplayId(MODEL_NORMAL);
else
me->SetDisplayId(MODEL_HUMAN);
}
void MoveInLineOfSight(Unit* who)
{
//nothing to see here yet
ScriptedAI::MoveInLineOfSight(who);
}
void JustDied(Unit* /*killer*/)
{
me->SetDisplayId(MODEL_HUMAN);
}
void EnterCombat(Unit* /*who*/)
{
}
void UpdateAI(const uint32 diff)
{
//Return since we have no target
if (!UpdateVictim())
return;
if (FuriousAnger_Timer <= diff)
{
FuriousAnger_Timer = 4000;
if (AngerCount > 25)
return;
++AngerCount;
DoCast(me, SPELL_FURIOUS_ANGER, false);
} else FuriousAnger_Timer -= diff;
//DrainingBlow
if (DrainingBlow_Timer <= diff)
{
DoCastVictim(SPELL_DRAININGBLOW);
DrainingBlow_Timer = 15000;
} else DrainingBlow_Timer -= diff;
//CrowdPummel
if (CrowdPummel_Timer <= diff)
{
DoCastVictim(SPELL_CROWDPUMMEL);
CrowdPummel_Timer = 15000;
} else CrowdPummel_Timer -= diff;
//MightyBlow
if (MightyBlow_Timer <= diff)
{
DoCastVictim(SPELL_MIGHTYBLOW);
MightyBlow_Timer = 20000;
} else MightyBlow_Timer -= diff;
DoMeleeAttackIfReady();
}
};
};
void AddSC_boss_magistrate_barthilas()
{
new boss_magistrate_barthilas();
}
| [
"[email protected]"
] | |
88610b2e2f104f0136de2ac9a8631ac5d241f7b4 | 61aa319732d3fa7912e28f5ff7768498f8dda005 | /src/dev/x86/i8237.cc | 437a376bfd2c7122746a8374f2a6a18da44523a4 | [
"BSD-3-Clause",
"LicenseRef-scancode-proprietary-license",
"LGPL-2.0-or-later",
"MIT"
] | permissive | TeCSAR-UNCC/gem5-SALAM | 37f2f7198c93b4c18452550df48c1a2ab14b14fb | c14c39235f4e376e64dc68b81bd2447e8a47ff65 | refs/heads/main | 2023-06-08T22:16:25.260792 | 2023-05-31T16:43:46 | 2023-05-31T16:43:46 | 154,335,724 | 62 | 22 | BSD-3-Clause | 2023-05-31T16:43:48 | 2018-10-23T13:45:44 | C++ | UTF-8 | C++ | false | false | 5,052 | cc | /*
* Copyright (c) 2008 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "dev/x86/i8237.hh"
#include "base/cprintf.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
namespace gem5
{
namespace X86ISA
{
namespace
{
I8237::Register::ReadFunc
readUnimpl(const std::string &label)
{
return [label](I8237::Register ®) -> uint8_t {
panic("Read from i8237 %s unimplemented.", label);
};
}
I8237::Register::WriteFunc
writeUnimpl(const std::string &label)
{
return [label](I8237::Register ®, const uint8_t &value) {
panic("Write to i8237 %s unimplemented.", label);
};
}
} // anonymous namespace
I8237::Channel::ChannelAddrReg::ChannelAddrReg(Channel &channel) :
Register(csprintf("channel %d current address", channel.number))
{
reader(readUnimpl(name()));
writer(writeUnimpl(name()));
}
I8237::Channel::ChannelRemainingReg::ChannelRemainingReg(Channel &channel) :
Register(csprintf("channel %d remaining word count", channel.number))
{
reader(readUnimpl(name()));
writer(writeUnimpl(name()));
}
I8237::WriteOnlyReg::WriteOnlyReg(const std::string &new_name, Addr offset) :
Register(new_name)
{
reader([offset](I8237::Register ®) -> uint8_t {
panic("Illegal read from i8237 register %d.", offset);
});
}
I8237::I8237(const Params &p) : BasicPioDevice(p, 16), latency(p.pio_latency),
regs("registers", pioAddr), channels{{{0}, {1}, {2}, {3}}},
statusCommandReg("status/command"),
requestReg("request", 0x9),
setMaskBitReg("set mask bit", 0xa),
modeReg("mode", 0xb),
clearFlipFlopReg("clear flip-flop", 0xc),
temporaryMasterClearReg("temporary/maskter clear"),
clearMaskReg("clear mask", 0xe),
writeMaskReg("write mask", 0xf)
{
// Add the channel address and remaining registers.
for (auto &channel: channels)
regs.addRegisters({ channel.addrReg, channel.remainingReg });
// Add the other registers individually.
regs.addRegisters({
statusCommandReg.
reader(readUnimpl("status register")).
writer(writeUnimpl("command register")),
requestReg.
writer(writeUnimpl("request register")),
setMaskBitReg.
writer(this, &I8237::setMaskBit),
modeReg.
writer(writeUnimpl("mode register")),
clearFlipFlopReg.
writer(writeUnimpl("clear LSB/MSB flip-flop register")),
temporaryMasterClearReg.
reader(readUnimpl("temporary register")).
writer(writeUnimpl("master clear register")),
clearMaskReg.
writer(writeUnimpl("clear mask register")),
writeMaskReg.
writer(writeUnimpl("write all mask register bits"))
});
}
void
I8237::setMaskBit(Register ®, const uint8_t &command)
{
uint8_t select = bits(command, 1, 0);
uint8_t bitVal = bits(command, 2);
if (!bitVal)
panic("Turning on i8237 channels unimplemented.");
replaceBits(maskReg, select, bitVal);
}
Tick
I8237::read(PacketPtr pkt)
{
regs.read(pkt->getAddr(), pkt->getPtr<void>(), pkt->getSize());
pkt->makeAtomicResponse();
return latency;
}
Tick
I8237::write(PacketPtr pkt)
{
regs.write(pkt->getAddr(), pkt->getPtr<void>(), pkt->getSize());
pkt->makeAtomicResponse();
return latency;
}
void
I8237::serialize(CheckpointOut &cp) const
{
SERIALIZE_SCALAR(maskReg);
}
void
I8237::unserialize(CheckpointIn &cp)
{
UNSERIALIZE_SCALAR(maskReg);
}
} // namespace X86ISA
} // namespace gem5
| [
"[email protected]"
] | |
02fe2478cd99fe15cfb000ec967cf150fdc7e083 | ad74f7a42e8dec14ec7576252fcbc3fc46679f27 | /GnutellaProtector/GWebCache.cpp | ddd67c80ee7365b872d011b765b602c2e585263c | [] | no_license | radtek/TrapperKeeper | 56fed7afa259aee20d6d81e71e19786f2f0d9418 | 63f87606ae02e7c29608fedfdf8b7e65339b8e9a | refs/heads/master | 2020-05-29T16:49:29.708375 | 2013-05-15T08:33:23 | 2013-05-15T08:33:23 | null | 0 | 0 | null | null | null | null | UTF-8 | C++ | false | false | 28,707 | cpp | // GWebCache.cpp
#include "stdafx.h"
#include "GWebCache.h"
#include "ConnectionManager.h"
#include "imagehlp.h" // for MakeSureDirectoryPathExists
#include "GnutellaProtectorDll.h"
//
//
//
GWebCache::GWebCache()
{
srand((unsigned int)time(NULL));
m_socket.InitParent(this);
// Load url cache
//ReadWebCacheURLsFromFile();
// If there was no file, add these 51 hard-coded ones in
if(v_web_cache_urls.size()==0)
{
AddDefaultGWebCache();
WriteWebCacheURLsToFile();
}
}
//
//
//
GWebCache::~GWebCache()
{
}
//
//
//
void GWebCache::InitParent(ConnectionManager *manager)
{
p_manager=manager;
}
//
//
//
bool GWebCache::ConnectToWebCache()
{
if(v_web_cache_urls.size()==0)
AddDefaultGWebCache();
// Check to see if we are already connecting to a host cache
if(m_socket.IsSocket())
{
return false;
}
// Set the connect time (for time-out check)
m_connect_time=CTime::GetCurrentTime();
char log[1024];
p_manager->p_parent->m_log_window_manager.Log("Connection Manager : ",0x00800080); // dark purple
p_manager->p_parent->m_log_window_manager.Log("GWebCache : ",0x00008000); // dark green
// 1 out of ten, connect to web cache to get urls instead of hosts
//we don't want URL reports for now
if(rand() % 10 == 0)
{
string url=v_web_cache_urls[rand() % v_web_cache_urls.size()];
p_manager->p_parent->m_log_window_manager.Log("GetURLFile",0x000000FF); // red
p_manager->p_parent->m_log_window_manager.Log(" from : ",0x00888888); // grey
sprintf(log,"%s\n",url.c_str());
p_manager->p_parent->m_log_window_manager.Log(log);
// Connect and get the urlfile
m_socket.GetURLFile((char *)url.c_str());
}
else
{
string url=v_web_cache_urls[rand() % v_web_cache_urls.size()];
p_manager->p_parent->m_log_window_manager.Log("GetHostFile",0x00FF0000); // blue
p_manager->p_parent->m_log_window_manager.Log(" from : ",0x00888888); // grey
sprintf(log,"%s\n",url.c_str());
p_manager->p_parent->m_log_window_manager.Log(log);
// Connect and get the hostfile
m_socket.GetHostFile((char *)url.c_str());
}
return true;
}
//
//
//
void GWebCache::ReportURLs(vector<string> &urls)
{
UINT i,j;
// Make sure that there are no duplicates
for(i=0;i<urls.size();i++)
{
bool found=false;
for(j=0;j<v_web_cache_urls.size();j++)
{
if(stricmp(urls[i].c_str(),v_web_cache_urls[j].c_str())==0)
{
found=true;
break;
}
}
if(!found)
{
v_web_cache_urls.push_back(urls[i]);
}
}
// Keep the vector size down to 200
while(v_web_cache_urls.size()>200)
{
v_web_cache_urls.erase(v_web_cache_urls.begin());
}
// Write web cache urls to file
WriteWebCacheURLsToFile();
// Log it
char log[1024];
p_manager->p_parent->m_log_window_manager.Log("Connection Manager : ",0x00800080); // dark purple
p_manager->p_parent->m_log_window_manager.Log("GWebCache : ",0x00008000); // dark green
p_manager->p_parent->m_log_window_manager.Log("Reported URLs : ",0x000000FF); // red
sprintf(log,"%u\n",urls.size());
p_manager->p_parent->m_log_window_manager.Log(log,0,true); // black bold
}
//
//
//
void GWebCache::ReportHosts(vector<string> &hosts)
{
UINT i;
// Convert the ip:port strings to gnutella hosts
vector<GnutellaHost> gnutella_hosts;
for(i=0;i<hosts.size();i++)
{
char *buf=new char[hosts[i].size()+1];
strcpy(buf,hosts[i].c_str());
if(strchr(buf,':')!=NULL)
{
GnutellaHost gnutella_host;
char *port=strchr(buf,':');
*port='\0';
port++;
gnutella_host.Host(buf);
gnutella_host.Port(atoi(port));
gnutella_hosts.push_back(gnutella_host);
}
delete [] buf;
}
// Report these gnutella hosts to the connection manager
p_manager->ReportHosts(gnutella_hosts);
// Log it
char log[1024];
p_manager->p_parent->m_log_window_manager.Log("Connection Manager : ",0x00800080); // dark purple
p_manager->p_parent->m_log_window_manager.Log("GWebCache : ",0x00008000); // dark green
p_manager->p_parent->m_log_window_manager.Log("Reported Hosts : ",0x00FF0000); // blue
sprintf(log,"%u\n",hosts.size());
p_manager->p_parent->m_log_window_manager.Log(log,0,true); // black bold
}
//
//
//
void GWebCache::ReadWebCacheURLsFromFile()
{
v_web_cache_urls.clear();
// If there is a web_cache_urls.txt file, read it in, on each line is a web cache url
CStdioFile file;
if(file.Open("Host Cache\\web_cache_urls.txt",CFile::modeRead|CFile::typeText|CFile::shareDenyNone)==TRUE)
{
char buf[4096+1];
while(file.ReadString(buf,4096))
{
CString cstring=buf;
cstring.TrimLeft();
cstring.TrimRight();
string str;
if(cstring.Find("<")==-1 && cstring.Find("|")==-1 && cstring.Find("\"")==-1 && cstring.Find(",")==-1
&& cstring.Find(",")==-1 && cstring.Find("%")==-1 && cstring.Find("?")==-1)
{
int index = cstring.ReverseFind('.');
if(index != -1 && index != cstring.GetLength()-1)
str=cstring;
}
if(str.size()>0)
{
v_web_cache_urls.push_back(str);
}
}
file.Close();
}
WriteWebCacheURLsToFile();
}
//
//
//
void GWebCache::WriteWebCacheURLsToFile()
{
UINT i;
// Open the hosts.dat file for writing...if the open fails, then who cares
CStdioFile file;
MakeSureDirectoryPathExists("Host Cache\\");
if(file.Open("Host Cache\\web_cache_urls.txt",CFile::modeCreate|CFile::modeWrite|CFile::typeText|CFile::shareDenyNone)==FALSE)
{
return;
}
for(i=0;i<v_web_cache_urls.size();i++)
{
file.WriteString(v_web_cache_urls[i].c_str());
file.WriteString("\n");
}
file.Close();
}
//
//
//
unsigned int GWebCache::NumURLs()
{
return (UINT)v_web_cache_urls.size();
}
//
//
//
void GWebCache::CheckForTimeout()
{
if(m_socket.IsSocket()==false)
{
return;
}
// Check for time-out
CTime now=CTime::GetCurrentTime();
if((now-m_connect_time).GetTotalSeconds()>10)
{
// This connection has timed out. Close the socket and try another connection.
ReportBadURL(m_socket.m_url.c_str());
m_socket.Close();
// Log it
p_manager->p_parent->m_log_window_manager.Log("Connection Manager : ",0x00800080); // dark purple
p_manager->p_parent->m_log_window_manager.Log("GWebCache : ",0x00008000); // dark green
p_manager->p_parent->m_log_window_manager.Log("CONNECTION TIMED OUT\n",0x000000FF,true); // bold red
}
}
//
//
//
void GWebCache::ReportBadURL(const char* url)
{
char* bad_url = new char[strlen(url)+1];
strcpy(bad_url,url);
char* ptr = strchr(bad_url,'?');
*ptr='\0';
bool found=false;
vector<string>::iterator iter = v_web_cache_urls.begin();
while(iter!=v_web_cache_urls.end())
{
if(strcmp(bad_url,iter->c_str())==0)
{
v_web_cache_urls.erase(iter);
break;
}
iter++;
}
delete [] bad_url;
}
//
//
//
void GWebCache::AddDefaultGWebCache()
{
#ifdef BEARSHARE_ONLY
#ifndef SPLITTED
v_web_cache_urls.push_back("http://ygwc.y-0.net/ygwc.php");
v_web_cache_urls.push_back("http://www.xolox.nl/gwebcache/default.asp");
v_web_cache_urls.push_back("http://www.tfs-net.de/cgi-bin/perlgcache.cgi");
v_web_cache_urls.push_back("http://www.softgap.com/ares/gcache.php");
v_web_cache_urls.push_back("http://www.mager.org/cgi-bin/gcache.cgi");
v_web_cache_urls.push_back("http://www.la-forza.com/gnucache/gcache.php");
v_web_cache_urls.push_back("http://www.easwww.xolox.nl/gwebcache/default.asp");
v_web_cache_urls.push_back("http://www.bstsystems.com/gwebcache/gcache.php");
v_web_cache_urls.push_back("http://starscream.dynalias.com/");
v_web_cache_urls.push_back("http://parallel.hpc.unsw.edu.au/~duraid/gwebcache-0.7.4/gcache.php");
v_web_cache_urls.push_back("http://overbeer.ghostwhitecrab.de/");
v_web_cache_urls.push_back("http://nodes.dyndns.org/mcache.php");
v_web_cache_urls.push_back("http://nodecache.dyndns.org/cgi-bin/perlgcache.cgi");
v_web_cache_urls.push_back("http://loot.alumnigroup.org/");
v_web_cache_urls.push_back("http://jum.dyndns.org:9006/GWebCache/req");
v_web_cache_urls.push_back("http://intense.homelinux.coww.xolox.nl/gwebcache/");
v_web_cache_urls.push_back("http://gwebcache.m2k1.net/mcache.php");
v_web_cache_urls.push_back("http://gwc1.solutions.lv/pgc.cgi");
v_web_cache_urls.push_back("http://gwc1.nouiz.org/servlet/GWebCache/req");
v_web_cache_urls.push_back("http://gwc1.nouiz.org/servlet/GWebCache");
v_web_cache_urls.push_back("http://gwc1.mager.org:8081/GWebCache/req");
v_web_cache_urls.push_back("http://gwc.technofoundry.net/cgi-bin/gcache.cgi");
v_web_cache_urls.push_back("http://gwc.nonexiste.net:8080/cgi-bin/gcache.cgi");
v_web_cache_urls.push_back("http://gwc.lame.net/gwcii.php");
v_web_cache_urls.push_back("http://gcachw.xolox.nl/gwebcache");
v_web_cache_urls.push_back("http://gcache.cloppy.net/");
v_web_cache_urls.push_back("http://g2cache.theg2.net/gwcache/lynnx.asp");
v_web_cache_urls.push_back("http://g1.blacknex.net/cgi-bin/perlgcache.cgi");
v_web_cache_urls.push_back("http://crab.bishopston.net:3558/");
v_web_cache_urls.push_back("http://cache.kicks-ass.net:8000/");
#else
v_web_cache_urls.push_back("http://bbs.robertwoolley.co.uk/gwebcache/gcache.php");
v_web_cache_urls.push_back("http://bobsmith.is-a-geek.org/");
v_web_cache_urls.push_back("http://bobsmith-gwc.kicks-ass.org/");
v_web_cache_urls.push_back("http://cache.kicks-ass.net:8000/");
v_web_cache_urls.push_back("http://cache.mynapster.com/index.php");
v_web_cache_urls.push_back("http://cache.warrink.ath.cx:8000/");
v_web_cache_urls.push_back("http://cgi.edu.lahti.fi/~staili/gwebcache/index.php");
v_web_cache_urls.push_back("http://corky.net/gcache/gcache.php");
v_web_cache_urls.push_back("http://crab.ghostwhitecrab.com/gwc/");
v_web_cache_urls.push_back("http://dlaikar.de/gcache/gcache.php");
v_web_cache_urls.push_back("http://dlaikar.de/gcache2/gcache.php");
v_web_cache_urls.push_back("http://dlaikar.de/gcache-mac/gcache.php");
v_web_cache_urls.push_back("http://g2cache.theg2.net/gwcache/lynnx.asp");
v_web_cache_urls.push_back("http://galvatron.dyndns.org:59009/gwcache");
v_web_cache_urls.push_back("http://gcache.cloppy.net/");
v_web_cache_urls.push_back("http://gcache.kccricket.net/cgi-bin/perlgcache.cgi");
v_web_cache_urls.push_back("http://gcache.shacknet.nu:8088/gwc");
v_web_cache_urls.push_back("http://gcachw.xolox.nl/gwebcache");
v_web_cache_urls.push_back("http://goeg.dk/Gnutella/gcache.php");
v_web_cache_urls.push_back("http://grupaprojektor.host.sk/gcache.php");
v_web_cache_urls.push_back("http://gwc.ionichost.com/gwc.php");
v_web_cache_urls.push_back("http://gwc.itbl.net:3000/gwebcache/gcache.php");
v_web_cache_urls.push_back("http://gwc.nonamer.ath.cx:8080/");
v_web_cache_urls.push_back("http://gwc.nonexiste.net/");
v_web_cache_urls.push_back("http://gwc1.mager.org:8081/GWebCache/req");
v_web_cache_urls.push_back("http://gwc1.nouiz.org/servlet/GWebCache");
v_web_cache_urls.push_back("http://gwc1.nouiz.org/servlet/GWebCache/re");
v_web_cache_urls.push_back("http://gwc1.nouiz.org/servlet/GWebCache/req");
v_web_cache_urls.push_back("http://gwebcache.bearshare.net/gcache.php");
v_web_cache_urls.push_back("http://gwebcache1.limewire.com/gwebcache/cgi-bin/perlgcache.cgi");
v_web_cache_urls.push_back("http://gwebcache3.jonatkins.org.uk/perlgcache.cgi");
v_web_cache_urls.push_back("http://home.1asphost.com/kunkie/lynn.asp");
v_web_cache_urls.push_back("http://intense.homelinux.coww.xolox.nl/gwebcache");
v_web_cache_urls.push_back("http://jason.ionichost.com/gwebcache/gcache.php");
v_web_cache_urls.push_back("http://jum.dyndns.org:9006/GWebCache/req");
v_web_cache_urls.push_back("http://laplata.dnsalias.org/cgi-bin/perlgcache.cgi");
v_web_cache_urls.push_back("http://loot.alumnigroup.org/");
v_web_cache_urls.push_back("http://mac.gc.dlaikar.de/");
v_web_cache_urls.push_back("http://members.lycos.co.uk/malaycyber/gwcii.php");
v_web_cache_urls.push_back("http://mitglied.lycos.de/monster954/gwebcache/gcache.php");
v_web_cache_urls.push_back("http://mute-cache.2y.net/cgi-bin/perlgcache.cgi");
v_web_cache_urls.push_back("http://r3dk0w.dyndns.org/cgi-bin/gwebcache/gcache.cgi");
v_web_cache_urls.push_back("http://terrorist.host.sk/gnutella-cache/gwcii.php");
v_web_cache_urls.push_back("http://uui.upce.cz/perlgcache.cgi");
v_web_cache_urls.push_back("http://www.commontology.de/andreas/gwebcache/gcache.php");
v_web_cache_urls.push_back("http://www.easwww.xolox.nl/gwebcache");
v_web_cache_urls.push_back("http://www.gbwebpro.com/guo/lynn/cache/lynn.asp");
v_web_cache_urls.push_back("http://www.goeg.dk/Gnutella/gcache.php");
v_web_cache_urls.push_back("http://www.gwc.freeola.com/cgi-bin/gwc/gcache.cgi");
v_web_cache_urls.push_back("http://www.gwc2.ip3.com/cgi-bin/gwc2/gcache.cgi");
v_web_cache_urls.push_back("http://www.kuwaitcontact.com/g2/bazooka.php");
v_web_cache_urls.push_back("http://www.la-forza.com/gnucache/gcache.php");
v_web_cache_urls.push_back("http://www.p2pchat.net/gwebcache/gcache.php");
v_web_cache_urls.push_back("http://www.rodage.net/gnetcache/gcache.php");
v_web_cache_urls.push_back("http://www.thany.org/gcache/gcache.php");
v_web_cache_urls.push_back("http://www.theholt.net/cache.php");
v_web_cache_urls.push_back("http://www.theholt.net/gcache.php");
v_web_cache_urls.push_back("http://www.xolox.nl/gwebcache");
v_web_cache_urls.push_back("http://www27.brinkster.com/snok7/lynn04/lynn.asp");
v_web_cache_urls.push_back("http://www.hottdeals.com/postNuke7/gWebCache");
v_web_cache_urls.push_back("http://node01.hewson.cns.ufl.edu:8080/cpwc4.cgi");
v_web_cache_urls.push_back("http://nodecache.dyndns.org/cgi-bin/perlgcache.cgi");
v_web_cache_urls.push_back("http://crab.bishopston.net:3558/");
v_web_cache_urls.push_back("http://cache.warrink.ath.cx:8000/");
v_web_cache_urls.push_back("http://krill.shacknet.nu:20095/gwc");
v_web_cache_urls.push_back("http://cache.mynapster.com/");
v_web_cache_urls.push_back("http://node00.hewson.cns.ufl.edu:8080/pwc.cgi");
v_web_cache_urls.push_back("http://ds.tranzision.com/cache/gcache.php");
v_web_cache_urls.push_back("http://www.xolox.nl/gwebcache/");
v_web_cache_urls.push_back("http://mute.d2lod.org/gwcii.php");
v_web_cache_urls.push_back("http://gwebcache2.limewire.com:9000/gwc");
v_web_cache_urls.push_back("http://gwebcache.bearshare.net/gcache.php");
v_web_cache_urls.push_back("http://mute-net.sourceforge.net/cgi-bin/perlgcache.cgi");
v_web_cache_urls.push_back("http://unknown.pingtime.com/gwebcache/gcache.php");
v_web_cache_urls.push_back("http://cache.kicks-ass.net:8000/");
v_web_cache_urls.push_back("http://members.lycos.co.uk/itgwc/webcache/gcache.php");
v_web_cache_urls.push_back("http://loot.alumnigroup.org/");
v_web_cache_urls.push_back("http://crab1.dyndns.org:8002/gwc/");
v_web_cache_urls.push_back("http://www.goeg.dk/Gnutella/gcache.php");
v_web_cache_urls.push_back("http://www.xolox.nl:80/gwebcache/");
v_web_cache_urls.push_back("http://crabcake.dynalias.net:9627/");
v_web_cache_urls.push_back("http://gcache.cloppy.net/");
v_web_cache_urls.push_back("http://gwc1.mager.org:8081/GWebCache/req");
v_web_cache_urls.push_back("http://loot.alumnigroup.org");
v_web_cache_urls.push_back("http://gwc.eigengang.nl/venus.php");
v_web_cache_urls.push_back("http://abilgisayarcs.host.sk/gnutella");
v_web_cache_urls.push_back("http://goeg.dk/Gnutella/gcache.php");
v_web_cache_urls.push_back("http://pokerface.bishopston.net:3558/");
v_web_cache_urls.push_back("http://gazth-sonika.ath.cx:8080/");
v_web_cache_urls.push_back("http://www.easwww.xolox.nl/GWEBcache/");
v_web_cache_urls.push_back("http://terrorist.host.sk/gnutella-cache/gwcii.php");
v_web_cache_urls.push_back("http://node01.hewson.cns.ufl.edu:8080/cpwc5.cgi");
v_web_cache_urls.push_back("http://www.roundbox.ws/gwebcache/gcache.php");
v_web_cache_urls.push_back("http://www.schraders.us/gwebcache-0.7.4/gcache.php");
v_web_cache_urls.push_back("http://gwc.lame.net/gwcii.php");
v_web_cache_urls.push_back("http://bobsmith.is-a-geek.org/index.cgi");
v_web_cache_urls.push_back("http://loot.alumnigroup.org/");
v_web_cache_urls.push_back("http://cache.mynapster.com/index.php");
v_web_cache_urls.push_back("http://g2cache.theg2.net/gwcache/lynnx.asp");
v_web_cache_urls.push_back("http://www.xolox.nl/gwebcache/default.asp");
v_web_cache_urls.push_back("http://www.gwc.freeola.com/cgi-bin/gwc/gcache.cgi");
v_web_cache_urls.push_back("http://node01.hewson.cns.ufl.edu:8080/cpwc2.cgi");
v_web_cache_urls.push_back("http://g1.blacknex.net/cgi-bin/perlgcache.cgi");
v_web_cache_urls.push_back("http://gwcrab.sarcastro.com:8001/");
v_web_cache_urls.push_back("http://gcache.kccricket.net/cgi-bin/perlgcache.cgi");
v_web_cache_urls.push_back("http://node01.hewson.cns.ufl.edu:8080/cpwc1.cgi");
v_web_cache_urls.push_back("http://crab2.dyndns.org:30002/gwc/");
v_web_cache_urls.push_back("http://www.mute.dds.nl/Mcache1/mcache.php");
v_web_cache_urls.push_back("http://gwc.ionichost.com/gwc.php");
v_web_cache_urls.push_back("http://node01.hewson.cns.ufl.edu:8080/ccpwcc.cgi");
v_web_cache_urls.push_back("http://www.testwebserver.net/cgi-bin/perlgcache.cgi");
v_web_cache_urls.push_back("http://g2.k4.cn:8080/");
v_web_cache_urls.push_back("http://www.vittavi.net/cgi-bin/perlgcache.cgi");
v_web_cache_urls.push_back("http://members.lycos.co.uk/coolebra/gwebcache-0.7.4/gcache.php");
v_web_cache_urls.push_back("http://kisama.ath.cx:8080/");
v_web_cache_urls.push_back("http://www.justthefaqs.org/gnu/gcache.php");
v_web_cache_urls.push_back("http://node01.hewson.cns.ufl.edu:8080/ccpwc.cgi");
v_web_cache_urls.push_back("http://gwebcache3.jonatkins.org.uk/perlgcache.cgi");
v_web_cache_urls.push_back("http://bobsmith.is-a-geek.org/");
v_web_cache_urls.push_back("http://www.easwww.xolox.nl/gwebcache/default.asp");
v_web_cache_urls.push_back("http://www.arach.net.au/~holmesd6/gcache.php");
v_web_cache_urls.push_back("http://godfella.host.sk/gwcii/gwcii.php");
v_web_cache_urls.push_back("http://loot.alumnigroup.org:80/");
v_web_cache_urls.push_back("http://node01.hewson.cns.ufl.edu:8080/pwc4.cgi");
v_web_cache_urls.push_back("http://gwebcache.daems.org/GWebCache/req");
v_web_cache_urls.push_back("http://loot.alumnigroup.org:80/");
v_web_cache_urls.push_back("http://galvatron.dyndns.org:59009/gwcache");
v_web_cache_urls.push_back("http://gwc.jooz.net:8010/gwc/");
v_web_cache_urls.push_back("http://ygwc.y-0.net/ygwc.php");
v_web_cache_urls.push_back("http://starscream.dynalias.com/");
v_web_cache_urls.push_back("http://intense.homelinux.coww.xolox.nl/gwebcache/");
v_web_cache_urls.push_back("http://node01.hewson.cns.ufl.edu:8080/cpwc3.cgi");
v_web_cache_urls.push_back("http://dlaikar.de/gcache2/gcache.php");
v_web_cache_urls.push_back("http://www.hottdeals.com/postNuke7/gWebCache/gcache.php");
#endif
#else
v_web_cache_urls.push_back("http://bbs.robertwoolley.co.uk/gwebcache/gcache.php");
v_web_cache_urls.push_back("http://bobsmith.is-a-geek.org/");
v_web_cache_urls.push_back("http://bobsmith-gwc.kicks-ass.org/");
v_web_cache_urls.push_back("http://cache.kicks-ass.net:8000/");
v_web_cache_urls.push_back("http://cache.mynapster.com/index.php");
v_web_cache_urls.push_back("http://cache.warrink.ath.cx:8000/");
v_web_cache_urls.push_back("http://cgi.edu.lahti.fi/~staili/gwebcache/index.php");
v_web_cache_urls.push_back("http://corky.net/gcache/gcache.php");
v_web_cache_urls.push_back("http://crab.ghostwhitecrab.com/gwc/");
v_web_cache_urls.push_back("http://dlaikar.de/gcache/gcache.php");
v_web_cache_urls.push_back("http://dlaikar.de/gcache2/gcache.php");
v_web_cache_urls.push_back("http://dlaikar.de/gcache-mac/gcache.php");
v_web_cache_urls.push_back("http://g2cache.theg2.net/gwcache/lynnx.asp");
v_web_cache_urls.push_back("http://galvatron.dyndns.org:59009/gwcache");
v_web_cache_urls.push_back("http://gcache.cloppy.net/");
v_web_cache_urls.push_back("http://gcache.kccricket.net/cgi-bin/perlgcache.cgi");
v_web_cache_urls.push_back("http://gcache.shacknet.nu:8088/gwc");
v_web_cache_urls.push_back("http://gcachw.xolox.nl/gwebcache");
v_web_cache_urls.push_back("http://goeg.dk/Gnutella/gcache.php");
v_web_cache_urls.push_back("http://grupaprojektor.host.sk/gcache.php");
v_web_cache_urls.push_back("http://gwc.ionichost.com/gwc.php");
v_web_cache_urls.push_back("http://gwc.itbl.net:3000/gwebcache/gcache.php");
v_web_cache_urls.push_back("http://gwc.nonamer.ath.cx:8080/");
v_web_cache_urls.push_back("http://gwc.nonexiste.net/");
v_web_cache_urls.push_back("http://gwc1.mager.org:8081/GWebCache/req");
v_web_cache_urls.push_back("http://gwc1.nouiz.org/servlet/GWebCache");
v_web_cache_urls.push_back("http://gwc1.nouiz.org/servlet/GWebCache/re");
v_web_cache_urls.push_back("http://gwc1.nouiz.org/servlet/GWebCache/req");
v_web_cache_urls.push_back("http://gwebcache.bearshare.net/gcache.php");
v_web_cache_urls.push_back("http://gwebcache1.limewire.com/gwebcache/cgi-bin/perlgcache.cgi");
v_web_cache_urls.push_back("http://gwebcache3.jonatkins.org.uk/perlgcache.cgi");
v_web_cache_urls.push_back("http://home.1asphost.com/kunkie/lynn.asp");
v_web_cache_urls.push_back("http://intense.homelinux.coww.xolox.nl/gwebcache");
v_web_cache_urls.push_back("http://jason.ionichost.com/gwebcache/gcache.php");
v_web_cache_urls.push_back("http://jum.dyndns.org:9006/GWebCache/req");
v_web_cache_urls.push_back("http://laplata.dnsalias.org/cgi-bin/perlgcache.cgi");
v_web_cache_urls.push_back("http://loot.alumnigroup.org/");
v_web_cache_urls.push_back("http://mac.gc.dlaikar.de/");
v_web_cache_urls.push_back("http://members.lycos.co.uk/malaycyber/gwcii.php");
v_web_cache_urls.push_back("http://mitglied.lycos.de/monster954/gwebcache/gcache.php");
v_web_cache_urls.push_back("http://mute-cache.2y.net/cgi-bin/perlgcache.cgi");
v_web_cache_urls.push_back("http://r3dk0w.dyndns.org/cgi-bin/gwebcache/gcache.cgi");
v_web_cache_urls.push_back("http://terrorist.host.sk/gnutella-cache/gwcii.php");
v_web_cache_urls.push_back("http://uui.upce.cz/perlgcache.cgi");
v_web_cache_urls.push_back("http://www.commontology.de/andreas/gwebcache/gcache.php");
v_web_cache_urls.push_back("http://www.easwww.xolox.nl/gwebcache");
v_web_cache_urls.push_back("http://www.gbwebpro.com/guo/lynn/cache/lynn.asp");
v_web_cache_urls.push_back("http://www.goeg.dk/Gnutella/gcache.php");
v_web_cache_urls.push_back("http://www.gwc.freeola.com/cgi-bin/gwc/gcache.cgi");
v_web_cache_urls.push_back("http://www.gwc2.ip3.com/cgi-bin/gwc2/gcache.cgi");
v_web_cache_urls.push_back("http://www.kuwaitcontact.com/g2/bazooka.php");
v_web_cache_urls.push_back("http://www.la-forza.com/gnucache/gcache.php");
v_web_cache_urls.push_back("http://www.p2pchat.net/gwebcache/gcache.php");
v_web_cache_urls.push_back("http://www.rodage.net/gnetcache/gcache.php");
v_web_cache_urls.push_back("http://www.thany.org/gcache/gcache.php");
v_web_cache_urls.push_back("http://www.theholt.net/cache.php");
v_web_cache_urls.push_back("http://www.theholt.net/gcache.php");
v_web_cache_urls.push_back("http://www.xolox.nl/gwebcache");
v_web_cache_urls.push_back("http://www27.brinkster.com/snok7/lynn04/lynn.asp");
v_web_cache_urls.push_back("http://www.hottdeals.com/postNuke7/gWebCache");
v_web_cache_urls.push_back("http://node01.hewson.cns.ufl.edu:8080/cpwc4.cgi");
v_web_cache_urls.push_back("http://nodecache.dyndns.org/cgi-bin/perlgcache.cgi");
v_web_cache_urls.push_back("http://crab.bishopston.net:3558/");
v_web_cache_urls.push_back("http://cache.warrink.ath.cx:8000/");
v_web_cache_urls.push_back("http://krill.shacknet.nu:20095/gwc");
v_web_cache_urls.push_back("http://cache.mynapster.com/");
v_web_cache_urls.push_back("http://node00.hewson.cns.ufl.edu:8080/pwc.cgi");
v_web_cache_urls.push_back("http://ds.tranzision.com/cache/gcache.php");
v_web_cache_urls.push_back("http://www.xolox.nl/gwebcache/");
v_web_cache_urls.push_back("http://mute.d2lod.org/gwcii.php");
v_web_cache_urls.push_back("http://gwebcache2.limewire.com:9000/gwc");
v_web_cache_urls.push_back("http://gwebcache.bearshare.net/gcache.php");
v_web_cache_urls.push_back("http://mute-net.sourceforge.net/cgi-bin/perlgcache.cgi");
v_web_cache_urls.push_back("http://unknown.pingtime.com/gwebcache/gcache.php");
v_web_cache_urls.push_back("http://cache.kicks-ass.net:8000/");
v_web_cache_urls.push_back("http://members.lycos.co.uk/itgwc/webcache/gcache.php");
v_web_cache_urls.push_back("http://loot.alumnigroup.org/");
v_web_cache_urls.push_back("http://crab1.dyndns.org:8002/gwc/");
v_web_cache_urls.push_back("http://www.goeg.dk/Gnutella/gcache.php");
v_web_cache_urls.push_back("http://www.xolox.nl:80/gwebcache/");
v_web_cache_urls.push_back("http://crabcake.dynalias.net:9627/");
v_web_cache_urls.push_back("http://gcache.cloppy.net/");
v_web_cache_urls.push_back("http://gwc1.mager.org:8081/GWebCache/req");
v_web_cache_urls.push_back("http://loot.alumnigroup.org");
v_web_cache_urls.push_back("http://gwc.eigengang.nl/venus.php");
v_web_cache_urls.push_back("http://abilgisayarcs.host.sk/gnutella");
v_web_cache_urls.push_back("http://goeg.dk/Gnutella/gcache.php");
v_web_cache_urls.push_back("http://pokerface.bishopston.net:3558/");
v_web_cache_urls.push_back("http://gazth-sonika.ath.cx:8080/");
v_web_cache_urls.push_back("http://www.easwww.xolox.nl/GWEBcache/");
v_web_cache_urls.push_back("http://terrorist.host.sk/gnutella-cache/gwcii.php");
v_web_cache_urls.push_back("http://node01.hewson.cns.ufl.edu:8080/cpwc5.cgi");
v_web_cache_urls.push_back("http://www.roundbox.ws/gwebcache/gcache.php");
v_web_cache_urls.push_back("http://www.schraders.us/gwebcache-0.7.4/gcache.php");
v_web_cache_urls.push_back("http://gwc.lame.net/gwcii.php");
v_web_cache_urls.push_back("http://bobsmith.is-a-geek.org/index.cgi");
v_web_cache_urls.push_back("http://loot.alumnigroup.org/");
v_web_cache_urls.push_back("http://cache.mynapster.com/index.php");
v_web_cache_urls.push_back("http://g2cache.theg2.net/gwcache/lynnx.asp");
v_web_cache_urls.push_back("http://www.xolox.nl/gwebcache/default.asp");
v_web_cache_urls.push_back("http://www.gwc.freeola.com/cgi-bin/gwc/gcache.cgi");
v_web_cache_urls.push_back("http://node01.hewson.cns.ufl.edu:8080/cpwc2.cgi");
v_web_cache_urls.push_back("http://g1.blacknex.net/cgi-bin/perlgcache.cgi");
v_web_cache_urls.push_back("http://gwcrab.sarcastro.com:8001/");
v_web_cache_urls.push_back("http://gcache.kccricket.net/cgi-bin/perlgcache.cgi");
v_web_cache_urls.push_back("http://node01.hewson.cns.ufl.edu:8080/cpwc1.cgi");
v_web_cache_urls.push_back("http://crab2.dyndns.org:30002/gwc/");
v_web_cache_urls.push_back("http://www.mute.dds.nl/Mcache1/mcache.php");
v_web_cache_urls.push_back("http://gwc.ionichost.com/gwc.php");
v_web_cache_urls.push_back("http://node01.hewson.cns.ufl.edu:8080/ccpwcc.cgi");
v_web_cache_urls.push_back("http://www.testwebserver.net/cgi-bin/perlgcache.cgi");
v_web_cache_urls.push_back("http://g2.k4.cn:8080/");
v_web_cache_urls.push_back("http://www.vittavi.net/cgi-bin/perlgcache.cgi");
v_web_cache_urls.push_back("http://members.lycos.co.uk/coolebra/gwebcache-0.7.4/gcache.php");
v_web_cache_urls.push_back("http://kisama.ath.cx:8080/");
v_web_cache_urls.push_back("http://www.justthefaqs.org/gnu/gcache.php");
v_web_cache_urls.push_back("http://node01.hewson.cns.ufl.edu:8080/ccpwc.cgi");
v_web_cache_urls.push_back("http://gwebcache3.jonatkins.org.uk/perlgcache.cgi");
v_web_cache_urls.push_back("http://bobsmith.is-a-geek.org/");
v_web_cache_urls.push_back("http://www.easwww.xolox.nl/gwebcache/default.asp");
v_web_cache_urls.push_back("http://www.arach.net.au/~holmesd6/gcache.php");
v_web_cache_urls.push_back("http://godfella.host.sk/gwcii/gwcii.php");
v_web_cache_urls.push_back("http://loot.alumnigroup.org:80/");
v_web_cache_urls.push_back("http://node01.hewson.cns.ufl.edu:8080/pwc4.cgi");
v_web_cache_urls.push_back("http://gwebcache.daems.org/GWebCache/req");
v_web_cache_urls.push_back("http://loot.alumnigroup.org:80/");
v_web_cache_urls.push_back("http://galvatron.dyndns.org:59009/gwcache");
v_web_cache_urls.push_back("http://gwc.jooz.net:8010/gwc/");
v_web_cache_urls.push_back("http://ygwc.y-0.net/ygwc.php");
v_web_cache_urls.push_back("http://starscream.dynalias.com/");
v_web_cache_urls.push_back("http://intense.homelinux.coww.xolox.nl/gwebcache/");
v_web_cache_urls.push_back("http://node01.hewson.cns.ufl.edu:8080/cpwc3.cgi");
v_web_cache_urls.push_back("http://dlaikar.de/gcache2/gcache.php");
v_web_cache_urls.push_back("http://www.hottdeals.com/postNuke7/gWebCache/gcache.php");
#endif
} | [
"[email protected]"
] | |
e0b0b400c4f74e9fec1f7f293d44b448c9676c80 | f1201a1f7951ca9a237860a5e61446b876ae2b22 | /map/binarymap.cpp | 0b0de669d5a9a0e86a376e81ab271cedb699c1c3 | [] | no_license | PREF/PrefLib | 2744159e36b5faf14d83f3be3bfba6e487075646 | 840c0a1df635c92a34501e3eec066ec13021e911 | refs/heads/master | 2021-06-20T10:45:08.929707 | 2017-07-19T12:30:20 | 2017-07-19T12:30:20 | 33,445,030 | 9 | 1 | null | null | null | null | UTF-8 | C++ | false | false | 1,330 | cpp | #include "binarymap.h"
namespace PrefLib {
namespace Map {
BinaryMap::BinaryMap(): _mode(MapMode::Class)
{
}
BinaryMap::~BinaryMap()
{
}
void BinaryMap::doElaborate()
{
IO::DataBuffer* databuffer = this->dataBuffer();
uint64_t len = this->length();
this->_data.resize(len);
for(uint64_t i = 0, offset = this->startOffset(); offset < this->endOffset(); i++, offset++)
{
const Support::ByteColors::Info& info = Support::ByteColors::info(databuffer->at(offset));
ByteData& bd = this->_data.at(i);
if(this->_mode == MapMode::Class)
bd.Category = info.Category;
else // if(this->_mode == MapMode::Entropy)
bd.Entropy = Support::Algorithm::entropy(databuffer, offset, std::min(uint64_t(32), len));
}
}
const BinaryMap::ByteDataList& BinaryMap::data() const
{
return this->_data;
}
BinaryMap::MapMode BinaryMap::mode() const
{
return this->_mode;
}
void BinaryMap::setMode(BinaryMap::MapMode mode)
{
if(this->_mode == mode)
return;
this->_mode = mode;
}
uint64_t BinaryMap::length() const
{
return this->endOffset() - this->startOffset();
}
uint64_t BinaryMap::offset(const AbstractMap::Point &p) const
{
return this->startOffset() + (p.x + (p.y * this->width()));
}
} // namespace Map
} // namespace PrefLib
| [
"[email protected]"
] |
Subsets and Splits