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246,920 | Sometimes I see references to "R" resistors. For example: Obviously the 100 refers to 100 Ohms. What does 100R mean? | The idea is that the multiplier replaces the decimal point. This dates back to pre-CAD schematics which were hand drawn and then photocopied and reduced. A decimal point could easily get lost during the copying process. By writing 4k7 rather than 4.7k the risk of these errors was greatly reduced. R was used for a multiplyer of 1 because omega could easily be mistaken for a 0. So ... 4R7, 47R, 470R, 4k7, 47k, 470k, 4M7, 47M. The same approach is used with capacitors: 2p2, 22p, 220p, 2n2, 22n, 220n, 2u2, 22u, 220u. In the old days larger values were still marked µF so the next decade was marked 2200u but with large capacitor values common now we're seeing 2m2, 22m, etc. I've never seen an equivalent of the 'R' as in 2C2 for a 2.2 F - yet! 2F2 may be more sensible. The current use of 'R' would then be excused (4R7 instead of 4Ω7) on the basis that Ω isn't readily available on most keyboards. This system may be more popular in Europe. Thanks to @JasonC for pointing out that the 'R' notation is covered by British Standard BS 1852 . | {
"source": [
"https://electronics.stackexchange.com/questions/246920",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/39947/"
]
} |
247,740 | I've been looking at radio controlled watches online. I noticed that some radio controlled Casio watches have an 'airplane mode', which disables GPS and terrestrial time signal reception: Now, why would signal reception be restricted? The watch in question does not have a Bluetooth module or similar. | Most useful radio receiver designs utilize some form of the superheterodyne architecture, where one or more radio-frequency local oscillator signals are used to shift the frequency of the received signal to an intermediate frequency where it is more readily processed. Typically, the local oscillator signal will radiate from a receiver to some degree - how much depends on the specific design, but it is not uncommonly detectable in near proximity. Restrictions on radio frequency sources on passenger airlines have historically tended to err on the side of caution, restricting anything that could theoretically emit moreso than being specifically tailored to demonstrated concerns. Since a local oscillator theoretically radiates, the argument was that you should not be operating one, which effectively meant that you should not be operating a radio receiver. Of course digital processing circuitry typically radiates clocks and their harmonics, too... But then, the shift in the last several of years towards services like in-flight WiFi also indicates a shift in thinking away from vague theoretical concerns. | {
"source": [
"https://electronics.stackexchange.com/questions/247740",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/31091/"
]
} |
247,892 | I have a power circuit that implements an AC-to-DC rectifier and a non-isolated buck converter to convert a 120 VAC 60Hz signal to 12V and then a linear voltage regulator to step the 12V down to 5V. The 5V will be used to power a micro controller and there is a possibility that people will touch the pins of the micro controller. I realize that it is not ideal to use a non-isolated power converter, but due to size constraints I do not want to put an isolated power supply with a transformer in the design. The question is: Will a 500mA fuse after the 12-to-5V linear voltage regulator make the design safe against electric shock since the buck converter is non-isolated? | Will a 500mA fuse after the 12-to-5V linear voltage regulator make the design safe against electric shock since the buck converter is non-isolated? No. A fuse does not protect against electric shock. Fuses are for limiting current in a fault condition to protect equipment, wiring and prevent fire. What you are proposing is potentially lethal. You must isolate the low voltage circuit from mains if there is any risk of contact with the circuit. Just for reference, RCD / GFCI earth leakage protection devices generally trip at 30 mA as this is considered a safe limit for protection of humans against electric shock. Put safety first. Then worry about size and cost. An isolated SMPS (switched mode power supply) with 5 V output won't be any bigger than what you are proposing. | {
"source": [
"https://electronics.stackexchange.com/questions/247892",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/-1/"
]
} |
248,354 | Can I solder the components together? I just started to learn and I don't have a circuit board. | You can literally solder components together, i.e. one end of the resistor to the base of the transistor etc. without using a prototype board, as long as you are careful not to let any leads short together. Unlike most cases, where you would twist wires together for mechanical strength, when prototyping this way you generally want the solder to hold the leads together so it is easier to later unsolder and reuse the components again. Instead of soldering, you can also just clip leads together using alligator-clip jumpers. Either would work for a circuit of the complexity in your question. Much more complicated, and you will want to get a solderless breadboard (however, see below!). You can probably stick the other end of the resistor directly into the socket of the Arduino. You will need to get some hookup wire for the ground and +5V leads; 22-guage solid is probably the best size. Before PCBs were common, consumer electronics were all hand-wired. Components with leads were soldered together using terminal strips, like the one at the top of the picture. This is the chassis of a 1948 Motorola Golden View 7" television set. | {
"source": [
"https://electronics.stackexchange.com/questions/248354",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/118026/"
]
} |
248,447 | When writing software for instrumentation, it is often required to specify a small gap of time between taking measurements. Say for example that 250 voltage measurements must be taken, and they must be 1ms apart. Is there a word or phrase in electrical engineering that describes that 1ms interval that takes place between the voltage measurements? | The name for the frequency the samples are taken is Sampling Rate (not specific to audio only). It is measured in samples-per-second or in Hz (which is 1/s ). The time between two samples is called sampling period , and is given in units of time. So in your case the period would be 1ms and the frequency 1/1ms=1kHz . Or in terms of rate it's 1000 samples per second. | {
"source": [
"https://electronics.stackexchange.com/questions/248447",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/102849/"
]
} |
248,478 | (The pictured circuit contains a serious mistake , see my answer for more detail. I decided to leave the question in its original form for educational purposes, though.) Setting The (sub-)circuit in question looks like this: (Both OP amps can be considered as ideal.) simulate this circuit – Schematic created using CircuitLab It's part of a larger question about an Ackerberg-Mossberg biquad (which looks like this ) where one is asked to calculate a) this subcircuits DC voltage gain \$A_{v,DC}=\frac{V_{out}}{V_{in}}\$, and later b) its transfer function \$A_v(s)=\frac{V_{out}(s)}{V_{in}(s)}\$. As I like to derive my answers for DC analysis from the transfer function \$A_v(s)\$, I tried the following: 1) Directly determine the transfer function \$A_v(s)\$, which answers b):
$$A_v(s)=\frac{V_{out}(s)}{V_{in}(s)}=\frac{1}{sR_1C_1}$$ It should be the transfer function of a non-inverting integrator amplifier . 2) Compute the DC gain by using \$\lim\limits_{s \rightarrow 0}{A_v(s)} \$. That is
$$A_{v,DC}=\lim\limits_{s \rightarrow 0}{\left(A_v(s)\right)}=\lim\limits_{s \rightarrow 0}{\left(\frac{1}{sR_1C_1}\right)=\infty}$$ [better use step function here] But here's the thing: the solution of a) simply says that \$A_{v,DC}=-\infty\$ which contradicts my answer. Questions So here's my questions for you: i) Which answer to a) is correct? ii) If my answer is wrong, one possible explanation would be that I can't simply use the limit for \$s\rightarrow 0\$ because in reality it's defined as \$s:= \sigma + i\omega\$.
This means that I would have to assume \$\sigma=0\$ and do the limit for \$\omega\rightarrow 0\$ which brings me to
$$A_{v,DC}=\lim\limits_{\omega \rightarrow 0}{\left(A_v(s=0+i\omega)\right)}=\lim\limits_{\omega \rightarrow 0}{\left|\frac{1}{(0+i\omega)R_1C_1}\right|}=\lim\limits_{\omega \rightarrow 0}{\left|\frac{-i}{\omega R_1C_1}\right|}=-\infty$$
Would this be a correct derivation? [ wrong! See @Chu's comment] iii) If the above doesn't work, why is it so? And is there a way to calculate a) from b)? DC analysis can become very confusing when one has to deal with open loop amplifiers, especially in bigger circuits. So it would be very nice if one can derive the DC analysis results from the laplace domain transfer function. iv) To go beyond the exercise question: I'm curious about the bode plot, because the single pole at \$s=0\$ (and no zeros) suggests that the magnitude goes from infinity to zero (with -20dB/decade) as the frequency goes upwards but what happens with the phase? | The name for the frequency the samples are taken is Sampling Rate (not specific to audio only). It is measured in samples-per-second or in Hz (which is 1/s ). The time between two samples is called sampling period , and is given in units of time. So in your case the period would be 1ms and the frequency 1/1ms=1kHz . Or in terms of rate it's 1000 samples per second. | {
"source": [
"https://electronics.stackexchange.com/questions/248478",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/68897/"
]
} |
248,919 | While desoldering useful components off of old computer hardware, I found quite a large number of 14.31818 MHz crystals. This seemed odd to me. Why use such an irregular frequency with a very nontrivial conversion to human time units? At first I thought that it must be a multiple of another frequency with a certain dedicated use (such as 44.1 kHz commonly used as an audio sampling frequency), but my guessing only led to two numbers pretty close to it: 1/7*10⁸ Hz and π/22*10⁸ Hz, both to about 2‰, and I can't seem to deduce what any of these would be useful for. | It is exactly 4× the NTSC color-burst frequency of 3.579545 MHz. Since it is (well, used to be) used in huge quantities in commercial color TV sets, it is both commonly available, and particularly useful when you want to generate a signal to be displayed on such a TV. | {
"source": [
"https://electronics.stackexchange.com/questions/248919",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/96108/"
]
} |
248,950 | I had finally finished my Z80 memory board, but I was disappointed to see that it wasn't working properly (simple NOP test with the address lines connected to some LEDs) as the counter quickly spiraled out of control instead of incrementing as it should. However, I am not one to give up and after about thirty minutes of continuity testing to unveil no short circuits and all proper connections, I finally thought to check if the SRAM chip was powering on with all 0s stored. I am well aware that SRAM (unless non-volatile, which my particular chip is not) will lose all of its contents upon losing power, but I had always assumed that it would be filled with 0's (ie "empty") when it regained power. The SRAM I'm using seems to be randomly filled with 1's and 0's each time the power is reset. It never remembers any data, but it isn't loading empty. This isn't really a problem as I can simply write a small program in ROM to load all 0's into RAM on powerup, although I would still like to know if this is how the SRAM should be functioning or not. Thanks! Edit: I forgot to mention that after using the ROM to load 0's into SRAM the system worked fine, so this was indeed the issue. | Unless you have an initial state programmed, it will be more or less random. Although this may vary with different SRAM implementations. You also say "blank". Some might think that random is "blanker" than all 0's. SRAM memory stores memory on back to back inverters. This forms a bi-stable system (two very stable states with metastability dividing them). So, upon power up the back to back inverters are briefly metastable. This happens because as the voltage ramps up (from being turned on), both NMOS and PMOS of the back to back inverters would be 'equally' on, holding both bitnodes at half the supply voltage (this is the metastable state). Eventually some thermal noise (or any process that introduces variation) pushes or pulls this value down or up a little bit. At this point the bitnodes snap into one of their bistable states. As an example, consider \$ Q=Q'=\frac{V_{supply}}{2} \$ Next, some thermal noise on Q increases the voltage up to \$ \frac{V_{supply}}{2} + \delta \$ Now, the NMOS feeding Q' gets turned on just a little bit more. And the PMOS feeding Q' gets turned off just a little bit more. So Q' pulls down from \$ \frac{V_{supply}}{2}\$ to \$ \frac{V_{supply}}{2} - \delta \$. Next, since the voltage at the gate of the FET's driving Q node decreases, the PMOS turns on a little more (and NMOS turns off more). This causes Q to increase further to the supply. And this quickly snaps Q' to 0 and Q to 1. In fact, there is even a paper "Power-Up SRAM State as an Identifying Fingerprint and Source of True Random Numbers" One very helpful plot contained in the paper is below. The dotted line represents the supply voltage ramping up: On the left-side, everything is equal. In this case, random variation due to temperature or another number of factors bumps the bitnode into one state or the other. On the right side, there is a bitnode which is skewed (purposefully or otherwise) to be much more likely to initialize in a particular state. Depending on how each bitnode in the SRAM you are using currently was fabricated, you end up with more or less of one of the two situations above. In both cases, unless you intentionally skewed the SRAM, the initial outputs would look more or less random. In the left-hand situation, each subsequent powerup would generate more random patterns. In the right-hand situation, the initial startup would be seemingly random. But further powerups would cause the SRAM to tend to further certain states. | {
"source": [
"https://electronics.stackexchange.com/questions/248950",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/115029/"
]
} |
249,140 | I have a Pro Micro board (very small -- see pic below) and it has connector holes in the printed circuit board. Best Non-Solder Connection (Easy and Removable) I'm wondering the best way to make non-solder connections for doing my prototype work. By best, I mean easily removable while maintaining solid electrical connection. Are there pre-made connectors for this type of connection? What Part Is Most Conductive / Best Electrical Connection? Also, how can I know I have a good connection? Is it the inside of the hole that has the conductive metal, outside of hole? Front / Back Separate Traces? And, are the front and back of the holes electrically connected normally or do they have separate traces normally? One Idea: Would It work Very Well? What if I had header pins pushed into a breadboard and then up through those holes? Then I connect my wire to the top of the header pin? Would it be a solid enough connection? Or would it not make enough electrical connection? ie - would header pins make connection inside of holes and would that be enough electrical connection? Edit -- I Wish They Made Banana Plugs That Fit This Wouldn't it be cool if you could use a banana plug type of connector. Then just plug in each one and put wire in hole and clamp it down? UPDATE 11-11-2017 Interesting that in the time since I've posted this someone came up with a solution similar to what I was thinking with banana plugs: Hammer Header Male - Solderless Raspberry Pi Connector It's really for use on a RPi Zero but it's the type of snap-on header I was interested in at the time. However, the installation is not easy so it may not be practical.
Take a look at what you have to do to install it : https://learn.pimoroni.com/tutorial/sandyj/fitting-hammer-headers Probably easier to just solder on the header pins. Update 2 - Dec. 10, 2021 I just saw the following on Twitter & just thought I'd update it here.
This is for 1mm holes. Someone replied and showed that there is now a product someone is releasing that attempts to solve this: | Use grabber test clips, which are basically like smaller alligator type clips. Though regular alligator/crocodile clips may work, depending on the size or how many side by side ones you need. I have some really mini ones. Yes, the pads should be plated on the inside as well as the top and bottom, electrically connecting them. No, just pushing a standard 0.1" header into the hole won't work. They are not offset holes, or push fit tight. They are generously loose. Some people have used rubber bands but that's not very secure. | {
"source": [
"https://electronics.stackexchange.com/questions/249140",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/49176/"
]
} |
250,608 | There's a lot of seemingly conflicting information regarding how the load capacitance for a parallel resonant crystal is calculated. Faced with a lot of problems in recent years with non-oscillation and frequency inaccuracy, I'm asking the community's help to get to the bottom of the problem. How exactly should the values of external load capacitors be calculated? What's the reason if the oscillator completely fails to start with crystals from some vendor and only completely removing the external load capacitors help? Other vendors' crystals work fine and they advertise seemingly similar parameters (load capacitance, fundamental mode, parallel resonant). Are all integrated XTAL oscillators in, say, microcontrollers, always Pierce oscillators? Does it have any relevance on the issue? For reference, here's some information that I've found from the Web regarding the calculation of load capacitance. One IC vendor defines it like this: One crystal manufacturer defines it like this: Another website has this to show for an answer: The equation is C=2(CL)-(CP+CI)
C = crystal capacitor value
CL = load capacitance
CP = parasitic capacitance (wires, socket, traces)
CI = input capacitance (mcu itself) Quite many seem to think that the load capacitance is the value the crystal manufacturer recommends for the external capacitors. This, to me, seems completely incorrect. (But, as it turns out, might still work perfectly ok). One web page puts an emphasis on knowing the oscillator inverter's input and output capacitances and gives this answer: Is there a one true answer to the question? It all seems very frustrating to me. Why doesn't an oscillator start? Why does removing the external load capacitors make it start? How should the external capacitors' value be calculated? PS. Sorry I can't tell you exactly which ICs I'm working with. But I've seen this happen with quite a few during the years. | Is there a one true answer to the question? It all seems very
frustrating to me. Why doesn't an oscillator start? A crystal oscillator will fail to start when the crystal and the capacitors attached either side do not fully produce a 180 degrees phase shift back to the input of the inverter inside the chip. The inverter produces effectively 180 degrees phase shift so, for oscillation to begin, the two capacitors and the crystal together must form an extra 180 degrees phase shift AND there must be an overall voltage gain greater than 1. Look at this response - it mimics a crystal and one capacitor but it doesn't quite reach 180 degrees: - V1 is the driving voltage source and R2 (100 ohms) represents the output impedance of the gate involved in the oscillator. Look carefully, the phase angle doesn't quite reach 180 degrees and this will mean NO OSCILLATION. The extra few degrees of phase shift come from the output capacitor on the invertor - the 100 ohms (or whatever the output impedance of the inverter has) AND this extra capacitance push the phase shift past 180 degrees and the oscillator will then oscillate. Here's a picture showing the effect of increasing input and output capacitance from 1 pF up to 20 pF: - The X axis is at 9.9 MHz FYI. As you can possibly see, only when capacitance is 10 pF or 20 pF does the circuit produce 180 degrees of phase shift. This means the oscillator will oscillate at the left hand point on each phase curve that the response crosses 180 degrees (parallel resonant point tuned by the external capacitance). So, you need capacitors to make this type of oscillator work and the manufacturer tells you what to use but, in my humble opinion, there are a lot of subtleties around that some manufacturers maybe either don't fully know or won't tell you. I'll also add that there appear to be very few web articles about what really is going on and the true importance of each capacitor. Why does removing the external load capacitors make it start? Maybe the self capacitance of the tracks and gate input capacitance are sufficient. It depends also on the Q of the crystal and is hard to speculate on. Maybe the inverter's slew rate is too slow? | {
"source": [
"https://electronics.stackexchange.com/questions/250608",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/57249/"
]
} |
250,612 | My circuit is a capacitor multiplier. I want to generate some noise (200 mV) at 100 kHz and 500 kHz (input V) and want to see the attenuation on the output. How can I generate specific frequency noise in SPICE/LTSPICE? | Is there a one true answer to the question? It all seems very
frustrating to me. Why doesn't an oscillator start? A crystal oscillator will fail to start when the crystal and the capacitors attached either side do not fully produce a 180 degrees phase shift back to the input of the inverter inside the chip. The inverter produces effectively 180 degrees phase shift so, for oscillation to begin, the two capacitors and the crystal together must form an extra 180 degrees phase shift AND there must be an overall voltage gain greater than 1. Look at this response - it mimics a crystal and one capacitor but it doesn't quite reach 180 degrees: - V1 is the driving voltage source and R2 (100 ohms) represents the output impedance of the gate involved in the oscillator. Look carefully, the phase angle doesn't quite reach 180 degrees and this will mean NO OSCILLATION. The extra few degrees of phase shift come from the output capacitor on the invertor - the 100 ohms (or whatever the output impedance of the inverter has) AND this extra capacitance push the phase shift past 180 degrees and the oscillator will then oscillate. Here's a picture showing the effect of increasing input and output capacitance from 1 pF up to 20 pF: - The X axis is at 9.9 MHz FYI. As you can possibly see, only when capacitance is 10 pF or 20 pF does the circuit produce 180 degrees of phase shift. This means the oscillator will oscillate at the left hand point on each phase curve that the response crosses 180 degrees (parallel resonant point tuned by the external capacitance). So, you need capacitors to make this type of oscillator work and the manufacturer tells you what to use but, in my humble opinion, there are a lot of subtleties around that some manufacturers maybe either don't fully know or won't tell you. I'll also add that there appear to be very few web articles about what really is going on and the true importance of each capacitor. Why does removing the external load capacitors make it start? Maybe the self capacitance of the tracks and gate input capacitance are sufficient. It depends also on the Q of the crystal and is hard to speculate on. Maybe the inverter's slew rate is too slow? | {
"source": [
"https://electronics.stackexchange.com/questions/250612",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/86140/"
]
} |
251,157 | I want to create a tool which recognizes a few musical notes (I know this is re-inventing the wheel). So I would play middle C, D, and E on a piano and it should be able to classify those notes. Here's how I think I should approach it: Record a sample of me playing a note Convert the signal to the frequency domain using the fast fourier transform Find the frequency that is most present (basically argmax of the frequency domain data) Assume that frequency comes from the note played and use that to classify the note I haven't tried any of this yet because I don't want to start down the wrong path. So, theoretically, will this work? | The concept is good, but you will find it is not so simple in practice. Pitch is not simply the predominant tone, so there's problem number 1. The FFT frequency bins can't hit all (or even multiple) tones of the musical scale simultaneously. I would suggest playing with an audio program (for example, Audacity) that includes an FFT analyser and tone generator to get a feel for what it can (and can't) do before you try to implement a particular task using the FFT. If you need to detect just a few specific tones, you may find the Goertzel algorithm to be easier and faster. Pitch detection is complicated, and there is still research going on in that field. Tone detection is pretty straight forward, but may not get you what you want. | {
"source": [
"https://electronics.stackexchange.com/questions/251157",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/35987/"
]
} |
251,287 | Regarding AC systems (like for homes and such), a circular path is called a parallel conductor. It's illegal (according to the NEC section 310) except under certain circumstances. But I have noticed that with DC circuits, circular conductors are also... taboo (for lack of a better word). See the picture below- just for example (there are probably better examples, so if another example is better for illustrating the problem or answer please, show and tell). My question(s) is basically, what's wrong with a circular/parallel conductor? Also, just for clarity, here's a picture of an illegal circuit (per NEC): Edit- as a follow up to some of the comments below, I happen to have seen the LED circuit mentioned above. I currently have one similar PCB (sort of a poor example, pictured below, because the excuse for not connecting the rings could be that there is a conductor in the way) but I have seen another PCB without any excuse for not completing the ring, so I wondered why it was not connected. | Both configurations will conduct power to the loads. When trying to figure out what's 'illegal', and why, you need to understand what fault conditions the authorities are trying to prevent. There may be a commentary in the relevant standards if you're lucky. In the UK, such an arrangement of a circular conductor is called a 'Ring Main', and was actively promoted for domestic rewiring from the late 1940s onwards, due to a shortage of copper and high rates of house building following World War II. Having two paths back to the distribution box allows lighter conductors to serve the same area than could be served by spurs. The rules are that a 2.5mm 2 conductor serves an area of up to 1000 sq ft, and has both ends returned to the distribution panel, protected by a 30A fuse. Each socket on the wall that is part of the ring has a loop in and loop out of 2.5mm 2 , connected at the socket terminals. Note that a spur of 2.5mm 2 would use a 22A fuse. The problem comes if someone replaces a socket without putting both conductors into the terminals, or a conductor breaks somehow. The loop is now broken, and we now have two 2.5mm 2 spurs, needing a 22A fuse for protection, but having a 30A fuse, with no apparent failure to alert anybody . Any paralleling of wires allows this sort of undetectable potential overload error to occur. Some regulatory authorities ban the practice, some permit it. | {
"source": [
"https://electronics.stackexchange.com/questions/251287",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/111360/"
]
} |
251,661 | Whilst cutting up a USB cable for a project I noticed this extra bare wire within the insulation. Now I'm assuming the foil is shielding of some sort, but do I need to connect this bare wire to ground? Or should it be left disconnected? | That is the drain wire that helps carry charge off of the foil jacket and carries more current than the foil can. It is part of the shield/ground of the cable. As far as how to terminate it, that depends on what function it serves in your system. There are several purposes for that shielding: Reducing EMI emissions Reducing EMI susceptibility Defining cable impedance Providing a discharge route for ESD The shield ground should factor into your grounding strategy, especially keeping in mind that there will be large discharges coming down that shield wire in user-pluggable systems. (as opposed to fixed, industrial type installations) | {
"source": [
"https://electronics.stackexchange.com/questions/251661",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/120307/"
]
} |
252,433 | I am putting DC current through a wire to heat it. I would think the wire would heat up evenly but I have found that it is hotter the closer I get to the middle, or, respectively, colder the nearer to the clamps. Can anyone explain this? | There are two effects going on. The heat sinking effect of the connections and the temperature coefficient on the wire. Initially the wire is all at the same temperature. You turn the power on and it starts to heat up. The heating is determined by the electrical power dissipation in the wire, for any given section of the wire Power = Current * Voltage. All parts of the wire will have the same current. For a given length the Voltage = Current * Resistance giving Power = Current squared * Resistance. Initially all the wire has the same resistance and so the heating is even along the length of the wire. The heat flows from hotter to objects to cooler ones (this is the first law of thermodynamics). In this case the connection points are cooler and so heat flows from the ends of the wire to the connectors cooling the ends slightly. Since the very ends are cooler the bits of wire near them then cools a smaller amount and so on along the length of the wire.
This results in a very small temperature gradient across the wire with the middle slightly warmer than the ends. Copper has a positive temperature coefficient of about 0.4 percent per degree C. This means that the warmer the wire the higher the resistance. The middle of the wire is hotter which means its resistance increases. From the above equations this means more power is dissipated in the middle of the wire than in the ends. More power means more heating in the middle than the ends and you get a positive feedback effect. The middle is hotter which means it has a higher resistance and more power is dissipated there which means it gets hotter... This continues until almost all the power is dissipated in the middle of the wire, you never get all of the power in a single point because the heat conduction along the wire means that the sections near the middle also have reasonably high resistance. Eventually you reach an equilibrium where the thermal conductivity spreads the energy enough to balance the positive feedback effect. The best example of a positive temperature coefficient is an old style incandescent light bulb. If you measure the resistance when cold it will be a fraction of the value you would expect for its power rating, they operate at about 3000 degrees and so the cold resistance is about 1/10th of the normal operating resistance when on. They are made of tungsten not copper, copper would be a liquid at those temperatures, but the thermal coefficient is about the same. | {
"source": [
"https://electronics.stackexchange.com/questions/252433",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/120771/"
]
} |
252,733 | This is a similar type of question to this question about the use of the number 47. I was looking at ordering some parts just like any other day and until now I've never really thought about it much, but I realised that the voltage ratings for capacitors seem really strange (to me at least). The standard voltage ratings seem to be: 6.3 V 10 V 16 V 25 V 35 V 50 V 63 V 100 V 160 V I've taken these values and plotted them on a graph to see if there was any correlation and it seems like there is an exponential correlation. My actual questions are:. How were these values initially decided upon? Was/Is the voltage rating dictated by the material used and has just stuck over the years? Are there any other components out there that use the same voltage ratings? | It's mainly all about preferred numbers: - See this wiki page and, see also this stack exchange answer about fuses values. It's all about splitting the difference between 1 and 10. For instance \$\sqrt{10}\$ is ratiometrically half way between 1 and 10 and the cube root splits into the numbers 2.154 and 4.642. Multiply by 2.154 again and you get 10. So, if you split the range 1 to 10 into 5 chunks you get 1, 1.5849, 2.5119, 3.9811, 6.3096 and finally 10. These values approximate to 1, 1.6, 2.5, 4.0, 6.3 and 10. Like I said earlier, this is mainly the reason but I suspect the prevelence of 24 V systems may have caused the 35V capacitor to come about and, of course the 40 V capacitor is not that uncommon: - | {
"source": [
"https://electronics.stackexchange.com/questions/252733",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/-1/"
]
} |
252,908 | My Question Why is my amplifier circuit amplifying more than I expect, and what can I do to fix it? What I want to accomplish I want to amplify an input that, at most, is 1.5[V] to, at most, be 2[V]. What I have tried I have the below circuit set up. When I measure the voltage of OUT against GND , I get values that are 7 times higher than the value IN . I used the following formula: $$V_o = V_i * (1 + \frac{R_2}{R_1})$$ Plugging in \$2\$ for \$V_o\$ and \$1.5\$ for \$V_i\$ evaluates to: $$R_1 = 3R_2$$ I tried using 300[Ω] and 100[Ω] for \$R_1\$ and \$R_2\$ respectively, which yielded a different, but also undesirable, gain. I recall that it was a bit lower. What I got Measuring the voltage at IN and OUT against GND using a multimeter gives me about 0.5[V] for IN and 3.5[V] for OUT . simulate this circuit – Schematic created using CircuitLab | Change to the following to get a non-inverting amplifier with gain = \$1 + R_2/R_1\$ The difference is that \$R_2\$ is connected to the op amp's inverting input instead of ground. Please see Scott Seidman's answer for an explanation of what the incorrect circuit was doing. | {
"source": [
"https://electronics.stackexchange.com/questions/252908",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/46696/"
]
} |
253,297 | At low baud rate such as 9600bps, I do not think hardware flow control CTS/RTS is necessary. I believe at higher baud rates, CTS/RTS will be necessary. What is this baud rate? Can one still do without CTS/RTS at 115.2kbps? | It is not data rate that matters; we use CTS / RTS (or XON / XOFF for software flow control) where a possibility of a receiver overflow exists, although admittedly that is more likely at higher data rates. If a receiver cannot empty its buffers quickly enough, then it should deassert CTS (in response to which, the transmitter will assert RTS if there is more data to transmit). Note that the transmitter may experience a buffer underrun in which case it should deassert RTS (because there is no valid data to send). So it comes down to how fast the buffers can be moved - that is more likely to be an issue at higher data rates but it is completely implementation dependent; there is no single speed. | {
"source": [
"https://electronics.stackexchange.com/questions/253297",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/76826/"
]
} |
253,607 | Yesterday I saw what look like weights hanging from a cable between utility poles. This was in northeast Arizona on Route 60 between Show Low and Springerville. Here is a picture of a whole span: The white blobs are the weights. Here is a closeup of a single weight: They appear to be just concrete blocks with no dashpot or any other apparent way to dissipate power. These weights seem to be at 1/4 and 3/4 of each span, which would be the nodes of the first harmonic standing wave. They would add inertia and affect the frequency, but is that really their purpose? I can guess some possibilities, but I'd like to hear what these things are for from someone that actually knows. Due to being a single cable, it must be for communications, not power, but I'm guessing that doesn't matter. Added Sorry, I added this note earier, but apparently somehow aborted the editor so that it wasn't posted. To answer PlasmaHH's question, yes, these were on just about every span. The bottom of the cable was quite high, and a little lower didn't look like it would have been any problem. The bushes you see in the first picture are well in front of the cable. There is a lot of clearance below the actual cable. Even if there was a tall bush there, there would still be a lot of clearance. | There are several modes of vibration on conductors between poles. Different devices damp different vibrations. These weights are intended to primarily dampen torsional vibration. Torsional vibration is more closely linked to low frequency high amplitude oscillation - conductor gallop - versus the high frequency low amplitude flutter, which is more commonly tamed with tuned mass dampers. These weights, in other words, are more effective for the low frequency vibrations linked particularly to torsional vibration expected at this specific location than stockbridge dampers would be. Stockbridge dampers are more useful for high frequency vibrations (flutter, 10Hz or so). As such I expect these are pendulum detuners: Pendulum detuners. These anti-galloping devices are based on the fact that the torsional movement of the bundle interacts dynamically with the vertical motion. Wind energy is injected to the vertical motion through torsional movement. The control of torsion can control the vertical movement. This occurs only when the torsional movement is close to the frequency of the vertical motion, which is valid for bundle conductor lines. To avoid frequency coalescence between torsion and vertical movement, which is at the basis of the instability, it is necessary to separate the frequencies one from each other (so called detuning). So, the principle of detuning is the avoidance of such frequency coalescence due to torsional stiffness increase. Thus, while the despacering technique relies on changing the ice shape from a potentially unstable shape to a stable one, detuning accepts the ice shape but modifies the conductor dynamics in order to prevent the potential aerodynamic instability. Some of the testing realized with detuning pendulum on bundle conductors gave satisfactory results. Their negatives impacts on the lines are quite small: some tests showed that the mass of the pendulums can lead to high values of conductor dynamic bending strain at the fixing clamps from aeolian vibration. An appropriate design (weight, arm length, location) is imperative. ( source , emphasis added) There are newer devices that better control torsional vibration , each with distinct advantages (usually less weight) but they are also more expensive, and require new engineering work to determine the correct parameters, so you'll still see a lot of simple weights such as those you've pictured. | {
"source": [
"https://electronics.stackexchange.com/questions/253607",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/4512/"
]
} |
253,976 | We can sometimes see decades-old capacitors (such as ones made in the USSR) still working. They are bigger and heavier , but durable and not desiccating. Modern aluminium capacitors serve for about 11 years, if you are lucky, then become dry and quietly fail. I remember early 2000s devices where capacitors failed after 3–4 years of service, and not necessarily low-end devices (one example is E-TECH ICE-200 cable modem worth ∼ 240 USD in 2000). A repair due to failed electrolytic capacitors became a commonplace, something uncharacteristic for 1980s. Was this 1990s degradation caused by cheap mass production? Or by poorly-tested technologies related to miniaturization? Or many manufacturers just didn’t care? It appears that the trend is by now reversed, and recent capacitors are a bit better than the ones from 1994–2002. Can experts confirm it? | There was a period of time where lots of capacitors were made with a dodgy electrolyte, especially by some large Taiwanese manufacturers. The capacitors looked OK in a wide variety of tests when new, but they didn't age well. Because it took a few years for the capacitors to fail, and the high failure rate to become known, an awful lot of them had been produced and built into things before people realised there was a problem. It then took a few more years to for the things to leave circulation. Exactly why these manufacturers had electrolyte problems is not completely clear. They were using new, water based electrolytes which had been developed in Japan and worked very well. Presumably the cheaper manufacturers had missed something or cut some corners while reproducing (or ripping off) the Japanese research. The type of capacitor affected was cheap, large capacitance, low ESR capacitors. These are the kind of thing that appears in huge numbers of consumer devices, so the problem became known in the wider community. Plus, the failure mode of these capacitors was rupture and venting, so it was easy for even people unfamiliar with electronics to see which component was at fault when their motherboard stopped working. Wikipedia has an article about it: Capacitor Plague | {
"source": [
"https://electronics.stackexchange.com/questions/253976",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/118355/"
]
} |
254,077 | In old movies (or new movies playing in these times), I often see people smacking the top of electron tube TVs or screens. Somehow it seems to help to stabilize/sharpen the picture. But why? Are there any reasons an electronic circuit could go from not working as expected to working as expected from a sharp mechanical jolt? What are the conditions that cause such an issue in the electronics? It would appear that the Atari ST suffered from a similar problem that could be fixed by performing what became known as the "Atari drop" (as discussed in this section on wikipedia ) although this is described as being due to loose connections, are there any other failure modes that could be remedied in a similar manner, and why? | This practice is generally known as 'Percussive Maintenance'. Any touching contacts, for instance in connectors, valves and their bases, and between the wiper of a potentiometer and the track, have a tendency to build an insulating film between the contacts. This happens most readily at higher temperatures, in high humidity, and when there is airborne contamination, especially sulphides. This can introduce higher resistance, non-linear behaviour, or break contact altogether. It can produce intermittent behaviour, changing with humidity, or voltage across the junction. Sending a mechanical shock through the equipment can move the contacts with respect to each other, disrupting the film, and restoring contact. In the case of a TV with a loudspeaker in it, sometimes the vibrations from the audio will change the contact state. High contact pressures, and gold plating, improve the reliability of contacts against this sort of problem. TV valves, because they got hot, were especially vulnerable, and of course they aren't used these days. | {
"source": [
"https://electronics.stackexchange.com/questions/254077",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/121703/"
]
} |
254,780 | I am looking to build an RTC module for Arduino that runs on Mars time. The conversion factor is 1.0274912510 Earth seconds to 1 Mars second. Whilst I have managed to accomplish this programmatically with a <2 second resolution (which is not exactly ideal, I'd prefer something like 300 ms of accuracy) using fixed-point maths on an Arduino Uno connected to a regular RTC module, I am wondering if it would be possible to have some kind of low voltage oscillator running at precisely 31,891,269,116 µHz (31.891269116 kHz) which would, more or less, be interchangeable with a standard 32 kHz clock crystal (however, I would be open to other ideas so long as they aren't prohibitively expensive.) Any ideas how this may be possible? Alternatively, some kind of timer that goes off once every 1.0274912510 seconds would also be acceptable. | Use a 32768kHz crystal like everybody else, but divide by 33669 instead, giving -5.08ppm error. (You can remove that by trimming the loading capacitance if you like). It's not precise but for a Mars clock it'll be as good as any Earth quartz clock. That is, ignoring the problems of temperature compensation for Mars ambient temperatures, most watch crystals are only available cut for Earth use, unless you can find Martian suppliers... I'd use the counter-timer peripherals in an MSP430 to do the division, and (assuming you're driving a standard quartz mechanical clock movement) generate bipolar 30ms pulses on its output pins every second, roughly following the original timings which you can measure on an oscilloscope. Arduino or similar will do the job, but the MSP can be put to sleep between pulses, consuming under 1uA with the LF oscillator running. Here's an example design with source code and PCB for a watch - only Earth time so far, though that can probably be fixed by changing a constant. | {
"source": [
"https://electronics.stackexchange.com/questions/254780",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/122084/"
]
} |
254,865 | We all know energy cannot be formed from nothing. So how does a bipolar junction transistor (BJT) — for example — amplify the base current by beta and outputs it to collector current? Where is the “catch?” Is there somewhere else where were losing energy? | The base current in a transistor controls the collector current. The energy comes from the power supply. It is not generated within the transistor. | {
"source": [
"https://electronics.stackexchange.com/questions/254865",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/41037/"
]
} |
254,873 | I am currently studying flip-flops. I understand the purposes of flip-flops, and that they can be made by using NAND or NOR gates. But what are the reasons for making them these two ways? Does either way work for storing bits? Or is this just for cost consideration? | The base current in a transistor controls the collector current. The energy comes from the power supply. It is not generated within the transistor. | {
"source": [
"https://electronics.stackexchange.com/questions/254873",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/122132/"
]
} |
254,874 | I have an audio circuit which is supplied by a voltage of 9V dc and 12V dc. These voltages are produced by means of a conventional transformer which transforms the mains 230V ac 50Hz to 15V ac 50Hz. After the transformer there is a rectifier (diode bridge and capacitor) followed by two regulators, one for the 9V dc and one for the 12V dc. My problem is that the transformer produces a heavy magnetic field, which couples with my circuit producing a low hum. I am thinking about substituting the linear power supply with a switching one, thus avoiding the 50Hz magnetic field. Now: Is there around on the market a switching power supply with the requested characteristics? Is it better to use a power supply giving directly the 9V dc and 12V dc, or is it possible to Step down the 230V ac to 15V ac (without using a Conventional transformer) and keep in place the rectifier and regulators? | The base current in a transistor controls the collector current. The energy comes from the power supply. It is not generated within the transistor. | {
"source": [
"https://electronics.stackexchange.com/questions/254874",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/120200/"
]
} |
255,342 | Imagine I have a 10V battery with a capacity of 1Ahrs connected to a 100 Ohm resistor. I'll get 0.1A (V/R) at a power of 1W (current x voltage) for a total of 10hrs. As a watt is defined as J/s my battery produces 3,600J (1x60x60) in total. Now, imagine I get a second, identical battery and connect it in series to the first one. I will effectively have a battery of 20V with a capacity of 2Ahrs, all connected to the same 100 Ohm resistor. I'll get 0.2A at a power of 4W (current x voltage) for a total of 10hrs. This will generate 14,400J (4x60x60). So, from doubling my energy source I have quadrupled the energy output! I've obviously made an error somewhere either in my calculations or conceptual understanding, and I would be most grateful to anyone who could set me right. Thanks! | Congratulations for having the wit to know something was wrong! simulate this circuit – Schematic created using CircuitLab Figure 1. Parallel and series arrangements of batteries will have the same VAh rating. I will effectively have a battery of 20 V with a capacity of 2 Ah. That's the error. In parallel they can supply 1 A each for one hour. This is very easy to visualise if you run one for an hour and then replace with the other. In series they both run simultaneously and the same current runs through both of them. They will both discharge at the same rate. This is one good reason to use Wh (watt-hours) for battery comparison. It makes it much easier to compare battery energy storage when the batteries have different voltages. In your example you have \$ Capacity = V \cdot Ah = 10 \cdot 1 = 10~Wh \$. With two batteries we have \$ 20~Wh \$ capacity whether in series or parallel. Our load power is given by \$ P = \frac {V^2}{R} \$. In parallel \$ P = \frac {10^2}{100} = 1~W \$ as you calculated. \$ Runtime = \frac {Wh}{W} = \frac {20}{1} = 20~h \$. In series \$ P = \frac {20^2}{100} = 4~W \$ as you calculated. \$ Runtime = \frac {Wh}{W} = \frac {20}{4} = 5~h \$. simulate this circuit Figure 2. An alternative view may help. (a) Is your original series circuit. (b) is a direct equivalent. Because the mid-point of the 50 Ω resistors is at the same potential as the mid-point of the battery stack it makes no difference if we connect them together as shown in (c). Now we have two 1 Ah circuits each feeding into a 50 Ω load. | {
"source": [
"https://electronics.stackexchange.com/questions/255342",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/122374/"
]
} |
255,348 | I cannot find the Zth in the circuit i uploaded; i calculated the correct value of Vth with the following steps: LKC @ N1 :
5 + (0.2)Vo = -Vo/(8+4j) LKV @ the outer loop :
Vth + Vo - (4-2j)*0.2 - Vo = 0 And the Thevenin Voltage is exactly 7.35 L(72.9°). At this point I usually connect the two terminals (a, b) and try to find the short circuit current (i put a visual reference in the picture) using the node method (or the loop method) and use the formula Vth/Isc = Zth ,
but nothing seems to work! Also adding the SC makes the circuit look really weird, as all the "block" on the right can be seen as a single node.
Any ideas to find the Zth? The solutions are in the picture.
Thank you :) | Congratulations for having the wit to know something was wrong! simulate this circuit – Schematic created using CircuitLab Figure 1. Parallel and series arrangements of batteries will have the same VAh rating. I will effectively have a battery of 20 V with a capacity of 2 Ah. That's the error. In parallel they can supply 1 A each for one hour. This is very easy to visualise if you run one for an hour and then replace with the other. In series they both run simultaneously and the same current runs through both of them. They will both discharge at the same rate. This is one good reason to use Wh (watt-hours) for battery comparison. It makes it much easier to compare battery energy storage when the batteries have different voltages. In your example you have \$ Capacity = V \cdot Ah = 10 \cdot 1 = 10~Wh \$. With two batteries we have \$ 20~Wh \$ capacity whether in series or parallel. Our load power is given by \$ P = \frac {V^2}{R} \$. In parallel \$ P = \frac {10^2}{100} = 1~W \$ as you calculated. \$ Runtime = \frac {Wh}{W} = \frac {20}{1} = 20~h \$. In series \$ P = \frac {20^2}{100} = 4~W \$ as you calculated. \$ Runtime = \frac {Wh}{W} = \frac {20}{4} = 5~h \$. simulate this circuit Figure 2. An alternative view may help. (a) Is your original series circuit. (b) is a direct equivalent. Because the mid-point of the 50 Ω resistors is at the same potential as the mid-point of the battery stack it makes no difference if we connect them together as shown in (c). Now we have two 1 Ah circuits each feeding into a 50 Ω load. | {
"source": [
"https://electronics.stackexchange.com/questions/255348",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/122376/"
]
} |
255,536 | Why does power transmission use three lines with three different phases? Why not three lines all in the same phase? Does it have to do with the alternators used for generating the power, or is there less loss when the phases of the three lines are all different? My question is somewhat the reverse of " Why three-phase power? Why not a higher number of phases? " (cf. " Why is three-phase offset by 120 degrees? "). | Why not three lines all in the same phase? Because then there is no return path. Because single phase has no "rotation". Three phase makes it very simple to make a rotating motor with phase sequence determining the direction of rotation. Swap two phases and the direction is reversed. Is there less loss when the phases of the three lines are all different? Three phase power distribution requires less copper or aluminium for transferring the same amount of power as compared to single phase power. The size of a three phase motor is smaller than that of a single phase motor of the same rating. Three phase motors are self starting as they can produce a rotating magnetic field. The single phase motor requires a special starting winding as it produces only a pulsating magnetic field. In single phase motors, the power transferred in motors is a function of the instantaneous power which is constantly varying. In three-phase the instantaneous power is constant. Single phase motors are more prone to vibrations. In three phase motors, however, the power transferred is uniform through out the cycle and hence vibrations are greatly reduced. Three phase motors have better power factor regulation. Three phase enables efficient DC rectification with low ripple. Figure 1. Resultant DC from three-phase rectifier. Generators also benefit by presenting a constant mechanical load through the full revolution, thus maximising power and also minimising vibration. | {
"source": [
"https://electronics.stackexchange.com/questions/255536",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/72280/"
]
} |
255,684 | Up until USB C all the USB connectors were carefully chosen so that two hosts could not be plugged into each other. With USB C both the host and device have the same connector. With this setup it is now possible to plug two hosts into each other. USB C does use an active cable which I assume arbitrates connections preventing any electrical damage. I assume one of three things could happens. Nothing at all An error "don't do this" or something like that A connection is established with one host submitting as a device to the other host. (seems unlikely) What happens? Is it one of my propositions or something completely different? | The answer depends on whether the host ports are regular host ports, or "Dual-Role Ports" (DRP), at least one of them. If both ports are regular host ports, nothing will happen, so (1) is true. (because both ports will have pull-ups on CC pin, and this will not trigger any host reaction, VBUS will not be asserted). If one of the ports (like in some modern tablets/phones) is DRP, the DRP port will alternate its CC function trying to pretend as host, then as device, and so forth. Depending on the other port, right connection will be established. So the answer is (3). If both ports are DRP, the (3) is still true, just the role of devices will be determined at random, depending on cable plug-in time relative to CC cycle. These are SPECIFICATIONS for the Type-C connector. | {
"source": [
"https://electronics.stackexchange.com/questions/255684",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/81617/"
]
} |
255,687 | I think in some Communication Protocols it is sometimes recommended to twist the signal wires. Why and in which Protocols or Applications? | The answer depends on whether the host ports are regular host ports, or "Dual-Role Ports" (DRP), at least one of them. If both ports are regular host ports, nothing will happen, so (1) is true. (because both ports will have pull-ups on CC pin, and this will not trigger any host reaction, VBUS will not be asserted). If one of the ports (like in some modern tablets/phones) is DRP, the DRP port will alternate its CC function trying to pretend as host, then as device, and so forth. Depending on the other port, right connection will be established. So the answer is (3). If both ports are DRP, the (3) is still true, just the role of devices will be determined at random, depending on cable plug-in time relative to CC cycle. These are SPECIFICATIONS for the Type-C connector. | {
"source": [
"https://electronics.stackexchange.com/questions/255687",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/121917/"
]
} |
256,082 | I'm learning PCB CAD. I want to know why components seem to be placed at right angles and orthogonal to the PCB (assuming that it's rectangular). Since the traces are secondary to the placement of the components, I'm not particularly concerned with traces. Why can't my TO-220 transistor be at 18.31 degrees to its decoupling capacitor? Why can't a ring of 13 LEDs be placed with each rotated by 27.69230769230769230769 degrees? The thing that really confuses me, is the connector. It's pretty much irrelevant which way a resistor is placed alongside a capacitor on a PCB. They only relate to each other. But connectors are different. They relate to the outside world which is not entirely orthogonal. If I have a triangular bedside thingy, I might want connectors /controls on all three sides. So at 120 degrees to each other. This might also have an effect on the traces if close to the connector pads. I don't personally think that there is any issue with components at any angle. You just never see them, even at the school level. Why? Three pointers: I'm only concerned with DIY projects. So no component auto placing
by cyborgs operating to standard programs/industry norms. There is a similar question from 2010 . That is broader in scope
than mine as it does not restrict the manufacture to DIY-only
projects. And six years in CAD / software development is a lifetime
and rarely relevant. Software that is easier to design in 45 degrees
steps is not a necessarily still relevant. If I use Illustrator,
Blender, AutoCAD or Inkscape there are no restrictions on angles. I'm making a distinction between the orientation of traces and the
components themselves. | Having designed a few PCBs in my time, including some with components at weird angles, I'll give you a quick summary of my experience. As I see it, there are several reasons to stick to 90 degree angles. Grids - If you are trying to route everything nicely on a grid, then having off-angles is a pain in the neck as stuff no longer lines up with the grid. Each time you then try to move the component around, you have to redraw the traces to get the trace back on a grid so you can route the rest of it. This is a real pain in Eagle, though not so much in other software where the traces are more fluid (e.g. Mentor Xpedition). Escape Routing - This is especially true for SMD components with many pins. As you try to bring the trace out, if you are sticking to a 45 degree routing pattern for traces, you end up having to zig-zag all over the place to try and get the traces out which is just a mess. Machine Assembly - As @PlasmaHH points out in the comments, some pick and place machines can't handle arbitrary angles. Many are limited to just orthogonal placement, while others to 45 degrees. This may more may not be applicable to DIY boards depending on whether you are planning on hand or machine soldering. Soldering - Laying components down that are at all sorts of angles can be a pain. I find it much easier to have everything orthogonal as you can tape the PCB down or put it in a holder, and then just solder each in turn. Though this one is somewhat subjective. Aesthetics - Someone once said to me that if a PCB looks neat, it will work good. That's not entirely true, but it is a good thing to keep in mind. It requires some care and attention to lay out a PCB neatly, with traces kept nicely at 45 degree angles, neat routing of data buses, and so forth. This attention to detail and extra time spent increases the likelihood that you will spot any mistakes. Why do I mention this? Personally I find PCBs with traces going off at all sorts of odd angles, and components placed off-grid at odd angles, just look messy or rushed. Now in some cases, especially TQFP or QFN packages, it is far easier to place them on a 45 degree angle. This actually makes escape routing much easier and more compact as you can go out easily in any of the 4 orthogonal directions after a short 45 degree trace. Notice how in the below image at the top right of the TQFP package, you can actually route the pins onto a 90 degree routing grid within the border of the IC. Furthermore, some times space restrictions necessitate odd angles. Normally I would stick all passive resistors and caps orthogonally. In some cases, if for example a data bus with terminations is running on a 45 degree grid, it becomes necessary to rotate the passives to match to avoid increasing the overall size massively. Notice also in the image below that I placed the crystal at 45 degrees to match the TQFP package. There are cases where I have put components on odd angles. However I only tend to do this if there is a very specific reason. One example is if you need to place LEDs in a pattern - for example edge mount on a circle. In this case it is necessary to put them on angles. I show this as an example below. In fact you may notice that many of the components are rotated as well. This is indeed the case, and it is also another specific case. In this design, there are 11 copies of the exact same subsystem, each containing 32 degrees of LEDs in a circle. The individual sections were designed with all components but the LEDs placed orthogonally. 11 rotated copies were then placed to build up the circle. In this case components are not orthogonal over the whole design, but they are orthogonal in their sub-block. | {
"source": [
"https://electronics.stackexchange.com/questions/256082",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/56469/"
]
} |
256,154 | One of TI's new regulators has a rather unusual footprint , with several pads (7-13 in this instance) requiring that the pad metal extend under the solder mask. This is in contrast to the usual case where the solder mark starts some distance outside the pad, as is the case of pads 1-6, 14 and 15 in this instance. What would be the purpose of having a footprint designed like this? My guess would be heat dissipation, but it would be far more common to have a centre pad in this instance. | There are two ways of defining the "active" area of a surface mount footprint: SMD and NSMD - that is Solder Mask Defined and Non-Solder Mask Defined . It is unusual to see both in one footprint, but certainly not impossible. SMD pads effectively have a raised lip around the edge of the pad. This at times can have an advantage over NSMD pads for a couple of reasons: It can create an insulating seal around the pads reducing the possibility of solder bridges forming during re-flow It increases the mechanical strength of the pad since the mask helps hold it down It limits the surface tension pull-down of the component on large pads It is only the larger pads that are SMD in that footprint. Those pads will typically have more solder paste on them, which means the possibility of that paste oozing out sideways and forming bridges. The solder mask basically forms a barrier around the pad reducing the possibility of those bridges forming and making the solder paste remain within the area of the pad during reflow. Also when the solder paste melts the surface tension will suck the component down towards the pads. The larger the pad the more force it exerts. With large pads it is possible for them to exert too much pressure thus pushing the solder paste out of the normal pads and making bad connections. By using SMD on those pads you limit how far down the chip can be pulled by those pads. The mask forms a cushion on which the chip sits so the other pins can then reflow properly. | {
"source": [
"https://electronics.stackexchange.com/questions/256154",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/6297/"
]
} |
256,299 | In my country (Germany) we have frequency-modulated (FM) and amplitude-modulated (AM) radio broadcasts. However, the reality is that no one ever listens to the AM since you just don't hear anything (I don't need to explain to you the downsides of amplitude modulation). :) So, I asked myself why the AM part is still active? Does amplitude modulation have any huge advantages over frequency modulation that it's worth keeping the hardware alive? | In a nutshell: One antenna will give you a usable radius of 100...1000 km, depending on the power used. In Germany, for the example of my favored news station Deutschlandfunk, we used to have two long-wave AM stations (153 and 207 kHz, IIRC), and I do miss them every once in a while. The one at 207 kHz covered pretty much all of Southern Germany, and while I admit that the quality was low (as in: landline telephone-ish low), you could listen to the program with no trouble, anywhere in your house, and understand every word well. Now, for terrestrial distribution, they just use FM, which works in a few small places only, or you could try DAB+, and I'm not sure if the latter works in all places. I do miss the robustness and the beautiful simplicity of long or medium wave AM. It's not so much the type of modulation (AM vs. FM). It's the low-ish frequencies that tend to work well over wide areas and even through big walls, for example if you're downstairs. It's not true that no one ever listened, and in contrast to North America, for example, Germany used to have only very few good stations on AM in the decade before they pulled the plug on it, which gives you another very important reason why few people listened. A personal note: It twists my stomach to see how AM has already vanished, and to know that some want to abandon analog FM as well. If you were to get cynical, you could argue there is some strong political will to seriously srew up anything terrestrial for good, at least in Germany. A bit off-topic here, and a rant, but terrestrial TV broadcasting shows you how bad it can become, and it's a fine example of unclever engineering: Analog terrestrial TV was shut down not long ago, in the early 2000s, with DVB-T as a replacement. Soon, (mostly private) stations stopped broadcasting on DVB-T, and now, DVB-T2 is about to be introduced, and of course, it's not backwards compatible to DVB-T, so any DVB-T receiver will be a piece of useless junk TM very soon. Considering the beauty of analog TV, this is sickening. There was black-and-white TV. Then they figured out how to put color into the signal while black-and-white receivers would still decode black-and-white and the new color TV signal, and color TV receivers would decode old black-and-white signals just as well as new color TV signals. Then, they put all other sorts of fancy stuff into the signel (stereo, videotext, ...) and everything was still forward and backward compatible. That's what I call good engineering, even more so if you put it into the context of its time and consider how advanced things were with respect to what was possible with the available technology. | {
"source": [
"https://electronics.stackexchange.com/questions/256299",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/121703/"
]
} |
256,336 | When I was young and learning about electricity, a fabulous tool for understanding voltage/current/resistance was an incandescent lightbulb (in my case it was a small 3V bulb). When you doubled the voltage by putting two batteries in series, it glowed 4x as bright, but heated up more and was more prone to burning out. When you put two lightbulbs in series, they glowed 1/4 as bright. When you put them in parallel, they glowed normally, but drained the battery twice as fast. Etc. This day and age however incandescent bulbs are on the way out, and LEDs are replacing them for a good reason (like not burning out every few months or so). But LEDs are different and follow different rules, which I don't understand myself very well. I was wondering - can LEDs be used in the same way? I know that for a LED to be usable in a similar way as a classical lightbulb, you need to put it in series with a resistor, otherwise it draws too much current and burns out. I think you can even buy LEDs with built-in resistors. But would they work in the same fashion? Would changes in voltage be accompanied with corresponding changes in brightness? | LEDs are a very very different beast compared to incandescent light bulbs. LEDs belong to a class of device known as non-linear devices . These don't follow Ohm's Law in the classic sense (however Ohm's Law is still used in conjunction with them). An LED is (obviously) a form of diode. It has a forward voltage which is the voltage at which the diode starts to conduct. As the voltage increases so does how well the diode conducts, but it does that in a non-linear fashion. With an LED it's the amount of current flowing through it that determines how bright it is. Increasing the voltage increases the current, yes, but the region where that happens without the current getting too much is very small. In the red curve above it may be that tiny little bit around 1.5V, and by the time you get to 2V the current is off the scale and the LED burns out. Putting LEDs in series does sum the forward voltages, so you have to provide a higher voltage for conduction to start, but the controllable region is still just as tiny. So we control the current instead of the voltage, and take the forward voltage as a fixed value. By either including a resistor in the circuit to fill the gap between the supply voltage and the forward voltage, limiting the current in the process, or by using a constant current supply, we can set the current that we want to flow through the LED and thus set the brightness. By increasing the current, but not increasing the voltage (or only a negligible amount, and purely incidentally), we increase the brightness. The formula for calculating the resistance to use for a specific current is: $$
R = \frac{V_S - V_F}{I_F}
$$ Where \$V_S\$ is the supply voltage, \$V_F\$ is the LED forward voltage, and \$I_F\$ is the desired LED forward current. | {
"source": [
"https://electronics.stackexchange.com/questions/256336",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/2575/"
]
} |
256,566 | I read the following from a book titled " An Embedded Software Primer " by David E. Simon. (23rd print Nov/2014 - Page 16) If no part on the circuit is driving a signal, then that signal is
said to be floating. Its voltage will be indeterminate and may change
as time passes. The results of a floating signal vary between harmless
and disastrous, depending upon how the parts with inputs connected to
the floating signal cope with the problem. Based on this, it looks like there is no good reason why would a circuit have a floating signal. If this is right, then why would such signal be allowed? Is this done due to a mistake in the board design? Are there scenarios where such a signal is needed? | Floating signals are usually not a good thing, but can be acceptable in some cases. In all those cases, the value of the signal does not matter. Not every signal is relevant all the time. A common example is the MISO line of a SPI bus. This is only actively driven when a slave device is selected (enabled). It's value is only relevant for a short time around one of the SCK clock edges. At all other times, the signal can be any state without affect on the system since the system ignores it. So what happens to MISO when no slave is selected, as is the case whenever the SPI bus is not in use? The answer is you don't care. It doesn't matter what its value is since nobody is looking at it. Since MISO is driven only by the single selected slave, all unselected slaves and anything else on that line must be high impedance. That means when no slave is selected, the line is left floating as described in the passage you quoted above. This causes no bad data, since again, the system is ignoring the line at that time. While a floating line is OK logically when nothing is looking at its value, it can be a problem electrically. Many logic inputs are intended for the voltage to be either solidly low or solidly high. In-between values can cause higher than specified currents in the input circuit, and in some cases can even cause this circuit to oscillate. For this reason, there is often a weak pulldown or pullup resistor on lines that could float. I usually use a 100 kΩ pulldown on MISO, for example. When a slave is selected, it drives the line regardless of the small extra current it takes to hold it in the high state. However, when nothing is driving the line, it will go low, preventing the unwanted extra current and oscillations in anything receiving the signal. There are also types of digital inputs that can handle any voltage within the valid range without undesirable characteristics, like extra current or oscillations. Schmitt triggers are one example. These have hysteresis so that after flipping one way, it takes a different voltage to flip the other way. A floating line may cause the digital signal to be interpreted randomly as its voltage floats around, but the digital input is designed to handle that. Of course the rest of the system still needs to be designed to not care what the value of that digital signal is during the time its floating. In general, truly floating signals are bad, but can be easily addressed with a weak pulldown or pullup resistor. | {
"source": [
"https://electronics.stackexchange.com/questions/256566",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/121212/"
]
} |
256,630 | I'm quite new to electronics and I'm having a hard time understanding the "pull-up resistor" principle. I have read a lot of articles about that, and I think I've got it but I'm not 100% sure so I have a question. In this article , after the first image, it says: When the momentary button is pressed it connects the I/O pin to Vcc and the microcontroller would register the input as a high. But I don't get it. Where is VCC? From what I see, there is no power source on this schema, just a microcontroller wired to a button that are both wired to ground so how can there be any voltage at all in this circuit? | The article seems quite confusing: the text and figures don't match. I'll try to present here the same three schematics as there, with hopefully a more matching explanation. Assume U1 is your microcontroller, and P1 is an I/O pin configured as input. (It could be any logic gate, really.) Other connections to U1 are not that relevant so are not pictured, but assume it has power connections and other necessities. (1) If the button is pressed, port P1 is connected to ground, and will sense a low logic level. But when the button is released, the port isn't connected anywhere, but is floating . There's no definite voltage present, so even minor noise may cause the digital input to switch from one value to the other. It might also oscillate, and cause increased power consumption. Not good. (2) Now, when the button is not pressed, the port will sense a high level, since it's connected directly to Vcc. But if the button is pressed, Vcc is short-circuited to ground, and the power source will probably burn and die. Even worse. (3) Here, if the button is not pressed, the port will again sense a high logic level: it's pulled high through the resistor. (There's no voltage loss over the resistor, since the impedance of the digital input is very high, and therefore the current to the port is approximately zero.) When the button is pressed, the port is connected directly to ground, so it senses a low level. Now, a current will flow from Vcc to ground, but the resistor will limit it to something sensible. This is good. In this schematic, an unpressed button reads as a high value (1), and a pressed button reads as low (0). This is called active-low logic.
Swapping the resistor and the switch would invert this, so that an unpressed button would read as low (0), and a pressed button as high (1). ( active-high logic.) simulate this circuit – Schematic created using CircuitLab | {
"source": [
"https://electronics.stackexchange.com/questions/256630",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/32476/"
]
} |
256,635 | I have an old iPhone of which I want to reuse the LCD display. The thing is, I don't want to use it as an actual display but rather make a fancy lamp out of it. The question I have is how I can figure out which pins I need to put current on to make the screen shine. The idea would be to just have it connected to a simple switch to turn it on and off.
Is there any way I should go about doing this? | The article seems quite confusing: the text and figures don't match. I'll try to present here the same three schematics as there, with hopefully a more matching explanation. Assume U1 is your microcontroller, and P1 is an I/O pin configured as input. (It could be any logic gate, really.) Other connections to U1 are not that relevant so are not pictured, but assume it has power connections and other necessities. (1) If the button is pressed, port P1 is connected to ground, and will sense a low logic level. But when the button is released, the port isn't connected anywhere, but is floating . There's no definite voltage present, so even minor noise may cause the digital input to switch from one value to the other. It might also oscillate, and cause increased power consumption. Not good. (2) Now, when the button is not pressed, the port will sense a high level, since it's connected directly to Vcc. But if the button is pressed, Vcc is short-circuited to ground, and the power source will probably burn and die. Even worse. (3) Here, if the button is not pressed, the port will again sense a high logic level: it's pulled high through the resistor. (There's no voltage loss over the resistor, since the impedance of the digital input is very high, and therefore the current to the port is approximately zero.) When the button is pressed, the port is connected directly to ground, so it senses a low level. Now, a current will flow from Vcc to ground, but the resistor will limit it to something sensible. This is good. In this schematic, an unpressed button reads as a high value (1), and a pressed button reads as low (0). This is called active-low logic.
Swapping the resistor and the switch would invert this, so that an unpressed button would read as low (0), and a pressed button as high (1). ( active-high logic.) simulate this circuit – Schematic created using CircuitLab | {
"source": [
"https://electronics.stackexchange.com/questions/256635",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/123051/"
]
} |
257,094 | Say, I am using a Red LED which takes 20mA current from 2.0V battery. (I don't know if its the right specifications but I checked from this PDF I found on Google.) So, since I will be using a 9V battery so, I will need at least a 350 ohms resistor to resist the 7V coming from the battery. What happens to this extra 7V of power? Does it go unused, dissipates as heat, or simply gets blocked from resistor such that it draws only 2V from battery? | You are getting your terminology all muddled up. Firstly, V = Volts which is a measure of potential difference (voltage), not power. So saying "extra 7V of power" is incorrect. Secondly, the resistor doesn't "resist voltage", it resists the flow of current . Thirdly, a device doesn't "draw 2V from the battery", it draws a current from the battery. So lets go through and express what is happening.
You have a \$9\mathrm{V}\$ power supply (e.g. battery) which is connected to a series circuit of an LED and a resistor. The battery causes a potential difference across the circuit of \$9\mathrm{V}\$. Now we know that the LED will drop \$2\mathrm{V}\$ over a fairly wide range of currents, so that means that the remaining \$7\mathrm{V}\$ must be dropped across the resistor. Think of it like this, the battery is like taking the lift, and you are the current. You go through the battery and take the lift from the ground floor up to the 9th floor. To get back down to the ground floor, you go through the LED which drops you down two floors, the resistor must then take you down 7 floors back to the ground. When a voltage is dropped across a resistor, it will cause a current to flow, a relationship governed by Ohms law (\$V = IR\$). With a voltage drop of \$7\mathrm{V}\$, and a resistor of \$350\Omega\$, you will have a current of \$\frac{V}{R}=\frac{7}{350}=20\mathrm{mA}\$. This current must also be equal to the current through the LED (go back to the lift example, you are the current and there is the same number of you passing through both components). In any device, when a current flows it causes heating as the electrons bounce around in the material. This heating is the dissipation of power. Power dissipation can be calculated as \$P = IV\$. So for your resistor you have a voltage drop of \$7\mathrm{V}\$ and a current flow of \$20\mathrm{mA}\$ which means you are dissipating \$P=7\mathrm{V}\times20\mathrm{mA}=140\mathrm{mW}\$ of power. Similarly, for the LED you have a voltage drop of \$2\mathrm{V}\$ and a current of \$20\mathrm{mA}\$, so are dissipating \$40\mathrm{mW}\$ of power (much of which is converted to light by the LED). As a result, 78% of the power is dissipated in the resistor as explained by @Mario. The resistor is effectively acting as a regulator to reduce the voltage across the LED and limit the current flowing through it. If you use a battery with a lower voltage, you will require less voltage to be dropped across the resistor and hence need a smaller resistor for the same current flow. For example if you use a \$3\mathrm{V}\$ battery, you would need a resistor of \$R = \frac{V}{I} = \frac{1\mathrm{V}}{20\mathrm{mA}} = 50\Omega\$. The lower resistance means less power is being dissipated and so less power is being wasted. | {
"source": [
"https://electronics.stackexchange.com/questions/257094",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/50938/"
]
} |
257,444 | For my project containing an ATtiny85 running at 32.768 kHz using an external watch crystal I thought I'd include a 1 uF decoupling capacitor near the MCU power pin for good measure. However, reading up on it it seems that most people recommend a 0.1 uF capacitor. Can using a too large value cap (e.g. 1 uF) do any harm or would it work alright? | The type is more important than the value- if it's a smallish (eg. 0805 or smaller) surface-mount ceramic part, there is no disadvantage to a larger value capacitor. Compare the below two similar 0603 X7R Murata capacitors (top one is 1uF bottom is 100nF): If you look at some reasonable impedance such as 1 ohm, the 1uF is < 1 ohm for 250kHz to 600MHz and the 100nF from about 1.8MHz to 400MHz, so the 1uF is better everywhere (a decent regulator will fill in the lower frequencies, and a sluggish chip like the ATtiny won't create any edges with higher frequency content to worry about) so either is likely fine. You need to go onto the cap manufacturer's website and either download software or use web-based programs to get the actual behavior, it is usually omitted from datasheets in its full glory because there are too many possibilities. Note that the capacitance of the 1uF will actually be less because of the bias voltage which I didn't bother to set (it's just an example) but you should. | {
"source": [
"https://electronics.stackexchange.com/questions/257444",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/29920/"
]
} |
257,741 | simulate this circuit – Schematic created using CircuitLab Yes, this circuit diagram is correct. No, I did not design it. How do I describe this circuit in words? I thought about "a switch and light bulb in parallel, instead of series" but the circuit is so bizarre that I want to make sure what I am saying is unambiguous. I cannot insert a schematic/picture/diagram/drawing, and I have a fairly tight word limit. If anyone knows the tags for this question, add them. EDIT (due to interest from the comments): The circuit was made by my 3rd grade teacher for an electricity test (when she thought the questions from the curriculum were too hard for us...) EDIT 2: No, this is not a fancy NOT gate. The question was "What will happen when the switch closes" and the teacher-accepted answer being "Lightbulb turns on " | How do I describe this circuit? Do you want subjective opinion? Or technical description? Subjective opinion would be: this circuit is badly designed, no matter what problem the designer tried to solve. Technical description would be: it is a battery killer with stand-by indicator. | {
"source": [
"https://electronics.stackexchange.com/questions/257741",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/96120/"
]
} |
258,724 | I know that a simple CPU (like Intel or AMD) can consume 45-140 W and that many CPUs operate at 1.2 V, 1.25 V, etc. So, assuming a CPU operating at 1.25 V and having TDP of 80 W... it uses 64 Amps (a lot of amps). Why does a CPU need more than 1 A in their circuit (assuming FinFET transistors)? I know that most of the time the CPU is idling, and the 60 A are all "pulses" because the CPU has a clock, but why can't a CPU operate at 1 V and 1 A? A small and fast FinFET transistor, for example: 14 nm operating at 3.0 GHz needs how many amps (approximately)? Does higher current make transistors switch on and/or off more quickly? | CPUs are not 'simple' by any stretch of the imagination. Because they have a few billion transistors, each one of which will have some small leakage at idle and has to charge and discharge gate and interconnect capacitance in other transistors when switching. Yes, each one draws a small current, but when you multiply that by the number of transistors, you end up with a surprisingly large number. 64A is an average current already...when switching, the transistors can draw a lot more than the average, and this is smoothed out by bypass capacitors. Remember that your 64A figure came from working backwards from the TDP, making that really 64A RMS, and there can be significant variation around that at many time scales (variation during a clock cycle, variation during different operations, variation between sleep states, etc.). Also, you might be able to get away with running a CPU designed to operate at 3 GHz on 1.2 volts and 64 amps at 1 volt and 1 amp....just maybe at 3 MHz. Although at that point you then have to worry about whether the chip uses dynamic logic that has a minimum clock frequency, so maybe you would have to run it at a few hundred MHz to a GHz and cycle it into deep sleep periodically to get the average current down. The bottom line is that power = performance. The performance of most modern CPUs is actually thermally limited. This is relatively easy to calculate - \$I = C v \alpha f\$, where \$I\$ is the current, \$C\$ is the load capacitance, \$v\$ is the voltage, \$\alpha\$ is the activity factor, and \$f\$ is the switching frequency. I'll see if I can get ballpark numbers for a FinFET's gate capacitance and edit. Sort of. The faster the gate capacitance is charged or discharged, the faster the transistor will switch. Charging faster requires either a smaller capacitance (determined by geometry) or a larger current (determined by interconnect resistance and supply voltage). Individual transistors switching faster then means they can switch more often, which results in more average current draw (proportional to clock frequency). Edit: so, http://www.synopsys.com/community/universityprogram/documents/article-iitk/25nmtriplegatefinfetswithraisedsourcedrain.pdf has a figure for the gate capacitance of a 25nm FinFET. I'm just going to call it 0.1 fF for the sake of keeping things simple. Apparently it varies with bias voltage and it will certainly vary with transistor size (transistors are sized according to their purpose in the circuit, not all of the transistors will be the same size! Larger transistors are 'stronger' as they can switch more current, but they also have higher gate capacitance and require more current to drive). Plugging in 1.25 volts, 0.1 fF, 3 GHz, and \$\alpha = 1\$, the result is \$0.375 \mu A\$. Multiply that by 1 billion and you get 375 A. That's the required average gate current (charge per second into the gate capacitance) to switch 1 billion of these transistors at 3 GHz. That doesn't count 'shoot through,' which will occur during switching in CMOS logic. It's also an average, so the instantaneous current could vary a lot - think of how the current draw asymptotically decreases as an RC circuit charges up. Bypass capacitors on the substrate, package, and circuit board with smooth out this variation. Obviously this is just a ballpark figure, but it seems to be the right order of magnitude. This also does not consider leakage current or charge stored in other parasitics (i.e. wiring). In most devices, \$\alpha\$ will be much less than 1 as many of the transistors will be idle on each clock cycle. This will vary depending on the function of the transistors. For example, transistors in the clock distribution network will have \$\alpha = 1\$ as they switch twice on every clock cycle. For something like a binary counter, the LSB would have \$\alpha\$ of 0.5 as it switches once per clock cycle, the next bit would have \$\alpha = 0.25\$ as it switches half as often, etc. However, for something like a cache memory, \$\alpha\$ could be very small. Take a 1 MB cache, for example. A 1 MB cache memory built with 6T SRAM cells has 48 million transistors just to store the data. It will have more for the read and write logic, demultiplexers, etc. However, only a handful would ever switch on a given clock cycle. Let's say the cache line is 128 bytes, and a new line is written on every cycle. That's 1024 bits. Assuming the cell contents and the new data are both random, 512 bits are expected to be flipped. That's 3072 transistors out of 48 million, or \$\alpha = 0.000061\$. Note that this is only for the memory array itself; the support circuitry (decoders, read/write logic, sense amps, etc.) will have a much larger \$\alpha\$. Hence why cache memory power consumption is usually dominated by leakage current - that is a LOT of idle transistors just sitting around leaking instead of switching. | {
"source": [
"https://electronics.stackexchange.com/questions/258724",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/124172/"
]
} |
259,409 | I have been taking apart a old television circuit board and I found several of these things. They look like resistor but when I test them with the multimeter the resistance is very low, around 10 to 20 ohms. | That would be an inductor with a resistor style color code. Here's a picture from that Wikipedia page showing some similar 100 µH axial lead inductors: Vahid alpha at English Wikipedia CC BY 3.0 , via Wikimedia Commons | {
"source": [
"https://electronics.stackexchange.com/questions/259409",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/123705/"
]
} |
260,049 | I'm currently in Manuel Antonio, Costa Rica. I'm living in a relatively off-the-beaten-track house and at the top of some of the utility poles leading to my house are these canisters (the light grey thing with "IC" on it): What is that? Is it a super localized transformer for the light fixture? Is it something else? On the 5m walk from the main road to my house, there are many instances of these. NB: this is in Costa Rica, not the US. So, a second question is... what is the equivalent of this in the US? Or is it common in more rural parts of the US? (I live in a city, normally). | It's a distribution transformer , aka 'pole pig'. It lowers the voltage from the higher voltage in the supply lines to the power used in your house. The distribution lines that run down your street are probably 5-15kV. From the length of the insulators, probably towards the higher end of that spectrum. They contain a transformer and oil used for cooling (in earlier days that oil would contain hazardous PCBs - PolyChlorinated Biphenyls, not printed circuit boards, though I do have a warning sticker on my computer that says it contains PCBs). Since Costa Rica uses 120VAC/60Hz the secondary voltage probably is center-tapped 240VAC 60Hz as used in Canada and the US. At a higher level in the distribution food chain, the electricity is all 3-phase but it's common to only distribute the 3-phase along major thoroughfares and then bring a single phase down a smaller street. These are quite common in North America - in rural and in suburban environments. Only in major cities where the utilities are kept underground are they not seen. Edit: The IC is probably part of the ICE logo (Instituto Costarricense de Electricidad), the state-run electricity (and telecom) company. | {
"source": [
"https://electronics.stackexchange.com/questions/260049",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/19103/"
]
} |
260,054 | I bought this transformer As I need to convert 230vac to 18vac As can be seen in the image it has 2x 115V terminals and 2x 9v terminals so I assumed it would be centre tapped but this does not seem to be the case. There is no continuity between the top left terminals and top right, the setup is the same for the lower 9v terminals. My question is, can I safely bridge the 2 middle top terminals and 2 middle lower terminals to form a 230v winding and 18v winding respectively? | It's a distribution transformer , aka 'pole pig'. It lowers the voltage from the higher voltage in the supply lines to the power used in your house. The distribution lines that run down your street are probably 5-15kV. From the length of the insulators, probably towards the higher end of that spectrum. They contain a transformer and oil used for cooling (in earlier days that oil would contain hazardous PCBs - PolyChlorinated Biphenyls, not printed circuit boards, though I do have a warning sticker on my computer that says it contains PCBs). Since Costa Rica uses 120VAC/60Hz the secondary voltage probably is center-tapped 240VAC 60Hz as used in Canada and the US. At a higher level in the distribution food chain, the electricity is all 3-phase but it's common to only distribute the 3-phase along major thoroughfares and then bring a single phase down a smaller street. These are quite common in North America - in rural and in suburban environments. Only in major cities where the utilities are kept underground are they not seen. Edit: The IC is probably part of the ICE logo (Instituto Costarricense de Electricidad), the state-run electricity (and telecom) company. | {
"source": [
"https://electronics.stackexchange.com/questions/260054",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/124845/"
]
} |
260,358 | I am reading about the standard protocol for UART and I think that if the receiving UART does not have any idea on what baud rate the data was transmitted, there would be lots of problems. If the assumed baud rate is lower than the baud rate in which the data is transmitted, there will be bits that would not be 'seen' by the receiving UART. On the other hand if the baud rate used by the receiver is higher than than the baud rate in which the data is transmitted, there will be bits that will be counted twice and would result the data being 'read' incorrectly. My knowledge around UART is that when the line is idle, it is kept to a '1', the Start bit is a '0' and the Stop bit is a '1'. Also, the Stop bit being '1' does not have any difference with the '1' when the line is idle or is there a way to differentiate? Do two communicating UART's first agree on which baud rate they will use? If yes, how do they do it? | Ordinary UARTs have to be pre-configured with the desired baud rate (as well as word length, stop bits, parity, etc) traditionally by a human. For several decades now though there have been implementations of "auto baud" detection found in some settings, which typically works by timing key features of the waveform to deduce the baud rate. Early versions needed a known character to be transmitted, but more sophisticated versions might be able to find the rate from more arbitrary data. A receiving UART typically has a local clock that runs at a faster rate - typically 8 or 16 times the baud rate. This is used to sample the incoming signal and detect the bits within a word in a way that can tolerate a few percent of error. Even two crystal oscillators wouldn't match rates perfectly, but the error tolerance can permit use of some less precise sources, sometimes including trimmed on-chip oscillators, etc. It can also help accommodate the fact that dividing down popular oscillator frequencies may only produce an inaccurate approximation to certain baud rates - in the old days, UART master clocks sometimes needed particular frequencies to access popular baud rates, for example 11.0592 MHz on the 8051 family. | {
"source": [
"https://electronics.stackexchange.com/questions/260358",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/124930/"
]
} |
260,366 | The analog to digital converter has a staircase waveform. But the error waveform of this staircase signal is a sawtooth waveform. Why does this happen? I have come to know that, the sawtooth signal is the
difference between the quantized output signal (solid) and the
analog input signal (dashed). But when I look at the graph, it seems to be like a triangular waveform. How does this turn out to be a sawtooth waveform? Just for the note, I have found out the RMS value of this error signal which is a triangular waveform. Thanks in advance. | Ordinary UARTs have to be pre-configured with the desired baud rate (as well as word length, stop bits, parity, etc) traditionally by a human. For several decades now though there have been implementations of "auto baud" detection found in some settings, which typically works by timing key features of the waveform to deduce the baud rate. Early versions needed a known character to be transmitted, but more sophisticated versions might be able to find the rate from more arbitrary data. A receiving UART typically has a local clock that runs at a faster rate - typically 8 or 16 times the baud rate. This is used to sample the incoming signal and detect the bits within a word in a way that can tolerate a few percent of error. Even two crystal oscillators wouldn't match rates perfectly, but the error tolerance can permit use of some less precise sources, sometimes including trimmed on-chip oscillators, etc. It can also help accommodate the fact that dividing down popular oscillator frequencies may only produce an inaccurate approximation to certain baud rates - in the old days, UART master clocks sometimes needed particular frequencies to access popular baud rates, for example 11.0592 MHz on the 8051 family. | {
"source": [
"https://electronics.stackexchange.com/questions/260366",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/124432/"
]
} |
260,477 | The 74HC series can do something like 20MHz while 74AUC can do something like maybe 600MHz. What I'm wondering is what sets these limitations. Why can't 74HC do more than 16-20MHz while 74AUC can and why can't the latter do even more? In the latter case, does it have to do with physical distances and conductors (e.g. capacitance and inductance) compared to how tightly packed CPU ICs are? | As technology size decreases, wire resistance/capacitance cannot scale proportionally to the propagation delay of the now faster/smaller transistors. Because of that, the delay becomes largely wire dominated (as the transistors composing the gates shrink; both their input capacitance and output drive capabilities decrease). So, there is a tradeoff between a faster transistor and the drive capabilities of the same transistor for a given load. When you consider that the most significant load for most digital gates is the wire capacitance and ESD protection in the following gates, you will realize that there is a point at which making the transistors smaller (faster and weaker) no longer decreases the delay in situ (because the load of the gate is dominated by wire and ESD resistance/capacitance of wires and ESD protection to the next gate). CPU's can mitigate this because everything is integrated together with wires sized proportionally. Even so, the gate delay scaling is not being matched with interconnect delay scaling. Wire capacitance is reduced by making the wire smaller (shorter and/or thinner) and insulating it from nearby conductors. Making the wire thinner has the side effect of also increasing the wire resistance. Once you go off-chip, the wire sizes connecting the individual ICs become prohibitively large (thickness and length). There is no point in making an IC which switches at 2GHz when it can practically only drive 2fF. There is no way to connect the ICs together without exceeding the maximum drive capabilities. As an example, a "long" wire in newer process technologies (7-22nm) is between 10-100um long (and perhaps 80nm thick by 120nm wide). You can not reasonably achieve this no matter how smart you are with the placement of your individual monolithic ICs. And I also agree with jonk, regarding ESD and output buffering. As a numerical example about the output buffering, consider a practical current technology NAND gate has a delay of 25ps with an appropriate load, and an input slew of ~25ps. Ignoring the delay to go through ESD pads/circuitry; this gate can only drive ~2-3fF. To buffer this up to an appropriate level at the output you may need many stages of buffer. Each stage of buffer will have a delay of around ~20ps at a fanout of 4. So you can see that you very quickly lose the benefit of faster gates when you must buffer the output so much. Lets just assume the input capacitance through the ESD protection + wire (the load which each gate must be able to drive) is around 130fF, which is probably very underestimated. Using fanout of ~4 for each stage you would need 2fF->8fF->16fF->32fF->128fF : 4 stages of buffering. This increases the NAND 25ps delay to 105ps. And it is expected that the ESD protection at the next gate will also add considerable delay. So, there is a balance between "using the fastest possible gate and buffering the output" and "using a slower gate which inherently (due to larger transistors) has more output drive, and thus requires less stages of output buffering". My guess is that this delay occurs around 1ns for general purpose logic gates. CPU's which must interface with the external world get more return on their buffering investment (and hence still pursue smaller and smaller technologies) because rather than paying that cost between every single gate, they pay it once at each I/O port. | {
"source": [
"https://electronics.stackexchange.com/questions/260477",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/107114/"
]
} |
261,728 | I just carried out an experiment in my college to study the attenuation of fibre optic cable versus length and type of cable. This experiment was carried out with an LED light source and a power meter connected at the other end. The wavelength is set to 1300nm and the results obtained as follows: Single Mode (1meter) = -36.14 dBm
Single Mode (10meter) = -36.12dBm
Multimode (1meter) = -35.94dBm
Multimode (10meter) = -18.48dBm Anyone could explain to me why as the cable gets longer, the received power gets higher and also why multimode fiber optic cable has higher received power than single mode cable? | This is where the measurement scientist has to go into full sceptical and investigative mode. First thing. Fibre, as a passive material, is lossy. It absorbs power. Therefore the power arriving at the end of a length of fibre will be less than was launched. Period. No arguments. We don't do over-unity here. So what causes your observations? Single mode, 1m -36.14dBm, 10m -36.12dBm How repeatable are your measurements? Break down and rebuild the connections, and measure again, several times (min 3, but 5 or 10 would be better). Only then can you see whether 0.02dBm is a significant physical effect or whether it's a lucky coincidence. Measure 20m, and 30m. Is 0dB +/- 0.1dB a reasonable absorption level for 10m of fibre? I don't know, that's what you are measuring. You can be assured that the fibre loss in dB will be additive for longer lengths (for single mode, if there are multiple modes propagating this may not be true for the total power, but it's still true for each mode ), so (once you're in single mode operation) you should be able to draw a linear graph of fibre length against dB loss. Remember, 2 points makes a very statistically poor graph. And finally, I used the phrases 'arriving at the end' and 'the power that was launched'. The power in the fibre isn't necessarily the same as in the test gear. The interfaces will create uncertainty, they lose power. The power losses depend on axial alignment, the gap, the fibre face surface finish (so how well it was prepared). I would be completely unfazed by a measurement showing that a short length of fibre had a lower loss than just the source directly into the receiver, because it's about optical coupling efficiency. Further to the repeatability measurements I asked you to make above, that's not just several repeat assemblings of the same components (which is measuring your variability), but also doing it again for different samples of nominally the same components (the variability of the system and whether the tools and methods you are provided with work repeatably). So make 3 or more samples of 1m fibre, and compare them. Single mode 1m 36.14dBm, multimode 1m 35.94dBm Again, characterise your repeatablity, before you jump to any conclusions on whether a measured difference of 0.2dB is significant. Single and multi mode fibres might have different optical apertures, so have different coupling losses, quite independent of their transmission losses. Prepare some 'zero length' fibres, or as near zero as the apparatus allows, and measure those. And do 10m, 20m, 30m plots for both. Then you can start saying that there is a significant difference between them. Multimode 1m -35.94, 10m -18.48dBm No. Given your other measurements above, something's wrong. You've spilt coffee on the apparatus, or someone's adjusted something while your back was turned, for a laugh. Measure again. So you thought making measurements and drawing conclusions was easy? No. Test any difference you see against your experimental repeatability. Vary one factor at a time. Consider all possible factors and control for them all. Remember, if a difference is real, it will persist as you make repeated measurements. If you just see something one time, is it the effect, is it you, is it something you hadn't thought of? | {
"source": [
"https://electronics.stackexchange.com/questions/261728",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/124335/"
]
} |
261,945 | This very trivial task is to solder wires to the terminals of a small round 3.5 mm audio plug. I can do this myself, but I need to show to others and this is one of the first times they're trying any kind of soldering. The problem is the connector rolling away during the process of soldering. Students use one hand to hold the wire and another hand to hold the soldering iron. The plug itself lies on the table and rolls away after being touched. Is there a standard, widely accepted way to do this kind of soldering easily? Do I need to provide some kind of vise for them, or there is some simpler approach? The problem does not require soldering with one hand, using both hands is ok and preferred. | A wooden clothes peg (clothes pin in American English) works very well: it won't suffer from solder drops or brief touches with the iron, and has more friction than many other sprung solutions so is less likely to ping at the wrong moment. You can always rest a book on the handle end to add more weight. If you're equipping a classroom, they cost next to nothing. I used to keep a couple with my portable iron in a travelling toolkit; the soldering parts of that were mainly for cables/connectors. | {
"source": [
"https://electronics.stackexchange.com/questions/261945",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/51754/"
]
} |
262,262 | How does a computer calculate a sin value? Logically, when I think about it the only apparent way is to put many sin values into memory, and when a sin value needs to be "calculated" it would just pull data from a specific memory address.(ex. sin(x) would pull data from the memory address containing the value of sin(x) )That seems like the only possible way to do it. Or is there a function which can be used to calculate the sin of a value? I'm really trying to ask how a computer calculates sin on a base level. Is there a way to approximate sin values using a different function composed of more "basic" operations, and the ALU would be able to do multiple "basic" operations to approximate the sin value, or is it just pulling values from memory? | Typically high resolution sin(x) functions would be implemented with a CORDIC (COrdiate Rotation DIgital Computer) algorithm, which can be accomplished with a small number of iterations using only shifts and add/subtract and a small lookup table. The original paper The CORDIC Computing Technique by Jack Volder is from 1959. It also works nicely when implemented with hardware in an FPGA (and a similar algorithm would be implemented in a hardware FPU for those micros that have an FPU). For lower resolution, for example to create synthesized sine wave for an inverter or motor VFD (Variable Frequency Drive), a lookup table (LUT) with or without interpolation works well. It's only necessary to store the values for one quadrant of the sine wave because of symmetry. As @Temlib points out, the algorithms used inside modern FPUs use range reduction followed by an evaluation using something like the Remez algorithm to limit the maximum absolute error. More can be found in this Intel paper Formal verification of floating point
trigonometric functions . | {
"source": [
"https://electronics.stackexchange.com/questions/262262",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/87381/"
]
} |
263,267 | Ball grid arrays are advantageous integrated circuit packages when a high interconnect density and/or low parasitic inductance is paramount. However, they all use a rectangular grid. A triangular tiling would allow π⁄√12 or 90.69% of the footprint to be reserved for the solder balls and the surrounding clearance, while the ubiquitous square tiling only allows π/4 or 78.54% of the footprint to be used. Triangular tiling would theoretically allow either reducing the chip footprint by 13.4% or increasing the ball size and/or clearance while maintaining the same footprint. The choice seems obvious, yet I have never seen such a package. What are the reasons for this? Would signal routing become too difficult, would manufacturability of the board somehow suffer, would this make adhesive underfill impractical or is the concept patented by someone? | Unless you use via-in-pad, which costs more, you need room to put routing vias in between the pads, like this | {
"source": [
"https://electronics.stackexchange.com/questions/263267",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/46582/"
]
} |
263,537 | Project overview I am tasked to develop a microprocessor based device that when shown a light upon, can determine the source of the light (Natural light, Flourescent Bulbs, LED Bulbs, Incandescent Bulbs, Flame - Forest fire). At this stage, only the visible light is considered. From my research, the only way to differentiate the source of light is by analyzing the emission spectrum and matching it closely to known values . Example: Solutions considered Measuring RGB composition ratio of the light I have considered going this route as it doesn't seem too complicated, smaller device, can be integrated easily into the bigger project as a forest fire detector and even suggested by my supervisor.
But I have doubts that this would be very accurate as some light sources might have close values (the intensity is what is being measured on a ball park wavelength). The sensor I am looking at currently is the Hamamatsu’s S10917-35GT RGB color sensor , sensitive to only the required wavelengths. Building a high resolution spectrograph with a diffraction grating film This route is much more complicated and requires external processing of the images to determine the light source. Basically, you build a spectrograph with a diffraction grating film and a high resolution camera. The image is processed with a computer software to plot the emission spectrum graph and you can analyse the graph to determine the light source. Development guide is here Unfortunately, this is not very convenient as we would prefer the device's primary objective to function on it's own without any networking. So, the question Is there any drawback on my first solution? Is there a better solution? Preferably can fit on a standalone device? This would probably be far fetched but is there a sensor out there that can analyse a light emission and provide intensity values on a range of chosen wavelengths? Or atleast something that would help me build a device that does such. | You really are looking for someone who's already solved this, I suppose. But I don't know of any project, myself. So all I can offer are some thoughts to consider. On spectrometers: For a spectrometer device, a DVD-RW (don't use DVD-R, as it will absorb substantial bands in the red region) provides 1350 \$\frac{\textrm{lines}}{\textrm{mm}}\$, so that is very cheap and readily available. Small megapixel digital cameras are also cheap. An array could also be used, but these days it seems an entire 2D camera is cheaper and more available. So I wouldn't bother with an array. Using a DVD-RW you can actually separate the yellow spectral lines of
mercury at 577 nm and 579 nm. (Not with a CD, though.) I've done this, myself, using a DVD-RW and a mercury-argon lamp. Wavelength calibration is cheap. Just get a mercury-argon lamp. You'll get the argon lines in the first minute or so, then the mercury lines will dominate later. From the combination of them, you can easily calibrate your camera pixels vs wavelength. Hg-Ar lamps used for calibration used to cost me about $8, but I expect they are more expensive now. Intensity calibration is expensive. You need a standard lamp, traceable to NIST standards, and these have to be recalibrated after 100 hrs use, or so. They are cheap bulbs, uncalibrated. But the calibration process costs real money. Then you have to set up a proper optical arrangement, too. But this is the only way to figure out just how each of your pixels respond to each of the wavelengths they are being hit with. Frankly, I'd try and avoid any of this and hope I didn't need it or could just apply a basic templated approximation of a standard lamp and not waste money on actual calibration, hoping that what I got was good enough. Or just not bother at all and use a rigged up equation and figure, "oh, well," and see how it goes. Chances are, you can make this step go away and still get useful results if you just think carefully. You probably can consider going from 450 nm to 750 nm, but you cannot hope to exceed an octave with a single grating. You may want some kind of filter involved so that you don't get mixed up spectral energies on the same pixels. Or just don't worry about it and do some experimenting. Optical baffling will be desired to avoid getting extraneous light where it isn't wanted. Tony just reminded me... you'll need a narrow slit -- about as narrow as you can make it. I prefer the use of two old-style razor blades that can be adjusted. One fixed, one movable. But for the card stock paper box, I just used an exacto blade 'very carefully' to create a narrow and uniformly narrow slit. I've done all this using a sheet of paper (card stock) that I print out and then cut, fold tabs, use Elmer's glue, and create a box with baffles made essentially out of paper. The baffling uses special dark flocking to help absorb and block wayward light. The DVD slides in at the correct angle and a small camera is then placed at the exit. I've used this with my own eye to observe different lighting in the house and it works PERFECTLY well, in my opinion. I have no trouble differentiating between incandescent, fluorescent, and LED lighting sources. And the sun, for that matter. I tried a DVD-R and immediately saw a huge missing band in the red, which is why I'm telling you that you need DVD-RW if you care about that region. I could publish some plans for all this, I suppose. Location of slit, angle of DVD, etc. While my box design uses the entire DVD-RW (because I wanted to be able to drop in other DVD media and/or a CD (at a different angle so I'd made two different insertion slots for that purpose), only a tiny part of the DVD-RW surface is actually involved (if baffled correctly.) So I also liked using the entire DVD-RW for that reason, as well, because cutting the DVD into pieces would stress it and I didn't want to do that, either. Just by way of a little info, the box used a 70 mm vs 40 mm tilt for the DVD (1350 \$\frac{\textrm{lines}}{\textrm{mm}}\$) and 50 mm vs 40 mm for a CD (625 \$\frac{\textrm{lines}}{\textrm{mm}}\$.) The slit was positioned on the 40 mm face, positioned about 10 mm from one edge in either CD or DVD case. On RGB: The RGB sensor you mentioned has, as I expected to see, very wide acceptance of wavelengths in each of the three sensors. LEDs tend to have very wide response ranges (they emit and receive over a wide range of wavelengths.) That sensor has modestly overlapping responses. How well all that will work for you, would be a matter of experimentation, I think. You could apply some computer code, instead, using your curves and the response functions of the sensor to see if it would be serviceable. But I'm not going to even try and write it for you. Perhaps the best thing would be for you to knuckle down and buy the sensor and do some testing with it. It may be just fine for your needs. But I can't tell you yes or no, from a quick scan of it. I also haven't tried to do this with RGB, so that's another reason I can't promise anything here and you'll have to just try it for yourself. I liked Eugene's comment about frequency , too. Incandescent bulbs (and I've tested this using a very sensitive instrument -- with tens of microKelvin resolution and hundreds of microKelvin accuracy traceable to NIST standards, as I work on such things) will vary about 3% of their amplitude during the AC cycling at 60 Hz. (Would be different with 50 Hz.) Fluorescents operate at mains frequencies and also at high frequencies (both are manufactured and used.) But their emissions are through phosphors, which often have fast response times. (Some phosphors are slow, order of millisecond taus due to depending upon forbidden triplet to singlet transitions. But many of them are quite fast -- microsecond taus.) You may have to do some experimenting here. But I think this could be fruitful, because you can design electronic circuits for very narrow bands if you want to. You'd have to worry about conditioning the signal so that you don't saturate the amplifier chain. But that's doable. I haven't looked at the frequencies used in modern LED bulbs, though. And I'll leave it to you to google up details there. All that said, I think Eugene's point has merit worth examining, as well. Personally? I'd go with the DVD-RW because I have a lot of experience with doing that, know that I can do it easily, quickly, and cheaply, and because I think I could avoid the intensity calibration step to get where you need to go. The cameras are dirt cheap and so is the Hg-Ar lamp for wavelength calibration, periodically. It's almost no work at all. Plus, I already have walked around the house checking out different light sources with a hand-held card-stock box with no electronics at all and was perfectly able to see the differences in various light sources, by eye. So I know I can get there from here. EDIT: A couple of images from an old fluorescent bulb. One of them across the spectrum and the other zoomed up a bit. Pretty cool separation of the mercury doublet there! I specialized in binning LEDs for Siemen's OSRAM division years ago, as a contractor. So this stuff comes partly from that experience. We first used expensive spectrophotometers, but switched to Ocean Optics some time later (much cheaper.) But in the meantime I had a lot of fun with DVDs and CDs, used with all that fancy calibration equipment laying about. (Including disappearing filament calibrators, which I forgot to mention above.) Spent a LOT of my time studying human response reports prior to and since the CIE 1931 standard and the later ones in the 1960s. Also really enjoyed Edwin Land's work in the late 1970's and early 1980's -- very interesting stuff. | {
"source": [
"https://electronics.stackexchange.com/questions/263537",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/126643/"
]
} |
264,184 | I've always thought that the absolute maximum ratings on a part are the limits that thou shalt not violate. Period. End of story. However, another engineer is making the case that it's okay to exceed the absolute max rating for the input voltage on a microcontroller I/O pin. Specifically, he wants to apply 5v, current limited to 30uA, to a micro with an absolute max voltage of 3.8v (Vdd + 0.3V <= 3.9V). The argument being the clamp diodes will take care of the excess voltage. I couldn't find anything in the datasheet about the I/O hardware on the micro. When is it okay to exceed the absolute maximum rating on a part? Datasheet User Guide | Its never safe to exceed the maximum ratings. Even operating at a point within the ratings can result in failures if for example the manufacturing process has drifted out of spec (I've had power transistors fail in a prototype run soak test, and the manufacturer admit to a fault). The further from the 'safe' region you operate, the higher the chance of early failure. Maybe seconds, maybe months - generally the analysis won't exist. Rarely, (and sometimes more commonly as devices become more mature) a manufacturer might relax some of the maximum ratings - particularly ratings which relate to time limited stresses. In the case you specify, you've identified that the absolute maximum ratings are probably an approximation. Its plausible that \$\mu A\$ currents with a high drive impedance can be accepted on the pins quite reliably without exceeding the breakdown voltages (and arguably you don't exceed the rating like this, since the pin will clamp). There is additionally the risk of latch-up if unexpected parts of the silicon are conducting with various voltage states. Don't expect this to work in 100,000 parts which have a working lifetime of 10 years. If you can live with the occasional catastrophic failure, maybe the design is still reasonable. If its a debug port on a $5 product with a 6 month lifetime, it would be more reasonable. | {
"source": [
"https://electronics.stackexchange.com/questions/264184",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/96775/"
]
} |
264,482 | I'm not familiar with this symbol. Does it have a name? What does it imply when reading an electrical schematic? | Cables FL1000B20-WHT and FL1000B20-BLU are twisted pair with additional shield. Look at these symbols: | {
"source": [
"https://electronics.stackexchange.com/questions/264482",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/13605/"
]
} |
264,621 | I have observed that WiFi routers with 2 antennas have a better coverage than a router with a single antenna. How does that work out? I can clearly make out that the second antenna is definitely not a repeater kind of thing, or is it? Absolutely related: How does having more antenna help in a networking router The answer in the question sited above speaks of Noise cancellation. I can correlate that to Efficiency in terms of reception quality, packet loss, etc, but not to the signal strength. | In free space with a nice direct path, it would make little difference. Unfortunately, WiFi doesn't operate in free space: it operates in a complicated sea of reflections from walls, people, furniture, wiring etc. The reflections add together in more or less random phases, and from time to time the signal level can drop quite significantly. This is called Rayleigh Fading. As the fade depends on the relative phases of the signal paths, being only half a wavelength away is enough to make the random fades at these two positions completely independent. If there is a 10% chance of each antenna having a signal strength too low for operation, then the chance of both antennas suffering is just 1%. This is called Diversity Reception . The receiver decodes both channels, and uses the one with the fewest errors. There are other, cleverer, more complicated ways to use two antennas in reception and transmission to improve the signal strength or data rate, but this one is the easiest to understand. | {
"source": [
"https://electronics.stackexchange.com/questions/264621",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/74840/"
]
} |
266,634 | I read in many websites that transformers can only be used, to step voltage up or down, with AC current (which is why AC is preferred for power transmission since they can transfer huge power in the form of high voltage over thin wires instead of thich ones then they can be stepped down again), but then I started studying car mechanics and I discovered that the ignition coil also acts as a transformer and can step voltage from the 12V battery to ~30kV, but from the DC car battery, so the question here is: Is a transformer only used with AC? And if so, how does the ignition coil step up voltage. And if it can be used with DC too, so why use AC current in the first place?? | Transformers are AC only. Running DC through a transformer basically gives you a heater. Critically, transformers work through the fact that a change in magnetic field induces a voltage in a wire. The critical portion is that the change is required . In an ignition coil, the change is created by simply connecting and disconnecting the ignition coil from the battery. The disconnection of power from the coil produces a collapse of the magnetic field produced by the current-flow through the coil, and results in a high-voltage pulse on the output, and subsequently a spark. The connection and disconnection of the ignition coil from the battery converts (some of) the DC battery voltage to AC . | {
"source": [
"https://electronics.stackexchange.com/questions/266634",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/103699/"
]
} |
266,824 | I am running about 6.5W though a 10W resistor . The ohm rating is 220 ohms, which is correct for the circuit ohms which is calculated to about 225 ohms. Here is what is running through my 220 ohm 10 watt resistor: 38.4 volts 0.17 amps 225.88 ohms 38.4V * 0.17A = 6.528W Within a couple minutes it got so hot that it burned me. I'm ok though because I only touched it for a second. But I was expecting it to stay cool since the resistor is rated at almost double the power that is going through it. The electronics people told me that it shouldn't get hot with double wattage. Is this normal? Why would the resistor be getting hot? Also, is there a fire risk? p.s. The resistor is resting on brick. | First let's do a quick number crunch: 6.528W/10W = 65% (of 10W) Referring to the datasheet: There is about a 165C rise in temp. Do not touch! . As for "Is it a safe temperature for the resistor?", refer to the next figure: I'll admit that the Derating Curve Graph kinda hurts my head. But, if you follow the 10W curve over to 25C (about room temperautre), the resistor should be able to handle 100% of it's rated power. Note that I'm only assuming the ambient temperature is 25C ! If you have it lying on a brick, it should be okay.
It appears that the resistor can handle up to about 115C ambient temp @ 65% load. But that would be pushing it to the max. | {
"source": [
"https://electronics.stackexchange.com/questions/266824",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/128101/"
]
} |
266,845 | So I have learned that in order to shorten christmas lights, you need a resistor. And unless you get a very very big resistor (which is expensive and hard to find, or use a heatsink, or string many together to up the wattage a lot), it will get very hot and you can't let it touch anything. I don't know what I am missing why I needed a resistor for shortening a christmas string unlike the shorter string. For example, someone could manufacture a string with 78 bulbs instead of 100, and I am sure they would not have a hot resistor on there. But why does a shorter string of lights not need a resistor? I'm not sure why I am needing to add a hot resistor, I wondered what they do in the manufacturing process to determine how to make the string without a resistor? Is it the type of bulb? Or is there something else involved? Is there a way to emulate the shorter string of lights without the resistor? Note: these are strings which plug into a wall outlet of 120V. The voltage therefore cannot be adjusted since the power outlet cannot be adjusted. | The strings are designed to use bulbs whose voltages sum to equal the supply voltage. So a string that uses 20 bulbs for a 120V power source will use bulbs designed to operate at 6 volts. And a string that uses 50 bulbs for a 120V source will use bulbs designed to operate at 2.4V. When you are making hundreds of thousands (or millions) of strings you can have custom bulbs made for whatever voltage you wish. If you want to remove some of the bulbs and shorten the string, then you must compensate for the power the bulbs were using or run the risk of premature failure of the remaining bulbs which you are operating over-voltage. A 2.4V bulb designed for a 50-bulb string is NOT "interchangeable" with a 6V bulb designed for a 20-bulb string. No matter how similar they may appear to the naked eye. | {
"source": [
"https://electronics.stackexchange.com/questions/266845",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/128101/"
]
} |
267,789 | In many Power over Ethernet (POE) setups the transmission voltage is 48V or slightly more. While higher voltage has obvious efficiency advantages, how safe it is? Is there any risk of electrocution when accidentally exposed, in particular to children? Such wirings lack the protection that is used for 120/230V, and frankly the difference between 48V and 120V doesn't seem to be that significant. | frankly the difference between 48V and 120V doesn't seem to be that
significant. 120V is 2.4 times higher than 48V - hardly what I would call 'not that significant'. 120V AC is even worse, for two reasons:- 120VAC has a peak voltage of 170V, 3.5 times higher than 48VDC. The 'electric shock' feeling occurs on every peak of the AC waveform, whereas with DC it mostly occurs on initial contact. It only takes about 30mA of 60Hz AC current through the heart to cause fibrillation, compared to 300-500mA of DC current. The 'let go' current (above which you cannot let go of a grasped conductor) is 4 times higher for DC than AC. So that means you need 4-17 times more DC voltage to get a fatal shock. Combine 2.4 times higher voltage with 4-17 times higher susceptibility, and 120VAC is approximately 10-40 times more deadly than 48VDC. But is 48VDC safe in an Ethernet cable? Provided you don't strip off the insulation and poke the bare wires into your flesh, the chances of getting a fatal electric shock from it are negligible. I know from personal experience because I was a telephone exchange technician for 15 years, and regularly worked on live equipment with exposed contacts. The biggest DC shock I ever got was a light tingle when grasping a 50V bus bar (90VAC ringing was a different story...). | {
"source": [
"https://electronics.stackexchange.com/questions/267789",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/18162/"
]
} |
267,965 | As a result of heavy snowfall yesterday night, I woke up to find out that the regular 230 volts delivered to my house had dropped to 110 volts (fixed later that day by the power company). Old fashioned light bulbs worked as if a dimmer was attached to them (only a little light), fluorescent lights did not work, one LED was blinking while the remaining LEDs worked fine! Why is it that LED lights were unaffected by the storm, while all the other lights were affected? The LEDs were regular E27 socket LED light "bulbs". | Your LED bulbs are most likely fitted with a wide-range power supply, operating from 100-240 Vac. Hence, when the voltage dropped, they were still within their operating limits and your LED bulbs were as bright as before. Side note: You'd be surprised how many bulbs marked 220-240 Vac can actually operate down to 100 Vac or less. The nameplate numbers only tell you where it can operate, not where it can't. | {
"source": [
"https://electronics.stackexchange.com/questions/267965",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/40734/"
]
} |
268,033 | If I want to get the wavelength of a radio wave, I must divide the speed of light by the frequency? So having a 125 kHz RFID means an estimated 2km wavelength? If its wavelength is 2km long, why does this low frequency RFID have a short read range? | Because RFID doesn't work based on wave propagation. It's thus not actually a radio system (despite working at "RF"=Radio Frequency). Think of an RFID tag more as the secondary side of an air-core transformer, where information is transmitted by the tag changing the amount of power it draws from the primary side of the transformer, or by charging a energy storage (capacitor), and then exchanging the role of secondary and primary side of the transformer. Because we're not talking about a wave propagating away from antenna, but about a coil coupling into a magnetic field, the decay in power is even worse than the distance² for free space loss, and after a couple of cm, practically no effect of the tag on the reader can be made. | {
"source": [
"https://electronics.stackexchange.com/questions/268033",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/128879/"
]
} |
268,259 | I'm programming the simulation of some circuitry. These are relays that will open automatically when they lose power: Do relays such as this have a particular name? "power hold relay"? "single pole relay"? "self-opening relay"? I see that its technically a diode, a coil, and a relay, but I was hoping there was a technical name for this kind of relay. | It's called a "relay". There is nothing special here. Normal relays are held in one state by mechanical spring action when the coil is not energized, and in the other state when the coil is energized. A relay being energized and power going away is no different from you switching it off deliberately. Either way the coil stops producing a magnetic field, and the mechanical spring returns the contacts to the unenergized state. There are such things as bi-stable or latching relays. These mechanically stay in the same state they were last driven to. Of course driving them is no longer as simple as energizing or not energizing a coil. There are two possibilities. There can be two coils, each used to drive the relay to one of its states. Or, the magnetics can be polarized so that current polarity thru a single coil determines the state the relay is driven to. One way or another, there needs to be at least three different driving states. Latching relays are much less common, and any such relay will be clearly labeled as such. Just a "relay" has a coil that is either on or off. For normal (non-latching) relays, contacts are classified as normally open (NO), normally closed (NC), and common (COM). NO and NC refer to the switch states when the coil is not energized. A SPST relay is the simplest type, since there is only one contact and therefore two output leads. This type must be specified as normally open or normally closed. If you want the relay to "shut off" when power goes away, then you want a normally open type. Many relays have SPDT outputs, or multiple of them, like DPDT. In that case, one of the ends is normally open and the other normally closed. These flip state as the coil is energized. The center contact that flips between being connected to the NC and NO leads is the common. | {
"source": [
"https://electronics.stackexchange.com/questions/268259",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/13605/"
]
} |
268,512 | I used to work at this electronics assembly plant in Arizona, and the machines there used reels of SMT parts that were like a bucketed plastic ribbon with a peel-off plastic seal. I don't know what those are called; most of them held tiny pieces of the basic elements of circuitry. Occasionally though I saw some moderately sized BGA chips and the like, eg. Xilinx chips that came in these ribbons as well. I'm curious if Intel sells ribbons like that filled with 6700K chips or something, probably to Dell or some other manufacturer. How about AMD selling ribbons of say G-Series SOCs, or any other massive chips or parts that are sold in literal reels? | yes 14.6 Handling: Shipping Media
14.6.1 Mid-temperature Thin Matrix Tray The BGA packages are shipped in either a tape and reel or a mid-temperature thin matrix tray that
complies to the JEDEC standards. Typically, JEDEC trays have the same
‘x’ and ‘y’ outer dimen- sions and are easily stacked for storage and
manufacturing. For tray dimensions please refer to Chapter 10 of this
data book. The JEDEC style shipping trays are returnable to Intel for
reuse. Chap- ter 10 contains detailed information on the return
addresses for the different types of shipping trays. Intel will pay
all shipping costs associated with the return. 14.6.2 Tape and Reel Tape and reel handling is engineered to contain and protect surface mount components in embossed semi-conductive PVC
or polystyrene carrier tapes to aid the high speed board mounting
operations foundinmanyhighvolumeboardoperations.
TheBGApackagesareshippedfromIntelinacarrier tape made of antistatic
treated plastic. It offers exceptional strength and stability over
extended time and wide temperature variations, while at the same time
maintaining flexibility for use in automated equipment. The cover tape
used is heat sealable, transparent, and antistatic. The loaded carrier
tapes will be wound onto a plastic reel. The carrier tape dimensions
meet the EIA standards. The tape and reel packaging standards offered
by Intel for many of the PBGA/HL-PBGA packages meet the EIA standards,
ie, EIA 481-1, 481-2, and 481-3. However, there are some products shipped from Intel in tape and reel that have a package orientation in
the tape that is different from the EIA standards. It is advisable
that the user of Intel BGA products obtain a product data sheet that
shows the tape and reel shipping details to insure the correct cavity
orientation is understood. http://www.intel.com/content/dam/www/public/us/en/documents/packaging-databooks/packaging-chapter-14-databook.pdf | {
"source": [
"https://electronics.stackexchange.com/questions/268512",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/39207/"
]
} |
268,944 | I am trying to understand this "bootstrap bias" amplifier circuit. The picture below is adapted from the book "Transistor Techniques" by G. J. Ritchie: This circuit is a variation of the "voltage divider bias", with the addition of the "bootstrapping components" \$R_3\$ and \$C\$ . The author explains that \$R_3\$ and \$C\$ are used in order to achieve higher input resistance. The author explains this as follows: With the addition of bootstrapping components ( \$R_3\$ and \$C\$ ) and
assuming that \$C\$ is of negligible reactance at signal frequencies,
the AC value of the emitter resistance is given by: \$R_E' = R_E || R_1 || R_2\$ In practice this represents a small reduction in \$R_E\$ . Now, the voltage gain of an emitter follower with emitter resistance \$R_E'\$ is \$A=\dfrac{R_E'}{r_e+R_E'}\$ , which is very close to
unity. Hence, with an input signal \$v_{in}\$ applied to the base, the
signal with appears at the emitter ( \$Av_{in}\$ ) is applied to the
lower end of \$R_3\$ . Therefore, the signal voltage appearing across \$R_3\$ is \$(1-A)v_{in}\$ , very much less than the full input signal,
and \$R_3\$ now appears to have an effective value (for AC signals)
of: \$R_3'=\dfrac{R_3}{1-A}\gg R_3\$ . To try to understand this, I made an AC model of the circuit. Here is the AC model: From the AC model, I can verify the author's claim that the emitter resistance is \$R_E || R_1 || R_2\$ and that the voltage in the node labeled as V is slightly less than the input voltage. I can also see that the voltage drop across \$R_3\$ (given by \$V_{in} - V\$ ) will be very small, meaning that \$R_3\$ will draw very little current from the input. However, there are 2 things that still I don't quite understand from that explanation: Why can we simply apply the formula for the emitter-follower voltage gain \$A=\dfrac{R_E'}{r_e+R_E'}\$ here, neglecting the effect of \$R_3\$ ? What does it mean to say that the \$R_3\$ appears to have a different "effective value" for AC signals? I don't see why \$R_3\$ would change value. Note that in order to try to understand this circuit's behavior further, I have tried to analyse it by finding its AC input resistance in two ways. I've posted both attempts as an answer to this question, for reference. | You've framed some good questions and I've upped you for that. To address (1) and (2), let me avoid the small-signal linearization model and just have you look squarely at the circuit itself, as it stands. I've redrawn the schematic a little. Not so much because I think it will make things clearer than your own schematic. But because perhaps drawing it slightly differently might trigger a different thought: simulate this circuit – Schematic created using CircuitLab Now, you can easily see that the AC signal is placed directly at the base of \$Q_1\$. So the emitter will follow that signal, in the usual emitter-follower behavior you know so well, to provide a low-impedance, in-phase copy of the AC signal with a gain slightly less than 1, at the emitter. That much is really easy to see. Now, \$C_{BOOT}\$ transfers that signal (assuming like you say that the value is also low impedance for the AC signals of interest) from the emitter, which is able to drive that capacitor quite well, to the base divider where, thanks to the relatively high Thevenin impedance of the \$R_1\$ and \$R_2\$ biasing pair, that node now also gets a copy of the AC signal. (The biasing pair impedance is high, so the effective \$C_{BOOT}\$ and \$R_{TH}\$ divider itself doesn't diminish the signal much.) So, the AC signal provided at the base of the BJT is copied, in phase and with only some slight losses along the way, to the left side of \$R_3\$. But the right side of \$R_3\$ is being driven by the original AC signal via \$C_1\$! So, both sides of \$R_3\$ have the same AC signal present on both sides of it. Think. If a voltage change that appears on one side of a resistor is exactly matched by the same voltage change appearing on the other side of that resistor, then how much current change occurs? Zero, right? It has no effect at all. This is the magic of this bootstrap! Now, the reality is that the AC signal is diminished a little bit, so yes there is some actual current change in \$R_3\$. But \$R_3\$ does a yeoman's job of isolating the \$Q_1\$ base, as there is far, far less current change than would otherwise be expected by its face value. (In effect, it provides a near 'infinite' impedance between the base and the biasing pair at AC , while at the same time allowing the biasing pair (and the DC drop across \$R_3\$) to provide proper DC biasing for \$Q_1\$. It's really nice stuff. I would never consider using this kind of voltage amplifier without a bootstrap like this. (Though I probably would include an AC gain leg at the emitter, too.) Too much good for so little effort. | {
"source": [
"https://electronics.stackexchange.com/questions/268944",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/34096/"
]
} |
268,953 | I have recently cannibalized a 6 year old microwave oven.
I was very surprised to find the following beast at the electrical entry of the oven: The reason: this small 1:1 isolation transformer was powering a 900W oven, without any switching technology (everything in the circuit remains at the main 50Hz): the big internal high voltage transformer was connected to it.
I have analysed the circuit and drawn the schematic: If I'm not wrong, the blue cubic component is a capacitor, and so are the two other small blue components (as indicated in the schematic). I guess that the resistor is a bleeder, and that the tank LC circuit is tuned to resonate at 50Hz (in order to block the current in the case where the secondary is opened).
I would like to know if I am missing something, and if not, if this is a well known technique to reduce the size of the transformer connected to the mains supply. Also, what is the essential reason this thing was inserted here? Galvanic isolation? | If you double-check your wiring diagram you will find that is NOT a transformer. That is a common mode choke to keep RFI from being transmitted out through the mains power cord. There is no way (with currently-known technology) to make a mains-frequency transformer that small that handles as much current as a microwave oven draws. You have seen how big the transformer needs to be by your comparison with the size of the high-voltage transformer. Ref: https://en.wikipedia.org/wiki/Choke_(electronics)#Common-mode_chokes | {
"source": [
"https://electronics.stackexchange.com/questions/268953",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/78256/"
]
} |
269,731 | I know the summation equation for two or more resistors in parallel or series, and I know two parallel resistors will give more power. But sometimes I saw some circuits that used two resistors in series , and I am wondering why that method was used and why they didn't use one resistor with a higher value (equal to total series resistors)? Such as the following circuit diagram, two 33 kΩ resistors used in series. So why doesn't it use one 68K resistor? Give it better results? I mean, noise filtering or something else? Note: This circuit is an AC dimmer for a microcontroller. | It's the voltage rating on the resistors that is important here. They are powered from rectified 230 V AC and they need to have the correct voltage rating to suit their application. Two resistors in series having an individual rating of 200 V gives a total voltage rating of 400 volts (near enough if you ignore tolerances on values). Take a look at the good old MRS16 and MRS25 range from Vishay: - With 230 V AC present, the peak could be as high as 325 volts without even considering line transients. Clearly two resistors should be used. And, for SMT resistors this might be useful to consider: - | {
"source": [
"https://electronics.stackexchange.com/questions/269731",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/103430/"
]
} |
270,074 | Back when I was a kid, car batteries used to be huge heavy lumps of plastic filled with lead and acid. They used to weigh almost as much as a mobile phone (slight exaggeration there, sorry). 45 years later, car batteries still look the same and weigh the same. So, in this modern age and emphasis on fuel economy, why do batteries still weigh 40 lb? Why have advances in technology not been able to make them lighter and more efficient? | So, now after the answer to your literal question to your real question , that you sadly didn't ask Battery technology has moved so far in the last 100 years. The lead-acid starter battery became common in cars in 1920, lead is essentially poison, and sulphuric/lead acid isn't any less dangerous. They tend to fail in cold temperatures, especially if not regularly maintained, and even though they're obviously cheap as hell to produce, the whole handling of them, including legal requirements to take back old batteries, must be a nightmare. Why hasn't the industry just drawn a line and switched to things like LiIon or good ol' NiCd or NiMH batteries, now that electric cars have shown you can reliably drive years based on those? The NiCd batteries are simply worse in every aspect but energy density than lead acid. NiMH is better, but much more expensive, and still has a higher rate of discharge, typically (unless you make them even more expensive). And still pretty hard to properly dispose of. Lithium batteries aren't that easy handle. You need to protect them against all sorts of failures, and some of them are pretty fatal: don't overheat your lithium Battery. It will explode. And heat is a serious problem inside a motor compartment (in fairness, a battery doesn't have to be in there, but it's pretty handy). The main reason really is cost. The battery in my last car, a 1999 Fiat Punto, supplied max 100 A (when I tried to estimate the actual short circuit current, around 43 A, but still a lot. Let's say P=U·I=12V·40A=480W) current, and had a nominal capacity of around 30 Ah (that's an energy of 12V·30Ah = 360Wh). It cost me 25€. So, rough guess, it's cheaper than 10€ to produce. So, let's take a lithium battery type that is mass-produced and hence cheap. The commonly found round cells that make up many laptop battery packs are around 3€ each (let's say 1€ in production) for around 3Ah (11.1Wh), supplying up to 5A (tops, don't do that for long) at some 3.7 V. That says a single cell of these can supply 18.5W. So to reach the estimated 480W of my cheapo car battery, you'd need 26 of them. They'd cost 26€ in production, not counting the Euros you spend on control, charge and protection circuitry, on encasing them in something rigid and safe, and the fact that the minerals needed to produce some of the rare-metal components in Lithium batteries aren't currently getting cheaper, and equipping cars all over the world with those will definitely speed up that market mechanism. Let's assume cost scales with capacity. My 26-cell lithium battery has 26·11.1Wh=288.6Wh energy. So we need to scale that by 1.25 to achieve the same 360Wh as the lead-acid battery. Such a cell weighs around 90g. So the weight of the cells is 26·90 g = 2.34 kg. Ok, I don't have the exact weight of my cheap car battery in my head, but let's say it was 15 kg. So we saved weight by a factor of about 6.3, if our casing, and electronics are lightweight (they're not – as far as I can tell, you'll need a hefty switch mode power supply to be able to efficiently charge these using your car's generator, and those mainly consist of a pretty bulky coil of copper, and maybe some ferrite core that isn't exactly lightweight, either). That leads to a cost factor of about 3.5 between component A and component alternative B, with handling disadvantages, lesser reliability and supply chain changes. No wonder the car industry isn't pushing in that direction. (And, by the way, they have excellent lobbying.) | {
"source": [
"https://electronics.stackexchange.com/questions/270074",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/-1/"
]
} |
270,834 | I was going through an app-note AN2606 where I came across this connection diagram: As per my knowledge, UART is push-pull type and Tx provides the pull-up required and hence we don't need to use any external pull ups. Am I missing something here? | While the microcontroller is in reset, its I/O pins will be configured as high-impedance inputs. So the pin used for a UART serial Transmit Data (TXD) will be floating during this time. This can lead to noise causing rubbish to be transmitted by the RS232 line driver. Some line driver ICs have internal pull-up resistors on their TTL/LVTTL-side input pins to prevent this and produce an RS232 idle state. Otherwise, a pull-up resistor can be added. A pull-up resistor on the UART serial Receive Data (RXD) input pin is not necessary because the RS232 line receiver is always driving that pin. Note that the reset period is usually a relatively long time and that any I/O pins used as output pins are prone to this problem and must be considered for a pull-up or pull-down resistor. | {
"source": [
"https://electronics.stackexchange.com/questions/270834",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/68606/"
]
} |
271,105 | When I was about 10 years old playing with lamps, I accidentally picked up a wire completing a circuit for a lamp plugged into the wall (120 V AC U.S. standard). I'm not sure if it was the hot or neutral wire, but I had completed the wire from hand to hand. I had a shock and dropped the wire in slightly less than a second. According to what I see online, which says milliamps can kill me, how did I survive for this long, with no burns or negative health effects? I remember immediately running up to my mother and saying I just got shocked by a house socket with a big grin on my face! (she was not happy!) | You got lucky. Electrocution isn't an exact science. There are multiple things which make a difference: The current which flows through a person depends on the resistance. That in turn depends on whether the skin is wet or dry, the area of skin in contact with the wire, and a lot of other biology things. The resistance of the things completing the circuit - whether you're touching a metal radiator, or standing on a rubber doormat for example. The path of the current through the body matters too, it is currents through the heart that are dangerous, so getting a shock leg-to-leg is less risky than left arm to right leg, for example. Release time. If you drop the wire quickly, there is less risk of damage. The automatic response to let go of the painful thing might happen quicker or slower depending on all sorts of biological things. Health. Some people are just more susceptible to shocks than others. This might depend on build, body fat percentage, or just a pre-existing heart condition. And of course voltage, source resistance and frequency of the source you're touching also matter. All in all, US mains is in the range where it's not guaranteed safe, nor guaranteed to kill, so it comes down to the factors above, and a healthy dose of luck. Don't try it again. | {
"source": [
"https://electronics.stackexchange.com/questions/271105",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/130931/"
]
} |
271,299 | I have seen some development boards (for example. BL652 dev kit ) for low power chips have battery power connected directly to the MCU without a regulator. For the example case, the battery used is a 3V CR2032. The datasheet for the MCU defines the following parameters: datasheet page 16.
Absolute Maximum Ratings Min Max
Voltage at VDD_nRF pin -0.3 3.9
datasheet page 17.
Recommended Operating Parameters Min Typ Max
VDD_nRF 1.8 3.3 3.6 I'm interpreting this as "If your battery voltage drops to a value between 0-1.7 it isn't defined what will happen" . Why this worries me is because I've seen regulators having the Power Good pins and have found no explicit statements in the datasheet that the MCU from the example won't be damaged by the undervoltage. How can I decide if a regulator is needed between a battery and a load, to guarantee there are no damages when the battery voltage starts dropping? | If your battery voltage drops to a value between 0-1.7 it isn't defined what will happen This is often true, but it won't, for sure, destroy anything. Because, if it was destructive, the min Vdd in "Absolute Maximum Ratings" would have been given as a positive value (which I have never seen in any datasheet, and I hope I'll never see that in my life - it wouldn't make sense). So at this point, you are guaranteed the MCU won't be destroyed with undervoltage. However, it could still behave erratically (potentially damaging other external circuitry). Now, in this kind of MCU, there is often a feature called " brown-out detection ", or, sometimes, "undervoltage lockout". This is a feature that monitors the supply voltage and guarantees that the chip is held in reset state when the voltage is under a given level (sometimes programmable). Good news: There is such a feature on the specific chip you're using. See chapter 5.1 in the datasheet you linked. Therefore, you don't need to have a regulator with "power good" detection or an additional supply monitor circuit in your specific case. Note that, if the MCU didn't have the brown-out detection included, there are tiny chips that just offer this feature (often combined with a timed power-on reset generator) without being voltage regulators. | {
"source": [
"https://electronics.stackexchange.com/questions/271299",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/37061/"
]
} |
271,309 | I am calculating the current consumption of an IR ranging detection sensor. Below is the related part I captured from the sensor's specification. The working mechanism of the sensor is that it will send out an IR beam, and then measure the elapse time when it receive back the beam. From the table below, I think it means the sensor will take 33ms to take one measurement. So what does the "Active Ranging average consumption" actually means? How to calculate the current consumption if I take measurement every 0.5s, 1s and 2s? | If your battery voltage drops to a value between 0-1.7 it isn't defined what will happen This is often true, but it won't, for sure, destroy anything. Because, if it was destructive, the min Vdd in "Absolute Maximum Ratings" would have been given as a positive value (which I have never seen in any datasheet, and I hope I'll never see that in my life - it wouldn't make sense). So at this point, you are guaranteed the MCU won't be destroyed with undervoltage. However, it could still behave erratically (potentially damaging other external circuitry). Now, in this kind of MCU, there is often a feature called " brown-out detection ", or, sometimes, "undervoltage lockout". This is a feature that monitors the supply voltage and guarantees that the chip is held in reset state when the voltage is under a given level (sometimes programmable). Good news: There is such a feature on the specific chip you're using. See chapter 5.1 in the datasheet you linked. Therefore, you don't need to have a regulator with "power good" detection or an additional supply monitor circuit in your specific case. Note that, if the MCU didn't have the brown-out detection included, there are tiny chips that just offer this feature (often combined with a timed power-on reset generator) without being voltage regulators. | {
"source": [
"https://electronics.stackexchange.com/questions/271309",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/49480/"
]
} |
271,674 | Tesla Model S Wiki I've been watching youtube videos on this car, and everyone states that the crazy accelleration is due to maximum torque at 0 rpm. Doing further research, this car uses an AC induction motor, not a DC motor. From my old lecture slides, I remember that the torque curve of an induction motor is not this, but can be shifted (by varying the voltage/frequency, I can't remember). Is the "maximum torque at 0 rpm" misinformation going around? | With frequency control, there is not just one torque curve, but an infinite number of curves, one for every operating frequency. The voltage needs to be proportional to frequency. If the voltage is carefully regulated using a mathematical model of the motor with motor operating voltage, current and power factor information, the torque curve can be made to have the same shape at any speed. The required current to produce a given torque at zero speed, will be close to the current required to produce the same torque at rated speed. The motor is never operated at high slip, the operating point is always to the right of the pullout torque point. When starting, the applied frequency is enough above zero so that enough slip is created to produce the maximum torque that the motor can safely produce. | {
"source": [
"https://electronics.stackexchange.com/questions/271674",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/29737/"
]
} |
271,900 | How do GPS satellites keep their on board clocks accurate? I assume that they need to get update from a base station. But how do you make sure that after the update all the satellites are synchronized, i.e. there isn't any phase shift. You have your base station on earth, and assume that all the satellites you want to update are in line of sight. You send an update command. But, each satellite is a different distance from the base station. There will also be a delay from receiving the command, to updating the internal clock. Some satellites may have newer hardware, which is faster. If you update the satellites separately, you would need to ensure that your timings of the commands that you send are very accurate. This seems like a difficult thing to get right. Is there a better method that is used in practice? I guess what I am interested in is say you have a clock at location A. How do you synchronize it with a clock at location B, which is far away from A? You have the message flight time delay, processing delay in B etc. | Clock errors are not corrected, they are compensated in two steps. 1. Error determination The GPS control segment uses reference receivers in well known locations to determine the actual orbital elements and the clock error of space vehicles. The reference for position is the WGS84 reference frame , for time it is the international atomic time . Even the smallest effects like continental drift and relativistic time dilatation are taken into account. 2. Error Compensation The onboard clock (in fact, the SV Z-Count, see IS-GPS-200 3.3.4) is not tuned , slewed or reset to compensate for the error. Citing IS-GPS, 20.3.4.2: Each SV operates on its own SV time Instead, the offset between UTC and this spacecraft's clock ("GPS-Time") is broadcast in the navigation message (see IS-GPS 20.3.3.3.1.8). This does not only include the current offset, but also different forecasts ("fit intervals", 20.3.4.4). Normally, only the highly precise short term forecast is relevant, the others would be used if the control segment is inoperable and no uplink is possible. Likewise, the position error (deviation from nominal orbit) is left uncorrected (this would deplete precious fuel), but is broadcast to receivers by uploading ephemeris data (orbital elements) to the spacecraft. Time of flight is no issue for the uplink, as the new fit interval data has already been determined in the previous step. The actual compensation is then done in the receiver (user segment). It applies corrections when relating the observed signal/code phase of different SV. Exceptional situations Sometimes, old spacecraft behave in unexpected ways, for example their clocks begin to drift unpredictably. AGI has a website with performance data of onboard clocks. You can see, that USA-151 s clock (sending PRN28) is a little bit shaky and needs frequent compensations. If a clock goes wild or a powered maneuver makes the SV unusable for navigation the SV sends an "inoperable flag" in its navigation message and is ignored by end users' receivers. | {
"source": [
"https://electronics.stackexchange.com/questions/271900",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/110971/"
]
} |
272,694 | Both physicists developed really powerful laws which still nowadays rule the electronic behavior of circuits. These help us every day to solve problems, calculate circuit variables… but how did engineers do it before the said laws were discovered? If alternative laws which would not be accepted nowadays were used before this, would this mean that the research done until the discovery of the laws was wrong? Did Kirchhoff and Ohm themselves rely on wrong theories to create 'the good one'? | This is a bit like asking how Aztecs built cars without the wheel: they didn't. There was a chain of invention by scientists in the early 1800s building off each others work. Prior to then there was only electrostatics: Benjamin Franklin rubbing insulators together and noting charged objects attract and repel. Leyden jars. In 1800 Volta invented the battery or "pile". This allowed experiments with a constant source, rather than ephemeral electrostatic discharge. That led to Davy inventing the arc lamp, and Ohm in 1827 quantifying this electricity. Then Faraday's work on electromagnetism, allowing generators, dynamos and motors. Engineers turning it into a "product" came later. Swan and Edison both invented the light bulb; Edison, Tesla and Westinghouse fought over distribution. If alternative laws which would not be accepted nowadays were used
before this, would this mean that the research done until the
discovery of the laws was wrong? Did Kirchhoff and Ohm themselves rely
on wrong theories to create 'the good one'? There's a little discussion of Kirchoff and Ohm here . Kirchhoff's laws followed from applying Ohm's law but the way in which
he was able to generalise the results showed great mathematical
skills. At this stage Kirchhoff was unaware that Ohm's analogy between
the flow of heat and the flow of electricity, which formed the
accepted understanding of electrical currents at that time, led to an
incorrect understanding of electrical currents. Since no heat flowed
in a body at a uniform temperature, it was believed that a static
current could exist in a conductor. Kirchhoff's work would, a couple
of years later, lead to him to realise this error and to give a
correct understanding of how the theory of electric currents and
electrostatics should be combined. Which suggests that the answer was yes - people were building off incorrect theory to some extent. In the case of Ohm, he was building off Fourier's work on heat conduction. Electrical conduction is similar but not exactly the same. There isn't anything on quite the scale that "phlogiston" was in chemistry - a controversial popular theory that ultimately turned out to be wrong. | {
"source": [
"https://electronics.stackexchange.com/questions/272694",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/131406/"
]
} |
272,703 | The 6 winding transformer which i shown in figure is a 1:1:1:1:1:1 transformer.It is a schematic of wurth electronics flex transformer. If I apply voltage at one winding of primary what is the current path in secondary? and what is the applications of this type of 6 winding and equal ratio transformers? | This is a bit like asking how Aztecs built cars without the wheel: they didn't. There was a chain of invention by scientists in the early 1800s building off each others work. Prior to then there was only electrostatics: Benjamin Franklin rubbing insulators together and noting charged objects attract and repel. Leyden jars. In 1800 Volta invented the battery or "pile". This allowed experiments with a constant source, rather than ephemeral electrostatic discharge. That led to Davy inventing the arc lamp, and Ohm in 1827 quantifying this electricity. Then Faraday's work on electromagnetism, allowing generators, dynamos and motors. Engineers turning it into a "product" came later. Swan and Edison both invented the light bulb; Edison, Tesla and Westinghouse fought over distribution. If alternative laws which would not be accepted nowadays were used
before this, would this mean that the research done until the
discovery of the laws was wrong? Did Kirchhoff and Ohm themselves rely
on wrong theories to create 'the good one'? There's a little discussion of Kirchoff and Ohm here . Kirchhoff's laws followed from applying Ohm's law but the way in which
he was able to generalise the results showed great mathematical
skills. At this stage Kirchhoff was unaware that Ohm's analogy between
the flow of heat and the flow of electricity, which formed the
accepted understanding of electrical currents at that time, led to an
incorrect understanding of electrical currents. Since no heat flowed
in a body at a uniform temperature, it was believed that a static
current could exist in a conductor. Kirchhoff's work would, a couple
of years later, lead to him to realise this error and to give a
correct understanding of how the theory of electric currents and
electrostatics should be combined. Which suggests that the answer was yes - people were building off incorrect theory to some extent. In the case of Ohm, he was building off Fourier's work on heat conduction. Electrical conduction is similar but not exactly the same. There isn't anything on quite the scale that "phlogiston" was in chemistry - a controversial popular theory that ultimately turned out to be wrong. | {
"source": [
"https://electronics.stackexchange.com/questions/272703",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/129291/"
]
} |
273,160 | A 40 Gbit/s Ethernet interface should have a 40 GHz signal on it. How does common silicon IC technology handle such an exotic beast? My best guess is that internally various parallel busses are used, but I haven't found much on the internals of these things. | There are several ways how you can make a data link faster: make more transmissions per second send more bits per transmission run several links in parallel 40G Ethernet does all of this: according to Wikipedia , it uses 4 channels, running at 1.6GHz each and transmitting 6.25 bits per clock cycle, which results in 40Gbit/s of total bandwidth. Here's a picture that shows you how it relates to other Ethernet technologies (it stops at 10G; 40G uses better cables and/or shorter distances to achieve 4 times the spectral bandwidth): | {
"source": [
"https://electronics.stackexchange.com/questions/273160",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/132152/"
]
} |
273,548 | $$P = I_{\text{eff}}^2 \times R$$ where \$I_{\text{eff}}\$ is the effective current. For power to be average \$I\$ must be average current, so I am surmising that the effective current is the average current. In that case, why is \$I_{\text{eff}}\$ not simply $$I_{\text{eff}} = \frac{1}{t}\int_{0}^{t} |i|dt$$ Instead it is defined like so: $$I_{\text{eff}} = \sqrt{\frac{1}{t}\int_{0}^{t} i^2dt}$$ Thus, using these two expressions to calculate \$P\$ results in different answers. Why is this so? It makes no sense to me. I can only guess that I am misinterpreting the effective current is the average current. If this is not the case, however, I do not see how \$P\$ can be the average power when \$I_{\text{eff}}\$ is not the average current. | Take a simple example where the sums are trivial. I have a voltage that is on 50% of the time and off 50% of the time. It is 10V when it is on. The average voltage is thus 5V. If I connect a resistor of 1 ohm across it, it will dissipate 100W when it is on and 0W when it is off. The average power is thus 50W. Now leave the voltage on all the time but make it 5V. Average voltage is still 5V, but the average power is only 25W. Oops. Or suppose I have the voltage only on 10% of the time, but it is 50V. The average voltage is 5V again, but the power is 2500W when on, and 0W when off, so 250W average. In reality to calculate power in general you have to integrate (instantaneous voltage) * (instantaneous current) over a period of the waveform to get the average (or from 0 to some time t as in your example to find the power over some interval). If (and it's a big if) the load is a fixed resistor R you can say that v= i*R, so instantaneous power is i^2 * R and so then you can integrate i^2 over the period to get the "RMS current", and multiply by R later (since it's fixed it doesn't enter into the integral). RMS current is not particularly useful if the load is something nonlinear like a diode. It can be useful in analyzing losses in something like a capacitor with a given ESR. The losses (and resulting heating effect which shortens the capacitor life) will be proportional to the RMS current, not the average. | {
"source": [
"https://electronics.stackexchange.com/questions/273548",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/123850/"
]
} |
273,727 | I am working through a book of problems and am confused by the answer to this one: A 12 V battery supplies 60 A for 2 seconds. The total resistance of the wires in the circuit is 0.01 Ohm. Q1. What is the total power supplied? Q2. What is the energy lost as heat in the wires? A1: Total power output = 12 * 60 * 2 = 1440 Joules. All good so far. A2: This is the answer in the book: P = I²R * t = 3600 * 0.01 * 2 = 72 Joules That's fine with me. However, if I use the equivalent equation P=V²/R ... P = V²/ R * t = 12² / 0.01 * 2 = 28,800 Joules Both of these equations are for P, so how are they giving me different answers? | 60A through a 0.01ohm resistance gives a 600mV drop. That is the voltage you need to use in the equation. | {
"source": [
"https://electronics.stackexchange.com/questions/273727",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/118316/"
]
} |
273,932 | Just out of curiosity, I searched for antenna on Google Images, and what usually shows is something like this . So I really thought that an antenna radiates in a circular and equal pattern. But as I read the specs of an antenna and understand terms like DBI and Polarization I got more confused. So my question is, what does the signal radiating from an antenna really look like? Update For example, how can we draw this linear polarization inside this ? | This image: Is just a drawing, it has no meaning. It does not represent the radiation pattern of an antenna in any way ! Basically all antennas radiate (and receive) the EM waves in all directions. However, depending on the design it might not radiate and receive in some direction very well but it might do so in a different direction very well. Those are the red parts in the radiation patterns below. Real Antenna radiation patterns look like this: For an isotropic radiator in this case. Or this one for a dish antenna: There are as many radiation patterns as there are antenna types. Antenna designers generally use an EM simulator, for example CST , to calculate/simulate the antenna radiation pattern of a certain antenna structure. How can we draw this linear polarization in the radiation pattern ? These radiation patterns do not show the polarization. Since the polarization is usually in the direction of the length of the antenna it also depends on how you place the antenna. Of course, the radiation pattern changes with that placement also. | {
"source": [
"https://electronics.stackexchange.com/questions/273932",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/128879/"
]
} |
273,995 | What kind of uses do engineers find for 1 pF or lower-value capacitors? This is the kind of value one gets with two bits of wire close to each other or two tracks. | The smallest capacitor I've used recently, in a filter in a 6 GHz receiver, was 0.5 pF. There were some 2 nH inductors there as well, and you could argue that those could be made with a few mm of track. However, both were smaller than the equivalent way of implementing them in copper. Perhaps more importantly than the size, is that they were discrete components. When I wanted to change the capacitor from 0.4 pF to 0.5 pF, to retune the filter, I didn't need to respin the board; I just changed the bill of materials. | {
"source": [
"https://electronics.stackexchange.com/questions/273995",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/56642/"
]
} |
274,574 | I've found a potentiometer which controls the heat of a cook top. One of the outer pins and the centre pin were shorted with a soldered jumper.
Why would someone do that? What does this achieve? | Tying the wiper and one end pole together effectively turns the potentiometer into a simple variable resistor (or "rheostat"). It no longer functions as a voltage divider would, but it does mean that in the case of a failure of the wiper contact (intermittent contact with the carbon track), you'll still have a known maximum resistance value, instead of becoming an open circuit. Depending on how your cooker works this might be a crude failsafe to reduce the heat in case of a failure of the wiper. I would still expect other failsafes to be in place too of course. It is not unusual for a 2 pole variable resistor of equivalent ratings to be more expensive than a potentiometer, so to save cost sometimes a designer will choose to use a pot and simply tie the wiper to one end. EDIT: Thanks to @winny for reminding me that "rheostat" is another name for a variable resistor. | {
"source": [
"https://electronics.stackexchange.com/questions/274574",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/45657/"
]
} |
274,581 | A sustained three-phase fault occurs in the power system shown in the figure (See Link). The current and voltage phasors during the fault (on a common reference), after the natural transients have died down, are also shown. Where is the fault located? This question was asked in GATE Exam 2015, and I was unable to do it. I have no clue how to solve this problem. The question paper in which this question was asked can be Downloaded from here for verification of problem : gate.iisc.ernet.in/gate-answer-2015/EE_S05.pdf | Tying the wiper and one end pole together effectively turns the potentiometer into a simple variable resistor (or "rheostat"). It no longer functions as a voltage divider would, but it does mean that in the case of a failure of the wiper contact (intermittent contact with the carbon track), you'll still have a known maximum resistance value, instead of becoming an open circuit. Depending on how your cooker works this might be a crude failsafe to reduce the heat in case of a failure of the wiper. I would still expect other failsafes to be in place too of course. It is not unusual for a 2 pole variable resistor of equivalent ratings to be more expensive than a potentiometer, so to save cost sometimes a designer will choose to use a pot and simply tie the wiper to one end. EDIT: Thanks to @winny for reminding me that "rheostat" is another name for a variable resistor. | {
"source": [
"https://electronics.stackexchange.com/questions/274581",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/133012/"
]
} |
274,721 | I don't know why, where or how I picked this up, but I believe that if you power an electric motor while blocking it, and thus stopping it from moving, you'll damage it. I'm thinking of the following type of motor, and possibly servo motors: Is it indeed true that holding the shaft in place while powering it will damage it? And if so, why? And could this be prevented by simple measures? (Like putting a resistor in front of it.) Is the "damaging process" any different in servos, or do they get damaged in the same way? | Simply stopping a motor from turning does not by itself hurt it. Think about it. The motor is stopped when you first apply power, and nothing gets hurt. Most motors are designed so that the mechanical forces from the maximum torque won't hurt the motor. The reason some motors shouldn't be stalled with full voltage applied is heat. All the electrical power going into the motor goes to heating the motor. Many motors can be over-heated this way. Designing them to be able to dissipate the heat from maximum applied voltage while stalled would require making other parameters less desirable. In many cases that's not worth it. What makes stalling a motor even worse is that's when it draws the most current. So not only is more electrical power being dumped into the motor, but a higher fraction of that is turned into heat in the motor at low speed. To a pretty good first approximation, think of a motor as a resistor in series with a voltage source. The resistor is just the DC resistance of the windings. The voltage source represents the motor acting as a generator as it turns. The voltage is proportional to speed, and opposes the applied voltage when the motor is turning due to this applied voltage. A stalled motor therefore only looks like a resistor. As the motor speeds up, that resistor is still there, but less voltage is effectively applied to it, thereby causing it to draw less current. Sophisticated motor controllers either model the motor's internal temperature, or measure it outright. This includes tracking how much of the power delivered to the motor is transferred away by the rotating shaft, and how much is dissipated by the motor as heat. When the motor gets too hot, the drive power is reduced to avoid damage. Since the damage is due to heat, stalling a motor under full power is OK for at least "short" intervals. How short "short" is depends on the design of the motor, and is something that good datasheets give you guidance on. | {
"source": [
"https://electronics.stackexchange.com/questions/274721",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/123108/"
]
} |
275,000 | Looking at many pro recording quality microphone preamps, I noticed that every design I looked at that uses an opamp (discrete or IC) limits the gain provided by the opamp to about max 60dB. While most preamps use another stage (transformer(s) or another opamp) to get to 70db or even 80dB, I wonder why they don't just use the first opamp to get there. From what I understand, there would be some advantages: better signal-to-noise ratio as voltage gain rises, simpler audio path, less parts & cost. Does it have something to do with opamp stability over 60dB? Here is a typical schematic. R12 limits gain to 40.1dB. I'm using these formulas: $$A = 1 + (R_{fb}/R_{in})$$ $$gain_{dB} = 20 * log(A)$$ I also noticed that complete mic preamp ICs made by THAT-Corp also have a maximum gain of 60dB. | Gain/Bandwidth product, you want maybe 50KHz bandwidth at 60dB (1,000 times), so you need somewhere around 50MHz, gain/bandwidth product (And more would lower HF distortion)... Make it 80dB and now you need 500MHz GBP, which is getting difficult if you want low noise down near DC (And is getting really bad news to stabilise at low gain). Also consider that the noise is completely dominated by the noise for the stage having the first 20 or 30dB of gain (Do the maths), there is a lot to be said for splitting things so that the first maybe 30dB of gain happens in a low noise stage designed for low Z sources and low 1/F noise, which now only needs a few MHz of GBP and will be easy to stabilise even with weird source impedance. Then do the rest in a second stage (where noise matters less and you have a known source impedance). The other difficult thing is that control laws that make sense become increasingly tricky if going for a one knob gain control, a classic instrumentation stage with have a gain setting resistor varying from a few ohms to maybe a few k ohms, which if you think about it is only maybe 3 orders of magnitude, very difficult to make a reverse log pot have more range then that. | {
"source": [
"https://electronics.stackexchange.com/questions/275000",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/116891/"
]
} |
275,702 | In my book there is no explanation of the phrase short circuit but at many places the author has used it. I had googled it. Some explain it as the flow of charge along a high potential difference while others explain it as the flow of charge along a low resistance path. What exactly is a short circuit? An explanation along with a diagram would be very helpful. | In simple and practical terms, a short circuit is an unwanted or unintentional path that current can take which bypasses the routes you actually want it to take. This is normally a low resistance path between two points of differing potential. For instance: simulate this circuit – Schematic created using CircuitLab In the left simple LED circuit, just over 6 mA is flowing round the circuit. Create a short circuit, represented by a very low resistance (no wire is a perfect 0 Ω conductor) and 5000 A wants to try to flow through it. That's bad news for the battery. The battery could well explode. What is certain, though, the internal resistance of the battery will limit the current that can exist and a large voltage drop will be seen at the terminals of the battery causing the whole circuit to stop functioning. | {
"source": [
"https://electronics.stackexchange.com/questions/275702",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/122006/"
]
} |
275,932 | I have a problem, I only have two hands and the newer oscilloscopes come with four probes. This leaves me with zero hands to press the trigger button (even if I hold three probes with one hand I still can't use four). I usually have to ask a colleague to press the trigger button, in a cubicle this can get awkward. What is a specific way I can hold the probes and press the trigger button,
Without biological modification? | Without biological modification Haha. Does your oscilloscope come with probe hooks ? If so, the next pcb you make, you can create some wire loops on the PCB . Alternatively, you can build a DIY probe holder such as this (Make it open source so people with 3D printers can replicate your ultra helpful probe holders) This probe holder is another cool idea for you to try. | {
"source": [
"https://electronics.stackexchange.com/questions/275932",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/96810/"
]
} |
275,940 | The Setup: I am currently prototyping a wheatstone bridge setup to measure small resistance changes. I don't have the sensor I'll be using yet, so I've simulated it using trim pots. I am using a SAML21 xplained board . I have side A and B of the wheatstone's bridge connected to two of the SAM's internal OPAMPS with programmable gain. I then feed the OPAMP outputs into the 12 bit ADC in signed differential mode. The Problem: I have tried a few different configurations and I can't seem to make heads or tails of it. A bridge voltage of 2mV(or and imbalance of 100 ohms between R2 and Rx if you prefer) is created from a 1V source voltage. When referenced to ground as the OPAMPs do when it is passed through them, this is actually about 580mV for side A and 578mV for side B. The gain is set to 3, so when passed to the positive and negative ADC inputs it comes out to about 2.32V for the positive terminal and 2.31V for the negative. What I get out is about -1000 ADC counts. This makes no sense to me. The positive end is set up to the node of higher potential. So I tried changing the reference voltage. It was set up to an internal 1V ref and I changed it to one labeled INTVCC0 with the comment "1/1.48V CC reference". The result then came out to 203 counts. Finally I tried another reference INTVCC1 commented "1/2V CC (only for internal V CC > 2.1V)". This resulted in about 700 counts. To my understanding of the differential measurement, the reference voltage should not affect it since the difference between the two is all that matters. I have tried changing the bridge voltage by a decent factor on all these references and the changes I see make no sense. The Question(s): Basically I am a bit lost as to what the ADC is telling me, and what changes I can make to get the desired measurement. I understand single ended well enough and what the reference voltage does there, but I cant seem to manage this transfer to differential. Can anyone point out problems or things to check? Side question, could I take the line I'm using for the negative input and instead connect it to an external reference pin for the ADC and use the other input as the positive pin in the single ended input mode? If so, how is that different from what I'm currently doing? | Without biological modification Haha. Does your oscilloscope come with probe hooks ? If so, the next pcb you make, you can create some wire loops on the PCB . Alternatively, you can build a DIY probe holder such as this (Make it open source so people with 3D printers can replicate your ultra helpful probe holders) This probe holder is another cool idea for you to try. | {
"source": [
"https://electronics.stackexchange.com/questions/275940",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/111917/"
]
} |
276,540 | At least one manufacturer out there is marketing "Lithium" cells in familiar AA and AAA sizes, as direct replacements for those standard 1.5 V sizes, boasting the typically better than alkaline longevity you'd expect from lithium. But we all know the range of lithium technology cell voltage is expected to be 3 V for single use cells, up to a max of around 4.2 for li-Ion variations of rechargeable at max charge. All my attempts to research what the truth is (short of buying and cutting one open) have resulted in little more than manufacturers hype. Can anyone shed light on what is going on with these? A stretch to think perhaps they actually have embedded buck converters under the hood? Or has a genuine 1.5 V lithium technology actually been invented? I've included one manufacturer's photo as a reference | Lithium batteries come in many different chemistries, and it is the chemistry that governs the voltage. The most common chemistries are on the order of 3-4V, but there are chemistries which have a 1.5V terminal voltage. The wiki page for Lithium batteries has a list of many different chemistries and their voltages. A Lithium anode with an Iron Disulphide cathode (\$\mathrm{Li-FeS_2}\$) is one such example of a 1.5V terminal voltage, and is the chemistry used in the AA replacement batteries as per the datasheet link on the Wiki page, and in @pjc50's answer. | {
"source": [
"https://electronics.stackexchange.com/questions/276540",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/54964/"
]
} |
277,248 | I was studying a battery protection chip and reference circuit (below) commonly used in cell phone Li-ion batteries, and am confused by the two MOSFETs in series on the negative terminal EB-. According to this question , I now understand that MOSFETs can conduct in either direction S-D or D-S. My questions are:
1. Why are there TWO MOSFETs in this circuit? Why not just one?
2. If they conduct in either direction, why are FET1 and FET2 installed with opposite polarities? How does this benefit the circuit? | It's for two reasons. Well, actually just for one, but with two factors. A MOSFET can conduct in both directions when turned on, as it truly is just a resistive channel that is opened or closed. (Just like a tap, it's open with a tiny resistance, closed with huge resistance or a small gradation in between.) But, a MOSFET also has what is called a body diode, which is indicated by the little arrow. That body diode always conducts when it is forward biased. It looks a bit like this: simulate this circuit – Schematic created using CircuitLab (weird text label aside to make the image look less bombastic) This is inside all MOSFETs, due to their internal construction, so it's not an option. Some MOSFETs are manufactured specially so that the diode becomes more useful to certain applications, but there's always a diode there. As pointed to in comments; the Body-Diode is a consequence of the substrate connection. I remember seeing a rare one or two MOSFET types with that connection on a separate pin, but they'd be hard to find. (And you would likely want to connect the pin normally anyway, for current capability) This means, that if you use only one in a current path that can conduct in two ways, one way will always conduct with approximately one diode's voltage drop. Sometimes you want that, sometimes you don't. When you don't you connect two MOSFETs in reverse, and the total picture becomes this: simulate this circuit When the one body diode conducts, the other blocks and vice-versa. Now in the case of a battery protection, both MOSFETs are connected with their gate to an independent I/O pin, because when the battery is empty, it is allowed to be charged and when it's full it is allowed to be discharged. So the chip only turns on the MOSFET whose diode blocks the allowed directions, and if the battery is at one extreme of its use-case, its body diode will at least allow current in the other direction, even if the over or under voltage situation persist a while after current starts flowing. Whether or not this might cause problems with MOSFET heating when a battery behaves super weird is a separate point and has up to now be proven to be not an issue. Usually the body diode only conducts a fraction of a second before the over/under voltage disappears and both MOSFETs turn back on. The diodes shown in the schematic might have indicated this fact (my eyes glossed over them initially), but it's equally likely they intend for you to place better diodes to support higher safe discharge currents from a full battery or charge currents into an empty one. | {
"source": [
"https://electronics.stackexchange.com/questions/277248",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/16378/"
]
} |
277,252 | By adding cells in series, a larger-voltage bat-
tery can be made, whereas adding cells in parallel results in a battery with a higher
current-output capacity. This is what a book that I am reading says and hence what I am understanding is Voltage is added when Voltage sources are connected in series and Current s added when voltage sources are connected in parallel. Considering the ohm's law, 1)for V1=10v and V2=10v, R = 1K, if I keep only keep V1 as voltage source, V across R would be 10v and I(current) would be 10mA. 2)Now if I connect V1 and V2 in series , V = 20V and I would be 20mA. Did I miss something or the current actually doubled up? I even simulated the curcuit in the Multisim and i faced with a similiar result. Any help in understanding the concept would be helpful. | It's for two reasons. Well, actually just for one, but with two factors. A MOSFET can conduct in both directions when turned on, as it truly is just a resistive channel that is opened or closed. (Just like a tap, it's open with a tiny resistance, closed with huge resistance or a small gradation in between.) But, a MOSFET also has what is called a body diode, which is indicated by the little arrow. That body diode always conducts when it is forward biased. It looks a bit like this: simulate this circuit – Schematic created using CircuitLab (weird text label aside to make the image look less bombastic) This is inside all MOSFETs, due to their internal construction, so it's not an option. Some MOSFETs are manufactured specially so that the diode becomes more useful to certain applications, but there's always a diode there. As pointed to in comments; the Body-Diode is a consequence of the substrate connection. I remember seeing a rare one or two MOSFET types with that connection on a separate pin, but they'd be hard to find. (And you would likely want to connect the pin normally anyway, for current capability) This means, that if you use only one in a current path that can conduct in two ways, one way will always conduct with approximately one diode's voltage drop. Sometimes you want that, sometimes you don't. When you don't you connect two MOSFETs in reverse, and the total picture becomes this: simulate this circuit When the one body diode conducts, the other blocks and vice-versa. Now in the case of a battery protection, both MOSFETs are connected with their gate to an independent I/O pin, because when the battery is empty, it is allowed to be charged and when it's full it is allowed to be discharged. So the chip only turns on the MOSFET whose diode blocks the allowed directions, and if the battery is at one extreme of its use-case, its body diode will at least allow current in the other direction, even if the over or under voltage situation persist a while after current starts flowing. Whether or not this might cause problems with MOSFET heating when a battery behaves super weird is a separate point and has up to now be proven to be not an issue. Usually the body diode only conducts a fraction of a second before the over/under voltage disappears and both MOSFETs turn back on. The diodes shown in the schematic might have indicated this fact (my eyes glossed over them initially), but it's equally likely they intend for you to place better diodes to support higher safe discharge currents from a full battery or charge currents into an empty one. | {
"source": [
"https://electronics.stackexchange.com/questions/277252",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/132000/"
]
} |
277,624 | Atoms of materials with loosely bound outermost electrons constantly exchange charges between each other over time, and these materials are called conductors. Now, the conducting process is different from the one often described in the electrical engineering textbooks. This implies that in order for current to flow in the circuit, an electron has to move from one lead all the way to the other, which is simply not true. Reality is something like this: The electron at the far left coming from the negative lead of a battery, for example, is then colliding at the nearest atom and because of its acceleration it's knocking out the electron which is revolving at this shell level. The knocked electron is heading to its closest atom and in turn it's doing the same, knocking out an electron which creates a chain reaction. So, basically, electrons move just a little bit, but the overall outcome is virtually instantaneous. What I don't understand is if we take a regular conductive wire WITHOUT applied voltage on it, electrons still constantly bounce from atom to atom which means that literally there is "an electron flow" in the wire, but if we connect the wire to a LED diode nothing would happen. So, what I am really asking is how differs "an electron flow WITH applied voltage" from "an electron flow WITHOUT applied voltage" in a wire. | Statistically, there are as many electrons moving in one direction as there are in the 180º opposite so there is effectively no net current. What we know as "current" is the movement of more electrons in one direction than all the others (1D, 2D or 3D through a piece of metal). That's how you can have "tons of free electrons" but no net currents flowing or measurable. The random agitation of those electrons has a name: thermal noise. This agitation is proportional to temperature so you get more of it as you heat things up. However, the average motion is always zero so you can never do any useful "work" or equivalently extract usable energy from the process. This is in agreement with the laws of thermodynamics. | {
"source": [
"https://electronics.stackexchange.com/questions/277624",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/134540/"
]
} |
278,291 | Why are cables only made of round shapes? What is the advantage of it? Why aren't there triangular or quadrilateral or pentagon shapes of cables? | Like Jessica Rabbit- because they are drawn that way. Wire production involves pulling (drawing) the wire through successively smaller dies (often with annealing in between). The dies are most easily made with round holes (they are typically made from very hard materials such as diamond). Not all wire is round - rounded rectangular wire is sometimes used in inductors and transformers. | {
"source": [
"https://electronics.stackexchange.com/questions/278291",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/133145/"
]
} |
278,419 | Even as far back as the early 1900s, telegrams transmitted wirelessly could reach hundreds of miles. For instance, the Titanic communicated with Canada, 400 miles away, with relatively low-powered equipment. Given that telegraphs are very simple, how could these pulses have traveled so far? And would these pulses still travel that far today with the same equipment? And doesn't this mean that there couldn't have been very many people using the systems, since operators within hundreds of miles would all be jamming the airwaves? It seems this would produce a lot of cross-talk. Or were there multiple frequencies available for wireless telegraphy? | the Titanic communicated with Canada, 400 miles away, with relatively
low-powered equipment Quote from this website: - The Titanic's "wireless" equipment was the most powerful in use at the
time. The main transmitter was a rotary spark design, powered by a 5
kW motor alternator, fed from the ship's lighting circuit. The equipment operated into a 4 wire antenna suspended between the
ship's 2 masts, some 250 feet above the sea. There was also a battery
powered emergency transmitter. The main transmitter was housed in a special room, known as the
"Silent Room". This room was located next door to the operating room,
and specially insulated to reduce interference to the main receiver. The equipment's guaranteed working range was 250 miles, but
communications could be maintained for up to 400 miles during daylight
and up to 2000 miles at night. So, if you class 5 kW as low power then that's OK but things have moved on since then. For instance, as tubes/valves were developed radio receivers became more sensitive and this means that transmit powers could reduce considerably. You have to realize that these transmissions are actual electromagnetic waves and they attenuate only very gradually with distance. For instance, comparing against a contactless battery charger, its magnetic field reduces with distance cubed beyond about the diameter of the coils whereas, the H field in a proper EM transmission reduces linearly with distance. Just consider the Voyager 1 probe and its transmissions from beyond Pluto. The transmitter power is only 20 watts but the biggest thing on it was the parabolic dish: - And doesn't this mean that there couldn't have been very many people
using the systems, since operators within hundreds of miles would all
be jamming the airwaves? It seems this would produce a lot of
cross-talk. This was indeed a big problem and there was a famous transmission from RMS Titanic that suggested that SS Californian should "shut-up" because it was blocking a transmission from Cape race on the Canada coast: - Titanic's on-duty wireless operator, Jack Phillips, was busy clearing
a backlog of passengers' messages with the wireless station at Cape
Race, Newfoundland, 800 miles (1,300 km) away, at the time. Evans'
message that SS Californian was stopped and surrounded by ice, due to
the relative proximity of the two ships, drowned out a separate
message Phillips had been in the process of receiving from Cape Race,
and he rebuked Evans: "Shut up, shut up! I am busy; I am working Cape
Race!" Evans listened for a little while longer, and at 23:35 he
turned off the wireless and went to bed. Five minutes later,
Titanic hit an iceberg. Twenty-five minutes after that, she
transmitted her first distress call. Quote taken from here , the Wiki page for the steamship Californian. | {
"source": [
"https://electronics.stackexchange.com/questions/278419",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/115877/"
]
} |
278,442 | I was wondering if it is possible to automatically generate a schematic from some higher-level description (CPU ==> RAM, etc) of a circuit? And whether there are tools that can do that? | the Titanic communicated with Canada, 400 miles away, with relatively
low-powered equipment Quote from this website: - The Titanic's "wireless" equipment was the most powerful in use at the
time. The main transmitter was a rotary spark design, powered by a 5
kW motor alternator, fed from the ship's lighting circuit. The equipment operated into a 4 wire antenna suspended between the
ship's 2 masts, some 250 feet above the sea. There was also a battery
powered emergency transmitter. The main transmitter was housed in a special room, known as the
"Silent Room". This room was located next door to the operating room,
and specially insulated to reduce interference to the main receiver. The equipment's guaranteed working range was 250 miles, but
communications could be maintained for up to 400 miles during daylight
and up to 2000 miles at night. So, if you class 5 kW as low power then that's OK but things have moved on since then. For instance, as tubes/valves were developed radio receivers became more sensitive and this means that transmit powers could reduce considerably. You have to realize that these transmissions are actual electromagnetic waves and they attenuate only very gradually with distance. For instance, comparing against a contactless battery charger, its magnetic field reduces with distance cubed beyond about the diameter of the coils whereas, the H field in a proper EM transmission reduces linearly with distance. Just consider the Voyager 1 probe and its transmissions from beyond Pluto. The transmitter power is only 20 watts but the biggest thing on it was the parabolic dish: - And doesn't this mean that there couldn't have been very many people
using the systems, since operators within hundreds of miles would all
be jamming the airwaves? It seems this would produce a lot of
cross-talk. This was indeed a big problem and there was a famous transmission from RMS Titanic that suggested that SS Californian should "shut-up" because it was blocking a transmission from Cape race on the Canada coast: - Titanic's on-duty wireless operator, Jack Phillips, was busy clearing
a backlog of passengers' messages with the wireless station at Cape
Race, Newfoundland, 800 miles (1,300 km) away, at the time. Evans'
message that SS Californian was stopped and surrounded by ice, due to
the relative proximity of the two ships, drowned out a separate
message Phillips had been in the process of receiving from Cape Race,
and he rebuked Evans: "Shut up, shut up! I am busy; I am working Cape
Race!" Evans listened for a little while longer, and at 23:35 he
turned off the wireless and went to bed. Five minutes later,
Titanic hit an iceberg. Twenty-five minutes after that, she
transmitted her first distress call. Quote taken from here , the Wiki page for the steamship Californian. | {
"source": [
"https://electronics.stackexchange.com/questions/278442",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/133576/"
]
} |
278,446 | Metal detecting enthusiast here. I have been reading various posts pertaining to sensitivity of metal detectors. It is has been suggested that instead of immediately wrapping the coil cable around the stem to instead run the cable straight up the stem for about ten inches and then begin to wrap. What affect would this have on the detecting characteristics of a detecting coil? Would that really do anything? I don't know enough about EE to really understand what's occurring. Can someone explain it? | the Titanic communicated with Canada, 400 miles away, with relatively
low-powered equipment Quote from this website: - The Titanic's "wireless" equipment was the most powerful in use at the
time. The main transmitter was a rotary spark design, powered by a 5
kW motor alternator, fed from the ship's lighting circuit. The equipment operated into a 4 wire antenna suspended between the
ship's 2 masts, some 250 feet above the sea. There was also a battery
powered emergency transmitter. The main transmitter was housed in a special room, known as the
"Silent Room". This room was located next door to the operating room,
and specially insulated to reduce interference to the main receiver. The equipment's guaranteed working range was 250 miles, but
communications could be maintained for up to 400 miles during daylight
and up to 2000 miles at night. So, if you class 5 kW as low power then that's OK but things have moved on since then. For instance, as tubes/valves were developed radio receivers became more sensitive and this means that transmit powers could reduce considerably. You have to realize that these transmissions are actual electromagnetic waves and they attenuate only very gradually with distance. For instance, comparing against a contactless battery charger, its magnetic field reduces with distance cubed beyond about the diameter of the coils whereas, the H field in a proper EM transmission reduces linearly with distance. Just consider the Voyager 1 probe and its transmissions from beyond Pluto. The transmitter power is only 20 watts but the biggest thing on it was the parabolic dish: - And doesn't this mean that there couldn't have been very many people
using the systems, since operators within hundreds of miles would all
be jamming the airwaves? It seems this would produce a lot of
cross-talk. This was indeed a big problem and there was a famous transmission from RMS Titanic that suggested that SS Californian should "shut-up" because it was blocking a transmission from Cape race on the Canada coast: - Titanic's on-duty wireless operator, Jack Phillips, was busy clearing
a backlog of passengers' messages with the wireless station at Cape
Race, Newfoundland, 800 miles (1,300 km) away, at the time. Evans'
message that SS Californian was stopped and surrounded by ice, due to
the relative proximity of the two ships, drowned out a separate
message Phillips had been in the process of receiving from Cape Race,
and he rebuked Evans: "Shut up, shut up! I am busy; I am working Cape
Race!" Evans listened for a little while longer, and at 23:35 he
turned off the wireless and went to bed. Five minutes later,
Titanic hit an iceberg. Twenty-five minutes after that, she
transmitted her first distress call. Quote taken from here , the Wiki page for the steamship Californian. | {
"source": [
"https://electronics.stackexchange.com/questions/278446",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/134973/"
]
} |
279,213 | I just did some quick calculations: On my MacBook I have a resolution of 2560x1440 multiplied by 24 Bit for colors we get 11.05MB for a single picture or 663MB per second at 60 fps . I guess there is some compression, but for example when I move with three fingers over my touch pad thats quite random, what happens next on the screen and almost every pixel changes. Same as with almost every other interaction. Please explain if my calculations are wrong and how is this data transported from my graphics card to my screen? How wide are buses between my graphics card and my screen? Perhaps explain in a nutshell how a display does store pixels? Shift registers? Cache? | Your calculations are correct in essence. For a 1440p60Hz signal, you have a data rate of 5.8Gbps once you allow for blanking time as well (non-visible pixel border in the image output). For HDMI/DVI, a 10/8b encoding is used, which means effectively although you have say 24bit of colour data per pixel, actually 30bit is sent as the data is encoded and protocol control words added. No compression is done at all, the raw data is sent, so that means you need 7.25Gbps of data bandwidth. Again looking at HDMI/DVI. It uses the "TDMS" signalling standard for data transfer. The HDMI V1.2 standard mandates a maximum of 4.9Gbps for a Single-Link (3 serial data lines + 1 clock line), or in the case of Dual-Link DVI a maximum of 9.8Gbps (6 serial data lines, I think). So there is more than sufficient bandwidth to do 1440p60 through a Dual-Link DVI, but not through a HDMI V1.2. In the HDMI V1.3 standard (most devices actually skipped to V1.4a which is the same bandwidth as 1.3), the bandwidth was doubled to around 10Gbps which would support 1440p60, and is also enough bandwidth for UHD at 30Hz (2160p30). DisplayPort as another example has 4 serial data streams, each capable (in V1.1) of 2.16Gbps per stream (accounting for encoding), so with a V1.1 link you could do 1440p60 easily with all 4 streams. They have also release a newer standard, V1.2 which doubles that to 4.32Gbps/stream allowing for UHD @ 60Hz. There is a newer version still which they have pushed even further to 6.4Gbps/stream . Initially those figures sound huge, but actually not so much when you consider USB 3.0. That was released with a data rate of 5Gbps over just a single cable (actually two, one for TX, one for RX, but I digress). PCIe which is what your graphics card uses internally nowadays runs at up to 8Gbps through a single differential pair, so it is not all that surprising that external data interfaces are catching up. But the question remains, how is it done? When you think about VGA, that is comprised of single wires for R, G, and B data which are sent in an analogue format. Analogue as we know is highly susceptible to noise, and the throughput of DAC/ADCs is also limited, so that massively limits what you can push through them (having said that you can barely do 1440p60Hz over VGA if you are lucky). However with modern standards we use digital standards which are much more immune to noise (you only need to distinguish high or low rather than every value in between), and also you remove the need for conversion between analogue and digital. Furthermore the advent of using differential standards over single ended helps significantly because you are now comparing the value between two wires (+ve difference = 1, -ve difference = 0) rather than comparing a single wire with some threshold. This means that attenuation is less of an issue because it affects both wires equally and attenuates down to the mid-point voltage - the "eye" (voltage difference) gets smaller, but you can still tell whether it is +ve or -ve even if it is only 100mV or less. Single ended signals once the signal attenuates it might drop below your threshold and become indistinguishable even if it still has 1V or larger amplitude. By using a serial link over a parallel one, we also can go to faster data rates because skew ceases to be an issue. In a parallel bus, say 32bit wide, you need to perfectly match the length and propagation characteristics of 32 cables in order for the signals not to move out of phase from one another (skew). In a serial link you have only a single cable, so skew can't happen. TL;DR The data is sent at the full bit-rate you calculated (several Gbps), with no compression. Modern signalling techniques of serialised digital links over differential pairs make this possible. | {
"source": [
"https://electronics.stackexchange.com/questions/279213",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/135375/"
]
} |
279,229 | Is there a benefit to the utility company, or potentially to me, for balancing the loads across the two 120V legs in my mains power? this About page suggests some benefit, though the explanation seems suspect. I understand that, on my end, whether I am drawing 100A on one 120V leg, or 50A across both 120V legs, I am still going to be paying for 12kW. Given that, does balancing the loads have any impact? I don't know quite enough about center-tapped transformers to say how the center tap affects transformer performance on either the high- or low-side. | Your calculations are correct in essence. For a 1440p60Hz signal, you have a data rate of 5.8Gbps once you allow for blanking time as well (non-visible pixel border in the image output). For HDMI/DVI, a 10/8b encoding is used, which means effectively although you have say 24bit of colour data per pixel, actually 30bit is sent as the data is encoded and protocol control words added. No compression is done at all, the raw data is sent, so that means you need 7.25Gbps of data bandwidth. Again looking at HDMI/DVI. It uses the "TDMS" signalling standard for data transfer. The HDMI V1.2 standard mandates a maximum of 4.9Gbps for a Single-Link (3 serial data lines + 1 clock line), or in the case of Dual-Link DVI a maximum of 9.8Gbps (6 serial data lines, I think). So there is more than sufficient bandwidth to do 1440p60 through a Dual-Link DVI, but not through a HDMI V1.2. In the HDMI V1.3 standard (most devices actually skipped to V1.4a which is the same bandwidth as 1.3), the bandwidth was doubled to around 10Gbps which would support 1440p60, and is also enough bandwidth for UHD at 30Hz (2160p30). DisplayPort as another example has 4 serial data streams, each capable (in V1.1) of 2.16Gbps per stream (accounting for encoding), so with a V1.1 link you could do 1440p60 easily with all 4 streams. They have also release a newer standard, V1.2 which doubles that to 4.32Gbps/stream allowing for UHD @ 60Hz. There is a newer version still which they have pushed even further to 6.4Gbps/stream . Initially those figures sound huge, but actually not so much when you consider USB 3.0. That was released with a data rate of 5Gbps over just a single cable (actually two, one for TX, one for RX, but I digress). PCIe which is what your graphics card uses internally nowadays runs at up to 8Gbps through a single differential pair, so it is not all that surprising that external data interfaces are catching up. But the question remains, how is it done? When you think about VGA, that is comprised of single wires for R, G, and B data which are sent in an analogue format. Analogue as we know is highly susceptible to noise, and the throughput of DAC/ADCs is also limited, so that massively limits what you can push through them (having said that you can barely do 1440p60Hz over VGA if you are lucky). However with modern standards we use digital standards which are much more immune to noise (you only need to distinguish high or low rather than every value in between), and also you remove the need for conversion between analogue and digital. Furthermore the advent of using differential standards over single ended helps significantly because you are now comparing the value between two wires (+ve difference = 1, -ve difference = 0) rather than comparing a single wire with some threshold. This means that attenuation is less of an issue because it affects both wires equally and attenuates down to the mid-point voltage - the "eye" (voltage difference) gets smaller, but you can still tell whether it is +ve or -ve even if it is only 100mV or less. Single ended signals once the signal attenuates it might drop below your threshold and become indistinguishable even if it still has 1V or larger amplitude. By using a serial link over a parallel one, we also can go to faster data rates because skew ceases to be an issue. In a parallel bus, say 32bit wide, you need to perfectly match the length and propagation characteristics of 32 cables in order for the signals not to move out of phase from one another (skew). In a serial link you have only a single cable, so skew can't happen. TL;DR The data is sent at the full bit-rate you calculated (several Gbps), with no compression. Modern signalling techniques of serialised digital links over differential pairs make this possible. | {
"source": [
"https://electronics.stackexchange.com/questions/279229",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/24050/"
]
} |
279,752 | I bought a new electric fan oven recently. It has a digital thermostat and control system. Yet much to my surprise, I can hear a relay clicking on and off inside it to control the power to its heating element. The oven is rated at 4kW (230V). I would have expected it to be using a triac to turn the power to the element on and off. So why not? I don't think that the answers here duplicate the question about using relays in automobiles. The design criteria for switching 230V AC are very different for 12V DC. To start with, LVDC would use a MOSFET whereas mains AC would use a Triac. Considerations concerning voltage drop across the semiconductor device and dissipating the waste heat are different. Safety regimes are different. The operational environment is different. And so on. | Advantages of relays over triacs: Very little voltage drop when on. This means they don't dissipate much power. For high power devices, the cost of dealing with the heat often outweighs the cost of the component that dissipates the heat. Good isolation. The relay coil is inherently electrically separated from the relay switch. Making that isolation withstand normal power line voltages is pretty easy and cheap. Able to withstand high temperatures better than semiconductors. Silicon stops being a semiconductor at around 150 °C. It's not too hard to make relays that can withstand substantially more. That can be quite useful when in a device that is intended to get hot. Better input noise immunity. Stray capacitive coupling even from nearby power spikes, RF pickup, and the like aren't going to trip a relay. | {
"source": [
"https://electronics.stackexchange.com/questions/279752",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/118105/"
]
} |
280,363 | Computers support hotswapping so that a user can replace a harddrive while the system is running. Is that mostly software just powering off the harddrive or is it some special hardware involved? If there were not special hardware then I suppose that you could hotswap any drive but it seems that the drive must support it in hardware. | It requires several features, some of which put the cost up. These include additional transient suppression on signals, which may put additional capacitance on bus signals thus requiring additional engineering/testing and may reduce performance below what's otherwise possible. Also, connectors which longer and shorter pins that ensure that some pins mate before others and disconnect after others. This is to guarantee that signals are connected and disconnected while power and ground are already connected. In some cases, a control pin can be made to connect last and disconnect first, and this pin will tri-state all other signal pins. | {
"source": [
"https://electronics.stackexchange.com/questions/280363",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/10456/"
]
} |
280,365 | I need to step up a 9V power supply (from a battery) to (at least) 45V, very small output current (less than 1mA, but it may be much less). My purpose is to drive a Russian rod vacuum tube, which needs 45V on its screen grid, and works best with about 60V on its anode (but the latter request may be reduced a lot). The current drawn by the screen grid is negligible, and the anodic current won't be more than 1mA. I am thinking about a charge pump voltage multiplier; Maxim has many of them, but I have not been able to locate an IC suitable to multiply the input voltage by a factor greater than 2. I do not want to use boost converters, since I do not want to introduce an inductor in my circuit. A possible solution would be that of connecting two charge pumps in cascade, but I wonder whether someone has a better and simpler idea. | It requires several features, some of which put the cost up. These include additional transient suppression on signals, which may put additional capacitance on bus signals thus requiring additional engineering/testing and may reduce performance below what's otherwise possible. Also, connectors which longer and shorter pins that ensure that some pins mate before others and disconnect after others. This is to guarantee that signals are connected and disconnected while power and ground are already connected. In some cases, a control pin can be made to connect last and disconnect first, and this pin will tri-state all other signal pins. | {
"source": [
"https://electronics.stackexchange.com/questions/280365",
"https://electronics.stackexchange.com",
"https://electronics.stackexchange.com/users/120200/"
]
} |
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